Many - body simulations using an array processor

International Nuclear Information System (INIS)

Rapaport, D.C.

1985-01-01

Simulations of microscopic models of water and polypeptides using molecular dynamics and Monte Carlo techniques have been carried out with the aid of an FPS array processor. The computational techniques are discussed, with emphasis on the development and optimization of the software to take account of the special features of the processor. The computing requirements of these simulations exceed what could be reasonably carried out on a normal 'scientific' computer. While the FPS processor is highly suited to the kinds of models described, several other computationally intensive problems in statistical mechanics are outlined for which alternative processor architectures are more appropriate

Predictive Uncertainty Estimation in Water Demand Forecasting Using the Model Conditional Processor

Directory of Open Access Journals (Sweden)

Amos O. Anele

2018-04-01

Full Text Available In a previous paper, a number of potential models for short-term water demand (STWD prediction have been analysed to find the ones with the best fit. The results obtained in Anele et al. (2017 showed that hybrid models may be considered as the accurate and appropriate forecasting models for STWD prediction. However, such best single valued forecast does not guarantee reliable and robust decisions, which can be properly obtained via model uncertainty processors (MUPs. MUPs provide an estimate of the full predictive densities and not only the single valued expected prediction. Amongst other MUPs, the purpose of this paper is to use the multi-variate version of the model conditional processor (MCP, proposed by Todini (2008, to demonstrate how the estimation of the predictive probability conditional to a number of relatively good predictive models may improve our knowledge, thus reducing the predictive uncertainty (PU when forecasting into the unknown future. Through the MCP approach, the probability distribution of the future water demand can be assessed depending on the forecast provided by one or more deterministic forecasting models. Based on an average weekly data of 168 h, the probability density of the future demand is built conditional on three models’ predictions, namely the autoregressive-moving average (ARMA, feed-forward back propagation neural network (FFBP-NN and hybrid model (i.e., combined forecast from ARMA and FFBP-NN. The results obtained show that MCP may be effectively used for real-time STWD prediction since it brings out the PU connected to its forecast, and such information could help water utilities estimate the risk connected to a decision.

On the study of catalytic membrane reactor for water detritiation: Modeling approach

Energy Technology Data Exchange (ETDEWEB)

Liger, Karine, E-mail: karine.liger@cea.fr [CEA, DEN, DTN/SMTA/LIPC Cadarache, Saint Paul-lez-Durance F-13108 (France); Mascarade, Jérémy [CEA, DEN, DTN/SMTA/LIPC Cadarache, Saint Paul-lez-Durance F-13108 (France); Joulia, Xavier; Meyer, Xuan-Mi [Université de Toulouse, INPT, UPS, Laboratoire de Génie Chimique, 4, Allée Emile Monso, Toulouse F-31030 (France); CNRS, Laboratoire de Génie Chimique, Toulouse F-31030 (France); Troulay, Michèle; Perrais, Christophe [CEA, DEN, DTN/SMTA/LIPC Cadarache, Saint Paul-lez-Durance F-13108 (France)

2016-11-01

Highlights: • Experimental results for the conversion of tritiated water (using deuterium as a simulant of tritium) by means of a catalytic membrane reactor in view of tritium recovery. • Phenomenological 2D model to represent catalytic membrane reactor behavior including the determination of the compositions of gaseous effluents. • Good agreement between the simulation results and experimental measurements performed on the dedicated facility. • Explanation of the unexpected behavior of the catalytic membrane reactor by the modeling results and in particular the gas composition estimation. - Abstract: In the framework of tritium recovery from tritiated water, efficiency of packed bed membrane reactors have been successfully demonstrated. Thanks to protium isotope swamping, tritium bonded water can be recovered under the valuable Q{sub 2} form (Q = H, D or T) by means of isotope exchange reactions occurring on catalyst surface. The use of permselective Pd-based membrane allows withdrawal of reactions products all along the reactor, and thus limits reverse reaction rate to the benefit of the direct one (shift effect). The reactions kinetics, which are still little known or unknown, are generally assumed to be largely greater than the permeation ones so that thermodynamic equilibriums of isotope exchange reactions are generally assumed. This paper proposes a new phenomenological 2D model to represent catalytic membrane reactor behavior with the determination of gas effluents compositions. A good agreement was obtained between the simulation results and experimental measurements performed on a dedicated facility. Furthermore, the gas composition estimation permits to interpret unexpected behavior of the catalytic membrane reactor. In the next future, further sensitivity analysis will be performed to determine the limits of the model and a kinetics study will be conducted to assess the thermodynamic equilibrium of reactions.

On the study of catalytic membrane reactor for water detritiation: Modeling approach

International Nuclear Information System (INIS)

Liger, Karine; Mascarade, Jérémy; Joulia, Xavier; Meyer, Xuan-Mi; Troulay, Michèle; Perrais, Christophe

2016-01-01

Highlights: • Experimental results for the conversion of tritiated water (using deuterium as a simulant of tritium) by means of a catalytic membrane reactor in view of tritium recovery. • Phenomenological 2D model to represent catalytic membrane reactor behavior including the determination of the compositions of gaseous effluents. • Good agreement between the simulation results and experimental measurements performed on the dedicated facility. • Explanation of the unexpected behavior of the catalytic membrane reactor by the modeling results and in particular the gas composition estimation. - Abstract: In the framework of tritium recovery from tritiated water, efficiency of packed bed membrane reactors have been successfully demonstrated. Thanks to protium isotope swamping, tritium bonded water can be recovered under the valuable Q_2 form (Q = H, D or T) by means of isotope exchange reactions occurring on catalyst surface. The use of permselective Pd-based membrane allows withdrawal of reactions products all along the reactor, and thus limits reverse reaction rate to the benefit of the direct one (shift effect). The reactions kinetics, which are still little known or unknown, are generally assumed to be largely greater than the permeation ones so that thermodynamic equilibriums of isotope exchange reactions are generally assumed. This paper proposes a new phenomenological 2D model to represent catalytic membrane reactor behavior with the determination of gas effluents compositions. A good agreement was obtained between the simulation results and experimental measurements performed on a dedicated facility. Furthermore, the gas composition estimation permits to interpret unexpected behavior of the catalytic membrane reactor. In the next future, further sensitivity analysis will be performed to determine the limits of the model and a kinetics study will be conducted to assess the thermodynamic equilibrium of reactions.

Combined electrolysis and catalytic exchange (CECE) technology - an economical alternative for heavy water upgraders using water distillation

International Nuclear Information System (INIS)

Ryland, D.K.; Sadhankar, R.R.

2003-01-01

Heavy water upgrading is a unique and crucial part of a CANDU power station. Water distillation (DW) systems are used for heavy water upgrading in all CANDU stations. The DW upgrader is designed to take advantage of the difference in relative volatility (a measure of separation of isotopes) between H 2 O and D 2 O. However, the low relative volatility of the H 2 O/D 2 O system requires large number of stages (long columns) and large reflux ratios (large reboiler loads) - thus resulting in significant capital and operating costs. Atomic Energy of Canada Limited (AECL) developed the Combined Electrolysis and Catalytic Exchange (CECE) technology as an economical alternative to the DW system. CECE-based upgraders have been demonstrated in pilot scale facilities at AECL Chalk River Laboratories and in Hamilton, Ontario. This design is based on catalytic hydrogen isotope exchange between water and hydrogen gas. (author)

Design and development of a diesel and JP-8 logistic fuel processor

Science.gov (United States)

Roychoudhury, Subir; Lyubovsky, Maxim; Walsh, D.; Chu, Deryn; Kallio, Erik

The paper describes the design and performance of a breadboard prototype for a 5 kW fuel-processor for powering a solid oxide fuel cell (SOFC) stack. The system was based on a small, modular catalytic Microlith auto-thermal (ATR) reactor with the versatility of operating on diesel, Jet-A or JP-8 fuels. The reforming reactor utilized Microlith substrates and catalyst technology (patented and trademarked). These reactors have demonstrated the capability of efficiently reforming liquid and gaseous hydrocarbon fuels at exceptionally high power densities. The performance characteristics of the auto-thermal reactor (ATR) have been presented along with durability data. The fuel processor integrates fuel preparation, steam generation, sulfur removal, pumps, blowers and controls. The system design was developed via ASPEN ® Engineering Suite process simulation software and was analyzed with reference to system balance requirements. Since the fuel processor has not been integrated with a fuel cell, aspects of thermal integration with the stack have not been specifically addressed.

Photo catalytic BiFeO3 Nano fibrous Mats for Effective Water Treatment

International Nuclear Information System (INIS)

Shaibani, P.M.; Prashanthi, K.; Sohrabi, A.; Thundat, Th.

2013-01-01

One-dimensional BiFeO 3 (BFO) nano fibers fabricated by electro spinning of a solution of Nylon 6 /BFO followed by calcination were used for photo catalytic degradation of contaminants in water. The BFO fibers were characterized using scanning electron microscopy (SEM), X-ray diffraction (XRD), and UV-Vis spectroscopy. The SEM images of the as-spun samples demonstrated the successful production of nano fibers and the SEM images of the samples after calcination confirmed the integrity of the continuous BFO nano fibers. XRD analysis indicated the dominant presence of BFO phase throughout the calcinated nano fibers. Photo catalytic activity of the nano fibers and their application in water purification were investigated against 4-chloro phenol (4CP) as a model water contaminant. The results of the UV-Vis spectroscopy show the degradation of the 4CP by means of the photo catalytic activity of the BFO nano fibers. The kinetics of the photodegradation of 4CP is believed to be governed by a pseudo-first-order kinetics model.

Catalytic Enzyme-Based Methods for Water Treatment and Water Distribution System Decontamination. 1. Literature Survey

Science.gov (United States)

2006-06-01

best examples of this is glucose isomerase, which has been used in the commercial production of high fructose corn syrup (HFCS) since 1967.230 Most...EDGEWOOD CHEMICAL BIOLOGICAL CENTER U.S. ARMY RESEARCH, DEVELOPMENT AND ENGINEERING COMMAND ECBC-TR-489 CATALYTIC ENZYME-BASED METHODS FOR WATER ...TREATMENT AND WATER DISTRIBUTION SYSTEM DECONTAMINATION 1. LITERATURE SURVEY Joseph J. DeFrank RESEARCH AND TECHNOLOGY DIRECTORATE June 2006 Approved for

Airborne ocean water lidar (OWL) real time processor (RTP)

Science.gov (United States)

Hryszko, M.

1995-03-01

The Hyperflo Real Time Processor (RTP) was developed by Pacific-Sierra Research Corporation as a part of the Naval Air Warfare Center's Ocean Water Lidar (OWL) system. The RTP was used for real time support of open ocean field tests at Barbers Point, Hawaii, in March 1993 (EMERALD I field test), and Jacksonville, Florida, in July 1994 (EMERALD I field test). This report describes the system configuration, and accomplishments associated with the preparation and execution of these exercises. This document is intended to supplement the overall test reports and provide insight into the development and use of the PTP. A secondary objective is to provide basic information on the capabilities, versatility and expandability of the Hyperflo RTP for possible future projects. It is assumed herein that the reader has knowledge of the OWL system, field test operations, general lidar processing methods, and basic computer architecture.

Survey of cochlear implant user satisfaction with the Neptune™ waterproof sound processor

Directory of Open Access Journals (Sweden)

Jeroen J. Briaire

2016-04-01

Full Text Available A multi-center self-assessment survey was conducted to evaluate patient satisfaction with the Advanced Bionics Neptune™ waterproof sound processor used with the AquaMic™ totally submersible microphone. Subjective satisfaction with the different Neptune™ wearing options, comfort, ease of use, sound quality and use of the processor in a range of active and water related situations were assessed for 23 adults and 73 children, using an online and paper based questionnaire. Upgraded subjects compared their previous processor to the Neptune™. The Neptune™ was most popular for use in general sports and in the pool. Subjects were satisfied with the sound quality of the sound processor outside and under water and following submersion. Seventyeight percent of subjects rated waterproofness as being very useful and 83% of the newly implanted subjects selected waterproofness as one of the reasons why they chose the Neptune™ processor. Providing a waterproof sound processor is considered by cochlear implant recipients to be useful and important and is a factor in their processor choice. Subjects reported that they were satisfied with the Neptune™ sound quality, ease of use and different wearing options.

First-principles quantum-mechanical investigations: The role of water in catalytic conversion of furfural on Pd(111)

Science.gov (United States)

Xue, Wenhua; Borja, Miguel Gonzalez; Resasco, Daniel E.; Wang, Sanwu

2015-03-01

In the study of catalytic reactions of biomass, furfural conversion over metal catalysts with the presence of water has attracted wide attention. Recent experiments showed that the proportion of alcohol product from catalytic reactions of furfural conversion with palladium in the presence of water is significantly increased, when compared with other solvent including dioxane, decalin, and ethanol. We investigated the microscopic mechanism of the reactions based on first-principles quantum-mechanical calculations. We particularly identified the important role of water and the liquid/solid interface in furfural conversion. Our results provide atomic-scale details for the catalytic reactions. Supported by DOE (DE-SC0004600). This research used the supercomputer resources at NERSC, of XSEDE, at TACC, and at the Tandy Supercomputing Center.

Recycle attuned catalytic exchange (RACE) for reliable and low inventory processing of highly tritiated water

International Nuclear Information System (INIS)

Iseli, M.; Schaub, M.; Ulrich, D.

1992-01-01

The detritiation of highly tritiated water by liquid phase catalytic exchange needs dilution of the feed with water to tritium concentrations suitable for catalyst and safety rules and to assure flow rates large enough for wetting the catalyst. Dilution by recycling detritiated water from within the exchange process has three advantages: the amount and concentration of the water for dilution is controlled within the exchange process, there is no additional water load to processes located downstream RACE, and the ratio of gas to liquid flow rates in the exchange column could be adjusted by using several recycles differing in amount and concentration to avoid an excessively large number of theoretical separation stages. In this paper, the flexibility of the recycle attuned catalytic exchange (RACE) and its effect on the cryogenic distillation are demonstrated for the detritiation of the highly tritiated water from a tritium breeding blanket

Updated Performance Evaluation of the ISS Water Processor Multifiltration Beds

Science.gov (United States)

Bowman, Elizabeth M.; Carter, Layne; Carpenter, Joyce; Orozco, Nicole; Weir, Natalee; Wilson, Mark

2014-01-01

The ISS Water Processor Assembly (WPA) produces potable water from a waste stream containing humidity condensate and urine distillate. The primary treatment process is achieved in the Multifiltration Beds, which include adsorbent media and ion exchange resin for the removal of dissolved organic and inorganic contaminants. Two Multifiltration Beds (MF Beds) were replaced on ISS in July 2010 after initial indication of inorganic breakthrough of the first bed and an increasing Total Organic Carbon (TOC) trend in the product water. The first bed was sampled and analyzed Sept 2011 through March 2012. The second MF Bed was sampled and analyzed June 2012 through August 2012. The water resident in the both beds was analyzed for various parameters to evaluate adsorbent loading, performance of the ion exchange resin, microbial activity, and generation of leachates from the ion exchange resin. Portions of the adsorbent media and ion exchange resin were sampled and subsequently desorbed to identify the primary contaminants removed at various points in the bed in addition to microbial analysis. Analysis of the second bed will be compared to results from the first bed to provide a comprehensive overview of how the Multifiltration Beds function on orbit. New data from the second bed supplements the analysis of the first bed (previously reported) and gives a more complete picture of breakthrough compounds, resin breakdown products, microbial activity, and difficult to remove compounds. The results of these investigations and implications to the operation of the WPA on ISS are documented in this paper.

Heterogeneous catalytic ozonation of ciprofloxacin in water with carbon nanotube supported manganese oxides as catalyst

Energy Technology Data Exchange (ETDEWEB)

Sui, Minghao, E-mail: suiminghao.sui@gmail.com [State Key Laboratory of Pollution Control and Resource Reuse, School of Environmental Science and Engineering, Tongji University, 1239 Siping Road, Shanghai 200092 (China); Xing, Sichu; Sheng, Li; Huang, Shuhang; Guo, Hongguang [State Key Laboratory of Pollution Control and Resource Reuse, School of Environmental Science and Engineering, Tongji University, 1239 Siping Road, Shanghai 200092 (China)

2012-08-15

Highlights: Black-Right-Pointing-Pointer Ciprofloxacin in water was degraded by heterogeneous catalytic ozonation. Black-Right-Pointing-Pointer MnOx were supported on MWCNTs to serve as catalyst for ozonation. Black-Right-Pointing-Pointer MnOx/MWCNT exhibited highly catalytic activity on ozonation of ciprofloxacin in water. Black-Right-Pointing-Pointer MnOx/MWCNT resulted in effective antibacterial activity inhibition on ciprofloxacin. Black-Right-Pointing-Pointer MnOx/MWCNT promoted the generation of hydroxyl radicals. - Abstract: Carbon nanotube-supported manganese oxides (MnOx/MWCNT) were used as catalysts to assist ozone in degrading ciprofloxacin in water. Manganese oxides were successfully loaded on multi-walled carbon nanotube surfaces by simply impregnating the carbon nanotube with permanganate solution. The catalytic activities of MnOx/MWCNT in ciprofloxacin ozonation, including degradation, mineralization effectiveness, and antibacterial activity change, were investigated. The presence of MnOx/MWCNT significantly elevated the degradation and mineralization efficiency of ozone on ciprofloxacin. The microbiological assay with a reference Escherichia coli strain indicated that ozonation with MnOx/MWCNT results in more effective antibacterial activity inhibition of ciprofloxacin than that in ozonation alone. The effects of catalyst dose, initial ciprofloxacin concentration, and initial pH conditions on ciprofloxacin ozonation with MnOx/MWCNT were surveyed. Electron spin resonance trapping was applied to assess the role of MnOx/MWCNT in generating hydroxyl radicals (HO{center_dot}) during ozonation. Stronger 5,5-dimethyl-1-pyrroline-N-oxide-OH signals were observed in the ozonation with MnOx/MWCNT compared with those in ozonation alone, indicating that MnOx/MWCNT promoted the generation of hydroxyl radicals. The degradation of ciprofloxacin was studied in drinking water and wastewater process samples to gauge the potential effects of water background matrix on

Catalytic reforming of glycerol in supercritical water over bimetallic Pt-Ni catalyst

NARCIS (Netherlands)

Chakinala, A.G.; van Swaaij, Willibrordus Petrus Maria; Kersten, Sascha R.A.; de Vlieger, Dennis; Seshan, Kulathuiyer; Brilman, Derk Willem Frederik

2013-01-01

Catalytic reforming of pure glycerol for the production of hydrogen at low temperature and short residence times in supercritical water was investigated using a bimetallic Pt–Ni catalyst supported on alumina. Initial tests were carried out to study the reforming activity of bimetallic Pt–Ni

Endotoxin Removal from Water Using Heterogenus Catalytic Ozonation by Bone Char

Directory of Open Access Journals (Sweden)

Abas Rezaee

2011-10-01

Full Text Available The endotoxin is one of pollutants with lipopolysaccharide structure which release from gram negative bacteria and cyanobacters. The aim of this study was removal of endotoxin from water using catalytic ozonation by bone char. The endotoxin for experiments have extracted from Escherichia coli bacterium cell wall by Stefan and Jan method. Chromogenic limulus ambusite lysate method in 405-410 nm wave length was used for analysing of endotoxin. The ozone have analysed by potassium iodine method. Results: Results of the research shown endotoxin removal rates using heterogenous catalytic ozonation were 6.0 Eu/ml.min and 0.5 Eu/ml.min for grey bone char and white bone char, respectively. The efficency of the process was found eighty percent. Primary concentration of basic compounds had no effect on endotoxin removal rate. Therefore, endotoxin removal kinetic of reaction is a zero order reaction. This study revealed that ozonation process using bone char is more efficient than other proposed methods such as ozonation or chlorination and can be used successfully for endotoxin removal from water as a efficient method.

Array processor architecture

Science.gov (United States)

Barnes, George H. (Inventor); Lundstrom, Stephen F. (Inventor); Shafer, Philip E. (Inventor)

1983-01-01

A high speed parallel array data processing architecture fashioned under a computational envelope approach includes a data base memory for secondary storage of programs and data, and a plurality of memory modules interconnected to a plurality of processing modules by a connection network of the Omega gender. Programs and data are fed from the data base memory to the plurality of memory modules and from hence the programs are fed through the connection network to the array of processors (one copy of each program for each processor). Execution of the programs occur with the processors operating normally quite independently of each other in a multiprocessing fashion. For data dependent operations and other suitable operations, all processors are instructed to finish one given task or program branch before all are instructed to proceed in parallel processing fashion on the next instruction. Even when functioning in the parallel processing mode however, the processors are not locked-step but execute their own copy of the program individually unless or until another overall processor array synchronization instruction is issued.

Green Secure Processors: Towards Power-Efficient Secure Processor Design

Science.gov (United States)

Chhabra, Siddhartha; Solihin, Yan

With the increasing wealth of digital information stored on computer systems today, security issues have become increasingly important. In addition to attacks targeting the software stack of a system, hardware attacks have become equally likely. Researchers have proposed Secure Processor Architectures which utilize hardware mechanisms for memory encryption and integrity verification to protect the confidentiality and integrity of data and computation, even from sophisticated hardware attacks. While there have been many works addressing performance and other system level issues in secure processor design, power issues have largely been ignored. In this paper, we first analyze the sources of power (energy) increase in different secure processor architectures. We then present a power analysis of various secure processor architectures in terms of their increase in power consumption over a base system with no protection and then provide recommendations for designs that offer the best balance between performance and power without compromising security. We extend our study to the embedded domain as well. We also outline the design of a novel hybrid cryptographic engine that can be used to minimize the power consumption for a secure processor. We believe that if secure processors are to be adopted in future systems (general purpose or embedded), it is critically important that power issues are considered in addition to performance and other system level issues. To the best of our knowledge, this is the first work to examine the power implications of providing hardware mechanisms for security.

Probabilistic programmable quantum processors

International Nuclear Information System (INIS)

Buzek, V.; Ziman, M.; Hillery, M.

2004-01-01

We analyze how to improve performance of probabilistic programmable quantum processors. We show how the probability of success of the probabilistic processor can be enhanced by using the processor in loops. In addition, we show that an arbitrary SU(2) transformations of qubits can be encoded in program state of a universal programmable probabilistic quantum processor. The probability of success of this processor can be enhanced by a systematic correction of errors via conditional loops. Finally, we show that all our results can be generalized also for qudits. (Abstract Copyright [2004], Wiley Periodicals, Inc.)

Tritium removal from air streams by catalytic oxidation and water adsorption

International Nuclear Information System (INIS)

Sherwood, A.E.

1976-06-01

An effective method of capturing tritium from air streams is by catalytic oxidation followed by water adsorption on a microporous solid adsorbent. Performance of a burner/dryer combination is illustrated by overall mass balance equations. Engineering design methods for packed bed reactors and adsorbers are reviewed, emphasizing the experimental data needed for design and the effect of operating conditions on system performance

Comparison of Processor Performance of SPECint2006 Benchmarks of some Intel Xeon Processors

OpenAIRE

Abdul Kareem PARCHUR; Ram Asaray SINGH

2012-01-01

High performance is a critical requirement to all microprocessors manufacturers. The present paper describes the comparison of performance in two main Intel Xeon series processors (Type A: Intel Xeon X5260, X5460, E5450 and L5320 and Type B: Intel Xeon X5140, 5130, 5120 and E5310). The microarchitecture of these processors is implemented using the basis of a new family of processors from Intel starting with the Pentium 4 processor. These processors can provide a performance boost for many ke...

The LASS hardware processor

International Nuclear Information System (INIS)

Kunz, P.F.

1976-01-01

The problems of data analysis with hardware processors are reviewed and a description is given of a programmable processor. This processor, the 168/E, has been designed for use in the LASS multi-processor system; it has an execution speed comparable to the IBM 370/168 and uses the subset of IBM 370 instructions appropriate to the LASS analysis task. (Auth.)

Photo-catalytic reactors for in-building grey water reuse. Comparison with biological processes and market potential

Energy Technology Data Exchange (ETDEWEB)

Jefferson, B.; Murray, C.; Diaper, C.; Parsons, S.A.; Jeffrey, P. [School of Water Sciences, Cranfield Univ., Cranfield, Bedfordshire (United Kingdom); Bedel, C. [Dept. of Industrial Process, National Inst. of Applied Sciences (France); Centeno, C. [Dept. of the Faculty of Engineering, Univ. of Santo Tomas, Manila (Philippines)

2003-07-01

Photo catalytic reactors potentially have a market in the reuse of grey water as they do not suffer from problems associated with toxic shocks and can be compact. The process is dependant upon the ratio of TOC to TiO{sub 2} concentration such that a greater proportion of the feed is degraded when either are increased. Economic assessment of grey water recycling showed both scale of operation and regional location to be the two most important factors in deciding the financial acceptability of any reuse technology. Overall the assessment suggested that photo catalytic oxidation (PCO) technology was suitable for grey water recycling and that the technology should be marketed at large buildings such as residential accommodation and offices. (orig.)

The effect of temperature on the catalytic conversion of Kraft lignin using near-critical water

DEFF Research Database (Denmark)

Nguyen, Thi Dieu Huyen; Maschietti, Marco; Åmand, Lars-Erik

2014-01-01

The catalytic conversion of suspended LignoBoost Kraft lignin was performed in near-critical water using ZrO2/K2CO3 as the catalytic system and phenol as the co-solvent and char suppressing agent. The reaction temperature was varied from 290 to 370 C and its effect on the process was investigated...... in a continuous flow (1 kg/h). The yields of water-soluble organics (WSO), bio-oil and char (dry lignin basis) were in the ranges of 5–11%, 69–87% and 16–22%, respectively. The bio-oil, being partially deoxygenated, exhibited higher carbon content and heat value, but lower sulphur content than lignin. The main 1...

Evaluation of the Sentinel-3 Hydrologic Altimetry Processor prototypE (SHAPE) methods.

Science.gov (United States)

Benveniste, J.; Garcia-Mondéjar, A.; Bercher, N.; Fabry, P. L.; Roca, M.; Varona, E.; Fernandes, J.; Lazaro, C.; Vieira, T.; David, G.; Restano, M.; Ambrózio, A.

2017-12-01

Inland water scenes are highly variable, both in space and time, which leads to a much broader range of radar signatures than ocean surfaces. This applies to both LRM and "SAR" mode (SARM) altimetry. Nevertheless the enhanced along-track resolution of SARM altimeters should help improve the accuracy and precision of inland water height measurements from satellite. The SHAPE project - Sentinel-3 Hydrologic Altimetry Processor prototypE - which is funded by ESA through the Scientific Exploitation of Operational Missions Programme Element (contract number 4000115205/15/I-BG) aims at preparing for the exploitation of Sentinel-3 data over the inland water domain. The SHAPE Processor implements all of the steps necessary to derive rivers and lakes water levels and discharge from Delay-Doppler Altimetry and perform their validation against in situ data. The processor uses FBR CryoSat-2 and L1A Sentinel-3A data as input and also various ancillary data (proc. param., water masks, L2 corrections, etc.), to produce surface water levels. At a later stage, water level data are assimilated into hydrological models to derive river discharge. This poster presents the improvements obtained with the new methods and algorithms over the regions of interest (Amazon and Danube rivers, Vanern and Titicaca lakes).

Metal membrane-type 25-kW methanol fuel processor for fuel-cell hybrid vehicle

Science.gov (United States)

Han, Jaesung; Lee, Seok-Min; Chang, Hyuksang

A 25-kW on-board methanol fuel processor has been developed. It consists of a methanol steam reformer, which converts methanol to hydrogen-rich gas mixture, and two metal membrane modules, which clean-up the gas mixture to high-purity hydrogen. It produces hydrogen at rates up to 25 N m 3/h and the purity of the product hydrogen is over 99.9995% with a CO content of less than 1 ppm. In this fuel processor, the operating condition of the reformer and the metal membrane modules is nearly the same, so that operation is simple and the overall system construction is compact by eliminating the extensive temperature control of the intermediate gas streams. The recovery of hydrogen in the metal membrane units is maintained at 70-75% by the control of the pressure in the system, and the remaining 25-30% hydrogen is recycled to a catalytic combustion zone to supply heat for the methanol steam-reforming reaction. The thermal efficiency of the fuel processor is about 75% and the inlet air pressure is as low as 4 psi. The fuel processor is currently being integrated with 25-kW polymer electrolyte membrane fuel-cell (PEMFC) stack developed by the Hyundai Motor Company. The stack exhibits the same performance as those with pure hydrogen, which proves that the maximum power output as well as the minimum stack degradation is possible with this fuel processor. This fuel-cell 'engine' is to be installed in a hybrid passenger vehicle for road testing.

Catalytic Conversion of Glucose into 5-Hydroxymethylfurfural by Hf(OTf4 Lewis Acid in Water

Directory of Open Access Journals (Sweden)

Junjie Li

2015-12-01

Full Text Available A series of Lewis acidic metal salts were used for glucose dehydration to 5-hydroymethylfurfural (HMF in water. Effect of valence state, ionic radii of Lewis acidic cation, and the type of anions on the catalytic performance have been studied systematically. The experimental results showed that the valence state played an important role in determining catalytic activity and selectivity. It was found that a higher glucose conversion rate and HMF selectivity could be obtained over high valent Lewis acid salts, where the ionic radii of these Lewis acidic metal salts are usually relatively small. Analysis on the effect of the anions of Lewis acid salts on the catalytic activity and the selectivity suggested that a higher glucose conversion and HMF selectivity could be readily obtained with Cl−. Furthermore, the recyclability of high valence state Lewis acid salt was also studied, however, inferior catalytic performance was observed. The deactivation mechanism was speculated to be the fact that high valence state Lewis acid salt was comparatively easier to undergo hydrolysis to yield complicated metal aqua ions with less catalytic activity. The Lewis acidic activity could be recovered by introducing a stoichiometric amount of hydrochloric acid (HCl to the catalytic before the reaction.

Comparison of Processor Performance of SPECint2006 Benchmarks of some Intel Xeon Processors

Directory of Open Access Journals (Sweden)

Abdul Kareem PARCHUR

2012-08-01

Full Text Available High performance is a critical requirement to all microprocessors manufacturers. The present paper describes the comparison of performance in two main Intel Xeon series processors (Type A: Intel Xeon X5260, X5460, E5450 and L5320 and Type B: Intel Xeon X5140, 5130, 5120 and E5310. The microarchitecture of these processors is implemented using the basis of a new family of processors from Intel starting with the Pentium 4 processor. These processors can provide a performance boost for many key application areas in modern generation. The scaling of performance in two major series of Intel Xeon processors (Type A: Intel Xeon X5260, X5460, E5450 and L5320 and Type B: Intel Xeon X5140, 5130, 5120 and E5310 has been analyzed using the performance numbers of 12 CPU2006 integer benchmarks, performance numbers that exhibit significant differences in performance. The results and analysis can be used by performance engineers, scientists and developers to better understand the performance scaling in modern generation processors.

Simulation of a parallel processor on a serial processor: The neutron diffusion equation

International Nuclear Information System (INIS)

Honeck, H.C.

1981-01-01

Parallel processors could provide the nuclear industry with very high computing power at a very moderate cost. Will we be able to make effective use of this power. This paper explores the use of a very simple parallel processor for solving the neutron diffusion equation to predict power distributions in a nuclear reactor. We first describe a simple parallel processor and estimate its theoretical performance based on the current hardware technology. Next, we show how the parallel processor could be used to solve the neutron diffusion equation. We then present the results of some simulations of a parallel processor run on a serial processor and measure some of the expected inefficiencies. Finally we extrapolate the results to estimate how actual design codes would perform. We find that the standard numerical methods for solving the neutron diffusion equation are still applicable when used on a parallel processor. However, some simple modifications to these methods will be necessary if we are to achieve the full power of these new computers. (orig.) [de

Water detritiation: better catalysts for liquid phase catalytic exchange

International Nuclear Information System (INIS)

Braet, J.

2005-01-01

Fusion reactors are our hope for a clean nuclear energy. But as they shall handle huge amounts of tritium, 1.5 10 19 Bq GWth -1 a -1 or about 50 000 times more tritium than light water fission reactors, they need detritiation. Most tritium losses can be trapped as or can easily be transformed into tritiated water. Water detritiation is preferably based on the multiplication of the large equilibrium isotope effect during the exchange reaction of tritium between hydrogen gas and liquid water in a counter current trickle bed reactor. Such LPCE (Liquid Phase Catalytic Exchange) requires an efficient hydrophobic catalyst. SCK-CEN invented and developed such a catalyst in the past. In combination with an appropriate packing, different batches of this catalyst performed very well during years of extensive testing, allowing to develop the ELEX process for water detritiation at inland reprocessing plants. The main objectives of this study were to reproduce and possibly improve the SCK-CEN catalyst for tritium exchange between hydrogen and liquid water; and to demonstrate the high overall exchange rate and thus high detritiation factors that can be realized with it in a small and simple LPCE column under typical but conservative operating conditions

Water oxidation catalyzed by mononuclear ruthenium complexes with a 2,2'-bipyridine-6,6'-dicarboxylate (bda) ligand: how ligand environment influences the catalytic behavior.

Science.gov (United States)

Staehle, Robert; Tong, Lianpeng; Wang, Lei; Duan, Lele; Fischer, Andreas; Ahlquist, Mårten S G; Sun, Licheng; Rau, Sven

2014-02-03

A new water oxidation catalyst [Ru(III)(bda)(mmi)(OH2)](CF3SO3) (2, H2bda = 2,2'-bipyridine-6,6'-dicarboxylic acid; mmi = 1,3-dimethylimidazolium-2-ylidene) containing an axial N-heterocyclic carbene ligand and one aqua ligand was synthesized and fully characterized. The kinetics of catalytic water oxidation by 2 were measured using stopped-flow technique, and key intermediates in the catalytic cycle were probed by density functional theory calculations. While analogous Ru-bda water oxidation catalysts [Ru(bda)L2] (L = pyridyl ligands) are supposed to catalyze water oxidation through a bimolecular coupling pathway, our study points out that 2, surprisingly, undergoes a single-site water nucleophilic attack (acid-base) pathway. The diversion of catalytic mechanisms is mainly ascribed to the different ligand environments, from nonaqua ligands to an aqua ligand. Findings in this work provide some critical proof for our previous hypothesis about how alternation of ancillary ligands of water oxidation catalysts influences their catalytic efficiency.

Functional unit for a processor

NARCIS (Netherlands)

Rohani, A.; Kerkhoff, Hans G.

2013-01-01

The invention relates to a functional unit for a processor, such as a Very Large Instruction Word Processor. The invention further relates to a processor comprising at least one such functional unit. The invention further relates to a functional unit and processor capable of mitigating the effect of

Atomistic structure of cobalt-phosphate nanoparticles for catalytic water oxidation.

Science.gov (United States)

Hu, Xiao Liang; Piccinin, Simone; Laio, Alessandro; Fabris, Stefano

2012-12-21

Solar-driven water splitting is a key photochemical reaction that underpins the feasible and sustainable production of solar fuels. An amorphous cobalt-phosphate catalyst (Co-Pi) based on earth-abundant elements has been recently reported to efficiently promote water oxidation to protons and dioxygen, a main bottleneck for the overall process. The structure of this material remains largely unknown. We here exploit ab initio and classical atomistic simulations combined with metadynamics to build a realistic and statistically meaningful model of Co-Pi nanoparticles. We demonstrate the emergence and stability of molecular-size ordered crystallites in nanoparticles initially formed by a disordered Co-O network and phosphate groups. The stable crystallites consist of bis-oxo-bridged Co centers that assemble into layered structures (edge-sharing CoO(6) octahedra) as well as in corner- and face-sharing cubane units. These layered and cubane motifs coexist in the crystallites, which always incorporate disordered phosphate groups at the edges. Our computational nanoparticles, although limited in size to ~1 nm, can contain more than one crystallite and incorporate up to 18 Co centers in the cubane/layered structures. The crystallites are structurally stable up to high temperatures. We simulate the extended X-ray absorption fine structure (EXAFS) of our nanoparticles. Those containing several complete and incomplete cubane motifs-which are believed to be essential for the catalytic activity-display a very good agreement with the experimental EXAFS spectra of Co-Pi grains. We propose that the crystallites in our nanoparticles are reliable structural models of the Co-Pi catalyst surface. They will be useful to reveal the origin of the catalytic efficiency of these novel water-oxidation catalysts.

Adaptive signal processor

Energy Technology Data Exchange (ETDEWEB)

Walz, H.V.

1980-07-01

An experimental, general purpose adaptive signal processor system has been developed, utilizing a quantized (clipped) version of the Widrow-Hoff least-mean-square adaptive algorithm developed by Moschner. The system accommodates 64 adaptive weight channels with 8-bit resolution for each weight. Internal weight update arithmetic is performed with 16-bit resolution, and the system error signal is measured with 12-bit resolution. An adapt cycle of adjusting all 64 weight channels is accomplished in 8 ..mu..sec. Hardware of the signal processor utilizes primarily Schottky-TTL type integrated circuits. A prototype system with 24 weight channels has been constructed and tested. This report presents details of the system design and describes basic experiments performed with the prototype signal processor. Finally some system configurations and applications for this adaptive signal processor are discussed.

Adaptive signal processor

International Nuclear Information System (INIS)

Walz, H.V.

1980-07-01

An experimental, general purpose adaptive signal processor system has been developed, utilizing a quantized (clipped) version of the Widrow-Hoff least-mean-square adaptive algorithm developed by Moschner. The system accommodates 64 adaptive weight channels with 8-bit resolution for each weight. Internal weight update arithmetic is performed with 16-bit resolution, and the system error signal is measured with 12-bit resolution. An adapt cycle of adjusting all 64 weight channels is accomplished in 8 μsec. Hardware of the signal processor utilizes primarily Schottky-TTL type integrated circuits. A prototype system with 24 weight channels has been constructed and tested. This report presents details of the system design and describes basic experiments performed with the prototype signal processor. Finally some system configurations and applications for this adaptive signal processor are discussed

Multithreading in vector processors

Science.gov (United States)

Evangelinos, Constantinos; Kim, Changhoan; Nair, Ravi

2018-01-16

In one embodiment, a system includes a processor having a vector processing mode and a multithreading mode. The processor is configured to operate on one thread per cycle in the multithreading mode. The processor includes a program counter register having a plurality of program counters, and the program counter register is vectorized. Each program counter in the program counter register represents a distinct corresponding thread of a plurality of threads. The processor is configured to execute the plurality of threads by activating the plurality of program counters in a round robin cycle.

Dual-core Itanium Processor

CERN Multimedia

2006-01-01

Intel’s first dual-core Itanium processor, code-named "Montecito" is a major release of Intel's Itanium 2 Processor Family, which implements the Intel Itanium architecture on a dual-core processor with two cores per die (integrated circuit). Itanium 2 is much more powerful than its predecessor. It has lower power consumption and thermal dissipation.

3081/E processor

International Nuclear Information System (INIS)

Kunz, P.F.; Gravina, M.; Oxoby, G.

1984-04-01

The 3081/E project was formed to prepare a much improved IBM mainframe emulator for the future. Its design is based on a large amount of experience in using the 168/E processor to increase available CPU power in both online and offline environments. The processor will be at least equal to the execution speed of a 370/168 and up to 1.5 times faster for heavy floating point code. A single processor will thus be at least four times more powerful than the VAX 11/780, and five processors on a system would equal at least the performance of the IBM 3081K. With its large memory space and simple but flexible high speed interface, the 3081/E is well suited for the online and offline needs of high energy physics in the future

Session 6: Water depollution from aniline and phenol by air oxidation and adsorptive-catalytic oxidation in liquid phase

Energy Technology Data Exchange (ETDEWEB)

Dobrynkin, N.M.; Batygina, M.V.; Noskov, A.S. [Boreskov Institute of Catalysis of Siberian Branch of Russian Academy of Sciences, Pr. Ak. Lavrentieva (Russian Federation)

2004-07-01

This paper is devoted to development of carbon catalysts and application of catalytic wet air oxidation for deep cleaning of polluted waters. The described catalysts and method are solving the problem of development environmentally reliable method for fluids treatment and allow carrying out the adsorption of pollutants on carbon CAPM (catalytically active porous material) with following regeneration of the CAPM without the loss of adsorptive qualities. The experiments have shown a principal capability simultaneously to use carbon CAPM as adsorbent and either as catalyst, or as a catalyst support for oxidation of aniline and phenol in water solutions. (authors)

A study on the photo catalytic decomposition reactions of organics dissolved in water (II)

International Nuclear Information System (INIS)

Sung, K.W.; Na, J. W.; Cho, Y. H.; Chung, H. H.

2000-01-01

Experiments on aqueous TiO 2 photo catalytic reaction of nitrogen containing organic compounds such as ethylamine, phenylhydrazine, pyridine, urea and EDTA were carried out. Based on the values calculated for the distribution of ionic species and atomic charge, the characteristics of their photo catalytic decomposition were estimated. It was shown that the decomposition characteristics was linearly proportional to nitrogen atomic charge value. On the other hand, the effects of aqueous pH, oxygen content and concentration on the TiO 2 photo catalytic characteristics of EDTA, EDTA-Cu(II) and EDTA-Fe(III) were experimentally investigated. All EDTA systems were decomposed better in the pH range of 2.5-3.0 and with more dissolved oxygen. These results could be applied to construction of a process for removal of organic impurities dissolved in a source of system water, or for treatment of EDTA-containing liquid waste produced by a chemical cleaning in the domestic NPPs. (author)

A study on the photo catalytic decomposition reactions of organics dissolved in water (II)

Energy Technology Data Exchange (ETDEWEB)

Sung, K.W.; Na, J. W.; Cho, Y. H.; Chung, H. H

2000-01-01

Experiments on aqueous TiO{sub 2} photo catalytic reaction of nitrogen containing organic compounds such as ethylamine, phenylhydrazine, pyridine, urea and EDTA were carried out. Based on the values calculated for the distribution of ionic species and atomic charge, the characteristics of their photo catalytic decomposition were estimated. It was shown that the decomposition characteristics was linearly proportional to nitrogen atomic charge value. On the other hand, the effects of aqueous pH, oxygen content and concentration on the TiO{sub 2} photo catalytic characteristics of EDTA, EDTA-Cu(II) and EDTA-Fe(III) were experimentally investigated. All EDTA systems were decomposed better in the pH range of 2.5-3.0 and with more dissolved oxygen. These results could be applied to construction of a process for removal of organic impurities dissolved in a source of system water, or for treatment of EDTA-containing liquid waste produced by a chemical cleaning in the domestic NPPs. (author)

Performance evaluation of throughput computing workloads using multi-core processors and graphics processors

Science.gov (United States)

Dave, Gaurav P.; Sureshkumar, N.; Blessy Trencia Lincy, S. S.

2017-11-01

Current trend in processor manufacturing focuses on multi-core architectures rather than increasing the clock speed for performance improvement. Graphic processors have become as commodity hardware for providing fast co-processing in computer systems. Developments in IoT, social networking web applications, big data created huge demand for data processing activities and such kind of throughput intensive applications inherently contains data level parallelism which is more suited for SIMD architecture based GPU. This paper reviews the architectural aspects of multi/many core processors and graphics processors. Different case studies are taken to compare performance of throughput computing applications using shared memory programming in OpenMP and CUDA API based programming.

The Molen Polymorphic Media Processor

NARCIS (Netherlands)

Kuzmanov, G.K.

2004-01-01

In this dissertation, we address high performance media processing based on a tightly coupled co-processor architectural paradigm. More specifically, we introduce a reconfigurable media augmentation of a general purpose processor and implement it into a fully operational processor prototype. The

Catalytic membrane in denitrification of water: a means to facilitate intraporous diffusion of reactants

NARCIS (Netherlands)

Ilinich, O.M.; Cuperus, F.P.; Gemert, van R.W.; Gribov, E.N.; Nosova, L.V.

2000-01-01

The series of mono- and bi-metallic catalysts with Pd and/or Cu supported over γ-Al 2O 3 was investigated with respect to reduction of nitrate and nitrite ions in water by hydrogen. Pronounced limitations of catalytic performance due to intraporous diffusion of the reactants were observed in the

Catalytic water co-existing with a product peptide in the active site of HIV-1 protease revealed by X-ray structure analysis.

Science.gov (United States)

Prashar, Vishal; Bihani, Subhash; Das, Amit; Ferrer, Jean-Luc; Hosur, Madhusoodan

2009-11-17

It is known that HIV-1 protease is an important target for design of antiviral compounds in the treatment of Acquired Immuno Deficiency Syndrome (AIDS). In this context, understanding the catalytic mechanism of the enzyme is of crucial importance as transition state structure directs inhibitor design. Most mechanistic proposals invoke nucleophilic attack on the scissile peptide bond by a water molecule. But such a water molecule coexisting with any ligand in the active site has not been found so far in the crystal structures. We report here the first observation of the coexistence in the active site, of a water molecule WAT1, along with the carboxyl terminal product (Q product) peptide. The product peptide has been generated in situ through cleavage of the full-length substrate. The N-terminal product (P product) has diffused out and is replaced by a set of water molecules while the Q product is still held in the active site through hydrogen bonds. The position of WAT1, which hydrogen bonds to both the catalytic aspartates, is different from when there is no substrate bound in the active site. We propose WAT1 to be the position from where catalytic water attacks the scissile peptide bond. Comparison of structures of HIV-1 protease complexed with the same oligopeptide substrate, but at pH 2.0 and at pH 7.0 shows interesting changes in the conformation and hydrogen bonding interactions from the catalytic aspartates. The structure is suggestive of the repositioning, during substrate binding, of the catalytic water for activation and subsequent nucleophilic attack. The structure could be a snap shot of the enzyme active site primed for the next round of catalysis. This structure further suggests that to achieve the goal of designing inhibitors mimicking the transition-state, the hydrogen-bonding pattern between WAT1 and the enzyme should be replicated.

JPP: A Java Pre-Processor

OpenAIRE

Kiniry, Joseph R.; Cheong, Elaine

1998-01-01

The Java Pre-Processor, or JPP for short, is a parsing pre-processor for the Java programming language. Unlike its namesake (the C/C++ Pre-Processor, cpp), JPP provides functionality above and beyond simple textual substitution. JPP's capabilities include code beautification, code standard conformance checking, class and interface specification and testing, and documentation generation.

Catalytic oxidation of sulfide in drinking water treatment: activated carbon as catalyst; Katalytische Oxidation von Sulfid bei der Trinkwasseraufbereitung: Aktivkohle als Katalysator

Energy Technology Data Exchange (ETDEWEB)

Hultsch, V; Grischek, T; Wolff, D; Worch, E [Technische Univ. Dresden (Germany). Inst. fuer Wasserchemie; Gun, J [Hebrew Univ. of Jerusalem (Israel). Div. of Environmental Sciences, Fredy and Nadine Herrmann School of Applied Science

2001-07-01

In regions with warm climate and limited water resources high sulfide concentrations in groundwater can cause problems during drinking water treatment. Aeration of the raw water is not always sufficient to ensure the hydrogen sulfide concentration below the odour threshold value for hydrogen sulfide. As an alternative, activated carbon can be used as a catalyst for sulfide oxidation of raw water. The use of different types of activated carbon was investigated in kinetic experiments. Both Catalytic Carbon from Calgon Carbon and granulated activated carbon from Norit showed high catalytic activities. The results of the experiments are discussed with regard to the practical use of activated carbon for the elimination of hydrogen sulfide during drinking water treatment. (orig.)

Novel Fe-Pd/SiO2 catalytic materials for degradation of chlorinated organic compounds in water

Science.gov (United States)

Novel reactive materials for catalytic degradation of chlorinated organic compounds in water at ambient conditions have been prepared on the basis of silica-supported Pd-Fe nanoparticles. Nanoscale Fe-Pd particles were synthesized inside porous silica supports using (NH4

Experimental Investigation in Order to Determine Catalytic Package Performances in Case of Tritium Transfer from Water to Gas

International Nuclear Information System (INIS)

Bornea, Anisia; Peculea, M.; Zamfirache, M.; Varlam, Carmen

2005-01-01

The processes for hydrogen isotope's separation are very important for nuclear technology. One of the most important processes for tritium separation, is the catalyst isotope exchange water-hydrogen.Our catalytic package consists of Romanian patented catalysts with platinum on charcoal and polytetrafluoretylene (Pt/C/PTFE) and the ordered Romanian patented package B7 type. The catalytic package was tested in an isotope exchange facility for water detritiation at the Experimental Pilot Plant from ICIT Rm.Valcea.In a column of isotope exchange tritium is transferred from liquid phase (tritiated heavy water) in gaseous phase (hydrogen). In the experimental set-up, which was used, the column of catalytic isotope exchange is filled with successive layers of catalyst and ordered package. The catalyst consists of 95.5 wt.% of PTFE, 4.1 wt. % of carbon and 0.40 wt. % of platinum and was of Raschig rings 10 x 10 x 2 mm. The ordered package was B7 type consists of wire mesh phosphor bronze 4 x 1 wire and the mesh dimension is 0.18 x 0.48 mm.We analyzed the transfer phenomena of tritium from liquid to gaseous phase, in this system.The mass transfer coefficient which characterized the isotopic exchange on the package, were determined as function of experimental parameters

Producing chopped firewood with firewood processors

International Nuclear Information System (INIS)

Kaerhae, K.; Jouhiaho, A.

2009-01-01

The TTS Institute's research and development project studied both the productivity of new, chopped firewood processors (cross-cutting and splitting machines) suitable for professional and independent small-scale production, and the costs of the chopped firewood produced. Seven chopped firewood processors were tested in the research, six of which were sawing processors and one shearing processor. The chopping work was carried out using wood feeding racks and a wood lifter. The work was also carried out without any feeding appliances. Altogether 132.5 solid m 3 of wood were chopped in the time studies. The firewood processor used had the most significant impact on chopping work productivity. In addition to the firewood processor, the stem mid-diameter, the length of the raw material, and of the firewood were also found to affect productivity. The wood feeding systems also affected productivity. If there is a feeding rack and hydraulic grapple loader available for use in chopping firewood, then it is worth using the wood feeding rack. A wood lifter is only worth using with the largest stems (over 20 cm mid-diameter) if a feeding rack cannot be used. When producing chopped firewood from small-diameter wood, i.e. with a mid-diameter less than 10 cm, the costs of chopping work were over 10 EUR solid m -3 with sawing firewood processors. The shearing firewood processor with a guillotine blade achieved a cost level of 5 EUR solid m -3 when the mid-diameter of the chopped stem was 10 cm. In addition to the raw material, the cost-efficient chopping work also requires several hundred annual operating hours with a firewood processor, which is difficult for individual firewood entrepreneurs to achieve. The operating hours of firewood processors can be increased to the required level by the joint use of the processors by a number of firewood entrepreneurs. (author)

Non-Catalytic and MgSO4 - Catalyst based Degradation of Glycerol in Subcritical and Supercritical Water Media

Directory of Open Access Journals (Sweden)

Mahfud Mahfud

2011-02-01

Full Text Available This research aims to study the glycerol degradation reaction in subcritical and supercritical water media. The degradation of glycerol into other products was performed both with sulphate salt catalysts and without catalyst. The reactant was made from glycerol and water with the mass ratio of 1:10. The experiments were carried out using a batch reactor at a constant pressure of 250 kgf/cm2, with the temperature range of 200-400oC, reaction time of 30 minutes, and catalyst mol ratio in glycerol of 1:10 and 1:8. The products of the non-catalytic glycerol degradation were acetaldehyde, methanol, and ethanol. The use of sulphate salt as catalyst has high selectivity to acetaldehyde and still allows the formation alcohol product in small quantities. The mechanism of ionic reaction and free radical reaction can occur at lower temperature in hydrothermal area or subcritical water. Conversion of glycerol on catalytic reaction showed a higher yield when compared with the reaction performed without catalyst

Optical Associative Processors For Visual Perception"

Science.gov (United States)

Casasent, David; Telfer, Brian

1988-05-01

We consider various associative processor modifications required to allow these systems to be used for visual perception, scene analysis, and object recognition. For these applications, decisions on the class of the objects present in the input image are required and thus heteroassociative memories are necessary (rather than the autoassociative memories that have been given most attention). We analyze the performance of both associative processors and note that there is considerable difference between heteroassociative and autoassociative memories. We describe associative processors suitable for realizing functions such as: distortion invariance (using linear discriminant function memory synthesis techniques), noise and image processing performance (using autoassociative memories in cascade with with a heteroassociative processor and with a finite number of autoassociative memory iterations employed), shift invariance (achieved through the use of associative processors operating on feature space data), and the analysis of multiple objects in high noise (which is achieved using associative processing of the output from symbolic correlators). We detail and provide initial demonstrations of the use of associative processors operating on iconic, feature space and symbolic data, as well as adaptive associative processors.

AMD's 64-bit Opteron processor

CERN Multimedia

CERN. Geneva

2003-01-01

This talk concentrates on issues that relate to obtaining peak performance from the Opteron processor. Compiler options, memory layout, MPI issues in multi-processor configurations and the use of a NUMA kernel will be covered. A discussion of recent benchmarking projects and results will also be included.BiographiesDavid RichDavid directs AMD's efforts in high performance computing and also in the use of Opteron processors...

Composable processor virtualization for embedded systems

NARCIS (Netherlands)

Molnos, A.M.; Milutinovic, A.; She, D.; Goossens, K.G.W.

2010-01-01

Processor virtualization divides a physical processor's time among a set of virual machines, enabling efficient hardware utilization, application security and allowing co-existence of different operating systems on the same processor. Through initially intended for the server domain, virtualization

Deterministic chaos in the processor load

International Nuclear Information System (INIS)

Halbiniak, Zbigniew; Jozwiak, Ireneusz J.

2007-01-01

In this article we present the results of research whose purpose was to identify the phenomenon of deterministic chaos in the processor load. We analysed the time series of the processor load during efficiency tests of database software. Our research was done on a Sparc Alpha processor working on the UNIX Sun Solaris 5.7 operating system. The conducted analyses proved the presence of the deterministic chaos phenomenon in the processor load in this particular case

Catalytic water co-existing with a product peptide in the active site of HIV-1 protease revealed by X-ray structure analysis.

Directory of Open Access Journals (Sweden)

Vishal Prashar

Full Text Available BACKGROUND: It is known that HIV-1 protease is an important target for design of antiviral compounds in the treatment of Acquired Immuno Deficiency Syndrome (AIDS. In this context, understanding the catalytic mechanism of the enzyme is of crucial importance as transition state structure directs inhibitor design. Most mechanistic proposals invoke nucleophilic attack on the scissile peptide bond by a water molecule. But such a water molecule coexisting with any ligand in the active site has not been found so far in the crystal structures. PRINCIPAL FINDINGS: We report here the first observation of the coexistence in the active site, of a water molecule WAT1, along with the carboxyl terminal product (Q product peptide. The product peptide has been generated in situ through cleavage of the full-length substrate. The N-terminal product (P product has diffused out and is replaced by a set of water molecules while the Q product is still held in the active site through hydrogen bonds. The position of WAT1, which hydrogen bonds to both the catalytic aspartates, is different from when there is no substrate bound in the active site. We propose WAT1 to be the position from where catalytic water attacks the scissile peptide bond. Comparison of structures of HIV-1 protease complexed with the same oligopeptide substrate, but at pH 2.0 and at pH 7.0 shows interesting changes in the conformation and hydrogen bonding interactions from the catalytic aspartates. CONCLUSIONS/SIGNIFICANCE: The structure is suggestive of the repositioning, during substrate binding, of the catalytic water for activation and subsequent nucleophilic attack. The structure could be a snap shot of the enzyme active site primed for the next round of catalysis. This structure further suggests that to achieve the goal of designing inhibitors mimicking the transition-state, the hydrogen-bonding pattern between WAT1 and the enzyme should be replicated.

Compact gasoline fuel processor for passenger vehicle APU

Science.gov (United States)

Severin, Christopher; Pischinger, Stefan; Ogrzewalla, Jürgen

Due to the increasing demand for electrical power in today's passenger vehicles, and with the requirements regarding fuel consumption and environmental sustainability tightening, a fuel cell-based auxiliary power unit (APU) becomes a promising alternative to the conventional generation of electrical energy via internal combustion engine, generator and battery. It is obvious that the on-board stored fuel has to be used for the fuel cell system, thus, gasoline or diesel has to be reformed on board. This makes the auxiliary power unit a complex integrated system of stack, air supply, fuel processor, electrics as well as heat and water management. Aside from proving the technical feasibility of such a system, the development has to address three major barriers:start-up time, costs, and size/weight of the systems. In this paper a packaging concept for an auxiliary power unit is presented. The main emphasis is placed on the fuel processor, as good packaging of this large subsystem has the strongest impact on overall size. The fuel processor system consists of an autothermal reformer in combination with water-gas shift and selective oxidation stages, based on adiabatic reactors with inter-cooling. The configuration was realized in a laboratory set-up and experimentally investigated. The results gained from this confirm a general suitability for mobile applications. A start-up time of 30 min was measured, while a potential reduction to 10 min seems feasible. An overall fuel processor efficiency of about 77% was measured. On the basis of the know-how gained by the experimental investigation of the laboratory set-up a packaging concept was developed. Using state-of-the-art catalyst and heat exchanger technology, the volumes of these components are fixed. However, the overall volume is higher mainly due to mixing zones and flow ducts, which do not contribute to the chemical or thermal function of the system. Thus, the concept developed mainly focuses on minimization of those

Performance evaluation of integrated fuel processor for residential PEMFCs application

International Nuclear Information System (INIS)

Yu Taek Seo; Dong Joo Seo; Young-Seog Seo; Hyun-Seog Roh; Wang Lai Yoon; Jin Hyeok Jeong

2006-01-01

KIER has been developing the natural gas fuel processor to produce hydrogen rich gas for residential PEMFCs system. To realize a compact and high efficiency, the unit processes of steam reforming, water gas shift, and preferential oxidation are chemically and physically integrated in a package. Current fuel processor designed for 1 kW class PEMFCs shows thermal efficiency of 78% as a HHV basis with methane conversion of 90% at rated load operation. CO concentration below 10 ppm in the produced gas is achieved with preferential oxidation unit using Pt and Ru based catalyst under the condition of [O 2 ]/[CO]=2.0. The partial load operation have been carried out to test the performance of fuel processor from 40% to 80% load, showing stable methane conversion and CO concentration below 10 ppm. The durability test for the daily start-stop and 8 hr operation procedure is under investigation and shows no deterioration of its performance after 40 start-stop cycles. (authors)

alpha,beta-unsaturated 2-acyl imidazoles as a practical class of dienophiles for the DNA-Based catalytic asymmetric diels-alder reaction in water

NARCIS (Netherlands)

Boersma, A.J.; Feringa, B.L.; Roelfes, G.

2007-01-01

alpha,beta-Unsaturated 2-acyl imidazoles are a novel and practical class of dienophiles for the DNA-based catalytic asymmetric Diels-Alder reaction in water. The Diels-Alder products are obtained with very high diastereoselectivities and enantioselectivities in the range of 83-98%. The catalytic

First-principles quantum mechanical investigations: Catalytic reactions of furfural on Pd(111) and at the water/Pd(111) interface

Science.gov (United States)

Xue, Wenhua

Bio-oils have drawn more and more attention from scientists as a promising new clean, cheap energy source. One of the most interesting relevant issues is the effect of catalysts on the catalytic reactions that are used for producing bio-oils. Furfural, as a very important intermediate during these reactions, has attracted significant studies. However, the effect of catalysts, including particularly the liquid/solid interface formed by a metal catalyst and liquid water, in the catalytic reactions involving furfural still remains elusive. In this research, we performed ab initio molecular dynamics simulations and first-principles density-functional theory calculations to investigate the atomic-scale mechanisms of catalytic hydrogenation of furfural on the palladium surface and at the liquid/state interface formed by the palladium surface and liquid water. We studied all the possible mechanisms that lead to formation of furfuryl alcohol (FOL), formation of tetrahydrofurfural (THFAL), and formation of tetrahydrofurfurfuryl alcohol (THFOL). We found that liquid water plays a significant role in the hydrogenation reactions. During the reaction in the presence of water and the palladium catalyst, in particular, water directly participates in the hydrogenation of the aldehyde group of furfural and facilitates the formation of FOL by reducing the activation energy. Our calculations show that water provides hydrogen for the hydrogenation of the aldehyde group, and at the same time, a pre-existing hydrogen atom, which is resulted from dissociation of molecular hydrogen (experimentally, molecular hydrogen is always supplied for hydrogenation) on the palladium surface, is bonded to water, making the water molecule intact in structure. In the absence of water, on the other hand, formation of FOL and THFAL on the palladium surface involves almost the same energy barriers, suggesting a comparable selectivity. Overall, as water reduces the activation energy for the formation of FOL

Neurovision processor for designing intelligent sensors

Science.gov (United States)

Gupta, Madan M.; Knopf, George K.

1992-03-01

A programmable multi-task neuro-vision processor, called the Positive-Negative (PN) neural processor, is proposed as a plausible hardware mechanism for constructing robust multi-task vision sensors. The computational operations performed by the PN neural processor are loosely based on the neural activity fields exhibited by certain nervous tissue layers situated in the brain. The neuro-vision processor can be programmed to generate diverse dynamic behavior that may be used for spatio-temporal stabilization (STS), short-term visual memory (STVM), spatio-temporal filtering (STF) and pulse frequency modulation (PFM). A multi- functional vision sensor that performs a variety of information processing operations on time- varying two-dimensional sensory images can be constructed from a parallel and hierarchical structure of numerous individually programmed PN neural processors.

The Influence of the Silicon Component in the Paste for Processor Cooling

Directory of Open Access Journals (Sweden)

Antun Koren

2003-12-01

Full Text Available The development of computer coolers foreseen for the processors keeps step with the processors for PC platform. There are still working and development areas where one could find new technologies and the kinds of the alternative cooling which give better results that the existing classical methods. There are several kinds of alternative cooling, from cooling with the mixture of water and methanol to the usage of freon and liquid nitrogen as the cooling media. The purpose of this work is to point at some new alternative cooling methods and to compare them with the classical ones as well as to stress the problems in classical - mechanically treated cooler and additives of chemically prepared pastes for better heat conductivity from the core surface of the processor.

VIRTUS: a multi-processor system in FASTBUS

International Nuclear Information System (INIS)

Ellett, J.; Jackson, R.; Ritter, R.; Schlein, P.; Yaeger, D.; Zweizig, J.

1986-01-01

VIRTUS is a system of parallel MC68000-based processors interconnected by FASTBUS that is used either on-line as an intelligent trigger component or off-line for full event processing. Each processor receives the complete set of data from one event. The host computer, a VAX 11/780, down-line loads all software to the processors, controls and monitors the functioning of all processors, and writes processed data to tape. Instructions, programs, and data are transferred among the processors and the host in the form of fixed format, variable length data blocks. (Auth.)

A lock circuit for a multi-core processor

DEFF Research Database (Denmark)

2015-01-01

An integrated circuit comprising a multiple processor cores and a lock circuit that comprises a queue register with respective bits set or reset via respective, connections dedicated to respective processor cores, whereby the queue register identifies those among the multiple processor cores...... that are enqueued in the queue register. Furthermore, the integrated circuit comprises a current register and a selector circuit configured to select a processor core and identify that processor core by a value in the current register. A selected processor core is a prioritized processor core among the cores...... configured with an integrated circuit; and a silicon die configured with an integrated circuit....

Reactive Distillation and Air Stripping Processes for Water Recycling and Trace Contaminant Control

Science.gov (United States)

Boul, Peter J.; Lange, Kevin E.; Conger, Bruce; Anderson, Molly

2009-01-01

Reactive distillation designs are considered to reduce the presence of volatile organic compounds in the purified water. Reactive distillation integrates a reactor with a distillation column. A review of the literature in this field has revealed a variety of functional reactive columns in industry. Wastewater may be purified by a combination of a reactor and a distiller (e.g., the EWRS or VPCAR concepts) or, in principle, through a design which integrates the reactor with the distiller. A review of the literature in reactive distillation has identified some different designs in such combinations of reactor and distiller. An evaluation of reactive distillation and reactive air stripping is presented with regards to the reduction of volatile organic compounds in the contaminated water and air. Among the methods presented, an architecture is presented for the evaluation of the simultaneous oxidation of organics in air and water. These and other designs are presented in light of potential improvements in power consumptions and air and water purities for architectures which include catalytic activity integrated into the water processor. In particular, catalytic oxidation of organics may be useful as a tool to remove contaminants that more traditional distillation and/or air stripping columns may not remove. A review of the current leading edge at the commercial level and at the research frontier in catalytically active materials is presented. Themes and directions from the engineering developments in catalyst design are presented conceptually in light of developments in the nanoscale chemistry of a variety of catalyst materials.

Sensitometric control of roentgen film processors

International Nuclear Information System (INIS)

Forsberg, H.; Karolinska Sjukhuset, Stockholm

1987-01-01

Monitoring of film processors performance is essential since image quality, patient dose and costs are influenced by the performance. A system for sensitometric constancy control of film processors and their associated components is described. Experience with the system for 3 years is given when implemented on 17 film processors. Modern high quality film processors have a stability that makes a test frequency of once a week sufficient to maintain adequate image quality. The test system is so sensitive that corrective actions almost invariably have been taken before any technical problem degraded the image quality to a visible degree. (orig.)

A light hydrocarbon fuel processor producing high-purity hydrogen

Science.gov (United States)

Löffler, Daniel G.; Taylor, Kyle; Mason, Dylan

thermal efficiency is better than 67% operating at full load. This fuel processor has been integrated with a 5-kW fuel cell producing electricity and hot water.

Air Stripping Designs and Reactive Water Purification Processes for the Lunar Surface

Science.gov (United States)

Boul, Peter J.; Lange, Kevin; Conger, Bruce; Anderson, Molly

2010-01-01

Air stripping designs are considered to reduce the presence of volatile organic compounds in the purified water. Components of the wastewater streams are ranked by Henry's Law Constant and the suitability of air stripping in the purification of wastewater in terms of component removal is evaluated. Distillation processes are modeled in tandem with air stripping to demonstrate the potential effectiveness and utility of these methods in recycling wastewater on the Moon. Scaling factors for distillation and air stripping columns are presented to account for the difference in the lunar gravitation environment. Commercially available distillation and air stripping units which are considered suitable for Exploration Life Support are presented. The advantages to the various designs are summarized with respect to water purity levels, power consumption, and processing rates. An evaluation of reactive distillation and air stripping is presented with regards to the reduction of volatile organic compounds in the contaminated water and air. Among the methods presented, an architecture is presented for the evaluation of the simultaneous oxidation of organics in air and water. These and other designs are presented in light of potential improvements in power consumptions and air and water purities for architectures which include catalytic activity integrated into the water processor. In particular, catalytic oxidation of organics may be useful as a tool to remove contaminants that more traditional distillation and/or air stripping columns may not remove. A review of the current leading edge at the commercial level and at the research frontier in catalytically active materials is presented. Themes and directions from the engineering developments in catalyst design are presented conceptually in light of developments in the nanoscale chemistry of a variety of catalyst materials.

Special purpose processors for high energy physics applications

International Nuclear Information System (INIS)

Verkerk, C.

1978-01-01

The review on the subject of hardware processors from very fast decision logic for the split field magnet facility at CERN, to a point-finding processor used to relieve the data-acquisition minicomputer from the task of monitoring the SPS experiment is given. Block diagrams of decision making processor, point-finding processor, complanarity and opening angle processor and programmable track selector module are presented and discussed. The applications of fully programmable but slower processor on the one hand, and very fast and programmable decision logic on the other hand are given in this review

The Central Trigger Processor (CTP)

CERN Multimedia

Franchini, Matteo

2016-01-01

The Central Trigger Processor (CTP) receives trigger information from the calorimeter and muon trigger processors, as well as from other sources of trigger. It makes the Level-1 decision (L1A) based on a trigger menu.

Novel Catalytic Membrane Reactors

Energy Technology Data Exchange (ETDEWEB)

Stuart Nemser, PhD

2010-10-01

There are many industrial catalytic organic reversible reactions with amines or alcohols that have water as one of the products. Many of these reactions are homogeneously catalyzed. In all cases removal of water facilitates the reaction and produces more of the desired chemical product. By shifting the reaction to right we produce more chemical product with little or no additional capital investment. Many of these reactions can also relate to bioprocesses. Given the large number of water-organic compound separations achievable and the ability of the Compact Membrane Systems, Inc. (CMS) perfluoro membranes to withstand these harsh operating conditions, this is an ideal demonstration system for the water-of-reaction removal using a membrane reactor. Enhanced reaction synthesis is consistent with the DOE objective to lower the energy intensity of U.S. industry 25% by 2017 in accord with the Energy Policy Act of 2005 and to improve the United States manufacturing competitiveness. The objective of this program is to develop the platform technology for enhancing homogeneous catalytic chemical syntheses.

Very Long Instruction Word Processors

Indian Academy of Sciences (India)

Pentium Processor have modified the processor architecture to exploit parallelism in a program. .... The type of operation itself is encoded using 14 bits. .... text of designing simple architectures with low power consump- tion and execute x86 ...

Methanol fuel processor and PEM fuel cell modeling for mobile application

Energy Technology Data Exchange (ETDEWEB)

Chrenko, Daniela [ISAT, University of Burgundy, Rue Mlle Bourgoise, 58000 Nevers (France); Gao, Fei; Blunier, Benjamin; Bouquain, David; Miraoui, Abdellatif [Transport and Systems Laboratory (SeT) - EA 3317/UTBM, Fuel cell Laboratory (FCLAB), University of Technology of Belfort-Montbeliard, Rue Thierry Mieg 90010, Belfort Cedex (France)

2010-07-15

The use of hydrocarbon fed fuel cell systems including a fuel processor can be an entry market for this emerging technology avoiding the problem of hydrogen infrastructure. This article presents a 1 kW low temperature PEM fuel cell system with fuel processor, the system is fueled by a mixture of methanol and water that is converted into hydrogen rich gas using a steam reformer. A complete system model including a fluidic fuel processor model containing evaporation, steam reformer, hydrogen filter, combustion, as well as a multi-domain fuel cell model is introduced. Experiments are performed with an IDATECH FCS1200 trademark fuel cell system. The results of modeling and experimentation show good results, namely with regard to fuel cell current and voltage as well as hydrogen production and pressure. The system is auto sufficient and shows an efficiency of 25.12%. The presented work is a step towards a complete system model, needed to develop a well adapted system control assuring optimized system efficiency. (author)

Development of a highly reliable CRT processor

International Nuclear Information System (INIS)

Shimizu, Tomoya; Saiki, Akira; Hirai, Kenji; Jota, Masayoshi; Fujii, Mikiya

1996-01-01

Although CRT processors have been employed by the main control board to reduce the operator's workload during monitoring, the control systems are still operated by hardware switches. For further advancement, direct controller operation through a display device is expected. A CRT processor providing direct controller operation must be as reliable as the hardware switches are. The authors are developing a new type of highly reliable CRT processor that enables direct controller operations. In this paper, we discuss the design principles behind a highly reliable CRT processor. The principles are defined by studies of software reliability and of the functional reliability of the monitoring and operation systems. The functional configuration of an advanced CRT processor is also addressed. (author)

Computer Generated Inputs for NMIS Processor Verification

International Nuclear Information System (INIS)

J. A. Mullens; J. E. Breeding; J. A. McEvers; R. W. Wysor; L. G. Chiang; J. R. Lenarduzzi; J. T. Mihalczo; J. K. Mattingly

2001-01-01

Proper operation of the Nuclear Identification Materials System (NMIS) processor can be verified using computer-generated inputs [BIST (Built-In-Self-Test)] at the digital inputs. Preselected sequences of input pulses to all channels with known correlation functions are compared to the output of the processor. These types of verifications have been utilized in NMIS type correlation processors at the Oak Ridge National Laboratory since 1984. The use of this test confirmed a malfunction in a NMIS processor at the All-Russian Scientific Research Institute of Experimental Physics (VNIIEF) in 1998. The NMIS processor boards were returned to the U.S. for repair and subsequently used in NMIS passive and active measurements with Pu at VNIIEF in 1999

3081//sub E/ processor

International Nuclear Information System (INIS)

Kunz, P.F.; Gravina, M.; Oxoby, G.; Trang, Q.; Fucci, A.; Jacobs, D.; Martin, B.; Storr, K.

1983-03-01

Since the introduction of the 168//sub E/, emulating processors have been successful over an amazingly wide range of applications. This paper will describe a second generation processor, the 3081//sub E/. This new processor, which is being developed as a collaboration between SLAC and CERN, goes beyond just fixing the obvious faults of the 168//sub E/. Not only will the 3081//sub E/ have much more memory space, incorporate many more IBM instructions, and have much more memory space, incorporate many more IBM instructions, and have full double precision floating point arithmetic, but it will also have faster execution times and be much simpler to build, debug, and maintain. The simple interface and reasonable cost of the 168//sub E/ will be maintained for the 3081//sub E/

A new type separation column for the water-hydrogen isotope catalytic exchange process

International Nuclear Information System (INIS)

Fedorchenko, O.A.; Alekseev, I.A.; Trenin, V.D.

2001-01-01

The catalytic water/hydrogen isotope exchange process is by right considered the most attractive for the solution a number of urgent problems of hydrogen isotope separation. A new type exchange reaction column is described and studied in details by computer simulation and with the help of McCabe-Thiele diagrams. It is shown that the new column in comparison with a traditional one needs less catalyst quantity and a smaller diameter for the solving of the same separation tasks. Generalized calculation data are presented in graphical form

Multimode power processor

Science.gov (United States)

O'Sullivan, George A.; O'Sullivan, Joseph A.

1999-01-01

In one embodiment, a power processor which operates in three modes: an inverter mode wherein power is delivered from a battery to an AC power grid or load; a battery charger mode wherein the battery is charged by a generator; and a parallel mode wherein the generator supplies power to the AC power grid or load in parallel with the battery. In the parallel mode, the system adapts to arbitrary non-linear loads. The power processor may operate on a per-phase basis wherein the load may be synthetically transferred from one phase to another by way of a bumpless transfer which causes no interruption of power to the load when transferring energy sources. Voltage transients and frequency transients delivered to the load when switching between the generator and battery sources are minimized, thereby providing an uninterruptible power supply. The power processor may be used as part of a hybrid electrical power source system which may contain, in one embodiment, a photovoltaic array, diesel engine, and battery power sources.

PixonVision real-time video processor

Science.gov (United States)

Puetter, R. C.; Hier, R. G.

2007-09-01

PixonImaging LLC and DigiVision, Inc. have developed a real-time video processor, the PixonVision PV-200, based on the patented Pixon method for image deblurring and denoising, and DigiVision's spatially adaptive contrast enhancement processor, the DV1000. The PV-200 can process NTSC and PAL video in real time with a latency of 1 field (1/60 th of a second), remove the effects of aerosol scattering from haze, mist, smoke, and dust, improve spatial resolution by up to 2x, decrease noise by up to 6x, and increase local contrast by up to 8x. A newer version of the processor, the PV-300, is now in prototype form and can handle high definition video. Both the PV-200 and PV-300 are FPGA-based processors, which could be spun into ASICs if desired. Obvious applications of these processors include applications in the DOD (tanks, aircraft, and ships), homeland security, intelligence, surveillance, and law enforcement. If developed into an ASIC, these processors will be suitable for a variety of portable applications, including gun sights, night vision goggles, binoculars, and guided munitions. This paper presents a variety of examples of PV-200 processing, including examples appropriate to border security, battlefield applications, port security, and surveillance from unmanned aerial vehicles.

Processors and systems (picture processing)

Energy Technology Data Exchange (ETDEWEB)

Gemmar, P

1983-01-01

Automatic picture processing requires high performance computers and high transmission capacities in the processor units. The author examines the possibilities of operating processors in parallel in order to accelerate the processing of pictures. He therefore discusses a number of available processors and systems for picture processing and illustrates their capacities for special types of picture processing. He stresses the fact that the amount of storage required for picture processing is exceptionally high. The author concludes that it is as yet difficult to decide whether very large groups of simple processors or highly complex multiprocessor systems will provide the best solution. Both methods will be aided by the development of VLSI. New solutions have already been offered (systolic arrays and 3-d processing structures) but they also are subject to losses caused by inherently parallel algorithms. Greater efforts must be made to produce suitable software for multiprocessor systems. Some possibilities for future picture processing systems are discussed. 33 references.

Special processor for in-core control systems

International Nuclear Information System (INIS)

Golovanov, M.N.; Duma, V.R.; Levin, G.L.; Mel'nikov, A.V.; Polikanin, A.V.; Filatov, V.P.

1978-01-01

The BUTs-20 special processor is discussed, designed to control the units of the in-core control equipment which are incorporated into the VECTOR communication channel, and to provide preliminary data processing prior to computer calculations. A set of instructions and flowsheet of the processor, organization of its communication with memories and other units of the system are given. The processor components: a control unit and an arithmetic logical unit are discussed. It is noted that the special processor permits more effective utilization of the computer time

Functional Verification of Enhanced RISC Processor

OpenAIRE

SHANKER NILANGI; SOWMYA L

2013-01-01

This paper presents design and verification of a 32-bit enhanced RISC processor core having floating point computations integrated within the core, has been designed to reduce the cost and complexity. The designed 3 stage pipelined 32-bit RISC processor is based on the ARM7 processor architecture with single precision floating point multiplier, floating point adder/subtractor for floating point operations and 32 x 32 booths multiplier added to the integer core of ARM7. The binary representati...

Effect of processor temperature on film dosimetry

International Nuclear Information System (INIS)

Srivastava, Shiv P.; Das, Indra J.

2012-01-01

Optical density (OD) of a radiographic film plays an important role in radiation dosimetry, which depends on various parameters, including beam energy, depth, field size, film batch, dose, dose rate, air film interface, postexposure processing time, and temperature of the processor. Most of these parameters have been studied for Kodak XV and extended dose range (EDR) films used in radiation oncology. There is very limited information on processor temperature, which is investigated in this study. Multiple XV and EDR films were exposed in the reference condition (d max. , 10 × 10 cm 2 , 100 cm) to a given dose. An automatic film processor (X-Omat 5000) was used for processing films. The temperature of the processor was adjusted manually with increasing temperature. At each temperature, a set of films was processed to evaluate OD at a given dose. For both films, OD is a linear function of processor temperature in the range of 29.4–40.6°C (85–105°F) for various dose ranges. The changes in processor temperature are directly related to the dose by a quadratic function. A simple linear equation is provided for the changes in OD vs. processor temperature, which could be used for correcting dose in radiation dosimetry when film is used.

Fuel processor and method for generating hydrogen for fuel cells

Science.gov (United States)

Ahmed, Shabbir [Naperville, IL; Lee, Sheldon H. D. [Willowbrook, IL; Carter, John David [Bolingbrook, IL; Krumpelt, Michael [Naperville, IL; Myers, Deborah J [Lisle, IL

2009-07-21

A method of producing a H.sub.2 rich gas stream includes supplying an O.sub.2 rich gas, steam, and fuel to an inner reforming zone of a fuel processor that includes a partial oxidation catalyst and a steam reforming catalyst or a combined partial oxidation and stream reforming catalyst. The method also includes contacting the O.sub.2 rich gas, steam, and fuel with the partial oxidation catalyst and the steam reforming catalyst or the combined partial oxidation and stream reforming catalyst in the inner reforming zone to generate a hot reformate stream. The method still further includes cooling the hot reformate stream in a cooling zone to produce a cooled reformate stream. Additionally, the method includes removing sulfur-containing compounds from the cooled reformate stream by contacting the cooled reformate stream with a sulfur removal agent. The method still further includes contacting the cooled reformate stream with a catalyst that converts water and carbon monoxide to carbon dioxide and H.sub.2 in a water-gas-shift zone to produce a final reformate stream in the fuel processor.

Bank switched memory interface for an image processor

International Nuclear Information System (INIS)

Barron, M.; Downward, J.

1980-09-01

A commercially available image processor is interfaced to a PDP-11/45 through an 8K window of memory addresses. When the image processor was not in use it was desired to be able to use the 8K address space as real memory. The standard method of accomplishing this would have been to use UNIBUS switches to switch in either the physical 8K bank of memory or the image processor memory. This method has the disadvantage of being rather expensive. As a simple alternative, a device was built to selectively enable or disable either an 8K bank of memory or the image processor memory. To enable the image processor under program control, GEN is contracted in size, the memory is disabled, a device partition for the image processor is created above GEN, and the image processor memory is enabled. The process is reversed to restore memory to GEN. The hardware to enable/disable the image and computer memories is controlled using spare bits from a DR-11K output register. The image processor and physical memory can be switched in or out on line with no adverse affects on the system's operation

VON WISPR Family Processors: Volume 1

National Research Council Canada - National Science Library

Wagstaff, Ronald

1997-01-01

...) and the background noise they are embedded in. Processors utilizing those fluctuations such as the von WISPR Family Processors discussed herein, are methods or algorithms that preferentially attenuate the fluctuating signals and noise...

Nuclear interactive evaluations on distributed processors

International Nuclear Information System (INIS)

Dix, G.E.; Congdon, S.P.

1988-01-01

BWR [boiling water reactor] nuclear design is a complicated process, involving trade-offs among a variety of conflicting objectives. Complex computer calculations and usually required for each design iteration. GE Nuclear Energy has implemented a system where the evaluations are performed interactively on a large number of small microcomputers. This approach minimizes the time it takes to carry out design iterations even through the processor speeds are low compared with modern super computers. All of the desktop microcomputers are linked to a common data base via an ethernet communications system so that design data can be shared and data quality can be maintained

Evaluation of MERIS Chlorophyll-a Retrieval Processors in a Complex Turbid Lake Kasumigaura over a 10-Year Mission

Directory of Open Access Journals (Sweden)

Salem Ibrahim Salem

2017-10-01

Full Text Available Abstract: The chlorophyll-a (Chla products of seven processors developed for the Medium Resolution Imaging Spectrometer (MERIS sensor were evaluated. The seven processors, based on a neural network and band height, were assessed over an optically complex water body with Chla concentrations of 8.10–187.40 mg∙m−3 using 10-year MERIS archival data. These processors were adopted for the Ocean and Land Color Instrument (OLCI sensor. Results indicated that the four processors of band height (i.e. the Maximum Chlorophyll Index (MCI_L1; and Fluorescence Line Height (FLH_L1; neural network (i.e. Eutrophic Lake (EUL; and Case 2 Regional (C2R possessed reasonable retrieval accuracy with root mean square error (R2 in the range of 0.42–0.65. However, these processors underestimated the retrieved Chla > 100 mg∙m−3, reflecting the limitation of the band height processors to eliminate the influence of non-phytoplankton matter and highlighting the need to train the neural network for highly turbid waters. MCI_L1 outperformed other processors during the calibration and validation stages (R2 = 0.65, Root mean square error (RMSE = 22.18 mg∙m−3, the mean absolute relative error (MARE = 36.88%. In contrast, the results from the Boreal Lake (BOL and Free University of Berlin (FUB processors demonstrated their inadequacy to accurately retrieve Chla concentration > 50 mg∙m−3, mainly due to the limitation of the training datasets that resulted in a high MARE for BOL (56.20% and FUB (57.00%. Mapping the spatial distribution of Chla concentrations across Lake Kasumigaura using the seven processors showed that all processors—except for the BOL and FUB—were able to accurately capture the Chla distribution for moderate and high Chla concentrations. In addition, MCI_L1 and C2R processors were evaluated over 10-years of monthly measured Chla as they demonstrated the best retrieval accuracy from both groups (i.e. band height and neural network

Multi-processor network implementations in Multibus II and VME

International Nuclear Information System (INIS)

Briegel, C.

1992-01-01

ACNET (Fermilab Accelerator Controls Network), a proprietary network protocol, is implemented in a multi-processor configuration for both Multibus II and VME. The implementations are contrasted by the bus protocol and software design goals. The Multibus II implementation provides for multiple processors running a duplicate set of tasks on each processor. For a network connected task, messages are distributed by a network round-robin scheduler. Further, messages can be stopped, continued, or re-routed for each task by user-callable commands. The VME implementation provides for multiple processors running one task across all processors. The process can either be fixed to a particular processor or dynamically allocated to an available processor depending on the scheduling algorithm of the multi-processing operating system. (author)

A non-acid-assisted and non-hydroxyl-radical-related catalytic ozonation with ceria supported copper oxide in efficient oxalate degradation in water

KAUST Repository

Zhang, Tao

2012-06-01

Oxalate is usually used as a refractory model compound that cannot be effectively removed by ozone and hydroxyl radical oxidation in water. In this study, we found that ceria supported CuO significantly improved oxalate degradation in reaction with ozone. The optimum CuO loading amount was 12%. The molar ratio of oxalate removed/ozone consumption reached 0.84. The catalytic ozonation was most effective in a neutral pH range (6.7-7.9) and became ineffective when the water solution was acidic or alkaline. Moreover, bicarbonate, a ubiquitous hydroxyl radical scavenger in natural waters, significantly improved the catalytic degradation of oxalate. Therefore, the degradation relies on neither hydroxyl radical oxidation nor acid assistance, two pathways usually proposed for catalytic ozonation. These special characters of the catalyst make it suitable to be potentially used for practical degradation of refractory hydrophilic organic matter and compounds in water and wastewater. With in situ characterization, the new surface Cu(II) formed from ozone oxidation of the trace Cu(I) of the catalyst was found to be an active site in coordination with oxalate forming multi-dentate surface complex. It is proposed that the complex can be further oxidized by molecular ozone and then decomposes through intra-molecular electron transfer. The ceria support enhanced the activity of the surface Cu(I)/Cu(II) in this process. © 2012 Elsevier B.V.

Catalytic membrane in reduction of aqueous nitrates: operational principles and catalytic performance

NARCIS (Netherlands)

Ilinitch, O.M.; Cuperus, F.P.; Nosova, L.V.; Gribov, E.N.

2000-01-01

The catalytic membrane with palladium-copper active component supported over the macroporous ceramic membrane, and a series of γ-Al 2O 3 supported Pd-Cu catalysts were prepared and investigated. In reduction of nitrate ions by hydrogen in water at ambient temperature, pronounced internal diffusion

Evaluation of the Intel Sandy Bridge-EP server processor

CERN Document Server

Jarp, S; Leduc, J; Nowak, A; CERN. Geneva. IT Department

2012-01-01

In this paper we report on a set of benchmark results recently obtained by CERN openlab when comparing an 8-core “Sandy Bridge-EP” processor with Intel’s previous microarchitecture, the “Westmere-EP”. The Intel marketing names for these processors are “Xeon E5-2600 processor series” and “Xeon 5600 processor series”, respectively. Both processors are produced in a 32nm process, and both platforms are dual-socket servers. Multiple benchmarks were used to get a good understanding of the performance of the new processor. We used both industry-standard benchmarks, such as SPEC2006, and specific High Energy Physics benchmarks, representing both simulation of physics detectors and data analysis of physics events. Before summarizing the results we must stress the fact that benchmarking of modern processors is a very complex affair. One has to control (at least) the following features: processor frequency, overclocking via Turbo mode, the number of physical cores in use, the use of logical cores ...

Array processors based on Gaussian fraction-free method

Energy Technology Data Exchange (ETDEWEB)

Peng, S; Sedukhin, S [Aizu Univ., Aizuwakamatsu, Fukushima (Japan); Sedukhin, I

1998-03-01

The design of algorithmic array processors for solving linear systems of equations using fraction-free Gaussian elimination method is presented. The design is based on a formal approach which constructs a family of planar array processors systematically. These array processors are synthesized and analyzed. It is shown that some array processors are optimal in the framework of linear allocation of computations and in terms of number of processing elements and computing time. (author)

Multiple Embedded Processors for Fault-Tolerant Computing

Science.gov (United States)

Bolotin, Gary; Watson, Robert; Katanyoutanant, Sunant; Burke, Gary; Wang, Mandy

2005-01-01

A fault-tolerant computer architecture has been conceived in an effort to reduce vulnerability to single-event upsets (spurious bit flips caused by impingement of energetic ionizing particles or photons). As in some prior fault-tolerant architectures, the redundancy needed for fault tolerance is obtained by use of multiple processors in one computer. Unlike prior architectures, the multiple processors are embedded in a single field-programmable gate array (FPGA). What makes this new approach practical is the recent commercial availability of FPGAs that are capable of having multiple embedded processors. A working prototype (see figure) consists of two embedded IBM PowerPC 405 processor cores and a comparator built on a Xilinx Virtex-II Pro FPGA. This relatively simple instantiation of the architecture implements an error-detection scheme. A planned future version, incorporating four processors and two comparators, would correct some errors in addition to detecting them.

Online track processor for the CDF upgrade

International Nuclear Information System (INIS)

Thomson, E. J.

2002-01-01

A trigger track processor, called the eXtremely Fast Tracker (XFT), has been designed for the CDF upgrade. This processor identifies high transverse momentum (> 1.5 GeV/c) charged particles in the new central outer tracking chamber for CDF II. The XFT design is highly parallel to handle the input rate of 183 Gbits/s and output rate of 44 Gbits/s. The processor is pipelined and reports the result for a new event every 132 ns. The processor uses three stages: hit classification, segment finding, and segment linking. The pattern recognition algorithms for the three stages are implemented in programmable logic devices (PLDs) which allow in-situ modification of the algorithm at any time. The PLDs reside on three different types of modules. The complete system has been installed and commissioned at CDF II. An overview of the track processor and performance in CDF Run II are presented

Design Principles for Synthesizable Processor Cores

DEFF Research Database (Denmark)

Schleuniger, Pascal; McKee, Sally A.; Karlsson, Sven

2012-01-01

As FPGAs get more competitive, synthesizable processor cores become an attractive choice for embedded computing. Currently popular commercial processor cores do not fully exploit current FPGA architectures. In this paper, we propose general design principles to increase instruction throughput...

Data register and processor for multiwire chambers

International Nuclear Information System (INIS)

Karpukhin, V.V.

1985-01-01

A data register and a processor for data receiving and processing from drift chambers of a device for investigating relativistic positroniums are described. The data are delivered to the register input in the form of the Grey 8 bit code, memorized and transformed to a position code. The register information is delivered to the KAMAK trunk and to the front panel plug. The processor selects particle tracks in a horizontal plane of the facility. ΔY maximum coordinate divergence and minimum point quantity on the track are set from the processor front panel. Processor solution time is 16 μs maximum quantity of simultaneously analyzed coordinates is 16

Green Synthesis and Catalytic Activity of Gold Nanoparticles Synthesized by Artemisia capillaris Water Extract

Science.gov (United States)

Lim, Soo Hyeon; Ahn, Eun-Young; Park, Youmie

2016-10-01

Gold nanoparticles were synthesized using a water extract of Artemisia capillaris (AC-AuNPs) under different extract concentrations, and their catalytic activity was evaluated in a 4-nitrophenol reduction reaction in the presence of sodium borohydride. The AC-AuNPs showed violet or wine colors with characteristic surface plasmon resonance bands at 534 543 nm that were dependent on the extract concentration. Spherical nanoparticles with an average size of 16.88 ± 5.47 29.93 ± 9.80 nm were observed by transmission electron microscopy. A blue shift in the maximum surface plasmon resonance was observed with increasing extract concentration. The face-centered cubic structure of AC-AuNPs was confirmed by high-resolution X-ray diffraction analysis. Based on phytochemical screening and Fourier transform infrared spectra, flavonoids, phenolic compounds, and amino acids present in the extract contributed to the reduction of Au ions to AC-AuNPs. The average size of the AC-AuNPs decreased as the extract concentration during the synthesis was increased. Higher 4-nitrophenol reduction reaction rate constants were observed for smaller sizes. The extract in the AC-AuNPs was removed by centrifugation to investigate the effect of the extract in the reduction reaction. Interestingly, the removal of extracts greatly enhanced their catalytic activity by up to 50.4 %. The proposed experimental method, which uses simple centrifugation, can be applied to other metallic nanoparticles that are green synthesized with plant extracts to enhance their catalytic activity.

Removal of Humic Substances from Water by Advanced Oxidation Process Using UV/TiO2 Photo Catalytic Technology

Directory of Open Access Journals (Sweden)

Hassan Khorsandi

2009-01-01

Full Text Available Humic substances have been known as precursors to disinfection by-products. Because conventional treatment processes cannot meet disinfection by-product standards, novel methods have been increasingly applied for the removal of disinfection by-products precursors. The UV/TiO2 process is one of the advanced oxidation processes using the photocatalytic technology. The most important advantages of this process are its stability and high efficiency removal. The present study aims to investigate the effect of UV/TiO2 photo-catalytic technology on removal of humic substances. The study was conducted in a lab-scale batch photo-catalytic reactor using the interval experimental method. The UV irradiation source was a low pressure mercury vapor lamp 55w that was axially centered and was immersed in a humic acids solution within a stainless steel tubular 2.8 L reaction volume. Each of the samples taken from the UV/TiO2 process and other processes studied were analyzed for their dissolved organic carbon, UV absorbance at 254nm, and specific UV254 absorbance. The results indicated the high efficiency of the UV/TiO2 photo-catalytic process (TiO2=0.1 g/L and pH=5, compared to other processes, for humic substances removal from water sources. The process was also found to be capable of decreasing the initial dissolved organic carbon from 5 to 0.394 mg/L. The Specific UV254 Absorbance of 2.79 L/mg.m was attained after 1.5 hr. under photo-catalytic first order reaction (k= 0.0267 min-1. It may be concluded that the UV/TiO2 process can provide desirable drinking water quality in terms of humic substance content.

Development methods for VLSI-processors

International Nuclear Information System (INIS)

Horninger, K.; Sandweg, G.

1982-01-01

The aim of this project, which was originally planed for 3 years, was the development of modern system and circuit concepts, for VLSI-processors having a 32 bit wide data path. The result of this first years work is the concept of a general purpose processor. This processor is not only logically but also physically (on the chip) divided into four functional units: a microprogrammable instruction unit, an execution unit in slice technique, a fully associative cache memory and an I/O unit. For the ALU of the execution unit circuits in PLA and slice techniques have been realized. On the basis of regularity, area consumption and achievable performance the slice technique has been prefered. The designs utilize selftesting circuitry. (orig.) [de

The performance of an LSI-11/23 with a SKYMNK-Q array processor as a high speed front end processor

International Nuclear Information System (INIS)

Clark, D.L.

1983-01-01

The NSRL has recently installed a VAX-11/750 based data acquisition system which is networked to two LSI-11/23 satellite processors. Each of the LSI's are connected to CAMAC branch drivers. The LSI's have small array processors installed for use in preprocessing data. The objective is to provide an easy to use high speed processor that will relieve the VAX of some of the real-time data analysis tasks. The basic operation of the array processor and some of the results of performance tests are described

Embedded Processor Laboratory

Data.gov (United States)

Federal Laboratory Consortium — The Embedded Processor Laboratory provides the means to design, develop, fabricate, and test embedded computers for missile guidance electronics systems in support...

Multi-Core Processor Memory Contention Benchmark Analysis Case Study

Science.gov (United States)

Simon, Tyler; McGalliard, James

2009-01-01

Multi-core processors dominate current mainframe, server, and high performance computing (HPC) systems. This paper provides synthetic kernel and natural benchmark results from an HPC system at the NASA Goddard Space Flight Center that illustrate the performance impacts of multi-core (dual- and quad-core) vs. single core processor systems. Analysis of processor design, application source code, and synthetic and natural test results all indicate that multi-core processors can suffer from significant memory subsystem contention compared to similar single-core processors.

Architectural design and analysis of a programmable image processor

International Nuclear Information System (INIS)

Siyal, M.Y.; Chowdhry, B.S.; Rajput, A.Q.K.

2003-01-01

In this paper we present an architectural design and analysis of a programmable image processor, nicknamed Snake. The processor was designed with a high degree of parallelism to speed up a range of image processing operations. Data parallelism found in array processors has been included into the architecture of the proposed processor. The implementation of commonly used image processing algorithms and their performance evaluation are also discussed. The performance of Snake is also compared with other types of processor architectures. (author)

Analytical Bounds on the Threads in IXP1200 Network Processor

OpenAIRE

Ramakrishna, STGS; Jamadagni, HS

2003-01-01

Increasing link speeds have placed enormous burden on the processing requirements and the processors are expected to carry out a variety of tasks. Network Processors (NP) [1] [2] is the blanket name given to the processors, which are traded for flexibility and performance. Network Processors are offered by a number of vendors; to take the main burden of processing requirement of network related operations from the conventional processors. The Network Processors cover a spectrum of design trad...

Direct catalytic conversion of brown seaweed-derived alginic acid to furfural using 12-tungstophosphoric acid catalyst in tetrahydrofuran/water co-solvent

International Nuclear Information System (INIS)

Park, Geonu; Jeon, Wonjin; Ban, Chunghyeon; Woo, Hee Chul; Kim, Do Heui

2016-01-01

Highlights: • Furfural was produced by catalytic conversion of macroalgae-derived alginic acid. • 12-Tungstophosphoric acid (H_3PW_1_2O_4_0) showed remarkable catalytic performance. • Tetrahydrofuran (THF) as a reaction medium significantly enhanced production of furfural. - Abstract: Furfural, a biomass-derived platform chemical, was produced by acid-catalyzed reaction of alginic acid extracted from brown seaweed. Three acid catalysts, H_2SO_4, Amberlyst15 and 12-tungstophosphoric acid (H_3PW_1_2O_4_0), were compared to evaluate their catalytic performance for the alginic acid conversion. The H_3PW_1_2O_4_0 catalyst showed the highest catalytic activity, yielding the maximum furfural yield (33.8%) at 180 °C for 30 min in tetrahydrofuran/water co-solvent. Higher reaction temperature promoted the conversion of alginic acid to furfural, but the transformation of furfural to humin was also accelerated. To our knowledge, this is the highest furfural yield among studies about the direct catalytic conversion of alginic acid. Furthermore, products distribution with time-on-stream was investigated in detail, which led us to propose a reaction pathway.

Microbiological Evaluation of Broiler Carcasses, Wash and Rinse Water from Pluck Shops (Cottage Poultry Processors in the County Nariva/Mayaro, Trinidad, Trinidad and Tobago, West Indies

Directory of Open Access Journals (Sweden)

Thomas, A.

2006-01-01

Full Text Available A study on the prevalence and levels of Campylobacter, Salmonella and E. coli on broiler chicken carcasses, wash and rinse water from pluck shops/ cottage poultry processors (CPP in county Nariva Mayaro Trinidad was done. There are 21 pluck shops/ cottage poultry processors in the county, 14 pluck shops were randomly selected for the study. Samples consisted of 28 broiler carcasses, 14 wash water samples and 14 rinse water samples. Over all the isolation rate of Campylobacter, Salmonella and E. coli from broiler carcasses wash and rinse water showed significant differences (P< 0.05 between pluck shops. Of the 56 samples examined from the 14 pluck shops sampled, 34 (60.7% were positive for Campylobacter, 34 (60.7% for Salmonella and 40 (71.4% for E. coli. The correlation between the levels of Campylobacter found on carcasses and in wash water (r2= 0.657 and rinse water (r2= 0.600 was significant (P< 0.05 among pluck shops/CPP. There was also a high correlation (P< 0.05 between wash and rinse water samples (r2= 0.950 for Campylobacter. Salmonella levels on carcasses and in wash water were positively (P< 0.05 correlated (r2= 0.947. Of the 14 pluck shops examined 6 (42.9% had Campylobacter levels that corresponded to infectious dose in humans. The infectious doses for Salmonella were isolated from 3 (21.4% pluck shops and 13 (92.9% pluck shops evaluated had E. coli present at potentially infectious levels. Three pluck shops/CPP (21.4% had infectious dose for Campylobacter, Salmonella and E. coli where as all others had infectious levels for one or two pathogens. It was concluded that these pathogens are present in pluck shops/CPP in the county, having levels considered to be potentially infectious to humans and as such there should be health concern.

A UNIX-based prototype biomedical virtual image processor

International Nuclear Information System (INIS)

Fahy, J.B.; Kim, Y.

1987-01-01

The authors have developed a multiprocess virtual image processor for the IBM PC/AT, in order to maximize image processing software portability for biomedical applications. An interprocess communication scheme, based on two-way metacode exchange, has been developed and verified for this purpose. Application programs call a device-independent image processing library, which transfers commands over a shared data bridge to one or more Autonomous Virtual Image Processors (AVIP). Each AVIP runs as a separate process in the UNIX operating system, and implements the device-independent functions on the image processor to which it corresponds. Application programs can control multiple image processors at a time, change the image processor configuration used at any time, and are completely portable among image processors for which an AVIP has been implemented. Run-time speeds have been found to be acceptable for higher level functions, although rather slow for lower level functions, owing to the overhead associated with sending commands and data over the shared data bridge

The communication processor of TUMULT-64

NARCIS (Netherlands)

Smit, Gerardus Johannes Maria; Jansen, P.G.

1988-01-01

Tumult (Twente University MULTi-processor system) is a modular extendible multi-processor system designed and implemented at the Twente University of Technology in co-operation with Oce Nederland B.V. and the Dr. Neher Laboratories (Dutch PTT). Characteristics of the hardware are: MIMD type,

Simulation of a 250 kW diesel fuel processor/PEM fuel cell system

Science.gov (United States)

Amphlett, J. C.; Mann, R. F.; Peppley, B. A.; Roberge, P. R.; Rodrigues, A.; Salvador, J. P.

Polymer-electrolyte membrane (PEM) fuel cell systems offer a potential power source for utility and mobile applications. Practical fuel cell systems use fuel processors for the production of hydrogen-rich gas. Liquid fuels, such as diesel or other related fuels, are attractive options as feeds to a fuel processor. The generation of hydrogen gas for fuel cells, in most cases, becomes the crucial design issue with respect to weight and volume in these applications. Furthermore, these systems will require a gas clean-up system to insure that the fuel quality meets the demands of the cell anode. The endothermic nature of the reformer will have a significant affect on the overall system efficiency. The gas clean-up system may also significantly effect the overall heat balance. To optimize the performance of this integrated system, therefore, waste heat must be used effectively. Previously, we have concentrated on catalytic methanol-steam reforming. A model of a methanol steam reformer has been previously developed and has been used as the basis for a new, higher temperature model for liquid hydrocarbon fuels. Similarly, our fuel cell evaluation program previously led to the development of a steady-state electrochemical fuel cell model (SSEM). The hydrocarbon fuel processor model and the SSEM have now been incorporated in the development of a process simulation of a 250 kW diesel-fueled reformer/fuel cell system using a process simulator. The performance of this system has been investigated for a variety of operating conditions and a preliminary assessment of thermal integration issues has been carried out. This study demonstrates the application of a process simulation model as a design analysis tool for the development of a 250 kW fuel cell system.

High-Speed General Purpose Genetic Algorithm Processor.

Science.gov (United States)

Hoseini Alinodehi, Seyed Pourya; Moshfe, Sajjad; Saber Zaeimian, Masoumeh; Khoei, Abdollah; Hadidi, Khairollah

2016-07-01

In this paper, an ultrafast steady-state genetic algorithm processor (GAP) is presented. Due to the heavy computational load of genetic algorithms (GAs), they usually take a long time to find optimum solutions. Hardware implementation is a significant approach to overcome the problem by speeding up the GAs procedure. Hence, we designed a digital CMOS implementation of GA in [Formula: see text] process. The proposed processor is not bounded to a specific application. Indeed, it is a general-purpose processor, which is capable of performing optimization in any possible application. Utilizing speed-boosting techniques, such as pipeline scheme, parallel coarse-grained processing, parallel fitness computation, parallel selection of parents, dual-population scheme, and support for pipelined fitness computation, the proposed processor significantly reduces the processing time. Furthermore, by relying on a built-in discard operator the proposed hardware may be used in constrained problems that are very common in control applications. In the proposed design, a large search space is achievable through the bit string length extension of individuals in the genetic population by connecting the 32-bit GAPs. In addition, the proposed processor supports parallel processing, in which the GAs procedure can be run on several connected processors simultaneously.

Accuracies Of Optical Processors For Adaptive Optics

Science.gov (United States)

Downie, John D.; Goodman, Joseph W.

1992-01-01

Paper presents analysis of accuracies and requirements concerning accuracies of optical linear-algebra processors (OLAP's) in adaptive-optics imaging systems. Much faster than digital electronic processor and eliminate some residual distortion. Question whether errors introduced by analog processing of OLAP overcome advantage of greater speed. Paper addresses issue by presenting estimate of accuracy required in general OLAP that yields smaller average residual aberration of wave front than digital electronic processor computing at given speed.

Making CSB + -Trees Processor Conscious

DEFF Research Database (Denmark)

Samuel, Michael; Pedersen, Anders Uhl; Bonnet, Philippe

2005-01-01

of the CSB+-tree. We argue that it is necessary to consider a larger group of parameters in order to adapt CSB+-tree to processor architectures as different as Pentium and Itanium. We identify this group of parameters and study how it impacts the performance of CSB+-tree on Itanium 2. Finally, we propose......Cache-conscious indexes, such as CSB+-tree, are sensitive to the underlying processor architecture. In this paper, we focus on how to adapt the CSB+-tree so that it performs well on a range of different processor architectures. Previous work has focused on the impact of node size on the performance...... a systematic method for adapting CSB+-tree to new platforms. This work is a first step towards integrating CSB+-tree in MySQL’s heap storage manager....

Lipsi: Probably the Smallest Processor in the World

DEFF Research Database (Denmark)

Schoeberl, Martin

2018-01-01

While research on high-performance processors is important, it is also interesting to explore processor architectures at the other end of the spectrum: tiny processor cores for auxiliary functions. While it is common to implement small circuits for such functions, such as a serial port, in dedica...... at a minimal cost....

Recommending the heterogeneous cluster type multi-processor system computing

International Nuclear Information System (INIS)

Iijima, Nobukazu

2010-01-01

Real-time reactor simulator had been developed by reusing the equipment of the Musashi reactor and its performance improvement became indispensable for research tools to increase sampling rate with introduction of arithmetic units using multi-Digital Signal Processor(DSP) system (cluster). In order to realize the heterogeneous cluster type multi-processor system computing, combination of two kinds of Control Processor (CP) s, Cluster Control Processor (CCP) and System Control Processor (SCP), were proposed with Large System Control Processor (LSCP) for hierarchical cluster if needed. Faster computing performance of this system was well evaluated by simulation results for simultaneous execution of plural jobs and also pipeline processing between clusters, which showed the system led to effective use of existing system and enhancement of the cost performance. (T. Tanaka)

Synergetic Effects of Alcohol/Water Mixing on the Catalytic Reductive Fractionation of Poplar Wood

Energy Technology Data Exchange (ETDEWEB)

Renders, Tom; Van den Bosch, Sander; Vangeel, Thijs; Ennaert, Thijs; Koelewijn, Steven-Friso; Van den Bossche, Gil; Courtin, Christophe M.; Schutyser, Wouter; Sels, Bert F.

2016-12-05

One of the foremost challenges in lignocellulose conversion encompasses the integration of effective lignin valorization in current carbohydrate-oriented biorefinery schemes. Catalytic reductive fractionation (CRF) of lignocellulose offers a technology to simultaneously produce lignin-derived platform chemicals and a carbohydrate-enriched pulp via the combined action of lignin solvolysis and metal-catalyzed hydrogenolysis. Herein, the solvent (composition) plays a crucial role. In this contribution, we study the influence of alcohol/water mixtures by processing poplar sawdust in varying MeOH/water and EtOH/water blends. The results show particular effects that strongly depend on the applied water concentration. Low water concentrations enhance the removal of lignin from the biomass, while the majority of the carbohydrates are left untouched (scenario A). Contrarily, high water concentrations favor the solubilization of both hemicellulose and lignin, resulting in a more pure cellulosic residue (scenario B). For both scenarios, an evaluation was made to determine the most optimal solvent composition, based on two earlier introduced empirical efficiency descriptors (denoted LFDE and LFFE). According to these measures, 30 (A) and 70 vol % water (B) showed to be the optimal balance for both MeOH/water and EtOH/water mixtures. This successful implementation of alcohol/water mixtures allows operation under milder processing conditions in comparison to pure alcohol solvents, which is advantageous from an industrial point of view.

Experimental studies on catalytic hydrogen recombiners for light water reactors

International Nuclear Information System (INIS)

Drinovac, P.

2006-01-01

In the course of core melt accidents in nuclear power plants a large amount of hydrogen can be produced and form an explosive or even detonative gas mixture with aerial oxygen in the reactor building. In the containment atmosphere of pressurized water reactors hydrogen combines a phlogistically with the oxygen present to form water vapor even at room temperature. In the past, experimental work conducted at various facilities has contributed little or nothing to an understanding of the operating principles of catalytic recombiners. Hence, the purpose of the present study was to conduct detailed investigations on a section of a recombiner essentially in order to deepen the understanding of reaction kinetics and heat transport processes. The results of the experiments presented in this dissertation form a large data base of measurements which provides an insight into the processes taking place in recombiners. The reaction-kinetic interpretation of the measured data confirms and deepens the diffusion theory - proposed in an earlier study. Thus it is now possible to validate detailed numeric models representing the processes in recombiners. Consequently the present study serves to broaden and corroborate competence in this significant area of reactor technology. In addition, the empirical knowledge thus gained may be used for a critical reassessment of previous numeric model calculations. (orig.)

First level trigger processor for the ZEUS calorimeter

International Nuclear Information System (INIS)

Dawson, J.W.; Talaga, R.L.; Burr, G.W.; Laird, R.J.; Smith, W.; Lackey, J.

1990-01-01

This paper discusses the design of the first level trigger processor for the ZEUS calorimeter. This processor accepts data from the 13,000 photomultipliers of the calorimeter which is topologically divided into 16 regions, and after regional preprocessing, performs logical and numerical operations which cross regional boundaries. Because the crossing period at the HERA collider is 96 ns, it is necessary that first-level trigger decisions be made in pipelined hardware. One microsecond is allowed for the processor to perform the required logical and numerical operations, during which time the data from ten crossings would be resident in the processor while being clocked through the pipelined hardware. The circuitry is implemented in 100K ECL, Advanced CMOS discrete devices, and programmable gate arrays, and operates in a VME environment. All tables and registers are written/read from VME, and all diagnostic codes are executed from VME. Preprocessed data flows into the processor at a rate of 5.2GB/s, and processed data flows from the processor to the Global First-Level Trigger at a rate of 700MB/s. The system allows for subsets of the logic to be configured by software and for various important variables to be histogrammed as they flow through the processor. 2 refs., 3 figs

First-level trigger processor for the ZEUS calorimeter

International Nuclear Information System (INIS)

Dawson, J.W.; Talaga, R.L.; Burr, G.W.; Laird, R.J.; Smith, W.; Lackey, J.

1990-01-01

The design of the first-level trigger processor for the Zeus calorimeter is discussed. This processor accepts data from the 13,000 photomultipliers of the calorimeter, which is topologically divided into 16 regions, and after regional preprocessing performs logical and numerical operations that cross regional boundaries. Because the crossing period at the HERA collider is 96 ns, it is necessary that first-level trigger decisions be made in pipelined hardware. One microsecond is allowed for the processor to perform the required logical and numerical operations, during which time the data from ten crossings would be resident in the processor while being clocked through the pipelined hardware. The circuitry is implemented in 100K emitter-coupled logic (ECL), advanced CMOS discrete devices and programmable gate arrays, and operates in a VME environment. All tables and registers are written/read from VME, and all diagnostic codes are executed from VME. Preprocessed data flows into the processor at a rate of 5.2 Gbyte/s, and processed data flows from the processor to the global first-level trigger at a rate of 70 Mbyte/s. The system allows for subsets of the logic to be configured by software and for various important variables to be histogrammed as they flow through the processor

Catalytic isotope exchange reaction between deuterium gas and water pre-adsorbed on platinum/alumina

International Nuclear Information System (INIS)

Iida, Itsuo; Kato, Junko; Tamaru, Kenzi.

1976-01-01

The catalytic isotope exchange reaction between deuterium gas and the water pre-adsorbed on Pt/Al 2 O 3 was studied. At reaction temperatures above 273 K, the exchange rate was proportional to the deuterium pressure and independent of the amount of adsorbed water, which suggests that the rate determining step is the supply of deuterium from the gas phase. Its apparent activation energy was 38 kJ mol -1 . Below freezing point of water, the kinetic behaviour was different from that above freezing point. At higher deuterium pressures the rate dropped abruptly at 273 K. Below the temperature the apparent activation energy was 54 kJ mol -1 and the exchange rate depended not on the deuterium pressure but on the amount of the pre-adsorbed water. At lower pressures, however, the kinetic behaviour was the same as the above 273 K, till the rate of the supply of deuterium from the gas phase exceeded the supply of hydrogen from adsorbed water to platinum surface. These results suggest that below 273 K the supply of hydrogen is markedly retarded, the state of the adsorbed water differing from that above 273 K. It was also demonstrated that when the adsorbed water is in the state of capillary condensation, the exchange rate becomes very small. (auth.)

A digital retina-like low-level vision processor.

Science.gov (United States)

Mertoguno, S; Bourbakis, N G

2003-01-01

This correspondence presents the basic design and the simulation of a low level multilayer vision processor that emulates to some degree the functional behavior of a human retina. This retina-like multilayer processor is the lower part of an autonomous self-organized vision system, called Kydon, that could be used on visually impaired people with a damaged visual cerebral cortex. The Kydon vision system, however, is not presented in this paper. The retina-like processor consists of four major layers, where each of them is an array processor based on hexagonal, autonomous processing elements that perform a certain set of low level vision tasks, such as smoothing and light adaptation, edge detection, segmentation, line recognition and region-graph generation. At each layer, the array processor is a 2D array of k/spl times/m hexagonal identical autonomous cells that simultaneously execute certain low level vision tasks. Thus, the hardware design and the simulation at the transistor level of the processing elements (PEs) of the retina-like processor and its simulated functionality with illustrative examples are provided in this paper.

Energetic basis of catalytic activity of layered nanophase calcium manganese oxides for water oxidation.

Science.gov (United States)

Birkner, Nancy; Nayeri, Sara; Pashaei, Babak; Najafpour, Mohammad Mahdi; Casey, William H; Navrotsky, Alexandra

2013-05-28

Previous measurements show that calcium manganese oxide nanoparticles are better water oxidation catalysts than binary manganese oxides (Mn3O4, Mn2O3, and MnO2). The probable reasons for such enhancement involve a combination of factors: The calcium manganese oxide materials have a layered structure with considerable thermodynamic stability and a high surface area, their low surface energy suggests relatively loose binding of H2O on the internal and external surfaces, and they possess mixed-valent manganese with internal oxidation enthalpy independent of the Mn(3+)/Mn(4+) ratio and much smaller in magnitude than the Mn2O3-MnO2 couple. These factors enhance catalytic ability by providing easy access for solutes and water to active sites and facile electron transfer between manganese in different oxidation states.

Median and Morphological Specialized Processors for a Real-Time Image Data Processing

Directory of Open Access Journals (Sweden)

Kazimierz Wiatr

2002-01-01

Full Text Available This paper presents the considerations on selecting a multiprocessor MISD architecture for fast implementation of the vision image processing. Using the author′s earlier experience with real-time systems, implementing of specialized hardware processors based on the programmable FPGA systems has been proposed in the pipeline architecture. In particular, the following processors are presented: median filter and morphological processor. The structure of a universal reconfigurable processor developed has been proposed as well. Experimental results are presented as delays on LCA level implementation for median filter, morphological processor, convolution processor, look-up-table processor, logic processor and histogram processor. These times compare with delays in general purpose processor and DSP processor.

Catalytic exhaust control

Energy Technology Data Exchange (ETDEWEB)

Heinemann, H

1973-09-01

Recent achievements and problems in the development of exhaust control devices in the USA are reviewed. To meet the 1976 emission standards, catalytic systems for the oxidation of carbon monoxide and hydrocarbons and for the reduction of nitrogen oxides to nitrogen and water are needed. While oxidizing catalysts using platinum, palladium, copper, vanadium, and chromium appplied on alumina or ceramic materials are more or less effective in emission control, there are no catalytic devices for the reduction of nitrogen oxides with the required useful life of 25,000 to 50,000 miles as yet available. In the case of platinum catalysts on monolithic supports, the operating temperature of 650 to 750/sup 0/C as required for the oxidation process may cause inactivation of the catalysts and fusion of the support material. The oxidation of CO and hydrocarbons is inhibited by high concentrations of CO, nitric oxide, and hydrocarbons. The use of catalytic converters requires the use of lead-free or low-lead gasoline. The nitrogen oxides conversion efficiency is considerably influenced by the oxygen-to-CO ratio of the exhaust gas, which makes limitation of this ratio necessary.

Java Processor Optimized for RTSJ

Directory of Open Access Journals (Sweden)

Tu Shiliang

2007-01-01

Full Text Available Due to the preeminent work of the real-time specification for Java (RTSJ, Java is increasingly expected to become the leading programming language in real-time systems. To provide a Java platform suitable for real-time applications, a Java processor which can execute Java bytecode is directly proposed in this paper. It provides efficient support in hardware for some mechanisms specified in the RTSJ and offers a simpler programming model through ameliorating the scoped memory of the RTSJ. The worst case execution time (WCET of the bytecodes implemented in this processor is predictable by employing the optimization method proposed in our previous work, in which all the processing interfering predictability is handled before bytecode execution. Further advantage of this method is to make the implementation of the processor simpler and suited to a low-cost FPGA chip.

Data collection from FASTBUS to a DEC UNIBUS processor through the UNIBUS-Processor Interface

International Nuclear Information System (INIS)

Larwill, M.; Barsotti, E.; Lesny, D.; Pordes, R.

1983-01-01

This paper describes the use of the UNIBUS Processor Interface, an interface between FASTBUS and the Digital Equipment Corporation UNIBUS. The UPI was developed by Fermilab and the University of Illinois. Details of the use of this interface in a high energy physics experiment at Fermilab are given. The paper includes a discussion of the operation of the UPI on the UNIBUS of a VAX-11, and plans for using the UPI to perform data acquisition from FASTBUS to a VAX-11 Processor

New development for low energy electron beam processor

International Nuclear Information System (INIS)

Takei, Taro; Goto, Hitoshi; Oizumi, Matsutoshi; Hirakawa, Tetsuya; Ochi, Masafumi

2003-01-01

Newly developed low-energy electron beam (EB) processors that have unique designs and configurations compared to conventional ones enable electron-beam treatment of small three-dimensional objects, such as grain-like agricultural products and small plastic parts. As the EB processor can irradiate the products from the whole angles, the uniform EB treatment can be achieved at one time regardless the complex shapes of the product. Here presented are two new EB processors: the first system has cylindrical process zone, which allows three-dimensional objects to be irradiated with one-pass treatment. The second is a tube-type small EB processor, achieving not only its compactor design, but also higher beam extraction efficiency and flexible installation of the irradiation heads. The basic design of each processor and potential applications with them will be presented in this paper. (author)

A data base processor semantics specification package

Science.gov (United States)

Fishwick, P. A.

1983-01-01

A Semantics Specification Package (DBPSSP) for the Intel Data Base Processor (DBP) is defined. DBPSSP serves as a collection of cross assembly tools that allow the analyst to assemble request blocks on the host computer for passage to the DBP. The assembly tools discussed in this report may be effectively used in conjunction with a DBP compatible data communications protocol to form a query processor, precompiler, or file management system for the database processor. The source modules representing the components of DBPSSP are fully commented and included.

Globe hosts launch of new processor

CERN Multimedia

2006-01-01

Launch of the quadecore processor chip at the Globe. On 14 November, in a series of major media events around the world, the chip-maker Intel launched its new 'quadcore' processor. For the regions of Europe, the Middle East and Africa, the day-long launch event took place in CERN's Globe of Science and Innovation, with over 30 journalists in attendance, coming from as far away as Johannesburg and Dubai. CERN was a significant choice for the event: the first tests of this new generation of processor in Europe had been made at CERN over the preceding months, as part of CERN openlab, a research partnership with leading IT companies such as Intel, HP and Oracle. The event also provided the opportunity for the journalists to visit ATLAS and the CERN Computer Centre. The strategy of putting multiple processor cores on the same chip, which has been pursued by Intel and other chip-makers in the last few years, represents an important departure from the more traditional improvements in the sheer speed of such chips. ...

XL-100S microprogrammable processor

International Nuclear Information System (INIS)

Gorbunov, N.V.; Guzik, Z.; Sutulin, V.A.; Forytski, A.

1983-01-01

The XL-100S microprogrammable processor providing the multiprocessor operation mode in the XL system crate is described. The processor meets the EUR 6500 CAMAC standards, address up to 4 Mbyte memory, and interacts with 7 CAMAC branchas. Eight external requests initiate operations preset by a sequence of microcommands in a memory of the capacity up to 64 kwords of 32-Git. The microprocessor architecture allows one to emulate commands of the majority of mini- or micro-computers, including floating point operations. The XL-100S processor may be used in various branches of experimental physics: for physical experiment apparatus control, fast selection of useful physical events, organization of the of input/output operations, organization of direct assess to memory included, etc. The Am2900 microprocessor set is used as an elementary base. The device is made in the form of a single width CAMAC module

Acoustooptic linear algebra processors - Architectures, algorithms, and applications

Science.gov (United States)

Casasent, D.

1984-01-01

Architectures, algorithms, and applications for systolic processors are described with attention to the realization of parallel algorithms on various optical systolic array processors. Systolic processors for matrices with special structure and matrices of general structure, and the realization of matrix-vector, matrix-matrix, and triple-matrix products and such architectures are described. Parallel algorithms for direct and indirect solutions to systems of linear algebraic equations and their implementation on optical systolic processors are detailed with attention to the pipelining and flow of data and operations. Parallel algorithms and their optical realization for LU and QR matrix decomposition are specifically detailed. These represent the fundamental operations necessary in the implementation of least squares, eigenvalue, and SVD solutions. Specific applications (e.g., the solution of partial differential equations, adaptive noise cancellation, and optimal control) are described to typify the use of matrix processors in modern advanced signal processing.

Simulation of a processor switching circuit with APLSV

International Nuclear Information System (INIS)

Dilcher, H.

1979-01-01

The report describes the simulation of a processor switching circuit with APL. Furthermore an APL function is represented to simulate a processor in an assembly like language. Both together serve as a tool for studying processor properties. By means of the programming function it is also possible to program other simulated processors. The processor is to be used in the processing of data in real time analysis that occur in high energy physics experiments. The data are already offered to the computer in digitalized form. A typical data rate is at 10 KB/ sec. The data are structured in blocks. The particular blocks are 1 KB wide and are independent from each other. Aprocessor has to decide, whether the block data belong to an event that is part of the backround noise and can therefore be forgotten, or whether the data should be saved for a later evaluation. (orig./WB) [de

Accuracy Limitations in Optical Linear Algebra Processors

Science.gov (United States)

Batsell, Stephen Gordon

1990-01-01

One of the limiting factors in applying optical linear algebra processors (OLAPs) to real-world problems has been the poor achievable accuracy of these processors. Little previous research has been done on determining noise sources from a systems perspective which would include noise generated in the multiplication and addition operations, noise from spatial variations across arrays, and from crosstalk. In this dissertation, we propose a second-order statistical model for an OLAP which incorporates all these system noise sources. We now apply this knowledge to determining upper and lower bounds on the achievable accuracy. This is accomplished by first translating the standard definition of accuracy used in electronic digital processors to analog optical processors. We then employ our second-order statistical model. Having determined a general accuracy equation, we consider limiting cases such as for ideal and noisy components. From the ideal case, we find the fundamental limitations on improving analog processor accuracy. From the noisy case, we determine the practical limitations based on both device and system noise sources. These bounds allow system trade-offs to be made both in the choice of architecture and in individual components in such a way as to maximize the accuracy of the processor. Finally, by determining the fundamental limitations, we show the system engineer when the accuracy desired can be achieved from hardware or architecture improvements and when it must come from signal pre-processing and/or post-processing techniques.

The Heidelberg POLYP - a flexible and fault-tolerant poly-processor

International Nuclear Information System (INIS)

Maenner, R.; Deluigi, B.

1981-01-01

The Heidelberg poly-processor system POLYP is described. It is intended to be used in nuclear physics for reprocessing of experimental data, in high energy physics as second-stage trigger processor, and generally in other applications requiring high-computing power. The POLYP system consists of any number of I/O-processors, processor modules (eventually of different types), global memory segments, and a host processor. All modules (up to several hundred) are connected by a multiple common-data-bus system; all processors, additionally, by a multiple sync bus system for processor/task-scheduling. All hard- and software is designed to be decentralized and free of bottle-necks. Most hardware-faults like single-bit errors in memory or multi-bit errors during transfers are automatically corrected. Defective modules, buses, etc., can be removed with only a graceful degradation of the system-throughput. (orig.)

Synthesis, Characterization, and Photoelectrochemical Catalytic Studies of a Water-Stable Zinc-Based Metal-Organic Framework.

Science.gov (United States)

Altaf, Muhammad; Sohail, Manzar; Mansha, Muhammad; Iqbal, Naseer; Sher, Muhammad; Fazal, Atif; Ullah, Nisar; Isab, Anvarhusein A

2018-02-09

Metal-organic frameworks (MOFs) are class of porous materials that can be assembled in a modular manner by using different metal ions and organic linkers. Owing to their tunable structural properties, these materials are found to be useful for gas storage and separation technologies, as well as for catalytic applications. A cost-effective zinc-based MOF ([Zn(bpcda)(bdc)] n ) is prepared by using N,N'-bis(pyridin-4-ylmethylene)cyclohexane-1,4-diamine [N,N'-bis(pyridin-4-ylmethylene)cyclohexane-1,4-diamine] and benzenedicarboxylic acid (bdc) linkers. This new material exhibits remarkable photoelectrochemical (PEC) catalytic activity in water splitting for the evolution of oxygen. Notably, this non-noble metal-based MOF, without requiring immobilization on other supports or containing metal particles, produced a highest photocurrent density of 31 μA cm -2 at 0.9 V, with appreciable stability and negligible photocorrosion. Advantageously for the oxygen evolution process, no external reagents or sacrificial agents are required in the aqueous electrolyte solution. © 2018 Wiley-VCH Verlag GmbH & Co. KGaA, Weinheim.

A dedicated line-processor as used at the SHF

International Nuclear Information System (INIS)

Bevan, A.V.; Hatley, R.W.; Price, D.R.; Rankin, P.

1985-01-01

A hardwired trigger processor was used at the SLAC Hybrid Facility to find evidence for charged tracks originating from the fiducial volume of a 40'' rapidcycling bubble chamber. Straight-line projections of these tracks in the plane perpendicular to the applied magnetic field were searched for using data from three sets of proportional wire chambers (PWC). This information was made directly available to the processor by means of a special digitizing card. The results memory of the processor simulated read-only memory in a 168/E processor and was accessible by it. The 168/E controlled the issuing of a trigger command to the bubble chamber flash tubes. The same design of digitizer card used by the line processor was incorporated into the 168/E, again as read only memory, which allowed it access to the raw data for continual monitoring of trigger integrity. The design logic of the trigger processor was verified by running real PWC data through a FORTRAN simulation of the hardware. This enabled the debugging to become highly automated since a step by step, computer controlled comparison of processor registers to simulation predictions could be made

Investigation of catalytic oxidation of diamond by water vapor and carbon dioxide in the presence of alkali melts of some rare earth oxides

International Nuclear Information System (INIS)

Kulakova, I.I.; Rudenko, A.P.; Sulejmenova, A.S.; Tolstopyatova, A.A.

1978-01-01

The results of an investigation of the catalytic oxydation of diamond by carbon dioxide and water vapors at 906 deg C in the presence of melts of some rare earth oxides in potassium hydroxide are given. The ion La 3+ was shown to possess the most catalytic activity. The earlier proposed mechanisms of the diamond oxidation by CO 2 and H 2 O were corroborated. The ions of rare earth elements were found to accelerate the different stages of the process

A Broad Spectrum Catalytic System for Removal of Toxic Organics from Water by Deep Oxidation - Final Report

Energy Technology Data Exchange (ETDEWEB)

Sen, Ayusman

2000-12-01

A most pressing need for the DOE environmental management program is the removal of toxic organic compounds present in groundwater and soil at specific DOE sites. While several remediation procedures have been proposed, they suffer from one or more drawbacks. The objective of the present research was to develop new catalytic procedures for the removal of toxic organic compounds from the environment through their deep oxidation to harmless products. In water, metallic palladium was found to catalyze the deep oxidation of a wide variety of toxic organic compounds by dioxygen at 80-90 C in the presence of carbon monoxide or dihydrogen. Several classes of organic compounds were examined: benzene, phenol and substituted phenols, nitro and halo organics, organophosphorus, and organosulfur compounds. In every case, deep oxidation to carbon monoxide, carbon dioxide, and water occurred in high yields, resulting in up to several hundred turnovers over a 24 hour period. For substrates susceptible to hydrogenation, the conversions were generally high with dihydrogen than with carbon monoxide. It is clear from the results obtained that we have discovered an exceptionally versatile catalytic system for the deep oxidation of toxic organic compounds in water. This system possesses several attractive features not found simultaneously in other reported systems. These are (a) the ability to directly utilize dioxygen as the oxidant, (b) the ability to carry out the deep oxidation of a particularly wide range of functional organics, and (c) the ease of recovery of the catalyst by simple filtration.

Embedded processor extensions for image processing

Science.gov (United States)

Thevenin, Mathieu; Paindavoine, Michel; Letellier, Laurent; Heyrman, Barthélémy

2008-04-01

The advent of camera phones marks a new phase in embedded camera sales. By late 2009, the total number of camera phones will exceed that of both conventional and digital cameras shipped since the invention of photography. Use in mobile phones of applications like visiophony, matrix code readers and biometrics requires a high degree of component flexibility that image processors (IPs) have not, to date, been able to provide. For all these reasons, programmable processor solutions have become essential. This paper presents several techniques geared to speeding up image processors. It demonstrates that a gain of twice is possible for the complete image acquisition chain and the enhancement pipeline downstream of the video sensor. Such results confirm the potential of these computing systems for supporting future applications.

An intercomparison of several diagnostic meteorological processors used in mesoscale air quality modeling

Energy Technology Data Exchange (ETDEWEB)

Vimont, J.C. [National Park Service, Lakewood, CO (United States); Scire, J.S. [Sigma Research Corp., Concord, MA (United States)

1994-12-31

A major component, and area of uncertainty, in mesoscale air quality modeling, is the specification of the meteorological fields which affect the transport and dispersion of pollutants. Various options are available for estimating the wind and mixing depth fields over a mesoscale domain. Estimates of the wind field can be obtained from spatial and temporal interpolation of available observations or from diagnostic meteorological models, which estimate a meteorological field from available data and adjust those fields based on parameterizations of physical processes. A major weakness of these processors is their dependence on spatially and temporally sparse input data, particularly upper air data. These problems are exacerbated in regions of complex terrain and along the shorelines of large bodies of water. Similarly, the estimation of mixing depth is also reliant upon sparse observations and the parameterization of the convective and mechanical processes. The meteorological processors examined in this analysis were developed to drive different Lagrangian puff models. This paper describes the algorithms these processors use to estimate the wind fields and mixing depth fields.

Sojourn time tails in processor-sharing systems

NARCIS (Netherlands)

Egorova, R.R.

2009-01-01

The processor-sharing discipline was originally introduced as a modeling abstraction for the design and performance analysis of the processing unit of a computer system. Under the processor-sharing discipline, all active tasks are assumed to be processed simultaneously, receiving an equal share of

An interactive parallel processor for data analysis

International Nuclear Information System (INIS)

Mong, J.; Logan, D.; Maples, C.; Rathbun, W.; Weaver, D.

1984-01-01

A parallel array of eight minicomputers has been assembled in an attempt to deal with kiloparameter data events. By exporting computer system functions to a separate processor, the authors have been able to achieve computer amplification linearly proportional to the number of executing processors

Optical Array Processor: Laboratory Results

Science.gov (United States)

Casasent, David; Jackson, James; Vaerewyck, Gerard

1987-01-01

A Space Integrating (SI) Optical Linear Algebra Processor (OLAP) is described and laboratory results on its performance in several practical engineering problems are presented. The applications include its use in the solution of a nonlinear matrix equation for optimal control and a parabolic Partial Differential Equation (PDE), the transient diffusion equation with two spatial variables. Frequency-multiplexed, analog and high accuracy non-base-two data encoding are used and discussed. A multi-processor OLAP architecture is described and partitioning and data flow issues are addressed.

Multiprocessor Real-Time Scheduling with Hierarchical Processor Affinities

OpenAIRE

Bonifaci , Vincenzo; Brandenburg , Björn; D'Angelo , Gianlorenzo; Marchetti-Spaccamela , Alberto

2016-01-01

International audience; Many multiprocessor real-time operating systems offer the possibility to restrict the migrations of any task to a specified subset of processors by setting affinity masks. A notion of " strong arbitrary processor affinity scheduling " (strong APA scheduling) has been proposed; this notion avoids schedulability losses due to overly simple implementations of processor affinities. Due to potential overheads, strong APA has not been implemented so far in a real-time operat...

Hardware trigger processor for the MDT system

CERN Document Server

AUTHOR|(SzGeCERN)757787; The ATLAS collaboration; Hazen, Eric; Butler, John; Black, Kevin; Gastler, Daniel Edward; Ntekas, Konstantinos; Taffard, Anyes; Martinez Outschoorn, Verena; Ishino, Masaya; Okumura, Yasuyuki

2017-01-01

We are developing a low-latency hardware trigger processor for the Monitored Drift Tube system in the Muon spectrometer. The processor will fit candidate Muon tracks in the drift tubes in real time, improving significantly the momentum resolution provided by the dedicated trigger chambers. We present a novel pure-FPGA implementation of a Legendre transform segment finder, an associative-memory alternative implementation, an ARM (Zynq) processor-based track fitter, and compact ATCA carrier board architecture. The ATCA architecture is designed to allow a modular, staged approach to deployment of the system and exploration of alternative technologies.

Towards a Process Algebra for Shared Processors

DEFF Research Database (Denmark)

Buchholtz, Mikael; Andersen, Jacob; Løvengreen, Hans Henrik

2002-01-01

We present initial work on a timed process algebra that models sharing of processor resources allowing preemption at arbitrary points in time. This enables us to model both the functional and the timely behaviour of concurrent processes executed on a single processor. We give a refinement relation...

High-speed packet filtering utilizing stream processors

Science.gov (United States)

Hummel, Richard J.; Fulp, Errin W.

2009-04-01

Parallel firewalls offer a scalable architecture for the next generation of high-speed networks. While these parallel systems can be implemented using multiple firewalls, the latest generation of stream processors can provide similar benefits with a significantly reduced latency due to locality. This paper describes how the Cell Broadband Engine (CBE), a popular stream processor, can be used as a high-speed packet filter. Results show the CBE can potentially process packets arriving at a rate of 1 Gbps with a latency less than 82 μ-seconds. Performance depends on how well the packet filtering process is translated to the unique stream processor architecture. For example the method used for transmitting data and control messages among the pseudo-independent processor cores has a significant impact on performance. Experimental results will also show the current limitations of a CBE operating system when used to process packets. Possible solutions to these issues will be discussed.

Hydrogen from catalytic reforming of biomass-derived hydrocarbons in liquid water

Science.gov (United States)

Cortright, R. D.; Davda, R. R.; Dumesic, J. A.

2002-08-01

Concerns about the depletion of fossil fuel reserves and the pollution caused by continuously increasing energy demands make hydrogen an attractive alternative energy source. Hydrogen is currently derived from nonrenewable natural gas and petroleum, but could in principle be generated from renewable resources such as biomass or water. However, efficient hydrogen production from water remains difficult and technologies for generating hydrogen from biomass, such as enzymatic decomposition of sugars, steam-reforming of bio-oils and gasification, suffer from low hydrogen production rates and/or complex processing requirements. Here we demonstrate that hydrogen can be produced from sugars and alcohols at temperatures near 500K in a single-reactor aqueous-phase reforming process using a platinum-based catalyst. We are able to convert glucose-which makes up the major energy reserves in plants and animals-to hydrogen and gaseous alkanes, with hydrogen constituting 50% of the products. We find that the selectivity for hydrogen production increases when we use molecules that are more reduced than sugars, with ethylene glycol and methanol being almost completely converted into hydrogen and carbon dioxide. These findings suggest that catalytic aqueous-phase reforming might prove useful for the generation of hydrogen-rich fuel gas from carbohydrates extracted from renewable biomass and biomass waste streams.

Fast processor for dilepton triggers

International Nuclear Information System (INIS)

Katsanevas, S.; Kostarakis, P.; Baltrusaitis, R.

1983-01-01

We describe a fast trigger processor, developed for and used in Fermilab experiment E-537, for selecting high-mass dimuon events produced by negative pions and anti-protons. The processor finds candidate tracks by matching hit information received from drift chambers and scintillation counters, and determines their momenta. Invariant masses are calculated for all possible pairs of tracks and an event is accepted if any invariant mass is greater than some preselectable minimum mass. The whole process, accomplished within 5 to 10 microseconds, achieves up to a ten-fold reduction in trigger rate

Design of RISC Processor Using VHDL and Cadence

Science.gov (United States)

Moslehpour, Saeid; Puliroju, Chandrasekhar; Abu-Aisheh, Akram

The project deals about development of a basic RISC processor. The processor is designed with basic architecture consisting of internal modules like clock generator, memory, program counter, instruction register, accumulator, arithmetic and logic unit and decoder. This processor is mainly used for simple general purpose like arithmetic operations and which can be further developed for general purpose processor by increasing the size of the instruction register. The processor is designed in VHDL by using Xilinx 8.1i version. The present project also serves as an application of the knowledge gained from past studies of the PSPICE program. The study will show how PSPICE can be used to simplify massive complex circuits designed in VHDL Synthesis. The purpose of the project is to explore the designed RISC model piece by piece, examine and understand the Input/ Output pins, and to show how the VHDL synthesis code can be converted to a simplified PSPICE model. The project will also serve as a collection of various research materials about the pieces of the circuit.

Performance evaluation and comparison of fuel processors integrated with PEM fuel cell based on steam or autothermal reforming and on CO preferential oxidation or selective methanation

International Nuclear Information System (INIS)

Ercolino, Giuliana; Ashraf, Muhammad A.; Specchia, Vito; Specchia, Stefania

2015-01-01

Highlights: • Modeling of different fuel processors integrated with PEM fuel cell stack. • Steam or autothermal reforming + CO selective methanation or preferential oxidation. • Reforming of different hydrocarbons: gasoline, light diesel oil, natural gas. • 5 kW e net systems comparison via energy efficiency and primary fuel rate consumed. • Highest net efficiency: steam reformer + CO selective methanation based system. - Abstract: The performances of four different auxiliary power unit (APU) schemes, based on a 5 kW e net proton exchange membrane fuel cell (PEM-FC) stack, are evaluated and compared. The fuel processor section of each APU is characterized by a reformer (autothermal ATR or steam SR), a non-isothermal water gas shift (NI-WGS) reactor and a final syngas catalytic clean-up step: the CO preferential oxidation (PROX) reactor or the CO selective methanation (SMET) one. Furthermore, three hydrocarbon fuels, the most commonly found in service stations (gasoline, light diesel oil and natural gas) are considered as primary fuels. The comparison is carried out examining the results obtained by a series of steady-state system simulations in Aspen Plus® of the four different APU schemes by varying the fed fuel. From the calculated data, the performance of CO-PROX is not very different compared to that of the CO-SMET, but the performance of the SR based APUs is higher than the scheme of the ATR based APUs. The most promising APU scheme with respect to an overall performance target is the scheme fed with natural gas and characterized by a fuel processor chain consisting of SR, NI-WGS and CO-SMET reactors. This processing reactors scheme together with the fuel cell section, notwithstanding having practically the same energy efficiency of the scheme with SR, NI-WGS and CO-PROX reactors, ensures a less complex scheme, higher hydrogen concentration in the syngas, lower air mass rate consumption, the absence of nitrogen in the syngas and higher potential

Real time processor for array speckle interferometry

Science.gov (United States)

Chin, Gordon; Florez, Jose; Borelli, Renan; Fong, Wai; Miko, Joseph; Trujillo, Carlos

1989-02-01

The authors are constructing a real-time processor to acquire image frames, perform array flat-fielding, execute a 64 x 64 element two-dimensional complex FFT (fast Fourier transform) and average the power spectrum, all within the 25 ms coherence time for speckles at near-IR (infrared) wavelength. The processor will be a compact unit controlled by a PC with real-time display and data storage capability. This will provide the ability to optimize observations and obtain results on the telescope rather than waiting several weeks before the data can be analyzed and viewed with offline methods. The image acquisition and processing, design criteria, and processor architecture are described.

Aerobic, catalytic oxidation of alcohols in ionic liquids

Directory of Open Access Journals (Sweden)

Souza Roberto F. de

2006-01-01

Full Text Available An efficient and simple catalytic system based on RuCl3 dissolved in ionic liquids has been developed for the oxidation of alcohols into aldehydes and ketones under mild conditions. A new fluorinated ionic liquid, 1-n-butyl-3-methylimidazolium pentadecafluorooctanoate, was synthesized and demonstrated better performance that the other ionic liquids employed. Moreover this catalytic system utilizes molecular oxygen as an oxidizing agent, producing water as the only by-product.

Hydrothermal synthesis of Yttrium Orthovanadate (YVO4) and its application in photo catalytic degradation of sewage water

International Nuclear Information System (INIS)

Komal, J. K.; Karimi, P.; Hui, K. S.

2010-01-01

In this paper; YVO 4 powder was successfully synthesized from Vanadium Pentaoxide (V 2 O 5 ), Yttrium Oxide (Y 2 O 3 ) and ethyl acetate as a mineralizer by hydrothermal method at a low temperature (T=.230 d egree C , and P=100 bars). The as-prepared powders were characterized by X-ray Diffraction, Fourier Transform Infrared Spectroscopy, Scanning Electron Microscopy, UV-V Spectroscopy and Chemical Oxygen Demand of the sewage water, respectively. The results show that hydrothermal method can greatly promote the crystallization and growth of YVO 4 phase. X-ray Diffraction pattern clearly indicates the tetragonal structure and crystallinity. An fourier transform infrared spectrum of the YVO 4 shows the presence of Y-O and V-O bond, respectively. The presence of these two peaks indicates that yttrium vanadate has been formed. UV-V is absorption spectra suggesting that YVO 4 particles have stronger UV absorption than natural sunlight and subsequent photo catalytic degradation data also confirmed their higher photo catalytic activity.

Vector and parallel processors in computational science

International Nuclear Information System (INIS)

Duff, I.S.; Reid, J.K.

1985-01-01

These proceedings contain the articles presented at the named conference. These concern hardware and software for vector and parallel processors, numerical methods and algorithms for the computation on such processors, as well as applications of such methods to different fields of physics and related sciences. See hints under the relevant topics. (HSI)

MPC Related Computational Capabilities of ARMv7A Processors

DEFF Research Database (Denmark)

Frison, Gianluca; Jørgensen, John Bagterp

2015-01-01

In recent years, the mass market of mobile devices has pushed the demand for increasingly fast but cheap processors. ARM, the world leader in this sector, has developed the Cortex-A series of processors with focus on computationally intensive applications. If properly programmed, these processors...... are powerful enough to solve the complex optimization problems arising in MPC in real-time, while keeping the traditional low-cost and low-power consumption. This makes these processors ideal candidates for use in embedded MPC. In this paper, we investigate the floating-point capabilities of Cortex A7, A9...... and A15 and show how to exploit the unique features of each processor to obtain the best performance, in the context of a novel implementation method for the linear-algebra routines used in MPC solvers. This method adapts high-performance computing techniques to the needs of embedded MPC. In particular...

Air-Lubricated Thermal Processor For Dry Silver Film

Science.gov (United States)

Siryj, B. W.

1980-09-01

Since dry silver film is processed by heat, it may be viewed on a light table only seconds after exposure. On the other hand, wet films require both bulky chemicals and substantial time before an image can be analyzed. Processing of dry silver film, although simple in concept, is not so simple when reduced to practice. The main concern is the effect of film temperature gradients on uniformity of optical film density. RCA has developed two thermal processors, different in implementation but based on the same philosophy. Pressurized air is directed to both sides of the film to support the film and to conduct the heat to the film. Porous graphite is used as the medium through which heat and air are introduced. The initial thermal processor was designed to process 9.5-inch-wide film moving at speeds ranging from 0.0034 to 0.008 inch per second. The processor configuration was curved to match the plane generated by the laser recording beam. The second thermal processor was configured to process 5-inch-wide film moving at a continuously variable rate ranging from 0.15 to 3.5 inches per second. Due to field flattening optics used in this laser recorder, the required film processing area was plane. In addition, this processor was sectioned in the direction of film motion, giving the processor the capability of varying both temperature and effective processing area.

Logistic Fuel Processor Development

National Research Council Canada - National Science Library

Salavani, Reza

2004-01-01

The Air Base Technologies Division of the Air Force Research Laboratory has developed a logistic fuel processor that removes the sulfur content of the fuel and in the process converts logistic fuel...

Real time monitoring of electron processors

International Nuclear Information System (INIS)

Nablo, S.V.; Kneeland, D.R.; McLaughlin, W.L.

1995-01-01

A real time radiation monitor (RTRM) has been developed for monitoring the dose rate (current density) of electron beam processors. The system provides continuous monitoring of processor output, electron beam uniformity, and an independent measure of operating voltage or electron energy. In view of the device's ability to replace labor-intensive dosimetry in verification of machine performance on a real-time basis, its application to providing archival performance data for in-line processing is discussed. (author)

Surface-Enhanced Separation of Water from Hydrocarbons: Potential Dewatering Membranes for the Catalytic Fast Pyrolysis of Pine Biomass

Energy Technology Data Exchange (ETDEWEB)

Engtrakul, Chaiwat; Hu, Michael Z.; Bischoff, Brian L.; Jang, Gyoung G.

2016-10-20

The impact of surface-selective coatings on water permeation through a membrane when exposed to catalytic fast pyrolysis (CFP) vapor products was studied by tailoring the surface properties of the membrane coating from superhydrophilic to superhydrophobic. Our approach used high-performance architectured surface-selective (HiPAS) membranes that were inserted after a CFP reactor. At this insertion point, the inner wall surface of a tubular membrane was exposed to a mixture of water and upgraded product vapors, including light gases and deoxygenated hydrocarbons. Under proper membrane operating conditions, a high selectivity for water over one-ring upgraded biomass pyrolysis hydrocarbons was observed as a result of a surface-enhanced capillary condensation process. Owing to this surface-enhanced effect, HiPAS membranes have the potential to enable high flux separations, suggesting that water can be selectively removed from the CFP product vapors.

Fast track trigger processor for the OPAL detector at LEP

Energy Technology Data Exchange (ETDEWEB)

Carter, A A; Carter, J R; Ward, D R; Heuer, R D; Jaroslawski, S; Wagner, A

1986-09-20

A fast hardware track trigger processor being built for the OPAL experiment is described. The processor will analyse data from the central drift chambers of OPAL to determine whether any tracks come from the interaction region, and thereby eliminate background events. The processor will find tracks over a large angular range, vertical strokecos thetavertical stroke < or approx. 0.95. The design of the processor is described, together with a brief account of its hardware implementation for OPAL. The results of feasibility studies are also presented.

Multi-processor data acquisition and monitoring systems for particle physics

International Nuclear Information System (INIS)

White, V.; Burch, B.; Eng, K.; Heinicke, P.; Pyatetsky, M.; Ritchie, D.

1983-01-01

A high speed distributed processing system, using PDP-11 and VAX processors, is being developed at Fermilab. The acquisition of data is done using one or more PDP-11s. Additional processors are connected to provide either data logging or extra data analysis capabilities. Within this framework, functional interchangeability of PDP-11 and VAX processors and of the PDP-11 operating systems, RT-11 and RSX-11M, has been maintained. Inter-processor connections have been implemented in a general way using the 5 megabit DR11-W hardware currently selected for the purpose. Using this approach the authors have been able to make use of several existing data acquisition and analysis packages, such as RT/MULTI, in a multi-processor system

Rapid prototyping and evaluation of programmable SIMD SDR processors in LISA

Science.gov (United States)

Chen, Ting; Liu, Hengzhu; Zhang, Botao; Liu, Dongpei

2013-03-01

With the development of international wireless communication standards, there is an increase in computational requirement for baseband signal processors. Time-to-market pressure makes it impossible to completely redesign new processors for the evolving standards. Due to its high flexibility and low power, software defined radio (SDR) digital signal processors have been proposed as promising technology to replace traditional ASIC and FPGA fashions. In addition, there are large numbers of parallel data processed in computation-intensive functions, which fosters the development of single instruction multiple data (SIMD) architecture in SDR platform. So a new way must be found to prototype the SDR processors efficiently. In this paper we present a bit-and-cycle accurate model of programmable SIMD SDR processors in a machine description language LISA. LISA is a language for instruction set architecture which can gain rapid model at architectural level. In order to evaluate the availability of our proposed processor, three common baseband functions, FFT, FIR digital filter and matrix multiplication have been mapped on the SDR platform. Analytical results showed that the SDR processor achieved the maximum of 47.1% performance boost relative to the opponent processor.

Optical backplane interconnect switch for data processors and computers

Science.gov (United States)

Hendricks, Herbert D.; Benz, Harry F.; Hammer, Jacob M.

1989-01-01

An optoelectronic integrated device design is reported which can be used to implement an all-optical backplane interconnect switch. The switch is sized to accommodate an array of processors and memories suitable for direct replacement into the basic avionic multiprocessor backplane. The optical backplane interconnect switch is also suitable for direct replacement of the PI bus traffic switch and at the same time, suitable for supporting pipelining of the processor and memory. The 32 bidirectional switchable interconnects are configured with broadcast capability for controls, reconfiguration, and messages. The approach described here can handle a serial interconnection of data processors or a line-to-link interconnection of data processors. An optical fiber demonstration of this approach is presented.

Accelerating molecular dynamic simulation on the cell processor and Playstation 3.

Science.gov (United States)

Luttmann, Edgar; Ensign, Daniel L; Vaidyanathan, Vishal; Houston, Mike; Rimon, Noam; Øland, Jeppe; Jayachandran, Guha; Friedrichs, Mark; Pande, Vijay S

2009-01-30

Implementation of molecular dynamics (MD) calculations on novel architectures will vastly increase its power to calculate the physical properties of complex systems. Herein, we detail algorithmic advances developed to accelerate MD simulations on the Cell processor, a commodity processor found in PlayStation 3 (PS3). In particular, we discuss issues regarding memory access versus computation and the types of calculations which are best suited for streaming processors such as the Cell, focusing on implicit solvation models. We conclude with a comparison of improved performance on the PS3's Cell processor over more traditional processors. (c) 2008 Wiley Periodicals, Inc.

Fast digital processor for event selection according to particle number difference

International Nuclear Information System (INIS)

Basiladze, S.G.; Gus'kov, B.N.; Li Van Sun; Maksimov, A.N.; Parfenov, A.N.

1978-01-01

A fast digital processor for a magnetic spectrometer is described. It is used in experimental searches for charmed particles. The basic purpose of the processor is discriminating events in the difference of numbers of particles passing through two proportional chambers (PC). The processor consists of three units for detecting signals with PC, and a binary coder. The number of inputs of the processor is 32 for the first PC and 64 for the second. The difference in the number of particles discriminated is from 0 to 8. The resolution time is 180 ns. The processor is built in the CAMAC standard

Logistic Fuel Processor Development

National Research Council Canada - National Science Library

Salavani, Reza

2004-01-01

... to light gases then steam reform the light gases into hydrogen rich stream. This report documents the efforts in developing a fuel processor capable of providing hydrogen to a 3kW fuel cell stack...

A non-acid-assisted and non-hydroxyl-radical-related catalytic ozonation with ceria supported copper oxide in efficient oxalate degradation in water

KAUST Repository

Zhang, Tao; Li, Weiwei; Croue, Jean-Philippe

2012-01-01

with ozone. The optimum CuO loading amount was 12%. The molar ratio of oxalate removed/ozone consumption reached 0.84. The catalytic ozonation was most effective in a neutral pH range (6.7-7.9) and became ineffective when the water solution was acidic

APRON: A Cellular Processor Array Simulation and Hardware Design Tool

Science.gov (United States)

Barr, David R. W.; Dudek, Piotr

2009-12-01

We present a software environment for the efficient simulation of cellular processor arrays (CPAs). This software (APRON) is used to explore algorithms that are designed for massively parallel fine-grained processor arrays, topographic multilayer neural networks, vision chips with SIMD processor arrays, and related architectures. The software uses a highly optimised core combined with a flexible compiler to provide the user with tools for the design of new processor array hardware architectures and the emulation of existing devices. We present performance benchmarks for the software processor array implemented on standard commodity microprocessors. APRON can be configured to use additional processing hardware if necessary and can be used as a complete graphical user interface and development environment for new or existing CPA systems, allowing more users to develop algorithms for CPA systems.

APRON: A Cellular Processor Array Simulation and Hardware Design Tool

Directory of Open Access Journals (Sweden)

David R. W. Barr

2009-01-01

Full Text Available We present a software environment for the efficient simulation of cellular processor arrays (CPAs. This software (APRON is used to explore algorithms that are designed for massively parallel fine-grained processor arrays, topographic multilayer neural networks, vision chips with SIMD processor arrays, and related architectures. The software uses a highly optimised core combined with a flexible compiler to provide the user with tools for the design of new processor array hardware architectures and the emulation of existing devices. We present performance benchmarks for the software processor array implemented on standard commodity microprocessors. APRON can be configured to use additional processing hardware if necessary and can be used as a complete graphical user interface and development environment for new or existing CPA systems, allowing more users to develop algorithms for CPA systems.

New system applying image processor to automatically separate cation exchange resin and anion exchange resin for condensate demineralizer

International Nuclear Information System (INIS)

Adachi, Tsuneyasu; Nagao, Nobuaki; Yoshimori, Yasuhide; Inoue, Takashi; Yoda, Shuji

2014-01-01

In PWR plant, condensate demineralizer is equipped to remove corrosive ion in condensate water. Mixed bed packing cation exchange resin (CER) and anion exchange resin (AER) is generally applied, and these are regenerated after separation to each layer periodically. Since the AER particle is slightly lighter than the CER particle, the AER layer is brought up onto the CER layer by feeding water upward from the bottom of column (backwashing). The separation performance is affected by flow rate and temperature of water for backwashing, so normally operators set the proper condition parameters regarding separation manually every time for regeneration. The authors have developed the new separation system applying CCD camera and image processor. The system is comprised of CCD camera, LED lamp, image processor, controller, flow control valves and background color panel. Blue color of the panel, which is corresponding to the complementary color against both ivory color of AER and brown color of CER, is key to secure the system precision. At first the color image of the CER via the CCD camera is digitized and memorized by the image processor. The color of CER in the field of vision of the camera is scanned by the image processor, and the position where the maximum difference of digitized color index is indicated is judged as the interface. The detected interface is able to make the accordance with the set point by adjusting the flow rate of backwashing. By adopting the blue background panel, it is also possible to draw the AER out of the column since detecting the interface of the CER clearly. The system has provided the reduction of instability factor concerning separation of resin during regeneration process. The system has been adopted in two PWR plants in Japan, it has been demonstrating its stable and precise performance. (author)

Control structures for high speed processors

Science.gov (United States)

Maki, G. K.; Mankin, R.; Owsley, P. A.; Kim, G. M.

1982-01-01

A special processor was designed to function as a Reed Solomon decoder with throughput data rate in the Mhz range. This data rate is significantly greater than is possible with conventional digital architectures. To achieve this rate, the processor design includes sequential, pipelined, distributed, and parallel processing. The processor was designed using a high level language register transfer language. The RTL can be used to describe how the different processes are implemented by the hardware. One problem of special interest was the development of dependent processes which are analogous to software subroutines. For greater flexibility, the RTL control structure was implemented in ROM. The special purpose hardware required approximately 1000 SSI and MSI components. The data rate throughput is 2.5 megabits/second. This data rate is achieved through the use of pipelined and distributed processing. This data rate can be compared with 800 kilobits/second in a recently proposed very large scale integration design of a Reed Solomon encoder.

OFFSCALE: A PC input processor for the SCALE code system. The ORIGNATE processor for ORIGEN-S

International Nuclear Information System (INIS)

Bowman, S.M.

1994-11-01

OFFSCALE is a suite of personal computer input processor programs developed at Oak Ridge National Laboratory to provide an easy-to-use interface for modules in the SCALE-4 code system. ORIGNATE is a program in the OFFSCALE suite that serves as a user-friendly interface for the ORIGEN-S isotopic generation and depletion code. It is designed to assist an ORIGEN-S user in preparing an input file for execution of light-water-reactor (LWR) fuel depletion and decay cases. ORIGNATE generates an input file that may be used to execute ORIGEN-S in SCALE-4. ORIGNATE features a pulldown menu system that accesses sophisticated data entry screens. The program allows the user to quickly set up an ORIGEN-S input file and perform error checking. This capability increases productivity and decreases the chance of user error

Accuracy requirements of optical linear algebra processors in adaptive optics imaging systems

Science.gov (United States)

Downie, John D.; Goodman, Joseph W.

1989-10-01

The accuracy requirements of optical processors in adaptive optics systems are determined by estimating the required accuracy in a general optical linear algebra processor (OLAP) that results in a smaller average residual aberration than that achieved with a conventional electronic digital processor with some specific computation speed. Special attention is given to an error analysis of a general OLAP with regard to the residual aberration that is created in an adaptive mirror system by the inaccuracies of the processor, and to the effect of computational speed of an electronic processor on the correction. Results are presented on the ability of an OLAP to compete with a digital processor in various situations.

Application of a novel biological nanofluid in a liquid block heat sink for cooling of an electronic processor: Thermal performance and irreversibility considerations

International Nuclear Information System (INIS)

Bahiraei, Mehdi; Heshmatian, Saeed

2017-01-01

Highlights: • Cooling of an electronic processor is performed by means of a biological nanofluid. • Heat transfer coefficient rises by raising either Reynolds number or concentration. • By increasing Reynolds number and concentration, temperature becomes more uniform. • Surface temperature reduces by augmenting either Reynolds number or concentration. • Irreversibility in heat sink reduces by raising concentration and Reynolds number. - Abstract: Hydrothermal characteristics and entropy generation of a biological nanofluid containing silver nanoparticles are evaluated in a liquid block heat sink for cooling of an electronic processor. The liquid block under study has 20 channels, and its bottom surface is placed on the processor. Nanoparticles synthesized through plant extract technique from green tea leaves are employed. The degree of improvement in cooling, pumping power, thermal performance and irreversibilities are examined for case of using the nanofluid instead of water. By increasing Reynolds number and particle concentration, temperature distribution becomes more uniform in processor surface and heat transfer coefficient also increases. Furthermore, the surface temperature decreases with increasing concentration and Reynolds number, such that it reduces by 2.21 °C in case of using the nanofluid with concentration of 1% instead of water at Reynolds number of 500. Moreover, maximum temperature of the processor surface decreases by increasing Reynolds number and concentration and therefore, the possibility of hot spot formation diminishes. Results show that at a constant work consumption, the nanofluid also presents better cooling compared to water. Entropy generation analysis reveals that irreversibility in the whole liquid block decreases with increasing either concentration or Reynolds number, which is a positive result based on second law of thermodynamics.

High performance graphics processors for medical imaging applications

International Nuclear Information System (INIS)

Goldwasser, S.M.; Reynolds, R.A.; Talton, D.A.; Walsh, E.S.

1989-01-01

This paper describes a family of high- performance graphics processors with special hardware for interactive visualization of 3D human anatomy. The basic architecture expands to multiple parallel processors, each processor using pipelined arithmetic and logical units for high-speed rendering of Computed Tomography (CT), Magnetic Resonance (MR) and Positron Emission Tomography (PET) data. User-selectable display alternatives include multiple 2D axial slices, reformatted images in sagittal or coronal planes and shaded 3D views. Special facilities support applications requiring color-coded display of multiple datasets (such as radiation therapy planning), or dynamic replay of time- varying volumetric data (such as cine-CT or gated MR studies of the beating heart). The current implementation is a single processor system which generates reformatted images in true real time (30 frames per second), and shaded 3D views in a few seconds per frame. It accepts full scale medical datasets in their native formats, so that minimal preprocessing delay exists between data acquisition and display

Evaluation of the Intel Westmere-EP server processor

CERN Document Server

Jarp, S; Leduc, J; Nowak, A; CERN. Geneva. IT Department

2010-01-01

In this paper we report on a set of benchmark results recently obtained by CERN openlab when comparing the 6-core “Westmere-EP” processor with Intel’s previous generation of the same microarchitecture, the “Nehalem-EP”. The former is produced in a new 32nm process, the latter in 45nm. Both platforms are dual-socket servers. Multiple benchmarks were used to get a good understanding of the performance of the new processor. We used both industry-standard benchmarks, such as SPEC2006, and specific High Energy Physics benchmarks, representing both simulation of physics detectors and data analysis of physics events. Before summarizing the results we must stress the fact that benchmarking of modern processors is a very complex affair. One has to control (at least) the following features: processor frequency, overclocking via Turbo mode, the number of physical cores in use, the use of logical cores via Simultaneous Multi-Threading (SMT), the cache sizes available, the memory configuration installed, as well...

Keystone Business Models for Network Security Processors

OpenAIRE

Arthur Low; Steven Muegge

2013-01-01

Network security processors are critical components of high-performance systems built for cybersecurity. Development of a network security processor requires multi-domain experience in semiconductors and complex software security applications, and multiple iterations of both software and hardware implementations. Limited by the business models in use today, such an arduous task can be undertaken only by large incumbent companies and government organizations. Neither the “fabless semiconductor...

Development of level 2 processor for the readout of TMC

International Nuclear Information System (INIS)

Arai, Y.; Ikeno, M.; Murata, T.; Sudo, F.; Emura, T.

1995-01-01

We have developed a prototype 8-bit processor for the level 2 data processing for the Time Memory Cell (TMC). The first prototype processor successfully runs with 18 MHz clock. The operation of same clock frequency as TMC (30 MHz) will be easily achieved with simple modifications. Although the processor is very primitive one but shows its powerful performance and flexibility. To realize the compact TMC/L2P (Level 2 Processor) system, it is better to include the microcode memory within the chip. Encoding logic of the microcode must be included to reduce the microcode memory in this case. (J.P.N.)

Review of trigger and on-line processors at SLAC

International Nuclear Information System (INIS)

Lankford, A.J.

1984-07-01

The role of trigger and on-line processors in reducing data rates to manageable proportions in e + e - physics experiments is defined not by high physics or background rates, but by the large event sizes of the general-purpose detectors employed. The rate of e + e - annihilation is low, and backgrounds are not high; yet the number of physics processes which can be studied is vast and varied. This paper begins by briefly describing the role of trigger processors in the e + e - context. The usual flow of the trigger decision process is illustrated with selected examples of SLAC trigger processing. The features are mentioned of triggering at the SLC and the trigger processing plans of the two SLC detectors: The Mark II and the SLD. The most common on-line processors at SLAC, the BADC, the SLAC Scanner Processor, the SLAC FASTBUS Controller, and the VAX CAMAC Channel, are discussed. Uses of the 168/E, 3081/E, and FASTBUS VAX processors are mentioned. The manner in which these processors are interfaced and the function they serve on line is described. Finally, the accelerator control system for the SLC is outlined. This paper is a survey in nature, and hence, relies heavily upon references to previous publications for detailed description of work mentioned here. 27 references, 9 figures, 1 table

Integration of In-Flight and Post-Flight Water Monitoring Resources in Addressing the U.S. Water Processor Assembly Total Organic Carbon (TOC) Anomaly

Science.gov (United States)

Straub, John E., II; McCly, J. Torin

2011-01-01

Beginning in June of 2010, the total organic carbon (TOC) concentration in the U.S. Water Processor Assembly (WPA) product water started to increase. A surprisingly consistent upward TOC trend was observed through weekly ISS total organic carbon analyzer (TOCA) monitoring. As TOC is a general organic compound indicator, return of water archive samples was needed to make better-informed crew health decisions on the specific compounds of concern and to aid in WPA troubleshooting. TOCA-measured TOC was more than halfway to the health-based screening limit of 3,000 g/L before archive samples were returned. Archive samples were returned on 22 Soyuz in September 2010 and on ULF5 in November of 2010. The samples were subjected to extensive analysis. Although TOC was confirmed to be elevated, somewhat surprisingly, none of the typical target compounds were detected at high levels. After some solid detective work, it was confirmed that the TOC was associated with a compound known as dimethylsilanediol (DMSD). DMSD is believed to be a breakdown product of siloxanes which are thought to be ubiquitous in the ISS atmosphere. A toxicological limit was set for DMSD and a forward plan was developed for conducting operations in the context of understanding the composition of the TOC measured in flight. This required careful consideration of existing ISS flight rules, coordination with ISS stakeholders, and development of a novel approach for the blending of inflight TOCA data with archive results to protect crew health. Among other challenges, team members had to determine how to utilize TOCA readings when making decisions about crew consumption of WPA water. This involved balancing very real concerns associated with the assumption that TOC would continue to be comprised of only DMSD. Demonstrated teamwork, multidisciplinary awareness, and innovative problem-solving were required to respond effectively to this anomaly.

FY1995 study of design methodology and environment of high-performance processor architectures; 1995 nendo koseino processor architecture sekkeiho to sekkei kankyo no kenkyu

Energy Technology Data Exchange (ETDEWEB)

NONE

1997-03-01

The aim of our project is to develop high-performance processor architectures for both general purpose and application-specific purpose. We also plan to develop basic softwares, such as compliers, and various design aid tools for those architectures. We are particularly interested in performance evaluation at architecture design phase, design optimization, automatic generation of compliers from processor designs, and architecture design methodologies combined with circuit layout. We have investigated both microprocessor architectures and design methodologies / environments for the processors. Our goal is to establish design technologies for high-performance, low-power, low-cost and highly-reliable systems in system-on-silicon era. We have proposed PPRAM architecture for high-performance system using DRAM and logic mixture technology, Softcore processor architecture for special purpose processors in embedded systems, and Power-Pro architecture for low power systems. We also developed design methodologies and design environments for the above architectures as well as a new method for design verification of microprocessors. (NEDO)

Software-defined reconfigurable microwave photonics processor.

Science.gov (United States)

Pérez, Daniel; Gasulla, Ivana; Capmany, José

2015-06-01

We propose, for the first time to our knowledge, a software-defined reconfigurable microwave photonics signal processor architecture that can be integrated on a chip and is capable of performing all the main functionalities by suitable programming of its control signals. The basic configuration is presented and a thorough end-to-end design model derived that accounts for the performance of the overall processor taking into consideration the impact and interdependencies of both its photonic and RF parts. We demonstrate the model versatility by applying it to several relevant application examples.

Corrigendum to Photo catalytic Oxidation of Trichloroethylene in Water Using a Porous Ball of Nano-Zn O and Nano clay Composite

International Nuclear Information System (INIS)

Bak, S. A.; Song, M. S.; Nam, I.T.; Lee, W.G.

2015-01-01

In the published paper entitled Photo catalytic Oxidation of Trichloroethylene in Water Using a Porous Ball of Nano-Zn O and Nano clay Composite [1], we mistakenly used Laponite in our paper. The corrected name is Laponite (BYK Corporations products). So we are making some changes from Laponite to Laponite (BYK Corporations products) in our paper.

Designing a dataflow processor using CλaSH

NARCIS (Netherlands)

Niedermeier, A.; Wester, Rinse; Wester, Rinse; Rovers, K.C.; Baaij, C.P.R.; Kuper, Jan; Smit, Gerardus Johannes Maria

2010-01-01

In this paper we show how a simple dataflow processor can be fully implemented using CλaSH, a high level HDL based on the functional programming language Haskell. The processor was described using Haskell, the CλaSH compiler was then used to translate the design into a fully synthesisable VHDL code.

Researching, building a soft-processor and Ethernet interface circuit using EDK

International Nuclear Information System (INIS)

Tuong Thi Thu Huong; Pham Ngoc Tuan; Truong Van Dat, Dang Lanh; Chau Thi Nhu Quynh

2014-01-01

The processor is an indispensable component in the measurement and automatic control systems. This report describes the fabrication of a soft-processor (32-bits, on-chip block RAM 64K, 50M clock, internal and peripheral bus) for receiving, sending and processing of data Ethernet packets. This processor is fabricated using the XPS component from EDK (Xilinx) software toolkit. After that, it is configured on the FPGA named Spartan XC3S500E circuit. A firmware of a processor for controlling the interface between processor and Ethernet port is written in C language and can play a role of a HOST (station) which has its own IP to connect to Ethernet network. Besides, there are some needed parts as follows: an Ethernet interfacing controller chip, a suitable cable providing a speed up to 100 Mbs and an application program running under Window XP environment written in LabView to communicate with soft-processor. (author)

A high-accuracy optical linear algebra processor for finite element applications

Science.gov (United States)

Casasent, D.; Taylor, B. K.

1984-01-01

Optical linear processors are computationally efficient computers for solving matrix-matrix and matrix-vector oriented problems. Optical system errors limit their dynamic range to 30-40 dB, which limits their accuray to 9-12 bits. Large problems, such as the finite element problem in structural mechanics (with tens or hundreds of thousands of variables) which can exploit the speed of optical processors, require the 32 bit accuracy obtainable from digital machines. To obtain this required 32 bit accuracy with an optical processor, the data can be digitally encoded, thereby reducing the dynamic range requirements of the optical system (i.e., decreasing the effect of optical errors on the data) while providing increased accuracy. This report describes a new digitally encoded optical linear algebra processor architecture for solving finite element and banded matrix-vector problems. A linear static plate bending case study is described which quantities the processor requirements. Multiplication by digital convolution is explained, and the digitally encoded optical processor architecture is advanced.

Low voltage 80 KV to 125 KV electron processors

International Nuclear Information System (INIS)

Lauppi, U.V.

1999-01-01

The classic electron beam technology made use of accelerating energies in the voltage range of 300 to 800 kV. The first EB processors - built for the curing of coatings - operated at 300 kV. The products to be treated were thicker than a simple layer of coating with thicknesses up to 100g and more. It was only in the beginning of the 1970's that industrial EB processors with accelerating voltages below 300 kV appeared on the market. Our company developed the first commercial electron accelerator without a beam scanner. The new EB machine featured a linear cathode, emitting a shower or 'curtain' of electrons over the full width of the product. These units were much smaller than anv previous EB processors and dedicated to the curing of coatings and other thin layers. ESI's first EB units operated with accelerating voltages between 150 and 200 kV. In 1993 ESI announced the introduction of a new generation of Electrocure. EB processors operating at 120 kV, and in 1998, at the RadTech North America '98 Conference in Chicago, the introduction of an 80 kV electron beam processor under the designation Microbeam LV

A fast track trigger processor for the OPAL detector at LEP

International Nuclear Information System (INIS)

Carter, A.A.; Jaroslawski, S.; Wagner, A.

1986-01-01

A fast hardware track trigger processor being built for the OPAL experiment is described. The processor will analyse data from the central drift chambers of OPAL to determine whether any tracks come from the interaction region, and thereby eliminate background events. The processor will find tracks over a large angular range, vertical strokecos thetavertical stroke < or approx. 0.95. The design of the processor is described, together with a brief account of its hardware implementation for OPAL. The results of feasibility studies are also presented. (orig.)

Launching applications on compute and service processors running under different operating systems in scalable network of processor boards with routers

Science.gov (United States)

Tomkins, James L [Albuquerque, NM; Camp, William J [Albuquerque, NM

2009-03-17

A multiple processor computing apparatus includes a physical interconnect structure that is flexibly configurable to support selective segregation of classified and unclassified users. The physical interconnect structure also permits easy physical scalability of the computing apparatus. The computing apparatus can include an emulator which permits applications from the same job to be launched on processors that use different operating systems.

CATALYTIC SPECTROPHOTOMETRIC DETERMINATION OF Mn(II ...

African Journals Online (AJOL)

Preferred Customer

method is based on the catalytic effect of Mn(II) with the oxidation of Celestine blue .... water samples were filtered through a 0.45 μm pore size membrane filter to remove suspended .... slope of the calibration graph as the optimization criterion. ..... In presence of Phen as stability enhancement agent in indicator system. ( ) +.

Satellite on-board real-time SAR processor prototype

Science.gov (United States)

Bergeron, Alain; Doucet, Michel; Harnisch, Bernd; Suess, Martin; Marchese, Linda; Bourqui, Pascal; Desnoyers, Nicholas; Legros, Mathieu; Guillot, Ludovic; Mercier, Luc; Châteauneuf, François

2017-11-01

A Compact Real-Time Optronic SAR Processor has been successfully developed and tested up to a Technology Readiness Level of 4 (TRL4), the breadboard validation in a laboratory environment. SAR, or Synthetic Aperture Radar, is an active system allowing day and night imaging independent of the cloud coverage of the planet. The SAR raw data is a set of complex data for range and azimuth, which cannot be compressed. Specifically, for planetary missions and unmanned aerial vehicle (UAV) systems with limited communication data rates this is a clear disadvantage. SAR images are typically processed electronically applying dedicated Fourier transformations. This, however, can also be performed optically in real-time. Originally the first SAR images were optically processed. The optical Fourier processor architecture provides inherent parallel computing capabilities allowing real-time SAR data processing and thus the ability for compression and strongly reduced communication bandwidth requirements for the satellite. SAR signal return data are in general complex data. Both amplitude and phase must be combined optically in the SAR processor for each range and azimuth pixel. Amplitude and phase are generated by dedicated spatial light modulators and superimposed by an optical relay set-up. The spatial light modulators display the full complex raw data information over a two-dimensional format, one for the azimuth and one for the range. Since the entire signal history is displayed at once, the processor operates in parallel yielding real-time performances, i.e. without resulting bottleneck. Processing of both azimuth and range information is performed in a single pass. This paper focuses on the onboard capabilities of the compact optical SAR processor prototype that allows in-orbit processing of SAR images. Examples of processed ENVISAT ASAR images are presented. Various SAR processor parameters such as processing capabilities, image quality (point target analysis), weight and

Particle simulation on a distributed memory highly parallel processor

International Nuclear Information System (INIS)

Sato, Hiroyuki; Ikesaka, Morio

1990-01-01

This paper describes parallel molecular dynamics simulation of atoms governed by local force interaction. The space in the model is divided into cubic subspaces and mapped to the processor array of the CAP-256, a distributed memory, highly parallel processor developed at Fujitsu Labs. We developed a new technique to avoid redundant calculation of forces between atoms in different processors. Experiments showed the communication overhead was less than 5%, and the idle time due to load imbalance was less than 11% for two model problems which contain 11,532 and 46,128 argon atoms. From the software simulation, the CAP-II which is under development is estimated to be about 45 times faster than CAP-256 and will be able to run the same problem about 40 times faster than Fujitsu's M-380 mainframe when 256 processors are used. (author)

Code compression for VLIW embedded processors

Science.gov (United States)

Piccinelli, Emiliano; Sannino, Roberto

2004-04-01

The implementation of processors for embedded systems implies various issues: main constraints are cost, power dissipation and die area. On the other side, new terminals perform functions that require more computational flexibility and effort. Long code streams must be loaded into memories, which are expensive and power consuming, to run on DSPs or CPUs. To overcome this issue, the "SlimCode" proprietary algorithm presented in this paper (patent pending technology) can reduce the dimensions of the program memory. It can run offline and work directly on the binary code the compiler generates, by compressing it and creating a new binary file, about 40% smaller than the original one, to be loaded into the program memory of the processor. The decompression unit will be a small ASIC, placed between the Memory Controller and the System bus of the processor, keeping unchanged the internal CPU architecture: this implies that the methodology is completely transparent to the core. We present comparisons versus the state-of-the-art IBM Codepack algorithm, along with its architectural implementation into the ST200 VLIW family core.

Recursive Matrix Inverse Update On An Optical Processor

Science.gov (United States)

Casasent, David P.; Baranoski, Edward J.

1988-02-01

A high accuracy optical linear algebraic processor (OLAP) using the digital multiplication by analog convolution (DMAC) algorithm is described for use in an efficient matrix inverse update algorithm with speed and accuracy advantages. The solution of the parameters in the algorithm are addressed and the advantages of optical over digital linear algebraic processors are advanced.

Catalytic activity of some oxime-based Pd(II-complexes in Suzuki coupling of aryl and heteroaryl bromides in water

Directory of Open Access Journals (Sweden)

Kamal M. Dawood

2017-05-01

Full Text Available The catalytic activity of four Pd(II-complexes of benzoazole-oximes was extensively studied in Suzuki–Miyaura C–C cross coupling reactions in water, as an eco-friendly green solvent, under both thermal heating as well as microwave irradiation conditions. The cross-coupling reactions included different activated and deactivated aryl- or heteroaryl-bromides with several arylboronic acids. The protected oxime-complexes were found to be more efficient than the free ones.

Evaluation of the Intel Nehalem-EX server processor

CERN Document Server

Jarp, S; Leduc, J; Nowak, A; CERN. Geneva. IT Department

2010-01-01

In this paper we report on a set of benchmark results recently obtained by the CERN openlab by comparing the 4-socket, 32-core Intel Xeon X7560 server with the previous generation 4-socket server, based on the Xeon X7460 processor. The Xeon X7560 processor represents a major change in many respects, especially the memory sub-system, so it was important to make multiple comparisons. In most benchmarks the two 4-socket servers were compared. It should be underlined that both servers represent the “top of the line” in terms of frequency. However, in some cases, it was important to compare systems that integrated the latest processor features, such as QPI links, Symmetric multithreading and over-clocking via Turbo mode, and in such situations the X7560 server was compared to a dual socket L5520 based system with an identical frequency of 2.26 GHz. Before summarizing the results we must stress the fact that benchmarking of modern processors is a very complex affair. One has to control (at least) the following ...

Graphical user interface for TOUGH/TOUGH2 - development of database, pre-processor, and post-processor

Energy Technology Data Exchange (ETDEWEB)

Sato, Tatsuya; Okabe, Takashi; Osato, Kazumi [Geothermal Energy Research and Development Co., Ltd., Tokyo (Japan)

1995-03-01

One of the advantages of the TOUGH/TOUGH2 (Pruess, 1987 and 1991) is the modeling using {open_quotes}free shape{close_quotes} polygonal blocks. However, the treatment of three-dimensional information, particularly for TOUGH/TOUGH2 is not easy because of the {open_quotes}free shape{close_quotes} polygonal blocks. Therefore, we have developed a database named {open_quotes}GEOBASE{close_quotes} and a pre/post-processor named {open_quotes}GEOGRAPH{close_quotes} for TOUGH/TOUGH2 on engineering work station (EWS). {open_quotes}GEOGRAPH{close_quotes} is based on the ORACLE{sup *1} relational database manager system to access data sets of surface exploration (geology, geophysics, geochemistry, etc.), drilling (well trajectory, geological column, logging, etc.), well testing (production test, injection test, interference test, tracer test, etc.) and production/injection history.{open_quotes}GEOGRAPH{close_quotes} consists of {open_quotes}Pre-processor{close_quotes} that can construct the three-dimensional free shape reservoir modeling by mouse operation on X-window and {open_quotes}Post-processor{close_quotes} that can display several kinds of two/three-dimensional maps and X-Y plots to compile data on {open_quotes}GEOBASE{close_quotes} and result of TOUGH/TOUGH2 calculation. This paper shows concept of the systems and examples of utilization.

Effect of NO2 and water on the catalytic oxidation of soot

DEFF Research Database (Denmark)

Christensen, Jakob Munkholt; Grunwaldt, Jan-Dierk; Jensen, Anker Degn

2017-01-01

The influence of adding NO2 to 10 vol% O2/N2 on non-catalytic soot oxidation and soot oxidation in intimate or loose contact with a catalyst has been investigated. In non-catalytic soot oxidation the oxidation rate is increased significantly at lower temperatures by NO2. For soot oxidation in tig...... exhibited a volcano-curve dependence on the heat of oxygen chemisorption, and among the tested pure metals and oxides Cr2O3 was the most active catalyst. Further improvements were achieved with a FeaCrbOx binary oxide catalyst....

Engineered biochar from microwave-assisted catalytic pyrolysis of switchgrass for increasing water-holding capacity and fertility of sandy soil

International Nuclear Information System (INIS)

Mohamed, Badr A.; Ellis, Naoko; Kim, Chang Soo; Bi, Xiaotao; Emam, Ahmed El-raie

2016-01-01

Engineered biochars produced from microwave-assisted catalytic pyrolysis of switchgrass have been evaluated in terms of their ability on improving water holding capacity (WHC), cation exchange capacity (CEC) and fertility of loamy sand soil. The addition of K 3 PO 4 , clinoptilolite and/or bentonite as catalysts during the pyrolysis process increased biochar surface area and plant nutrient contents. Adding biochar produced with 10 wt.% K 3 PO 4 + 10 wt.% clinoptilolite as catalysts to the soil at 2 wt% load increased soil WHC by 98% and 57% compared to the treatments without biochar (control) and with 10 wt.% clinoptilolite, respectively. Synergistic effects on increased soil WHC were manifested for biochars produced from combinations of two additives compared to single additive, which may be the result of increased biochar microporosity due to increased microwave heating rate. Biochar produced from microwave catalytic pyrolysis was more efficient in increasing the soil WHC due to its high porosity in comparison with the biochar produced from conventional pyrolysis at the same conditions. The increases in soil CEC varied widely compared to the control soil, ranging from 17 to 220% for the treatments with biochars produced with 10 wt% clinoptilolite at 400 °C, and 30 wt% K 3 PO 4 at 300 °C, respectively. Strong positive correlations also exist among soil WHC with CEC and biochar micropore area. Biochar from microwave-assisted catalytic pyrolysis appears to be a novel approach for producing biochar with high sorption affinity and high CEC. These catalysts remaining in the biochar product would provide essential nutrients for the growth of bioenergy and food crops. - Highlights: • High quality biochar was made by catalytic pyrolysis in a microwave reactor. • High heating rate and good biochar quality were achieved using K 3 PO 4 and clinoptilolite mixture. • Biochars showed significant increase in soil WHC and CEC. • Microwave catalytic pyrolysis can produce

Engineered biochar from microwave-assisted catalytic pyrolysis of switchgrass for increasing water-holding capacity and fertility of sandy soil

Energy Technology Data Exchange (ETDEWEB)

Mohamed, Badr A. [Department of Chemical and Biological Engineering, University of British Columbia, Vancouver BC V6T 1Z3 (Canada); Agricultural Engineering Department, Cairo University, Giza (Egypt); Ellis, Naoko [Department of Chemical and Biological Engineering, University of British Columbia, Vancouver BC V6T 1Z3 (Canada); Kim, Chang Soo [Department of Chemical and Biological Engineering, University of British Columbia, Vancouver BC V6T 1Z3 (Canada); Clean Energy Research Center, Korea Institute of Science and Technology, 14 gil 5 Hwarang-no Seongbuk-gu, Seoul 136-791 (Korea, Republic of); Bi, Xiaotao, E-mail: tony.bi@ubc.ca [Department of Chemical and Biological Engineering, University of British Columbia, Vancouver BC V6T 1Z3 (Canada); Emam, Ahmed El-raie [Agricultural Engineering Department, Cairo University, Giza (Egypt)

2016-10-01

Engineered biochars produced from microwave-assisted catalytic pyrolysis of switchgrass have been evaluated in terms of their ability on improving water holding capacity (WHC), cation exchange capacity (CEC) and fertility of loamy sand soil. The addition of K{sub 3}PO{sub 4}, clinoptilolite and/or bentonite as catalysts during the pyrolysis process increased biochar surface area and plant nutrient contents. Adding biochar produced with 10 wt.% K{sub 3}PO{sub 4} + 10 wt.% clinoptilolite as catalysts to the soil at 2 wt% load increased soil WHC by 98% and 57% compared to the treatments without biochar (control) and with 10 wt.% clinoptilolite, respectively. Synergistic effects on increased soil WHC were manifested for biochars produced from combinations of two additives compared to single additive, which may be the result of increased biochar microporosity due to increased microwave heating rate. Biochar produced from microwave catalytic pyrolysis was more efficient in increasing the soil WHC due to its high porosity in comparison with the biochar produced from conventional pyrolysis at the same conditions. The increases in soil CEC varied widely compared to the control soil, ranging from 17 to 220% for the treatments with biochars produced with 10 wt% clinoptilolite at 400 °C, and 30 wt% K{sub 3}PO{sub 4} at 300 °C, respectively. Strong positive correlations also exist among soil WHC with CEC and biochar micropore area. Biochar from microwave-assisted catalytic pyrolysis appears to be a novel approach for producing biochar with high sorption affinity and high CEC. These catalysts remaining in the biochar product would provide essential nutrients for the growth of bioenergy and food crops. - Highlights: • High quality biochar was made by catalytic pyrolysis in a microwave reactor. • High heating rate and good biochar quality were achieved using K{sub 3}PO{sub 4} and clinoptilolite mixture. • Biochars showed significant increase in soil WHC and CEC. �

Biodiesel from waste cooking oil via base-catalytic and supercritical methanol transesterification

International Nuclear Information System (INIS)

Demirbas, Ayhan

2009-01-01

In this study, waste cooking oil has subjected to transesterification reaction by potassium hydroxide (KOH) catalytic and supercritical methanol methods obtaining for biodiesel. In catalyzed methods, the presence of water has negative effects on the yields of methyl esters. In the catalytic transesterification free fatty acids and water always produce negative effects since the presence of free fatty acids and water causes soap formation, consumes catalyst, and reduces catalyst effectiveness. Free fatty acids in the waste cooking oil are transesterified simultaneously in supercritical methanol method. Since waste cooking oil contains water and free fatty acids, supercritical transesterification offers great advantage to eliminate the pre-treatment and operating costs. The effects of methanol/waste cooking oils ratio, potassium hydroxide concentration and temperature on the biodiesel conversion were investigated

Biomass is beginning to threaten the wood-processors

International Nuclear Information System (INIS)

Beer, G.; Sobinkovic, B.

2004-01-01

In this issue an exploitation of biomass in Slovak Republic is analysed. Some new projects of constructing of the stoke-holds for biomass processing are published. The grants for biomass are ascending the prices of wood raw material, which is thus becoming less accessible for the wood-processors. An excessive wood export threatens the domestic processors

Reconfigurable signal processor designs for advanced digital array radar systems

Science.gov (United States)

Suarez, Hernan; Zhang, Yan (Rockee); Yu, Xining

2017-05-01

The new challenges originated from Digital Array Radar (DAR) demands a new generation of reconfigurable backend processor in the system. The new FPGA devices can support much higher speed, more bandwidth and processing capabilities for the need of digital Line Replaceable Unit (LRU). This study focuses on using the latest Altera and Xilinx devices in an adaptive beamforming processor. The field reprogrammable RF devices from Analog Devices are used as analog front end transceivers. Different from other existing Software-Defined Radio transceivers on the market, this processor is designed for distributed adaptive beamforming in a networked environment. The following aspects of the novel radar processor will be presented: (1) A new system-on-chip architecture based on Altera's devices and adaptive processing module, especially for the adaptive beamforming and pulse compression, will be introduced, (2) Successful implementation of generation 2 serial RapidIO data links on FPGA, which supports VITA-49 radio packet format for large distributed DAR processing. (3) Demonstration of the feasibility and capabilities of the processor in a Micro-TCA based, SRIO switching backplane to support multichannel beamforming in real-time. (4) Application of this processor in ongoing radar system development projects, including OU's dual-polarized digital array radar, the planned new cylindrical array radars, and future airborne radars.

Electrochemical catalytic treatment of phenol wastewater

International Nuclear Information System (INIS)

Ma Hongzhu; Zhang Xinhai; Ma Qingliang; Wang Bo

2009-01-01

The slurry bed catalytic treatment of contaminated water appears to be a promising alternative for the oxidation of aqueous organic pollutants. In this paper, the electrochemical oxidation of phenol in synthetic wastewater catalyzed by ferric sulfate and potassium permanganate adsorbed onto active bentonite in slurry bed electrolytic reactor with graphite electrode has been investigated. In order to determine the optimum operating condition, the orthogonal experiments were devised and the results revealed that the system of ferric sulfate, potassium permanganate and active bentonite showed a high catalytic efficiency on the process of electrochemical oxidation phenol in initial pH 5. When the initial concentration of phenol was 0.52 g/L (the initial COD 1214 mg/L), up to 99% chemical oxygen demand (COD) removal was obtained in 40 min. According to the experimental results, a possible mechanism of catalytic degradation of phenol was proposed. Environmental estimation was also done and the results showed that the treated wastewater have little impact on plant growth and could totally be applied to irrigation.

Electrochemical catalytic treatment of phenol wastewater

Energy Technology Data Exchange (ETDEWEB)

Ma Hongzhu, E-mail: hzmachem@snnu.edu.cn [Institute of Energy Chemistry, School of Chemistry and Materials Science, Shaanxi Normal University, Xi' an 710062 (China); Zhang Xinhai [Institute of Energy Chemistry, School of Chemistry and Materials Science, Shaanxi Normal University, Xi' an 710062 (China); Ma Qingliang [Department of Applied Physics, College of Sciences, Taiyuan University of Technology, 030024 Taiyuan (China); Wang Bo [Institute of Energy Chemistry, School of Chemistry and Materials Science, Shaanxi Normal University, Xi' an 710062 (China)

2009-06-15

The slurry bed catalytic treatment of contaminated water appears to be a promising alternative for the oxidation of aqueous organic pollutants. In this paper, the electrochemical oxidation of phenol in synthetic wastewater catalyzed by ferric sulfate and potassium permanganate adsorbed onto active bentonite in slurry bed electrolytic reactor with graphite electrode has been investigated. In order to determine the optimum operating condition, the orthogonal experiments were devised and the results revealed that the system of ferric sulfate, potassium permanganate and active bentonite showed a high catalytic efficiency on the process of electrochemical oxidation phenol in initial pH 5. When the initial concentration of phenol was 0.52 g/L (the initial COD 1214 mg/L), up to 99% chemical oxygen demand (COD) removal was obtained in 40 min. According to the experimental results, a possible mechanism of catalytic degradation of phenol was proposed. Environmental estimation was also done and the results showed that the treated wastewater have little impact on plant growth and could totally be applied to irrigation.

Parallel processor for fast event analysis

International Nuclear Information System (INIS)

Hensley, D.C.

1983-01-01

Current maximum data rates from the Spin Spectrometer of approx. 5000 events/s (up to 1.3 MBytes/s) and minimum analysis requiring at least 3000 operations/event require a CPU cycle time near 70 ns. In order to achieve an effective cycle time of 70 ns, a parallel processing device is proposed where up to 4 independent processors will be implemented in parallel. The individual processors are designed around the Am2910 Microsequencer, the AM29116 μP, and the Am29517 Multiplier. Satellite histogramming in a mass memory system will be managed by a commercial 16-bit μP system

Asymmetrical floating point array processors, their application to exploration and exploitation

Energy Technology Data Exchange (ETDEWEB)

Geriepy, B L

1983-01-01

An asymmetrical floating point array processor is a special-purpose scientific computer which operates under asymmetrical control of a host computer. Although an array processor can receive fixed point input and produce fixed point output, its primary mode of operation is floating point. The first generation of array processors was oriented towards time series information. The next generation of array processors has proved much more versatile and their applicability ranges from petroleum reservoir simulation to speech syntheses. Array processors are becoming commonplace in mining, the primary usage being construction of grids-by usual methods or by kriging. The Australian mining community is among the world's leaders in regard to computer-assisted exploration and exploitation systems. Part of this leadership role must be providing guidance to computer vendors in regard to current and future requirements.

On the effective parallel programming of multi-core processors

NARCIS (Netherlands)

Varbanescu, A.L.

2010-01-01

Multi-core processors are considered now the only feasible alternative to the large single-core processors which have become limited by technological aspects such as power consumption and heat dissipation. However, due to their inherent parallel structure and their diversity, multi-cores are

The UA1 upgrade calorimeter trigger processor

International Nuclear Information System (INIS)

Bains, N.; Baird, S.A.; Biddulph, P.

1990-01-01

The increased luminosity of the improved CERN Collider and the more subtle signals of second-generation collider physics demand increasingly sophisticated triggering. We have built a new first-level trigger processor designed to use the excellent granularity of the UA1 upgrade calorimeter. This device is entirely digital and handles events in 1.5 μs, thus introducing no deadtime. Its most novel feature is fast two-dimensional electromagnetic cluster-finding with the possibility of demanding an isolated shower of limited penetration. The processor allows multiple combinations of triggers on electromagnetic showers, hadronic jets and energy sums, including a total-energy veto of multiple interactions and a full vector sum of missing transverse energy. This hard-wired processor is about five times more powerful than its predecessor, and makes extensive use of pipelining techniques. It was used extensively in the 1988 and 1989 runs of the CERN Collider. (author)

The UA1 upgrade calorimeter trigger processor

International Nuclear Information System (INIS)

Bains, M.; Charleton, D.; Ellis, N.; Garvey, J.; Gregory, J.; Jimack, M.P.; Jovanovic, P.; Kenyon, I.R.; Baird, S.A.; Campbell, D.; Cawthraw, M.; Coughlan, J.; Flynn, P.; Galagedera, S.; Grayer, G.; Halsall, R.; Shah, T.P.; Stephens, R.; Biddulph, P.; Eisenhandler, E.; Fensome, I.F.; Landon, M.; Robinson, D.; Oliver, J.; Sumorok, K.

1990-01-01

The increased luminosity of the improved CERN Collider and the more subtle signals of second-generation collider physics demand increasingly sophisticated triggering. We have built a new first-level trigger processor designed to use the excellent granularity of the UA1 upgrade calorimeter. This device is entirely digital and handles events in 1.5 μs, thus introducing no dead time. Its most novel feature is fast two-dimensional electromagnetic cluster-finding with the possibility of demanding an isolated shower of limited penetration. The processor allows multiple combinations of triggers on electromagnetic showers, hadronic jets and energy sums, including a total-energy veto of multiple interactions and a full vector sum of missing transverse energy. This hard-wired processor is about five times more powerful than its predecessor, and makes extensive use of pipelining techniques. It was used extensively in the 1988 and 1989 runs of the CERN Collider. (orig.)

Highly efficient catalytic systems based on Pd-coated microbeads

Science.gov (United States)

Lim, Jin Hyun; Cho, Ahyoung; Lee, Seung Hwan; Park, Bumkyo; Kang, Dong Woo; Koo, Chong Min; Yu, Taekyung; Park, Bum Jun

2018-01-01

The efficiency of two prototype catalysis systems using palladium (Pd)-coated microparticles was investigated with regard to the recovery and recyclability of the catalytic particles. One such system was the interface-adsorption method, in which polymer particles coated with Pd nanoparticles strongly and irreversibly attach to the oil-water interface. Due to the irreversible adsorption of the catalytic particles to the interface, particle loss was completely prevented while mixing the aqueous solution and while collecting the products. The other system was based on the magnetic field-associated particle recovery method. The use of polymeric microparticles containing Pd nanoparticles and magnetite nanoparticles accelerated the sedimentation of the particles in the aqueous phase by applying a strong magnetic field, consequently suppressing drainage of the particles from the reactor along the product stream. Upon multiple runs of the catalytic reactions, it was found that conversion does not change significantly, demonstrating the excellent recyclability and performance efficiency in the catalytic processes.

Benchmarking NWP Kernels on Multi- and Many-core Processors

Science.gov (United States)

Michalakes, J.; Vachharajani, M.

2008-12-01

Increased computing power for weather, climate, and atmospheric science has provided direct benefits for defense, agriculture, the economy, the environment, and public welfare and convenience. Today, very large clusters with many thousands of processors are allowing scientists to move forward with simulations of unprecedented size. But time-critical applications such as real-time forecasting or climate prediction need strong scaling: faster nodes and processors, not more of them. Moreover, the need for good cost- performance has never been greater, both in terms of performance per watt and per dollar. For these reasons, the new generations of multi- and many-core processors being mass produced for commercial IT and "graphical computing" (video games) are being scrutinized for their ability to exploit the abundant fine- grain parallelism in atmospheric models. We present results of our work to date identifying key computational kernels within the dynamics and physics of a large community NWP model, the Weather Research and Forecast (WRF) model. We benchmark and optimize these kernels on several different multi- and many-core processors. The goals are to (1) characterize and model performance of the kernels in terms of computational intensity, data parallelism, memory bandwidth pressure, memory footprint, etc. (2) enumerate and classify effective strategies for coding and optimizing for these new processors, (3) assess difficulties and opportunities for tool or higher-level language support, and (4) establish a continuing set of kernel benchmarks that can be used to measure and compare effectiveness of current and future designs of multi- and many-core processors for weather and climate applications.

Processors for wavelet analysis and synthesis: NIFS and TI-C80 MVP

Science.gov (United States)

Brooks, Geoffrey W.

1996-03-01

Two processors are considered for image quadrature mirror filtering (QMF). The neuromorphic infrared focal-plane sensor (NIFS) is an existing prototype analog processor offering high speed spatio-temporal Gaussian filtering, which could be used for the QMF low- pass function, and difference of Gaussian filtering, which could be used for the QMF high- pass function. Although not designed specifically for wavelet analysis, the biologically- inspired system accomplishes the most computationally intensive part of QMF processing. The Texas Instruments (TI) TMS320C80 Multimedia Video Processor (MVP) is a 32-bit RISC master processor with four advanced digital signal processors (DSPs) on a single chip. Algorithm partitioning, memory management and other issues are considered for optimal performance. This paper presents these considerations with simulated results leading to processor implementation of high-speed QMF analysis and synthesis.

I2-SDS-H2O System: A highly Efficient Dual Catalytic Green System for Deprotection of Imines and in Situ Preparation of Bis(indolyl)alkanes from Indoles in Water.

Science.gov (United States)

Hazarika, Parasa; Pahari, Pallab; Borah, Manash Jyoti; Konwar, Dilip

2012-01-01

A novel catalytic system consisting of I2-SDS-H2O has been developed which cleaves 2,3-diaza-1,3-butadiene, 1-aza-1,3-butadienes, oximes and in presence of indoles in the medium uses the corresponding aldehyde products to produce bis(indolyl)alkanes in situ. This one pot simple and mild dual catalytic system works in water at room temperature under neutral conditions.

ACP/R3000 processors in data acquisition systems

International Nuclear Information System (INIS)

Deppe, J.; Areti, H.; Atac, R.

1989-02-01

We describe ACP/R3000 processor based data acquisition systems for high energy physics. This VME bus compatible processor board, with a computational power equivalent to 15 VAX 11/780s or better, contains 8 Mb of memory for event buffering and has a high speed secondary bus that allows data gathering from front end electronics. 2 refs., 3 figs

GA103: A microprogrammable processor for online filtering

International Nuclear Information System (INIS)

Calzas, A.; Danon, G.; Bouquet, B.

1981-01-01

GA 103 is a 16 bit microprogrammable processor which emulates the PDP 11 instruction set. It is based on the Am 2900 slices. It allows user-implemented microinstructions and addition of hardwired processors. It will perform on-line filtering tasks in the NA 14 experiment at CERN, based on the reconstruction of transverse momentum of photons detected in a lead glass calorimeter. (orig.)

Real-time trajectory optimization on parallel processors

Science.gov (United States)

Psiaki, Mark L.

1993-01-01

A parallel algorithm has been developed for rapidly solving trajectory optimization problems. The goal of the work has been to develop an algorithm that is suitable to do real-time, on-line optimal guidance through repeated solution of a trajectory optimization problem. The algorithm has been developed on an INTEL iPSC/860 message passing parallel processor. It uses a zero-order-hold discretization of a continuous-time problem and solves the resulting nonlinear programming problem using a custom-designed augmented Lagrangian nonlinear programming algorithm. The algorithm achieves parallelism of function, derivative, and search direction calculations through the principle of domain decomposition applied along the time axis. It has been encoded and tested on 3 example problems, the Goddard problem, the acceleration-limited, planar minimum-time to the origin problem, and a National Aerospace Plane minimum-fuel ascent guidance problem. Execution times as fast as 118 sec of wall clock time have been achieved for a 128-stage Goddard problem solved on 32 processors. A 32-stage minimum-time problem has been solved in 151 sec on 32 processors. A 32-stage National Aerospace Plane problem required 2 hours when solved on 32 processors. A speed-up factor of 7.2 has been achieved by using 32-nodes instead of 1-node to solve a 64-stage Goddard problem.

The ATLAS Level-1 Central Trigger Processor (CTP)

CERN Document Server

Spiwoks, Ralf; Ellis, Nick; Farthouat, P; Gällnö, P; Haller, J; Krasznahorkay, A; Maeno, T; Pauly, T; Pessoa-Lima, H; Resurreccion-Arcas, I; Schuler, G; De Seixas, J M; Torga-Teixeira, R; Wengler, T

2005-01-01

The ATLAS Level-1 Central Trigger Processor (CTP) combines information from calorimeter and muon trigger processors and makes the final Level-1 Accept (L1A) decision on the basis of lists of selection criteria (trigger menus). In addition to the event-selection decision, the CTP also provides trigger summary information to the Level-2 trigger and the data acquisition system. It further provides accumulated and bunch-by-bunch scaler data for monitoring of the trigger, detector and beam conditions. The CTP is presented and results are shown from tests with the calorimeter adn muon trigger processors connected to detectors in a particle beam, as well as from stand-alone full-system tests in the laboratory which were used to validate the CTP.

A Processor-Sharing Scheduling Strategy for NFV Nodes

Directory of Open Access Journals (Sweden)

Giuseppe Faraci

2016-01-01

Full Text Available The introduction of the two paradigms SDN and NFV to “softwarize” the current Internet is making management and resource allocation two key challenges in the evolution towards the Future Internet. In this context, this paper proposes Network-Aware Round Robin (NARR, a processor-sharing strategy, to reduce delays in traversing SDN/NFV nodes. The application of NARR alleviates the job of the Orchestrator by automatically working at the intranode level, dynamically assigning the processor slices to the virtual network functions (VNFs according to the state of the queues associated with the output links of the network interface cards (NICs. An extensive simulation set is presented to show the improvements achieved with respect to two more processor-sharing strategies chosen as reference.

Processor farming method for multi-scale analysis of masonry structures

Science.gov (United States)

Krejčí, Tomáš; Koudelka, Tomáš

2017-07-01

This paper describes a processor farming method for a coupled heat and moisture transport in masonry using a two-level approach. The motivation for the two-level description comes from difficulties connected with masonry structures, where the size of stone blocks is much larger than the size of mortar layers and very fine finite element mesh has to be used. The two-level approach is suitable for parallel computing because nearly all computations can be performed independently with little synchronization. This approach is called processor farming. The master processor is dealing with the macro-scale level - the structure and the slave processors are dealing with a homogenization procedure on the meso-scale level which is represented by an appropriate representative volume element.

[Improving speech comprehension using a new cochlear implant speech processor].

Science.gov (United States)

Müller-Deile, J; Kortmann, T; Hoppe, U; Hessel, H; Morsnowski, A

2009-06-01

The aim of this multicenter clinical field study was to assess the benefits of the new Freedom 24 sound processor for cochlear implant (CI) users implanted with the Nucleus 24 cochlear implant system. The study included 48 postlingually profoundly deaf experienced CI users who demonstrated speech comprehension performance with their current speech processor on the Oldenburg sentence test (OLSA) in quiet conditions of at least 80% correct scores and who were able to perform adaptive speech threshold testing using the OLSA in noisy conditions. Following baseline measures of speech comprehension performance with their current speech processor, subjects were upgraded to the Freedom 24 speech processor. After a take-home trial period of at least 2 weeks, subject performance was evaluated by measuring the speech reception threshold with the Freiburg multisyllabic word test and speech intelligibility with the Freiburg monosyllabic word test at 50 dB and 70 dB in the sound field. The results demonstrated highly significant benefits for speech comprehension with the new speech processor. Significant benefits for speech comprehension were also demonstrated with the new speech processor when tested in competing background noise.In contrast, use of the Abbreviated Profile of Hearing Aid Benefit (APHAB) did not prove to be a suitably sensitive assessment tool for comparative subjective self-assessment of hearing benefits with each processor. Use of the preprocessing algorithm known as adaptive dynamic range optimization (ADRO) in the Freedom 24 led to additional improvements over the standard upgrade map for speech comprehension in quiet and showed equivalent performance in noise. Through use of the preprocessing beam-forming algorithm BEAM, subjects demonstrated a highly significant improved signal-to-noise ratio for speech comprehension thresholds (i.e., signal-to-noise ratio for 50% speech comprehension scores) when tested with an adaptive procedure using the Oldenburg

Hardware processor for tracking particles in an alternating-gradient synchrotron

International Nuclear Information System (INIS)

Johnson, M.; Avilez, C.

1987-01-01

We discuss the design and performance of special-purpose processors for tracking particles through an alternating-gradient synchrotron. We present block diagram designs for two hardware processors. Both processors use algorithms based on the 'kick' approximation, i.e., transport matrices are used for dipoles and quadrupoles, and the thin-lens approximation is used for all higher multipoles. The faster processor makes extensive use of memory look-up tables for evaluating functions. For the case of magnets with multipoles up to pole 30 and using one kick per magnet, this processor can track 19 particles through an accelerator at a rate that is only 220 times slower than the time it takes real particles to travel around the machine. For a model consisting of only thin lenses, it is only 150 times slower than real particles. An additional factor of 2 can be obtained with chips now becoming available. The number of magnets in the accelerator is limited only by the amount of memory available for storing magnet parameters. (author) 20 refs., 7 figs., 2 tabs

High-speed special-purpose processor for event selection by number of direct tracks

International Nuclear Information System (INIS)

Kalinnikov, V.A.; Krastev, V.R.; Chudakov, E.A.

1986-01-01

A processor which uses data on events from five detector planes is described. To increase economy and speed in parallel processing, the processor converts the input data to superposition code and recognizes tracks by a generated search mask. The resolving time of the processor is ≤300 nsec. The processor is CAMAC-compatible and uses ECL integrated circuits

Multibus-based parallel processor for simulation

Science.gov (United States)

Ogrady, E. P.; Wang, C.-H.

1983-01-01

A Multibus-based parallel processor simulation system is described. The system is intended to serve as a vehicle for gaining hands-on experience, testing system and application software, and evaluating parallel processor performance during development of a larger system based on the horizontal/vertical-bus interprocessor communication mechanism. The prototype system consists of up to seven Intel iSBC 86/12A single-board computers which serve as processing elements, a multiple transmission controller (MTC) designed to support system operation, and an Intel Model 225 Microcomputer Development System which serves as the user interface and input/output processor. All components are interconnected by a Multibus/IEEE 796 bus. An important characteristic of the system is that it provides a mechanism for a processing element to broadcast data to other selected processing elements. This parallel transfer capability is provided through the design of the MTC and a minor modification to the iSBC 86/12A board. The operation of the MTC, the basic hardware-level operation of the system, and pertinent details about the iSBC 86/12A and the Multibus are described.

Monitoring the performance of off-site processors

International Nuclear Information System (INIS)

Miller, C.C.

1995-01-01

Commercial nuclear power plants have been able to utilize the latest technologies and achieve large volume reduction by obtaining off-site waste processor services. Although the use of such services reduce the burden of waste processing it also reduces the utility's control over the process. Monitoring the performance of off-site processors is important so that the utility is cognizant of the waste disposition for required regulatory reporting. In addition to obtaining data for Reg Guide 1.21 reporting, Performance monitoring is important to determine which vendor and which services to utilize. Off-site processor services were initially offered for the decontamination of metallic waste. Since that time the list of services has expanded to include supercompaction, survey for release, incineration and metal melting. The number of vendors offering off-site services has increased and the services they offer vary. processing rates vary between vendors and have different charge bases. Determining which vendor to use for what service can be complicated and confusing

Water environment and water preservation technology

Energy Technology Data Exchange (ETDEWEB)

Yoda, M.; Ofuchi, M.; Tsuzuki, K. (Hitachi, Ltd., Tokyo (Japan))

1993-12-01

Technologies on monitoring, purification, and simulation were described concerning water quality preservation, especially in closed water bodies such as lakes. In order to detect an increase in plankton bloom causing unpleasant taste and order, a water quality monitoring system using image analysis was developed. The main feature of this system is the use of a microscope to obtain images of plankton, coupled with a high speed image processor containing VLSI circuits used exclusively for image processing. The original gray image, obtained from the ITV in the microscope, is treated in the image processor, which extracts the features of isolated plankton, then classifies them, based on data previously input into the memory. As one of the water purification measures for lakes, a sprinkler system was developed. The sprinkler system has a pump in a boat-like structure set on a lake. It pumps up large quantities of cold water from depth of 10 m, then jets and sprays it from many nozzles after pressurization. In addition, a simulation technique was developed which can forecast the extent of water pollution and the effects of purification systems using the finite element method. 6 figs., 2 tabs.

Digital Signal Processor System for AC Power Drivers

Directory of Open Access Journals (Sweden)

Ovidiu Neamtu

2009-10-01

Full Text Available DSP (Digital Signal Processor is the bestsolution for motor control systems to make possible thedevelopment of advanced motor drive systems. The motorcontrol processor calculates the required motor windingvoltage magnitude and frequency to operate the motor atthe desired speed. A PWM (Pulse Width Modulationcircuit controls the on and off duty cycle of the powerinverter switches to vary the magnitude of the motorvoltages.

Study of the water-gas shift reaction on Mo2C/Mo catalytic coatings for application in microstructured fuel processors

NARCIS (Netherlands)

Rebrov, E.V.; Kuznetsov, S.A.; Croon, de M.H.J.M.; Schouten, J.C.

2007-01-01

The activity and stability of two types of molybdenum carbide coatings deposited on molybdenum substrates (Mo2C/Mo) were compared in the water-gas shift reaction at 513–631 K. The activity of the Mo2C/Mo coatings obtained by carburization of preoxidized molybdenum substrates in a CH4/H2 mixture at

Early experience with the cochlear ESPrit ear-level speech processor in children.

Science.gov (United States)

Totten, C; Cope, Y; McCormick, B

2000-12-01

The ESPrit ear-level speech processor has recently become available in the United Kingdom for use with the Nucleus CI24M multichannel cochlear implant. We report on the use of this ear-level processor with 6 children, ages 8 to 15 years. In this study, all patients were initially fitted with the SPrint body-worn processor, this being a prerequisite for programming the ESPrit. Five of the children were fitted successfully with the ESPrit and are using their devices consistently. The results show that patient experience with the ESPrit has been favorable, although there have been some device and programming difficulties. Aided threshold measures show that the ESPrit processor performs at least as well as the SPrint processor, with a trend toward improved aided thresholds for the ESPrit processor compared with the SPrint processor. Further study of the functional benefit of both of these devices may confirm these potential gains. The ESPrit device currently has a disadvantage for children in that it does not support FM radio hearing aid use. Finally, caution is advised in the fitting of the ESPrit in very young children or inexperienced listeners, because of difficulties in monitoring device function.

Pretreated Landfill Gas Conversion Process via a Catalytic Membrane Reactor for Renewable Combined Fuel Cell-Power Generation

Directory of Open Access Journals (Sweden)

Zoe Ziaka

2013-01-01

Full Text Available A new landfill gas-based reforming catalytic processing system for the conversion of gaseous hydrocarbons, such as incoming methane to hydrogen and carbon oxide mixtures, is described and analyzed. The exit synthesis gas (syn-gas is fed to power effectively high-temperature fuel cells such as SOFC types for combined efficient electricity generation. The current research work is also referred on the description and design aspects of permreactors (permeable reformers carrying the same type of landfill gas-reforming reactions. Membrane reactors is a new technology that can be applied efficiently in such systems. Membrane reactors seem to perform better than the nonmembrane traditional reactors. The aim of this research includes turnkey system and process development for the landfill-based power generation and fuel cell industries. Also, a discussion of the efficient utilization of landfill and waste type resources for combined green-type/renewable power generation with increased processing capacity and efficiency via fuel cell systems is taking place. Moreover, pollution reduction is an additional design consideration in the current catalytic processors fuel cell cycles.

A word processor optimized for preparing journal articles and student papers.

Science.gov (United States)

Wolach, A H; McHale, M A

2001-11-01

A new Windows-based word processor for preparing journal articles and student papers is described. In addition to standard features found in word processors, the present word processor provides specific help in preparing manuscripts. Clicking on "Reference Help (APA Form)" in the "File" menu provides a detailed help system for entering the references in a journal article. Clicking on "Examples and Explanations of APA Form" provides a help system with examples of the various sections of a review article, journal article that has one experiment, or journal article that has two or more experiments. The word processor can automatically place the manuscript page header and page number at the top of each page using the form required by APA and Psychonomic Society journals. The "APA Form" submenu of the "Help" menu provides detailed information about how the word processor is optimized for preparing articles and papers.

Extended performance electric propulsion power processor design study. Volume 2: Technical summary

Science.gov (United States)

Biess, J. J.; Inouye, L. Y.; Schoenfeld, A. D.

1977-01-01

Electric propulsion power processor technology has processed during the past decade to the point that it is considered ready for application. Several power processor design concepts were evaluated and compared. Emphasis was placed on a 30 cm ion thruster power processor with a beam power rating supply of 2.2KW to 10KW for the main propulsion power stage. Extension in power processor performance were defined and were designed in sufficient detail to determine efficiency, component weight, part count, reliability and thermal control. A detail design was performed on a microprocessor as the thyristor power processor controller. A reliability analysis was performed to evaluate the effect of the control electronics redesign. Preliminary electrical design, mechanical design and thermal analysis were performed on a 6KW power transformer for the beam supply. Bi-Mod mechanical, structural and thermal control configurations were evaluated for the power processor and preliminary estimates of mechanical weight were determined.

First Results of an “Artificial Retina” Processor Prototype

International Nuclear Information System (INIS)

Cenci, Riccardo; Bedeschi, Franco; Marino, Pietro; Morello, Michael J.; Ninci, Daniele; Piucci, Alessio; Punzi, Giovanni; Ristori, Luciano; Spinella, Franco; Stracka, Simone; Tonelli, Diego; Walsh, John

2016-01-01

We report on the performance of a specialized processor capable of reconstructing charged particle tracks in a realistic LHC silicon tracker detector, at the same speed of the readout and with sub-microsecond latency. The processor is based on an innovative pattern-recognition algorithm, called “artificial retina algorithm”, inspired from the vision system of mammals. A prototype of the processor has been designed, simulated, and implemented on Tel62 boards equipped with high-bandwidth Altera Stratix III FPGA devices. The prototype is the first step towards a real-time track reconstruction device aimed at processing complex events of high-luminosity LHC experiments at 40 MHz crossing rate

Performance of a Novel Hydrophobic Mesoporous Material for High Temperature Catalytic Oxidation of Naphthalene

Directory of Open Access Journals (Sweden)

Guotao Zhao

2014-01-01

Full Text Available A high surface area, hydrophobic mesoporous material, MFS, has been successfully synthesized by a hydrothermal synthesis method using a perfluorinated surfactant, SURFLON S-386, as the single template. N2 adsorption and TEM were employed to characterize the pore structure and morphology of MFS. Static water adsorption test indicates that the hydrophobicity of MFS is significantly higher than that of MCM-41. XPS and Py-GC/MS analysis confirmed the existence of perfluoroalkyl groups in MFS which led to its high hydrophobicity. MFS was used as a support for CuO in experiments of catalytic combustion of naphthalene, where it showed a significant advantage over MCM-41 and ZSM-5. SEM was helpful in understanding why CuO-MFS performed so well in the catalytic combustion of naphthalene. Experimental results indicated that MFS was a suitable support for catalytic combustion of large molecular organic compounds, especially for some high temperature catalytic reactions when water vapor was present.

Nonlinear Wave Simulation on the Xeon Phi Knights Landing Processor

Science.gov (United States)

Hristov, Ivan; Goranov, Goran; Hristova, Radoslava

2018-02-01

We consider an interesting from computational point of view standing wave simulation by solving coupled 2D perturbed Sine-Gordon equations. We make an OpenMP realization which explores both thread and SIMD levels of parallelism. We test the OpenMP program on two different energy equivalent Intel architectures: 2× Xeon E5-2695 v2 processors, (code-named "Ivy Bridge-EP") in the Hybrilit cluster, and Xeon Phi 7250 processor (code-named "Knights Landing" (KNL). The results show 2 times better performance on KNL processor.

M7--a high speed digital processor for second level trigger selections

International Nuclear Information System (INIS)

Droege, T.F.; Gaines, I.; Turner, K.J.

1978-01-01

A digital processor is described which reconstructs mass and momentum as a second-level trigger selection. The processor is a five-address, microprogramed, pipelined, ECL machine with simultaneous memory access to four operands which load two parallel multipliers and an ALU. Source data modules are extensions of the processor

Status of ISS Water Management and Recovery

Science.gov (United States)

Carter, Layne; Takada, Kevin; Gazda, Daniel; Brown, Christopher; Bazley, Jesse; Schaezler, Ryan; Bankers, Lyndsey

2017-01-01

Water management on ISS is responsible for the provision of water to the crew for drinking water, food preparation, and hygiene, to the Oxygen Generation System (OGS) for oxygen production via electrolysis, to the Waste & Hygiene Compartment (WHC) for flush water, and for experiments on ISS. This paper summarizes water management activities on the ISS US Segment and provides a status of the performance and issues related to the operation of the Water Processor Assembly (WPA) and Urine Processor Assembly (UPA). This paper summarizes the on-orbit status as of June 2017 and describes the technical challenges encountered and lessons learned over the past year.

Status of ISS Water Management and Recovery

Science.gov (United States)

Carter, Layne; Brown, Christopher; Orozco, Nicole

2014-01-01

Water management on ISS is responsible for the provision of water to the crew for drinking water, food preparation, and hygiene, to the Oxygen Generation System (OGS) for oxygen production via electrolysis, to the Waste & Hygiene Compartment (WHC) for flush water, and for experiments on ISS. This paper summarizes water management activities on the ISS US Segment, and provides a status of the performance and issues related to the operation of the Water Processor Assembly (WPA) and Urine Processor Assembly (UPA). This paper summarizes the on-orbit status as of June 2013, and describes the technical challenges encountered and lessons learned over the past year.

Measurement of capacity coefficient of inclined liquid phase catalytic exchange column for tritiated water processing

International Nuclear Information System (INIS)

Yamai, Hideki; Konishi, Satoshi; Yamanishi, Toshihiko; Okuno, Kenji

1994-01-01

Liquid phase catalytic exchange (LPCE) is effective method for enrichment and removal of tritium from tritiated water. Capacity coefficients of operating LPCE column that are essential to evaluate column performance were measured. Experiments were performed with short catalyst packed columns and effect of inclination was studied. Method for evaluation of capacity coefficients was established from measurement of isotope concentration of liquid, vapor, gas phases at the two ends of the column. The capacity coefficients were measured under various superficial gas velocities. Feasibility study of helical columns with roughened inner surface was performed with short inclined columns. The column performance was not strongly affected by the inclination. The result indicates technological feasibility of helical LPCE column, that is expected to have operation stability and reduced height

Discussion paper for a highly parallel array processor-based machine

International Nuclear Information System (INIS)

Hagstrom, R.; Bolotin, G.; Dawson, J.

1984-01-01

The architectural plant for a quickly realizable implementation of a highly parallel special-purpose computer system with peak performance in the range of 6 billion floating point operations per second is discussed. The architecture is suitable to Lattice Gauge theoretical computations of fundamental physics interest and may be applicable to a range of other problems which deal with numerically intensive computational problems. The plan is quickly realizable because it employs a maximum of commercially available hardware subsystems and because the architecture is software-transparent to the individual processors, allowing straightforward re-use of whatever commercially available operating-systems and support software that is suitable to run on the commercially-produced processors. A tiny prototype instrument, designed along this architecture has already operated. A few elementary examples of programs which can run efficiently are presented. The large machine which the authors would propose to build would be based upon a highly competent array-processor, the ST-100 Array Processor, and specific design possibilities are discussed. The first step toward realizing this plan practically is to install a single ST-100 to allow algorithm development to proceed while a demonstration unit is built using two of the ST-100 Array Processors

SSC 254 Screen-Based Word Processors: Production Tests. The Lanier Word Processor.

Science.gov (United States)

Moyer, Ruth A.

Designed for use in Trident Technical College's Secretarial Lab, this series of 12 production tests focuses on the use of the Lanier Word Processor for a variety of tasks. In tests 1 and 2, students are required to type and print out letters. Tests 3 through 8 require students to reformat a text; make corrections on a letter; divide and combine…

Performance of Artificial Intelligence Workloads on the Intel Core 2 Duo Series Desktop Processors

OpenAIRE

Abdul Kareem PARCHUR; Kuppangari Krishna RAO; Fazal NOORBASHA; Ram Asaray SINGH

2010-01-01

As the processor architecture becomes more advanced, Intel introduced its Intel Core 2 Duo series processors. Performance impact on Intel Core 2 Duo processors are analyzed using SPEC CPU INT 2006 performance numbers. This paper studied the behavior of Artificial Intelligence (AI) benchmarks on Intel Core 2 Duo series processors. Moreover, we estimated the task completion time (TCT) @1 GHz, @2 GHz and @3 GHz Intel Core 2 Duo series processors frequency. Our results show the performance scalab...

Nonlinear Wave Simulation on the Xeon Phi Knights Landing Processor

Directory of Open Access Journals (Sweden)

Hristov Ivan

2018-01-01

Full Text Available We consider an interesting from computational point of view standing wave simulation by solving coupled 2D perturbed Sine-Gordon equations. We make an OpenMP realization which explores both thread and SIMD levels of parallelism. We test the OpenMP program on two different energy equivalent Intel architectures: 2× Xeon E5-2695 v2 processors, (code-named “Ivy Bridge-EP” in the Hybrilit cluster, and Xeon Phi 7250 processor (code-named “Knights Landing” (KNL. The results show 2 times better performance on KNL processor.

HTGR core seismic analysis using an array processor

International Nuclear Information System (INIS)

Shatoff, H.; Charman, C.M.

1983-01-01

A Floating Point Systems array processor performs nonlinear dynamic analysis of the high-temperature gas-cooled reactor (HTGR) core with significant time and cost savings. The graphite HTGR core consists of approximately 8000 blocks of various shapes which are subject to motion and impact during a seismic event. Two-dimensional computer programs (CRUNCH2D, MCOCO) can perform explicit step-by-step dynamic analyses of up to 600 blocks for time-history motions. However, use of two-dimensional codes was limited by the large cost and run times required. Three-dimensional analysis of the entire core, or even a large part of it, had been considered totally impractical. Because of the needs of the HTGR core seismic program, a Floating Point Systems array processor was used to enhance computer performance of the two-dimensional core seismic computer programs, MCOCO and CRUNCH2D. This effort began by converting the computational algorithms used in the codes to a form which takes maximum advantage of the parallel and pipeline processors offered by the architecture of the Floating Point Systems array processor. The subsequent conversion of the vectorized FORTRAN coding to the array processor required a significant programming effort to make the system work on the General Atomic (GA) UNIVAC 1100/82 host. These efforts were quite rewarding, however, since the cost of running the codes has been reduced approximately 50-fold and the time threefold. The core seismic analysis with large two-dimensional models has now become routine and extension to three-dimensional analysis is feasible. These codes simulate the one-fifth-scale full-array HTGR core model. This paper compares the analysis with the test results for sine-sweep motion

A single chip pulse processor for nuclear spectroscopy

International Nuclear Information System (INIS)

Hilsenrath, F.; Bakke, J.C.; Voss, H.D.

1985-01-01

A high performance digital pulse processor, integrated into a single gate array microcircuit, has been developed for spaceflight applications. The new approach takes advantage of the latest CMOS high speed A/D flash converters and low-power gated logic arrays. The pulse processor measures pulse height, pulse area and the required timing information (e.g. multi detector coincidence and pulse pile-up detection). The pulse processor features high throughput rate (e.g. 0.5 Mhz for 2 usec gausssian pulses) and improved differential linearity (e.g. + or - 0.2 LSB for a + or - 1 LSB A/D). Because of the parallel digital architecture of the device, the interface is microprocessor bus compatible. A satellite flight application of this module is presented for use in the X-ray imager and high energy particle spectrometers of the PEM experiment on the Upper Atmospheric Research Satellite

The hardware track finder processor in CMS at CERN

CERN Document Server

Kluge, A

1997-01-01

The work covers the design of the Track Finder Processor in the high energy experiment CMS (Compact Muon Solenoid, planned for 2005) at CERN/Geneva. The task of this processor is to identify muons and measure their transverse momentum. The track finder processor makes it possible to determine the physical relevance of each high energetic collision and to forward only interesting data to the data an alysis units. Data of more than two hundred thousand detector cells are used to determine the location of muons and measure their transverse momentum. Each 25 ns a new data set is generated. Measurem ent of location and transverse momentum of the muons can be terminated within 350 ns by using an ASIC (Application Specific Integrated Circuit). A pipeline architecture processes new data sets with th e required data rate of 40 MHz to ensure dead time free operation. In the framework of this study specifications and the overall concept of the track finder processor were worked out in detail. Simul ations were performed...

UA1 upgrade first-level calorimeter trigger processor

International Nuclear Information System (INIS)

Bains, N.; Charlton, D.; Ellis, N.; Garvey, J.; Gregory, J.; Jimack, M.P.; Jovanovic, P.; Kenyon, I.R.; Baird, S.A.; Campbell, D.; Cawthraw, M.; Coughlan, J.; Flynn, P.; Galagedera, S.; Grayer, G.; Halsall, R.; Shah, T.P.; Stephens, R.; Eisenhandler, E.; Fensome, I.; Landon, M.

1989-01-01

A new first-level trigger processor has been built for the UA1 experiment on the Cern SppS Collider. The processor exploits the fine granularity of the new UA1 uranium-TMP calorimeter to improve the selectivity of the trigger. The new electron trigger has improved hadron jet rejection, achieved by requiring low energy deposition around the electromagnetic cluster. A missing transverse energy trigger and a total energy trigger have also been implemented. (orig.)

Heat dissipation for the Intel Core i5 processor using multiwalled carbon-nanotube-based ethylene glycol

Energy Technology Data Exchange (ETDEWEB)

Thang, Bui Hung; Trinh, Pham Van; Quang, Le Dinh; Khoi, Phan Hong; Minh, Phan Ngoc [Vietnam Academy of Science and Technology, Ho Chi Minh CIty (Viet Nam); Huong, Nguyen Thi [Hanoi University of Science, Hanoi (Viet Nam); Vietnam National University, Hanoi (Viet Nam)

2014-08-15

Carbon nanotubes (CNTs) are some of the most valuable materials with high thermal conductivity. The thermal conductivity of individual multiwalled carbon nanotubes (MWCNTs) grown by using chemical vapor deposition is 600 ± 100 Wm{sup -1}K{sup -1} compared with the thermal conductivity 419 Wm{sup -1}K{sup -1} of Ag. Carbon-nanotube-based liquids - a new class of nanomaterials, have shown many interesting properties and distinctive features offering potential in heat dissipation applications for electronic devices, such as computer microprocessor, high power LED, etc. In this work, a multiwalled carbon-nanotube-based liquid was made of well-dispersed hydroxyl-functional multiwalled carbon nanotubes (MWCNT-OH) in ethylene glycol (EG)/distilled water (DW) solutions by using Tween-80 surfactant and an ultrasonication method. The concentration of MWCNT-OH in EG/DW solutions ranged from 0.1 to 1.2 gram/liter. The dispersion of the MWCNT-OH-based EG/DW solutions was evaluated by using a Zeta-Sizer analyzer. The MWCNT-OH-based EG/DW solutions were used as coolants in the liquid cooling system for the Intel Core i5 processor. The thermal dissipation efficiency and the thermal response of the system were evaluated by directly measuring the temperature of the micro-processor using the Core Temp software and the temperature sensors built inside the micro-processor. The results confirmed the advantages of CNTs in thermal dissipation systems for computer processors and other high-power electronic devices.

Heat dissipation for the Intel Core i5 processor using multiwalled carbon-nanotube-based ethylene glycol

International Nuclear Information System (INIS)

Thang, Bui Hung; Trinh, Pham Van; Quang, Le Dinh; Khoi, Phan Hong; Minh, Phan Ngoc; Huong, Nguyen Thi

2014-01-01

Carbon nanotubes (CNTs) are some of the most valuable materials with high thermal conductivity. The thermal conductivity of individual multiwalled carbon nanotubes (MWCNTs) grown by using chemical vapor deposition is 600 ± 100 Wm -1 K -1 compared with the thermal conductivity 419 Wm -1 K -1 of Ag. Carbon-nanotube-based liquids - a new class of nanomaterials, have shown many interesting properties and distinctive features offering potential in heat dissipation applications for electronic devices, such as computer microprocessor, high power LED, etc. In this work, a multiwalled carbon-nanotube-based liquid was made of well-dispersed hydroxyl-functional multiwalled carbon nanotubes (MWCNT-OH) in ethylene glycol (EG)/distilled water (DW) solutions by using Tween-80 surfactant and an ultrasonication method. The concentration of MWCNT-OH in EG/DW solutions ranged from 0.1 to 1.2 gram/liter. The dispersion of the MWCNT-OH-based EG/DW solutions was evaluated by using a Zeta-Sizer analyzer. The MWCNT-OH-based EG/DW solutions were used as coolants in the liquid cooling system for the Intel Core i5 processor. The thermal dissipation efficiency and the thermal response of the system were evaluated by directly measuring the temperature of the micro-processor using the Core Temp software and the temperature sensors built inside the micro-processor. The results confirmed the advantages of CNTs in thermal dissipation systems for computer processors and other high-power electronic devices.

Application of the Computer Capacity to the Analysis of Processors Evolution

OpenAIRE

Ryabko, Boris; Rakitskiy, Anton

2017-01-01

The notion of computer capacity was proposed in 2012, and this quantity has been estimated for computers of different kinds. In this paper we show that, when designing new processors, the manufacturers change the parameters that affect the computer capacity. This allows us to predict the values of parameters of future processors. As the main example we use Intel processors, due to the accessibility of detailed description of all their technical characteristics.

Optimal processor for malfunction detection in operating nuclear reactor

International Nuclear Information System (INIS)

Ciftcioglu, O.

1990-01-01

An optimal processor for diagnosing operational transients in a nuclear reactor is described. Basic design of the processor involves real-time processing of noise signal obtained from a particular in core sensor and the optimality is based on minimum alarm failure in contrast to minimum false alarm criterion from the safe and reliable plant operation viewpoint

An updated program-controlled analog processor, model AP-006, for semiconductor detector spectrometers

International Nuclear Information System (INIS)

Shkola, N.F.; Shevchenko, Yu.A.

1989-01-01

An analog processor, model AP-006, is reported. The processor is a development of a series of spectrometric units based on a shaper of the type 'DL dif +TVS+gated ideal integrator'. Structural and circuits design features are described. The results of testing the processor in a setup with a Si(Li) detecting unit over an input count-rate range of up to 5x10 5 cps are presented. Processor applications are illustrated. (orig.)

Intelligent trigger processor for the crystal box

International Nuclear Information System (INIS)

Sanders, G.H.; Butler, H.S.; Cooper, M.D.

1981-01-01

A large solid angle modular NaI(Tl) detector with 432 phototubes and 88 trigger scintillators is being used to search simultaneously for three lepton flavor changing decays of muon. A beam of up to 10 6 muons stopping per second with a 6% duty factor would yield up to 1000 triggers per second from random triple coincidences. A reduction of the trigger rate to 10 Hz is required from a hardwired primary trigger processor described in this paper. Further reduction to < 1 Hz is achieved by a microprocessor based secondary trigger processor. The primary trigger hardware imposes voter coincidence logic, stringent timing requirements, and a non-adjacency requirement in the trigger scintillators defined by hardwired circuits. Sophisticated geometric requirements are imposed by a PROM-based matrix logic, and energy and vector-momentum cuts are imposed by a hardwired processor using LSI flash ADC's and digital arithmetic loci. The secondary trigger employs four satellite microprocessors to do a sparse data scan, multiplex the data acquisition channels and apply additional event filtering

40 CFR 80.840 - What requirements apply to transmix processors?

Science.gov (United States)

2010-07-01

... PROGRAMS (CONTINUED) REGULATION OF FUELS AND FUEL ADDITIVES Gasoline Toxics Gasoline Toxics Performance Requirements § 80.840 What requirements apply to transmix processors? Any transmix processor who produces gasoline or gasoline blendstock from transmix, or recovers gasoline or gasoline blendstock from transmix...

The Serial Link Processor for the Fast TracKer (FTK) processor at ATLAS

CERN Document Server

Biesuz, Nicolo Vladi; The ATLAS collaboration; Luciano, Pierluigi; Magalotti, Daniel; Rossi, Enrico

2015-01-01

The Associative Memory (AM) system of the Fast Tracker (FTK) processor has been designed to perform pattern matching using the hit information of the ATLAS experiment silicon tracker. The AM is the heart of FTK and is mainly based on the use of ASICs (AM chips) designed on purpose to execute pattern matching with a high degree of parallelism. It finds track candidates at low resolution that are seeds for a full resolution track fitting. To solve the very challenging data traffic problems inside FTK, multiple board and chip designs have been performed. The currently proposed solution is named the “Serial Link Processor” and is based on an extremely powerful network of 2 Gb/s serial links. This paper reports on the design of the Serial Link Processor consisting of two types of boards, the Local Associative Memory Board (LAMB), a mezzanine where the AM chips are mounted, and the Associative Memory Board (AMB), a 9U VME board which holds and exercises four LAMBs. We report on the performance of the intermedia...

The Serial Link Processor for the Fast TracKer (FTK) processor at ATLAS

CERN Document Server

Andreani, A; The ATLAS collaboration; Beccherle, R; Beretta, M; Cipriani, R; Citraro, S; Citterio, M; Colombo, A; Crescioli, F; Dimas, D; Donati, S; Giannetti, P; Kordas, K; Lanza, A; Liberali, V; Luciano, P; Magalotti, D; Neroutsos, P; Nikolaidis, S; Piendibene, M; Sakellariou, A; Shojaii, S; Sotiropoulou, C-L; Stabile, A

2014-01-01

The Associative Memory (AM) system of the FTK processor has been designed to perform pattern matching using the hit information of the ATLAS silicon tracker. The AM is the heart of the FTK and it finds track candidates at low resolution that are seeds for a full resolution track fitting. To solve the very challenging data traffic problems inside the FTK, multiple designs and tests have been performed. The currently proposed solution is named the “Serial Link Processor” and is based on an extremely powerful network of 2 Gb/s serial links. This paper reports on the design of the Serial Link Processor consisting of the AM chip, an ASIC designed and optimized to perform pattern matching, and two types of boards, the Local Associative Memory Board (LAMB), a mezzanine where the AM chips are mounted, and the Associative Memory Board (AMB), a 9U VME board which holds and exercises four LAMBs. Special relevance will be given to the AMchip design that includes two custom cells optimized for low consumption. We repo...

The Serial Link Processor for the Fast TracKer (FTK) processor at ATLAS

CERN Document Server

Biesuz, Nicolo Vladi; The ATLAS collaboration; Luciano, Pierluigi; Magalotti, Daniel; Rossi, Enrico

2015-01-01

The Associative Memory (AM) system of the Fast Tracker (FTK) processor has been designed to perform pattern matching using the hit information of the ATLAS experiment silicon tracker. The AM is the heart of FTK and is mainly based on the use of ASICs (AM chips) designed to execute pattern matching with a high degree of parallelism. The AM system finds track candidates at low resolution that are seeds for a full resolution track fitting. To solve the very challenging data traffic problems inside FTK, multiple board and chip designs have been performed. The currently proposed solution is named the “Serial Link Processor” and is based on an extremely powerful network of 828 2 Gbit/s serial links for a total in/out bandwidth of 56 Gb/s. This paper reports on the design of the Serial Link Processor consisting of two types of boards, the Local Associative Memory Board (LAMB), a mezzanine where the AM chips are mounted, and the Associative Memory Board (AMB), a 9U VME board which holds and exercises four LAMBs. ...

Safe and Efficient Support for Embeded Multi-Processors in ADA

Science.gov (United States)

Ruiz, Jose F.

2010-08-01

New software demands increasing processing power, and multi-processor platforms are spreading as the answer to achieve the required performance. Embedded real-time systems are also subject to this trend, but in the case of real-time mission-critical systems, the properties of reliability, predictability and analyzability are also paramount. The Ada 2005 language defined a subset of its tasking model, the Ravenscar profile, that provides the basis for the implementation of deterministic and time analyzable applications on top of a streamlined run-time system. This Ravenscar tasking profile, originally designed for single processors, has proven remarkably useful for modelling verifiable real-time single-processor systems. This paper proposes a simple extension to the Ravenscar profile to support multi-processor systems using a fully partitioned approach. The implementation of this scheme is simple, and it can be used to develop applications amenable to schedulability analysis.

A programmable systolic trigger processor for FERA bus data

International Nuclear Information System (INIS)

Appelquist, G.; Hovander, B.; Sellden, B.; Bohm, C.

1992-09-01

A generic CAMAC based trigger processor module for fast processing of large amounts of ADC data, has been designed. This module has been realised using complex programmable gate arrays (LCAs from XILINX). The gate arrays have been connected to memories and multipliers in such a way that different gate array configurations can cover a wide range of module applications. Using this module, it is possible to construct complex trigger processors. The module uses both the fast ECL FERA bus and the CAMAC bus for inputs and outputs. The latter, however, is primarily used for set-up and control but may also be used for data output. Large numbers of ADCs can be served by a hierarchical arrangement of trigger processor modules, processing ADC data with pipe-line arithmetics producing the final result at the apex of the pyramid. The trigger decision will be transmitted to the data acquisition system via a logic signal while numeric results may be extracted by the CAMAC controller. The trigger processor was originally developed for the proposed neutral particle search experiment at CERN, NUMASS. There it was designed to serve as a second level trigger processor. It was required to correct all ADC raw data for efficiency and pedestal, calculate the total calorimeter energy, obtain the optimal time of flight data and calculate the particle mass. A suitable mass cut would then deliver the trigger decision. More complex triggers were also considered. (au)

Exploration of alternate catalytic mechanisms and optimization strategies for retroaldolase design.

Science.gov (United States)

Bjelic, Sinisa; Kipnis, Yakov; Wang, Ling; Pianowski, Zbigniew; Vorobiev, Sergey; Su, Min; Seetharaman, Jayaraman; Xiao, Rong; Kornhaber, Gregory; Hunt, John F; Tong, Liang; Hilvert, Donald; Baker, David

2014-01-09

Designed retroaldolases have utilized a nucleophilic lysine to promote carbon-carbon bond cleavage of β-hydroxy-ketones via a covalent Schiff base intermediate. Previous computational designs have incorporated a water molecule to facilitate formation and breakdown of the carbinolamine intermediate to give the Schiff base and to function as a general acid/base. Here we investigate an alternative active-site design in which the catalytic water molecule was replaced by the side chain of a glutamic acid. Five out of seven designs expressed solubly and exhibited catalytic efficiencies similar to previously designed retroaldolases for the conversion of 4-hydroxy-4-(6-methoxy-2-naphthyl)-2-butanone to 6-methoxy-2-naphthaldehyde and acetone. After one round of site-directed saturation mutagenesis, improved variants of the two best designs, RA114 and RA117, exhibited among the highest kcat (>10(-3)s(-1)) and kcat/KM (11-25M(-1)s(-1)) values observed for retroaldolase designs prior to comprehensive directed evolution. In both cases, the >10(5)-fold rate accelerations that were achieved are within 1-3 orders of magnitude of the rate enhancements reported for the best catalysts for related reactions, including catalytic antibodies (kcat/kuncat=10(6) to 10(8)) and an extensively evolved computational design (kcat/kuncat>10(7)). The catalytic sites, revealed by X-ray structures of optimized versions of the two active designs, are in close agreement with the design models except for the catalytic lysine in RA114. We further improved the variants by computational remodeling of the loops and yeast display selection for reactivity of the catalytic lysine with a diketone probe, obtaining an additional order of magnitude enhancement in activity with both approaches. © 2013.

7 CFR 1215.14 - Processor.

Science.gov (United States)

2010-01-01

... 7 Agriculture 10 2010-01-01 2010-01-01 false Processor. 1215.14 Section 1215.14 Agriculture Regulations of the Department of Agriculture (Continued) AGRICULTURAL MARKETING SERVICE (MARKETING AGREEMENTS... CONSUMER INFORMATION Popcorn Promotion, Research, and Consumer Information Order Definitions § 1215.14...

Performance of Artificial Intelligence Workloads on the Intel Core 2 Duo Series Desktop Processors

Directory of Open Access Journals (Sweden)

Abdul Kareem PARCHUR

2010-12-01

Full Text Available As the processor architecture becomes more advanced, Intel introduced its Intel Core 2 Duo series processors. Performance impact on Intel Core 2 Duo processors are analyzed using SPEC CPU INT 2006 performance numbers. This paper studied the behavior of Artificial Intelligence (AI benchmarks on Intel Core 2 Duo series processors. Moreover, we estimated the task completion time (TCT @1 GHz, @2 GHz and @3 GHz Intel Core 2 Duo series processors frequency. Our results show the performance scalability in Intel Core 2 Duo series processors. Even though AI benchmarks have similar execution time, they have dissimilar characteristics which are identified using principal component analysis and dendogram. As the processor frequency increased from 1.8 GHz to 3.167 GHz the execution time is decreased by ~370 sec for AI workloads. In the case of Physics/Quantum Computing programs it was ~940 sec.

Photonics and Fiber Optics Processor Lab

Data.gov (United States)

Federal Laboratory Consortium — The Photonics and Fiber Optics Processor Lab develops, tests and evaluates high speed fiber optic network components as well as network protocols. In addition, this...

Study on treatment of distilled ammonia waste water from coke plant with activated carbon-NaClO catalytic oxidation method

Energy Technology Data Exchange (ETDEWEB)

Luo, D.; Yi, P.; Liu, J.; Chen, A. [Xiangtan Polytechnic University, Xiangtan (China). Dept. of Chemical Enginering

2001-12-01

Catalytic oxidation method for the treatment of distilled ammonia waste water from coke plant was investigated using activated carbon as catalyst and NaClO as oxidant. The influences of main factors, such as NaClO, activated carbon, pH and reactionary time were discussed. The results showed that under the conditions of 25{degree}C, NaClO/CODO=1.5, carbon/NaClO=0.6 and pH=3.0, the reaction completed within 120 minutes with 99.5% of phenol removal and 75.8% of COD removal when the distilled ammonia waste water from coke plant which containing phenol 510 mg/L and CODO 8420 mg/L was treated. 13 refs., 4 figs.

Slowdown in the $M/M/1$ discriminatory processor-sharing queue

NARCIS (Netherlands)

Cheung, S.K.; Kim, Bara; Kim, Jeongsim

2008-01-01

We consider a queue with multiple K job classes, Poisson arrivals, and exponentially distributed required service times in which a single processor serves according to the discriminatory processor-sharing (DPS) discipline. For this queue, we obtain the first and second moments of the slowdown, which

Preventing Precipitation in the ISS Urine Processor

Science.gov (United States)

Muirhead, Dean; Carter, Layne; Williamson, Jill; Chambers, Antja

2017-01-01

The ISS Urine Processor Assembly (UPA) was initially designed to achieve 85% recovery of water from pretreated urine on ISS. Pretreated urine is comprised of crew urine treated with flush water, an oxidant (chromium trioxide), and an inorganic acid (sulfuric acid) to control microbial growth and inhibit precipitation. Unfortunately, initial operation of the UPA on ISS resulted in the precipitation of calcium sulfate at 85% recovery. This occurred because the calcium concentration in the crew urine was elevated in microgravity due to bone loss. The higher calcium concentration precipitated with sulfate from the pretreatment acid, resulting in a failure of the UPA due to the accumulation of solids in the Distillation Assembly. Since this failure, the UPA has been limited to a reduced recovery of water from urine to prevent calcium sulfate from reaching the solubility limit. NASA personnel have worked to identify a solution that would allow the UPA to return to a nominal recovery rate of 85%. This effort has culminated with the development of a pretreatment based on phosphoric acid instead of sulfuric acid. By eliminating the sulfate associated with the pretreatment, the brine can be concentrated to a much higher concentration before calcium sulfate reach the solubility limit. This paper summarizes the development of this pretreatment and the testing performed to verify its implementation on ISS.

Online Fastbus processor for LEP

International Nuclear Information System (INIS)

Mueller, H.

1986-01-01

The author describes the online computing aspects of Fastbus systems using a processor module which has been developed at CERN and is now available commercially. These General Purpose Master/Slaves (GPMS) are based on 68000/10 (or optionally 68020/68881) processors. Applications include use as event-filters (DELPHI), supervisory controllers, Fastbus stand-alone diagnostic tools, and multiprocessor array components. The direct mapping of single, 32-bit assembly instructions to execute Fastbus protocols makes the use of a GPM both simple and flexible. Loosely coupled processing in Fastbus networks is possible between GPM's as they support access semaphores and use a two port memory as I/O buffer for Fastbus. Both master and slave-ports support block transfers up to 20 Mbytes/s. The CERN standard Fastbus software and the MoniCa symbolic debugging monitor are available on the GPM with real time, multiprocessing support. (Auth.)

Invasive tightly coupled processor arrays

CERN Document Server

LARI, VAHID

2016-01-01

This book introduces new massively parallel computer (MPSoC) architectures called invasive tightly coupled processor arrays. It proposes strategies, architecture designs, and programming interfaces for invasive TCPAs that allow invading and subsequently executing loop programs with strict requirements or guarantees of non-functional execution qualities such as performance, power consumption, and reliability. For the first time, such a configurable processor array architecture consisting of locally interconnected VLIW processing elements can be claimed by programs, either in full or in part, using the principle of invasive computing. Invasive TCPAs provide unprecedented energy efficiency for the parallel execution of nested loop programs by avoiding any global memory access such as GPUs and may even support loops with complex dependencies such as loop-carried dependencies that are not amenable to parallel execution on GPUs. For this purpose, the book proposes different invasion strategies for claiming a desire...

A Modular Pipelined Processor for High Resolution Gamma-Ray Spectroscopy

Science.gov (United States)

Veiga, Alejandro; Grunfeld, Christian

2016-02-01

The design of a digital signal processor for gamma-ray applications is presented in which a single ADC input can simultaneously provide temporal and energy characterization of gamma radiation for a wide range of applications. Applying pipelining techniques, the processor is able to manage and synchronize very large volumes of streamed real-time data. Its modular user interface provides a flexible environment for experimental design. The processor can fit in a medium-sized FPGA device operating at ADC sampling frequency, providing an efficient solution for multi-channel applications. Two experiments are presented in order to characterize its temporal and energy resolution.

A survey of Tumult, a real-time multi-processor system

International Nuclear Information System (INIS)

Jansen, P.G.

1986-01-01

Tumult (Twente University MULTi processor system) is the name of an ongoing project aiming at the design and implementation of a modular extendible multiprocessor system. All memory is distributed and processors communicate in parallel via a fast and reliable local switching network instead of a shared bus. A distributed real-time operating system is being designed and implemented, consisting of a multi-tasking subsystem per processor. Processes can communicate via a message passing mechanism. Communication links and processes are dynamically created and disposed by the application. In this article a brief description of the system is given; communication aspects are emphasized. (Auth.)

Reaction-diffusion path planning in a hybrid chemical and cellular-automaton processor

International Nuclear Information System (INIS)

Adamatzky, Andrew; Lacy Costello, Benjamin de

2003-01-01

To find the shortest collision-free path in a room containing obstacles we designed a chemical processor and coupled it with a cellular-automaton processor. In the chemical processor obstacles are represented by sites of high concentration of potassium iodide and a planar substrate is saturated with palladium chloride. Potassium iodide diffuses into the substrate and reacts with palladium chloride. A dark coloured precipitate of palladium iodide is formed almost everywhere except sites where two or more diffusion wavefronts collide. The less coloured sites are situated at the furthest distance from obstacles. Thus, the chemical processor develops a repulsive field, generated by obstacles. A snapshot of the chemical processor is inputted to a cellular automaton. The automaton behaves like a discrete excitable media; also, every cell of the automaton is supplied with a pointer that shows an origin of the cell's excitation. The excitation spreads along the cells corresponding to precipitate depleted sites of the chemical processor. When the destination-site is excited, waves travel on the lattice and update the orientations of the pointers. Thus, the automaton constructs a spanning tree, made of pointers, that guides a traveler towards the destination point. Thus, the automaton medium generates an attractive field and combination of this attractive field with the repulsive field, generated by the chemical processor, provides us with a solution of the collision-free path problem

A VAX-FPS Loosely-Coupled Array of Processors

International Nuclear Information System (INIS)

Grosdidier, G.

1987-03-01

The main features of a VAX-FPS Loosely-Coupled Array of Processors (LCAP) set-up and the implementation of a High Energy Physics tracking program for off-line purposes will be described. This LCAP consists of a VAX 11/750 host and two FPS 64 bit attached processors. Before analyzing the performances of this LCAP, its characteristics will be outlined, especially from a user's point of vue, and will be briefly compared to those of the IBM-FPS LCAP

Reducing Competitive Cache Misses in Modern Processor Architectures

OpenAIRE

Prisagjanec, Milcho; Mitrevski, Pece

2017-01-01

The increasing number of threads inside the cores of a multicore processor, and competitive access to the shared cache memory, become the main reasons for an increased number of competitive cache misses and performance decline. Inevitably, the development of modern processor architectures leads to an increased number of cache misses. In this paper, we make an attempt to implement a technique for decreasing the number of competitive cache misses in the first level of cache memory. This tec...

16-Bit RISC Processor Design for Convolution Application

OpenAIRE

Anand Nandakumar Shardul

2013-01-01

In this project, we propose a 16-bit non-pipelined RISC processor, which is used for signal processing applications. The processor consists of the blocks, namely, program counter, clock control unit, ALU, IDU and registers. Advantageous architectural modifications have been made in the incremented circuit used in program counter and carry select adder unit of the ALU in the RISC CPU core. Furthermore, a high speed and low power modified modifies multiplier has been designed and introduced in ...

Modal Processor Effects Inspired by Hammond Tonewheel Organs

Directory of Open Access Journals (Sweden)

Kurt James Werner

2016-06-01

Full Text Available In this design study, we introduce a novel class of digital audio effects that extend the recently introduced modal processor approach to artificial reverberation and effects processing. These pitch and distortion processing effects mimic the design and sonics of a classic additive-synthesis-based electromechanical musical instrument, the Hammond tonewheel organ. As a reverb effect, the modal processor simulates a room response as the sum of resonant filter responses. This architecture provides precise, interactive control over the frequency, damping, and complex amplitude of each mode. Into this framework, we introduce two types of processing effects: pitch effects inspired by the Hammond organ’s equal tempered “tonewheels”, “drawbar” tone controls, vibrato/chorus circuit, and distortion effects inspired by the pseudo-sinusoidal shape of its tonewheels and electromagnetic pickup distortion. The result is an effects processor that imprints the Hammond organ’s sonics onto any audio input.

Safety-critical Java on a time-predictable processor

DEFF Research Database (Denmark)

Korsholm, Stephan E.; Schoeberl, Martin; Puffitsch, Wolfgang

2015-01-01

For real-time systems the whole execution stack needs to be time-predictable and analyzable for the worst-case execution time (WCET). This paper presents a time-predictable platform for safety-critical Java. The platform consists of (1) the Patmos processor, which is a time-predictable processor......; (2) a C compiler for Patmos with support for WCET analysis; (3) the HVM, which is a Java-to-C compiler; (4) the HVM-SCJ implementation which supports SCJ Level 0, 1, and 2 (for both single and multicore platforms); and (5) a WCET analysis tool. We show that real-time Java programs translated to C...... and compiled to a Patmos binary can be analyzed by the AbsInt aiT WCET analysis tool. To the best of our knowledge the presented system is the second WCET analyzable real-time Java system; and the first one on top of a RISC processor....

Stepping motor control processor reference manual. Volume I

International Nuclear Information System (INIS)

Holloway, F.W.; VanArsdall, P.J.; Suski, G.J.; Gant, R.G.; Rash, M.

1980-01-01

This manual is intended to serve several purposes. The first goal is to describe the capabilities and operation of the SMC processor package from an operator or user point of view. Secondly, the manual will describe in some detail the basic hardware elements and how they can be used effectively to implement a step motor control system. Practical information on the use, installation and checkout of the hardware set is presented in the following sections along with programming suggestions. Available related system software is described in this manual for reference and as an aid in understanding the system architecture. Section two presents an overview and operations manual of the SMC processor describing its composition and functional capabilities. Section three contains hardware descriptions in some detail for the LLL-designed hardware used in the SMC processor. Basic theory of operation and important features are explained

The Interface Between Redundant Processor Modules Of Safety Grade PLC Using Mass Storage DPRAM

International Nuclear Information System (INIS)

Hwang, Sung Jae; Song, Seong Hwan; No, Young Hun; Yun, Dong Hwa; Park, Gang Min; Kim, Min Gyu; Choi, Kyung Chul; Lee, Ui Taek

2010-01-01

Processor module of safety grade PLC (hereinafter called as POSAFE-Q) developed by POSCO ICT provides high reliability and safety. However, POSAFEQ would have suffered a malfunction when we think taking place of abnormal operation by exceptional environmental. POSAFE-Q would not able to conduct its function normally in such case. To prevent these situations, the necessity of redundant processor module has been raised. Therefore, redundant processor module, NCPU-2Q, has been developed which has not only functions of single processor module with high reliability and safety but also functions of redundant processor

The performances of coffee processors and coffee market in the Republic of Serbia

Directory of Open Access Journals (Sweden)

Nuševa Daniela

2017-01-01

Full Text Available The main aim of this paper is to investigate the performances of coffee processors and coffee market in Serbia based on the market concentration analysis, profitability analysis, and profitability determinants analysis. The research was based on the sample of 40 observations of coffee processing companies divided into two groups: large and small coffee processors. The results indicate that two large coffee processors have dominant market share. Even though the Serbian coffee market is an oligopolistic, profitability analysis indicates that small coffee processors have a significant better profitability ratio than large coffee processors. Furthermore, results show that profitability ratio is positively related to the inventory turnover and negatively related to the market share.

Hardware Synchronization for Embedded Multi-Core Processors

DEFF Research Database (Denmark)

Stoif, Christian; Schoeberl, Martin; Liccardi, Benito

2011-01-01

Multi-core processors are about to conquer embedded systems — it is not the question of whether they are coming but how the architectures of the microcontrollers should look with respect to the strict requirements in the field. We present the step from one to multiple cores in this paper, establi......Multi-core processors are about to conquer embedded systems — it is not the question of whether they are coming but how the architectures of the microcontrollers should look with respect to the strict requirements in the field. We present the step from one to multiple cores in this paper...

The microelectronic and photonic test bed RISC processor and DRAM memory stack experiments

International Nuclear Information System (INIS)

Clark, K.A.; Meehan, T.J.

1999-01-01

This paper reports on the on-orbit data obtained from the MPTB RISC Processor Experiment, containing three Integrated Device Technologies R3081 processors. During operations, nine SEUs were observed in the processors, and four SEUs were observed in the memory and/or support circuitry. (authors)

Digital image processing software system using an array processor

International Nuclear Information System (INIS)

Sherwood, R.J.; Portnoff, M.R.; Journeay, C.H.; Twogood, R.E.

1981-01-01

A versatile array processor-based system for general-purpose image processing was developed. At the heart of this system is an extensive, flexible software package that incorporates the array processor for effective interactive image processing. The software system is described in detail, and its application to a diverse set of applications at LLNL is briefly discussed. 4 figures, 1 table

Embedded Processor Based Automatic Temperature Control of VLSI Chips

Directory of Open Access Journals (Sweden)

Narasimha Murthy Yayavaram

2009-01-01

Full Text Available This paper presents embedded processor based automatic temperature control of VLSI chips, using temperature sensor LM35 and ARM processor LPC2378. Due to the very high packing density, VLSI chips get heated very soon and if not cooled properly, the performance is very much affected. In the present work, the sensor which is kept very near proximity to the IC will sense the temperature and the speed of the fan arranged near to the IC is controlled based on the PWM signal generated by the ARM processor. A buzzer is also provided with the hardware, to indicate either the failure of the fan or overheating of the IC. The entire process is achieved by developing a suitable embedded C program.

Hydrophilic Pt nanoflowers: synthesis, crystallographic analysis and catalytic performance.

Science.gov (United States)

Mourdikoudis, Stefanos; Altantzis, Thomas; Liz-Marzán, Luis M; Bals, Sara; Pastoriza-Santos, Isabel; Pérez-Juste, Jorge

2016-05-21

Water-soluble Pt nanoflowers (NFs) were prepared by diethylene glycol-mediated reduction of Pt acetylacetonate (Pt(acac) 2 ) in the presence of polyethylenimine. Advanced electron microscopy analysis showed that the NFs consist of multiple branches with a truncated cubic morphology and different crystallographic orientations. We demonstrate that the nature of the solvent strongly influences the resulting morphology. The catalytic performance of the Pt NFs in 4-nitrophenol reduction was found to be superior to that of other nanoparticle-based catalysts. Additionally, the Pt NFs display good catalytic reusability with no loss of activity after five consecutive cycles.

Catalytic pyrolysis of microalgae to high-quality liquid bio-fuels

International Nuclear Information System (INIS)

Babich, I.V.; Hulst, M. van der; Lefferts, L.; Moulijn, J.A.; O'Connor, P.; Seshan, K.

2011-01-01

The pyrolytic conversion of chlorella algae to liquid fuel precursor in presence of a catalyst (Na 2 CO 3 ) has been studied. Thermal decomposition studies of the algae samples were performed using TGA coupled with MS. Liquid oil samples were collected from pyrolysis experiments in a fixed-bed reactor and characterized for water content and heating value. The oil composition was analyzed by GC-MS. Pretreatment of chlorella with Na 2 CO 3 influences the primary conversion of chlorella by shifting the decomposition temperature to a lower value. In the presence of Na 2 CO 3 , gas yield increased and liquid yield decreased when compared with non-catalytic pyrolysis at the same temperatures. However, pyrolysis oil from catalytic runs carries higher heating value and lower acidity. Lower content of acids in the bio-oil, higher aromatics, combined with higher heating value show promise for production of high-quality bio-oil from algae via catalytic pyrolysis, resulting in energy recovery in bio-oil of 40%. -- Highlights: → The pyrolytic catalytic conversion of chlorella algae to liquid fuel precursor. → Na 2 CO 3 as a catalyst for the primary conversion of chlorella. → Pyrolysis oil from catalytic runs carries higher heating value and lower acidity. → High-quality bio-oil from algae via catalytic pyrolysis with energy recovery in bio-oil of 40%.

gFEX, the ATLAS Calorimeter Level-1 Real Time Processor

CERN Document Server

AUTHOR|(SzGeCERN)759889; The ATLAS collaboration; Begel, Michael; Chen, Hucheng; Lanni, Francesco; Takai, Helio; Wu, Weihao

2016-01-01

The global feature extractor (gFEX) is a component of the Level-1 Calorimeter trigger Phase-I upgrade for the ATLAS experiment. It is intended to identify patterns of energy associated with the hadronic decays of high momentum Higgs, W, & Z bosons, top quarks, and exotic particles in real time at the LHC crossing rate. The single processor board will be packaged in an Advanced Telecommunications Computing Architecture (ATCA) module and implemented as a fast reconfigurable processor based on three Xilinx Vertex Ultra-scale FPGAs. The board will receive coarse-granularity information from all the ATLAS calorimeters on 276 optical fibers with the data transferred at the 40 MHz Large Hadron Collider (LHC) clock frequency. The gFEX will be controlled by a single system-on-chip processor, ZYNQ, that will be used to configure all the processor Field-Programmable Gate Array (FPGAs), monitor board health, and interface to external signals. Now, the pre-prototype board which includes one ZYNQ and one Vertex-7 FPGA ...

gFEX, the ATLAS Calorimeter Level 1 Real Time Processor

CERN Document Server

Tang, Shaochun; The ATLAS collaboration

2015-01-01

The global feature extractor (gFEX) is a component of the Level-1Calorimeter trigger Phase-I upgrade for the ATLAS experiment. It is intended to identify patterns of energy associated with the hadronic decays of high momentum Higgs, W, & Z bosons, top quarks, and exotic particles in real time at the LHC crossing rate. The single processor board will be packaged in an Advanced Telecommunications Computing Architecture (ATCA) module and implemented as a fast reconfigurable processor based on three Xilinx Ultra-scale FPGAs. The board will receive coarse-granularity information from all the ATLAS calorimeters on 264 optical fibers with the data transferred at the 40 MHz LHC clock frequency. The gFEX will be controlled by a single system-on-chip processor, ZYNQ, that will be used to configure all the processor FPGAs, monitor board health, and interface to external signals. Now, the pre-prototype board which includes one ZYNQ and one Vertex-7 FPGA has been designed for testing and verification. The performance ...

Scientific programming on massively parallel processor CP-PACS

International Nuclear Information System (INIS)

Boku, Taisuke

1998-01-01

The massively parallel processor CP-PACS takes various problems of calculation physics as the object, and it has been designed so that its architecture has been devised to do various numerical processings. In this report, the outline of the CP-PACS and the example of programming in the Kernel CG benchmark in NAS Parallel Benchmarks, version 1, are shown, and the pseudo vector processing mechanism and the parallel processing tuning of scientific and technical computation utilizing the three-dimensional hyper crossbar net, which are two great features of the architecture of the CP-PACS are described. As for the CP-PACS, the PUs based on RISC processor and added with pseudo vector processor are used. Pseudo vector processing is realized as the loop processing by scalar command. The features of the connection net of PUs are explained. The algorithm of the NPB version 1 Kernel CG is shown. The part that takes the time for processing most in the main loop is the product of matrix and vector (matvec), and the parallel processing of the matvec is explained. The time for the computation by the CPU is determined. As the evaluation of the performance, the evaluation of the time for execution, the short vector processing of pseudo vector processor based on slide window, and the comparison with other parallel computers are reported. (K.I.)

Catalytic methods using molecular oxygen for treatment of PMMS and ECLSS waste streams, volume 2

Science.gov (United States)

Akse, James R.

1992-01-01

Catalytic oxidation has proven to be an effective addition to the baseline sorption, ion exchange water reclamation technology which will be used on Space Station Freedom (SSF). Low molecular weight, polar organics such as alcohols, aldehydes, ketones, amides, and thiocarbamides which are poorly removed by the baseline multifiltration (MF) technology can be oxidized to carbon dioxide at low temperature (121 C). The catalytic oxidation process by itself can reduce the Total Organic Carbon (TOC) to below 500 ppb for solutions designed to model these waste waters. Individual challenges by selected contaminants have shown only moderate selectivity towards particular organic species. The combined technology is applicable to the more complex waste water generated in the Process Materials Management System (PMMS) and Environmental Control and Life Support System (ECLSS) aboard SSF. During the phase 3 Core Module Integrated Facility (CMIF) water recovery tests at NASA MSFC, real hygiene waste water and humidity condensate were processed to meet potable specifications by the combined technology. A kinetic study of catalytic oxidation demonstrates that the Langmuir-Hinshelwood rate equation for heterogeneous catalysts accurately represent the kinetic behavior. From this relationship, activation energy and rate constants for acetone were determined.

Investigation of Large Scale Cortical Models on Clustered Multi-Core Processors

Science.gov (United States)

2013-02-01

Playstation 3 with 6 available SPU cores outperforms the Intel Xeon processor (with 4 cores) by about 1.9 times for the HTM model and by 2.4 times...runtime breakdowns of the HTM and Dean models respectively on the Cell processor (on the Playstation 3) and the Intel Xeon processor ( 4 thread...YOUR FORM TO THE ABOVE ORGANIZATION. 1. REPORT DATE (DD-MM-YYYY) 2. REPORT TYPE 3. DATES COVERED (From - To) 4 . TITLE AND SUBTITLE 5a. CONTRACT NUMBER

Opportunities and Best Practices to Support Sustainable Production for Small Growers and Post-Harvest Processors in Southern California

Science.gov (United States)

Fissore, Cinzia; Duran, Daniel F.; Russell, Robert

2015-01-01

This article describes current practices and needs associated with water and gas conservation among Southern California greenhouse growers, Post-Harvest Processors (PHPs), and agricultural associations. Two communication forums were held with the goal of educating the local gas company and small growers and PHPs on the most compelling needs and…

Automation of ORIGEN2 calculations for the transuranic waste baseline inventory database using a pre-processor and a post-processor

International Nuclear Information System (INIS)

Liscum-Powell, J.

1997-06-01

The purpose of the work described in this report was to automate ORIGEN2 calculations for the Waste Isolation Pilot Plant (WIPP) Transuranic Waste Baseline Inventory Database (WTWBID); this was done by developing a pre-processor to generate ORIGEN2 input files from WWBID inventory files and a post-processor to remove excess information from the ORIGEN2 output files. The calculations performed with ORIGEN2 estimate the radioactive decay and buildup of various radionuclides in the waste streams identified in the WTWBID. The resulting radionuclide inventories are needed for performance assessment calculations for the WIPP site. The work resulted in the development of PreORG, which requires interaction with the user to generate ORIGEN2 input files on a site-by-site basis, and PostORG, which processes ORIGEN2 output into more manageable files. Both programs are written in the FORTRAN 77 computer language. After running PreORG, the user will run ORIGEN2 to generate the desired data; upon completion of ORIGEN2 calculations, the user can run PostORG to process the output to make it more manageable. All the programs run on a 386 PC or higher with a math co-processor or a computer platform running under VMS operating system. The pre- and post-processors for ORIGEN2 were generated for use with Rev. 1 data of the WTWBID and can also be used with Rev. 2 and 3 data of the TWBID (Transuranic Waste Baseline Inventory Database)

A design of a computer complex including vector processors

International Nuclear Information System (INIS)

Asai, Kiyoshi

1982-12-01

We, members of the Computing Center, Japan Atomic Energy Research Institute have been engaged for these six years in the research of adaptability of vector processing to large-scale nuclear codes. The research has been done in collaboration with researchers and engineers of JAERI and a computer manufacturer. In this research, forty large-scale nuclear codes were investigated from the viewpoint of vectorization. Among them, twenty-six codes were actually vectorized and executed. As the results of the investigation, it is now estimated that about seventy percents of nuclear codes and seventy percents of our total amount of CPU time of JAERI are highly vectorizable. Based on the data obtained by the investigation, (1)currently vectorizable CPU time, (2)necessary number of vector processors, (3)necessary manpower for vectorization of nuclear codes, (4)computing speed, memory size, number of parallel 1/0 paths, size and speed of 1/0 buffer of vector processor suitable for our applications, (5)necessary software and operational policy for use of vector processors are discussed, and finally (6)a computer complex including vector processors is presented in this report. (author)

Parallel computation for distributed parameter system-from vector processors to Adena computer

Energy Technology Data Exchange (ETDEWEB)

Nogi, T

1983-04-01

Research on advanced parallel hardware and software architectures for very high-speed computation deserves and needs more support and attention to fulfil its promise. Novel architectures for parallel processing are being made ready. Architectures for parallel processing can be roughly divided into two groups. One is a vector processor in which a single central processing unit involves multiple vector-arithmetic registers. The other is a processor array in which slave processors are connected to a host processor to perform parallel computation. In this review, the concept and data structure of the Adena (alternating-direction edition nexus array) architecture, which is conformable to distributed-parameter simulation algorithms, are described. 5 references.

Digital control card based on digital signal processor

International Nuclear Information System (INIS)

Hou Shigang; Yin Zhiguo; Xia Le

2008-01-01

A digital control card based on digital signal processor was developed. Two Freescale DSP-56303 processors were utilized to achieve 3 channels proportional- integral-differential regulations. The card offers high flexibility for 100 MeV cyclotron RF system development. It was used as feedback controller in low level radio frequency control prototype, with the feedback gain parameters continuously adjustable. By using high precision analog to digital converter with 500 kHz sampling rate, a regulation bandwidth of 20 kHz was achieved. (authors)

Low and medium heating value coal gas catalytic combustor characterization

Science.gov (United States)

Schwab, J. A.

1982-01-01

Catalytic combustion with both low and medium heating value coal gases obtained from an operating gasifier was demonstrated. A practical operating range for efficient operation was determined, and also to identify potential problem areas were identified for consideration during stationary gas turbine engine design. The test rig consists of fuel injectors, a fuel-air premixing section, a catalytic reactor with thermocouple instrumentation and a single point, water cooled sample probe. The test rig included inlet and outlet transition pieces and was designed for installation into an existing test loop.

Catalytic combustion for the elimination of methane, BTEX and other VOC : IV

International Nuclear Information System (INIS)

Hayes, R.E.; Wanke, S.E.

2008-01-01

Options for volatile organic compound combustion include homogeneous combustion (flaring) or catalytic combustion involving a flameless combustion process that uses a solid catalyst to promote the combustion reaction. This presentation discussed relative reactivity testing for volatile organic compounds (VOCs) over commercial catalysts. Several commercial pad catalysts were tested, as well as other powders. The relative reactivity of methane as well as benzene, toluene, ethylbenzene, and xylene (BTEX) were investigated. The purpose of the project was to evaluate combustion of concentrated methane streams that contained BTEX compounds; evaluate catalytic combustion using a counter diffusive radiant heater; develop mathematical models for the reactor to enhance design and understanding; improve the catalyst for BTEX combustion; and target application-dehydrator units. Topics that were addressed in the presentation included methane and benzene conversion; catalytic radiant heaters; small industrial and commercial units; measured temperature distribution; fuel slippage, methane conversion; the effect of water and hydrocarbons; the effect of water-liquid injection; and water addition as vapour. Several observations were offered, including that high percentages of injected liquid water can reduce reactor operating temperature; combustion of BTEX remained highly efficient, however liquid injection could also cause temperature reductions and ultimately the reactor would extinguish; and pre-heating the feed can eliminate the temperature drop and pad wetness problem. It was concluded that BTEX compounds are reactive, and the technology appears promising. 19 figs

Catalytic combustion for the elimination of methane, BTEX and other VOC : IV

Energy Technology Data Exchange (ETDEWEB)

Hayes, R.E.; Wanke, S.E. [Alberta Univ., Edmonton, AB (Canada). Dept. of Chemical and Materials Engineering

2008-07-01

Options for volatile organic compound combustion include homogeneous combustion (flaring) or catalytic combustion involving a flameless combustion process that uses a solid catalyst to promote the combustion reaction. This presentation discussed relative reactivity testing for volatile organic compounds (VOCs) over commercial catalysts. Several commercial pad catalysts were tested, as well as other powders. The relative reactivity of methane as well as benzene, toluene, ethylbenzene, and xylene (BTEX) were investigated. The purpose of the project was to evaluate combustion of concentrated methane streams that contained BTEX compounds; evaluate catalytic combustion using a counter diffusive radiant heater; develop mathematical models for the reactor to enhance design and understanding; improve the catalyst for BTEX combustion; and target application-dehydrator units. Topics that were addressed in the presentation included methane and benzene conversion; catalytic radiant heaters; small industrial and commercial units; measured temperature distribution; fuel slippage, methane conversion; the effect of water and hydrocarbons; the effect of water-liquid injection; and water addition as vapour. Several observations were offered, including that high percentages of injected liquid water can reduce reactor operating temperature; combustion of BTEX remained highly efficient, however liquid injection could also cause temperature reductions and ultimately the reactor would extinguish; and pre-heating the feed can eliminate the temperature drop and pad wetness problem. It was concluded that BTEX compounds are reactive, and the technology appears promising. 19 figs.

Treecode with a Special-Purpose Processor

Science.gov (United States)

Makino, Junichiro

1991-08-01

We describe an implementation of the modified Barnes-Hut tree algorithm for a gravitational N-body calculation on a GRAPE (GRAvity PipE) backend processor. GRAPE is a special-purpose computer for N-body calculations. It receives the positions and masses of particles from a host computer and then calculates the gravitational force at each coordinate specified by the host. To use this GRAPE processor with the hierarchical tree algorithm, the host computer must maintain a list of all nodes that exert force on a particle. If we create this list for each particle of the system at each timestep, the number of floating-point operations on the host and that on GRAPE would become comparable, and the increased speed obtained by using GRAPE would be small. In our modified algorithm, we create a list of nodes for many particles. Thus, the amount of the work required of the host is significantly reduced. This algorithm was originally developed by Barnes in order to vectorize the force calculation on a Cyber 205. With this algorithm, the computing time of the force calculation becomes comparable to that of the tree construction, if the GRAPE backend processor is sufficiently fast. The obtained speed-up factor is 30 to 50 for a RISC-based host computer and GRAPE-1A with a peak speed of 240 Mflops.

Token-Aware Completion Functions for Elastic Processor Verification

Directory of Open Access Journals (Sweden)

Sudarshan K. Srinivasan

2009-01-01

Full Text Available We develop a formal verification procedure to check that elastic pipelined processor designs correctly implement their instruction set architecture (ISA specifications. The notion of correctness we use is based on refinement. Refinement proofs are based on refinement maps, which—in the context of this problem—are functions that map elastic processor states to states of the ISA specification model. Data flow in elastic architectures is complicated by the insertion of any number of buffers in any place in the design, making it hard to construct refinement maps for elastic systems in a systematic manner. We introduce token-aware completion functions, which incorporate a mechanism to track the flow of data in elastic pipelines, as a highly automated and systematic approach to construct refinement maps. We demonstrate the efficiency of the overall verification procedure based on token-aware completion functions using six elastic pipelined processor models based on the DLX architecture.

Soft-core dataflow processor architecture optimised for radar signal processing: Article

CSIR Research Space (South Africa)

Broich, R

2014-10-01

Full Text Available Current radar signal processors lack either performance or flexibility. Custom soft-core processors exhibit potential in high-performance signal processing applications, yet remain relatively unexplored in research literature. In this paper, we use...

Merged ozone profiles from four MIPAS processors

Science.gov (United States)

Laeng, Alexandra; von Clarmann, Thomas; Stiller, Gabriele; Dinelli, Bianca Maria; Dudhia, Anu; Raspollini, Piera; Glatthor, Norbert; Grabowski, Udo; Sofieva, Viktoria; Froidevaux, Lucien; Walker, Kaley A.; Zehner, Claus

2017-04-01

The Michelson Interferometer for Passive Atmospheric Sounding (MIPAS) was an infrared (IR) limb emission spectrometer on the Envisat platform. Currently, there are four MIPAS ozone data products, including the operational Level-2 ozone product processed at ESA, with the scientific prototype processor being operated at IFAC Florence, and three independent research products developed by the Istituto di Fisica Applicata Nello Carrara (ISAC-CNR)/University of Bologna, Oxford University, and the Karlsruhe Institute of Technology-Institute of Meteorology and Climate Research/Instituto de Astrofísica de Andalucía (KIT-IMK/IAA). Here we present a dataset of ozone vertical profiles obtained by merging ozone retrievals from four independent Level-2 MIPAS processors. We also discuss the advantages and the shortcomings of this merged product. As the four processors retrieve ozone in different parts of the spectra (microwindows), the source measurements can be considered as nearly independent with respect to measurement noise. Hence, the information content of the merged product is greater and the precision is better than those of any parent (source) dataset. The merging is performed on a profile per profile basis. Parent ozone profiles are weighted based on the corresponding error covariance matrices; the error correlations between different profile levels are taken into account. The intercorrelations between the processors' errors are evaluated statistically and are used in the merging. The height range of the merged product is 20-55 km, and error covariance matrices are provided as diagnostics. Validation of the merged dataset is performed by comparison with ozone profiles from ACE-FTS (Atmospheric Chemistry Experiment-Fourier Transform Spectrometer) and MLS (Microwave Limb Sounder). Even though the merging is not supposed to remove the biases of the parent datasets, around the ozone volume mixing ratio peak the merged product is found to have a smaller (up to 0.1 ppmv

Keystone Business Models for Network Security Processors

Directory of Open Access Journals (Sweden)

Arthur Low

2013-07-01

Full Text Available Network security processors are critical components of high-performance systems built for cybersecurity. Development of a network security processor requires multi-domain experience in semiconductors and complex software security applications, and multiple iterations of both software and hardware implementations. Limited by the business models in use today, such an arduous task can be undertaken only by large incumbent companies and government organizations. Neither the “fabless semiconductor” models nor the silicon intellectual-property licensing (“IP-licensing” models allow small technology companies to successfully compete. This article describes an alternative approach that produces an ongoing stream of novel network security processors for niche markets through continuous innovation by both large and small companies. This approach, referred to here as the "business ecosystem model for network security processors", includes a flexible and reconfigurable technology platform, a “keystone” business model for the company that maintains the platform architecture, and an extended ecosystem of companies that both contribute and share in the value created by innovation. New opportunities for business model innovation by participating companies are made possible by the ecosystem model. This ecosystem model builds on: i the lessons learned from the experience of the first author as a senior integrated circuit architect for providers of public-key cryptography solutions and as the owner of a semiconductor startup, and ii the latest scholarly research on technology entrepreneurship, business models, platforms, and business ecosystems. This article will be of interest to all technology entrepreneurs, but it will be of particular interest to owners of small companies that provide security solutions and to specialized security professionals seeking to launch their own companies.

A comparison study of the start-up of a MnOx filter for catalytic oxidative removal of ammonium from groundwater and surface water.

Science.gov (United States)

Cheng, Ya; Li, Ye; Huang, Tinglin; Sun, Yuankui; Shi, Xinxin; Shao, Yuezong

2018-03-01

As an efficient method for ammonium (NH 4 + ) removal, contact catalytic oxidation technology has drawn much attention recently, due to its good low temperature resistance and short start-up period. Two identical filters were employed to compare the process for ammonium removal during the start-up period for ammonium removal in groundwater (Filter-N) and surface water (Filter-S) treatment. Two types of source water (groundwater and surface water) were used as the feed waters for the filtration trials. Although the same initiating method was used, Filter-N exhibited much better ammonium removal performance than Filter-S. The differences in catalytic activity among these two filters were probed using X-ray diffraction (XRD), scanning electron microscopy (SEM), X-ray photoelectron spectroscopy (XPS), and compositional analysis. XRD results indicated that different manganese oxide species were formed in Filter-N and Filter-S. Furthermore, the Mn3p XPS spectra taken on the surface of the filter films revealed that the average manganese valence of the inactive manganese oxide film collected from Filter-S (FS-MnO x ) was higher than in the film collected from Filter-N (FN-MnO x ). Mn(IV) was identified as the predominant oxidation state in FS-MnO x and Mn(III) was identified as the predominant oxidation state in FN-MnO x . The results of compositional analyses suggested that polyaluminum ferric chloride (PAFC) used during the surface water treatment was an important factor in the mineralogy and reactivity of MnO x . This study provides the theoretical basis for promoting the wide application of the technology and has great practical significance. Copyright © 2017. Published by Elsevier B.V.

Demonstration of two-qubit algorithms with a superconducting quantum processor.

Science.gov (United States)

DiCarlo, L; Chow, J M; Gambetta, J M; Bishop, Lev S; Johnson, B R; Schuster, D I; Majer, J; Blais, A; Frunzio, L; Girvin, S M; Schoelkopf, R J

2009-07-09

Quantum computers, which harness the superposition and entanglement of physical states, could outperform their classical counterparts in solving problems with technological impact-such as factoring large numbers and searching databases. A quantum processor executes algorithms by applying a programmable sequence of gates to an initialized register of qubits, which coherently evolves into a final state containing the result of the computation. Building a quantum processor is challenging because of the need to meet simultaneously requirements that are in conflict: state preparation, long coherence times, universal gate operations and qubit readout. Processors based on a few qubits have been demonstrated using nuclear magnetic resonance, cold ion trap and optical systems, but a solid-state realization has remained an outstanding challenge. Here we demonstrate a two-qubit superconducting processor and the implementation of the Grover search and Deutsch-Jozsa quantum algorithms. We use a two-qubit interaction, tunable in strength by two orders of magnitude on nanosecond timescales, which is mediated by a cavity bus in a circuit quantum electrodynamics architecture. This interaction allows the generation of highly entangled states with concurrence up to 94 per cent. Although this processor constitutes an important step in quantum computing with integrated circuits, continuing efforts to increase qubit coherence times, gate performance and register size will be required to fulfil the promise of a scalable technology.

Advanced Avionics and Processor Systems for a Flexible Space Exploration Architecture

Science.gov (United States)

Keys, Andrew S.; Adams, James H.; Smith, Leigh M.; Johnson, Michael A.; Cressler, John D.

2010-01-01

The Advanced Avionics and Processor Systems (AAPS) project, formerly known as the Radiation Hardened Electronics for Space Environments (RHESE) project, endeavors to develop advanced avionic and processor technologies anticipated to be used by NASA s currently evolving space exploration architectures. The AAPS project is a part of the Exploration Technology Development Program, which funds an entire suite of technologies that are aimed at enabling NASA s ability to explore beyond low earth orbit. NASA s Marshall Space Flight Center (MSFC) manages the AAPS project. AAPS uses a broad-scoped approach to developing avionic and processor systems. Investment areas include advanced electronic designs and technologies capable of providing environmental hardness, reconfigurable computing techniques, software tools for radiation effects assessment, and radiation environment modeling tools. Near-term emphasis within the multiple AAPS tasks focuses on developing prototype components using semiconductor processes and materials (such as Silicon-Germanium (SiGe)) to enhance a device s tolerance to radiation events and low temperature environments. As the SiGe technology will culminate in a delivered prototype this fiscal year, the project emphasis shifts its focus to developing low-power, high efficiency total processor hardening techniques. In addition to processor development, the project endeavors to demonstrate techniques applicable to reconfigurable computing and partially reconfigurable Field Programmable Gate Arrays (FPGAs). This capability enables avionic architectures the ability to develop FPGA-based, radiation tolerant processor boards that can serve in multiple physical locations throughout the spacecraft and perform multiple functions during the course of the mission. The individual tasks that comprise AAPS are diverse, yet united in the common endeavor to develop electronics capable of operating within the harsh environment of space. Specifically, the AAPS tasks for

Catalytic Activity Control via Crossover between Two Different Microstructures

KAUST Repository

Zhou, Yuheng

2017-09-08

Metal nanocatalysts hold great promise for a wide range of heterogeneous catalytic reactions, while the optimization strategy of catalytic activity is largely restricted by particle size or shape control. Here, we demonstrate that a reversible microstructural control through the crossover between multiply-twinned nanoparticle (MTP) and single crystal (SC) can be readily achieved by solvent post-treatment on gold nanoparticles (AuNPs). Polar solvents (e.g. water, methanol) direct the transformation from MTP to SC accompanied by the disappearance of twinning and stacking faults. A reverse transformation from SC to MTP is achieved in non-polar solvent (e.g. toluene) mixed with thiol ligands. The transformation between two different microstructures is directly observed by in-situ TEM and leads to a drastic modulation of catalytic activity towards the gas-phase selective oxidation of alcohols. There is a quasi-linear relationship between TOFs and MTP concentrations. Based on the combined experimental and theoretical investigations of alcohol chemisorption on these nanocatalysts, we propose that the exposure of {211}-like microfacets associated with twin boundaries and stack faults accounts for the strong chemisorption of alcohol molecules on MTP AuNPs and thus the exceptionally high catalytic activity.

OLYMPUS system and development of its pre-processor

International Nuclear Information System (INIS)

Okamoto, Masao; Takeda, Tatsuoki; Tanaka, Masatoshi; Asai, Kiyoshi; Nakano, Koh.

1977-08-01

The OLYMPUS SYSTEM developed by K. V. Roverts et al. was converted and introduced in computer system FACOM 230/75 of the JAERI Computing Center. A pre-processor was also developed for the OLYMPUS SYSTEM. The OLYMPUS SYSTEM is very useful for development, standardization and exchange of programs in thermonuclear fusion research and plasma physics. The pre-processor developed by the present authors is not only essential for the JAERI OLYMPUS SYSTEM, but also useful in manipulation, creation and correction of program files. (auth.)

A fast processor for di-lepton triggers

CERN Document Server

Kostarakis, P; Barsotti, E; Conetti, S; Cox, B; Enagonio, J; Haldeman, M; Haynes, W; Katsanevas, S; Kerns, C; Lebrun, P; Smith, H; Soszyniski, T; Stoffel, J; Treptow, K; Turkot, F; Wagner, R

1981-01-01

As a new application of the Fermilab ECL-CAMAC logic modules a fast trigger processor was developed for Fermilab experiment E-537, aiming to measure the higher mass di-muon production by antiprotons. The processor matches the hit information received from drift chambers and scintillation counters, to find candidate muon tracks and determine their directions and momenta. The tracks are then paired to compute an invariant mass: when the computed mass falls within the desired range, the event is accepted. The process is accomplished in times of 5 to 10 microseconds, while achieving a trigger rate reduction of up to a factor of ten. (5 refs).

Time Manager Software for a Flight Processor

Science.gov (United States)

Zoerne, Roger

2012-01-01

Data analysis is a process of inspecting, cleaning, transforming, and modeling data to highlight useful information and suggest conclusions. Accurate timestamps and a timeline of vehicle events are needed to analyze flight data. By moving the timekeeping to the flight processor, there is no longer a need for a redundant time source. If each flight processor is initially synchronized to GPS, they can freewheel and maintain a fairly accurate time throughout the flight with no additional GPS time messages received. How ever, additional GPS time messages will ensure an even greater accuracy. When a timestamp is required, a gettime function is called that immediately reads the time-base register.

Bulk-memory processor for data acquisition

International Nuclear Information System (INIS)

Nelson, R.O.; McMillan, D.E.; Sunier, J.W.; Meier, M.; Poore, R.V.

1981-01-01

To meet the diverse needs and data rate requirements at the Van de Graaff and Weapons Neutron Research (WNR) facilities, a bulk memory system has been implemented which includes a fast and flexible processor. This bulk memory processor (BMP) utilizes bit slice and microcode techniques and features a 24 bit wide internal architecture allowing direct addressing of up to 16 megawords of memory and histogramming up to 16 million counts per channel without overflow. The BMP is interfaced to the MOSTEK MK 8000 bulk memory system and to the standard MODCOMP computer I/O bus. Coding for the BMP both at the microcode level and with macro instructions is supported. The generalized data acquisition system has been extended to support the BMP in a manner transparent to the user

RISC Processors and High Performance Computing

Science.gov (United States)

Bailey, David H.; Saini, Subhash; Craw, James M. (Technical Monitor)

1995-01-01

This tutorial will discuss the top five RISC microprocessors and the parallel systems in which they are used. It will provide a unique cross-machine comparison not available elsewhere. The effective performance of these processors will be compared by citing standard benchmarks in the context of real applications. The latest NAS Parallel Benchmarks, both absolute performance and performance per dollar, will be listed. The next generation of the NPB will be described. The tutorial will conclude with a discussion of future directions in the field. Technology Transfer Considerations: All of these computer systems are commercially available internationally. Information about these processors is available in the public domain, mostly from the vendors themselves. The NAS Parallel Benchmarks and their results have been previously approved numerous times for public release, beginning back in 1991.

Reduced power processor requirements for the 30-cm diameter HG ion thruster

Science.gov (United States)

Rawlin, V. K.

1979-01-01

The characteristics of power processors strongly impact the overall performance and cost of electric propulsion systems. A program was initiated to evaluate simplifications of the thruster-power processor interface requirements. The power processor requirements are mission dependent with major differences arising for those missions which require a nearly constant thruster operating point (typical of geocentric and some inbound planetary missions) and those requiring operation over a large range of input power (such as outbound planetary missions). This paper describes the results of tests which have indicated that as many as seven of the twelve power supplies may be eliminated from the present Functional Model Power Processor used with 30-cm diameter Hg ion thrusters.

Sensitometric Control of Automatic Processors in a Hospital Center : Retrospective Study

International Nuclear Information System (INIS)

Lobato Busto, R.; Pombar Camean, M.

1992-01-01

This paper analyses the results obtained between February (1990) and July (1991) of the sensitometric control of the seven automatic processors which are in Hospital General de Galicia-Clinico Universitario (Santiago de Compostela). The deviations with regard to the reference values of each processor, permitting the precocious detection of disturbances before being revealed by the image, were analysed. In this analysis, it was achieved that the days in which the automatic processors were out of standing only varied between 2.3% and 5% from the checked days. (author)

Rational calculation accuracy in acousto-optical matrix-vector processor

Science.gov (United States)

Oparin, V. V.; Tigin, Dmitry V.

1994-01-01

The high speed of parallel computations for a comparatively small-size processor and acceptable power consumption makes the usage of acousto-optic matrix-vector multiplier (AOMVM) attractive for processing of large amounts of information in real time. The limited accuracy of computations is an essential disadvantage of such a processor. The reduced accuracy requirements allow for considerable simplification of the AOMVM architecture and the reduction of the demands on its components.

Steam reformer with catalytic combustor

Science.gov (United States)

Voecks, Gerald E. (Inventor)

1990-01-01

A steam reformer is disclosed having an annular steam reforming catalyst bed formed by concentric cylinders and having a catalytic combustor located at the center of the innermost cylinder. Fuel is fed into the interior of the catalytic combustor and air is directed at the top of the combustor, creating a catalytic reaction which provides sufficient heat so as to maintain the catalytic reaction in the steam reforming catalyst bed. Alternatively, air is fed into the interior of the catalytic combustor and a fuel mixture is directed at the top. The catalytic combustor provides enhanced radiant and convective heat transfer to the reformer catalyst bed.

Post-silicon and runtime verification for modern processors

CERN Document Server

Wagner, Ilya

2010-01-01

The purpose of this book is to survey the state of the art and evolving directions in post-silicon and runtime verification. The authors start by giving an overview of the state of the art in verification, particularly current post-silicon methodologies in use in the industry, both for the domain of processor pipeline design and for memory subsystems. They then dive into the presentation of several new post-silicon verification solutions aimed at boosting the verification coverage of modern processors, dedicating several chapters to this topic. The presentation of runtime verification solution

Ring-array processor distribution topology for optical interconnects

Science.gov (United States)

Li, Yao; Ha, Berlin; Wang, Ting; Wang, Sunyu; Katz, A.; Lu, X. J.; Kanterakis, E.

1992-01-01

The existing linear and rectangular processor distribution topologies for optical interconnects, although promising in many respects, cannot solve problems such as clock skews, the lack of supporting elements for efficient optical implementation, etc. The use of a ring-array processor distribution topology, however, can overcome these problems. Here, a study of the ring-array topology is conducted with an aim of implementing various fast clock rate, high-performance, compact optical networks for digital electronic multiprocessor computers. Practical design issues are addressed. Some proof-of-principle experimental results are included.

Reconfigurable lattice mesh designs for programmable photonic processors.

Science.gov (United States)

Pérez, Daniel; Gasulla, Ivana; Capmany, José; Soref, Richard A

2016-05-30

We propose and analyse two novel mesh design geometries for the implementation of tunable optical cores in programmable photonic processors. These geometries are the hexagonal and the triangular lattice. They are compared here to a previously proposed square mesh topology in terms of a series of figures of merit that account for metrics that are relevant to on-chip integration of the mesh. We find that that the hexagonal mesh is the most suitable option of the three considered for the implementation of the reconfigurable optical core in the programmable processor.

Interactive high-resolution isosurface ray casting on multicore processors.

Science.gov (United States)

Wang, Qin; JaJa, Joseph

2008-01-01

We present a new method for the interactive rendering of isosurfaces using ray casting on multi-core processors. This method consists of a combination of an object-order traversal that coarsely identifies possible candidate 3D data blocks for each small set of contiguous pixels, and an isosurface ray casting strategy tailored for the resulting limited-size lists of candidate 3D data blocks. While static screen partitioning is widely used in the literature, our scheme performs dynamic allocation of groups of ray casting tasks to ensure almost equal loads among the different threads running on multi-cores while maintaining spatial locality. We also make careful use of memory management environment commonly present in multi-core processors. We test our system on a two-processor Clovertown platform, each consisting of a Quad-Core 1.86-GHz Intel Xeon Processor, for a number of widely different benchmarks. The detailed experimental results show that our system is efficient and scalable, and achieves high cache performance and excellent load balancing, resulting in an overall performance that is superior to any of the previous algorithms. In fact, we achieve an interactive isosurface rendering on a 1024(2) screen for all the datasets tested up to the maximum size of the main memory of our platform.

77 FR 124 - Biological Processors of Alabama; Decatur, Morgan County, AL; Notice of Settlement

Science.gov (United States)

2012-01-03

... ENVIRONMENTAL PROTECTION AGENCY [FRL-9612-9] Biological Processors of Alabama; Decatur, Morgan... reimbursement of past response costs concerning the Biological Processors of Alabama Superfund Site located in... Ms. Paula V. Painter. Submit your comments by Site name Biological Processors of Alabama Superfund...

Monte Carlo photon transport on shared memory and distributed memory parallel processors

International Nuclear Information System (INIS)

Martin, W.R.; Wan, T.C.; Abdel-Rahman, T.S.; Mudge, T.N.; Miura, K.

1987-01-01

Parallelized Monte Carlo algorithms for analyzing photon transport in an inertially confined fusion (ICF) plasma are considered. Algorithms were developed for shared memory (vector and scalar) and distributed memory (scalar) parallel processors. The shared memory algorithm was implemented on the IBM 3090/400, and timing results are presented for dedicated runs with two, three, and four processors. Two alternative distributed memory algorithms (replication and dispatching) were implemented on a hypercube parallel processor (1 through 64 nodes). The replication algorithm yields essentially full efficiency for all cube sizes; with the 64-node configuration, the absolute performance is nearly the same as with the CRAY X-MP. The dispatching algorithm also yields efficiencies above 80% in a large simulation for the 64-processor configuration

New Catalytic DNA Biosensors for Radionuclides and Metal ions

International Nuclear Information System (INIS)

Lu, Yi

2003-01-01

The goals of the project are to develop new catalytic DNA biosensors for simultaneous detection and quantification of bioavailable radionuclides and metal ions, and apply the sensors for on-site, real-time assessment of concentration, speciation and stability of the individual contaminants during and after bioremediation. A negative selection strategy was tested and validated. In vitro selection was shown to yield highly active and specific transition metal ion-dependent catalytic DNA/RNA. A fluorescence resonance energy transfer (FRET) study of in vitro selected DNA demonstrated that the trifluorophore labeled system is a simple and powerful tool in studying complex biomolecules structure and dynamics, and is capable of revealing new sophisticated structural changes. New fluorophore/quenchers in a single fluorosensor yielded improved signal to noise ratio in detection, identification and quantification of metal contaminants. Catalytic DNA fluorescent and colorimetric sensors were shown useful in sensing lead in lake water and in leaded paint. Project results were described in two papers and two patents, and won an international prize

Three-Dimensional Structure and Catalytic Mechanism of Cytosine Deaminase

Energy Technology Data Exchange (ETDEWEB)

R Hall; A Fedorov; C Xu; E Fedorov; S Almo; F Raushel

2011-12-31

Cytosine deaminase (CDA) from E. coli is a member of the amidohydrolase superfamily. The structure of the zinc-activated enzyme was determined in the presence of phosphonocytosine, a mimic of the tetrahedral reaction intermediate. This compound inhibits the deamination of cytosine with a K{sub i} of 52 nM. The zinc- and iron-containing enzymes were characterized to determine the effect of the divalent cations on activation of the hydrolytic water. Fe-CDA loses activity at low pH with a kinetic pKa of 6.0, and Zn-CDA has a kinetic pKa of 7.3. Mutation of Gln-156 decreased the catalytic activity by more than 5 orders of magnitude, supporting its role in substrate binding. Mutation of Glu-217, Asp-313, and His-246 significantly decreased catalytic activity supporting the role of these three residues in activation of the hydrolytic water molecule and facilitation of proton transfer reactions. A library of potential substrates was used to probe the structural determinants responsible for catalytic activity. CDA was able to catalyze the deamination of isocytosine and the hydrolysis of 3-oxauracil. Large inverse solvent isotope effects were obtained on k{sub cat} and k{sub cat}/K{sub m}, consistent with the formation of a low-barrier hydrogen bond during the conversion of cytosine to uracil. A chemical mechanism for substrate deamination by CDA was proposed.

Very Long Instruction Word Processors

Indian Academy of Sciences (India)

Explicitly Parallel Instruction Computing (EPIC) is an instruction processing paradigm that has been in the spot- light due to its adoption by the next generation of Intel. Processors starting with the IA-64. The EPIC processing paradigm is an evolution of the Very Long Instruction. Word (VLIW) paradigm. This article gives an ...

User manual Dieka PreProcessor

NARCIS (Netherlands)

Valkering, Kasper

2000-01-01

This is the user manual belonging to the Dieka-PreProcessor. This application was written by Wenhua Cao and revised and expanded by Kasper Valkering. The aim of this preproccesor is to be able to draw and mesh extrusion dies in ProEngineer, and do the FE-calculation in Dieka. The preprocessor makes

Evaluation of the Intel Westmere-EX server processor

CERN Document Server

Jarp, S; Leduc, J; Nowak, A; CERN. Geneva. IT Department

2011-01-01

One year after the arrival of the Intel Xeon 7500 systems (“Nehalem-EX”), CERN openlab is presenting a set of benchmark results obtained when running on the new Xeon E7-4870 Processors, representing the “Westmere-EX” family. A modern 4-socket, 40-core system is confronted with the previous generation of expandable (“EX”) platforms, represented by a 4-socket, 32-core Intel Xeon X7560 based system – both being “top of the line” systems. Benchmarking of modern processors is a very complex affair. One has to control (at least) the following features: processor frequency, overclocking via Turbo mode, the number of physical cores in use, the use of logical cores via Symmetric MultiThreading (SMT), the cache sizes available, the configured memory topology, as well as the power configuration if throughput per watt is to be measured. As in previous activities, we have tried to do a good job of comparing like with like. In a “top of the line” comparison based on the HEPSPEC06 benchmark, the “We...

3081/E processor and its on-line use

International Nuclear Information System (INIS)

Rankin, P.; Bricaud, B.; Gravina, M.

1985-05-01

The 3081/E is a second generation emulator of a mainframe IBM. One of it's applications will be to form part of the data acquisition system of the upgraded Mark II detector for data taking at the SLAC linear collider. Since the processor does not have direct connections to I/O devices a FASTBUS interface will be provided to allow communication with both SLAC Scanner Processors (which are responsible for the accumulation of data at a crate level) and the experiment's VAX 8600 mainframe. The 3081/E's will supply a significant amount of on-line computing power to the experiment (a single 3081/E is equivalent to 4 to 5 VAX 11/780's). A major advantage of the 3081/E is that program development can be done on an IBM mainframe (such as the one used for off-line analysis) which gives the programmer access to a full range of debugging tools. The processor's performance can be continually monitored by comparison of the results obtained using it to those given when the same program is run on an IBM computer. 9 refs

Catalytic nanoporous membranes

Science.gov (United States)

Pellin, Michael J; Hryn, John N; Elam, Jeffrey W

2013-08-27

A nanoporous catalytic membrane which displays several unique features Including pores which can go through the entire thickness of the membrane. The membrane has a higher catalytic and product selectivity than conventional catalysts. Anodic aluminum oxide (AAO) membranes serve as the catalyst substrate. This substrate is then subjected to Atomic Layer Deposition (ALD), which allows the controlled narrowing of the pores from 40 nm to 10 nm in the substrate by deposition of a preparatory material. Subsequent deposition of a catalytic layer on the inner surfaces of the pores reduces pore sizes to less than 10 nm and allows for a higher degree of reaction selectivity. The small pore sizes allow control over which molecules enter the pores, and the flow-through feature can allow for partial oxidation of reactant species as opposed to complete oxidation. A nanoporous separation membrane, produced by ALD is also provided for use in gaseous and liquid separations. The membrane has a high flow rate of material with 100% selectivity. Also provided is a method for producing a catalytic membrane having flow-through pores and discreet catalytic clusters adhering to the inside surfaces of the pores.

An intercomparison of Canadian external dosimetry processors for radiation protection

International Nuclear Information System (INIS)

1989-10-01

The five Canadian external dosimetry processors have participated in a two-stage intercomparison. The first stage involved dosimeters to known radiation fields under controlled laboratory conditions. The second stage involved exposing dosimeters to radiation fields in power reactor working environments. The results for each stage indicated the dose reported by each processor relative to an independently determined dose and relative to the others. The results of the intercomparisons confirm the original supposition: namely that the average differences in reported dose among five processors are much less than the uncertainty limits recommended by the ICRP. This report provides a description of the experimental methods as well as a discussion of the results for each stage. The report also includes a set of recommendations

A high-speed analog neural processor

NARCIS (Netherlands)

Masa, P.; Masa, Peter; Hoen, Klaas; Hoen, Klaas; Wallinga, Hans

1994-01-01

Targeted at high-energy physics research applications, our special-purpose analog neural processor can classify up to 70 dimensional vectors within 50 nanoseconds. The decision-making process of the implemented feedforward neural network enables this type of computation to tolerate weight

Processor farming in two-level analysis of historical bridge

Science.gov (United States)

Krejčí, T.; Kruis, J.; Koudelka, T.; Šejnoha, M.

2017-11-01

This contribution presents a processor farming method in connection with a multi-scale analysis. In this method, each macro-scopic integration point or each finite element is connected with a certain meso-scopic problem represented by an appropriate representative volume element (RVE). The solution of a meso-scale problem provides then effective parameters needed on the macro-scale. Such an analysis is suitable for parallel computing because the meso-scale problems can be distributed among many processors. The application of the processor farming method to a real world masonry structure is illustrated by an analysis of Charles bridge in Prague. The three-dimensional numerical model simulates the coupled heat and moisture transfer of one half of arch No. 3. and it is a part of a complex hygro-thermo-mechanical analysis which has been developed to determine the influence of climatic loading on the current state of the bridge.

Array processors: an introduction to their architecture, software, and applications in nuclear medicine

International Nuclear Information System (INIS)

King, M.A.; Doherty, P.W.; Rosenberg, R.J.; Cool, S.L.

1983-01-01

Array processors are ''number crunchers'' that dramatically enhance the processing power of nuclear medicine computer systems for applicatons dealing with the repetitive operations involved in digital image processing of large segments of data. The general architecture and the programming of array processors are introduced, along with some applications of array processors to the reconstruction of emission tomographic images, digital image enhancement, and functional image formation

Role of Defects and Adsorbed Water Film in Influencing the Electrical, Optical and Catalytic Properties of Transition Metal Oxides

Science.gov (United States)

Wang, Qi

, gallium nitride and zinc oxide. Most TMOs at room temperature are known to be strongly hydrated. We show that an adsorbed water film present on the surface of TMOs facilitates the dissolution of gaseous species and promotes charge transfers at the adsorbed-water/oxide interfaces. Further, we show the role of vacancy defects in enhancing catalytic processes by directly monitoring the charge transfer process between gaseous species and vacancy defects in non-stoichiometric p-type nickel oxide and n-type tungsten oxide using in-situ NIR-PL, electrical resistance, and X-ray photoelectron spectroscopy. We find the importance of adsorbed water and vacancy defects in affecting catalytic, electronic, electrical, and optical changes such as insulator-to-metal transitions and radiative emissions during electrochemical reactions. In addition, we demonstrate that electrochemical surface transfer doping exists in another system, specifically, in gallium nitride, and the presence of this adsorbed water film present on the surface of GaN induces electron transfer from GaN that leads to the formation of an electron depletion region on the surface.

The Danish real-time SAR processor: first results

DEFF Research Database (Denmark)

Dall, Jørgen; Jørgensen, Jørn Hjelm; Netterstrøm, Anders

1993-01-01

A real-time processor (RTP) for the Danish airborne Synthetic Aperture Radar (SAR) has been designed and constructed at the Electromagnetics Institute. The implementation was completed in mid 1992, and since then the RTP has been operated successfully on several test and demonstration flights....... The processor is capable of focusing the entire swath of the raw SAR data into full resolution, and depending on the choice made by the on-board operator, either a high resolution one-look zoom image or a spatially multilooked overview image is displayed. After a brief design review, the paper addresses various...

Wavelength-encoded OCDMA system using opto-VLSI processors.

Science.gov (United States)

Aljada, Muhsen; Alameh, Kamal

2007-07-01

We propose and experimentally demonstrate a 2.5 Gbits/sper user wavelength-encoded optical code-division multiple-access encoder-decoder structure based on opto-VLSI processing. Each encoder and decoder is constructed using a single 1D opto-very-large-scale-integrated (VLSI) processor in conjunction with a fiber Bragg grating (FBG) array of different Bragg wavelengths. The FBG array spectrally and temporally slices the broadband input pulse into several components and the opto-VLSI processor generates codewords using digital phase holograms. System performance is measured in terms of the autocorrelation and cross-correlation functions as well as the eye diagram.

Wavelength-encoded OCDMA system using opto-VLSI processors

Science.gov (United States)

Aljada, Muhsen; Alameh, Kamal

2007-07-01

We propose and experimentally demonstrate a 2.5 Gbits/sper user wavelength-encoded optical code-division multiple-access encoder-decoder structure based on opto-VLSI processing. Each encoder and decoder is constructed using a single 1D opto-very-large-scale-integrated (VLSI) processor in conjunction with a fiber Bragg grating (FBG) array of different Bragg wavelengths. The FBG array spectrally and temporally slices the broadband input pulse into several components and the opto-VLSI processor generates codewords using digital phase holograms. System performance is measured in terms of the autocorrelation and cross-correlation functions as well as the eye diagram.

Efficient Multicriteria Protein Structure Comparison on Modern Processor Architectures

Science.gov (United States)

Manolakos, Elias S.

2015-01-01

Fast increasing computational demand for all-to-all protein structures comparison (PSC) is a result of three confounding factors: rapidly expanding structural proteomics databases, high computational complexity of pairwise protein comparison algorithms, and the trend in the domain towards using multiple criteria for protein structures comparison (MCPSC) and combining results. We have developed a software framework that exploits many-core and multicore CPUs to implement efficient parallel MCPSC in modern processors based on three popular PSC methods, namely, TMalign, CE, and USM. We evaluate and compare the performance and efficiency of the two parallel MCPSC implementations using Intel's experimental many-core Single-Chip Cloud Computer (SCC) as well as Intel's Core i7 multicore processor. We show that the 48-core SCC is more efficient than the latest generation Core i7, achieving a speedup factor of 42 (efficiency of 0.9), making many-core processors an exciting emerging technology for large-scale structural proteomics. We compare and contrast the performance of the two processors on several datasets and also show that MCPSC outperforms its component methods in grouping related domains, achieving a high F-measure of 0.91 on the benchmark CK34 dataset. The software implementation for protein structure comparison using the three methods and combined MCPSC, along with the developed underlying rckskel algorithmic skeletons library, is available via GitHub. PMID:26605332

Efficient Multicriteria Protein Structure Comparison on Modern Processor Architectures.

Science.gov (United States)

Sharma, Anuj; Manolakos, Elias S

2015-01-01

Fast increasing computational demand for all-to-all protein structures comparison (PSC) is a result of three confounding factors: rapidly expanding structural proteomics databases, high computational complexity of pairwise protein comparison algorithms, and the trend in the domain towards using multiple criteria for protein structures comparison (MCPSC) and combining results. We have developed a software framework that exploits many-core and multicore CPUs to implement efficient parallel MCPSC in modern processors based on three popular PSC methods, namely, TMalign, CE, and USM. We evaluate and compare the performance and efficiency of the two parallel MCPSC implementations using Intel's experimental many-core Single-Chip Cloud Computer (SCC) as well as Intel's Core i7 multicore processor. We show that the 48-core SCC is more efficient than the latest generation Core i7, achieving a speedup factor of 42 (efficiency of 0.9), making many-core processors an exciting emerging technology for large-scale structural proteomics. We compare and contrast the performance of the two processors on several datasets and also show that MCPSC outperforms its component methods in grouping related domains, achieving a high F-measure of 0.91 on the benchmark CK34 dataset. The software implementation for protein structure comparison using the three methods and combined MCPSC, along with the developed underlying rckskel algorithmic skeletons library, is available via GitHub.

ARM Processor Based Embedded System for Remote Data Acquisition

OpenAIRE

Raj Kumar Tiwari; Santosh Kumar Agrahari

2014-01-01

The embedded systems are widely used for the data acquisition. The data acquired may be used for monitoring various activity of the system or it can be used to control the parts of the system. Accessing various signals with remote location has greater advantage for multisite operation or unmanned systems. The remote data acquisition used in this paper is based on ARM processor. The Cortex M3 processor used in this system has in-built Ethernet controller which facilitate to acquire the remote ...

Application of Advanced Multi-Core Processor Technologies to Oceanographic Research

Science.gov (United States)

2013-09-30

1 DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited. Application of Advanced Multi-Core Processor Technologies...STM32 NXP LPC series No Proprietary Microchip PIC32/DSPIC No > 500 mW; < 5 W ARM Cortex TI OMAP TI Sitara Broadcom BCM2835 Varies FPGA...state-of-the-art information processing architectures. OBJECTIVES Next-generation processor architectures (multi-core, multi-threaded) hold the

Hardware processors for pattern recognition tasks in experiments with wire chambers

International Nuclear Information System (INIS)

Verkerk, C.

1975-01-01

Hardware processors for pattern recognition tasks in experiments with multiwire proportional chambers or drift chambers are described. They vary from simple ones used for deciding in real time if particle trajectories are straight to complex ones for recognition of curved tracks. Schematics and block-diagrams of different processors are shown

Thermal Dissipation Efficiency in a Micro-Processor Using Carbon Nanotubes Based Composite

Science.gov (United States)

Thang, Bui Hung; Van Quang, Cao; Nghia, Van Trong; Hong, Phan Ngoc; Van Chuc, Nguyen; Tam, Ngo Thi Thanh; Quang, Le Dinh; Khang, Dao Duc; Khoi, Phan Hong; Minh, Phan Ngoc

2009-09-01

Modern electronic and optoelectronic devices such as μ-processor, light emitting diode, semiconductor laser issued a challenge in the thermal dissipation problem. Finding an effective way for thermal dissipation therefore becomes a very important issue. It is known that carbon nanotubes (CNTs) is one of the most valuable materials with high thermal conductivity (2000 W/m.K compared to thermal conductivity of Ag 419 W/m.K). This suggested an approach in applying the CNTs as an essential component for thermal dissipation media to improve the performance of computer processor and other high power electronic devices. In this work multi walled carbon nanotubes (MWCNTs) based composites were utilized as the thermal dissipation media in a micro processor of a personal computer. The MWCNTs of different concentrations were added into polyaniline, commercial silicon thermal paste and commercial silver thermal paste by mechanical methods. A personal computer with configuration: Intel Pentium IV 3.066 GHz, 512 MB of RAM and Windows XP Service Pack 2 Operating System was employed. The thermal dissipation efficiency of the system was evaluated by directly measure the temperature of the μ-processor during the operation of the computer in different CPU speeds. The measured results showed that the CNTs based composite could reduce the temperature of the u-processor more than 5° C, and the time for increasing the temperature of the μ-processor was three times longer than that when using commercial thermal paste.

Video frame processor

International Nuclear Information System (INIS)

Joshi, V.M.; Agashe, Alok; Bairi, B.R.

1993-01-01

This report provides technical description regarding the Video Frame Processor (VFP) developed at Bhabha Atomic Research Centre. The instrument provides capture of video images available in CCIR format. Two memory planes each with a capacity of 512 x 512 x 8 bit data enable storage of two video image frames. The stored image can be processed on-line and on-line image subtraction can also be carried out for image comparisons. The VFP is a PC Add-on board and is I/O mapped within the host IBM PC/AT compatible computer. (author). 9 refs., 4 figs., 19 photographs

Catalytical degradation of relevant pollutants from waters using magnetic nanocatalysts

Science.gov (United States)

Nadejde, C.; Neamtu, M.; Schneider, R. J.; Hodoroaba, V.-D.; Ababei, G.; Panne, U.

2015-10-01

The catalytic efficiency of two magnetically responsive nanocatalysts was evaluated for the degradation of Reactive Black 5 (RB5) and Reactive Yellow 84 (RY84) azo dyes using hydrogen peroxide as oxidant under very mild conditions (atmospheric pressure, room temperature). In order to obtain the nanocatalysts, the surface of magnetite (Fe3O4) nanoparticles, prepared by a co-precipitation method, was further modified with ferrous oxalate, a highly sensitive non-hazardous reducing agent. The sensitized nanomaterials were characterized by X-ray diffraction, scanning and transmission electron microscopy, energy-dispersive X-ray spectroscopy and vibrating sample magnetometry, and used in the catalytic wet hydrogen peroxide oxidation (CWHPO) of RB5 and RY84, in laboratory-scale experiments. The effect of important variables such as catalyst dosage, H2O2 concentration, and contact time was studied in the dye degradation kinetics. The results showed that it was possible to remove up to 99.7% dye in the presence of 20 mM H2O2 after 240 min of oxidation for a catalyst concentration of 10 g L-1 at 25 °C and initial pH value of 9.0. CWHPO of reactive dyes using sensitized magnetic nanocatalysts can be a suitable pre-treatment method for complete decolorization of effluents from textile dyeing and finishing processes, once the optimum operating conditions are established.

Synchronization of faulty processors in coarse-grained TMR protected partially reconfigurable FPGA designs

International Nuclear Information System (INIS)

Kretzschmar, U.; Gomez-Cornejo, J.; Astarloa, A.; Bidarte, U.; Ser, J. Del

2016-01-01

The expansion of FPGA technology in numerous application fields is a fact. Single Event Effects (SEE) are a critical factor for the reliability of FPGA based systems. For this reason, a number of researches have been studying fault tolerance techniques to harden different elements of FPGA designs. Using Partial Reconfiguration (PR) in conjunction with Triple Modular Redundancy (TMR) is an emerging approach in recent publications dealing with the implementation of fault tolerant processors on SRAM-based FPGAs. While these works pay great attention to the repair of erroneous instances by means of reconfiguration, the essential step of synchronizing the repaired processors is insufficiently addressed. In this context, this paper poses four different synchronization approaches for soft core processors, which balance differently the trade-off between synchronization speed and hardware overhead. All approaches are assessed in practice by synchronizing TMR protected PicoBlaze processors implemented on a Virtex-5 FPGA. Nevertheless all methods are of a general nature and can be applied for different processor architectures in a straightforward fashion. - Highlights: • Four different synchronization methods for faulty processors are proposed. • The methods balance between synchronization speed and hardware overhead. • They can be applied to TMR-protected reconfigurable FPGA designs. • The proposed schemes are implemented and tested in real hardware.

Simulation of Particulate Flows Multi-Processor Machines with Distributed Memory

Energy Technology Data Exchange (ETDEWEB)

Uhlmann, M.

2004-07-01

We presented a method for the parallelization of an immersed boundary algorithm for particulate flows using the MPI standard of communication. The treatment of the fluid phase used the domain decomposition technique over a Cartesian processor grid. The solution of the Helmholtz problem is approximately factorized an relies upon apparel tri-diagonal solver the Poisson problem is solved by means of a parallel multi-grid technique similar to MUDPACK. for the solid phase we employ a master-slaves technique where one processor handles all the particles contained in its Eulerian fluid sub-domain and zero or more neighbor processors collaborate in the computation of particle-related quantities whenever a particle position over laps the boundary of a sub-domain. the parallel efficiency for some preliminary computations is presented. (Author) 9 refs.

A review of liquid-phase catalytic hydrodechlorination

OpenAIRE

Alba Nelly Ardila Arias; Consuelo Montes de Correa

2007-01-01

This survey was aimed at introducing the effect of light organochlorinated compound emissions on the envi-ronment, particularly on water, air, soil, biota and human beings. The characteristics and advantages of liquid phase catalytic hydrodechlorination as a technology for degrading these chlorinated compounds is also outlined and the main catalysts used in the hydrodechlorination process are described. Special emphasis is placed on palladium catalysts, their activity, the nature of active sp...

Catalytic strategy used by the myosin motor to hydrolyze ATP.

Science.gov (United States)

Kiani, Farooq Ahmad; Fischer, Stefan

2014-07-22

Myosin is a molecular motor responsible for biological motions such as muscle contraction and intracellular cargo transport, for which it hydrolyzes adenosine 5'-triphosphate (ATP). Early steps of the mechanism by which myosin catalyzes ATP hydrolysis have been investigated, but still missing are the structure of the final ADP·inorganic phosphate (Pi) product and the complete pathway leading to it. Here, a comprehensive description of the catalytic strategy of myosin is formulated, based on combined quantum-classical molecular mechanics calculations. A full exploration of catalytic pathways was performed and a final product structure was found that is consistent with all experiments. Molecular movies of the relevant pathways show the different reorganizations of the H-bond network that lead to the final product, whose γ-phosphate is not in the previously reported HPγO4(2-) state, but in the H2PγO4(-) state. The simulations reveal that the catalytic strategy of myosin employs a three-pronged tactic: (i) Stabilization of the γ-phosphate of ATP in a dissociated metaphosphate (PγO3(-)) state. (ii) Polarization of the attacking water molecule, to abstract a proton from that water. (iii) Formation of multiple proton wires in the active site, for efficient transfer of the abstracted proton to various product precursors. The specific role played in this strategy by each of the three loops enclosing ATP is identified unambiguously. It explains how the precise timing of the ATPase activation during the force generating cycle is achieved in myosin. The catalytic strategy described here for myosin is likely to be very similar in most nucleotide hydrolyzing enzymes.

A QM/MM study of the catalytic mechanism of nicotinamidase.

Science.gov (United States)

Sheng, Xiang; Liu, Yongjun

2014-02-28

Nicotinamidase (Pnc1) is a member of Zn-dependent amidohydrolases that hydrolyzes nicotinamide (NAM) to nicotinic acid (NA), which is a key step in the salvage pathway of NAD(+) biosynthesis. In this paper, the catalytic mechanism of Pnc1 has been investigated by using a combined quantum-mechanical/molecular-mechanical (QM/MM) approach based on the recently obtained crystal structure of Pnc1. The reaction pathway, the detail of each elementary step, the energetics of the whole catalytic cycle, and the roles of key residues and Zn-binding site are illuminated. Our calculation results indicate that the catalytic water molecule comes from the bulk solvent, which is then deprotonated by residue D8. D8 functions as a proton transfer station between C167 and NAM, while the activated C167 serves as the nucleophile. The residue K122 only plays a role in stabilizing intermediates and transition states. The oxyanion hole formed by the amide backbone nitrogen atoms of A163 and C167 has the function to stabilize the hydroxyl anion of nicotinamide. The Zn-binding site rather than a single Zn(2+) ion acts as a Lewis acid to influence the reaction. Two elementary steps, the activation of C167 in the deamination process and the decomposition of catalytic water in the hydrolysis process, correspond to the large energy barriers of 25.7 and 28.1 kcal mol(-1), respectively, meaning that both of them contribute a lot to the overall reaction barrier. Our results may provide useful information for the design of novel and efficient Pnc1 inhibitors and related biocatalytic applications.

MORPION: a fast hardware processor for straight line finding in MWPC

International Nuclear Information System (INIS)

Mur, M.

1980-02-01

A fast hardware processor for straight line finding in MWPC has been built in Saclay and successfully operated in the NA3 experiment at CERN. We give the motivations to build this processor, and describe the hardware implementation of the line finding algorithm. Finally its use and performance in NA3 are described

On the Catalytic Effect of Water in the Intramolecular Diels–Alder Reaction of Quinone Systems: A Theoretical Study

Directory of Open Access Journals (Sweden)

Renato Contreras

2012-11-01

Full Text Available The mechanism of the intramolecular Diels–Alder (IMDA reaction of benzoquinone 1, in the absence and in the presence of three water molecules, 1w, has been studied by means of density functional theory (DFT methods, using the M05-2X and B3LYP functionals for exploration of the potential energy surface (PES. The energy and geometrical results obtained are complemented with a population analysis using the NBO method, and an analysis based on the global, local and group electrophilicity and nucleophilicity indices. Both implicit and explicit solvation emphasize the increase of the polarity of the reaction and the reduction of activation free energies associated with the transition states (TSs of this IMDA process. These results are reinforced by the analysis of the reactivity indices derived from the conceptual DFT, which show that the increase of the electrophilicity of the quinone framework by the hydrogen-bond formation correctly explains the high polar character of this intramolecular process. Large polarization at the TSs promoted by hydrogen-bonds and implicit solvation by water together with a high electrophilicity-nucleophilicity difference consistently explains the catalytic effects of water molecules.

Non-thermal plasmas for non-catalytic and catalytic VOC abatement

International Nuclear Information System (INIS)

Vandenbroucke, Arne M.; Morent, Rino; De Geyter, Nathalie; Leys, Christophe

2011-01-01

Highlights: → We review the current status of catalytic and non-catalytic VOC abatement based on a vast number of research papers. → The underlying mechanisms of plasma-catalysis for VOC abatement are discussed. → Critical process parameters that determine the influent are discussed and compared. - Abstract: This paper reviews recent achievements and the current status of non-thermal plasma (NTP) technology for the abatement of volatile organic compounds (VOCs). Many reactor configurations have been developed to generate a NTP at atmospheric pressure. Therefore in this review article, the principles of generating NTPs are outlined. Further on, this paper is divided in two equally important parts: plasma-alone and plasma-catalytic systems. Combination of NTP with heterogeneous catalysis has attracted increased attention in order to overcome the weaknesses of plasma-alone systems. An overview is given of the present understanding of the mechanisms involved in plasma-catalytic processes. In both parts (plasma-alone systems and plasma-catalysis), literature on the abatement of VOCs is reviewed in close detail. Special attention is given to the influence of critical process parameters on the removal process.

Catalytic distillation process

Science.gov (United States)

Smith, L.A. Jr.

1982-06-22

A method is described for conducting chemical reactions and fractionation of the reaction mixture comprising feeding reactants to a distillation column reactor into a feed zone and concurrently contacting the reactants with a fixed bed catalytic packing to concurrently carry out the reaction and fractionate the reaction mixture. For example, a method for preparing methyl tertiary butyl ether in high purity from a mixed feed stream of isobutene and normal butene comprising feeding the mixed feed stream to a distillation column reactor into a feed zone at the lower end of a distillation reaction zone, and methanol into the upper end of said distillation reaction zone, which is packed with a properly supported cationic ion exchange resin, contacting the C[sub 4] feed and methanol with the catalytic distillation packing to react methanol and isobutene, and concurrently fractionating the ether from the column below the catalytic zone and removing normal butene overhead above the catalytic zone.

Graphics processor efficiency for realization of rapid tabular computations

International Nuclear Information System (INIS)

Dudnik, V.A.; Kudryavtsev, V.I.; Us, S.A.; Shestakov, M.V.

2016-01-01

Capabilities of graphics processing units (GPU) and central processing units (CPU) have been investigated for realization of fast-calculation algorithms with the use of tabulated functions. The realization of tabulated functions is exemplified by the GPU/CPU architecture-based processors. Comparison is made between the operating efficiencies of GPU and CPU, employed for tabular calculations at different conditions of use. Recommendations are formulated for the use of graphical and central processors to speed up scientific and engineering computations through the use of tabulated functions

FASTBUS Standard Routines implementation for Fermilab embedded processor boards

International Nuclear Information System (INIS)

Pangburn, J.; Patrick, J.; Kent, S.; Oleynik, G.; Pordes, R.; Votava, M.; Heyes, G.; Watson, W.A. III

1992-10-01

In collaboration with CEBAF, Fermilab's Online Support Department and the CDF experiment have produced a new implementation of the IEEE FASTBUS Standard Routines for two embedded processor FASTBUS boards: the Fermilab Smart Crate Controller (FSCC) and the FASTBUS Readout Controller (FRC). Features of this implementation include: portability (to other embedded processor boards), remote source-level debugging, high speed, optional generation of very high-speed code for readout applications, and built-in Sun RPC support for execution of FASTBUS transactions and lists over the network

Statistical analysis of quality control of automatic processor

International Nuclear Information System (INIS)

Niu Yantao; Zhao Lei; Zhang Wei; Yan Shulin

2002-01-01

Objective: To strengthen the scientific management of automatic processor and promote QC, based on analyzing QC management chart for automatic processor by statistical method, evaluating and interpreting the data and trend of the chart. Method: Speed, contrast, minimum density of step wedge of film strip were measured everyday and recorded on the QC chart. Mean (x-bar), standard deviation (s) and range (R) were calculated. The data and the working trend were evaluated and interpreted for management decisions. Results: Using relative frequency distribution curve constructed by measured data, the authors can judge whether it is a symmetric bell-shaped curve or not. If not, it indicates a few extremes overstepping control limits possibly are pulling the curve to the left or right. If it is a normal distribution, standard deviation (s) is observed. When x-bar +- 2s lies in upper and lower control limits of relative performance indexes, it indicates the processor works in stable status in this period. Conclusion: Guided by statistical method, QC work becomes more scientific and quantified. The authors can deepen understanding and application of the trend chart, and improve the quality management to a new step

Broadband set-top box using MAP-CA processor

Science.gov (United States)

Bush, John E.; Lee, Woobin; Basoglu, Chris

2001-12-01

Advances in broadband access are expected to exert a profound impact in our everyday life. It will be the key to the digital convergence of communication, computer and consumer equipment. A common thread that facilitates this convergence comprises digital media and Internet. To address this market, Equator Technologies, Inc., is developing the Dolphin broadband set-top box reference platform using its MAP-CA Broadband Signal ProcessorT chip. The Dolphin reference platform is a universal media platform for display and presentation of digital contents on end-user entertainment systems. The objective of the Dolphin reference platform is to provide a complete set-top box system based on the MAP-CA processor. It includes all the necessary hardware and software components for the emerging broadcast and the broadband digital media market based on IP protocols. Such reference design requires a broadband Internet access and high-performance digital signal processing. By using the MAP-CA processor, the Dolphin reference platform is completely programmable, allowing various codecs to be implemented in software, such as MPEG-2, MPEG-4, H.263 and proprietary codecs. The software implementation also enables field upgrades to keep pace with evolving technology and industry demands.

Catalytic production of metal carbonyls from metal oxides

Science.gov (United States)

Sapienza, Richard S.; Slegeir, William A.; Foran, Michael T.

1984-01-01

This invention relates to the formation of metal carbonyls from metal oxides and specially the formation of molybdenum carbonyl and iron carbonyl from their respective oxides. Copper is used here in admixed form or used in chemically combined form as copper molybdate. The copper/metal oxide combination or combined copper is utilized with a solvent, such as toluene and subjected to carbon monoxide pressure of 25 atmospheres or greater at about 150.degree.-260.degree. C. The reducing metal copper is employed in catalytic concentrations or combined concentrations as CuMoO.sub.4 and both hydrogen and water present serve as promoters. It has been found that the yields by this process have been salutary and that additionally the catalytic metal may be reused in the process to good effect.

Catalytic reduction of nitric oxide with ammonia over transition metal ion-exchanged Y zeolites

Energy Technology Data Exchange (ETDEWEB)

Sciyama, T; Arakawa, T; Matsuda, T; Yamazoe, N; Takita, Y

1975-01-01

The catalytic reduction of nitric oxide with ammonia was studied over transition metal ion-exchanged Y zeolite (Me-Y) catalysts. The reaction products are nitrogen, nitrous oxide, and water in all cases. Selectivities to N/sub 2/ are 60 to 80% on all the cation exchanged zeolite catalysts exhibiting a relatively minor variation with the cationic species exchanged. The copper (II)-Y catalyst exhibits low temperature activity and has an unusual catalytic activity-temperature profile with a maximum at 120/sup 0/C. The catalytic activity is enhanced considerably when a second cation, especially cobalt (II) or iron (III) is coexchanged together with Cu (II) in Y zeolite.

High-Performance Linear Algebra Processor using FPGA

National Research Council Canada - National Science Library

Johnson, J

2004-01-01

With recent advances in FPGA (Field Programmable Gate Array) technology it is now feasible to use these devices to build special purpose processors for floating point intensive applications that arise in scientific computing...

Use of a track and vertex processor in a fixed-target charm experiment

International Nuclear Information System (INIS)

Schub, M.H.; Carey, T.A.; Hsiung, Y.B.; Kaplan, D.M.; Lee, C.; Miller, G.; Sa, J.; Teng, P.K.

1996-01-01

We have constructed and operated a high-speed parallel-pipelined track and vertex processor and used it to trigger data acquisition in a high-rate charm and beauty experiment at Fermilab. The processor uses information from hodoscopes and wire chambers to reconstruct tracks in the bend view of a magnetic spectrometer, and uses these tracks to find the corresponding tracks in a set of silicon-strip detectors. The processor then forms vertices and triggers the experiment if at least one vertex is downstream of the target. Under typical charm running conditions, with an interaction rate of ∼5 MHz, the processor rejects 80-90% of lower-level triggers while maintaining efficiency of ∼70% for two-prong D-meson decays. (orig.)

Simplifying cochlear implant speech processor fitting

NARCIS (Netherlands)

Willeboer, C.

2008-01-01

Conventional fittings of the speech processor of a cochlear implant (CI) rely to a large extent on the implant recipient's subjective responses. For each of the 22 intracochlear electrodes the recipient has to indicate the threshold level (T-level) and comfortable loudness level (C-level) while

Catalytic Combustion of Gasified Waste

Energy Technology Data Exchange (ETDEWEB)

Kusar, Henrik

2003-09-01

This thesis concerns catalytic combustion for gas turbine application using a low heating-value (LHV) gas, derived from gasified waste. The main research in catalytic combustion focuses on methane as fuel, but an increasing interest is directed towards catalytic combustion of LHV fuels. This thesis shows that it is possible to catalytically combust a LHV gas and to oxidize fuel-bound nitrogen (NH{sub 3}) directly into N{sub 2} without forming NO{sub x} The first part of the thesis gives a background to the system. It defines waste, shortly describes gasification and more thoroughly catalytic combustion. The second part of the present thesis, paper I, concerns the development and testing of potential catalysts for catalytic combustion of LHV gases. The objective of this work was to investigate the possibility to use a stable metal oxide instead of noble metals as ignition catalyst and at the same time reduce the formation of NO{sub x} In paper II pilot-scale tests were carried out to prove the potential of catalytic combustion using real gasified waste and to compare with the results obtained in laboratory scale using a synthetic gas simulating gasified waste. In paper III, selective catalytic oxidation for decreasing the NO{sub x} formation from fuel-bound nitrogen was examined using two different approaches: fuel-lean and fuel-rich conditions. Finally, the last part of the thesis deals with deactivation of catalysts. The various deactivation processes which may affect high-temperature catalytic combustion are reviewed in paper IV. In paper V the poisoning effect of low amounts of sulfur was studied; various metal oxides as well as supported palladium and platinum catalysts were used as catalysts for combustion of a synthetic gas. In conclusion, with the results obtained in this thesis it would be possible to compose a working catalytic system for gas turbine application using a LHV gas.

A prediction method for job runtimes on shared processors: Survey, statistical analysis and new avenues

NARCIS (Netherlands)

Dobber, A.M.; van der Mei, R.D.; Koole, G.M.

2007-01-01

Grid computing is an emerging technology by which huge numbers of processors over the world create a global source of processing power. Their collaboration makes it possible to perform computations that are too extensive to perform on a single processor. On a grid, processors may connect and

Design of Processors with Reconfigurable Microarchitecture

Directory of Open Access Journals (Sweden)

Andrey Mokhov

2014-01-01

Full Text Available Energy becomes a dominating factor for a wide spectrum of computations: from intensive data processing in “big data” companies resulting in large electricity bills, to infrastructure monitoring with wireless sensors relying on energy harvesting. In this context it is essential for a computation system to be adaptable to the power supply and the service demand, which often vary dramatically during runtime. In this paper we present an approach to building processors with reconfigurable microarchitecture capable of changing the way they fetch and execute instructions depending on energy availability and application requirements. We show how to use Conditional Partial Order Graphs to formally specify the microarchitecture of such a processor, explore the design possibilities for its instruction set, and synthesise the instruction decoder using correct-by-construction techniques. The paper is focused on the design methodology, which is evaluated by implementing a power-proportional version of Intel 8051 microprocessor.

Coordinated Energy Management in Heterogeneous Processors

Directory of Open Access Journals (Sweden)

Indrani Paul

2014-01-01

Full Text Available This paper examines energy management in a heterogeneous processor consisting of an integrated CPU–GPU for high-performance computing (HPC applications. Energy management for HPC applications is challenged by their uncompromising performance requirements and complicated by the need for coordinating energy management across distinct core types – a new and less understood problem. We examine the intra-node CPU–GPU frequency sensitivity of HPC applications on tightly coupled CPU–GPU architectures as the first step in understanding power and performance optimization for a heterogeneous multi-node HPC system. The insights from this analysis form the basis of a coordinated energy management scheme, called DynaCo, for integrated CPU–GPU architectures. We implement DynaCo on a modern heterogeneous processor and compare its performance to a state-of-the-art power- and performance-management algorithm. DynaCo improves measured average energy-delay squared (ED2 product by up to 30% with less than 2% average performance loss across several exascale and other HPC workloads.

Catalytic Conversion of Cellulose to Levulinic Acid by Metal Chlorides

Directory of Open Access Journals (Sweden)

Beixiao Zhang

2010-08-01

Full Text Available The catalytic performance of various metal chlorides in the conversion of cellulose to levulinic acid in liquid water at high temperatures was investigated. The effects of reaction parameters on the yield of levulinic acid were also explored. The results showed that alkali and alkaline earth metal chlorides were not effective in conversion of cellulose, while transition metal chlorides, especially CrCl3, FeCl3 and CuCl2 and a group IIIA metal chloride (AlCl3, exhibited high catalytic activity. The catalytic performance was correlated with the acidity of the reaction system due to the addition of the metal chlorides, but more dependent on the type of metal chloride. Among those metal chlorides, chromium chloride was found to be exceptionally effective for the conversion of cellulose to levulinic acid, affording an optimum yield of 67 mol % after a reaction time of 180 min, at 200 °C, with a catalyst dosage of 0.02 M and substrate concentration of 50 wt %. Chromium metal, most of which was present in its oxide form in the solid sample and only a small part in solution as Cr3+ ion, can be easily separated from the resulting product mixture and recycled. Finally, a plausible reaction scheme for the chromium chloride catalyzed conversion of cellulose in water was proposed.

A Bayesian sequential processor approach to spectroscopic portal system decisions

Energy Technology Data Exchange (ETDEWEB)

Sale, K; Candy, J; Breitfeller, E; Guidry, B; Manatt, D; Gosnell, T; Chambers, D

2007-07-31

The development of faster more reliable techniques to detect radioactive contraband in a portal type scenario is an extremely important problem especially in this era of constant terrorist threats. Towards this goal the development of a model-based, Bayesian sequential data processor for the detection problem is discussed. In the sequential processor each datum (detector energy deposit and pulse arrival time) is used to update the posterior probability distribution over the space of model parameters. The nature of the sequential processor approach is that a detection is produced as soon as it is statistically justified by the data rather than waiting for a fixed counting interval before any analysis is performed. In this paper the Bayesian model-based approach, physics and signal processing models and decision functions are discussed along with the first results of our research.

Parallelising a molecular dynamics algorithm on a multi-processor workstation

Science.gov (United States)

Müller-Plathe, Florian

1990-12-01

The Verlet neighbour-list algorithm is parallelised for a multi-processor Hewlett-Packard/Apollo DN10000 workstation. The implementation makes use of memory shared between the processors. It is a genuine master-slave approach by which most of the computational tasks are kept in the master process and the slaves are only called to do part of the nonbonded forces calculation. The implementation features elements of both fine-grain and coarse-grain parallelism. Apart from three calls to library routines, two of which are standard UNIX calls, and two machine-specific language extensions, the whole code is written in standard Fortran 77. Hence, it may be expected that this parallelisation concept can be transfered in parts or as a whole to other multi-processor shared-memory computers. The parallel code is routinely used in production work.

Real time processor for array speckle interferometry

International Nuclear Information System (INIS)

Chin, G.; Florez, J.; Borelli, R.; Fong, W.; Miko, J.; Trujillo, C.

1989-01-01

With the construction of several new large aperture telescopes and the development of large format array detectors in the near IR, the ability to obtain diffraction limited seeing via IR array speckle interferometry offers a powerful tool. We are constructing a real-time processor to acquire image frames, perform array flat-fielding, execute a 64 x 64 element 2D complex FFT, and to average the power spectrum all within the 25 msec coherence time for speckles at near IR wavelength. The processor is a compact unit controlled by a PC with real time display and data storage capability. It provides the ability to optimize observations and obtain results on the telescope rather than waiting several weeks before the data can be analyzed and viewed with off-line methods

UNIBUS processor interface for a FASTBUS data acquisition system

International Nuclear Information System (INIS)

Larwill, M.; Lagerlund, T.D.; Barsotti, E.; Taff, L.M.; Franzen, J.

1981-01-01

Current work on a FASTBUS data acquisition system at Fermilab is described. The system will consist of three pieces of FASTBUS hardware: a UNIBUS processor interface (UPI), a dual-ported bulk memory, and a FASTBUS ''event builder'' (i.e., data acquisition processor). Primary efforts have been on specifying and constructing a UPI. The present specification includes capability for all basic FASTBUS operations, including list processing of consecutive FASTBUS operations. Some possible FASTBUS data acquisition system architectures employing the UPI are discussed along with some detailed specifications of the UPI itself

The UA1 trigger processor

International Nuclear Information System (INIS)

Grayer, G.H.

1981-01-01

Experiment UA1 is a large multi-purpose spectrometer at the CERN proton-antiproton collider, scheduled for late 1981. The principal trigger is formed on the basis of the energy deposition in calorimeters. A trigger decision taken in under 2.4 microseconds can avoid dead time losses due to the bunched nature of the beam. To achieve this we have built fast 8-bit charge to digital converters followed by two identical digital processors tailored to the experiment. The outputs of groups of the 2440 photomultipliers in the calorimeters are summed to form a total of 288 input channels to the ADCs. A look-up table in RAM is used to convert the digitised photomultiplier signals to energy in one processor, combinations of input channels, and also counts the number of clusters with electromagnetic or hadronic energy above pre-determined levels. Up to twelve combinations of these conditions, together with external information, may be combined in coincidence or in veto to form the final trigger. Provision has been made for testing using simulated data in an off-line mode, and sampling real data when on-line. (orig.)

Validation of the catalytic properties of Cu-Os/13X using single fixed bed reactor in selective catalytic reduction of NO

International Nuclear Information System (INIS)

Oh, Kwang Seok; Woo, Seong Ihl

2007-01-01

Catalytic decomposition of NO over Cu-Os/13X has been carried out in a tubular fixed bed reactor at atmospheric pressure and the results were compared with literature data performed by high-throughput screening (HTS). The activity and durability of Cu-Os/13X prepared by conventional ion-exchange method have been investigated in the presence of H 2 O and SO 2 . It was found that Cu-Os/13X prepared by ion-exchange shows a high activity in a wide temperature range in selective catalytic reduction (SCR) of NO with C 3 H 6 compared to Cu/13X, proving the existence of more NO adsorption site on Cu-Os/13X. However, Cu-Os/13X exhibited low activity in the presence of water, and was quite different from the result reported in literature. SO 2 resistance is also low and does not recover its original activity when the SO 2 was blocked in the feed gas stream. This result suggested that catalytic activity between combinatorial screening and conventional testing should be compared to confirm the validity of high-throughput screening

Suboptimal processor for anomaly detection for system surveillance and diagnosis

Energy Technology Data Exchange (ETDEWEB)

Ciftcioglu, Oe.; Hoogenboom, J.E.; Dam, H. van

1989-06-01

Anomaly detection for nuclear reactor surveillance and diagnosis is described. The residual noise obtained as a result of autoregressive (AR) modelling is essential to obtain high sensitivity for anomaly detection. By means of the method of hypothesis testing a suboptimal anomaly detection processor is devised for system surveillance and diagnosis. Experiments are carried out to investigate the performance of the processor, which is in particular of interest for on-line and real-time applications.

Degradation of the ammonia wastewater in aqueous medium with ozone in combination with mesoporous TiO2 catalytic

Science.gov (United States)

Liu, Zhiwu; Qiu, Jianping; Zheng, Chaocan; Li, Liqing

2017-03-01

TiO2 mesoporous nanomaterials are now widely used in catalytic ozone technology. In this paper, the market P25 as precursor hydrothermal method to prepare TiO2 mesoporous materials, ozone catalyst material characterization by transmission electron microscopy, surface area analyzers, and X-ray diffraction technique and found that nanotubes, nanosheets, nanorods through characterization results, nano-particles of different morphology and anatase and rutile proportion of the ozone catalytic material can be controlled by the calcination temperature and the temperature of hot water to give, and with the hot water temperature and calcination temperature, the catalyst becomes small aperture size larger catalyst crystalline phase from anatase to rutile gradually shift. Catalytic materials have been prepared by the Joint ozone degradation of ammonia wastewater to evaluate mesoporous TiO2 nanomaterials ozone catalytic performance, the results showed that: ammonia wastewater removal efficiency of various catalytic materials relatively separate ozone and markets P25 effects are significantly improved, and TiO2 nanotubes cooperate with ozone degradation ammonia wastewater highest efficiency, in addition, rutile TiO2 catalysts, the more the better the performance of their ozone catalysis.

Phenomenological modeling and study of a catalytic membrane reactor for water detritiation

International Nuclear Information System (INIS)

Mascarade, Jeremy

2015-01-01

Tritium is produced in light and heavy water reactor fuel by ternary fission or neutron activation. This by-product is used as fuel in fusion fuel reactors such as JET in Culham or ITER in Cadarache (France). The growing interest of this research area will make the tritium fluxes increase; it is then worth addressing the question of its future whether it will be used or flushed out from liquid and gaseous effluents or waste. This thesis studies the recovery of tritium as fuel for fusion machines by means of packed bed membrane reactor (PBMR). Such a reactor combines catalytic conversion of tritiated water thanks to isotope exchange with hydrogen according to the reversible reaction Q 2 O+H 2 ↔H 2 O+Q 2 (Q=H,D or T) and selective permeation of Q 2 through Pd-based membrane. In fact, palladium has the ability to bond with hydrogen isotopes, creating a selective permeation barrier. In the PBMR, thanks to the reaction products withdrawal, these permeation fluxes drive the heavy water conversion rate, to higher values than those reached in conventional fixed bed reactors (Le Chatelier's law). In order to study PBMRs, the CEA has built a test bench, using deuterium instead of tritium, allowing the analysis of their conversion and separation performances at the laboratory scale. An in-house method has been developed to determine simultaneously hydrogen and water isotopologues content by mass spectrometer analysis. It was experimentally shown that the activity of Ni-based catalyst used in this study was sufficient to allow the isotope exchange reactions to reach their thermodynamic equilibrium in a very short time. In addition, hydrogen permeation flux was shown to follow a Richardson's law. Sensitivity studies performed on the PBMR's main operating parameters revealed that its global performance (i.e. de-deuteration factor) increases with the temperature, the transmembrane pressure difference, the sweep gas flow rate and the residence time in the catalyst

Catalytic bioreactors and methods of using same

Science.gov (United States)

Worden, Robert Mark; Liu, Yangmu Chloe

2017-07-25

Various embodiments provide a bioreactor for producing a bioproduct comprising one or more catalytically active zones located in a housing and adapted to keep two incompatible gaseous reactants separated when in a gas phase, wherein each of the one or more catalytically active zones may comprise a catalytic component retainer and a catalytic component retained within and/or thereon. Each of the catalytically active zones may additionally or alternatively comprise a liquid medium located on either side of the catalytic component retainer. Catalytic component may include a microbial cell culture located within and/or on the catalytic component retainer, a suspended catalytic component suspended in the liquid medium, or a combination thereof. Methods of using various embodiments of the bioreactor to produce a bioproduct, such as isobutanol, are also provided.

Space and frequency-multiplexed optical linear algebra processor - Fabrication and initial tests

Science.gov (United States)

Casasent, D.; Jackson, J.

1986-01-01

A new optical linear algebra processor architecture is described. Space and frequency-multiplexing are used to accommodate bipolar and complex-valued data. A fabricated laboratory version of this processor is described, the electronic support system used is discussed, and initial test data obtained on it are presented.

Principles of water oxidation and O2-based hydrocarbon transformation by multinuclear catalytic sites

Energy Technology Data Exchange (ETDEWEB)

Musaev, Djamaladdin G [Chemistry, Emory University; Hill, Craig L [Chemistry, Emory University; Morokuma, Keiji [Chemistry, Emory University

2014-10-28

Abstract The central thrust of this integrated experimental and computational research program was to obtain an atomistic-level understanding of the structural and dynamic factors underlying the design of catalysts for water oxidation and selective reductant-free O2-based transformations. The focus was on oxidatively robust polyoxometalate (POM) complexes in which a catalytic active site interacts with proximal metal centers in a synergistic manner. Thirty five publications in high-impact journals arose from this grant. I. Developing an oxidatively and hydrolytically stable and fast water oxidation catalyst (WOC), a central need in the production of green fuels using water as a reductant, has proven particularly challenging. During this grant period we have designed and investigated several carbon-free, molecular (homogenous), oxidatively and hydrolytically stable WOCs, including the Rb8K2[{Ru4O4(OH)2(H2O)4}(γ-SiW10O36)2]·25H2O (1) and [Co4(H2O)2(α-PW9O34)2]10- (2). Although complex 1 is fast, oxidatively and hydrolytically stable WOC, Ru is neither abundant nor inexpensive. Therefore, development of a stable and fast carbon-free homogenous WOC, based on earth-abundant elements became our highest priority. In 2010, we reported the first such catalyst, complex 2. This complex is substantially faster than 1 and stable under homogeneous conditions. Recently, we have extended our efforts and reported a V2-analog of the complex 2, i.e. [Co4(H2O)2(α-VW9O34)2]10- (3), which shows an even greater stability and reactivity. We succeeded in: (a) immobilizing catalysts 1 and 2 on the surface of various electrodes, and (b) elucidating the mechanism of O2 formation and release from complex 1, as well as the Mn4O4L6 “cubane” cluster. We have shown that the direct O-O bond formation is the most likely pathway for O2 formation during water oxidation catalyzed by 1. II. Oxo transfer catalysts that contain two proximal and synergistically interacting redox active metal

Automotive Fuel Processor Development and Demonstration with Fuel Cell Systems

Energy Technology Data Exchange (ETDEWEB)

Nuvera Fuel Cells

2005-04-15

The potential for fuel cell systems to improve energy efficiency and reduce emissions over conventional power systems has generated significant interest in fuel cell technologies. While fuel cells are being investigated for use in many applications such as stationary power generation and small portable devices, transportation applications present some unique challenges for fuel cell technology. Due to their lower operating temperature and non-brittle materials, most transportation work is focusing on fuel cells using proton exchange membrane (PEM) technology. Since PEM fuel cells are fueled by hydrogen, major obstacles to their widespread use are the lack of an available hydrogen fueling infrastructure and hydrogen's relatively low energy storage density, which leads to a much lower driving range than conventional vehicles. One potential solution to the hydrogen infrastructure and storage density issues is to convert a conventional fuel such as gasoline into hydrogen onboard the vehicle using a fuel processor. Figure 2 shows that gasoline stores roughly 7 times more energy per volume than pressurized hydrogen gas at 700 bar and 4 times more than liquid hydrogen. If integrated properly, the fuel processor/fuel cell system would also be more efficient than traditional engines and would give a fuel economy benefit while hydrogen storage and distribution issues are being investigated. Widespread implementation of fuel processor/fuel cell systems requires improvements in several aspects of the technology, including size, startup time, transient response time, and cost. In addition, the ability to operate on a number of hydrocarbon fuels that are available through the existing infrastructure is a key enabler for commercializing these systems. In this program, Nuvera Fuel Cells collaborated with the Department of Energy (DOE) to develop efficient, low-emission, multi-fuel processors for transportation applications. Nuvera's focus was on (1) developing fuel

The tritium labeling of Butibufen by heterogeneous catalytic exchange

International Nuclear Information System (INIS)

Santamaria, J.; Rebollo, D.

1986-01-01

The labeling of a new non-steroidal antiinflammatory agent, Butibufen (2-(4-isobutylphenyl) butyric acid) was studied. The method used was heterogeneous catalytic exchange between Butibufen and tritiated water, obtained in situ. Purification was accomplished through thin layer chromatography. Concentration, purity and specific activity of the labeled drug were determined by ultraviolet and liquid scintillation techniques. (Author) 7 refs

Catalytic Synthesis of Ethyl Ester From Some Common Oils ...

African Journals Online (AJOL)

Catalytic conversion of ethanol to fatty acid ethyl esters (FAEE) was carried out by homogeneous and heterogeneous transesterification of melon seed, shea butter and neem seed oils using NaOH, KOH and 5wt%CaO/Al2O3 catalyst systems respectively. Oil content of the seeds from n-hexane or hot water extract ranged ...

The Square Kilometre Array Science Data Processor. Preliminary compute platform design

International Nuclear Information System (INIS)

Broekema, P.C.; Nieuwpoort, R.V. van; Bal, H.E.

2015-01-01

The Square Kilometre Array is a next-generation radio-telescope, to be built in South Africa and Western Australia. It is currently in its detailed design phase, with procurement and construction scheduled to start in 2017. The SKA Science Data Processor is the high-performance computing element of the instrument, responsible for producing science-ready data. This is a major IT project, with the Science Data Processor expected to challenge the computing state-of-the art even in 2020. In this paper we introduce the preliminary Science Data Processor design and the principles that guide the design process, as well as the constraints to the design. We introduce a highly scalable and flexible system architecture capable of handling the SDP workload

An enhanced Ada run-time system for real-time embedded processors

Science.gov (United States)

Sims, J. T.

1991-01-01

An enhanced Ada run-time system has been developed to support real-time embedded processor applications. The primary focus of this development effort has been on the tasking system and the memory management facilities of the run-time system. The tasking system has been extended to support efficient and precise periodic task execution as required for control applications. Event-driven task execution providing a means of task-asynchronous control and communication among Ada tasks is supported in this system. Inter-task control is even provided among tasks distributed on separate physical processors. The memory management system has been enhanced to provide object allocation and protected access support for memory shared between disjoint processors, each of which is executing a distinct Ada program.

High speed vision processor with reconfigurable processing element array based on full-custom distributed memory

Science.gov (United States)

Chen, Zhe; Yang, Jie; Shi, Cong; Qin, Qi; Liu, Liyuan; Wu, Nanjian

2016-04-01

In this paper, a hybrid vision processor based on a compact full-custom distributed memory for near-sensor high-speed image processing is proposed. The proposed processor consists of a reconfigurable processing element (PE) array, a row processor (RP) array, and a dual-core microprocessor. The PE array includes two-dimensional processing elements with a compact full-custom distributed memory. It supports real-time reconfiguration between the PE array and the self-organized map (SOM) neural network. The vision processor is fabricated using a 0.18 µm CMOS technology. The circuit area of the distributed memory is reduced markedly into 1/3 of that of the conventional memory so that the circuit area of the vision processor is reduced by 44.2%. Experimental results demonstrate that the proposed design achieves correct functions.

Initial explorations of ARM processors for scientific computing

International Nuclear Information System (INIS)

Abdurachmanov, David; Elmer, Peter; Eulisse, Giulio; Muzaffar, Shahzad

2014-01-01

Power efficiency is becoming an ever more important metric for both high performance and high throughput computing. Over the course of next decade it is expected that flops/watt will be a major driver for the evolution of computer architecture. Servers with large numbers of ARM processors, already ubiquitous in mobile computing, are a promising alternative to traditional x86-64 computing. We present the results of our initial investigations into the use of ARM processors for scientific computing applications. In particular we report the results from our work with a current generation ARMv7 development board to explore ARM-specific issues regarding the software development environment, operating system, performance benchmarks and issues for porting High Energy Physics software

SPP: A data base processor data communications protocol

Science.gov (United States)

Fishwick, P. A.

1983-01-01

The design and implementation of a data communications protocol for the Intel Data Base Processor (DBP) is defined. The protocol is termed SPP (Service Port Protocol) since it enables data transfer between the host computer and the DBP service port. The protocol implementation is extensible in that it is explicitly layered and the protocol functionality is hierarchically organized. Extensive trace and performance capabilities have been supplied with the protocol software to permit optional efficient monitoring of the data transfer between the host and the Intel data base processor. Machine independence was considered to be an important attribute during the design and implementation of SPP. The protocol source is fully commented and is included in Appendix A of this report.

Techniques for optimizing inerting in electron processors

International Nuclear Information System (INIS)

Rangwalla, I.J.; Korn, D.J.; Nablo, S.V.

1993-01-01

The design of an ''inert gas'' distribution system in an electron processor must satisfy a number of requirements. The first of these is the elimination or control of beam produced ozone and NO x which can be transported from the process zone by the product into the work area. Since the tolerable levels for O 3 in occupied areas around the processor are 3 in the beam heated process zone, or exhausting and dilution of the gas at the processor exit. The second requirement of the inerting system is to provide a suitable environment for completing efficient, free radical initiated addition polymerization. The competition between radical loss through de-excitation and that from O 2 quenching must be understood. This group has used gas chromatographic analysis of electron cured coatings to study the trade-offs of delivered dose, dose rate and O 2 concentrations in the process zone to determine the tolerable ranges of parameter excursions for production quality control purposes. These techniques are described for an ink coating system on paperboard, where a broad range of process parameters have been studied (D, D radical, O 2 ). It is then shown how the technique is used to optimize the use of higher purity (10-100 ppm O 2 ) nitrogen gas for inerting, in combination with lower purity (2-20,000 ppm O 2 ) non-cryogenically produced gas, as from a membrane or pressure swing adsorption generators. (author)

A discussion of tools and techniques for distributed processor based control systems using CAMAC

International Nuclear Information System (INIS)

Tippie, J.W.; Scandora, A.E.

1985-01-01

This paper describes and analyzes various distributed processor architectures using commercially available CAMAC components. The general orientation is toward distributed control systems using Digital Equipment Corporation LSI11 processors in a CAMAC environment. The paper describes in detail software tools available to simplify the development of applications software and to provide a high-level runtime environment both at the host and the remote processors. Discussion focuses on techniques for downloading of operating systems from a large host and applications tasks written in high-level languages. It also discusses software tools which enable tasks in the remote processors to exchange messages and data with tasks in the host in a simple and elegant way

Expert System Constant False Alarm Rate (CFAR) Processor

National Research Council Canada - National Science Library

Wicks, Michael C

2006-01-01

An artificial intelligence system improves radar signal processor performance by increasing target probability of detection and reducing probability of false alarm in a severe radar clutter environment...

Catalytic non-thermal plasma reactor for the decomposition of a ...

Indian Academy of Sciences (India)

2016-08-26

Aug 26, 2016 ... Among the catalytic study, MnOx/SMF (manganese oxide on sintered metal fibres electrode) shows better performance, probably due to the formation of active oxygen species by in situ decomposition of ozone on the catalyst surface. Water vapour further enhanced the performance due to the in situ ...

Catalytic process for tritium exchange reaction

International Nuclear Information System (INIS)

Hansoo Lee; Kang, H.S.; Paek, S.W.; Hongsuk Chung; Yang Geun Chung; Sook Kyung Lee

2001-01-01

The catalytic activities for a hydrogen isotope exchange were measured through the reaction of a vapor and gas mixture. The catalytic activity showed to be comparable with the published data. Since the gas velocity is relatively low, the deactivation was not found clearly during the 5-hour experiment. Hydrogen isotope transfer experiments were also conducted through the liquid phase catalytic exchange reaction column that consisted of a catalytic bed and a hydrophilic bed. The efficiencies of both the catalytic and hydrophilic beds were higher than 0.9, implying that the column performance was excellent. (author)

Organo-bridged silsesquioxane titanates for heterogeneous catalytic epoxidation with aqueous hydrogen peroxide

NARCIS (Netherlands)

Wang, Y.M.; Magusin, P.C.M.M.; Santen, van R.A.; Abbenhuis, H.C.L.

2007-01-01

Organo-bridged silsesquioxane titanates for heterogeneous catalytic epoxidation with aqueous hydrogen peroxide were synthesized through the acid-catalyzed hydrolysis and co-condensation of organotrialkoxysilane monomers and a,¿-bis(trialkoxysilyl) alkane cross-linkers in ethanol–water solution, with

Choosing processor array configuration by performance modeling for a highly parallel linear algebra algorithm

International Nuclear Information System (INIS)

Littlefield, R.J.; Maschhoff, K.J.

1991-04-01

Many linear algebra algorithms utilize an array of processors across which matrices are distributed. Given a particular matrix size and a maximum number of processors, what configuration of processors, i.e., what size and shape array, will execute the fastest? The answer to this question depends on tradeoffs between load balancing, communication startup and transfer costs, and computational overhead. In this paper we analyze in detail one algorithm: the blocked factored Jacobi method for solving dense eigensystems. A performance model is developed to predict execution time as a function of the processor array and matrix sizes, plus the basic computation and communication speeds of the underlying computer system. In experiments on a large hypercube (up to 512 processors), this model has been found to be highly accurate (mean error ∼ 2%) over a wide range of matrix sizes (10 x 10 through 200 x 200) and processor counts (1 to 512). The model reveals, and direct experiment confirms, that the tradeoffs mentioned above can be surprisingly complex and counterintuitive. We propose decision procedures based directly on the performance model to choose configurations for fastest execution. The model-based decision procedures are compared to a heuristic strategy and shown to be significantly better. 7 refs., 8 figs., 1 tab

NeuroFlow: A General Purpose Spiking Neural Network Simulation Platform using Customizable Processors.

Science.gov (United States)

Cheung, Kit; Schultz, Simon R; Luk, Wayne

2015-01-01

NeuroFlow is a scalable spiking neural network simulation platform for off-the-shelf high performance computing systems using customizable hardware processors such as Field-Programmable Gate Arrays (FPGAs). Unlike multi-core processors and application-specific integrated circuits, the processor architecture of NeuroFlow can be redesigned and reconfigured to suit a particular simulation to deliver optimized performance, such as the degree of parallelism to employ. The compilation process supports using PyNN, a simulator-independent neural network description language, to configure the processor. NeuroFlow supports a number of commonly used current or conductance based neuronal models such as integrate-and-fire and Izhikevich models, and the spike-timing-dependent plasticity (STDP) rule for learning. A 6-FPGA system can simulate a network of up to ~600,000 neurons and can achieve a real-time performance of 400,000 neurons. Using one FPGA, NeuroFlow delivers a speedup of up to 33.6 times the speed of an 8-core processor, or 2.83 times the speed of GPU-based platforms. With high flexibility and throughput, NeuroFlow provides a viable environment for large-scale neural network simulation.

Beeldverwerking met de Micron Automatic Processor

OpenAIRE

Goyens, Frank

2017-01-01

Deze thesis is een onderzoek naar toepassingen binnen beeldverwerking op de Micron Automata Processor hardware. De hardware wordt vergeleken met populaire hedendaagse hardware. Ook bevat dit onderzoek nuttige informatie en strategieën voor het ontwikkelen van nieuwe toepassingen. Bevindingen in dit onderzoek omvatten proof of concept algoritmes en een praktische toepassing.

Architecture-Aware Optimization of an HEVC decoder on Asymmetric Multicore Processors

OpenAIRE

Rodríguez-Sánchez, Rafael; Quintana-Ortí, Enrique S.

2016-01-01

Low-power asymmetric multicore processors (AMPs) attract considerable attention due to their appealing performance-power ratio for energy-constrained environments. However, these processors pose a significant programming challenge due to the integration of cores with different performance capabilities, asking for an asymmetry-aware scheduling solution that carefully distributes the workload. The recent HEVC standard, which offers several high-level parallelization strategies, is an important ...

Using of opportunities of graphic processors for acceleration of scientific and technical calculations

International Nuclear Information System (INIS)

Dudnik, V.A.; Kudryavtsev, V.I.; Sereda, T.M.; Us, S.A.; Shestakov, M.V.

2009-01-01

The new opportunities of modern graphic processors (GPU) for acceleration of the scientific and technical calculations with the help of paralleling of a calculating task between the central processor and GPU are described. The description of using the technology NVIDIA CUDA for connection of parallel computing opportunities of GPU within the programme of the some intensive mathematical tasks is resulted. The examples of comparison of parameters of productivity in the process of these tasks' calculation without application of GPU and with use of opportunities NVIDIA CUDA for graphic processor GeForce 8800 are resulted

Contributions to the theory of catalytic titrations-III Neutralization catalytic titrations.

Science.gov (United States)

Gaál, F F; Abramović, B F

1985-07-01

Neutralization catalytic titrations of weak monoprotic adds and bases with both volumetric and coulometric addition of the titrant (strong base/acid) have been simulated by taking into account the equilibrium concentration of the catalyst during the titration. The influence of several factors on the shape of the simulated catalytic titration curve has been investigated and is discussed.

The Ocean Colour Climate Change Initiative: II. Spatial and Temporal Homogeneity of Satellite Data Retrieval Due to Systematic Effects in Atmospheric Correction Processors

Science.gov (United States)

Muller, Dagmar; Krasemann, Hajo; Brewin, Robert J. W.; Brockmann, Carsten; Deschamps, Pierre-Yves; Fomferra, Norman; Franz, Bryan A.; Grant, Mike G.; Groom, Steve B.; Melin, Frederic;

Run-time Adaptable VLIW Processors : Resources, Performance, Power Consumption, and Reliability Trade-offs

NARCIS (Netherlands)

Anjam, F.

2013-01-01

In this dissertation, we propose to combine programmability with reconfigurability by implementing an adaptable programmable VLIW processor in a reconfigurable hardware. The approach allows applications to be developed at high-level (C language level), while at the same time, the processor

Trigger and decision processors

International Nuclear Information System (INIS)

Franke, G.

1980-11-01

In recent years there have been many attempts in high energy physics to make trigger and decision processes faster and more sophisticated. This became necessary due to a permanent increase of the number of sensitive detector elements in wire chambers and calorimeters, and in fact it was possible because of the fast developments in integrated circuits technique. In this paper the present situation will be reviewed. The discussion will be mainly focussed upon event filtering by pure software methods and - rather hardware related - microprogrammable processors as well as random access memory triggers. (orig.)

Optical Finite Element Processor

Science.gov (United States)

Casasent, David; Taylor, Bradley K.

1986-01-01

A new high-accuracy optical linear algebra processor (OLAP) with many advantageous features is described. It achieves floating point accuracy, handles bipolar data by sign-magnitude representation, performs LU decomposition using only one channel, easily partitions and considers data flow. A new application (finite element (FE) structural analysis) for OLAPs is introduced and the results of a case study presented. Error sources in encoded OLAPs are addressed for the first time. Their modeling and simulation are discussed and quantitative data are presented. Dominant error sources and the effects of composite error sources are analyzed.

Radiation Tolerant Software Defined Video Processor, Phase I

Data.gov (United States)

National Aeronautics and Space Administration — MaXentric's is proposing a radiation tolerant Software Define Video Processor, codenamed SDVP, for the problem of advanced motion imaging in the space environment....

The fast tracker processor for hadronic collider triggers

CERN Document Server

Annovi, A; Bardi, A; Carosi, R; Dell'Orso, Mauro; D'Onofrio, M; Giannetti, P; Iannaccone, G; Morsani, F; Pietri, M; Varotto, G

2000-01-01

Perspective for precise and fast track reconstruction in future hadronic collider experiments are addressed. We discuss the feasibility of a pipelined highly parallelized processor dedicated to the implementation of a very fast algorithm. The algorithm is based on the use of a large bank of pre-stored combinations of trajectory points (patterns) for extremely complex tracking systems. The CMS experiment at LHC is used as a benchmark. Tracking data from the events selected by the level-1 trigger are sorted and filtered by the Fast Tracker processor at a rate of 100 kHz. This data organization allows the level-2 trigger logic to reconstruct full resolution traces with transverse momentum above few GeV and search secondary vertexes within typical level-2 times. 15 Refs.

Digital implementation of the preloaded filter pulse processor

International Nuclear Information System (INIS)

Westphal, G.P.; Cadek, G.R.; Keroe, N.; Sauter, TH.; Thorwartl, P.C.

1995-01-01

Adapting it's processing time to the respective pulse intervals, the Preloaded Filter (PLF) pulse processor offers optimum resolution together with highest possible throughput rates. The PLF algorithm could be formulated in a recursive manner which made possible it's implementation by means of a large field-programmable gate array, as a fast, pipe-lined digital processor with 10 MHz maximum throughput rate. While pre-filter digitization by an ADC with 12 bit resolution and 10M Hz sampling rate resulted in a poorer resolution than that of an analog filter, a digital PLF based on an ADC with 14 bit resolution and 10 MHz sampling rate, surpassed high-quality analog filters in resolution, throughput rate and long-term stability. (author) 6 refs.; 7 figs

Corporate water footprint accounting and impact assessment: the case of the water footprint of a sugar-containing carbonated beverage

NARCIS (Netherlands)

Ercin, Ertug; Martinez-Aldaya, Maite; Hoekstra, Arjen Ysbert

2011-01-01

All water use in the world is ultimately linked to final consumption by consumers. It is therefore interesting to know the specific water requirements of various consumer goods, particularly the water-intensive ones. This information is relevant not only for consumers, but also for food processors,

Dual shear plate power processor packaging design. [for Solar Electric Propulsion spacecraft

Science.gov (United States)

Franzon, A. O.; Fredrickson, C. D.; Ross, R. G.

1975-01-01

The use of solar electric propulsion (SEP) for spacecraft primary propulsion imposes an extreme range of operational and environmental design requirements associated with the diversity of missions for which solar electric primary propulsion is advantageous. One SEP element which is particularly sensitive to these environmental extremes is the power processor unit (PPU) which powers and controls the electric ion thruster. An improved power processor thermal-mechanical packaging approach, referred to as dual shear plate packaging, has been designed to accommodate these different requirements with minimum change to the power processor design. Details of this packaging design are presented together with test results obtained from thermal-vacuum and structural-vibration tests conducted with prototype hardware.

Parallel processor programs in the Federal Government

Science.gov (United States)

Schneck, P. B.; Austin, D.; Squires, S. L.; Lehmann, J.; Mizell, D.; Wallgren, K.

1985-01-01

In 1982, a report dealing with the nation's research needs in high-speed computing called for increased access to supercomputing resources for the research community, research in computational mathematics, and increased research in the technology base needed for the next generation of supercomputers. Since that time a number of programs addressing future generations of computers, particularly parallel processors, have been started by U.S. government agencies. The present paper provides a description of the largest government programs in parallel processing. Established in fiscal year 1985 by the Institute for Defense Analyses for the National Security Agency, the Supercomputing Research Center will pursue research to advance the state of the art in supercomputing. Attention is also given to the DOE applied mathematical sciences research program, the NYU Ultracomputer project, the DARPA multiprocessor system architectures program, NSF research on multiprocessor systems, ONR activities in parallel computing, and NASA parallel processor projects.

Nonlinear Wave Simulation on the Xeon Phi Knights Landing Processor

OpenAIRE

Hristov Ivan; Goranov Goran; Hristova Radoslava

2018-01-01

We consider an interesting from computational point of view standing wave simulation by solving coupled 2D perturbed Sine-Gordon equations. We make an OpenMP realization which explores both thread and SIMD levels of parallelism. We test the OpenMP program on two different energy equivalent Intel architectures: 2× Xeon E5-2695 v2 processors, (code-named “Ivy Bridge-EP”) in the Hybrilit cluster, and Xeon Phi 7250 processor (code-named “Knights Landing” (KNL). The results show 2 times better per...

Global synchronization of parallel processors using clock pulse width modulation

Science.gov (United States)

Chen, Dong; Ellavsky, Matthew R.; Franke, Ross L.; Gara, Alan; Gooding, Thomas M.; Haring, Rudolf A.; Jeanson, Mark J.; Kopcsay, Gerard V.; Liebsch, Thomas A.; Littrell, Daniel; Ohmacht, Martin; Reed, Don D.; Schenck, Brandon E.; Swetz, Richard A.

2013-04-02

A circuit generates a global clock signal with a pulse width modification to synchronize processors in a parallel computing system. The circuit may include a hardware module and a clock splitter. The hardware module may generate a clock signal and performs a pulse width modification on the clock signal. The pulse width modification changes a pulse width within a clock period in the clock signal. The clock splitter may distribute the pulse width modified clock signal to a plurality of processors in the parallel computing system.

Catalytic distillation structure

Science.gov (United States)

Smith, L.A. Jr.

1984-04-17

Catalytic distillation structure is described for use in reaction distillation columns, and provides reaction sites and distillation structure consisting of a catalyst component and a resilient component intimately associated therewith. The resilient component has at least about 70 volume % open space and is present with the catalyst component in an amount such that the catalytic distillation structure consists of at least 10 volume % open space. 10 figs.

Pathway Processor 2.0: a web resource for pathway-based analysis of high-throughput data.

Science.gov (United States)

Beltrame, Luca; Bianco, Luca; Fontana, Paolo; Cavalieri, Duccio

2013-07-15

Pathway Processor 2.0 is a web application designed to analyze high-throughput datasets, including but not limited to microarray and next-generation sequencing, using a pathway centric logic. In addition to well-established methods such as the Fisher's test and impact analysis, Pathway Processor 2.0 offers innovative methods that convert gene expression into pathway expression, leading to the identification of differentially regulated pathways in a dataset of choice. Pathway Processor 2.0 is available as a web service at http://compbiotoolbox.fmach.it/pathwayProcessor/. Sample datasets to test the functionality can be used directly from the application. duccio.cavalieri@fmach.it Supplementary data are available at Bioinformatics online.

Numerical studies of a compact gasoline reformer for fuel cell vehicle applications

International Nuclear Information System (INIS)

McIntyre, C.S.; Harrison, S.J.; Oosthuizen, P.H.; Peppley, B.A.

2004-01-01

There has been recent interest in the development of compact fuel processors to produce hydrogen for fuel cell powered vehicles. Gasoline is a promising candidate for distributed or on-board processing because of its high energy density and well-developed infrastructure. A compact fuel processor is under development which utilizes autothermal reforming (ATR) to extract hydrogen from iso-octane, which is used as a surrogate for gasoline. The processor consists of a double-pass packed-bed catalytic reactor to promote partial oxidation, steam reforming, and water-gas-shift reactions. As part of this system development, a commercial computational fluid dynamics (CFD) package was used to model flow and chemical reactions. Reformer performance is presented in terms of hydrogen content in the product stream, reformer efficiency (LHV efficiency) and iso-octane conversion. Results are compared to on-going experimental studies. (author)

Modcomp MAX IV System Processors reference guide

Energy Technology Data Exchange (ETDEWEB)

Cummings, J.

1990-10-01

A user almost always faces a big problem when having to learn to use a new computer system. The information necessary to use the system is often scattered throughout many different manuals. The user also faces the problem of extracting the information really needed from each manual. Very few computer vendors supply a single Users Guide or even a manual to help the new user locate the necessary manuals. Modcomp is no exception to this, Modcomp MAX IV requires that the user be familiar with the system file usage which adds to the problem. At General Atomics there is an ever increasing need for new users to learn how to use the Modcomp computers. This paper was written to provide a condensed Users Reference Guide'' for Modcomp computer users. This manual should be of value not only to new users but any users that are not Modcomp computer systems experts. This Users Reference Guide'' is intended to provided the basic information for the use of the various Modcomp System Processors necessary to, create, compile, link-edit, and catalog a program. Only the information necessary to provide the user with a basic understanding of the Systems Processors is included. This document provides enough information for the majority of programmers to use the Modcomp computers without having to refer to any other manuals. A lot of emphasis has been placed on the file description and usage for each of the System Processors. This allows the user to understand how Modcomp MAX IV does things rather than just learning the system commands.

Conceptual study of on orbit production of cryogenic propellants by water electrolysis

Science.gov (United States)

Moran, Matthew E.

1991-01-01

The feasibility is assessed of producing cryogenic propellants on orbit by water electrolysis in support of NASA's proposed Space Exploration Initiative (SEI) missions. Using this method, water launched into low earth orbit (LEO) would be split into gaseous hydrogen and oxygen by electrolysis in an orbiting propellant processor spacecraft. The resulting gases would then be liquified and stored in cryogenic tanks. Supplying liquid hydrogen and oxygen fuel to space vehicles by this technique has some possible advantages over conventional methods. The potential benefits are derived from the characteristics of water as a payload, and include reduced ground handling and launch risk, denser packaging, and reduced tankage and piping requirements. A conceptual design of a water processor was generated based on related previous studies, and contemporary or near term technologies required. Extensive development efforts would be required to adapt the various subsystems needed for the propellant processor for use in space. Based on the cumulative results, propellant production by on orbit water electrolysis for support of SEI missions is not recommended.

Catalytic steam reforming of ethanol for hydrogen production: Brief status

Directory of Open Access Journals (Sweden)

Bineli Aulus R.R.

2016-01-01

Full Text Available Hydrogen represents a promising fuel since it is considered as a cleanest energy carrier and also because during its combustion only water is emitted. It can be produced from different kinds of renewable feedstocks, such as ethanol, in this sense hydrogen could be treated as biofuel. Three chemical reactions can be used to achieve this purpose: the steam reforming (SR, the partial oxidation (POX and the autothermal reforming (ATR. In this study, the catalysts implemented in steam reforming of ethanol were reviewed. A wide variety of elements can be used as catalysts for this reaction, such as base metals (Ni, Cu and Co or noble metals (Rh, Pt and Ru usually deposited on a support material that increases surface area and improves catalytic function. The use of Rh, Ni and Pt supported or promoted with CeO2, and/or La2O3 shows excellent performance in ethanol SR catalytic process. The ratio of water to ethanol, reaction temperatures, catalysts loadings, selectivity and activity are also discussed as they are extremely important for high hydrogen yields.

A pre- and post-processor for the ICOOL muon transport code

International Nuclear Information System (INIS)

Fawley, W.M.

2001-01-01

ICOOL[1] is a Fortran77 macroparticle transport code widely used by researchers to study the front end of a neutrino factory/muon collider[2]. In part due to the desire that ICOOL be usable over multiple computer platforms and operating systems, the code uses simple text files for input/output services. This choice together with user-driven requests for greater and greater choice of lattice element type and configuration has led to ICOOL input decks becoming rather difficult to compose and modify easily. Moreover, the lack of a standard graphical post-processor has prevented many ICOOL users from extracting all but the most simple results from the output files. Here I present two attempts to improve this situation: First, a simple but quite general graphical pre-processor (NIME) written in the Tcl/TK[3] to permit users to write and maintain ASCII-formatted input files by use of simple macro definitions and expansions. Second, an interactive post-processor written in Fortran90 and NCAR graphics, which allows users to define, extract, and then examine the behavior of various particle subsets. In this paper I show some examples of use of both the pre- and post-processor for a standard ICOOL run

Making the black box signal processor transparent explains the contradictions in x-ray spectroscopy

International Nuclear Information System (INIS)

Papp, T.; Maxwell, J.A.; Papp, A.T.

2008-01-01

Full text: There are significant differences in the experimental data needed in the analysis of x-ray spectra, and many of the results contradict basic conservation laws and simple arithmetic. We have identified that the main source of the unexplainable results is rooted in the signal processing electronics. We have developed a line of fully digital signal processors that have yielded improved resolution, line shape, tailing and pile up recognition. The signal processor is a time variant, non-paralyzable signal processor. The signal processor accounts for and registers all events, sorting them into two spectra, one spectrum for the desirable or accepted events, and one spectrum for the rejected events. Although the information on the rejected events is always necessary, we recently realized its additional benefits in high rate, (10 5 -10 6 cps) analytical measurements. Having all information available we were surprised to see how different conclusions and level of understandings are possible in detector characterization, detector efficiency, spectrum evaluation methodology, and that it explains many of the contradictions. We will demonstrate how the Coster-Kronig transition measurements often do not even comply with arithmetic, and why is it difficult to interpret the spectra with other processors. It will be presented that for different spectra in origin, like radioisotope measurements, x-ray fluorescence, and particle induced x-ray emission, the primary signal from the preamplifier is so different, that the signal processor is facing very different challenges, and different metrological approaches are necessary in data processing. This data processing methodology cannot be established on the partial and fractional information offered by other approaches. However, the maximum information utilization approach offered by our processor's rejected spectrum supplements the accepted spectrum to allow the development of straight forward and accurate metrology. All the

Catalytic site identification—a web server to identify catalytic site structural matches throughout PDB

Science.gov (United States)

Kirshner, Daniel A.; Nilmeier, Jerome P.; Lightstone, Felice C.

2013-01-01

The catalytic site identification web server provides the innovative capability to find structural matches to a user-specified catalytic site among all Protein Data Bank proteins rapidly (in less than a minute). The server also can examine a user-specified protein structure or model to identify structural matches to a library of catalytic sites. Finally, the server provides a database of pre-calculated matches between all Protein Data Bank proteins and the library of catalytic sites. The database has been used to derive a set of hypothesized novel enzymatic function annotations. In all cases, matches and putative binding sites (protein structure and surfaces) can be visualized interactively online. The website can be accessed at http://catsid.llnl.gov. PMID:23680785

Tinuso: A processor architecture for a multi-core hardware simulation platform

DEFF Research Database (Denmark)

Schleuniger, Pascal; Karlsson, Sven

2010-01-01

Multi-core systems have the potential to improve performance, energy and cost properties of embedded systems but also require new design methods and tools to take advantage of the new architectures. Due to the limited accuracy and performance of pure software simulators, we are working on a cycle...... accurate hardware simulation platform. We have developed the Tinuso processor architecture for this platform. Tinuso is a processor architecture optimized for FPGA implementation. The instruction set makes use of predicated instructions and supports C/C++ and assembly language programming. It is designed...... to be easy extendable to maintain the exibility required for the research on multi-core systems. Tinuso contains a co-processor interface to connect to a network interface. This interface allow for communication over an on-chip network. A clock frequency estimation study on a deeply pipelined Tinuso...

PERFORMANCE EVALUATION OF OR1200 PROCESSOR WITH EVOLUTIONARY PARALLEL HPRC USING GEP

Directory of Open Access Journals (Sweden)

R. Maheswari

2012-04-01

Full Text Available In this fast computing era, most of the embedded system requires more computing power to complete the complex function/ task at the lesser amount of time. One way to achieve this is by boosting up the processor performance which allows processor core to run faster. This paper presents a novel technique of increasing the performance by parallel HPRC (High Performance Reconfigurable Computing in the CPU/DSP (Digital Signal Processor unit of OR1200 (Open Reduced Instruction Set Computer (RISC 1200 using Gene Expression Programming (GEP an evolutionary programming model. OR1200 is a soft-core RISC processor of the Intellectual Property cores that can efficiently run any modern operating system. In the manufacturing process of OR1200 a parallel HPRC is placed internally in the Integer Execution Pipeline unit of the CPU/DSP core to increase the performance. The GEP Parallel HPRC is activated /deactivated by triggering the signals i HPRC_Gene_Start ii HPRC_Gene_End. A Verilog HDL(Hardware Description language functional code for Gene Expression Programming parallel HPRC is developed and synthesised using XILINX ISE in the former part of the work and a CoreMark processor core benchmark is used to test the performance of the OR1200 soft core in the later part of the work. The result of the implementation ensures the overall speed-up increased to 20.59% by GEP based parallel HPRC in the execution unit of OR1200.

Bounds on achievable accuracy in analog optical linear-algebra processors

Science.gov (United States)

Batsell, Stephen G.; Walkup, John F.; Krile, Thomas F.

1990-07-01

Upper arid lower bounds on the number of bits of accuracy achievable are determined by applying a seconth-ortler statistical model to the linear algebra processor. The use of bounds was found necessary due to the strong signal-dependence of the noise at the output of the optical linear algebra processor (OLAP). 1 1. ACCURACY BOUNDS One of the limiting factors in applying OLAPs to real world problems has been the poor achievable accuracy of these processors. Little previous research has been done on determining noise sources from a systems perspective which would include noise generated in the multiplication ard addition operations spatial variations across arrays and crosstalk. We have previously examined these noise sources and determined a general model for the output noise mean and variance. The model demonstrates a strony signaldependency in the noise at the output of the processor which has been confirmed by our experiments. 1 We define accuracy similar to its definition for an analog signal input to an analog-to-digital (ND) converter. The number of bits of accuracy achievable is related to the log (base 2) of the number of separable levels at the P/D converter output. The number of separable levels is fouri by dividing the dynamic range by m times the standard deviation of the signal a. 2 Here m determines the error rate in the P/D conversion. The dynamic range can be expressed as the

Parallel Processor for 3D Recovery from Optical Flow

Directory of Open Access Journals (Sweden)

Jose Hugo Barron-Zambrano

2009-01-01

Full Text Available 3D recovery from motion has received a major effort in computer vision systems in the recent years. The main problem lies in the number of operations and memory accesses to be performed by the majority of the existing techniques when translated to hardware or software implementations. This paper proposes a parallel processor for 3D recovery from optical flow. Its main feature is the maximum reuse of data and the low number of clock cycles to calculate the optical flow, along with the precision with which 3D recovery is achieved. The results of the proposed architecture as well as those from processor synthesis are presented.

Cassava processors' awareness of occupational and environmental ...

African Journals Online (AJOL)

A larger percentage (74.5%) of the respondents indicated that the Agricultural Development Programme (ADP) is their source of information. The result also showed that processor's awareness of occupational hazards associated with the different stages of cassava processing vary because their involvement in these stages

Synthesis and Investigation the Catalytic Behavior of Cr2O3 Nanoparticles

Directory of Open Access Journals (Sweden)

R. Karimian

2013-03-01

Full Text Available The use of an inorganic phase in water-in-oil (w/o microemulsion has recently received considerable attention for preparing metal oxide nanoparticles. This is a technique, which allows preparation of ultrafine metal oxide nanoparticles within the size range 40 to 80 nm. Preparation of nano chromium (III oxide studied investigated in the inverse microemulsion system. Therefore the nucleation of metal particles proceeds in the water capsules of the microemulsion. the main advantage of this method is easily controllable conditions with using low cost chromium source is merit to be considered for scaling up by industrial researchers. Besides we mainly focus on the catalytic property nano chromium (III oxide. Oxidation of aromatic aldehyde/alcohol to the corresponding carboxylic acids can be performed highly efficiently in the presence of a catalytic amount of nano chromium (III oxide in THF as solvent under mild conditions.

The application of charge-coupled device processors in automatic-control systems

Science.gov (United States)

Mcvey, E. S.; Parrish, E. A., Jr.

1977-01-01

The application of charge-coupled device (CCD) processors to automatic-control systems is suggested. CCD processors are a new form of semiconductor component with the unique ability to process sampled signals on an analog basis. Specific implementations of controllers are suggested for linear time-invariant, time-varying, and nonlinear systems. Typical processing time should be only a few microseconds. This form of technology may become competitive with microprocessors and minicomputers in addition to supplementing them.

Very wide register : an asymmetric register file organization for low power embedded processors.

NARCIS (Netherlands)

Raghavan, P.; Lambrechts, A.; Jayapala, M.; Catthoor, F.; Verkest, D.T.M.L.; Corporaal, H.

2007-01-01

In current embedded systems processors, multi-ported register files are one of the most power hungry parts of the processor, even when they are clustered. This paper presents a novel register file architecture, which has single ported cells and asymmetric interfaces to the memory and to the

7 CFR 201.73 - Processors and processing of all classes of certified seed.

Science.gov (United States)

2010-01-01

... (CONTINUED) FEDERAL SEED ACT FEDERAL SEED ACT REGULATIONS Certified Seed § 201.73 Processors and processing... of certified seed: (a) Facilities shall be available to perform processing without introducing... 7 Agriculture 3 2010-01-01 2010-01-01 false Processors and processing of all classes of certified...

High-speed BWR power plant simulations on the special-purpose peripheral processor AD10

International Nuclear Information System (INIS)

Wulff, W.; Cheng, H.S.; Lekach, S.V.; Mallen, A.N.

1985-01-01

A newly developed technique is described for fast, on-line simulations of normal and accidental transients in nuclear power plants. The technique is based on the utilization of the special-purpose peripheral processor AD10, which is specifically designed for high-speed systems simulations through integration of large systems of nonlinear ordinary differential equations. The Peach Bottom-II Boiling Water Reactor power plant has been simulated and results are presented. It is shown that the new technique not only advances safety analyses but also supports plant monitoring, failure diagnosis and accident mitigation, as well as the training of nuclear power plant operators. (author)

Homogeneity corrections in the Anger camera with micro-Z processor

International Nuclear Information System (INIS)

Knoop, B.; Jordan, K.

1979-01-01

Series of measurements largely covering the area of clinical use of the Anger camera were carried out to investigate the mode of action of inhomogeneity correction by the micro-Z processor. The variation of boundary conditions of measurements when measuring in patients is simulated as closely as possible by selecting suitable measuring arrangements. The measured results confirm both the concepts outlined above on the causes of inhomogeneity of the Anger camera and the suitability for inhomogeneity correction under clinical conditions of the methods applied in the micro-Z processor. (orig./HP) [de

Hydrogen removal from LWR containments by catalytic-coated thermal insulation elements (THINCAT)

International Nuclear Information System (INIS)

Fischer, K.; Broeckerhoff, P.; Ahlers, G.; Gustavsson, V.; Herranz, L.; Polo, J.; Dominguez, T.; Royl, P.

2003-01-01

In the THINCAT project, an alternative concept for hydrogen mitigation in a light water reactor (LWR) containment is being developed. Based on catalytic coated thermal insulation elements of the main coolant loop components, it could be considered either as an alternative to backfitting passive autocatalytic recombiner devices, or as a reinforcement of their preventive effect. The present paper summarises the results achieved at about project mid-term. Potential advantages of catalytic thermal insulation studied in the project are:-reduced risk of unintended ignition,;-no work space obstruction in the containment,;-no need for seismic qualification of additional equipment,;-improved start-up behaviour of recombination reaction. Efforts to develop a suitable catalytic layer resulted in the identification of a coating procedure that ensures high chemical reactivity and mechanical stability. Test samples for use in forthcoming experiments with this coating were produced. Models to predict the catalytic rates were developed, validated and applied in a safety analysis study. Results show that an overall hydrogen concentration reduction can be achieved which is comparable to the reduction obtained using conventional recombiners. Existing experimental information supports the argument of a reduced ignition risk

The tritium labelling of ibuprofen by heterogeneous catalytic exchange

International Nuclear Information System (INIS)

Santamaria, J.; Rebollo, D.V.; Rivera, P.; Estaban, M.

1986-01-01

The tritium labelling of 2-(4-isobutylphenyl) propionic acid (ibuprofen) was performed. The method employed was heterogeneous catalytic exchange between ibuprofen and tritiated water. Prior to labelling, thermic stability of ibuprofen was studied. Purification was accomplished through thin layer chromatography (TLC) and high performance liquid chromatography (HPLC). Concentration, purity and specific activity of the labelled compound were determined by ultraviolet, HPLC and liquid scintillation techniques. (author)

Accuracy requirements of optical linear algebra processors in adaptive optics imaging systems

Science.gov (United States)

Downie, John D.

1990-01-01

A ground-based adaptive optics imaging telescope system attempts to improve image quality by detecting and correcting for atmospherically induced wavefront aberrations. The required control computations during each cycle will take a finite amount of time. Longer time delays result in larger values of residual wavefront error variance since the atmosphere continues to change during that time. Thus an optical processor may be well-suited for this task. This paper presents a study of the accuracy requirements in a general optical processor that will make it competitive with, or superior to, a conventional digital computer for the adaptive optics application. An optimization of the adaptive optics correction algorithm with respect to an optical processor's degree of accuracy is also briefly discussed.

21 CFR 864.3875 - Automated tissue processor.

Science.gov (United States)

2010-04-01

... 21 Food and Drugs 8 2010-04-01 2010-04-01 false Automated tissue processor. 864.3875 Section 864.3875 Food and Drugs FOOD AND DRUG ADMINISTRATION, DEPARTMENT OF HEALTH AND HUMAN SERVICES (CONTINUED) MEDICAL DEVICES HEMATOLOGY AND PATHOLOGY DEVICES Pathology Instrumentation and Accessories § 864.3875...

Interleaved Subtask Scheduling on Multi Processor SOC

NARCIS (Netherlands)

Zhe, M.

2006-01-01

The ever-progressing semiconductor processing technique has integrated more and more embedded processors on a single system-on-achip (SoC). With such powerful SoC platforms, and also due to the stringent time-to-market deadlines, many functionalities which used to be implemented in ASICs are

Operation of the upgraded ATLAS Central Trigger Processor during the LHC Run 2

DEFF Research Database (Denmark)

Bertelsen, H.; Montoya, G. Carrillo; Deviveiros, P. O.

2016-01-01

The ATLAS Central Trigger Processor (CTP) is responsible for forming the Level-1 trigger decision based on the information from the calorimeter and muon trigger processors. In order to cope with the increase of luminosity and physics cross-sections in Run 2, several components of this system have...

The fast tracker processor for hadron collider triggers

CERN Document Server

Annovi, A; Bardi, A; Carosi, R; Dell'Orso, Mauro; D'Onofrio, M; Giannetti, P; Iannaccone, G; Morsani, E; Pietri, M; Varotto, G

2001-01-01

Perspectives for precise and fast track reconstruction in future hadron collider experiments are addressed. We discuss the feasibility of a pipelined highly parallel processor dedicated to the implementation of a very fast tracking algorithm. The algorithm is based on the use of a large bank of pre-stored combinations of trajectory points, called patterns, for extremely complex tracking systems. The CMS experiment at LHC is used as a benchmark. Tracking data from the events selected by the level-1 trigger are sorted and filtered by the Fast Tracker processor at an input rate of 100 kHz. This data organization allows the level-2 trigger logic to reconstruct full resolution tracks with transverse momentum above a few GeV and search for secondary vertices within typical level-2 times. (15 refs).

A VLSI image processor via pseudo-mersenne transforms

International Nuclear Information System (INIS)

Sei, W.J.; Jagadeesh, J.M.

1986-01-01

The computational burden on image processing in medical fields where a large amount of information must be processed quickly and accurately has led to consideration of special-purpose image processor chip design for some time. The very large scale integration (VLSI) resolution has made it cost-effective and feasible to consider the design of special purpose chips for medical imaging fields. This paper describes a VLSI CMOS chip suitable for parallel implementation of image processing algorithms and cyclic convolutions by using Pseudo-Mersenne Number Transform (PMNT). The main advantages of the PMNT over the Fast Fourier Transform (FFT) are: (1) no multiplications are required; (2) integer arithmetic is used. The design and development of this processor, which operates on 32-point convolution or 5 x 5 window image, are described

ANALYSIS OF MILK QUALITY AND ITS IMPORTANCE FOR MILK PROCESSORS

Directory of Open Access Journals (Sweden)

AGATHA POPESCU

2009-05-01

Full Text Available The paper aimed to present some aspects regarding milk quality and its importance for milk processors , taking into account a study case at FLAV O’RICH DAIRY INC,USA. The study analyses how milk quality is checked from the bulk milk to final product according to the Milk Quality Program in force. The main aspects concerning raw milk selection criteria such as : antibiotic test, temperature, bacteria, organoleptic properties , acidity, somatic cell count , but also main milk components such as water, butterfat , total solids, protein, lactose , solids non fats , minerals, acids have been approached . Also a comparison for 7 butterfat producers for East Fluid Group has been done . Milk processing assures the destruction of human pathogens , the maintenance of product quality without significant loss of flavor, appearance, physical and nutritive properties and the selection of organisms which may produce unsatisfactory products.

MULTI-CORE AND OPTICAL PROCESSOR RELATED APPLICATIONS RESEARCH AT OAK RIDGE NATIONAL LABORATORY

Energy Technology Data Exchange (ETDEWEB)

Barhen, Jacob [ORNL; Kerekes, Ryan A [ORNL; ST Charles, Jesse Lee [ORNL; Buckner, Mark A [ORNL

2008-01-01

High-speed parallelization of common tasks holds great promise as a low-risk approach to achieving the significant increases in signal processing and computational performance required for next generation innovations in reconfigurable radio systems. Researchers at the Oak Ridge National Laboratory have been working on exploiting the parallelization offered by this emerging technology and applying it to a variety of problems. This paper will highlight recent experience with four different parallel processors applied to signal processing tasks that are directly relevant to signal processing required for SDR/CR waveforms. The first is the EnLight Optical Core Processor applied to matched filter (MF) correlation processing via fast Fourier transform (FFT) of broadband Dopplersensitive waveforms (DSW) using active sonar arrays for target tracking. The second is the IBM CELL Broadband Engine applied to 2-D discrete Fourier transform (DFT) kernel for image processing and frequency domain processing. And the third is the NVIDIA graphical processor applied to document feature clustering. EnLight Optical Core Processor. Optical processing is inherently capable of high-parallelism that can be translated to very high performance, low power dissipation computing. The EnLight 256 is a small form factor signal processing chip (5x5 cm2) with a digital optical core that is being developed by an Israeli startup company. As part of its evaluation of foreign technology, ORNL's Center for Engineering Science Advanced Research (CESAR) had access to a precursor EnLight 64 Alpha hardware for a preliminary assessment of capabilities in terms of large Fourier transforms for matched filter banks and on applications related to Doppler-sensitive waveforms. This processor is optimized for array operations, which it performs in fixed-point arithmetic at the rate of 16 TeraOPS at 8-bit precision. This is approximately 1000 times faster than the fastest DSP available today. The optical core

MULTI-CORE AND OPTICAL PROCESSOR RELATED APPLICATIONS RESEARCH AT OAK RIDGE NATIONAL LABORATORY

International Nuclear Information System (INIS)

Barhen, Jacob; Kerekes, Ryan A.; St Charles, Jesse Lee; Buckner, Mark A.

2008-01-01

High-speed parallelization of common tasks holds great promise as a low-risk approach to achieving the significant increases in signal processing and computational performance required for next generation innovations in reconfigurable radio systems. Researchers at the Oak Ridge National Laboratory have been working on exploiting the parallelization offered by this emerging technology and applying it to a variety of problems. This paper will highlight recent experience with four different parallel processors applied to signal processing tasks that are directly relevant to signal processing required for SDR/CR waveforms. The first is the EnLight Optical Core Processor applied to matched filter (MF) correlation processing via fast Fourier transform (FFT) of broadband Dopplersensitive waveforms (DSW) using active sonar arrays for target tracking. The second is the IBM CELL Broadband Engine applied to 2-D discrete Fourier transform (DFT) kernel for image processing and frequency domain processing. And the third is the NVIDIA graphical processor applied to document feature clustering. EnLight Optical Core Processor. Optical processing is inherently capable of high-parallelism that can be translated to very high performance, low power dissipation computing. The EnLight 256 is a small form factor signal processing chip (5x5 cm2) with a digital optical core that is being developed by an Israeli startup company. As part of its evaluation of foreign technology, ORNL's Center for Engineering Science Advanced Research (CESAR) had access to a precursor EnLight 64 Alpha hardware for a preliminary assessment of capabilities in terms of large Fourier transforms for matched filter banks and on applications related to Doppler-sensitive waveforms. This processor is optimized for array operations, which it performs in fixed-point arithmetic at the rate of 16 TeraOPS at 8-bit precision. This is approximately 1000 times faster than the fastest DSP available today. The optical core

Fractional Multistage Hydrothermal Liquefaction of Biomass and Catalytic Conversion into Hydrocarbons

Energy Technology Data Exchange (ETDEWEB)

Cortright, Randy [Virent, Inc., Madison, WI (United States); Rozmiarek, Robert [Virent, Inc., Madison, WI (United States); Dally, Brice [Virent, Inc., Madison, WI (United States); Holland, Chris [Virent, Inc., Madison, WI (United States)

2017-08-31

The objective of this project was to develop an improved multistage process for the hydrothermal liquefaction (HTL) of biomass to serve as a new front-end, deconstruction process ideally suited to feed Virent’s well-proven catalytic technology, which is already being scaled up. This process produced water soluble, partially de-oxygenated intermediates that are ideally suited for catalytic finishing to fungible distillate hydrocarbons. Through this project, Virent, with its partners, demonstrated the conversion of pine wood chips to drop-in hydrocarbon distillate fuels using a multi-stage fractional conversion system that is integrated with Virent’s BioForming® process. The majority of work was in the liquefaction task and included temperature scoping, solvent optimization, and separations.

Catalytic pyrolysis of olive mill wastewater sludge

Science.gov (United States)

Abdellaoui, Hamza

From 2008 to 2013, an average of 2,821.4 kilotons/year of olive oil were produced around the world. The waste product of the olive mill industry consists of solid residue (pomace) and wastewater (OMW). Annually, around 30 million m3 of OMW are produced in the Mediterranean area, 700,000 m3 year?1 in Tunisia alone. OMW is an aqueous effluent characterized by an offensive smell and high organic matter content, including high molecular weight phenolic compounds and long-chain fatty acids. These compounds are highly toxic to micro-organisms and plants, which makes the OMW a serious threat to the environment if not managed properly. The OMW is disposed of in open air evaporation ponds. After evaporation of most of the water, OMWS is left in the bottom of the ponds. In this thesis, the effort has been made to evaluate the catalytic pyrolysis process as a technology to valorize the OMWS. The first section of this research showed that 41.12 wt. % of the OMWS is mostly lipids, which are a good source of energy. The second section proved that catalytic pyrolysis of the OMWS over red mud and HZSM-5 can produce green diesel, and 450 °C is the optimal reaction temperature to maximize the organic yields. The last section revealed that the HSF was behind the good fuel-like properties of the OMWS catalytic oils, whereas the SR hindered the bio-oil yields and quality.

A High-Speed and Low-Energy-Consumption Processor for SVD-MIMO-OFDM Systems

Directory of Open Access Journals (Sweden)

Hiroki Iwaizumi

2013-01-01

Full Text Available A processor design for singular value decomposition (SVD and compression/decompression of feedback matrices, which are mandatory operations for SVD multiple-input multiple-output orthogonal frequency-division multiplexing (MIMO-OFDM systems, is proposed and evaluated. SVD-MIMO is a transmission method for suppressing multistream interference and improving communication quality by beamforming. An application specific instruction-set processor (ASIP architecture is adopted to achieve flexibility in terms of operations and matrix size. The proposed processor realizes a high-speed/low-power design and real-time processing by the parallelization of floating-point units (FPUs and arithmetic instructions specialized in complex matrix operations.

Photo catalytic Degradation of Organic Dye by Sol-Gel-Derived Gallium-Doped Anatase Titanium Oxide Nanoparticles for Environmental Remediation

International Nuclear Information System (INIS)

Arghya, N.B.; Sang, W.J.; Bong-Ki, M.

2012-01-01

Photo catalytic degradation of toxic organic chemicals is considered to be the most efficient green method for surface water treatment. We have reported the sol-gel synthesis of Gadoped anatase TiO 2 nanoparticles and the photo catalytic oxidation of organic dye into nontoxic inorganic products under UV irradiation. Photodegradation experiments show very good photo catalytic activity of Ga-doped TiO 2 nanoparticles with almost 90% degradation efficiency within 3 hrs of UV irradiation, which is faster than the undoped samples. Doping levels created within the bandgap of TiO 2 act as trapping centers to suppress the photo generated electron-hole recombination for proper and timely utilization of charge carriers for the generation of strong oxidizing radicals to degrade the organic dye. Photo catalytic degradation is found to follow the pseudo-first-order kinetics with the apparent 1 st-order rate constant around 1.3 x 10 -2 min -1 . The cost-effective, sol-gel-derived TiO 2 : Ga nanoparticles can be used efficiently for light-assisted oxidation of toxic organic molecules in the surface water for environmental remediation.

Natrium: Use of FPGA embedded processors for real-time data compression

Energy Technology Data Exchange (ETDEWEB)

Ammendola, R; Salamon, A; Salina, G [INFN Sezione di Roma Tor Vergata, Rome (Italy); Biagioni, A; Frezza, O; Cicero, F Lo; Lonardo, A; Rossetti, D; Simula, F; Tosoratto, L; Vicini, P [INFN Sezione di Roma, Rome (Italy)

2011-12-15

We present test results and characterization of a data compression system for the readout of the NA62 liquid krypton calorimeter trigger processor. The Level-0 electromagnetic calorimeter trigger processor of the NA62 experiment at CERN receives digitized data from the calorimeter main readout board. These data are stored on an on-board DDR2 RAM memory and read out upon reception of a Level-0 accept signal. The maximum raw data throughput from the trigger front-end cards is 2.6 Gbps. To readout these data over two Gbit Ethernet interfaces we investigated different implementations of a data compression system based on the Rice-Golomb coding: one is implemented in the FPGA as a custom block and one is implemented on the FPGA embedded processor running a C code. The two implementations are tested on a set of sample events and compared with respect to achievable readout bandwidth.

Natrium: Use of FPGA embedded processors for real-time data compression

International Nuclear Information System (INIS)

Ammendola, R; Salamon, A; Salina, G; Biagioni, A; Frezza, O; Cicero, F Lo; Lonardo, A; Rossetti, D; Simula, F; Tosoratto, L; Vicini, P

2011-01-01

We present test results and characterization of a data compression system for the readout of the NA62 liquid krypton calorimeter trigger processor. The Level-0 electromagnetic calorimeter trigger processor of the NA62 experiment at CERN receives digitized data from the calorimeter main readout board. These data are stored on an on-board DDR2 RAM memory and read out upon reception of a Level-0 accept signal. The maximum raw data throughput from the trigger front-end cards is 2.6 Gbps. To readout these data over two Gbit Ethernet interfaces we investigated different implementations of a data compression system based on the Rice-Golomb coding: one is implemented in the FPGA as a custom block and one is implemented on the FPGA embedded processor running a C code. The two implementations are tested on a set of sample events and compared with respect to achievable readout bandwidth.

Scalable architecture for a room temperature solid-state quantum information processor.

Science.gov (United States)

Yao, N Y; Jiang, L; Gorshkov, A V; Maurer, P C; Giedke, G; Cirac, J I; Lukin, M D

2012-04-24

The realization of a scalable quantum information processor has emerged over the past decade as one of the central challenges at the interface of fundamental science and engineering. Here we propose and analyse an architecture for a scalable, solid-state quantum information processor capable of operating at room temperature. Our approach is based on recent experimental advances involving nitrogen-vacancy colour centres in diamond. In particular, we demonstrate that the multiple challenges associated with operation at ambient temperature, individual addressing at the nanoscale, strong qubit coupling, robustness against disorder and low decoherence rates can be simultaneously achieved under realistic, experimentally relevant conditions. The architecture uses a novel approach to quantum information transfer and includes a hierarchy of control at successive length scales. Moreover, it alleviates the stringent constraints currently limiting the realization of scalable quantum processors and will provide fundamental insights into the physics of non-equilibrium many-body quantum systems.

Multi-mode sensor processing on a dynamically reconfigurable massively parallel processor array

Science.gov (United States)

Chen, Paul; Butts, Mike; Budlong, Brad; Wasson, Paul

2008-04-01

This paper introduces a novel computing architecture that can be reconfigured in real time to adapt on demand to multi-mode sensor platforms' dynamic computational and functional requirements. This 1 teraOPS reconfigurable Massively Parallel Processor Array (MPPA) has 336 32-bit processors. The programmable 32-bit communication fabric provides streamlined inter-processor connections with deterministically high performance. Software programmability, scalability, ease of use, and fast reconfiguration time (ranging from microseconds to milliseconds) are the most significant advantages over FPGAs and DSPs. This paper introduces the MPPA architecture, its programming model, and methods of reconfigurability. An MPPA platform for reconfigurable computing is based on a structural object programming model. Objects are software programs running concurrently on hundreds of 32-bit RISC processors and memories. They exchange data and control through a network of self-synchronizing channels. A common application design pattern on this platform, called a work farm, is a parallel set of worker objects, with one input and one output stream. Statically configured work farms with homogeneous and heterogeneous sets of workers have been used in video compression and decompression, network processing, and graphics applications.

Catalytic Ethanol Dehydration to Ethylene over Nanocrystalline χ- and γ-Al2O3 Catalysts.

Science.gov (United States)

Janlamool, Jakrapan; Jongsomjit, Bunjerd

2017-01-01

The study is aimed to investigate the combination of nanocrystalline γ- and χ- alumina that displays the attractive chemical and physical properties for the catalytic dehydration of ethanol. The correlation between the acid density and ethanol conversion was observed. The high acid density apparently results in high catalytic activity, especially for the equally mixed γ- and χ- phase alumina (G50C50). In order to obtain a better understanding on how different catalysts would affect the ethylene yield, one of the most powerful techniques such as X-ray photoelectron spectroscopy (XPS) was performed. Hence, the different O 1s surface atoms can be identified and divided into three types including lattice oxygen (O, 530.7 eV), surface hydroxyl (OH, 532.1 eV) and lattice water (H 2 O, 532.9 eV). It was remarkably found that the large amount of O 1s surface atoms in lattice water can result in increased ethylene yield. In summary, the appearance of metastable χ-alumina structure exhibited better catalytic activity and ethylene yield than γ- alumina. Thus, the introduction of metastable χ- alumina structure into γ- alumina enhanced catalytic activity and ethylene yield. As the result, it was found that the G50C50 catalyst exhibits the ethylene yield (80%) at the lowest reaction temperature ca. 250°C among other catalysts.

'Iconic' tracking algorithms for high energy physics using the TRAX-I massively parallel processor

International Nuclear Information System (INIS)

Vesztergombi, G.

1989-01-01

TRAX-I, a cost-effective parallel microcomputer, applying associative string processor (ASP) architecture with 16 K parallel processing elements, is being built by Aspex Microsystems Ltd. (UK). When applied to the tracking problem of very complex events with several hundred tracks, the large number of processors allows one to dedicate one or more processors to each wire (in MWPC), each pixel (in digitized images from streamer chambers or other visual detectors), or each pad (in TPC) to perform very efficient pattern recognition. Some linear tracking algorithms based on this ''ionic'' representation are presented. (orig.)

'Iconic' tracking algorithms for high energy physics using the TRAX-I massively parallel processor

International Nuclear Information System (INIS)

Vestergombi, G.

1989-11-01

TRAX-I, a cost-effective parallel microcomputer, applying Associative String Processor (ASP) architecture with 16 K parallel processing elements, is being built by Aspex Microsystems Ltd. (UK). When applied to the tracking problem of very complex events with several hundred tracks, the large number of processors allows one to dedicate one or more processors to each wire (in MWPC), each pixel (in digitized images from streamer chambers or other visual detectors), or each pad (in TPC) to perform very efficient pattern recognition. Some linear tracking algorithms based on this 'iconic' representation are presented. (orig.)

Method of fabricating a catalytic structure

Science.gov (United States)

Rollins, Harry W [Idaho Falls, ID; Petkovic, Lucia M [Idaho Falls, ID; Ginosar, Daniel M [Idaho Falls, ID

2009-09-22

A precursor to a catalytic structure comprising zinc oxide and copper oxide. The zinc oxide has a sheet-like morphology or a spherical morphology and the copper oxide comprises particles of copper oxide. The copper oxide is reduced to copper, producing the catalytic structure. The catalytic structure is fabricated by a hydrothermal process. A reaction mixture comprising a zinc salt, a copper salt, a hydroxyl ion source, and a structure-directing agent is formed. The reaction mixture is heated under confined volume conditions to produce the precursor. The copper oxide in the precursor is reduced to copper. A method of hydrogenating a carbon oxide using the catalytic structure is also disclosed, as is a system that includes the catalytic structure.

Incorporation of catalytic dehydrogenation into fischer-tropsch synthesis to significantly reduce carbon dioxide emissions

Science.gov (United States)

Huffman, Gerald P.

2012-11-13

A new method of producing liquid transportation fuels from coal and other hydrocarbons that significantly reduces carbon dioxide emissions by combining Fischer-Tropsch synthesis with catalytic dehydrogenation is claimed. Catalytic dehydrogenation (CDH) of the gaseous products (C1-C4) of Fischer-Tropsch synthesis (FTS) can produce large quantities of hydrogen while converting the carbon to multi-walled carbon nanotubes (MWCNT). Incorporation of CDH into a FTS-CDH plant converting coal to liquid fuels can eliminate all or most of the CO.sub.2 emissions from the water-gas shift (WGS) reaction that is currently used to elevate the H.sub.2 level of coal-derived syngas for FTS. Additionally, the FTS-CDH process saves large amounts of water used by the WGS reaction and produces a valuable by-product, MWCNT.

Noise limitations in optical linear algebra processors.

Science.gov (United States)

Batsell, S G; Jong, T L; Walkup, J F; Krile, T F

1990-05-10

A general statistical noise model is presented for optical linear algebra processors. A statistical analysis which includes device noise, the multiplication process, and the addition operation is undertaken. We focus on those processes which are architecturally independent. Finally, experimental results which verify the analytical predictions are also presented.

Sojourn time asymptotics in processor-sharing queues

NARCIS (Netherlands)

Borst, S.C.; Núñez Queija, R.; Zwart, B.

2006-01-01

Over the past few decades, the Processor-Sharing (PS) discipline has attracted a great deal of attention in the queueing literature. While the PS paradigm emerged in the sixties as an idealization of round-robin scheduling in time-shared computer systems, it has recently captured renewed interest as

Catalytic flash pyrolysis of oil-impregnated-wood and jatropha cake using sodium based catalysts

KAUST Repository

Imran, Ali

2015-11-24

Catalytic pyrolysis of wood with impregnated vegetable oil was investigated and compared with catalytic pyrolysis of jatropha cake making use of sodium based catalysts to produce a high quality bio-oil. The catalytic pyrolysis was carried out in two modes: in-situ catalytic pyrolysis and post treatment of the pyrolysis vapors. The in-situ catalytic pyrolysis was carried out in an entrained flow reactor system using a premixed feedstock of Na2CO3 and biomass and post treatment of biomass pyrolysis vapor was conducted in a downstream fixed bed reactor of Na2CO3/γ-Al2O3. Results have shown that both Na2CO3 and Na2CO3/γ-Al2O3 can be used for the production of a high quality bio-oil from catalytic pyrolysis of oil-impregnated-wood and jatropha cake. The catalytic bio-oil had very low oxygen content, water content as low as 1wt.%, a neutral pH, and a high calorific value upto 41.8MJ/kg. The bio-oil consisted of high value chemical compounds mainly hydrocarbons and undesired compounds in the bio-oil were either completely removed or considerably reduced. Increasing the triglycerides content (vegetable oil) in the wood enhanced the formation of hydrocarbons in the bio-oil. Post treatment of the pyrolysis vapor over a fixed bed of Na2CO3/γ-Al2O3 produced superior quality bio-oil compared to in-situ catalytic pyrolysis with Na2CO3. This high quality bio-oil may be used as a precursor in a fractionating process for the production of alternative fuels. © 2015 Elsevier B.V.

A Real-Time Sound Field Rendering Processor

Directory of Open Access Journals (Sweden)

Tan Yiyu

2017-12-01

Full Text Available Real-time sound field renderings are computationally intensive and memory-intensive. Traditional rendering systems based on computer simulations suffer from memory bandwidth and arithmetic units. The computation is time-consuming, and the sample rate of the output sound is low because of the long computation time at each time step. In this work, a processor with a hybrid architecture is proposed to speed up computation and improve the sample rate of the output sound, and an interface is developed for system scalability through simply cascading many chips to enlarge the simulated area. To render a three-minute Beethoven wave sound in a small shoe-box room with dimensions of 1.28 m × 1.28 m × 0.64 m, the field programming gate array (FPGA-based prototype machine with the proposed architecture carries out the sound rendering at run-time while the software simulation with the OpenMP parallelization takes about 12.70 min on a personal computer (PC with 32 GB random access memory (RAM and an Intel i7-6800K six-core processor running at 3.4 GHz. The throughput in the software simulation is about 194 M grids/s while it is 51.2 G grids/s in the prototype machine even if the clock frequency of the prototype machine is much lower than that of the PC. The rendering processor with a processing element (PE and interfaces consumes about 238,515 gates after fabricated by the 0.18 µm processing technology from the ROHM semiconductor Co., Ltd. (Kyoto Japan, and the power consumption is about 143.8 mW.

A Time-Composable Operating System for the Patmos Processor

DEFF Research Database (Denmark)

Ziccardi, Marco; Schoeberl, Martin; Vardanega, Tullio

2015-01-01

-composable operating system, on top of a time-composable processor, facilitates incremental development, which is highly desirable for industry. This paper makes a twofold contribution. First, we present enhancements to the Patmos processor to allow achieving time composability at the operating system level. Second......, we extend an existing time-composable operating system, TiCOS, to make best use of advanced Patmos hardware features in the pursuit of time composability.......In the last couple of decades we have witnessed a steady growth in the complexity and widespread of real-time systems. In order to master the rising complexity in the timing behaviour of those systems, rightful attention has been given to the development of time-predictable computer architectures...

Effect of support on the catalytic activity of manganese oxide catalyts for toluene combustion

International Nuclear Information System (INIS)

Pozan, Gulin Selda

2012-01-01

Highlights: ► α-Al 2 O 3 , obtained from Bohmite, as a support for enhancing of the activity. ► The support material for catalytic oxidation. ► The manganese state and oxygen species effect on the catalytic combustion reaction. - Abstract: The aim of this work was to study combustion of toluene (1000 ppm) over MnO 2 modified with different supports. α-Al 2 O 3 and γ-Al 2 O 3 obtained from Boehmite, γ-Al 2 O 3 (commercial), SiO 2 , TiO 2 and ZrO 2 were used as commercial support materials. In view of potential interest of this process, the influence of support material on the catalytic performance was discussed. The deposition of 9.5MnO 2 was performed by impregnation over support. The catalysts were characterized by X-ray diffraction (XRD), X-ray photoelectron spectroscopy (XPS), temperature programmed reduction and oxidation (TPR/TPO) and thermogravimetric analysis (TGA). The catalytic tests were carried out at atmospheric pressure in a fixed-bed flow reactor. 9.5MnO 2 /α-Al 2 O 3 (B) (synthesized from Boehmite) catalyst exhibits the highest catalytic activity, over which the toluene conversion was up to 90% at a temperature of 289 °C. Considering all the characterization and reaction data reported in this study, it was concluded that the manganese state and oxygen species played an important role in the catalytic activity.

Mass transfer model liquid phase catalytic exchange column simulation applicable to any column composition profile

Energy Technology Data Exchange (ETDEWEB)

Busigin, A. [NITEK USA Inc., Ocala, FL (United States)

2015-03-15

Liquid Phase Catalytic Exchange (LPCE) is a key technology used in water detritiation systems. Rigorous simulation of LPCE is complicated when a column may have both hydrogen and deuterium present in significant concentrations in different sections of the column. This paper presents a general mass transfer model for a homogenous packed bed LPCE column as a set of differential equations describing composition change, and equilibrium equations to define the mass transfer driving force within the column. The model is used to show the effect of deuterium buildup in the bottom of an LPCE column from non-negligible D atom fraction in the bottom feed gas to the column. These types of calculations are important in the design of CECE (Combined Electrolysis and Catalytic Exchange) water detritiation systems.

Proton transport facilitating water-oxidation: the role of second sphere ligands surrounding the catalytic metal cluster.

Science.gov (United States)

Bao, Han; Dilbeck, Preston L; Burnap, Robert L

2013-10-01

The ability of PSII to extract electrons from water, with molecular oxygen as a by-product, is a remarkable biochemical and evolutionary innovation. From an evolutionary perspective, the invention of PSII approximately 2.7 Ga led to the accelerated accumulation of biomass in the biosphere and the accumulation of oxygen in the atmosphere, a combination that allowed for the evolution of a much more complex and extensive biosphere than would otherwise have been possible. From the biochemical and enzymatic perspective, PSII is remarkable because of the thermodynamic and kinetic obstacles that needed to have been overcome to oxidize water as the ultimate photosynthetic electron donor. This article focuses on how proton release is an integral part of how these kinetic and thermodynamic obstacles have been overcome: the sequential removal of protons from the active site of H2O-oxidation facilitates the multistep oxidation of the substrate water at the Mn4CaOx, the catalytic heart of the H2O-oxidation reaction. As noted previously, the facilitated deprotonation of the Mn4CaOx cluster exerts a redox-leveling function preventing the accumulation of excess positive charge on the cluster, which might otherwise hinder the already energetically difficult oxidation of water. Using recent results, including the characteristics of site-directed mutants, the role of the second sphere of amino acid ligands and the associated network of water molecules surrounding the Mn4CaOx is discussed in relation to proton transport in other systems. In addition to the redox-leveling function, a trapping function is assigned to the proton release step occurring immediately prior to the dioxygen chemistry. This trapping appears to involve a yet-to-be clarified gating mechanism that facilitates to coordinated release of a proton from the neighborhood of the active site thereby insuring that the backward charge-recombination reaction does not out-compete the forward reaction of dioxygen chemistry

A Geometric Algebra Co-Processor for Color Edge Detection

Directory of Open Access Journals (Sweden)

Biswajit Mishra

2015-01-01

Full Text Available This paper describes advancement in color edge detection, using a dedicated Geometric Algebra (GA co-processor implemented on an Application Specific Integrated Circuit (ASIC. GA provides a rich set of geometric operations, giving the advantage that many signal and image processing operations become straightforward and the algorithms intuitive to design. The use of GA allows images to be represented with the three R, G, B color channels defined as a single entity, rather than separate quantities. A novel custom ASIC is proposed and fabricated that directly targets GA operations and results in significant performance improvement for color edge detection. Use of the hardware described in this paper also shows that the convolution operation with the rotor masks within GA belongs to a class of linear vector filters and can be applied to image or speech signals. The contribution of the proposed approach has been demonstrated by implementing three different types of edge detection schemes on the proposed hardware. The overall performance gains using the proposed GA Co-Processor over existing software approaches are more than 3.2× faster than GAIGEN and more than 2800× faster than GABLE. The performance of the fabricated GA co-processor is approximately an order of magnitude faster than previously published results for hardware implementations.

Supertracker: A Programmable Parallel Pipeline Arithmetic Processor For Auto-Cueing Target Processing

Science.gov (United States)

Mack, Harold; Reddi, S. S.

1980-04-01

Supertracker represents a programmable parallel pipeline computer architecture that has been designed to meet the real time image processing requirements of auto-cueing target data processing. The prototype bread-board currently under development will be designed to perform input video preprocessing and processing for 525-line and 875-line TV formats FLIR video, automatic display gain and contrast control, and automatic target cueing, classification, and tracking. The video preprocessor is capable of performing operations full frames of video data in real time, e.g., frame integration, storage, 3 x 3 convolution, and neighborhood processing. The processor architecture is being implemented using bit-slice microprogrammable arithmetic processors, operating in parallel. Each processor is capable of up to 20 million operations per second. Multiple frame memories are used for additional flexibility.

Development of wet-proofed catalyst and catalytic exchange process for tritium extraction

Energy Technology Data Exchange (ETDEWEB)

Song, Myung Jae; Son, Soon Hwan; Chung, Yang Gun; Lee, Gab Bock [Korea Electric Power Corp. (KEPCO), Taejon (Korea, Republic of). Research Center

1996-12-31

To apply a liquid phase catalytic exchange(LPCE) process for the tritium extraction from tritiated heavy water, the wet proofed catalyst to allow the hydrogen isotopic exchange reaction between liquid water and hydrogen gas was developed. A styrene divinyl benzene copolymer was selected as am effective catalyst support and prepared by suspension copolymerization. After post-treatment, final catalyst supports were dipped in chloroplatinic acid solution. The catalyst support had a good physical properties at a particular preparation condition. The catalytic performance was successfully verified through hydrogen isotopic exchange reaction in the exchange column. A mathematical model for the tritium removal process consisted of LPCE front-ended process and cryogenic distillation process was established using the NTU-HTU method for LPCE column and the FUG method for cryogenic distillation column, respectively. A computer program was developed using the model and then used to investigate optimum design variables which affect the size of columns and tritium inventory (author). 84 refs., 113 figs.

The associative memory system for the FTK processor at ATLAS

CERN Document Server

Magalotti, D; The ATLAS collaboration; Donati, S; Luciano, P; Piendibene, M; Giannetti, P; Lanza, A; Verzellesi, G; Sakellariou, Andreas; Billereau, W; Combe, J M

2014-01-01

In high energy physics experiments, the most interesting processes are very rare and hidden in an extremely large level of background. As the experiment complexity, accelerator backgrounds, and instantaneous luminosity increase, more effective and accurate data selection techniques are needed. The Fast TracKer processor (FTK) is a real time tracking processor designed for the ATLAS trigger upgrade. The FTK core is the Associative Memory system. It provides massive computing power to minimize the processing time of complex tracking algorithms executed online. This paper reports on the results and performance of a new prototype of Associative Memory system.

Low-Latency Embedded Vision Processor (LLEVS)

Science.gov (United States)

2016-03-01

algorithms, low-latency video processing, embedded image processor, wearable electronics, helmet-mounted systems, alternative night / day imaging...external subsystems and data sources with the device. The establishment of data interfaces in terms of data transfer rates, formats and types are...video signals from Near-visible Infrared (NVIR) sensor, Shortwave IR (SWIR) and Longwave IR (LWIR) is the main processing for Night Vision (NI) system

50 CFR 648.6 - Dealer/processor permits.

Science.gov (United States)

2010-10-01

... of incorporation if the business is a corporation, and a copy of the partnership agreement and the names and addresses of all partners, if the business is a partnership, name of at-sea processor vessel... the fishing year to an applicant, unless the applicant fails to submit a completed application. An...

Event analysis using a massively parallel processor

International Nuclear Information System (INIS)

Bale, A.; Gerelle, E.; Messersmith, J.; Warren, R.; Hoek, J.

1990-01-01

This paper describes a system for performing histogramming of n-tuple data at interactive rates using a commercial SIMD processor array connected to a work-station running the well-known Physics Analysis Workstation software (PAW). Results indicate that an order of magnitude performance improvement over current RISC technology is easily achievable

Fast Parallel Computation of Polynomials Using Few Processors

DEFF Research Database (Denmark)

Valiant, Leslie G.; Skyum, Sven; Berkowitz, S.

1983-01-01

It is shown that any multivariate polynomial of degree $d$ that can be computed sequentially in $C$ steps can be computed in parallel in $O((\\log d)(\\log C + \\log d))$ steps using only $(Cd)^{O(1)} $ processors....

Huffman-based code compression techniques for embedded processors

KAUST Repository

Bonny, Mohamed Talal; Henkel, Jö rg

2010-01-01

% for ARM and MIPS, respectively. In our compression technique, we have conducted evaluations using a representative set of applications and we have applied each technique to two major embedded processor architectures, namely ARM and MIPS. © 2010 ACM.

Efficacy of Code Optimization on Cache-Based Processors