Plasma Etching of Tapered Features in Silicon for MEMS and Wafer Level Packaging Applications

International Nuclear Information System (INIS)

Ngo, H-D; Hiess, Andre; Seidemann, Volker; Studzinski, Daniel; Lange, Martin; Leib, Juergen; Shariff, Dzafir; Ashraf, Huma; Steel, Mike; Atabo, Lilian; Reast, Jon

2006-01-01

This paper is a brief report of plasma etching as applied to pattern transfer in silicon. It will focus more on concept overview and strategies for etching of tapered features of interest for MEMS and Wafer Level Packaging (WLP). The basis of plasma etching, the dry etching technique, is explained and plasma configurations are described elsewhere. An important feature of plasma etching is the possibility to achieve etch anisotropy. The plasma etch process is extremely sensitive to many variables such as mask material, mask openings and more important the plasma parameters

Cost-Efficient Wafer-Level Capping for MEMS and Imaging Sensors by Adhesive Wafer Bonding

Directory of Open Access Journals (Sweden)

Simon J. Bleiker

2016-10-01

Full Text Available Device encapsulation and packaging often constitutes a substantial part of the fabrication cost of micro electro-mechanical systems (MEMS transducers and imaging sensor devices. In this paper, we propose a simple and cost-effective wafer-level capping method that utilizes a limited number of highly standardized process steps as well as low-cost materials. The proposed capping process is based on low-temperature adhesive wafer bonding, which ensures full complementary metal-oxide-semiconductor (CMOS compatibility. All necessary fabrication steps for the wafer bonding, such as cavity formation and deposition of the adhesive, are performed on the capping substrate. The polymer adhesive is deposited by spray-coating on the capping wafer containing the cavities. Thus, no lithographic patterning of the polymer adhesive is needed, and material waste is minimized. Furthermore, this process does not require any additional fabrication steps on the device wafer, which lowers the process complexity and fabrication costs. We demonstrate the proposed capping method by packaging two different MEMS devices. The two MEMS devices include a vibration sensor and an acceleration switch, which employ two different electrical interconnection schemes. The experimental results show wafer-level capping with excellent bond quality due to the re-flow behavior of the polymer adhesive. No impediment to the functionality of the MEMS devices was observed, which indicates that the encapsulation does not introduce significant tensile nor compressive stresses. Thus, we present a highly versatile, robust, and cost-efficient capping method for components such as MEMS and imaging sensors.

A Lateral Differential Resonant Pressure Microsensor Based on SOI-Glass Wafer-Level Vacuum Packaging

Directory of Open Access Journals (Sweden)

Bo Xie

2015-09-01

Full Text Available This paper presents the fabrication and characterization of a resonant pressure microsensor based on SOI-glass wafer-level vacuum packaging. The SOI-based pressure microsensor consists of a pressure-sensitive diaphragm at the handle layer and two lateral resonators (electrostatic excitation and capacitive detection on the device layer as a differential setup. The resonators were vacuum packaged with a glass cap using anodic bonding and the wire interconnection was realized using a mask-free electrochemical etching approach by selectively patterning an Au film on highly topographic surfaces. The fabricated resonant pressure microsensor with dual resonators was characterized in a systematic manner, producing a quality factor higher than 10,000 (~6 months, a sensitivity of about 166 Hz/kPa and a reduced nonlinear error of 0.033% F.S. Based on the differential output, the sensitivity was increased to two times and the temperature-caused frequency drift was decreased to 25%.

Output blue light evaluation for phosphor based smart white LED wafer level packages.

Science.gov (United States)

Kolahdouz, Zahra; Rostamian, Ali; Kolahdouz, Mohammadreza; Ma, Teng; van Zeijl, Henk; Zhang, Kouchi

2016-02-22

This study presents a blue light detector for evaluating the output light of phosphor based white LED package. It is composed of a silicon stripe-shaped photodiode designed and implemented in a 2 μm BiCMOS process which can be used for wafer level integration of different passive and active devices all in just 5 lithography steps. The final device shows a high selectivity to blue light. The maximum responsivity at 480 nm is matched with the target blue LED illumination. The designed structure have better responsivity compared to simple photodiode structure due to reducing the effect of dead layer formation close to the surface because of implantation. It has also a two-fold increase in the responsivity and quantum efficiency compared to previously similar published sensors.

Wafer-level vacuum packaged resonant micro-scanning mirrors for compact laser projection displays

Science.gov (United States)

Hofmann, Ulrich; Oldsen, Marten; Quenzer, Hans-Joachim; Janes, Joachim; Heller, Martin; Weiss, Manfred; Fakas, Georgios; Ratzmann, Lars; Marchetti, Eleonora; D'Ascoli, Francesco; Melani, Massimiliano; Bacciarelli, Luca; Volpi, Emilio; Battini, Francesco; Mostardini, Luca; Sechi, Francesco; De Marinis, Marco; Wagner, Bernd

2008-02-01

Scanning laser projection using resonant actuated MEMS scanning mirrors is expected to overcome the current limitation of small display size of mobile devices like cell phones, digital cameras and PDAs. Recent progress in the development of compact modulated RGB laser sources enables to set up very small laser projection systems that become attractive not only for consumer products but also for automotive applications like head-up and dash-board displays. Within the last years continuous progress was made in increasing MEMS scanner performance. However, only little is reported on how mass-produceability of these devices and stable functionality even under harsh environmental conditions can be guaranteed. Automotive application requires stable MEMS scanner operation over a wide temperature range from -40° to +85°Celsius. Therefore, hermetic packaging of electrostatically actuated MEMS scanning mirrors becomes essential to protect the sensitive device against particle contamination and condensing moisture. This paper reports on design, fabrication and test of a resonant actuated two-dimensional micro scanning mirror that is hermetically sealed on wafer level. With resonant frequencies of 30kHz and 1kHz, an achievable Theta-D-product of 13mm.deg and low dynamic deformation <20nm RMS it targets Lissajous projection with SVGA-resolution. Inevitable reflexes at the vacuum package surface can be seperated from the projection field by permanent inclination of the micromirror.

Self-adaptive phosphor coating technology for wafer-level scale chip packaging

International Nuclear Information System (INIS)

Zhou Linsong; Rao Haibo; Wang Wei; Wan Xianlong; Liao Junyuan; Wang Xuemei; Zhou Da; Lei Qiaolin

2013-01-01

A new self-adaptive phosphor coating technology has been successfully developed, which adopted a slurry method combined with a self-exposure process. A phosphor suspension in the water-soluble photoresist was applied and exposed to LED blue light itself and developed to form a conformal phosphor coating with self-adaptability to the angular distribution of intensity of blue light and better-performing spatial color uniformity. The self-adaptive phosphor coating technology had been successfully adopted in the wafer surface to realize a wafer-level scale phosphor conformal coating. The first-stage experiments show satisfying results and give an adequate demonstration of the flexibility of self-adaptive coating technology on application of WLSCP. (semiconductor devices)

A wafer-level 3D packaging structure with Benzocyclobutene as a dielectric for multichip module fabrication

International Nuclear Information System (INIS)

Geng Fei; Ding Xiaoyun; Xu Gaowei; Luo Le

2009-01-01

A new wafer-level 3D packaging structure with Benzocyclobutene (BCB) as interlayer dielectrics (ILDs) for multichip module fabrication is proposed for application in the Ku-band wave. The packaging structure consists of two layers of BCB films and three layers of metallized films, in which the monolithic microwave IC (MMIC), thin film resistors, striplines and microstrip lines are integrated. Wet etched cavities fabricated on the silicon substrate are used for mounting active and passive components. BCB layers cover the components and serve as ILDs for interconnections. Gold bumps are used as electric interconnections between different layers, which eliminates the need to prepare vias by costly dry etching and deposition processes. In order to get high-quality BCB films for the subsequent chemical mechanical planarization (CMP) and multilayer metallization processes, the BCB curing profile is optimized and the roughness of the BCB film after the CMP process is kept lower than 10 nm. The thermal, mechanical and electrical properties of the packaging structure are investigated. The thermal resistance can be controlled below 2 0 C/W. The average shear strength of the gold bumps on the BCB surface is around 70 N/mm 2 . The performances of MMIC and interconnection structure at high frequencies are optimized and tested. The S-parameters curves of the packaged MMIC shift slightly showing perfect transmission character. The insertion loss change after the packaging process is less than 1 dB range at the operating frequency and the return loss is less than -8 dB from 10 to 15 GHz.

Wafer-level radiometric performance testing of uncooled microbolometer arrays

Science.gov (United States)

Dufour, Denis G.; Topart, Patrice; Tremblay, Bruno; Julien, Christian; Martin, Louis; Vachon, Carl

2014-03-01

A turn-key semi-automated test system was constructed to perform on-wafer testing of microbolometer arrays. The system allows for testing of several performance characteristics of ROIC-fabricated microbolometer arrays including NETD, SiTF, ROIC functionality, noise and matrix operability, both before and after microbolometer fabrication. The system accepts wafers up to 8 inches in diameter and performs automated wafer die mapping using a microscope camera. Once wafer mapping is completed, a custom-designed quick insertion 8-12 μm AR-coated Germanium viewport is placed and the chamber is pumped down to below 10-5 Torr, allowing for the evaluation of package-level focal plane array (FPA) performance. The probe card is electrically connected to an INO IRXCAM camera core, a versatile system that can be adapted to many types of ROICs using custom-built interface printed circuit boards (PCBs). We currently have the capability for testing 384x288, 35 μm pixel size and 160x120, 52 μm pixel size FPAs. For accurate NETD measurements, the system is designed to provide an F/1 view of two rail-mounted blackbodies seen through the Germanium window by the die under test. A master control computer automates the alignment of the probe card to the dies, the positioning of the blackbodies, FPA image frame acquisition using IRXCAM, as well as data analysis and storage. Radiometric measurement precision has been validated by packaging dies measured by the automated probing system and re-measuring the SiTF and Noise using INO's pre-existing benchtop system.

Polymer-based 2D/3D wafer level heterogeneous integration for SSL module

NARCIS (Netherlands)

Yuan, C.; Wei, J.; Ye, H.; Koh, S.; Harianto, S.; Nieuwenhof, M.A. van den; Zhang, G.Q.

2012-01-01

This paper demonstrates a heterogeneous integration of solid state lighting (SSL) module, including light source (LED) and driver/control components. Such integration has been realized by the polymer-based reconfigured wafer level package technologies and such structure has been prototyped and

Functional Testing and Characterisation of ISFETs on Wafer Level by Means of a Micro-droplet Cell

Directory of Open Access Journals (Sweden)

Michael J. Schöning

2006-04-01

Full Text Available A wafer-level functionality testing and characterisation system for ISFETs (ion-sensitive field-effect transistor is realised by means of integration of a specifically designedcapillary electrochemical micro-droplet cell into a commercial wafer prober-station. Thedeveloped system allows the identification and selection of “good” ISFETs at the earlieststage and to avoid expensive bonding, encapsulation and packaging processes for non-functioning ISFETs and thus, to decrease costs, which are wasted for bad dies. Thedeveloped system is also feasible for wafer-level characterisation of ISFETs in terms ofsensitivity, hysteresis and response time. Additionally, the system might be also utilised forwafer-level testing of further electrochemical sensors.

Wafer level hermetic packaging based on Cu-Sn isothermal solidification technology

International Nuclear Information System (INIS)

Cao Yuhan; Luo Le

2009-01-01

A novel wafer level bonding method based on Cu-Sn isothermal solidification technology is established. A multi-layer sealing ring and the bonding processing are designed, and the amount of solder and the bonding parameters are optimized based on both theoretical and experimental results. Verification shows that oxidation of the solder layer, voids and the scalloped-edge appearance of the Cu 6 Sn 5 phase are successfully avoided. An average shear strength of 19.5 MPa and an excellent leak rate of around 1.9 x 10 -9 atm cc/s are possible, meeting the demands of MIL-STD-883E. (semiconductor technology)

Effects of wafer-level packaging on millimetre-wave antennas

KAUST Repository

Abutarboush, Hattan

2011-11-01

A cost-effective antenna package suitable for mass production mm-wave applications is investigated. Different packaging material that can be possibly used in mm-wave antennas are presented and compared. Moreover, this study investigates different methods of packaging millimetre-wave (60 GHz) MEMS antennas. The paper first introduces the custom needs for optimum operation of the MEMS antenna and then examines the current available enabling technologies for packaging. The sensitivity of the antenna\\'s reflection coefficient, gain and radiation efficiency to the packaging environment is investigated through EM simulations. © 2011 IEEE.

Full Wafer Redistribution and Wafer Embedding as Key Technologies for a Multi-Scale Neuromorphic Hardware Cluster

OpenAIRE

Zoschke, Kai; Güttler, Maurice; Böttcher, Lars; Grübl, Andreas; Husmann, Dan; Schemmel, Johannes; Meier, Karlheinz; Ehrmann, Oswin

2018-01-01

Together with the Kirchhoff-Institute for Physics(KIP) the Fraunhofer IZM has developed a full wafer redistribution and embedding technology as base for a large-scale neuromorphic hardware system. The paper will give an overview of the neuromorphic computing platform at the KIP and the associated hardware requirements which drove the described technological developments. In the first phase of the project standard redistribution technologies from wafer level packaging were adapted to enable a ...

Hybrid Wafer-Level Packaging for RF-MEMS and Optoelectronic Applications

NARCIS (Netherlands)

Tian, J.

2013-01-01

The current trend in electronic packaging research is to integrate more functions into one package, reduce electrical path parasitic, and increase the heat conduction in order to make the final packaged system smaller, more reliable, more functional and more complete, while keeping the packaging

Wafer-Level Membrane-Transfer Process for Fabricating MEMS

Science.gov (United States)

Yang, Eui-Hyeok; Wiberg, Dean

2003-01-01

A process for transferring an entire wafer-level micromachined silicon structure for mating with and bonding to another such structure has been devised. This process is intended especially for use in wafer-level integration of microelectromechanical systems (MEMS) that have been fabricated on dissimilar substrates. Unlike in some older membrane-transfer processes, there is no use of wax or epoxy during transfer. In this process, the substrate of a wafer-level structure to be transferred serves as a carrier, and is etched away once the transfer has been completed. Another important feature of this process is that two electrodes constitutes an electrostatic actuator array. An SOI wafer and a silicon wafer (see Figure 1) are used as the carrier and electrode wafers, respectively. After oxidation, both wafers are patterned and etched to define a corrugation profile and electrode array, respectively. The polysilicon layer is deposited on the SOI wafer. The carrier wafer is bonded to the electrode wafer by using evaporated indium bumps. The piston pressure of 4 kPa is applied at 156 C in a vacuum chamber to provide hermetic sealing. The substrate of the SOI wafer is etched in a 25 weight percent TMAH bath at 80 C. The exposed buried oxide is then removed by using 49 percent HF droplets after an oxygen plasma ashing. The SOI top silicon layer is etched away by using an SF6 plasma to define the corrugation profile, followed by the HF droplet etching of the remaining oxide. The SF6 plasma with a shadow mask selectively etches the polysilicon membrane, if the transferred membrane structure needs to be patterned. Electrostatic actuators with various electrode gaps have been fabricated by this transfer technique. The gap between the transferred membrane and electrode substrate is very uniform ( 0.1 m across a wafer diameter of 100 mm, provided by optimizing the bonding control). Figure 2 depicts the finished product.

Effects of wafer-level packaging on millimetre-wave antennas

KAUST Repository

Abutarboush, Hattan; Tawfik, Hani H.; Soliman, Ezzeldin A.; Sallam, Mai O.; Shamim, Atif; Sedky, Sherif M.

2011-01-01

methods of packaging millimetre-wave (60 GHz) MEMS antennas. The paper first introduces the custom needs for optimum operation of the MEMS antenna and then examines the current available enabling technologies for packaging. The sensitivity of the antenna

Robust Wafer-Level Thin-Film Encapsulation (Packaging) of Microstructures (MEMS) using Low Stress PECVD Silicon Carbide

NARCIS (Netherlands)

Rajaraman, V.; Pakula, L.S.; Pham, H.T.M.; Sarro, P.M.; French, P.J.

2009-01-01

This paper presents a new low-cost, CMOS-compatible and robust wafer-level encapsulation technique developed using a stress-optimised PECVD SiC as the capping and sealing material, imparting harsh environment capability. This technique has been applied for the fabrication and encapsulation of a wide

A wafer-level multi-chip module process with thick photosensitive benzocyclobutene as the dielectric for microwave application

International Nuclear Information System (INIS)

Tang, Jiajie; Sun, Xiaowei; Luo, Le

2011-01-01

A wafer-level microwave multi-chip module (MMCM) packaging process is presented. Thick photosensitive-benzocyclobutene (photo-BCB) polymer (about 25 µm/layer) is used as the dielectric for its simplified process and the capability of obtaining desirable electrical, chemical and mechanical properties at high frequencies. The MMCM packaging structure contains a monolithic microwave integrated circuit (MMIC) chip embedded in a lossy-silicon wafer, a microwave band-pass filter (BPF) and two layers of BCB/Au interconnection. Key processes of fabrication are described in detail. The non-uniformity of BCB film and the sidewall angle of the via-holes for inter-layer connection are tested. Via-chains prepared by metal/BCB multilayer structures are tested through the Kelvin test structure to investigate the resistances of inter-layer connection. The average value is measured to be 73.5 mΩ. The electrical characteristic of this structure is obtained by a microwave transmission performance test from 15 to 30 GHz. The measurement results show good consistency between the bare MMIC die and the packaged die in the test frequency band. The gain of the MMIC chip after packaging is better than 18 dB within the designed operating frequency range (from 23 to 25 GHz). When the packaged MMIC chip is connected to a BPF, the maximum gain is still measured to reach 11.95 dB at 23.8 GHz

Fabrication of High Aspect Ratio Through-Wafer Vias in CMOS Wafers for 3-D Packaging Applications

DEFF Research Database (Denmark)

Rasmussen, Frank Engel; Frech, J.; Heschel, M.

2003-01-01

A process for fabrication of through-wafer vias in CMOS wafers is presented. The process presented offers simple and well controlled fabrication of through-wafer vias using DRIE formation of wafer through-holes, low temperature deposition of through-hole insulation, doubled sided sputtering of Cr...

Wafer-level testing and test during burn-in for integrated circuits

CERN Document Server

Bahukudumbi, Sudarshan

2010-01-01

Wafer-level testing refers to a critical process of subjecting integrated circuits and semiconductor devices to electrical testing while they are still in wafer form. Burn-in is a temperature/bias reliability stress test used in detecting and screening out potential early life device failures. This hands-on resource provides a comprehensive analysis of these methods, showing how wafer-level testing during burn-in (WLTBI) helps lower product cost in semiconductor manufacturing.Engineers learn how to implement the testing of integrated circuits at the wafer-level under various resource constrain

Wafer-level hermetic thermo-compression bonding using electroplated gold sealing frame planarized by fly-cutting

Science.gov (United States)

Farisi, Muhammad Salman Al; Hirano, Hideki; Frömel, Jörg; Tanaka, Shuji

2017-01-01

In this paper, a novel wafer-level hermetic packaging technology for heterogeneous device integration is presented. Hermetic sealing is achieved by low-temperature thermo-compression bonding using electroplated Au micro-sealing frame planarized by single-point diamond fly-cutting. The proposed technology has significant advantages compared to other established processes in terms of integration of micro-structured wafer, vacuum encapsulation and electrical interconnection, which can be achieved at the same time. Furthermore, the technology is also achievable for a bonding frame width as narrow as 30 μm, giving it an advantage from a geometry perspective, and bonding temperatures as low as 300 °C, making it advantageous for temperature-sensitive devices. Outgassing in vacuum sealed cavities is studied and a cavity pressure below 500 Pa is achieved by introducing annealing steps prior to bonding. The pressure of the sealed cavity is measured by zero-balance method utilizing diaphragm-structured bonding test devices. The leak rate into the packages is determined by long-term sealed cavity pressure measurement for 1500 h to be less than 2.0× {{10}-14} Pa m3s-1. In addition, the bonding shear strength is also evaluated to be higher than 100 MPa.

Electrical Interconnections Through CMOS Wafers

DEFF Research Database (Denmark)

Rasmussen, Frank Engel

2003-01-01

Chips with integrated vias are currently the ultimate miniaturizing solution for 3D packaging of microsystems. Previously the application of vias has almost exclusively been demonstrated within MEMS technology, and only a few of these via technologies have been CMOS compatible. This thesis...... describes the development of vias through a silicon wafer containing Complementary Metal-Oxide Semiconductor (CMOS) circuitry. Two via technologies have been developed and fabricated in blank silicon wafers; one based on KOH etching of wafer through-holes and one based on DRIE of wafer through......-holes. The most promising of these technologies --- the DRIE based process --- has been implemented in CMOS wafers containing hearing aid amplifiers. The main challenges in the development of a CMOS compatible via process depend on the chosen process for etching of wafer through-holes. In the case of KOH etching...

Eutectic-based wafer-level-packaging technique for piezoresistive MEMS accelerometers and bond characterization using molecular dynamics simulations

Science.gov (United States)

Aono, T.; Kazama, A.; Okada, R.; Iwasaki, T.; Isono, Y.

2018-03-01

We developed a eutectic-based wafer-level-packaging (WLP) technique for piezoresistive micro-electromechanical systems (MEMS) accelerometers on the basis of molecular dynamics analyses and shear tests of WLP accelerometers. The bonding conditions were experimentally and analytically determined to realize a high shear strength without solder material atoms diffusing to adhesion layers. Molecular dynamics (MD) simulations and energy dispersive x-ray (EDX) spectrometry done after the shear tests clarified the eutectic reaction of the solder materials used in this research. Energy relaxation calculations in MD showed that the diffusion of solder material atoms into the adhesive layer was promoted at a higher temperature. Tensile creep MD simulations also suggested that the local potential energy in a solder material model determined the fracture points of the model. These numerical results were supported by the shear tests and EDX analyses for WLP accelerometers. Consequently, a bonding load of 9.8 kN and temperature of 300 °C were found to be rational conditions because the shear strength was sufficient to endure the polishing process after the WLP process and there was little diffusion of solder material atoms to the adhesion layer. Also, eutectic-bonding-based WLP was effective for controlling the attenuation of the accelerometers by determining the thickness of electroplated solder materials that played the role of a cavity between the accelerometers and lids. If the gap distance between the two was less than 6.2 µm, the signal gains for x- and z-axis acceleration were less than 20 dB even at the resonance frequency due to air-damping.

Materials for advanced packaging

CERN Document Server

Wong, CP

2017-01-01

This second edition continues to be the most comprehensive review on the developments in advanced electronic packaging technologies, with a focus on materials and processing. Recognized experts in the field contribute to 22 updated and new chapters that provide comprehensive coverage on various 3D package architectures, novel bonding and joining techniques, wire bonding, wafer thinning techniques, organic substrates, and novel approaches to make electrical interconnects between integrated circuit and substrates. Various chapters also address advances in several key packaging materials, including: Lead-free solders Flip chip underfills Epoxy molding compounds Conductive adhesives Die attach adhesives/films Thermal interface materials (TIMS) Materials for fabricating embedded passives including capacitors, inductors, and resistors Materials and processing aspects on wafer-level chip scale package (CSP) and MicroElectroMechanical system (MEMS) Contributors also review new and emerging technologies such as Light ...

Co-Design Method and Wafer-Level Packaging Technique of Thin-Film Flexible Antenna and Silicon CMOS Rectifier Chips for Wireless-Powered Neural Interface Systems

Directory of Open Access Journals (Sweden)

Kenji Okabe

2015-12-01

Full Text Available In this paper, a co-design method and a wafer-level packaging technique of a flexible antenna and a CMOS rectifier chip for use in a small-sized implantable system on the brain surface are proposed. The proposed co-design method optimizes the system architecture, and can help avoid the use of external matching components, resulting in the realization of a small-size system. In addition, the technique employed to assemble a silicon large-scale integration (LSI chip on the very thin parylene film (5 μm enables the integration of the rectifier circuits and the flexible antenna (rectenna. In the demonstration of wireless power transmission (WPT, the fabricated flexible rectenna achieved a maximum efficiency of 0.497% with a distance of 3 cm between antennas. In addition, WPT with radio waves allows a misalignment of 185% against antenna size, implying that the misalignment has a less effect on the WPT characteristics compared with electromagnetic induction.

Co-Design Method and Wafer-Level Packaging Technique of Thin-Film Flexible Antenna and Silicon CMOS Rectifier Chips for Wireless-Powered Neural Interface Systems.

Science.gov (United States)

Okabe, Kenji; Jeewan, Horagodage Prabhath; Yamagiwa, Shota; Kawano, Takeshi; Ishida, Makoto; Akita, Ippei

2015-12-16

In this paper, a co-design method and a wafer-level packaging technique of a flexible antenna and a CMOS rectifier chip for use in a small-sized implantable system on the brain surface are proposed. The proposed co-design method optimizes the system architecture, and can help avoid the use of external matching components, resulting in the realization of a small-size system. In addition, the technique employed to assemble a silicon large-scale integration (LSI) chip on the very thin parylene film (5 μm) enables the integration of the rectifier circuits and the flexible antenna (rectenna). In the demonstration of wireless power transmission (WPT), the fabricated flexible rectenna achieved a maximum efficiency of 0.497% with a distance of 3 cm between antennas. In addition, WPT with radio waves allows a misalignment of 185% against antenna size, implying that the misalignment has a less effect on the WPT characteristics compared with electromagnetic induction.

Low-temperature wafer-level gold thermocompression bonding: modeling of flatness deviations and associated process optimization for high yield and tough bonds

Science.gov (United States)

Stamoulis, Konstantinos; Tsau, Christine H.; Spearing, S. Mark

2005-01-01

Wafer-level, thermocompression bonding is a promising technique for MEMS packaging. The quality of the bond is critically dependent on the interaction between flatness deviations, the gold film properties and the process parameters and tooling used to achieve the bonds. The effect of flatness deviations on the resulting bond is investigated in the current work. The strain energy release rate associated with the elastic deformation required to overcome wafer bow is calculated. A contact yield criterion is used to examine the pressure and temperature conditions required to flatten surface roughness asperities in order to achieve bonding over the full apparent area. The results are compared to experimental data of bond yield and toughness obtained from four-point bend delamination testing and microscopic observations of the fractured surfaces. Conclusions from the modeling and experiments indicate that wafer bow has negligible effect on determining the variability of bond quality and that the well-bonded area is increased with increasing bonding pressure. The enhanced understanding of the underlying deformation mechanisms allows for a better controlled trade-off between the bonding pressure and temperature.

Wafer-scale micro-optics fabrication

Science.gov (United States)

Voelkel, Reinhard

2012-07-01

Micro-optics is an indispensable key enabling technology for many products and applications today. Probably the most prestigious examples are the diffractive light shaping elements used in high-end DUV lithography steppers. Highly-efficient refractive and diffractive micro-optical elements are used for precise beam and pupil shaping. Micro-optics had a major impact on the reduction of aberrations and diffraction effects in projection lithography, allowing a resolution enhancement from 250 nm to 45 nm within the past decade. Micro-optics also plays a decisive role in medical devices (endoscopes, ophthalmology), in all laser-based devices and fiber communication networks, bringing high-speed internet to our homes. Even our modern smart phones contain a variety of micro-optical elements. For example, LED flash light shaping elements, the secondary camera, ambient light and proximity sensors. Wherever light is involved, micro-optics offers the chance to further miniaturize a device, to improve its performance, or to reduce manufacturing and packaging costs. Wafer-scale micro-optics fabrication is based on technology established by the semiconductor industry. Thousands of components are fabricated in parallel on a wafer. This review paper recapitulates major steps and inventions in wafer-scale micro-optics technology. The state-of-the-art of fabrication, testing and packaging technology is summarized.

Wafer-level manufacturing technology of glass microlenses

Science.gov (United States)

Gossner, U.; Hoeftmann, T.; Wieland, R.; Hansch, W.

2014-08-01

In high-tech products, there is an increasing demand to integrate glass lenses into complex micro systems. Especially in the lighting industry LEDs and laser diodes used for automotive applications require encapsulated micro lenses. To enable low-cost production, manufacturing of micro lenses on wafer level base using a replication technology is a key technology. This requires accurate forming of thousands of lenses with a diameter of 1-2 mm on a 200 mm wafer compliant with mass production. The article will discuss the technical aspects of a lens manufacturing replication process and the challenges, which need to be solved: choice of an appropriate master for replication, thermally robust interlayer coating, choice of replica glass, bonding and separation procedure. A promising approach for the master substrate material is based on a lens structured high-quality glass wafer with high melting point covered by a coating layer of amorphous silicon or germanium. This layer serves as an interlayer for the glass bonding process. Low pressure chemical vapor deposition and plasma enhanced chemical vapor deposition processes allow a deposition of layer coatings with different hydrogen and doping content influencing their chemical and physical behavior. A time reduced molding process using a float glass enables the formation of high quality lenses while preserving the recyclability of the mother substrate. The challenge is the separation of the replica from the master mold. An overview of chemical methods based on optimized etching of coating layer through small channels will be given and the impact of glass etching on surface roughness is discussed.

Methods for characterization of wafer-level encapsulation applied on silicon to LTCC anodic bonding

International Nuclear Information System (INIS)

Khan, M F; Ghavanini, F A; Enoksson, P; Haasl, S; Löfgren, L; Persson, K; Rusu, C; Schjølberg-Henriksen, K

2010-01-01

This paper presents initial results on generic characterization methods for wafer-level encapsulation. The methods, developed specifically to evaluate anodic bonding of low-temperature cofired ceramics (LTCC) to Si, are generally applicable to wafer-level encapsulation. Different microelectromechanical system (MEMS) structures positioned over the whole wafer provide local information about the bond quality. The structures include (i) resonating cantilevers as pressure sensors for bond hermeticity, (ii) resonating bridges as stress sensors for measuring the stress induced by the bonding and (iii) frames/mesas for pull tests. These MEMS structures have been designed, fabricated and characterized indicating that local information can easily be obtained. Buried electrodes to enable localized bonding have been implemented and their effectiveness is indicated from first results of the novel Si to LTCC anodic bonding.

Graphitized silicon carbide microbeams: wafer-level, self-aligned graphene on silicon wafers

International Nuclear Information System (INIS)

Cunning, Benjamin V; Ahmed, Mohsin; Mishra, Neeraj; Kermany, Atieh Ranjbar; Iacopi, Francesca; Wood, Barry

2014-01-01

Currently proven methods that are used to obtain devices with high-quality graphene on silicon wafers involve the transfer of graphene flakes from a growth substrate, resulting in fundamental limitations for large-scale device fabrication. Moreover, the complex three-dimensional structures of interest for microelectromechanical and nanoelectromechanical systems are hardly compatible with such transfer processes. Here, we introduce a methodology for obtaining thousands of microbeams, made of graphitized silicon carbide on silicon, through a site-selective and wafer-scale approach. A Ni-Cu alloy catalyst mediates a self-aligned graphitization on prepatterned SiC microstructures at a temperature that is compatible with silicon technologies. The graphene nanocoating leads to a dramatically enhanced electrical conductivity, which elevates this approach to an ideal method for the replacement of conductive metal films in silicon carbide-based MEMS and NEMS devices. (paper)

Packaging of MEMS/MOEMS and nanodevices: reliability, testing, and characterization aspects

Science.gov (United States)

Tekin, Tolga; Ngo, Ha-Duong; Wittler, Olaf; Bouhlal, Bouchaib; Lang, Klaus-Dieter

2011-02-01

The last decade witnessed an explosive growth in research and development efforts devoted to MEMS devices and packaging. The successfully developed MEMS devices are, for example inkjet, pressure sensors, silicon microphones, accelerometers, gyroscopes, MOEMS, micro fuel cells and emerging MEMS. For the next decade, MEMS/MOEMS and nanodevice based products will penetrate into IT, telecommunications, automotive, defense, life sciences, medical and implantable applications. Forecasts say the MEMS market to be $14 billion by 2012. The packaging cost of MEMS/MOEMS products in general is about 70 percent. Unlike today's electronics IC packaging, their packaging are custom-built and difficult due to the moving structural elements. In order for the moving elements of a MEMS device to move effectively in a well-controlled atmosphere, hermetic sealing of the MEMS device in a cap is necessary. For some MEMS devices, such as resonators and gyroscopes, vacuum packaging is required. Usually, the cap is processed at the wafer level, and thus MEMS packaging is truly a wafer level packaging. In terms of MEMS/MOEMS and nanodevice packaging, there are still many critical issues need to be addressed due to the increasing integration density supported by 3D heterogeneous integration of multi-physic components/layers consisting of photonics, electronics, rf, plasmonics, and wireless. The infrastructure of MEMS/MOEMS and nanodevices and their packaging is not well established yet. Generic packaging platform technologies are not available. Some of critical issues have been studied intensively in the last years. In this paper we will discuss about processes, reliability, testing and characterization of MEMS/MOEMS and nanodevice packaging.

Laser cutting sandwich structure glass-silicon-glass wafer with laser induced thermal-crack propagation

Science.gov (United States)

Cai, Yecheng; Wang, Maolu; Zhang, Hongzhi; Yang, Lijun; Fu, Xihong; Wang, Yang

2017-08-01

Silicon-glass devices are widely used in IC industry, MEMS and solar energy system because of their reliability and simplicity of the manufacturing process. With the trend toward the wafer level chip scale package (WLCSP) technology, the suitable dicing method of silicon-glass bonded structure wafer has become necessary. In this paper, a combined experimental and computational approach is undertaken to investigate the feasibility of cutting the sandwich structure glass-silicon-glass (SGS) wafer with laser induced thermal-crack propagation (LITP) method. A 1064 nm semiconductor laser cutting system with double laser beams which could simultaneously irradiate on the top and bottom of the sandwich structure wafer has been designed. A mathematical model for describing the physical process of the interaction between laser and SGS wafer, which consists of two surface heating sources and two volumetric heating sources, has been established. The temperature stress distribution are simulated by using finite element method (FEM) analysis software ABAQUS. The crack propagation process is analyzed by using the J-integral method. In the FEM model, a stationary planar crack is embedded in the wafer and the J-integral values around the crack front edge are determined using the FEM. A verification experiment under typical parameters is conducted and the crack propagation profile on the fracture surface is examined by the optical microscope and explained from the stress distribution and J-integral value.

Reliability of industrial packaging for microsystems

DEFF Research Database (Denmark)

Reus, Roger De; Christensen, Carsten; Weichel, Steen

1998-01-01

. Protective coatings of amorphous silicon carbide and tantalum oxide are suitable candidates with etch rates below 0.1 Angstrom/h in aqueous solutions with pH II at temperatures up to 140 degrees C. Si-Ta-N films exhibit etch rates around 1 Angstrom/h. Parylene C coatings did not etch but peeled off after......Packaging concepts for silicon-based micromachined sensors exposed to harsh environments are explored. By exposing the sensors directly to the media and applying protection at the wafer level the packaging and assembly will be simplified as compared to conventional methods of fabrication...

CMOS-MEMS Test-Key for Extracting Wafer-Level Mechanical Properties

Directory of Open Access Journals (Sweden)

Pei-Zen Chang

2012-12-01

Full Text Available This paper develops the technologies of mechanical characterization of CMOS-MEMS devices, and presents a robust algorithm for extracting mechanical properties, such as Young’s modulus, and mean stress, through the external electrical circuit behavior of the micro test-key. An approximate analytical solution for the pull-in voltage of bridge-type test-key subjected to electrostatic load and initial stress is derived based on Euler’s beam model and the minimum energy method. Then one can use the aforesaid closed form solution of the pull-in voltage to extract the Young’s modulus and mean stress of the test structures. The test cases include the test-key fabricated by a TSMC 0.18 μm standard CMOS process, and the experimental results refer to Osterberg’s work on the pull-in voltage of single crystal silicone microbridges. The extracted material properties calculated by the present algorithm are valid. Besides, this paper also analyzes the robustness of this algorithm regarding the dimension effects of test-keys. This mechanical properties extracting method is expected to be applicable to the wafer-level testing in micro-device manufacture and compatible with the wafer-level testing in IC industry since the test process is non-destructive.

Analysis and modeling of wafer-level process variability in 28 nm FD-SOI using split C-V measurements

Science.gov (United States)

Pradeep, Krishna; Poiroux, Thierry; Scheer, Patrick; Juge, André; Gouget, Gilles; Ghibaudo, Gérard

2018-07-01

This work details the analysis of wafer level global process variability in 28 nm FD-SOI using split C-V measurements. The proposed approach initially evaluates the native on wafer process variability using efficient extraction methods on split C-V measurements. The on-wafer threshold voltage (VT) variability is first studied and modeled using a simple analytical model. Then, a statistical model based on the Leti-UTSOI compact model is proposed to describe the total C-V variability in different bias conditions. This statistical model is finally used to study the contribution of each process parameter to the total C-V variability.

Investigation of Surface Pre-Treatment Methods for Wafer-Level Cu-Cu Thermo-Compression Bonding

Directory of Open Access Journals (Sweden)

Koki Tanaka

2016-12-01

Full Text Available To increase the yield of the wafer-level Cu-Cu thermo-compression bonding method, certain surface pre-treatment methods for Cu are studied which can be exposed to the atmosphere before bonding. To inhibit re-oxidation under atmospheric conditions, the reduced pure Cu surface is treated by H2/Ar plasma, NH3 plasma and thiol solution, respectively, and is covered by Cu hydride, Cu nitride and a self-assembled monolayer (SAM accordingly. A pair of the treated wafers is then bonded by the thermo-compression bonding method, and evaluated by the tensile test. Results show that the bond strengths of the wafers treated by NH3 plasma and SAM are not sufficient due to the remaining surface protection layers such as Cu nitride and SAMs resulting from the pre-treatment. In contrast, the H2/Ar plasma–treated wafer showed the same strength as the one with formic acid vapor treatment, even when exposed to the atmosphere for 30 min. In the thermal desorption spectroscopy (TDS measurement of the H2/Ar plasma–treated Cu sample, the total number of the detected H2 was 3.1 times more than the citric acid–treated one. Results of the TDS measurement indicate that the modified Cu surface is terminated by chemisorbed hydrogen atoms, which leads to high bonding strength.

Comprehensive Die Shear Test of Silicon Packages Bonded by Thermocompression of Al Layers with Thin Sn Capping or Insertions

Directory of Open Access Journals (Sweden)

Shiro Satoh

2018-04-01

Full Text Available Thermocompression bonding for wafer-level hermetic packaging was demonstrated at the lowest temperature of 370 to 390 °C ever reported using Al films with thin Sn capping or insertions as bonding layer. For shrinking the chip size of MEMS (micro electro mechanical systems, a smaller size of wafer-level packaging and MEMS–ASIC (application specific integrated circuit integration are of great importance. Metal-based bonding under the temperature of CMOS (complementary metal-oxide-semiconductor backend process is a key technology, and Al is one of the best candidates for bonding metal in terms of CMOS compatibility. In this study, after the thermocompression bonding of two substrates, the shear fracture strength of dies was measured by a bonding tester, and the shear-fractured surfaces were observed by SEM (scanning electron microscope, EDX (energy dispersive X-ray spectrometry, and a surface profiler to clarify where the shear fracture took place. We confirmed two kinds of fracture mode. One mode is Si bulk fracture mode, where the die shear strength is 41.6 to 209 MPa, proportionally depending on the area of Si fracture. The other mode is bonding interface fracture mode, where the die shear strength is 32.8 to 97.4 MPa. Regardless of the fracture modes, the minimum die shear strength is practical for wafer-level MEMS packaging.

Radiation Level Changes at RAM Package Surfaces

Energy Technology Data Exchange (ETDEWEB)

Opperman, Erich [Washington Savannah River Company; Hawk, Mark B [ORNL; Kapoor, Ashok [U.S. Department of Energy, Office of Packaging and Transportation; Natali, Ronald [R. B. Natali Consulting, Inc.

2010-01-01

This paper will explore design considerations required to meet the regulations that limit radiation level variations at external surfaces of radioactive material (RAM) packages. The radiation level requirements at package surfaces (e.g. TS-R-1 paragraphs 531 and 646) invoke not only maximum radiation levels, but also strict limits on the allowable increase in the radiation level during transport. This paper will explore the regulatory requirements by quantifying the amount of near surface movement and/or payload shifting that results in a 20% increase in the radiation level at the package surface. Typical IP-2, IP-3, Type A and Type B packaging and source geometries will be illustrated. Variations in surface radiation levels are typically the result of changes in the geometry of the surface due to an impact, puncture or crush event, or shifting and settling of radioactive contents.

Packaged low-level waste verification system

Energy Technology Data Exchange (ETDEWEB)

Tuite, K.; Winberg, M.R.; McIsaac, C.V. [Idaho National Engineering Lab., Idaho Falls, ID (United States)

1995-12-31

The Department of Energy through the National Low-Level Waste Management Program and WMG Inc. have entered into a joint development effort to design, build, and demonstrate the Packaged Low-Level Waste Verification System. Currently, states and low-level radioactive waste disposal site operators have no method to independently verify the radionuclide content of packaged low-level waste that arrives at disposal sites for disposition. At this time, the disposal site relies on the low-level waste generator shipping manifests and accompanying records to ensure that low-level waste received meets the site`s waste acceptance criteria. The subject invention provides the equipment, software, and methods to enable the independent verification of low-level waste shipping records to ensure that the site`s waste acceptance criteria are being met. The objective of the prototype system is to demonstrate a mobile system capable of independently verifying the content of packaged low-level waste.

Self-aligned 0-level sealing of MEMS devices by a two layer thin film reflow process

NARCIS (Netherlands)

Rusu, C.R.; Jansen, Henricus V.; Gunn, R.; Witvrouw, A.

2003-01-01

Many micro electromechanical systems (MEMS) require a vacuum or controlled atmosphere encapsulation in order to ensure either a good performance or an acceptable lifetime of operation. Two approaches for wafer-scale zero-level packaging exist. The most popular approach is based on wafer bonding.

Wafer-Level Patterned and Aligned Polymer Nanowire/Micro- and Nanotube Arrays on any Substrate

KAUST Repository

Morber, Jenny Ruth

2009-05-25

A study was conducted to fabricate wafer-level patterned and aligned polymer nanowire (PNW), micro- and nanotube arrays (PNT), which were created by exposing the polymer material to plasma etching. The approach for producing wafer-level aligned PNWs involved a one-step inductively coupled plasma (ICP) reactive ion etching process. The polymer nanowire array was fabricated in an ICP reactive ion milling chamber with a pressure of 10mTorr. Argon (Ar), O 2, and CF4 gases were released into the chamber as etchants at flow rates of 15 sccm, 10 sccm, and 40 sccm. Inert gasses, such as Ar-form positive ions were incorporated to serve as a physical component to assist in the material degradation process. One power source (400 W) was used to generate dense plasma from the input gases, while another power source applied a voltage of approximately 600V to accelerate the plasma toward the substrate.

Analysis and wafer-level design of a high-order silicon vibration isolator for resonating MEMS devices

International Nuclear Information System (INIS)

Yoon, Sang Won; Lee, Sangwoo; Najafi, Khalil; Perkins, Noel C

2011-01-01

This paper presents the analysis and preliminary design, fabrication, and measurement for mechanical vibration-isolation platforms especially designed for resonating MEMS devices including gyroscopes. Important parameters for designing isolation platforms are specified and the first platform (in designs with cascaded multiple platforms) is crucial for improving vibration-isolation performance and minimizing side-effects on integrated gyroscopes. This isolation platform, made from a thick silicon wafer substrate for an environment-resistant MEMS package, incorporates the functionalities of a previous design including vacuum packaging and thermal resistance with no additional resources. This platform consists of platform mass, isolation beams, vertical feedthroughs, and bonding pads. Two isolation platform designs follow from two isolation beam designs: lateral clamped–clamped beams and vertical torsion beams. The beams function simultaneously as mechanical springs and electrical interconnects. The vibration-isolation platform can yield a multi-dimensional, high-order mechanical low pass filter. The isolation platform possesses eight interconnects within a 12.2 × 12.2 mm 2 footprint. The contact resistance ranges from 4–11 Ω depending on the beam design. Vibration measurements using a laser-Doppler vibrometer demonstrate that the lateral vibration-isolation platform suppresses external vibration having frequencies exceeding 2.1 kHz.

All-in-One Wafer-Level Solution for MMIC Automatic Testing

Directory of Open Access Journals (Sweden)

Xu Ding

2018-04-01

Full Text Available In this paper, we present an all-in-one wafer-level solution for MMIC (monolithic microwave integrated circuit automatic testing. The OSL (open short load two tier de-embedding, the calibration verification model, the accurate PAE (power added efficiency testing, and the optimized vector cold source NF (noise figure measurement techniques are integrated in this solution to improve the measurement accuracy. A dual-core topology formed by an IPC (industrial personal computer and a VNA (vector network analyzer, and an automatic test software based on a three-level driver architecture, are applied to enhance the test efficiency. The benefit from this solution is that all the data of a MMIC can be achieved in only one contact, which shows state-of-the-art accuracy and efficiency.

Physical mechanisms of Cu-Cu wafer bonding

International Nuclear Information System (INIS)

Rebhan, B.

2014-01-01

Modern manufacturing processes of complex integrated semiconductor devices are based on wafer-level manufacturing of components which are subsequently interconnected. When compared with classical monolithic bi-dimensional integrated circuits (2D ICs), the new approach of three-dimensional integrated circuits (3D ICs) exhibits significant benefits in terms of signal propagation delay and power consumption due to the reduced metal interconnection length and allows high integration levels with reduced form factor. Metal thermo-compression bonding is a process suitable for 3D interconnects applications at wafer level, which facilitates the electrical and mechanical connection of two wafers even processed in different technologies, such as complementary metal oxide semiconductor (CMOS) and microelectromechanical systems (MEMS). Due to its high electrical conductivity, copper is a very attractive material for electrical interconnects. For Cu-Cu wafer bonding the process requires typically bonding for around 1 h at 400°C and high contact pressure applied during bonding. Temperature reduction below such values is required in order to solve issues regarding (i) throughput in the wafer bonder, (ii) wafer-to-wafer misalignment after bonding and (iii) to minimise thermo-mechanical stresses or device degradation. The aim of this work was to study the physical mechanisms of Cu-Cu bonding and based on this study to further optimise the bonding process for low temperatures. The critical sample parameters (roughness, oxide, crystallinity) were identified using selected analytical techniques and correlated with the characteristics of the bonded Cu-Cu interfaces. Based on the results of this study the impact of several materials and process specifications on the bonding result were theoretically defined and experimentally proven. These fundamental findings subsequently facilitated low temperature (LT) metal thermo-compression Cu-Cu wafer bonding and even room temperature direct

Low-level waste packaging--a managerial perspective

International Nuclear Information System (INIS)

Motl, G.P.; Hebbard, L.B. Jr.

1980-01-01

This paper emphasizes managerial responsibility for assuring that facility waste is properly packaged. Specifically, existing packaging regulations are summarized, several actual violations are reviewed and, lastly, some recommendations are made to assist managerial personnel in fulfilling their responsibility to ensure that low-level waste is packaged safely and properly before shipment to the disposal site

Design and fabrication of a foldable 3D silicon based package for solid state lighting applications

International Nuclear Information System (INIS)

Sokolovskij, R; Liu, P; Van Zeijl, H W; Mimoun, B; Zhang, G Q

2015-01-01

Miniaturization of solid state lighting (SSL) luminaires as well as reduction of packaging and assembly costs are of prime interest for the SSL lighting industry. A novel silicon based LED package for lighting applications is presented in this paper. The proposed design consists of 5 rigid Si tiles connected by flexible polyimide hinges with embedded interconnects (ICs). Electrical, optical and thermal characteristics were taken into consideration during design. The fabrication process involved polyimide (PI) application and patterning, aluminium interconnect integration in the flexible hinge, LED reflector cavity formation and metalization followed by through wafer DRIE etching for chip formation and release. A method to connect chip front to backside without TSVs was also integrated into the process. Post-fabrication wafer level assembly included LED mounting and wirebond, phosphor-based colour conversion and silicone encapsulation. The package formation was finalized by vacuum assisted wrapping around an assembly structure to form a 3D geometry, which is beneficial for omnidirectional lighting. Bending tests were performed on the flexible ICs and optical performance at different temperatures was evaluated. It is suggested that 3D packages can be expanded to platforms for miniaturized luminaire applications by combining monolithic silicon integration and system-in-package (SiP) technologies. (paper)

Vacuum-packaged piezoelectric vibration energy harvesters: damping contributions and autonomy for a wireless sensor system

International Nuclear Information System (INIS)

Elfrink, R; Renaud, M; Kamel, T M; De Nooijer, C; Jambunathan, M; Goedbloed, M; Hohlfeld, D; Matova, S; Pop, V; Caballero, L; Van Schaijk, R

2010-01-01

This paper describes the characterization of thin-film MEMS vibration energy harvesters based on aluminum nitride as piezoelectric material. A record output power of 85 µW is measured. The parasitic-damping and the energy-harvesting performances of unpackaged and packaged devices are investigated. Vacuum and atmospheric pressure levels are considered for the packaged devices. When dealing with packaged devices, it is found that vacuum packaging is essential for maximizing the output power. Therefore, a wafer-scale vacuum package process is developed. The energy harvesters are used to power a small prototype (1 cm 3 volume) of a wireless autonomous sensor system. The average power consumption of the whole system is less than 10 µW, and it is continuously provided by the vibration energy harvester

MEMS packaging: state of the art and future trends

Science.gov (United States)

Bossche, Andre; Cotofana, Carmen V. B.; Mollinger, Jeff R.

1998-07-01

Now that the technology for Integrated sensor and MEMS devices has become sufficiently mature to allow mass production, it is expected that the prices of bare chips will drop dramatically. This means that the package prices will become a limiting factor in market penetration, unless low cost packaging solutions become available. This paper will discuss the developments in packaging technology. Both single-chip and multi-chip packaging solutions will be addressed. It first starts with a discussion on the different requirements that have to be met; both from a device point of view (open access paths to the environment, vacuum cavities, etc.) and from the application point of view (e.g. environmental hostility). Subsequently current technologies are judged on their applicability for MEMS and sensor packaging and a forecast is given for future trends. It is expected that the large majority of sensing devices will be applied in relative friendly environments for which plastic packages would suffice. Therefore, on the short term an important role is foreseen for recently developed plastic packaging techniques such as precision molding and precision dispensing. Just like in standard electronic packaging, complete wafer level packaging methods for sensing devices still have a long way to go before they can compete with the highly optimized and automated plastic packaging processes.

Chip-package nano-structured copper and nickel interconnections with metallic and polymeric bonding interfaces

Science.gov (United States)

Aggarwal, Ankur

With the semiconductor industry racing toward a historic transition, nano chips with less than 45 nm features demand I/Os in excess of 20,000 that support computing speed in terabits per second, with multi-core processors aggregately providing highest bandwidth at lowest power. On the other hand, emerging mixed signal systems are driving the need for 3D packaging with embedded active components and ultra-short interconnections. Decreasing I/O pitch together with low cost, high electrical performance and high reliability are the key technological challenges identified by the 2005 International Technology Roadmap for Semiconductors (ITRS). Being able to provide several fold increase in the chip-to-package vertical interconnect density is essential for garnering the true benefits of nanotechnology that will utilize nano-scale devices. Electrical interconnections are multi-functional materials that must also be able to withstand complex, sustained and cyclic thermo-mechanical loads. In addition, the materials must be environmentally-friendly, corrosion resistant, thermally stable over a long time, and resistant to electro-migration. A major challenge is also to develop economic processes that can be integrated into back end of the wafer foundry, i.e. with wafer level packaging. Device-to-system board interconnections are typically accomplished today with either wire bonding or solders. Both of these are incremental and run into either electrical or mechanical barriers as they are extended to higher density of interconnections. Downscaling traditional solder bump interconnect will not satisfy the thermo-mechanical reliability requirements at very fine pitches of the order of 30 microns and less. Alternate interconnection approaches such as compliant interconnects typically require lengthy connections and are therefore limited in terms of electrical properties, although expected to meet the mechanical requirements. A novel chip-package interconnection technology is

A novel patterning control strategy based on real-time fingerprint recognition and adaptive wafer level scanner optimization

Science.gov (United States)

Cekli, Hakki Ergun; Nije, Jelle; Ypma, Alexander; Bastani, Vahid; Sonntag, Dag; Niesing, Henk; Zhang, Linmiao; Ullah, Zakir; Subramony, Venky; Somasundaram, Ravin; Susanto, William; Matsunobu, Masazumi; Johnson, Jeff; Tabery, Cyrus; Lin, Chenxi; Zou, Yi

2018-03-01

In addition to lithography process and equipment induced variations, processes like etching, annealing, film deposition and planarization exhibit variations, each having their own intrinsic characteristics and leaving an effect, a `fingerprint', on the wafers. With ever tighter requirements for CD and overlay, controlling these process induced variations is both increasingly important and increasingly challenging in advanced integrated circuit (IC) manufacturing. For example, the on-product overlay (OPO) requirement for future nodes is approaching process induced variance to become extremely small. Process variance control is seen as an bottleneck to further shrink which drives the need for more sophisticated process control strategies. In this context we developed a novel `computational process control strategy' which provides the capability of proactive control of each individual wafer with aim to maximize the yield, without introducing a significant impact on metrology requirements, cycle time or productivity. The complexity of the wafer process is approached by characterizing the full wafer stack building a fingerprint library containing key patterning performance parameters like Overlay, Focus, etc. Historical wafer metrology is decomposed into dominant fingerprints using Principal Component Analysis. By associating observed fingerprints with their origin e.g. process steps, tools and variables, we can give an inline assessment of the strength and origin of the fingerprints on every wafer. Once the fingerprint library is established, a wafer specific fingerprint correction recipes can be determined based on its processing history. Data science techniques are used in real-time to ensure that the library is adaptive. To realize this concept, ASML TWINSCAN scanners play a vital role with their on-board full wafer detection and exposure correction capabilities. High density metrology data is created by the scanner for each wafer and on every layer during the

Modeling of direct wafer bonding: Effect of wafer bow and etch patterns

Science.gov (United States)

Turner, K. T.; Spearing, S. M.

2002-12-01

Direct wafer bonding is an important technology for the manufacture of silicon-on-insulator substrates and microelectromechanical systems. As devices become more complex and require the bonding of multiple patterned wafers, there is a need to understand the mechanics of the bonding process. A general bonding criterion based on the competition between the strain energy accumulated in the wafers and the surface energy that is dissipated as the bond front advances is developed. The bonding criterion is used to examine the case of bonding bowed wafers. An analytical expression for the strain energy accumulation rate, which is the quantity that controls bonding, and the final curvature of a bonded stack is developed. It is demonstrated that the thickness of the wafers plays a large role and bonding success is independent of wafer diameter. The analytical results are verified through a finite element model and a general method for implementing the bonding criterion numerically is presented. The bonding criterion developed permits the effect of etched features to be assessed. Shallow etched patterns are shown to make bonding more difficult, while it is demonstrated that deep etched features can facilitate bonding. Model results and their process design implications are discussed in detail.

Software refactoring at the package level using clustering techniques

KAUST Repository

Alkhalid, A.

2011-01-01

Enhancing, modifying or adapting the software to new requirements increases the internal software complexity. Software with high level of internal complexity is difficult to maintain. Software refactoring reduces software complexity and hence decreases the maintenance effort. However, software refactoring becomes quite challenging task as the software evolves. The authors use clustering as a pattern recognition technique to assist in software refactoring activities at the package level. The approach presents a computer aided support for identifying ill-structured packages and provides suggestions for software designer to balance between intra-package cohesion and inter-package coupling. A comparative study is conducted applying three different clustering techniques on different software systems. In addition, the application of refactoring at the package level using an adaptive k-nearest neighbour (A-KNN) algorithm is introduced. The authors compared A-KNN technique with the other clustering techniques (viz. single linkage algorithm, complete linkage algorithm and weighted pair-group method using arithmetic averages). The new technique shows competitive performance with lower computational complexity. © 2011 The Institution of Engineering and Technology.

Alternative Packaging for Back-Illuminated Imagers

Science.gov (United States)

Pain, Bedabrata

2009-01-01

An alternative scheme has been conceived for packaging of silicon-based back-illuminated, back-side-thinned complementary metal oxide/semiconductor (CMOS) and charge-coupled-device image-detector integrated circuits, including an associated fabrication process. This scheme and process are complementary to those described in "Making a Back-Illuminated Imager With Back-Side Connections" (NPO-42839), NASA Tech Briefs, Vol. 32, No. 7 (July 2008), page 38. To avoid misunderstanding, it should be noted that in the terminology of imaging integrated circuits, "front side" or "back side" does not necessarily refer to the side that, during operation, faces toward or away from a source of light or other object to be imaged. Instead, "front side" signifies that side of a semiconductor substrate upon which the pixel pattern and the associated semiconductor devices and metal conductor lines are initially formed during fabrication, and "back side" signifies the opposite side. If the imager is of the type called "back-illuminated," then the back side is the one that faces an object to be imaged. Initially, a back-illuminated, back-side-thinned image-detector is fabricated with its back side bonded to a silicon handle wafer. At a subsequent stage of fabrication, the front side is bonded to a glass wafer (for mechanical support) and the silicon handle wafer is etched away to expose the back side. The frontside integrated circuitry includes metal input/output contact pads, which are rendered inaccessible by the bonding of the front side to the glass wafer. Hence, one of the main problems is to make the input/output contact pads accessible from the back side, which is ultimately to be the side accessible to the external world. The present combination of an alternative packaging scheme and associated fabrication process constitute a solution of the problem.

Microemulsion-Based Mucoadhesive Buccal Wafers: Wafer Formation, In Vitro Release, and Ex Vivo Evaluation.

Science.gov (United States)

Pham, Minh Nguyet; Van Vo, Toi; Tran, Van-Thanh; Tran, Phuong Ha-Lien; Tran, Thao Truong-Dinh

2017-10-01

Microemulsion has the potentials to enhance dissolution as well as facilitate absorption and permeation of poorly water-soluble drugs through biological membranes. However, its application to govern a controlled release buccal delivery for local treatment has not been discovered. The aim of this study is to develop microemulsion-based mucoadhesive wafers for buccal delivery based on an incorporation of the microemulsion with mucoadhesive agents and mannitol. Ratio of oil to surfactant to water in the microemulsion significantly impacted quality of the wafers. Furthermore, the combination of carbopol and mannitol played a key role in forming the desired buccal wafers. The addition of an extra 50% of water to the formulation was suitable for wafer formation by freeze-drying, which affected the appearance and distribution of carbopol in the wafers. The amount of carbopol was critical for the enhancement of mucoadhesive properties and the sustained drug release patterns. Release study presented a significant improvement of the drug release profile following sustained release for 6 h. Ex vivo mucoadhesive studies provided decisive evidence to the increased retention time of wafers along with the increased carbopol content. The success of this study indicates an encouraging strategy to formulate a controlled drug delivery system by incorporating microemulsions into mucoadhesive wafers.

The influence of silicon wafer thickness on characteristics of multijunction solar cells with vertical p—n-junctions

Directory of Open Access Journals (Sweden)

Gnilenko A. B.

2012-02-01

Full Text Available A multijunction silicon solar cell with vertical p–n junctions consisted of four serial n+–p–p+-structures was simulated using Silvaco TCAD software package. The dependence of solar cell characteristics on the silicon wafer thickness is investigated for a wide range of values.

Standard semiconductor packaging for high-reliability low-cost MEMS applications

Science.gov (United States)

Harney, Kieran P.

2005-01-01

Microelectronic packaging technology has evolved over the years in response to the needs of IC technology. The fundamental purpose of the package is to provide protection for the silicon chip and to provide electrical connection to the circuit board. Major change has been witnessed in packaging and today wafer level packaging technology has further revolutionized the industry. MEMS (Micro Electro Mechanical Systems) technology has created new challenges for packaging that do not exist in standard ICs. However, the fundamental objective of MEMS packaging is the same as traditional ICs, the low cost and reliable presentation of the MEMS chip to the next level interconnect. Inertial MEMS is one of the best examples of the successful commercialization of MEMS technology. The adoption of MEMS accelerometers for automotive airbag applications has created a high volume market that demands the highest reliability at low cost. The suppliers to these markets have responded by exploiting standard semiconductor packaging infrastructures. However, there are special packaging needs for MEMS that cannot be ignored. New applications for inertial MEMS devices are emerging in the consumer space that adds the imperative of small size to the need for reliability and low cost. These trends are not unique to MEMS accelerometers. For any MEMS technology to be successful the packaging must provide the basic reliability and interconnection functions, adding the least possible cost to the product. This paper will discuss the evolution of MEMS packaging in the accelerometer industry and identify the main issues that needed to be addressed to enable the successful commercialization of the technology in the automotive and consumer markets.

Study of Si wafer surfaces irradiated by gas cluster ion beams

International Nuclear Information System (INIS)

Isogai, H.; Toyoda, E.; Senda, T.; Izunome, K.; Kashima, K.; Toyoda, N.; Yamada, I.

2007-01-01

The surface structures of Si (1 0 0) wafers subjected to gas cluster ion beam (GCIB) irradiation have been analyzed by cross-sectional transmission electron microscopy (XTEM) and atomic force microscopy (AFM). GCIB irradiation is a promising technique for both precise surface etching and planarization of Si wafers. However, it is very important to understand the crystalline structure of Si wafers after GCIB irradiation. An Ar-GCIB used for the physically sputtering of Si atoms and a SF 6 -GCIB used for the chemical etching of the Si surface are also analyzed. The GCIB irradiation increases the surface roughness of the wafers, and amorphous Si layers are formed on the wafer surface. However, when the Si wafers are annealed in hydrogen at a high temperature after the GCIB irradiation, the surface roughness decreases to the same level as that before the irradiation. Moreover, the amorphous Si layers disappear completely

High throughput batch wafer handler for 100 to 200 mm wafers

International Nuclear Information System (INIS)

Rathmell, R.D.; Raatz, J.E.; Becker, B.L.; Kitchen, R.L.; Luck, T.R.; Decker, J.H.

1989-01-01

A new batch processing end station for ion implantation has been developed for wafers of 100 to 200 mm diameter. It usilizes a spinning disk with clampless wafer support. All wafer transport is done with backside handling and is carried out in vacuum. This end station incorporates a new dose control scheme which is able to monitor the incident particle current independently of the charge state of the ions. This technique prevents errors which may be caused by charge exchange between the beam and residual gas. The design and features of this system will be reviewed and the performance to date will be presented. (orig.)

A 45° saw-dicing process applied to a glass substrate for wafer-level optical splitter fabrication for optical coherence tomography

Science.gov (United States)

Maciel, M. J.; Costa, C. G.; Silva, M. F.; Gonçalves, S. B.; Peixoto, A. C.; Ribeiro, A. Fernando; Wolffenbuttel, R. F.; Correia, J. H.

2016-08-01

This paper reports on the development of a technology for the wafer-level fabrication of an optical Michelson interferometer, which is an essential component in a micro opto-electromechanical system (MOEMS) for a miniaturized optical coherence tomography (OCT) system. The MOEMS consists on a titanium dioxide/silicon dioxide dielectric beam splitter and chromium/gold micro-mirrors. These optical components are deposited on 45° tilted surfaces to allow the horizontal/vertical separation of the incident beam in the final micro-integrated system. The fabrication process consists of 45° saw dicing of a glass substrate and the subsequent deposition of dielectric multilayers and metal layers. The 45° saw dicing is fully characterized in this paper, which also includes an analysis of the roughness. The optimum process results in surfaces with a roughness of 19.76 nm (rms). The actual saw dicing process for a high-quality final surface results as a compromise between the dicing blade’s grit size (#1200) and the cutting speed (0.3 mm s-1). The proposed wafer-level fabrication allows rapid and low-cost processing, high compactness and the possibility of wafer-level alignment/assembly with other optical micro components for OCT integrated imaging.

320 x 240 uncooled IRFPA with pixel wise thin film vacuum packaging

Science.gov (United States)

Yon, J.-J.; Dumont, G.; Rabaud, W.; Becker, S.; Carle, L.; Goudon, V.; Vialle, C.; Hamelin, A.; Arnaud, A.

2012-10-01

Silicon based vacuum packaging is a key enabling technology for achieving affordable uncooled Infrared Focal Plane Arrays (IRFPA) as required by the promising mass market for very low cost IR applications, such as automotive driving assistance, energy loss monitoring in buildings, motion sensors… Among the various approaches studied worldwide, the CEA, LETI is developing a unique technology where each bolometer pixel is sealed under vacuum at the wafer level, using an IR transparent thin film deposition. This technology referred to as PLP (Pixel Level Packaging), leads to an array of hermetic micro-caps each containing a single microbolometer. Since the successful demonstration that the PLP technology, when applied on a single microbolometer pixel, can provide the required vacuum noise and NETD distributions, the paper also puts emphasis on additional key features such as thermal time constant, image quality, and ageing properties.

The development of MEMS device packaging technology using proton beam

International Nuclear Information System (INIS)

Hyeon, J. W.; Kong, Y. J.; Kim, E. H.; Kim, H. S.; No, S. J.

2006-05-01

Wafer-bonding techniques are key issues for the commercialization of MEMS(MicroElectroMechanical Systems) devices. The anodic bonding method and the wafer direct-bonding method are well-known major techniques for wafer bonding. Due to the anodic bonding method includes high voltage processes above 1.5 kV, the MEMS devices can be damaged during the bonding process or malfunctioned while long-term operation. On the other hand, since the wafer direct-bonding method includes a high temperature processes above 1000 .deg. C, temperature-sensitive materials and integrated circuits will be damaged or degraded during the bonding processes. Therefore, high-temperature bonding processes are not applicable for fabricating or packaging devices where temperature-sensitive materials exist. During the past few years, much effort has been undertaken to find a reliable bonding process that can be conducted at a low temperature. Unfortunately, these new bonding processes depend highly on the bonding material, surface treatment and surface flatness. In this research, a new packaging method using proton beam irradiation is proposed. While the energy loss caused in an irradiated material by X-rays or electron beams decreases with the surface distance, the energy loss caused by proton beams has a maximum value at the Bragg peak. Thus, the localized energy produced at the Bragg peak of the proton beams can be used to bond pyrex glass on a silicon wafer, so the MEMS damage is expected to be minimized. The localized heating caused by as well as the penetration depth, or the proton beam has been investigated. The energy absorbed in a stack of pyrex glass/silicon wafers due to proton-beam irradiation was numerically calculated for various proton energies by using the SRIM program. The energy loss was shown to be sufficiently localized at the interface between the pyrex glass and the silicon wafer. Proton beam irradiation was performed in the common environment of room temperature and

Propagation of resist heating mask error to wafer level

Science.gov (United States)

Babin, S. V.; Karklin, Linard

2006-10-01

As technology is approaching 45 nm and below the IC industry is experiencing a severe product yield hit due to rapidly shrinking process windows and unavoidable manufacturing process variations. Current EDA tools are unable by their nature to deliver optimized and process-centered designs that call for 'post design' localized layout optimization DFM tools. To evaluate the impact of different manufacturing process variations on final product it is important to trace and evaluate all errors through design to manufacturing flow. Photo mask is one of the critical parts of this flow, and special attention should be paid to photo mask manufacturing process and especially to mask tight CD control. Electron beam lithography (EBL) is a major technique which is used for fabrication of high-end photo masks. During the writing process, resist heating is one of the sources for mask CD variations. Electron energy is released in the mask body mainly as heat, leading to significant temperature fluctuations in local areas. The temperature fluctuations cause changes in resist sensitivity, which in turn leads to CD variations. These CD variations depend on mask writing speed, order of exposure, pattern density and its distribution. Recent measurements revealed up to 45 nm CD variation on the mask when using ZEP resist. The resist heating problem with CAR resists is significantly smaller compared to other types of resists. This is partially due to higher resist sensitivity and the lower exposure dose required. However, there is no data yet showing CD errors on the wafer induced by CAR resist heating on the mask. This effect can be amplified by high MEEF values and should be carefully evaluated at 45nm and below technology nodes where tight CD control is required. In this paper, we simulated CD variation on the mask due to resist heating; then a mask pattern with the heating error was transferred onto the wafer. So, a CD error on the wafer was evaluated subject to only one term of the

Water saving in IC wafer washing process; IC wafer senjo deno sessui taisaku

Energy Technology Data Exchange (ETDEWEB)

Harada, H. [Mitsubishi Corp., Tokyo (Japan); Araki, M.; Nakazawa, T.

1997-11-30

This paper reports features of a wafer washing technology, a new IC wafer washing process, its pure water saving effect, and a `QC washing` which has pure water saving effect in the wafer washing. Wafer washing processes generally include the SC1 process (using ammonia + hydrogen peroxide aqueous solution) purposed for removing contamination due to ultrafine particles, the SC2 process (using hydrochloric acid + hydrogen peroxide aqueous solution) purposed for removing contamination due to heavy metals, the piranha washing process (using hot sulfuric acid + hydrogen peroxide aqueous solution) purposed for removing contamination due to organic matters, and the DHF (using dilute hydrofluoric acid) purposed for removing natural oxide films. Natural oxide films are now remained as surface protection films, by which surface contamination has been reduced remarkably. A high-temperature washing chemical circulating and filtering technology developed in Japan has brought about a reform in wafer washing processes having been used previously. Spin washing is used as a water saving measure, in which washing chemicals or pure water are sprayed onto one each of wafers which is spin-rotated, allowing washing and rinsing to be made with small amount of washing chemicals and pure water. The QC washing is a method to replace tank interior with pure was as quick as possible in order to increase the rinsing effect. 7 refs., 5 figs.

A wafer mapping technique for residual stress in surface micromachined films

International Nuclear Information System (INIS)

Schiavone, G; Murray, J; Smith, S; Walton, A J; Desmulliez, M P Y; Mount, A R

2016-01-01

The design of MEMS devices employing movable structures is crucially dependant on the mechanical behaviour of the deposited materials. It is therefore important to be able to fully characterize the micromachined films and predict with confidence the mechanical properties of patterned structures. This paper presents a characterization technique that enables the residual stress in MEMS films to be mapped at the wafer level by using microstructures released by surface micromachining. These dedicated MEMS test structures and the associated measurement techniques are used to extract localized information on the strain and Young’s modulus of the film under investigation. The residual stress is then determined by numerically coupling this data with a finite element analysis of the structure. This paper illustrates the measurement routine and demonstrates it with a case study using electrochemically deposited alloys of nickel and iron, particularly prone to develop high levels of residual stress. The results show that the technique enables wafer mapping of film non-uniformities and identifies wafer-to-wafer differences. A comparison between the results obtained from the mapping technique and conventional wafer bow measurements highlights the benefits of using a procedure tailored to films that are non-uniform, patterned and surface-micromachined, as opposed to simple standard stress extraction methods. The presented technique reveals detailed information that is generally unexplored when using conventional stress extraction methods such as wafer bow measurements. (paper)

X-ray analytics for 450-mm wafer; Roentgenanalytik fuer 450-mm-Wafer

Energy Technology Data Exchange (ETDEWEB)

Anon.

2014-09-15

The introduction of the 450-mm technology in the wafer fabrication and the further reduction of critical dimensions requires improved X-ray analysis methods. Therefor the PTB has concipated a metrology chamber for the characterization of 450-mm wafers, the crucial element of which is a multi-axis patent-pending manipulator.

Molded, wafer level optics for long wave infra-red applications

Science.gov (United States)

Franks, John

2016-05-01

For many years, the Thermal Imaging market has been driven by the high volume consumer market. The first signs of this came with the launch of night vision systems for cars, first by Cadillac and Honda and then, more successfully by BMW, Daimler and Audi. For the first time, simple thermal imaging systems were being manufactured at the rate of more than 10,000 units a year. This step change in volumes enabled a step change in system costs, with thermal imaging moving into the consumer's price range. Today we see that the consumer awareness and the consumer market continues to increase with the launch of a number of consumer focused smart phone add-ons. This has brought a further step change in system costs, with the possibility to turn your mobile phone into a thermal imager for under $250. As the detector technology has matured, the pixel pitches have dropped from 50μm in 2002 to 12 μm or even 10μm in today's detectors. This dramatic shrinkage in size has had an equally dramatic effect on the optics required to produce the image on the detector. A moderate field of view that would have required a focal length of 40mm in 2002 now requires a focal length of 8mm. For wide field of view applications and small detector formats, focal lengths in the range 1mm to 5mm are becoming common. For lenses, the quantity manufactured, quality and costs will require a new approach to high volume Infra-Red (IR) manufacturing to meet customer expectations. This, taken with the SwaP-C requirements and the emerging requirement for very small lenses driven by the new detectors, suggests that wafer scale optics are part of the solution. Umicore can now present initial results from an intensive research and development program to mold and coat wafer level optics, using its chalcogenide glass, GASIR®.

Wafer scale oblique angle plasma etching

Science.gov (United States)

Burckel, David Bruce; Jarecki, Jr., Robert L.; Finnegan, Patrick Sean

2017-05-23

Wafer scale oblique angle etching of a semiconductor substrate is performed in a conventional plasma etch chamber by using a fixture that supports a multiple number of separate Faraday cages. Each cage is formed to include an angled grid surface and is positioned such that it will be positioned over a separate one of the die locations on the wafer surface when the fixture is placed over the wafer. The presence of the Faraday cages influences the local electric field surrounding each wafer die, re-shaping the local field to be disposed in alignment with the angled grid surface. The re-shaped plasma causes the reactive ions to follow a linear trajectory through the plasma sheath and angled grid surface, ultimately impinging the wafer surface at an angle. The selected geometry of the Faraday cage angled grid surface thus determines the angle at with the reactive ions will impinge the wafer.

Laser wafering for silicon solar

International Nuclear Information System (INIS)

Friedmann, Thomas Aquinas; Sweatt, William C.; Jared, Bradley Howell

2011-01-01

Current technology cuts solar Si wafers by a wire saw process, resulting in 50% 'kerf' loss when machining silicon from a boule or brick into a wafer. We want to develop a kerf-free laser wafering technology that promises to eliminate such wasteful wire saw processes and achieve up to a ten-fold decrease in the g/W p (grams/peak watt) polysilicon usage from the starting polysilicon material. Compared to today's technology, this will also reduce costs (∼20%), embodied energy, and green-house gas GHG emissions (∼50%). We will use short pulse laser illumination sharply focused by a solid immersion lens to produce subsurface damage in silicon such that wafers can be mechanically cleaved from a boule or brick. For this concept to succeed, we will need to develop optics, lasers, cleaving, and high throughput processing technologies capable of producing wafers with thicknesses < 50 (micro)m with high throughput (< 10 sec./wafer). Wafer thickness scaling is the 'Moore's Law' of silicon solar. Our concept will allow solar manufacturers to skip entire generations of scaling and achieve grid parity with commercial electricity rates. Yet, this idea is largely untested and a simple demonstration is needed to provide credibility for a larger scale research and development program. The purpose of this project is to lay the groundwork to demonstrate the feasibility of laser wafering. First, to design and procure on optic train suitable for producing subsurface damage in silicon with the required damage and stress profile to promote lateral cleavage of silicon. Second, to use an existing laser to produce subsurface damage in silicon, and third, to characterize the damage using scanning electron microscopy and confocal Raman spectroscopy mapping.

Laser wafering for silicon solar.

Energy Technology Data Exchange (ETDEWEB)

Friedmann, Thomas Aquinas; Sweatt, William C.; Jared, Bradley Howell

2011-03-01

Current technology cuts solar Si wafers by a wire saw process, resulting in 50% 'kerf' loss when machining silicon from a boule or brick into a wafer. We want to develop a kerf-free laser wafering technology that promises to eliminate such wasteful wire saw processes and achieve up to a ten-fold decrease in the g/W{sub p} (grams/peak watt) polysilicon usage from the starting polysilicon material. Compared to today's technology, this will also reduce costs ({approx}20%), embodied energy, and green-house gas GHG emissions ({approx}50%). We will use short pulse laser illumination sharply focused by a solid immersion lens to produce subsurface damage in silicon such that wafers can be mechanically cleaved from a boule or brick. For this concept to succeed, we will need to develop optics, lasers, cleaving, and high throughput processing technologies capable of producing wafers with thicknesses < 50 {micro}m with high throughput (< 10 sec./wafer). Wafer thickness scaling is the 'Moore's Law' of silicon solar. Our concept will allow solar manufacturers to skip entire generations of scaling and achieve grid parity with commercial electricity rates. Yet, this idea is largely untested and a simple demonstration is needed to provide credibility for a larger scale research and development program. The purpose of this project is to lay the groundwork to demonstrate the feasibility of laser wafering. First, to design and procure on optic train suitable for producing subsurface damage in silicon with the required damage and stress profile to promote lateral cleavage of silicon. Second, to use an existing laser to produce subsurface damage in silicon, and third, to characterize the damage using scanning electron microscopy and confocal Raman spectroscopy mapping.

The packaging and transport of low and intermediate level radioactive wastes

International Nuclear Information System (INIS)

Grover, J.R.; Price, M.S.T.

1985-01-01

Up to the present time, the majority of the radioactive waste which has been transported in the United Kingdom has been low level waste for disposal in the trenches of the shallow burial site operated by British Nuclear Fuels plc at Drigg and also the packaged waste destined for sea disposal in the annual operation. However, the main bulk of the low and intermediate level wastes which have been generated over the last quarter century remain in store at the various nuclear sites where it originated. Before significant packaging and transport of intermediate level wastes takes place it is desirable to examine the sources and types of wastes, the immobilisation and packaging processes and plants, the transport, and the problems of handling of packages at future land repositories. Optimisation of the packaging and transport must take account of both the upstream and downstream con=straints as well as the implications of complying with both the IAEA Transport Regulations and radiological protection guidelines. Packages for sea disposal must in addition comply with the requirements of the London Dumping Convention and the NEA guidelines. (author)

Carbon dioxide capture using resin-wafer electrodeionization

Science.gov (United States)

Lin, YuPo J.; Snyder, Seth W.; Trachtenberg, Michael S.; Cowan, Robert M.; Datta, Saurav

2015-09-08

The present invention provides a resin-wafer electrodeionization (RW-EDI) apparatus including cathode and anode electrodes separated by a plurality of porous solid ion exchange resin wafers, which when in use are filled with an aqueous fluid. The apparatus includes one or more wafers comprising a basic ion exchange medium, and preferably includes one or more wafers comprising an acidic ion exchange medium. The wafers are separated from one another by ion exchange membranes. The fluid within the acidic and/or basic ion exchange wafers preferably includes, or is in contact with, a carbonic anhydrase (CA) enzyme to facilitate conversion of bicarbonate ion to carbon dioxide within the acidic medium. A pH suitable for exchange of CO.sub.2 is electrochemically maintained within the basic and acidic ion exchange wafers by applying an electric potential across the cathode and anode.

Single-mode glass waveguide technology for optical interchip communication on board level

Science.gov (United States)

Brusberg, Lars; Neitz, Marcel; Schröder, Henning

2012-01-01

The large bandwidth demand in long-distance telecom networks lead to single-mode fiber interconnects as result of low dispersion, low loss and dense wavelength multiplexing possibilities. In contrast, multi-mode interconnects are suitable for much shorter lengths up to 300 meters and are promising for optical links between racks and on board level. Active optical cables based on multi-mode fiber links are at the market and research in multi-mode waveguide integration on board level is still going on. Compared to multi-mode, a single-mode waveguide has much more integration potential because of core diameters of around 20% of a multi-mode waveguide by a much larger bandwidth. But light coupling in single-mode waveguides is much more challenging because of lower coupling tolerances. Together with the silicon photonics technology, a single-mode waveguide technology on board-level will be the straight forward development goal for chip-to-chip optical interconnects integration. Such a hybrid packaging platform providing 3D optical single-mode links bridges the gap between novel photonic integrated circuits and the glass fiber based long-distance telecom networks. Following we introduce our 3D photonic packaging approach based on thin glass substrates with planar integrated optical single-mode waveguides for fiber-to-chip and chip-to-chip interconnects. This novel packaging approach merges micro-system packaging and glass integrated optics. It consists of a thin glass substrate with planar integrated singlemode waveguide circuits, optical mirrors and lenses providing an integration platform for photonic IC assembly and optical fiber interconnect. Thin glass is commercially available in panel and wafer formats and characterizes excellent optical and high-frequency properties. That makes it perfect for microsystem packaging. The paper presents recent results in single-mode waveguide technology on wafer level and waveguide characterization. Furthermore the integration in a

Methane production using resin-wafer electrodeionization

Science.gov (United States)

Snyder, Seth W; Lin, YuPo; Urgun-Demirtas, Meltem

2014-03-25

The present invention provides an efficient method for creating natural gas including the anaerobic digestion of biomass to form biogas, and the electrodeionization of biogas to form natural gas and carbon dioxide using a resin-wafer deionization (RW-EDI) system. The method may be further modified to include a wastewater treatment system and can include a chemical conditioning/dewatering system after the anaerobic digestion system. The RW-EDI system, which includes a cathode and an anode, can either comprise at least one pair of wafers, each a basic and acidic wafer, or at least one wafer comprising of a basic portion and an acidic portion. A final embodiment of the RW-EDI system can include only one basic wafer for creating natural gas.

Self-aligned 0-level sealing of MEMS devices by a two layer thin film reflow process

NARCIS (Netherlands)

Rusu, C.R.; Jansen, Henricus V.; Gunn, R.; Witvrouw, A.

2004-01-01

Many micro electromechanical systems (MEMS) require a vacuum or controlled atmosphere encapsulation in order to ensure either a good performance or an acceptable lifetime of operation. Two approaches for waferscale zero-level packaging exist. The most popular approach is based on wafer bonding.

Design for Reliability of Wafer Level MEMS packaging

NARCIS (Netherlands)

Zaal, J.J.M.

2012-01-01

The world has seen an unrivaled spread of semiconductor technology into virtually any part of society. The main enablers of this semiconductor rush are the decreasing feature size and the constantly decreasing costs of semiconductors. The decreasing costs of semiconductors in general are caused by

Off-line wafer level reliability control: unique measurement method to monitor the lifetime indicator of gate oxide validated within bipolar/CMOS/DMOS technology

Science.gov (United States)

Gagnard, Xavier; Bonnaud, Olivier

2000-08-01

We have recently published a paper on a new rapid method for the determination of the lifetime of the gate oxide involved in a Bipolar/CMOS/DMOS technology (BCD). Because this previous method was based on a current measurement with gate voltage as a parameter needing several stress voltages, it was applied only by lot sampling. Thus, we tried to find an indicator in order to monitor the gate oxide lifetime during the wafer level parametric test and involving only one measurement of the device on each wafer test cell. Using the Weibull law and Crook model, combined with our recent model, we have developed a new test method needing only one electrical measurement of MOS capacitor to monitor the quality of the gate oxide. Based also on a current measurement, the parameter is the lifetime indicator of the gate oxide. From the analysis of several wafers, we gave evidence of the possibility to detect a low performance wafer, which corresponds to the infantile failure on the Weibull plot. In order to insert this new method in the BCD parametric program, a parametric flowchart was established. This type of measurement is an important challenges, because the actual measurements, breakdown charge, Qbd, and breakdown electric field, Ebd, at parametric level and Ebd and interface states density, Dit during the process cannot guarantee the gate oxide lifetime all along fabrication process. This indicator measurement is the only one, which predicts the lifetime decrease.

Packaged integrated opto-fluidic solution for harmful fluid analysis

Science.gov (United States)

Allenet, T.; Bucci, D.; Geoffray, F.; Canto, F.; Couston, L.; Jardinier, E.; Broquin, J.-E.

2016-02-01

Advances in nuclear fuel reprocessing have led to a surging need for novel chemical analysis tools. In this paper, we present a packaged lab-on-chip approach with co-integration of optical and micro-fluidic functions on a glass substrate as a solution. A chip was built and packaged to obtain light/fluid interaction in order for the entire device to make spectral measurements using the photo spectroscopy absorption principle. The interaction between the analyte solution and light takes place at the boundary between a waveguide and a fluid micro-channel thanks to the evanescent part of the waveguide's guided mode that propagates into the fluid. The waveguide was obtained via ion exchange on a glass wafer. The input and the output of the waveguides were pigtailed with standard single mode optical fibers. The micro-scale fluid channel was elaborated with a lithography procedure and hydrofluoric acid wet etching resulting in a 150+/-8 μm deep channel. The channel was designed with fluidic accesses, in order for the chip to be compatible with commercial fluidic interfaces/chip mounts. This allows for analyte fluid in external capillaries to be pumped into the device through micro-pipes, hence resulting in a fully packaged chip. In order to produce this co-integrated structure, two substrates were bonded. A study of direct glass wafer-to-wafer molecular bonding was carried-out to improve detector sturdiness and durability and put forward a bonding protocol with a bonding surface energy of γ>2.0 J.m-2. Detector viability was shown by obtaining optical mode measurements and detecting traces of 1.2 M neodymium (Nd) solute in 12+/-1 μL of 0.01 M and pH 2 nitric acid (HNO3) solvent by obtaining an absorption peak specific to neodymium at 795 nm.

Wafer-scale integrated micro-supercapacitors on an ultrathin and highly flexible biomedical platform.

Science.gov (United States)

Maeng, Jimin; Meng, Chuizhou; Irazoqui, Pedro P

2015-02-01

We present wafer-scale integrated micro-supercapacitors on an ultrathin and highly flexible parylene platform, as progress toward sustainably powering biomedical microsystems suitable for implantable and wearable applications. All-solid-state, low-profile (supercapacitors are formed on an ultrathin (~20 μm) freestanding parylene film by a wafer-scale parylene packaging process in combination with a polyaniline (PANI) nanowire growth technique assisted by surface plasma treatment. These micro-supercapacitors are highly flexible and shown to be resilient toward flexural stress. Further, direct integration of micro-supercapacitors into a radio frequency (RF) rectifying circuit is achieved on a single parylene platform, yielding a complete RF energy harvesting microsystem. The system discharging rate is shown to improve by ~17 times in the presence of the integrated micro-supercapacitors. This result suggests that the integrated micro-supercapacitor technology described herein is a promising strategy for sustainably powering biomedical microsystems dedicated to implantable and wearable applications.

Temperature Dependent Electrical Properties of PZT Wafer

Science.gov (United States)

Basu, T.; Sen, S.; Seal, A.; Sen, A.

2016-04-01

The electrical and electromechanical properties of lead zirconate titanate (PZT) wafers were investigated and compared with PZT bulk. PZT wafers were prepared by tape casting technique. The transition temperature of both the PZT forms remained the same. The transition from an asymmetric to a symmetric shape was observed for PZT wafers at higher temperature. The piezoelectric coefficient (d 33) values obtained were 560 pc/N and 234 pc/N, and the electromechanical coupling coefficient (k p) values were 0.68 and 0.49 for bulk and wafer, respectively. The reduction in polarization after fatigue was only ~3% in case of PZT bulk and ~7% for PZT wafer.

Residual stress in silicon wafer using IR polariscope

Science.gov (United States)

Lu, Zhijia; Wang, Pin; Asundi, Anand

2008-09-01

The infrared phase shift polariscope (IR-PSP) is a full-field optical technique for stress analysis in Silicon wafers. Phase shift polariscope is preferred to a conventional polariscope, as it can provide quantitative information of the normal stress difference and the shear stress in the specimen. The method is based on the principles of photoelasticity, in which stresses induces temporary birefringence in materials which can be quantitatively analyzed using a phase shift polariscope. Compared to other stress analysis techniques such as x-ray diffraction or laser scanning, infrared photoelastic stress analysis provides full-field information with high resolution and in near real time. As the semiconductor fabrication is advancing, larger wafers, thinner films and more compact packages are being manufactured. This results in a growing demand of process control. Residual stress exist in silicon during semiconductor fabrication and these stresses may make cell processing difficult or even cause the failure of the silicon. Reducing these stresses would improve manufacturability and reliability. Therefore stress analysis is essential to trace the root cause of the stresses. The polariscope images are processed using MATLAB and four-step phase shifting method to provide quantitative as well as qualitative information regarding the residual stress of the sample. The system is calibrated using four-point bend specimen and then the residual stress distribution in a MEMS sample is shown.

Porous solid ion exchange wafer for immobilizing biomolecules

Science.gov (United States)

Arora, Michelle B.; Hestekin, Jamie A.; Lin, YuPo J.; St. Martin, Edward J.; Snyder, Seth W.

2007-12-11

A porous solid ion exchange wafer having a combination of a biomolecule capture-resin and an ion-exchange resin forming a charged capture resin within said wafer. Also disclosed is a porous solid ion exchange wafer having a combination of a biomolecule capture-resin and an ion-exchange resin forming a charged capture resin within said wafer containing a biomolecule with a tag. A separate bioreactor is also disclosed incorporating the wafer described above.

Wafer bonding applications and technology

CERN Document Server

Gösele, Ulrich

2004-01-01

During the past decade direct wafer bonding has developed into a mature materials integration technology. This book presents state-of-the-art reviews of the most important applications of wafer bonding written by experts from industry and academia. The topics include bonding-based fabrication methods of silicon-on-insulator, photonic crystals, VCSELs, SiGe-based FETs, MEMS together with hybrid integration and laser lift-off. The non-specialist will learn about the basics of wafer bonding and its various application areas, while the researcher in the field will find up-to-date information about this fast-moving area, including relevant patent information.

Influence of Wafer Edge Geometry on Removal Rate Profile in Chemical Mechanical Polishing: Wafer Edge Roll-Off and Notch

Science.gov (United States)

Fukuda, Akira; Fukuda, Tetsuo; Fukunaga, Akira; Tsujimura, Manabu

2012-05-01

In the chemical mechanical polishing (CMP) process, uniform polishing up to near the wafer edge is essential to reduce edge exclusion and improve yield. In this study, we examine the influences of inherent wafer edge geometries, i.e., wafer edge roll-off and notch, on the CMP removal rate profile. We clarify the areas in which the removal rate profile is affected by the wafer edge roll-off and the notch, as well as the intensity of their effects on the removal rate profile. In addition, we propose the use of a small notch to reduce the influence of the wafer notch and present the results of an examination by finite element method (FEM) analysis.

P/N InP solar cells on Ge wafers

Science.gov (United States)

Wojtczuk, Steven; Vernon, Stanley; Burke, Edward A.

1994-01-01

Indium phosphide (InP) P-on-N one-sun solar cells were epitaxially grown using a metalorganic chemical vapor deposition process on germanium (Ge) wafers. The motivation for this work is to replace expensive InP wafers, which are fragile and must be thick and therefore heavy, with less expensive Ge wafers, which are stronger, allowing use of thinner, lighter weight wafers. An intermediate InxGs1-xP grading layer starting as In(0.49)Ga(0.51) at the GaAs-coated Ge wafer surface and ending as InP at the top of the grading layer (backside of the InP cell) was used to attempt to bend some of the threading dislocations generated by lattice-mismatch between the Ge wafer and InP cell so they would be harmlessly confined in this grading layer. The best InP/Ge cell was independently measured by NASA-Lewis with a one-sun 25 C AMO efficiently measured by NASA-Lewis with a one-circuit photocurrent 22.6 mA/sq cm. We believe this is the first published report of an InP cell grown on a Ge wafer. Why get excited over a 9 percent InP/Ge cell? If we look at the cell weight and efficiency, a 9 percent InP cell on an 8 mil Ge wafer has about the same cell power density, 118 W/kg (BOL), as the best InP cell ever made, a 19 percent InP cell on an 18 mil InP wafer, because of the lighter Ge wafer weight. As cell panel materials become lighter, the cell weight becomes more important, and the advantage of lightweight cells to the panel power density becomes more important. In addition, although InP/Ge cells have a low beginning-of-life (BOL) efficiency due to dislocation defects, the InP/Ge cells are very radiation hard (end-of-life power similar to beginning-of-life). We have irradiated an InP/Ge cell with alpha particles to an equivalent fluence of 1.6 x 10(exp 16) 1 MeV electrons/sq cm and the efficiency is still 83 percent of its BOL value. At this fluence level, the power output of these InP/Ge cells matches the GaAs/Ge cell data tabulated in the JPL handbook. Data are presented

High voltage photo switch package module

Science.gov (United States)

Sullivan, James S; Sanders, David M; Hawkins, Steven A; Sampayan, Stephen E

2014-02-18

A photo-conductive switch package module having a photo-conductive substrate or wafer with opposing electrode-interface surfaces, and at least one light-input surface. First metallic layers are formed on the electrode-interface surfaces, and one or more optical waveguides having input and output ends are bonded to the substrate so that the output end of each waveguide is bonded to a corresponding one of the light-input surfaces of the photo-conductive substrate. This forms a waveguide-substrate interface for coupling light into the photo-conductive wafer. A dielectric material such as epoxy is then used to encapsulate the photo-conductive substrate and optical waveguide so that only the metallic layers and the input end of the optical waveguide are exposed. Second metallic layers are then formed on the first metallic layers so that the waveguide-substrate interface is positioned under the second metallic layers.

Nonuniformities of electrical resistivity in undoped 6H-SiC wafers

International Nuclear Information System (INIS)

Li, Q.; Polyakov, A.Y.; Skowronski, M.; Sanchez, E.K.; Loboda, M.J.; Fanton, M.A.; Bogart, T.; Gamble, R.D.

2005-01-01

Chemical elemental analysis, temperature-dependent Hall measurements, deep-level transient spectroscopy, and contactless resistivity mapping were performed on undoped semi-insulating (SI) and lightly nitrogen-doped conducting 6H-SiC crystals grown by physical vapor transport (PVT). Resistivity maps of commercial semi-insulating SiC wafers revealed resistivity variations across the wafers between one and two orders of magnitude. Two major types of variations were identified. First is the U-shape distribution with low resistivity in the center and high in the periphery of the wafer. The second type had an inverted U-shape distribution. Secondary-ion-mass spectrometry measurements of the distribution of nitrogen concentration along the growth axis and across the wafers sliced from different locations of lightly nitrogen-doped 6H-SiC boules were conducted. The measured nitrogen concentration gradually decreased along the growth direction and from the center to the periphery of the wafers. This change gives rise to the U-like distribution of resistivity in wafers of undoped SI-SiC. The concentrations of deep electron traps exhibited similar dependence. Compensation of nitrogen donors by these traps can result in the inverted U-like distribution of resistivity. Possible reasons for the observed nonuniformities include formation of a (0001) facet in PVT growth coupled with orientation-dependent nitrogen incorporation, systematic changes of the gas phase composition, and increase of the deposition temperature during boule growth

Die singulation method and package formed thereby

Science.gov (United States)

Anderson, Robert C [Tucson, AZ; Shul, Randy J [Albuquerque, NM; Clews, Peggy J [Tijeras, NM; Baker, Michael S [Albuquerque, NM; De Boer, Maarten P [Albuquerque, NM

2012-08-07

A method is disclosed for singulating die from a substrate having a sacrificial layer and one or more device layers, with a retainer being formed in the device layer(s) and anchored to the substrate. Deep Reactive Ion Etching (DRIE) etching of a trench through the substrate from the bottom side defines a shape for each die. A handle wafer is then attached to the bottom side of the substrate, and the sacrificial layer is etched to singulate the die and to form a frame from the retainer and the substrate. The frame and handle wafer, which retain the singulated die in place, can be attached together with a clamp or a clip and to form a package for the singulated die. One or more stops can be formed from the device layer(s) to limit a sliding motion of the singulated die.

Low-cost silicon wafer dicing using a craft cutter

KAUST Repository

Fan, Yiqiang

2014-05-20

This paper reports a low-cost silicon wafer dicing technique using a commercial craft cutter. The 4-inch silicon wafers were scribed using a crafter cutter with a mounted diamond blade. The pre-programmed automated process can reach a minimum die feature of 3 mm by 3 mm. We performed this scribing process on the top polished surface of a silicon wafer; we also created a scribing method for the back-unpolished surface in order to protect the structures on the wafer during scribing. Compared with other wafer dicing methods, our proposed dicing technique is extremely low cost (lower than $1,000), and suitable for silicon wafer dicing in microelectromechanical or microfluidic fields, which usually have a relatively large die dimension. The proposed dicing technique is also usable for dicing multiple project wafers, a process where dies of different dimensions are diced on the same wafer.

Size of silicon strip sensor from 6 inch wafer (right) compared to that from a 4 inch wafer (left).

CERN Multimedia

Honma, Alan

1999-01-01

Silicon strip sensors made from 6 inch wafers will allow for much larger surface area coverage at a reduced cost per unit surface area. A prototype sensor of size 8cm x 11cm made by Hamamatsu from a 6 inch wafer is shown next to a traditional 6cm x 6cm sensor from a 4 inch wafer.

Package-friendly piezoresistive pressure sensors with on-chip integrated packaging-stress-suppressed suspension (PS3) technology

International Nuclear Information System (INIS)

Wang, Jiachou; Li, Xinxin

2013-01-01

An on-chip integrated packaging-stress-suppressed suspension (PS 3 ) technology for a packaging-stress-free pressure sensor is proposed and developed. With a MIS (microholes interetch and sealing) micromachining process implemented only from the front-side of a single-side polished (1 1 1) silicon wafer, a compact cantilever-shaped PS 3 is on-chip integrated surrounding a piezoresistive pressure-sensing structure to provide a packaging-process/substrate-friendly method for low-cost but high-performance sensor applications. With the MIS process, the chip size of the PS 3 -enclosed pressure sensor is as small as 0.8 mm × 0.8 mm. Compared with a normal pressure sensor without PS 3 (but with an identical pressure-sensing structure), the proposed pressure sensor has the same sensitivity of 0.046 mV kPa −1 (3.3 V) −1 . However, without using the thermal compensation technique, a temperature coefficient of offset of only 0.016% °C −1 FS is noted for the sensor with PS 3 , which is about 15 times better than that for the sensor without PS 3 . Featuring effective isolation and elimination of the influence from packaging stress, the PS 3 technique is promising to be widely used for packaging-friendly mechanical sensors. (paper)

Noncontact sheet resistance measurement technique for wafer inspection

Science.gov (United States)

Kempa, Krzysztof; Rommel, J. Martin; Litovsky, Roman; Becla, Peter; Lojek, Bohumil; Bryson, Frank; Blake, Julian

1995-12-01

A new technique, MICROTHERM, has been developed for noncontact sheet resistance measurements of semiconductor wafers. It is based on the application of microwave energy to the wafer, and simultaneous detection of the infrared radiation resulting from ohmic heating. The pattern of the emitted radiation corresponds to the sheet resistance distribution across the wafer. This method is nondestructive, noncontact, and allows for measurements of very small areas (several square microns) of the wafer.

Fabrication of CVD graphene-based devices via laser ablation for wafer-scale characterization

DEFF Research Database (Denmark)

Mackenzie, David; Buron, Jonas Christian Due; Whelan, Patrick Rebsdorf

2015-01-01

Selective laser ablation of a wafer-scale graphene film is shown to provide flexible, high speed (1 wafer/hour) device fabrication while avoiding the degradation of electrical properties associated with traditional lithographic methods. Picosecond laser pulses with single pulse peak fluences of 140......-effect mobility, doping level, on–off ratio, and conductance minimum before and after laser ablation fabrication....

Modeling the wafer temperature profile in a multiwafer LPCVD furnace

Energy Technology Data Exchange (ETDEWEB)

Badgwell, T.A. [Rice Univ., Houston, TX (United States). Dept. of Chemical Engineering; Trachtenberg, I.; Edgar, T.F. [Univ. of Texas, Austin, TX (United States). Dept. of Chemical Engineering

1994-01-01

A mathematical model has been developed to predict wafer temperatures within a hot-wall multiwafer low pressure chemical vapor deposition (LPCVD) reactor. The model predicts both axial (wafer-to-wafer) and radial (across-wafer) temperature profiles. Model predictions compare favorably with in situ wafer temperature measurements described in an earlier paper. Measured axial and radial temperature nonuniformities are explained in terms of radiative heat-transfer effects. A simulation study demonstrates how changes in the outer tube temperature profile and reactor geometry affect wafer temperatures. Reactor design changes which could improve the wafer temperature profile are discussed.

Conformal Thin Film Packaging for SiC Sensor Circuits in Harsh Environments

Science.gov (United States)

Scardelletti, Maximilian C.; Karnick, David A.; Ponchak, George E.; Zorman, Christian A.

2011-01-01

In this investigation sputtered silicon carbide annealed at 300 C for one hour is used as a conformal thin film package. A RF magnetron sputterer was used to deposit 500 nm silicon carbide films on gold metal structures on alumina wafers. To determine the reliability and resistance to immersion in harsh environments, samples were submerged in gold etchant for 24 hours, in BOE for 24 hours, and in an O2 plasma etch for one hour. The adhesion strength of the thin film was measured by a pull test before and after the chemical immersion, which indicated that the film has an adhesion strength better than 10(exp 8) N/m2; this is similar to the adhesion of the gold layer to the alumina wafer. MIM capacitors are used to determine the dielectric constant, which is dependent on the SiC anneal temperature. Finally, to demonstrate that the SiC, conformal, thin film may be used to package RF circuits and sensors, an LC resonator circuit was fabricated and tested with and without the conformal SiC thin film packaging. The results indicate that the SiC coating adds no appreciable degradation to the circuits RF performance. Index Terms Sputter, silicon carbide, MIM capacitors, LC resonators, gold etchants, BOE, O2 plasma

Qualification of multi-crystalline silicon wafers by optical imaging for industrial use

Energy Technology Data Exchange (ETDEWEB)

Janssen, G.J.M.; Van der Borg, N.J.C.M.; Manshanden, P.; De Bruijne, M.; Bende, E.E. [ECN Solar Energy, Petten (Netherlands)

2012-09-15

We have developed a method to qualify multi-crystalline silicon (mc-Si) wafers that are being used in a production process. An optical image of an etched wafer is made. This etching can be a standard industrial acid etching for mc-Si wafers as is commonly used for saw damage removal and simultaneous iso-texturing. Digital image processing is then applied to identify the number of dislocations and their distribution over the wafer. This information is used as input for a cell performance prediction model, where the performance is characterized by the open circuit voltage (Voc) or the efficiency. The model can include various levels of sophistication, i.e. from using an average density of dislocations to the full spatial resolution of the dislocations in a 2D simulation that includes also the metallization pattern on the cell. The predicted performance is then evaluated against pre-selected criteria. The possibility to apply this optical qualification method in an initial stage in the production enables early rejection of the wafers, further tailoring of the cell production process or identification of instabilities in the production process.

Thermal analysis of Yucca Mountain commercial high-level waste packages

International Nuclear Information System (INIS)

Altenhofen, M.K.; Eslinger, P.W.

1992-10-01

The thermal performance of commercial high-level waste packages was evaluated on a preliminary basis for the candidate Yucca Mountain repository site. The purpose of this study is to provide an estimate for waste package component temperatures as a function of isolation time in tuff. Several recommendations are made concerning the additional information and modeling needed to evaluate the thermal performance of the Yucca Mountain repository system

Friction mechanisms of silicon wafer and silicon wafer coated with diamond-like carbon film and two monolayers

International Nuclear Information System (INIS)

Singh, R. Arvind; Yoon, Eui Sung; Han, Hung Gu; Kong, Ho Sung

2006-01-01

The friction behaviour of Si-wafer, Diamond-Like Carbon (DLC) and two Self-Assembled Monolayers(SAMs) namely DiMethylDiChlorosilane (DMDC) and DiPhenyl-DiChlorosilane (DPDC) coated on Si-wafer was studied under loading conditions in milli-Newton (mN) range. Experiments were performed using a ball-on-flat type reciprocating micro-tribo tester. Glass balls with various radii 0.25 mm, 0.5 mm and 1 mm were used. The applied normal load was in the range of 1.5 mN to 4.8 mN. Results showed that the friction increased with the applied normal load in the case of all the test materials. It was also observed that friction was affected by the ball size. Friction increased with the increase in the ball size in the case of Si-wafer. The SAMs also showed a similar trend, but had lower values of friction than those of Si-wafer. Interestingly, for DLC it was observed that friction decreased with the increase in the ball size. This distinct difference in the behavior of friction in DLC was attributed to the difference in the operating mechanism. It was observed that Si-wafer and DLC exhibited wear, whereas wear was absent in the SAMs. Observations showed that solid-solid adhesion was dominant in Si-wafer, while plowing in DLC. The wear in these two materials significantly influenced their friction. In the case of SAMs their friction behaviour was largely influenced by the nature of their molecular chains

Surface etching technologies for monocrystalline silicon wafer solar cells

Science.gov (United States)

Tang, Muzhi

With more than 200 GW of accumulated installations in 2015, photovoltaics (PV) has become an important green energy harvesting method. The PV market is dominated by solar cells made from crystalline silicon wafers. The engineering of the wafer surfaces is critical to the solar cell cost reduction and performance enhancement. Therefore, this thesis focuses on the development of surface etching technologies for monocrystalline silicon wafer solar cells. It aims to develop a more efficient alkaline texturing method and more effective surface cleaning processes. Firstly, a rapid, isopropanol alcohol free texturing method is successfully demonstrated to shorten the process time and reduce the consumption of chemicals. This method utilizes the special chemical properties of triethylamine, which can form Si-N bonds with wafer surface atoms. Secondly, a room-temperature anisotropic emitter etch-back process is developed to improve the n+ emitter passivation. Using this method, 19.0% efficient screen-printed aluminium back surface field solar cells are developed that show an efficiency gain of 0.15% (absolute) compared with conventionally made solar cells. Finally, state-of-the-art silicon surface passivation results are achieved using hydrogen plasma etching as a dry alternative to the classical hydrofluoric acid wet-chemical process. The effective native oxide removal and the hydrogenation of the silicon surface are shown to be the reasons for the excellent level of surface passivation achieved with this novel method.

On the design and implementation of a wafer yield editor

NARCIS (Netherlands)

Pineda de Gyvez, J.; Jess, J.A.G.

1989-01-01

An interactive environment is presented for the analysis of yield information required on modern integrated circuit manufacturing lines. The system estimates wafer yields and wafer-yield variations, quantifies regional yield variations within wafers, identifies clusters in wafers and/or in lots, and

Demonstration tests for low level radioactive waste packaging safety

International Nuclear Information System (INIS)

Nagano, I.; Shimura, S.; Miki, T.; Tamamura, T.; Kunitomi, K.

1993-01-01

The transport packaging for low level radioactive waste (so-called the LLW packaging) has been developed to be utilized for transportation of LLW in 200 liter-drums from Japanese nuclear power stations to the LLW Disposal Center at Rokkashomura in Aomori Prefecture. Transportation is expected to start from December in 1992. We will explain the brief history of the development, technical features and specifications as well as two kinds of safety demonstration tests, namely one is '1.2 meter free drop test' and the other is 'ISO container standard test'. (J.P.N.)

Wafer-scale fabrication of uniform Si nanowire arrays using the Si wafer with UV/Ozone pretreatment

International Nuclear Information System (INIS)

Bai, Fan; Li, Meicheng; Huang, Rui; Yu, Yue; Gu, Tiansheng; Chen, Zhao; Fan, Huiyang; Jiang, Bing

2013-01-01

The electroless etching technique combined with the process of UV/Ozone pretreatment is presented for wafer-scale fabrication of the silicon nanowire (SiNW) arrays. The high-level uniformity of the SiNW arrays is estimated by the value below 0.2 of the relative standard deviation of the reflection spectra on the 4-in. wafer. Influence of the UV/Ozone pretreatment on the formation of SiNW arrays is investigated. It is seen that a very thin SiO 2 produced by the UV/Ozone pretreatment improves the uniform nucleation of Ag nanoparticles (NPs) on the Si surface because of the effective surface passivation. Meanwhile, the SiO 2 located among the adjacent Ag NPs can obstruct the assimilation growth of Ag NPs, facilitating the deposition of the uniform and dense Ag NPs catalysts, which induces the formation of the SiNW arrays with good uniformity and high filling ratio. Furthermore, the remarkable antireflective and hydrophobic properties are observed for the SiNW arrays which display great potential in self-cleaning antireflection applications

Assessment of microelectronics packaging for high temperature, high reliability applications

Energy Technology Data Exchange (ETDEWEB)

Uribe, F.

1997-04-01

This report details characterization and development activities in electronic packaging for high temperature applications. This project was conducted through a Department of Energy sponsored Cooperative Research and Development Agreement between Sandia National Laboratories and General Motors. Even though the target application of this collaborative effort is an automotive electronic throttle control system which would be located in the engine compartment, results of this work are directly applicable to Sandia`s national security mission. The component count associated with the throttle control dictates the use of high density packaging not offered by conventional surface mount. An enabling packaging technology was selected and thermal models defined which characterized the thermal and mechanical response of the throttle control module. These models were used to optimize thick film multichip module design, characterize the thermal signatures of the electronic components inside the module, and to determine the temperature field and resulting thermal stresses under conditions that may be encountered during the operational life of the throttle control module. Because the need to use unpackaged devices limits the level of testing that can be performed either at the wafer level or as individual dice, an approach to assure a high level of reliability of the unpackaged components was formulated. Component assembly and interconnect technologies were also evaluated and characterized for high temperature applications. Electrical, mechanical and chemical characterizations of enabling die and component attach technologies were performed. Additionally, studies were conducted to assess the performance and reliability of gold and aluminum wire bonding to thick film conductor inks. Kinetic models were developed and validated to estimate wire bond reliability.

11.72-sq cm Active-Area Wafer Interconnected PiN Diode Pulsed at 64 kA Dissipates 382 J and Exhibits an Action of 1.7 MA(sup 2)-s

Science.gov (United States)

2012-01-30

calculated action exceeded 1.7 MA2 -s. Preliminary efforts on high voltage diode interconnection have produced quarter wafer interconnected PiN...was packaged in a “hockey-puck” configuration and pulsed to 64 kA, dissipating 382 J with a calculated action exceeding 1.7 MA2 -s. II. FULL...epitaxial layers are utilized. 11.72-cm2 Active-area Wafer Interconnected PiN Diode pulsed at 64 kA dissipates 382 J and exhibits an action of 1.7 MA2 -s

Optical cavity furnace for semiconductor wafer processing

Science.gov (United States)

Sopori, Bhushan L.

2014-08-05

An optical cavity furnace 10 having multiple optical energy sources 12 associated with an optical cavity 18 of the furnace. The multiple optical energy sources 12 may be lamps or other devices suitable for producing an appropriate level of optical energy. The optical cavity furnace 10 may also include one or more reflectors 14 and one or more walls 16 associated with the optical energy sources 12 such that the reflectors 14 and walls 16 define the optical cavity 18. The walls 16 may have any desired configuration or shape to enhance operation of the furnace as an optical cavity 18. The optical energy sources 12 may be positioned at any location with respect to the reflectors 14 and walls defining the optical cavity. The optical cavity furnace 10 may further include a semiconductor wafer transport system 22 for transporting one or more semiconductor wafers 20 through the optical cavity.

Correlation study of actual temperature profile and in-line metrology measurements for within-wafer uniformity improvement and wafer edge yield enhancement (Conference Presentation)

Science.gov (United States)

Fang, Fang; Vaid, Alok; Vinslava, Alina; Casselberry, Richard; Mishra, Shailendra; Dixit, Dhairya; Timoney, Padraig; Chu, Dinh; Porter, Candice; Song, Da; Ren, Zhou

2018-03-01

It is getting more important to monitor all aspects of influencing parameters in critical etch steps and utilize them as tuning knobs for within-wafer uniformity improvement and wafer edge yield enhancement. Meanwhile, we took a dive in pursuing "measuring what matters" and challenged ourselves for more aspects of signals acquired in actual process conditions. Among these factors which are considered subtle previously, we identified Temperature, especially electrostatic chuck (ESC) Temperature measurement in real etch process conditions have direct correlation to in-line measurements. In this work, we used SensArray technique (EtchTemp-SE wafer) to measure ESC temperature profile on a 300mm wafer with plasma turning on to reproduce actual temperature pattern on wafers in real production process conditions. In field applications, we observed substantial correlation between ESC temperature and in-line optical metrology measurements and since temperature is a process factor that can be tuning through set-temperature modulations, we have identified process knobs with known impact on physical profile variations. Furthermore, ESC temperature profile on a 300mm wafer is configured as multiple zones upon radius and SensArray measurements mechanism could catch such zonal distribution as well, which enables detailed temperature modulations targeting edge ring only where most of chips can be harvested and critical zone for yield enhancement. Last but not least, compared with control reference (ESC Temperature in static plasma-off status), we also get additional factors to investigate in chamber-to-chamber matching study and make process tool fleet match on the basis really matters in production. KLA-Tencor EtchTemp-SE wafer enables Plasma On wafer temperature monitoring of silicon etch process. This wafer is wireless and has 65 sensors with measurement range from 20 to 140°C. the wafer is designed to run in real production recipe plasma on condition with maximum RF power up

Peptide and protein loading into porous silicon wafers

Energy Technology Data Exchange (ETDEWEB)

Prestidge, C.A.; Barnes, T.J.; Mierczynska-Vasilev, A.; Kempson, I.; Peddie, F. [Ian Wark Research Institute, University of South Australia, Mawson Lakes (Australia); Barnett, C. [Medica Ltd, Malvern, Worcestershire, UK WR14 3SZ (United Kingdom)

2008-02-15

The influence of peptide/protein size and hydrophobicity on the physical and chemical aspects of loading within porous silicon (pSi) wafer samples has been determined using Atomic Force Microscopy (AFM) and Time-of-Flight Secondary Ion Mass Spectroscopy (ToF-SIMS). Both Gramicidin A (a small hydrophobic peptide) and Papain (a larger hydrophilic protein) were observed (ToF-SIMS) to penetrate across the entire pSi layer, even at low loading levels. AFM surface imaging of pSi wafers during peptide/protein loading showed that surface roughness increased with Papain loading, but decreased with Gramicidin A loading. For Papain, the loading methodology was also found to influence loading efficiency. These differences indicate more pronounced surface adsorption of Papain. (copyright 2008 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim) (orig.)

Wafer of Intel Pentium 4 Prescott Chips

CERN Multimedia

Silicon wafer with hundreds of Penryn cores (microprocessor). There are around four times as many Prescott chips can be made per wafer than with the previous generation of Northwood-core Pentium 4 processors. It is faster and cheaper.

Wafer edge overlay control solution for N7 and beyond

Science.gov (United States)

van Haren, Richard; Calado, Victor; van Dijk, Leon; Hermans, Jan; Kumar, Kaushik; Yamashita, Fumiko

2018-03-01

Historically, the on-product overlay performance close to the wafer edge is lagging with respect to the inner part of the wafer. The reason for this is that wafer processing is less controlled close to the wafer edge as opposed to the rest of the wafer. It is generally accepted that Chemical Vapor Deposition (CVD) of stressed layers that cause wafer warp, wafer table contamination, Chemical Mechanical Polishing (CMP), and Reactive Ion Etch (RIE) may deteriorate the overlay performance and/or registration close to the wafer edge. For the N7 technology node and beyond, it is anticipated that the tight on-product overlay specification is required across the full wafer which includes the edge region. In this work, we highlight one contributor that may negatively impact the on-product overlay performance, namely the etch step. The focus will be mainly on the wafer edge region but the remaining part of the wafer is considered as well. Three use-cases are examined: multiple Litho-Etch steps (LEn), contact hole layer etch, and the copper dual damascene etch. We characterize the etch contribution by considering the overlay measurement after resist development inspect (ADI) and after etch inspect (AEI). We show that the Yieldstar diffraction based overlay (μDBO) measurements can be utilized to characterize the etch contribution to the overlay budget. The effects of target asymmetry as well as overlay shifts are considered and compared with SEM measurements. Based on the results above, we propose a control solution aiming to reduce or even eliminate the delta between ADI and AEI. By doing so, target/mark to device offsets due to etch might be avoided.

Automated reticle inspection data analysis for wafer fabs

Science.gov (United States)

Summers, Derek; Chen, Gong; Reese, Bryan; Hutchinson, Trent; Liesching, Marcus; Ying, Hai; Dover, Russell

2009-04-01

To minimize potential wafer yield loss due to mask defects, most wafer fabs implement some form of reticle inspection system to monitor photomask quality in high-volume wafer manufacturing environments. Traditionally, experienced operators review reticle defects found by an inspection tool and then manually classify each defect as 'pass, warn, or fail' based on its size and location. However, in the event reticle defects are suspected of causing repeating wafer defects on a completed wafer, potential defects on all associated reticles must be manually searched on a layer-by-layer basis in an effort to identify the reticle responsible for the wafer yield loss. This 'problem reticle' search process is a very tedious and time-consuming task and may cause extended manufacturing line-down situations. Often times, Process Engineers and other team members need to manually investigate several reticle inspection reports to determine if yield loss can be tied to a specific layer. Because of the very nature of this detailed work, calculation errors may occur resulting in an incorrect root cause analysis effort. These delays waste valuable resources that could be spent working on other more productive activities. This paper examines an automated software solution for converting KLA-Tencor reticle inspection defect maps into a format compatible with KLA-Tencor's Klarity Defect(R) data analysis database. The objective is to use the graphical charting capabilities of Klarity Defect to reveal a clearer understanding of defect trends for individual reticle layers or entire mask sets. Automated analysis features include reticle defect count trend analysis and potentially stacking reticle defect maps for signature analysis against wafer inspection defect data. Other possible benefits include optimizing reticle inspection sample plans in an effort to support "lean manufacturing" initiatives for wafer fabs.

Quality assurance requirements and methods for high level waste package acceptability

International Nuclear Information System (INIS)

1992-12-01

This document should serve as guidance for assigning the necessary items to control the conditioning process in such a way that waste packages are produced in compliance with the waste acceptance requirements. It is also provided to promote the exchange of information on quality assurance requirements and on the application of quality assurance methods associated with the production of high level waste packages, to ensure that these waste packages comply with the requirements for transportation, interim storage and waste disposal in deep geological formations. The document is intended to assist both the operators of conditioning facilities and repositories as well as national authorities and regulatory bodies, involved in the licensing of the conditioning of high level radioactive wastes or in the development of deep underground disposal systems. The document recommends the quality assurance requirements and methods which are necessary to generate data for these parameters identified in IAEA-TECDOC-560 on qualitative acceptance criteria, and indicates where and when the control methods can be applied, e.g. in the operation or commissioning of a process or in the development of a waste package design. Emphasis is on the control of the process and little reliance is placed on non-destructive or destructive testing. Qualitative criteria, relevant to disposal of high level waste, are repository dependent and are not addressed here. 37 refs, 3 figs, 2 tabs

Digital Platform for Wafer-Level MEMS Testing and Characterization Using Electrical Response

Directory of Open Access Journals (Sweden)

Nuno Brito

2016-09-01

Full Text Available The uniqueness of microelectromechanical system (MEMS devices, with their multiphysics characteristics, presents some limitations to the borrowed test methods from traditional integrated circuits (IC manufacturing. Although some improvements have been performed, this specific area still lags behind when compared to the design and manufacturing competencies developed over the last decades by the IC industry. A complete digital solution for fast testing and characterization of inertial sensors with built-in actuation mechanisms is presented in this paper, with a fast, full-wafer test as a leading ambition. The full electrical approach and flexibility of modern hardware design technologies allow a fast adaptation for other physical domains with minimum effort. The digital system encloses a processor and the tailored signal acquisition, processing, control, and actuation hardware control modules, capable of the structure position and response analysis when subjected to controlled actuation signals in real time. The hardware performance, together with the simplicity of the sequential programming on a processor, results in a flexible and powerful tool to evaluate the newest and fastest control algorithms. The system enables measurement of resonant frequency (Fr, quality factor (Q, and pull-in voltage (Vpi within 1.5 s with repeatability better than 5 ppt (parts per thousand. A full-wafer with 420 devices under test (DUTs has been evaluated detecting the faulty devices and providing important design specification feedback to the designers.

Modelling deformation and fracture in confectionery wafers

Energy Technology Data Exchange (ETDEWEB)

Mohammed, Idris K.; Charalambides, Maria N.; Williams, J. Gordon; Rasburn, John [Mechanical Engineering Department, Imperial College London, South Kensington, London, SW7 2AZ, United Kingdom and Nestec York Ltd., Nestlé Product Technology Centre, Haxby Road, PO Box 204, York YO91 1XY (United Kingdom)

2015-01-22

The aim of this research is to model the deformation and fracture behaviour of brittle wafers often used in chocolate confectionary products. Three point bending and compression experiments were performed on beam and circular disc samples respectively to determine the 'apparent' stress-strain curves in bending and compression. The deformation of the wafer for both these testing types was observed in-situ within an SEM. The wafer is modeled analytically and numerically as a composite material with a core which is more porous than the skins. X-ray tomography was used to generate a three dimensional volume of the wafer microstructure which was then meshed and used for quantitative analysis. A linear elastic material model, with a damage function and element deletion, was used and the XMT generated architecture was loaded in compression. The output from the FE simulations correlates closely to the load-deflection deformation observed experimentally.

Modular packaging concept for MEMS and MOEMS

Science.gov (United States)

Stenchly, Vanessa; Reinert, Wolfgang; Quenzer, Hans-Joachim

2017-11-01

Wherever technical systems detect objects in their environment or interact with people, optical devices may play an important role. Light can be relatively easily produced and spatially and temporally modulated. Laser can project sharp images over long distances or cut materials in short distances. Depending on the wavelength an invisible scanning in near infrared for gesture recognition is possible as well as a projection of brilliant colour images. For several years, the Fraunhofer ISIT develops Opto-Packaging processes based on the viscous reshaping of glass wafers: First, hermetically sealed laser micro-mirror scanners WLP with inclined windows deflect in the central light reflex of the window out of the image area. Second, housing with lateral light exit permits hermetic sealing of edge-emitting lasers for highest reliability and durability. Such systems are currently experiencing an extremely high interest of the industry in all segments, from consumer to automotive through to materials processing. Our modular Opto-Packaging platform enables fast product developments. Housing for opto mechanical MEMS devices are equipped with inclined windows to minimize distortion, stray light and reflection losses. The hot viscous glass forming technology is also applied to functionalized substrate wafers which possess areas with high heat dissipation in addition to thermally insulating areas. Electrical contacts may be realized with metal filled vias or TGV (Through Glass Vias). The modular system reduces the development times for new, miniaturized optical systems so that manufacturers can focus on the essentials in their development, namely their product functionalities.

Performance of a novel wafer scale CMOS active pixel sensor for bio-medical imaging

International Nuclear Information System (INIS)

Esposito, M; Evans, P M; Wells, K; Anaxagoras, T; Konstantinidis, A C; Zheng, Y; Speller, R D; Allinson, N M

2014-01-01

Recently CMOS active pixels sensors (APSs) have become a valuable alternative to amorphous silicon and selenium flat panel imagers (FPIs) in bio-medical imaging applications. CMOS APSs can now be scaled up to the standard 20 cm diameter wafer size by means of a reticle stitching block process. However, despite wafer scale CMOS APS being monolithic, sources of non-uniformity of response and regional variations can persist representing a significant challenge for wafer scale sensor response. Non-uniformity of stitched sensors can arise from a number of factors related to the manufacturing process, including variation of amplification, variation between readout components, wafer defects and process variations across the wafer due to manufacturing processes. This paper reports on an investigation into the spatial non-uniformity and regional variations of a wafer scale stitched CMOS APS. For the first time a per-pixel analysis of the electro-optical performance of a wafer CMOS APS is presented, to address inhomogeneity issues arising from the stitching techniques used to manufacture wafer scale sensors. A complete model of the signal generation in the pixel array has been provided and proved capable of accounting for noise and gain variations across the pixel array. This novel analysis leads to readout noise and conversion gain being evaluated at pixel level, stitching block level and in regions of interest, resulting in a coefficient of variation ⩽1.9%. The uniformity of the image quality performance has been further investigated in a typical x-ray application, i.e. mammography, showing a uniformity in terms of CNR among the highest when compared with mammography detectors commonly used in clinical practice. Finally, in order to compare the detection capability of this novel APS with the technology currently used (i.e. FPIs), theoretical evaluation of the detection quantum efficiency (DQE) at zero-frequency has been performed, resulting in a higher DQE for this

Performance of a novel wafer scale CMOS active pixel sensor for bio-medical imaging.

Science.gov (United States)

Esposito, M; Anaxagoras, T; Konstantinidis, A C; Zheng, Y; Speller, R D; Evans, P M; Allinson, N M; Wells, K

2014-07-07

Recently CMOS active pixels sensors (APSs) have become a valuable alternative to amorphous silicon and selenium flat panel imagers (FPIs) in bio-medical imaging applications. CMOS APSs can now be scaled up to the standard 20 cm diameter wafer size by means of a reticle stitching block process. However, despite wafer scale CMOS APS being monolithic, sources of non-uniformity of response and regional variations can persist representing a significant challenge for wafer scale sensor response. Non-uniformity of stitched sensors can arise from a number of factors related to the manufacturing process, including variation of amplification, variation between readout components, wafer defects and process variations across the wafer due to manufacturing processes. This paper reports on an investigation into the spatial non-uniformity and regional variations of a wafer scale stitched CMOS APS. For the first time a per-pixel analysis of the electro-optical performance of a wafer CMOS APS is presented, to address inhomogeneity issues arising from the stitching techniques used to manufacture wafer scale sensors. A complete model of the signal generation in the pixel array has been provided and proved capable of accounting for noise and gain variations across the pixel array. This novel analysis leads to readout noise and conversion gain being evaluated at pixel level, stitching block level and in regions of interest, resulting in a coefficient of variation ⩽1.9%. The uniformity of the image quality performance has been further investigated in a typical x-ray application, i.e. mammography, showing a uniformity in terms of CNR among the highest when compared with mammography detectors commonly used in clinical practice. Finally, in order to compare the detection capability of this novel APS with the technology currently used (i.e. FPIs), theoretical evaluation of the detection quantum efficiency (DQE) at zero-frequency has been performed, resulting in a higher DQE for this

Packaged low-level waste verification system

International Nuclear Information System (INIS)

Tuite, K.T.; Winberg, M.; Flores, A.Y.; Killian, E.W.; McIsaac, C.V.

1996-01-01

Currently, states and low-level radioactive waste (LLW) disposal site operators have no method of independently verifying the radionuclide content of packaged LLW that arrive at disposal sites for disposal. At this time, disposal sites rely on LLW generator shipping manifests and accompanying records to insure that LLW received meets the waste acceptance criteria. An independent verification system would provide a method of checking generator LLW characterization methods and help ensure that LLW disposed of at disposal facilities meets requirements. The Mobile Low-Level Waste Verification System (MLLWVS) provides the equipment, software, and methods to enable the independent verification of LLW shipping records to insure that disposal site waste acceptance criteria are being met. The MLLWVS system was developed under a cost share subcontract between WMG, Inc., and Lockheed Martin Idaho Technologies through the Department of Energy's National Low-Level Waste Management Program at the Idaho National Engineering Laboratory (INEL)

Palladium-based on-wafer electroluminescence studies of GaN-based LED structures

Energy Technology Data Exchange (ETDEWEB)

Salcianu, C.O.; Thrush, E.J.; Humphreys, C.J. [Department of Materials Science and Metallurgy, University of Cambridge, Pembroke Street, Cambridge CB2 3QZ (United Kingdom); Plumb, R.G. [Centre for Photonic Systems, Department of Engineering, University of Cambridge, Cambridge CB3 0FD (United Kingdom); Boyd, A.R.; Rockenfeller, O.; Schmitz, D.; Heuken, M. [AIXTRON AG, Kackertstr. 15-17, 52072 Aachen (Germany)

2008-07-01

Electroluminescence (EL) testing of Light Emitting Diode (LED) structures is usually done at the chip level. Assessing the optical and electrical properties of LED structures at the wafer scale prior to their processing would improve the cost effectiveness of producing LED-lamps. A non-destructive method for studying the luminescence properties of the structure at the wafer-scale is photoluminescence (PL). However, the relationship between the on-wafer PL data and the final device EL can be less than straightforward (Y. H Aliyu et al., Meas. Sci. Technol. 8, 437 (1997)) as the two techniques employ different carrier injection mechanisms. This paper provides an overview of some different techniques in which palladium is used as a contact in order to obtain on-wafer electroluminescence information which could be used to screen wafers prior to processing into final devices. Quick mapping of the electrical and optical characteristics was performed using either palladium needle electrodes directly, or using the latter in conjunction with evaporated palladium contacts to inject both electrons and holes into the active region via the p-type capping layer of the structure. For comparison, indium was also used to make contact to the n-layer so that electrons could be directly injected into that layer. (copyright 2008 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim) (orig.)

Controllable laser thermal cleavage of sapphire wafers

Science.gov (United States)

Xu, Jiayu; Hu, Hong; Zhuang, Changhui; Ma, Guodong; Han, Junlong; Lei, Yulin

2018-03-01

Laser processing of substrates for light-emitting diodes (LEDs) offers advantages over other processing techniques and is therefore an active research area in both industrial and academic sectors. The processing of sapphire wafers is problematic because sapphire is a hard and brittle material. Semiconductor laser scribing processing suffers certain disadvantages that have yet to be overcome, thereby necessitating further investigation. In this work, a platform for controllable laser thermal cleavage was constructed. A sapphire LED wafer was modeled using the finite element method to simulate the thermal and stress distributions under different conditions. A guide groove cut by laser ablation before the cleavage process was observed to guide the crack extension and avoid deviation. The surface and cross section of sapphire wafers processed using controllable laser thermal cleavage were characterized by scanning electron microscopy and optical microscopy, and their morphology was compared to that of wafers processed using stealth dicing. The differences in luminous efficiency between substrates prepared using these two processing methods are explained.

Growth of misfit dislocation-free p/p+ thick epitaxial silicon wafers on Ge-B-codoped substrates

International Nuclear Information System (INIS)

Jiang Huihua; Yang Deren; Ma Xiangyang; Tian Daxi; Li Liben; Que Duanlin

2006-01-01

The growth of p/p + silicon epitaxial silicon wafers (epi-wafers) without misfit dislocations has been successfully achieved by using heavily boron-doped Czochralski (CZ) silicon wafers codoped with desirable level of germanium as the substrates. The lattice compensation by codoping of germanium and boron into the silicon matrix to reduce the lattice mismatch between the substrate (heavily boron-doped) and epi-layer (lightly boron-doped) is the basic idea underlying in the present achievement. In principle, the codoping of germanium and boron in the CZ silicon can be tailored to achieve misfit dislocation-free epi-layer with required thickness. It is reasonably expected that the presented solution to elimination of misfit dislocations in the p/p + silicon wafers can be applied in the volume production

Guided ultrasonic wave beam skew in silicon wafers

Science.gov (United States)

Pizzolato, Marco; Masserey, Bernard; Robyr, Jean-Luc; Fromme, Paul

2018-04-01

In the photovoltaic industry, monocrystalline silicon wafers are employed for solar cells with high conversion efficiency. Micro-cracks induced by the cutting process in the thin wafers can lead to brittle wafer fracture. Guided ultrasonic waves would offer an efficient methodology for the in-process non-destructive testing of wafers to assess micro-crack density. The material anisotropy of the monocrystalline silicon leads to variations of the guided wave characteristics, depending on the propagation direction relative to the crystal orientation. Selective guided ultrasonic wave excitation was achieved using a contact piezoelectric transducer with custom-made wedges for the A0 and S0 Lamb wave modes and a transducer holder to achieve controlled contact pressure and orientation. The out-of-plane component of the guided wave propagation was measured using a non-contact laser interferometer. The phase slowness (velocity) of the two fundamental Lamb wave modes was measured experimentally for varying propagation directions relative to the crystal orientation and found to match theoretical predictions. Significant wave beam skew was observed experimentally, especially for the S0 mode, and investigated from 3D finite element simulations. Good agreement was found with the theoretical predictions based on nominal material properties of the silicon wafer. The important contribution of guided wave beam skewing effects for the non-destructive testing of silicon wafers was demonstrated.

Thermoelectric properties of boron and boron phosphide CVD wafers

Energy Technology Data Exchange (ETDEWEB)

Kumashiro, Y.; Yokoyama, T.; Sato, A.; Ando, Y. [Yokohama National Univ. (Japan)

1997-10-01

Electrical and thermal conductivities and thermoelectric power of p-type boron and n-type boron phosphide wafers with amorphous and polycrystalline structures were measured up to high temperatures. The electrical conductivity of amorphous boron wafers is compatible to that of polycrystals at high temperatures and obeys Mott`s T{sup -{1/4}} rule. The thermoelectric power of polycrystalline boron decreases with increasing temperature, while that of amorphous boron is almost constant in a wide temperature range. The weak temperature dependence of the thermal conductivity of BP polycrystalline wafers reflects phonon scattering by grain boundaries. Thermal conductivity of an amorphous boron wafer is almost constant in a wide temperature range, showing a characteristic of a glass. The figure of merit of polycrystalline BP wafers is 10{sup -7}/K at high temperatures while that of amorphous boron is 10{sup -5}/K.

Dislocation behavior of surface-oxygen-concentration controlled Si wafers

International Nuclear Information System (INIS)

Asazu, Hirotada; Takeuchi, Shotaro; Sannai, Hiroya; Sudo, Haruo; Araki, Koji; Nakamura, Yoshiaki; Izunome, Koji; Sakai, Akira

2014-01-01

We have investigated dislocation behavior in the surface area of surface-oxygen-concentration controlled Si wafers treated by a high temperature rapid thermal oxidation (HT-RTO). The HT-RTO process allows us to precisely control the interstitial oxygen concentration ([O i ]) in the surface area of the Si wafers. Sizes of rosette patterns, generated by nano-indentation and subsequent thermal annealing at 900 °C for 1 h, were measured for the Si wafers with various [O i ]. It was found that the rosette size decreases in proportion to the − 0.25 power of [O i ] in the surface area of the Si wafers, which were higher than [O i ] of 1 × 10 17 atoms/cm 3 . On the other hand, [O i ] of lower than 1 × 10 17 atoms/cm 3 did not affect the rosette size very much. These experimental results demonstrate the ability of the HT-RTO process to suppress the dislocation movements in the surface area of the Si wafer. - Highlights: • Surface-oxygen-concentration controlled Si wafers have been made. • The oxygen concentration was controlled by high temperature rapid thermal oxidation. • Dislocation behavior in the surface area of the Si wafers has been investigated. • Rosette size decreased with increasing of interstitial oxygen atoms. • The interstitial oxygen atoms have a pinning effect of dislocations at the surface

Non-axisymmetric flexural vibrations of free-edge circular silicon wafers

Energy Technology Data Exchange (ETDEWEB)

Dmitriev, A.V., E-mail: dmitriev@hbar.phys.msu.ru; Gritsenko, D.S.; Mitrofanov, V.P., E-mail: mitr@hbar.phys.msu.ru

2014-02-07

Non-axisymmetric flexural vibrations of circular silicon (111) wafers are investigated. The modes with azimuthal index 2⩽k⩽30 are electrostatically excited and monitored by a capacitive sensor. The splitting of the mode frequencies associated with imperfection of the wafer is observed. The measured loss factors for the modes with 6≲k≲26 are close to those calculated according to the thermoelastic damping theory, while clamping losses likely dominate for k≲6, and surface losses at the level of inverse Q-factor Q{sup −1}≈4×10{sup −6} prevail for the modes with large k. The modes demonstrate nonlinear behavior of mainly geometrical origin at large amplitudes.

Cohesive zone model for direct silicon wafer bonding

Science.gov (United States)

Kubair, D. V.; Spearing, S. M.

2007-05-01

Direct silicon wafer bonding and decohesion are simulated using a spectral scheme in conjunction with a rate-dependent cohesive model. The cohesive model is derived assuming the presence of a thin continuum liquid layer at the interface. Cohesive tractions due to the presence of a liquid meniscus always tend to reduce the separation distance between the wafers, thereby opposing debonding, while assisting the bonding process. In the absence of the rate-dependence effects the energy needed to bond a pair of wafers is equal to that needed to separate them. When rate-dependence is considered in the cohesive law, the experimentally observed asymmetry in the energetics can be explained. The derived cohesive model has the potential to form a bridge between experiments and a multiscale-modelling approach to understand the mechanics of wafer bonding.

Evaluation of a cyanoacrylate dressing to manage peristomal skin alterations under ostomy skin barrier wafers.

Science.gov (United States)

Milne, Catherine T; Saucier, Darlene; Trevellini, Chenel; Smith, Juliet

2011-01-01

Peristomal skin alterations under ostomy barrier wafers are a commonly reported problem. While a number of interventions to manage this issue have been reported, the use of a topically applied cyanoacrylate has received little attention. This case series describes the use of a topical cyanoacrylate for the management of peristomal skin alterations in persons living with an ostomy. Using a convenience sample, the topical cyanoacrylate dressing was applied to 11 patients with peristomal skin disruption under ostomy wafers in acute care and outpatient settings. The causes of barrier function interruption were also addressed to enhance outcomes. Patients were assessed for wound discomfort using a Likert Scale, time to healing, and number of appliance changes. Patient satisfaction was also examined. Average reported discomfort levels were 9.5 out of 10 at the initial peristomal irritation assessment visit decreased to 3.5 at the first wafer change and were absent by the second wafer change. Wafers had increasing wear time between changes in both settings with acute care patients responding faster. Epidermal resurfacing occurred within 10.2 days in outpatients and within 7 days in acute care patients. Because of the skin sealant action of this dressing, immediate adherence of the wafer was reported at all pouch changes.

A Feasibility Study of Lead Free Solders for Level 1 Packaging Applications

DEFF Research Database (Denmark)

Chidambaram, Vivek; Hald, John; Hattel, Jesper Henri

2009-01-01

An attempt has been made to determine the lead free ternary combinations that satisfied the solidification requirement for a solder used in level 1 packaging applications, using the CALPHAD approach. The segregation profiles of the promising candidates were analyzed after scrutinizing the equilib......An attempt has been made to determine the lead free ternary combinations that satisfied the solidification requirement for a solder used in level 1 packaging applications, using the CALPHAD approach. The segregation profiles of the promising candidates were analyzed after scrutinizing...

Evidence of Processing Non-Idealities in 4H-SiC Integrated Circuits Fabricated with Two Levels of Metal Interconnect

Science.gov (United States)

Spry, David J.; Neudeck, Philip G.; Liangyu, Chen; Evans, Laura J.; Lukco, Dorothy; Chang, Carl W.; Beheim, Glenn M.

2015-01-01

The fabrication and prolonged 500 C electrical testing of 4H-SiC junction field effect transistor (JFET) integrated circuits (ICs) with two levels of metal interconnect is reported in another submission to this conference proceedings. While some circuits functioned more than 1000 hours at 500 C, the majority of packaged ICs from this wafer electrically failed after less than 200 hours of operation in the same test conditions. This work examines the root physical degradation and failure mechanisms believed responsible for observed large discrepancies in 500 C operating time. Evidence is presented for four distinct issues that significantly impacted 500 C IC operational yield and lifetime for this wafer.

Fluorine-enhanced low-temperature wafer bonding of native-oxide covered Si wafers

Science.gov (United States)

Tong, Q.-Y.; Gan, Q.; Fountain, G.; Enquist, P.; Scholz, R.; Gösele, U.

2004-10-01

The bonding energy of bonded native-oxide-covered silicon wafers treated in the HNO3/H2O/HF or the HNO3/HF solution prior to room-temperature contact is significantly higher than bonded standard RCA1 cleaned wafer pairs after low-temperature annealing. The bonding energy reaches over 2000mJ/m2 after annealing at 100 °C. The very slight etching and fluorine in the chemically grown oxide are believed to be the main contributors to the enhanced bonding energy. Transmission-electron-microscopic images have shown that the chemically formed native oxide at bonding interface is embedded with many flake-like cavities. The cavities can absorb the by-products of the interfacial reactions that result in covalent bond formation at low temperatures allowing the strong bond to be retained.

Alternatives for packaging and transport of greater-than-class C low-level waste

International Nuclear Information System (INIS)

Smith, R.I.

1990-06-01

Viable methods for packaging greater-than-class C (GTCC) low-level wastes and for transporting those wastes from the waste generator sites or from an eastern interim storage site to the Yucca Mountain repository site have been identified and evaluated. Estimated costs for packaging and transporting the population of GTCC wastes expected to be accumulated through the year 2040 have been developed for three waste volume scenarios, for two preferred packaging methods for activated metals from reactor operations and from reactor decommissioning, and for two packaging density assumptions for the activated metals from reactor decommissioning. 7 refs. 7 tabs

Packaging and transport of low and intermediate level radioactive waste

International Nuclear Information System (INIS)

Smith, M.J.S.; Streatfield, R.E.

1987-02-01

The paper presents an overview of Nirex proposals for the packaging and transport of low and intermediate-level radioactive waste, as well as the regulatory requirements which must be met in such operations. (author)

Silicon wafers for integrated circuit process

OpenAIRE

Leroy , B.

1986-01-01

Silicon as a substrate material will continue to dominate the market of integrated circuits for many years. We first review how crystal pulling procedures impact the quality of silicon. We then investigate how thermal treatments affect the behaviour of oxygen and carbon, and how, as a result, the quality of silicon wafers evolves. Gettering techniques are then presented. We conclude by detailing the requirements that wafers must satisfy at the incoming inspection.

Low-Level Radioactive Waste siting simulation information package

International Nuclear Information System (INIS)

1985-12-01

The Department of Energy's National Low-Level Radioactive Waste Management Program has developed a simulation exercise designed to facilitate the process of siting and licensing disposal facilities for low-level radioactive waste. The siting simulation can be conducted at a workshop or conference, can involve 14-70 participants (or more), and requires approximately eight hours to complete. The exercise is available for use by states, regional compacts, or other organizations for use as part of the planning process for low-level waste disposal facilities. This information package describes the development, content, and use of the Low-Level Radioactive Waste Siting Simulation. Information is provided on how to organize a workshop for conducting the simulation. 1 ref., 1 fig

Reticle variation influence on manufacturing line and wafer device performance

Science.gov (United States)

Nistler, John L.; Spurlock, Kyle

1994-01-01

Cost effective manufacturing of devices at 0.5, 0.35 and 0.25μm geometries will be highly dependent on a companys' ability to obtain an economic return on investment. The high capital investment in equipment and facilities, not to mention the related chemical and wafer costs, for producing 200mm silicon wafers requires aspects of wafer processing to be tightly controlled. Reduction in errors and enhanced yield management requires early correction or avoidance of reticle problems. It is becoming increasingly important to recognize and track all pertinent factors impacting both the technical and financial viability of a wafer manufacturing fabrication area. Reticle related effects on wafer manufacturing can be costly and affect the total quality perceived by the device customer.

Candida parapsilosis meningitis associated with Gliadel (BCNU) wafer implants.

LENUS (Irish Health Repository)

O'Brien, Deirdre

2012-02-01

A 58-year old male presented with meningitis associated with subgaleal and subdural collections 6 weeks following a temporal craniotomy for resection of recurrent glioblastoma multiforme and Gliadel wafer implantation. Candida parapsilosis was cultured from cerebrospinal fluid (CSF) and Gliadel wafers removed during surgical debridement. He was successfully treated with liposomal amphotericin B. To our knowledge, this is the first reported case of Candida parapsilosis meningitis secondary to Gliadel wafer placement.

Candida parapsilosis meningitis associated with Gliadel (BCNU) wafer implants.

LENUS (Irish Health Repository)

O'brien, Deirdre

2010-12-15

A 58-year old male presented with meningitis associated with subgaleal and subdural collections 6 weeks following a temporal craniotomy for resection of recurrent glioblastoma multiforme and Gliadel wafer implantation. Candida parapsilosis was cultured from cerebrospinal fluid (CSF) and Gliadel wafers removed during surgical debridement. He was successfully treated with liposomal amphotericin B. To our knowledge, this is the first reported case of Candida parapsilosis meningitis secondary to Gliadel wafer placement.

High frequency guided wave propagation in monocrystalline silicon wafers

OpenAIRE

Pizzolato, M.; Masserey, B.; Robyr, J. L.; Fromme, P.

2017-01-01

Monocrystalline silicon wafers are widely used in the photovoltaic industry for solar panels with high conversion efficiency. The cutting process can introduce micro-cracks in the thin wafers and lead to varying thickness. High frequency guided ultrasonic waves are considered for the structural monitoring of the wafers. The anisotropy of the monocrystalline silicon leads to variations of the wave characteristics, depending on the propagation direction relative to the crystal orientation. Full...

High voltage photo-switch package module having encapsulation with profiled metallized concavities

Science.gov (United States)

Sullivan, James S; Sanders, David M; Hawkins, Steven A; Sampayan, Stephen A

2015-05-05

A photo-conductive switch package module having a photo-conductive substrate or wafer with opposing electrode-interface surfaces metalized with first metallic layers formed thereon, and encapsulated with a dielectric encapsulation material such as for example epoxy. The first metallic layers are exposed through the encapsulation via encapsulation concavities which have a known contour profile, such as a Rogowski edge profile. Second metallic layers are then formed to line the concavities and come in contact with the first metal layer, to form profiled and metalized encapsulation concavities which mitigate enhancement points at the edges of electrodes matingly seated in the concavities. One or more optical waveguides may also be bonded to the substrate for coupling light into the photo-conductive wafer, with the encapsulation also encapsulating the waveguides.

Kerfless epitaxial silicon wafers with 7 ms carrier lifetimes and a wide lift-off process window

Science.gov (United States)

Gemmel, Catherin; Hensen, Jan; David, Lasse; Kajari-Schröder, Sarah; Brendel, Rolf

2018-04-01

Silicon wafers contribute significantly to the photovoltaic module cost. Kerfless silicon wafers that grow epitaxially on porous silicon (PSI) and are subsequently detached from the growth substrate are a promising lower cost drop-in replacement for standard Czochralski (Cz) wafers. However, a wide technological processing window appears to be a challenge for this process. This holds in particularly for the etching current density of the separation layer that leads to lift-off failures if it is too large or too low. Here we present kerfless PSI wafers of high electronic quality that we fabricate on weakly reorganized porous Si with etch current densities varying in a wide process window from 110 to 150 mA/cm2. We are able to detach all 17 out of 17 epitaxial wafers. All wafers exhibit charge carrier lifetimes in the range of 1.9 to 4.3 ms at an injection level of 1015 cm-3 without additional high-temperature treatment. We find even higher lifetimes in the range of 4.6 to 7.0 ms after applying phosphorous gettering. These results indicate that a weak reorganization of the porous layer can be beneficial for a large lift-off process window while still allowing for high carrier lifetimes.

Containment barrier metals for high-level waste packages in a Tuff repository

International Nuclear Information System (INIS)

Russell, E.W.; McCright, R.D.; O'Neal, W.C.

1983-01-01

The Nevada Nuclear Waste Storage Investigations (NNWSI) Waste Package project is part of the US Department of Energy's Civilian Radioactive Waste Management (CRWM) Program. The NNWSI project is working towards the development of multibarriered packages for the disposal of spent fuel and high-level waste in tuff in the unsaturated zone at Yucca Mountain at the Nevada Test Site (NTS). The final engineered barrier system design may be composed of a waste form, canister, overpack, borehole liner, packing, and the near field host rock, or some combination thereof. Lawrence Livermore National Laboratory's (LLNL) role is to design, model, and test the waste package subsystem for the tuff repository. At the present stage of development of the nuclear waste management program at LLNL, the detailed requirements for the waste package design are not yet firmly established. In spite of these uncertainties as to the detailed package requirements, we have begun the conceptual design stage. By conceptual design, we mean design based on our best assessment of present and future regulatory requirements. We anticipate that changes will occur as the detailed requirements for waste package design are finalized. 17 references, 4 figures, 10 tables

Containment barrier metals for high-level waste packages in a Tuff repository

Energy Technology Data Exchange (ETDEWEB)

Russell, E.W.; McCright, R.D.; O`Neal, W.C.

1983-10-12

The Nevada Nuclear Waste Storage Investigations (NNWSI) Waste Package project is part of the US Department of Energy`s Civilian Radioactive Waste Management (CRWM) Program. The NNWSI project is working towards the development of multibarriered packages for the disposal of spent fuel and high-level waste in tuff in the unsaturated zone at Yucca Mountain at the Nevada Test Site (NTS). The final engineered barrier system design may be composed of a waste form, canister, overpack, borehole liner, packing, and the near field host rock, or some combination thereof. Lawrence Livermore National Laboratory`s (LLNL) role is to design, model, and test the waste package subsystem for the tuff repository. At the present stage of development of the nuclear waste management program at LLNL, the detailed requirements for the waste package design are not yet firmly established. In spite of these uncertainties as to the detailed package requirements, we have begun the conceptual design stage. By conceptual design, we mean design based on our best assessment of present and future regulatory requirements. We anticipate that changes will occur as the detailed requirements for waste package design are finalized. 17 references, 4 figures, 10 tables.

Direct Electroplating on Highly Doped Patterned Silicon Wafers

NARCIS (Netherlands)

Vargas Llona, Laura Dolores; Jansen, Henricus V.; Elwenspoek, Michael Curt

Nickel thin films have been electrodeposited directly on highly doped silicon wafers after removal of the native oxide layer. These substrates conduct sufficiently well to allow deposition using a periferical electrical contact on the wafer. Films 2 μm thick were deposited using a nickel sulfamate

Fabrication of Ge-on-insulator wafers by Smart-CutTM with thermal management for undamaged donor Ge wafers

Science.gov (United States)

Kim, Munho; Cho, Sang June; Jayeshbhai Dave, Yash; Mi, Hongyi; Mikael, Solomon; Seo, Jung-Hun; Yoon, Jung U.; Ma, Zhenqiang

2018-01-01

Newly engineered substrates consisting of semiconductor-on-insulator are gaining much attention as starting materials for the subsequent transfer of semiconductor nanomembranes via selective etching of the insulating layer. Germanium-on-insulator (GeOI) substrates are critically important because of the versatile applications of Ge nanomembranes (Ge NMs) toward electronic and optoelectronic devices. Among various fabrication techniques, the Smart-CutTM technique is more attractive than other methods because a high temperature annealing process can be avoided. Another advantage of Smart-CutTM is the reusability of the donor Ge wafer. However, it is very difficult to realize an undamaged Ge wafer because there exists a large mismatch in the coefficient of thermal expansion among the layers. Although an undamaged donor Ge wafer is a prerequisite for its reuse, research related to this issue has not yet been reported. Here we report the fabrication of 4-inch GeOI substrates using the direct wafer bonding and Smart-CutTM process with a low thermal budget. In addition, a thermo-mechanical simulation of GeOI was performed by COMSOL to analyze induced thermal stress in each layer of GeOI. Crack-free donor Ge wafers were obtained by annealing at 250 °C for 10 h. Raman spectroscopy and x-ray diffraction (XRD) indicated similarly favorable crystalline quality of the Ge layer in GeOI compared to that of bulk Ge. In addition, Ge p-n diodes using transferred Ge NM indicate a clear rectifying behavior with an on and off current ratio of 500 at ±1 V. This demonstration offers great promise for high performance transferrable Ge NM-based device applications.

Optoelectronic interconnects for 3D wafer stacks

Science.gov (United States)

Ludwig, David; Carson, John C.; Lome, Louis S.

1996-01-01

Wafer and chip stacking are envisioned as means of providing increased processing power within the small confines of a three-dimensional structure. Optoelectronic devices can play an important role in these dense 3-D processing electronic packages in two ways. In pure electronic processing, optoelectronics can provide a method for increasing the number of input/output communication channels within the layers of the 3-D chip stack. Non-free space communication links allow the density of highly parallel input/output ports to increase dramatically over typical edge bus connections. In hybrid processors, where electronics and optics play a role in defining the computational algorithm, free space communication links are typically utilized for, among other reasons, the increased network link complexity which can be achieved. Free space optical interconnections provide bandwidths and interconnection complexity unobtainable in pure electrical interconnections. Stacked 3-D architectures can provide the electronics real estate and structure to deal with the increased bandwidth and global information provided by free space optical communications. This paper will provide definitions and examples of 3-D stacked architectures in optoelectronics processors. The benefits and issues of these technologies will be discussed.

Multifunctional medicated lyophilised wafer dressing for effective chronic wound healing.

Science.gov (United States)

Pawar, Harshavardhan V; Boateng, Joshua S; Ayensu, Isaac; Tetteh, John

2014-06-01

Wafers combining weight ratios of Polyox with carrageenan (75/25) or sodium alginate (50/50) containing streptomycin and diclofenac were prepared to improve chronic wound healing. Gels were freeze-dried using a lyophilisation cycle incorporating an annealing step. Wafers were characterised for morphology, mechanical and in vitro functional (swelling, adhesion, drug release in the presence of simulated wound fluid) characteristics. Both blank (BLK) and drug-loaded (DL) wafers were soft, flexible, elegant in appearance and non-brittle in nature. Annealing helped to improve porous nature of wafers but was affected by the addition of drugs. Mechanical characterisation demonstrated that the wafers were strong enough to withstand normal stresses but also flexible to prevent damage to newly formed skin tissue. Differences in swelling, adhesion and drug release characteristics could be attributed to differences in pore size and sodium sulphate formed because of the salt forms of the two drugs. BLK wafers showed relatively higher swelling and adhesion than DL wafers with the latter showing controlled release of streptomycin and diclofenac. The optimised dressing has the potential to reduce bacterial infection and can also help to reduce swelling and pain associated with injury due to the anti-inflammatory action of diclofenac and help to achieve more rapid wound healing. © 2014 Wiley Periodicals, Inc. and the American Pharmacists Association.

Challenges in the Packaging of MEMS

Energy Technology Data Exchange (ETDEWEB)

Malshe, A.P.; Singh, S.B.; Eaton, W.P.; O' Neal, C.; Brown, W.D.; Miller, W.M.

1999-03-26

The packaging of Micro-Electro-Mechanical Systems (MEMS) is a field of great importance to anyone using or manufacturing sensors, consumer products, or military applications. Currently much work has been done in the design and fabrication of MEMS devices but insufficient research and few publications have been completed on the packaging of these devices. This is despite the fact that packaging is a very large percentage of the total cost of MEMS devices. The main difference between IC packaging and MEMS packaging is that MEMS packaging is almost always application specific and greatly affected by its environment and packaging techniques such as die handling, die attach processes, and lid sealing. Many of these aspects are directly related to the materials used in the packaging processes. MEMS devices that are functional in wafer form can be rendered inoperable after packaging. MEMS dies must be handled only from the chip sides so features on the top surface are not damaged. This eliminates most current die pick-and-place fixtures. Die attach materials are key to MEMS packaging. Using hard die attach solders can create high stresses in the MEMS devices, which can affect their operation greatly. Low-stress epoxies can be high-outgassing, which can also affect device performance. Also, a low modulus die attach can allow the die to move during ultrasonic wirebonding resulting to low wirebond strength. Another source of residual stress is the lid sealing process. Most MEMS based sensors and devices require a hermetically sealed package. This can be done by parallel seam welding the package lid, but at the cost of further induced stress on the die. Another issue of MEMS packaging is the media compatibility of the packaged device. MEMS unlike ICS often interface with their environment, which could be high pressure or corrosive. The main conclusion we can draw about MEMS packaging is that the package affects the performance and reliability of the MEMS devices. There is a

Long-term corrosion behaviour of low-/medium-level waste packages

International Nuclear Information System (INIS)

Jendras, M.; Bach, F.W.; Behrens, S.; Birr, Ch.; Hassel, Th.

2009-01-01

Full text of publication follows: Storage of low- and medium-level radioactive waste requires safe packages. This means that all materials used for the manufacturing of such packages have to show a sufficient resistance especially against corrosive attacks. Since these packages are generally made from carbon steel an additional coating for corrosion protection - mainly solvent-based polymers - is necessary. However, it is not enough to consider the selection and combination of the materials. Regarding the construction and manufacturing of corrosion-resistant drums for low- and medium-level radioactive waste there also has to be paid closer attention to the joining technologies such as welding. For lifetime prediction of low-/medium-level waste packages reliable experimental data concerning the long-term corrosion behaviour of each material as well as of the components is needed. Therefore sheet metals from carbon steel were galvanized or coated with different solvent-based and water-based corrosion protection materials (epoxy as well as silicone resins). After damaging the anti-corrosion coating of some of these sheets with predefined scratches sets of these samples were stored at higher temperatures in climatic chamber, in simulated waste or aged according to standard DIN EN ISO 9227. All corrosion damages were analyzed by means of metallography (light microscopy as well as scanning electron microscopy of micro-sections). The quantitative influence of the corrosive attacks on the mechanical properties of the materials was examined by mechanical testing according to DIN EN 10002. Besides reduction of tensile strength drastic reduction of percentage of elongation after fracture (from 30 % to 10 %) was found. Further experiments were carried out using components or scaled-down drums joined by means of innovative welding techniques such as Cold Arc or Force Arc. The relevant welding parameters (e.g. welding current, proper volume of shielding gas or wire feed) were

Waste package designs for disposal of high-level waste in salt formations

International Nuclear Information System (INIS)

Basham, S.J. Jr.; Carr, J.A.

1984-01-01

In the United States of America the selected method for disposal of radioactive waste is mined repositories located in suitable geohydrological settings. Currently four types of host rocks are under consideration: tuff, basalt, crystalline rock and salt. Development of waste package designs for incorporation in mined salt repositories is discussed. The three pertinent high-level waste forms are: spent fuel, as disassembled and close-packed fuel pins in a mild steel canister; commercial high-level waste (CHLW), as borosilicate glass in stainless-steel canisters; defence high-level waste (DHLW), as borosilicate glass in stainless-steel canisters. The canisters are production and handling items only. They have no planned long-term isolation function. Each waste form requires a different approach in package design. However, the general geometry and the materials of the three designs are identical. The selected waste package design is an overpack of low carbon steel with a welded closure. This container surrounds the waste forms. Studies to better define brine quantity and composition, radiation effects on the salt and brines, long-term corrosion behaviour of the low carbon steel, and the leaching behaviour of the spent fuel and borosilicate glass waste forms are continuing. (author)

Trace analysis for 300 MM wafers and processes with TXRF

International Nuclear Information System (INIS)

Nutsch, A.; Erdmann, V.; Zielonka, G.; Pfitzner, L.; Ryssel, H.

2000-01-01

Efficient fabrication of semiconductor devices is combined with an increasing size of silicon wafers. The contamination level of processes, media, and equipment has to decrease continuously. A new test laboratory for 300 mm was installed in view of the above mentioned aspects. Aside of numerous processing tools this platform consist electrical test methods, particle detection, vapor phase decomposition (VPD) preparation, and TXRF. The equipment is installed in a cleanroom. It is common to perform process or equipment control, development, evaluation and qualification with monitor wafers. The evaluation and the qualification of 300 mm equipment require direct TXRF on 300 mm wafers. A new TXRF setup was installed due to the wafer size of 300 mm. The 300 mm TXRF is equipped with tungsten and molybdenum anode. This combination allows a sensitive detection of elements with fluorescence energy below 10 keV for tungsten excitation. The molybdenum excitation enables the detection of a wide variety of elements. The detection sensitivity for the tungsten anode excited samples is ten times higher than for molybdenum anode measured samples. The system is calibrated with 1 ng Ni. This calibration shows a stability within 5 % when monitored to control system stability. Decreasing the amount of Ni linear results in a linear decrease of the measured Ni signal. This result is verified for a range of elements by multielement samples. New designs demand new processes and materials, e.g. ferroelectric layers and copper. The trace analysis of many of these materials is supported by the higher excitation energy of the molybdenum anode. Reclaim and recycling of 300 mm wafers demand for an accurate contamination control of the processes to avoid cross contamination. Polishing or etching result in modified surfaces. TXRF as a non-destructive test method allows the simultaneously detection of a variety of elements on differing surfaces in view of contamination control and process

Wafer Cakes of Improved Amino Acid Structure

Directory of Open Access Journals (Sweden)

Roksolana Boidunyk

2017-11-01

Full Text Available The article presents the results of the study of the amino acid composition of newly developed wafer cakes with adipose fillings combined with natural additives. The appropriateness of the using non-traditional raw materials (powder of willow herb, poppy oilcake, carob, as well as skimmed milk powder in order to increase the biological value of wafer cakes and improve their amino acid composition is proven.

Towards ultra-thin plasmonic silicon wafer solar cells with minimized efficiency loss.

Science.gov (United States)

Zhang, Yinan; Stokes, Nicholas; Jia, Baohua; Fan, Shanhui; Gu, Min

2014-05-13

The cost-effectiveness of market-dominating silicon wafer solar cells plays a key role in determining the competiveness of solar energy with other exhaustible energy sources. Reducing the silicon wafer thickness at a minimized efficiency loss represents a mainstream trend in increasing the cost-effectiveness of wafer-based solar cells. In this paper we demonstrate that, using the advanced light trapping strategy with a properly designed nanoparticle architecture, the wafer thickness can be dramatically reduced to only around 1/10 of the current thickness (180 μm) without any solar cell efficiency loss at 18.2%. Nanoparticle integrated ultra-thin solar cells with only 3% of the current wafer thickness can potentially achieve 15.3% efficiency combining the absorption enhancement with the benefit of thinner wafer induced open circuit voltage increase. This represents a 97% material saving with only 15% relative efficiency loss. These results demonstrate the feasibility and prospect of achieving high-efficiency ultra-thin silicon wafer cells with plasmonic light trapping.

Si-to-Si wafer bonding using evaporated glass

DEFF Research Database (Denmark)

Reus, Roger De; Lindahl, M.

1997-01-01

Anodic bonding of Si to Si four inch wafers using evaporated glass was performed in air at temperatures ranging from 300°C to 450°C. Although annealing of Si/glass structures around 340°C for 15 minutes eliminates stress, the bonded wafer pairs exhibit compressive stress. Pull testing revealed...

An electret-based energy harvesting device with a wafer-level fabrication process

DEFF Research Database (Denmark)

Crovetto, Andrea; Wang, Fei; Hansen, Ole

2013-01-01

This paper presents a MEMS energy harvesting device which is able to generate power from two perpendicular ambient vibration directions. A CYTOP polymer is used both as the electret material for electrostatic transduction and as a bonding interface for low-temperature wafer bonding. The device...... is also discussed. With a final chip size of about 1 cm2, a power output of 32.5 nW is successfully harvested with an external load of 17 MΩ, when a harmonic vibration source with an RMS acceleration amplitude of 0.03 g (∼0.3 m s−2) and a resonant frequency of 179 Hz is applied. These results can...

Transportation packagings for high-level wastes and unprocessed transuranic wastes

International Nuclear Information System (INIS)

Wilmot, E.L.; Romesberg, L.E.

1982-01-01

Packagings used for nuclear waste transport are varied in size, shape, and weight because they must accommodate a wide variety of waste forms and types. However, this paper will discuss the common characteristics among the packagings in order to provide a broad understanding of packaging designs. The paper then discusses, in some detail, a design that has been under development recently at Sandia National Laboratories (SNL) for handling unprocessed, contact-handled transuranic (CHTRU) wastes as well as a cask design for defense high-level wastes (HLW). As presently conceived, the design of the transuranic package transporter (TRUPACT) calls for inner and outer boxes that are separated by a rigid polyurethane foam. The inner box has a steel frame with stainless steel surfaces; the outer box is similarly constructed except that carbon steel is used for the outside surfaces. The access to each box is through hinged doors that are sealed after loading. To meet another waste management need, a cask is being developed to transport defense HLW. The cask, which is at the preliminary design stage, is being developed by General Atomic under the direction of the TTC. The cask design relies heavily on state-of-the-art spent-fuel cask designs though it can be much simpler due to the characteristics of the HLW. A primary purpose of this paper is to show that CHTRU waste and defense HLW currently are and will be transported in packagings designed to meet the hazards of transportation that are present in general commerce

High-κ Al{sub 2}O{sub 3} material in low temperature wafer-level bonding for 3D integration application

Energy Technology Data Exchange (ETDEWEB)

Fan, J., E-mail: fanji@hust.edu.cn; Tu, L. C. [MOE Key Laboratory of Fundamental Physical Quantities Measurement, School of Physics, Huazhong University of Science and Technology, Wuhan 430074 (China); Tan, C. S. [School of Electrical and Electronics Engineering, Nanyang Technological University, 50 Nanyang Avenue, Singapore 639798 (Singapore)

2014-03-15

This work systematically investigated a high-κ Al{sub 2}O{sub 3} material for low temperature wafer-level bonding for potential applications in 3D microsystems. A clean Si wafer with an Al{sub 2}O{sub 3} layer thickness of 50 nm was applied as our experimental approach. Bonding was initiated in a clean room ambient after surface activation, followed by annealing under inert ambient conditions at 300 °C for 3 h. The investigation consisted of three parts: a mechanical support study using the four-point bending method, hermeticity measurements using the helium bomb test, and thermal conductivity analysis for potential heterogeneous bonding. Compared with samples bonded using a conventional oxide bonding material (SiO{sub 2}), a higher interfacial adhesion energy (∼11.93 J/m{sup 2}) and a lower helium leak rate (∼6.84 × 10{sup −10} atm.cm{sup 3}/sec) were detected for samples bonded using Al{sub 2}O{sub 3}. More importantly, due to the excellent thermal conductivity performance of Al{sub 2}O{sub 3}, this technology can be used in heterogeneous direct bonding, which has potential applications for enhancing the performance of Si photonic integrated devices.

Lamb wave propagation in monocrystalline silicon wafers

OpenAIRE

Fromme, P.; Pizzolato, M.; Robyr, J-L; Masserey, B.

2018-01-01

Monocrystalline silicon wafers are widely used in the photovoltaic industry for solar panels with high conversion efficiency. Guided ultrasonic waves offer the potential to efficiently detect micro-cracks in the thin wafers. Previous studies of ultrasonic wave propagation in silicon focused on effects of material anisotropy on bulk ultrasonic waves, but the dependence of the wave propagation characteristics on the material anisotropy is not well understood for Lamb waves. The phase slowness a...

Characterizing SOI Wafers By Use Of AOTF-PHI

Science.gov (United States)

Cheng, Li-Jen; Li, Guann-Pyng; Zang, Deyu

1995-01-01

Developmental nondestructive method of characterizing layers of silicon-on-insulator (SOI) wafer involves combination of polarimetric hyperspectral imaging by use of acousto-optical tunable filters (AOTF-PHI) and computational resources for extracting pertinent data on SOI wafers from polarimetric hyperspectral images. Offers high spectral resolution and both ease and rapidity of optical-wavelength tuning. Further efforts to implement all of processing of polarimetric spectral image data in special-purpose hardware for sake of procesing speed. Enables characterization of SOI wafers in real time for online monitoring and adjustment of production. Also accelerates application of AOTF-PHI to other applications in which need for high-resolution spectral imaging, both with and without polarimetry.

The challenges encountered in the integration of an early test wafer surface scanning inspection system into a 450mm manufacturing line

Science.gov (United States)

Lee, Jeffrey; McGarvey, Steve

2013-04-01

The introduction of early test wafer (ETW) 450mm Surface Scanning Inspection Systems (SSIS) into Si manufacturing has brought with it numerous technical, commercial, and logistical challenges on the path to rapid recipe development and subsequent qualification of other 450mm wafer processing equipment. This paper will explore the feasibility of eliminating the Polystyrene Latex Sphere deposition process step and the subsequent creation of SSIS recipes based upon the theoretical optical properties of both the SSIS and the process film stack(s). The process of Polystyrene Latex Sphere deposition for SSIS recipe generation and development is generally accepted on the previous technology nodes for 150/200/300mm wafers. PSL is deposited with a commercially available deposition system onto a non-patterned bare Si or non-patterned filmed Si wafer. After deposition of multiple PSL spots, located in different positions on a wafer, the wafer is inspected on a SSIS and a response curve is generated. The response curve is based on the the light scattering intensity of the NIST certified PSL that was deposited on the wafer. As the initial 450mm Si wafer manufacturing began, there were no inspection systems with sub-90nm sensitivities available for defect and haze level verification. The introduction of a 450mm sub-30nm inspection system into the manufacturing line generated instant challenges. Whereas the 450mm wafers were relatively defect free at 90nm, at 40nm the wafers contained several hundred thousand defects. When PSL was deposited onto wafers with these kinds of defect levels, PSL with signals less than the sub-90nm defects were difficult to extract. As the defectivity level of the wafers from the Si suppliers rapidly improves the challenges of SSIS recipe creation with high defectivity decreases while at the same time the cost of PSL deposition increases. The current cost per wafer is fifteen thousand dollars for a 450mm PSL deposition service. When viewed from the

I-line stepper based overlay evaluation method for wafer bonding applications

Science.gov (United States)

Kulse, P.; Sasai, K.; Schulz, K.; Wietstruck, M.

2018-03-01

In the last decades the semiconductor technology has been driven by Moore's law leading to high performance CMOS technologies with feature sizes of less than 10 nm [1]. It has been pointed out that not only scaling but also the integration of novel components and technology modules into CMOS/BiCMOS technologies is becoming more attractive to realize smart and miniaturized systems [2]. Driven by new applications in the area of communication, health and automation, new components and technology modules such as BiCMOS embedded RF-MEMS, high-Q passives, Sibased microfluidics and InP-SiGe BiCMOS heterointegration have been demonstrated [3-6]. In contrast to standard VLSI processes fabricated on front side of the silicon wafer, these new technology modules additionally require to process the backside of the wafer; thus require an accurate alignment between the front and backside of the wafer. In previous work an advanced back to front side alignment technique and implementation into IHP's 0.25/0.13 µm high performance SiGe:C BiCMOS backside process module has been presented [7]. The developed technique enables a high resolution and accurate lithography on the backside of BiCMOS wafer for additional backside processing. In addition to the aforementioned back side process technologies, new applications like Through-Silicon Vias (TSV) for interposers and advanced substrate technologies for 3D heterogeneous integration demand not only single wafer fabrication but also processing of wafer stacks provided by temporary and permanent wafer bonding [8-9]. In this work, the non-contact infrared alignment system of the Nikon® i-line Stepper NSR-SF150 for both alignment and the overlay determination of bonded wafer stacks with embedded alignment marks are used to achieve an accurate alignment between the different wafer sides. The embedded field image alignment (FIA) marks of the interface and the device wafer top layer are measured in a single measurement job. By taking the

Wafer-level packaging technology for RF applications based on a rigid low-loss spacer substrate

NARCIS (Netherlands)

Polyakov, A.

2006-01-01

As mobile portable devices such as cellular system/phones, smart handheld devices and laptop computers acquire wireless connectivity there is a growing demand for greater levels of RF integration. The holy grail of integration is to have a whole set of different components integrated into one chip.

Making Porous Luminescent Regions In Silicon Wafers

Science.gov (United States)

Fathauer, Robert W.; Jones, Eric W.

1994-01-01

Regions damaged by ion implantation stain-etched. Porous regions within single-crystal silicon wafers fabricated by straightforward stain-etching process. Regions exhibit visible photoluminescence at room temperature and might constitute basis of novel class of optoelectronic devices. Stain-etching process has advantages over recently investigated anodic-etching process. Process works on both n-doped and p-doped silicon wafers. Related development reported in article, "Porous Si(x)Ge(1-x) Layers Within Single Crystals of Si," (NPO-18836).

Wafer plane inspection for advanced reticle defects

Science.gov (United States)

Nagpal, Rajesh; Ghadiali, Firoz; Kim, Jun; Huang, Tracy; Pang, Song

2008-05-01

Readiness of new mask defect inspection technology is one of the key enablers for insertion & transition of the next generation technology from development into production. High volume production in mask shops and wafer fabs demands a reticle inspection system with superior sensitivity complemented by a low false defect rate to ensure fast turnaround of reticle repair and defect disposition (W. Chou et al 2007). Wafer Plane Inspection (WPI) is a novel approach to mask defect inspection, complementing the high resolution inspection capabilities of the TeraScanHR defect inspection system. WPI is accomplished by using the high resolution mask images to construct a physical mask model (D. Pettibone et al 1999). This mask model is then used to create the mask image in the wafer aerial plane. A threshold model is applied to enhance the inspectability of printing defects. WPI can eliminate the mask restrictions imposed on OPC solutions by inspection tool limitations in the past. Historically, minimum image restrictions were required to avoid nuisance inspection stops and/or subsequent loss of sensitivity to defects. WPI has the potential to eliminate these limitations by moving the mask defect inspections to the wafer plane. This paper outlines Wafer Plane Inspection technology, and explores the application of this technology to advanced reticle inspection. A total of twelve representative critical layers were inspected using WPI die-to-die mode. The results from scanning these advanced reticles have shown that applying WPI with a pixel size of 90nm (WPI P90) captures all the defects of interest (DOI) with low false defect detection rates. In validating CD predictions, the delta CDs from WPI are compared against Aerial Imaging Measurement System (AIMS), where a good correlation is established between WPI and AIMSTM.

Low-cost silicon wafer dicing using a craft cutter

KAUST Repository

Fan, Yiqiang; Carreno, Armando Arpys Arevalo; Li, Huawei; Foulds, Ian G.

2014-01-01

feature of 3 mm by 3 mm. We performed this scribing process on the top polished surface of a silicon wafer; we also created a scribing method for the back-unpolished surface in order to protect the structures on the wafer during scribing. Compared

120 mm Single-crystalline perovskite and wafers: towards viable applications

Institute of Scientific and Technical Information of China (English)

Yucheng Liu; Bo Wang; Qingbo Wei; Fengwei Xiao; Haibo Fan; Hao Deng; Liangping Deng; Shengzhong (Frank) Liu; Xiaodong Ren; Jing Zhang; Zhou Yang; Dong Yang; Fengyang Yu; Jiankun Sun; Changming Zhao; Zhun Yao

2017-01-01

As the large single-crystalline silicon wafers have revolutionized many industries including electronics and solar cells,it is envisioned that the availability of large single-crystalline perovskite crystals and wafers will revolutionize its broad applications in photovoltaics,optoelectronics,lasers,photodetectors,light emitting diodes (LEDs),etc.Here we report a method to grow large single-crystalline perovskites including single-halide crystals:CH3NH3PbX3 (X=Ⅰ,Br,Cl),and dual-halide ones:CH3NH3Pb(ClxBr1-x)3 and CH3NH3Pb(BrxI1-x)3,with the largest crystal being 120 mm in length.Meanwhile,we have advanced a process to slice the large perovskite crystals into thin wafers.It is found that the wafers exhibit remarkable features:(1) its trap-state density is a million times smaller than that in the microcrystalline perovskite thin films (MPTF);(2) its carrier mobility is 410 times higher than its most popular organic counterpart P3HT;(3) its optical absorption is expanded to as high as 910 nm comparing to 797 nm for the MPTF;(4) while MPTF decomposes at 150 ℃,the wafer is stable at high temperature up to 270 ℃;(5) when exposed to high humidity (75％ RH),MPTF decomposes in 5 h while the wafer shows no change for overnight;(6) its photocurrent response is 250 times higher than its MPTF counterpart.A few electronic devices have been fabricated using the crystalline wafers.Among them,the Hall test gives low carrier concentration with high mobility.The trap-state density is measured much lower than common semiconductors.Moreover,the large SC-wafer is found particularly useful for mass production of integrated circuits.By adjusting the halide composition,both the optical absorption and the light emission can be fine-tuned across the entire visible spectrum from 400 nm to 800 nm.It is envisioned that a range of visible lasers and LEDs may be developed using the dual-halide perovskites.With fewer trap states,high mobility,broader absorption,and humidity resistance,it is

The uses of Man-Made diamond in wafering applications

Science.gov (United States)

Fallon, D. B.

1982-01-01

The continuing, rapid growth of the semiconductor industry requires the involvement of several specialized industries in the development of special products geared toward the unique requirements of this new industry. A specialized manufactured diamond to meet various material removal needs was discussed. The area of silicon wafer slicing has presented yet anothr challenge and it is met most effectively. The history, operation, and performance of Man-Made diamond and particularly as applied to silicon wafer slicing is discussed. Product development is underway to come up with a diamond specifically for sawing silicon wafers on an electroplated blade.

Development of thin film measurement program of wafer for spin etcher

International Nuclear Information System (INIS)

Seo, Hak Suk; Kim, No Hyu; Kim, Young Chul; Cho, Jung Keun; Bae, Jung Yong

2001-01-01

This paper proposes a thickness measurement method of silicon-oxide and poly-silicon film deposited on 12 inch silicon wafer for spin etcher. Krypton lamp is used as a light source for generating a wide-band spectrum, which is guided and focused on the wafer surface through a optical fiber cable. Interference signal from the film is detected by optical sensor to determine the thickness of the film using spectrum analysis and several signal processing techniques including curve-fitting and filtering. Test wafers with two kinds of priori-known films, silicon-oxide(100nm) and poly-silicon(300nm), are measured under the condition that the wafer is spinning at 20Hz and DI water flowing on the wafer surface. From experiment results the algorithm presented in the paper is proved to be effective with accuracy of maximum 6.5% error.

Development of thin film measurement program of wafer for spin etcher

Energy Technology Data Exchange (ETDEWEB)

Seo, Hak Suk; Kim, No Hyu; Kim, Young Chul [Korea University of Technology and Education, Cheonan (Korea, Republic of); Cho, Jung Keun; Bae, Jung Yong [Korea DNS, Cheonan (Korea, Republic of)

2001-11-15

This paper proposes a thickness measurement method of silicon-oxide and poly-silicon film deposited on 12 inch silicon wafer for spin etcher. Krypton lamp is used as a light source for generating a wide-band spectrum, which is guided and focused on the wafer surface through a optical fiber cable. Interference signal from the film is detected by optical sensor to determine the thickness of the film using spectrum analysis and several signal processing techniques including curve-fitting and filtering. Test wafers with two kinds of priori-known films, silicon-oxide(100nm) and poly-silicon(300nm), are measured under the condition that the wafer is spinning at 20Hz and DI water flowing on the wafer surface. From experiment results the algorithm presented in the paper is proved to be effective with accuracy of maximum 6.5% error.

Study of the semiconductor properties by irradiation, 8. Study of trapping center by. gamma. -ray on Si wafer

Energy Technology Data Exchange (ETDEWEB)

Nakamura, Koji; Shioya, Hitoshi; Nagamatsu, Yasuhiko; Ogura, Shoji [Miyazaki Univ. (Japan). Faculty of Engineering

1983-08-01

In order to know the effects of ..gamma..-ray irradiation on n-type Si-wafers, the author did ..gamma..-ray irradiation experiments on n-type Si-wafers. They then observed the trapping center by using DLTS and ICTS equipments. The trapping center level, which is produced by ..gamma..-ray, is about 0.49 eV. In addition, the authors discuss the recombination rate.

Penggunaan Limbah Kopi Sebagai Bahan Penyusun Ransum Itik Peking dalam Bentuk Wafer Ransum Komplit

Directory of Open Access Journals (Sweden)

Muhammad Daud

2013-04-01

Full Text Available Effect of coffee waste as component of compiler ration peking duck in the form of wafer complete ration ABSTRACT. Coffee waste is a by-product of coffee processing that potential to be used as feed stuff for peking duck. The weakness of this coffee waste, among others, is perishable, voluminous (bulky and the availability was fluctuated so the processing technology is needed to make this vegetable waste to be durable, easy to stored and to be given to livestock. To solve this problem vegetable waste could be formed as wafer. This research was conducted to study effectiveness of coffee waste as component of compiler ration peking duck in the form of wafer complete ration This experiment was run in completely randomized design which consist of 4 feed treatment and 3 replications.  Ration used was consisted of  P0 = wafer complete ration 0% coffee waste (control, P1 = wafer complete ration 2,5% coffee waste, P2 = wafer complete ration 5% coffee waste, and P3 = Wafer complete ration 7,5% coffee waste. The Variables observed were: physical characteristic (aroma, color, and wafer density and palatability of wafer complete ration. Data collected was analyzed with ANOVA and Duncan Range Test would be used if the result was significantly different. The result showed that the density of wafer complete ration coffee waste was significantly (P< 0.05 differences between of treatment. Mean density wafer complete ration equal to: P0= 0,52±0,03, P1 =0,67±0,04, P2 =0,72±0,03, and P3 = 0,76±0.05 g/cm3. Wafer complete ration coffee waste palatability was significantly (P< 0.05 differences between of treatment. It is concluded that of wafer complete ration composition 5 and 7,5% coffee waste was significantly wafer palatability and gave a highest wafer density. The ration P0 was the most palatable compare to other treatments for the experimental peking duck.

Edge printability: techniques used to evaluate and improve extreme wafer edge printability

Science.gov (United States)

Roberts, Bill; Demmert, Cort; Jekauc, Igor; Tiffany, Jason P.

2004-05-01

The economics of semiconductor manufacturing have forced process engineers to develop techniques to increase wafer yield. Improvements in process controls and uniformities in all areas of the fab have reduced film thickness variations at the very edge of the wafer surface. This improved uniformity has provided the opportunity to consider decreasing edge exclusions, and now the outermost extents of the wafer must be considered in the yield model and expectations. These changes have increased the requirements on lithography to improve wafer edge printability in areas that previously were not even coated. This has taxed all software and hardware components used in defining the optical focal plane at the wafer edge. We have explored techniques to determine the capabilities of extreme wafer edge printability and the components of the systems that influence this printability. We will present current capabilities and new detection techniques and the influence that the individual hardware and software components have on edge printability. We will show effects of focus sensor designs, wafer layout, utilization of dummy edge fields, the use of non-zero overlay targets and chemical/optical edge bead optimization.

Wafer-shape metrics based foundry lithography

Science.gov (United States)

Kim, Sungtae; Liang, Frida; Mileham, Jeffrey; Tsai, Damon; Bouche, Eric; Lee, Sean; Huang, Albert; Hua, C. F.; Wei, Ming Sheng

2017-03-01

As device shrink, there are many difficulties with process integration and device yield. Lithography process control is expected to be a major challenge due to tighter overlay and focus control requirement. The understanding and control of stresses accumulated during device fabrication has becoming more critical at advanced technology nodes. Within-wafer stress variations cause local wafer distortions which in turn present challenges for managing overlay and depth of focus during lithography. A novel technique for measuring distortion is Coherent Gradient Sensing (CGS) interferometry, which is capable of generating a high-density distortion data set of the full wafer within a time frame suitable for a high volume manufacturing (HVM) environment. In this paper, we describe the adoption of CGS (Coherent Gradient Sensing) interferometry into high volume foundry manufacturing to overcome these challenges. Leveraging this high density 3D metrology, we characterized its In-plane distortion as well as its topography capabilities applied to the full flow of an advanced foundry manufacturing. Case studies are presented that summarize the use of CGS data to reveal correlations between in-plane distortion and overlay variation as well as between topography and device yield.

Nonlinear resonance ultrasonic vibrations in Czochralski-silicon wafers

Science.gov (United States)

Ostapenko, S.; Tarasov, I.

2000-04-01

A resonance effect of generation of subharmonic acoustic vibrations is observed in as-grown, oxidized, and epitaxial silicon wafers. Ultrasonic vibrations were generated into a standard 200 mm Czochralski-silicon (Cz-Si) wafer using a circular ultrasound transducer with major frequency of the radial vibrations at about 26 kHz. By tuning frequency (f) of the transducer within a resonance curve, we observed a generation of intense f/2 subharmonic acoustic mode assigned as a "whistle." The whistle mode has a threshold amplitude behavior and narrow frequency band. The whistle is attributed to a nonlinear acoustic vibration of a silicon plate. It is demonstrated that characteristics of the whistle mode are sensitive to internal stress and can be used for quality control and in-line diagnostics of oxidized and epitaxial Cz-Si wafers.

Wafer size effect on material removal rate in copper CMP process

Energy Technology Data Exchange (ETDEWEB)

Yuh, Minjong; Jang, Soocheon; Park, Inho; Jeong, Haedo [Pusan National University, Busan (Korea, Republic of)

2017-06-15

The semiconductor industry has employed the Chemical mechanical planarization (CMP) to enable surface topography control. Copper has been used to build interconnects because of its low-resistivity and high-electromigration. In this study, the effect of wafer size on the Material removal rate (MRR) in copper CMP process was investigated. CMP experiments were conducted using copper blanket wafers with diameter of 100, 150, 200 and 300 mm, while temperature and friction force were measured by infrared and piezoelectric sen-sors. The MRR increases with an increase in wafer size under the same process conditions. The wafer size increased the sliding distance of pad, resulting in an increase in the process temperature. This increased the process temperature, accelerating the chemical etching rate and the dynamic etch rate. The sliding distance of the pad was proportional to the square of the wafer radius; it may be used to predict CMP results and design a CMP machine.

GeSn-on-insulator substrate formed by direct wafer bonding

Energy Technology Data Exchange (ETDEWEB)

Lei, Dian; Wang, Wei; Gong, Xiao, E-mail: elegong@nus.edu.sg, E-mail: yeo@ieee.org; Yeo, Yee-Chia, E-mail: elegong@nus.edu.sg, E-mail: yeo@ieee.org [Department of Electrical and Computer Engineering, National University of Singapore, Singapore 117576 (Singapore); Lee, Kwang Hong; Wang, Bing [Low Energy Electronic Systems (LEES), Singapore MIT Alliance for Research and Technology (SMART), 1 CREATE Way, #10-01 CREATE Tower, Singapore 138602 (Singapore); Bao, Shuyu [Low Energy Electronic Systems (LEES), Singapore MIT Alliance for Research and Technology (SMART), 1 CREATE Way, #10-01 CREATE Tower, Singapore 138602 (Singapore); School of Electrical and Electronic Engineering, Nanyang Technological University, 50 Nanyang Avenue, Singapore 639798 (Singapore); Tan, Chuan Seng [School of Electrical and Electronic Engineering, Nanyang Technological University, 50 Nanyang Avenue, Singapore 639798 (Singapore)

2016-07-11

GeSn-on-insulator (GeSnOI) on Silicon (Si) substrate was realized using direct wafer bonding technique. This process involves the growth of Ge{sub 1-x}Sn{sub x} layer on a first Si (001) substrate (donor wafer) followed by the deposition of SiO{sub 2} on Ge{sub 1-x}Sn{sub x}, the bonding of the donor wafer to a second Si (001) substrate (handle wafer), and removal of the Si donor wafer. The GeSnOI material quality is investigated using high-resolution transmission electron microscopy, high-resolution X-ray diffraction (HRXRD), atomic-force microscopy, Raman spectroscopy, and spectroscopic ellipsometry. The Ge{sub 1-x}Sn{sub x} layer on GeSnOI substrate has a surface roughness of 1.90 nm, which is higher than that of the original Ge{sub 1-x}Sn{sub x} epilayer before transfer (surface roughness is 0.528 nm). The compressive strain of the Ge{sub 1-x}Sn{sub x} film in the GeSnOI is as low as 0.10% as confirmed using HRXRD and Raman spectroscopy.

The Systems Biology Markup Language (SBML) Level 3 Package: Qualitative Models, Version 1, Release 1.

Science.gov (United States)

Chaouiya, Claudine; Keating, Sarah M; Berenguier, Duncan; Naldi, Aurélien; Thieffry, Denis; van Iersel, Martijn P; Le Novère, Nicolas; Helikar, Tomáš

2015-09-04

Quantitative methods for modelling biological networks require an in-depth knowledge of the biochemical reactions and their stoichiometric and kinetic parameters. In many practical cases, this knowledge is missing. This has led to the development of several qualitative modelling methods using information such as, for example, gene expression data coming from functional genomic experiments. The SBML Level 3 Version 1 Core specification does not provide a mechanism for explicitly encoding qualitative models, but it does provide a mechanism for SBML packages to extend the Core specification and add additional syntactical constructs. The SBML Qualitative Models package for SBML Level 3 adds features so that qualitative models can be directly and explicitly encoded. The approach taken in this package is essentially based on the definition of regulatory or influence graphs. The SBML Qualitative Models package defines the structure and syntax necessary to describe qualitative models that associate discrete levels of activities with entity pools and the transitions between states that describe the processes involved. This is particularly suited to logical models (Boolean or multi-valued) and some classes of Petri net models can be encoded with the approach.

Microelectronic packaging

CERN Document Server

Datta, M; Schultze, J Walter

2004-01-01

Microelectronic Packaging analyzes the massive impact of electrochemical technologies on various levels of microelectronic packaging. Traditionally, interconnections within a chip were considered outside the realm of packaging technologies, but this book emphasizes the importance of chip wiring as a key aspect of microelectronic packaging, and focuses on electrochemical processing as an enabler of advanced chip metallization.Divided into five parts, the book begins by outlining the basics of electrochemical processing, defining the microelectronic packaging hierarchy, and emphasizing the impac

Wafer-level integration of NiTi shape memory alloy on silicon using Au–Si eutectic bonding

International Nuclear Information System (INIS)

Gradin, Henrik; Bushra, Sobia; Braun, Stefan; Stemme, Göran; Van der Wijngaart, Wouter

2013-01-01

This paper reports on the wafer level integration of NiTi shape memory alloy (SMA) sheets with silicon substrates through Au–Si eutectic bonding. Different bond parameters, such as Au layer thicknesses and substrate surface treatments were evaluated. The amount of gold in the bond interface is the most important parameter to achieve a high bond yield; the amount can be determined by the barrier layers between the Au and Si or by the amount of Au deposition. Deposition of a gold layer of more than 1 μm thickness before bonding gives the most promising results. Through patterning of the SMA sheet and by limiting bonding to small areas, stresses created by the thermal mismatch between Si and NiTi are reduced. With a gold layer of 1 μm thickness and bond areas between 200 × 200 and 800 × 800 μm 2 a high bond strength and a yield above 90% is demonstrated. (paper)

Synchrotron radiation total reflection x-ray fluorescence analysis; of polymer coated silicon wafers

International Nuclear Information System (INIS)

Brehm, L.; Kregsamer, P.; Pianetta, P.

2000-01-01

It is well known that total reflection x-ray fluorescence (TXRF) provides an efficient method for analyzing trace metal contamination on silicon wafer surfaces. New polymeric materials used as interlayer dielectrics in microprocessors are applied to the surface of silicon wafers by a spin-coating process. Analysis of these polymer coated wafers present a new challenge for TXRF analysis. Polymer solutions are typically analyzed for bulk metal contamination prior to application on the wafer using inductively coupled plasma mass spectrometry (ICP-MS). Questions have arisen about how to relate results of surface contamination analysis (TXRF) of a polymer coated wafer to bulk trace analysis (ICP-MS) of the polymer solutions. Experiments were done to explore this issue using synchrotron radiation (SR) TXRF. Polymer solutions were spiked with several different concentrations of metals. These solutions were applied to silicon wafers using the normal spin-coating process. The polymer coated wafers were then measured using the SR-TXRF instrument set-up at the Stanford Synchrotron Radiation Laboratory (SSRL). Several methods of quantitation were evaluated. The best results were obtained by developing calibration curves (intensity versus ppb) using the spiked polymer coated wafers as standards. Conversion of SR-TXRF surface analysis results (atoms/cm 2 ) to a volume related concentration was also investigated. (author)

Wafer-scale fabrication of polymer distributed feedback lasers

DEFF Research Database (Denmark)

Christiansen, Mads Brøkner; Schøler, Mikkel; Balslev, Søren

2006-01-01

The authors demonstrate wafer-scale, parallel process fabrication of distributed feedback (DFB) polymer dye lasers by two different nanoimprint techniques: By thermal nanoimprint lithography (TNIL) in polymethyl methacrylate and by combined nanoimprint and photolithography (CNP) in SU-8. In both...... techniques, a thin film of polymer, doped with rhodamine-6G laser dye, is spin coated onto a Borofloat glass buffer substrate and shaped into a planar waveguide slab with first order DFB surface corrugations forming the laser resonator. When optically pumped at 532 nm, lasing is obtained in the wavelength...... range between 576 and 607 nm, determined by the grating period. The results, where 13 laser devices are defined across a 10 cm diameter wafer substrate, demonstrate the feasibility of NIL and CNP for parallel wafer-scale fabrication of advanced nanostructured active optical polymer components...

In vitro and in vivo evaluation of a sublingual fentanyl wafer formulation

Science.gov (United States)

Lim, Stephen CB; Paech, Michael J; Sunderland, Bruce; Liu, Yandi

2013-01-01

Background The objective of this study was to prepare a novel fentanyl wafer formulation by a freeze-drying method, and to evaluate its in vitro and in vivo release characteristics, including its bioavailability via the sublingual route. Methods The wafer formulation was prepared by freeze-drying an aqueous dispersion of fentanyl containing sodium carboxymethylcellulose and amylogum as matrix formers. Uniformity of weight, friability, and dissolution testing of the fentanyl wafer was achieved using standard methods, and the residual moisture content was measured. The fentanyl wafer was also examined using scanning electron microscopy and x-ray diffraction. The absolute bioavailability of the fentanyl wafer was evaluated in 11 opioid-naïve adult female patients using a randomized crossover design. Results In vitro release showed that almost 90% of the fentanyl dissolved in one minute. In vivo, the first detectable plasma fentanyl concentration was observed after 3.5 minutes and the peak plasma concentration between 61.5 and 67 minutes. The median absolute bioavailability was 53.0%. Conclusion These results indicate that this wafer has potential as an alternative sublingual fentanyl formulation. PMID:23596347

High Speed On-Wafer Characterization Laboratory

Data.gov (United States)

Federal Laboratory Consortium — At the High Speed On-Wafer Characterization Laboratory, researchers characterize and model devices operating at terahertz (THz) and millimeter-wave frequencies. The...

Magnetron target designs to improve wafer edge trench filling in ionized metal physical vapor deposition

International Nuclear Information System (INIS)

Lu Junqing; Yoon, Jae-Hong; Shin, Keesam; Park, Bong-Gyu; Yang Lin

2006-01-01

Severe asymmetry of the metal deposits on the trench sidewalls occurs near the wafer edge during low pressure ionized metal physical vapor deposition of Cu seed layer for microprocessor interconnects. To investigate this process and mitigate the asymmetry, an analytical view factor model based on the analogy between metal sputtering and diffuse thermal radiation was constructed. The model was validated based on the agreement between the model predictions and the reported experimental values for the asymmetric metal deposition at trench sidewalls near the wafer edge for a 200 mm wafer. This model could predict the thickness of the metal deposits across the wafer, the symmetry of the deposits on the trench sidewalls at any wafer location, and the angular distributions of the metal fluxes arriving at any wafer location. The model predictions for the 300 mm wafer indicate that as the target-to-wafer distance is shortened, the deposit thickness increases and the asymmetry decreases, however the overall uniformity decreases. Up to reasonable limits, increasing the target size and the sputtering intensity for the outer target portion significantly improves the uniformity across the wafer and the symmetry on the trench sidewalls near the wafer edge

Application of geometry correction factors for low-level waste package dose measurements. Revision 1

International Nuclear Information System (INIS)

Chandler, M.C.; Parish, B.

1995-01-01

Plans are to determine the Cs-137 content of low-level waste packages generated in High-Level Waste by measuring the radiation level at a specified distance from the package with a hand-held radiation instrument. The measurement taken at this specified distance, either 3 or 5 feet, is called the far-field measurement. This report documents a method for adjusting the gamma exposure rate (mR/hr) reading used in dose-to-curie determinations when the far-field measurement equals the background reading. This adjustment is necessary to reduce the conservatism resulting from using a minimum detection limit exposure rate for the dose-to-curie determination for the far-field measurement position. To accomplish this adjustment, the near-field (5 cm) measurement is multiplied by a geometry correction factor to obtain an estimate of the far field exposure rate (which is below instrument sensitivity). This estimate of the far field exposure rate is used to estimate the Cs-137 curie content of the package. This report establishes the geometry correction factors for the dose-to-curie determination when the far-field gamma exposure measurement equals the background reading. This report also provides a means of demonstrating compliance to 1S Manual requirements for exposure rate readings at different locations from waste packages while specifying only two measurement positions. This demonstration of compliance is necessary to minimize the number of locations exposure rate measurements that are required, i.e., ALARA

High frequency guided wave propagation in monocrystalline silicon wafers

Science.gov (United States)

Pizzolato, Marco; Masserey, Bernard; Robyr, Jean-Luc; Fromme, Paul

2017-04-01

Monocrystalline silicon wafers are widely used in the photovoltaic industry for solar panels with high conversion efficiency. The cutting process can introduce micro-cracks in the thin wafers and lead to varying thickness. High frequency guided ultrasonic waves are considered for the structural monitoring of the wafers. The anisotropy of the monocrystalline silicon leads to variations of the wave characteristics, depending on the propagation direction relative to the crystal orientation. Full three-dimensional Finite Element simulations of the guided wave propagation were conducted to visualize and quantify these effects for a line source. The phase velocity (slowness) and skew angle of the two fundamental Lamb wave modes (first anti-symmetric mode A0 and first symmetric mode S0) for varying propagation directions relative to the crystal orientation were measured experimentally. Selective mode excitation was achieved using a contact piezoelectric transducer with a custom-made wedge and holder to achieve a controlled contact pressure. The out-of-plane component of the guided wave propagation was measured using a noncontact laser interferometer. Good agreement was found with the simulation results and theoretical predictions based on nominal material properties of the silicon wafer.

Development of parametric material, energy, and emission inventories for wafer fabrication in the semiconductor industry.

Science.gov (United States)

Murphy, Cynthia F; Kenig, George A; Allen, David T; Laurent, Jean-Philippe; Dyer, David E

2003-12-01

Currently available data suggest that most of the energy and material consumption related to the production of an integrated circuit is due to the wafer fabrication process. The complexity of wafer manufacturing, requiring hundreds of steps that vary from product to product and from facility to facility and which change every few years, has discouraged the development of material, energy, and emission inventory modules for the purpose of insertion into life cycle assessments. To address this difficulty, a flexible, process-based system for estimating material requirements, energy requirements, and emissions in wafer fabrication has been developed. The method accounts for mass and energy use atthe unit operation level. Parametric unit operation modules have been developed that can be used to predict changes in inventory as the result of changes in product design, equipment selection, or process flow. A case study of the application of the modules is given for energy consumption, but a similar methodology can be used for materials, individually or aggregated.

Influence of Si wafer thinning processes on (sub)surface defects

Energy Technology Data Exchange (ETDEWEB)

Inoue, Fumihiro, E-mail: fumihiro.inoue@imec.be [Imec, Kapeldreef 75, 3001 Leuven (Belgium); Jourdain, Anne; Peng, Lan; Phommahaxay, Alain; De Vos, Joeri; Rebibis, Kenneth June; Miller, Andy; Sleeckx, Erik; Beyne, Eric [Imec, Kapeldreef 75, 3001 Leuven (Belgium); Uedono, Akira [Division of Applied Physics, Faculty of Pure and Applied Science, University of Tsukuba, Tsukuba, Ibaraki 305-8573 (Japan)

2017-05-15

Highlights: • Mono-vacancy free Si-thinning can be accomplished by combining several thinning techniques. • The grinding damage needs to be removed prior to dry etching, otherwise vacancies remain in the Si at a depth around 0.5 to 2 μm after Si wafer thickness below 5 μm. • The surface of grinding + CMP + dry etching is equivalent mono vacancy level as that of grinding + CMP. - Abstract: Wafer-to-wafer three-dimensional (3D) integration with minimal Si thickness can produce interacting multiple devices with significantly scaled vertical interconnections. Realizing such a thin 3D structure, however, depends critically on the surface and subsurface of the remaining backside Si after the thinning processes. The Si (sub)surface after mechanical grinding has already been characterized fruitfully for a range of few dozen of μm. Here, we expand the characterization of Si (sub)surface to 5 μm thickness after thinning process on dielectric bonded wafers. The subsurface defects and damage layer were investigated after grinding, chemical mechanical polishing (CMP), wet etching and plasma dry etching. The (sub)surface defects were characterized using transmission microscopy, atomic force microscopy, and positron annihilation spectroscopy. Although grinding provides the fastest removal rate of Si, the surface roughness was not compatible with subsequent processing. Furthermore, mechanical damage such as dislocations and amorphous Si cannot be reduced regardless of Si thickness and thin wafer handling systems. The CMP after grinding showed excellent performance to remove this grinding damage, even though the removal amount is 1 μm. For the case of Si thinning towards 5 μm using grinding and CMP, the (sub)surface is atomic scale of roughness without vacancy. For the case of grinding + dry etch, vacancy defects were detected in subsurface around 0.5–2 μm. The finished surface after wet etch remains in the nm scale in the strain region. By inserting a CMP step in

Hanford high-level waste melter system evaluation data packages

International Nuclear Information System (INIS)

Elliott, M.L.; Shafer, P.J.; Lamar, D.A.; Merrill, R.A.; Grunewald, W.; Roth, G.; Tobie, W.

1996-03-01

The Tank Waste Remediation System is selecting a reference melter system for the Hanford High-Level Waste vitrification plant. A melter evaluation was conducted in FY 1994 to narrow down the long list of potential melter technologies to a few for testing. A formal evaluation was performed by a Melter Selection Working Group (MSWG), which met in June and August 1994. At the June meeting, MSWG evaluated 15 technologies and selected six for more thorough evaluation at the Aug. meeting. All 6 were variations of joule-heated or induction-heated melters. Between the June and August meetings, Hanford site staff and consultants compiled data packages for each of the six melter technologies as well as variants of the baseline technologies. Information was solicited from melter candidate vendors to supplement existing information. This document contains the data packages compiled to provide background information to MSWG in support of the evaluation of the six technologies. (A separate evaluation was performed by Fluor Daniel, Inc. to identify balance of plant impacts if a given melter system was selected.)

TXRF with synchrotron radiation. Analysis of Ni on Si-wafer surfaces

Energy Technology Data Exchange (ETDEWEB)

Wobrauschek, P [Atominstitut der Oesterreichischen Universitaeten, Vienna (Austria); Kregsamer, P [Atominstitut der Oesterreichischen Universitaeten, Vienna (Austria); Ladisich, W [Atominstitut der Oesterreichischen Universitaeten, Vienna (Austria); Streli, C [Atominstitut der Oesterreichischen Universitaeten, Vienna (Austria); Pahlke, S [Wacker Chemitronic GmbH, D-84479 Burghausen (Germany); Fabry, L [Wacker Chemitronic GmbH, D-84479 Burghausen (Germany); Garbe, S [Institut fuer Anorg. u. Angew. Chemie, Universitaet Hamburg, Martin-Luther King-Pl.6, D-20146 Hamburg (Germany); Haller, M [Institut fuer Anorg. u. Angew. Chemie, Universitaet Hamburg, Martin-Luther King-Pl.6, D-20146 Hamburg (Germany); Knoechel, A [Institut fuer Anorg. u. Angew. Chemie, Universitaet Hamburg, Martin-Luther King-Pl.6, D-20146 Hamburg (Germany); Radtke, M [Institut fuer Anorg. u. Angew. Chemie, Universitaet Hamburg, Martin-Luther King-Pl.6, D-20146 Hamburg (Germany)

1995-09-11

SR-TXRF (Synchrotron Radiation excited Total Reflection X-ray Fluorescence Analysis) with monoenergetic radiation produced by a W/C multilayer monochromator has been applied to the analysis of Ni on a Si-wafer surface. An intentionally contaminated wafer with 100 pg has been used to determine the detection limits. 13 fg have been achieved for Ni at a beam current of 73 mA and extrapolated to 1000 s. This technique simulates the sample preparation technique of Vapour Phase Decomposition (VPD) on a wafer surface. (orig.).

TXRF with synchrotron radiation. Analysis of Ni on Si-wafer surfaces

International Nuclear Information System (INIS)

Wobrauschek, P.; Kregsamer, P.; Ladisich, W.; Streli, C.; Pahlke, S.; Fabry, L.; Garbe, S.; Haller, M.; Knoechel, A.; Radtke, M.

1995-01-01

SR-TXRF (Synchrotron Radiation excited Total Reflection X-ray Fluorescence Analysis) with monoenergetic radiation produced by a W/C multilayer monochromator has been applied to the analysis of Ni on a Si-wafer surface. An intentionally contaminated wafer with 100 pg has been used to determine the detection limits. 13 fg have been achieved for Ni at a beam current of 73 mA and extrapolated to 1000 s. This technique simulates the sample preparation technique of Vapour Phase Decomposition (VPD) on a wafer surface. (orig.)

Warpage Characteristics and Process Development of Through Silicon Via-Less Interconnection Technology.

Science.gov (United States)

Shen, Wen-Wei; Lin, Yu-Min; Wu, Sheng-Tsai; Lee, Chia-Hsin; Huang, Shin-Yi; Chang, Hsiang-Hung; Chang, Tao-Chih; Chen, Kuan-Neng

2018-08-01

In this study, through silicon via (TSV)-less interconnection using the fan-out wafer-level-packaging (FO-WLP) technology and a novel redistribution layer (RDL)-first wafer level packaging are investigated. Since warpage of molded wafer is a critical issue and needs to be optimized for process integration, the evaluation of the warpage issue on a 12-inch wafer using finite element analysis (FEA) at various parameters is presented. Related parameters include geometric dimension (such as chip size, chip number, chip thickness, and mold thickness), materials' selection and structure optimization. The effect of glass carriers with various coefficients of thermal expansion (CTE) is also discussed. Chips are bonded onto a 12-inch reconstituted wafer, which includes 2 RDL layers, 3 passivation layers, and micro bumps, followed by using epoxy molding compound process. Furthermore, an optical surface inspector is adopted to measure the surface profile and the results are compared with the results from simulation. In order to examine the quality of the TSV-less interconnection structure, electrical measurement is conducted and the respective results are presented.

Silicon wafer wettability and aging behaviors: Impact on gold thin-film morphology

KAUST Repository

Yang, Xiaoming

2014-10-01

This paper reports on the wettability and aging behaviors of the silicon wafers that had been cleaned using a piranha (3:1 mixture of sulfuric acid (H2SO4, 96%) and hydrogen peroxide (H2O 2, 30%), 120 °C), SC1 (1:1:5 mixture of NH4OH, H 2O2 and H2O, at 80°C) or HF solution (6 parts of 40% NH4F and 1 part of 49% HF, at room temperature) solution, and treated with gaseous plasma. The silicon wafers cleaned using the piranha or SC1 solution were hydrophilic, and the water contact angles on the surfaces would increase along with aging time, until they reached the saturated points of around 70°. The contact angle increase rate of these wafers in a vacuum was much faster than that in the open air, because of loss of water, which was physically adsorbed on the wafer surfaces. The silicon wafers cleaned with the HF solution were hydrophobic. Their contact angle decreased in the atmosphere, while it increased in the vacuum up to 95°. Gold thin films deposited on the hydrophilic wafers were smoother than that deposited on the hydrophobic wafers, because the numerous oxygen groups formed on the hydrophilic surfaces would react with gold adatoms in the sputtering process to form a continuous thin film at the nucleation stage. The argon, nitrogen, oxygen gas plasma treatments could change the silicon wafer surfaces from hydrophobic to hydrophilic by creating a thin (around 2.5 nm) silicon dioxide film, which could be utilized to improve the roughness and adhesion of the gold thin film. © 2014 Elsevier Ltd. All rights reserved.

Silicon wafer wettability and aging behaviors: Impact on gold thin-film morphology

KAUST Repository

Yang, Xiaoming; Zhong, Zhaowei; Diallo, Elhadj; Wang, Zhihong; Yue, Weisheng

2014-01-01

This paper reports on the wettability and aging behaviors of the silicon wafers that had been cleaned using a piranha (3:1 mixture of sulfuric acid (H2SO4, 96%) and hydrogen peroxide (H2O 2, 30%), 120 °C), SC1 (1:1:5 mixture of NH4OH, H 2O2 and H2O, at 80°C) or HF solution (6 parts of 40% NH4F and 1 part of 49% HF, at room temperature) solution, and treated with gaseous plasma. The silicon wafers cleaned using the piranha or SC1 solution were hydrophilic, and the water contact angles on the surfaces would increase along with aging time, until they reached the saturated points of around 70°. The contact angle increase rate of these wafers in a vacuum was much faster than that in the open air, because of loss of water, which was physically adsorbed on the wafer surfaces. The silicon wafers cleaned with the HF solution were hydrophobic. Their contact angle decreased in the atmosphere, while it increased in the vacuum up to 95°. Gold thin films deposited on the hydrophilic wafers were smoother than that deposited on the hydrophobic wafers, because the numerous oxygen groups formed on the hydrophilic surfaces would react with gold adatoms in the sputtering process to form a continuous thin film at the nucleation stage. The argon, nitrogen, oxygen gas plasma treatments could change the silicon wafer surfaces from hydrophobic to hydrophilic by creating a thin (around 2.5 nm) silicon dioxide film, which could be utilized to improve the roughness and adhesion of the gold thin film. © 2014 Elsevier Ltd. All rights reserved.

Bondability of processed glass wafers

NARCIS (Netherlands)

Pandraud, G.; Gui, C.; Lambeck, Paul; Pigeon, F.; Parriaux, O.; Gorecki, Christophe

1999-01-01

The mechanism of direct bonding at room temperature has been attributed to the short range inter-molecular and inter-atomic attraction forces, such as Van der Waals forces. Consequently, the wafer surface smoothness becomes one of the most critical parameters in this process. High surface roughness

ILT based defect simulation of inspection images accurately predicts mask defect printability on wafer

Science.gov (United States)

Deep, Prakash; Paninjath, Sankaranarayanan; Pereira, Mark; Buck, Peter

2016-05-01

printability of defects at wafer level and automates the process of defect dispositioning from images captured using high resolution inspection machine. It first eliminates false defects due to registration, focus errors, image capture errors and random noise caused during inspection. For the remaining real defects, actual mask-like contours are generated using the Calibre® ILT solution [1][2], which is enhanced to predict the actual mask contours from high resolution defect images. It enables accurate prediction of defect contours, which is not possible from images captured using inspection machine because some information is already lost due to optical effects. Calibre's simulation engine is used to generate images at wafer level using scanner optical conditions and mask-like contours as input. The tool then analyses simulated images and predicts defect printability. It automatically calculates maximum CD variation and decides which defects are severe to affect patterns on wafer. In this paper, we assess the printability of defects for the mask of advanced technology nodes. In particular, we will compare the recovered mask contours with contours extracted from SEM image of the mask and compare simulation results with AIMSTM for a variety of defects and patterns. The results of printability assessment and the accuracy of comparison are presented in this paper. We also suggest how this method can be extended to predict printability of defects identified on EUV photomasks.

CDIAC catalog of numeric data packages and computer model packages

International Nuclear Information System (INIS)

Boden, T.A.; Stoss, F.W.

1993-05-01

The Carbon Dioxide Information Analysis Center acquires, quality-assures, and distributes to the scientific community numeric data packages (NDPs) and computer model packages (CMPs) dealing with topics related to atmospheric trace-gas concentrations and global climate change. These packages include data on historic and present atmospheric CO 2 and CH 4 concentrations, historic and present oceanic CO 2 concentrations, historic weather and climate around the world, sea-level rise, storm occurrences, volcanic dust in the atmosphere, sources of atmospheric CO 2 , plants' response to elevated CO 2 levels, sunspot occurrences, and many other indicators of, contributors to, or components of climate change. This catalog describes the packages presently offered by CDIAC, reviews the processes used by CDIAC to assure the quality of the data contained in these packages, notes the media on which each package is available, describes the documentation that accompanies each package, and provides ordering information. Numeric data are available in the printed NDPs and CMPs, in CD-ROM format, and from an anonymous FTP area via Internet. All CDIAC information products are available at no cost

Lamb wave propagation in monocrystalline silicon wafers.

Science.gov (United States)

Fromme, Paul; Pizzolato, Marco; Robyr, Jean-Luc; Masserey, Bernard

2018-01-01

Monocrystalline silicon wafers are widely used in the photovoltaic industry for solar panels with high conversion efficiency. Guided ultrasonic waves offer the potential to efficiently detect micro-cracks in the thin wafers. Previous studies of ultrasonic wave propagation in silicon focused on effects of material anisotropy on bulk ultrasonic waves, but the dependence of the wave propagation characteristics on the material anisotropy is not well understood for Lamb waves. The phase slowness and beam skewing of the two fundamental Lamb wave modes A 0 and S 0 were investigated. Experimental measurements using contact wedge transducer excitation and laser measurement were conducted. Good agreement was found between the theoretically calculated angular dependency of the phase slowness and measurements for different propagation directions relative to the crystal orientation. Significant wave skew and beam widening was observed experimentally due to the anisotropy, especially for the S 0 mode. Explicit finite element simulations were conducted to visualize and quantify the guided wave beam skew. Good agreement was found for the A 0 mode, but a systematic discrepancy was observed for the S 0 mode. These effects need to be considered for the non-destructive testing of wafers using guided waves.

Determination of wafer center position during the transfer process by using the beam-breaking method

International Nuclear Information System (INIS)

Chen, Yi-Cheng; Wang, Zhi-Gen; Huang, Bo-Kai

2014-01-01

A wafer on a robot blade may slip due to inertia sliding during the acceleration or deceleration process. This study presents the implementation and experimental verification of a novel real-time wafer positioning system to be used during the transfer process. A system-integration computer program involving a human–machine interface (HMI) was also developed, exhibiting the following functions: (a) moving direction judgment; (b) notch-passing judgment; (c) indicating the sensor by which the notch passes; and (d) computing the wafer center in real time. The position of the wafer center is calculated based on the time-sequence of the beam-breaking signals from two optical sensors, and the geometric relations among the sensing points of the robot blade and wafer. When using eight-inch wafers, the experimental results indicated the capabilities of the proposed positioning system under various conditions, including distinct parameters regarding the moving direction, wafer displacement and notch-passing sensors. The accuracy and precision (repeatability) of the measurement in various conditions were calculated and discussed. Furthermore, the experimental results demonstrate that, after combining the novel wafer positioning system and HMI program, the proposed method can be used to compute the position of the wafer center in real time in various conditions. (paper)

The Systems Biology Markup Language (SBML Level 3 Package: Layout, Version 1 Core

Directory of Open Access Journals (Sweden)

Gauges Ralph

2015-06-01

Full Text Available Many software tools provide facilities for depicting reaction network diagrams in a visual form. Two aspects of such a visual diagram can be distinguished: the layout (i.e.: the positioning and connections of the elements in the diagram, and the graphical form of the elements (for example, the glyphs used for symbols, the properties of the lines connecting them, and so on. For software tools that also read and write models in SBML (Systems Biology Markup Language format, a common need is to store the network diagram together with the SBML representation of the model. This in turn raises the question of how to encode the layout and the rendering of these diagrams. The SBML Level 3 Version 1 Core specification does not provide a mechanism for explicitly encoding diagrams, but it does provide a mechanism for SBML packages to extend the Core specification and add additional syntactical constructs. The Layout package for SBML Level 3 adds the necessary features to SBML so that diagram layouts can be encoded in SBML files, and a companion package called SBML Rendering specifies how the graphical rendering of elements can be encoded.

Evaluation of low and intermediate level radioactive solidified waste forms and packages

International Nuclear Information System (INIS)

1990-10-01

Evaluation of low and intermediate level radioactive waste forms and packages with respect to compliance with quality and safety requirements for transport, interim storage and disposal has become a very important part of the radioactive waste management strategy in many countries. The evaluation of waste forms and packages provides precise basic data for regulatory bodies to establish safety requirements, and implement quality control and quality assurance procedures for radioactive waste management programmes. The requirements depend very much upon the disposal option selected, treatment technology used, waste form characteristics, package quality and other factors. The regulatory requirements can also influence the methodology of waste form/package evaluation together with selection and analysis of data for quality control and safety assurance. A coordinated research programme started at the end of 1985 and brought together 12 participants from 11 countries. The results of the programme and each particular project were discussed at three Research Coordination Meetings held in Cairo, Egypt, in May, 1986; in Beijing, China, in April, 1998; and at Harwell Laboratory, United Kingdom, in November, 1989. This document summarises the salient features and results achieved during the four year investigation and a recommendation for future work in this area. Refs, figs and tabs

In vitro and in vivo evaluation of a sublingual fentanyl wafer formulation

Directory of Open Access Journals (Sweden)

Lim SCB

2013-04-01

Full Text Available Stephen CB Lim,1,3 Michael J Paech,2 Bruce Sunderland,3 Yandi Liu3 1Pharmacy Department, Armadale Health Service, Armadale, 2School of Medicine and Pharmacology, University of Western Australia, and Department of Anaesthesia and Pain Medicine, King Edward Memorial Hospital for Women, Subiaco, 3School of Pharmacy, Curtin Health Innovation Research Institute, Curtin University, Perth, WA, Australia Background: The objective of this study was to prepare a novel fentanyl wafer formulation by a freeze-drying method, and to evaluate its in vitro and in vivo release characteristics, including its bioavailability via the sublingual route. Methods: The wafer formulation was prepared by freeze-drying an aqueous dispersion of fentanyl containing sodium carboxymethylcellulose and amylogum as matrix formers. Uniformity of weight, friability, and dissolution testing of the fentanyl wafer was achieved using standard methods, and the residual moisture content was measured. The fentanyl wafer was also examined using scanning electron microscopy and x-ray diffraction. The absolute bioavailability of the fentanyl wafer was evaluated in 11 opioid-naïve adult female patients using a randomized crossover design. Results: In vitro release showed that almost 90% of the fentanyl dissolved in one minute. In vivo, the first detectable plasma fentanyl concentration was observed after 3.5 minutes and the peak plasma concentration between 61.5 and 67 minutes. The median absolute bioavailability was 53.0%. Conclusion: These results indicate that this wafer has potential as an alternative sublingual fentanyl formulation. Keywords: absolute bioavailability, fentanyl wafer, in vitro dissolution, in vivo study, pharmacokinetics, sublingual

450mm wafer patterning with jet and flash imprint lithography

Science.gov (United States)

Thompson, Ecron; Hellebrekers, Paul; Hofemann, Paul; LaBrake, Dwayne L.; Resnick, Douglas J.; Sreenivasan, S. V.

2013-09-01

The next step in the evolution of wafer size is 450mm. Any transition in sizing is an enormous task that must account for fabrication space, environmental health and safety concerns, wafer standards, metrology capability, individual process module development and device integration. For 450mm, an aggressive goal of 2018 has been set, with pilot line operation as early as 2016. To address these goals, consortiums have been formed to establish the infrastructure necessary to the transition, with a focus on the development of both process and metrology tools. Central to any process module development, which includes deposition, etch and chemical mechanical polishing is the lithography tool. In order to address the need for early learning and advance process module development, Molecular Imprints Inc. has provided the industry with the first advanced lithography platform, the Imprio® 450, capable of patterning a full 450mm wafer. The Imprio 450 was accepted by Intel at the end of 2012 and is now being used to support the 450mm wafer process development demands as part of a multi-year wafer services contract to facilitate the semiconductor industry's transition to lower cost 450mm wafer production. The Imprio 450 uses a Jet and Flash Imprint Lithography (J-FILTM) process that employs drop dispensing of UV curable resists to assist high resolution patterning for subsequent dry etch pattern transfer. The technology is actively being used to develop solutions for markets including NAND Flash memory, patterned media for hard disk drives and displays. This paper reviews the recent performance of the J-FIL technology (including overlay, throughput and defectivity), mask development improvements provided by Dai Nippon Printing, and the application of the technology to a 450mm lithography platform.

Greater-than-Class C low-level radioactive waste characterization. Appendix E-4: Packaging factors for greater-than-Class C low-level radioactive waste

International Nuclear Information System (INIS)

Quinn, G.; Grant, P.; Winberg, M.; Williams, K.

1994-09-01

This report estimates packaging factors for several waste types that are potential greater-than-Class C (GTCC) low-level radioactive waste (LLW). The packaging factor is defined as the volume of a GTCC LLW disposal container divided by the as-generated or ''unpackaged'' volume of the waste loaded into the disposal container. Packaging factors reflect any processes that reduce or increase an original unpackaged volume of GTCC LLW, the volume inside a waste container not occupied by the waste, and the volume of the waste container itself. Three values are developed that represent (a) the base case or most likely value for a packaging factor, (b) a high case packaging factor that corresponds to the largest anticipated disposal volume of waste, and (c) a low case packaging factor for the smallest volume expected. GTCC LLW is placed in three categories for evaluation in this report: activated metals, sealed sources, and all other waste

Radioactivity evaluation method for pre-packed concrete packages of low-level dry active wastes

International Nuclear Information System (INIS)

Sakai, Toshiaki; Funahashi, Tetsuo; Watabe, Kiyomi; Ozawa, Yukitoshi; Kashiwagi, Makoto

1998-01-01

Low-level dry active wastes of nuclear power plants are grouted with cement mortal in a container and planned to disposed into the shallow land disposal site. The characteristics of radionuclides contained in dry active wastes are same as homogeneous solidified wastes. In the previous report, we reported the applicability of the radioactivity evaluation methods established for homogeneous solidified wastes to pre-packed concrete packages. This report outlines the developed radioactivity evaluation methods for pre-packed concrete packages based upon recent data. Since the characteristics of dry active wastes depend upon the plant system in which dry active wastes originate and the types of contamination, sampling of wastes and activity measurement were executed to derive scaling factors. The radioactivity measurement methods were also verified. The applicability of non-destructive methods to measure radioactivity concentration of pre-packed concrete packages was examined by computer simulation. It is concluded that those methods are accurate enough to measure actual waste packages. (author)

CVTresh: R Package for Level-Dependent Cross-Validation Thresholding

Directory of Open Access Journals (Sweden)

Donghoh Kim

2006-04-01

Full Text Available The core of the wavelet approach to nonparametric regression is thresholding of wavelet coefficients. This paper reviews a cross-validation method for the selection of the thresholding value in wavelet shrinkage of Oh, Kim, and Lee (2006, and introduces the R package CVThresh implementing details of the calculations for the procedures. This procedure is implemented by coupling a conventional cross-validation with a fast imputation method, so that it overcomes a limitation of data length, a power of 2. It can be easily applied to the classical leave-one-out cross-validation and K-fold cross-validation. Since the procedure is computationally fast, a level-dependent cross-validation can be developed for wavelet shrinkage of data with various sparseness according to levels.

CVTresh: R Package for Level-Dependent Cross-Validation Thresholding

Directory of Open Access Journals (Sweden)

Donghoh Kim

2006-04-01

Full Text Available The core of the wavelet approach to nonparametric regression is thresholding of wavelet coefficients. This paper reviews a cross-validation method for the selection of the thresholding value in wavelet shrinkage of Oh, Kim, and Lee (2006, and introduces the R package CVThresh implementing details of the calculations for the procedures.This procedure is implemented by coupling a conventional cross-validation with a fast imputation method, so that it overcomes a limitation of data length, a power of 2. It can be easily applied to the classical leave-one-out cross-validation and K-fold cross-validation. Since the procedure is computationally fast, a level-dependent cross-validation can be developed for wavelet shrinkage of data with various sparseness according to levels.

Preparation and characterisation of immobilised humic acid on silicon wafer

International Nuclear Information System (INIS)

Szabo, Gy.; Guczi, J.; Telegdi, J.; Pashalidis, I.; Szymczak, W.; Buckau, G.

2005-01-01

Full text of publication follows: The chemistry of the interactions of radionuclides with humic acid needs to be understood in details so that humate-mediated migration of radionuclides through the environment can be predicted. To achieve such a data in microscopic scale, several detective techniques, such as atomic force microscopy (AFM), chemical force microscopy (CFM), nuclear microprobe analysis (NMA) and X-ray photoelectron spectroscopy (XPS) can be used to measure intermolecular forces and to visualize the surface morphology. The main aim of this work was to provide humic material with specific properties in order to study with different spectroscopic techniques, the complexation behaviour of surface bound humic acid in microscopic scale. Namely, humic acid has been immobilised on silicon wafers in order to mimic surface bound humic substances in natural aquatic systems. In this communication, we present a simple protocol to immobilize humic acid on silicon wafer surface. A tri-functional silane reagent 3-amino-propyl-tri-methoxy-silane (APTES) was used to modify the surface of silicon wafers and appeared to be able to strongly attached soluble humic acid through their carboxylic groups to solid support. Characterisation of the surfaces, after any preparation steps, was done by ATR-FTIR, AFM and TOF-SIMS. These methods have proved that the humic acid forms a relatively homogeneous layer on the wafers. Immobilisation of humic acid on silicon wafer was further proved by binding isotherm of Am/Nd. (authors)

The Systems Biology Markup Language (SBML) Level 3 Package: Flux Balance Constraints.

Science.gov (United States)

Olivier, Brett G; Bergmann, Frank T

2015-09-04

Constraint-based modeling is a well established modelling methodology used to analyze and study biological networks on both a medium and genome scale. Due to their large size, genome scale models are typically analysed using constraint-based optimization techniques. One widely used method is Flux Balance Analysis (FBA) which, for example, requires a modelling description to include: the definition of a stoichiometric matrix, an objective function and bounds on the values that fluxes can obtain at steady state. The Flux Balance Constraints (FBC) Package extends SBML Level 3 and provides a standardized format for the encoding, exchange and annotation of constraint-based models. It includes support for modelling concepts such as objective functions, flux bounds and model component annotation that facilitates reaction balancing. The FBC package establishes a base level for the unambiguous exchange of genome-scale, constraint-based models, that can be built upon by the community to meet future needs (e. g. by extending it to cover dynamic FBC models).

Synchrotron radiation induced TXRF of low Z elements on Si wafer surfaces at SSRL-comparison of excitation geometries and condition

International Nuclear Information System (INIS)

Streli, C.; Wobrauschek, P.; Kregsamer, P.; Pepponi, G.; Pianetta, P.; Pahlke, S.; Fabry, L.

2000-01-01

The determination of low Z elements, like Na and Al at ultra trace levels on Si wafer surfaces is demanded by semiconductor industry. SR-TXRF is a promising method to fulfill the task, if a special energy dispersive detector with an ultra thin window is used. Synchrotron radiation is the ideal suited excitation source for TXRF of low Z elements due to its intensive, natural collimated and linear polarized radiation with wide spectral range down to low energies even below 1 keV. TXRF offers some advantages for wafer surface analysis like nondestructive investigation and mapping capability. Experiments have been performed at SSRL beamline 3-4, a bending magnet beamline using white (<3 keV) and monochromatic radiation, as well as on beamline 3-3, using a crystal monochromator as well as a multilayer monochromator. A comparison of excitation detection geometries was performed, using a sidelooking detector with vertical positioned wafer as well as a downlooking detector with a horizontally arranged wafer. The advantages and disadvantages of the various geometries and excitation conditions are presented and the results compared. Detection limits are in the 100 fg range for Na, determined with droplet samples on Si wafer surfaces. (author)

The Systems Biology Markup Language (SBML) Level 3 Package: Layout, Version 1 Core.

Science.gov (United States)

Gauges, Ralph; Rost, Ursula; Sahle, Sven; Wengler, Katja; Bergmann, Frank Thomas

2015-09-04

Many software tools provide facilities for depicting reaction network diagrams in a visual form. Two aspects of such a visual diagram can be distinguished: the layout (i.e.: the positioning and connections) of the elements in the diagram, and the graphical form of the elements (for example, the glyphs used for symbols, the properties of the lines connecting them, and so on). For software tools that also read and write models in SBML (Systems Biology Markup Language) format, a common need is to store the network diagram together with the SBML representation of the model. This in turn raises the question of how to encode the layout and the rendering of these diagrams. The SBML Level 3 Version 1 Core specification does not provide a mechanism for explicitly encoding diagrams, but it does provide a mechanism for SBML packages to extend the Core specification and add additional syntactical constructs. The Layout package for SBML Level 3 adds the necessary features to SBML so that diagram layouts can be encoded in SBML files, and a companion package called SBML Rendering specifies how the graphical rendering of elements can be encoded. The SBML Layout package is based on the principle that reaction network diagrams should be described as representations of entities such as species and reactions (with direct links to the underlying SBML elements), and not as arbitrary drawings or graphs; for this reason, existing languages for the description of vector drawings (such as SVG) or general graphs (such as GraphML) cannot be used.

Comparison on mechanical properties of heavily phosphorus- and arsenic-doped Czochralski silicon wafers

Science.gov (United States)

Yuan, Kang; Sun, Yuxin; Lu, Yunhao; Liang, Xingbo; Tian, Daxi; Ma, Xiangyang; Yang, Deren

2018-04-01

Heavily phosphorus (P)- and arsenic (As)-doped Czochralski silicon (CZ-Si) wafers generally act as the substrates for the epitaxial silicon wafers used to fabricate power and communication devices. The mechanical properties of such two kinds of n-type heavily doped CZ silicon wafers are vital to ensure the quality of epitaxial silicon wafers and the manufacturing yields of devices. In this work, the mechanical properties including the hardness, Young's modulus, indentation fracture toughness and the resistance to dislocation motion have been comparatively investigated for heavily P- and As-doped CZ-Si wafers. It is found that heavily P-doped CZ-Si possesses somewhat higher hardness, lower Young's modulus, larger indentation fracture toughness and stronger resistance to dislocation motion than heavily As-doped CZ-Si. The mechanisms underlying this finding have been tentatively elucidated by considering the differences in the doping effects of P and As in silicon.

A Novel Defect Inspection Method for Semiconductor Wafer Based on Magneto-Optic Imaging

Science.gov (United States)

Pan, Z.; Chen, L.; Li, W.; Zhang, G.; Wu, P.

2013-03-01

The defects of semiconductor wafer may be generated from the manufacturing processes. A novel defect inspection method of semiconductor wafer is presented in this paper. The method is based on magneto-optic imaging, which involves inducing eddy current into the wafer under test, and detecting the magnetic flux associated with eddy current distribution in the wafer by exploiting the Faraday rotation effect. The magneto-optic image being generated may contain some noises that degrade the overall image quality, therefore, in this paper, in order to remove the unwanted noise present in the magneto-optic image, the image enhancement approach using multi-scale wavelet is presented, and the image segmentation approach based on the integration of watershed algorithm and clustering strategy is given. The experimental results show that many types of defects in wafer such as hole and scratch etc. can be detected by the method proposed in this paper.

Handbook of wafer bonding

CERN Document Server

Ramm, Peter; Taklo, Maaike M V

2011-01-01

Written by an author and editor team from microsystems companies and industry-near research organizations, this handbook and reference presents dependable, first-hand information on bonding technologies.In the first part, researchers from companies and institutions around the world discuss the most reliable and reproducible technologies for the production of bonded wafers. The second part is devoted to current and emerging applications, including microresonators, biosensors and precise measuring devices.

1366 Project Automate: Enabling Automation for <$0.10/W High-Efficiency Kerfless Wafers Manufactured in the US

Energy Technology Data Exchange (ETDEWEB)

Lorenz, Adam [1366 Technologies, Bedford, MA (United States)

2017-05-10

For photovoltaic (PV) manufacturing to thrive in the U.S., there must be an innovative core to the technology. Project Automate builds on 1366’s proprietary Direct Wafer® kerfless wafer technology and aims to unlock the cost and efficiency advantages of thin kerfless wafers. Direct Wafer is an innovative, U.S.-friendly (efficient, low-labor content) manufacturing process that addresses the main cost barrier limiting silicon PV cost-reductions – the 35-year-old grand challenge of manufacturing quality wafers (40% of the cost of modules) without the cost and waste of sawing. This simple, scalable process will allow 1366 to manufacture “drop-in” replacement wafers for the $10 billion silicon PV wafer market at 50% of the cost, 60% of the capital, and 30% of the electricity of conventional casting and sawing manufacturing processes. This SolarMat project developed the Direct Wafer processes’ unique capability to tailor the shape of wafers to simultaneously make thinner AND stronger wafers (with lower silicon usage) that enable high-efficiency cell architectures. By producing wafers with a unique target geometry including a thick border (which determines handling characteristics) and thin interior regions (which control light capture and electron transport and therefore determine efficiency), 1366 can simultaneously improve quality and lower cost (using less silicon).

InP-based photonic integrated circuit platform on SiC wafer.

Science.gov (United States)

Takenaka, Mitsuru; Takagi, Shinichi

2017-11-27

We have numerically investigated the properties of an InP-on-SiC wafer as a photonic integrated circuit (PIC) platform. By bonding a thin InP-based semiconductor on a SiC wafer, SiC can be used as waveguide cladding, a heat sink, and a support substrate simultaneously. Since the refractive index of SiC is sufficiently low, PICs can be fabricated using InP-based strip and rib waveguides with a minimum bend radius of approximately 7 μm. High-thermal-conductivity SiC underneath an InP-based waveguide core markedly improves heat dissipation, resulting in superior thermal properties of active devices such as laser diodes. The InP-on-SiC wafer has significantly smaller thermal stress than InP-on-SiO 2 /Si wafer, which prevents the thermal degradation of InP-based devices during high-temperature processes. Thus, InP on SiC provides an ideal platform for high-performance PICs.

Low-temperature, low-loss zero level packaging techniques for RF applications by using a photopatternable dry film

International Nuclear Information System (INIS)

Kim, J; Seok, S; Rolland, N; Rolland, P-A

2012-01-01

This paper presents a low-temperature zero-level packaging technique using a dry film type of PerMX polymer for RF devices. Silicon cap packaging with PerMX sealing ring and PerMX cap packaging through multilayer lamination have been implemented. All of the fabrication process has been performed at temperature less than 150 °C. The influence of each packaging cap on the packaged coplanar waveguide was first investigated using the HFSS electromagnetic simulation. The RF measurement results showed that both packaging caps did not have significant influence on the performance of transmission lines. The insertion loss changes before and after packaging were almost negligible up to 30 GHz, and the return losses were better than 20 dB. Also, the deformation of PerMX structures concerning the packaging processes has been studied. For silicon capping, the volumetric compression of PerMX sealing ring by the bonding process has been observed. For PerMX cap packaging, the deflection of the polymer cap has been investigated as a function of sealing ring width for the different cap size. Measured results had good agreement with the ANSYS simulated ones. (paper)

Uniformity across 200 mm silicon wafers printed by nanoimprint lithography

International Nuclear Information System (INIS)

Gourgon, C; Perret, C; Tallal, J; Lazzarino, F; Landis, S; Joubert, O; Pelzer, R

2005-01-01

Uniformity of the printing process is one of the key parameters of nanoimprint lithography. This technique has to be extended to large size wafers to be useful for several industrial applications, and the uniformity of micro and nanostructures has to be guaranteed on large surfaces. This paper presents results of printing on 200 mm diameter wafers. The residual thickness uniformity after printing is demonstrated at the wafer scale in large patterns (100 μm), in smaller lines of 250 nm and in sub-100 nm features. We show that a mould deformation occurs during the printing process, and that this deformation is needed to guarantee printing uniformity. However, the mould deformation is also responsible for the potential degradation of the patterns

Physical mechanisms of copper-copper wafer bonding

International Nuclear Information System (INIS)

Rebhan, B.; Hingerl, K.

2015-01-01

The study of the physical mechanisms driving Cu-Cu wafer bonding allowed for reducing the bonding temperatures below 200 °C. Metal thermo-compression Cu-Cu wafer bonding results obtained at such low temperatures are very encouraging and suggest that the process is possible even at room temperature if some boundary conditions are fulfilled. Sputtered (PVD) and electroplated Cu thin layers were investigated, and the analysis of both metallization techniques demonstrated the importance of decreasing Cu surface roughness. For an equal surface roughness, the bonding temperature of PVD Cu wafers could be even further reduced due to the favorable microstructure. Their smaller grain size enhances the length of the grain boundaries (observed on the surface prior bonding), acting as efficient mass transfer channels across the interface, and hence the grains are able to grow over the initial bonding interface. Due to the higher concentration of random high-angle grain boundaries, this effect is intensified. The model presented is explaining the microstructural changes based on atomic migration, taking into account that the reduction of the grain boundary area is the major driving force to reduce the Gibbs free energy, and predicts the subsequent microstructure evolution (grain growth) during thermal annealing

Curvature evolution of 200 mm diameter GaN-on-insulator wafer fabricated through metalorganic chemical vapor deposition and bonding

Science.gov (United States)

Zhang, Li; Lee, Kwang Hong; Kadir, Abdul; Wang, Yue; Lee, Kenneth E.; Tan, Chuan Seng; Chua, Soo Jin; Fitzgerald, Eugene A.

2018-05-01

Crack-free 200 mm diameter N-polar GaN-on-insulator (GaN-OI) wafers are demonstrated by the transfer of metalorganic chemical vapor deposition (MOCVD)-grown Ga-polar GaN layers from Si(111) wafers onto SiO2/Si(100) wafers. The wafer curvature of the GaN-OI wafers after the removal of the original Si(111) substrate is correlated with the wafer curvature of the starting GaN-on-Si wafers and the voids on the GaN-on-Si surface that evolve into cracks on the GaN-OI wafers. In crack-free GaN-OI wafers, the wafer curvature during the removal of the AlN nucleation layer, AlGaN strain-compensation buffer layers and GaN layers is correlated with the residual stress distribution within individual layers in the GaN-OI wafer.

An attempt to specify thermal history in CZ silicon wafers and possibilities for its modification

International Nuclear Information System (INIS)

Kissinger, G.; Sattler, A.; Mueller, T.; Ammon, W. von

2007-01-01

The term thermal history of silicon wafers represents the whole variety of process parameters of crystal growth. The aim of this contribution is an attempt to specify thermal history by one parameter that is directly correlated to the bulk microdefect density. The parameter that reflects thermal history and correlates it with nucleation of oxide precipitates is the concentration of VO 2 complexes. The VO 2 concentration in silicon wafers is too low to be measured by FTIR but it can be obtained from the loss of interstitial oxygen during a standardized thermal treatment. Based on this, the vacancy concentration frozen during crystal cooling in the ingot can be calculated. RTA treatments above 1150 deg. C create a well defined level of the VO 2 concentration in silicon wafers. This means that a well controlled modification of the thermal history is possible. We also investigated the kinetics of reduction of the as-grown excess VO 2 concentration during RTA treatments at 950 deg. C and 1050 deg. C and the effectiveness of this attempt to totally delete the thermal history

Waste package performance criteria for deepsea disposal of low-level radioactive wastes

International Nuclear Information System (INIS)

Colombo, P.; Fuhrmann, M.

1988-07-01

Sea disposal of low-level radioactive waste began in the United States in 1946, and was placed under the licensing authority of the Atomic Energy Commission (AEC). The practice stopped completely in 1970. Most of the waste disposed of at sea was packaged in second- hand or reconditioned 55-gallon drums filled with cement so that the average package density was sufficiently greater than that of sea water to ensure sinking. It was assumed that all the contents would eventually be released since the packages were not designed or required to remain intact for sustained periods of time after descent to the ocean bottom. Recently, there has been renewed interest in ocean disposal, both in this country and abroad, as a waste management alternative to land burial. The Marine Protection, Research and Sanctuaries Act of 1972 (PL 92-532) gives EPA the regulatory responsibility for ocean dumping of all materials, including radioactive waste. This act prohibits the ocean disposal of high-level radioactive waste and requires EPA to control the ocean disposal of all other radioactive waste through the issuance of permits. In implementing its permit authorities, EPA issued on initial set of regulations and criteria in 1973 to control the disposal of material into the ocean waters. It was in these regulations that EPA initially introduced the general requirement of isolation and containment of radioactive waste as the basic operating philosophy. 37 refs

The integration of InGaP LEDs with CMOS on 200 mm silicon wafers

Science.gov (United States)

Wang, Bing; Lee, Kwang Hong; Wang, Cong; Wang, Yue; Made, Riko I.; Sasangka, Wardhana Aji; Nguyen, Viet Cuong; Lee, Kenneth Eng Kian; Tan, Chuan Seng; Yoon, Soon Fatt; Fitzgerald, Eugene A.; Michel, Jurgen

2017-02-01

The integration of photonics and electronics on a converged silicon CMOS platform is a long pursuit goal for both academe and industry. We have been developing technologies that can integrate III-V compound semiconductors and CMOS circuits on 200 mm silicon wafers. As an example we present our work on the integration of InGaP light-emitting diodes (LEDs) with CMOS. The InGaP LEDs were epitaxially grown on high-quality GaAs and Ge buffers on 200 mm (100) silicon wafers in a MOCVD reactor. Strain engineering was applied to control the wafer bow that is induced by the mismatch of coefficients of thermal expansion between III-V films and silicon substrate. Wafer bonding was used to transfer the foundry-made silicon CMOS wafers to the InGaP LED wafers. Process trenches were opened on the CMOS layer to expose the underneath III-V device layers for LED processing. We show the issues encountered in the 200 mm processing and the methods we have been developing to overcome the problems.

Evaluation on the structural soundness of the transport package for low-level radioactive waste for subsurface disposal against aircraft impact by finite element method

International Nuclear Information System (INIS)

Itoh, Chihiro

2009-01-01

The structural analysis of aircraft crush on the transport package for low-level radioactive waste was performed using the impact force which was already used for the evaluation of the high-level waste transport package by LSDYNA code. The transport package was deformed, and stresses due to the crush exceeded elastic range. However, plastic strains yieled in the package were far than the elongation of the materials and the body of the package did not contact the disposal packages due to the deformation of the package. Therefore, it was confirmed that the package keeps its integrity against aircraft crush. (author)

Wafer integrated micro-scale concentrating photovoltaics

Science.gov (United States)

Gu, Tian; Li, Duanhui; Li, Lan; Jared, Bradley; Keeler, Gordon; Miller, Bill; Sweatt, William; Paap, Scott; Saavedra, Michael; Das, Ujjwal; Hegedus, Steve; Tauke-Pedretti, Anna; Hu, Juejun

2017-09-01

Recent development of a novel micro-scale PV/CPV technology is presented. The Wafer Integrated Micro-scale PV approach (WPV) seamlessly integrates multijunction micro-cells with a multi-functional silicon platform that provides optical micro-concentration, hybrid photovoltaic, and mechanical micro-assembly. The wafer-embedded micro-concentrating elements is shown to considerably improve the concentration-acceptance-angle product, potentially leading to dramatically reduced module materials and fabrication costs, sufficient angular tolerance for low-cost trackers, and an ultra-compact optical architecture, which makes the WPV module compatible with commercial flat panel infrastructures. The PV/CPV hybrid architecture further allows the collection of both direct and diffuse sunlight, thus extending the geographic and market domains for cost-effective PV system deployment. The WPV approach can potentially benefits from both the high performance of multijunction cells and the low cost of flat plate Si PV systems.

Mechanics of wafer bonding: Effect of clamping

Science.gov (United States)

Turner, K. T.; Thouless, M. D.; Spearing, S. M.

2004-01-01

A mechanics-based model is developed to examine the effects of clamping during wafer bonding processes. The model provides closed-form expressions that relate the initial geometry and elastic properties of the wafers to the final shape of the bonded pair and the strain energy release rate at the interface for two different clamping configurations. The results demonstrate that the curvature of bonded pairs may be controlled through the use of specific clamping arrangements during the bonding process. Furthermore, it is demonstrated that the strain energy release rate depends on the clamping configuration and that using applied loads usually leads to an undesirable increase in the strain energy release rate. The results are discussed in detail and implications for process development and bonding tool design are highlighted.

X-Ray Diffraction (XRD) Characterization Methods for Sigma=3 Twin Defects in Cubic Semiconductor (100) Wafers

Science.gov (United States)

Park, Yeonjoon (Inventor); Kim, Hyun Jung (Inventor); Skuza, Jonathan R. (Inventor); Lee, Kunik (Inventor); King, Glen C. (Inventor); Choi, Sang Hyouk (Inventor)

2017-01-01

An X-ray defraction (XRD) characterization method for sigma=3 twin defects in cubic semiconductor (100) wafers includes a concentration measurement method and a wafer mapping method for any cubic tetrahedral semiconductor wafers including GaAs (100) wafers and Si (100) wafers. The methods use the cubic semiconductor's (004) pole figure in order to detect sigma=3/{111} twin defects. The XRD methods are applicable to any (100) wafers of tetrahedral cubic semiconductors in the diamond structure (Si, Ge, C) and cubic zinc-blend structure (InP, InGaAs, CdTe, ZnSe, and so on) with various growth methods such as Liquid Encapsulated Czochralski (LEC) growth, Molecular Beam Epitaxy (MBE), Organometallic Vapor Phase Epitaxy (OMVPE), Czochralski growth and Metal Organic Chemical Vapor Deposition (MOCVD) growth.

Design and implementation of a S-parameter wafer defect scanner

International Nuclear Information System (INIS)

Naik, P.S.; Beling, C.D.; Fung, S.

2004-01-01

We describe the design and implementation of a real-time automated scanning system that gives an S-parameter image of a semiconductor wafer, thus allowing the density of vacancy type defects to be shown as a function of position on the wafer. A conventional 22 Na positron source of 0.5 mm diameter rasters across 5 x 5 cm 2 region of two times per hour in rectilinear motion. Gamma ray energies E γ are processed using a standard HP Ge spectroscopy system and a 14 bit nuclear ADC. Over a period of 1-2 days a high resolution 128 x 128 pixel image with 256 colours (scaled to the S-parameter range) can be formed as a wafer defect map. The system is reliable, interactive and user-friendly (patent pending 2003). (orig.)

Thermal stress during RTP processes and its possible effect on the light induced degradation in Cz-Si wafers

Science.gov (United States)

Kouhlane, Yacine; Bouhafs, Djoudi; Khelifati, Nabil; Guenda, Abdelkader; Demagh, Nacer-Eddine; Demagh, Assia; Pfeiffer, Pierre; Mezghiche, Salah; Hetatache, Warda; Derkaoui, Fahima; Nasraoui, Chahinez; Nwadiaru, Ogechi Vivian

2018-04-01

In this study, the carrier lifetime variation of p-type boron-doped Czochralski silicon (Cz-Si) wafers was investigated after a direct rapid thermal processing (RTP). Two wafers were passivated by silicon nitride (SiNx:H) layers, deposited by a PECVD system on both surfaces. Then the wafers were subjected to an RTP cycle at a peak temperature of 620 °C. The first wafer was protected (PW) from the direct radiative heating of the RTP furnace by placing the wafer between two as-cut Cz-Si shield wafers during the heat processing. The second wafer was not protected (NPW) and followed the same RTP cycle procedure. The carrier lifetime τ eff was measured using the QSSPC technique before and after illumination for 5 h duration at 0.5 suns. The immediate results of the measured lifetime (τ RTP ) after the RTP process have shown a regeneration in the lifetime of the two wafers with the PW wafer exhibiting an important enhancement in τ RTP as compared to the NPW wafer. The QSSPC measurements have indicated a good stable lifetime (τ d ) and a weak degradation effect was observed in the case of the PW wafer as compared to their initial lifetime value. Interferometry technique analyses have shown an enhancement in the surface roughness for the NPW wafer as compared to the protected one. Additionally, to improve the correlation between the RTP heat radiation stress and the carrier lifetime behavior, a simulation of the thermal stress and temperature profile using the finite element method on the wafers surface at RTP peak temperature of 620 °C was performed. The results confirm the reduction of the thermal stress with less heat losses for the PW wafer. Finally, the proposed method can lead to improving the lifetime of wafers by an RTP process at minimum energy costs.

Accurate characterization of wafer bond toughness with the double cantilever specimen

Science.gov (United States)

Turner, Kevin T.; Spearing, S. Mark

2008-01-01

The displacement loaded double cantilever test, also referred to as the "Maszara test" and the "crack opening method" by the wafer bonding community, is a common technique used to evaluate the interface toughness or surface energy of direct wafer bonds. While the specimen is widely used, there has been a persistent question as to the accuracy of the method since the actual specimen geometry differs from the ideal beam geometry assumed in the expression used for data reduction. The effect of conducting the test on whole wafer pairs, in which the arms of cantilevers are wide plates rather than slender beams, is examined in this work using finite element analysis. A model is developed to predict the equilibrium shape of the crack front and to develop a corrected expression for calculating interface toughness from crack length measurements obtained in tests conducted on whole wafer pairs. The finite element model, which is validated through comparison to experiments, demonstrates that using the traditional beam theory-based expressions for data reduction can lead to errors of up to 25%.

The preparation and thermoelectric properties of molten salt electrodeposited boron wafers

International Nuclear Information System (INIS)

Kumashiro, Y.; Ozaki, S.; Sato, K.; Kataoka, Y.; Hirata, K.; Yokoyama, T.; Nagatani, S.; Kajiyama, K.

2004-01-01

We have prepared electrodeposited boron wafer by molten salts with KBF 4 -KF at 680 deg. C using graphite crucible for anode and silicon wafer and nickel plate for cathodes. Experiments were performed by various molar ratios KBF 4 /KF and current densities. Amorphous p-type boron wafers with purity 87% was deposited on nickel plate for 1 h. Thermal diffusivity by ring-flash method and heat capacity by DSC method produced thermal conductivity showing amorphous behavior in the entire temperature range. The systematical results on thermoelectric properties were obtained for the wafers prepared with KBF 4 -KF (66-34 mol%) under various current densities in the range 1-2 A/cm 2 . The temperature dependencies of electrical conductivity showed thermal activated type with activation energy of 0.5 eV. Thermoelectric power tended to increase with increasing temperature up to high temperatures with high values of (1-10) mV/K. Thermoelectric figure-of-merit was 10 -4 /K at high temperatures. Estimated efficiency of thermoelectric energy conversion would be calculated to be 4-5%

Impurity engineering for germanium-doped Czochralski silicon wafer used for ultra large scale integrated circuit

Energy Technology Data Exchange (ETDEWEB)

Chen, Jiahe; Yang, Deren [State Key Laboratory of Silicon Materials, Department of Materials Science and Engineering, Zhejiang University, Hangzhou (China)

2009-07-01

Internal gettering (IG) technology has been challenged by both the reduction of thermal budget during device fabrication and the enlargement of wafer diameter. Improving the properties of Czochralski (Cz) silicon wafers by intentional impurity doping, the so-called 'impurity engineering (IE)', is defined. Germanium has been found to be one of the important impurities for improving the internal gettering effect in Cz silicon wafer. In this paper, the investigations on IE involved with the conventional furnace anneal based denudation processing for germanium-doped Cz silicon wafer are reviewed. Meanwhile, the potential mechanisms of germanium effects for the IE of Cz silicon wafer are also interpreted based on the experimental facts. (copyright 2009 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim) (orig.)

First-time demonstration of measuring concrete prestress levels with metal packaged fibre optic sensors

Science.gov (United States)

Mckeeman, I.; Fusiek, G.; Perry, M.; Johnston, M.; Saafi, M.; Niewczas, P.; Walsh, M.; Khan, S.

2016-09-01

In this work we present the first large-scale demonstration of metal packaged fibre Bragg grating sensors developed to monitor prestress levels in prestressed concrete. To validate the technology, strain and temperature sensors were mounted on steel prestressing strands in concrete beams and stressed up to 60% of the ultimate tensile strength of the strand. We discuss the methods and calibration procedures used to fabricate and attach the temperature and strain sensors. The use of induction brazing for packaging the fibre Bragg gratings and welding the sensors to prestressing strands eliminates the use of epoxy, making the technique suitable for high-stress monitoring in an irradiated, harsh industrial environment. Initial results based on the first week of data after stressing the beams show the strain sensors are able to monitor prestress levels in ambient conditions.

Scatterometry on pelliclized masks: an option for wafer fabs

Science.gov (United States)

Gallagher, Emily; Benson, Craig; Higuchi, Masaru; Okumoto, Yasuhiro; Kwon, Michael; Yedur, Sanjay; Li, Shifang; Lee, Sangbong; Tabet, Milad

2007-03-01

Optical scatterometry-based metrology is now widely used in wafer fabs for lithography, etch, and CMP applications. This acceptance of a new metrology method occurred despite the abundance of wellestablished CD-SEM and AFM methods. It was driven by the desire to make measurements faster and with a lower cost of ownership. Over the last year, scatterometry has also been introduced in advanced mask shops for mask measurements. Binary and phase shift masks have been successfully measured at all desired points during photomask production before the pellicle is mounted. There is a significant benefit to measuring masks with the pellicle in place. From the wafer fab's perspective, through-pellicle metrology would verify mask effects on the same features that are characterized on wafer. On-site mask verification would enable quality control and trouble-shooting without returning the mask to a mask house. Another potential application is monitoring changes to mask films once the mask has been delivered to the fab (haze, oxide growth, etc.). Similar opportunities apply to the mask metrologist receiving line returns from a wafer fab. The ability to make line-return measurements without risking defect introduction is clearly attractive. This paper will evaluate the feasibility of collecting scatterometry data on pelliclized masks. We explore the effects of several different pellicle types on scatterometry measurements made with broadband light in the range of 320-780 nm. The complexity introduced by the pellicles' optical behavior will be studied.

Crack detection and analyses using resonance ultrasonic vibrations in full-size crystalline silicon wafers

International Nuclear Information System (INIS)

Belyaev, A.; Polupan, O.; Dallas, W.; Ostapenko, S.; Hess, D.; Wohlgemuth, J.

2006-01-01

An experimental approach for fast crack detection and length determination in full-size solar-grade crystalline silicon wafers using a resonance ultrasonic vibrations (RUV) technique is presented. The RUV method is based on excitation of the longitudinal ultrasonic vibrations in full-size wafers. Using an external piezoelectric transducer combined with a high sensitivity ultrasonic probe and computer controlled data acquisition system, real-time frequency response analysis can be accomplished. On a set of identical crystalline Si wafers with artificially introduced periphery cracks, it was demonstrated that the crack results in a frequency shift in a selected RUV peak to a lower frequency and increases the resonance peak bandwidth. Both characteristics were found to increase with the length of the crack. The frequency shift and bandwidth increase serve as reliable indicators of the crack appearance in silicon wafers and are suitable for mechanical quality control and fast wafer inspection

Wafer plane inspection with soft resist thresholding

Science.gov (United States)

Hess, Carl; Shi, Rui-fang; Wihl, Mark; Xiong, Yalin; Pang, Song

2008-10-01

Wafer Plane Inspection (WPI) is an inspection mode on the KLA-Tencor TeraScaTM platform that uses the high signalto- noise ratio images from the high numerical aperture microscope, and then models the entire lithographic process to enable defect detection on the wafer plane[1]. This technology meets the needs of some advanced mask manufacturers to identify the lithographically-significant defects while ignoring the other non-lithographically-significant defects. WPI accomplishes this goal by performing defect detection based on a modeled image of how the mask features would actually print in the photoresist. There are several advantages to this approach: (1) the high fidelity of the images provide a sensitivity advantage over competing approaches; (2) the ability to perform defect detection on the wafer plane allows one to only see those defects that have a printing impact on the wafer; (3) the use of modeling on the lithographic portion of the flow enables unprecedented flexibility to support arbitrary illumination profiles, process-window inspection in unit time, and combination modes to find both printing and non-printing defects. WPI is proving to be a valuable addition to the KLA-Tencor detection algorithm suite. The modeling portion of WPI uses a single resist threshold as the final step in the processing. This has been shown to be adequate on several advanced customer layers, but is not ideal for all layers. Actual resist chemistry has complicated processes including acid and base-diffusion and quench that are not consistently well-modeled with a single resist threshold. We have considered the use of an advanced resist model for WPI, but rejected it because the burdensome requirements for the calibration of the model were not practical for reticle inspection. This paper describes an alternative approach that allows for a "soft" resist threshold to be applied that provides a more robust solution for the most challenging processes. This approach is just

Silicon waveguides produced by wafer bonding

DEFF Research Database (Denmark)

Poulsen, Mette; Jensen, Flemming; Bunk, Oliver

2005-01-01

X-ray waveguides are successfully produced employing standard silicon technology of UV photolithography and wafer bonding. Contrary to theoretical expectations for similar systems even 100 mu m broad guides of less than 80 nm height do not collapse and can be used as one dimensional waveguides...

Wafer scale integration of catalyst dots into nonplanar microsystems

DEFF Research Database (Denmark)

Gjerde, Kjetil; Kjelstrup-Hansen, Jakob; Gammelgaard, Lauge

2007-01-01

In order to successfully integrate bottom-up fabricated nanostructures such as carbon nanotubes or silicon, germanium, or III-V nanowires into microelectromechanical systems on a wafer scale, reliable ways of integrating catalyst dots are needed. Here, four methods for integrating sub-100-nm...... diameter nickel catalyst dots on a wafer scale are presented and compared. Three of the methods are based on a p-Si layer utilized as an in situ mask, an encapsulating layer, and a sacrificial window mask, respectively. All methods enable precise positioning of nickel catalyst dots at the end...

Effect of nanoscale surface roughness on the bonding energy of direct-bonded silicon wafers

Science.gov (United States)

Miki, N.; Spearing, S. M.

2003-11-01

Direct wafer bonding of silicon wafers is a promising technology for manufacturing three-dimensional complex microelectromechanical systems as well as silicon-on-insulator substrates. Previous work has reported that the bond quality declines with increasing surface roughness, however, this relationship has not been quantified. This article explicitly correlates the bond quality, which is quantified by the apparent bonding energy, and the surface morphology via the bearing ratio, which describes the area of surface lying above a given depth. The apparent bonding energy is considered to be proportional to the real area of contact. The effective area of contact is defined as the area sufficiently close to contribute to the attractive force between the two bonding wafers. Experiments were conducted with silicon wafers whose surfaces were roughened by a buffered oxide etch solution (BOE, HF:NH4F=1:7) and/or a potassium hydroxide solution. The surface roughness was measured by atomic force microscopy. The wafers were direct bonded to polished "monitor" wafers following a standard RCA cleaning and the resulting bonding energy was measured by the crack-opening method. The experimental results revealed a clear correlation between the bonding energy and the bearing ratio. A bearing depth of ˜1.4 nm was found to be appropriate for the characterization of direct-bonded silicon at room temperature, which is consistent with the thickness of the water layer at the interface responsible for the hydrogen bonds that link the mating wafers.

ASIC Wafer Test System for the ATLAS Semiconductor Tracker Front-End Chip

International Nuclear Information System (INIS)

Anghinolfi, F.; Bialas, W.; Busek, N.; Ciocio, A.; Cosgrove, D.; Fadeyev, V.; Flacco, C.; Gilchriese, M.; Grillo, A.A.; Haber, C.; Kaplon, J.; Lacasta, C.; Murray, W.; Niggli, H.; Pritchard, T.; Rosenbaum, F.; Spieler, H.; Stezelberger, T.; Vu, C.; Wilder, M.; Yaver, H.; Zetti, F.

2002-01-01

An ASIC wafer test system has been developed to provide comprehensive production screening of the ATLAS Semiconductor Tracker front-end chip (ABCD3T). The ABCD3T[1] features a 128-channel analog front-end, a digital pipeline, and communication circuitry, clocked at 40 MHz, which is the bunch crossing frequency at the LHC (Large Hadron Collider). The tester measures values and tolerance ranges of all critical IC parameters, including DC parameters, electronic noise, time resolution, clock levels and clock timing. The tester is controlled by an FPGA (ORCA3T) programmed to issue the input commands to the IC and to interpret the output data. This allows the high-speed wafer-level IC testing necessary to meet the production schedule. To characterize signal amplitudes and phase margins, the tester utilizes pin-driver, delay, and DAC chips, which control the amplitudes and delays of signals sent to the IC under test. Output signals from the IC under test go through window comparator chips to measure their levels. A probe card has been designed specifically to reduce pick-up noise that can affect the measurements. The system can operate at frequencies up to 100 MHz to study the speed limits of the digital circuitry before and after radiation damage. Testing requirements and design solutions are presented

The packaging of intermediate and low level radioactive wastes

International Nuclear Information System (INIS)

Flowers, R.H.

1985-01-01

Solid radioactive wastes will generally require some kind of packaging to prepare them for a period of storage followed probably by a land burial. In this Paper the specification of the package is discussed in relation to the properties which will facilitate those two phases of the management of the waste. It is concluded that, by adopting the philosophy of redundant barriers for the disposal phase, a suitable package can be specified for any particular waste product even before the repository site has been selected. Low water flow and an appropriate depth to reduce the risk of accidental re-exposure are the technical site parameters for which particular values will have to be assured at that stage. (author)

Efficiency Improvement of HIT Solar Cells on p-Type Si Wafers.

Science.gov (United States)

Wei, Chun-You; Lin, Chu-Hsuan; Hsiao, Hao-Tse; Yang, Po-Chuan; Wang, Chih-Ming; Pan, Yen-Chih

2013-11-22

Single crystal silicon solar cells are still predominant in the market due to the abundance of silicon on earth and their acceptable efficiency. Different solar-cell structures of single crystalline Si have been investigated to boost efficiency; the heterojunction with intrinsic thin layer (HIT) structure is currently the leading technology. The record efficiency values of state-of-the art HIT solar cells have always been based on n-type single-crystalline Si wafers. Improving the efficiency of cells based on p-type single-crystalline Si wafers could provide broader options for the development of HIT solar cells. In this study, we varied the thickness of intrinsic hydrogenated amorphous Si layer to improve the efficiency of HIT solar cells on p-type Si wafers.

Non-invasive thermal profiling of silicon wafer surface during RTP using acoustic and signal processing techniques

Science.gov (United States)

Syed, Ahmed Rashid

Among the great physical challenges faced by the current front-end semiconductor equipment manufacturers is the accurate and repeatable surface temperature measurement of wafers during various fabrication steps. Close monitoring of temperature is essential in that it ensures desirable device characteristics to be reliably reproduced across various wafer lots. No where is the need to control temperature more pronounced than it is during Rapid Thermal Processing (RTP) which involves temperature ramp rates in excess of 200°C/s. This dissertation presents an elegant and practical approach to solve the wafer surface temperature estimation problem, in context of RTP, by deploying hardware that acquires the necessary data while preserving the integrity and purity of the wafer. In contrast to the widely used wafer-contacting (and hence contaminating) methods, such as bonded thermocouples, or environment sensitive schemes, such as light-pipes and infrared pyrometry, the proposed research explores the concept of utilizing Lamb (acoustic) waves to detect changes in wafer surface temperature, during RTP. Acoustic waves are transmitted to the wafer via an array of quartz rods that normally props the wafer inside an RTP chamber. These waves are generated using piezoelectric transducers affixed to the bases of the quartz rods. The group velocity of Lamb waves traversing the wafer surface undergoes a monotonic decrease with rise in wafer temperature. The correspondence of delay in phase of the received Lamb waves and the ambient temperature, along all direct paths between sending and receiving transducers, yields a psuedo real-time thermal image of the wafer. Although the custom built hardware-setup implements the above "proof-of-concept" scheme by transceiving acoustic signals at a single frequency, the real-world application will seek to enhance the data acquistion. rate (>1000 temperature measurements per seconds) by sending and receiving Lamb waves at multiple frequencies (by

Study of the impact behaviour of packages containing intermediate level radioactive waste coming from nuclear installations

International Nuclear Information System (INIS)

Davis, D.; Lund, J.S.; Meredith, P.; Walker, P.; Wells, D.A.; Jowett, J.; Kinsella, K.

1989-01-01

The following describes primarily an experimental study into the benefits, for impact resistance, to be gained by incorporating a welded lid into the design of the cement filled drum type of intermediate level waste package. Tests on packages which were not provided with a lid showed that matrix material began to be expelled from drop heights of about 16m. This damage threshold was similar for packages composed of both high and low strength matrix. Above the damage threshold, however, the rate of increase of expelled mass with drop height was greater for the packages filled with a low strength matrix. Similar tests were conducted with specimens to which a lid had been attached by welding. Even from the greatest drop height available at the test facility (28m) only one package showed a significant amount of drum tearing but even then little matrix was lost. The benefits of incorporating a welded lid into package design were thus clearly established. Simple calculations were performed to predict the local deformations and deceleration/time histories of the packages. By optimisation of the impact resistive stress used in the computer model, final knockback areas were predicted to an accuracy of 30%. The average deceleration predicted for four of the six tests for which deceleration histories were available were also within 30% of measured values

Determination of ultra-trace contaminants on silicon wafer surfaces using TXRF. Present state of the art

International Nuclear Information System (INIS)

Pahlke, S.; Fabry, L.; Kotz, L.; Mantler, C.; Ehmann, T.

2000-01-01

Recently, TXRF became a standard, on-line inspection tool for controlling the cleanliness of polished Si wafers for semiconductor use now up to 300 diameter. Wafer makers strive for an all-over metallic cleanliness of 10 atoms x cm -2 . Therefore an analytical tools must cover LOD in a range 9 atoms x cm -2 or lower. The all-over cleanliness of the whole wafer surface can analyzed using VPD/TXRF. For this chemical wafer-pre-preparation under cleanroom conditions class 1 we have developed a full automatic 'Wafer Surface Preparation System' coupled with a new generation TXRF. We have also combined this system with other independent methods for Na, Al, anions and cations. Only the combination of automatic wafer handling systems, modem analytical tools, ultra-pure water, ULSI chemicals and special cleanroom conditions provides us a chance to achieve the present and the future demands for semiconductor industry. (author)

Design and development of wafer-level near-infrared micro-camera

Science.gov (United States)

Zeller, John W.; Rouse, Caitlin; Efstathiadis, Harry; Haldar, Pradeep; Dhar, Nibir K.; Lewis, Jay S.; Wijewarnasuriya, Priyalal; Puri, Yash R.; Sood, Ashok K.

2015-08-01

SiGe offers a low-cost alternative to conventional infrared sensor material systems such as InGaAs, InSb, and HgCdTe for developing near-infrared (NIR) photodetector devices that do not require cooling and can offer high bandwidths and responsivities. As a result of the significant difference in thermal expansion coefficients between germanium and silicon, tensile strain incorporated into Ge epitaxial layers deposited on Si utilizing specialized growth processes can extend the operational range of detection to 1600 nm and longer wavelengths. We have fabricated SiGe based PIN detector devices on 300 mm diameter Si wafers in order to take advantage of high throughput, large-area complementary metal-oxide semiconductor (CMOS) technology. This device fabrication process involves low temperature epitaxial deposition of Ge to form a thin p+ seed/buffer layer, followed by higher temperature deposition of a thicker Ge intrinsic layer. An n+-Ge layer formed by ion implantation of phosphorus, passivating oxide cap, and then top copper contacts complete the PIN photodetector design. Various techniques including transmission electron microscopy (TEM) and secondary ion mass spectrometry (SIMS) have been employed to characterize the material and structural properties of the epitaxial growth and fabricated detector devices. In addition, electrical characterization was performed to compare the I-V dark current vs. photocurrent response as well as the time and wavelength varying photoresponse properties of the fabricated devices, results of which are likewise presented.

Substrate Crosstalk Suppression Using Wafer-Level Packaging : Metalized Through-Substrate Trench Approach

NARCIS (Netherlands)

Sinaga, S.M.

2010-01-01

The demand for miniaturization technology has been increasing over the last decades. Consumer electronics end-users often, if not always, go for more functionality and practicality. This is translated into systems that are more complex and yet smaller in size such as smart cellular phones and

Heterogeneous Electronics – Wafer Level Integration, Packaging, and Assembly Facility

Data.gov (United States)

Federal Laboratory Consortium — This facility integrates active electronics with microelectromechanical (MEMS) devices at the miniature system scale. It obviates current size-, weight-, and power...

Surface modification of silicon wafer by grafting zwitterionic polymers to improve its antifouling property

Science.gov (United States)

Sun, Yunlong; Chen, Changlin; Xu, Heng; Lei, Kun; Xu, Guanzhe; Zhao, Li; Lang, Meidong

2017-10-01

Silicon (111) wafer was modified by triethoxyvinylsilane containing double bond as an intermedium, and then P4VP (polymer 4-vinyl pyridine) brush was "grafted" onto the surface of silicon wafer containing reactive double bonds by adopting the "grafting from" way and Si-P4VP substrate (silicon wafer grafted by P4VP) was obtained. Finally, P4VP brush of Si-P4VP substrate was modified by 1,3-propanesulfonate fully to obtain P4VP-psl brush (zwitterionic polypyridinium salt) and the functional Si-P4VP-psl substrate (silicon wafer grafted by zwitterionic polypyridinium salt based on polymer 4-vinyl pyridine) was obtained successfully. The antifouling property of the silicon wafer, the Si-P4VP substrate and the Si-P4VP-psl substrate was investigated by using bovine serum albumin, mononuclear macrophages (RAW 264.7) and Escherichia coli (E. coli) ATTC25922 as model bacterium. The results showed that compared with the blank sample-silicon wafer, the Si-P4VP-psl substrate had excellent anti-adhesion ability against bovine serum albumin, cells and bacterium, due to zwitterionic P4VP-psl brush (polymer 4-vinyl pyridine salt) having special functionality like antifouling ability on biomaterial field.

Yield impact for wafer shape misregistration-based binning for overlay APC diagnostic enhancement

Science.gov (United States)

Jayez, David; Jock, Kevin; Zhou, Yue; Govindarajulu, Venugopal; Zhang, Zhen; Anis, Fatima; Tijiwa-Birk, Felipe; Agarwal, Shivam

2018-03-01

The importance of traditionally acceptable sources of variation has started to become more critical as semiconductor technologies continue to push into smaller technology nodes. New metrology techniques are needed to pursue the process uniformity requirements needed for controllable lithography. Process control for lithography has the advantage of being able to adjust for cross-wafer variability, but this requires that all processes are close in matching between process tools/chambers for each process. When this is not the case, the cumulative line variability creates identifiable groups of wafers1 . This cumulative shape based effect is described as impacting overlay measurements and alignment by creating misregistration of the overlay marks. It is necessary to understand what requirements might go into developing a high volume manufacturing approach which leverages this grouping methodology, the key inputs and outputs, and what can be extracted from such an approach. It will be shown that this line variability can be quantified into a loss of electrical yield primarily at the edge of the wafer and proposes a methodology for root cause identification and improvement. This paper will cover the concept of wafer shape based grouping as a diagnostic tool for overlay control and containment, the challenges in implementing this in a manufacturing setting, and the limitations of this approach. This will be accomplished by showing that there are identifiable wafer shape based signatures. These shape based wafer signatures will be shown to be correlated to overlay misregistration, primarily at the edge. It will also be shown that by adjusting for this wafer shape signal, improvements can be made to both overlay as well as electrical yield. These improvements show an increase in edge yield, and a reduction in yield variability.

Temperature Uniformity of Wafer on a Large-Sized Susceptor for a Nitride Vertical MOCVD Reactor

International Nuclear Information System (INIS)

Li Zhi-Ming; Jiang Hai-Ying; Han Yan-Bin; Li Jin-Ping; Yin Jian-Qin; Zhang Jin-Cheng

2012-01-01

The effect of coil location on wafer temperature is analyzed in a vertical MOCVD reactor by induction heating. It is observed that the temperature distribution in the wafer with the coils under the graphite susceptor is more uniform than that with the coils around the outside wall of the reactor. For the case of coils under the susceptor, we find that the thickness of the susceptor, the distance from the coils to the susceptor bottom and the coil turns significantly affect the temperature uniformity of the wafer. An optimization process is executed for a 3-inch susceptor with this kind of structure, resulting in a large improvement in the temperature uniformity. A further optimization demonstrates that the new susceptor structure is also suitable for either multiple wafers or large-sized wafers approaching 6 and 8 inches

A modified occlusal wafer for managing partially dentate orthognathic patients--a case series.

Science.gov (United States)

Soneji, Bhavin Kiritkumar; Esmail, Zaid; Sharma, Pratik

2015-03-01

A multidisciplinary approach is essential in orthognathic surgery to achieve stable and successful outcomes. The model surgery planning is an important aspect in achieving the desired aims. An occlusal wafer used at the time of surgery aids the surgeon during correct placement of the jaws. When dealing with partially dentate patients, the design of the occlusal wafer requires modification to appropriately position the jaw. Two cases with partially dentate jaws are presented in which the occlusal wafer has been modified to provide stability at the time of surgery.

Waste package performance assessment

International Nuclear Information System (INIS)

Lester, D.H.

1981-01-01

This paper describes work undertaken to assess the life-expectancy and post-failure nuclide release behavior of high-level and waste packages in a geologic repository. The work involved integrating models of individual phenomena (such as heat transfer, corrosion, package deformation, and nuclide transport) and using existing data to make estimates of post-emplacement behavior of waste packages. A package performance assessment code was developed to predict time to package failure in a flooded repository and subsequent transport of nuclides out of the leaking package. The model has been used to evaluate preliminary package designs. The results indicate, that within the limitation of model assumptions and data base, packages lasting a few hundreds of years could be developed. Very long lived packages may be possible but more comprehensive data are needed to confirm this

Waste Package Lifting Calculation

International Nuclear Information System (INIS)

H. Marr

2000-01-01

The objective of this calculation is to evaluate the structural response of the waste package during the horizontal and vertical lifting operations in order to support the waste package lifting feature design. The scope of this calculation includes the evaluation of the 21 PWR UCF (pressurized water reactor uncanistered fuel) waste package, naval waste package, 5 DHLW/DOE SNF (defense high-level waste/Department of Energy spent nuclear fuel)--short waste package, and 44 BWR (boiling water reactor) UCF waste package. Procedure AP-3.12Q, Revision 0, ICN 0, calculations, is used to develop and document this calculation

Computational Modeling in Plasma Processing for 300 mm Wafers

Science.gov (United States)

Meyyappan, Meyya; Arnold, James O. (Technical Monitor)

1997-01-01

Migration toward 300 mm wafer size has been initiated recently due to process economics and to meet future demands for integrated circuits. A major issue facing the semiconductor community at this juncture is development of suitable processing equipment, for example, plasma processing reactors that can accomodate 300 mm wafers. In this Invited Talk, scaling of reactors will be discussed with the aid of computational fluid dynamics results. We have undertaken reactor simulations using CFD with reactor geometry, pressure, and precursor flow rates as parameters in a systematic investigation. These simulations provide guidelines for scaling up in reactor design.

Bacterial quality and safety of packaged fresh leafy vegetables at the retail level in Finland.

Science.gov (United States)

Nousiainen, L-L; Joutsen, S; Lunden, J; Hänninen, M-L; Fredriksson-Ahomaa, M

2016-09-02

Consumption of packaged fresh leafy vegetables, which are convenient ready-to-eat products, has increased during the last decade. The number of foodborne outbreaks associated with these products has concurrently increased. In our study, (1) label information, (2) O2/CO2 composition, (3) bacterial quality and (4) safety of 100 fresh leafy vegetables at the retail level were studied in Finland during 2013. Bacterial quality was studied using aerobic bacteria (AB) and coliform bacteria (CB) counts, and searching for the presence of Escherichia coli, Listeria and Yersinia. The safety was studied by the presence of Salmonella, ail-positive Yersinia, stx-positive E. coli (STEC) and Listeria monocytogenes using PCR and culturing. Important label information was unavailable on several packages originating from different companies. The packaging date was missing on all packages and the date of durability on 83% of the packages. Storage temperature was declared on 62% of the packages and 73% of the packages contained information about prewashing. The batch/lot number was missing on 29% of the packages. Very low oxygen (O2) (vegetable samples varying between 6.2 and 10.6 and 4.2-8.3logcfu/g, respectively. In most of the samples, the AB and CB counts exceeded 10(8) and 10(6)cfu/g, respectively. A positive correlation was observed between the AB and CB counts. E. coli was isolated from 15% of the samples and Yersinia from 33%. L. monocytogenes was isolated from two samples and ail-positive Y. enterocolitica in one. Using PCR, STEC was detected in seven samples, and Salmonella and ail-positive Y. enterocolitica in two samples each. The AB and CB mean values of products originating from different companies varied widely. High AB and CB counts and pathogenic bacteria were detected in ready-to-eat products not needing washing before use. Our study shows that the bacterial quality and safety of packaged fresh leafy vegetables is poor and label information on the packages is

A multi-level, multi-jurisdictional strategy: Transnational tobacco companies' attempts to obstruct tobacco packaging restrictions.

Science.gov (United States)

Hawkins, Benjamin; Holden, Chris; Mackinder, Sophie

2018-03-09

Despite the extensive literature on the tobacco industry, there has been little attempt to study how transnational tobacco companies (TTCs) coordinate their political activities globally, or to theorise TTC strategies within the context of global governance structures and policy processes. This article draws on three concepts from political science - policy transfer, multi-level governance and venue shifting - to analyse TTCs' integrated, global strategies to oppose augmented packaging requirements across multiple jurisdictions. Following Uruguay's introduction of extended labelling requirements, Australia became the first country in the world to require tobacco products to be sold in standardised ('plain') packaging in 2012. Governments in the European Union, including in the United Kingdom and Ireland, adopted similar laws, with other member states due to follow. TTCs vehemently opposed these measures and developed coordinated, global strategies to oppose their implementation, exploiting the complexity of contemporary global governance arrangements. These included a series of legal challenges in various jurisdictions, alongside political lobbying and public relations campaigns. This article draws on analysis of public documents and 32 semi-structured interviews with key policy actors. It finds that TTCs developed coordinated and highly integrated strategies to oppose packaging restrictions across multiple jurisdictions and levels of governance.

Characterization of silicon-on-insulator wafers

Science.gov (United States)

Park, Ki Hoon

The silicon-on-insulator (SOI) is attracting more interest as it is being used for an advanced complementary-metal-oxide-semiconductor (CMOS) and a base substrate for novel devices to overcome present obstacles in bulk Si scaling. Furthermore, SOI fabrication technology has improved greatly in recent years and industries produce high quality wafers with high yield. This dissertation investigated SOI material properties with simple, yet accurate methods. The electrical properties of as-grown wafers such as electron and hole mobilities, buried oxide (BOX) charges, interface trap densities, and carrier lifetimes were mainly studied. For this, various electrical measurement techniques were utilized such as pseudo-metal-oxide-semiconductor field-effect-transistor (PseudoMOSFET) static current-voltage (I-V) and transient drain current (I-t), Hall effect, and MOS capacitance-voltage/capacitance-time (C-V/C-t). The electrical characterization, however, mainly depends on the pseudo-MOSFET method, which takes advantage of the intrinsic SOI structure. From the static current-voltage and pulsed measurement, carrier mobilities, lifetimes and interface trap densities were extracted. During the course of this study, a pseudo-MOSFET drain current hysteresis regarding different gate voltage sweeping directions was discovered and the cause was revealed through systematic experiments and simulations. In addition to characterization of normal SOI, strain relaxation of strained silicon-on-insulator (sSOI) was also measured. As sSOI takes advantage of wafer bonding in its fabrication process, the tenacity of bonding between the sSOI and the BOX layer was investigated by means of thermal treatment and high dose energetic gamma-ray irradiation. It was found that the strain did not relax with processes more severe than standard CMOS processes, such as anneals at temperature as high as 1350 degree Celsius.

A low feed-through 3D vacuum packaging technique with silicon vias for RF MEMS resonators

Science.gov (United States)

Zhao, Jicong; Yuan, Quan; Kan, Xiao; Yang, Jinling; Yang, Fuhua

2017-01-01

This paper presents a wafer-level three-dimensional (3D) vacuum packaging technique for radio frequency microelectromechanical systems (RF MEMS) resonators. A Sn-rich Au-Sn solder bonding is employed to provide a vacuum encapsulation as well as electrical conductions. Vertical silicon vias are micro-fabricated by glass reflow process. The optimized grounding, via pitch, and all-round shielding effectively reduce feed-through capacitance. Thus the signal-to-background ratios (SBRs) of the transmission signals increase from 17 dB to 20 dB, and the quality factor (Q) values of the packaged resonators go from around 8000 up to more than 9500. The measured average leak rate and shear strength are (2.55  ±  0.9)  ×  10-8 atm-cc s-1 and 42.53  ±  4.19 MPa, respectively. Furthermore, thermal cycling test between  -40 °C and 100 °C and high temperature storage test at 150 °C show that the resonant-frequency drifts are less than  ±7 ppm. In addition, the SBRs and the Q values have no obvious change after the tests. The experimental results demonstrated that the proposed encapsulation technique is well suited for the applications of RF MEMS devices.

Bond strength tests between silicon wafers and duran tubes (fusion bonded fluidic interconnects)

NARCIS (Netherlands)

Fazal, I.; Berenschot, Johan W.; de Boer, J.H.; Jansen, Henricus V.; Elwenspoek, Michael Curt

2005-01-01

The fusion bond strength of glass tubes with standard silicon wafers is presented. Experiments with plain silicon wafers and those coated with silicon oxide and silicon nitride are presented. Results obtained are discussed in terms of homogeneity and strength of fusion bond. High pressure testing

Graphene-Decorated Nanocomposites for Printable Electrodes in Thin Wafer Devices

Science.gov (United States)

Bakhshizadeh, N.; Sivoththaman, S.

2017-12-01

Printable electrodes that induce less stress and require lower curing temperatures compared to traditional screen-printed metal pastes are needed in thin wafer devices such as future solar cells, and in flexible electronics. The synthesis of nanocomposites by incorporating graphene nanopowders as well as silver nanowires into epoxy-based electrically conductive adhesives (ECA) is examined to improve electrical conductivity and to develop alternate printable electrode materials that induce less stress on the wafer. For the synthesized graphene and Ag nanowire-decorated ECA nanocomposites, the curing kinetics were studied by dynamic and isothermal differential scanning calorimetry measurements. Thermogravimetric analysis on ECA, ECA-AG and ECA/graphene nanopowder nanocomposites showed that the temperatures for onset of decomposition are higher than their corresponding glass transition temperature ( T g) indicating an excellent thermal resistance. Printed ECA/Ag nanowire nanocomposites showed 90% higher electrical conductivity than ECA films, whereas the ECA/graphene nanocomposites increased the conductivity by over two orders of magnitude. Scanning electron microscopy results also revealed the effect of fillers morphology on the conductivity improvement and current transfer mechanisms in nanocomposites. Residual stress analysis performed on Si wafers showed that the ECA and nanocomposite printed wafers are subjected to much lower stress compared to those printed with metallic pastes. The observed parameters of low curing temperature, good thermal resistance, reasonably high conductivity, and low residual stress in the ECA/graphene nanocomposite makes this material a promising alternative in screen-printed electrode formation in thin substrates.

Electrical characterization of thin SOI wafers using lateral MOS transient capacitance measurements

International Nuclear Information System (INIS)

Wang, D.; Ueda, A.; Takada, H.; Nakashima, H.

2006-01-01

A novel electrical evaluation method was proposed for crystal quality characterization of thin Si on insulator (SOI) wafers, which was done by measurement of minority carrier generation lifetime (τ g ) using transient capacitance method for lateral metal-oxide-semiconductor (MOS) capacitor. The lateral MOS capacitors were fabricated on three kinds of thin SOI wafers. The crystal quality difference among these three wafers was clearly shown by the τ g measurement results and discussed from a viewpoint of SOI fabrication. The series resistance influence on the capacitance measurement for this lateral MOS capacitor was discussed in detail. The validity of this method was confirmed by comparing the intensities of photoluminescence signals due to electron-hole droplet in the band-edge emission

development and evaluation of lyophilized thiolated-chitosan wafers

African Journals Online (AJOL)

User

THIOLATED-CHITOSAN WAFERS FOR BUCCAL DELIVERY. OF PROTEIN ... of the thiolated polymer incorporating per polymer weight, 10 % each of glycerol as plasticizer, D-mannitol as ..... delivery systems: in vitro stability, in vivo fate, and ...

A study of UO2 wafer fuel for very high-power research reactors

International Nuclear Information System (INIS)

Hsieh, T.C.; Jankus, V.Z.; Rest, J.; Billone, M.C.

1983-01-01

The Reduced Enrichment Research and Test Reactor Program is aimed at reducing fuel enrichment to 2 caramel fuel is one of the most promising new types of reduced-enrichment fuel for use in research reactors with very high power density. Parametric studies have been carried out to determine the maximum specific power attainable without significant fission-gas release for UO 2 wafers ranging from 0.75 to 1.50 mm in thickness. The results indicate that (1) all the fuel designs considered in this study are predicted not to fail under full power operation up to a burnup, of 1.9x10 21 fis/cm 3 ; (2) for all fuel designs, failure is predicted at approximately the same fuel centerline temperature for a given burnup; (3) the thinner the wafer, the wider the margin for fuel specific power between normal operation and increased-power operation leading to fuel failure; (4) increasing the coolant pressure in the reactor core could improve fuel performance by maintaining the fuel at a higher power level without failure for a given burnup; and (5) for a given power level, fuel failure will occur earlier at a higher cladding surface temperature and/or under power-cycling conditions. (author)

Long-Term Waste Package Degradation Studies at the Yucca Mountain Potential High-Level Nuclear Waste Repository

International Nuclear Information System (INIS)

Mon, K. G.; Bullard, B. E.; Longsine, D. E.; Mehta, S.; Lee, J. H.; Monib, A. M.

2002-01-01

The Site Recommendation (SR) process for the potential repository for spent nuclear fuel (SNF) and high-level nuclear waste (HLW) at Yucca Mountain, Nevada is underway. Fulfillment of the requirements for substantially complete containment of the radioactive waste emplaced in the potential repository and subsequent slow release of radionuclides from the Engineered Barrier System (EBS) into the geosphere will rely on a robust waste container design, among other EBS components. Part of the SR process involves sensitivity studies aimed at elucidating which model parameters contribute most to the drip shield and waste package degradation characteristics. The model parameters identified included (a) general corrosion rate model parameters (temperature-dependence and uncertainty treatment), and (b) stress corrosion cracking (SCC) model parameters (uncertainty treatment of stress and stress intensity factor profiles in the Alloy 22 waste package outer barrier closure weld regions, the SCC initiation stress threshold, and the fraction of manufacturing flaws oriented favorably for through-wall penetration by SCC). These model parameters were reevaluated and new distributions were generated. Also, early waste package failures due to improper heat treatment were added to the waste package degradation model. The results of these investigations indicate that the waste package failure profiles are governed by the manufacturing flaw orientation model parameters and models used

Comparative TEM study of bonded silicon/silicon interfaces fabricated by hydrophilic, hydrophobic and UHV wafer bonding

International Nuclear Information System (INIS)

Reznicek, A.; Scholz, R.; Senz, S.; Goesele, U.

2003-01-01

Wafers of Czochralski-grown silicon were bonded hydrophilically, hydrophobically and in ultrahigh vacuum (UHV) at room temperature. Wafers bonded hydrophilically adhere together by hydrogen bonds, those bonded hydrophobically by van der Waals forces and UHV-bonded ones by covalent bonds. Annealing the pre-bonded hydrophilic and hydrophobic wafer pairs in argon for 2 h at different temperatures increases the initially low bonding energy. UHV-bonded wafer pairs were also annealed to compare the results. Transmission electron microscopy (TEM) investigations show nano-voids at the interface. The void density depends on the initial bonding strength. During annealing the shape, coverage and density of the voids change significantly

Aerial image measurement technique for automated reticle defect disposition (ARDD) in wafer fabs

Science.gov (United States)

Zibold, Axel M.; Schmid, Rainer M.; Stegemann, B.; Scheruebl, Thomas; Harnisch, Wolfgang; Kobiyama, Yuji

2004-08-01

The Aerial Image Measurement System (AIMS)* for 193 nm lithography emulation has been brought into operation successfully worldwide. A second generation system comprising 193 nm AIMS capability, mini-environment and SMIF, the AIMS fab 193 plus is currently introduced into the market. By adjustment of numerical aperture (NA), illumination type and partial illumination coherence to match the conditions in 193 nm steppers or scanners, it can emulate the exposure tool for any type of reticles like binary, OPC and PSM down to the 65 nm node. The system allows a rapid prediction of wafer printability of defects or defect repairs, and critical features, like dense patterns or contacts on the masks without the need to perform expensive image qualification consisting of test wafer exposures followed by SEM measurements. Therefore, AIMS is a mask quality verification standard for high-end photo masks and established in mask shops worldwide. The progress on the AIMS technology described in this paper will highlight that besides mask shops there will be a very beneficial use of the AIMS in the wafer fab and we propose an Automated Reticle Defect Disposition (ARDD) process. With smaller nodes, where design rules are 65 nm or less, it is expected that smaller defects on reticles will occur in increasing numbers in the wafer fab. These smaller mask defects will matter more and more and become a serious yield limiting factor. With increasing mask prices and increasing number of defects and severability on reticles it will become cost beneficial to perform defect disposition on the reticles in wafer production. Currently ongoing studies demonstrate AIMS benefits for wafer fab applications. An outlook will be given for extension of 193 nm aerial imaging down to the 45 nm node based on emulation of immersion scanners.

Surface evolution and stability transition of silicon wafer subjected to nano-diamond grinding

Directory of Open Access Journals (Sweden)

Shisheng Cai

2017-03-01

Full Text Available In order to obtain excellent physical properties and ultrathin devices, thinning technique plays an important role in semiconductor industry with the rapid development of wearable electronic devices. This study presents a physical nano-diamond grinding technique without any chemistry to obtain ultrathin silicon substrate. The nano-diamond with spherical shape repeats nano-cutting and penetrating surface to physically etch silicon wafer during grinding process. Nano-diamond grinding induces an ultrathin “amorphous layer” on silicon wafer and thus the mismatch strain between the amorphous layer and substrate leads to stability transition from the spherical to non-spherical deformation of the wafer. Theoretical model is proposed to predict and analyze the deformation of amorphous layer/silicon substrate system. Furthermore, the deformation bifurcation behavior of amorphous layer/silicon substrate system is analyzed. As the mismatch strain increases or thickness decreases, the amorphous layer/silicon substrate system may transit to non-spherical deformation, which is consistent to the experimental results. The amorphous layer stresses are also obtained to predict the damage of silicon wafer.

BayesTwin: An R Package for Bayesian Inference of Item-Level Twin Data

Directory of Open Access Journals (Sweden)

Inga Schwabe

2017-11-01

Full Text Available BayesTwin is an open-source R package that serves as a pipeline to the MCMC program JAGS to perform Bayesian inference on genetically-informative hierarchical twin data. Simultaneously to the biometric model, an item response theory (IRT measurement model is estimated, allowing analysis of the raw phenotypic (item-level data. The integration of such a measurement model is important since earlier research has shown that an analysis based on an aggregated measure (e.g., a sum-score based analysis can lead to an underestimation of heritability and the spurious finding of genotype-environment interactions. The package includes all common biometric and IRT models as well as functions that help plot relevant information or determine whether the analysis was performed well. Funding statement: Partly funded by the PROO grant 411-12-623 from the Netherlands Organisation for Scientific Research (NWO.

Terahertz transmission properties of silicon wafers using continuous-wave terahertz spectroscopy

Science.gov (United States)

Kim, Chihoon; Ahn, Jae Sung; Ji, Taeksoo; Eom, Joo Beom

2017-04-01

We present the spectral properties of Si wafers using continuous-wave terahertz (CW-THz) spectroscopy. By using a tunable laser source and a fixed distributed-feedback laser diode (DFB-LD), a stably tunable beat source for CW-THz spectroscopy system can be implemented. THz radiation is generated in the frequency range of 100 GHz-800 GHz by photomixing in a photoconductive antenna. We also measured CW-THz waveforms by changing the beat frequency and confirmed repeatability through repeated measurement. We calculated the peaks of the THz frequency by taking fast Fourier transforms (FFTs) of measured THz waveforms. The feasibility of CW-THz spectroscopy is demonstrated by the THz spectra of Si wafers with different resistivities, mobilities, and carrier concentrations. The results show that Si wafers with a lower resistivity absorb more THz waves. Thus, we expect our CW-THz system to have the advantage of being able to perform fast non-destructive analysis.

Sample pretreatment for the determination of metal impurities in silicon wafer

International Nuclear Information System (INIS)

Chung, H. Y.; Kim, Y. H.; Yoo, H. D.; Lee, S. H.

1999-01-01

The analytical results obtained by microwave digestion and acid digestion methods for sample pretreatment to determine metal impurities in silicon wafer by inductively coupled plasma--mass spectrometry(ICP-MS) were compared. In order to decompose the silicon wafer, a mixed solution of HNO 3 and HF was added to the sample and the metal elements were determined after removing the silicon matrix by evaporating silicon in the form of Si-F. The recovery percentages of Ni, Cr and Fe were found to be 95∼106% for both microwave digestion and acid digestion methods. The recovery percentage of Cu obtained by the acid digestion method was higher than that obtained by the microwave digestion method. For Zn, however, the microwave digestion method gave better result than the acid digestion method. Fe was added to a silicon wafer using a spin coater. The concentration of Fe in this sample was determined by ICP-MS, and the same results were obtained in the two pretreatment methods

Terahertz transmission properties of silicon wafers using continuous-wave terahertz spectroscopy

International Nuclear Information System (INIS)

Kim, Chihoon; Ahn, Jae Sung; Eom, Joo Beom; Ji, Taeksoo

2017-01-01

We present the spectral properties of Si wafers using continuous-wave terahertz (CW-THz) spectroscopy. By using a tunable laser source and a fixed distributed-feedback laser diode (DFB-LD), a stably tunable beat source for CW-THz spectroscopy system can be implemented. THz radiation is generated in the frequency range of 100 GHz–800 GHz by photomixing in a photoconductive antenna. We also measured CW-THz waveforms by changing the beat frequency and confirmed repeatability through repeated measurement. We calculated the peaks of the THz frequency by taking fast Fourier transforms (FFTs) of measured THz waveforms. The feasibility of CW-THz spectroscopy is demonstrated by the THz spectra of Si wafers with different resistivities, mobilities, and carrier concentrations. The results show that Si wafers with a lower resistivity absorb more THz waves. Thus, we expect our CW-THz system to have the advantage of being able to perform fast non-destructive analysis. (paper)

Wafer-scale pixelated detector system

Science.gov (United States)

Fahim, Farah; Deptuch, Grzegorz; Zimmerman, Tom

2017-10-17

A large area, gapless, detection system comprises at least one sensor; an interposer operably connected to the at least one sensor; and at least one application specific integrated circuit operably connected to the sensor via the interposer wherein the detection system provides high dynamic range while maintaining small pixel area and low power dissipation. Thereby the invention provides methods and systems for a wafer-scale gapless and seamless detector systems with small pixels, which have both high dynamic range and low power dissipation.

Industrial Silicon Wafer Solar Cells

OpenAIRE

Neuhaus, Dirk-Holger; Münzer, Adolf

2007-01-01

In 2006, around 86% of all wafer-based silicon solar cells were produced using screen printing to form the silver front and aluminium rear contacts and chemical vapour deposition to grow silicon nitride as the antireflection coating onto the front surface. This paper reviews this dominant solar cell technology looking into state-of-the-art equipment and corresponding processes for each process step. The main efficiency losses of this type of solar cell are analyzed to demonstrate the future e...

Optimal Wafer Cutting in Shuttle Layout Problems

DEFF Research Database (Denmark)

Nisted, Lasse; Pisinger, David; Altman, Avri

2011-01-01

. The shuttle layout problem is frequently solved in two phases: first, a floorplan of the shuttle is generated. Then, a cutting plan is found which minimizes the overall number of wafers needed to satisfy the demand of each die type. Since some die types require special production technologies, only compatible...

Texturization of diamond-wire-sawn multicrystalline silicon wafer using Cu, Ag, or Ag/Cu as a metal catalyst

Science.gov (United States)

Wang, Shing-Dar; Chen, Ting-Wei

2018-06-01

In this work, Cu, Ag, or Ag/Cu was used as a metal catalyst to study the surface texturization of diamond-wire-sawn (DWS) multi-crystalline silicon (mc-Si) wafer by a metal-assisted chemical etching (MACE) method. The DWS wafer was first etched by standard HF-HNO3 acidic etching, and it was labeled as AE-DWS wafer. The effects of ratios of Cu(NO3)2:HF, AgNO3:HF, and AgNO3:Cu(NO3)2 on the morphology of AE-DWS wafer were investigated. After the process of MACE, the wafer was treated with a NaF/H2O2 solution. In this process, H2O2 etched the nanostructure, and NaF removed the oxidation layer. The Si {1 1 1} plane was revealed by etching the wafer in a mixture of 0.03 M Cu(NO3)2 and 1 M HF at 55 °C for 2.5 min. These parallel Si {1 1 1} planes replaced some parallel saw marks on the surface of AE-DWS wafers without forming a positive pyramid or an inverted pyramid structure. The main topography of the wafer is comprised of silicon nanowires grown in direction when Ag or Ag/Cu was used as a metal catalyst. When silicon is etched in a mixed solution of Cu(NO3)2, AgNO3, HF and H2O2 at 55 °C with a concentration ratio of [Cu2+]/[Ag+] of 50 or at 65 °C with a concentration ratio of [Cu2+]/[Ag+] of 33, a quasi-inverted pyramid structure can be obtained. The reflectivity of the AE-DWS wafers treated with MACE is lower than that of the multiwire-slurry-sawn (MWSS) mc-Si wafers treated with traditional HF + HNO3 etching.

Comparison of silicon strip tracker module size using large sensors from 6 inch wafers

CERN Multimedia

Honma, Alan

1999-01-01

Two large silicon strip sensor made from 6 inch wafers are placed next to each other to simulate the size of a CMS outer silicon tracker module. On the left is a prototype 2 sensor CMS inner endcap silicon tracker module made from 4 inch wafers.

Improvement of the thickness distribution of a quartz crystal wafer by numerically controlled plasma chemical vaporization machining

International Nuclear Information System (INIS)

Shibahara, Masafumi; Yamamura, Kazuya; Sano, Yasuhisa; Sugiyama, Tsuyoshi; Endo, Katsuyoshi; Mori, Yuzo

2005-01-01

To improve the thickness uniformity of thin quartz crystal wafer, a new machining process that utilizes an atmospheric pressure plasma was developed. In an atmospheric pressure plasma process, since the kinetic energy of ions that impinge to the wafer surface is small and the density of the reactive species is large, high-efficiency machining without damage is realized, and the thickness distribution is corrected by numerically controlled scanning of the quartz wafer to the localized high-density plasma. By using our developed machining process, the thickness distribution of an AT cut wafer was improved from 174 nm [peak to valley (p-v)] to 67 nm (p-v) within 94 s. Since there are no unwanted spurious modes in the machined quartz wafer, it was proved that the developed machining method has a high machining efficiency without any damage

Analysis Of Factors Affecting Gravity-Induced Deflection For Large And Thin Wafers In Flatness Measurement Using Three-Point-Support Method

Directory of Open Access Journals (Sweden)

Liu Haijun

2015-12-01

Full Text Available Accurate flatness measurement of silicon wafers is affected greatly by the gravity-induced deflection (GID of the wafers, especially for large and thin wafers. The three-point-support method is a preferred method for the measurement, in which the GID uniquely determined by the positions of the supports could be calculated and subtracted. The accurate calculation of GID is affected by the initial stress of the wafer and the positioning errors of the supports. In this paper, a finite element model (FEM including the effect of initial stress was developed to calculate GID. The influence of the initial stress of the wafer on GID calculation was investigated and verified by experiment. A systematic study of the effects of positioning errors of the support ball and the wafer on GID calculation was conducted. The results showed that the effect of the initial stress could not be neglected for ground wafers. The wafer positioning error and the circumferential error of the support were the most influential factors while the effect of the vertical positioning error was negligible in GID calculation.

Development of a working set of waste package performance criteria for deepsea disposal of low-level radioactive waste. Final report

International Nuclear Information System (INIS)

Columbo, P.; Fuhrmann, M.; Neilson, R.M. Jr; Sailor, V.L.

1982-11-01

The United States ocean dumping regulations developed pursuant to PL92-532, the Marine Protection, Research, and Sanctuaries Act of 1972, as amended, provide for a general policy of isolation and containment of low-level radioactive waste after disposal into the ocean. In order to determine whether any particular waste packaging system is adequate to meet this general requirement, it is necessary to establish a set of performance criteria against which to evaluate a particular packaging system. These performance criteria must present requirements for the behavior of the waste in combination with its immobilization agent and outer container in a deepsea environment. This report presents a working set of waste package performance criteria, and includes a glossary of terms, characteristics of low-level radioactive waste, radioisotopes of importance in low-level radioactive waste, and a summary of domestic and international regulations which control the ocean disposal of these wastes

Automatic Semiconductor Wafer Image Segmentation for Defect Detection Using Multilevel Thresholding

Directory of Open Access Journals (Sweden)

Saad N.H.

2016-01-01

Full Text Available Quality control is one of important process in semiconductor manufacturing. A lot of issues trying to be solved in semiconductor manufacturing industry regarding the rate of production with respect to time. In most semiconductor assemblies, a lot of wafers from various processes in semiconductor wafer manufacturing need to be inspected manually using human experts and this process required full concentration of the operators. This human inspection procedure, however, is time consuming and highly subjective. In order to overcome this problem, implementation of machine vision will be the best solution. This paper presents automatic defect segmentation of semiconductor wafer image based on multilevel thresholding algorithm which can be further adopted in machine vision system. In this work, the defect image which is in RGB image at first is converted to the gray scale image. Median filtering then is implemented to enhance the gray scale image. Then the modified multilevel thresholding algorithm is performed to the enhanced image. The algorithm worked in three main stages which are determination of the peak location of the histogram, segmentation the histogram between the peak and determination of first global minimum of histogram that correspond to the threshold value of the image. The proposed approach is being evaluated using defected wafer images. The experimental results shown that it can be used to segment the defect correctly and outperformed other thresholding technique such as Otsu and iterative thresholding.

External self-gettering of nickel in float zone silicon wafers

Science.gov (United States)

Gay, N.; Martinuzzi, S.

1997-05-01

During indiffusion of Ni atoms in silicon crystals at 950 °C from a nickel layer source, Ni-Si alloys can be formed close to the surface. Metal solubility in these alloys is higher than in silicon, which induces a marked segregation gettering of the Ni atoms which have diffused in the bulk of the wafers. Consequently, the regions of the wafers covered with the Ni layer are less contaminated than adjacent regions in which Ni atoms have also penetrated, as shown by the absence of precipitates and the higher diffusion length of minority carriers. The results suggest the existence of external self-gettering of Ni atoms by the nickel source.

Plastic packaging and burn-in effects on ionizing dose response in CMOS microcircuits

International Nuclear Information System (INIS)

Clark, S.D.; Bings, J.P.; Maher, M.C.; Williams, M.K.; Alexander, D.R.; Pease, R.L.

1995-01-01

Results are reported from an investigation of the effects of packaging and burn-in on the post-irradiation performance of National Semiconductor 54AC02 Quad 2-input NOR gates. The test population was drawn from a single wafer fabricated in the National process qualified under Mil-Prf-38535 to an ionizing radiation hardness of 100 krads(Si). The test sample was divided between plastic and ceramic packages. Additionally, half of the plastic samples and half of the two ceramic samples received a 168 hour/125 C burn-in. Two irradiation schemes were used. The first followed Mil-Std-883 Method 1019.4 (dose rate = 50 rads(Si)/s). The second used a low dose rate (0.1 rads(Si)/s). AC, DC, transfer function and functional behavior were monitored throughout the tests. Significant differences among the package types and burn-in variations were noted with the plastic, burned-in components demonstrating enhanced degradation. They show the worst post-irradiation parameter values as well as very broad post-irradiation parameter distributions. Degradation is highly dependent upon dose rate and anneal conditions. Two different radiation induced leakage paths have been identified, and their characteristics have been correlated to variations in high dose rate and low dose rate circuit performance. Caution is recommended for system developers to ensure that radiation hardness characterization is performed for the same package/burn-in configuration to be used in the system

Effects of packaging, mineral oil coating, and storage time on biogenic amine levels and internal quality of eggs.

Science.gov (United States)

Figueiredo, T C; Assis, D C S; Menezes, L D M; Oliveira, D D; Lima, A L; Souza, M R; Heneine, L G D; Cançado, S V

2014-12-01

This study was carried out with the aim of evaluating the effects of mineral oil application on eggshells and the use of plastic packages with lids on the physical-chemical and microbiological quality and biogenic amine contents of eggs stored under refrigeration for up to 125 d. A total of 1,920 eggs from 46-wk-old Hyline W36 laying hens were randomly distributed into 4 groups soon after classification: (i) 480 eggs were stored in pulp carton tray packages; (ii) 480 eggs were stored in plastic packages with lids; (iii) 480 eggs were stored in carton packages after the application of mineral oil; and (iv) 480 eggs were stored in plastic packages with lids after the application of mineral oil. The internal quality was measured by Haugh units, by the counts of mesophilic and psychrotrophic microorganisms, by the most probable number of total and thermal-tolerant coliforms, by the counts of molds and yeasts, by the analysis of Salmonella spp. and Staphylococcus spp., and by the levels of biogenic amines in the egg yolk and albumen. The application of mineral oil to the eggshell resulted in higher Haugh unit values throughout storage, and the use of plastic packages altered the internal quality. The application of mineral oil and the use of packaging had no effects on the microbiological and biogenic amine results. Microbiological analyses showed the absence of Salmonella spp., Staphylococcus aureus, thermal-tolerant coliforms, and fungi. However, the highest counts of mesophilic (1.1 × 10(7) cfu/g) and psychrotrophic (6.7 × 10(7) cfu/g) microorganisms were recorded. The highest values of biogenic amines detected and quantified were putrescine (2.38 mg/kg) and cadaverine (7.27 mg/kg) in the egg yolk and putrescine (1.95 mg/kg), cadaverine (2.83 mg/kg), and phenylethylamine (2.57 mg/kg) in the albumen. Despite these results, the biogenic amine levels recorded were considered low and would not be harmful to consumer health. ©2014 Poultry Science Association Inc.

Methodologies for assessing long-term performance of high-level radioactive waste packages

International Nuclear Information System (INIS)

Stephens, K.; Boesch, L.; Crane, B.; Johnson, R.; Moler, R.; Smith, S.; Zaremba, L.

1986-01-01

Several methods the Nuclear Regulatory Commission (NRC) can use to independently assess Department of Energy (DOE) waste package performance were identified by The Aerospace Corporation. The report includes an overview of the necessary attributes of performance assessment, followed by discussions of DOE methods, probabilistic methods capable of predicting waste package lifetime and radionuclide releases, process modeling of waste package barriers, sufficiency of the necessary input data, and the applicability of probability density functions. It is recommended that the initial NRC performance assessment (for the basalt conceptual waste package design) should apply modular simulation, using available process models and data, to demonstrate this assessment method

Nuclear-waste-package program for high-level isolation in Nevada tuff

International Nuclear Information System (INIS)

Rothman, A.J.

1982-01-01

The objective of the waste package program is to insure that a package is designed suitable for a repository in tuff that meets performance requirements of the NRC. In brief, the current (draft) regulation requires that the radionuclides be contained in the engineered system for 1000 years, and that, thereafter, no more than one part in 10 5 of the nuclides per year leave the boundary of the system. Studies completed as of this writing are thermal modeling of waste packages in a tuff repository and analysis of sodium bentonite as a potential backfill material. Both studies will be presented. Thermal calculations coupled with analysis of the geochemical literature on bentonite indicate that extensive chemical and physical alteration of bentonite would result at the high power densities proposed (ca. 2 kW/package and an area density of 25 W/m 2 ), in part due to compacted bentonite's relatively low thermal conductivity when dehydrated (approx. 0.6 +- 0.2 W/m 0 C). Because our groundwater contains K + , an upper hydrothermal temperature limit appears to be 120 to 150 0 C. At much lower power densities (less than 1 kW per package and an areal density of 12 W/m 2 ), bentonite may be suitable

Formation of III–V-on-insulator structures on Si by direct wafer bonding

International Nuclear Information System (INIS)

Yokoyama, Masafumi; Iida, Ryo; Ikku, Yuki; Kim, Sanghyeon; Takenaka, Mitsuru; Takagi, Shinichi; Takagi, Hideki; Yasuda, Tetsuji; Yamada, Hisashi; Ichikawa, Osamu; Fukuhara, Noboru; Hata, Masahiko

2013-01-01

We have studied the formation of III–V-compound-semiconductors-on-insulator (III–V-OI) structures with thin buried oxide (BOX) layers on Si wafers by using developed direct wafer bonding (DWB). In order to realize III–V-OI MOSFETs with ultrathin body and extremely thin body (ETB) InGaAs-OI channel layers and ultrathin BOX layers, we have developed an electron-cyclotron resonance (ECR) O 2 plasma-assisted DWB process with ECR sputtered SiO 2 BOX layers and a DWB process based on atomic-layer-deposition Al 2 O 3 (ALD-Al 2 O 3 ) BOX layers. It is essential to suppress micro-void generation during wafer bonding process to achieve excellent wafer bonding. We have found that major causes of micro-void generation in DWB processes with ECR-SiO 2 and ALD-Al 2 O 3 BOX layers are desorption of Ar and H 2 O gas, respectively. In order to suppress micro-void generation in the ECR-SiO 2 BOX layers, it is effective to introduce the outgas process before bonding wafers. On the other hand, it is a possible solution for suppressing micro-void generation in the ALD-Al 2 O 3 BOX layers to increase the deposition temperature of the ALD-Al 2 O 3 BOX layers. It is also another possible solution to deposit ALD-Al 2 O 3 BOX layers on thermally oxidized SiO 2 layers, which can absorb the desorption gas from ALD-Al 2 O 3 BOX layers. (invited paper)

Fabrication of high aspect ratio through-wafer copper interconnects by reverse pulse electroplating

International Nuclear Information System (INIS)

Gu, Changdong; Zhang, Tong-Yi; Xu, Hui

2009-01-01

This study aims to fabricate high aspect ratio through-wafer copper interconnects by a simple reverse pulse electroplating technique. High aspect-ratio (∼18) through-wafer holes obtained by a two-step deep reactive ion etching (DRIE) process exhibit a taper profile, which might automatically optimize the local current density distribution during the electroplating process, thereby achieving void-free high aspect-ratio copper vias

Non-Destructive Damping Measurement for Wafer-Level Packaged Microelectromechanical System (MEMS) Acceleration Switches

Science.gov (United States)

2014-09-01

small geometries and inertial forces are often negligible, so the behavior of fluids is based primarily on the viscous effects.3 Experimental...system modeling. In isolated environments filled with a working fluid that dissipates energy, damping between parallel and sliding plates that are... damper in a second-order differential equation. Fig. 1 Example of the data taken by the data acquisition device The impact table will produce high

InGaAs-OI Substrate Fabrication on a 300 mm Wafer

Directory of Open Access Journals (Sweden)

Sebastien Sollier

2016-09-01

Full Text Available In this work, we demonstrate for the first time a 300-mm indium–gallium–arsenic (InGaAs wafer on insulator (InGaAs-OI substrates by splitting in an InP sacrificial layer. A 30-nm-thick InGaAs layer was successfully transferred using low temperature direct wafer bonding (DWB and Smart CutTM technology. Three key process steps of the integration were therefore specifically developed and optimized. The first one was the epitaxial growing process, designed to reduce the surface roughness of the InGaAs film. Second, direct wafer bonding conditions were investigated and optimized to achieve non-defective bonding up to 600 °C. Finally, we adapted the splitting condition to detach the InGaAs layer according to epitaxial stack specifications. The paper presents the overall process flow that achieved InGaAs-OI, the required optimization, and the associated characterizations, namely atomic force microscopy (AFM, scanning acoustic microscopy (SAM, and HR-XRD, to insure the crystalline quality of the post transferred layer.

Packaging Technologies for High Temperature Electronics and Sensors

Science.gov (United States)

Chen, Liangyu; Hunter, Gary W.; Neudeck, Philip G.; Beheim, Glenn M.; Spry, David J.; Meredith, Roger D.

2013-01-01

This paper reviews ceramic substrates and thick-film metallization based packaging technologies in development for 500degC silicon carbide (SiC) electronics and sensors. Prototype high temperature ceramic chip-level packages and printed circuit boards (PCBs) based on ceramic substrates of aluminum oxide (Al2O3) and aluminum nitride (AlN) have been designed and fabricated. These ceramic substrate-based chiplevel packages with gold (Au) thick-film metallization have been electrically characterized at temperatures up to 550degC. A 96% alumina based edge connector for a PCB level subsystem interconnection has also been demonstrated recently. The 96% alumina packaging system composed of chip-level packages and PCBs has been tested with high temperature SiC devices at 500degC for over 10,000 hours. In addition to tests in a laboratory environment, a SiC JFET with a packaging system composed of a 96% alumina chip-level package and an alumina printed circuit board mounted on a data acquisition circuit board was launched as a part of the MISSE-7 suite to the International Space Station via a Shuttle mission. This packaged SiC transistor was successfully tested in orbit for eighteen months. A spark-plug type sensor package designed for high temperature SiC capacitive pressure sensors was developed. This sensor package combines the high temperature interconnection system with a commercial high temperature high pressure stainless steel seal gland (electrical feed-through). Test results of a packaged high temperature capacitive pressure sensor at 500degC are also discussed. In addition to the pressure sensor package, efforts for packaging high temperature SiC diode-based gas chemical sensors are in process.

SiC epitaxial layer growth in a novel multi-wafer VPE reactor

Energy Technology Data Exchange (ETDEWEB)

Burk, A.A. Jr.; O`Loughlin, M.J. [Northrop Grumman Advanced Technology Lab., Baltimore, MD (United States); Mani, S.S. [Northrop Grumman Science and Technology Center, Pittsburgh, PA (United States)

1998-06-01

Preliminary results are presented for SiC epitaxial layer growth employing a unique planetary SiC-VPE reactor. The high-throughput, multi-wafer (7 x 2-inch) reactor, was designed for atmospheric and reduced pressure operation at temperatures up to and exceeding 1600 C. Specular epitaxial layers have been grown in the reactor at growth rates from 3-5 {mu}m/hr. The thickest layer grown to data was 42 {mu}m. The layers exhibit minimum unintentional n-type doping of {proportional_to}1 x 10{sup 15} cm{sup -3}, room temperature mobilities of {proportional_to}1000 cm{sup 2}/Vs, and intentional n-type doping from {proportional_to}5 x 10{sup 15} cm{sup -3} to >1 x 10{sup 19} cm{sup -3}. Intrawafer thickness and doping uniformities of 4% and 7% (standard deviation/mean) have been obtained, respectively, on 35 mm diameter substrates. Recently, 3% thickness uniformity has been demonstrated on a 50 mm substrate. Within a run, wafer-to-wafer thickness deviation is {proportional_to}4-14%. Doping variation is currently larger, ranging as much as a factor of two from the highest to the lowest doped wafer. Continuing efforts to improve the susceptor temperature uniformity and reduce unintentional hydrocarbon generation to improve layer uniformity and reproducibility, are presented. (orig.) 18 refs.

A Study of the Charge Trap Transistor (CTT) for Post-Fab Modification of Wafers

Science.gov (United States)

2018-04-01

AFRL-RY-WP-TR-2018-0030 A STUDY OF THE CHARGE TRAP TRANSISTOR (CTT) FOR POST- FAB MODIFICATION OF WAFERS Subramanian S. Iyer University of California...Final 13 June 2016 – 13 December 2017 4. TITLE AND SUBTITLE A STUDY OF THE CHARGE TRAP TRANSISTOR (CTT) FOR POST- FAB MODIFICATION OF WAFERS 5a. CONTRACT

Technical considerations for evaluating substantially complete containment of high-level waste within the waste package

Energy Technology Data Exchange (ETDEWEB)

Manaktala, H.K. (Southwest Research Inst., San Antonio, TX (USA). Center for Nuclear Waste Regulatory Analyses); Interrante, C.G. (Nuclear Regulatory Commission, Washington, DC (USA). Div. of High-Level Waste Management)

1990-12-01

This report deals with technical information that is considered essential for demonstrating the ability of the high-level radioactive waste package to provide substantially complete containment'' of its contents (vitrified waste form or spent light-water reactor fuel) for a period of 300 to 1000 years in a geological repository environment. The discussion is centered around technical considerations of the repository environment, materials and fabrication processes for the waste package components, various degradation modes of the materials of construction of the waste packages, and inspection and monitoring of the waste package during the preclosure and retrievability period, which could begin up to 50 years after initiation of waste emplacement. The emphasis in this report is on metallic materials. However, brief references have been made to other materials such as ceramics, graphite, bonded ceramic-metal systems, and other types of composites. The content of this report was presented to an external peer review panel of nine members at a workshop held at the Center for Nuclear Waste Regulatory Analyses (CNWRA), Southwest Research Institute, San Antonio, Texas, April 2--4, 1990. The recommendations of the peer review panel have been incorporated in this report. There are two companion reports; the second report in the series provides state-of-the-art techniques for uncertainty evaluations. 97 refs., 1 fig.

Technical considerations for evaluating substantially complete containment of high-level waste within the waste package

International Nuclear Information System (INIS)

Manaktala, H.K.; Interrante, C.G.

1990-12-01

This report deals with technical information that is considered essential for demonstrating the ability of the high-level radioactive waste package to provide ''substantially complete containment'' of its contents (vitrified waste form or spent light-water reactor fuel) for a period of 300 to 1000 years in a geological repository environment. The discussion is centered around technical considerations of the repository environment, materials and fabrication processes for the waste package components, various degradation modes of the materials of construction of the waste packages, and inspection and monitoring of the waste package during the preclosure and retrievability period, which could begin up to 50 years after initiation of waste emplacement. The emphasis in this report is on metallic materials. However, brief references have been made to other materials such as ceramics, graphite, bonded ceramic-metal systems, and other types of composites. The content of this report was presented to an external peer review panel of nine members at a workshop held at the Center for Nuclear Waste Regulatory Analyses (CNWRA), Southwest Research Institute, San Antonio, Texas, April 2--4, 1990. The recommendations of the peer review panel have been incorporated in this report. There are two companion reports; the second report in the series provides state-of-the-art techniques for uncertainty evaluations. 97 refs., 1 fig

Cohesive zone modelling of wafer bonding and fracture: effect of patterning and toughness variations

Science.gov (United States)

Kubair, D. V.; Spearing, S. M.

2006-03-01

Direct wafer bonding has increasingly become popular in the manufacture of microelectromechanical systems and semiconductor microelectronics components. The success of the bonding process is controlled by variables such as wafer flatness and surface preparation. In order to understand the effects of these variables, spontaneous planar crack propagation simulations were performed using the spectral scheme in conjunction with a cohesive zone model. The fracture-toughness on the bond interface is varied to simulate the effect of surface roughness (nanotopography) and patterning. Our analysis indicated that the energetics of crack propagation is sensitive to the local surface property variations. The patterned wafers are tougher (well bonded) than the unpatterned ones of the same average fracture-toughness.

Mechanical Properties of Photovoltaic Silicon in Relation to Wafer Breakage

Science.gov (United States)

Kulshreshtha, Prashant Kumar

This thesis focuses on the fundamental understanding of stress-modified crack-propagation in photovoltaic (PV) silicon in relation to the critical issue of PV silicon "wafer breakage". The interactions between a propagating crack and impurities/defects/residual stresses have been evaluated for consequential fracture path in a thin PV Si wafer. To investigate the mechanism of brittle fracture in silicon, the phase transformations induced by elastic energy released at a propagating crack-tip have been evaluated by locally stressing the diamond cubic Si lattice using a rigid Berkovich nanoindenter tip (radius ≈50 nm). Unique pressure induced phase transformations and hardness variations have been then related to the distribution of precipitates (O, Cu, Fe etc.), and the local stresses in the wafer. This research demonstrates for the first time the "ductile-like fracture" in almost circular crack path that significantly deviates from its energetically favorable crystallographic [110](111) system. These large diameter (≈ 200 mm) Si wafers were sliced to less than 180 microm thickness from a Czochralski (CZ) ingot that was grown at faster than normal growth rates. The vacancy (vSi) driven precipitation of oxygen at enhanced thermal gradients in the wafer core develops large localized stresses (upto 100 MPa) which we evaluated using Raman spectral analysis. Additional micro-FTIR mapping and microscopic etch pit measurements in the wafer core have related the observed crack path deviations to the presence of concentric ring-like distributions of oxygen precipitates (OPs). To replicate these "real-world" breakage scenarios and provide better insight on crack-propagation, several new and innovative tools/devices/methods have been developed in this study. An accurate quantitative profiling of local stress, phase changes and load-carrying ability of Si lattice has been performed in the vicinity of the controlled micro-cracks created using micro-indentations to represent

Interim storage of radioactive waste packages

International Nuclear Information System (INIS)

1998-01-01

This report covers all the principal aspects of production and interim storage of radioactive waste packages. The latest design solutions of waste storage facilities and the operational experiences of developed countries are described and evaluated in order to assist developing Member States in decision making and design and construction of their own storage facilities. This report is applicable to any category of radioactive waste package prepared for interim storage, including conditioned spent fuel, high level waste and sealed radiation sources. This report addresses the following issues: safety principles and requirements for storage of waste packages; treatment and conditioning methods for the main categories of radioactive waste; examples of existing interim storage facilities for LILW, spent fuel and high level waste; operational experience of Member States in waste storage operations including control of storage conditions, surveillance of waste packages and observation of the behaviour of waste packages during storage; retrieval of waste packages from storage facilities; technical and administrative measures that will ensure optimal performance of waste packages subject to various periods of interim storage

Silicon-to-silicon wafer bonding using evaporated glass

DEFF Research Database (Denmark)

Weichel, Steen; Reus, Roger De; Lindahl, M.

1998-01-01

Anodic bending of silicon to silicon 4-in. wafers using an electron-beam evaporated glass (Schott 8329) was performed successfully in air at temperatures ranging from 200 degrees C to 450 degrees C. The composition of the deposited glass is enriched in sodium as compared to the target material....... The roughness of the as-deposited films was below 5 nm and was found to be unchanged by annealing at 500 degrees C for 1 h in air. No change in the macroscopic edge profiles of the glass film was found as a function of annealing; however, small extrusions appear when annealing above 450 degrees C. Annealing...... of silicon/glass structures in air around 340 degrees C for 15 min leads to stress-free structures. Bonded wafer pairs, however, show no reduction in stress and always exhibit compressive stress. The bond yield is larger than 95% for bonding temperatures around 350 degrees C and is above 80% for bonding...

Contacting graphene in a 200 mm wafer silicon technology environment

Science.gov (United States)

Lisker, Marco; Lukosius, Mindaugas; Kitzmann, Julia; Fraschke, Mirko; Wolansky, Dirk; Schulze, Sebastian; Lupina, Grzegorz; Mai, Andreas

2018-06-01

Two different approaches for contacting graphene in a 200 mm wafer silicon technology environment were tested. The key is the opportunity to create a thin SiN passivation layer on top of the graphene protecting it from the damage by plasma processes. The first approach uses pure Ni contacts with a thickness of 200 nm. For the second attempt, Ni is used as the contact metal which substitutes the Ti compared to a standard contact hole filling process. Accordingly, the contact hole filling of this "stacked via" approach is Ni/TiN/W. We demonstrate that the second "stacked Via" is beneficial and shows contact resistances of a wafer scale process with values below 200 Ohm μm.

Radioactive material packaging performance testing

International Nuclear Information System (INIS)

Romano, T.; Cruse, J.M.

1991-02-01

To provide uniform packaging of hazardous materials on an international level, the United Nations has developed packaging recommendations that have been implemented worldwide. The United Nations packaging recommendations are performance oriented, allowing for a wide variety of package materials and systems. As a result of this international standard, efforts in the United States are being directed toward use of performance-oriented packaging and elimination of specification (designed) packaging. This presentation will focus on trends, design evaluation, and performance testing of radioactive material packaging. The impacts of US Department of Transportation Dockets HM-181 and HM-169A on specification and low-specific activity radioactive material packaging requirements are briefly discussed. The US Department of Energy's program for evaluating radioactive material packings per US Department of Transportation Specification 7A Type A requirements, is used as the basis for discussing low-activity packaging performance test requirements. High-activity package testing requirements are presented with examples of testing performed at the Hanford Site that is operated by Westinghouse Hanford Company for the US Department of Energy. 5 refs., 2 tabs

Probing and irradiation tests of ALICE pixel chip wafers and sensors

CERN Document Server

Cinausero, M; Antinori, F; Chochula, P; Dinapoli, R; Dima, R; Fabris, D; Galet, G; Lunardon, M; Manea, C; Marchini, S; Martini, S; Moretto, S; Pepato, Adriano; Prete, G; Riedler, P; Scarlassara, F; Segato, G F; Soramel, F; Stefanini, G; Turrisi, R; Vannucci, L; Viesti, G

2004-01-01

In the framework of the ALICE Silicon Pixel Detector (SPD) project a system dedicated to the tests of the ALICE1LHCb chip wafers has been assembled and is now in use for the selection of pixel chips to be bump-bonded to sensor ladders. In parallel, radiation hardness tests of the SPD silicon sensors have been carried out using the 27 MeV proton beam delivered by the XTU TANDEM accelerator at the SIRAD facility in LNL. In this paper we describe the wafer probing and irradiation set-ups and we report the obtained results. (6 refs).

Wafer defect detection by a polarization-insensitive external differential interference contrast module.

Science.gov (United States)

Nativ, Amit; Feldman, Haim; Shaked, Natan T

2018-05-01

We present a system that is based on a new external, polarization-insensitive differential interference contrast (DIC) module specifically adapted for detecting defects in semiconductor wafers. We obtained defect signal enhancement relative to the surrounding wafer pattern when compared with bright-field imaging. The new DIC module proposed is based on a shearing interferometer that connects externally at the output port of an optical microscope and enables imaging thin samples, such as wafer defects. This module does not require polarization optics (such as Wollaston or Nomarski prisms) and is insensitive to polarization, unlike traditional DIC techniques. In addition, it provides full control of the DIC shear and orientation, which allows obtaining a differential phase image directly on the camera (with no further digital processing) while enhancing defect detection capabilities, even if the size of the defect is smaller than the resolution limit. Our technique has the potential of future integration into semiconductor production lines.

Camera-Based Lock-in and Heterodyne Carrierographic Photoluminescence Imaging of Crystalline Silicon Wafers

Science.gov (United States)

Sun, Q. M.; Melnikov, A.; Mandelis, A.

2015-06-01

Carrierographic (spectrally gated photoluminescence) imaging of a crystalline silicon wafer using an InGaAs camera and two spread super-bandgap illumination laser beams is introduced in both low-frequency lock-in and high-frequency heterodyne modes. Lock-in carrierographic images of the wafer up to 400 Hz modulation frequency are presented. To overcome the frame rate and exposure time limitations of the camera, a heterodyne method is employed for high-frequency carrierographic imaging which results in high-resolution near-subsurface information. The feasibility of the method is guaranteed by the typical superlinearity behavior of photoluminescence, which allows one to construct a slow enough beat frequency component from nonlinear mixing of two high frequencies. Intensity-scan measurements were carried out with a conventional single-element InGaAs detector photocarrier radiometry system, and the nonlinearity exponent of the wafer was found to be around 1.7. Heterodyne images of the wafer up to 4 kHz have been obtained and qualitatively analyzed. With the help of the complementary lock-in and heterodyne modes, camera-based carrierographic imaging in a wide frequency range has been realized for fundamental research and industrial applications toward in-line nondestructive testing of semiconductor materials and devices.

New overlay measurement technique with an i-line stepper using embedded standard field image alignment marks for wafer bonding applications

Science.gov (United States)

Kulse, P.; Sasai, K.; Schulz, K.; Wietstruck, M.

2017-06-01

In the last decades the semiconductor technology has been driven by Moore's law leading to high performance CMOS technologies with feature sizes of less than 10 nm [1]. It has been pointed out that not only scaling but also the integration of novel components and technology modules into CMOS/BiCMOS technologies is becoming more attractive to realize smart and miniaturized systems [2]. Driven by new applications in the area of communication, health and automation, new components and technology modules such as BiCMOS embedded RF-MEMS, high-Q passives, Sibased microfluidics and InP-SiGe BiCMOS heterointegration have been demonstrated [3-6]. In contrast to standard VLSI processes fabricated on front side of the silicon wafer, these new technology modules require addition backside processing of the wafer; thus an accurate alignment between the front and backside of the wafer is mandatory. In previous work an advanced back to front side alignment technique and implementation into IHP's 0.25/0.13 μm high performance SiGe:C BiCMOS backside process module has been presented [7]. The developed technique enables a high resolution and accurate lithography on the backside of BiCMOS wafer for additional backside processing. In addition to the aforementioned back side process technologies, new applications like Through-Silicon Vias (TSV) for interposers and advanced substrate technologies for 3D heterogeneous integration demand not only single wafer fabrication but also processing of wafer stacks provided by temporary and permanent wafer bonding [8]. Therefore, the available overlay measurement techniques are not suitable if overlay and alignment marks are realized at the bonding interface of a wafer stack which consists of both a silicon device and a silicon carrier wafer. The former used EVG 40NT automated overlay measurement system, which use two opposite positioned microscopes inspecting simultaneous the wafer back and front side, is not capable measuring embedded overlay

Effect of alpha and gamma radiation on the near-field chemistry and geochemistry of high-level waste packages

International Nuclear Information System (INIS)

Reed, D.T.

1985-12-01

Ionizing radiation can potentially alter geochemical and chemical processes in a geologic system. These effects can either enhance or reduce the performance of the waste package in a deep geologic repository. Current indications are that, in a repository located in basalt, ionizing radiation significantly affects geochemical/chemical processes but does not appear to significantly affect factors important to the long-term performance of the repository. The experimental results presented in this paper were obtained as part of an ongoing effort by the Basalt Waste Isolation Project to determine the effect of ionizing radiation on chemical and geochemical processes in the environment of the waste package. Gamma radiolysis experiments were done by subjecting samples of synthetic basalt groundwater in the presence of various waste package components (basalt/packing/low-carbon steel) to high levels of gamma radiation from a 60 Co source. Post-irradiation analysis was done on the gas, liquid, and solid components of the basalt system. The results obtained are important in evaluating waste package performance during the containment period. The effect of alpha radiation on the basalt groundwater system in the presence of waste package components is important in evaluating waste package performance during the isolation period. The experimental work in this area is in a very preliminary stage. Results from two experiments are reported. 9 refs., 4 figs., 7 tabs

Wafer-Scale Integration of Systolic Arrays,

Science.gov (United States)

1985-10-01

hus wtha rbaiith hig robabili, e aubrbe orutysta mostck b(e)adstotoefwsi the cenofther cnnel thati are connted to (g.The kery ato the alevel of t...problems considered heretofore in this paper also have an interpretation in a purely graph theoretic model. Suppose we are given a two-dimensional...graphs," Magyar 7Td. Akad. Math . Kut. Int. Kozl, Vol. 5, 1960, pp. 17-61. [6] D. Fussell and P. Varman, "Fault-tolerant wafer-scale architectures for

Severe Accident Research Network (SARNET). Level 2 PSA work package: comparison of partners methods for uncertainties assessment

International Nuclear Information System (INIS)

Chaumont, B.; Haesendonck, M.; Vidal, S.; Eyink, J.; Loeffler, H.; Radu, G.; Kopustinskas, V.; Ming, A.; Guntay, S.; Gustavsson, V.; Ivanov, I.; Dienstbier, J.; Bareith, A.; Hollo, E.; Lajtha, G.

2007-01-01

The PSA2 work package (PSA2 WP) is a part of the Joined Programme Activity of the European Severe Accident Network (SARNET) related to level 2 PSA methodologies. The general objectives of this work package is to provide a comparison of the different methodologies used or under development for level 2 PSA application by the partners involved in the work package and to promote their harmonization. The PSA2 WP is organized into three main topics: methodologies in general, methodologies for uncertainties assessment, and dynamic reliability methods. The different tasks initially defined for these three topics are shortly described and the partners involved identified. Attention is then paid on the methodologies used so far by the different partners to assess the uncertainties in their level 2 PSA. A review of partners approaches to assess - as far as possible - the different sources of possible uncertainties is done for the different following topics: - uncertainties propagated from the level 1 PSA, - uncertainties (in sense of approximation) due to the binning of the level 1 sequences in Plant Damage, - uncertainties related to the structure of the Accident Progression Event Tree, - uncertainties related to the probabilities of stochastic events (system failure or recovery, human actions, some physical phenomena such as ignition of hydrogen combustion or triggering of steam explosion), - uncertainties elated to the modelling of the different physical phenomena, - uncertainties related to the cut-off frequency used in the probabilistic quantification of the Accident Progression Event Tree; - uncertainties related to the binning of level 2 sequences in Release Categories (variables not considered, values of eventual continuous variables). First conclusions of the comparison are given in terms of improvement needs and then of perspectives of the work for the following period of work. (authors)

Wafer-level MOCVD growth of AlGaN/GaN-on-Si HEMT structures with ultra-high room temperature 2DEG mobility

Directory of Open Access Journals (Sweden)

Xiaoqing Xu

2016-11-01

Full Text Available In this work, we investigate the influence of growth temperature, impurity concentration, and metal contact structure on the uniformity and two-dimensional electron gas (2DEG properties of AlGaN/GaN high electron mobility transistor (HEMT structure grown by metal-organic chemical vapor deposition (MOCVD on 4-inch Si substrate. High uniformity of 2DEG mobility (standard deviation down to 0.72% across the radius of the 4-inch wafer has been achieved, and 2DEG mobility up to 1740.3 cm2/V⋅s at room temperature has been realized at low C and O impurity concentrations due to reduced ionized impurity scattering. The 2DEG mobility is further enhanced to 2161.4 cm2/V⋅s which is comparable to the highest value reported to date when the contact structure is switched from a square to a cross pattern due to reduced piezoelectric scattering at lower residual strain. This work provides constructive insights and promising results to the field of wafer-scale fabrication of AlGaN/GaN HEMT on Si.

Effects of gas-flow structures on radical and etch-product density distributions on wafers in magnetomicrowave plasma etching reactors

International Nuclear Information System (INIS)

Ikegawa, Masato; Kobayashi, Jun'ichi; Fukuyama, Ryoji

2001-01-01

To achieve high etch rate, uniformity, good selectivity, and etch profile control across large diameter wafers, the distributions of ions, radicals, and etch products in magnetomicrowave high-etch-rate plasma etching reactors must be accurately controlled. In this work the effects of chamber heights, a focus ring around the wafer, and gas supply structures (or gas flow structures) on the radicals and etch products flux distribution onto the wafer were examined using the direct simulation Monte Carlo method and used to determine the optimal reactor geometry. The pressure uniformity on the wafer was less than ±1% when the chamber height was taller than 60 mm. The focus ring around the wafer produced uniform radical and etch-product fluxes but increased the etch-product flux on the wafer. A downward-flow gas-supply structure (type II) produced a more uniform radical distribution than that produced by a radial gas-supply structure (type I). The impact flow of the type II structure removed etch products from the wafer effectively and produced a uniform etch-product distribution even without the focus ring. Thus the downward-flow gas-supply structure (type II) was adopted in the design for the second-generation of a magnetomicrowave plasma etching reactor with a higher etching rate

International Collaboration in Packaging Education: Hands-on System-on-Package (SOP) Graduate Level Courses at Indian Institute of Science and Georgia Tech PRC

OpenAIRE

Varadarajan, Mahesh; Bhattacharya, Swapan; Doraiswami, Ravi; Rao, Ananda G; Rao, NJ; May, Gary; Conrad, Leyla; Tummala, Rao

2005-01-01

System-on-Package (SOP) continues to revolutionize the realization of convergent systems in microelectronics packaging. The SOP concept which began at the Packaging Research Center (PRC) at Georgia Tech has benefited its international collaborative partners in education including the Indian Institute of Science (IISc). The academic program for electronics packaging currently in the Centre for Electronics Design and Technology (CEDT) at IISc is aimed at educating a new breed of globally-compet...

Sol-gel bonding of silicon wafers

International Nuclear Information System (INIS)

Barbe, C.J.; Cassidy, D.J.; Triani, G.; Latella, B.A.; Mitchell, D.R.G.; Finnie, K.S.; Short, K.; Bartlett, J.R.; Woolfrey, J.L.; Collins, G.A.

2005-01-01

Sol-gel bonds have been produced between smooth, clean silicon substrates by spin-coating solutions containing partially hydrolysed silicon alkoxides. The two coated substrates were assembled and the resulting sandwich fired at temperatures ranging from 60 to 600 deg. C. The sol-gel coatings were characterised using attenuated total reflectance Fourier transform infrared spectroscopy, ellipsometry, and atomic force microscopy, while the corresponding bonded specimens were investigated using scanning electron microscopy and cross-sectional transmission electron microscopy. Mechanical properties were characterised using both microindentation and tensile testing. Bonding of silicon wafers has been successfully achieved at temperatures as low as 60 deg. C. At 300 deg. C, the interfacial fracture energy was 1.55 J/m 2 . At 600 deg. C, sol-gel bonding provided superior interfacial fracture energy over classical hydrophilic bonding (3.4 J/m 2 vs. 1.5 J/m 2 ). The increase in the interfacial fracture energy is related to the increase in film density due to the sintering of the sol-gel interface with increasing temperature. The superior interfacial fracture energy obtained by sol-gel bonding at low temperature is due to the formation of an interfacial layer, which chemically bonds the two sol-gel coatings on each wafer. Application of a tensile stress on the resulting bond leads to fracture of the samples at the silicon/sol-gel interface

Reference waste package environment report

International Nuclear Information System (INIS)

Glassley, W.E.

1986-01-01

One of three candidate repository sites for high-level radioactive waste packages is located at Yucca Mountain, Nevada, in rhyolitic tuff 700 to 1400 ft above the static water table. Calculations indicate that the package environment will experience a maximum temperature of ∼230 0 C at 9 years after emplacement. For the next 300 years the rock within 1 m of the waste packages will remain dehydrated. Preliminary results suggest that the waste package radiation field will have very little effect on the mechanical properties of the rock. Radiolysis products will have a negligible effect on the rock even after rehydration. Unfractured specimens of repository rock show no change in hydrologic characteristics during repeated dehydration-rehydration cycles. Fractured samples with initially high permeabilities show a striking permeability decrease during dehydration-rehydration cycling, which may be due to fracture healing via deposition of silica. Rock-water interaction studies demonstrate low and benign levels of anions and most cations. The development of sorptive secondary phases such as zeolites and clays suggests that anticipated rock-water interaction may produce beneficial changes in the package environment

Xe{sup +} ion beam induced rippled structures on Si miscut wafers

Energy Technology Data Exchange (ETDEWEB)

Hanisch, Antje; Grenzer, Joerg [Forschungszentrum Dresden-Rossendorf, Dresden (Germany); Biermanns, Andreas; Pietsch, Ullrich [Institute of Physics, University of Siegen (Germany)

2009-07-01

We report on the influence of the initial roughness and crystallography of the substrate on the formation of self-organized ripple structures on semiconductors surfaces by noble gas ion bombardment. The Bradley-Harper theory predicts that an initial roughness is most important for starting the sputtering process which in the ends leads to the evolution of regular patterns. We produced periodic structures with intermediate Xe{sup +} ion energies (5-70 keV) at different incidence and azimuthal angles which lead to the assumption that also crystallography plays a role at the beginning of ripple evolution. Most of the previous investigations started from the original roughness of a polished silicon wafer. We used (001) silicon wafers with a miscut angle of 1 , 5 and 10 towards[110]. We studied the ripple formation keeping the ion beam parallel to the[111],[-1-11] or[-111] direction, i.e. parallel, antiparallel or perpendicular to the miscut direction[110]. The parallel and antiparallel case implies a variation of the incidence angle with increased roughness over the surface step terraces. The perpendicular orientation means almost no roughness. The results were compared to normal Si(001) and Si(111) wafers.

The role of Gliadel wafers in the treatment of newly diagnosed GBM: a meta-analysis

Directory of Open Access Journals (Sweden)

Xing WK

2015-06-01

Full Text Available Wei-kang Xing,1 Chuan Shao,2 Zhen-yu Qi,1 Chao Yang,1 Zhong Wang1 1Department of Neurosurgery, The First Affiliated Hospital of Soochow University, Suzhou, Jiangsu, 2Department of Neurosurgery, The Second Clinical Medical College of North Sichuan Medical College, Nanchong, Sichuan, People’s Republic of China Background: Standard treatment for high-grade glioma (HGG includes surgery followed by radiotherapy and/or chemotherapy. Insertion of carmustine wafers into the resection cavity as a treatment for malignant glioma is currently a controversial topic among neurosurgeons. Our meta-analysis focused on whether carmustine wafer treatment could significantly benefit the survival of patients with newly diagnosed glioblastoma multiforme (GBM.Method: We searched the PubMed and Web of Science databases without any restrictions on language using the keywords “Gliadel wafers”, “carmustine wafers”, “BCNU wafers”, or “interstitial chemotherapy” in newly diagnosed GBM for the period from January 1990 to March 2015. Randomized controlled trials (RCTs and cohort studies/clinical trials that compared treatments designed with and without carmustine wafers and which reported overall survival or hazard ratio (HR or survival curves were included in this study. Moreover, the statistical analysis was conducted by the STATA 12.0 software.Results: Six studies including two RCTs and four cohort studies, enrolling a total of 513 patients (223 with and 290 without carmustine wafers, matched the selection criteria. Carmustine wafers showed a strong advantage when pooling all the included studies (HR =0.63, 95% confidence interval (CI =0.49–0.81; P=0.019. However, the two RCTs did not show a statistical increase in survival in the group with carmustine wafer compared to the group without it (HR =0.51, 95% CI =0.18–1.41; P=0.426, while the cohort studies demonstrated a significant survival increase (HR =0.59, 95% CI =0.44–0.79; P<0.0001.Conclusion

Design Expert Supported Mathematical Optimization and Predictability Study of Buccoadhesive Pharmaceutical Wafers of Loratadine

Directory of Open Access Journals (Sweden)

Prithviraj Chakraborty

2013-01-01

Full Text Available Objective. The objective of this work encompasses the application of the response surface approach in the development of buccoadhesive pharmaceutical wafers of Loratadine (LOR. Methods. Experiments were performed according to a 32 factorial design to evaluate the effects of buccoadhesive polymer, sodium alginate (A, and lactose monohydrate as ingredient, of hydrophilic matrix former (B on the bioadhesive force, disintegration time, percent (% swelling index, and time taken for 70% drug release (t70%. The effect of the two independent variables on the response variables was studied by response surface plots and contour plots generated by the Design-Expert software. The desirability function was used to optimize the response variables. Results. The compatibility between LOR and the wafer excipients was confirmed by differential scanning calorimetry, FTIR spectroscopy, and X-ray diffraction (XRD analysis. Bioadhesion force, measured with TAXT2i texture analyzer, showed that the wafers had a good bioadhesive property which could be advantageous for retaining the drug into the buccal cavity. Conclusion. The observed responses taken were in agreement with the experimental values, and Loratadine wafers were produced with less experimental trials, and a patient compliant product was achieved with the concept of formulation by design.

Design Expert Supported Mathematical Optimization and Predictability Study of Buccoadhesive Pharmaceutical Wafers of Loratadine

Science.gov (United States)

Dey, Surajit; Parcha, Versha; Bhattacharya, Shiv Sankar; Ghosh, Amitava

2013-01-01

Objective. The objective of this work encompasses the application of the response surface approach in the development of buccoadhesive pharmaceutical wafers of Loratadine (LOR). Methods. Experiments were performed according to a 32 factorial design to evaluate the effects of buccoadhesive polymer, sodium alginate (A), and lactose monohydrate as ingredient, of hydrophilic matrix former (B) on the bioadhesive force, disintegration time, percent (%) swelling index, and time taken for 70% drug release (t 70%). The effect of the two independent variables on the response variables was studied by response surface plots and contour plots generated by the Design-Expert software. The desirability function was used to optimize the response variables. Results. The compatibility between LOR and the wafer excipients was confirmed by differential scanning calorimetry, FTIR spectroscopy, and X-ray diffraction (XRD) analysis. Bioadhesion force, measured with TAXT2i texture analyzer, showed that the wafers had a good bioadhesive property which could be advantageous for retaining the drug into the buccal cavity. Conclusion. The observed responses taken were in agreement with the experimental values, and Loratadine wafers were produced with less experimental trials, and a patient compliant product was achieved with the concept of formulation by design. PMID:23781498

In-Package Chemistry Abstraction

Energy Technology Data Exchange (ETDEWEB)

P.S. Domski

2003-07-21

The work associated with the development of this model report was performed in accordance with the requirements established in ''Technical Work Plan for Waste Form Degradation Modeling, Testing, and Analyses in Support of SR and LA'' (BSC 2002a). The in-package chemistry model and in-package chemistry model abstraction are developed to predict the bulk chemistry inside of a failed waste package and to provide simplified expressions of that chemistry. The purpose of this work is to provide the abstraction model to the Performance Assessment Project and the Waste Form Department for development of geochemical models of the waste package interior. The scope of this model report is to describe the development and validation of the in-package chemistry model and in-package chemistry model abstraction. The in-package chemistry model will consider chemical interactions of water with the waste package materials and the waste form for commercial spent nuclear fuel (CSNF) and codisposed high-level waste glass (HLWG) and N Reactor spent fuel (CDNR). The in-package chemistry model includes two sub-models, the first a water vapor condensation (WVC) model, where water enters a waste package as vapor and forms a film on the waste package components with subsequent film reactions with the waste package materials and waste form--this is a no-flow model, the reacted fluids do not exit the waste package via advection. The second sub-model of the in-package chemistry model is the seepage dripping model (SDM), where water, water that may have seeped into the repository from the surrounding rock, enters a failed waste package and reacts with the waste package components and waste form, and then exits the waste package with no accumulation of reacted water in the waste package. Both of the submodels of the in-package chemistry model are film models in contrast to past in-package chemistry models where all of the waste package pore space was filled with water. The

In-Package Chemistry Abstraction

International Nuclear Information System (INIS)

P.S. Domski

2003-01-01

The work associated with the development of this model report was performed in accordance with the requirements established in ''Technical Work Plan for Waste Form Degradation Modeling, Testing, and Analyses in Support of SR and LA'' (BSC 2002a). The in-package chemistry model and in-package chemistry model abstraction are developed to predict the bulk chemistry inside of a failed waste package and to provide simplified expressions of that chemistry. The purpose of this work is to provide the abstraction model to the Performance Assessment Project and the Waste Form Department for development of geochemical models of the waste package interior. The scope of this model report is to describe the development and validation of the in-package chemistry model and in-package chemistry model abstraction. The in-package chemistry model will consider chemical interactions of water with the waste package materials and the waste form for commercial spent nuclear fuel (CSNF) and codisposed high-level waste glass (HLWG) and N Reactor spent fuel (CDNR). The in-package chemistry model includes two sub-models, the first a water vapor condensation (WVC) model, where water enters a waste package as vapor and forms a film on the waste package components with subsequent film reactions with the waste package materials and waste form--this is a no-flow model, the reacted fluids do not exit the waste package via advection. The second sub-model of the in-package chemistry model is the seepage dripping model (SDM), where water, water that may have seeped into the repository from the surrounding rock, enters a failed waste package and reacts with the waste package components and waste form, and then exits the waste package with no accumulation of reacted water in the waste package. Both of the submodels of the in-package chemistry model are film models in contrast to past in-package chemistry models where all of the waste package pore space was filled with water. The current in-package

EM Simulation Accuracy Enhancement for Broadband Modeling of On-Wafer Passive Components

DEFF Research Database (Denmark)

Johansen, Tom Keinicke; Jiang, Chenhui; Hadziabdic, Dzenan

2007-01-01

This paper describes methods for accuracy enhancement in broadband modeling of on-wafer passive components using electromagnetic (EM) simulation. It is shown that standard excitation schemes for integrated component simulation leads to poor correlation with on-wafer measurements beyond the lower...... GHz frequency range. We show that this is due to parasitic effects and higher-order modes caused by the excitation schemes. We propose a simple equivalent circuit for the parasitic effects in the well-known ground ring excitation scheme. An extended L-2L calibration method is shown to improve...

Packaging LLW and ILW

International Nuclear Information System (INIS)

Flowers, R.H.; Owen, R.G.

1991-01-01

Low level waste (LLW) accounts for 70-80% by volume of all radioactive wastes produced by the nuclear industry. It has low specific activity, negligible actinide content and requires little, if any, shielding to protect workers. Volume reduction for LLW of high volume but low density may be achieved by incineration and compaction as appropriate, before packaging for disposal by near surface burial. Intermediate level waste (ILW) is treated and packed to convert it into a stable form to minimize any release of activity and make handling easier. The matrix chosen for immobilization, usually cement, polymers or bitumen, depends on the nature of the waste and the acceptance criteria of the disposal facility. The special case of LLW and ILW which will arise from reactor decommissioning is discussed. Packaging methods adopted by individual countries are reviewed. The range of costs involved for packaging ILW is indicated. There is no international consensus on the performance required from packaged waste to ensure its suitability both for interim storage and final disposal. (UK)

First thin AC-coupled silicon strip sensors on 8-inch wafers

Energy Technology Data Exchange (ETDEWEB)

Bergauer, T., E-mail: thomas.bergauer@oeaw.ac.at [Institute of High Energy Physics of the Austrian Academy of Sciences, Nikolsdorfer Gasse 18, 1050 Wien (Vienna) (Austria); Dragicevic, M.; König, A. [Institute of High Energy Physics of the Austrian Academy of Sciences, Nikolsdorfer Gasse 18, 1050 Wien (Vienna) (Austria); Hacker, J.; Bartl, U. [Infineon Technologies Austria AG, Siemensstrasse 2, 9500 Villach (Austria)

2016-09-11

The Institute of High Energy Physics (HEPHY) in Vienna and the semiconductor manufacturer Infineon Technologies Austria AG developed a production process for planar AC-coupled silicon strip sensors manufactured on 200 μm thick 8-inch p-type wafers. In late 2015, the first wafers were delivered featuring the world's largest AC-coupled silicon strip sensors. Detailed electrical measurements were carried out at HEPHY, where single strip and global parameters were measured. Mechanical studies were conducted and the long-term behavior was investigated using a climate chamber. Furthermore, the electrical properties of various test structures were investigated to validate the quality of the manufacturing process.

Neural Implants, Packaging for Biocompatible Implants, and Improving Fabricated Capacitors

Science.gov (United States)

Agger, Elizabeth Rose

We have completed the circuit design and packaging procedure for an NIH-funded neural implant, called a MOTE (Microscale Optoelectronically Transduced Electrode). Neural recording implants for mice have greatly advanced neuroscience, but they are often damaging and limited in their recording location. This project will result in free-floating implants that cause less damage, provide rapid electronic recording, and increase range of recording across the cortex. A low-power silicon IC containing amplification and digitization sub-circuits is powered by a dual-function gallium arsenide photovoltaic and LED. Through thin film deposition, photolithography, and chemical and physical etching, the Molnar Group and the McEuen Group (Applied and Engineering Physics department) will package the IC and LED into a biocompatible implant approximately 100microm3. The IC and LED are complete and we have begun refining this packaging procedure in the Cornell NanoScale Science & Technology Facility. ICs with 3D time-resolved imaging capabilities can image microorganisms and other biological samples given proper packaging. A portable, flat, easily manufactured package would enable scientists to place biological samples on slides directly above the Molnar group's imaging chip. We have developed a packaging procedure using laser cutting, photolithography, epoxies, and metal deposition. Using a flip-chip method, we verified the process by aligning and adhering a sample chip to a holder wafer. In the CNF, we have worked on a long-term metal-insulator-metal (MIM) capacitor characterization project. Former Fellow and continuing CNF user Kwame Amponsah developed the original procedure for the capacitor fabrication, and another former fellow, Jonilyn Longenecker, revised the procedure and began the arduous process of characterization. MIM caps are useful to clean room users as testing devices to verify electronic characteristics of their active circuitry. This project's objective is to

Effectiveness of E-Content Package on Teaching IUPAC Nomenclature of Organic Chemistry at Undergraduate Level

Science.gov (United States)

Devendiran, G.; Vakkil, M.

2017-01-01

This study attempts to discover the effectiveness of an e-content package when teaching IUPAC nomenclature of organic chemistry at the undergraduate level. The study consisted of a Pre-test-Post-test Non Equivalent Groups Design, and the sample of 71 (n = 71) students were drawn from two colleges. The overall study was divided into two groups, an…

Hydrogel-forming microneedles prepared from "super swelling" polymers combined with lyophilised wafers for transdermal drug delivery.

Directory of Open Access Journals (Sweden)

Ryan F Donnelly

Full Text Available We describe, for the first time, hydrogel-forming microneedle arrays prepared from "super swelling" polymeric compositions. We produced a microneedle formulation with enhanced swelling capabilities from aqueous blends containing 20% w/w Gantrez S-97, 7.5% w/w PEG 10,000 and 3% w/w Na2CO3 and utilised a drug reservoir of a lyophilised wafer-like design. These microneedle-lyophilised wafer compositions were robust and effectively penetrated skin, swelling extensively, but being removed intact. In in vitro delivery experiments across excised neonatal porcine skin, approximately 44 mg of the model high dose small molecule drug ibuprofen sodium was delivered in 24 h, equating to 37% of the loading in the lyophilised reservoir. The super swelling microneedles delivered approximately 1.24 mg of the model protein ovalbumin over 24 h, equivalent to a delivery efficiency of approximately 49%. The integrated microneedle-lyophilised wafer delivery system produced a progressive increase in plasma concentrations of ibuprofen sodium in rats over 6 h, with a maximal concentration of approximately 179 µg/ml achieved in this time. The plasma concentration had fallen to 71±6.7 µg/ml by 24 h. Ovalbumin levels peaked in rat plasma after only 1 hour at 42.36±17.01 ng/ml. Ovalbumin plasma levels then remained almost constant up to 6 h, dropping somewhat at 24 h, when 23.61±4.84 ng/ml was detected. This work represents a significant advancement on conventional microneedle systems, which are presently only suitable for bolus delivery of very potent drugs and vaccines. Once fully developed, such technology may greatly expand the range of drugs that can be delivered transdermally, to the benefit of patients and industry. Accordingly, we are currently progressing towards clinical evaluations with a range of candidate molecules.

The impact of packaging transparency on product attractiveness

Directory of Open Access Journals (Sweden)

Barbara Sabo

2017-12-01

Full Text Available The aim of the study was to investigate the impact of different levels of packaging transparency on the evaluation of attractiveness of a product within the packaging, in relation to whether it is a healthy or unhealthy product. Consumer preferences during buying decision process were also investigated. The study was conducted by two methods. The first one was related to consumer preferences and was based on a choice task, while the other one was related to packaging attractiveness and was based on subjective evaluation expressed through the Likert scale. Eight samples of packaging were used. They differed according to product type (healthy and unhealthy, and the level of transparency (fully transparent packaging, packaging with two windows, packaging with one window and non-transparent packaging. According to the results, consumers tend to ignore non-transparent packaging, regardless the product healthiness. The findings indicate the importance of thoughtful selection of packaging structure and its material in design process and launching the food products on the retail market.

International co-ordinated research project on low and intermediate level waste package performance

Energy Technology Data Exchange (ETDEWEB)

Dayal, R. [International Atomic Energy Agency IAEA, Vienna (Austria)

2001-07-01

As part of IAEA's mandate to facilitate the transfer and exchange of information amongst Member States, the Agency is currently coordinating an international R and D project, involving 12 developed and developing countries, on Performance of Low and Intermediate Level Waste Packages under Disposal Conditions. This paper will review the current status of the Coordinated Research Project (CRP) and summarize the key findings of the work completed to date within the context of the CRP in the participating Member States. (author)

International co-ordinated research project on low and intermediate level waste package performance

International Nuclear Information System (INIS)

Dayal, R.

2001-01-01

As part of IAEA's mandate to facilitate the transfer and exchange of information amongst Member States, the Agency is currently coordinating an international R and D project, involving 12 developed and developing countries, on Performance of Low and Intermediate Level Waste Packages under Disposal Conditions. This paper will review the current status of the Coordinated Research Project (CRP) and summarize the key findings of the work completed to date within the context of the CRP in the participating Member States. (author)

Prediction of thermo-mechanical reliability of wafer backend processes

NARCIS (Netherlands)

Gonda, V.; Toonder, den J.M.J.; Beijer, J.G.J.; Zhang, G.Q.; van Driel, W.D.; Hoofman, R.J.O.M.; Ernst, L.J.

2004-01-01

More than 65% of IC failures are related to thermal and mechanical problems. For wafer backend processes, thermo-mechanical failure is one of the major bottlenecks. The ongoing technological trends like miniaturization, introduction of new materials, and function/product integration will increase

Prediction of thermo-mechanical integrity of wafer backend processes

NARCIS (Netherlands)

Gonda, V.; Toonder, den J.M.J.; Beijer, J.G.J.; Zhang, G.Q.; Hoofman, R.J.O.M.; Ernst, L.J.; Ernst, L.J.

2003-01-01

More than 65% of IC failures are related to thermal and mechanical problems. For wafer backend processes, thermo-mechanical failure is one of the major bottlenecks. The ongoing technological trends like miniaturization, introduction of new materials, and function/product integration will increase

Determination of critical levels of residual oxygen to minimize discoloration of sliced packaged Norwegian salami under light display.

Science.gov (United States)

Sørheim, Oddvin; Måge, Ingrid; Larsen, Hanne

2017-07-01

Discoloration of sliced packaged salami is contributing to rejection of the product, food waste and economical loss. A combination of residual O 2 in the headspace of packages and light is causing photooxidation and deterioration of colour. The aim of this study was to establish maximum tolerable concentrations of residual O 2 in packages of salami slices with 100% N 2 under light display at 4 and 20°C. Salami sausages had variable inherent O 2 consumption rate. Storage of salami in 1% O 2 in darkness did not induce discoloration. The upper limits for O 2 for avoiding discoloration under light were variable in the range 0.1-1.0%, depending on temperature and type of salami. Display at 20°C increased the rate of O 2 depletion compared to 4°C. To minimize discoloration, sliced and packaged salami should be stored in darkness at approximately 20°C until the level of residual O 2 is reduced below a critical limit. Copyright © 2017 Elsevier Ltd. All rights reserved.

Reliable four-point flexion test and model for die-to-wafer direct bonding

Energy Technology Data Exchange (ETDEWEB)

Tabata, T., E-mail: toshiyuki.tabata@cea.fr; Sanchez, L.; Fournel, F.; Moriceau, H. [Univ. Grenoble Alpes, F-38000 Grenoble, France and CEA, LETI, MINATEC Campus, F-38054 Grenoble (France)

2015-07-07

For many years, wafer-to-wafer (W2W) direct bonding has been very developed particularly in terms of bonding energy measurement and bonding mechanism comprehension. Nowadays, die-to-wafer (D2W) direct bonding has gained significant attention, for instance, in photonics and microelectro-mechanics, which supposes controlled and reliable fabrication processes. So, whatever the stuck materials may be, it is not obvious whether bonded D2W structures have the same bonding strength as bonded W2W ones, because of possible edge effects of dies. For that reason, it has been strongly required to develop a bonding energy measurement technique which is suitable for D2W structures. In this paper, both D2W- and W2W-type standard SiO{sub 2}-to-SiO{sub 2} direct bonding samples are fabricated from the same full-wafer bonding. Modifications of the four-point flexion test (4PT) technique and applications for measuring D2W direct bonding energies are reported. Thus, the comparison between the modified 4PT and the double-cantilever beam techniques is drawn, also considering possible impacts of the conditions of measures such as the water stress corrosion at the debonding interface and the friction error at the loading contact points. Finally, reliability of a modified technique and a new model established for measuring D2W direct bonding energies is demonstrated.

Optimization of corn, rice and buckwheat formulations for gluten-free wafer production.

Science.gov (United States)

Dogan, Ismail Sait; Yildiz, Onder; Meral, Raciye

2016-07-01

Gluten-free baked products for celiac sufferers are essential for healthy living. Cereals having gluten such as wheat and rye must be removed from the diet for the clinical and histological improvement. The variety of gluten-free foods should be offered for the sufferers. In the study, gluten-free wafer formulas were optimized using corn, rice and buckwheat flours, xanthan and guar gum blend as an alternative product for celiac sufferers. Wafer sheet attributes and textural properties were investigated. Considering all wafer sheet properties in gluten-free formulas, better results were obtained by using 163.5% water, 0.5% guar and 0.1% xanthan in corn formula; 173.3% water, 0.45% guar and 0.15% xanthan gum in rice formula; 176% water, 0.1% guar and 0.5% xanthan gum in buckwheat formula. Average desirability values in gluten-free formulas were between 0.86 and 0.91 indicating they had similar visual and textural profiles to control sheet made with wheat flour. © The Author(s) 2015.

Improving scanner wafer alignment performance by target optimization

Science.gov (United States)

Leray, Philippe; Jehoul, Christiane; Socha, Robert; Menchtchikov, Boris; Raghunathan, Sudhar; Kent, Eric; Schoonewelle, Hielke; Tinnemans, Patrick; Tuffy, Paul; Belen, Jun; Wise, Rich

2016-03-01

In the process nodes of 10nm and below, the patterning complexity along with the processing and materials required has resulted in a need to optimize alignment targets in order to achieve the required precision, accuracy and throughput performance. Recent industry publications on the metrology target optimization process have shown a move from the expensive and time consuming empirical methodologies, towards a faster computational approach. ASML's Design for Control (D4C) application, which is currently used to optimize YieldStar diffraction based overlay (DBO) metrology targets, has been extended to support the optimization of scanner wafer alignment targets. This allows the necessary process information and design methodology, used for DBO target designs, to be leveraged for the optimization of alignment targets. In this paper, we show how we applied this computational approach to wafer alignment target design. We verify the correlation between predictions and measurements for the key alignment performance metrics and finally show the potential alignment and overlay performance improvements that an optimized alignment target could achieve.

The Evolution of Wafer Bonding Moving from the back-end further to the front-end

Institute of Scientific and Technical Information of China (English)

Thomas Glinsner; Peter Hangweier

2009-01-01

@@ 1 Introduction As the nanoscale era progresses, innovative new materials and processes continue to be developed and implemented as a means of keeping the industry on the path of Moore's Law. Wafer bonding - literally, the temporary or permanent joining of two wafers or substrates using a suitable combination of process technologies, chemicals and adhesives - is one such innovation.

Naval Waste Package Design Report

International Nuclear Information System (INIS)

M.M. Lewis

2004-01-01

A design methodology for the waste packages and ancillary components, viz., the emplacement pallets and drip shields, has been developed to provide designs that satisfy the safety and operational requirements of the Yucca Mountain Project. This methodology is described in the ''Waste Package Design Methodology Report'' Mecham 2004 [DIRS 166168]. To demonstrate the practicability of this design methodology, four waste package design configurations have been selected to illustrate the application of the methodology. These four design configurations are the 21-pressurized water reactor (PWR) Absorber Plate waste package, the 44-boiling water reactor (BWR) waste package, the 5-defense high-level waste (DHLW)/United States (U.S.) Department of Energy (DOE) spent nuclear fuel (SNF) Co-disposal Short waste package, and the Naval Canistered SNF Long waste package. Also included in this demonstration is the emplacement pallet and continuous drip shield. The purpose of this report is to document how that design methodology has been applied to the waste package design configurations intended to accommodate naval canistered SNF. This demonstrates that the design methodology can be applied successfully to this waste package design configuration and support the License Application for construction of the repository

Effect of Anisotropy on Shape Measurement Accuracy of Silicon Wafer Using Three-Point-Support Inverting Method

Science.gov (United States)

Ito, Yukihiro; Natsu, Wataru; Kunieda, Masanori

This paper describes the influences of anisotropy found in the elastic modulus of monocrystalline silicon wafers on the measurement accuracy of the three-point-support inverting method which can measure the warp and thickness of thin large panels simultaneously. Deflection due to gravity depends on the crystal orientation relative to the positions of the three-point-supports. Thus the deviation of actual crystal orientation from the direction indicated by the notch fabricated on the wafer causes measurement errors. Numerical analysis of the deflection confirmed that the uncertainty of thickness measurement increases from 0.168µm to 0.524µm due to this measurement error. In addition, experimental results showed that the rotation of crystal orientation relative to the three-point-supports is effective for preventing wafer vibration excited by disturbance vibration because the resonance frequency of wafers can be changed. Thus, surface shape measurement accuracy was improved by preventing resonant vibration during measurement.

Improvements to the solar cell efficiency and production yields of low-lifetime wafers with effective phosphorus gettering

International Nuclear Information System (INIS)

Lu, Jiunn-Chenn; Chen, Ping-Nan; Chen, Chih-Min; Wu, Chung-Han

2013-01-01

Highlights: • Variable-temperature gettering improves efficiencies when the wafer quality is poor. • High-quality wafers need not be used for variable-temperature gettering. • The proposed gettering method is based on an existing diffusion process. • It has a potential interest for hot-spot prevention. -- Abstract: This research focuses on the improvement of solar cell efficiencies in low-lifetime wafers by implementing an appropriate gettering method of the diffusion process. The study also considers a reduction in the value of the reverse current at −12 V, an important electrical parameter related to the hot-spot heating of solar cells and modules, to improve the product's quality during commercial mass production. A practical solar cell production case study is examined to illustrate the use of the proposed method. The results of this case study indicate that variable-temperature gettering significantly improves solar cell efficiencies by 0.14% compared to constant-temperature methods when the wafer quality is poor. Moreover, this study finds that variable-temperature gettering raises production yields of low quality wafers by more than 30% by restraining the measurement value of the reverse current at −12 V during solar cell manufacturing

Wafer-Scale Gigahertz Graphene Field Effect Transistors on SiC Substrates

Institute of Scientific and Technical Information of China (English)

潘洪亮; 金智; 麻芃; 郭建楠; 刘新宇; 叶甜春; 李佳; 敦少博; 冯志红

2011-01-01

Wafer-scale graphene field-effect transistors are fabricated using benzocyclobutene and atomic layer deposition Al2O3 as the top-gate dielectric.The epitaxial-graphene layer is formed by graphitization of a 2-inch-diameter Si-face semi-insulating 6H-SiC substrate.The graphene on the silicon carbide substrate is heavily n-doped and current saturation is not found.For the intrinsic characteristic of this particular channel material,the devices cannot be switched off.The cut-off frequencies of these graphene field-effect transistors,which have a gate length of l μm,are larger than 800 MHz.The largest one can reach 1.24 GHz.There are greater than 95％ active devices that can be successfully applied.We thus succeed in fabricating wafer-scale gigahertz graphene field-effect transistors,which paves the way for high-performance graphene devices and circuits.%Wafer-scale graphene Beld-effect transistors are fabricated using benzocyclobutene and atomic layer deposition AI2O3 as the top-gate dielectric. The epitaxial-graphene layer is formed by graphitization of a 2-inch-diameter Si-face semi-insulating 6H-SiC substrate. The graphene on the silicon carbide substrate is heavily n-doped and current saturation is not found. For the intrinsic characteristic of this particular channel material, the devices cannot be switched off. The cut-off frequencies of these graphene field-effect transistors, which have a gate length of l μm, are larger than 800MHz. The largest one can reach 1.24 GHz. There are greater than 95% active devices that can be successfully applied. We thus succeed in fabricating wafer-scale gigahertz graphene Geld-effect transistors, which paves the way for high-performance graphene devices and circuits.

Bonding of Si wafers by surface activation method for the development of high efficiency high counting rate radiation detectors

International Nuclear Information System (INIS)

Kanno, Ikuo; Yamashita, Makoto; Onabe, Hideaki

2006-01-01

Si wafers with two different resistivities ranging over two orders of magnitude were bonded by the surface activation method. The resistivities of bonded Si wafers were measured as a function of annealing temperature. Using calculations based on a model, the interface resistivities of bonded Si wafers were estimated as a function of the measured resistivities of bonded Si wafers. With thermal treatment from 500degC to 900degC, all interfaces showed high resistivity, with behavior that was close to that of an insulator. Annealing at 1000degC decreased the interface resistivity and showed close to ideal bonding after thermal treatment at 1100degC. (author)

Signal processing techniques for damage detection with piezoelectric wafer active sensors and embedded ultrasonic structural radar

Science.gov (United States)

Yu, Lingyu; Bao, Jingjing; Giurgiutiu, Victor

2004-07-01

Embedded ultrasonic structural radar (EUSR) algorithm is developed for using piezoelectric wafer active sensor (PWAS) array to detect defects within a large area of a thin-plate specimen. Signal processing techniques are used to extract the time of flight of the wave packages, and thereby to determine the location of the defects with the EUSR algorithm. In our research, the transient tone-burst wave propagation signals are generated and collected by the embedded PWAS. Then, with signal processing, the frequency contents of the signals and the time of flight of individual frequencies are determined. This paper starts with an introduction of embedded ultrasonic structural radar algorithm. Then we will describe the signal processing methods used to extract the time of flight of the wave packages. The signal processing methods being used include the wavelet denoising, the cross correlation, and Hilbert transform. Though hardware device can provide averaging function to eliminate the noise coming from the signal collection process, wavelet denoising is included to ensure better signal quality for the application in real severe environment. For better recognition of time of flight, cross correlation method is used. Hilbert transform is applied to the signals after cross correlation in order to extract the envelope of the signals. Signal processing and EUSR are both implemented by developing a graphical user-friendly interface program in LabView. We conclude with a description of our vision for applying EUSR signal analysis to structural health monitoring and embedded nondestructive evaluation. To this end, we envisage an automatic damage detection application utilizing embedded PWAS, EUSR, and advanced signal processing.

IN-PACKAGE CHEMISTRY ABSTRACTION

Energy Technology Data Exchange (ETDEWEB)

E. Thomas

2005-07-14

This report was developed in accordance with the requirements in ''Technical Work Plan for Postclosure Waste Form Modeling'' (BSC 2005 [DIRS 173246]). The purpose of the in-package chemistry model is to predict the bulk chemistry inside of a breached waste package and to provide simplified expressions of that chemistry as a function of time after breach to Total Systems Performance Assessment for the License Application (TSPA-LA). The scope of this report is to describe the development and validation of the in-package chemistry model. The in-package model is a combination of two models, a batch reactor model, which uses the EQ3/6 geochemistry-modeling tool, and a surface complexation model, which is applied to the results of the batch reactor model. The batch reactor model considers chemical interactions of water with the waste package materials, and the waste form for commercial spent nuclear fuel (CSNF) waste packages and codisposed (CDSP) waste packages containing high-level waste glass (HLWG) and DOE spent fuel. The surface complexation model includes the impact of fluid-surface interactions (i.e., surface complexation) on the resulting fluid composition. The model examines two types of water influx: (1) the condensation of water vapor diffusing into the waste package, and (2) seepage water entering the waste package as a liquid from the drift. (1) Vapor-Influx Case: The condensation of vapor onto the waste package internals is simulated as pure H{sub 2}O and enters at a rate determined by the water vapor pressure for representative temperature and relative humidity conditions. (2) Liquid-Influx Case: The water entering a waste package from the drift is simulated as typical groundwater and enters at a rate determined by the amount of seepage available to flow through openings in a breached waste package.

IN-PACKAGE CHEMISTRY ABSTRACTION

International Nuclear Information System (INIS)

E. Thomas

2005-01-01

This report was developed in accordance with the requirements in ''Technical Work Plan for Postclosure Waste Form Modeling'' (BSC 2005 [DIRS 173246]). The purpose of the in-package chemistry model is to predict the bulk chemistry inside of a breached waste package and to provide simplified expressions of that chemistry as a function of time after breach to Total Systems Performance Assessment for the License Application (TSPA-LA). The scope of this report is to describe the development and validation of the in-package chemistry model. The in-package model is a combination of two models, a batch reactor model, which uses the EQ3/6 geochemistry-modeling tool, and a surface complexation model, which is applied to the results of the batch reactor model. The batch reactor model considers chemical interactions of water with the waste package materials, and the waste form for commercial spent nuclear fuel (CSNF) waste packages and codisposed (CDSP) waste packages containing high-level waste glass (HLWG) and DOE spent fuel. The surface complexation model includes the impact of fluid-surface interactions (i.e., surface complexation) on the resulting fluid composition. The model examines two types of water influx: (1) the condensation of water vapor diffusing into the waste package, and (2) seepage water entering the waste package as a liquid from the drift. (1) Vapor-Influx Case: The condensation of vapor onto the waste package internals is simulated as pure H 2 O and enters at a rate determined by the water vapor pressure for representative temperature and relative humidity conditions. (2) Liquid-Influx Case: The water entering a waste package from the drift is simulated as typical groundwater and enters at a rate determined by the amount of seepage available to flow through openings in a breached waste package

Effect of weight and frontal area of external telemetry packages on the kinematics, activity levels and swimming performance of small-bodied sharks.

Science.gov (United States)

Bouyoucos, I A; Suski, C D; Mandelman, J W; Brooks, E J

2017-05-01

This study sought to observe the effects of submerged weight and frontal cross-sectional area of external telemetry packages on the kinematics, activity levels and swimming performance of small-bodied juvenile sharks, using lemon sharks Negaprion brevirostris (60-80 cm total length, L T ) as a model species. Juveniles were observed free-swimming in a mesocosm untagged and with small and large external accelerometer packages that increased frontal cross-sectional area of the animals and their submerged weight. Despite adhering to widely used standards for tag mass, the presence of an external telemetry package altered swimming kinematics, activity levels and swimming performance of juvenile N. brevirostris relative to untagged individuals, suggesting that tag mass is not a suitable standalone metric of device suitability. Changes in swimming performance could not be detected from tail-beat frequency, which suggests that tail-beat frequency is an unsuitable standalone metric of swimming performance for small N. brevirostris. Lastly, sharks experienced treatment-specific changes in activity level and swimming kinematics from morning to afternoon observation. Therefore, the presence of external telemetry packages altered the kinematics, activity levels and swimming performance of small young-of-the-year N. brevirostris and these data may therefore be relevant to other similar-sized juveniles of other shark species. © 2017 The Fisheries Society of the British Isles.

Micropore x-ray optics using anisotropic wet etching of (110) silicon wafers

International Nuclear Information System (INIS)

Ezoe, Yuichiro; Koshiishi, Masaki; Mita, Makoto; Mitsuda, Kazuhisa; Hoshino, Akio; Ishisaki, Yoshitaka; Yang Zhen; Takano, Takayuki; Maeda, Ryutaro

2006-01-01

To develop x-ray mirrors for micropore optics, smooth silicon (111)sidewalls obtained after anisotropic wet etching of a silicon (110) wafer were studied. A sample device with 19 μm wide (111) sidewalls was fabricated using a 220 μm thick silicon (110) wafer and potassium hydroxide solution. For what we believe to be the first time,x-ray reflection on the (111) sidewalls was detected in the angular response measurement. Compared to ray-tracing simulations, the surface roughness of the sidewalls was estimated to be 3-5 nm, which is consistent with the atomic force microscope and the surface profiler measurements

Micropore x-ray optics using anisotropic wet etching of (110) silicon wafers.

Science.gov (United States)

Ezoe, Yuichiro; Koshiishi, Masaki; Mita, Makoto; Mitsuda, Kazuhisa; Hoshino, Akio; Ishisaki, Yoshitaka; Yang, Zhen; Takano, Takayuki; Maeda, Ryutaro

2006-12-10

To develop x-ray mirrors for micropore optics, smooth silicon (111) sidewalls obtained after anisotropic wet etching of a silicon (110) wafer were studied. A sample device with 19 microm wide (111) sidewalls was fabricated using a 220 microm thick silicon (110) wafer and potassium hydroxide solution. For what we believe to be the first time, x-ray reflection on the (111) sidewalls was detected in the angular response measurement. Compared to ray-tracing simulations, the surface roughness of the sidewalls was estimated to be 3-5 nm, which is consistent with the atomic force microscope and the surface profiler measurements.

Waste Package and Material Testing for the Proposed Yucca Mountain High Level Waste Repository

International Nuclear Information System (INIS)

Doering, Thomas; Pasupathi, V.

2002-01-01

Over the repository lifetime, the waste package containment barriers will perform various functions that will change with time. During the operational period, the barriers will function as vessels for handling, emplacement, and waste retrieval (if necessary). During the years following repository closure, the containment barriers will be relied upon to provide substantially complete containment, through 10,000 years and beyond. Following the substantially complete containment phase, the barriers and the waste package internal structures help minimize release of radionuclides by aqueous- and gaseous-phase transport. These requirements have lead to a defense-in-depth design philosophy. A multi-barrier design will result in a lower breach rate distributed over a longer period of time, thereby ensuring the regulatory requirements are met. The design of the Engineered Barrier System (EBS) has evolved. The initial waste package design was a thin walled package, 3/8 inch of stainless steel 304, that had very limited capacity, (3 PWR and 4 BWR assemblies) and performance characteristics, 300 to 1,000 years. This design required over 35,000 waste packages compared to today's design of just over 10,000 waste packages. The waste package designs are now based on a defense-in-depth/multi-barrier philosophy and have a capacity similar to the standard storage and rail transported spent nuclear fuel casks. Concurrent with the development of the design of the waste packages, a comprehensive waste package materials testing program has been undertaken to support the selection of containment barrier materials and to develop predictive models for the long-term behavior of these materials under expected repository conditions. The testing program includes both long-term and short-term tests and the results from these tests combination with the data published in the open literature are being used to develop models for predicting performance of the waste packages

Synchrotron Radiation Total Reflection X-ray Fluorescence Spectroscopy for Microcontamination Analysis on Silicon Wafer Surfaces

Energy Technology Data Exchange (ETDEWEB)

Takaura, Norikatsu

1997-10-01

As dimensions in state-of-the-art CMOS devices shrink to less than 0.1 pm, even low levels of impurities on wafer surfaces can cause device degradation. Conventionally, metal contamination on wafer surfaces is measured using Total Reflection X-Ray Fluorescence Spectroscopy (TXRF). However, commercially available TXRF systems do not have the necessary sensitivity for measuring the lower levels of contamination required to develop new CMOS technologies. In an attempt to improve the sensitivity of TXRF, this research investigates Synchrotron Radiation TXRF (SR TXRF). The advantages of SR TXRF over conventional TXRF are higher incident photon flux, energy tunability, and linear polarization. We made use of these advantages to develop an optimized SR TXRF system at the Stanford Synchrotron Radiation Laboratory (SSRL). The results of measurements show that the Minimum Detection Limits (MDLs) of SR TXRF for 3-d transition metals are typically at a level-of 3x10{sup 8} atoms/cm{sup 2}, which is better than conventional TXRF by about a factor of 20. However, to use our SR TXRF system for practical applications, it was necessary to modify a commercially available Si (Li) detector which generates parasitic fluorescence signals. With the modified detector, we could achieve true MDLs of 3x10{sup 8} atoms/cm{sup 2} for 3-d transition metals. In addition, the analysis of Al on Si wafers is described. Al analysis is difficult because strong Si signals overlap the Al signals. In this work, the Si signals are greatly reduced by tuning the incident beam energy below the Si K edge. The results of our measurements show that the sensitivity for Al is limited by x-ray Raman scattering. Furthermore, we show the results of theoretical modeling of SR TXRF backgrounds consisting of the bremsstrahlung generated by photoelectrons, Compton scattering, and Raman scattering. To model these backgrounds, we extended conventional theoretical models by taking into account several aspects particular

Ultimate intra-wafer critical dimension uniformity control by using lithography and etch tool corrections

Science.gov (United States)

Kubis, Michael; Wise, Rich; Reijnen, Liesbeth; Viatkina, Katja; Jaenen, Patrick; Luca, Melisa; Mernier, Guillaume; Chahine, Charlotte; Hellin, David; Kam, Benjamin; Sobieski, Daniel; Vertommen, Johan; Mulkens, Jan; Dusa, Mircea; Dixit, Girish; Shamma, Nader; Leray, Philippe

2016-03-01

With shrinking design rules, the overall patterning requirements are getting aggressively tighter. For the 7-nm node and below, allowable CD uniformity variations are entering the Angstrom region (ref [1]). Optimizing inter- and intra-field CD uniformity of the final pattern requires a holistic tuning of all process steps. In previous work, CD control with either litho cluster or etch tool corrections has been discussed. Today, we present a holistic CD control approach, combining the correction capability of the etch tool with the correction capability of the exposure tool. The study is done on 10-nm logic node wafers, processed with a test vehicle stack patterning sequence. We include wafer-to-wafer and lot-to-lot variation and apply optical scatterometry to characterize the fingerprints. Making use of all available correction capabilities (lithography and etch), we investigated single application of exposure tool corrections and of etch tool corrections as well as combinations of both to reach the lowest CD uniformity. Results of the final pattern uniformity based on single and combined corrections are shown. We conclude on the application of this holistic lithography and etch optimization to 7nm High-Volume manufacturing, paving the way to ultimate within-wafer CD uniformity control.

A new cleaning process for the metallic contaminants on a post-CMP wafer's surface

International Nuclear Information System (INIS)

Gao Baohong; Liu Yuling; Wang Chenwei; Wang Shengli; Zhou Qiang; Tan Baimei; Zhu Yadong

2010-01-01

This paper presents a new cleaning process using boron-doped diamond (BDD) film anode electrochemical oxidation for metallic contaminants on polished silicon wafer surfaces. The BDD film anode electrochemical oxidation can efficiently prepare pyrophosphate peroxide, pyrophosphate peroxide can oxidize organic contaminants, and pyrophosphate peroxide is deoxidized into pyrophosphate. Pyrophosphate, a good complexing agent, can form a metal complex, which is a structure consisting of a copper ion, bonded to a surrounding array of two pyrophosphate anions. Three polished wafers were immersed in the 0.01 mol/L CuSO 4 solution for 2 h in order to make comparative experiments. The first one was cleaned by pyrophosphate peroxide, the second by RCA (Radio Corporation of America) cleaning, and the third by deionized (DI) water. The XPS measurement result shows that the metallic contaminants on wafers cleaned by the RCA method and by pyrophosphate peroxide is less than the XPS detection limits of 1 ppm. And the wafer's surface cleaned by pyrophosphate peroxide is more efficient in removing organic carbon residues than RCA cleaning. Therefore, BDD film anode electrochemical oxidation can be used for microelectronics cleaning, and it can effectively remove organic contaminants and metallic contaminants in one step. It also achieves energy saving and environmental protection. (semiconductor technology)

Waste Package Component Design Methodology Report

International Nuclear Information System (INIS)

D.C. Mecham

2004-01-01

This Executive Summary provides an overview of the methodology being used by the Yucca Mountain Project (YMP) to design waste packages and ancillary components. This summary information is intended for readers with general interest, but also provides technical readers a general framework surrounding a variety of technical details provided in the main body of the report. The purpose of this report is to document and ensure appropriate design methods are used in the design of waste packages and ancillary components (the drip shields and emplacement pallets). The methodology includes identification of necessary design inputs, justification of design assumptions, and use of appropriate analysis methods, and computational tools. This design work is subject to ''Quality Assurance Requirements and Description''. The document is primarily intended for internal use and technical guidance for a variety of design activities. It is recognized that a wide audience including project management, the U.S. Department of Energy (DOE), the U.S. Nuclear Regulatory Commission, and others are interested to various levels of detail in the design methods and therefore covers a wide range of topics at varying levels of detail. Due to the preliminary nature of the design, readers can expect to encounter varied levels of detail in the body of the report. It is expected that technical information used as input to design documents will be verified and taken from the latest versions of reference sources given herein. This revision of the methodology report has evolved with changes in the waste package, drip shield, and emplacement pallet designs over many years and may be further revised as the design is finalized. Different components and analyses are at different stages of development. Some parts of the report are detailed, while other less detailed parts are likely to undergo further refinement. The design methodology is intended to provide designs that satisfy the safety and operational

Waste Package Component Design Methodology Report

Energy Technology Data Exchange (ETDEWEB)

D.C. Mecham

2004-07-12

This Executive Summary provides an overview of the methodology being used by the Yucca Mountain Project (YMP) to design waste packages and ancillary components. This summary information is intended for readers with general interest, but also provides technical readers a general framework surrounding a variety of technical details provided in the main body of the report. The purpose of this report is to document and ensure appropriate design methods are used in the design of waste packages and ancillary components (the drip shields and emplacement pallets). The methodology includes identification of necessary design inputs, justification of design assumptions, and use of appropriate analysis methods, and computational tools. This design work is subject to ''Quality Assurance Requirements and Description''. The document is primarily intended for internal use and technical guidance for a variety of design activities. It is recognized that a wide audience including project management, the U.S. Department of Energy (DOE), the U.S. Nuclear Regulatory Commission, and others are interested to various levels of detail in the design methods and therefore covers a wide range of topics at varying levels of detail. Due to the preliminary nature of the design, readers can expect to encounter varied levels of detail in the body of the report. It is expected that technical information used as input to design documents will be verified and taken from the latest versions of reference sources given herein. This revision of the methodology report has evolved with changes in the waste package, drip shield, and emplacement pallet designs over many years and may be further revised as the design is finalized. Different components and analyses are at different stages of development. Some parts of the report are detailed, while other less detailed parts are likely to undergo further refinement. The design methodology is intended to provide designs that satisfy the safety

Advanced organics for electronic substrates and packages

CERN Document Server

Fletcher, Andrew E

1992-01-01

Advanced Organics for Electronic Substrates and Packages provides information on packaging, which is one of the most technologically intensive activities in the electronics industry. The electronics packaging community has realized that while semiconductor devices continue to be improved upon for performance, cost, and reliability, it is the interconnection or packaging of these devices that will limit the performance of the systems. Technology must develop packaging for transistor chips, with high levels of performance and integration providing cooling, power, and interconnection, and yet pre

Regulatory authority of the Rocky Mountain states for low-level radioactive waste packaging and transportation

International Nuclear Information System (INIS)

Whitman, M.; Tate, P.

1983-07-01

The newly-formed Rocky Mountain Low-Level Radioactive Waste Compact is an interstate agreement for the management of low-level radioactive waste (LLW). Eligible members of the compact are Arizona, Colorado, Nevada, New Mexico, Utah, and Wyoming. Each state must ratify the compact within its legislature for the compact to become effective in that state and to make that state a full-fledged member of the compact. By so adopting the compact, each state agrees to the terms and conditions specified therein. Among those terms and conditions are provisions requiring each member state to adopt and enforce procedures requiring low-level waste shipments originating within its borders and destined for a regional facility to conform to packaging and transportation requirements and regulations. These procedures are to include periodic inspections of packaging and shipping practices, periodic inspections of waste containers while in the custody of carriers and appropriate enforcement actions for violations. To carry out this responsibility, each state must have an adequate statutory and regulatory inspection and enforcement authority to ensure the safe transportation of low-level radioactive waste. Three states in the compact region, Arizona, Utah and Wyoming, have incorporated the Department of Transportation regulations in their entirety, and have no published rules and regulations of their own. The other states in the compact, Colorado, Nevada and New Mexico all have separate rules and regulations that incorporate the DOT regulations. A brief description of the regulatory requirements of each state is presented

Sacrificial wafer bonding for planarization after very deep etching

NARCIS (Netherlands)

Spiering, V.L.; Spiering, Vincent L.; Berenschot, Johan W.; Elwenspoek, Michael Curt; Fluitman, J.H.J.

A new technique is presented that provides planarization after a very deep etching step in silicon. This offers the possibility for as well resist spinning and layer patterning as realization of bridges or cantilevers across deep holes or grooves. The sacrificial wafer bonding technique contains a

Engineering functional nanothin multilayers on food packaging: ice-nucleating polyethylene films.

Science.gov (United States)

Gezgin, Zafer; Lee, Tung-Ching; Huang, Qingrong

2013-05-29

Polyethylene is the most prevalent plastic and is commonly used as a packaging material. Despite its common use, there are not many studies on imparting functionalities to those films which can make them more desirable for frozen food packaging. Here, commercial low-density polyethylene (LDPE) films were oxidized by UV-ozone (UVO) treatment to obtain a negatively charged hydrophilic surface to allow fabrication of functional multilayers. An increase in hydrophilicity was observed when films were exposed to UVO for 4 min and longer. Thin multilayers were formed by dipping the UVO-treated films into biopolymer solutions, and extracellular ice nucleators (ECINs) were immobilized onto the film surface to form a functional top layer. Polyelectrolyte adsorption was studied and confirmed on silicon wafers by measuring the water contact angles of the layers and investigating the surface morphology via atomic force microscopy. An up to 4-5 °C increase in ice nucleation temperatures and an up to 10 min decrease in freezing times were observed with high-purity deionized water samples frozen in ECIN-coated LDPE films. Films retained their ice nucleation activity up to 50 freeze-thaw cycles. Our results demonstrate the potential of using ECIN-coated polymer films for frozen food application.

Prediction of UV spectra and UV-radiation damage in actual plasma etching processes using on-wafer monitoring technique

International Nuclear Information System (INIS)

Jinnai, Butsurin; Fukuda, Seiichi; Ohtake, Hiroto; Samukawa, Seiji

2010-01-01

UV radiation during plasma processing affects the surface of materials. Nevertheless, the interaction of UV photons with surface is not clearly understood because of the difficulty in monitoring photons during plasma processing. For this purpose, we have previously proposed an on-wafer monitoring technique for UV photons. For this study, using the combination of this on-wafer monitoring technique and a neural network, we established a relationship between the data obtained from the on-wafer monitoring technique and UV spectra. Also, we obtained absolute intensities of UV radiation by calibrating arbitrary units of UV intensity with a 126 nm excimer lamp. As a result, UV spectra and their absolute intensities could be predicted with the on-wafer monitoring. Furthermore, we developed a prediction system with the on-wafer monitoring technique to simulate UV-radiation damage in dielectric films during plasma etching. UV-induced damage in SiOC films was predicted in this study. Our prediction results of damage in SiOC films shows that UV spectra and their absolute intensities are the key cause of damage in SiOC films. In addition, UV-radiation damage in SiOC films strongly depends on the geometry of the etching structure. The on-wafer monitoring technique should be useful in understanding the interaction of UV radiation with surface and in optimizing plasma processing by controlling UV radiation.

JOINT RIGIDITY ASSESSMENT WITH PIEZOELECTRIC WAFERS AND ACOUSTIC WAVES

International Nuclear Information System (INIS)

Montoya, Angela C.; Maji, Arup K.

2010-01-01

There has been an interest in the development of rapid deployment satellites. In a modular satellite design, different panels of specific functions can be pre-manufactured. The satellite can then be assembled and tested just prior to deployment. Traditional vibration testing is time-consuming and expensive. An alternative test method to evaluate the connection between two plates will be proposed. The method investigated and described employs piezoelectric wafers to induce and sense lamb waves in two aluminum plates, which were joined by steel brackets to form an 'L-Style' joint. Lamb wave behavior and piezoelectric material properties will be discussed; the experimental setup and results will be presented. A set of 4 piezoelectric ceramic wafers were used alternately as source and sensor. The energy transmitted was shown to correlate with a mechanical assessment of the joint, demonstrating that this method of testing is a feasible and reliable way to inspect the rigidity of joints.

Impact of SiO2 on Al–Al thermocompression wafer bonding

International Nuclear Information System (INIS)

Malik, Nishant; Finstad, Terje G; Schjølberg-Henriksen, Kari; Poppe, Erik U; Taklo, Maaike M V

2015-01-01

Al–Al thermocompression bonding suitable for wafer level sealing of MEMS devices has been investigated. This paper presents a comparison of thermocompression bonding of Al films deposited on Si with and without a thermal oxide (SiO 2 film). Laminates of diameter 150 mm containing device sealing frames of width 200 µm were realized. The wafers were bonded by applying a bond force of 36 or 60 kN at bonding temperatures ranging from 300–550 °C for bonding times of 15, 30 or 60 min. The effects of these process variations on the quality of the bonded laminates have been studied. The bond quality was estimated by measurements of dicing yield, tensile strength, amount of cohesive fracture in Si and interfacial characterization. The mean bond strength of the tested structures ranged from 18–61 MPa. The laminates with an SiO 2 film had higher dicing yield and bond strength than the laminates without SiO 2 for a 400 °C bonding temperature. The bond strength increased with increasing bonding temperature and bond force. The laminates bonded for 30 and 60 min at 400 °C and 60 kN had similar bond strength and amount of cohesive fracture in the bulk silicon, while the laminates bonded for 15 min had significantly lower bond strength and amount of cohesive fracture in the bulk silicon. (paper)

Method to determine the radioactivity of radioactive waste packages. Basic procedure of the method used to determine the radioactivity of low-level radioactive waste packages generated at nuclear power plants: 2007

International Nuclear Information System (INIS)

2008-03-01

This document describes the procedures adopted in order to determine the radioactivity of low-level radioactive waste packages generated at nuclear power plants in Japan. The standards applied have been approved by the Atomic Energy Society of Japan after deliberations by the Subcommittee on the Radioactivity Verification Method for Waste Packages, the Nuclear Cycle Technical Committee, and the Standards Committee. The method for determining the radioactivity of the low-level radioactive waste packages was based on procedures approved by the Nuclear Safety Commission in 1992. The scaling factor method and other methods of determining radioactivity were then developed on the basis of various investigations conducted, drawing on extensive accumulated knowledge. Moreover, the international standards applied as common guidelines for the scaling factor method were developed by Technical Committee ISO/TC 85, Nuclear Energy, Subcommittee SC 5, Nuclear Fuel Technology. Since the application of accumulated knowledge to future radioactive waste disposal is considered to be rational and justified, such body of knowledge has been documented in a standardized form. The background to this standardization effort, the reasoning behind the determination method as applied to the measurement of radioactivity, as well as other related information, are given in the Annexes hereto. This document includes the following Annexes. Annex 1: (reference) Recorded items related to the determination of the scaling factor. Annex 2 (reference): Principles applied to the determining the radioactivity of waste packages. (author)

An optical MEMS accelerometer fabricated using double-sided deep reactive ion etching on silicon-on-insulator wafer

Science.gov (United States)

Teo, Adrian J. T.; Li, Holden; Tan, Say Hwa; Yoon, Yong-Jin

2017-06-01

Optical MEMS devices provide fast detection, electromagnetic resilience and high sensitivity. Using this technology, an optical gratings based accelerometer design concept was developed for seismic motion detection purposes that provides miniaturization, high manufacturability, low costs and high sensitivity. Detailed in-house fabrication procedures of a double-sided deep reactive ion etching (DRIE) on a silicon-on-insulator (SOI) wafer for a micro opto electro mechanical system (MOEMS) device are presented and discussed. Experimental results obtained show that the conceptual device successfully captured motion similar to a commercial accelerometer with an average sensitivity of 13.6 mV G-1, and a highest recorded sensitivity of 44.1 mV G-1. A noise level of 13.5 mV was detected due to experimental setup limitations. This is the first MOEMS accelerometer developed using double-sided DRIE on SOI wafer for the application of seismic motion detection, and is a breakthrough technology platform to open up options for lower cost MOEMS devices.

An optical MEMS accelerometer fabricated using double-sided deep reactive ion etching on silicon-on-insulator wafer

International Nuclear Information System (INIS)

Teo, Adrian J T; Li, Holden; Yoon, Yong-Jin; Tan, Say Hwa

2017-01-01

Optical MEMS devices provide fast detection, electromagnetic resilience and high sensitivity. Using this technology, an optical gratings based accelerometer design concept was developed for seismic motion detection purposes that provides miniaturization, high manufacturability, low costs and high sensitivity. Detailed in-house fabrication procedures of a double-sided deep reactive ion etching (DRIE) on a silicon-on-insulator (SOI) wafer for a micro opto electro mechanical system (MOEMS) device are presented and discussed. Experimental results obtained show that the conceptual device successfully captured motion similar to a commercial accelerometer with an average sensitivity of 13.6 mV G −1 , and a highest recorded sensitivity of 44.1 mV G −1 . A noise level of 13.5 mV was detected due to experimental setup limitations. This is the first MOEMS accelerometer developed using double-sided DRIE on SOI wafer for the application of seismic motion detection, and is a breakthrough technology platform to open up options for lower cost MOEMS devices. (technical note)

Effect of diffraction and film-thickness gradients on wafer-curvature measurements of thin-film stress

International Nuclear Information System (INIS)

Breiland, W.G.; Lee, S.R.; Koleske, D.D.

2004-01-01

When optical measurements of wafer curvature are used to determine thin-film stress, the laser beams that probe the sample are usually assumed to reflect specularly from the curved surface of the film and substrate. Yet, real films are not uniformly thick, and unintended thickness gradients produce optical diffraction effects that steer the laser away from the ideal specular condition. As a result, the deflection of the laser in wafer-curvature measurements is actually sensitive to both the film stress and the film-thickness gradient. We present a Fresnel-Kirchhoff optical diffraction model of wafer-curvature measurements that provides a unified description of these combined effects. The model accurately simulates real-time wafer-curvature measurements of nonuniform GaN films grown on sapphire substrates by vapor-phase epitaxy. During thin-film growth, thickness gradients cause the reflected beam to oscillate asymmetrically about the ideal position defined by the stress-induced wafer curvature. This oscillating deflection has the same periodicity as the reflectance of the growing film, and the deflection amplitude is a function of the film-thickness gradient, the mean film thickness, the wavelength distribution of the light source, the illuminated spot size, and the refractive indices of the film and substrate. For typical GaN films grown on sapphire, misinterpretation of these gradient-induced oscillations can cause stress-measurement errors that approach 10% of the stress-thickness product; much greater errors occur in highly nonuniform films. Only transparent films can exhibit substantial gradient-induced deflections; strongly absorbing films are immune

Science and technology of plasma activated direct wafer bonding

Science.gov (United States)

Roberds, Brian Edward

This dissertation studied the kinetics of silicon direct wafer bonding with emphasis on low temperature bonding mechanisms. The project goals were to understand the topological requirements for initial bonding, develop a tensile test to measure the bond strength as a function of time and temperature and, using the kinetic information obtained, develop lower temperature methods of bonding. A reproducible surface metrology metric for bonding was best described by power spectral density derived from atomic force microscopy measurements. From the tensile strength kinetics study it was found that low annealing temperatures could be used to obtain strong bonds, but at the expense of longer annealing times. Three models were developed to describe the kinetics. A diffusion controlled model and a reaction rate controlled model were developed for the higher temperature regimes (T > 600sp°C), and an electric field assisted oxidation model was proposed for the low temperature range. An in situ oxygen plasma treatment was used to further enhance the field-controlled mechanism which resulted in dramatic increases in the low temperature bonding kinetics. Multiple internal transmission Fourier transform infrared spectroscopy (MIT-FTIR) was used to monitor species evolution at the bonded interface and a capacitance-voltage (CV) study was undertaken to investigate charge distribution and surface states resulting from plasma activation. A short, less than a minute, plasma exposure prior to contacting the wafers was found to obtain very strong bonds for hydrophobic silicon wafers at very low temperatures (100sp°C). This novel bonding method may enable new technologies involving heterogeneous material systems or bonding partially fabricated devices to become realities.

Detection of trace contamination of copper on a silicon wafer with TXRF

International Nuclear Information System (INIS)

Yamada, T.; Matsuo, M.; Kohno, H.; Mori, Y.

2000-01-01

The element copper on silicon wafers is one of the most important metals to be detected among the contamination in semiconductor industries. When W-Lβ 1 (9.67 keV) line is used for the excitation in TXRF instrument and when Si(Li) is used as its detector, an escape peak appears at 7.93 keV which is close to the energy of Cu-Kα line(8.04 keV). When the concentration of copper is lower than 10 10 atoms/cm 2 , accurate quantitative analysis is difficult because of the overlapping of the peaks. When Au-Lβ 1 line(11.44 keV) is used for the excitation, the escape peak appears at 9.70 keV which is far enough from the energy of Cu-Ka line. We prepared silicon wafers intentionally contaminated with copper in a low concentration range of 10 8 to 10 10 atoms/cm 2 and measured them with a TXRF instrument having Au-Lβ 1 line for excitation. The contaminated samples were made with IAP method and their Cu concentrations were calibrated with VPD-AAS method (recovery solution: 2 % HF + 2 % H 2 O 2 ). A figure shows the correlation between the results with TXRF and those with AAS. The horizontal axis is the value of concentration decided by AAS and the vertical axis is the intensity of Cu-Kα line measured with the TXRF. Six wafers of different concentration were used and five points on each wafer including the center were measured with TXRF. Five points at each concentration in the figure correspond to the results measured on one wafer. Intensities of Cu-Kα line are weak in these low concentration ranges but the background of them are also very small (less than 0.05 cps). Therefore the peak of Cu-Kα line can be distinguished from the background. It can be said that a calibration curve can be drawn to the middle range of 10 9 atoms/cm 2 . The same samples were measured with another TXRF instrument having W-Lβ 1 line for excitation. It was difficult to draw a calibration curve in this case. We will present both results taken with Au-Lβ 1 line and with W-Lβ 1 line. (author)

Packaging Technologies for 500C SiC Electronics and Sensors

Science.gov (United States)

Chen, Liang-Yu

2013-01-01

Various SiC electronics and sensors are currently under development for applications in 500C high temperature environments such as hot sections of aerospace engines and the surface of Venus. In order to conduct long-term test and eventually commercialize these SiC devices, compatible packaging technologies for the SiC electronics and sensors are required. This presentation reviews packaging technologies developed for 500C SiC electronics and sensors to address both component and subsystem level packaging needs for high temperature environments. The packaging system for high temperature SiC electronics includes ceramic chip-level packages, ceramic printed circuit boards (PCBs), and edge-connectors. High temperature durable die-attach and precious metal wire-bonding are used in the chip-level packaging process. A high temperature sensor package is specifically designed to address high temperature micro-fabricated capacitive pressure sensors for high differential pressure environments. This presentation describes development of these electronics and sensor packaging technologies, including some testing results of SiC electronics and capacitive pressure sensors using these packaging technologies.

Fresh meat packaging: consumer acceptance of modified atmosphere packaging including carbon monoxide.

Science.gov (United States)

Grebitus, Carola; Jensen, Helen H; Roosen, Jutta; Sebranek, Joseph G

2013-01-01

Consumers' perceptions and evaluations of meat quality attributes such as color and shelf life influence purchasing decisions, and these product attributes can be affected by the type of fresh meat packaging system. Modified atmosphere packaging (MAP) extends the shelf life of fresh meat and, with the inclusion of carbon monoxide (CO-MAP), achieves significant color stabilization. The objective of this study was to assess whether consumers would accept specific packaging technologies and what value consumers place on ground beef packaged under various atmospheres when their choices involved the attributes of color and shelf life. The study used nonhypothetical consumer choice experiments to determine the premiums that consumers are willing to pay for extended shelf life resulting from MAP and for the "cherry red" color in meat resulting from CO-MAP. The experimental design allowed determination of whether consumers would discount foods with MAP or CO-MAP when (i) they are given more detailed information about the technologies and (ii) they have different levels of individual knowledge and media exposure. The empirical analysis was conducted using multinomial logit models. Results indicate that consumers prefer an extension of shelf life as long as the applied technology is known and understood. Consumers had clear preferences for brighter (aerobic and CO) red color and were willing to pay $0.16/lb ($0.35/kg) for each level of change to the preferred color. More information on MAP for extending the shelf life and on CO-MAP for stabilizing color decreased consumers' willingness to pay. An increase in personal knowledge and media exposure influenced acceptance of CO-MAP negatively. The results provide quantitative measures of how packaging affects consumers' acceptance and willingness to pay for products. Such information can benefit food producers and retailers who make decisions about investing in new packaging methods.

Reducing the substrate dependent scanner leveling effect in low-k1 contact printing

Science.gov (United States)

Chang, C. S.; Tseng, C. F.; Huang, C. H.; Yang, Elvis; Yang, T. H.; Chen, K. C.

2015-03-01

As the scaling down of design rule for high-density memory device, the small depth of focus (DoF) budget may be deteriorated by focus leveling errors, which arises in unpredicted reflectivity from multilayer structures on the topographic wafer. The leveling sensors of ASML scanner use near infrared (NIR) range wavelength which can penetrate through most of films using in semiconductor fabrication such as photo-resist, bottom anti reflective coating (BARC) and dielectric materials. Consequently, the reflected light from underlying substructures would disturb leveling sensors from accurate leveling. The different pattern densities and layout characteristics between array and periphery of a memory chip are expected to result in different leveling signals. Furthermore, the process dependent variations between wafer central and edge areas are also considered to yield different leveling performances during wafer exposure. In this study, lower blind contact immunity was observed for peripheral contacts comparing to the array contacts especially around wafer edge region. In order to overcome this problem, a series of investigations have been carried out. The wafer edge leveling optimization through circuit dependent focus edge clearance (CDFEC) option doesn't get improvement. Air gauge improved process leveling (AGILE) function of ASML immersion scanner doesn't show improved result either. The ILD uniformity improvement and step height treatments around wafer edge such as edge exclusion of film deposition and bevel etching are also ineffective to mitigate the blind contact problem of peripheral patterns. Altering the etch hard-mask stack is finally found to be an effective approach to alleviate the issue. For instance, through either containing high temperature deposition advanced patterning film (APF) in the hard-mask or inserting higher opaque film such as amorphous Si in between the hard-mask stack.

Introduction of high oxygen concentrations into silicon wafers by high-temperature diffusion

International Nuclear Information System (INIS)

Casse, G.; Glaser, M.; Lemeilleur, F.; Ruzin, A.; Wegrzecki, M.

1999-01-01

The tolerance of silicon detectors to hadron irradiation can be improved by the introduction of a high concentration of oxygen into the starting material. High-resistivity Floating-Zone (FZ) silicon is required for detectors used in particle physics applications. A significantly high oxygen concentration (>10 17 atoms cm -3 ) cannot readily be achieved during the FZ silicon refinement. The diffusion of oxygen at elevated temperatures from a SiO 2 layer grown on both sides of a silicon wafer is a simple and effective technique to achieve high and uniform concentrations of oxygen throughout the bulk of a 300 μm thick silicon wafer

Greater-than-Class C low-level radioactive waste shipping package/container identification and requirements study. National Low-Level Waste Management Program

Energy Technology Data Exchange (ETDEWEB)

Tyacke, M.

1993-08-01

This report identifies a variety of shipping packages (also referred to as casks) and waste containers currently available or being developed that could be used for greater-than-Class C (GTCC) low-level waste (LLW). Since GTCC LLW varies greatly in size, shape, and activity levels, the casks and waste containers that could be used range in size from small, to accommodate a single sealed radiation source, to very large-capacity casks/canisters used to transport or dry-store highly radioactive spent fuel. In some cases, the waste containers may serve directly as shipping packages, while in other cases, the containers would need to be placed in a transport cask. For the purpose of this report, it is assumed that the generator is responsible for transporting the waste to a Department of Energy (DOE) storage, treatment, or disposal facility. Unless DOE establishes specific acceptance criteria, the receiving facility would need the capability to accept any of the casks and waste containers identified in this report. In identifying potential casks and waste containers, no consideration was given to their adequacy relative to handling, storage, treatment, and disposal. Those considerations must be addressed separately as the capabilities of the receiving facility and the handling requirements and operations are better understood.

Research Article Special Issue

African Journals Online (AJOL)

pc

2017-11-24

Nov 24, 2017 ... as encapsulants to chip-scale and wafer-level packaging in ultra-large-scale- ... acetone, ethanol and 1M HCl standard cleaning process was carried out in order to remove .... [12] Fan ZH, Gu P and Nishida T (2014).

Solid-liquid interdiffusion (SLID) bonding in the Au-In system: experimental study and 1D modelling

Science.gov (United States)

Deillon, Léa; Hessler-Wyser, Aïcha; Hessler, Thierry; Rappaz, Michel

2015-12-01

Au-In bonds with a nominal composition of about 60 at.% In were fabricated for use in wafer-level packaging of MEMS. The microstructure of the bonds was studied by scanning electron microscopy. The bond hermeticity was then assessed using oxidation of Cu thin discs predeposited within the sealed packages. The three intermetallic compounds AuIn2, AuIn and Au7In3 were observed. Their thickness evolution during bonding and after subsequent heat treatment was successfully modelled using a finite difference model of diffusion, thermodynamic data and diffusion coefficients calibrated from isothermal diffusion couples. 17% of the packages were hermetic and, although the origin of the leaks could not be clearly identified, it appeared that hermeticity was correlated with the unevenness of the metallisation and/or wafer and the fact that the bonds shrink due to density differences as the relative fractions of the various phases gradually evolve.

Solid-liquid interdiffusion (SLID) bonding in the Au–In system: experimental study and 1D modelling

International Nuclear Information System (INIS)

Deillon, Léa; Hessler-Wyser, Aïcha; Hessler, Thierry; Rappaz, Michel

2015-01-01

Au–In bonds with a nominal composition of about 60 at.% In were fabricated for use in wafer-level packaging of MEMS. The microstructure of the bonds was studied by scanning electron microscopy. The bond hermeticity was then assessed using oxidation of Cu thin discs predeposited within the sealed packages. The three intermetallic compounds AuIn 2 , AuIn and Au 7 In 3 were observed. Their thickness evolution during bonding and after subsequent heat treatment was successfully modelled using a finite difference model of diffusion, thermodynamic data and diffusion coefficients calibrated from isothermal diffusion couples. 17% of the packages were hermetic and, although the origin of the leaks could not be clearly identified, it appeared that hermeticity was correlated with the unevenness of the metallisation and/or wafer and the fact that the bonds shrink due to density differences as the relative fractions of the various phases gradually evolve. (paper)

High quality single atomic layer deposition of hexagonal boron nitride on single crystalline Rh(111) four-inch wafers

Energy Technology Data Exchange (ETDEWEB)

Hemmi, A.; Bernard, C.; Cun, H.; Roth, S.; Klöckner, M.; Kälin, T.; Osterwalder, J.; Greber, T., E-mail: greber@physik.uzh.ch [Physik-Institut, Universität Zürich, CH-8057 Zürich (Switzerland); Weinl, M.; Gsell, S.; Schreck, M. [Institut für Physik, Universität Augsburg, D-86135 Augsburg (Germany)

2014-03-15

The setup of an apparatus for chemical vapor deposition (CVD) of hexagonal boron nitride (h-BN) and its characterization on four-inch wafers in ultra high vacuum (UHV) environment is reported. It provides well-controlled preparation conditions, such as oxygen and argon plasma assisted cleaning and high temperature annealing. In situ characterization of a wafer is accomplished with target current spectroscopy. A piezo motor driven x-y stage allows measurements with a step size of 1 nm on the complete wafer. To benchmark the system performance, we investigated the growth of single layer h-BN on epitaxial Rh(111) thin films. A thorough analysis of the wafer was performed after cutting in atmosphere by low energy electron diffraction, scanning tunneling microscopy, and ultraviolet and X-ray photoelectron spectroscopies. The apparatus is located in a clean room environment and delivers high quality single layers of h-BN and thus grants access to large area UHV processed surfaces, which had been hitherto restricted to expensive, small area single crystal substrates. The facility is versatile enough for customization to other UHV-CVD processes, e.g., graphene on four-inch wafers.

In situ beam angle measurement in a multi-wafer high current ion implanter

International Nuclear Information System (INIS)

Freer, B.S.; Reece, R.N.; Graf, M.A.; Parrill, T.; Polner, D.

2005-01-01

Direct, in situ measurement of the average angle and angular content of an ion beam in a multi-wafer ion implanter is reported for the first time. A new type of structure and method are described. The structures are located on the spinning disk, allowing precise angular alignment to the wafers. Current that passes through the structures is known to be within a range of angles and is detected behind the disk. By varying the angle of the disk around two axes, beam current versus angle is mapped and the average angle and angular spread are calculated. The average angle measured in this way is found to be consistent with that obtained by other techniques, including beam centroid offset and wafer channeling methods. Average angle of low energy beams, for which it is difficult to use other direct methods, is explored. A 'pencil beam' system is shown to give average angle repeatability of 0.13 deg. (1σ) or less, for two low energy beams under normal tuning variations, even though no effort was made to control the angle

Electronic properties of interfaces produced by silicon wafer hydrophilic bonding

Energy Technology Data Exchange (ETDEWEB)

Trushin, Maxim

2011-07-15

The thesis presents the results of the investigations of electronic properties and defect states of dislocation networks (DNs) in silicon produced by wafers direct bonding technique. A new insight into the understanding of their very attractive properties was succeeded due to the usage of a new, recently developed silicon wafer direct bonding technique, allowing to create regular dislocation networks with predefined dislocation types and densities. Samples for the investigations were prepared by hydrophilic bonding of p-type Si (100) wafers with same small misorientation tilt angle ({proportional_to}0.5 ), but with four different twist misorientation angles Atw (being of < , 3 , 6 and 30 , respectively), thus giving rise to the different DN microstructure on every particular sample. The main experimental approach of this work was the measurements of current and capacitance of Schottky diodes prepared on the samples which contained the dislocation network at a depth that allowed one to realize all capabilities of different methods of space charge region spectroscopy (such as CV/IV, DLTS, ITS, etc.). The key tasks for the investigations were specified as the exploration of the DN-related gap states, their variations with gradually increasing twist angle Atw, investigation of the electrical field impact on the carrier emission from the dislocation-related states, as well as the establishing of the correlation between the electrical (DLTS), optical (photoluminescence PL) and structural (TEM) properties of DNs. The most important conclusions drawn from the experimental investigations and theoretical calculations can be formulated as follows: - DLTS measurements have revealed a great difference in the electronic structure of small-angle (SA) and large-angle (LA) bonded interfaces: dominating shallow level and a set of 6-7 deep levels were found in SA-samples with Atw of 1 and 3 , whereas the prevalent deep levels - in LA-samples with Atw of 6 and 30 . The critical twist

Electronically and ionically conductive porous material and method for manufacture of resin wafers therefrom

Science.gov (United States)

Lin, YuPo J [Naperville, IL; Henry, Michael P [Batavia, IL; Snyder, Seth W [Lincolnwood, IL

2011-07-12

An electrically and ionically conductive porous material including a thermoplastic binder and one or more of anion exchange moieties or cation exchange moieties or mixtures thereof and/or one or more of a protein capture resin and an electrically conductive material. The thermoplastic binder immobilizes the moieties with respect to each other but does not substantially coat the moieties and forms the electrically conductive porous material. A wafer of the material and a method of making the material and wafer are disclosed.

Simplified nonplanar wafer bonding for heterogeneous device integration

Science.gov (United States)

Geske, Jon; Bowers, John E.; Riley, Anton

2004-07-01

We demonstrate a simplified nonplanar wafer bonding technique for heterogeneous device integration. The improved technique can be used to laterally integrate dissimilar semiconductor device structures on a lattice-mismatched substrate. Using the technique, two different InP-based vertical-cavity surface-emitting laser active regions have been integrated onto GaAs without compromising the quality of the photoluminescence. Experimental and numerical simulation results are presented.

Application of a layout/material handling design method to a furnace area in a 300 mm wafer fab

NARCIS (Netherlands)

Hesen, P.M.C.; Renders, P.J.J.; Rooda, J.E.

2001-01-01

For many years, material handling within the semiconductor industry has become increasingly important. With the introduction of 300 mm wafer production, ergonomics and product safety become more critical. Therefore, the manufacturers of semiconductor wafer fabs are considering the automation of

Improved delivery of the anticancer agent citral using BSA nanoparticles and polymeric wafers

Directory of Open Access Journals (Sweden)

White B

2017-12-01

Full Text Available Benjamin White,1 Anna Evison,1 Eszter Dombi,1 Helen E Townley1,2 1Nuffield Department of Obstetrics and Gynaecology, Women’s Centre, John Radcliffe Hospital, 2Department of Engineering Science, Oxford University, Oxford, UK Abstract: Rhabdomyosarcoma (RMS is the most common soft tissue sarcoma in children, with a 5-year survival rate of between 30 and 65%. Standard treatment involves surgery, radiation treatment, and chemotherapy. However, there is a high recurrence rate, particularly from locoregional spread. We investigated the use of the natural compound citral (3,7-dimethyl-2,6-octadienal, which can be found in a number of plants, but is particularly abundant in lemon grass (Cymbopogon citratus oil, for activity against immortalized RMS cells. Significant cancer cell death was seen at concentrations above 150 μM citral, and mitochondrial morphological changes were seen after incubation with 10 μM citral. However, since citral is a highly volatile molecule, we prepared albumin particles by a desolvation method to encapsulate citral, as a means of stabilization. We then further incorporated the loaded nanoparticles into a biodegradable polyanhydride wafer to generate a slow release system. The wafers were shown to degrade by 50% over the course of 25 days and to release the active compound. We therefore propose the use of the citral-nanoparticle-polymer wafers for implantation into the tumor bed after surgical removal of a sarcoma as a means to control locoregional spread due to any remaining cancerous cells. Keywords: citral, nanoparticle, wafer, biodegradable, mitochondria, toroidal, cancer, rhabdomyosarcoma, Cymbopogon citratus

Determination of thicknesses and temperatures of crystalline silicon wafers from optical measurements in the far infrared region

Science.gov (United States)

Franta, Daniel; Franta, Pavel; Vohánka, Jiří; Čermák, Martin; Ohlídal, Ivan

2018-05-01

Optical measurements of transmittance in the far infrared region performed on crystalline silicon wafers exhibit partially coherent interference effects appropriate for the determination of thicknesses of the wafers. The knowledge of accurate spectral and temperature dependencies of the optical constants of crystalline silicon in this spectral region is crucial for the determination of its thickness and vice versa. The recently published temperature dependent dispersion model of crystalline silicon is suitable for this purpose. Because the linear thermal expansion of crystalline silicon is known, the temperatures of the wafers can be determined with high precision from the evolution of the interference patterns at elevated temperatures.

Annotated bibliography for the design of waste packages for geologic disposal of spent fuel and high-level waste

International Nuclear Information System (INIS)

Wurm, K.J.; Miller, N.E.

1982-11-01

This bibliography identifies documents that are pertinent to the design of waste packages for geologic disposal of nuclear waste. The bibliography is divided into fourteen subject categories so that anyone wishing to review the subject of leaching, for example, can turn to the leaching section and review the abstracts of reports which are concerned primarily with leaching. Abstracts are also cross referenced according to secondary subject matter so that one can get a complete list of abstracts for any of the fourteen subject categories. All documents which by their title alone appear to deal with the design of waste packages for the geologic disposal of spent fuel or high-level waste were obtained and reviewed. Only those documents which truly appear to be of interest to a waste package designer were abstracted. The documents not abstracted are listed in a separate section. There was no beginning date for consideration of a document for review. About 1100 documents were reviewed and about 450 documents were abstracted

Preparation of freestanding GaN wafer by hydride vapor phase epitaxy on porous silicon

Science.gov (United States)

Wu, Xian; Li, Peng; Liang, Renrong; Xiao, Lei; Xu, Jun; Wang, Jing

2018-05-01

A freestanding GaN wafer was prepared on porous Si (111) substrate using hydride vapor phase epitaxy (HVPE). To avoid undesirable effects of the porous surface on the crystallinity of the GaN, a GaN seed layer was first grown on the Si (111) bare wafer. A pattern with many apertures was fabricated in the GaN seed layer using lithography and etching processes. A porous layer was formed in the Si substrate immediately adjacent to the GaN seed layer by an anodic etching process. A 500-μm-thick GaN film was then grown on the patterned GaN seed layer using HVPE. The GaN film was separated from the Si substrate through the formation of cracks in the porous layer caused by thermal mismatch stress during the cooling stage of the HVPE. Finally, the GaN film was polished to obtain a freestanding GaN wafer.

Denuded zone in Czochralski silicon wafer with high carbon content

International Nuclear Information System (INIS)

Chen Jiahe; Yang Deren; Ma Xiangyang; Que Duanlin

2006-01-01

The thermal stability of the denuded zone (DZ) created by high-low-high-temperature annealing in high carbon content (H[C]) and low carbon content (L[C]) Czochralski silicon (Cz-Si) has been investigated in a subsequent ramping and isothermal 1050 deg. C annealing. The tiny oxygen precipitates which might occur in the DZ were checked. It was found in the L[C] Cz-Si that the DZ shrank and the density of bulk micro-defects (BMDs) reduced with the increase of time spent at 1050 deg. C. Also, the DZs above 15 μm of thickness present in the H[C] Cz-Si wafers continuously and the density and total volume of BMDs first decreased then increased and finally decreased again during the treatments. Moreover, tiny oxygen precipitates were hardly generated inside the DZs, indicating that H[C] Cz-Si wafers could support the fabrication of integrated circuits

Denuded zone in Czochralski silicon wafer with high carbon content

Science.gov (United States)

Chen, Jiahe; Yang, Deren; Ma, Xiangyang; Que, Duanlin

2006-12-01

The thermal stability of the denuded zone (DZ) created by high-low-high-temperature annealing in high carbon content (H[C]) and low carbon content (L[C]) Czochralski silicon (Cz-Si) has been investigated in a subsequent ramping and isothermal 1050 °C annealing. The tiny oxygen precipitates which might occur in the DZ were checked. It was found in the L[C] Cz-Si that the DZ shrank and the density of bulk micro-defects (BMDs) reduced with the increase of time spent at 1050 °C. Also, the DZs above 15 µm of thickness present in the H[C] Cz-Si wafers continuously and the density and total volume of BMDs first decreased then increased and finally decreased again during the treatments. Moreover, tiny oxygen precipitates were hardly generated inside the DZs, indicating that H[C] Cz-Si wafers could support the fabrication of integrated circuits.

Radioactive material packaging performance testing

International Nuclear Information System (INIS)

Romano, T.

1992-06-01

In an effort to provide uniform packaging of hazardous material on an international level, recommendations for the transport of dangerous goods have been developed by the United Nations. These recommendations are performance oriented and contrast with a large number of packaging specifications in the US Department of Transportation's hazard materials regulations. This dual system presents problems when international shipments enter the US Department of Transportation's system. Faced with the question of continuing a dual system or aligning with the international system, the Research and Special Programs Administration of the US Department of Transportation responded with Docket HM-181. This began the transition toward the international transportation system. Following close behind is Docket HM-169A, which addressed low specific activity radioactive material packaging. This paper will discuss the differences between performance-oriented and specification packaging, the transition toward performance-oriented packaging by the US Department of Transportation, and performance-oriented testing of radioactive material packaging by Westinghouse Hanford Company. Dockets HM-181 and HM-169A will be discussed along with Type A (low activity) and Type B (high activity) radioactive material packaging evaluations

Wafer scale lead zirconate titanate film preparation by sol-gel method using stress balance layer

International Nuclear Information System (INIS)

Lu Jian; Kobayashi, Takeshi; Yi Zhang; Maeda, Ryutaro; Mihara, Takashi

2006-01-01

In this paper, platinum/titanium (Pt/Ti) film was introduced as a residual stress balance layer into wafer scale thick lead zirconate titanate (PZT) film fabrication by sol-gel method. The stress developing in PZT film's bottom electrode as well as in PZT film itself during deposition were analyzed; the wafer curvatures, PZT crystallizations and PZT electric properties before and after using Pt/Ti stress balance layer were studied and compared. It was found that this layer is effective to balance the residual stress in PZT film's bottom electrode induced by thermal expansion coefficient mismatch and Ti diffusion, thus can notably reduce the curvature of 4-in. wafer from - 40.5 μm to - 12.9 μm after PZT film deposition. This stress balance layer was also found effective to avoid the PZT film cracking even when annealed by rapid thermal annealing with heating-rate up to 10.5 deg. C/s. According to X-ray diffraction analysis and electric properties characterization, crack-free uniform 1-μm-thick PZT film with preferred pervoskite (001) orientation, excellent dielectric constant, as high as 1310, and excellent remanent polarization, as high as 39.8 μC/cm 2 , can be obtained on 4-in. wafer

Packaging Review Guide for Reviewing Safety Analysis Reports for Packagings

Energy Technology Data Exchange (ETDEWEB)

DiSabatino, A; Biswas, D; DeMicco, M; Fisher, L E; Hafner, R; Haslam, J; Mok, G; Patel, C; Russell, E

2007-04-12

This Packaging Review Guide (PRG) provides guidance for Department of Energy (DOE) review and approval of packagings to transport fissile and Type B quantities of radioactive material. It fulfills, in part, the requirements of DOE Order 460.1B for the Headquarters Certifying Official to establish standards and to provide guidance for the preparation of Safety Analysis Reports for Packagings (SARPs). This PRG is intended for use by the Headquarters Certifying Official and his or her review staff, DOE Secretarial offices, operations/field offices, and applicants for DOE packaging approval. This PRG is generally organized at the section level in a format similar to that recommended in Regulatory Guide 7.9 (RG 7.9). One notable exception is the addition of Section 9 (Quality Assurance), which is not included as a separate chapter in RG 7.9. Within each section, this PRG addresses the technical and regulatory bases for the review, the manner in which the review is accomplished, and findings that are generally applicable for a package that meets the approval standards. This Packaging Review Guide (PRG) provides guidance for DOE review and approval of packagings to transport fissile and Type B quantities of radioactive material. It fulfills, in part, the requirements of DOE O 460.1B for the Headquarters Certifying Official to establish standards and to provide guidance for the preparation of Safety Analysis Reports for Packagings (SARPs). This PRG is intended for use by the Headquarters Certifying Official and his review staff, DOE Secretarial offices, operations/field offices, and applicants for DOE packaging approval. The primary objectives of this PRG are to: (1) Summarize the regulatory requirements for package approval; (2) Describe the technical review procedures by which DOE determines that these requirements have been satisfied; (3) Establish and maintain the quality and uniformity of reviews; (4) Define the base from which to evaluate proposed changes in scope

Split-Capacitance and Conductance-Frequency Characteristics of SOI Wafers in Pseudo-MOSFET Configuration

KAUST Repository

Pirro, Luca

2015-09-01

Recent experimental results have demonstrated the possibility of characterizing silicon-on-insulator (SOI) wafers through split C-V measurements in the pseudo-MOSFET configuration. This paper analyzes the capacitance and conductance versus frequency characteristics. We discuss the conditions under which it is possible to extract interface trap density in bare SOI wafers. The results indicate, through both measurements and simulations, that the signature due to interface trap density is present in small-area samples, but is masked by the RC response of the channel in regular, large-area ones, making the extraction in standard samples problematic. © 1963-2012 IEEE.

Split-Capacitance and Conductance-Frequency Characteristics of SOI Wafers in Pseudo-MOSFET Configuration

KAUST Repository

Pirro, Luca; Diab, Amer El Hajj; Ionica, Irina; Ghibaudo, Gerard; Faraone, Lorenzo; Cristoloveanu, Sorin

2015-01-01

Recent experimental results have demonstrated the possibility of characterizing silicon-on-insulator (SOI) wafers through split C-V measurements in the pseudo-MOSFET configuration. This paper analyzes the capacitance and conductance versus frequency characteristics. We discuss the conditions under which it is possible to extract interface trap density in bare SOI wafers. The results indicate, through both measurements and simulations, that the signature due to interface trap density is present in small-area samples, but is masked by the RC response of the channel in regular, large-area ones, making the extraction in standard samples problematic. © 1963-2012 IEEE.

Long term behaviour of low and intermediate level waste packages under repository conditions. Results of a co-ordinated research project 1997-2002

International Nuclear Information System (INIS)

2004-06-01

The development and application of approaches and technologies that provide long term safety is an essential issue in the disposal of radioactive waste. For low and intermediate level radioactive waste, engineered barriers play an important role in the overall safety and performance of near surface repositories. Thus, developing a strong technical basis for understanding the behaviour and performance of engineered barriers is an important consideration in the development and establishment of near surface repositories for radioactive waste. In 1993, a Co-ordinated Research Project (CRP) on Performance of Engineered Barrier Materials in Near Surface Disposal Facilities for Radioactive Waste was initiated by the IAEA with the twin goals of addressing some of the gaps in the database on radionuclide isolation and long term performance of a wide variety of materials and components that constitute the engineered barriers system (IAEA-TECDOC-1255 (2001)). However, during the course of the CRP, it was realized that that the scope of the CRP did not include studies of the behaviour of waste packages over time. Given that a waste package represents an important component of the overall near surface disposal system and the fact that many Member States have active R and D programmes related to waste package testing and evaluation, a new CRP was launched, in 1997, on Long Term Behaviour of Low and Intermediate Level Waste Packages Under Repository Conditions. The CRP was intended to promote research activities on the subject area in Member States, share information on the topic among the participating countries, and contribute to advancing technologies for near surface disposal of radioactive waste. Thus, this CRP complements the afore mentioned CRP on studies of engineered barriers. With the active participation and valuable contributions from twenty scientists and engineers from Argentina, Canada, Czech Republic, Egypt, Finland, India, Republic of Korea, Norway, Romania

Multiproject wafers: not just for million-dollar mask sets

Science.gov (United States)

Morse, Richard D.

2003-06-01

With the advent of Reticle Enhancement Technologies (RET) such as Optical Proximity Correction (OPC) and Phase Shift Masks (PSM) required to manufacture semiconductors in the sub-wavelength era, the cost of photomask tooling has skyrocketed. On the leading edge of technology, mask set prices often exceed $1 million. This shifts an enormous burden back to designers and Electronic Design Automation (EDA) software vendors to create perfect designs at a time when the number of transistors per chip is measured in the hundreds of millions, and gigachips are on the drawing boards. Moore's Law has driven technology to incredible feats. The prime beneficiaries of the technology - memory and microprocessor (MPU) manufacturers - can continue to fit the model because wafer volumes (and chip prices in the MPU case) render tooling costs relatively insignificant. However, Application-Specific IC (ASIC) manufacturers and most foundry clients average very small wafer per reticle ratios causing a dramatic and potentially insupportable rise in the cost of manufacturing. Multi-Project wafers (MPWs) are a way to share the cost of tooling and silicon by putting more than one chip on each reticle. Lacking any unexpected breakthroughs in simulation, verification, or mask technology to reduce the cost of prototyping, more efficient use of reticle space becomes a viable and increasingly attractive choice. It is worthwhile therefore, to discuss the economics of prototyping in the sub-wavelength era and the increasing advantages of the MPW, shared-silicon approach. However, putting together a collection of different-sized chips during tapeout can be challenging and time consuming. Design compatibility, reticle field optimization, and frame generation have traditionally been the biggest worries but, with the advent of dummy-fill for planarization and RET for resolution, another layer of complexity has been added. MPW automation software is quite advanced today, but the size of the task

Greater-than-Class C low-level radioactive waste shipping package/container identification and requirements study

International Nuclear Information System (INIS)

Tyacke, M.

1993-08-01

This report identifies a variety of shipping packages (also referred to as casks) and waste containers currently available or being developed that could be used for greater-than-Class C (GTCC) low-level waste (LLW). Since GTCC LLW varies greatly in size, shape, and activity levels, the casks and waste containers that could be used range in size from small, to accommodate a single sealed radiation source, to very large-capacity casks/canisters used to transport or dry-store highly radioactive spent fuel. In some cases, the waste containers may serve directly as shipping packages, while in other cases, the containers would need to be placed in a transport cask. For the purpose of this report, it is assumed that the generator is responsible for transporting the waste to a Department of Energy (DOE) storage, treatment, or disposal facility. Unless DOE establishes specific acceptance criteria, the receiving facility would need the capability to accept any of the casks and waste containers identified in this report. In identifying potential casks and waste containers, no consideration was given to their adequacy relative to handling, storage, treatment, and disposal. Those considerations must be addressed separately as the capabilities of the receiving facility and the handling requirements and operations are better understood

System-level integration of active silicon photonic biosensors

Science.gov (United States)

Laplatine, L.; Al'Mrayat, O.; Luan, E.; Fang, C.; Rezaiezadeh, S.; Ratner, D. M.; Cheung, K.; Dattner, Y.; Chrostowski, L.

2017-02-01

Biosensors based on silicon photonic integrated circuits have attracted a growing interest in recent years. The use of sub-micron silicon waveguides to propagate near-infrared light allows for the drastic reduction of the optical system size, while increasing its complexity and sensitivity. Using silicon as the propagating medium also leverages the fabrication capabilities of CMOS foundries, which offer low-cost mass production. Researchers have deeply investigated photonic sensor devices, such as ring resonators, interferometers and photonic crystals, but the practical integration of silicon photonic biochips as part of a complete system has received less attention. Herein, we present a practical system-level architecture which can be employed to integrate the aforementioned photonic biosensors. We describe a system based on 1 mm2 dies that integrate germanium photodetectors and a single light coupling device. The die are embedded into a 16x16 mm2 epoxy package to enable microfluidic and electrical integration. First, we demonstrate a simple process to mimic Fan-Out Wafer-level-Packaging, which enables low-cost mass production. We then characterize the photodetectors in the photovoltaic mode, which exhibit high sensitivity at low optical power. Finally, we present a new grating coupler concept to relax the lateral alignment tolerance down to +/- 50 μm at 1-dB (80%) power penalty, which should permit non-experts to use the biochips in a"plug-and-play" style. The system-level integration demonstrated in this study paves the way towards the mass production of low-cost and highly sensitive biosensors, and can facilitate their wide adoption for biomedical and agro-environmental applications.

Review of DOE waste package program. Subtask 1.1. National waste package program, April-September 1982

International Nuclear Information System (INIS)

Soo, P.

1983-03-01

The current effort is part of an ongoing task to evaluate the national high-level waste package effort. It includes evaluations of reference waste form, container, and packing material components with respect to determining how they may contribute to the containment and controlled release of radionuclides after waste packages have been emplaced in salt and basalt repositories. Chemical and mechanical failure/degradation modes for the waste package have been reviewed and the licensing data requirements to demonstrate compliance with NRC performance objectives specified

Advanced ACTPol Multichroic Polarimeter Array Fabrication Process for 150 mm Wafers

Science.gov (United States)

Duff, S. M.; Austermann, J.; Beall, J. A.; Becker, D.; Datta, R.; Gallardo, P. A.; Henderson, S. W.; Hilton, G. C.; Ho, S. P.; Hubmayr, J.; Koopman, B. J.; Li, D.; McMahon, J.; Nati, F.; Niemack, M. D.; Pappas, C. G.; Salatino, M.; Schmitt, B. L.; Simon, S. M.; Staggs, S. T.; Stevens, J. R.; Van Lanen, J.; Vavagiakis, E. M.; Ward, J. T.; Wollack, E. J.

2016-08-01

Advanced ACTPol (AdvACT) is a third-generation cosmic microwave background receiver to be deployed in 2016 on the Atacama Cosmology Telescope (ACT). Spanning five frequency bands from 25 to 280 GHz and having just over 5600 transition-edge sensor (TES) bolometers, this receiver will exhibit increased sensitivity and mapping speed compared to previously fielded ACT instruments. This paper presents the fabrication processes developed by NIST to scale to large arrays of feedhorn-coupled multichroic AlMn-based TES polarimeters on 150-mm diameter wafers. In addition to describing the streamlined fabrication process which enables high yields of densely packed detectors across larger wafers, we report the details of process improvements for sensor (AlMn) and insulator (SiN_x) materials and microwave structures, and the resulting performance improvements.

Waste package reliability analysis

International Nuclear Information System (INIS)

Pescatore, C.; Sastre, C.

1983-01-01

Proof of future performance of a complex system such as a high-level nuclear waste package over a period of hundreds to thousands of years cannot be had in the ordinary sense of the word. The general method of probabilistic reliability analysis could provide an acceptable framework to identify, organize, and convey the information necessary to satisfy the criterion of reasonable assurance of waste package performance according to the regulatory requirements set forth in 10 CFR 60. General principles which may be used to evaluate the qualitative and quantitative reliability of a waste package design are indicated and illustrated with a sample calculation of a repository concept in basalt. 8 references, 1 table

Mathematical model for predicting molecular-beam epitaxy growth rates for wafer production

International Nuclear Information System (INIS)

Shi, B.Q.

2003-01-01

An analytical mathematical model for predicting molecular-beam epitaxy (MBE) growth rates is reported. The mathematical model solves the mass-conservation equation for liquid sources in conical crucibles and predicts the growth rate by taking into account the effect of growth source depletion on the growth rate. Assumptions made for deducing the analytical model are discussed. The model derived contains only one unknown parameter, the value of which can be determined by using data readily available to MBE growers. Procedures are outlined for implementing the model in MBE production of III-V compound semiconductor device wafers. Results from use of the model to obtain targeted layer compositions and thickness of InP-based heterojunction bipolar transistor wafers are presented

Spatially resolved localized vibrational mode spectroscopy of carbon in liquid encapsulated Czochralski grown gallium arsenide wafers

International Nuclear Information System (INIS)

Yau, Waifan.

1988-04-01

Substitutional carbon on an arsenic lattice site is the shallowest and one of the most dominant acceptors in semi-insulating Liquid Encapsulated Czochralski (LEC) GaAs. However, the role of this acceptor in determining the well known ''W'' shape spatial variation of neutral EL2 concentration along the diameter of a LEC wafer is not known. In this thesis, we attempt to clarify the issue of the carbon acceptor's effect on this ''W'' shaped variation by measuring spatial profiles of this acceptor along the radius of three different as-grown LEC GaAs wafers. With localized vibrational mode absorption spectroscopy, we find that the profile of the carbon acceptor is relatively constant along the radius of each wafer. Average values of concentration are 8 x 10E15 cm -3 , 1.1 x 10E15 cm -3 , and 2.2 x 10E15 cm -3 , respectively. In addition, these carbon acceptor LVM measurements indicate that a residual donor with concentration comparable to carbon exists in these wafers and it is a good candidate for the observed neutral EL2 concentration variation. 22 refs., 39 figs

A mechanistic model for leaching from low-level radioactive waste packages

International Nuclear Information System (INIS)

Kempf, C.R.

1988-01-01

The development of a waste leaching model to predict radionuclide releases from porous wastes in corrodible outer containers in unsaturated conditions and/or conditions of intermittent water flow is summarized in this paper. Three major processes have been conceptualized as necessarily participating in waste leaching: infiltration of water to the waste package; interaction of this water with the waste; and exit of radionuclide-laden water from the waste package. Through the exit point, the main features of the whole leaching process ware held in common. The departure occurs in two main ways: 1) the method of entrance of the radionuclides to leachant (i.e. part of the waste-water interaction phase outlined earlier); and 2) the mode of exit from waste form/waste package (i.e., the exit of radionuclide-laden water phase). The first branching point, which occurs in relation to 1), leads to either readily soluble species directly entering leachant on contact, or to other processes - mainly expected to be diffusion, dissolution or ion exchange, or some combination thereof

Crack Detection in Single-Crystalline Silicon Wafer Using Laser Generated Lamb Wave

Directory of Open Access Journals (Sweden)

Min-Kyoo Song

2013-01-01

Full Text Available In the semiconductor industry, with increasing requirements for high performance, high capacity, high reliability, and compact components, the crack has been one of the most critical issues in accordance with the growing requirement of the wafer-thinning in recent years. Previous researchers presented the crack detection on the silicon wafers with the air-coupled ultrasonic method successfully. However, the high impedance mismatching will be the problem in the industrial field. In this paper, in order to detect the crack, we propose a laser generated Lamb wave method which is not only noncontact, but also reliable for the measurement. The laser-ultrasonic generator and the laser-interferometer are used as a transmitter and a receiver, respectively. We firstly verified the identification of S0 and A0 lamb wave modes and then conducted the crack detection under the thermoelastic regime. The experimental results showed that S0 and A0 modes of lamb wave were clearly generated and detected, and in the case of the crack detection, the estimated crack size by 6 dB drop method was almost equal to the actual crack size. So, the proposed method is expected to make it possible to detect the crack in the silicon wafer in the industrial fields.

Launching of multi-project wafer runs in ePIXfab with micron-scale silicon rib waveguide technology

Science.gov (United States)

Aalto, Timo; Cherchi, Matteo; Harjanne, Mikko; Ylinen, Sami; Kapulainen, Markku; Vehmas, Tapani

2014-03-01

Silicon photonics is a rapidly growing R&D field where universities, institutes and companies are all involved and the business expectations for the next few years are high. One of the key enabling elements that led to the present success of silicon photonics is ePIXfab. It is a consortium of institutes that has together offered multi-project wafer (MPW) runs, packaging services, training, and feasibility studies. These services have significantly lowered the barrier of various research groups and companies to start developing silicon photonics. Until now the MPW services have been offered by the ePIXfab partners IMEC, CEA-Leti and IHP, which all use CMOS-type silicon photonics technology with a typical silicon-on-insulator (SOI) waveguide thickness of 220 nm. In November 2013 this MPW offering was expanded by the ePIXfab partner VTT that opened the access to its 3 μm SOI waveguide platform via ePIXfab MPW runs. This technology platform is complementary to the mainstream silicon photonics technology (220 nm) and it offers such benefits as very low losses, small polarization dependency, ultrabroadband operation and low starting costs

Comparison of thermally and mechanically induced Si layer transfer in hydrogen-implanted Si wafers

International Nuclear Information System (INIS)

Hoechbauer, T.; Misra, A.; Nastasi, M.; Henttinen, K.; Suni, T.; Suni, I.; Lau, S.S.; Ensinger, W.

2004-01-01

Hydrogen ion-implantation into Si and subsequent heat treatment has been shown to be an effective means of cleaving thin layer of Si from its parent wafer. This process has been called Smart Cut TM or ion-cut. We investigated the cleavage process in H-implanted silicon samples, in which the ion-cut was provoked thermally and mechanically, respectively. A oriented p-type silicon wafer was irradiated at room temperature with 100 keV H 2 + -ions to a dose of 5 x 10 16 H 2 /cm 2 and subsequently joined to a handle wafer. Ion-cutting was achieved by two different methods: (1) thermally by annealing to 350 deg. C and (2) mechanically by insertion of a razor blade sidewise into the bonded wafers near the bond interface. The H-concentration and the crystal damage depth profiles before and after the ion-cut were investigated through the combined use of elastic recoil detection analysis and Rutherford backscattering spectroscopy (RBS). The location at which the ion-cut occurred was determined by RBS in channeling mode and cross-section transmission electron spectroscopy. The ion-cut depth was found to be independent on the cutting method. The gained knowledge was correlated to the depth distribution of the H-platelet density in the as-implanted sample, which contains two separate peaks in the implantation zone. The obtained results suggest that the ion-cut location coincides with the depth of the H-platelet density peak located at a larger depth

Fusion bonding of Si wafers investigated by x ray diffraction

DEFF Research Database (Denmark)

Weichel, Steen; Grey, Francois; Rasmussen, Kurt

2000-01-01

The interface structure of bonded Si(001) wafers with twist angle 6.5 degrees is studied as a function of annealing temperature. An ordered structure is observed in x-ray diffraction by monitoring a satellite reflection due to the periodic modulation near the interface, which results from...

Effect of Rapid Thermal Processing on Light-Induced Degradation of Carrier Lifetime in Czochralski p-Type Silicon Bare Wafers

Science.gov (United States)

Kouhlane, Y.; Bouhafs, D.; Khelifati, N.; Belhousse, S.; Menari, H.; Guenda, A.; Khelfane, A.

2016-11-01

The electrical properties of Czochralski silicon (Cz-Si) p-type boron-doped bare wafers have been investigated after rapid thermal processing (RTP) with different peak temperatures. Treated wafers were exposed to light for various illumination times, and the effective carrier lifetime ( τ eff) measured using the quasi-steady-state photoconductance (QSSPC) technique. τ eff values dropped after prolonged illumination exposure due to light-induced degradation (LID) related to electrical activation of boron-oxygen (BO) complexes, except in the sample treated with peak temperature of 785°C, for which the τ eff degradation was less pronounced. Also, a reduction was observed when using the 830°C peak temperature, an effect that was enhanced by alteration of the wafer morphology (roughness). Furthermore, the electrical resistivity presented good stability under light exposure as a function of temperature compared with reference wafers. Additionally, the optical absorption edge shifted to higher wavelength, leading to increased free-carrier absorption by treated wafers. Moreover, a theoretical model is used to understand the lifetime degradation and regeneration behavior as a function of illumination time. We conclude that RTP plays an important role in carrier lifetime regeneration for Cz-Si wafers via modification of optoelectronic and structural properties. The balance between an optimized RTP cycle and the rest of the solar cell elaboration process can overcome the negative effect of LID and contribute to achievement of higher solar cell efficiency and module performance.

Investigation of room-temperature wafer bonded GaInP/GaAs/InGaAsP triple-junction solar cells

Energy Technology Data Exchange (ETDEWEB)

Yang, Wen-xian; Dai, Pan; Ji, Lian; Tan, Ming; Wu, Yuan-yuan [Key Lab of Nanodevices and Applications, Suzhou Institute of Nano-Tech and Nano-Bionics, Chinese Academy of Sciences (CAS), Suzhou 215123 (China); Uchida, Shiro [Department of Mechanical Science and Engineering Faculty of Engineering, Chiba Institute of Technology, 2-17-1, Tsudanuma, Narashino, Chiba 275-0016 (Japan); Lu, Shu-long, E-mail: sllu2008@sinano.ac.cn [Key Lab of Nanodevices and Applications, Suzhou Institute of Nano-Tech and Nano-Bionics, Chinese Academy of Sciences (CAS), Suzhou 215123 (China); Yang, Hui [Key Lab of Nanodevices and Applications, Suzhou Institute of Nano-Tech and Nano-Bionics, Chinese Academy of Sciences (CAS), Suzhou 215123 (China)

2016-12-15

Highlights: • High quality InGaAsP material with a bandgap of 1.0 eV was grown by MBE. • Room-temperature wafer-bonded GaInP/GaAs/InGaAsP SCs were fabricated. • An efficiency of 30.3% of wafer-bonded triple-junction SCs was obtained. - Abstract: We report on the fabrication of III–V compound semiconductor multi-junction solar cells using the room-temperature wafer bonding technique. GaInP/GaAs dual-junction solar cells on GaAs substrate and InGaAsP single junction solar cell on InP substrate were separately grown by all-solid state molecular beam epitaxy (MBE). The two cells were then bonded to a triple-junction solar cell at room-temperature. A conversion efficiency of 30.3% of GaInP/GaAs/InGaAsP wafer-bonded solar cell was obtained at 1-sun condition under the AM1.5G solar simulator. The result suggests that the room-temperature wafer bonding technique and MBE technique have a great potential to improve the performance of multi-junction solar cell.

Advanced single-wafer sequential multiprocessing techniques for semiconductor device fabrication

International Nuclear Information System (INIS)

Moslehi, M.M.; Davis, C.

1989-01-01

Single-wafer integrated in-situ multiprocessing (SWIM) is recognized as the future trend for advanced microelectronics production in flexible fast turn- around computer-integrated semiconductor manufacturing environments. The SWIM equipment technology and processing methodology offer enhanced equipment utilization, improved process reproducibility and yield, and reduced chip manufacturing cost. They also provide significant capabilities for fabrication of new and improved device structures. This paper describes the SWIM techniques and presents a novel single-wafer advanced vacuum multiprocessing technology developed based on the use of multiple process energy/activation sources (lamp heating and remote microwave plasma) for multilayer epitaxial and polycrystalline semiconductor as well as dielectric film processing. Based on this technology, multilayer in-situ-doped homoepitaxial silicon and heteroepitaxial strained layer Si/Ge x Si 1 - x /Si structures have been grown and characterized. The process control and the ultimate interfacial abruptness of the layer-to-layer transition widths in the device structures prepared by this technology will challenge the MBE techniques in multilayer epitaxial growth applications

Uncertainty evaluation of thickness and warp of a silicon wafer measured by a spectrally resolved interferometer

Science.gov (United States)

Praba Drijarkara, Agustinus; Gergiso Gebrie, Tadesse; Lee, Jae Yong; Kang, Chu-Shik

2018-06-01

Evaluation of uncertainty of thickness and gravity-compensated warp of a silicon wafer measured by a spectrally resolved interferometer is presented. The evaluation is performed in a rigorous manner, by analysing the propagation of uncertainty from the input quantities through all the steps of measurement functions, in accordance with the ISO Guide to the Expression of Uncertainty in Measurement. In the evaluation, correlation between input quantities as well as uncertainty attributed to thermal effect, which were not included in earlier publications, are taken into account. The temperature dependence of the group refractive index of silicon was found to be nonlinear and varies widely within a wafer and also between different wafers. The uncertainty evaluation described here can be applied to other spectral interferometry applications based on similar principles.

Wafer-scale growth of highly textured piezoelectric thin films by pulsed laser deposition for micro-scale sensors and actuators

Science.gov (United States)

Nguyen, M. D.; Tiggelaar, R.; Aukes, T.; Rijnders, G.; Roelof, G.

2017-11-01

Piezoelectric lead-zirconate-titanate (PZT) thin films were deposited on 4-inch (111)Pt/Ti/SiO2/Si(001) wafers using large-area pulsed laser deposition (PLD). This study was focused on the homogeneity in film thickness, microstructure, ferroelectric and piezoelectric properties of PZT thin films. The results indicated that the highly textured (001)-oriented PZT thin films with wafer-scale thickness homogeneity (990 nm ± 0.8%) were obtained. The films were fabricated into piezoelectric cantilevers through a MEMS microfabrication process. The measured longitudinal piezoelectric coefficient (d 33f = 210 pm/V ± 1.6%) and piezoelectric transverse coefficient (e 31f = -18.8 C/m2 ± 2.8%) were high and homogeneity across wafers. The high piezoelectric properties on Si wafers will extend industrial application of PZT thin films and further development of piezoMEMS.

Destructive testing of transport packaging. Quality assurance applied to transport packaging in the USA

International Nuclear Information System (INIS)

Barker, R.F.

1976-01-01

This paper discusses several aspects of quality assurance as applied to packaging, including such requirements for an adequate quality assurance program as assignment of responsibilities, inspections, and audits. In certain cases, we have determined the margin of safety inherent in specific package designs. Testing of packaging to destruction, by subjecting it to conditions far beyond the present accident criteria, was carried out to establish the levels of impact, puncture, crush, and fire at which present designs would fail. A second area in which the Nuclear Regulatory Commission has applied quality assurance is qualification testing. The standards for testing prototypes require essentially no loss of contents under the specified accident test conditions. Qualifying a design with an acceptable degree of reliability by testing it at the specified stress levels with no measurable effect requires large numbers of samples to be tested. Testing the prototype under conditions well above the criteria is shown to offer one of the most effective means of demonstrating the adequacy of a design. Scenario tests, i.e., staged accidents or full-scale tests in which vehicles with samples of packages on board are crashed under specified conditions, in most cases present singular points on a curve. One-point tests in most cases will disprove a package design if it fails but may not confirm that a design will not fail. At the same time, much information and some public assurances can be obtained from such tests. (author)

The impact of packaging on product competition

Directory of Open Access Journals (Sweden)

Maryam Masoumi

2012-09-01

Full Text Available The primary objective of this paper is to detect important factors, which are influencing competitive advantage. The proposed model of this paper uses sampling technique to measure characteristics of society. There are eight independent variables for the proposed study of this paper including packaging endurance, easy distribution, customer promotion through packaging, packaging structure, packaging as silent advertiser, diversity of packaging, clean and healthy packaging and innovation in packaging. The proposed study uses structural equation modeling to either accept or reject all hypotheses associated with the proposed study of this paper. The population of this study includes all managers and experts who are involved in packaging products. We used simple sampling technique and chooses 300 from a population of 450 people who are considered as the population of this survey. Cronbach alpha was determined as 0.732, which is above the minimum acceptable level. The results confirm that all mentioned factors influence competitiveness, effectively.

Survey of waste package designs for disposal of high-level waste/spent fuel in selected foreign countries

International Nuclear Information System (INIS)

Schneider, K.J.; Lakey, L.T.; Silviera, D.J.

1989-09-01

This report presents the results of a survey of the waste package strategies for seven western countries with active nuclear power programs that are pursuing disposal of spent nuclear fuel or high-level wastes in deep geologic rock formations. Information, current as of January 1989, is given on the leading waste package concepts for Belgium, Canada, France, Federal Republic of Germany, Sweden, Switzerland, and the United Kingdom. All but two of the countries surveyed (France and the UK) have developed design concepts for their repositories, but none of the countries has developed its final waste repository or package concept. Waste package concepts are under study in all the countries surveyed, except the UK. Most of the countries have not yet developed a reference concept and are considering several concepts. Most of the information presented in this report is for the current reference or leading concepts. All canisters for the wastes are cylindrical, and are made of metal (stainless steel, mild steel, titanium, or copper). The canister concepts have relatively thin walls, except those for spent fuel in Sweden and Germany. Diagrams are presented for the reference or leading concepts for canisters for the countries surveyed. The expected lifetimes of the conceptual canisters in their respective disposal environment are typically 500 to 1,000 years, with Sweden's copper canister expected to last as long as one million years. Overpack containers that would contain the canisters are being considered in some of the countries. All of the countries surveyed, except one (Germany) are currently planning to utilize a buffer material (typically bentonite) surrounding the disposal package in the repository. Most of the countries surveyed plan to limit the maximum temperature in the buffer material to about 100 degree C. 52 refs., 9 figs

Safety Analysis Report - Packages, 9965, 9968, 9972-9975 Packages

International Nuclear Information System (INIS)

Blanton, P.

2000-01-01

This Safety Analysis Report for Packaging (SARP) documents the analysis and testing performed on four type B Packages: the 9972, 9973, 9974, and 9975 packages. Because all four packages have similar designs with very similar performance characteristics, all of them are presented in a single SARP. The performance evaluation presented in this SARP documents the compliance of the 9975 package with the regulatory safety requirements. Evaluations of the 9972, 9973, and 9974 packages support that of the 9975. To avoid confusion arising from the inclusion of four packages in a single document, the text segregates the data for each package in such a way that the reader interested in only one package can progress from Chapter 1 through Chapter 9. The directory at the beginning of each chapter identifies each section that should be read for a given package. Sections marked ''all'' are generic to all packages

Thermal analysis of NNWSI conceptual waste package designs

International Nuclear Information System (INIS)

Stein, W.; Hockman, J.N.; O'Neal, W.C.

1984-04-01

Lawrence Livermore National Laboratory is involved in the design and testing of high-level nuclear waste packages. Many of the aspects of waste package design and testing (e.g., corrosion and leaching) depend in part on the temperature history of the emplaced packages. This report discusses thermal modeling and analysis of various emplaced waste package conceptual designs including the models used, the assumptions and approximations made, and the results obtained. 16 references

Eutectic and solid-state wafer bonding of silicon with gold

International Nuclear Information System (INIS)

Abouie, Maryam; Liu, Qi; Ivey, Douglas G.

2012-01-01

Highlights: ► Eutectic and solid-state Au-Si bonding are compared for both a-Si and c-Si samples. ► Exchange of a-Si and Au layer was observed in both types of bonded samples. ► Use of c-Si for bonding resulted in formation of craters at the Au/c-Si interface. ► Solid-state Au-Si bonding produces better bonds in terms of microstructure. - Abstract: The simple Au-Si eutectic, which melts at 363 °C, can be used to bond Si wafers. However, faceted craters can form at the Au/Si interface as a result of anisotropic and non-uniform reaction between Au and crystalline silicon (c-Si). These craters may adversely affect active devices on the wafers. Two possible solutions to this problem were investigated in this study. One solution was to use an amorphous silicon layer (a-Si) that was deposited on the c-Si substrate to bond with the Au. The other solution was to use solid-state bonding instead of eutectic bonding, and the wafers were bonded at a temperature (350 °C) below the Au-Si eutectic temperature. The results showed that the a-Si layer prevented the formation of craters and solid-state bonding not only required a lower bonding temperature than eutectic bonding, but also prevented spill out of the solder resulting in strong bonds with high shear strength in comparison with eutectic bonding. Using amorphous silicon, the maximum shear strength for the solid-state Au-Si bond reached 15.2 MPa, whereas for the eutectic Au-Si bond it was 13.2 MPa.

Comparative study on the predictability of statistical models (RSM and ANN) on the behavior of optimized buccoadhesive wafers containing Loratadine and their in vivo assessment.

Science.gov (United States)

Chakraborty, Prithviraj; Parcha, Versha; Chakraborty, Debarupa D; Ghosh, Amitava

2016-01-01

Buccoadhesive wafer dosage form containing Loratadine is formulated utilizing Formulation by Design (FbD) approach incorporating sodium alginate and lactose monohydrate as independent variable employing solvent casting method. The wafers were statistically optimized using Response Surface Methodology (RSM) and Artificial Neural Network algorithm (ANN) for predicting physicochemical and physico-mechanical properties of the wafers as responses. Morphologically wafers were tested using SEM. Quick disintegration of the samples was examined employing Optical Contact Angle (OCA). The comparison of the predictability of RSM and ANN showed a high prognostic capacity of RSM model over ANN model in forecasting mechanical and physicochemical properties of the wafers. The in vivo assessment of the optimized buccoadhesive wafer exhibits marked increase in bioavailability justifying the administration of Loratadine through buccal route, bypassing hepatic first pass metabolism.

Automotive SOI-BCD Technology Using Bonded Wafers

International Nuclear Information System (INIS)

Himi, H.; Fujino, S.

2008-01-01

The SOI-BCD device is excelling in high temperature operation and noise immunity because the integrated elements can be electrically separated by dielectric isolation. We have promptly paid attention to this feature and have concentrated to develop SOI-BCD devices seeking to match the automotive requirement. In this paper, the feature technologies specialized for automotive SOI-BCD devices, such as buried N + layer for impurity gettering and noise shielding, LDMOS with improved ESD robustness, crystal defect-less process, and wafer direct bonding through the amorphous layer for intelligent power IC are introduced.

BSATOM - package of programs for calculating the energy levels and wave functions of helium-like systems taking into account isotope effects

International Nuclear Information System (INIS)

Abrashkevich, A.G.; Abrashkevich, D.G.; Vinitskij, S.I.; Puzynin, I.V.

1989-01-01

Description of package BCATOM for calculating the energy levels and wave functions of helium-like systems in the hyperspherical adiabatic approach taking into account the isotopic effects is given. The corresponding Sturm-Liouville problems are approximated by the difference method and the high order accuracy finite element method. The obtained generalized algebraic eigenvalue problems are solved by subspace iteration method. Possibilities of the package are demonstrated by calculating the ground state characteristics of a negative hydrogen ion. 33 refs.; 1 fig

Wiping frictional properties of electrospun hydrophobic/hydrophilic polyurethane nanofiber-webs on soda-lime glass and silicon-wafer.

Science.gov (United States)

Watanabe, Kei; Wei, Kai; Nakashima, Ryu; Kim, Ick Soo; Enomoto, Yuji

2013-04-01

In the present work, we conducted the frictional tests of hydrophobic and hydrophilic polyurethane (PUo and PUi) nanofiber webs against engineering materials; soda-lime glass and silicon wafer. PUi/glass combination, with highest hydrophilicity, showed the highest friction coefficient which decrease with the increase of the applied load. Furthermore, the effects of fluorine coating are also investigated. The friction coefficient of fluorine coated hydrophobic PU nanofiber (PUof) shows great decrease against the silicon wafer. Finally, wiping ability and friction property are investigated when the substrate surface is contaminated. Nano-particle dusts are effectively collected into the pores by wiping with PUo and PUi nanofiber webs both on glass and silicon wafer. The friction coefficient gradually increased with the increase of the applied load.

Investigation of the heating behavior of carbide-bonded graphene coated silicon wafer used for hot embossing

Science.gov (United States)

Yang, Gao; Li, Lihua; Lee, Wing Bun; Ng, Man Cheung; Chan, Chang Yuen

2018-03-01

A recently developed carbide-bonded graphene (CBG) coated silicon wafer was found to be an effective micro-patterned mold material for implementing rapid heating in hot embossing processes owing to its superior electrical and thermal conductivity, in addition to excellent mechanical properties. To facilitate the achievement of precision temperature control in the hot embossing, the heating behavior of a CBG coated silicon wafer sample was experimentally investigated. First, two groups of controlled experiments were conducted for quantitatively evaluating the influence of the main factors such as the vacuum pressure and gaseous environment (vacuum versus nitrogen) on its heating performance. The electrical and thermal responses of this sample under a voltage of 60 V were then intensively analyzed, and revealed that it had somewhat semi-conducting properties. Further, we compared its thermal profiles under different settings of the input voltage and current limiting threshold. Moreover, the strong temperature dependence of electrical resistance for this material was observed and determined. Ultimately, the surface temperature of CBG coated silicon wafer could be as high as 1300 ℃, but surprisingly the graphene coating did not detach from the substrate under such an elevated temperature due to its strong thermal coupling with the silicon wafer.

Pulse plating of Pt on n-GaAs (1 0 0) wafer surfaces: Synchrotron induced photoelectron spectroscopy and XPS of wet fabrication processes

International Nuclear Information System (INIS)

Ensling, D.; Hunger, R.; Kraft, D.; Mayer, Th.; Jaegermann, W.; Rodriguez-Girones, M.; Ichizli, V.; Hartnagel, H.L.

2003-01-01

Preparation steps of Pt/n-GaAs Schottky contacts as applied in the fabrication process of varactor diode arrays for THz applications are analysed by photoelectron spectroscopy. Pulsed cathodic deposition of Pt onto GaAs (1 0 0) wafer surfaces from acidic solution has been studied by core level photoelectron spectroscopy using different excitation energies. A laboratory AlKα source as well as synchrotron radiation of hν=130 and 645 eV at BESSY was used. Chemical analyses and semiquantitative estimates of layer thickness are given for the natural oxide of an untreated wafer surface, a surface conditioning NH 3 etching step, and stepwise pulse plating of Pt. The structural arrangement of the detected species and interface potentials are considered

Texturization of as-cut p-type monocrystalline silicon wafer using different wet chemical solutions

Science.gov (United States)

Hashmi, Galib; Hasanuzzaman, Muhammad; Basher, Mohammad Khairul; Hoq, Mahbubul; Rahman, Md. Habibur

2018-06-01

Implementing texturization process on the monocrystalline silicon substrate reduces reflection and enhances light absorption of the substrate. Thus texturization is one of the key elements to increase the efficiency of solar cell. Considering as-cut monocrystalline silicon wafer as base substrate, in this work different concentrations of Na2CO3 and NaHCO3 solution, KOH-IPA (isopropyl alcohol) solution and tetramethylammonium hydroxide solution with different time intervals have been investigated for texturization process. Furthermore, saw damage removal process was conducted with 10% NaOH solution, 20 wt% KOH-13.33 wt% IPA solution and HF/nitric/acetic acid solution. The surface morphology of saw damage, saw damage removed surface and textured wafer were observed using optical microscope and field emission scanning electron microscopy. Texturization causes pyramidal micro structures on the surface of (100) oriented monocrystalline silicon wafer. The height of the pyramid on the silicon surface varies from 1.5 to 3.2 µm and the inclined planes of the pyramids are acute angle. Contact angle value indicates that the textured wafer's surface fall in between near-hydrophobic to hydrophobic range. With respect to base material absolute reflectance 1.049-0.75% within 250-800 nm wavelength region, 0.1-0.026% has been achieved within the same wavelength region when textured with 0.76 wt% KOH-4 wt% IPA solution for 20 min. Furthermore, an alternative route of using 1 wt% Na2CO3-0.2 wt% NaHCO3 solution for 50 min has been exploited in the texturization process.

Voltage-assisted polymer wafer bonding

International Nuclear Information System (INIS)

Varsanik, J S; Bernstein, J J

2012-01-01

Polymer wafer bonding is a widely used process for fabrication of microfluidic devices. However, best practices for polymer bonds do not achieve sufficient bond strength for many applications. By applying a voltage to a polymer bond in a process called voltage-assisted bonding, bond strength is shown to improve dramatically for two polymers (Cytop™ and poly(methyl methacrylate)). Several experiments were performed to provide a starting point for further exploration of this technique. An optimal voltage range is experimentally observed with a reduction in bonding strength at higher voltages. Additionally, voltage-assisted bonding is shown to reduce void diameter due to bond defects. An electrostatic force model is proposed to explain the improved bond characteristics. This process can be used to improve bond strength for most polymers. (paper)

Containers for packaging of solid and intermediate level radioactive wastes

International Nuclear Information System (INIS)

1993-01-01

Low and intermediate level radioactive wastes are generated at all stages in the nuclear fuel cycle and also from the medical, industrial and research applications of radiation. These wastes can potentially present risks to health and the environment if they are not managed adequately. Their effective management will require the wastes to be safely stored, transported and ultimately disposed of. The waste container, which may be defined as any vessel, drum or box, made from metals, concrete, polymers or composite materials, in which the waste form is placed for interim storage, for transport and/or for final disposal, is an integral part of the whole package for the management of low and intermediate level wastes. It has key roles to play in several stages of the waste management process, starting from the storage of raw wastes and ending with the disposal of conditioned wastes. This report provides an overview of the various roles that a container may play and the factors that are important in each of these roles. This report has two main objectives. The first is to review the main requirements for the design of waste containers. The second is to provide advice on the design, fabrication and handling of different types of containers used in the management of low and intermediate level radioactive solid wastes. Recommendations for design and testing are given, based on the extensive experience available worldwide in waste management. This report is not intended to have any regulatory status or objectives. 56 refs, 16 figs, 10 tabs

Packaging configurations and handling requirements for nuclear materials

International Nuclear Information System (INIS)

Jefferson, R.M.

1981-01-01

The basic safety concepts for radioactive material are that the package is the primary protection for the public, that the protection afforded by the package should be proportional to the hazard and that the package must be proved by performance. These principles are contained in Department of Energy (DOE), Nuclear Regulatory Commission (NRC) and Department of Transportation (DOT) regulations which classify hazards of various radioactive materials and link packaging requirements to the physical form and quantities being shipped. Packaging requirements are reflected in performance standards to guarantee that shipments of low hazard quantities will survive the rigors of normal transportation and that shipments of high hazard quantities will survive extreme severity transportation accidents. Administrative controls provide for segregation of radioactive material from people and other sensitive or hazardous material. They also provide the necessary information function to control the total amounts in a conveyance and to assure that appropriate emergency response activities be started in case of accidents or other emergencies. Radioactive materials shipped in conjunction with the nuclear reactor programs include, ores, concentrates, gaseous diffusion feedstocks, enriched and depleted uranium, fresh fuel, spent fuel, high level wastes, low level wastes and transuranic wastes. Each material is packaged and shipped in accordance with regulations and all hazard classes, quantity limits and packaging types are called into use. From the minimal requirements needed to ship the low hazard uranium ores or concentrates to the very stringent requirements in packaging and moving high level wastes or spent fuel, the regulatory system provides a means for carrying out transportation of radioactive material which assures low and controlled risk to the public

Waste package characterisation

Energy Technology Data Exchange (ETDEWEB)

Sannen, L.; Bruggeman, M.; Wannijn, J.P

1998-09-01

Radioactive wastes originating from the hot labs of the Belgian Nuclear Research Centre SCK-CEN contain a wide variety of radiotoxic substances. The accurate characterisation of the short- and long-term radiotoxic components is extremely difficult but required in view of geological disposal. This paper describes the methodology which was developed and adopted to characterise the high- and medium-level waste packages at the SCK-CEN hot laboratories. The proposed method is based on the estimation of the fuel inventory evacuated in a particular waste package; a calculation of the relative fission product contribution on the fuel fabrication and irradiation footing; a comparison of the calculated, as expected, dose rate and the real measured dose rate of the waste package. To cope with the daily practice an appropriate fuel inventory estimation route, a user friendly computer programme for fission product and corresponding dose rate calculation, and a simple dose rate measurement method have been developed and implemented.

Waste package characterisation

International Nuclear Information System (INIS)

Sannen, L.; Bruggeman, M.; Wannijn, J.P.

1998-09-01

Radioactive wastes originating from the hot labs of the Belgian Nuclear Research Centre SCK-CEN contain a wide variety of radiotoxic substances. The accurate characterisation of the short- and long-term radiotoxic components is extremely difficult but required in view of geological disposal. This paper describes the methodology which was developed and adopted to characterise the high- and medium-level waste packages at the SCK-CEN hot laboratories. The proposed method is based on the estimation of the fuel inventory evacuated in a particular waste package; a calculation of the relative fission product contribution on the fuel fabrication and irradiation footing; a comparison of the calculated, as expected, dose rate and the real measured dose rate of the waste package. To cope with the daily practice an appropriate fuel inventory estimation route, a user friendly computer programme for fission product and corresponding dose rate calculation, and a simple dose rate measurement method have been developed and implemented

Conceptual waste package interim product specifications and data requirements for disposal of glass commercial high-level waste forms in salt geologic repositories

International Nuclear Information System (INIS)

1983-10-01

The conceptual waste package interim product specifications and data requirements presented are applicable to the reference glass composition described in PNL-3838 and carbon steel canister described in ONWI-438. They provide preliminary numerical values for the commercial high-level waste form parameters and properties identified in the waste form performance specification for geologic isolation in salt repositories. Subject areas treated include containment and isolation, operational period safety, criticality control, waste form/production canister identification, and waste package performance testing requirements. This document was generated for use in the development of conceptual waste package designs in salt. It will be revised as additional data, analyses and regulatory requirements become available. 13 references, 1 figure

Wafer-scale integration of piezoelectric actuation capabilities in nanoelectromechanical systems resonators

OpenAIRE

DEZEST, Denis; MATHIEU, Fabrice; MAZENQ, Laurent; SOYER, Caroline; COSTECALDE, Jean; REMIENS, Denis; THOMAS, Olivier; DEÜ, Jean-François; NICU, Liviu

2013-01-01

In this work, we demonstrate the integration of piezoelectric actuation means on arrays of nanocantilevers at the wafer scale. We use lead titanate zirconate (PZT) as piezoelectric material mainly because of its excellent actuation properties even when geometrically constrained at extreme scale

A facility for plastic deformation of germanium single-crystal wafers

DEFF Research Database (Denmark)

Lebech, B.; Theodor, K.; Breiting, B.

1998-01-01

. All movements and temperature changes are done by a robot via a PLC-control system. Two nine-crystal focusing monochromators (54 x 116 and 70 x 116 mm(2)) made from 100 wafers with average mosaicity similar to 13' have been constructed. Summaries of the test results are presented. (C) 1998 Elsevier...

An Improved Dispatching Method (a-HPDB for Automated Material Handling System with Active Rolling Belt for 450 mm Wafer Fabrication

Directory of Open Access Journals (Sweden)

Chia-Nan Wang

2017-07-01

Full Text Available The semiconductor industry is facing the transition from 300 mm to 450 mm wafer fabrication. Due to the increased size and weight, 450 mm wafers will pose unprecedented challenges on semiconductor wafer fabrication. To better handle and transport 450 mm wafers, an advanced Automated Material Handling System (AMHS is definitely required. Though conveyor-based AMHS is expected to be suitable for 450 mm wafer fabrication, still it faces two main problems, traffic-jam problem and lot-prioritization. To address the two problems, in this research we have proposed an improved dispatching method, termed Heuristic Preemptive Dispatching Method using Activated Roller Belt (a-HPDB. We have developed some effective rules for the a-HPDB based on Activated Roller Belt (ARB. In addition, we have conducted experiments to investigate its effectiveness. Compared with the HPDB and R-HPD, two dispatching rules proposed in previous studies, our experimental results showed the a-HPDB had a better performance in terms of average lot delivery time (ALDT. For hot lots and normal lots, the a-HPDB had advantages of 4.14% and 8.92% over the HPDB and advantages of 4.89% and 8.52% over R-HPD, respectively.

Comparison of slowness profiles of lamb wave with elastic moduli and crystal structure in single crystalline silicon wafers

Energy Technology Data Exchange (ETDEWEB)

Min, Young Jae; Yun, Gyeong Won; Kim, Kyung Min; Roh, Yuji; Kim, Young H. [Applied Acoustics Lab, Korea Science Academy of KAIST, Busan (Korea, Republic of)

2016-02-15

Single crystalline silicon wafers having (100), (110), and (111) directions are employed as specimens for obtaining slowness profiles. Leaky Lamb waves (LLW) from immersed wafers were detected by varying the incident angles of the specimens and rotating the specimens. From an analysis of LLW signals for different propagation directions and phase velocities of each specimen, slowness profiles were obtained, which showed a unique symmetry with different symmetric axes. Slowness profiles were compared with elastic moduli of each wafer. They showed the same symmetries as crystal structures. In addition, slowness profiles showed expected patterns and values that can be inferred from elastic moduli. This implies that slowness profiles can be used to examine crystal structures of anisotropic solids.

In-Package Chemistry Abstraction

Energy Technology Data Exchange (ETDEWEB)

E. Thomas

2004-11-09

This report was developed in accordance with the requirements in ''Technical Work Plan for: Regulatory Integration Modeling and Analysis of the Waste Form and Waste Package'' (BSC 2004 [DIRS 171583]). The purpose of the in-package chemistry model is to predict the bulk chemistry inside of a breached waste package and to provide simplified expressions of that chemistry as function of time after breach to Total Systems Performance Assessment for the License Application (TSPA-LA). The scope of this report is to describe the development and validation of the in-package chemistry model. The in-package model is a combination of two models, a batch reactor model that uses the EQ3/6 geochemistry-modeling tool, and a surface complexation model that is applied to the results of the batch reactor model. The batch reactor model considers chemical interactions of water with the waste package materials and the waste form for commercial spent nuclear fuel (CSNF) waste packages and codisposed waste packages that contain both high-level waste glass (HLWG) and DOE spent fuel. The surface complexation model includes the impact of fluid-surface interactions (i.e., surface complexation) on the resulting fluid composition. The model examines two types of water influx: (1) the condensation of water vapor that diffuses into the waste package, and (2) seepage water that enters the waste package from the drift as a liquid. (1) Vapor Influx Case: The condensation of vapor onto the waste package internals is simulated as pure H2O and enters at a rate determined by the water vapor pressure for representative temperature and relative humidity conditions. (2) Water Influx Case: The water entering a waste package from the drift is simulated as typical groundwater and enters at a rate determined by the amount of seepage available to flow through openings in a breached waste package. TSPA-LA uses the vapor influx case for the nominal scenario for simulations where the waste

In-Package Chemistry Abstraction

International Nuclear Information System (INIS)

E. Thomas

2004-01-01

This report was developed in accordance with the requirements in ''Technical Work Plan for: Regulatory Integration Modeling and Analysis of the Waste Form and Waste Package'' (BSC 2004 [DIRS 171583]). The purpose of the in-package chemistry model is to predict the bulk chemistry inside of a breached waste package and to provide simplified expressions of that chemistry as function of time after breach to Total Systems Performance Assessment for the License Application (TSPA-LA). The scope of this report is to describe the development and validation of the in-package chemistry model. The in-package model is a combination of two models, a batch reactor model that uses the EQ3/6 geochemistry-modeling tool, and a surface complexation model that is applied to the results of the batch reactor model. The batch reactor model considers chemical interactions of water with the waste package materials and the waste form for commercial spent nuclear fuel (CSNF) waste packages and codisposed waste packages that contain both high-level waste glass (HLWG) and DOE spent fuel. The surface complexation model includes the impact of fluid-surface interactions (i.e., surface complexation) on the resulting fluid composition. The model examines two types of water influx: (1) the condensation of water vapor that diffuses into the waste package, and (2) seepage water that enters the waste package from the drift as a liquid. (1) Vapor Influx Case: The condensation of vapor onto the waste package internals is simulated as pure H2O and enters at a rate determined by the water vapor pressure for representative temperature and relative humidity conditions. (2) Water Influx Case: The water entering a waste package from the drift is simulated as typical groundwater and enters at a rate determined by the amount of seepage available to flow through openings in a breached waste package. TSPA-LA uses the vapor influx case for the nominal scenario for simulations where the waste package has been

A full-wafer fabrication process for glass microfluidic chips with integrated electroplated electrodes by direct bonding of dry film resist

International Nuclear Information System (INIS)

Vulto, Paul; Urban, G A; Huesgen, Till; Albrecht, Björn

2009-01-01

A full-wafer process is presented for fast and simple fabrication of glass microfluidic chips with integrated electroplated electrodes. The process employs the permanent dry film resist (DFR) Ordyl SY300 to create microfluidic channels, followed by electroplating of silver and subsequent chlorination. The dry film resist is bonded directly to a second substrate, without intermediate gluing layers, only by applying pressure and moderate heating. The process of microfluidic channel fabrication, electroplating and wafer bonding can be completed within 1 day, thus making it one of the fastest and simplest full-wafer fabrication processes. (note)

Conceptual waste package interim product specifications and data requirements for disposal of borosilicate glass defense high-level waste forms in salt geologic repositories

International Nuclear Information System (INIS)

1983-06-01

The conceptual waste package interim product specifications and data requirements presented are applicable specifically to the normal borosilicate glass product of the Defense Waste Processing Facility (DWPF). They provide preliminary numerical values for the defense high-level waste form parameters and properties identified in the waste form performance specification for geologic isolation in salt repositories. Subject areas treated include containment and isolation, operational period safety, criticality control, waste form/production canister identification, and waste package performance testing requirements. This document was generated for use in the development of conceptual waste package designs in salt. It will be revised as additional data, analyses, and regulatory requirements become available

Integrated optical MEMS using through-wafer vias and bump-bonding.

Energy Technology Data Exchange (ETDEWEB)

McCormick, Frederick Bossert; Frederick, Scott K.

2008-01-01

This LDRD began as a three year program to integrate through-wafer vias, micro-mirrors and control electronics with high-voltage capability to yield a 64 by 64 array of individually controllable micro-mirrors on 125 or 250 micron pitch with piston, tip and tilt movement. The effort was a mix of R&D and application. Care was taken to create SUMMiT{trademark} (Sandia's ultraplanar, multilevel MEMS technology) compatible via and mirror processes, and the ultimate goal was to mate this MEMS fabrication product to a complementary metal-oxide semiconductor (CMOS) electronics substrate. Significant progress was made on the via and mirror fabrication and design, the attach process development as well as the electronics high voltage (30 volt) and control designs. After approximately 22 months, the program was ready to proceed with fabrication and integration of the electronics, final mirror array, and through wafer vias to create a high resolution OMEMS array with individual mirror electronic control. At this point, however, mission alignment and budget constraints reduced the last year program funding and redirected the program to help support the through-silicon via work in the Hyper-Temporal Sensors (HTS) Grand Challenge (GC) LDRD. Several months of investigation and discussion with the HTS team resulted in a revised plan for the remaining 10 months of the program. We planned to build a capability in finer-pitched via fabrication on thinned substrates along with metallization schemes and bonding techniques for very large arrays of high density interconnects (up to 2000 x 2000 vias). Through this program, Sandia was able to build capability in several different conductive through wafer via processes using internal and external resources, MEMS mirror design and fabrication, various bonding techniques for arrayed substrates, and arrayed electronics control design with high voltage capability.

Packaging Solutions : Delivering customer value through Logistical Packaging: A Case Study at Stora Enso Packaging

OpenAIRE

Shan, Kun; Julius, Joezer

2015-01-01

AbstractBackground;Despite of the significant role of packaging within logistics and supply chain management, packaging is infrequently studied as focal point in supply chain. Most of the previous logistics research studies tend to explain the integration between packaging and logistics through logistical packaging. In very rare cases, the studies mentioned about customer value. Therefore the major disadvantage of these studies is that, they didn’t consider logistical packaging and customer v...

Engineered waste-package-system design specification

International Nuclear Information System (INIS)

1983-05-01

This report documents the waste package performance requirements and geologic and waste form data bases used in developing the conceptual designs for waste packages for salt, tuff, and basalt geologies. The data base reflects the latest geotechnical information on the geologic media of interest. The parameters or characteristics specified primarily cover spent fuel, defense high-level waste, and commercial high-level waste forms. The specification documents the direction taken during the conceptual design activity. A separate design specification will be developed prior to the start of the preliminary design activity

Characterization and control of wafer charging effects during high-current ion implantation

International Nuclear Information System (INIS)

Current, M.I.; Lukaszek, W.; Dixon, W.; Vella, M.C.; Messick, C.; Shideler, J.; Reno, S.

1994-02-01

EEPROM-based sense and memory devices provide direct measures of the charge flow and potentials occurring on the surface of wafers during ion beam processing. Sensor design and applications for high current ion implantation are discussed

Influence of the Molecular Adhesion Force on the Indentation Depth of a Particle into the Wafer Surface in the CMP Process

Directory of Open Access Journals (Sweden)

Zhou Jianhua

2014-01-01

Full Text Available By theoretical calculation, the external force on the particle conveyed by pad asperities and the molecular adhesion force between particle and wafer are compared and analyzed quantitatively. It is confirmed that the molecular adhesion force between particle and wafer has a great influence on the chemical mechanical polishing (CMP material removal process. Considering the molecular adhesion force between particle and wafer, a more precise model for the indentation of a particle into the wafer surface is developed in this paper, and the new model is compared with the former model which neglected the molecular adhesion force. Through theoretical analyses, an approach and corresponding critical values are applied to estimate whether the molecular adhesion force in CMP can be neglected. These methods can improve the precision of the material removal model of CMP.

Regulatory and extra-regulatory testing to demonstrate radioactive material packaging safety

International Nuclear Information System (INIS)

Ammerman, D.J.

1997-01-01

Packages for the transportation of radioactive material must meet performance criteria to assure safety and environmental protection. The stringency of the performance criteria is based on the degree of hazard of the material being transported. Type B packages are used for transporting large quantities of radioisotopes (in terms of A 2 quantities). These packages have the most stringent performance criteria. Material with less than an A 2 quantity are transported in Type A packages. These packages have less stringent performance criteria. Transportation of LSA and SCO materials must be in open-quotes strong-tightclose quotes packages. The performance requirements for the latter packages are even less stringent. All of these package types provide a high level of safety for the material being transported. In this paper, regulatory tests that are used to demonstrate this safety will be described. The responses of various packages to these tests will be shown. In addition, the response of packages to extra-regulatory tests will be discussed. The results of these tests will be used to demonstrate the high level of safety provided to workers, the public, and the environment by packages used for the transportation of radioactive material

Data package for the Low-Level Waste Disposal Development and Demonstration Program environmental impact statement: Volume 1, Sections 1--7 and Appendices A--D

Energy Technology Data Exchange (ETDEWEB)

Ketelle, R.H.

1988-09-01

This data package is required to support an Environmental Impact Statement (EIS) to be written to evaluate the effects of future disposal of low-level waste at four sites on the Oak Ridge Reservation. Current waste disposal facilities are exceeding their capacities and increasingly stringent disposal requirements dictate the need for the sites and new waste disposal technologies. The Low-Level Waste Disposal Development and Demonstration Program has developed a strategy for low-level waste disposal built around a dose based approach. This approach emphasizes contamination pathways, including surface and groundwater and ALARA conditions for workers. This strategy dictates the types of data needed for this data package. The data package provides information on geology, soils, groundwater, surface water, and ecological characterization of the Oak Ridge Reservation in order to evaluate alternative technologies and alternative sites. The results of the investigations and data collections indicate that different technologies will probably have to be used at different sites. This conclusion, however, depends on the findings of the Environmental Impact Statement. 14 figs., 19 tabs.

Radiation imaging detectors made by wafer post-processing of CMOS chips

NARCIS (Netherlands)

Blanco Carballo, V.M.

2009-01-01

In this thesis several wafer post-processing steps have been applied to CMOS chips. Amplification gas strucutures are built on top of the microchips. A complete radiation imaging detector is obtained this way. Integrated Micromegas-like and GEM-like structures were fabricated on top of Timepix CMOS

Wafer bowing control of free-standing heteroepitaxial diamond (100) films grown on Ir(100) substrates via patterned nucleation growth