WorldWideScience

Sample records for wafer level packaging

  1. VLED for Si wafer-level packaging

    Science.gov (United States)

    Chu, Chen-Fu; Chen, Chiming; Yen, Jui-Kang; Chen, Yung-Wei; Tsou, Chingfu; Chang, Chunming; Doan, Trung; Tran, Chuong Anh

    2012-03-01

    In this paper, we introduced the advantages of Vertical Light emitting diode (VLED) on copper alloy with Si-wafer level packaging technologies. The silicon-based packaging substrate starts with a dou-ble-side polished p-type silicon wafer, then anisotropic wet etching technology is done to construct the re-flector depression and micro through-holes on the silicon substrate. The operating voltage, at a typical cur-rent of 350 milli-ampere (mA), is 3.2V. The operation voltage is less than 3.7V under higher current driving conditions of 1A. The VLED chip on Si package has excellent heat dissipation and can be operated at high currents up to 1A without efficiency degradation. The typical spatial radiation pattern emits a uniform light lambertian distribution from -65° to 65° which can be easily fit for secondary optics. The correlated color temperature (CCT) has only 5% variation for daylight and less than 2% variation for warm white, when the junction temperature is increased from 25°C to 110°C, suggesting a stable CCT during operation for general lighting application. Coupled with aspheric lens and micro lens array in a wafer level process, it has almost the same light distribution intensity for special secondary optics lighting applications. In addition, the ul-tra-violet (UV) VLED, featuring a silicon substrate and hard glass cover, manufactured by wafer level pack-aging emits high power UV wavelengths appropriate for curing, currency, document verification, tanning, medical, and sterilization applications.

  2. Wafer-Level Vacuum Packaging of Smart Sensors

    Directory of Open Access Journals (Sweden)

    Allan Hilton

    2016-10-01

    Full Text Available The reach and impact of the Internet of Things will depend on the availability of low-cost, smart sensors—“low cost” for ubiquitous presence, and “smart” for connectivity and autonomy. By using wafer-level processes not only for the smart sensor fabrication and integration, but also for packaging, we can further greatly reduce the cost of sensor components and systems as well as further decrease their size and weight. This paper reviews the state-of-the-art in the wafer-level vacuum packaging technology of smart sensors. We describe the processes needed to create the wafer-scale vacuum microchambers, focusing on approaches that involve metal seals and that are compatible with the thermal budget of complementary metal-oxide semiconductor (CMOS integrated circuits. We review choices of seal materials and structures that are available to a device designer, and present techniques used for the fabrication of metal seals on device and window wafers. We also analyze the deposition and activation of thin film getters needed to maintain vacuum in the ultra-small chambers, and the wafer-to-wafer bonding processes that form the hermetic seal. We discuss inherent trade-offs and challenges of each seal material set and the corresponding bonding processes. Finally, we identify areas for further research that could help broaden implementations of the wafer-level vacuum packaging technology.

  3. Wafer-level packaged RF-MEMS switches fabricated in a CMOS fab

    NARCIS (Netherlands)

    Tilmans, H.A.C.; Ziad, H.; Jansen, Henricus V.; Di Monaco, O.; Jourdain, A.; De Raedt, W.; Rottenberg, X.; De Backer, E.; Decoussernaeker, A.; Baert, K.

    2001-01-01

    Reports on wafer-level packaged RF-MEMS switches fabricated in a commercial CMOS fab. Switch fabrication is based on a metal surface micromachining process. A novel wafer-level packaging scheme is developed, whereby the switches are housed in on-chip sealed cavities using benzocyclobutene (BCB) as

  4. Development of low-temperature wafer level vacuum packaging for microsensors

    Science.gov (United States)

    Huang, Wei-Feng; Shie, Jin-Shown; Lee, Cheng-Kuo; Gong, Shih C.; Peng, Cheng-Jien

    1999-10-01

    Wafer level packaging received lots of attention in microsystems recently. Because it shows the potential to reduce the packaging can be increased. However, there is a limitation of commercialized wafer bonding technology, i.e., the high process temperature, such as 1000 degrees C of silicon fusion bonding, and 450 degrees C of anodic bonding.A novel low temperature wafer bonding with process temperature lower than 160 degrees C is proposed, it applies the In-Sn alloy to form the interface of wafer bonding. The experiment results show helium leak test of 6 X 10-9 torr-liter/sec, and a tensile strength as high as 200kg/cm2. Reliability test after 1500 temperature cycles between -10 to 80 degrees C also shows no trace of degradation compared to the initial quality of the samples. This low temperature soldering process demonstrates its promising potential at the wafer level packaging in industrial production.

  5. Output blue light evaluation for phosphor based smart white LED wafer level packages

    NARCIS (Netherlands)

    Kolahdouz Esfahani, Z.; Rostamian, Ali; Kolahdouz, Mohammadreza; Ma, Teng; van Zeijl, H.W.; Zhang, G.Q.

    2016-01-01

    This study presents a blue light detector for evaluating the output light of phosphor based white LED package. It is composed of a silicon stripe-shaped photodiode designed and implemented in a 2 μm BiCMOS process which can be used for wafer level integration of different passive and active devices

  6. Novel SU-8 based vacuum wafer-level packaging for MEMS devices

    DEFF Research Database (Denmark)

    Murillo, Gonzalo; Davis, Zachary James; Keller, Stephan Urs

    2010-01-01

    This work presents a simple and low-cost SU-8 based wafer-level vacuum packaging method which is CMOS and MEMS compatible. Different approaches have been investigated by taking advantage of the properties of SU-8, such as chemical resistance, optical transparence, mechanical reliability...... and versatility. A novel technique of wafer level adhesive bonding, which uses SU-8 as structural and adhesive material, has been developed and successfully demonstrated. Optical inspection and SEM images were used in order to measure the package lid bending and probe the encapsulation sealing. In addition......, an indirect vacuum level measurement has been carried out by comparing the different quality factors of a test cantilever resonator when this element is packed or unpacked....

  7. Wafer-level packaging with compression-controlled seal ring bonding

    Science.gov (United States)

    Farino, Anthony J

    2013-11-05

    A device may be provided in a sealed package by aligning a seal ring provided on a first surface of a first semiconductor wafer in opposing relationship with a seal ring that is provided on a second surface of a second semiconductor wafer and surrounds a portion of the second wafer that contains the device. Forcible movement of the first and second wafer surfaces toward one another compresses the first and second seal rings against one another. A physical barrier against the movement, other than the first and second seal rings, is provided between the first and second wafer surfaces.

  8. Wafer-level chip-scale packaging analog and power semiconductor applications

    CERN Document Server

    Qu, Shichun

    2015-01-01

    This book presents a state-of-art and in-depth overview in analog and power WLCSP design, material characterization, reliability, and modeling. Recent advances in analog and power electronic WLCSP packaging are presented based on the development of analog technology and power device integration. The book covers in detail how advances in semiconductor content, analog and power advanced WLCSP design, assembly, materials, and reliability have co-enabled significant advances in fan-in and fan-out with redistributed layer (RDL) of analog and power device capability during recent years. Along with new analog and power WLCSP development, the role of modeling is a key to assure successful package design. An overview of the analog and power WLCSP modeling and typical thermal, electrical, and stress modeling methodologies is also provided. This book also: ·         Covers the development of wafer-level power discrete packaging with regular wafer-level design concepts and directly bumping technology ·    �...

  9. A Lateral Differential Resonant Pressure Microsensor Based on SOI-Glass Wafer-Level Vacuum Packaging.

    Science.gov (United States)

    Xie, Bo; Xing, Yonghao; Wang, Yanshuang; Chen, Jian; Chen, Deyong; Wang, Junbo

    2015-09-21

    This paper presents the fabrication and characterization of a resonant pressure microsensor based on SOI-glass wafer-level vacuum packaging. The SOI-based pressure microsensor consists of a pressure-sensitive diaphragm at the handle layer and two lateral resonators (electrostatic excitation and capacitive detection) on the device layer as a differential setup. The resonators were vacuum packaged with a glass cap using anodic bonding and the wire interconnection was realized using a mask-free electrochemical etching approach by selectively patterning an Au film on highly topographic surfaces. The fabricated resonant pressure microsensor with dual resonators was characterized in a systematic manner, producing a quality factor higher than 10,000 (~6 months), a sensitivity of about 166 Hz/kPa and a reduced nonlinear error of 0.033% F.S. Based on the differential output, the sensitivity was increased to two times and the temperature-caused frequency drift was decreased to 25%.

  10. Sputtered Encapsulation as Wafer Level Packaging for Isolatable MEMS Devices: A Technique Demonstrated on a Capacitive Accelerometer.

    Science.gov (United States)

    Hamzah, Azrul Azlan; Yunas, Jumril; Majlis, Burhanuddin Yeop; Ahmad, Ibrahim

    2008-11-19

    This paper discusses sputtered silicon encapsulation as a wafer level packaging approach for isolatable MEMS devices. Devices such as accelerometers, RF switches, inductors, and filters that do not require interaction with the surroundings to function, could thus be fully encapsulated at the wafer level after fabrication. A MEMSTech 50g capacitive accelerometer was used to demonstrate a sputtered encapsulation technique. Encapsulation with a very uniform surface profile was achieved using spin-on glass (SOG) as a sacrificial layer, SU-8 as base layer, RF sputtered silicon as main structural layer, eutectic gold-silicon as seal layer, and liquid crystal polymer (LCP) as outer encapsulant layer. SEM inspection and capacitance test indicated that the movable elements were released after encapsulation. Nanoindentation test confirmed that the encapsulated device is sufficiently robust to withstand a transfer molding process. Thus, an encapsulation technique that is robust, CMOS compatible, and economical has been successfully developed for packaging isolatable MEMS devices at the wafer level.

  11. Utilizing an Adaptive Grey Model for Short-Term Time Series Forecasting: A Case Study of Wafer-Level Packaging

    Directory of Open Access Journals (Sweden)

    Che-Jung Chang

    2013-01-01

    Full Text Available The wafer-level packaging process is an important technology used in semiconductor manufacturing, and how to effectively control this manufacturing system is thus an important issue for packaging firms. One way to aid in this process is to use a forecasting tool. However, the number of observations collected in the early stages of this process is usually too few to use with traditional forecasting techniques, and thus inaccurate results are obtained. One potential solution to this problem is the use of grey system theory, with its feature of small dataset modeling. This study thus uses the AGM(1,1 grey model to solve the problem of forecasting in the pilot run stage of the packaging process. The experimental results show that the grey approach is an appropriate and effective forecasting tool for use with small datasets and that it can be applied to improve the wafer-level packaging process.

  12. Wafer-level micro-optics: trends in manufacturing, testing, packaging, and applications

    Science.gov (United States)

    Voelkel, Reinhard; Gong, Li; Rieck, Juergen; Zheng, Alan

    2012-11-01

    Micro-optics is an indispensable key enabling technology (KET) for many products and applications today. Probably the most prestigious examples are the diffractive light shaping elements used in high-end DUV lithography steppers. Highly efficient refractive and diffractive micro-optical elements are used for precise beam and pupil shaping. Micro-optics had a major impact on the reduction of aberrations and diffraction effects in projection lithography, allowing a resolution enhancement from 250 nm to 45 nm within the last decade. Micro-optics also plays a decisive role in medical devices (endoscopes, ophthalmology), in all laser-based devices and fiber communication networks (supercomputer, ROADM), bringing high-speed internet to our homes (FTTH). Even our modern smart phones contain a variety of micro-optical elements. For example, LED flashlight shaping elements, the secondary camera, and ambient light and proximity sensors. Wherever light is involved, micro-optics offers the chance to further miniaturize a device, to improve its performance, or to reduce manufacturing and packaging costs. Wafer-scale micro-optics fabrication is based on technology established by semiconductor industry. Thousands of components are fabricated in parallel on a wafer. We report on the state of the art in wafer-based manufacturing, testing, packaging and present examples and applications for micro-optical components and systems.

  13. Residual stress in silicon caused by Cu-Sn wafer-level packaging

    NARCIS (Netherlands)

    Taklo, M.M.V.; Vardøy, A.S.; Wolf, I. de; Simons, V.; Wiel, H.J. van de; Waal, A. van der; Lapadatu, A.; Martinsen, S.; Wunderle, B.

    2013-01-01

    The level of stress in silicon as a result of applying Cu-Sn SLID wafer level bonding to hermetically encapsulate a highperformance infrared bolometer device was studied. Transistors are present in the read out integrated circuit (ROIC) of the device and some are located below the bond frame. Test

  14. Through-glass copper via using the glass reflow and seedless electroplating processes for wafer-level RF MEMS packaging

    Science.gov (United States)

    Lee, Ju-Yong; Lee, Sung-Woo; Lee, Seung-Ki; Park, Jae-Hyoung

    2013-08-01

    We present a novel method for the fabrication of void-free copper-filled through-glass-vias (TGVs), and their application to the wafer-level radio frequency microelectromechanical systems (RF MEMS) packaging scheme. By using the glass reflow process with a patterned silicon mold, a vertical TGV with smooth sidewall and fine pitch could be achieved. Bottom-up void-free filling of the TGV is successfully demonstrated through the seedless copper electroplating process. In addition, the proposed process allows wafer-level packaging with glass cap encapsulation using the anodic bonding process, since the reflowed glass interposer is only formed in the device area surrounded with silicon substrate. A simple coplanar waveguide (CPW) line was employed as the packaged device to evaluate the electrical characteristics and thermo-mechanical reliability of the proposed packaging structure. The fabricated packaging structure showed a low insertion loss of 0.116 dB and a high return loss of 35.537 dB at 20 GHz, which were measured through the whole electrical path, including the CPW line, TGVs and contact pads. An insertion loss lower than 0.1 dB and a return loss higher than 30 dB could be achieved at frequencies of up to 15 GHz, and the resistance of the single copper via was measured to be 36 mΩ. Furthermore, the thermo-mechanical reliability of the proposed packaging structure was also verified through thermal shock and pressure cooker test.

  15. Sputtered Encapsulation as Wafer Level Packaging for Isolatable MEMS Devices: A Technique Demonstrated on a Capacitive Accelerometer

    Directory of Open Access Journals (Sweden)

    Azrul Azlan Hamzah

    2008-11-01

    Full Text Available This paper discusses sputtered silicon encapsulation as a wafer level packaging approach for isolatable MEMS devices. Devices such as accelerometers, RF switches, inductors, and filters that do not require interaction with the surroundings to function, could thus be fully encapsulated at the wafer level after fabrication. A MEMSTech 50g capacitive accelerometer was used to demonstrate a sputtered encapsulation technique. Encapsulation with a very uniform surface profile was achieved using spin-on glass (SOG as a sacrificial layer, SU-8 as base layer, RF sputtered silicon as main structural layer, eutectic gold-silicon as seal layer, and liquid crystal polymer (LCP as outer encapsulant layer. SEM inspection and capacitance test indicated that the movable elements were released after encapsulation. Nanoindentation test confirmed that the encapsulated device is sufficiently robust to withstand a transfer molding process. Thus, an encapsulation technique that is robust, CMOS compatible, and economical has been successfully developed for packaging isolatable MEMS devices at the wafer level.

  16. Very large scale heterogeneous integration (VLSHI) and wafer-level vacuum packaging for infrared bolometer focal plane arrays

    Science.gov (United States)

    Forsberg, Fredrik; Roxhed, Niclas; Fischer, Andreas C.; Samel, Björn; Ericsson, Per; Hoivik, Nils; Lapadatu, Adriana; Bring, Martin; Kittilsland, Gjermund; Stemme, Göran; Niklaus, Frank

    2013-09-01

    Imaging in the long wavelength infrared (LWIR) range from 8 to 14 μm is an extremely useful tool for non-contact measurement and imaging of temperature in many industrial, automotive and security applications. However, the cost of the infrared (IR) imaging components has to be significantly reduced to make IR imaging a viable technology for many cost-sensitive applications. This paper demonstrates new and improved fabrication and packaging technologies for next-generation IR imaging detectors based on uncooled IR bolometer focal plane arrays. The proposed technologies include very large scale heterogeneous integration for combining high-performance, SiGe quantum-well bolometers with electronic integrated read-out circuits and CMOS compatible wafer-level vacuum packing. The fabrication and characterization of bolometers with a pitch of 25 μm × 25 μm that are arranged on read-out-wafers in arrays with 320 × 240 pixels are presented. The bolometers contain a multi-layer quantum well SiGe thermistor with a temperature coefficient of resistance of -3.0%/K. The proposed CMOS compatible wafer-level vacuum packaging technology uses Cu-Sn solid-liquid interdiffusion (SLID) bonding. The presented technologies are suitable for implementation in cost-efficient fabless business models with the potential to bring about the cost reduction needed to enable low-cost IR imaging products for industrial, security and automotive applications.

  17. MEMS packaging with etching and thinning of lid wafer to form lids and expose device wafer bond pads

    Science.gov (United States)

    Chanchani, Rajen; Nordquist, Christopher; Olsson, Roy H; Peterson, Tracy C; Shul, Randy J; Ahlers, Catalina; Plut, Thomas A; Patrizi, Gary A

    2013-12-03

    In wafer-level packaging of microelectromechanical (MEMS) devices a lid wafer is bonded to a MEMS wafer in a predermined aligned relationship. Portions of the lid wafer are removed to separate the lid wafer into lid portions that respectively correspond in alignment with MEMS devices on the MEMS wafer, and to expose areas of the MEMS wafer that respectively contain sets of bond pads respectively coupled to the MEMS devices.

  18. Hybrid Wafer-Level Packaging for RF-MEMS and Optoelectronic Applications

    NARCIS (Netherlands)

    Tian, J.

    2013-01-01

    The current trend in electronic packaging research is to integrate more functions into one package, reduce electrical path parasitic, and increase the heat conduction in order to make the final packaged system smaller, more reliable, more functional and more complete, while keeping the packaging

  19. Wafer-Level Hermetic Package by Low-Temperature Cu/Sn TLP Bonding with Optimized Sn Thickness

    Science.gov (United States)

    Wu, Zijian; Cai, Jian; Wang, Qian; Wang, Junqiang; Wang, Dejun

    2017-10-01

    In this paper, a wafer-level package with hermetic sealing by low-temperature Cu/Sn transient liquid phase (TLP) bonding for a micro-electromechanical system was introduced. A Cu bump with a Sn cap and sealing ring were fabricated simultaneously by electroplating. The model of Cu/Sn TLP bonding was established and the thicknesses of Cu and Sn were optimized after a series of bonding experiments. Cu/Sn wafer-level bonding was undertaken at 260°C for 30 min under a vacuum condition. An average shear strength of 50.36 MPa and a fine leak rate of 1.9 × 10-8 atm cc/s were achieved. Scanning electron microscope photos of the Cu/Sn/Cu interlayers were presented, and energy dispersive x-ray analysis was conducted simultaneously. The results showed that the Sn was completely consumed to form the stable intermetallic compound Cu3Sn. An aging test of 200 h at 200°C was conducted to test the performance of the hermetic sealing, while the results of shear strength, fine leak rate and bonding interface were also set out.

  20. Effects of wafer-level packaging on millimetre-wave antennas

    KAUST Repository

    Abutarboush, Hattan

    2011-11-01

    A cost-effective antenna package suitable for mass production mm-wave applications is investigated. Different packaging material that can be possibly used in mm-wave antennas are presented and compared. Moreover, this study investigates different methods of packaging millimetre-wave (60 GHz) MEMS antennas. The paper first introduces the custom needs for optimum operation of the MEMS antenna and then examines the current available enabling technologies for packaging. The sensitivity of the antenna\\'s reflection coefficient, gain and radiation efficiency to the packaging environment is investigated through EM simulations. © 2011 IEEE.

  1. High-Q Wafer Level Package Based on Modified Tri-Layer Anodic Bonding and High Performance Getter and Its Evaluation for Micro Resonant Pressure Sensor

    National Research Council Canada - National Science Library

    Liying Wang; Xiaohui Du; Lingyun Wang; Zhanhao Xu; Chenying Zhang; Dandan Gu

    2017-01-01

    In order to achieve and maintain a high quality factor (high-Q) for the micro resonant pressure sensor, this paper presents a new wafer level package by adopting cross-layer anodic bonding technique of the glass/silicon/silica (GSS...

  2. Robust Wafer-Level Thin-Film Encapsulation (Packaging) of Microstructures (MEMS) using Low Stress PECVD Silicon Carbide

    NARCIS (Netherlands)

    Rajaraman, V.; Pakula, L.S.; Pham, H.T.M.; Sarro, P.M.; French, P.J.

    2009-01-01

    This paper presents a new low-cost, CMOS-compatible and robust wafer-level encapsulation technique developed using a stress-optimised PECVD SiC as the capping and sealing material, imparting harsh environment capability. This technique has been applied for the fabrication and encapsulation of a wide

  3. A High-Q Resonant Pressure Microsensor with Through-Glass Electrical Interconnections Based on Wafer-Level MEMS Vacuum Packaging

    Directory of Open Access Journals (Sweden)

    Zhenyu Luo

    2014-12-01

    Full Text Available This paper presents a high-Q resonant pressure microsensor with through-glass electrical interconnections based on wafer-level MEMS vacuum packaging. An approach to maintaining high-vacuum conditions by integrating the MEMS fabrication process with getter material preparation is presented in this paper. In this device, the pressure under measurement causes a deflection of a pressure-sensitive silicon square diaphragm, which is further translated to stress build up in “H” type doubly-clamped micro resonant beams, leading to a resonance frequency shift. The device geometries were optimized using FEM simulation and a 4-inch SOI wafer was used for device fabrication, which required only three photolithographic steps. In the device fabrication, a non-evaporable metal thin film as the getter material was sputtered on a Pyrex 7740 glass wafer, which was then anodically bonded to the patterned SOI wafer for vacuum packaging. Through-glass via holes predefined in the glass wafer functioned as the electrical interconnections between the patterned SOI wafer and the surrounding electrical components. Experimental results recorded that the Q-factor of the resonant beam was beyond 22,000, with a differential sensitivity of 89.86 Hz/kPa, a device resolution of 10 Pa and a nonlinearity of 0.02% F.S with the pressure varying from 50 kPa to 100 kPa. In addition, the temperature drift coefficient was less than −0.01% F.S/°C in the range of −40 °C to 70 °C, the long-term stability error was quantified as 0.01% F.S over a 5-month period and the accuracy of the microsensor was better than 0.01% F.S.

  4. Wafer level 3-D ICs process technology

    CERN Document Server

    Tan, Chuan Seng; Reif, L Rafael

    2009-01-01

    This book focuses on foundry-based process technology that enables the fabrication of 3-D ICs. The core of the book discusses the technology platform for pre-packaging wafer lever 3-D ICs. However, this book does not include a detailed discussion of 3-D ICs design and 3-D packaging. This is an edited book based on chapters contributed by various experts in the field of wafer-level 3-D ICs process technology. They are from academia, research labs and industry.

  5. High-Q Wafer Level Package Based on Modified Tri-Layer Anodic Bonding and High Performance Getter and Its Evaluation for Micro Resonant Pressure Sensor

    Directory of Open Access Journals (Sweden)

    Liying Wang

    2017-03-01

    Full Text Available In order to achieve and maintain a high quality factor (high-Q for the micro resonant pressure sensor, this paper presents a new wafer level package by adopting cross-layer anodic bonding technique of the glass/silicon/silica (GSS stackable structure and integrated Ti getter. A double-layer structure similar to a silicon-on-insulator (SOI wafer is formed after the resonant layer and the pressure-sensitive layer are bonded by silicon direct bonding (SDB. In order to form good bonding quality between the pressure-sensitive layer and the glass cap layer, the cross-layer anodic bonding technique is proposed for vacuum package by sputtering Aluminum (Al on the combination wafer of the pressure-sensitive layer and the resonant layer to achieve electrical interconnection. The model and the bonding effect of this technique are discussed. In addition, in order to enhance the performance of titanium (Ti getter, the prepared and activation parameters of Ti getter under different sputtering conditions are optimized and discussed. Based on the optimized results, the Ti getter (thickness of 300 nm to 500 nm is also deposited on the inside of the glass groove by magnetron sputtering to maintain stable quality factor (Q. The Q test of the built testing system shows that the number of resonators with a Q value of more than 10,000 accounts for more than 73% of the total. With an interval of 1.5 years, the Q value of the samples remains almost constant. It proves the proposed cross-layer anodic bonding and getter technique can realize high-Q resonant structure for long-term stable operation.

  6. Co-Design Method and Wafer-Level Packaging Technique of Thin-Film Flexible Antenna and Silicon CMOS Rectifier Chips for Wireless-Powered Neural Interface Systems.

    Science.gov (United States)

    Okabe, Kenji; Jeewan, Horagodage Prabhath; Yamagiwa, Shota; Kawano, Takeshi; Ishida, Makoto; Akita, Ippei

    2015-12-16

    In this paper, a co-design method and a wafer-level packaging technique of a flexible antenna and a CMOS rectifier chip for use in a small-sized implantable system on the brain surface are proposed. The proposed co-design method optimizes the system architecture, and can help avoid the use of external matching components, resulting in the realization of a small-size system. In addition, the technique employed to assemble a silicon large-scale integration (LSI) chip on the very thin parylene film (5 μm) enables the integration of the rectifier circuits and the flexible antenna (rectenna). In the demonstration of wireless power transmission (WPT), the fabricated flexible rectenna achieved a maximum efficiency of 0.497% with a distance of 3 cm between antennas. In addition, WPT with radio waves allows a misalignment of 185% against antenna size, implying that the misalignment has a less effect on the WPT characteristics compared with electromagnetic induction.

  7. Co-Design Method and Wafer-Level Packaging Technique of Thin-Film Flexible Antenna and Silicon CMOS Rectifier Chips for Wireless-Powered Neural Interface Systems

    Directory of Open Access Journals (Sweden)

    Kenji Okabe

    2015-12-01

    Full Text Available In this paper, a co-design method and a wafer-level packaging technique of a flexible antenna and a CMOS rectifier chip for use in a small-sized implantable system on the brain surface are proposed. The proposed co-design method optimizes the system architecture, and can help avoid the use of external matching components, resulting in the realization of a small-size system. In addition, the technique employed to assemble a silicon large-scale integration (LSI chip on the very thin parylene film (5 μm enables the integration of the rectifier circuits and the flexible antenna (rectenna. In the demonstration of wireless power transmission (WPT, the fabricated flexible rectenna achieved a maximum efficiency of 0.497% with a distance of 3 cm between antennas. In addition, WPT with radio waves allows a misalignment of 185% against antenna size, implying that the misalignment has a less effect on the WPT characteristics compared with electromagnetic induction.

  8. Feature extraction of the wafer probe marks in IC packaging

    Science.gov (United States)

    Tsai, Cheng-Yu; Lin, Chia-Te; Kao, Chen-Ting; Wang, Chau-Shing

    2017-12-01

    This paper presents an image processing approach to extract six features of the probe mark on semiconductor wafer pads. The electrical characteristics of the chip pad must be tested using a probing needle before wire-bonding to the wafer. However, this test leaves probe marks on the pad. A large probe mark area results in poor adhesion forces at the bond ball of the pad, thus leading to undesirable products. In this paper, we present a method to extract six features of the wafer probe marks in IC packaging for further digital image processing.

  9. Cost-Efficient Wafer-Level Capping for MEMS and Imaging Sensors by Adhesive Wafer Bonding

    Directory of Open Access Journals (Sweden)

    Simon J. Bleiker

    2016-10-01

    Full Text Available Device encapsulation and packaging often constitutes a substantial part of the fabrication cost of micro electro-mechanical systems (MEMS transducers and imaging sensor devices. In this paper, we propose a simple and cost-effective wafer-level capping method that utilizes a limited number of highly standardized process steps as well as low-cost materials. The proposed capping process is based on low-temperature adhesive wafer bonding, which ensures full complementary metal-oxide-semiconductor (CMOS compatibility. All necessary fabrication steps for the wafer bonding, such as cavity formation and deposition of the adhesive, are performed on the capping substrate. The polymer adhesive is deposited by spray-coating on the capping wafer containing the cavities. Thus, no lithographic patterning of the polymer adhesive is needed, and material waste is minimized. Furthermore, this process does not require any additional fabrication steps on the device wafer, which lowers the process complexity and fabrication costs. We demonstrate the proposed capping method by packaging two different MEMS devices. The two MEMS devices include a vibration sensor and an acceleration switch, which employ two different electrical interconnection schemes. The experimental results show wafer-level capping with excellent bond quality due to the re-flow behavior of the polymer adhesive. No impediment to the functionality of the MEMS devices was observed, which indicates that the encapsulation does not introduce significant tensile nor compressive stresses. Thus, we present a highly versatile, robust, and cost-efficient capping method for components such as MEMS and imaging sensors.

  10. Systematic characterization of key parameters of hermetic wafer-level Cu-Sn SLID bonding

    NARCIS (Netherlands)

    Wiel, H.J. van de; Vardøy, A.S.B.; Hayes, G.; Kouters, M.H.M.; Waal, A. van der; Erinc, M.; Lapadatu, A.; Martinsen, S.; Taklo, M.M.V.; Fischer, H.R.

    2013-01-01

    Hermetic wafer-level encapsulation of atmosphere sensitive Micro-Electric-Mechanical Systems (MEMS) devices is vital to achieve a high yield, a high performance and a long operating lifetime. An interesting and gradually more employed packaging technique is flux-less wafer-level copper-tin (Cu-Sn)

  11. High-Q Wafer Level Package Based on Modified Tri-Layer Anodic Bonding and High Performance Getter and Its Evaluation for Micro Resonant Pressure Sensor

    National Research Council Canada - National Science Library

    Liying Wang; Xiaohui Du; Lingyun Wang; Zhanhao Xu; Chenying Zhang; Dandan Gu

    2017-01-01

    ...). In order to form good bonding quality between the pressure-sensitive layer and the glass cap layer, the cross-layer anodic bonding technique is proposed for vacuum package by sputtering Aluminum (Al...

  12. Wafer level test solutions for IR sensors

    Science.gov (United States)

    Giessmann, Sebastian; Werner, Frank-Michael

    2014-05-01

    Wafer probers provide an established platform for performing electrical measurements at wafer level for CMOS and similar process technologies. For testing IR sensors, the requirements are beyond the standard prober capabilities. This presentation will give an overview about state of the art IR sensor probing systems reaching from flexible engineering solutions to automated production needs. Cooled sensors typically need to be tested at a target temperature below 80 K. Not only is the device temperature important but also the surrounding environment is required to prevent background radiation from reaching the device under test. To achieve that, a cryogenic shield is protecting the movable chuck. By operating that shield to attract residual gases inside the chamber, a completely contamination-free test environment can be guaranteed. The use of special black coatings are furthermore supporting the removal of stray light. Typically, probe card needles are operating at ambient (room) temperature when connecting to the wafer. To avoid the entrance of heat, which can result in distorted measurements, the probe card is fully embedded into the cryogenic shield. A shutter system, located above the probe field, is designed to switch between the microscope view to align the sensor under the needles and the test relevant setup. This includes a completely closed position to take dark current measurements. Another position holds a possible filter glass with the required aperture opening. The necessary infrared sources to stimulate the device are located above.

  13. Number Determination of Successfully Packaged Dies Per Wafer Based on Machine Vision

    Directory of Open Access Journals (Sweden)

    Hsuan-Ting Chang

    2015-04-01

    Full Text Available Packaging the integrated circuit (IC chip is a necessary step in the manufacturing process of IC products. In general, wafers with the same size and process should have a fixed number of packaged dies. However, many factors decrease the number of the actually packaged dies, such as die scratching, die contamination, and die breakage, which are not considered in the existing die-counting methods. Here we propose a robust method that can automatically determine the number of actual packaged dies by using machine vision techniques. During the inspection, the image is taken from the top of the wafer, in which most dies have been removed and packaged. There are five steps in the proposed method: wafer region detection, wafer position calibration, dies region detection, detection of die sawing lines, and die number counting. The abnormal cases of fractional dies in the wafer boundary and dropped dies during the packaging are considered in the proposed method as well. The experimental results show that the precision and recall rates reach 99.83% and 99.84%, respectively, when determining the numbers of actual packaged dies in the 41 test cases.

  14. Fabrication of High Aspect Ratio Through-Wafer Vias in CMOS Wafers for 3-D Packaging Applications

    DEFF Research Database (Denmark)

    Rasmussen, Frank Engel; Frech, J.; Heschel, M.

    2003-01-01

    A process for fabrication of through-wafer vias in CMOS wafers is presented. The process presented offers simple and well controlled fabrication of through-wafer vias using DRIE formation of wafer through-holes, low temperature deposition of through-hole insulation, doubled sided sputtering of Cr...... the use of a CVD deposited polymer, Parylene C, whereas electroless deposition of Cu ensures even distribution of the via metallization....

  15. Micro-nano photonic biosensors scalable at the wafer level

    Science.gov (United States)

    Holgado, M.; Casquel, R.; Lagunas, María-Fe

    2009-02-01

    We present a potential high sensitive label-free optical bio-sensing system based on biophotonic sensing cells, which can be fabricated and interrogated at wafer or disposable chip level. The key benefits rely on the holistic approach that combines bio-photonic resonant micro-nano cavities and advanced sub-micron spot size optical interrogation technologies. The proposed optical sensing system will be tremendously sensitive to refractive index variations by means of the observation of the reflectivity profile of three complementary enhanced sub-micron spot size optical technologies simultaneously (Reflectometry, Spectrometry and Ellipsometry based techniques), and the magnification due to the biophotonics resonant sensing cells, making possible to determine with more reliability and sensitivity the biomolecular interaction with the receptor biomolecules. This novel sensing system also offers an inexpensive solution for integration and packaging because it overcomes the need for using complex systems for light coupling such as inverted tapers or grating couplers, usually used in planar micro-nano photonic devices, because the sensor evaluation is done measuring vertically collecting the reflected light of the bio-photonic resonant sensing cells. The sensing system may use a tightly focused beam which allows measuring in situ micron/sub-micron size geometries, making the routine screening more cost-effective and suitable to perform hundreds of measurements on a single or several samples for multi-single or multiparameter measurements. The simultaneous used of the three different optical techniques will allow the systems to achieve a high throughput and productivity in comparison with other established analytical techniques. The levels of sensitivity expected are in the order of 10-6/10-7 refractive index units (RIU).

  16. Functional Testing and Characterisation of ISFETs on Wafer Level by Means of a Micro-droplet Cell

    Directory of Open Access Journals (Sweden)

    Michael J. Schöning

    2006-04-01

    Full Text Available A wafer-level functionality testing and characterisation system for ISFETs (ion-sensitive field-effect transistor is realised by means of integration of a specifically designedcapillary electrochemical micro-droplet cell into a commercial wafer prober-station. Thedeveloped system allows the identification and selection of “good” ISFETs at the earlieststage and to avoid expensive bonding, encapsulation and packaging processes for non-functioning ISFETs and thus, to decrease costs, which are wasted for bad dies. Thedeveloped system is also feasible for wafer-level characterisation of ISFETs in terms ofsensitivity, hysteresis and response time. Additionally, the system might be also utilised forwafer-level testing of further electrochemical sensors.

  17. Maskless wafer-level microfabrication of optical penetrating neural arrays out of soda-lime glass: Utah Optrode Array.

    Science.gov (United States)

    Boutte, Ronald W; Blair, Steve

    2016-12-01

    Borrowing from the wafer-level fabrication techniques of the Utah Electrode Array, an optical array capable of delivering light for neural optogenetic studies is presented in this paper: the Utah Optrode Array. Utah Optrode Arrays are micromachined out of sheet soda-lime-silica glass using standard backend processes of the semiconductor and microelectronics packaging industries such as precision diamond grinding and wet etching. 9 × 9 arrays with 1100μ m × 100μ m optrodes and a 500μ m back-plane are repeatably reproduced on 2i n wafers 169 arrays at a time. This paper describes the steps and some of the common errors of optrode fabrication.

  18. Wafer-level testing and test during burn-in for integrated circuits

    CERN Document Server

    Bahukudumbi, Sudarshan

    2010-01-01

    Wafer-level testing refers to a critical process of subjecting integrated circuits and semiconductor devices to electrical testing while they are still in wafer form. Burn-in is a temperature/bias reliability stress test used in detecting and screening out potential early life device failures. This hands-on resource provides a comprehensive analysis of these methods, showing how wafer-level testing during burn-in (WLTBI) helps lower product cost in semiconductor manufacturing.Engineers learn how to implement the testing of integrated circuits at the wafer-level under various resource constrain

  19. Design for Reliability of Wafer Level MEMS packaging

    NARCIS (Netherlands)

    Zaal, J.J.M.

    2012-01-01

    The world has seen an unrivaled spread of semiconductor technology into virtually any part of society. The main enablers of this semiconductor rush are the decreasing feature size and the constantly decreasing costs of semiconductors. The decreasing costs of semiconductors in general are caused by

  20. A Batch Wafer Scale LIGA Assembly and Packaging Technique vai Diffusion Bonding

    Energy Technology Data Exchange (ETDEWEB)

    Christenson, T.R.; Schmale, D.T.

    1999-01-27

    A technique using diffusion bonding (or solid-state welding) has been used to achieve batch fabrication of two- level nickel LIGA structures. Interlayer alignment accuracy of less than 1 micron is achieved using press-fit gauge pins. A mini-scale torsion tester was built to measure the diffusion bond strength of LIGA formed specimens that has shown successful bonding at temperatures of 450"C at 7 ksi pressure with bond strength greater than 100 Mpa. Extensions to this basic process to allow for additional layers and thereby more complex assemblies as well as commensurate packaging are discussed.

  1. Wafer-Level 3D Integration for ULSI Interconnects

    Science.gov (United States)

    Gutmann, Ronald J.; Lu, Jian-Qiang

    Three-dimensional (3D) integration in a system-in-a-package (SiP) implementation (packaging-based 3D) is becoming increasingly used in consumer, computer, and communication applications where form factor is critical. In particular, the hand-held market for a growing myriad of voice, data, messaging, and imaging products is enabled by packaging-based 3D integration (i.e., stacking and connecting individual chips). The key drivers are for increased memory capacity and for heterogeneous integration of different IC technologies and functions.

  2. Wafer-level hermetic thermo-compression bonding using electroplated gold sealing frame planarized by fly-cutting

    Science.gov (United States)

    Farisi, Muhammad Salman Al; Hirano, Hideki; Frömel, Jörg; Tanaka, Shuji

    2017-01-01

    In this paper, a novel wafer-level hermetic packaging technology for heterogeneous device integration is presented. Hermetic sealing is achieved by low-temperature thermo-compression bonding using electroplated Au micro-sealing frame planarized by single-point diamond fly-cutting. The proposed technology has significant advantages compared to other established processes in terms of integration of micro-structured wafer, vacuum encapsulation and electrical interconnection, which can be achieved at the same time. Furthermore, the technology is also achievable for a bonding frame width as narrow as 30 μm, giving it an advantage from a geometry perspective, and bonding temperatures as low as 300 °C, making it advantageous for temperature-sensitive devices. Outgassing in vacuum sealed cavities is studied and a cavity pressure below 500 Pa is achieved by introducing annealing steps prior to bonding. The pressure of the sealed cavity is measured by zero-balance method utilizing diaphragm-structured bonding test devices. The leak rate into the packages is determined by long-term sealed cavity pressure measurement for 1500 h to be less than 2.0× {{10}-14} Pa m3s-1. In addition, the bonding shear strength is also evaluated to be higher than 100 MPa.

  3. Packaged low-level waste verification system

    Energy Technology Data Exchange (ETDEWEB)

    Tuite, K.; Winberg, M.R.; McIsaac, C.V. [Idaho National Engineering Lab., Idaho Falls, ID (United States)

    1995-12-31

    The Department of Energy through the National Low-Level Waste Management Program and WMG Inc. have entered into a joint development effort to design, build, and demonstrate the Packaged Low-Level Waste Verification System. Currently, states and low-level radioactive waste disposal site operators have no method to independently verify the radionuclide content of packaged low-level waste that arrives at disposal sites for disposition. At this time, the disposal site relies on the low-level waste generator shipping manifests and accompanying records to ensure that low-level waste received meets the site`s waste acceptance criteria. The subject invention provides the equipment, software, and methods to enable the independent verification of low-level waste shipping records to ensure that the site`s waste acceptance criteria are being met. The objective of the prototype system is to demonstrate a mobile system capable of independently verifying the content of packaged low-level waste.

  4. Vertical integration of array-type miniature interferometers at wafer level by using multistack anodic bonding

    Science.gov (United States)

    Wang, Wei-Shan; Wiemer, Maik; Froemel, Joerg; Enderlein, Tom; Gessner, Thomas; Lullin, Justine; Bargiel, Sylwester; Passilly, Nicolas; Albero, Jorge; Gorecki, Christophe

    2016-04-01

    In this work, vertical integration of miniaturized array-type Mirau interferometers at wafer level by using multi-stack anodic bonding is presented. Mirau interferometer is suitable for MEMS metrology and for medical imaging according to its vertical-, lateral- resolutions and working distances. Miniaturized Mirau interferometer can be a promising candidate as a key component of an optical coherence tomography (OCT) system. The miniaturized array-type interferometer consists of a microlens doublet, a Si-based MEMS Z scanner, a spacer for focus-adjustment and a beam splitter. Therefore, bonding technologies which are suitable for heterogeneous substrates are of high interest and necessary for the integration of MEMS/MOEMS devices. Multi-stack anodic bonding, which meets the optical and mechanical requirements of the MOEMS device, is adopted to integrate the array-type interferometers. First, the spacer and the beam splitter are bonded, followed by bonding of the MEMS Z scanner. In the meanwhile, two microlenses, which are composed of Si and glass wafers, are anodically bonded to form a microlens doublet. Then, the microlens doublet is aligned and bonded with the scanner/spacer/beam splitter stack. The bonded array-type interferometer is a 7- wafer stack and the thickness is approximately 5mm. To separate such a thick wafer stack with various substrates, 2-step laser cutting is used to dice the bonded stack into Mirau chips. To simplify fabrication process of each component, electrical connections are created at the last step by mounting a Mirau chip onto a flip chip PCB instead of through wafer vias. Stability of Au/Ti films on the MEMS Z scanner after anodic bonding, laser cutting and flip chip bonding are discussed as well.

  5. Wafer-Level Patterned and Aligned Polymer Nanowire/Micro- and Nanotube Arrays on any Substrate

    KAUST Repository

    Morber, Jenny Ruth

    2009-05-25

    A study was conducted to fabricate wafer-level patterned and aligned polymer nanowire (PNW), micro- and nanotube arrays (PNT), which were created by exposing the polymer material to plasma etching. The approach for producing wafer-level aligned PNWs involved a one-step inductively coupled plasma (ICP) reactive ion etching process. The polymer nanowire array was fabricated in an ICP reactive ion milling chamber with a pressure of 10mTorr. Argon (Ar), O 2, and CF4 gases were released into the chamber as etchants at flow rates of 15 sccm, 10 sccm, and 40 sccm. Inert gasses, such as Ar-form positive ions were incorporated to serve as a physical component to assist in the material degradation process. One power source (400 W) was used to generate dense plasma from the input gases, while another power source applied a voltage of approximately 600V to accelerate the plasma toward the substrate.

  6. Novel variable-temperature chuck for use in the detection of deep levels in processed semiconductor wafers.

    Science.gov (United States)

    Koyama, R Y; Buehler, M G

    1979-08-01

    This paper describes the design, construction, and characterization of a variable-temperature wafer apparatus for use in the detection of electrically active defects which produce deep levels in the band gap of silicon. In its present form, the wafer chuck can heat and cool wafers as large as 51 mm in diameter over the temperature range from -196 degrees to 350 degrees C. Heating rates as high as 7 degrees C/s have been achieved. Sensitivity for electrical measurements is sufficient to allow current measurements as low as 0.2 pA or capacitance changes (1 MHz) as small as 5 fF. The use of this apparatus is illustrated by wafer mapping the gold defect density in diodes fabricated across a silicon wafer.

  7. Wafer-level fabrication of multi-element glass lenses: lens doublet with improved optical performances.

    Science.gov (United States)

    Albero, Jorge; Perrin, Stéphane; Passilly, Nicolas; Krauter, Johann; Gauthier-Manuel, Ludovic; Froehly, Luc; Lullin, Justine; Bargiel, Sylwester; Osten, Wolfgang; Gorecki, Christophe

    2016-01-01

    This Letter reports on the fabrication of glass lens doublets arranged in arrays and realized at wafer level by means of micro-fabrication. The technique is based on the accurate vertical assembly of separately fabricated glass lens arrays. Since each one of these arrays is obtained by glass melting in silicon cavities, silicon is employed as a spacer in order to build a well-aligned and robust optical module. It is shown that optical performance achieved by the lens doublet is better than for a single lens of equivalent numerical aperture, thanks to lower optical aberrations. The technique has good potential to match the optical requirements of miniature imaging systems.

  8. Wafer-Level Hybrid Integration of Complex Micro-Optical Modules

    Directory of Open Access Journals (Sweden)

    Peter Dannberg

    2014-06-01

    Full Text Available A series of technological steps concentrating around photolithography and UV polymer on glass replication in a mask-aligner that allow for the cost-effective generation of rather complex micro-optical systems on the wafer level are discussed. In this approach, optical functional surfaces are aligned to each other and stacked on top of each other at a desired axial distance. They can consist of lenses, achromatic doublets, regular or chirped lens arrays, diffractive elements, apertures, filter structures, reflecting layers, polarizers, etc. The suitability of the separated modules in certain imaging and non-imaging applications will be shown.

  9. A Wafer Level Vacuum Encapsulated Capacitive Accelerometer Fabricated in an Unmodified Commercial MEMS Process

    Directory of Open Access Journals (Sweden)

    Adel Merdassi

    2015-03-01

    Full Text Available We present the design and fabrication of a single axis low noise accelerometer in an unmodified commercial MicroElectroMechanical Systems (MEMS process. The new microfabrication process, MEMS Integrated Design for Inertial Sensors (MIDIS, introduced by Teledyne DALSA Inc. allows wafer level vacuum encapsulation at 10 milliTorr which provides a high Quality factor and reduces noise interference on the MEMS sensor devices. The MIDIS process is based on high aspect ratio bulk micromachining of single-crystal silicon layer that is vacuum encapsulated between two other silicon handle wafers. The process includes sealed Through Silicon Vias (TSVs for compact design and flip-chip integration with signal processing circuits. The proposed accelerometer design is sensitive to single-axis in-plane acceleration and uses a differential capacitance measurement. Over ±1 g measurement range, the measured sensitivity was 1fF/g. The accelerometer system was designed to provide a detection resolution of 33 milli-g over the operational range of ±100 g.

  10. A wafer level vacuum encapsulated capacitive accelerometer fabricated in an unmodified commercial MEMS process.

    Science.gov (United States)

    Merdassi, Adel; Yang, Peng; Chodavarapu, Vamsy P

    2015-03-25

    We present the design and fabrication of a single axis low noise accelerometer in an unmodified commercial MicroElectroMechanical Systems (MEMS) process. The new microfabrication process, MEMS Integrated Design for Inertial Sensors (MIDIS), introduced by Teledyne DALSA Inc. allows wafer level vacuum encapsulation at 10 milliTorr which provides a high Quality factor and reduces noise interference on the MEMS sensor devices. The MIDIS process is based on high aspect ratio bulk micromachining of single-crystal silicon layer that is vacuum encapsulated between two other silicon handle wafers. The process includes sealed Through Silicon Vias (TSVs) for compact design and flip-chip integration with signal processing circuits. The proposed accelerometer design is sensitive to single-axis in-plane acceleration and uses a differential capacitance measurement. Over ±1 g measurement range, the measured sensitivity was 1 fF/g. The accelerometer system was designed to provide a detection resolution of 33 milli-g over the operational range of ±100 g.

  11. Material size effects on crack growth along patterned wafer-level Cu–Cu bonds

    DEFF Research Database (Denmark)

    Tvergaard, Viggo; Niordson, Christian Frithiof; Hutchinson, John W.

    2013-01-01

    the toughness peak and the subsequent plateau level are highly sensitive to the value of the characteristic material length. A small material length, relative to the thickness of the Cu film, gives high toughness whereas a length comparable to the film thickness gives much reduced crack growth resistance......The role of micron-scale patterning on the interface toughness of bonded Cu-to-Cu nanometer-scale films is analyzed, motivated by experimental studies of Tadepalli, Turner and Thompson. In the experiments 400nm Cu films were deposited in various patterns on Si wafer substrates and then bonded...... together. Crack growth along the bond interface is here studied numerically using finite element analyses. The experiments have shown that plasticity in the Cu films makes a major contribution to the macroscopic interface toughness. To account for the size dependence of the plastic flow a strain gradient...

  12. Compact infrared cryogenic wafer-level camera: design and experimental validation.

    Science.gov (United States)

    de la Barrière, Florence; Druart, Guillaume; Guérineau, Nicolas; Lasfargues, Gilles; Fendler, Manuel; Lhermet, Nicolas; Taboury, Jean

    2012-03-10

    We present a compact infrared cryogenic multichannel camera with a wide field of view equal to 120°. By merging the optics with the detector, the concept is compatible with both cryogenic constraints and wafer-level fabrication. The design strategy of such a camera is described, as well as its fabrication and integration process. Its characterization has been carried out in terms of the modulation transfer function and the noise equivalent temperature difference (NETD). The optical system is limited by the diffraction. By cooling the optics, we achieve a very low NETD equal to 15 mK compared with traditional infrared cameras. A postprocessing algorithm that aims at reconstructing a well-sampled image from the set of undersampled raw subimages produced by the camera is proposed and validated on experimental images.

  13. Future trends in electronic packaging

    Science.gov (United States)

    Elshabini, Aicha; Wang, Gangqiang; Barlow, Fred

    2006-03-01

    Electronic packaging is traditionally defined as the back-end process that transforms bare integrated circuits (IC) into functional products. As the IC feature size decreases and the size of silicon wafer increases, the cost per IC is reduced and the performance is enhanced. The future IC chips will be larger in size, have more input/output terminals (I/Os), and require higher power. In addition to the advancements in IC technology, electronic packaging is also driven by the market requirements for low cost, small size, and multi-functional electronic products. In response to these requirements, packaging related areas such as design, packaging architectures, materials, processes, and manufacturing equipment are all changing rapidly. Wafer-level packaging (WLP) offers the benefits of low cost and smallest size for single chip packages, since the package is done at wafer level other than individual die. After packages reach the horizontal limit of dimensions, 3D stacking solution provides more efficient packages through expanding packages in the vertical dimension. Functional integration is achieved with 3D stacking architectures. System in package (SiP), one of the solutions to system integration, incorporates electronics, non-electronic devices such as optical devices, biological devices, micro-electro-mechanical systems (MEMS), etc, and interconnection in a single package, to form smart structures or microsystems. MEMS devices require specialized packaging to serve new market applications. This paper and presentation describe the technology requirements and challenges of these advancing packaging areas. The potential solutions and future trends are presented.

  14. Electrical Interconnections Through CMOS Wafers

    DEFF Research Database (Denmark)

    Rasmussen, Frank Engel

    2003-01-01

    Chips with integrated vias are currently the ultimate miniaturizing solution for 3D packaging of microsystems. Previously the application of vias has almost exclusively been demonstrated within MEMS technology, and only a few of these via technologies have been CMOS compatible. This thesis...... connections. A process for wafer level packaging and assembly of chips with vias is presented in this thesis. Discrete components, capacitors and resistors, are assembled on the backside of the amplifier chips by screen printing of solder paste, pick and place of components, and reflow soldering. Since...... the technology facilitates integration of discrete components directly on the surface of the chip, the need for an additional substrate is eliminated. For a single chip solution employing the presented via technology and on-chip integration of components, the total height of the package constituting a complete...

  15. Investigation of Surface Pre-Treatment Methods for Wafer-Level Cu-Cu Thermo-Compression Bonding

    Directory of Open Access Journals (Sweden)

    Koki Tanaka

    2016-12-01

    Full Text Available To increase the yield of the wafer-level Cu-Cu thermo-compression bonding method, certain surface pre-treatment methods for Cu are studied which can be exposed to the atmosphere before bonding. To inhibit re-oxidation under atmospheric conditions, the reduced pure Cu surface is treated by H2/Ar plasma, NH3 plasma and thiol solution, respectively, and is covered by Cu hydride, Cu nitride and a self-assembled monolayer (SAM accordingly. A pair of the treated wafers is then bonded by the thermo-compression bonding method, and evaluated by the tensile test. Results show that the bond strengths of the wafers treated by NH3 plasma and SAM are not sufficient due to the remaining surface protection layers such as Cu nitride and SAMs resulting from the pre-treatment. In contrast, the H2/Ar plasma–treated wafer showed the same strength as the one with formic acid vapor treatment, even when exposed to the atmosphere for 30 min. In the thermal desorption spectroscopy (TDS measurement of the H2/Ar plasma–treated Cu sample, the total number of the detected H2 was 3.1 times more than the citric acid–treated one. Results of the TDS measurement indicate that the modified Cu surface is terminated by chemisorbed hydrogen atoms, which leads to high bonding strength.

  16. Recent developments in wafer-level fabrication of micro-optical multi-aperture imaging systems

    Science.gov (United States)

    Leitel, R.; Dannberg, P.; Brückner, A.; Bräuer, A.

    2011-10-01

    Micro-optical systems, that utilize multiple channels for imaging instead of a single one, are frequently discussed for ultra-compact applications such as digital cameras. The strategy of their fabrication differs due to different concepts of image formation. Illustrated by recently implemented systems for multi-aperture imaging, typical steps of wafer-level fabrication are discussed in detail. In turn, the made progress may allow for additional degrees of freedom in optical design. Pressing ahead with very short overall lengths and multiple diaphragm array layers, results in the use of extremely thin glass substrates down to 100 microns in thickness. The desire for a wide field of view for imaging has led to chirped arrays of microlenses and diaphragms. Focusing on imaging quality, aberrations were corrected by introducing toroidal lenslets and elliptical apertures. Such lenslets had been generated by thermal reflow of lithographic patterned photoresist and subsequent molding. Where useful, the system's performance can be further increased by applying aspheric microlenses from reactive ion etching (RIE) transfer or by achromatic doublets from superimposing two moldings with different polymers. Multiple diaphragm arrays prevent channel crosstalk. But using simple metal layers may lead to multiple reflections and an increased appearance of ghost images. A way out are low reflecting black matrix polymers that can be directly patterned by lithography. But in case of environmental stability and high resolution, organic coatings should be replaced by patterned metal coatings that exhibit matched antireflective layers like the prominent black chromium. The mentioned components give an insight into the fabrication process of multi-aperture imaging systems. Finally, the competence in each step decides on the overall image quality.

  17. High performance few-layer MoS2 transistor arrays with wafer level homogeneity integrated by atomic layer deposition

    Science.gov (United States)

    Zhang, Tianbao; Wang, Yang; Xu, Jing; Chen, Lin; Zhu, Hao; Sun, Qingqing; Ding, Shijin; Zhang, David Wei

    2018-01-01

    Wafer-level integration of 2D transition metal disulfide is the key factor for future large-scale integration of the continuously scaling-down devices, and has attracted great attention in recent years. Compared with other ultra-thin film growth methods, atomic layer deposition (ALD) has the advantages of excellent step coverage, uniformity and thickness controllability. In this work, we synthesized large-scale and thickness-controllable MoS2 films on sapphire substrate by ALD at 150 °C with molybdenum hexcarbonyl and hexamethyldisilathiane (HMDST) as precursors followed by high-temperature annealing in sulfur atmosphere. HMDST is introduced for the first time to enable a toxic-free process without hazardous sulfur precursors such as H2S and CH3SSCH3. The synthesized MoS2 retains the inherent benefits from the ALD process, including thickness controllability, reproducibility, wafer-level thickness uniformity, and high conformity. Finally, field-effect transistor (FET) arrays were fabricated based on the large-area ALD MoS2 films. The top-gate FETs exhibited excellent electrical performance such as high on/off current ratio over 103 and peak room-temperature mobility up to 11.56 cm2 V‑1 s‑1. This work opens up an attractive approach to realize the application of high-quality 2D materials with wafer scale homogeneity.

  18. Substrate Crosstalk Suppression Using Wafer-Level Packaging : Metalized Through-Substrate Trench Approach

    NARCIS (Netherlands)

    Sinaga, S.M.

    2010-01-01

    The demand for miniaturization technology has been increasing over the last decades. Consumer electronics end-users often, if not always, go for more functionality and practicality. This is translated into systems that are more complex and yet smaller in size such as smart cellular phones and

  19. Heterogeneous Electronics – Wafer Level Integration, Packaging, and Assembly Facility

    Data.gov (United States)

    Federal Laboratory Consortium — This facility integrates active electronics with microelectromechanical (MEMS) devices at the miniature system scale. It obviates current size-, weight-, and power...

  20. Non-Destructive Damping Measurement for Wafer-Level Packaged Microelectromechanical System (MEMS) Acceleration Switches

    Science.gov (United States)

    2014-09-01

    evaluations of MEMS systems required modeling damping by evaluating displacement or oscillation using piezoelectric , electromagnetic, or electrostatic...capacitive sensing) transduction mechanisms.4,5 A previous study determined damping in oscillating cantilever tuning forks by linearizing the Reynolds...acceleration field—when switch closure occurs. Other MEMS devices use transducers like capacitive, piezoelectric , optical, and pressure to discern a

  1. Digital Platform for Wafer-Level MEMS Testing and Characterization Using Electrical Response

    Directory of Open Access Journals (Sweden)

    Nuno Brito

    2016-09-01

    Full Text Available The uniqueness of microelectromechanical system (MEMS devices, with their multiphysics characteristics, presents some limitations to the borrowed test methods from traditional integrated circuits (IC manufacturing. Although some improvements have been performed, this specific area still lags behind when compared to the design and manufacturing competencies developed over the last decades by the IC industry. A complete digital solution for fast testing and characterization of inertial sensors with built-in actuation mechanisms is presented in this paper, with a fast, full-wafer test as a leading ambition. The full electrical approach and flexibility of modern hardware design technologies allow a fast adaptation for other physical domains with minimum effort. The digital system encloses a processor and the tailored signal acquisition, processing, control, and actuation hardware control modules, capable of the structure position and response analysis when subjected to controlled actuation signals in real time. The hardware performance, together with the simplicity of the sequential programming on a processor, results in a flexible and powerful tool to evaluate the newest and fastest control algorithms. The system enables measurement of resonant frequency (Fr, quality factor (Q, and pull-in voltage (Vpi within 1.5 s with repeatability better than 5 ppt (parts per thousand. A full-wafer with 420 devices under test (DUTs has been evaluated detecting the faulty devices and providing important design specification feedback to the designers.

  2. Materials for advanced packaging

    CERN Document Server

    Wong, CP

    2017-01-01

    This second edition continues to be the most comprehensive review on the developments in advanced electronic packaging technologies, with a focus on materials and processing. Recognized experts in the field contribute to 22 updated and new chapters that provide comprehensive coverage on various 3D package architectures, novel bonding and joining techniques, wire bonding, wafer thinning techniques, organic substrates, and novel approaches to make electrical interconnects between integrated circuit and substrates. Various chapters also address advances in several key packaging materials, including: Lead-free solders Flip chip underfills Epoxy molding compounds Conductive adhesives Die attach adhesives/films Thermal interface materials (TIMS) Materials for fabricating embedded passives including capacitors, inductors, and resistors Materials and processing aspects on wafer-level chip scale package (CSP) and MicroElectroMechanical system (MEMS) Contributors also review new and emerging technologies such as Light ...

  3. Analyses of crack growth along interface of patterned wafer-level Cu-Cu bonds

    DEFF Research Database (Denmark)

    Tvergaard, Viggo; Hutchinson, John W.

    2009-01-01

    . The computational model provides the resistance curve of macroscopic crack driving force versus crack advance as dependent on the work of separation and strength of the interface as well as the pattern geometry and the parameters controlling the plasticity of the Cu films. Plasticity in the Cu films makes a major...... on Si wafer substrates. Specimens were then produced by bringing the Cu surfaces into contact creating thermo-compression bonds. Interface toughness of these specimens was experimentally measured. The present study focuses on interface patterns comprised of bonded strips, called lines, alternating...... contribution to the macroscopic interface toughness measured by Tadepalli, Turner and Thompson. Highlighted in this study is the difficulty of accurately representing plastic yielding in the thin films and the challenge of capturing the full range of scales in a computational model....

  4. Software refactoring at the package level using clustering techniques

    KAUST Repository

    Alkhalid, A.

    2011-01-01

    Enhancing, modifying or adapting the software to new requirements increases the internal software complexity. Software with high level of internal complexity is difficult to maintain. Software refactoring reduces software complexity and hence decreases the maintenance effort. However, software refactoring becomes quite challenging task as the software evolves. The authors use clustering as a pattern recognition technique to assist in software refactoring activities at the package level. The approach presents a computer aided support for identifying ill-structured packages and provides suggestions for software designer to balance between intra-package cohesion and inter-package coupling. A comparative study is conducted applying three different clustering techniques on different software systems. In addition, the application of refactoring at the package level using an adaptive k-nearest neighbour (A-KNN) algorithm is introduced. The authors compared A-KNN technique with the other clustering techniques (viz. single linkage algorithm, complete linkage algorithm and weighted pair-group method using arithmetic averages). The new technique shows competitive performance with lower computational complexity. © 2011 The Institution of Engineering and Technology.

  5. Reliability of industrial packaging for microsystems

    DEFF Research Database (Denmark)

    Reus, Roger De; Christensen, Carsten; Weichel, Steen

    1998-01-01

    Packaging concepts for silicon-based micromachined sensors exposed to harsh environments are explored. By exposing the sensors directly to the media and applying protection at the wafer level the packaging and assembly will be simplified as compared to conventional methods of fabrication. Protect...

  6. Vacuum Packaging of MEMS With Multiple Internal Seal Rings

    Science.gov (United States)

    Hayworth, Ken; Yee, Karl; Shcheglov, Kirill; Bae, Youngsam; Wiberg, Dean; Peay, Chris; Challoner, Anthony

    2008-01-01

    A proposed method of design and fabrication of vacuum-packaged microelectromechanical systems (MEMS) and of individual microelectromechanical devices involves the use of multiple internal seal rings (MISRs) in conjunction with vias (through holes plated with metal for electrical contacts). The proposed method is compatible with mass production in a wafer-level fabrication process, in which the dozens of MEMS or individual microelectromechanical devices on a typical wafer are simultaneously vacuum packaged by bonding a capping wafer before the devices are singulated (cut apart by use of a dicing saw). In addition to being compatible with mass production, the proposed method would eliminate the need for some complex and expensive production steps and would yield more reliable vacuum seals. Conventionally, each MEMS or individual microelectromechanical device is fabricated as one of many identical units on a device wafer. Vacuum packaging is accomplished by bonding the device wafer to a capping wafer with metal seal rings (one ring surrounding each unit) that have been formed on the capping wafer. The electrical leads of each unit are laid out on what would otherwise be a flat surface of the device wafer, against which the seal ring is to be pressed for sealing. The resulting pattern of metal lines and their insulating oxide coverings presents a very rough and uneven surface, upon which it is difficult to pattern the sealing metal. Consequently, the seal is prone to leakage unless additional costly and complex planarization steps are performed before patterning the seal ring and bonding the wafers.

  7. Laser cutting sandwich structure glass-silicon-glass wafer with laser induced thermal-crack propagation

    Science.gov (United States)

    Cai, Yecheng; Wang, Maolu; Zhang, Hongzhi; Yang, Lijun; Fu, Xihong; Wang, Yang

    2017-08-01

    Silicon-glass devices are widely used in IC industry, MEMS and solar energy system because of their reliability and simplicity of the manufacturing process. With the trend toward the wafer level chip scale package (WLCSP) technology, the suitable dicing method of silicon-glass bonded structure wafer has become necessary. In this paper, a combined experimental and computational approach is undertaken to investigate the feasibility of cutting the sandwich structure glass-silicon-glass (SGS) wafer with laser induced thermal-crack propagation (LITP) method. A 1064 nm semiconductor laser cutting system with double laser beams which could simultaneously irradiate on the top and bottom of the sandwich structure wafer has been designed. A mathematical model for describing the physical process of the interaction between laser and SGS wafer, which consists of two surface heating sources and two volumetric heating sources, has been established. The temperature stress distribution are simulated by using finite element method (FEM) analysis software ABAQUS. The crack propagation process is analyzed by using the J-integral method. In the FEM model, a stationary planar crack is embedded in the wafer and the J-integral values around the crack front edge are determined using the FEM. A verification experiment under typical parameters is conducted and the crack propagation profile on the fracture surface is examined by the optical microscope and explained from the stress distribution and J-integral value.

  8. Wafer bonding technology for new generation vacuum MEMS: challenges and promises

    Science.gov (United States)

    Dragoi, V.; Pabo, E.

    2015-05-01

    Various MEMS devices are incorporated into consumer electronic devices. A particular category of MEMS require vacuum packaging by wafer bonding with the need to encapsulate vacuum levels of 10-2 mbar or higher with long time stability. The vacuum requirement is limiting the choice of the wafer bonding process and raises significant challenges to the existing investigation methods (metrology) used for results qualification. From the broad range of wafer bonding processes only few are compatible with vacuum applications: fusion bonding, anodic bonding, glass frit bonding and metal-based bonding. The outgassing from the enclosed surfaces after bonding will affect the vacuum level in the cavity: in some cases, a getter material is used inside the device cavity to compensate for this outgassing. Additionally the selected bonding process must be compatible with the devices on the wafers being bonded. This work reviews the principles of vacuum encapsulation using wafer bonding. Examples showing the suitability of each process for specific applications types will be presented. A significant challenge in vacuum MEMS fabrication is the lack of analytical methods needed for process characterization or reliability testing. A short overview of the most used methods and their limitations will be presented. Specific needs to be addressed will be introduced with examples.

  9. Optical-I/O packaging technologies for chip- and board-level optical interconnects

    Science.gov (United States)

    Ishii, Yuzo

    2002-09-01

    As silicon LSIs become more densely integrated and the bit rates between them increase, traditional printed circuit boards present problems similar to electrical cables, which are already a bottleneck to cabinet interconnection. These problems include limited line length, poor flexibility in layout design, power dissipation, and crosstalk (EMI). One promising solution to these on-board electrical interconnection bottlenecks is to use optical interconnection technology at the chip level. Making chip-level optical interconnections practical requires revolutionary changes in optoelectronics packaging; the packaging must not only keep pace with silicon LSI capabilities but should also inherit the advantages of today?fs mature electronics packaging and manufacturability technologies. To meet these requirements, we developed novel optical-I/O packages for low-cost chip-to-chip optical interconnections. Unlike conventional optical packages, our packages are fully compatible with surface-mount technology (SMT) because they do not need optical connectors. The packages free users from all on-board connection work and fiber management. Using the developed optical-I/O packages, in which a VCSEL/PD array is mounted at the bottom, chip-to-chip parallel optical interconnection through a polymer waveguide array is demonstrated.

  10. Implementation of a monolithic capacitive accelerometer in a wafer-level 0.18 µm CMOS MEMS process

    Science.gov (United States)

    Tseng, Sheng-Hsiang; S-C Lu, Michael; Wu, Po-Chang; Teng, Yu-Chen; Tsai, Hann-Huei; Juang, Ying-Zong

    2012-05-01

    This paper describes the design, fabrication and characterization of a complementary metal-oxide-semiconductor (CMOS) micro-electro-mechanical-system (MEMS) accelerometer implemented in a 0.18 µm multi-project wafer (MPW) CMOS MEMS process. In addition to the standard CMOS process, an additional aluminum layer and a thick photoresist masking layer are employed to achieve etching and microstructural release. The structural thickness of the accelerometer is up to 9 µm and the minimum structural spacing is 2.3 µm. The out-of-plane deflection resulted from the vertical stress gradient over the whole device is controlled to be under 0.2 µm. The chip area containing the micromechanical structure and switched-capacitor sensing circuit is 1.18 × 0.9 mm2, and the total power consumption is only 0.7 mW. Within the sensing range of ±6 G, the measured nonlinearity is 1.07% and the cross-axis sensitivities with respect to the in-plane and out-of-plane are 0.5% and 5.8%, respectively. The average sensitivity of five tested accelerometers is 191.4 mV G-1with a standard deviation of 2.5 mV G-1. The measured output noise floor is 354 µG Hz-1/2, corresponding to a 100 Hz 1 G sinusoidal acceleration. The measured output offset voltage is about 100 mV at 27 °C, and the zero-G temperature coefficient of the accelerometer output is 0.94 mV °C-1 below 85 °C.

  11. On the complexity of Wafer-to-Wafer Integration

    OpenAIRE

    Duvillié, Guillerme; Bougeret, Marin; Boudet, Vincent; Dokka, Trivikram; Giroudeau, Rodolphe

    2015-01-01

    In this paper we consider the Wafer-to-Wafer Integration problem. A wafer can be seen as a pp-dimensional binary vector. The input of this problem is described by mm multisets (called “lots”), where each multiset contains nn wafers. The output of the problem is a set of nn disjoint stacks, where a stack is a set of mm wafers (one wafer from each lot). To each stack we associate a pp-dimensional binary vector corresponding to the bit-wise AND operation of the wafers of the stack. The objective...

  12. Wafer characteristics via reflectometry

    Science.gov (United States)

    Sopori, Bhushan L.

    2010-10-19

    Various exemplary methods (800, 900, 1000, 1100) are directed to determining wafer thickness and/or wafer surface characteristics. An exemplary method (900) includes measuring reflectance of a wafer and comparing the measured reflectance to a calculated reflectance or a reflectance stored in a database. Another exemplary method (800) includes positioning a wafer on a reflecting support to extend a reflectance range. An exemplary device (200) has an input (210), analysis modules (222-228) and optionally a database (230). Various exemplary reflectometer chambers (1300, 1400) include radiation sources positioned at a first altitudinal angle (1308, 1408) and at a second altitudinal angle (1312, 1412). An exemplary method includes selecting radiation sources positioned at various altitudinal angles. An exemplary element (1650, 1850) includes a first aperture (1654, 1854) and a second aperture (1658, 1858) that can transmit reflected radiation to a fiber and an imager, respectfully.

  13. Stable wafer-carrier system

    Energy Technology Data Exchange (ETDEWEB)

    Rozenzon, Yan; Trujillo, Robert T; Beese, Steven C

    2013-10-22

    One embodiment of the present invention provides a wafer-carrier system used in a deposition chamber for carrying wafers. The wafer-carrier system includes a base susceptor and a top susceptor nested inside the base susceptor with its wafer-mounting side facing the base susceptor's wafer-mounting side, thereby forming a substantially enclosed narrow channel. The base susceptor provides an upward support to the top susceptor.

  14. Wafer screening device and methods for wafer screening

    Science.gov (United States)

    Sopori, Bhushan; Rupnowski, Przemyslaw

    2014-07-15

    Wafer breakage is a serious problem in the photovoltaic industry because a large fraction of wafers (between 5 and 10%) break during solar cell/module fabrication. The major cause of this excessive wafer breakage is that these wafers have residual microcracks--microcracks that were not completely etched. Additional propensity for breakage is caused by texture etching and incomplete edge grinding. To eliminate the cost of processing the wafers that break, it is best to remove them prior to cell fabrication. Some attempts have been made to develop optical techniques to detect microcracks. Unfortunately, it is very difficult to detect microcracks that are embedded within the roughness/texture of the wafers. Furthermore, even if such detection is successful, it is not straightforward to relate them to wafer breakage. We believe that the best way to isolate the wafers with fatal microcracks is to apply a stress to wafers--a stress that mimics the highest stress during cell/module processing. If a wafer survives this stress, it has a high probability of surviving without breakage during cell/module fabrication. Based on this, we have developed a high throughput, noncontact method for applying a predetermined stress to a wafer. The wafers are carried on a belt through a chamber that illuminates the wafer with an intense light of a predetermined intensity distribution that can be varied by changing the power to the light source. As the wafers move under the light source, each wafer undergoes a dynamic temperature profile that produces a preset elastic stress. If this stress exceeds the wafer strength, the wafer will break. The broken wafers are separated early, eliminating cost of processing into cell/module. We will describe details of the system and show comparison of breakage statistics with the breakage on a production line.

  15. Hanford low-level waste process chemistry testing data package

    Energy Technology Data Exchange (ETDEWEB)

    Smith, H.D.; Tracey, E.M.; Darab, J.G.; Smith, P.A.

    1996-03-01

    Recently, the Tri-Party Agreement (TPA) among the State of Washington Department of Ecology, U.S. Department of Energy (DOE) and the US Environmental Protection Agency (EPA) for the cleanup of the Hanford Site was renegotiated. The revised agreement specifies vitrification as the encapsulation technology for low level waste (LLW). A demonstration, testing, and evaluation program underway at Westinghouse Hanford Company to identify the best overall melter-system technology available for vitrification of Hanford Site LLW to meet the TPA milestones. Phase I is a {open_quotes}proof of principle{close_quotes} test to demonstrate that a melter system can process a simulated highly alkaline, high nitrate/nitrite content aqueous LLW feed into a glass product of consistent quality. Seven melter vendors were selected for the Phase I evaluation: joule-heated melters from GTS Duratek, Incorporated (GDI); Envitco, Incorporated (EVI); Penberthy Electomelt, Incorporated (PEI); and Vectra Technologies, Incorporated (VTI); a gas-fired cyclone burner from Babcock & Wilcox (BCW); a plasma torch-fired, cupola furnace from Westinghouse Science and Technology Center (WSTC); and an electric arc furnace with top-entering vertical carbon electrodes from the U.S. Bureau of Mines (USBM).

  16. Self-aligned 0-level sealing of MEMS devices by a two layer thin film reflow process

    NARCIS (Netherlands)

    Rusu, C.R.; Jansen, Henricus V.; Gunn, R.; Witvrouw, A.

    2003-01-01

    Many micro electromechanical systems (MEMS) require a vacuum or controlled atmosphere encapsulation in order to ensure either a good performance or an acceptable lifetime of operation. Two approaches for wafer-scale zero-level packaging exist. The most popular approach is based on wafer bonding.

  17. Microelectronic packaging

    CERN Document Server

    Datta, M; Schultze, J Walter

    2004-01-01

    Microelectronic Packaging analyzes the massive impact of electrochemical technologies on various levels of microelectronic packaging. Traditionally, interconnections within a chip were considered outside the realm of packaging technologies, but this book emphasizes the importance of chip wiring as a key aspect of microelectronic packaging, and focuses on electrochemical processing as an enabler of advanced chip metallization.Divided into five parts, the book begins by outlining the basics of electrochemical processing, defining the microelectronic packaging hierarchy, and emphasizing the impac

  18. Wafer-scale micro-optics fabrication

    Science.gov (United States)

    Voelkel, Reinhard

    2012-07-01

    Micro-optics is an indispensable key enabling technology for many products and applications today. Probably the most prestigious examples are the diffractive light shaping elements used in high-end DUV lithography steppers. Highly-efficient refractive and diffractive micro-optical elements are used for precise beam and pupil shaping. Micro-optics had a major impact on the reduction of aberrations and diffraction effects in projection lithography, allowing a resolution enhancement from 250 nm to 45 nm within the past decade. Micro-optics also plays a decisive role in medical devices (endoscopes, ophthalmology), in all laser-based devices and fiber communication networks, bringing high-speed internet to our homes. Even our modern smart phones contain a variety of micro-optical elements. For example, LED flash light shaping elements, the secondary camera, ambient light and proximity sensors. Wherever light is involved, micro-optics offers the chance to further miniaturize a device, to improve its performance, or to reduce manufacturing and packaging costs. Wafer-scale micro-optics fabrication is based on technology established by the semiconductor industry. Thousands of components are fabricated in parallel on a wafer. This review paper recapitulates major steps and inventions in wafer-scale micro-optics technology. The state-of-the-art of fabrication, testing and packaging technology is summarized.

  19. Development of wafers with lowered glycemic index

    Directory of Open Access Journals (Sweden)

    N. N. Popova

    2016-01-01

    Full Text Available The negative impact on an organism is made by lack of culture of food of the population and low physical activity. It leads to violations of carbohydrate and lipidic exchange, development of obesity, diabetes, cardiovascular and other diseases. Relevance of development of foodstuff, in particular – the confectionery promoting decrease in risk of developing of such pathologies is proved. A research objective – development of a compounding of wafers with the lowered glycemic index. As an object of a research the wafers baked in house conditions are chosen. In work various characteristics are analysed (hygroscopicity, a cariogenicity sweet degree, power value, a glicemic index and a glycemic response the sweetening substances, the choice of fructose as sugar substitute for production of wafers with the lowered glycemic index is reasonable. By optimization of a compounding of wafers the amount of sugar was replaced with amount of sweetener, equivalent on sweet. As a result of predesigns the interval of a variation of amount of the fructose entered into a compounding of wafers is established. Further assessment of the indicators of quality forming consumer demand of products – appearance, taste, a smell, existence of a crunch is carried out. Humidity of the received wafers after their production and in the course of storage is also investigated. Decrease in a glycemic index was fixed by amount of glucose in blood. Its measurements saw by means of the glucose meter "on an empty stomach" and after the use of wafers to a complete recovery of level of sugar in blood. The confectionery made on the optimized compounding practically doesn't differ on caloric content from a control sample, and glucose level in blood after their use on about 20% below.

  20. Concurrent wafer-level measurement of longitudinal and transverse effective piezoelectric coefficients (d33,f and e31,f) by double beam laser interferometry

    Science.gov (United States)

    Sivaramakrishnan, S.; Mardilovich, P.; Schmitz-Kempen, T.; Tiedke, S.

    2018-01-01

    In a recently published paper [S. Sivaramakrishnan et al., Appl. Phys. Lett. 103, 132904 (2013)], the electrode-size dependence of the longitudinal effective piezoelectric coefficient (d33,f) of piezoelectric thin films measured by double beam laser interferometry was shown to be due to the substrate clamping effects. It was also shown that the true d33,f is measured when the ratio of the electrode size to the substrate thickness is approximately unity, in the case of a substrate with isotropic elastic properties and a Poisson's ratio of ˜0.3. In this paper, we further investigate the dependence of the critical ratio (rc) of the electrode size to the substrate thickness at which the true d33,f is measured on the substrate Poisson's ratio for isotopic substrates and for the important case of the anisotropic Si substrate. It turns out that it is the out-of-plane Poisson's ratio (-s13/s11) that is relevant for this measurement technique and not the in-plane Poisson's ratio which is highly anisotropic for the (001) oriented Si. Furthermore, we show that the transverse effective piezoelectric coefficient (e31,f) can also be determined from the same measurement of the electrode size dependence of d33,f. This provides a convenient non-destructive wafer-level measurement technique for the determination of both the piezoelectric coefficients simultaneously. Moreover, this technique is also capable of measuring e31,f under varying electric field excitation which is important for many applications such as actuators.

  1. The Systems Biology Markup Language (SBML) Level 3 Package: Layout, Version 1 Core.

    Science.gov (United States)

    Gauges, Ralph; Rost, Ursula; Sahle, Sven; Wengler, Katja; Bergmann, Frank Thomas

    2015-09-04

    Many software tools provide facilities for depicting reaction network diagrams in a visual form. Two aspects of such a visual diagram can be distinguished: the layout (i.e.: the positioning and connections) of the elements in the diagram, and the graphical form of the elements (for example, the glyphs used for symbols, the properties of the lines connecting them, and so on). For software tools that also read and write models in SBML (Systems Biology Markup Language) format, a common need is to store the network diagram together with the SBML representation of the model. This in turn raises the question of how to encode the layout and the rendering of these diagrams. The SBML Level 3 Version 1 Core specification does not provide a mechanism for explicitly encoding diagrams, but it does provide a mechanism for SBML packages to extend the Core specification and add additional syntactical constructs. The Layout package for SBML Level 3 adds the necessary features to SBML so that diagram layouts can be encoded in SBML files, and a companion package called SBML Rendering specifies how the graphical rendering of elements can be encoded. The SBML Layout package is based on the principle that reaction network diagrams should be described as representations of entities such as species and reactions (with direct links to the underlying SBML elements), and not as arbitrary drawings or graphs; for this reason, existing languages for the description of vector drawings (such as SVG) or general graphs (such as GraphML) cannot be used.

  2. Handbook of wafer bonding

    CERN Document Server

    Ramm, Peter; Taklo, Maaike M V

    2011-01-01

    Written by an author and editor team from microsystems companies and industry-near research organizations, this handbook and reference presents dependable, first-hand information on bonding technologies.In the first part, researchers from companies and institutions around the world discuss the most reliable and reproducible technologies for the production of bonded wafers. The second part is devoted to current and emerging applications, including microresonators, biosensors and precise measuring devices.

  3. First-time demonstration of measuring concrete prestress levels with metal packaged fibre optic sensors

    Science.gov (United States)

    Mckeeman, I.; Fusiek, G.; Perry, M.; Johnston, M.; Saafi, M.; Niewczas, P.; Walsh, M.; Khan, S.

    2016-09-01

    In this work we present the first large-scale demonstration of metal packaged fibre Bragg grating sensors developed to monitor prestress levels in prestressed concrete. To validate the technology, strain and temperature sensors were mounted on steel prestressing strands in concrete beams and stressed up to 60% of the ultimate tensile strength of the strand. We discuss the methods and calibration procedures used to fabricate and attach the temperature and strain sensors. The use of induction brazing for packaging the fibre Bragg gratings and welding the sensors to prestressing strands eliminates the use of epoxy, making the technique suitable for high-stress monitoring in an irradiated, harsh industrial environment. Initial results based on the first week of data after stressing the beams show the strain sensors are able to monitor prestress levels in ambient conditions.

  4. Understanding the Fundamental Properties of Transfer-Free, Wafer-Level Graphene on Silicon and its Potential for Micro- and Nanodevices

    Science.gov (United States)

    2015-06-18

    quality, uniform bilayer graphene directly was realized on silicon wafers, at temperatures compatible with conventional semiconductor processing. The...conventional semiconductor processing. We demonstrated the highest doping ever reported for graphene (~ 1015 at cm-2, in the same order of magnitude as the...compatible with conventional semiconductor processing. The sheet resistance of the graphene is about 25 ohms/square, unprecedented for Distribution A

  5. Wafer bonding using Cu-Sn intermetallic bonding layers

    NARCIS (Netherlands)

    Flötgen, C.; Pawlak, M.; Pabo, E.; Wiel, H.J. van de; Hayes, G.R.; Dragoi, V.

    2014-01-01

    Wafer-level Cu-Sn intermetallic bonding is an interesting process for advanced applications in the area of MEMS and 3D interconnects. The existence of two intermetallic phases for Cu-Sn system makes the wafer bonding process challenging. The impact of process parameters on final bonding layer

  6. Characterization study of an aqueous developable photosensitive polyimide on 300-mm wafers

    Science.gov (United States)

    Flack, Warren W.; Kulas, Scott; Franklin, Craig L.

    2001-09-01

    The advent of 300 mm wafer processing for semiconductor manufacturing has had a great impact on the development of photolithographic materials, equipment and associated processes. At the same time advanced packaging techniques for these semiconductor devices are making strides for smaller, faster and lower cost parts with improved reliability. Photosensitive polyimides are used for passivation stress buffer relief and soft error protection on almost all memory devices such as DRAM as well as final passivation layers for subsequent interconnect bumping operations on most of today's advanced microprocessors. For processing simplicity and total cost of ownership, it is desirable to use an aqueous developable polyimide to maintain compatibility with standard photoresist processes. This study will investigate the feasibility of processing photosensitive polyimides on 300 mm wafers. The performance of a commercially available, positive acting, aqueous developable polyimide is examined at a thickness appropriate for logic devices. A broadband stepper is utilized since polyimides are highly aromatic polymers that strongly absorb UV light below 350 nm. This stepper exposes photosensitive films using mercury vapor spectrum output from 390 nm to 450 nm (g and h-line) and allows rapid exposure of both broadband as well as narrow spectral sensitive films. The system has been optimized for thick photoresists and polyimides and uses a combination of low numerical aperture with maximum wafer level intensity to achieve well formed images in thick films. Process capability for 300 mm wafers is determined by analyzing polyimide film thickness uniformity and critical dimension (CD) control across the wafer. Basic photoresist characterization techniques such as cross sectional SEM analysis, process linearity and process windows are also used to establish lithographic capabilities. The trade-offs for various process capability windows are reviewed to determine the optimum process

  7. Through-Wafer Optical Interconnects For Multi-Wafer Wafer-Scale Integrated Architectures

    Science.gov (United States)

    Hornak, L. A.; Tewksbury, S. K.; Hatamian, M.; Ligtenberg, A.; Sugla, B.; Franzon, P.

    1986-12-01

    Hybrid mounting of optical components, combined perhaps with integrated optical waveguides and lenses on a large area silicon, wafer-scale integrated (WSI) electronic circuit provides one potential approach to combine advanced electronic and photonic functions. The desire to achieve a high degree of parallelism in multi-wafer WSI-based architectures has stimulated study of three-dimensional interconnect structures obtained by stacking wafer circuit boards and. providing interconnections vertically between wafers over the entire wafer area in addition to planar connections. While presently it is difficult for optical interconnects to compete with electrical interconnects in the wafer plane, it is appropriate to look at vertical optical interconnections between wafer planes since the corresponding conductive structures would be large in area and may impede system repairability. The ability to pass information optically between circuit planes without mechanical electrical contacts offers potential advantages for multi-wafer WSI or other dense three-dimensional architectures. However, while optical waveguides are readily fabricated in the plane of the wafer, waveguiding vertically through the wafer is difficult. If additional processing is required for waveguides or lenses, it should be compatible with standard VLSI processing. This paper presents one straightforward method of meeting this criterion. Using optical device technology operating at wavelengths beyond the ≍1.1μm Si absorption cutoff, low loss, through-wafer propagation between WSI circuit boards can be achieved over the distances of interest (≍1mm) with the interstitial Si wafers as part of the interconnect "free-space" transmission medium. The thickness of existing VLSI layers can be readily adjusted in featureless regions of the wafer to provide antireflection windows such that the transmittance can be raised to ≍77% for n-type and to ≍97% for p-type silicon. Optical interconnect source

  8. Scaling of Fiber Laser Systems Based on Novel Components and High Power Capable Packaging and Joining Technologies

    Science.gov (United States)

    2010-09-01

    l ri Laser Splicing/ Welding r li i / l i Contact Bonding t t i Wafer Level Bonding Mineralic , Fusion. Anodic, Eutectic, Glass-frit, liquid...stress “cold” bonding NO creep NO „out-gassing“ Bonding and Packaging of Optical Components Mineralic Bonding University Glasgow © Fraunhofer IOF

  9. MEMS packaging: state of the art and future trends

    Science.gov (United States)

    Bossche, Andre; Cotofana, Carmen V. B.; Mollinger, Jeff R.

    1998-07-01

    Now that the technology for Integrated sensor and MEMS devices has become sufficiently mature to allow mass production, it is expected that the prices of bare chips will drop dramatically. This means that the package prices will become a limiting factor in market penetration, unless low cost packaging solutions become available. This paper will discuss the developments in packaging technology. Both single-chip and multi-chip packaging solutions will be addressed. It first starts with a discussion on the different requirements that have to be met; both from a device point of view (open access paths to the environment, vacuum cavities, etc.) and from the application point of view (e.g. environmental hostility). Subsequently current technologies are judged on their applicability for MEMS and sensor packaging and a forecast is given for future trends. It is expected that the large majority of sensing devices will be applied in relative friendly environments for which plastic packages would suffice. Therefore, on the short term an important role is foreseen for recently developed plastic packaging techniques such as precision molding and precision dispensing. Just like in standard electronic packaging, complete wafer level packaging methods for sensing devices still have a long way to go before they can compete with the highly optimized and automated plastic packaging processes.

  10. Wafer bonding applications and technology

    CERN Document Server

    Gösele, Ulrich

    2004-01-01

    During the past decade direct wafer bonding has developed into a mature materials integration technology. This book presents state-of-the-art reviews of the most important applications of wafer bonding written by experts from industry and academia. The topics include bonding-based fabrication methods of silicon-on-insulator, photonic crystals, VCSELs, SiGe-based FETs, MEMS together with hybrid integration and laser lift-off. The non-specialist will learn about the basics of wafer bonding and its various application areas, while the researcher in the field will find up-to-date information about this fast-moving area, including relevant patent information.

  11. Laser wafering for silicon solar.

    Energy Technology Data Exchange (ETDEWEB)

    Friedmann, Thomas Aquinas; Sweatt, William C.; Jared, Bradley Howell

    2011-03-01

    Current technology cuts solar Si wafers by a wire saw process, resulting in 50% 'kerf' loss when machining silicon from a boule or brick into a wafer. We want to develop a kerf-free laser wafering technology that promises to eliminate such wasteful wire saw processes and achieve up to a ten-fold decrease in the g/W{sub p} (grams/peak watt) polysilicon usage from the starting polysilicon material. Compared to today's technology, this will also reduce costs ({approx}20%), embodied energy, and green-house gas GHG emissions ({approx}50%). We will use short pulse laser illumination sharply focused by a solid immersion lens to produce subsurface damage in silicon such that wafers can be mechanically cleaved from a boule or brick. For this concept to succeed, we will need to develop optics, lasers, cleaving, and high throughput processing technologies capable of producing wafers with thicknesses < 50 {micro}m with high throughput (< 10 sec./wafer). Wafer thickness scaling is the 'Moore's Law' of silicon solar. Our concept will allow solar manufacturers to skip entire generations of scaling and achieve grid parity with commercial electricity rates. Yet, this idea is largely untested and a simple demonstration is needed to provide credibility for a larger scale research and development program. The purpose of this project is to lay the groundwork to demonstrate the feasibility of laser wafering. First, to design and procure on optic train suitable for producing subsurface damage in silicon with the required damage and stress profile to promote lateral cleavage of silicon. Second, to use an existing laser to produce subsurface damage in silicon, and third, to characterize the damage using scanning electron microscopy and confocal Raman spectroscopy mapping.

  12. Packaging commercial CMOS chips for lab on a chip integration.

    Science.gov (United States)

    Datta-Chaudhuri, Timir; Abshire, Pamela; Smela, Elisabeth

    2014-05-21

    Combining integrated circuitry with microfluidics enables lab-on-a-chip (LOC) devices to perform sensing, freeing them from benchtop equipment. However, this integration is challenging with small chips, as is briefly reviewed with reference to key metrics for package comparison. In this paper we present a simple packaging method for including mm-sized, foundry-fabricated dies containing complementary metal oxide semiconductor (CMOS) circuits within LOCs. The chip is embedded in an epoxy handle wafer to yield a level, large-area surface, allowing subsequent photolithographic post-processing and microfluidic integration. Electrical connection off-chip is provided by thin film metal traces passivated with parylene-C. The parylene is patterned to selectively expose the active sensing area of the chip, allowing direct interaction with a fluidic environment. The method accommodates any die size and automatically levels the die and handle wafer surfaces. Functionality was demonstrated by packaging two different types of CMOS sensor ICs, a bioamplifier chip with an array of surface electrodes connected to internal amplifiers for recording extracellular electrical signals and a capacitance sensor chip for monitoring cell adhesion and viability. Cells were cultured on the surface of both types of chips, and data were acquired using a PC. Long term culture (weeks) showed the packaging materials to be biocompatible. Package lifetime was demonstrated by exposure to fluids over a longer duration (months), and the package was robust enough to allow repeated sterilization and re-use. The ease of fabrication and good performance of this packaging method should allow wide adoption, thereby spurring advances in miniaturized sensing systems.

  13. Bondability of processed glass wafers

    NARCIS (Netherlands)

    Pandraud, G.; Gui, C.; Lambeck, Paul; Pigeon, F.; Parriaux, O.; Gorecki, Christophe

    1999-01-01

    The mechanism of direct bonding at room temperature has been attributed to the short range inter-molecular and inter-atomic attraction forces, such as Van der Waals forces. Consequently, the wafer surface smoothness becomes one of the most critical parameters in this process. High surface roughness

  14. Wafer of Intel Pentium 4 Prescott Chips

    CERN Multimedia

    Silicon wafer with hundreds of Penryn cores (microprocessor). There are around four times as many Prescott chips can be made per wafer than with the previous generation of Northwood-core Pentium 4 processors. It is faster and cheaper.

  15. Feature-based product line instantiation using source-level packages

    NARCIS (Netherlands)

    A. van Deursen (Arie); M. de Jonge (Merijn); T. Kuipers (Tobias)

    2002-01-01

    textabstractIn this paper we discuss the construction of software products from customer-specific feature selections. We address variability management with the Feature Description Language (FDL) to capture variation points of product line architectures. We describe feature packaging which covers

  16. Study of Si wafer surfaces irradiated by gas cluster ion beams

    Energy Technology Data Exchange (ETDEWEB)

    Isogai, H. [Processing Technology, Silicon Business Group, Toshiba Ceramics Co., Ltd., 6-861-5 Higashikou Seiroumachi Kitakanbaragun, Niigata 957-0197 (Japan)]. E-mail: isogai@tocera.co.jp; Toyoda, E. [Processing Technology, Silicon Business Group, Toshiba Ceramics Co., Ltd., 6-861-5 Higashikou Seiroumachi Kitakanbaragun, Niigata 957-0197 (Japan); Senda, T. [Processing Technology, Silicon Business Group, Toshiba Ceramics Co., Ltd., 6-861-5 Higashikou Seiroumachi Kitakanbaragun, Niigata 957-0197 (Japan); Izunome, K. [Processing Technology, Silicon Business Group, Toshiba Ceramics Co., Ltd., 6-861-5 Higashikou Seiroumachi Kitakanbaragun, Niigata 957-0197 (Japan); Kashima, K. [New Business Creation, Toshiba Ceramics Co., Ltd., 30 Soya Hadano City, Kanagawa 257-0031 (Japan); Toyoda, N. [Laboratory of Advanced Science and Technology for Industry, University of Hyogo, 3-1-2 Kouto Kamigouri, Hyogo 678-1205 (Japan); Yamada, I. [Laboratory of Advanced Science and Technology for Industry, University of Hyogo, 3-1-2 Kouto Kamigouri, Hyogo 678-1205 (Japan)

    2007-04-15

    The surface structures of Si (1 0 0) wafers subjected to gas cluster ion beam (GCIB) irradiation have been analyzed by cross-sectional transmission electron microscopy (XTEM) and atomic force microscopy (AFM). GCIB irradiation is a promising technique for both precise surface etching and planarization of Si wafers. However, it is very important to understand the crystalline structure of Si wafers after GCIB irradiation. An Ar-GCIB used for the physically sputtering of Si atoms and a SF{sub 6}-GCIB used for the chemical etching of the Si surface are also analyzed. The GCIB irradiation increases the surface roughness of the wafers, and amorphous Si layers are formed on the wafer surface. However, when the Si wafers are annealed in hydrogen at a high temperature after the GCIB irradiation, the surface roughness decreases to the same level as that before the irradiation. Moreover, the amorphous Si layers disappear completely.

  17. Wafering economies for industrialization from a wafer manufacturer's viewpoint

    Science.gov (United States)

    Rosenfield, T. P.; Fuerst, F. P.

    1982-01-01

    The key technical limitations which inhibit the lowering of value-added costs for state-of-the-art wafering techniques are assessed. From the best experimental results to date, a projection was made to identify those parts of each system which need to be developed in order to meet or improve upon the value-added cost reduction necessary for $0.70/Wp photovoltaics modules.

  18. Wafer hot spot identification through advanced photomask characterization techniques: part 2

    Science.gov (United States)

    Choi, Yohan; Green, Michael; Cho, Young; Ham, Young; Lin, Howard; Lan, Andy; Yang, Richer; Lung, Mike

    2017-03-01

    Historically, 1D metrics such as Mean to Target (MTT) and CD Uniformity (CDU) have been adequate for mask end users to evaluate and predict the mask impact on the wafer process. However, the wafer lithographer's process margin is shrinking at advanced nodes to a point that classical mask CD metrics are no longer adequate to gauge the mask contribution to wafer process error. For example, wafer CDU error at advanced nodes is impacted by mask factors such as 3-dimensional (3D) effects and mask pattern fidelity on sub-resolution assist features (SRAFs) used in Optical Proximity Correction (OPC) models of ever-increasing complexity. To overcome the limitation of 1D metrics, there are numerous on-going industry efforts to better define wafer-predictive metrics through both standard mask metrology and aerial CD methods. Even with these improvements, the industry continues to struggle to define useful correlative metrics that link the mask to final device performance. In part 1 of this work, we utilized advanced mask pattern characterization techniques to extract potential hot spots on the mask and link them, theoretically, to issues with final wafer performance. In this paper, part 2, we complete the work by verifying these techniques at wafer level. The test vehicle (TV) that was used for hot spot detection on the mask in part 1 will be used to expose wafers. The results will be used to verify the mask-level predictions. Finally, wafer performance with predicted and verified mask/wafer condition will be shown as the result of advanced mask characterization. The goal is to maximize mask end user yield through mask-wafer technology harmonization. This harmonization will provide the necessary feedback to determine optimum design, mask specifications, and mask-making conditions for optimal wafer process margin.

  19. Board Level Proton Testing Book of Knowledge for NASA Electronic Parts and Packaging Program

    Science.gov (United States)

    Guertin, Steven M.

    2017-01-01

    This book of knowledge (BoK) provides a critical review of the benefits and difficulties associated with using proton irradiation as a means of exploring the radiation hardness of commercial-off-the-shelf (COTS) systems. This work was developed for the NASA Electronic Parts and Packaging (NEPP) Board Level Testing for the COTS task. The fundamental findings of this BoK are the following. The board-level test method can reduce the worst case estimate for a board's single-event effect (SEE) sensitivity compared to the case of no test data, but only by a factor of ten. The estimated worst case rate of failure for untested boards is about 0.1 SEE/board-day. By employing the use of protons with energies near or above 200 MeV, this rate can be safely reduced to 0.01 SEE/board-day, with only those SEEs with deep charge collection mechanisms rising this high. For general SEEs, such as static random-access memory (SRAM) upsets, single-event transients (SETs), single-event gate ruptures (SEGRs), and similar cases where the relevant charge collection depth is less than 10 µm, the worst case rate for SEE is below 0.001 SEE/board-day. Note that these bounds assume that no SEEs are observed during testing. When SEEs are observed during testing, the board-level test method can establish a reliable event rate in some orbits, though all established rates will be at or above 0.001 SEE/board-day. The board-level test approach we explore has picked up support as a radiation hardness assurance technique over the last twenty years. The approach originally was used to provide a very limited verification of the suitability of low cost assemblies to be used in the very benign environment of the International Space Station (ISS), in limited reliability applications. Recently the method has been gaining popularity as a way to establish a minimum level of SEE performance of systems that require somewhat higher reliability performance than previous applications. This sort of application of

  20. HFOLD - A program package for calculating two-body MSSM Higgs decays at full one-loop level.

    Science.gov (United States)

    Frisch, W; Eberl, H; Hluchá, H

    2011-10-01

    HFOLD (Higgs Full One Loop Decays) is a Fortran program package for calculating all MSSM Higgs two-body decay widths and the corresponding branching ratios at full one-loop level. The package is done in the SUSY Parameter Analysis convention and supports the SUSY Les Houches Accord input and output format. PROGRAM SUMMARY: Program title: HFOLD Catalogue identifier: AEJG_v1_0 Program summary URL:http://cpc.cs.qub.ac.uk/summaries/AEJG_v1_0.html Program obtainable from: CPC Program Library, Queen's University, Belfast, N. Ireland Licensing provisions: Standard CPC licence, http://cpc.cs.qub.ac.uk/licence/licence.html No. of lines in distributed program, including test data, etc.: 340 621 No. of bytes in distributed program, including test data, etc.: 1 760 051 Distribution format: tar.gz Programming language: Fortran 77 Computer: Workstation, PC Operating system: Linux RAM: 524 288 000 Bytes Classification: 11.1 External routines: LoopTools 2.2 (http://www.feynarts.de/looptools/), SLHALib 2.2 (http://www.feynarts.de/slha/). The LoopTools code is included in the distribution package. Nature of problem: A future high-energy e+e- linear collider will be the best environment for the precise measurements of masses, cross sections, branching ratios, etc. Experimental accuracies are expected at the per-cent down to the per-mile level. These must be matched from the theoretical side. Therefore higher order calculations are mandatory. Solution method: This program package calculates all MSSM Higgs two-body decay widths and the corresponding branching ratios at full one-loop level. The renormalization is done in the DR scheme following the SUSY Parameter Analysis convention. The program supports the SUSY Les Houches Accord input and output format. Running time: The example provided takes only a few seconds to run.

  1. An Assessment of the Influence of the Industry Distribution Chain on the Oxygen Levels in Commercial Modified Atmosphere Packaged Cheddar Cheese Using Non-Destructive Oxygen Sensor Technology.

    Science.gov (United States)

    O' Callaghan, Karen A M; Papkovsky, Dmitri B; Kerry, Joseph P

    2016-06-20

    The establishment and control of oxygen levels in packs of oxygen-sensitive food products such as cheese is imperative in order to maintain product quality over a determined shelf life. Oxygen sensors quantify oxygen concentrations within packaging using a reversible optical measurement process, and this non-destructive nature ensures the entire supply chain can be monitored and can assist in pinpointing negative issues pertaining to product packaging. This study was carried out in a commercial cheese packaging plant and involved the insertion of 768 sensors into 384 flow-wrapped cheese packs (two sensors per pack) that were flushed with 100% carbon dioxide prior to sealing. The cheese blocks were randomly assigned to two different storage groups to assess the effects of package quality, packaging process efficiency, and handling and distribution on package containment. Results demonstrated that oxygen levels increased in both experimental groups examined over the 30-day assessment period. The group subjected to a simulated industrial distribution route and handling procedures of commercial retailed cheese exhibited the highest level of oxygen detected on every day examined and experienced the highest rate of package failure. The study concluded that fluctuating storage conditions, product movement associated with distribution activities, and the possible presence of cheese-derived contaminants such as calcium lactate crystals were chief contributors to package failure.

  2. Annotated bibliography for the design of waste packages for geologic disposal of spent fuel and high-level waste

    Energy Technology Data Exchange (ETDEWEB)

    Wurm, K.J.; Miller, N.E.

    1982-11-01

    This bibliography identifies documents that are pertinent to the design of waste packages for geologic disposal of nuclear waste. The bibliography is divided into fourteen subject categories so that anyone wishing to review the subject of leaching, for example, can turn to the leaching section and review the abstracts of reports which are concerned primarily with leaching. Abstracts are also cross referenced according to secondary subject matter so that one can get a complete list of abstracts for any of the fourteen subject categories. All documents which by their title alone appear to deal with the design of waste packages for the geologic disposal of spent fuel or high-level waste were obtained and reviewed. Only those documents which truly appear to be of interest to a waste package designer were abstracted. The documents not abstracted are listed in a separate section. There was no beginning date for consideration of a document for review. About 1100 documents were reviewed and about 450 documents were abstracted.

  3. Associations between Campylobacter levels on chicken skin, underlying muscle, caecum and packaged fillets.

    Science.gov (United States)

    Hansson, I; Nyman, A; Lahti, E; Gustafsson, P; Olsson Engvall, E

    2015-06-01

    A study was performed with the aim to investigate associations between Campylobacter in chicken caecum, carcass skin, underlying breast muscle and packaged breast fillets. Samples were taken from 285 chickens from 57 flocks and analysed according to ISO 10272. Campylobacter spp. were isolated from caecal samples from 41 flocks. From birds of the same 41 flocks Campylobacter could be detected and quantified in 194 (68%) skin samples. Moreover, Campylobacter spp. were enumerated in 13 (5%) underlying muscle samples originating from 9 of the 41 flocks. The mean number of Campylobacter spp. in the 194 skin samples which could be counted was 2.3 log cfu/g and for the 13 underlying muscle samples 1.3 log cfu/g. Campylobacter could only be quantified in those breast muscle samples with a finding in corresponding skin sample. Five packaged chicken fillets were taken from each 25 of the 57 flocks and analysed both quantitatively and qualitatively. In qualitative analysis Campylobacter was detected in 79 (63%) fillets from 16 flocks and quantified in 24 (19%) samples from 11 flocks. The results showed a significant association (P Campylobacter on carcass skin (log cfu/g) and the proportion of Campylobacter positive breast muscle samples. Copyright © 2015 Elsevier Ltd. All rights reserved.

  4. Improving matrix-vector product performance and multi-level preconditioning for the parallel PCG package

    Energy Technology Data Exchange (ETDEWEB)

    McLay, R.T.; Carey, G.F.

    1996-12-31

    In this study we consider parallel solution of sparse linear systems arising from discretized PDE`s. As part of our continuing work on our parallel PCG Solver package, we have made improvements in two areas. The first is improving the performance of the matrix-vector product. Here on regular finite-difference grids, we are able to use the cache memory more efficiently for smaller domains or where there are multiple degrees of freedom. The second problem of interest in the present work is the construction of preconditioners in the context of the parallel PCG solver we are developing. Here the problem is partitioned over a set of processors subdomains and the matrix-vector product for PCG is carried out in parallel for overlapping grid subblocks. For problems of scaled speedup, the actual rate of convergence of the unpreconditioned system deteriorates as the mesh is refined. Multigrid and subdomain strategies provide a logical approach to resolving the problem. We consider the parallel trade-offs between communication and computation and provide a complexity analysis of a representative algorithm. Some preliminary calculations using the parallel package and comparisons with other preconditioners are provided together with parallel performance results.

  5. Wafer scale oblique angle plasma etching

    Energy Technology Data Exchange (ETDEWEB)

    Burckel, David Bruce; Jarecki, Jr., Robert L.; Finnegan, Patrick Sean

    2017-05-23

    Wafer scale oblique angle etching of a semiconductor substrate is performed in a conventional plasma etch chamber by using a fixture that supports a multiple number of separate Faraday cages. Each cage is formed to include an angled grid surface and is positioned such that it will be positioned over a separate one of the die locations on the wafer surface when the fixture is placed over the wafer. The presence of the Faraday cages influences the local electric field surrounding each wafer die, re-shaping the local field to be disposed in alignment with the angled grid surface. The re-shaped plasma causes the reactive ions to follow a linear trajectory through the plasma sheath and angled grid surface, ultimately impinging the wafer surface at an angle. The selected geometry of the Faraday cage angled grid surface thus determines the angle at with the reactive ions will impinge the wafer.

  6. High Speed On-Wafer Characterization Laboratory

    Data.gov (United States)

    Federal Laboratory Consortium — At the High Speed On-Wafer Characterization Laboratory, researchers characterize and model devices operating at terahertz (THz) and millimeter-wave frequencies. The...

  7. Waste Package Lifting Calculation

    Energy Technology Data Exchange (ETDEWEB)

    H. Marr

    2000-05-11

    The objective of this calculation is to evaluate the structural response of the waste package during the horizontal and vertical lifting operations in order to support the waste package lifting feature design. The scope of this calculation includes the evaluation of the 21 PWR UCF (pressurized water reactor uncanistered fuel) waste package, naval waste package, 5 DHLW/DOE SNF (defense high-level waste/Department of Energy spent nuclear fuel)--short waste package, and 44 BWR (boiling water reactor) UCF waste package. Procedure AP-3.12Q, Revision 0, ICN 0, calculations, is used to develop and document this calculation.

  8. Effect of oxygen level on the oxidative stability of two different retail pork products stored using modified atmosphere packaging (MAP)

    DEFF Research Database (Denmark)

    Spanos, Dimitrios; Ann Tørngren, Mari; Christensen, Mette

    2016-01-01

    The characteristics and the oxidative stability of pork steaks and of pork mince were investigated during 2, 5 and 7 days of refrigerated storage using oxygen (O2) levels of 0%, 20%, 50% and 80% in modified atmosphere packaging (MAP). Steaks stored during 7 days were not affected by an increase i......%) O2 MAP. The results show that fresh pork products are affected differently by the MAP O2 concentration and strongly indicate that optimisation of MAP based on the retail product type would be of considerable benefit to their oxidative stability....... in O2 concentration, as revealed by lipid and protein oxidation markers. In contrast, the mince was characterised by an altered protein profile, loss of free thiol groups and increased protein oxidation, early during storage. The oxidative stability of pork mince was improved by using intermediate (50......The characteristics and the oxidative stability of pork steaks and of pork mince were investigated during 2, 5 and 7 days of refrigerated storage using oxygen (O2) levels of 0%, 20%, 50% and 80% in modified atmosphere packaging (MAP). Steaks stored during 7 days were not affected by an increase...

  9. Scaling Up a Multifaceted Violence Prevention Package: County-Level Impact of the North Carolina Youth Violence Prevention Center.

    Science.gov (United States)

    Smokowski, Paul R; Cotter, Katie L; Guo, Shenyang; Evans, Caroline Bill Robertson

    2017-01-01

    Multifaceted approaches to youth-violence prevention package evidence-based programs into initiatives that yield large-scale impact. This study assessed the impact of a package of evidence-based violence prevention programs, implemented as part of the North Carolina Youth Violence Prevention Center, on county-level violence indicators. Using growth-curve modeling, the target county was compared to all other counties in North Carolina and a comparison county. Results reveal downward trends on several county-level indicators (i.e., undisciplined/delinquent complaints, total delinquent complaints, juvenile arrests-aggravated assaults, and short-term suspensions) throughout the intervention period. However, statistical tests were unable to confirm that intervention-period scores on youth-violence indicators were significantly different than expected scores given the relationship between pretest and intervention-period scores in other North Carolina counties. Although additional administrative data points are needed to support the hypotheses, this study provides preliminary evidence of the effectiveness of North Carolina Youth Violence Prevention Center interventions.

  10. Classifier combination for wafer segmentation

    Science.gov (United States)

    Bourgeat, Pierrick T.; Meriaudeau, Fabrice

    2005-02-01

    In the last decade, the accessibility of inexpensive and powerful computers has allowed true digital holography to be used for industrial inspection. This technique allows capturing a complex image of a scene (i.e. containing magnitude and phase), and reconstructing the phase and magnitude information. Digital holograms give a new dimension to texture analysis since the topology information can be used as an additional way to extract features. This new technique can be used to extend previous work on image segmentation of patterned wafers for defect detection. This paper presents a combination of features obtained from Gabor filters on different complex images. The combination enables to cope with the intensity variations occurring during the holography and provides final results which are independent from the selected training samples.

  11. Conceptual waste package interim product specifications and data requirements for disposal of borosilicate glass defense high-level waste forms in salt geologic repositories

    Energy Technology Data Exchange (ETDEWEB)

    1983-06-01

    The conceptual waste package interim product specifications and data requirements presented are applicable specifically to the normal borosilicate glass product of the Defense Waste Processing Facility (DWPF). They provide preliminary numerical values for the defense high-level waste form parameters and properties identified in the waste form performance specification for geologic isolation in salt repositories. Subject areas treated include containment and isolation, operational period safety, criticality control, waste form/production canister identification, and waste package performance testing requirements. This document was generated for use in the development of conceptual waste package designs in salt. It will be revised as additional data, analyses, and regulatory requirements become available.

  12. Fabricating Capacitive Micromachined Ultrasonic Transducers with Wafer Bonding Technique

    OpenAIRE

    Anil ARORA; Ram GOPAL; V K DWIVEDI; Chandra SHEKHAR

    2008-01-01

    We report the fabrication of capacitive micromachined ultrasonic transducer by wafer bonding technique. Membrane is transferred from SOI wafer to the prime wafer having silicon dioxide cavity. The thickness of cavity height depends on silicon dioxide grown on prime wafer by dry/wet oxidation. Thinning of device wafer of SOI by oxidation, controls membrane thickness. Two wafers are bonded in vacuum under optimized controlled parameters. Using this method, we can get single crystal silicon as m...

  13. Self-aligned 0-level sealing of MEMS devices by a two layer thin film reflow process

    NARCIS (Netherlands)

    Rusu, C.R.; Jansen, Henricus V.; Gunn, R.; Witvrouw, A.

    2004-01-01

    Many micro electromechanical systems (MEMS) require a vacuum or controlled atmosphere encapsulation in order to ensure either a good performance or an acceptable lifetime of operation. Two approaches for waferscale zero-level packaging exist. The most popular approach is based on wafer bonding.

  14. Photonic Packaging: Transforming Silicon Photonic Integrated Circuits into Photonic Devices

    Directory of Open Access Journals (Sweden)

    Lee Carroll

    2016-12-01

    Full Text Available Dedicated multi-project wafer (MPW runs for photonic integrated circuits (PICs from Si foundries mean that researchers and small-to-medium enterprises (SMEs can now afford to design and fabricate Si photonic chips. While these bare Si-PICs are adequate for testing new device and circuit designs on a probe-station, they cannot be developed into prototype devices, or tested outside of the laboratory, without first packaging them into a durable module. Photonic packaging of PICs is significantly more challenging, and currently orders of magnitude more expensive, than electronic packaging, because it calls for robust micron-level alignment of optical components, precise real-time temperature control, and often a high degree of vertical and horizontal electrical integration. Photonic packaging is perhaps the most significant bottleneck in the development of commercially relevant integrated photonic devices. This article describes how the key optical, electrical, and thermal requirements of Si-PIC packaging can be met, and what further progress is needed before industrial scale-up can be achieved.

  15. Greater-than-Class C low-level radioactive waste shipping package/container identification and requirements study. National Low-Level Waste Management Program

    Energy Technology Data Exchange (ETDEWEB)

    Tyacke, M.

    1993-08-01

    This report identifies a variety of shipping packages (also referred to as casks) and waste containers currently available or being developed that could be used for greater-than-Class C (GTCC) low-level waste (LLW). Since GTCC LLW varies greatly in size, shape, and activity levels, the casks and waste containers that could be used range in size from small, to accommodate a single sealed radiation source, to very large-capacity casks/canisters used to transport or dry-store highly radioactive spent fuel. In some cases, the waste containers may serve directly as shipping packages, while in other cases, the containers would need to be placed in a transport cask. For the purpose of this report, it is assumed that the generator is responsible for transporting the waste to a Department of Energy (DOE) storage, treatment, or disposal facility. Unless DOE establishes specific acceptance criteria, the receiving facility would need the capability to accept any of the casks and waste containers identified in this report. In identifying potential casks and waste containers, no consideration was given to their adequacy relative to handling, storage, treatment, and disposal. Those considerations must be addressed separately as the capabilities of the receiving facility and the handling requirements and operations are better understood.

  16. Effect of oxygen level on the oxidative stability of two different retail pork products stored using modified atmosphere packaging (MAP).

    Science.gov (United States)

    Spanos, Dimitrios; Tørngren, Mari Ann; Christensen, Mette; Baron, Caroline P

    2016-03-01

    The characteristics and the oxidative stability of pork steaks and of pork mince were investigated during 2, 5 and 7days of refrigerated storage using oxygen (O2) levels of 0%, 20%, 50% and 80% in modified atmosphere packaging (MAP). Steaks stored during 7days were not affected by an increase in O2 concentration, as revealed by lipid and protein oxidation markers. In contrast, the mince was characterised by an altered protein profile, loss of free thiol groups and increased protein oxidation, early during storage. The oxidative stability of pork mince was improved by using intermediate (50%) O2 MAP. The results show that fresh pork products are affected differently by the MAP O2 concentration and strongly indicate that optimisation of MAP based on the retail product type would be of considerable benefit to their oxidative stability. Copyright © 2015 Elsevier Ltd. All rights reserved.

  17. Trace metal Levels in Some Packaged Fruit Juices Sold in Makurdi ...

    African Journals Online (AJOL)

    MBI

    2015-12-13

    Dec 13, 2015 ... transportation (Yuzbasi et al., 2009). The increasing demand for food and food safety has drawn ... levels of some cubes and food condiments readily consumed in Nigeria have also been reported. (Borom et al ... analyzed prior to their expiration dates. Wet digestion method was employed in the analysis.

  18. Evaluation of the data available for estimating release rates from commercial low-level waste packages

    Energy Technology Data Exchange (ETDEWEB)

    Sullivan, T.M.; Cowgill, M.G.

    1991-12-31

    In this paper, an overview of our findings concerning the distribution of activity within low-level radioactive wastes will be presented. This will begin in a general fashion and consider the distribution of the total activity by each of the following: waste class, waste stream, wasteform, and waste container. A radionuclide specific breakdown by waste class and wasteform follows. The findings are reviewed in terms of performance assessment modeling needs. Finally, we present our conclusions.

  19. Infrared differential interference contrast microscopy for overlay metrology on 3D-interconnect bonded wafers

    Science.gov (United States)

    Ku, Yi-sha; Shyu, Deh-Ming; Lin, Yeou-Sung; Cho, Chia-Hung

    2013-04-01

    Overlay metrology for stacked layers will be playing a key role in bringing 3D IC devices into manufacturing. However, such bonded wafer pairs present a metrology challenge for optical microscopy tools by the opaque nature of silicon. Using infrared microscopy, silicon wafers become transparent to the near-infrared (NIR) wavelengths of the electromagnetic spectrum, enabling metrology at the interface of bonded wafer pairs. Wafers can be bonded face to face (F2F) or face to back (F2B) which the stacking direction is dictated by how the stacks are carried in the process and functionality required. For example, Memory stacks tend to use F2B stacking enables a better managed design. Current commercial tools use single image technique for F2F bonding overlay measurement because depth of focus is sufficient to include both surfaces; and use multiple image techniques for F2B overlay measurement application for the depth of focus is no longer sufficient to include both stacked wafer surfaces. There is a need to specify the Z coordinate or stacking wafer number through the silicon when visiting measurement wafer sites. Two shown images are of the same (X, Y) but separate Z location acquired at focus position of each wafer surface containing overlay marks. Usually the top surface image is bright and clear; however, the bottom surface image is somewhat darker and noisier as an adhesive layer is used in between to bond the silicon wafers. Thus the top and bottom surface images are further processed to achieve similar brightness and noise level before merged for overlay measurement. This paper presents a special overlay measurement technique, using the infrared differential interference contrast (DIC) microscopy technique to measure the F2B wafer bonding overlay by a single shot image. A pair of thinned wafers at 50 and 150 μm thickness is bonded on top of a carrier wafer to evaluate the bonding overlay. It works on the principle of interferometry to gain information about the

  20. Industrial Silicon Wafer Solar Cells

    Directory of Open Access Journals (Sweden)

    Dirk-Holger Neuhaus

    2007-01-01

    Full Text Available In 2006, around 86% of all wafer-based silicon solar cells were produced using screen printing to form the silver front and aluminium rear contacts and chemical vapour deposition to grow silicon nitride as the antireflection coating onto the front surface. This paper reviews this dominant solar cell technology looking into state-of-the-art equipment and corresponding processes for each process step. The main efficiency losses of this type of solar cell are analyzed to demonstrate the future efficiency potential of this technology. In research and development, more various advanced solar cell concepts have demonstrated higher efficiencies. The question which arises is “why are new solar cell concepts not transferred into industrial production more frequently?”. We look into the requirements a new solar cell technology has to fulfill to have an advantage over the current approach. Finally, we give an overview of high-efficiency concepts which have already been transferred into industrial production.

  1. Innovative metal thermo-compression wafer bonding for microelectronics and MEMS devices

    Science.gov (United States)

    Rebhan, B.; Dragoi, V.

    2017-06-01

    With the continuously increasing level of integration for microelectronics and microelectromechanical systems (MEMS) devices, such as gyroscopes, accelerometers and bolometers, metal wafer bonding becomes progressively more importance. In the present work common metal wafer bonding techniques were categorized, described and compared. While devices produced with metal thermo-compression wafer bonding ensure high bonding quality and a high degree of reliability, the required bonding temperatures are very often close to the maximum complementary metal oxide semiconductor (CMOS) compatible process temperature (400-450°C). Based on a thermodynamic model of increasing the Gibbs free energy prior wafer bonding, in-situ ComBond(R) surface activation was applied to enable low-temperature Au-Au, Al-Al and Cu-Cu wafer bonding. Different aspects, such as bonding quality, dicing yield, bond strength, grain growth and elemental analysis across the initial bonding interface, were investigated. Based on these parameters successful wafer bonding was demonstrated at room temperature for Au-Au and Cu-Cu, and at 100°C for Al-Al wafer bonding.

  2. Silicon Wafer X-ray Mirror Project

    Data.gov (United States)

    National Aeronautics and Space Administration — In this one year research project, we propose to do the following four tasks; (1) Design the silicon wafer X-ray mirror demo unit and develop a ray-tracing code to...

  3. Silicon Wafer X-ray Mirror Project

    Data.gov (United States)

    National Aeronautics and Space Administration — In this one year research project, we propose to do the following four tasks;(1) Design the silicon wafer X-ray mirror demo unit and develop a ray-tracing code to...

  4. Modelling deformation and fracture in confectionery wafers

    Energy Technology Data Exchange (ETDEWEB)

    Mohammed, Idris K.; Charalambides, Maria N.; Williams, J. Gordon; Rasburn, John [Mechanical Engineering Department, Imperial College London, South Kensington, London, SW7 2AZ, United Kingdom and Nestec York Ltd., Nestlé Product Technology Centre, Haxby Road, PO Box 204, York YO91 1XY (United Kingdom)

    2015-01-22

    The aim of this research is to model the deformation and fracture behaviour of brittle wafers often used in chocolate confectionary products. Three point bending and compression experiments were performed on beam and circular disc samples respectively to determine the 'apparent' stress-strain curves in bending and compression. The deformation of the wafer for both these testing types was observed in-situ within an SEM. The wafer is modeled analytically and numerically as a composite material with a core which is more porous than the skins. X-ray tomography was used to generate a three dimensional volume of the wafer microstructure which was then meshed and used for quantitative analysis. A linear elastic material model, with a damage function and element deletion, was used and the XMT generated architecture was loaded in compression. The output from the FE simulations correlates closely to the load-deflection deformation observed experimentally.

  5. Modelling deformation and fracture in confectionery wafers

    Science.gov (United States)

    Mohammed, Idris K.; Charalambides, Maria N.; Williams, J. Gordon; Rasburn, John

    2015-01-01

    The aim of this research is to model the deformation and fracture behaviour of brittle wafers often used in chocolate confectionary products. Three point bending and compression experiments were performed on beam and circular disc samples respectively to determine the 'apparent' stress-strain curves in bending and compression. The deformation of the wafer for both these testing types was observed in-situ within an SEM. The wafer is modeled analytically and numerically as a composite material with a core which is more porous than the skins. X-ray tomography was used to generate a three dimensional volume of the wafer microstructure which was then meshed and used for quantitative analysis. A linear elastic material model, with a damage function and element deletion, was used and the XMT generated architecture was loaded in compression. The output from the FE simulations correlates closely to the load-deflection deformation observed experimentally.

  6. Packaging fluency

    DEFF Research Database (Denmark)

    Mocanu, Ana; Chrysochou, Polymeros; Bogomolova, Svetlana

    2011-01-01

    Research on packaging stresses the need for packaging design to read easily, presuming fast and accurate processing of product-related information. In this paper we define this property of packaging as “packaging fluency”. Based on the existing marketing and cognitive psychology literature...

  7. Laterally self-oscillated and force-balanced microvibratory gyroscope packaged in a vacuum package with a conditioning ASIC

    Science.gov (United States)

    Park, Kyu-Yeon; Lee, Chong-Won; Oh, Yong-Soo; Lee, Byeungleul

    1997-11-01

    A novel concept self-oscillator and dynamically tunable micro vibratory gyroscope, where oscillating, position- sensing and force-balancing take place on the wafer surface, has been developed. The gyroscope consists of: a grid-type planar mass which oscillates on the wafer surface; pairs of the differential capacitor type with LT shape position sense electrodes; a pair of force-balancing electrodes; oppositely placed comb-drive and comb-sensor for mass self-oscillation; fish hook shape springs to match the first and second modes with the mass oscillating and position sensing modes, respectively. The natural frequency of the position sensing mode is lowered and tuned by the DC bias voltage applied to the position sense electrodes and then finely tuned by DC bias on a pair of force-balancing electrodes. To reduce the mass exciting along the sensing direction, we drive the mass by the same DC and opposite AC driving voltage on the oppositely placed comb-drives. It also features that the position sensing electric interference ins reduced. The mass is self-oscillated by the condition of limit cycle, so the mass is always oscillated in the natural frequency even if the natural frequency is varied by the environment and/or it has displacement-force nonlinear behavior. The gyroscope is fabricated on the silicon wafer by surface micromachining technology and the polysilicon is used as an active structure. The gyroscope has an active size of 700 by 600 micro meters, the thickness of the structure is 7 micron meters and the proof mass of 1 micro gram. To improve the resolution of the gyro, it is packaged in the 50 mili-torr vacuum package with a conditioning ASIC. Experimental results show that the gyroscope has the equivalent noise level of 0.1 deg/sec at 2 Hz, the bandwidth of 100 Hz, linearity of 1 percent FS and the sensing range of 90 deg/sec.

  8. Dominant iron gettering mechanism in p/p+ silicon wafers

    Science.gov (United States)

    Lin, Wen; Benton, J. L.; Pinacho, R.; Ramappa, D. A.; Henley, W.

    2000-07-01

    Fe gettering mechanisms in p/p+ epitaxial Si were investigated under controlled contamination and annealing cycles. The dominant Fe gettering mechanism is the Fermi level controlled coulomb attraction between Fe+ and B- in the p+ substrate of the p/p+ wafers. Oxygen precipitates do not appear to contribute when using normal cooling rates following heat treatments. The epi-substrate interfacial strain plays no role in Fe gettering.

  9. Wafer Cakes of Improved Amino Acid Structure

    Directory of Open Access Journals (Sweden)

    Roksolana Boidunyk

    2017-11-01

    Full Text Available The article presents the results of the study of the amino acid composition of newly developed wafer cakes with adipose fillings combined with natural additives. The appropriateness of the using non-traditional raw materials (powder of willow herb, poppy oilcake, carob, as well as skimmed milk powder in order to increase the biological value of wafer cakes and improve their amino acid composition is proven.

  10. EEI`s wafer-cell bipolar battery: Versatile technology for a variety of military systems

    Energy Technology Data Exchange (ETDEWEB)

    Brown, J.T.; Klein, M.G.; Reisner, D.E. [Electro Energy, Inc., Danbury, CT (United States)

    1996-11-01

    A new versatile cell design based on stackable wafer cells is described which forms the unit building block of a new generation of bipolar battery systems for a wide variety of military applications. Current is transported across an outer envelope of conductive plastic film. This innovative bipolar design approach offers improved energy density based on more efficient packaging in prismatic containers as well as elimination of cell hardware. Higher power capability is achieved from the intrinsic low resistance operation in a bipolar mode. These performance improvements are achieved in a low-cost package by virtue of the design simplicity and use of non-graphitic plastic-bonded electrodes. EEI has demonstrated the viability of the wafer cell approach in Ni-MH with sealed cell cycle life in excess of 2,000 cycles. Results are also reported for Ag-MH.

  11. New vacuum packaging method of field emission display

    Science.gov (United States)

    Ju, Byeong-Kwon; Choi, Woo-Beom; Jeong, S. J.; Lee, Nam Young; Han, Jeong-In; Cho, K. I.; Oh, Myung-Hwan

    1997-11-01

    Two ITO-coated glass wafers are successfully bonded by the typical Si-Pyrex electrostatic bonding mechanism. Both Si- 7740 and Ti-(Li-doped SiO$02)) interlayer systems can be employed for the electrostatic bonding of 7059-7059 and 0080-0080 glass wafer pairs. This glass-to-glass electrostatic bonding process can be applied to the clean and tubeless packaging of field emission display panels.

  12. The influence of silicon wafer thickness on characteristics of multijunction solar cells with vertical p—n-junctions

    Directory of Open Access Journals (Sweden)

    Gnilenko A. B.

    2012-02-01

    Full Text Available A multijunction silicon solar cell with vertical p–n junctions consisted of four serial n+–p–p+-structures was simulated using Silvaco TCAD software package. The dependence of solar cell characteristics on the silicon wafer thickness is investigated for a wide range of values.

  13. Metal adsorbent for alkaline etching aqua solutions of Si wafer

    Science.gov (United States)

    Tamada, Masao; Ueki, Yuji; Seko, Noriaki; Takeda, Toshihide; Kawano, Shin-ichi

    2012-08-01

    High performance adsorbent is expected to be synthesized for the removal of Ni and Cu ions from strong alkaline solution used in the surface etching process of Si wafer. Fibrous adsorbent was synthesized by radiation-induce emulsion graft polymerization onto polyethylene nonwoven fabric and subsequent amination. The reaction condition was optimized using 30 L reaction vessel and nonwoven fabric, 0.3 m width and 18 m long. The resulting fibrous adsorbent was evaluated by 48 wt% NaOH and KOH contaminated with Ni and Cu ions, respectively. The concentration levels of Ni and Cu ions was reduced to less than 1 μg/kg (ppb) at the flow rate of 10 h-1 in space velocity. The life of adsorbent was 30 times higher than that of the commercialized resin. This novel adsorbent was commercialized as METOLATE® since the ability of adsorption is remarkably higher than that of commercial resin used practically in Si wafer processing.

  14. Silicon Wafer-Scale Substrate for Microshutters and Detector Arrays

    Science.gov (United States)

    Jhabvala, Murzy; Franz, David E.; Ewin, Audrey J.; Jhabvala, Christine; Babu, Sachi; Snodgrass, Stephen; Costen, Nicholas; Zincke, Christian

    2009-01-01

    The silicon substrate carrier was created so that a large-area array (in this case 62,000+ elements of a microshutter array) and a variety of discrete passive and active devices could be mounted on a single board, similar to a printed circuit board. However, the density and number of interconnects far exceeds the capabilities of printed circuit board technology. To overcome this hurdle, a method was developed to fabricate this carrier out of silicon and implement silicon integrated circuit (IC) technology. This method achieves a large number of high-density metal interconnects; a 100-percent yield over a 6-in. (approximately equal to 15-cm) diameter wafer (one unit per wafer); a rigid, thermally compatible structure (all components and operating conditions) to cryogenic temperatures; re-workability and component replaceability, if required; and the ability to precisely cut large-area holes through the substrate. A method that would employ indium bump technology along with wafer-scale integration onto a silicon carrier was also developed. By establishing a silicon-based version of a printed circuit board, the objectives could be met with one solution. The silicon substrate would be 2 mm thick to survive the environmental loads of a launch. More than 2,300 metal traces and over 1,500 individual wire bonds are required. To mate the microshutter array to the silicon substrate, more than 10,000 indium bumps are required. A window was cut in the substrate to allow the light signal to pass through the substrate and reach the microshutter array. The substrate was also the receptacle for multiple unpackaged IC die wire-bonded directly to the substrate (thus conserving space over conventionally packaged die). Unique features of this technology include the implementation of a 2-mmthick silicon wafer to withstand extreme mechanical loads (from a rocket launch); integrated polysilicon resistor heaters directly on the substrate; the precise formation of an open aperture

  15. Yield Improvement for 3D Wafer-to-Wafer Stacked Memories

    NARCIS (Netherlands)

    Taouil, M.; Hamdioui, S.

    2012-01-01

    Recent enhancements in process development enable the fabrication of three dimensional stacked ICs (3D-SICs) such as memories based on Wafer-to-Wafer (W2W) stacking. One of the major challenges facing W2W stacking is the low compound yield. This paper investigates compound yield improvement for W2W

  16. Effect of weight and frontal area of external telemetry packages on the kinematics, activity levels and swimming performance of small-bodied sharks.

    Science.gov (United States)

    Bouyoucos, I A; Suski, C D; Mandelman, J W; Brooks, E J

    2017-05-01

    This study sought to observe the effects of submerged weight and frontal cross-sectional area of external telemetry packages on the kinematics, activity levels and swimming performance of small-bodied juvenile sharks, using lemon sharks Negaprion brevirostris (60-80 cm total length, LT ) as a model species. Juveniles were observed free-swimming in a mesocosm untagged and with small and large external accelerometer packages that increased frontal cross-sectional area of the animals and their submerged weight. Despite adhering to widely used standards for tag mass, the presence of an external telemetry package altered swimming kinematics, activity levels and swimming performance of juvenile N. brevirostris relative to untagged individuals, suggesting that tag mass is not a suitable standalone metric of device suitability. Changes in swimming performance could not be detected from tail-beat frequency, which suggests that tail-beat frequency is an unsuitable standalone metric of swimming performance for small N. brevirostris. Lastly, sharks experienced treatment-specific changes in activity level and swimming kinematics from morning to afternoon observation. Therefore, the presence of external telemetry packages altered the kinematics, activity levels and swimming performance of small young-of-the-year N. brevirostris and these data may therefore be relevant to other similar-sized juveniles of other shark species. © 2017 The Fisheries Society of the British Isles.

  17. Full-field wafer warpage measurement technique

    Science.gov (United States)

    Hsieh, H. L.; Lee, J. Y.; Huang, Y. G.; Liang, A. J.; Sun, B. Y.

    2017-06-01

    An innovative moiré technique for full-field wafer warpage measurement is proposed in this study. The wafer warpage measurement technique is developed based on moiré method, Talbot effect, scanning profiling method, stroboscopic, instantaneous phase-shift method, as well as four-step phase shift method, high resolution, high stability and full-field measurement capabilities can be easily achieved. According to the proposed full-field optical configuration, a laser beam is expanded into a collimated beam with a 2-inch diameter and projected onto the wafer surface. The beam is reflected by the wafer surface and forms a moiré fringe image after passing two circular gratings, which is then focused and captured on a CCD camera for computation. The corresponding moiré fringes reflected from the wafer surface are obtained by overlapping the images of the measuring grating and the reference grating. The moiré fringes will shift when wafer warpage occurs. The phase of the moiré fringes will change proportionally to the degree of warpage in the wafer, which can be measured by detecting variations in the phase shift of the moiré fringes in each detection points on the surface of the entire wafer. The phase shift variations of each detection points can be calculated via the instantaneous phase-shift method and the four-step phase-shift method. By adding up the phase shift variations of each detection points along the radii of the circular gratings, the warpage value and surface topography of the wafer can be obtained. Experiments show that the proposed method is capable of obtaining test results similar to that of a commercial sensor, as well as performing accurate measurements under high speed rotation of 1500rpm. As compared to current warpage measurement methods such as the beam optical method, confocal microscopy, laser interferometry, shadow moiré method, and structured light method, this proposed technique has the advantage of full-field measurement, high

  18. Repository environmental parameters and models/methodologies relevant to assessing the performance of high-level waste packages in basalt, tuff, and salt

    Energy Technology Data Exchange (ETDEWEB)

    Claiborne, H.C.; Croff, A.G.; Griess, J.C.; Smith, F.J.

    1987-09-01

    This document provides specifications for models/methodologies that could be employed in determining postclosure repository environmental parameters relevant to the performance of high-level waste packages for the Basalt Waste Isolation Project (BWIP) at Richland, Washington, the tuff at Yucca Mountain by the Nevada Test Site, and the bedded salt in Deaf Smith County, Texas. Guidance is provided on the identify of the relevant repository environmental parameters; the models/methodologies employed to determine the parameters, and the input data base for the models/methodologies. Supporting studies included are an analysis of potential waste package failure modes leading to identification of the relevant repository environmental parameters, an evaluation of the credible range of the repository environmental parameters, and a summary of the review of existing models/methodologies currently employed in determining repository environmental parameters relevant to waste package performance. 327 refs., 26 figs., 19 tabs.

  19. MEMS packaging

    CERN Document Server

    Hsu , Tai-Ran

    2004-01-01

    MEMS Packaging discusses the prevalent practices and enabling techniques in assembly, packaging and testing of microelectromechanical systems (MEMS). The entire spectrum of assembly, packaging and testing of MEMS and microsystems, from essential enabling technologies to applications in key industries of life sciences, telecommunications and aerospace engineering is covered. Other topics included are bonding and sealing of microcomponents, process flow of MEMS and microsystems packaging, automated microassembly, and testing and design for testing.The Institution of Engineering and Technology is

  20. Materials, design and processing of air encapsulated MEMS packaging

    Science.gov (United States)

    Fritz, Nathan T.

    This work uses a three-dimensional air cavity technology to improve the fabrication, and functionality of microelectronics devices, performance of on-board transmission lines, and packaging of micro-electromechanical systems (MEMS). The air cavity process makes use of the decomposition of a patterned sacrificial polymer followed by the diffusion of its by-products through a curing polymer overcoat to obtain the embedded air structure. Applications and research of air cavities have focused on simple designs that concentrate on the size and functionality of the particular device. However, a lack of guidelines for fabrication, materials used, and structural design has led to mechanical stability issues and processing refinements. This work investigates improved air gap cavities for use in MEMS packaging processes, resulting in fewer fabrication flaws and lower cost. The identification of new materials, such as novel photo-definable organic/inorganic hybrid polymers, was studied for increased strength and rigidity due to their glass-like structure. A novel epoxy polyhedral oligomeric silsesquioxane (POSS) material was investigated and characterized for use as a photodefineable, permanent dielectrics with improved mechanical properties. The POSS material improved the air gap fabrication because it served as a high-selectivity etch mask for patterning sacrificial materials as well as a cavity overcoat material with improved rigidity. An investigation of overcoat thickness and decomposition kinetics provided a fundamental understanding of the properties that impart mechanical stability to cavities of different shape and volume. Metallization of the cavities was investigated so as to provide hermetic sealing and improved cavity strength. The improved air cavity, wafer-level packages were tested using resonator-type devices and chip-level lead frame packaging. The air cavity package was molded under traditional lead frame molding pressures and tested for mechanical

  1. Integrated vacuum packaging for low-cost lightweight uncooled microbolometer arrays

    Science.gov (United States)

    Cole, Barry E.; Higashi, Robert E.; Ridley, Jeff A.; Wood, R. Andrew

    2001-10-01

    Uncooled thermal infrared sensors require to be operated in an ambient gas pressure of about 50 mTorr or less to avoid sensitivity being reduced by thermal conduction through the gas. Although sealed packages have been developed which can retain a sufficiently low internal pressure for many years, the packaging process (cleaning, assembly, pumping, baking, getter firing, sealing) and materials add significant cost and weight. Lower cost it the major reason for the development of uncooled arrays, and low weight is essential for many applications (e.g. unmanned aerial vehicles, helmet mounted applications). In response to these needs, Honeywell has developed a silicon 'Integrated Vacuum Package' (IVP) process which produces a low-cost lightweight (0.2 gram) compact vacuum package by a wafer-scale process. The IVP process basically consists of bonding a silicon 'topcap' wafer to the array wafer, to produce a bonded double-wafer with multiple arrays protected in individual vacuum packages. The double- wafer may be easily handled without damage to the protected arrays, and diced into individual dies using normal silicon dicing techniques. It has been found helpful to use an etched evacuation via, which allows wafer bonding, pumping, baking and sealing to be performed in separate stages, at their different optimum times and temperatures. The IVP process will be described, and packages suitable for linear and two- dimensional uncooled arrays will be reported, with performance and lifetime measurements.

  2. PREDIKSI MASA KEDALUWARSA WAFER DENGAN ARTIFICIAL NEURAL NETWORK (ANN BERDASARKAN PARAMETER NILAI KAPASITANSI (Prediction of Wafer Shelf Life Using Artificial Neural Network Based on Capacitance Parameter

    Directory of Open Access Journals (Sweden)

    Erna Rusliana Muhamad Saleh

    2014-02-01

    Full Text Available Wafer is type of biscuit frequently found on expired condition in market, therefore prediction method should be implemented to avoid this condition. apart from the prediction of shelf-life of wafer done by laboratory test, which were time-consuming, expensive, required trained panelists, complex equipment and suitable ambience, artificial neural network (ANN based dielectric parameters was proposed in nthis study. The aim of study was to develop model to predict shelf-life employing aNN based capacitance parameter. Back propagation algorithm with trial and error was applied in variations of nodes per hidden layer, number of hidden layers, activation functions, the function of learnings and epochs. The result of study was the model was able to predict wafer shelf-life. The accuracy level was shown by low MSE value (0.01 and high coefficient correlation value (89.25%. Keywords: artificial Neural Network, shelf-life, waffer, dielectric, capacitance   ABSTRAK Wafer adalah jenis makanan kering yang sering ditemukan kedaluwarsa. Penentuan masa kedaluwarsa dengan observasi laboratorium memiliki beberapa kelemahan, diantaranya memakan waktu, panelis terlatih, suasana yang tepat, biaya dan alat uji yang kompleks. alternatif solusinya adalah penggunaan artificial Neural Network (ANN berbasiskan parameter kapasitansi. Tujuan kerja ilmiah ini adalah untuk memprediksi masa kedaluwarsa wafer menggunakan aNN berbasiskan parameter kapasitansi. algoritma pembelajaran yang digunakan adalah Backpropagation dengan trial and error variasi jumlah node per hidden layer, jumlah hidden layer, fungsi aktivasi, fungsi pembelajaran dan epoch. Hasil prediksi menunjukkan bahwa aNN hasil pelatihan yang dikombinasikan dengan parameter kapasitansi mampu memprediksi masa kedaluwarsa wafer dengan MSE terendah 0,01 dan R tertinggi 89,25%. Kata kunci: Jaringan Syaraf Tiruan, masa kedaluwarsa, wafer, dielektrik, kapasitansi

  3. Enhancement of flexural stress and reduction of surface roughness through changes in gas concentrations during high-speed chemical dry thinning of silicon wafers

    Energy Technology Data Exchange (ETDEWEB)

    Kim, I.J. [Department of Advanced Materials Science and Engineering, Sungkyunkwan University, Suwon, Gyeonggi-do 440-746 (Korea, Republic of); Lee, N.-E., E-mail: nelee@skku.edu [Department of Advanced Materials Science and Engineering, Sungkyunkwan University, Suwon, Gyeonggi-do 440-746 (Korea, Republic of); SKKU Advanced Institute of Nanotechnology (SAINT), Sungkyunkwan University, Suwon, Gyeonggi-do 440-746 (Korea, Republic of)

    2013-11-29

    Three-dimensional packaging using through silicon via of ultra-thin Si wafers requires very low residual stress. In this study, the effects of additive gases on root-mean-squared (RMS) surface roughness and flexural stress of Si wafers thinned by the high-speed chemical dry etching (CDE) process were investigated. Direct injection of Ar with NO gases into the reactor during the supply of F radicals from NF{sub 3} remote plasmas was effective in increasing the Si wafer thinning rate and in reducing significant surface roughness. Reduced RMS surface roughness of the thinned Si wafer resulted in high flexural stress. The additional injection of N{sub 2} gas further decreased the surface roughness of the thinned Si wafer and, in turn, increased the flexural stress of the thinned wafers. By adjusting the Ar flow and Q ratio, Q(N{sub 2}) = N{sub 2}/(N{sub 2} + NO), Si wafer thinning rates as high as 23 μm/min and RMS surface roughnesses as small as 10 nm were obtained. Furthermore, it was found that the surface roughness is a critical factor affecting the flexural stress of the thinned Si wafer. These results indicate that the high-speed CDE process using F radicals and directly injected NO/Ar/N{sub 2} gases can be applied to ultra-thin Si wafer thinning with controlled RMS surface roughness and low residual stress. - Highlights: • Chemical dry etching of Si wafers affected by N{sub 2}/(N{sub 2} + NO) flow ratio. • Increasing the flow ratio decreased the thinning rate and surface temperature. • Si wafer thinning rate as high as 23 mm/ min was obtained. • Root mean square surface roughness value drastically decreased from 91 to 1.21 nm. • The strength value of flexural stress increased from 162 to 756 MPa.

  4. On-wafer high temperature characterization system

    Science.gov (United States)

    Teodorescu, L.; ǎghici, F., Dr; Rusu, I.; Brezeanu, G.

    2016-12-01

    In this work a on-wafer high temperature characterization system for wide bandgap semiconductor devices and circuits has been designed, implemented and tested. The proposed system can perform the wafer temperature adjustment in a large domain, from the room temperature up to 3000C with a resolution better than +/-0.50C. In order to obtain both low-noise measurements and low EMI, the heating element of the wafer chuck is supplied in two ways: one is from a DC linear power supply connected to the mains electricity, another one is from a second DC unit powered by batteries. An original temperature control algorithm, different from classical PID, is used to modify the power applied to the chuck.

  5. Integrating III-V compound semiconductors with silicon using wafer bonding

    Science.gov (United States)

    Zhou, Yucai

    2000-12-01

    From Main Street to Wall Street, everyone has felt the effects caused by the Internet revolution. The Internet has created a new economy in the New Information Age and has brought significant changes in both business and personal life. This revolution has placed strong demands for higher bandwidth and higher computing speed due to high data traffic on today's information highway. In order to alleviate this problem, growing interconnection bottlenecks in digital designs have to be solved. The most feasible and practical way is to replace the conventional electrical interconnect with an optical interconnect. Since silicon does not have the optical properties necessary to accommodate these optical interconnect requirements, III-V based devices, most of which are GaAs-based or InP-based, must be intimately interconnected with the Si circuit at chip level. This monolithic integration technology enables the development of both intrachip and interchip optical connectors to take advantage of the enormous bandwidth provided by both high-performance very-large-scale integrated (VLSI) circuits and allied fiber and free-space optical technologies. However, lattice mismatch and thermal expansion mismatches between III-V materials and Si create enormous challenges for developing a feasible technology to tackle this problem. Among all the available approaches today, wafer bonding distinguishes itself as the most promising technology for integration due to its ability to overcome the constraints of both lattice constant mismatch and thermal expansion coefficient differences and even strain due to the crystal orientation. We present our development of wafer bonding technology for integrating III-V with Si in my dissertation. First, the pick-and-place multiple-wafer bonding technology was introduced. Then we systematically studied the wafer bonding of GaAs and InP with Si. Both high temperature wafer fusion and low/room temperature (LT/RT) wafer bonding have been investigated for

  6. Evaluation of a cyanoacrylate dressing to manage peristomal skin alterations under ostomy skin barrier wafers.

    Science.gov (United States)

    Milne, Catherine T; Saucier, Darlene; Trevellini, Chenel; Smith, Juliet

    2011-01-01

    Peristomal skin alterations under ostomy barrier wafers are a commonly reported problem. While a number of interventions to manage this issue have been reported, the use of a topically applied cyanoacrylate has received little attention. This case series describes the use of a topical cyanoacrylate for the management of peristomal skin alterations in persons living with an ostomy. Using a convenience sample, the topical cyanoacrylate dressing was applied to 11 patients with peristomal skin disruption under ostomy wafers in acute care and outpatient settings. The causes of barrier function interruption were also addressed to enhance outcomes. Patients were assessed for wound discomfort using a Likert Scale, time to healing, and number of appliance changes. Patient satisfaction was also examined. Average reported discomfort levels were 9.5 out of 10 at the initial peristomal irritation assessment visit decreased to 3.5 at the first wafer change and were absent by the second wafer change. Wafers had increasing wear time between changes in both settings with acute care patients responding faster. Epidermal resurfacing occurred within 10.2 days in outpatients and within 7 days in acute care patients. Because of the skin sealant action of this dressing, immediate adherence of the wafer was reported at all pouch changes.

  7. 320 x 240 uncooled IRFPA with pixel wise thin film vacuum packaging

    Science.gov (United States)

    Yon, J.-J.; Dumont, G.; Rabaud, W.; Becker, S.; Carle, L.; Goudon, V.; Vialle, C.; Hamelin, A.; Arnaud, A.

    2012-10-01

    Silicon based vacuum packaging is a key enabling technology for achieving affordable uncooled Infrared Focal Plane Arrays (IRFPA) as required by the promising mass market for very low cost IR applications, such as automotive driving assistance, energy loss monitoring in buildings, motion sensors… Among the various approaches studied worldwide, the CEA, LETI is developing a unique technology where each bolometer pixel is sealed under vacuum at the wafer level, using an IR transparent thin film deposition. This technology referred to as PLP (Pixel Level Packaging), leads to an array of hermetic micro-caps each containing a single microbolometer. Since the successful demonstration that the PLP technology, when applied on a single microbolometer pixel, can provide the required vacuum distributions, the paper also puts emphasis on additional key features such as thermal time constant, image quality, and ageing properties.

  8. Silicon waveguides produced by wafer bonding

    DEFF Research Database (Denmark)

    Poulsen, Mette; Jensen, Flemming; Bunk, Oliver

    2005-01-01

    X-ray waveguides are successfully produced employing standard silicon technology of UV photolithography and wafer bonding. Contrary to theoretical expectations for similar systems even 100 mu m broad guides of less than 80 nm height do not collapse and can be used as one dimensional waveguides...

  9. Low-cost silicon wafer dicing using a craft cutter

    KAUST Repository

    Fan, Yiqiang

    2014-05-20

    This paper reports a low-cost silicon wafer dicing technique using a commercial craft cutter. The 4-inch silicon wafers were scribed using a crafter cutter with a mounted diamond blade. The pre-programmed automated process can reach a minimum die feature of 3 mm by 3 mm. We performed this scribing process on the top polished surface of a silicon wafer; we also created a scribing method for the back-unpolished surface in order to protect the structures on the wafer during scribing. Compared with other wafer dicing methods, our proposed dicing technique is extremely low cost (lower than $1,000), and suitable for silicon wafer dicing in microelectromechanical or microfluidic fields, which usually have a relatively large die dimension. The proposed dicing technique is also usable for dicing multiple project wafers, a process where dies of different dimensions are diced on the same wafer.

  10. Wafer plane inspection for advanced reticle defects

    Science.gov (United States)

    Nagpal, Rajesh; Ghadiali, Firoz; Kim, Jun; Huang, Tracy; Pang, Song

    2008-05-01

    Readiness of new mask defect inspection technology is one of the key enablers for insertion & transition of the next generation technology from development into production. High volume production in mask shops and wafer fabs demands a reticle inspection system with superior sensitivity complemented by a low false defect rate to ensure fast turnaround of reticle repair and defect disposition (W. Chou et al 2007). Wafer Plane Inspection (WPI) is a novel approach to mask defect inspection, complementing the high resolution inspection capabilities of the TeraScanHR defect inspection system. WPI is accomplished by using the high resolution mask images to construct a physical mask model (D. Pettibone et al 1999). This mask model is then used to create the mask image in the wafer aerial plane. A threshold model is applied to enhance the inspectability of printing defects. WPI can eliminate the mask restrictions imposed on OPC solutions by inspection tool limitations in the past. Historically, minimum image restrictions were required to avoid nuisance inspection stops and/or subsequent loss of sensitivity to defects. WPI has the potential to eliminate these limitations by moving the mask defect inspections to the wafer plane. This paper outlines Wafer Plane Inspection technology, and explores the application of this technology to advanced reticle inspection. A total of twelve representative critical layers were inspected using WPI die-to-die mode. The results from scanning these advanced reticles have shown that applying WPI with a pixel size of 90nm (WPI P90) captures all the defects of interest (DOI) with low false defect detection rates. In validating CD predictions, the delta CDs from WPI are compared against Aerial Imaging Measurement System (AIMS), where a good correlation is established between WPI and AIMSTM.

  11. Contamination control: removing small particles from increasingly large wafers

    NARCIS (Netherlands)

    Jong, A.J. de; Donck, J.C.J. van der; Huijser, T.; Kievit, O.; Koops, R.; Koster, N.B.; Molkenboer, F.T.; Theulings, A.M.M.G.

    2012-01-01

    With the introduction of 450 mm wafers, which are considerably larger than the currently largest wafers of 300mm, handling with side grippers is no longer possible and backside grippers are required. Backside gripping increases the possible buildup of particles on the backside of the wafers with

  12. Data package for the Low-Level Waste Disposal Development and Demonstration Program environmental impact statement: Volume 1, Sections 1--7 and Appendices A--D

    Energy Technology Data Exchange (ETDEWEB)

    Ketelle, R.H.

    1988-09-01

    This data package is required to support an Environmental Impact Statement (EIS) to be written to evaluate the effects of future disposal of low-level waste at four sites on the Oak Ridge Reservation. Current waste disposal facilities are exceeding their capacities and increasingly stringent disposal requirements dictate the need for the sites and new waste disposal technologies. The Low-Level Waste Disposal Development and Demonstration Program has developed a strategy for low-level waste disposal built around a dose based approach. This approach emphasizes contamination pathways, including surface and groundwater and ALARA conditions for workers. This strategy dictates the types of data needed for this data package. The data package provides information on geology, soils, groundwater, surface water, and ecological characterization of the Oak Ridge Reservation in order to evaluate alternative technologies and alternative sites. The results of the investigations and data collections indicate that different technologies will probably have to be used at different sites. This conclusion, however, depends on the findings of the Environmental Impact Statement. 14 figs., 19 tabs.

  13. pRRophetic: an R package for prediction of clinical chemotherapeutic response from tumor gene expression levels.

    Directory of Open Access Journals (Sweden)

    Paul Geeleher

    Full Text Available We recently described a methodology that reliably predicted chemotherapeutic response in multiple independent clinical trials. The method worked by building statistical models from gene expression and drug sensitivity data in a very large panel of cancer cell lines, then applying these models to gene expression data from primary tumor biopsies. Here, to facilitate the development and adoption of this methodology we have created an R package called pRRophetic. This also extends the previously described pipeline, allowing prediction of clinical drug response for many cancer drugs in a user-friendly R environment. We have developed several other important use cases; as an example, we have shown that prediction of bortezomib sensitivity in multiple myeloma may be improved by training models on a large set of neoplastic hematological cell lines. We have also shown that the package facilitates model development and prediction using several different classes of data.

  14. Size of silicon strip sensor from 6 inch wafer (right) compared to that from a 4 inch wafer (left).

    CERN Multimedia

    Honma, Alan

    1999-01-01

    Silicon strip sensors made from 6 inch wafers will allow for much larger surface area coverage at a reduced cost per unit surface area. A prototype sensor of size 8cm x 11cm made by Hamamatsu from a 6 inch wafer is shown next to a traditional 6cm x 6cm sensor from a 4 inch wafer.

  15. Evidence of Processing Non-Idealities in 4H-SiC Integrated Circuits Fabricated with Two Levels of Metal Interconnect

    Science.gov (United States)

    Spry, David J.; Neudeck, Philip G.; Liangyu, Chen; Evans, Laura J.; Lukco, Dorothy; Chang, Carl W.; Beheim, Glenn M.

    2015-01-01

    The fabrication and prolonged 500 C electrical testing of 4H-SiC junction field effect transistor (JFET) integrated circuits (ICs) with two levels of metal interconnect is reported in another submission to this conference proceedings. While some circuits functioned more than 1000 hours at 500 C, the majority of packaged ICs from this wafer electrically failed after less than 200 hours of operation in the same test conditions. This work examines the root physical degradation and failure mechanisms believed responsible for observed large discrepancies in 500 C operating time. Evidence is presented for four distinct issues that significantly impacted 500 C IC operational yield and lifetime for this wafer.

  16. Carbon dioxide capture using resin-wafer electrodeionization

    Science.gov (United States)

    Lin, YuPo J.; Snyder, Seth W.; Trachtenberg, Michael S.; Cowan, Robert M.; Datta, Saurav

    2015-09-08

    The present invention provides a resin-wafer electrodeionization (RW-EDI) apparatus including cathode and anode electrodes separated by a plurality of porous solid ion exchange resin wafers, which when in use are filled with an aqueous fluid. The apparatus includes one or more wafers comprising a basic ion exchange medium, and preferably includes one or more wafers comprising an acidic ion exchange medium. The wafers are separated from one another by ion exchange membranes. The fluid within the acidic and/or basic ion exchange wafers preferably includes, or is in contact with, a carbonic anhydrase (CA) enzyme to facilitate conversion of bicarbonate ion to carbon dioxide within the acidic medium. A pH suitable for exchange of CO.sub.2 is electrochemically maintained within the basic and acidic ion exchange wafers by applying an electric potential across the cathode and anode.

  17. Defect detection in unpolished Si wafers by digital shearography

    Science.gov (United States)

    Udupa, Ganesha; Ngoi, B. K. A.; Goh, H. C. Freddy; Yusoff, M. N.

    2004-01-01

    Defects in silicon wafers have been of great scientific and technological interest since before the earliest days of the silicon transistor. Recently much attention has been focused on crystal originated pits on the polished surface of the wafer. These defects have been shown to contribute to gate dielectric breakdown. The present work relates to surface and/or subsurface defect inspection systems for semiconductor industries and particularly to an inspection system for defects such as swirl defects and groups of particles in unpolished silicon wafers before the wafer reclamation and/or the wafer fabrication process using a digital shearography technique. The method described here relates specifically to semiconductor wafers, but may be generalized to any other samples. In the present work, surface or subsurface defects are detected and evaluated by stressing the silicon wafer while looking for defect-induced anomalies in a fringe pattern, generated by the interference of two speckle patterns, in the CCD camera and digital image processing.

  18. Wafer integrated micro-scale concentrating photovoltaics

    Science.gov (United States)

    Gu, Tian; Li, Duanhui; Li, Lan; Jared, Bradley; Keeler, Gordon; Miller, Bill; Sweatt, William; Paap, Scott; Saavedra, Michael; Das, Ujjwal; Hegedus, Steve; Tauke-Pedretti, Anna; Hu, Juejun

    2017-09-01

    Recent development of a novel micro-scale PV/CPV technology is presented. The Wafer Integrated Micro-scale PV approach (WPV) seamlessly integrates multijunction micro-cells with a multi-functional silicon platform that provides optical micro-concentration, hybrid photovoltaic, and mechanical micro-assembly. The wafer-embedded micro-concentrating elements is shown to considerably improve the concentration-acceptance-angle product, potentially leading to dramatically reduced module materials and fabrication costs, sufficient angular tolerance for low-cost trackers, and an ultra-compact optical architecture, which makes the WPV module compatible with commercial flat panel infrastructures. The PV/CPV hybrid architecture further allows the collection of both direct and diffuse sunlight, thus extending the geographic and market domains for cost-effective PV system deployment. The WPV approach can potentially benefits from both the high performance of multijunction cells and the low cost of flat plate Si PV systems.

  19. Devices using resin wafers and applications thereof

    Science.gov (United States)

    Lin, YuPo J [Naperville, IL; Henry, Michael P [Batavia, IL; Snyder, Seth W [Lincolnwood, IL; Martin, Edward [Libertyville, IL; Arora, Michelle [Woodridge, IL; de la Garza, Linda [Woodridge, IL

    2009-03-24

    Devices incorporating a thin wafer of electrically and ionically conductive porous material made by the method of introducing a mixture of a thermoplastic binder and one or more of anion exchange moieties or cation exchange moieties or mixtures thereof and/or one or more of a protein capture resin and an electrically conductive material into a mold. The mixture is subjected to temperatures in the range of from about 60.degree. C. to about 170.degree. C. at pressures in the range of from about 0 to about 500 psig for a time in the range of from about 1 to about 240 minutes to form thin wafers. Devices include electrodeionization and separative bioreactors in the production of organic and amino acids, alcohols or esters for regenerating cofactors in enzymes and microbial cells.

  20. Optimal Wafer Cutting in Shuttle Layout Problems

    DEFF Research Database (Denmark)

    Nisted, Lasse; Pisinger, David; Altman, Avri

    2011-01-01

    . The shuttle layout problem is frequently solved in two phases: first, a floorplan of the shuttle is generated. Then, a cutting plan is found which minimizes the overall number of wafers needed to satisfy the demand of each die type. Since some die types require special production technologies, only compatible...... dies can be cut from a given wafer, and each cutting plan must respect various constraints on where the cuts may be placed. We present an exact algorithm for solving the minimum cutting plan problem, given a floorplan of the dies. The algorithm is based on delayed column generation, where the pricing...... problem becomes a maximum vertex-weighted clique problem in which each clique consists of cutting compatible dies. The resulting branch-and-price algorithm is able to solve realistic cutting problems to optimality in a couple of seconds....

  1. Challenges in the Packaging of MEMS

    Energy Technology Data Exchange (ETDEWEB)

    Malshe, A.P.; Singh, S.B.; Eaton, W.P.; O' Neal, C.; Brown, W.D.; Miller, W.M.

    1999-03-26

    The packaging of Micro-Electro-Mechanical Systems (MEMS) is a field of great importance to anyone using or manufacturing sensors, consumer products, or military applications. Currently much work has been done in the design and fabrication of MEMS devices but insufficient research and few publications have been completed on the packaging of these devices. This is despite the fact that packaging is a very large percentage of the total cost of MEMS devices. The main difference between IC packaging and MEMS packaging is that MEMS packaging is almost always application specific and greatly affected by its environment and packaging techniques such as die handling, die attach processes, and lid sealing. Many of these aspects are directly related to the materials used in the packaging processes. MEMS devices that are functional in wafer form can be rendered inoperable after packaging. MEMS dies must be handled only from the chip sides so features on the top surface are not damaged. This eliminates most current die pick-and-place fixtures. Die attach materials are key to MEMS packaging. Using hard die attach solders can create high stresses in the MEMS devices, which can affect their operation greatly. Low-stress epoxies can be high-outgassing, which can also affect device performance. Also, a low modulus die attach can allow the die to move during ultrasonic wirebonding resulting to low wirebond strength. Another source of residual stress is the lid sealing process. Most MEMS based sensors and devices require a hermetically sealed package. This can be done by parallel seam welding the package lid, but at the cost of further induced stress on the die. Another issue of MEMS packaging is the media compatibility of the packaged device. MEMS unlike ICS often interface with their environment, which could be high pressure or corrosive. The main conclusion we can draw about MEMS packaging is that the package affects the performance and reliability of the MEMS devices. There is a

  2. Palladium-based on-wafer electroluminescence studies of GaN-based LED structures

    Energy Technology Data Exchange (ETDEWEB)

    Salcianu, C.O.; Thrush, E.J.; Humphreys, C.J. [Department of Materials Science and Metallurgy, University of Cambridge, Pembroke Street, Cambridge CB2 3QZ (United Kingdom); Plumb, R.G. [Centre for Photonic Systems, Department of Engineering, University of Cambridge, Cambridge CB3 0FD (United Kingdom); Boyd, A.R.; Rockenfeller, O.; Schmitz, D.; Heuken, M. [AIXTRON AG, Kackertstr. 15-17, 52072 Aachen (Germany)

    2008-07-01

    Electroluminescence (EL) testing of Light Emitting Diode (LED) structures is usually done at the chip level. Assessing the optical and electrical properties of LED structures at the wafer scale prior to their processing would improve the cost effectiveness of producing LED-lamps. A non-destructive method for studying the luminescence properties of the structure at the wafer-scale is photoluminescence (PL). However, the relationship between the on-wafer PL data and the final device EL can be less than straightforward (Y. H Aliyu et al., Meas. Sci. Technol. 8, 437 (1997)) as the two techniques employ different carrier injection mechanisms. This paper provides an overview of some different techniques in which palladium is used as a contact in order to obtain on-wafer electroluminescence information which could be used to screen wafers prior to processing into final devices. Quick mapping of the electrical and optical characteristics was performed using either palladium needle electrodes directly, or using the latter in conjunction with evaporated palladium contacts to inject both electrons and holes into the active region via the p-type capping layer of the structure. For comparison, indium was also used to make contact to the n-layer so that electrons could be directly injected into that layer. (copyright 2008 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim) (orig.)

  3. In-Package Chemistry Abstraction

    Energy Technology Data Exchange (ETDEWEB)

    P.S. Domski

    2003-07-21

    The work associated with the development of this model report was performed in accordance with the requirements established in ''Technical Work Plan for Waste Form Degradation Modeling, Testing, and Analyses in Support of SR and LA'' (BSC 2002a). The in-package chemistry model and in-package chemistry model abstraction are developed to predict the bulk chemistry inside of a failed waste package and to provide simplified expressions of that chemistry. The purpose of this work is to provide the abstraction model to the Performance Assessment Project and the Waste Form Department for development of geochemical models of the waste package interior. The scope of this model report is to describe the development and validation of the in-package chemistry model and in-package chemistry model abstraction. The in-package chemistry model will consider chemical interactions of water with the waste package materials and the waste form for commercial spent nuclear fuel (CSNF) and codisposed high-level waste glass (HLWG) and N Reactor spent fuel (CDNR). The in-package chemistry model includes two sub-models, the first a water vapor condensation (WVC) model, where water enters a waste package as vapor and forms a film on the waste package components with subsequent film reactions with the waste package materials and waste form--this is a no-flow model, the reacted fluids do not exit the waste package via advection. The second sub-model of the in-package chemistry model is the seepage dripping model (SDM), where water, water that may have seeped into the repository from the surrounding rock, enters a failed waste package and reacts with the waste package components and waste form, and then exits the waste package with no accumulation of reacted water in the waste package. Both of the submodels of the in-package chemistry model are film models in contrast to past in-package chemistry models where all of the waste package pore space was filled with water. The

  4. Environmental packaging

    OpenAIRE

    Davies, Gareth Benjamin Harverd

    2006-01-01

    This thesis was submitted for the degree of Doctor of Philosophy and awarded by Brunel University. The food packaging industry is a £300bn global industry growing at a rate of 12% per year and increasingly favouring polymer or polymer-based materials. This generates 58m tonnes of "plastic" packaging waste annually in the EU and poses significant challenges for management given existing legislative constraints and increasing concerns surrounding the environmental impacts. The government, co...

  5. The influence of threatening visual warnings on tobacco packaging: Measuring the impact of threat level, image size, and type of pack through psychophysiological and self-report methods.

    Science.gov (United States)

    Droulers, Olivier; Gallopel-Morvan, Karine; Lacoste-Badie, Sophie; Lajante, Mathieu

    2017-01-01

    The first aim of this research was to assess the effectiveness, in terms of emotional and behavioral reactions, of moderately vs. highly TVWs (Threatening Visual Warnings) displayed on tobacco packs. Given the key role that emotional reactions play in explaining the effect of TVWs on behaviors, psychophysiological and self-report methods were used-for the first time in this context-to measure the emotions provoked by TVWs. The second aim of this research was to determine whether increasing the size of warnings, and their display on plain packaging (compared with branded packaging) would improve their effectiveness. A within-subjects experiment was conducted. Three variables were manipulated: health warning threat level (high vs. moderate), image size (40% vs. 75%) and pack type (plain vs. branded). A convenience sample of 48 French daily smokers participated. They were exposed to eight different packs of cigarettes in a research lab at the University of Rennes. Smokers' emotions and behavioral intentions were recorded through self-reports. Emotions were also evaluated using psychophysiological measurements: electrodermal activity and facial electromyography. The results revealed that TVWs with a high threat level are the most effective in increasing negative emotions (fear, disgust, valence, arousal) and behavioral intentions conducive to public health (desire to quit, etc.). They also highlight the appeal of increasing the size of the warnings and displaying them on plain packs, because this influences emotions, which is the first step toward behavioral change. Increasing the threat level of TVWs from moderate to high seems beneficial for public health. Our results also confirm the relevance of recent governmental decisions to adopt plain packaging and larger TVWs (in the UK, France, Ireland, Canada, New Zealand, Hungary, etc.).

  6. The influence of threatening visual warnings on tobacco packaging: Measuring the impact of threat level, image size, and type of pack through psychophysiological and self-report methods.

    Directory of Open Access Journals (Sweden)

    Olivier Droulers

    Full Text Available The first aim of this research was to assess the effectiveness, in terms of emotional and behavioral reactions, of moderately vs. highly TVWs (Threatening Visual Warnings displayed on tobacco packs. Given the key role that emotional reactions play in explaining the effect of TVWs on behaviors, psychophysiological and self-report methods were used-for the first time in this context-to measure the emotions provoked by TVWs. The second aim of this research was to determine whether increasing the size of warnings, and their display on plain packaging (compared with branded packaging would improve their effectiveness. A within-subjects experiment was conducted. Three variables were manipulated: health warning threat level (high vs. moderate, image size (40% vs. 75% and pack type (plain vs. branded. A convenience sample of 48 French daily smokers participated. They were exposed to eight different packs of cigarettes in a research lab at the University of Rennes. Smokers' emotions and behavioral intentions were recorded through self-reports. Emotions were also evaluated using psychophysiological measurements: electrodermal activity and facial electromyography. The results revealed that TVWs with a high threat level are the most effective in increasing negative emotions (fear, disgust, valence, arousal and behavioral intentions conducive to public health (desire to quit, etc.. They also highlight the appeal of increasing the size of the warnings and displaying them on plain packs, because this influences emotions, which is the first step toward behavioral change. Increasing the threat level of TVWs from moderate to high seems beneficial for public health. Our results also confirm the relevance of recent governmental decisions to adopt plain packaging and larger TVWs (in the UK, France, Ireland, Canada, New Zealand, Hungary, etc..

  7. Selection of candidate container materials for the conceptual waste package design for a potential high level nuclear waste repository at Yucca Mountain

    Energy Technology Data Exchange (ETDEWEB)

    Van Konynenburg, R.A.; Halsey, W.G.; McCright, R.D.; Clarke, W.L. Jr. [Lawrence Livermore National Lab., CA (United States); Gdowski, G.E. [KMI, Inc., Albuquerque, NM (United States)

    1993-02-01

    Preliminary selection criteria have been developed, peer-reviewed, and applied to a field of 41 candidate materials to choose three alloys for further consideration during the advanced conceptual design phase of waste package development for a potential high level nuclear waste repository at Yucca Mountain, Nevada. These three alloys are titanium grade 12, Alloy C-4, and Alloy 825. These selections are specific to the particular conceptual design outlined in the Site Characterization Plan. Other design concepts that may be considered in the advanced conceptual design phase may favor other materials choices.

  8. Fabricating Capacitive Micromachined Ultrasonic Transducers with Wafer Bonding Technique

    Directory of Open Access Journals (Sweden)

    Anil ARORA

    2008-06-01

    Full Text Available We report the fabrication of capacitive micromachined ultrasonic transducer by wafer bonding technique. Membrane is transferred from SOI wafer to the prime wafer having silicon dioxide cavity. The thickness of cavity height depends on silicon dioxide grown on prime wafer by dry/wet oxidation. Thinning of device wafer of SOI by oxidation, controls membrane thickness. Two wafers are bonded in vacuum under optimized controlled parameters. Using this method, we can get single crystal silicon as membrane, whose mechanical and electrical parameters are well known. Silicon membrane is free from stress and density variation. Focused Ion Beam etching and laser Doppler Vibrometer were used to do structural and electrical characterization respectively. The measured resonance frequency of fabricated device i.e. 2.24 MHz is much closer to the designed value i.e. 2.35 MHz.

  9. Electrooptic shutter devices utilizing PLZT ceramic wafers

    Energy Technology Data Exchange (ETDEWEB)

    Thornton, A.L.

    1981-01-01

    Optical transparency was achieved in lead zirconate-titanate ferroelectric ceramics by substituting moderate amounts of the element lanthanum (8 to 12%) for lead. These compositions exhibit the quadratic (Kerr) electrooptic effect. The excellent optical qualities of these materials (designated PLZT) has permitted the practical utilization of their electrooptic properties in a number of devices. All of these devices utilize the classic Kerr cell arrangement. A PLZT wafer with optical axis oriented at 45/sup 0/ with respect to the axes of polarization is sandwiched between crossed polarizers. Application of an electric field via an interdigital array of electrodes on opposing wafer surfaces forces the PLZT material into a tetragonal state with the resulting induced birefringence proportional to the square of the applied electric field. Hence, the electrooptic wafer provides a retardation of light so that a component is passed by the second crossed polarizer to achieve an ON or open state. Maximum transmission is achieved when the retardation is half-wave. Shutter devices developed by Sandia and those in continuing development are described with respect to operational characteristics and physical configuration. The devices range in size from very small apertures of 50 ..mu..m x 2 mm with center-to-center repeat dimensions of 125 ..mu..m - to very large - apertures of 15.2 cm in single pieces and mosaics with apertures of 15.2 cm x 20.3 cm. Major efforts have centered on shutter development for the protection of aircrew from eye-damaging weapon effects. Other devices are also described which: provide eye protection for welders, protect vidicon tubes, function as page composers for holographic memories serve as large aperture photographic shutters, provide stereoscopic three-dimensional TV displays, and serve as data links in a fiber-optic transmission path.

  10. Wafer-scale charge isolation technique

    Energy Technology Data Exchange (ETDEWEB)

    Colella, N.J.; Kimbrough, J.R.

    1994-12-31

    An apparatus and method are described which improve the performance of charge-coupled devices (CCD) in the presence of ionizing radiation. The invention is a wafer scale charge isolation technique which inhibits or reduces the flow of electrons created by the passage of ionizing radiation in the bulk regions of a silicon CCD. The technique has been tested in a device designed for operating in the infra-red wavelength band. The technique prevents charge from reaching the active charge collection volume of a pixel in a CCD.

  11. Wafer-scale pixelated detector system

    Energy Technology Data Exchange (ETDEWEB)

    Fahim, Farah; Deptuch, Grzegorz; Zimmerman, Tom

    2017-10-17

    A large area, gapless, detection system comprises at least one sensor; an interposer operably connected to the at least one sensor; and at least one application specific integrated circuit operably connected to the sensor via the interposer wherein the detection system provides high dynamic range while maintaining small pixel area and low power dissipation. Thereby the invention provides methods and systems for a wafer-scale gapless and seamless detector systems with small pixels, which have both high dynamic range and low power dissipation.

  12. Candida parapsilosis meningitis associated with Gliadel (BCNU) wafer implants.

    LENUS (Irish Health Repository)

    O'brien, Deirdre

    2010-12-15

    A 58-year old male presented with meningitis associated with subgaleal and subdural collections 6 weeks following a temporal craniotomy for resection of recurrent glioblastoma multiforme and Gliadel wafer implantation. Candida parapsilosis was cultured from cerebrospinal fluid (CSF) and Gliadel wafers removed during surgical debridement. He was successfully treated with liposomal amphotericin B. To our knowledge, this is the first reported case of Candida parapsilosis meningitis secondary to Gliadel wafer placement.

  13. Candida parapsilosis meningitis associated with Gliadel (BCNU) wafer implants.

    LENUS (Irish Health Repository)

    O'Brien, Deirdre

    2012-02-01

    A 58-year old male presented with meningitis associated with subgaleal and subdural collections 6 weeks following a temporal craniotomy for resection of recurrent glioblastoma multiforme and Gliadel wafer implantation. Candida parapsilosis was cultured from cerebrospinal fluid (CSF) and Gliadel wafers removed during surgical debridement. He was successfully treated with liposomal amphotericin B. To our knowledge, this is the first reported case of Candida parapsilosis meningitis secondary to Gliadel wafer placement.

  14. Micro-miniature gas chromatograph column disposed in silicon wafers

    Science.gov (United States)

    Yu, Conrad M.

    2000-01-01

    A micro-miniature gas chromatograph column is fabricated by forming matching halves of a circular cross-section spiral microcapillary in two silicon wafers and then bonding the two wafers together using visual or physical alignment methods. Heating wires are deposited on the outside surfaces of each wafer in a spiral or serpentine pattern large enough in area to cover the whole microcapillary area inside the joined wafers. The visual alignment method includes etching through an alignment window in one wafer and a precision-matching alignment target in the other wafer. The two wafers are then bonded together using the window and target. The physical alignment methods include etching through vertical alignment holes in both wafers and then using pins or posts through corresponding vertical alignment holes to force precision alignment during bonding. The pins or posts may be withdrawn after curing of the bond. Once the wafers are bonded together, a solid phase of very pure silicone is injected in a solution of very pure chloroform into one end of the microcapillary. The chloroform lowers the viscosity of the silicone enough that a high pressure hypodermic needle with a thumbscrew plunger can force the solution into the whole length of the spiral microcapillary. The chloroform is then evaporated out slowly to leave the silicone behind in a deposit.

  15. Wafer-scale Mitochondrial Membrane Potential Assays

    Science.gov (United States)

    Lim, Tae-Sun; Davila, Antonio; Zand, Katayoun; Douglas, Wallace C.; Burke, Peter J.

    2012-01-01

    It has been reported that mitochondrial metabolic and biophysical parameters are associated with degenerative diseases and the aging process. To evaluate these biochemical parameters, current technology requires several hundred milligrams of isolated mitochondria for functional assays. Here, we demonstrate manufacturable wafer-scale mitochondrial functional assay lab-on-a-chip devices, which require mitochondrial protein quantities three orders of magnitude less than current assays, integrated onto 4” standard silicon wafer with new fabrication processes and materials. Membrane potential changes of isolated mitochondria from various well-established cell lines such as human HeLa cell line (Heb7A), human osteosarcoma cell line (143b) and mouse skeletal muscle tissue were investigated and compared. This second generation integrated lab-on-a-chip system developed here shows enhanced structural durability and reproducibility while increasing the sensitivity to changes in mitochondrial membrane potential by an order of magnitude as compared to first generation technologies. We envision this system to be a great candidate to substitute current mitochondrial assay systems. PMID:22627274

  16. MEMS Packaging - Current Issues and Approaches

    Energy Technology Data Exchange (ETDEWEB)

    DRESSENDORFER,PAUL V.; PETERSON,DAVID W.; REBER,CATHLEEN ANN

    2000-01-19

    The assembly and packaging of MEMS (Microelectromechanical Systems) devices raise a number of issues over and above those normally associated with the assembly of standard microelectronic circuits. MEMS components include a variety of sensors, microengines, optical components, and other devices. They often have exposed mechanical structures which during assembly require particulate control, space in the package, non-contact handling procedures, low-stress die attach, precision die placement, unique process schedules, hermetic sealing in controlled environments (including vacuum), and other special constraints. These constraints force changes in the techniques used to separate die on a wafer, in the types of packages which can be used in the assembly processes and materials, and in the sealing environment and process. This paper discusses a number of these issues and provides information on approaches being taken or proposed to address them.

  17. Interconnect mechanisms in microelectronic packaging

    Science.gov (United States)

    Roma, Maria Penafrancia C.

    alloy showed differences in adhesion strength and IMC formation. Bond strength by wire pull testing showed the 95Ag alloy with higher values while shear bond testing showed the 88Ag higher bond strength. Use of Cu pillars in flip chips and eutectic bonding in wafer level chip scale packages are direct consequences of diminishing interconnect dimension as a result of the drive for miniaturization. The combination of Cu-Sn interdiffusion, Kirkendall mechanism and heterogeneous vacancy precipitation are the main causes of IMC and void formation in Cu pillar - Sn solder - Cu lead frame sandwich structure. However, adding a Ni barrier agent showed less porous IMC layer as well as void formation as a result of the modified Cu and Sn movement well as the void formation. Direct die to die bonding using Al-Ge eutectic bonds is necessary when 3D integration is needed to reduce the footprint of a package. Hermeticity and adhesion strength are a function of the Al/Ge thickness ratio, bonding pressure, temperature and time. Scanning Electron Microscope (SEM) and Focused Ion Beam (FIB) allowed imaging of interfacial microstructures, porosity, grain morphology while Scanning Transmission Electron microscope (STEM) provided diffusion profile and confirmed interdiffusion. Ion polishing technique provided information on porosity and when imaged using backscattered mode, grain structure confirmed mechanical deformation of the bonds. Measurements of the interfacial bond strength are made by wire pull tests and ball shear tests based on existing industry standard tests. However, for the Al-Ge eutectic bonds, no standard strength is available so a test is developed using the stud pull test method using the Dage 4000 Plus to yield consistent results. Adhesion strengths of 30-40 MPa are found for eutectic bonded packages however, as low as 20MPa was measured in low temperature bonded areas.

  18. Advanced organics for electronic substrates and packages

    CERN Document Server

    Fletcher, Andrew E

    1992-01-01

    Advanced Organics for Electronic Substrates and Packages provides information on packaging, which is one of the most technologically intensive activities in the electronics industry. The electronics packaging community has realized that while semiconductor devices continue to be improved upon for performance, cost, and reliability, it is the interconnection or packaging of these devices that will limit the performance of the systems. Technology must develop packaging for transistor chips, with high levels of performance and integration providing cooling, power, and interconnection, and yet pre

  19. Assessment of microelectronics packaging for high temperature, high reliability applications

    Energy Technology Data Exchange (ETDEWEB)

    Uribe, F.

    1997-04-01

    This report details characterization and development activities in electronic packaging for high temperature applications. This project was conducted through a Department of Energy sponsored Cooperative Research and Development Agreement between Sandia National Laboratories and General Motors. Even though the target application of this collaborative effort is an automotive electronic throttle control system which would be located in the engine compartment, results of this work are directly applicable to Sandia`s national security mission. The component count associated with the throttle control dictates the use of high density packaging not offered by conventional surface mount. An enabling packaging technology was selected and thermal models defined which characterized the thermal and mechanical response of the throttle control module. These models were used to optimize thick film multichip module design, characterize the thermal signatures of the electronic components inside the module, and to determine the temperature field and resulting thermal stresses under conditions that may be encountered during the operational life of the throttle control module. Because the need to use unpackaged devices limits the level of testing that can be performed either at the wafer level or as individual dice, an approach to assure a high level of reliability of the unpackaged components was formulated. Component assembly and interconnect technologies were also evaluated and characterized for high temperature applications. Electrical, mechanical and chemical characterizations of enabling die and component attach technologies were performed. Additionally, studies were conducted to assess the performance and reliability of gold and aluminum wire bonding to thick film conductor inks. Kinetic models were developed and validated to estimate wire bond reliability.

  20. Delineation of Crystalline Extended Defects on Multicrystalline Silicon Wafers

    Directory of Open Access Journals (Sweden)

    Mohamed Fathi

    2007-01-01

    Full Text Available We have selected Secco and Yang etch solutions for the crystalline defect delineation on multicrystalline silicon (mc-Si wafers. Following experimentations and optimization of Yang and Secco etching process parameters, we have successfully revealed crystalline extended defects on mc-Si surfaces. A specific delineation process with successive application of Yang and Secco agent on the same sample has proved the increased sensitivity of Secco etch to crystalline extended defects in mc-Si materials. The exploration of delineated mc-Si surfaces indicated that strong dislocation densities are localized mainly close to the grain boundaries and on the level of small grains in size (below 1 mm. Locally, we have observed the formation of several parallel dislocation lines, perpendicular to the grain boundaries. The overlapping of several dislocations lines has revealed particular forms for etched pits of dislocations.

  1. 1366 Direct Wafer: Demolishing the Cost Barrier for Silicon Photovoltaics

    Energy Technology Data Exchange (ETDEWEB)

    Lorenz, Adam [1366 Technologies

    2013-08-30

    The goal of 1366 Direct Wafer™ is to drastically reduce the cost of silicon-based PV by eliminating the cost barrier imposed by sawn wafers. The key characteristics of Direct Wafer are 1) kerf-free, 156-mm standard silicon wafers 2) high throughput for very low CAPEX and rapid scale up. Together, these characteristics will allow Direct Wafer™ to become the new standard for silicon PV wafers and will enable terawatt-scale PV – a prospect that may not be possible with sawn wafers. Our single, high-throughput step will replace the expensive and rate-limiting process steps of ingot casting and sawing, thereby enabling drastically lower wafer cost. This High-Impact PV Supply Chain project addressed the challenges of scaling Direct Wafer technology for cost-effective, high-throughput production of commercially viable 156 mm wafers. The Direct Wafer process is inherently simple and offers the potential for very low production cost, but to realize this, it is necessary to demonstrate production of wafers at high-throughput that meet customer specifications. At the start of the program, 1366 had demonstrated (with ARPA-E funding) increases in solar cell efficiency from 10% to 15.9% on small area (20cm2), scaling wafer size up to the industry standard 156mm, and demonstrated initial cell efficiency on larger wafers of 13.5%. During this program, the throughput of the Direct Wafer furnace was increased by more than 10X, simultaneous with quality improvements to meet early customer specifications. Dedicated equipment for laser trimming of wafers and measurement methods were developed to feedback key quality metrics to improve the process and equipment. Subsequent operations served both to determine key operating metrics affecting cost, as well as generating sample product that was used for developing downstream processing including texture and interaction with standard cell processing. Dramatic price drops for silicon wafers raised the bar significantly, but the

  2. Functional Package Management with Guix

    OpenAIRE

    Courtès, Ludovic

    2013-01-01

    International audience; We describe the design and implementation of GNU Guix, a purely functional package manager designed to support a complete GNU/Linux distribution. Guix supports transactional upgrades and roll-backs, unprivileged package management, per-user profiles, and garbage collection. It builds upon the low-level build and deployment layer of the Nix package manager. Guix uses Scheme as its programming interface. In particular, we devise an embedded domain-specific language (EDSL...

  3. Novel Ruggedized Packaging Technology for VCSELs

    Science.gov (United States)

    2017-03-01

    creates board-level solder interconnect at the wafer level, e liminating t he cost and parasitics as sociated with p ackages. O TDR technology enables...10.3125 is -12.6 dBm OMA. SERDES TOSA Wavelength/fiber dependant components LDD fiber plant ROSATIA-LA ROSA OTDR RX Pulse Gen MUX OTDR ASIC

  4. Direct Electroplating on Highly Doped Patterned Silicon Wafers

    NARCIS (Netherlands)

    Vargas Llona, Laura Dolores; Jansen, Henricus V.; Elwenspoek, Michael Curt

    Nickel thin films have been electrodeposited directly on highly doped silicon wafers after removal of the native oxide layer. These substrates conduct sufficiently well to allow deposition using a periferical electrical contact on the wafer. Films 2 μm thick were deposited using a nickel sulfamate

  5. Si-to-Si wafer bonding using evaporated glass

    DEFF Research Database (Denmark)

    Reus, Roger De; Lindahl, M.

    1997-01-01

    Anodic bonding of Si to Si four inch wafers using evaporated glass was performed in air at temperatures ranging from 300°C to 450°C. Although annealing of Si/glass structures around 340°C for 15 minutes eliminates stress, the bonded wafer pairs exhibit compressive stress. Pull testing revealed...

  6. Corrosion testing of selected packaging materials for disposal of high-level waste glass in rock-salt formations

    Energy Technology Data Exchange (ETDEWEB)

    Smailos, E.; Schwarzkopf, W.; Koester, R.; Fiehn, B.; Halm, G. [Kernforschungszentrum Karlsruhe GmbH (DE)

    1991-12-31

    In previous corrosion studies performed in salt brines, unalloyed steels, Ti 99.8-Pd and Hastelloy C4 have proved to be the most promising materials for long-term resistant packagings to be used in heat-generating waste (vitrified HLW, spent fuel) disposal in rock-salt formations. Investigations of the iron-base materials Ni-Resist D2 and D4, cast iron and Si-cast iron have also been carried out in order to complete the results available to date. The three steels (fine-grained steel, low-carbon steel, cast steel) investigated and Ti 99.8-Pd resisted pitting and crevice corrosion as well as stress-corrosion cracking under all test conditions. Gamma dose-rates of 1 Gy/h - 100 Gy/h or H{sub 2}S concentrations in the brines as well as welding and explosion plating did not influence noticeably the corrosion behaviour of the materials. Furthermore, the determined corrosion rates of the steels (50 {mu}m/a-250 {mu}m/a, depending on the test conditions) are intercomparable and imply technically acceptable corrosion allowances for the thick-walled containers discussed. For Ti 99.8-Pd no detectable corrosion was observed. By contrast, Hastelloy C4 proved susceptible to pitting and crevice corrosion at gamme dose-rates higher than 1 Gy/h and in the presence of H{sub 2}S (25 mg/l) in Q-brine. The materials Ni Resist D2 and D4, cast iron and Si-cast iron corroded at negligible rates in the in-situ experiments performed in rock salt/limited amounts of NaCI-brine. Nevertheless, these materials must be ruled out as container materials because they have proved to be susceptible to pitting and intergranular corrosion in previous laboratory studies conducted with MgCI{sub 2}-rich brine (Q-brine) in excess. 15 refs.; 29 figs.; 7 tabs.

  7. Semiconductor industry wafer fab exhaust management

    CERN Document Server

    Sherer, Michael J

    2005-01-01

    Given the myriad exhaust compounds and the corresponding problems that they can pose in an exhaust management system, the proper choice of such systems is a complex task. Presenting the fundamentals, technical details, and general solutions to real-world problems, Semiconductor Industry: Wafer Fab Exhaust Management offers practical guidance on selecting an appropriate system for a given application. Using examples that provide a clear understanding of the concepts discussed, Sherer covers facility layout, support facilities operations, and semiconductor process equipment, followed by exhaust types and challenges. He reviews exhaust point-of-use devices and exhaust line requirements needed between process equipment and the centralized exhaust system. The book includes information on wet scrubbers for a centralized acid exhaust system and a centralized ammonia exhaust system and on centralized equipment to control volatile organic compounds. It concludes with a chapter devoted to emergency releases and a separ...

  8. New package for CMOS sensors

    Science.gov (United States)

    Diot, Jean-Luc; Loo, Kum Weng; Moscicki, Jean-Pierre; Ng, Hun Shen; Tee, Tong Yan; Teysseyre, Jerome; Yap, Daniel

    2004-02-01

    Cost is the main drawback of existing packages for C-MOS sensors (mainly CLCC family). Alternative packages are thus developed world-wide. And in particular, S.T.Microelectronics has studied a low cost alternative packages based on QFN structure, still with a cavity. Intensive work was done to optimize the over-molding operation forming the cavity onto a metallic lead-frame (metallic lead-frame is a low cost substrate allowing very good mechanical definition of the final package). Material selection (thermo-set resin and glue for glass sealing) was done through standard reliability tests for cavity packages (Moisture Sensitivity Level 3 followed by temperature cycling, humidity storage and high temperature storage). As this package concept is new (without leads protruding the molded cavity), the effect of variation of package dimensions, as well as board lay-out design, are simulated on package life time (during temperature cycling, thermal mismatch between board and package leads to thermal fatigue of solder joints). These simulations are correlated with an experimental temperature cycling test with daisy-chain packages.

  9. IN-PACKAGE CHEMISTRY ABSTRACTION

    Energy Technology Data Exchange (ETDEWEB)

    E. Thomas

    2005-07-14

    This report was developed in accordance with the requirements in ''Technical Work Plan for Postclosure Waste Form Modeling'' (BSC 2005 [DIRS 173246]). The purpose of the in-package chemistry model is to predict the bulk chemistry inside of a breached waste package and to provide simplified expressions of that chemistry as a function of time after breach to Total Systems Performance Assessment for the License Application (TSPA-LA). The scope of this report is to describe the development and validation of the in-package chemistry model. The in-package model is a combination of two models, a batch reactor model, which uses the EQ3/6 geochemistry-modeling tool, and a surface complexation model, which is applied to the results of the batch reactor model. The batch reactor model considers chemical interactions of water with the waste package materials, and the waste form for commercial spent nuclear fuel (CSNF) waste packages and codisposed (CDSP) waste packages containing high-level waste glass (HLWG) and DOE spent fuel. The surface complexation model includes the impact of fluid-surface interactions (i.e., surface complexation) on the resulting fluid composition. The model examines two types of water influx: (1) the condensation of water vapor diffusing into the waste package, and (2) seepage water entering the waste package as a liquid from the drift. (1) Vapor-Influx Case: The condensation of vapor onto the waste package internals is simulated as pure H{sub 2}O and enters at a rate determined by the water vapor pressure for representative temperature and relative humidity conditions. (2) Liquid-Influx Case: The water entering a waste package from the drift is simulated as typical groundwater and enters at a rate determined by the amount of seepage available to flow through openings in a breached waste package.

  10. [Use of functional packages of medical stuff by military level of medical service of the Armed Forces].

    Science.gov (United States)

    Miroshnichenko, Iu V; Kononov, V N; Miliaev, A V; Stupnikov, A V; Slobodeniuk, A V

    2013-11-01

    Authors submitted results of recent developments made by The Kirov Military-Medical Academy and OOO "Special medical equipment" in accordance with State defence order in the area of modernization of the system of organizational equipment of military level of medical service of the Armed Forces of the Russian Federation. Along with other samples of organizational equipment, new functional equipment of medical stuff was developed and approved as supply. New equipment of medical stuff meets modern requirements and is highly valuated by medical services of foreign countries. Authors came to conclusion that functional equipment which is approved as supply and included into the Supply rate provides operational flexibility of set-up/tear-down stages of medical evacuation under the conditions of battlefield, allows to deliver medical aid on the basis of innovative medical technologies.

  11. Proton irradiation effects on the properties of silicon wafer

    Energy Technology Data Exchange (ETDEWEB)

    Kwon, Gihyun; Shin, Chansun [Myongji University, Yongin (Korea, Republic of); Sun, Gwang-Min [Korea Atomic Energy Research Institute, Daejeon (Korea, Republic of)

    2016-10-15

    The study the effect of energetic particle irradiation on the properties of semiconductor devices has been interested for developing and utilizing semiconductor irradiation detectors under various irradiation conditions such as large hadron collider in CERN. In this study, we investigated the influence of proton irradiation on carrier lifetime and electrical resistance of silicon wafers. Proton is known to make a stable irradiation defects in silicon. These irradiation defects form a new energy level within the band gap, hence affect the properties of silicon. The irradiation defects generated by proton irradiation affect the carrier lifetime by capturing excess carriers and the electrical resistance by hindering the carrier movement. In this study, the carrier lifetime of proton-irradiated silicon substrates was found to decrease rapidly as the irradiation dose increases. On the other hand, the sheet electrical resistance was not significantly changed up to the irradiation dose level of 10{sup 12} cm{sup -2}. Hence, proton irradiation less than dose level of 10{sup 12} cm{sup -2} can be utilized to decrease carrier lifetime significantly without sacrificing the electrical resistance.

  12. On-wafer magnetic resonance of magnetite nanoparticles

    Energy Technology Data Exchange (ETDEWEB)

    Little, Charles A.E., E-mail: caelittle@gmail.com; Russek, Stephen E., E-mail: stephen.russek@nist.gov; Booth, James C., E-mail: james.booth@nist.gov; Kabos, Pavel, E-mail: pavel.kabos@nist.gov; Usselman, Robert J., E-mail: robertusselman@gmail.com

    2015-11-01

    Magnetic resonance measurements of ferumoxytol and TEMPO were made using an on-wafer transmission line technique with a vector network analyzer, allowing for broadband measurements of small sample volumes (4 nL) and small numbers of spins (1 nmol). On-wafer resonance measurements were compared with standard single-frequency cavity-based electron paramagnetic resonance (EPR) measurements using a new power conservation approach and the results show similar line shape. On-wafer magnetic resonance measurements using integrated microfluidics and microwave technology can significantly reduce the cost and sample volumes required for EPR spectral analysis and allow for integration of EPR with existing lab-on-a-chip processing and characterization techniques for point-of-care medical diagnostic applications. - Highlights: • On-wafer measurements showed similar line shape to traditional cavity-based EPR. • New power conservation approach alleviates de-embedding ambiguities. • Allows for measurements of small sample volumes and small number of spins.

  13. High Performance Wafer-Based Capillary Electrochromatography Project

    Data.gov (United States)

    National Aeronautics and Space Administration — Los Gatos Research proposes to develop wafer-based capillary electrochromatography for lab-on-a-chip (LOC) applications. These microfluidic devices will be...

  14. Electronic properties of interfaces produced by silicon wafer hydrophilic bonding

    Energy Technology Data Exchange (ETDEWEB)

    Trushin, Maxim

    2011-07-15

    The thesis presents the results of the investigations of electronic properties and defect states of dislocation networks (DNs) in silicon produced by wafers direct bonding technique. A new insight into the understanding of their very attractive properties was succeeded due to the usage of a new, recently developed silicon wafer direct bonding technique, allowing to create regular dislocation networks with predefined dislocation types and densities. Samples for the investigations were prepared by hydrophilic bonding of p-type Si (100) wafers with same small misorientation tilt angle ({proportional_to}0.5 ), but with four different twist misorientation angles Atw (being of < , 3 , 6 and 30 , respectively), thus giving rise to the different DN microstructure on every particular sample. The main experimental approach of this work was the measurements of current and capacitance of Schottky diodes prepared on the samples which contained the dislocation network at a depth that allowed one to realize all capabilities of different methods of space charge region spectroscopy (such as CV/IV, DLTS, ITS, etc.). The key tasks for the investigations were specified as the exploration of the DN-related gap states, their variations with gradually increasing twist angle Atw, investigation of the electrical field impact on the carrier emission from the dislocation-related states, as well as the establishing of the correlation between the electrical (DLTS), optical (photoluminescence PL) and structural (TEM) properties of DNs. The most important conclusions drawn from the experimental investigations and theoretical calculations can be formulated as follows: - DLTS measurements have revealed a great difference in the electronic structure of small-angle (SA) and large-angle (LA) bonded interfaces: dominating shallow level and a set of 6-7 deep levels were found in SA-samples with Atw of 1 and 3 , whereas the prevalent deep levels - in LA-samples with Atw of 6 and 30 . The critical twist

  15. Automated reticle inspection data analysis for wafer fabs

    Science.gov (United States)

    Summers, Derek; Chen, Gong; Reese, Bryan; Hutchinson, Trent; Liesching, Marcus; Ying, Hai; Dover, Russell

    2009-04-01

    To minimize potential wafer yield loss due to mask defects, most wafer fabs implement some form of reticle inspection system to monitor photomask quality in high-volume wafer manufacturing environments. Traditionally, experienced operators review reticle defects found by an inspection tool and then manually classify each defect as 'pass, warn, or fail' based on its size and location. However, in the event reticle defects are suspected of causing repeating wafer defects on a completed wafer, potential defects on all associated reticles must be manually searched on a layer-by-layer basis in an effort to identify the reticle responsible for the wafer yield loss. This 'problem reticle' search process is a very tedious and time-consuming task and may cause extended manufacturing line-down situations. Often times, Process Engineers and other team members need to manually investigate several reticle inspection reports to determine if yield loss can be tied to a specific layer. Because of the very nature of this detailed work, calculation errors may occur resulting in an incorrect root cause analysis effort. These delays waste valuable resources that could be spent working on other more productive activities. This paper examines an automated software solution for converting KLA-Tencor reticle inspection defect maps into a format compatible with KLA-Tencor's Klarity Defect(R) data analysis database. The objective is to use the graphical charting capabilities of Klarity Defect to reveal a clearer understanding of defect trends for individual reticle layers or entire mask sets. Automated analysis features include reticle defect count trend analysis and potentially stacking reticle defect maps for signature analysis against wafer inspection defect data. Other possible benefits include optimizing reticle inspection sample plans in an effort to support "lean manufacturing" initiatives for wafer fabs.

  16. Surface recombination velocity of silicon wafers by photoluminescence

    Science.gov (United States)

    Baek, D.; Rouvimov, S.; Kim, B.; Jo, T.-C.; Schroder, D. K.

    2005-03-01

    Photoluminescence (PL) and optical reflection measurements, obtained in the two-wavelength SiPHER PL instrument, are used to determine the surface recombination velocity of silicon wafers. Local measurements and contour maps are possible allowing surface recombination maps to be displayed. This instrument also allows doping and trap density measurements. Surface recombination velocities from 10 to 106cm/s can be measured on low or high resistivity polished and epitaxial wafers.

  17. Electrochemical method for defect delineation in silicon-on-insulator wafers

    Science.gov (United States)

    Guilinger, Terry R.; Jones, Howland D. T.; Kelly, Michael J.; Medernach, John W.; Stevenson, Joel O.; Tsao, Sylvia S.

    1991-01-01

    An electrochemical method for defect delineation in thin-film SOI or SOS wafers in which a surface of a silicon wafer is electrically connected so as to control the voltage of the surface within a specified range, the silicon wafer is then contacted with an electrolyte, and, after removing the electrolyte, defects and metal contamination in the silicon wafer are identified.

  18. A user's guide to the GoldSim/BLT-MS integrated software package:a low-level radioactive waste disposal performance assessment model.

    Energy Technology Data Exchange (ETDEWEB)

    Knowlton, Robert G.; Arnold, Bill Walter; Mattie, Patrick D.

    2007-03-01

    Sandia National Laboratories (Sandia), a U.S. Department of Energy National Laboratory, has over 30 years experience in the assessment of radioactive waste disposal and at the time of this publication is providing assistance internationally in a number of areas relevant to the safety assessment of radioactive waste disposal systems. In countries with small radioactive waste programs, international technology transfer program efforts are often hampered by small budgets, schedule constraints, and a lack of experienced personnel. In an effort to surmount these difficulties, Sandia has developed a system that utilizes a combination of commercially available software codes and existing legacy codes for probabilistic safety assessment modeling that facilitates the technology transfer and maximizes limited available funding. Numerous codes developed and endorsed by the United States Nuclear Regulatory Commission (NRC) and codes developed and maintained by United States Department of Energy are generally available to foreign countries after addressing import/export control and copyright requirements. From a programmatic view, it is easier to utilize existing codes than to develop new codes. From an economic perspective, it is not possible for most countries with small radioactive waste disposal programs to maintain complex software, which meets the rigors of both domestic regulatory requirements and international peer review. Therefore, revitalization of deterministic legacy codes, as well as an adaptation of contemporary deterministic codes, provides a credible and solid computational platform for constructing probabilistic safety assessment models. This document is a reference users guide for the GoldSim/BLT-MS integrated modeling software package developed as part of a cooperative technology transfer project between Sandia National Laboratories and the Institute of Nuclear Energy Research (INER) in Taiwan for the preliminary assessment of several candidate low-level

  19. Epitaxial silicon carbide on a 6″ silicon wafer

    Science.gov (United States)

    Kukushkin, S. A.; Lukyanov, A. V.; Osipov, A. V.; Feoktistov, N. A.

    2014-01-01

    The results of the growth of silicon-carbide films on silicon wafers with a large diameter of 150 mm (6″) by using a new method of solid-phase epitaxy are presented. A SiC film growing on Si wafers was studied by means of spectral ellipsometry, SEM, X-ray diffraction, and Raman scattering. As follows from the studies, SiC layers are epitaxial over the entire surface of a 150-mm wafer. The wafers have no mechanical stresses, are smooth, and do not have bends. The half-width of the X-ray rocking curve (FWHMω- θ) of the wafers varies in the range from 0.7° to 0.8° across the thickness layer of 80-100 nm. The wafers are suitable as templates for the growth of SiC, AlN, GaN, ZnO, and other wide-gap semiconductors on its surface using standard CVD, HVPE, and MBE methods.

  20. Strategy optimization for mask rule check in wafer fab

    Science.gov (United States)

    Yang, Chuen Huei; Lin, Shaina; Lin, Roger; Wang, Alice; Lee, Rachel; Deng, Erwin

    2015-07-01

    Photolithography process is getting more and more sophisticated for wafer production following Moore's law. Therefore, for wafer fab, consolidated and close cooperation with mask house is a key to achieve silicon wafer success. However, generally speaking, it is not easy to preserve such partnership because many engineering efforts and frequent communication are indispensable. The inattentive connection is obvious in mask rule check (MRC). Mask houses will do their own MRC at job deck stage, but the checking is only for identification of mask process limitation including writing, etching, inspection, metrology, etc. No further checking in terms of wafer process concerned mask data errors will be implemented after data files of whole mask are composed in mask house. There are still many potential data errors even post-OPC verification has been done for main circuits. What mentioned here are the kinds of errors which will only occur as main circuits combined with frame and dummy patterns to form whole reticle. Therefore, strategy optimization is on-going in UMC to evaluate MRC especially for wafer fab concerned errors. The prerequisite is that no impact on mask delivery cycle time even adding this extra checking. A full-mask checking based on job deck in gds or oasis format is necessary in order to secure acceptable run time. Form of the summarized error report generated by this checking is also crucial because user friendly interface will shorten engineers' judgment time to release mask for writing. This paper will survey the key factors of MRC in wafer fab.

  1. MASA SIMPAN BUAH MANGGIS (Garcinia mangostana L. PADA BERBAGAI TINGKAT KEMATANGAN, SUHU DAN JENID KEMASAN [Shelf life of Manggis Fruit (Garcinia mangostana L. at Various Fruit Maturity Levels, Temperature, and Types of Packaging

    Directory of Open Access Journals (Sweden)

    Hasbi1

    2005-12-01

    Full Text Available The objective of this research was to study the effect of manggis fruit maturity levels, temperature, and types of packaging on the shelf fife of manggis fruit (Garcinia mangostana L, The experimental design used was Factorial Completely Randomized Design with three factors consisting of manggis fruit maturity levels (tinged with purple and brown, packaging types (flexible and stretch film, and storage temperature (l50C and 250C using two replication for each treatment. The result showed that maturity level had significant effect on weight toss, color but had no significant effect on hardness, total sugar and total acid of manggis fruit during storage. The suitable packaging type to maintain the quality of manggis fruit with maturity level of tinged purple was the flexible type, which result n a shelf life of 33 days. Packaging suitable for manggis fruit with maturity level of brown was the stretch type, which had the shelf life of 39 days. Storage temperature to maintain quality was l50C.

  2. Wafer current measurement for process monitoring

    Science.gov (United States)

    Shur, Dmitry; Kadyshevitch, Alexander; Zelenko, Jeremy; Mata, Carlos; Verdugo, Victor; Guittet, Pierre-Yves; Starr, Brian; Duncan, Craig; Ventola, Stefano; Klinger, Jan

    2005-05-01

    Wafer Current Measurement (WCM) is an emerging technique for in-line process monitoring. A joint development project (JDP) has been conducted by Infineon Technologies and Applied Ma-terials (Process Diagnostics and Control Group). The main goal of this project was development of applications for the WCM technique in production environment and specifically for state of the art DRAM Infineon process. A new generation of SEM review tool with integrated FIB (Ap-plied SEMVision G2 FIB Defect Analysis system) was used for this work. A challenging layer approached in this work was the DTMO (Deep Trench Mask Open) which serves as a hard mask for subsequent deep trench (DT) capacitor formation in a silicon substrate. The aspect ratio of the openings in the DTMO layer can be as high as 20:1. As a result of the aggressive aspect ra-tio and sub-100 nm CDs the only available techniques for evaluating DTMO etch integrity (pos-sible under-etch and/or bottom CD variation) are destructive analysis methods. As a result of the extensive JDP, crucial yield limiting problems such as dielectric or/and stop layer under-etch as well as bottom CD violation have been revealed by the WCM in-line rather than by cross-sectioning in failure analysis laboratory or other destructive means. Besides, on the basis of bottom CD sensitivity of the WCM technique, etch chamber qualification (including matching and adjustment) feasibility was conducted. The motivation behind this is that chamber qualification is essential to shorten cycle time. In production environment the WCM technique is targeted for two basic applications: process monitoring including excursion control and early etch process drift warning and in-line etch chamber qualification. WCM "pilot" has been performed in production after DTMO for four novel DRAM products with CD down to 70 nm.

  3. Modular packaging concept for MEMS and MOEMS

    Science.gov (United States)

    Stenchly, Vanessa; Reinert, Wolfgang; Quenzer, Hans-Joachim

    2017-11-01

    Wherever technical systems detect objects in their environment or interact with people, optical devices may play an important role. Light can be relatively easily produced and spatially and temporally modulated. Laser can project sharp images over long distances or cut materials in short distances. Depending on the wavelength an invisible scanning in near infrared for gesture recognition is possible as well as a projection of brilliant colour images. For several years, the Fraunhofer ISIT develops Opto-Packaging processes based on the viscous reshaping of glass wafers: First, hermetically sealed laser micro-mirror scanners WLP with inclined windows deflect in the central light reflex of the window out of the image area. Second, housing with lateral light exit permits hermetic sealing of edge-emitting lasers for highest reliability and durability. Such systems are currently experiencing an extremely high interest of the industry in all segments, from consumer to automotive through to materials processing. Our modular Opto-Packaging platform enables fast product developments. Housing for opto mechanical MEMS devices are equipped with inclined windows to minimize distortion, stray light and reflection losses. The hot viscous glass forming technology is also applied to functionalized substrate wafers which possess areas with high heat dissipation in addition to thermally insulating areas. Electrical contacts may be realized with metal filled vias or TGV (Through Glass Vias). The modular system reduces the development times for new, miniaturized optical systems so that manufacturers can focus on the essentials in their development, namely their product functionalities.

  4. Field Level Computer Exploitation Package

    Science.gov (United States)

    2007-03-01

    the study of network forensics. This has become a necessity because of the constantly growing eCommerce industry and the stiff competition between...Making it even easier to use could benefit the user in the field and would make it usable by a larger population. One way of doing this would be

  5. Single-mode glass waveguide technology for optical interchip communication on board level

    Science.gov (United States)

    Brusberg, Lars; Neitz, Marcel; Schröder, Henning

    2012-01-01

    The large bandwidth demand in long-distance telecom networks lead to single-mode fiber interconnects as result of low dispersion, low loss and dense wavelength multiplexing possibilities. In contrast, multi-mode interconnects are suitable for much shorter lengths up to 300 meters and are promising for optical links between racks and on board level. Active optical cables based on multi-mode fiber links are at the market and research in multi-mode waveguide integration on board level is still going on. Compared to multi-mode, a single-mode waveguide has much more integration potential because of core diameters of around 20% of a multi-mode waveguide by a much larger bandwidth. But light coupling in single-mode waveguides is much more challenging because of lower coupling tolerances. Together with the silicon photonics technology, a single-mode waveguide technology on board-level will be the straight forward development goal for chip-to-chip optical interconnects integration. Such a hybrid packaging platform providing 3D optical single-mode links bridges the gap between novel photonic integrated circuits and the glass fiber based long-distance telecom networks. Following we introduce our 3D photonic packaging approach based on thin glass substrates with planar integrated optical single-mode waveguides for fiber-to-chip and chip-to-chip interconnects. This novel packaging approach merges micro-system packaging and glass integrated optics. It consists of a thin glass substrate with planar integrated singlemode waveguide circuits, optical mirrors and lenses providing an integration platform for photonic IC assembly and optical fiber interconnect. Thin glass is commercially available in panel and wafer formats and characterizes excellent optical and high-frequency properties. That makes it perfect for microsystem packaging. The paper presents recent results in single-mode waveguide technology on wafer level and waveguide characterization. Furthermore the integration in a

  6. On the design of GaN vertical MESFETs on commercial LED sapphire wafers

    Science.gov (United States)

    Atalla, Mahmoud R. M.; Noor Elahi, Asim M.; Mo, Chen; Jiang, Zhenyu; Liu, Jie; Ashok, S.; Xu, Jian

    2016-12-01

    Design of GaN-based vertical metal-semiconductor field-effect transistors (MESFETs) on commercial light-emitting-diode (LED) epi-wafers has been proposed and proof of principle devices have been fabricated. In order to better understand the IV curves, these devices have been simulated using the charge transport model. It was found that shrinking the drain pillar size would significantly help in reaching cut-off at much lower gate bias even at high carrier concentration of unintentionally doped GaN and considerable leakage current caused by the Schottky barrier lowering. The realization of these vertical MESFETs on LED wafers would allow their chip-level integration. This would open a way to many intelligent lighting applications like on-chip current regulator and signal regulation/communication in display technology.

  7. Level 4 Milestone (M4): M41UF033201 - Review of Radiolysis of Brines on the Surface of a Waste Package

    Energy Technology Data Exchange (ETDEWEB)

    Sutton, Mark [Lawrence Livermore National Lab. (LLNL), Livermore, CA (United States)

    2011-08-12

    This milestone report (M41UF033201) documents a literature review of relevant publications for gamma radiolysis occurring within a droplet of water on the outside of a waste package in a repository environment within the “

  8. The influence of threatening visual warnings on tobacco packaging: Measuring the impact of threat level, image size, and type of pack through psychophysiological and self-report methods

    National Research Council Canada - National Science Library

    Olivier Droulers; Karine Gallopel-Morvan; Sophie Lacoste-Badie; Mathieu Lajante

    2017-01-01

    ...–for the first time in this context–to measure the emotions provoked by TVWs. The second aim of this research was to determine whether increasing the size of warnings, and their display on plain packaging...

  9. SCIL nanoimprint solutions: high-volume soft NIL for wafer scale sub-10nm resolution

    Science.gov (United States)

    Voorkamp, R.; Verschuuren, M. A.; van Brakel, R.

    2016-10-01

    yield. Soft stamps, usually based on silicone rubber, behave fundamentally different compared to rigid stamps on the macro-, micro- and nanometer level. The main limitation of traditional silicones is that they are too soft to support sub-micron features against surface tension based stamp deformation and collapse [4] and handling a soft stamp to achieve accurate feature placement on wafer scales to allow overlay alignment with sub-100nm overlay accuracy.

  10. High Efficiency Integrated Package

    Energy Technology Data Exchange (ETDEWEB)

    Ibbetson, James

    2013-09-15

    Solid-state lighting based on LEDs has emerged as a superior alternative to inefficient conventional lighting, particularly incandescent. LED lighting can lead to 80 percent energy savings; can last 50,000 hours – 2-50 times longer than most bulbs; and contains no toxic lead or mercury. However, to enable mass adoption, particularly at the consumer level, the cost of LED luminaires must be reduced by an order of magnitude while achieving superior efficiency, light quality and lifetime. To become viable, energy-efficient replacement solutions must deliver system efficacies of ≥ 100 lumens per watt (LPW) with excellent color rendering (CRI > 85) at a cost that enables payback cycles of two years or less for commercial applications. This development will enable significant site energy savings as it targets commercial and retail lighting applications that are most sensitive to the lifetime operating costs with their extended operating hours per day. If costs are reduced substantially, dramatic energy savings can be realized by replacing incandescent lighting in the residential market as well. In light of these challenges, Cree proposed to develop a multi-chip integrated LED package with an output of > 1000 lumens of warm white light operating at an efficacy of at least 128 LPW with a CRI > 85. This product will serve as the light engine for replacement lamps and luminaires. At the end of the proposed program, this integrated package was to be used in a proof-of-concept lamp prototype to demonstrate the component’s viability in a common form factor. During this project Cree SBTC developed an efficient, compact warm-white LED package with an integrated remote color down-converter. Via a combination of intensive optical, electrical, and thermal optimization, a package design was obtained that met nearly all project goals. This package emitted 1295 lm under instant-on, room-temperature testing conditions, with an efficacy of 128.4 lm/W at a color temperature of ~2873

  11. The impact of packaging on product competition

    Directory of Open Access Journals (Sweden)

    Maryam Masoumi

    2012-09-01

    Full Text Available The primary objective of this paper is to detect important factors, which are influencing competitive advantage. The proposed model of this paper uses sampling technique to measure characteristics of society. There are eight independent variables for the proposed study of this paper including packaging endurance, easy distribution, customer promotion through packaging, packaging structure, packaging as silent advertiser, diversity of packaging, clean and healthy packaging and innovation in packaging. The proposed study uses structural equation modeling to either accept or reject all hypotheses associated with the proposed study of this paper. The population of this study includes all managers and experts who are involved in packaging products. We used simple sampling technique and chooses 300 from a population of 450 people who are considered as the population of this survey. Cronbach alpha was determined as 0.732, which is above the minimum acceptable level. The results confirm that all mentioned factors influence competitiveness, effectively.

  12. Effect of Initial Headspace O2 Level on the Growth and Volatile Metabolite Production of Leuconostoc Mesenteriodes and the Microbial and Sensorial Quality of Modified Atmosphere Packaged Par-Fried French Fries.

    Science.gov (United States)

    Samapundo, Simbarashe; Mujuru, Felix Mugove; de Baenst, Ilse; Denon, Quenten; Devlieghere, Frank

    2016-02-01

    This study evaluated the effect of residual O2 level (0% to 5%) on microbial growth and volatile metabolite production on par-fried French fries packaged in a modified atmosphere with 60% CO2 (rest N2 ) at 4 °C. The results obtained showed that the initial headspace (IH) O2 level had an effect on growth of Leuconostoc mesenteroides on French fry simulation agar, whereby growth was slightly faster under 5% O2 . In terms of quantity, ethanol, 2-methyl-1-propanol, and dimethyl disulphide were the most significant volatile metabolites produced by L. mesenteroides. The production of ethanol by L. mesenteroides was highest on simulation agar packaged under low IH O2 levels (0% to 1%), indicating that the fermentative metabolism was induced under these conditions. In agreement with the results observed on the simulation medium, growth of native lactic acid bacteria was faster under an IH O2 level of 5%. In addition, ethanol, 2-methyl-1-propanol, and dimethyl disulphide were also quantitatively the most important volatile metabolites. However, in contrast, greater quantities of ethanol and dimethyl disulphide were produced on par-fried French fries packaged under 5% O2 . This was attributed to the limited growth of the native flora on the par-fried French fries under residual O2 levels of 0% and 1%. Although some significant differences (P < 0.05) occurred between the French fries packaged in 0%, 1%, and 5 % residual O2 during storage, all products were considered to be acceptable for consumption. The results of this study can be used to optimize the shelf-life of packaged chill stored potato products. © 2016 Institute of Food Technologists®

  13. ILT based defect simulation of inspection images accurately predicts mask defect printability on wafer

    Science.gov (United States)

    Deep, Prakash; Paninjath, Sankaranarayanan; Pereira, Mark; Buck, Peter

    2016-05-01

    printability of defects at wafer level and automates the process of defect dispositioning from images captured using high resolution inspection machine. It first eliminates false defects due to registration, focus errors, image capture errors and random noise caused during inspection. For the remaining real defects, actual mask-like contours are generated using the Calibre® ILT solution [1][2], which is enhanced to predict the actual mask contours from high resolution defect images. It enables accurate prediction of defect contours, which is not possible from images captured using inspection machine because some information is already lost due to optical effects. Calibre's simulation engine is used to generate images at wafer level using scanner optical conditions and mask-like contours as input. The tool then analyses simulated images and predicts defect printability. It automatically calculates maximum CD variation and decides which defects are severe to affect patterns on wafer. In this paper, we assess the printability of defects for the mask of advanced technology nodes. In particular, we will compare the recovered mask contours with contours extracted from SEM image of the mask and compare simulation results with AIMSTM for a variety of defects and patterns. The results of printability assessment and the accuracy of comparison are presented in this paper. We also suggest how this method can be extended to predict printability of defects identified on EUV photomasks.

  14. Silicon-Based On-Wafer Packaging for High Isolation in High-Density Circuits

    National Research Council Canada - National Science Library

    Katehi, Linda

    1998-01-01

    ... in an effort to minimize it while at the same time circuit efficiency is optimized. The developed architectures for maximum isolation and minimum loss are presently applied towards the design of a three-stage low-noise amplifier...

  15. Photolithography and Micro-Fabrication/ Packaging Laboratories

    Data.gov (United States)

    Federal Laboratory Consortium — The Photolithography and Micro-Fabrication/Packaging laboratories provide research level semiconductor processing equipment and facilities that do not require a full...

  16. Fuzzy TOPSIS for Multiresponse Quality Problems in Wafer Fabrication Processes

    Directory of Open Access Journals (Sweden)

    Chiun-Ming Liu

    2013-01-01

    Full Text Available The quality characteristics in the wafer fabrication process are diverse, variable, and fuzzy in nature. How to effectively deal with multiresponse quality problems in the wafer fabrication process is a challenging task. In this study, the fuzzy technique for order preference by similarity to an ideal solution (TOPSIS, one of the fuzzy multiattribute decision-analysis (MADA methods, is proposed to investigate the fuzzy multiresponse quality problem in integrated-circuit (IC wafer fabrication process. The fuzzy TOPSIS is one of the effective fuzzy MADA methods for dealing with decision-making problems under uncertain environments. First, a fuzzy TOPSIS methodology is developed by considering the ambiguity between quality characteristics. Then, a detailed procedure for the developed fuzzy TOPSIS approach is presented to show how the fuzzy wafer fabrication quality problems can be solved. Real-world data is collected from an IC semiconductor company and the developed fuzzy TOPSIS approach is applied to find an optimal combination of parameters. Results of this study show that the developed approach provides a satisfactory solution to the wafer fabrication multiresponse problem. This developed approach can be also applied to other industries for investigating multiple quality characteristics problems.

  17. Wafer-scale fabrication of polymer-based microdevices via injection molding and photolithographic micropatterning protocols.

    Science.gov (United States)

    Lee, Dae-Sik; Yang, Haesik; Chung, Kwang-Hyo; Pyo, Hyeon-Bong

    2005-08-15

    Because of their broad applications in biomedical analysis, integrated, polymer-based microdevices incorporating micropatterned metallic and insulating layers are significant in contemporary research. In this study, micropatterns for temperature sensing and microelectrode sets for electroanalysis have been implemented on an injection-molded thin polymer membrane by employing conventional semiconductor processing techniques (i.e., standard photolithographic methods). Cyclic olefin copolymer (COC) is chosen as the polymer substrate because of its high chemical and thermal stability. A COC 5-in. wafer (1-mm thickness) is manufactured using an injection molding method, in which polymer membranes (approximately 130 microm thick and 3 mm x 6 mm in area) are implemented simultaneously in order to reduce local thermal mass around micropatterned heaters and temperature sensors. The highly polished surface (approximately 4 nm within 40 microm x 40 microm area) of the fabricated COC wafer as well as its good resistance to typical process chemicals makes it possible to use the standard photolithographic and etching protocols on the COC wafer. Gold micropatterns with a minimum 5-microm line width are fabricated for making microheaters, temperature sensors, and microelectrodes. An insulating layer of aluminum oxide (Al2O3) is prepared at a COC-endurable low temperature (approximately 120 degrees C) by using atomic layer deposition and micropatterning for the electrode contacts. The fabricated microdevice for heating and temperature sensing shows improved performance of thermal isolation, and microelectrodes display good electrochemical performances for electrochemical sensors. Thus, this novel 5-in. wafer-level microfabrication method is a simple and cost-effective protocol to prepare polymer substrate and demonstrates good potential for application to highly integrated and miniaturized biomedical devices.

  18. Three-Dimensional Wafer Stacking Using Cu TSV Integrated with 45 nm High Performance SOI-CMOS Embedded DRAM Technology

    Directory of Open Access Journals (Sweden)

    Pooja Batra

    2014-05-01

    Full Text Available For high-volume production of 3D-stacked chips with through-silicon-vias (TSVs, wafer-scale bonding offers lower production cost compared with bump bond technology and is promising for interconnect pitches smaller than 5 µ using available tooling. Prior work has presented wafer-scale integration with tungsten TSV for low-power applications. This paper reports the first use of low-temperature oxide bonding and copper TSV to stack high performance cache cores manufactured in 45 nm Silicon On Insulator-Complementary Metal Oxide Semiconductor (SOI-CMOS embedded DRAM (EDRAM having 12 to 13 copper wiring levels per strata and upto 11000 TSVs at 13 µm pitch for power and signal delivery. The wafers are thinned to 13 µm using grind polish and etch. TSVs are defined post bonding and thinning using conventional alignment techniques. Up to four additional metal levels are formed post bonding and TSV definition. A key feature of this process is its compatibility with the existing high performance POWER7™ EDRAM core requiring neither modification of the existing CMOS fabrication process nor re-design since the TSV RC characteristic is similar to typical 100–200 µm length wiring load enabling 3D macro-to-macro signaling without additional buffering Hardware measurements show no significant impact on device drive and off-current. Functional test at wafer level confirms 2.1 GHz 3D stacked EDRAM operation.

  19. Examination of SR101 shipping packages

    Energy Technology Data Exchange (ETDEWEB)

    Daugherty, W. L. [Savannah River Site (SRS), Aiken, SC (United States). Savannah River National Lab. (SRNL)

    2015-03-01

    Four SR101 shipping packages were removed from service and provided for disassembly and examination of the internal fiberboard assemblies. These packages were 20 years old, and had experienced varying levels of degradation. Two of the packages were successfully disassembled and fiberboard samples were removed from these packages and tested. Mechanical and thermal property values are generally comparable to or higher than baseline values measured on fiberboard from 9975 packages, which differs primarily in the specified density range. While baseline data for the SR101 material is not available, this comparison with 9975 material suggests that the material properties of the SR101 fiberboard have not significantly degraded.

  20. Wafer Fusion for Integration of Semiconductor Materials and Devices

    Energy Technology Data Exchange (ETDEWEB)

    Choquette, K.D.; Geib, K.M.; Hou, H.Q.; Allerman, A.A.; Kravitz, S.; Follstaedt, D.M.; Hindi, J.J.

    1999-05-01

    We have developed a wafer fusion technology to achieve integration of semiconductor materials and heterostructures with widely disparate lattice parameters, electronic properties, and/or optical properties for novel devices not now possible on any one substrate. Using our simple fusion process which uses low temperature (400-600 C) anneals in inert N{sub 2} gas, we have extended the scope of this technology to examine hybrid integration of dissimilar device technologies. As a specific example, we demonstrate wafer bonding vertical cavity surface emitting lasers (VCSELs) to transparent AlGaAs and GaP substrates to fabricate bottom-emitting short wavelength VCSELs. As a baseline fabrication technology applicable to many semiconductor systems, wafer fusion will revolutionize the way we think about possible semiconductor devices, and enable novel device configurations not possible by epitaxial growth.

  1. Parent Training Packages

    Science.gov (United States)

    Stowitschek, Joseph J.; Hofmeister, Alan

    1975-01-01

    Discusses the current development of training packages for educating parents to help their children develop self-help, math, reading, and spelling skills. Two packages are described: (1) a multimedia package monitored by a professional in training workshops for parents of mentally retarded children; and (2) pencil and paper packages in which…

  2. Wafer scale integration of catalyst dots into nonplanar microsystems

    DEFF Research Database (Denmark)

    Gjerde, Kjetil; Kjelstrup-Hansen, Jakob; Gammelgaard, Lauge

    2007-01-01

    In order to successfully integrate bottom-up fabricated nanostructures such as carbon nanotubes or silicon, germanium, or III-V nanowires into microelectromechanical systems on a wafer scale, reliable ways of integrating catalyst dots are needed. Here, four methods for integrating sub-100-nm...... diameter nickel catalyst dots on a wafer scale are presented and compared. Three of the methods are based on a p-Si layer utilized as an in situ mask, an encapsulating layer, and a sacrificial window mask, respectively. All methods enable precise positioning of nickel catalyst dots at the end...

  3. In-Package Chemistry Abstraction

    Energy Technology Data Exchange (ETDEWEB)

    E. Thomas

    2004-11-09

    This report was developed in accordance with the requirements in ''Technical Work Plan for: Regulatory Integration Modeling and Analysis of the Waste Form and Waste Package'' (BSC 2004 [DIRS 171583]). The purpose of the in-package chemistry model is to predict the bulk chemistry inside of a breached waste package and to provide simplified expressions of that chemistry as function of time after breach to Total Systems Performance Assessment for the License Application (TSPA-LA). The scope of this report is to describe the development and validation of the in-package chemistry model. The in-package model is a combination of two models, a batch reactor model that uses the EQ3/6 geochemistry-modeling tool, and a surface complexation model that is applied to the results of the batch reactor model. The batch reactor model considers chemical interactions of water with the waste package materials and the waste form for commercial spent nuclear fuel (CSNF) waste packages and codisposed waste packages that contain both high-level waste glass (HLWG) and DOE spent fuel. The surface complexation model includes the impact of fluid-surface interactions (i.e., surface complexation) on the resulting fluid composition. The model examines two types of water influx: (1) the condensation of water vapor that diffuses into the waste package, and (2) seepage water that enters the waste package from the drift as a liquid. (1) Vapor Influx Case: The condensation of vapor onto the waste package internals is simulated as pure H2O and enters at a rate determined by the water vapor pressure for representative temperature and relative humidity conditions. (2) Water Influx Case: The water entering a waste package from the drift is simulated as typical groundwater and enters at a rate determined by the amount of seepage available to flow through openings in a breached waste package. TSPA-LA uses the vapor influx case for the nominal scenario for simulations where the waste

  4. Friction mechanisms of silicon wafer and silicon wafer coated with diamond-like carbon film and two monolayers

    Energy Technology Data Exchange (ETDEWEB)

    Singh, R. Arvind; Yoon, Eui Sung; Han, Hung Gu; Kong, Ho Sung [Korea Institute of Science and Technology, Seoul (Korea, Republic of)

    2006-06-15

    The friction behaviour of Si-wafer, Diamond-Like Carbon (DLC) and two Self-Assembled Monolayers(SAMs) namely DiMethylDiChlorosilane (DMDC) and DiPhenyl-DiChlorosilane (DPDC) coated on Si-wafer was studied under loading conditions in milli-Newton (mN) range. Experiments were performed using a ball-on-flat type reciprocating micro-tribo tester. Glass balls with various radii 0.25 mm, 0.5 mm and 1 mm were used. The applied normal load was in the range of 1.5 mN to 4.8 mN. Results showed that the friction increased with the applied normal load in the case of all the test materials. It was also observed that friction was affected by the ball size. Friction increased with the increase in the ball size in the case of Si-wafer. The SAMs also showed a similar trend, but had lower values of friction than those of Si-wafer. Interestingly, for DLC it was observed that friction decreased with the increase in the ball size. This distinct difference in the behavior of friction in DLC was attributed to the difference in the operating mechanism. It was observed that Si-wafer and DLC exhibited wear, whereas wear was absent in the SAMs. Observations showed that solid-solid adhesion was dominant in Si-wafer, while plowing in DLC. The wear in these two materials significantly influenced their friction. In the case of SAMs their friction behaviour was largely influenced by the nature of their molecular chains.

  5. Influence of Si wafer thinning processes on (sub)surface defects

    Energy Technology Data Exchange (ETDEWEB)

    Inoue, Fumihiro, E-mail: fumihiro.inoue@imec.be [Imec, Kapeldreef 75, 3001 Leuven (Belgium); Jourdain, Anne; Peng, Lan; Phommahaxay, Alain; De Vos, Joeri; Rebibis, Kenneth June; Miller, Andy; Sleeckx, Erik; Beyne, Eric [Imec, Kapeldreef 75, 3001 Leuven (Belgium); Uedono, Akira [Division of Applied Physics, Faculty of Pure and Applied Science, University of Tsukuba, Tsukuba, Ibaraki 305-8573 (Japan)

    2017-05-15

    Highlights: • Mono-vacancy free Si-thinning can be accomplished by combining several thinning techniques. • The grinding damage needs to be removed prior to dry etching, otherwise vacancies remain in the Si at a depth around 0.5 to 2 μm after Si wafer thickness below 5 μm. • The surface of grinding + CMP + dry etching is equivalent mono vacancy level as that of grinding + CMP. - Abstract: Wafer-to-wafer three-dimensional (3D) integration with minimal Si thickness can produce interacting multiple devices with significantly scaled vertical interconnections. Realizing such a thin 3D structure, however, depends critically on the surface and subsurface of the remaining backside Si after the thinning processes. The Si (sub)surface after mechanical grinding has already been characterized fruitfully for a range of few dozen of μm. Here, we expand the characterization of Si (sub)surface to 5 μm thickness after thinning process on dielectric bonded wafers. The subsurface defects and damage layer were investigated after grinding, chemical mechanical polishing (CMP), wet etching and plasma dry etching. The (sub)surface defects were characterized using transmission microscopy, atomic force microscopy, and positron annihilation spectroscopy. Although grinding provides the fastest removal rate of Si, the surface roughness was not compatible with subsequent processing. Furthermore, mechanical damage such as dislocations and amorphous Si cannot be reduced regardless of Si thickness and thin wafer handling systems. The CMP after grinding showed excellent performance to remove this grinding damage, even though the removal amount is 1 μm. For the case of Si thinning towards 5 μm using grinding and CMP, the (sub)surface is atomic scale of roughness without vacancy. For the case of grinding + dry etch, vacancy defects were detected in subsurface around 0.5–2 μm. The finished surface after wet etch remains in the nm scale in the strain region. By inserting a CMP step in

  6. Fusion bonding of Si wafers investigated by x ray diffraction

    DEFF Research Database (Denmark)

    Weichel, Steen; Grey, Francois; Rasmussen, Kurt

    2000-01-01

    The interface structure of bonded Si(001) wafers with twist angle 6.5 degrees is studied as a function of annealing temperature. An ordered structure is observed in x-ray diffraction by monitoring a satellite reflection due to the periodic modulation near the interface, which results from...

  7. Scatterometry on pelliclized masks: an option for wafer fabs

    Science.gov (United States)

    Gallagher, Emily; Benson, Craig; Higuchi, Masaru; Okumoto, Yasuhiro; Kwon, Michael; Yedur, Sanjay; Li, Shifang; Lee, Sangbong; Tabet, Milad

    2007-03-01

    Optical scatterometry-based metrology is now widely used in wafer fabs for lithography, etch, and CMP applications. This acceptance of a new metrology method occurred despite the abundance of wellestablished CD-SEM and AFM methods. It was driven by the desire to make measurements faster and with a lower cost of ownership. Over the last year, scatterometry has also been introduced in advanced mask shops for mask measurements. Binary and phase shift masks have been successfully measured at all desired points during photomask production before the pellicle is mounted. There is a significant benefit to measuring masks with the pellicle in place. From the wafer fab's perspective, through-pellicle metrology would verify mask effects on the same features that are characterized on wafer. On-site mask verification would enable quality control and trouble-shooting without returning the mask to a mask house. Another potential application is monitoring changes to mask films once the mask has been delivered to the fab (haze, oxide growth, etc.). Similar opportunities apply to the mask metrologist receiving line returns from a wafer fab. The ability to make line-return measurements without risking defect introduction is clearly attractive. This paper will evaluate the feasibility of collecting scatterometry data on pelliclized masks. We explore the effects of several different pellicle types on scatterometry measurements made with broadband light in the range of 320-780 nm. The complexity introduced by the pellicles' optical behavior will be studied.

  8. Wafer-scale nanostructure formation inside vertical nano-pores

    NARCIS (Netherlands)

    Berenschot, Johan W.; Sun, Xingwu; Le The, Hai; Tiggelaar, Roald M.; de Boer, Meint J.; Eijkel, Jan C.T.; Gardeniers, Johannes G.E.; Tas, Niels Roelof; Sarajlic, Edin

    We propose a wafer-scale technique for nanostructure formation inside vertically oriented, through-membrane nano-pores. It uses 50 nm monocrystalline silicon pillars as a mold, embedded in a silicon nitride membrane formed in an innovative step. The proposed technique paves the way towards advanced

  9. High frequency guided wave propagation in monocrystalline silicon wafers

    Science.gov (United States)

    Pizzolato, Marco; Masserey, Bernard; Robyr, Jean-Luc; Fromme, Paul

    2017-04-01

    Monocrystalline silicon wafers are widely used in the photovoltaic industry for solar panels with high conversion efficiency. The cutting process can introduce micro-cracks in the thin wafers and lead to varying thickness. High frequency guided ultrasonic waves are considered for the structural monitoring of the wafers. The anisotropy of the monocrystalline silicon leads to variations of the wave characteristics, depending on the propagation direction relative to the crystal orientation. Full three-dimensional Finite Element simulations of the guided wave propagation were conducted to visualize and quantify these effects for a line source. The phase velocity (slowness) and skew angle of the two fundamental Lamb wave modes (first anti-symmetric mode A0 and first symmetric mode S0) for varying propagation directions relative to the crystal orientation were measured experimentally. Selective mode excitation was achieved using a contact piezoelectric transducer with a custom-made wedge and holder to achieve a controlled contact pressure. The out-of-plane component of the guided wave propagation was measured using a noncontact laser interferometer. Good agreement was found with the simulation results and theoretical predictions based on nominal material properties of the silicon wafer.

  10. development and evaluation of lyophilized thiolated-chitosan wafers

    African Journals Online (AJOL)

    User

    creased ease of hydration, improved in vitro mucoadhesive characteristics and enhanced BSA release, without affecting the conformational stability of the protein due to the presence of a cryoprotectant. These results show the potential application of annealed freeze-dried thiolated- chitosan wafers for buccal mucosa ...

  11. The Surface adhesion parameter: A measure for wafer bondability

    NARCIS (Netherlands)

    Gui, C.; Elwenspoek, Michael Curt; Tas, Niels Roelof; Gardeniers, Johannes G.E.

    1999-01-01

    A theory is presented which describes the initial direct wafer bonding process. The effect of surface microroughness on the bondability is studied on the basis of the theory of contact and adhesion of elastic solids. An effective bonding energy, the maximum of which is the specific surface energy of

  12. Wafer scale coating of polymer cantilever fabricated by nanoimprint lithography

    DEFF Research Database (Denmark)

    Greve, Anders; Dohn, Søren; Keller, Stephan Urs

    2010-01-01

    Microcantilevers can be fabricated in TOPAS by nanoimprint lithography, with the dimensions of 500 ¿m length 4.5 ¿m thickness and 100 ¿m width. By using a plasma polymerization technique it is possible to selectively functionalize individually cantilevers with a polymer coating, on wafer scale...

  13. National solar technology roadmap: Wafer-silicon PV

    Energy Technology Data Exchange (ETDEWEB)

    Sopori, Bhushan [National Renewable Energy Lab. (NREL), Golden, CO (United States)

    2007-06-01

    This report applies to all bulk-silicon-based PV technologies, including those based on Czochralski, multicrystalline, float-zone wafers, and melt-grown crystals that are 100 μm or thicker, such as ribbons, sheet, or spheral silicon.

  14. Sacrificial wafer bonding for planarization after very deep etching

    NARCIS (Netherlands)

    Spiering, V.L.; Spiering, Vincent L.; Berenschot, Johan W.; Elwenspoek, Michael Curt; Fluitman, J.H.J.

    A new technique is presented that provides planarization after a very deep etching step in silicon. This offers the possibility for as well resist spinning and layer patterning as realization of bridges or cantilevers across deep holes or grooves. The sacrificial wafer bonding technique contains a

  15. Versatile pattern generation of periodic, high aspect ratio Si nanostructure arrays with sub-50-nm resolution on a wafer scale.

    Science.gov (United States)

    Ho, Jian-Wei; Wee, Qixun; Dumond, Jarrett; Tay, Andrew; Chua, Soo-Jin

    2013-12-01

    We report on a method of fabricating variable patterns of periodic, high aspect ratio silicon nanostructures with sub-50-nm resolution on a wafer scale. The approach marries step-and-repeat nanoimprint lithography (NIL) and metal-catalyzed electroless etching (MCEE), enabling near perfectly ordered Si nanostructure arrays of user-defined patterns to be controllably and rapidly generated on a wafer scale. Periodic features possessing circular, hexagonal, and rectangular cross-sections with lateral dimensions down to sub-50 nm, in hexagonal or square array configurations and high array packing densities up to 5.13 × 107 structures/mm2 not achievable by conventional UV photolithography are fabricated using this top-down approach. By suitably tuning the duration of catalytic etching, variable aspect ratio Si nanostructures can be formed. As the etched Si pattern depends largely on the NIL mould which is patterned by electron beam lithography (EBL), the technique can be used to form patterns not possible with self-assembly methods, nanosphere, and interference lithography for replication on a wafer scale. Good chemical resistance of the nanoimprinted mask and adhesion to the Si substrate facilitate good pattern transfer and preserve the smooth top surface morphology of the Si nanostructures as shown in TEM. This approach is suitable for generating Si nanostructures of controlled dimensions and patterns, with high aspect ratio on a wafer level suitable for semiconductor device production.

  16. Bulk Laser Material Modification: Towards a Kerfless Laser Wafering Process

    Science.gov (United States)

    LeBeau, James

    Due to the ever increasing relevance of finer machining control as well as necessary reduction in material waste by large area semiconductor device manufacturers, a novel bulk laser machining method was investigated. Because the cost of silicon and sapphire substrates are limiting to the reduction in cost of devices in both the light emitting diode (LED) and solar industries, and the present substrate wafering process results in >50% waste, the need for an improved ingot wafering technique exists. The focus of this work is the design and understanding of a novel semiconductor wafering technique that utilizes the nonlinear absorption properties of band-gapped materials to achieve bulk (subsurface) morphological changes in matter using highly focused laser light. A method and tool was designed and developed to form controlled damage regions in the bulk of a crystalline sapphire wafer leaving the surfaces unaltered. The controllability of the subsurface damage geometry was investigated, and the effect of numerical aperture of the focusing optic, energy per pulse, wavelength, and number of pulses was characterized for a nanosecond pulse length variable wavelength Nd:YAG OPO laser. A novel model was developed to describe the geometry of laser induced morphological changes in the bulk of semiconducting materials for nanosecond pulse lengths. The beam propagation aspect of the model was based on ray-optics, and the full Keldysh multiphoton photoionization theory in conjuncture with Thornber's and Drude's models for impact ionization were used to describe high fluence laser light absorption and carrier generation ultimately resulting in permanent material modification though strong electron-plasma absorption and plasma melting. Although the electron-plasma description of laser damage formation is usually reserved for extremely short laser pulses (plane of damage in the bulk of sapphire wafers. This was accomplished using high numerical aperture optics, a variable

  17. Packaging for Food Service

    Science.gov (United States)

    Stilwell, E. J.

    1985-01-01

    Most of the key areas of concern in packaging the three principle food forms for the space station were covered. It can be generally concluded that there are no significant voids in packaging materials availability or in current packaging technology. However, it must also be concluded that the process by which packaging decisions are made for the space station feeding program will be very synergistic. Packaging selection will depend heavily on the preparation mechanics, the preferred presentation and the achievable disposal systems. It will be important that packaging be considered as an integral part of each decision as these systems are developed.

  18. An electron-multiplying ''Micromegas'' grid made in silicon wafer post-processing technology

    NARCIS (Netherlands)

    Chefdeville, M.A.; Colas, P.; Giomataris, Y.; van der Graaf, H.; Heijne, E.H.M.; van der Putten, S.; Salm, Cora; Schmitz, Jurriaan; Smits, Sander M.; Timmermans, J.; Timmermans, J.; Visschers, J.L.

    2005-01-01

    A technology for manufacturing an aluminium grid onto a silicon wafer has been developed. The grid is fixed parallel and precisely to the wafer (anode) surface at a distance of 50 mm by means of insulating pillars. When some 400V are applied between the grid and (anode) wafer, gas multiplication

  19. An electron-multiplying 'Micromegas' grid made in silicon wafer post-processing technology

    NARCIS (Netherlands)

    Chefdeville, M.; Chefdeville, M.A.; Colas, P.; Giomataris, Y.; van der Graaf, H.; Heijne, E.H.M.; van der Putten, S.; Salm, Cora; Schmitz, Jurriaan; Smits, Sander M.; Timmermans, J.; Visschers, J.L.

    A technology for manufacturing an aluminium grid onto a silicon wafer has been developed. The grid is fixed parallel and precisely to the wafer (anode) surface at a distance of 50 μm by means of insulating pillars. When some 400 V are applied between the grid and (anode) wafer, gas multiplication

  20. 450 mm Silicon Wafers Are Imperative for Moore's Law but maybe Postponed

    National Research Council Canada - National Science Library

    Tu, Hailing

    2015-01-01

    ... of the adequate approaches is to introduce 450 mm silicon wafers for 10 nm techno-logy node and beyond. Mr. Moore saw wafers growing, as early as in 1965, ever large as a way to keep the device cost down. Historically, each wafer size transition has been technically more challenging as complexity increases. The lesson learned from 300 mm silico...

  1. Mapping strain fields in ultrathin bonded Si wafers by x-ray scattering

    DEFF Research Database (Denmark)

    Nielsen, Mourits; Poulsen, Mette; Bunk, Oliver

    2002-01-01

    X-ray scattering reveals the atomic displacements arising from rotational misalignment in ultrathin silicon bonded wafers. For a 4.3 nm top wafer, the strain field penetrates from the bonded interface to the surface and produces distinctive finite-size oscillations in x-ray data. Analytical...... calculations permit the atomic displacements throughout the thin top wafer to be modeled....

  2. Latest improvements in microbolometer thin film packaging: paving the way for low-cost consumer applications

    Science.gov (United States)

    Yon, J. J.; Dumont, G.; Goudon, V.; Becker, S.; Arnaud, A.; Cortial, S.; Tisse, C. L.

    2014-06-01

    Silicon-based vacuum packaging is a key enabling technology for achieving affordable uncooled Infrared Focal Plane Arrays (IRFPA) required by a promising mass market that shows momentum for some extensive consumer applications, such as automotive driving assistance, smart presence localization and building management. Among the various approaches studied worldwide, CEA, LETI in partnership with ULIS is committed to the development of a unique technology referred to as PLP (Pixel Level Packaging). In this PLP technology, each bolometer pixel is sealed under vacuum using a transparent thin film deposition on wafer. PLP operates as an array of hermetic micro caps above the focal plane, each enclosing a single microbolometer. In continuation of our on-going studies on PLP for regular QVGA IRFPAs, this paper emphasizes on the innate scalability of the technology which was successfully demonstrated through the development of an 80 × 80 pixel IRFPA. The relevance of the technology with regard to the two formats is discussed, considering both performance and cost issues. We show that the suboptimal fill factor inherent to the PLP arrangement is not so critical when considering smaller arrays preferably fitted for consumer applications. The discussion is supported with the electro-optical performance measurements of the PLP-based 80×80 demonstrator.

  3. Microelectronic Packaging Trends and the Role of Nanotechnology

    Science.gov (United States)

    Datta, Madhav

    The microelectronic packaging industry is undergoing major changes to keep pace with the ever-increasing demands imposed by high performing chips and by end-use system applications. Solutions using advanced materials for microprocessor interconnect scaling and chip package interconnects, novel concepts in heat management systems, and improvements in package substrates continue to drive major packaging efforts. Advances in electrochemical technologies have played an important role in the evolution of such solutions for miniaturization of microelectronic devices and packages. Indeed, since the development of through-mask plating for thin film heads in the1960s and 1970s, an enormous amount of industrial and academic R&D effort has positioned electrochemical processing among the most sophisticated processing technologies employed in the microelectronics industry today [1-4]. Electrochemical processing is perhaps better understood than some of the dry processing technologies used in the microelectronics industry. Compared to other competing dry processing technologies, it has emerged as a more environmentally-friendly and cost-effective fabrication method. Electrochemical processing has, thus, become an integral part of advanced wafer processing fabs and an enabling technology for nanofabrication [5]. As the electronics industry faces the challenges of extending Moore's law, electrochemical processing is expected to continue to enable further miniaturization of high-performance chip interconnects, packages, and printed circuit boards. Evolving novel approaches to electrochemical processing using nano-materials and nano-fabrication techniques have started to make tremendous impact on further miniaturization of high performance devices and packages. A detailed discussion of different facets of technology advances in electronic packaging is difficult to present in the limited space of this chapter. The current chapter, therefore, makes an effort to capture some of the key

  4. Packaging Review Guide for Reviewing Safety Analysis Reports for Packagings

    Energy Technology Data Exchange (ETDEWEB)

    DiSabatino, A; Biswas, D; DeMicco, M; Fisher, L E; Hafner, R; Haslam, J; Mok, G; Patel, C; Russell, E

    2007-04-12

    This Packaging Review Guide (PRG) provides guidance for Department of Energy (DOE) review and approval of packagings to transport fissile and Type B quantities of radioactive material. It fulfills, in part, the requirements of DOE Order 460.1B for the Headquarters Certifying Official to establish standards and to provide guidance for the preparation of Safety Analysis Reports for Packagings (SARPs). This PRG is intended for use by the Headquarters Certifying Official and his or her review staff, DOE Secretarial offices, operations/field offices, and applicants for DOE packaging approval. This PRG is generally organized at the section level in a format similar to that recommended in Regulatory Guide 7.9 (RG 7.9). One notable exception is the addition of Section 9 (Quality Assurance), which is not included as a separate chapter in RG 7.9. Within each section, this PRG addresses the technical and regulatory bases for the review, the manner in which the review is accomplished, and findings that are generally applicable for a package that meets the approval standards. This Packaging Review Guide (PRG) provides guidance for DOE review and approval of packagings to transport fissile and Type B quantities of radioactive material. It fulfills, in part, the requirements of DOE O 460.1B for the Headquarters Certifying Official to establish standards and to provide guidance for the preparation of Safety Analysis Reports for Packagings (SARPs). This PRG is intended for use by the Headquarters Certifying Official and his review staff, DOE Secretarial offices, operations/field offices, and applicants for DOE packaging approval. The primary objectives of this PRG are to: (1) Summarize the regulatory requirements for package approval; (2) Describe the technical review procedures by which DOE determines that these requirements have been satisfied; (3) Establish and maintain the quality and uniformity of reviews; (4) Define the base from which to evaluate proposed changes in scope

  5. Fabrication of Ge-on-insulator wafers by Smart-CutTM with thermal management for undamaged donor Ge wafers

    Science.gov (United States)

    Kim, Munho; Cho, Sang June; Jayeshbhai Dave, Yash; Mi, Hongyi; Mikael, Solomon; Seo, Jung-Hun; Yoon, Jung U.; Ma, Zhenqiang

    2018-01-01

    Newly engineered substrates consisting of semiconductor-on-insulator are gaining much attention as starting materials for the subsequent transfer of semiconductor nanomembranes via selective etching of the insulating layer. Germanium-on-insulator (GeOI) substrates are critically important because of the versatile applications of Ge nanomembranes (Ge NMs) toward electronic and optoelectronic devices. Among various fabrication techniques, the Smart-CutTM technique is more attractive than other methods because a high temperature annealing process can be avoided. Another advantage of Smart-CutTM is the reusability of the donor Ge wafer. However, it is very difficult to realize an undamaged Ge wafer because there exists a large mismatch in the coefficient of thermal expansion among the layers. Although an undamaged donor Ge wafer is a prerequisite for its reuse, research related to this issue has not yet been reported. Here we report the fabrication of 4-inch GeOI substrates using the direct wafer bonding and Smart-CutTM process with a low thermal budget. In addition, a thermo-mechanical simulation of GeOI was performed by COMSOL to analyze induced thermal stress in each layer of GeOI. Crack-free donor Ge wafers were obtained by annealing at 250 °C for 10 h. Raman spectroscopy and x-ray diffraction (XRD) indicated similarly favorable crystalline quality of the Ge layer in GeOI compared to that of bulk Ge. In addition, Ge p-n diodes using transferred Ge NM indicate a clear rectifying behavior with an on and off current ratio of 500 at ±1 V. This demonstration offers great promise for high performance transferrable Ge NM-based device applications.

  6. Dual Use Packaging Project

    Data.gov (United States)

    National Aeronautics and Space Administration — NASA seeks down-weighted packaging compatible with microwave preparation and perhaps high hydrostatic pressure processing. New packaging must satisfy NASA's 3-year...

  7. Merganser Download Package

    Data.gov (United States)

    U.S. Environmental Protection Agency — This data download package contains an Esri 10.0 MXD, file geodatabase and copy of this FGDC metadata record. The data in this package are used in support of the...

  8. Comparative Packaging Study

    Science.gov (United States)

    Perchonok, Michele; Antonini, David

    2008-01-01

    This viewgraph presentation describes a comparative packaging study for use on long duration space missions. The topics include: 1) Purpose; 2) Deliverables; 3) Food Sample Selection; 4) Experimental Design Matrix; 5) Permeation Rate Comparison; and 6) Packaging Material Information.

  9. Openability of tamperproof packaging

    OpenAIRE

    Del Castillo C., A.; Wever, R; Buijs, P.J.; Stevels, A.

    2007-01-01

    Communication, product protection and presentation are three key aspects in the world of packaging nowadays. Due to a retail landscape consisting of large stores, displaying packed products on the shelves in self-service environments, these aspects become increasingly important, not only for Fast Moving Consumer Goods, but for consumer durables as well. In the communication aspect, the package delivers a promise to the customer contained in the package, but the package itself is part of this ...

  10. Packaging Printing Today

    OpenAIRE

    Bolanča, Stanislav; Majnarić, Igor; Golubović, Kristijan

    2015-01-01

    Printing packaging covers today about 50% of all the printing products. Among the printing products there are printing on labels, printing on flexible packaging, printing on folding boxes, printing on the boxes of corrugated board, printing on glass packaging, synthetic and metal ones. The mentioned packaging are printed in flexo printing technique, offset printing technique, intaglio halftone process, silk – screen printing, ink ball printing, digital printing and hybrid printing process. T...

  11. Mother-baby package.

    Science.gov (United States)

    Tamburlini, G

    1995-07-01

    The World Health Organization (WHO) Maternal Health and Safe Motherhood Programme developed the Mother-Baby package to facilitate the development of national strategies and plans of action. It was presented at an international meeting in Geneva in April 1994. The goals of the package are by the year 2000 to reduce maternal mortality by half and perinatal and neonatal mortality by 30-40% of 1990 levels. The package comprises: 1) a section on the technical basis and underlying strategies, 2) a section describing intervention before and during pregnancy, and during and after delivery, and 3) detailed recommendations on operating the program. The underlying strategy aims to reduce the number of high-risk and unwanted pregnancies; the number of obstetric complications; and the case fatality rate in women with complications. Interventions are based on a fourfold approach of family planning, quality antenatal care, clean and safe delivery, and access to essential obstetric care for high-risk pregnancies and complications. The district health system is the basic unit for planning and implementing the interventions. Midwives who live in the community are best equipped to provide appropriate community-based care to pregnant women. Pregnancy and obstetric complications requiring surgery and anesthesia should be available in the district hospital with an adequate referral system. Upgrading the skills of traditional birth attendants is also essential. National authorities should undertake a series of steps to carry out the interventions. A basic infrastructure, the upgrading of peripheral facilities, the development of human resources for safe motherhood, the effective delegation of responsibility, information, education, and communication (IEC), the involvement of nongovernmental organizations and women's groups, and the monitoring of results are other important elements in carrying out the interventions.

  12. Formation and combustion characteristics of elephantgrass and energycane wafers

    Science.gov (United States)

    Mofleh, Mohamad I.

    Elephantgrass (Pennisetum purpureum Schum.) and energycane (Saccharum Spp.) are two cane type grasses. These are tall-growing perennial bunchgrasses that produce long hardened stems and grow in the tropics and subtropics. Traditionally, they have been used for forage and, in some regions, have been randomly burned on fields or disposed of uselessly. However, these plants have high dry matter yield and, thus, are excellent candidates as energy crops. Elephantgrass and energycane have been used for direct combustion in their loose form in large-scale applications. Several problems, many of which were attributed to their low bulk density, were encountered with using the materials. Consequently, this project was initiated to investigate the formation and combustion characteristics of the two materials in the form of small compact units called wafers. A hydraulic press that applied axial stresses on the material in four different dies was used. A load cell and a displacement transducer were utilized to measure the stresses and material detection. Wafer quality was evaluated using a tumbler built according to the American Society of Agricultural Engineers standards. In addition, a small stove was built to test wafer combustion. Thermocouples were used to measure temperatures during combustion. All the data gathered was transferred to a computer using a data acquisition system. It was found that the stress-deformation and stress-density relationships of elephantgrass and energycane were of exponential nature. Compaction energy required, which was calculated from the area under the force-deformation curves, ranged from 0.1 to 0.3% of their energy content. It was also found that wafer quality (durability) was mainly a function of wafer size and its final (relaxed) density in addition to material stem-to-leaf ratio and its crude protein content. Wafers possessed poor ignition quality but once ignited, they burned satisfactorily. The results indicated that sufficient and

  13. Trends in Food Packaging.

    Science.gov (United States)

    Ott, Dana B.

    1988-01-01

    This article discusses developments in food packaging, processing, and preservation techniques in terms of packaging materials, technologies, consumer benefits, and current and potential food product applications. Covers implications due to consumer life-style changes, cost-effectiveness of packaging materials, and the ecological impact of…

  14. Central heating: package boilers

    Energy Technology Data Exchange (ETDEWEB)

    Farahan, E.

    1977-05-01

    Performance and cost data for electrical and fossil-fired package boilers currently available from manufacturers are provided. Performance characteristics investigated include: unit efficiency, rated capacity, and average expected lifetime of units. Costs are tabulated for equipment and installation of various package boilers. The information supplied in this report will simplify the process of selecting package boilers required for industrial, commercial, and residential applications.

  15. Yucca Mountain Waste Package Closure System

    Energy Technology Data Exchange (ETDEWEB)

    Herschel Smartt; Arthur Watkins; David Pace; Rodney Bitsoi; Eric Larsen; Timothy McJunkin; Charles Tolle

    2006-04-01

    The current disposal path for high-level waste is to place the material into secure waste packages that are inserted into a repository. The Idaho National Laboratory has been tasked with the development, design, and demonstration of the waste package closure system for the repository project. The closure system design includes welding three lids and a purge port cap, four methods of nondestructive examination, and evacuation and backfill of the waste package, all performed in a remote environment. A demonstration of the closure system will be performed with a full-scale waste package.

  16. Yucca Mountain Waste Package Closure System

    Energy Technology Data Exchange (ETDEWEB)

    shelton-davis; Colleen Shelton-Davis; Greg Housley

    2005-10-01

    The current disposal path for high-level waste is to place the material into secure waste packages that are inserted into a repository. The Idaho National Laboratory has been tasked with the development, design, and demonstration of the waste package closure system for the repository project. The closure system design includes welding three lids and a purge port cap, four methods of nondestructive examination, and evacuation and backfill of the waste package, all performed in a remote environment. A demonstration of the closure system will be performed with a full-scale waste package.

  17. ASIC Wafer Test System for the ATLAS Semiconductor Tracker Front-End Chip

    Energy Technology Data Exchange (ETDEWEB)

    Anghinolfi, F.; Bialas, W.; Busek, N.; Ciocio, A.; Cosgrove, D.; Fadeyev, V.; Flacco, C.; Gilchriese, M.; Grillo, A.A.; Haber, C.; Kaplon, J.; Lacasta, C.; Murray, W.; Niggli, H.; Pritchard, T.; Rosenbaum, F.; Spieler, H.; Stezelberger, T.; Vu, C.; Wilder, M.; Yaver, H.; Zetti, F.

    2002-03-19

    An ASIC wafer test system has been developed to provide comprehensive production screening of the ATLAS Semiconductor Tracker front-end chip (ABCD3T). The ABCD3T[1] features a 128-channel analog front-end, a digital pipeline, and communication circuitry, clocked at 40 MHz, which is the bunch crossing frequency at the LHC (Large Hadron Collider). The tester measures values and tolerance ranges of all critical IC parameters, including DC parameters, electronic noise, time resolution, clock levels and clock timing. The tester is controlled by an FPGA (ORCA3T) programmed to issue the input commands to the IC and to interpret the output data. This allows the high-speed wafer-level IC testing necessary to meet the production schedule. To characterize signal amplitudes and phase margins, the tester utilizes pin-driver, delay, and DAC chips, which control the amplitudes and delays of signals sent to the IC under test. Output signals from the IC under test go through window comparator chips to measure their levels. A probe card has been designed specifically to reduce pick-up noise that can affect the measurements. The system can operate at frequencies up to 100 MHz to study the speed limits of the digital circuitry before and after radiation damage. Testing requirements and design solutions are presented.

  18. Silicon-to-silicon wafer bonding using evaporated glass

    DEFF Research Database (Denmark)

    Weichel, Steen; Reus, Roger De; Lindahl, M.

    1998-01-01

    Anodic bending of silicon to silicon 4-in. wafers using an electron-beam evaporated glass (Schott 8329) was performed successfully in air at temperatures ranging from 200 degrees C to 450 degrees C. The composition of the deposited glass is enriched in sodium as compared to the target material...... of silicon/glass structures in air around 340 degrees C for 15 min leads to stress-free structures. Bonded wafer pairs, however, show no reduction in stress and always exhibit compressive stress. The bond yield is larger than 95% for bonding temperatures around 350 degrees C and is above 80% for bonding...... from 25 N/mm(2) to 0 N/mm(2) at 200 degrees C. A weak dependence on feature size was observed. For bonding temperatures higher than 300 degrees C fracture occurs randomly in the bulk of the silicon, whereas for bonding temperatures lower than 300 degrees C fracture always occurs at the bonding...

  19. Toward wafer scale fabrication of graphene based spin valve devices.

    Science.gov (United States)

    Avsar, Ahmet; Yang, Tsung-Yeh; Bae, Sukang; Balakrishnan, Jayakumar; Volmer, Frank; Jaiswal, Manu; Yi, Zheng; Ali, Syed Rizwan; Güntherodt, Gernot; Hong, Byung Hee; Beschoten, Bernd; Özyilmaz, Barbaros

    2011-06-08

    We demonstrate injection, transport, and detection of spins in spin valve arrays patterned in both copper based chemical vapor deposition (Cu-CVD) synthesized wafer scale single layer and bilayer graphene. We observe spin relaxation times comparable to those reported for exfoliated graphene samples demonstrating that chemical vapor deposition specific structural differences such as nanoripples do not limit spin transport in the present samples. Our observations make Cu-CVD graphene a promising material of choice for large scale spintronic applications.

  20. Improvement of multicrystalline silicon wafer solar cells by post ...

    Indian Academy of Sciences (India)

    Administrator

    (boron-doped) with ~ 3 Ω cm resistivity and having an initial thickness of 380 μm. These wafers were dipped into NaOH (30% at 85°C) polishing solution until a final thickness of 350 μm was reached; followed neutralization and RCA decontamination stages by putting them in a bath made of H2O2/NH4OH/DI H2O at 70°C, ...

  1. Wafer-scale plasmonic and photonic crystal sensors

    Science.gov (United States)

    George, M. C.; Liu, J.-N.; Farhang, A.; Williamson, B.; Black, M.; Wangensteen, T.; Fraser, J.; Petrova, R.; Cunningham, B. T.

    2015-08-01

    200 mm diameter wafer-scale fabrication, metrology, and optical modeling results are reviewed for surface plasmon resonance (SPR) sensors based on 2-D metallic nano-dome and nano-hole arrays (NHA's) as well as 1-D photonic crystal sensors based on a leaky-waveguide mode resonance effect, with potential applications in label free sensing, surface enhanced Raman spectroscopy (SERS), and surface-enhanced fluorescence spectroscopy (SEFS). Potential markets include micro-arrays for medical diagnostics, forensic testing, environmental monitoring, and food safety. 1-D and 2-D nanostructures were fabricated on glass, fused silica, and silicon wafers using optical lithography and semiconductor processing techniques. Wafer-scale optical metrology results are compared to FDTD modeling and presented along with application-based performance results, including label-free plasmonic and photonic crystal sensing of both surface binding kinetics and bulk refractive index changes. In addition, SEFS and SERS results are presented for 1-D photonic crystal and 2-D metallic nano-array structures. Normal incidence transmittance results for a 550 nm pitch NHA showed good bulk refractive index sensitivity, however an intensity-based design with 665 nm pitch was chosen for use as a compact, label-free sensor at both 650 and 632.8 nm wavelengths. The optimized NHA sensor gives an SPR shift of about 480 nm per refractive index unit when detecting a series of 0-40% glucose solutions, but according to modeling shows about 10 times greater surface sensitivity when operating at 532 nm. Narrow-band photonic crystal resonance sensors showed quality factors over 200, with reasonable wafer-uniformity in terms of both resonance position and peak height.

  2. Edible packaging materials.

    Science.gov (United States)

    Janjarasskul, Theeranun; Krochta, John M

    2010-01-01

    Research groups and the food and pharmaceutical industries recognize edible packaging as a useful alternative or addition to conventional packaging to reduce waste and to create novel applications for improving product stability, quality, safety, variety, and convenience for consumers. Recent studies have explored the ability of biopolymer-based food packaging materials to carry and control-release active compounds. As diverse edible packaging materials derived from various by-products or waste from food industry are being developed, the dry thermoplastic process is advancing rapidly as a feasible commercial edible packaging manufacturing process. The employment of nanocomposite concepts to edible packaging materials promises to improve barrier and mechanical properties and facilitate effective incorporation of bioactive ingredients and other designed functions. In addition to the need for a more fundamental understanding to enable design to desired specifications, edible packaging has to overcome challenges such as regulatory requirements, consumer acceptance, and scaling-up research concepts to commercial applications.

  3. Optical coating uniformity of 200mm (8") diameter precut wafers

    Science.gov (United States)

    Burt, Travis C.; Fisher, Mark; Brown, Dean; Troiani, David

    2017-02-01

    Automated spectroscopic profiling (mapping) of a 200 mm diameter near infrared high reflector (centered at 1064 nm) are presented. Spatial resolution at 5 mm or less was achieved using a 5 mm × 1.5 mm monochromatic beam. Reflection changes of 1.0% across the wafer diameter were observed under s-polarized and p- polarized conditions. Redundancy was established for each chord by re-measuring the center of the wafer and reproducibility of approximately used to measure the reflectance and transmittance of a sample across a range of angles (θi) at near normal angles of incidence (AOI). A recent development by Agilent Technologies, the Cary 7000 Universal Measurement Spectrophotometer (UMS) combines both reflection and transmission measurements from the same patch of a sample's surface in a single automated platform for angles of incidence in the range 5°use of MPS on the Cary 7000 UMS with rotational (Φ) and vertical (z) sample positioning control. MPS(θi,Φ,z) provides for automated unattended multi-angle R/T analysis of at 200 mm diameter samples with the goal to provide better spectroscopic measurement feedback into large wafer manufacturing to ensure yields are maximized, product quality is better controlled and waste is reduced before further down-stream processing.

  4. High sensitivity detection and characterization of the chemical state of trace element contamination on silicon wafers

    CERN Document Server

    Pianetta, Piero A; Baur, K; Brennan, S; Homma, T; Kubo, N

    2003-01-01

    Increasing the speed and complexity of semiconductor integrated circuits requires advanced processes that put extreme constraints on the level of metal contamination allowed on the surfaces of silicon wafers. Such contamination degrades the performance of the ultrathin SiO sub 2 gate dielectrics that form the heart of the individual transistors. Ultimately, reliability and yield are reduced to levels that must be improved before new processes can be put into production. It should be noted that much of this metal contamination occurs during the wet chemical etching and rinsing steps required for the manufacture of integrated circuits and industry is actively developing new processes that have already brought the metal contamination to levels beyond the measurement capabilities of conventional analytical techniques. The measurement of these extremely low contamination levels has required the use of synchrotron radiation total reflection X-ray fluorescence (SR-TXRF) where sensitivities 100 times better than conv...

  5. WDDM - a wafer scale data driven multiprocessor

    Energy Technology Data Exchange (ETDEWEB)

    Shirazi, B.

    1985-01-01

    It has been shown that the existing von-Neumann design machines fail to meet the requirements of the real time scientific and 5th generation applications. A computer organization, such as data driven architecture, which embeds parallelism in its definition and underlying design is needed to satisfy such requirements. In this project, a new data driven multiprocessor is introduced which: (i) eliminates some of the problems of the existing data driven systems; (ii) takes advantage of state of the art technology; and (iii) takes advantage of state-of the art technology; and (iii) achieves parallelism at the data, instruction, and program block levels. This system consists of n processing modules, a host module, and a data structure module, connected via a double star network with the host and the data structure modules in the center of the stars. Processing modules are capable of the simultaneous execution of the independent program blocks in data driven fashion. The host module is responsible for memory management tasks, while the data structure module facilitates the manipulation of the data structures.

  6. An all-silicon single-wafer micro-g accelerometer with a combined surface and bulk micromachining process

    Science.gov (United States)

    Yazdi, N.; Najafi, K.

    2000-01-01

    This paper reports an all-silicon fully symmetrical z-axis micro-g accelerometer that is fabricated on a single-silicon wafer using a combined surface and bulk fabrication process. The microaccelerometer has high device sensitivity, low noise, and low/controllable damping that are the key factors for attaining micro g and sub-micro g resolution in capacitive accelerometers. The microfabrication process produces a large proof mass by using the whole wafer thickness and a large sense capacitance by utilizing a thin sacrificial layer. The sense/feedback electrodes are formed by a deposited 2-3 microns polysilicon film with embedded 25-35 microns-thick vertical stiffeners. These electrodes, while thin, are made very stiff by the thick embedded stiffeners so that force rebalancing of the proof mass becomes possible. The polysilicon electrodes are patterned to create damping holes. The microaccelerometers are batch-fabricated, packaged, and tested successfully. A device with a 2-mm x 1-mm proof mass and a full bridge support has a measured sensitivity of 2 pF/g. The measured sensitivity of a 4-mm x 1-mm accelerometer with a cantilever support is 19.4 pF/g. The calculated noise floor of these devices at atmosphere are 0.23 micro g/sqrt(Hz) and 0.16 micro g/sqrt(Hz), respectively.

  7. Identification and long term stability of DNA captured on a dental impression wafer.

    Science.gov (United States)

    Kim, Maile; Siegler, Kate; Tamariz, Jeannie; Caragine, Theresa; Fernandez, Jill; Daronch, Marcia; Moursi, Amr

    2012-01-01

    The purpose of this study was to determine the quantity and quality of DNA extracted from a dental bite impression wafer immediately after impression and after 12 months of home storage. The authors' hypothesis was that the wafer would retain sufficient DNA with appropriate genetic markers to make an identification match. Two impression wafers (Toothprints(®) brand) were administered to 100 3- to 26-year-olds. A cotton swab was used as a control. DNA from wafers stored for 12 months at home were compared to DNA collected at time 0 and compared to swabs at specific sites to determine quality and accuracy. The amount of DNA captured and recovered was analyzed using MagAttract technology and a quantitative real-time polymerase chain reaction. Capillary gel electrophoresis was performed to determine the quality of the DNA profiles obtained from the wafers vs those generated from the swabs of each subject. Average DNA concentration was: 480 pg/μL (wafer at time 0); 392 pg/μL (wafer after 12 months kept by subjects); and 1,041 pg/μL (buccal swab). Sufficient DNA for human identification was recovered from all sets of wafers, producing clear DNA profiles and accurate matches to buccal swabs. No inhibitors were found that could interfere with DNA profiling. Toothprints® impression wafers can be useful for DNA collection and child identification. After 12 months, the wafer was still usable for DNA capture and identification match.

  8. Packaging for Sustainability

    CERN Document Server

    Lewis, Helen; Fitzpatrick, Leanne

    2012-01-01

    The packaging industry is under pressure from regulators, customers and other stakeholders to improve packaging’s sustainability by reducing its environmental and societal impacts. This is a considerable challenge because of the complex interactions between products and their packaging, and the many roles that packaging plays in the supply chain. Packaging for Sustainability is a concise and readable handbook for practitioners who are trying to implement sustainability strategies for packaging. Industry case studies are used throughout the book to illustrate possible applications and scenarios. Packaging for Sustainability draws on the expertise of researchers and industry practitioners to provide information on business benefits, environmental issues and priorities, environmental evaluation tools, design for environment, marketing strategies, and challenges for the future.

  9. Flexible packaging for PV modules

    Science.gov (United States)

    Dhere, Neelkanth G.

    2008-08-01

    Economic, flexible packages that provide needed level of protection to organic and some other PV cells over >25-years have not yet been developed. However, flexible packaging is essential in niche large-scale applications. Typical configuration used in flexible photovoltaic (PV) module packaging is transparent frontsheet/encapsulant/PV cells/flexible substrate. Besides flexibility of various components, the solder bonds should also be flexible and resistant to fatigue due to cyclic loading. Flexible front sheets should provide optical transparency, mechanical protection, scratch resistance, dielectric isolation, water resistance, UV stability and adhesion to encapsulant. Examples are Tefzel, Tedlar and Silicone. Dirt can get embedded in soft layers such as silicone and obscure light. Water vapor transmittance rate (WVTR) of polymer films used in the food packaging industry as moisture barriers are ~0.05 g/(m2.day) under ambient conditions. In comparison, light emitting diodes employ packaging components that have WVTR of ~10-6 g/(m2.day). WVTR of polymer sheets can be improved by coating them with dense inorganic/organic multilayers. Ethylene vinyl acetate, an amorphous copolymer used predominantly by the PV industry has very high O2 and H2O diffusivity. Quaternary carbon chains (such as acetate) in a polymer lead to cleavage and loss of adhesional strength at relatively low exposures. Reactivity of PV module components increases in presence of O2 and H2O. Adhesional strength degrades due to the breakdown of structure of polymer by reactive, free radicals formed by high-energy radiation. Free radical formation in polymers is reduced when the aromatic rings are attached at regular intervals. This paper will review flexible packaging for PV modules.

  10. Nondestructive and continuous monitoring of oxygen levels in modified atmosphere packaged ready-to-eat mixed salad products using optical oxygen sensors, and its effects on sensory and microbiological counts during storage.

    Science.gov (United States)

    Hempel, A; O'Sullivan, M G; Papkovsky, D B; Kerry, J P

    2013-07-01

    The objective of this study was to determine the percentage oxygen consumption of fresh, respiring ready-to-eat (RTE) mixed leaf salad products (Iceberg salad leaf, Caesar salad leaf, and Italian salad leaf). These were held under different modified atmosphere packaging (MAP) conditions (5% O2 , 5% CO2 , 90% N2 (MAPC-commercial control), 21% O2 , 5% CO2 , 74% N2 (MAP 1), 45% O2 , 5% CO2 , 50% N2 (MAP 2), and 60% O2 , 5% CO2 , 35% N2 (MAP 3)) and 4 °C for up to 10 d. The quality and shelf-life stability of all packaged salad products were evaluated using sensory, physiochemical, and microbial assessment. Oxygen levels in all MAP packs were measured on each day of analysis using optical oxygen sensors allowing for nondestructive assessment of packs. Analysis showed that with the exception of control packs, oxygen levels for all MAP treatments decreased by approximately 10% after 7 d of storage. Oxygen levels in control packs were depleted after 7 d of storage. This appears to have had no detrimental effect on either the sensory quality or shelf-life stability of any of the salad products investigated. Additionally, the presence of higher levels of oxygen in modified atmosphere packs did not significantly improve product quality or shelf-life stability; however, these additional levels of oxygen were freely available to fresh respiring produce if required. This study shows that the application of optical sensors in MAP packs was successful in nondestructively monitoring oxygen level, or changes in oxygen level, during refrigerated storage of RTE salad products. © 2013 Institute of Food Technologists®

  11. Non-Contact Technique for Determining the Mechanical Stress in thin Films on Wafers by Profiler

    Science.gov (United States)

    Djuzhev, N. A.; Dedkova, A. A.; E Gusev, E.; Makhiboroda, M. A.; Glagolev, P. Y.

    2017-04-01

    This paper presents an algorithm for analysis of relief for the purpose of calculating mechanical stresses in a selected direction on the plate in the form of software package Matlab. The method allows for the measurement sample in the local area. It provides a visual representation of the data and allows to get stress distribution on wafer surface. Automated analysis process reduces the likelihood of errors researcher. Achieved time saving during processing results. In carrying out several measurements possible drawing card plate to predict yield crystals. According to this technique done in measurement of mechanical stresses of thermal silicon oxide film on a silicon substrate. Analysis of the results showed objectivity and reliability calculations. This method can be used for selecting the optimal parameters of the material deposition conditions. In software of device-technological simulation TCAD defined process time, temperature and oxidation of the operation of the sample environment for receiving the set value of the dielectric film thickness. Calculated thermal stresses are in the system silicon-silicon oxide. There is a good correlation between numerical simulations and analytical calculation. It is shown that the nature of occurrence of mechanical stress is not limited to the difference of thermal expansion coefficients of materials.

  12. Nanotechnology: An Untapped Resource for Food Packaging

    Directory of Open Access Journals (Sweden)

    Chetan Sharma

    2017-09-01

    Full Text Available Food commodities are packaged and hygienically transported to protect and preserve them from any un-acceptable alteration in quality, before reaching the end-consumer. Food packaging continues to evolve along-with the innovations in material science and technology, as well as in light of consumer's demand. Presently, the modern consumers of competitive economies demands for food with natural quality, assured safety, minimal processing, extended shelf-life and ready-to-eat concept. Innovative packaging systems, not only ascertains transit preservation and effective distribution, but also facilitates communication at the consumer levels. The technological advances in the domain of food packaging in twenty-first century are mainly chaired by nanotechnology, the science of nano-materials. Nanotechnology manipulates and creates nanometer scale materials, of commercial and scientific relevance. Introduction of nanotechnology in food packaging sector has significantly addressed the food quality, safety and stability concerns. Besides, nanotechnology based packaging intimate's consumers about the real time quality of food product. Additionally, nanotechnology has been explored for controlled release of preservatives/antimicrobials, extending the product shelf life within the package. The promising reports for nanotechnology interventions in food packaging have established this as an independent priority research area. Nanoparticles based food packages offer improved barrier and mechanical properties, along with food preservation and have gained welcoming response from market and end users. In contrary, recent advances and up-liftment in this area have raised various ethical, environmental and safety concerns. Policies and regulation regarding nanoparticles incorporation in food packaging are being reviewed. This review presents the existing knowledge, recent advances, concerns and future applications of nanotechnology in food packaging sector.

  13. Nanotechnology: An Untapped Resource for Food Packaging.

    Science.gov (United States)

    Sharma, Chetan; Dhiman, Romika; Rokana, Namita; Panwar, Harsh

    2017-01-01

    Food commodities are packaged and hygienically transported to protect and preserve them from any un-acceptable alteration in quality, before reaching the end-consumer. Food packaging continues to evolve along-with the innovations in material science and technology, as well as in light of consumer's demand. Presently, the modern consumers of competitive economies demands for food with natural quality, assured safety, minimal processing, extended shelf-life and ready-to-eat concept. Innovative packaging systems, not only ascertains transit preservation and effective distribution, but also facilitates communication at the consumer levels. The technological advances in the domain of food packaging in twenty-first century are mainly chaired by nanotechnology, the science of nano-materials. Nanotechnology manipulates and creates nanometer scale materials, of commercial and scientific relevance. Introduction of nanotechnology in food packaging sector has significantly addressed the food quality, safety and stability concerns. Besides, nanotechnology based packaging intimate's consumers about the real time quality of food product. Additionally, nanotechnology has been explored for controlled release of preservatives/antimicrobials, extending the product shelf life within the package. The promising reports for nanotechnology interventions in food packaging have established this as an independent priority research area. Nanoparticles based food packages offer improved barrier and mechanical properties, along with food preservation and have gained welcoming response from market and end users. In contrary, recent advances and up-liftment in this area have raised various ethical, environmental and safety concerns. Policies and regulation regarding nanoparticles incorporation in food packaging are being reviewed. This review presents the existing knowledge, recent advances, concerns and future applications of nanotechnology in food packaging sector.

  14. Ultrahigh-vacuum field emitter array wafer tester

    Energy Technology Data Exchange (ETDEWEB)

    Gray, H.F.; Ardis, L.; Campisi, G.J.

    1987-02-01

    The device reported here allows the researcher the opportunity of gaining primitive yield information, threshold voltages, emission stability, and other information, e.g., gas effects, on field emitter arrays (FEA) which are microminiature ''vacuum tubes'' fabricated by microelectronic processing methods on silicon wafers, without scribing, dicing, and mounting each device on individual vacuum-compatible headers. This device also speeds up the entire data-acquisition process by requiring only one ultrahigh-vacuum pumpdown and one set of vacuum feedthroughs.

  15. Iterative bandgap engineering at selected areas of quantum semiconductor wafers.

    Science.gov (United States)

    Stanowski, Radoslaw; Martin, Matthieu; Ares, Richard; Dubowski, Jan J

    2009-10-26

    We report on the application of a laser rapid thermal annealing technique for iterative bandgap engineering at selected areas of quantum semiconductor wafers. The approach takes advantage of the quantum well intermixing (QWI) effect for achieving targeted values of the bandgap in a series of small annealing steps. Each QWI step is monitored by collecting a photoluminescence map and, consequently, choosing the annealing strategy of the next step. An array of eight sites, 280 mum in diameter, each emitting at 1480 nm, has been fabricated with a spectral accuracy of better than 2 nm in a standard InGaAs/InGaAsP QW heterostructure that originally emitted at 1550 nm.

  16. Gabor filters and SVM classifier for pattern wafer segmentation

    Science.gov (United States)

    Bourgeat, Pierrick T.; Meriaudeau, Fabrice; Gorria, Patrick; Tobin, Kenneth W.

    2004-11-01

    In the last decade, the accessibility of inexpensive and powerful computers has allowed true digital holography to be used for industrial inspection using microscopy. This technique allows capturing a complex image of a scene (i.e. containing magnitude and phase), and reconstructing the phase and magnitude information. Digital holograms give a new dimension to texture analysis since the topology information can be used as an additional way to extract features. This new technique can be used to extend previous work on image segmentation of patterned wafers for defect detection. This paper presents a comparison between the features obtained using Gabor filtering on complex images under illumination and focus variations.

  17. WASTE PACKAGE TRANSPORTER DESIGN

    Energy Technology Data Exchange (ETDEWEB)

    D.C. Weddle; R. Novotny; J. Cron

    1998-09-23

    The purpose of this Design Analysis is to develop preliminary design of the waste package transporter used for waste package (WP) transport and related functions in the subsurface repository. This analysis refines the conceptual design that was started in Phase I of the Viability Assessment. This analysis supports the development of a reliable emplacement concept and a retrieval concept for license application design. The scope of this analysis includes the following activities: (1) Assess features of the transporter design and evaluate alternative design solutions for mechanical components. (2) Develop mechanical equipment details for the transporter. (3) Prepare a preliminary structural evaluation for the transporter. (4) Identify and recommend the equipment design for waste package transport and related functions. (5) Investigate transport equipment interface tolerances. This analysis supports the development of the waste package transporter for the transport, emplacement, and retrieval of packaged radioactive waste forms in the subsurface repository. Once the waste containers are closed and accepted, the packaged radioactive waste forms are termed waste packages (WP). This terminology was finalized as this analysis neared completion; therefore, the term disposal container is used in several references (i.e., the System Description Document (SDD)) (Ref. 5.6). In this analysis and the applicable reference documents, the term ''disposal container'' is synonymous with ''waste package''.

  18. User friendly packaging

    DEFF Research Database (Denmark)

    Geert Jensen, Birgitte

    2010-01-01

    “User-friendly Packaging” aims to create a platform for developing more user-friendly packaging. One intended outcome of the project is a guideline that industry can use in development efforts. The project also points the way for more extended collaboration between companies and design researchers. How...... can design research help industry in packaging innovation?...

  19. The BINSYN Program Package

    Directory of Open Access Journals (Sweden)

    Albert P. Linnell

    2012-06-01

    Full Text Available The BINSYN program package, recently expanded to calculate synthetic spectra of cataclysmic variables, is being further extended to include synthetic photometry of ordinary binary stars in addition to binary stars with optically thick accretion disks. The package includes a capability for differentials correction optimization of eclipsing binary systems using synthetic photometry.

  20. Control wafer bow of InGaP on 200 mm Si by strain engineering

    Science.gov (United States)

    Wang, Bing; Bao, Shuyu; Made, Riko I.; Lee, Kwang Hong; Wang, Cong; Eng Kian Lee, Kenneth; Fitzgerald, Eugene A.; Michel, Jurgen

    2017-12-01

    When epitaxially growing III–V compound semiconductors on Si substrates the mismatch of coefficients of thermal expansion (CTEs) between III–V and Si causes stress and wafer bow. The wafer bow is deleterious for some wafer-scale processing especially when the wafer size is large. Strain engineering was applied in the epitaxy of InGaP films on 200 mm silicon wafers having high quality germanium buffers. By applying compressive strain in the InGaP films to compensate the tensile strain induced by CTE mismatch, wafer bow was decreased from about 100 μm to less than 50 μm. X-ray diffraction studies show a clear trend between the decrease of wafer bow and the compensation of CTE mismatch induced tensile strain in the InGaP layers. In addition, the anisotropic strain relaxation in InGaP films resulted in anisotropic wafer bow along two perpendicular (110) directions. Etch pit density and plane-view transmission electron microscopy characterizations indicate that threading dislocation densities did not change significantly due to the lattice-mismatch applied in the InGaP films. This study shows that strain engineering is an effective method to control wafer bow when growing III–V semiconductors on large size Si substrates.

  1. New Finsler package

    Science.gov (United States)

    Youssef, Nabil L.; Elgendi, S. G.

    2014-03-01

    The book “Handbook of Finsler geometry” has been included with a CD containing an elegant Maple package, FINSLER, for calculations in Finsler geometry. Using this package, an example concerning a Finsler generalization of Einstein’s vacuum field equations was treated. In this example, the calculation of the components of the hv-curvature of Cartan connection leads to wrong expressions. On the other hand, the FINSLER package works only in dimension four. We introduce a new Finsler package in which we fix the two problems and solve them. Moreover, we extend this package to compute not only the geometric objects associated with Cartan connection but also those associated with Berwald, Chern and Hashiguchi connections in any dimension. These improvements have been illustrated by a concrete example. Furthermore, the problem of simplifying tensor expressions is treated. This paper is intended to make calculations in Finsler geometry more easier and simpler.

  2. A low feed-through 3D vacuum packaging technique with silicon vias for RF MEMS resonators

    Science.gov (United States)

    Zhao, Jicong; Yuan, Quan; Kan, Xiao; Yang, Jinling; Yang, Fuhua

    2017-01-01

    This paper presents a wafer-level three-dimensional (3D) vacuum packaging technique for radio frequency microelectromechanical systems (RF MEMS) resonators. A Sn-rich Au-Sn solder bonding is employed to provide a vacuum encapsulation as well as electrical conductions. Vertical silicon vias are micro-fabricated by glass reflow process. The optimized grounding, via pitch, and all-round shielding effectively reduce feed-through capacitance. Thus the signal-to-background ratios (SBRs) of the transmission signals increase from 17 dB to 20 dB, and the quality factor (Q) values of the packaged resonators go from around 8000 up to more than 9500. The measured average leak rate and shear strength are (2.55  ±  0.9)  ×  10-8 atm-cc s-1 and 42.53  ±  4.19 MPa, respectively. Furthermore, thermal cycling test between  -40 °C and 100 °C and high temperature storage test at 150 °C show that the resonant-frequency drifts are less than  ±7 ppm. In addition, the SBRs and the Q values have no obvious change after the tests. The experimental results demonstrated that the proposed encapsulation technique is well suited for the applications of RF MEMS devices.

  3. Wafer Defect Detection Using Directional Morphological Gradient Techniques

    Directory of Open Access Journals (Sweden)

    Gongyuan Qu

    2002-07-01

    Full Text Available Accurate detection and classification of wafer defects constitute an important component of the IC production process because together they can immediately improve the yield and also provide information needed for future process improvements. One class of inspection procedures involves analyzing surface images. Because of the characteristics of the design patterns and the irregular size and shape of the defects, linear processing methods, such as Fourier transform domain filtering or Sobel edge detection, are not as well suited as morphological methods for detecting these defects. In this paper, a newly developed morphological gradient technique using directional components is applied to the detection and isolation of wafer defects. The new methods are computationally efficient and do not rely on a priori knowledge of the specific design pattern to detect particles, scratches, stains, or missing pattern areas. The directional components of the morphological gradient technique allow direction specific edge suppression and reduce the noise sensitivity. Theoretical analysis and several examples are used to demonstrate the performance of the directional morphological gradient methods.

  4. Steel bridge fatigue crack detection with piezoelectric wafer active sensors

    Science.gov (United States)

    Yu, Lingyu; Giurgiutiu, Victor; Ziehl, Paul; Ozevin, Didem; Pollock, Patrick

    2010-04-01

    Piezoelectric wafer active sensors (PWAS) are well known for its dual capabilities in structural health monitoring, acting as either actuators or sensors. Due to the variety of deterioration sources and locations of bridge defects, there is currently no single method that can detect and address the potential sources globally. In our research, our use of the PWAS based sensing has the novelty of implementing both passive (as acoustic emission) and active (as ultrasonic transducers) sensing with a single PWAS network. The combined schematic is using acoustic emission to detect the presence of fatigue cracks in steel bridges in their early stage since methods such as ultrasonics are unable to quantify the initial condition of crack growth since most of the fatigue life for these details is consumed while the fatigue crack is too small to be detected. Hence, combing acoustic emission with ultrasonic active sensing will strengthen the damage detection process. The integration of passive acoustic emission detection with active sensing will be a technological leap forward from the current practice of periodic and subjective visual inspection, and bridge management based primarily on history of past performance. In this study, extensive laboratory investigation is performed supported by theoretical modeling analysis. A demonstration system will be presented to show how piezoelectric wafer active sensor is used for acoustic emission. Specimens representing complex structures are tested. The results will also be compared with traditional acoustic emission transducers to identify the application barriers.

  5. A Broadband Silicon Seismic Package for Planetary Exploration

    Science.gov (United States)

    Pike, W. Thomas; Standley, Ian; Calcutt, Simon; Kedar, Sharon

    2017-04-01

    The Silicon Seismic Package (SSP) is a compact, 0.3 ng/rtHz sensitivity silicon microseismometer based on the hardware successfully delivered to the InSight Mars 2018 mission. The SSP provides a sensitivity and dynamic range comparable to significantly more massive broadband terrestrial instruments in a robust, compact package. Combined with a high resolution radiation-hardened digitiser under development, the SSP offers high performance seismic monitoring under a range of planetary environments. The sensor is micromachined from single-crystal silicon by through-wafer deep reactive-ion etching to produce a non-magnetic suspension and proof mass. It is robust to high shock (> 1000 g) and vibration (> 30 grms). For qualification SP units have undergone the full thermal cycles of the InSight mission and has been noise tested down to 208K and up to 330K, with no degradation in the performance in both cases. In addition, the sensor has been tested as functional down to 77K. The total mass for the three-axis SP delivery is 635g while the power requirement is less than 400 mW. The SSP has particular advantages for a planetary deployment. All three axes deliver full performance over a tilt range of ±1 m/s2 which allows for operation without levelling. With no magnetic sensitivity and a temperature sensitivity below 2E-5 m/s^2, there is no need for magnetic field monitoring and the additional resources for thermal isolation are also much reduced. In terms of performance the SSP has fast initialisation, reaching a noise floor below 1 ng/√Hz in less than a minute from an untilted configuration. The noise floor is 0.3 ng/rtHz from 10 s to 10 Hz, with a long period noise below 10 ng/rtHz at 1000s. This allows tidal measurements as well as seismic monitoring for a number of proposed planetary missions.

  6. What's in that package? An evaluation of quality of package honey bee (Hymenoptera: Apidae) shipments in the United States.

    Science.gov (United States)

    Strange, James P; Cicciarelli, Richard P; Calderone, Nicholas W

    2008-06-01

    To replace deceased colonies or to increase the colony numbers, beekeepers often purchase honey bees, Apis mellifera L., in a package, which is composed of 909-1,364 g (2-3 lb) of worker bees and a mated queen. Packages are typically produced in warm regions of the United States in spring and shipped throughout the United States to replace colonies that perished during winter. Although the package bee industry is effective in replacing colonies lost in winter, packages also can be an effective means of dispersing diseases, parasites, and undesirable stock to beekeepers throughout the United States. To evaluate the quality of packages, we examined 48 packages representing six lines of bees purchased in the spring 2006. We estimated levels of the parasitic mite Varroa destructor Anderson & Trueman and the percentage of drone (male) honey bees received in packages. We surveyed for presence of the tracheal honey bee mite, Acarapis woodi (Rennie), and a microsporidian parasite, Nosema spp., in the shipped bees. We found significant differences in both the mean Varroa mite per bee ratios (0.004-0.054) and the average percentage of drones (0.04-5.1%) in packages from different producers. We found significant differences in the number of Nosema-infected packages (0.0-75.0%) among the six lines. No packages contained detectable levels ofA. woodi. Considering the observed variability among honey bee packages, beekeepers should be aware of the potential for pest and disease infestations and high drone levels in packages.

  7. Packaging Printing Today

    Directory of Open Access Journals (Sweden)

    Stanislav Bolanča

    2015-12-01

    Full Text Available Printing packaging covers today about 50% of all the printing products. Among the printing products there are printing on labels, printing on flexible packaging, printing on folding boxes, printing on the boxes of corrugated board, printing on glass packaging, synthetic and metal ones. The mentioned packaging are printed in flexo printing technique, offset printing technique, intaglio halftone process, silk – screen printing, ink ball printing, digital printing and hybrid printing process. The possibilities of particular printing techniques for optimal production of the determined packaging were studied in the paper. The problem was viewed from the technological and economical aspect. The possible printing quality and the time necessary for the printing realization were taken as key parameters. An important segment of the production and the way of life is alocation value and it had also found its place in this paper. The events in the field of packaging printing in the whole world were analyzed. The trends of technique developments and the printing technology for packaging printing in near future were also discussed.

  8. Consumer response to packaging design

    NARCIS (Netherlands)

    Steenis, Nigel D.; Herpen, van Erica; Lans, van der Ivo A.; Ligthart, Tom N.; Trijp, van Hans C.M.

    2017-01-01

    Building on theories of cue utilization, this paper investigates whether and how packaging sustainability influences consumer perceptions, inferences and attitudes towards packaged products. A framework is tested in an empirical study among 249 students using soup products varying in packaging

  9. Penggunaan Limbah Kopi Sebagai Bahan Penyusun Ransum Itik Peking dalam Bentuk Wafer Ransum Komplit

    Directory of Open Access Journals (Sweden)

    Muhammad Daud

    2013-04-01

    Full Text Available Effect of coffee waste as component of compiler ration peking duck in the form of wafer complete ration ABSTRACT. Coffee waste is a by-product of coffee processing that potential to be used as feed stuff for peking duck. The weakness of this coffee waste, among others, is perishable, voluminous (bulky and the availability was fluctuated so the processing technology is needed to make this vegetable waste to be durable, easy to stored and to be given to livestock. To solve this problem vegetable waste could be formed as wafer. This research was conducted to study effectiveness of coffee waste as component of compiler ration peking duck in the form of wafer complete ration This experiment was run in completely randomized design which consist of 4 feed treatment and 3 replications.  Ration used was consisted of  P0 = wafer complete ration 0% coffee waste (control, P1 = wafer complete ration 2,5% coffee waste, P2 = wafer complete ration 5% coffee waste, and P3 = Wafer complete ration 7,5% coffee waste. The Variables observed were: physical characteristic (aroma, color, and wafer density and palatability of wafer complete ration. Data collected was analyzed with ANOVA and Duncan Range Test would be used if the result was significantly different. The result showed that the density of wafer complete ration coffee waste was significantly (P< 0.05 differences between of treatment. Mean density wafer complete ration equal to: P0= 0,52±0,03, P1 =0,67±0,04, P2 =0,72±0,03, and P3 = 0,76±0.05 g/cm3. Wafer complete ration coffee waste palatability was significantly (P< 0.05 differences between of treatment. It is concluded that of wafer complete ration composition 5 and 7,5% coffee waste was significantly wafer palatability and gave a highest wafer density. The ration P0 was the most palatable compare to other treatments for the experimental peking duck.

  10. Hermeticity of electronic packages

    CERN Document Server

    Greenhouse, Hal; Romenesco, Bruce

    2011-01-01

    This is a book about the integrity of sealed packages to resist foreign gases and liquids penetrating the seal or an opening (crack) in the packageùespecially critical to the reliability and longevity of electronics. The author explains how to predict the reliability and the longevity of the packages based on leak rate measurements and the assumptions of impurities. Non-specialists in particular will benefit from the author's long involvement in the technology. Hermeticity is a subject that demands practical experience, and solving one problem does not necessarily give one the background to so

  11. Hermeticity of electronic packages

    CERN Document Server

    Greenhouse, Hal

    2000-01-01

    This is a book about the integrity of sealed packages to resist foreign gases and liquids penetrating the seal or an opening (crack) in the package-especially critical to the reliability and longevity of electronics. The author explains how to predict the reliability and the longevity of the packages based on leak rate measurements and the assumptions of impurities. Non-specialists in particular will benefit from the author's long involvement in the technology. Hermeticity is a subject that demands practical experience, and solving one problem does not necessarily give one the background to so

  12. Orbital heat rate package

    Science.gov (United States)

    Lovin, J. K.; Spradley, L. W.

    1979-01-01

    Package consisting of three separate programs used to accurately predict temperature distribution of spacecraft in planetary orbit is invaluable tool for design and analysis of other structures that must function in complex thermal environment.

  13. FLEXIBLE FOOD PACKAGING LABORATORY

    Data.gov (United States)

    Federal Laboratory Consortium — This laboratory contains equipment to fabricate and test prototype packages of many types and sizes (e.g., bags, pouches, trays, cartons, etc.). This equipment can...

  14. Packaging for Posterity.

    Science.gov (United States)

    Sias, Jim

    1990-01-01

    A project in which students designed environmentally responsible food packaging is described. The problem definition; research on topics such as waste paper, plastic, metal, glass, incineration, recycling, and consumer preferences; and the presentation design are provided. (KR)

  15. Dual Use Packaging Project

    Data.gov (United States)

    National Aeronautics and Space Administration — NASA calculation that over a kg of packaging waste are generated per day for a 6 member crew. This represents over 1.5 metric tons of waste during a Mars mission....

  16. Informative document packaging waste

    NARCIS (Netherlands)

    Joosten JM; Nagelhout D; Duvoort GL; Weerd M de

    1989-01-01

    This "informative document packaging waste" forms part of a series of "informative documents waste materials". These documents are conducted by RIVM on the instructions of the Direcotrate General for the Environment, Waste Materials Directorate, in behalf of the program of

  17. Heat transport in cold-wall single-wafer low pressure chemical-vapor-deposition reactors

    NARCIS (Netherlands)

    Hasper, A.; Schmitz, J.E.J.; Holleman, J.; Verweij, J.F.

    1992-01-01

    A model is formulated to understand and predict wafer temperatures in a tungsten low pressure chemical‐vapor‐deposition (LPCVD) single‐wafer cold‐wall reactor equipped with hot plate heating. The temperature control is usually carried out on the hot plate temperature. Large differences can occur

  18. Bond strength tests between silicon wafers and duran tubes (fusion bonded fluidic interconnects)

    NARCIS (Netherlands)

    Fazal, I.; Berenschot, Johan W.; de Boer, J.H.; Jansen, Henricus V.; Elwenspoek, Michael Curt

    2005-01-01

    The fusion bond strength of glass tubes with standard silicon wafers is presented. Experiments with plain silicon wafers and those coated with silicon oxide and silicon nitride are presented. Results obtained are discussed in terms of homogeneity and strength of fusion bond. High pressure testing

  19. Fabrication of CVD graphene-based devices via laser ablation for wafer-scale characterization

    DEFF Research Database (Denmark)

    Mackenzie, David; Buron, Jonas Christian Due; Whelan, Patrick Rebsdorf

    2015-01-01

    Selective laser ablation of a wafer-scale graphene film is shown to provide flexible, high speed (1 wafer/hour) device fabrication while avoiding the degradation of electrical properties associated with traditional lithographic methods. Picosecond laser pulses with single pulse peak fluences of 1...

  20. Charge carrier Density Imaging / IR lifetime mapping of Si wafers by Lock-In Thermography

    NARCIS (Netherlands)

    Van der Tempel, L.

    2012-01-01

    ABSTRACT Minority carrier lifetime imaging by lock-in thermography of passivated silicon wafers for photovoltaic cells has been developed for the public Pieken in de Delta project geZONd. CONCLUSIONS Minority carrier lifetime imaging by lock-in thermography of passivatedsilicon wafers is released

  1. Ultrafast-laser dicing of thin silicon wafers: strategies to improve front- and backside breaking strength

    Science.gov (United States)

    Domke, Matthias; Egle, Bernadette; Stroj, Sandra; Bodea, Marius; Schwarz, Elisabeth; Fasching, Gernot

    2017-12-01

    Thin 50-µm silicon wafers are used to improve heat dissipation of chips with high power densities. However, mechanical dicing methods cause chipping at the edges of the separated dies that reduce the mechanical stability. Thermal load changes may then lead to sudden chip failure. Recent investigations showed that the mechanical stability of the cut chips could be increased using ultrashort-pulsed lasers, but only at the laser entrance (front) side and not at the exit (back) side. The goal of this study was to find strategies to improve both front- and backside breaking strength of chips that were cut out of an 8″ wafer with power metallization using an ultrafast laser. In a first experiment, chips were cut by scanning the laser beam in single lines across the wafer using varying fluencies and scan speeds. Three-point bending tests of the cut chips were performed to measure front and backside breaking strengths. The results showed that the breaking strength of both sides increased with decreasing accumulated fluence per scan. Maximum breaking strengths of about 1100 MPa were achieved at the front side, but only below 600 MPa were measured for the backside. A second experiment was carried out to optimize the backside breaking strength. Here, parallel line scans to increase the distance between separated dies and step cuts to minimize the effect of decreasing fluence during scribing were performed. Bending tests revealed that breaking strengths of about 1100 MPa could be achieved also on the backside using the step cut. A reason for the superior performance could be found by calculating the fluence absorbed by the sidewalls. The calculations suggested that an optimal fluence level to minimize thermal side effects and periodic surface structures was achieved due to the step cut. Remarkably, the best breaking strengths values achieved in this study were even higher than the values obtained on state of the art ns-laser and mechanical dicing machines. This is the first

  2. The ENSDF Java Package

    Science.gov (United States)

    Sonzogni, A. A.

    2005-05-01

    A package of computer codes has been developed to process and display nuclear structure and decay data stored in the ENSDF (Evaluated Nuclear Structure Data File) library. The codes were written in an object-oriented fashion using the java language. This allows for an easy implementation across multiple platforms as well as deployment on web pages. The structure of the different java classes that make up the package is discussed as well as several different implementations.

  3. CH Packaging Program Guidance

    Energy Technology Data Exchange (ETDEWEB)

    Washington TRU Solutions LLC

    2002-03-04

    The purpose of this document is to provide the technical requirements for preparation for use, operation, inspection, and maintenance of a Transuranic Package Transporter Model II (TRUPACT-II), a HalfPACT Shipping Package, and directly related components. This document complies with the minimum requirements as specified in TRUPACT-II Safety Analysis Report for Packaging (SARP), HalfPACT SARP, and Nuclear Regulatory Commission (NRC) Certificates of Compliance (C of C) 9218 and 9279, respectively. In the event there is a conflict between this document and the SARP or C of C, the SARP and/or C of C shall govern. C of Cs state: ''each package must be prepared for shipment and operated in accordance with the procedures described in Chapter 7.0, Operating Procedures, of the application.'' They further state: ''each package must be tested and maintained in accordance with the procedures described in Chapter 8.0, Acceptance Tests and Maintenance Program of the Application.'' Chapter 9.0 of the SAR P charges the WIPP Management and Operation (M&O) contractor with assuring packaging is used in accordance with the requirements of the C of C. Because the packaging is NRC-approved, users need to be familiar with 10 CFR 71.11. Any time a user suspects or has indications that the conditions of approval in the C of C were not met, the Carlsbad Field Office (CBFO) shall be notified immediately. CBFO will evaluate the issue and notify the NRC if required. This document details the instructions to be followed to operate, maintain, and test the TRUPACT-II and HalfPACT packaging. The intent of these instructions is to standardize these operations. All users will follow these instructions or equivalent instructions that assure operations are safe and meet the requirements of the SARPs.

  4. CH Packaging Program Guidance

    Energy Technology Data Exchange (ETDEWEB)

    Washington TRU Solutions LLC

    2003-04-30

    The purpose of this document is to provide the technical requirements for preparation for use, operation, inspection, and maintenance of a Transuranic Package Transporter Model II (TRUPACT-II), a HalfPACT shipping package, and directly related components. This document complies with the minimum requirements as specified in the TRUPACT-II Safety Analysis Report for Packaging (SARP), HalfPACT SARP, and Nuclear Regulatory Commission (NRC) Certificates of Compliance (C of C) 9218 and 9279, respectively. In the event of a conflict between this document and the SARP or C of C, the C of C shall govern. The C of Cs state: ''each package must be prepared for shipment and operated in accordance with the procedures described in Chapter 7.0, Operating Procedures, of the application.'' They further state: ''each package must be tested and maintained in accordance with the procedures described in Chapter 8.0, Acceptance Tests and Maintenance Program of the Application.'' Chapter 9.0 of the SARP charges the WIPP management and operating (M&O) contractor with assuring packaging is used in accordance with the requirements of the C of C. Because the packaging is NRC-approved, users need to be familiar with 10 CFR 71.11. Any time a user suspects or has indications that the conditions of approval in the C of C were not met, the Carlsbad Field Office (CBFO) shall be notified immediately. CBFO will evaluate the issue and notify the NRC if required. This document provides the instructions to be followed to operate, maintain, and test the TRUPACT-II and HalfPACT packaging. The intent of these instructions is to standardize operations. All users will follow these instructions or equivalent instructions that assure operations are safe and meet the requirements of the SARPs.

  5. Wafer size effect on material removal rate in copper CMP process

    Energy Technology Data Exchange (ETDEWEB)

    Yuh, Minjong; Jang, Soocheon; Park, Inho; Jeong, Haedo [Pusan National University, Busan (Korea, Republic of)

    2017-06-15

    The semiconductor industry has employed the Chemical mechanical planarization (CMP) to enable surface topography control. Copper has been used to build interconnects because of its low-resistivity and high-electromigration. In this study, the effect of wafer size on the Material removal rate (MRR) in copper CMP process was investigated. CMP experiments were conducted using copper blanket wafers with diameter of 100, 150, 200 and 300 mm, while temperature and friction force were measured by infrared and piezoelectric sen-sors. The MRR increases with an increase in wafer size under the same process conditions. The wafer size increased the sliding distance of pad, resulting in an increase in the process temperature. This increased the process temperature, accelerating the chemical etching rate and the dynamic etch rate. The sliding distance of the pad was proportional to the square of the wafer radius; it may be used to predict CMP results and design a CMP machine.

  6. Simulation Research on Micro Contact Based on Force in Silicon Wafer Rotation Grinding

    Science.gov (United States)

    Ren, Qinglei; Wei, Xin; Xie, Xiaozhu; Hu, Wei

    2017-10-01

    Silicon wafer rotation grinding with cup type diamond wheel is a typical ultra precision grinding process. In this paper, a simulation model based on force for micro contact between wheel micro unit and silicon wafer is established from the stable ductile grinding process. Micro contact process in grinding is simulated using the nonlinear explicit finite element analysis software LS-DYNA. The stress-strain results on silicon wafer and wheel micro unit are analyzed by finite element method. The results show that the critical displacement and load corresponding elastic to plastic - plastic to brittle exist on silicon wafer. In silicon plastic zone tangential sliding can produce plastic groove and uplift. Wear of wheel micro unit can be based on the simulation data to judge. The research provides support for wafer grinding and wheel wear mechanism.

  7. Stickers versus wafers: The value of resource in a public goods game with children

    Directory of Open Access Journals (Sweden)

    Phiética Raíssa Rodrigues da Silva

    Full Text Available Abstract We investigated how the type of resource, food (wafer or non-food (sticker, age and sex influence cooperation in children. 251 children were tested in a public goods game during eight rounds in two experimental conditions: wafer or sticker condition. Wafers were all of the same kind but stickers were varied. The results indicated that 1 older children donated more stickers than younger children, but they did not differ in relation to wafer donations; and 2 sticker donations remained high along the rounds, while wafer donations decreased. We propose that different strategies may be adopted according to the quality, particularly to the diversity of the resource used, and the cost of cooperation may be overcome when it is more advantageous to wait for a future reward.

  8. Homogenization of CZ Si wafers by Tabula Rasa annealing

    Energy Technology Data Exchange (ETDEWEB)

    Meduna, M., E-mail: mjme@physics.muni.c [Department of Condensed Matter Physics, Masaryk University, Kotlarska 2, CZ-61137 Brno (Czech Republic); Caha, O.; Kubena, J.; Kubena, A. [Department of Condensed Matter Physics, Masaryk University, Kotlarska 2, CZ-61137 Brno (Czech Republic); Bursik, J. [Institute of Physics of Materials, Academy of Sciences of the Czech Republic, Zizkova 22, CZ-61662 Brno (Czech Republic)

    2009-12-15

    The precipitation of interstitial oxygen in Czochralski grown silicon has been investigated by infrared absorption spectroscopy, chemical etching, transmission electron microscopy and X-ray diffraction after application of homogenization annealing process called Tabula Rasa. The influence of this homogenization step consisting in short time annealing at high temperature has been observed for various temperatures and times. The experimental results involving the interstitial oxygen decay in Si wafers and absorption spectra of SiO{sub x} precipitates during precipitation annealing at 1000 deg. C were compared with other techniques for various Tabula Rasa temperatures. The differences in oxygen precipitation, precipitate morphology and evolution of point defects in samples with and without Tabula Rasa applied is evident from all used experimental techniques. The results qualitatively correlate with prediction of homogenization annealing process based on classical nucleation theory.

  9. Chemical strategies for die/wafer submicron alignment and bonding.

    Energy Technology Data Exchange (ETDEWEB)

    Martin, James Ellis; Baca, Alicia I.; Chu, Dahwey; Rohwer, Lauren Elizabeth Shea

    2010-09-01

    This late-start LDRD explores chemical strategies that will enable sub-micron alignment accuracy of dies and wafers by exploiting the interfacial energies of chemical ligands. We have micropatterned commensurate features, such as 2-d arrays of micron-sized gold lines on the die to be bonded. Each gold line is functionalized with alkanethiol ligands before the die are brought into contact. The ligand interfacial energy is minimized when the lines on the die are brought into registration, due to favorable interactions between the complementary ligand tails. After registration is achieved, standard bonding techniques are used to create precision permanent bonds. We have computed the alignment forces and torque between two surfaces patterned with arrays of lines or square pads to illustrate how best to maximize the tendency to align. We also discuss complex, aperiodic patterns such as rectilinear pad assemblies, concentric circles, and spirals that point the way towards extremely precise alignment.

  10. Comparison of texture features for segmentation of patterned wafers

    Science.gov (United States)

    Bourgeat, Pierrick; Meriaudeau, Fabrice; Tobin, Kenneth W., Jr.; Gorria, Patrick

    2004-02-01

    In the last decade, the accessibility of inexpensive and powerful computers has allowed true digital holography to be used for industrial inspection using a microscopy. This technique allows capturing a complex image of a scene, and reconstructing the phase and magnitude information. This type of image gives a new dimension to texture analysis since the topology information can be used as an additional way to extract features. This new technique can be used to extend our previous work on image segmentation of patterned wafers for defect detection. This paper presents a comparison between the features obtained using Gabor filtering on complex (i.e. containing magnitude and phase) images under illumination and focus variations.

  11. Fabrication of PIN diode detectors on thinned silicon wafers

    CERN Document Server

    Ronchin, Sabina; Dalla Betta, Gian Franco; Gregori, Paolo; Guarnieri, Vittorio; Piemonte, Claudio; Zorzi, Nicola

    2004-01-01

    Thin substrates are one of the possible choices to provide radiation hard detectors for future high-energy physics experiments. Among the advantages of thin detectors are the low full depletion voltage, even after high particle fluences, the improvement of the tracking precision and momentum resolution and the reduced material budget. In the framework of the CERN RD50 Collaboration, we have developed p-n diode detectors on membranes obtained by locally thinning the silicon substrate by means of tetra-methyl ammonium hydroxide etching from the wafer backside. Diodes of different shapes and sizes have been fabricated on 57 and 99mum thick membranes. They have been tested, showing a very low leakage current ( less than 0.4nA/cm**2) and, as expected, a very low depletion voltage ( less than 1V for the 57mum membrane). The paper describes the technological approach used for devices fabrication and reports selected results from the electrical characterization.

  12. Ambient plasma treatment of silicon wafers for surface passivation recovery

    Science.gov (United States)

    Ge, Jia; Prinz, Markus; Markert, Thomas; Aberle, Armin G.; Mueller, Thomas

    2017-08-01

    In this work, the effect of an ambient plasma treatment powered by compressed dry air on the passivation quality of silicon wafers coated with intrinsic amorphous silicon sub-oxide is investigated. While long-time storage deteriorates the effective lifetime of all samples, a short ambient plasma treatment improves their passivation qualities. By studying the influence of the plasma treatment parameters on the passivation layers, an optimized process condition was identified which even boosted the passivation quality beyond its original value obtained immediately after deposition. On the other hand, the absence of stringent requirement on gas precursors, vacuum condition and longtime processing makes the ambient plasma treatment an excellent candidate to replace conventional thermal annealing in industrial heterojunction solar cell production.

  13. An evaluation of DNA yield, DNA quality and bite registration from a dental impression wafer.

    Science.gov (United States)

    Ellis, Mark A; Song, Fengyu; Parks, Edwin T; Eckert, George J; Dean, Jeffrey A; Windsor, L Jack

    2007-09-01

    The authors determined the amount and quality of the DNA captured by a bite impression wafer and analyzed any inaccuracies in the impression wafer. The authors made bite registrations for subjects aged 7 to 12 years by using a dental impression wafer (Toothprints, Kerr, Orange, Calif.), obtained an oral rinse sample, took cheek cells by using buccal swabs and made an alginate impression to pour a stone model. They extracted and quantified the DNA from the dental impression wafer, mouthwash and buccal swabs by using the Quant-iT PicoGreen (Invitrogen, Carlsbad, Calif.) assay and a real-time polymerase chain reaction (RT-PCR) assay. They compared the stone models and imprints from the wafer. The average amounts of DNA determined by using Quant-iT PicoGreen from the buccal swab, mouthwash and dental impression wafer samples were 113.61, 509.57 and 1.03 micrograms, respectively. The average amounts of DNA determined by using RT-PCR from the buccal swab, mouthwash and dental impression wafer samples were 11.5240, 22.2540 and 0.0279 mug, respectively. The bite registrations and stone models had an average of 14 percent of mismatches. The dental impression wafers captured DNA but not in high quantities. They did not produce an accurate representation of the dentition. The dental impression wafers captured enough DNA to permit amplification. The accuracy of the bite registration was not sufficient for identification purposes. Therefore, dental impression wafers may be useful only as a reservoir for DNA.

  14. RH Packaging Program Guidance

    Energy Technology Data Exchange (ETDEWEB)

    Washington TRU Solutions LLC

    2008-01-12

    The purpose of this program guidance document is to provide the technical requirements for use, operation, inspection, and maintenance of the RH-TRU 72-B Waste Shipping Package (also known as the "RH-TRU 72-B cask") and directly related components. This document complies with the requirements as specified in the RH-TRU 72-B Safety Analysis Report for Packaging (SARP), and Nuclear Regulatory Commission (NRC) Certificate of Compliance (C of C) 9212. If there is a conflict between this document and the SARP and/or C of C, the C of C shall govern. The C of C states: "...each package must be prepared for shipment and operated in accordance with the procedures described in Chapter 7.0, Operating Procedures, of the application." It further states: "...each package must be tested and maintained in accordance with the procedures described in Chapter 8.0, Acceptance Tests and Maintenance Program of the Application." Chapter 9.0 of the SARP tasks the Waste Isolation Pilot Plant (WIPP) Management and Operating (M&O) Contractor with assuring the packaging is used in accordance with the requirements of the C of C. Because the packaging is NRC-approved, users need to be familiar with Title 10 Code of Federal Regulations (CFR) §71.8, "Deliberate Misconduct." Any time a user suspects or has indications that the conditions of approval in the C of C were not met, the U.S. Department of Energy (DOE) Carlsbad Field Office (CBFO) shall be notified immediately. The CBFO will evaluate the issue and notify the NRC if required.In accordance with 10 CFR Part 71, "Packaging and Transportation of Radioactive Material," certificate holders, packaging users, and contractors or subcontractors who use, design, fabricate, test, maintain, or modify the packaging shall post copies of (1) 10 CFR Part 21, "Reporting of Defects and Noncompliance," regulations, (2) Section 206 of the Energy Reorganization Act of 1974, and (3) NRC Form 3, Notice to Employees. These documents must be posted in a

  15. CH Packaging Program Guidance

    Energy Technology Data Exchange (ETDEWEB)

    None, None

    2009-06-01

    The purpose of this document is to provide the technical requirements for preparation for use, operation, inspection, and maintenance of a Transuranic Package Transporter Model II (TRUPACT-II), a HalfPACT shipping package, and directly related components. This document complies with the minimum requirements as specified in the TRUPACT-II Safety Analysis Report for Packaging (SARP), HalfPACT SARP, and U.S. Nuclear Regulatory Commission (NRC) Certificates of Compliance (C of C) 9218 and 9279, respectively. In the event of a conflict between this document and the SARP or C of C, the C of C shall govern. The C of Cs state: "each package must be prepared for shipment and operated in accordance with the procedures described in Chapter 7.0, Operating Procedures, of the application." They further state: "each package must be tested and maintained in accordance with the procedures described in Chapter 8.0, Acceptance Tests and Maintenance Program of the Application." Chapter 9.0 of the SARP charges the U.S. Department of Energy (DOE) or the Waste Isolation Pilot Plant (WIPP) management and operating (M&O) contractor with assuring packaging is used in accordance with the requirements of the C of C. Because the packaging is NRC-approved, users need to be familiar with Title 10 Code of Federal Regulations (CFR) §71.8. Any time a user suspects or has indications that the conditions of approval in the C of C were not met, the Carlsbad Field Office (CBFO) shall be notified immediately. The CBFO will evaluate the issue and notify the NRC if required. In accordance with 10 CFR Part 71, certificate holders, packaging users, and contractors or subcontractors who use, design, fabricate, test, maintain, or modify the packaging shall post copies of (1) 10 CFR Part 21 regulations, (2) Section 206 of the Energy Reorganization Act of 1974, and (3) NRC Form 3, Notice to Employees. These documents must be posted in a conspicuous location where the activities subject to these regulations are

  16. CH Packaging Program Guidance

    Energy Technology Data Exchange (ETDEWEB)

    None, None

    2008-09-11

    The purpose of this document is to provide the technical requirements for preparation for use, operation, inspection, and maintenance of a Transuranic Package Transporter Model II (TRUPACT-II), a HalfPACT shipping package, and directly related components. This document complies with the minimum requirements as specified in the TRUPACT-II Safety Analysis Report for Packaging (SARP), HalfPACT SARP, and U.S. Nuclear Regulatory Commission (NRC) Certificates of Compliance (C of C) 9218 and 9279, respectively. In the event of a conflict between this document and the SARP or C of C, the C of C shall govern. The C of Cs state: "each package must be prepared for shipment and operated in accordance with the procedures described in Chapter 7.0, Operating Procedures, of the pplication." They further state: "each package must be tested and maintained in accordance with the procedures described in Chapter 8.0, Acceptance Tests and Maintenance Program of the Application." Chapter 9.0 of the SARP charges the U.S. Department of Energy (DOE) or the Waste Isolation Pilot Plant (WIPP) management and operating (M&O) contractor with assuring packaging is used in accordance with the requirements of the C of C. Because the packaging is NRC-approved, users need to be familiar with Title 10 Code of Federal Regulations (CFR) §71.8. Any time a user suspects or has indications that the conditions of approval in the C of C were not met, the Carlsbad Field Office (CBFO) shall be notified immediately. The CBFO will evaluate the issue and notify the NRC if required. In accordance with 10 CFR Part 71, certificate holders, packaging users, and contractors or subcontractors who use, design, fabricate, test, maintain, or modify the packaging shall post copies of (1) 10 CFR Part 21 regulations, (2) Section 206 of the Energy Reorganization Act of 1974, and (3) NRC Form 3, Notice to Employees. These documents must be posted in a conspicuous location where the activities subject to these regulations are

  17. RH Packaging Program Guidance

    Energy Technology Data Exchange (ETDEWEB)

    Washington TRU Solutions LLC

    2006-11-07

    The purpose of this program guidance document is to provide the technical requirements for use, operation, inspection, and maintenance of the RH-TRU 72-B Waste Shipping Package and directly related components. This document complies with the requirements as specified in the RH-TRU 72-B Safety Analysis Report for Packaging (SARP), and Nuclear Regulatory Commission (NRC) Certificate of Compliance (C of C) 9212. If there is a conflict between this document and the SARP and/or C of C, the C of C shall govern. The C of C states: "...each package must be prepared for shipment and operated in accordance with the procedures described in Chapter 7.0, Operating Procedures, of the application." It further states: "...each package must be tested and maintained in accordance with the procedures described in Chapter 8.0, Acceptance Tests and Maintenance Program of the Application." Chapter 9.0 of the SARP tasks the Waste Isolation Pilot Plant (WIPP) Management and Operating (M&O) Contractor with assuring the packaging is used in accordance with the requirements of the C of C. Because the packaging is NRC-approved, users need to be familiar with 10 Code of Federal Regulations (CFR) §71.8, "Deliberate Misconduct." Any time a user suspects or has indications that the conditions of approval in the C of C were not met, the U.S. Department of Energy (DOE) Carlsbad Field Office (CBFO) shall be notified immediately. CBFO will evaluate the issue and notify the NRC if required. In accordance with 10 CFR Part 71, "Packaging and Transportation of Radioactive Material," certificate holders, packaging users, and contractors or subcontractors who use, design, fabricate, test, maintain, or modify the packaging shall post copies of (1) 10 CFR Part 21, "Reporting of Defects and Noncompliance," regulations, (2) Section 206 of the Energy Reorganization Act of 1974, and (3) NRC Form 3, Notice to Employees. These documents must be posted in a conspicuous location where the activities subject to

  18. Probing photo-carrier collection efficiencies of individual silicon nanowire diodes on a wafer substrate

    Science.gov (United States)

    Schmitt, S. W.; Brönstrup, G.; Shalev, G.; Srivastava, S. K.; Bashouti, M. Y.; Döhler, G. H.; Christiansen, S. H.

    2014-06-01

    Vertically aligned silicon nanowire (SiNW) diodes are promising candidates for the integration into various opto-electronic device concepts for e.g. sensing or solar energy conversion. Individual SiNW p-n diodes have intensively been studied, but to date an assessment of their device performance once integrated on a silicon substrate has not been made. We show that using a scanning electron microscope (SEM) equipped with a nano-manipulator and an optical fiber feed-through for tunable (wavelength, power using a tunable laser source) sample illumination, the dark and illuminated current-voltage (I-V) curve of individual SiNW diodes on the substrate wafer can be measured. Surprisingly, the I-V-curve of the serially coupled system composed of SiNW/wafers is accurately described by an equivalent circuit model of a single diode and diode parameters like series and shunting resistivity, diode ideality factor and photocurrent can be retrieved from a fit. We show that the photo-carrier collection efficiency (PCE) of the integrated diode illuminated with variable wavelength and intensity light directly gives insight into the quality of the device design at the nanoscale. We find that the PCE decreases for high light intensities and photocurrent densities, due to the fact that considerable amounts of photo-excited carriers generated within the substrate lead to a decrease in shunting resistivity of the SiNW diode and deteriorate its rectification. The PCE decreases systematically for smaller wavelengths of visible light, showing the possibility of monitoring the effectiveness of the SiNW device surface passivation using the shown measurement technique. The integrated device was pre-characterized using secondary ion mass spectrometry (SIMS), TCAD simulations and electron beam induced current (EBIC) measurements to validate the properties of the characterized material at the single SiNW diode level.Vertically aligned silicon nanowire (SiNW) diodes are promising candidates for

  19. CH Packaging Program Guidance

    Energy Technology Data Exchange (ETDEWEB)

    Washington TRU Solutions LLC

    2005-02-28

    The purpose of this document is to provide the technical requirements for preparation for use, operation, inspection, and maintenance of a Transuranic Package Transporter Model II (TRUPACT-II), a HalfPACT shipping package, and directly related components. This document complies with the minimum requirements as specified in the TRUPACT-II Safety Analysis Report for Packaging (SARP), HalfPACT SARP, and U.S. Nuclear Regulatory Commission (NRC) Certificates of Compliance (C of C) 9218 and 9279, respectively. In the event of a conflict between this document and the SARP or C of C, the C of C shall govern. The C of Cs state: "each package must be prepared for shipment and operated in accordance with the procedures described in Chapter 7.0, Operating Procedures, of the application." They further state: "each package must be tested and maintained in accordance with the procedures described in Chapter 8.0, Acceptance Tests and Maintenance Program of the Application." Chapter 9.0 of the SARP charges the Waste Isolation Pilot Plant (WIPP) management and operating (M&O) contractor with assuring packaging is used in accordance with the requirements of the C of C. Because the packaging is NRC-approved, users need to be familiar with Title 10 Code of Federal Regulations (CFR) §71.8. Any time a user suspects or has indications that the conditions of approval in the C of C were not met, the Carlsbad Field Office (CBFO) shall be notified immediately. The CBFO will evaluate the issue and notify the NRC if required.

  20. Food Packaging Materials

    Science.gov (United States)

    1978-01-01

    The photos show a few of the food products packaged in Alure, a metallized plastic material developed and manufactured by St. Regis Paper Company's Flexible Packaging Division, Dallas, Texas. The material incorporates a metallized film originally developed for space applications. Among the suppliers of the film to St. Regis is King-Seeley Thermos Company, Winchester, Ma'ssachusetts. Initially used by NASA as a signal-bouncing reflective coating for the Echo 1 communications satellite, the film was developed by a company later absorbed by King-Seeley. The metallized film was also used as insulating material for components of a number of other spacecraft. St. Regis developed Alure to meet a multiple packaging material need: good eye appeal, product protection for long periods and the ability to be used successfully on a wide variety of food packaging equipment. When the cost of aluminum foil skyrocketed, packagers sought substitute metallized materials but experiments with a number of them uncovered problems; some were too expensive, some did not adequately protect the product, some were difficult for the machinery to handle. Alure offers a solution. St. Regis created Alure by sandwiching the metallized film between layers of plastics. The resulting laminated metallized material has the superior eye appeal of foil but is less expensive and more easily machined. Alure effectively blocks out light, moisture and oxygen and therefore gives the packaged food long shelf life. A major packaging firm conducted its own tests of the material and confirmed the advantages of machinability and shelf life, adding that it runs faster on machines than materials used in the past and it decreases product waste; the net effect is increased productivity.

  1. Modeling for speciation of radionuclides in waste packages with high-level radioactive wastes; Modellierung zur Speziation von Radionukliden in Abfallgebinden mit hoch radioaktiven Abfaellen

    Energy Technology Data Exchange (ETDEWEB)

    Weyand, Torben; Bracke, Guido; Seher, Holger

    2016-10-15

    Based on a literature search on radioactive waste inventories adequate thermodynamic data for model inventories were derived for geochemical model calculations using PHREEQC in order to determine the solid phase composition of high-level radioactive wastes in different containers. The calculations were performed for different model inventories (PWR-MOX, PWR-UO2, BWR-MOX, BMR-UO2) assuming intact containers under reduction conditions. The effect of a defect in the container on the solid phase composition was considered in variation calculations assuming air contact induced oxidation.

  2. Food packages for Space Shuttle

    Science.gov (United States)

    Fohey, M. F.; Sauer, R. L.; Westover, J. B.; Rockafeller, E. F.

    1978-01-01

    The paper reviews food packaging techniques used in space flight missions and describes the system developed for the Space Shuttle. Attention is directed to bite-size food cubes used in Gemini, Gemini rehydratable food packages, Apollo spoon-bowl rehydratable packages, thermostabilized flex pouch for Apollo, tear-top commercial food cans used in Skylab, polyethylene beverage containers, Skylab rehydratable food package, Space Shuttle food package configuration, duck-bill septum rehydration device, and a drinking/dispensing nozzle for Space Shuttle liquids. Constraints and testing of packaging is considered, a comparison of food package materials is presented, and typical Shuttle foods and beverages are listed.

  3. Waste Package Component Design Methodology Report

    Energy Technology Data Exchange (ETDEWEB)

    D.C. Mecham

    2004-07-12

    This Executive Summary provides an overview of the methodology being used by the Yucca Mountain Project (YMP) to design waste packages and ancillary components. This summary information is intended for readers with general interest, but also provides technical readers a general framework surrounding a variety of technical details provided in the main body of the report. The purpose of this report is to document and ensure appropriate design methods are used in the design of waste packages and ancillary components (the drip shields and emplacement pallets). The methodology includes identification of necessary design inputs, justification of design assumptions, and use of appropriate analysis methods, and computational tools. This design work is subject to ''Quality Assurance Requirements and Description''. The document is primarily intended for internal use and technical guidance for a variety of design activities. It is recognized that a wide audience including project management, the U.S. Department of Energy (DOE), the U.S. Nuclear Regulatory Commission, and others are interested to various levels of detail in the design methods and therefore covers a wide range of topics at varying levels of detail. Due to the preliminary nature of the design, readers can expect to encounter varied levels of detail in the body of the report. It is expected that technical information used as input to design documents will be verified and taken from the latest versions of reference sources given herein. This revision of the methodology report has evolved with changes in the waste package, drip shield, and emplacement pallet designs over many years and may be further revised as the design is finalized. Different components and analyses are at different stages of development. Some parts of the report are detailed, while other less detailed parts are likely to undergo further refinement. The design methodology is intended to provide designs that satisfy the safety

  4. CH Packaging Program Guidance

    Energy Technology Data Exchange (ETDEWEB)

    None, None

    2007-12-13

    The purpose of this document is to provide the technical requirements for preparation for use, operation, inspection, and maintenance of a Transuranic Package Transporter Model II (TRUPACT-II), a HalfPACT shipping package, and directly related components. This document complies with the minimum requirements as specified in the TRUPACT-II Safety Analysis Report for Packaging (SARP), HalfPACT SARP, and U.S. Nuclear Regulatory Commission (NRC) Certificates of Compliance (C of C) 9218 and 9279, respectively. In the event of a conflict between this document and the SARP or C of C, the C of C shall govern. The C of Cs state: "each package must be prepared for shipment and operated in accordance with the procedures described in Chapter 7.0, Operating Procedures, of the application." They further state: "each package must be tested and maintained in accordance with the procedures described in Chapter 8.0, Acceptance Tests and Maintenance Program of the Application." Chapter 9.0 of the SARP charges the U.S. Department of Energy (DOE) or the Waste Isolation Pilot Plant (WIPP) management and operating (M&O) contractor with assuring packaging is used in accordance with the requirements of the C of C. Because the packaging is NRC-approved, users need to be familiar with Title 10 Code of Federal Regulations (CFR) §71.8. Any time a user suspects or has indications that the conditions of approval in the C of C were not met, the Carlsbad Field Office (CBFO) shall be notified immediately. The CBFO will evaluate the issue and notify the NRC if required.In accordance with 10 CFR Part 71, certificate holders, packaging users, and contractors or subcontractors who use, design, fabricate, test, maintain, or modify the packaging shall post copies of (1) 10 CFR Part 21 regulations, (2) Section 206 of the Energy Reorganization Act of 1974, and (3) NRC Form 3, Notice to Employees. These documents must be posted in a conspicuous location where the activities subject to these regulations are

  5. CH Packaging Program Guidance

    Energy Technology Data Exchange (ETDEWEB)

    None, None

    2006-04-25

    The purpose of this document is to provide the technical requirements for preparation for use, operation, inspection, and maintenance of a Transuranic Package TransporterModel II (TRUPACT-II), a HalfPACT shipping package, and directly related components. This document complies with the minimum requirements as specified in the TRUPACT-II Safety Analysis Report for Packaging (SARP), HalfPACT SARP, and U.S. Nuclear Regulatory Commission (NRC) Certificates of Compliance (C of C) 9218 and 9279, respectively. In the event of a conflict between this document and the SARP or C of C, the C of C shall govern. The C of Cs state: "each package must be prepared for shipment and operated in accordance with the procedures described in Chapter 7.0, Operating Procedures, of the application." They further state: "each package must be tested and maintained in accordance with the procedures described in Chapter 8.0, Acceptance Tests and Maintenance Program of the Application." Chapter 9.0 of the SARP charges the U.S. Department of Energy (DOE) or the Waste Isolation Pilot Plant| (WIPP) management and operating (M&O) contractor with assuring packaging is used in accordance with the requirements of the C of C. Because the packaging is NRC-approved, users need to be familiar with Title 10 Code of Federal Regulations(CFR) §71.8. Any time a user suspects or has indications that the conditions ofapproval in the C of C were not met, the Carlsbad Field Office (CBFO) shall be notified immediately. The CBFO will evaluate the issue and notify the NRC if required.In accordance with 10 CFR Part 71, certificate holders, packaging users, and contractors or subcontractors who use, design, fabricate, test, maintain, or modify the packaging shall post copies of (1) 10 CFR Part 21 regulations, (2) Section 206 of the Energy Reorganization Act of 1974, and (3) NRC Form 3, Notice to Employees. These documents must be posted in a conspicuous location where the activities subject to these regulations are

  6. Low hemorrhage-related mortality in trauma patients in a Level I trauma center employing transfusion packages and early thromboelastography-directed hemostatic resuscitation with plasma and platelets

    DEFF Research Database (Denmark)

    Johansson, Pär I; Sørensen, Anne Marie Møller; Larsen, Claus F

    2013-01-01

    BACKGROUND: Hemorrhage accounts for most preventable trauma deaths, but still the optimal strategy for hemostatic resuscitation remains debated. STUDY DESIGN AND METHODS: This was a prospective study of adult trauma patients admitted to a Level I trauma center. Demography, Injury Severity Score......% with blunt trauma). Overall 28-day mortality was 12% with causes of death being exsanguinations (14%), traumatic brain injury (72%, two-thirds expiring within 24 hr), and other (14%). One-fourth, 16 and 15% of the patients, received red blood cells (RBCs), plasma, or platelets (PLTs) within 2 hours from....... Nonsurvivors had lower clot strength by kaolin-activated TEG and TEG functional fibrinogen and lower kaolin-tissue factor-activated TEG α-angle and lysis after 30 minutes compared to survivors. None of the TEG variables were independent predictors of massive transfusion or mortality. CONCLUSION: Three...

  7. Large area LED package

    Science.gov (United States)

    Goullon, L.; Jordan, R.; Braun, T.; Bauer, J.; Becker, F.; Hutter, M.; Schneider-Ramelow, M.; Lang, K.-D.

    2015-03-01

    Solid state lighting using LED-dies is a rapidly growing market. LED-dies with the needed increasing luminous flux per chip area produce a lot of heat. Therefore an appropriate thermal management is required for general lighting with LEDdies. One way to avoid overheating and shorter lifetime is the use of many small LED-dies on a large area heat sink (down to 70 μm edge length), so that heat can spread into a large area while at the same time light also appears on a larger area. The handling with such small LED-dies is very difficult because they are too small to be picked with common equipment. Therefore a new concept called collective transfer bonding using a temporary carrier chip was developed. A further benefit of this new technology is the high precision assembly as well as the plane parallel assembly of the LED-dies which is necessary for wire bonding. It has been shown that hundred functional LED-dies were transferred and soldered at the same time. After the assembly a cost effective established PCB-technology was applied to produce a large-area light source consisting of many small LED-dies and electrically connected on a PCB-substrate. The top contacts of the LED-dies were realized by laminating an adhesive copper sheet followed by LDI structuring as known from PCB-via-technology. This assembly can be completed by adding converting and light forming optical elements. In summary two technologies based on standard SMD and PCB technology have been developed for panel level LED packaging up to 610x 457 mm2 area size.

  8. Validation of thermodesorption method for analysis of semi-volatile organic compounds adsorbed on wafer surface.

    Science.gov (United States)

    Hayeck, Nathalie; Gligorovski, Sasho; Poulet, Irène; Wortham, Henri

    2014-05-01

    To prevent the degradation of the device characteristics it is important to detect the organic contaminants adsorbed on the wafers. In this respect, a reliable qualitative and quantitative analytical method for analysis of semi-volatile organic compounds which can adsorb on wafer surfaces is of paramount importance. Here, we present a new analytical method based on Wafer Outgassing System (WOS) coupled to Automated Thermal Desorber-Gas chromatography-Mass spectrometry (ATD-GC-MS) to identify and quantify volatile and semi-volatile organic compounds from 6", 8" and 12" wafers. WOS technique allows the desorption of organic compounds from one side of the wafers. This method was tested on three important airborne contaminants in cleanroom i.e. tris-(2-chloroethyl) phosphate (TCEP), tris-(2-chloroisopropyl) phosphate (TCPP) and diethyl phthalate (DEP). In addition, we validated this method for the analysis and quantification of DEP, TCEP and TCPP and we estimated the backside organic contamination which may contribute to the front side of the contaminated wafers. We are demonstrating that WOS/ATD-GC-MS is a suitable and highly efficient technique for desorption and quantitative analysis of organophosphorous compounds and phthalate ester which could be found on the wafer surface. Copyright © 2014 Elsevier B.V. All rights reserved.

  9. Intrinsic Gettering in Nitrogen-Doped and Hydrogen-Annealed Czochralski-Grown Silicon Wafers

    Science.gov (United States)

    Goto, Hiroyuki; Pan, Lian-Sheng; Tanaka, Masafumi; Kashima, Kazuhiko

    2001-06-01

    The properties of nitrogen-doped and hydrogen-annealed Czochralski-grown silicon (NHA-CZ-Si) wafers were investigated in this study. The quality of the subsurface was investigated by monitoring the generation lifetime of minority carriers, as measured by the capacitance-time measurements of a metal oxide silicon capacitor (MOS C-t). The intrinsic gettering (IG) ability was investigated by determining the nickel concentration on the surface and in the subsurface as measured by graphite furnace atomic absorption spectrometry (GFAAS) after the wafer was deliberately contaminated with nickel. From the results obtained, the generation lifetimes of these NHA-CZ-Si wafers were determined to be almost the same as, or a little longer than those of epitaxial wafers, and the IG ability was proportional to the total volume of oxygen precipitates [i.e., bulk micro defects (BMDs)], which was influenced by the oxygen and nitrogen concentrations in the wafers. Therefore, it is suggested that the subsurface of the NHA-CZ-Si wafers is of good quality and the IG capacity is controllable by the nitrogen and oxygen concentrations in the wafers.

  10. Fast-ramp rapid vertical processor for 300-mm Si wafer processing

    Science.gov (United States)

    Porter, Cole; Laser, Allan; Herring, Robert; Pandey, Pradeep

    1998-09-01

    Fast-ramp vertical furnace technology has been established on the 200-nm wafer platform providing higher capacity production, decreased cycle time and lower thermal budgets. Fast-ramp furnaces are capable of instantaneous temperature ramp rates up to 100 degrees C/min. This fast-ramp technology is now applied to 300-nm wafer processing on the SVG/Thermco Rapid Vertical Processor Vertical Furnace. 300- mm fast-ramp capability using the latest in real-time adaptive model based temperature control technology, Clairvoyant Control, is reported. Atmospheric Thermal Oxidation, LPCVD Nitride and Polysilicon Deposition, and LPCVD TEOS-based SiO2 Deposition results are discussed. 300- mm wafer Radial Delta Temperature dependence on temperature ramp rate, wafer pitch, and wafer support fixtures are discussed. Wafer throughput is calculated and reported. The Clairvoyant Control methodology of combining thermal, direct and virtually-sensed parameters to produce real-tim e estimation of wafer temperatures, thermal trajectory optimization, and feedback to minimize variations in film thickness and electrical properties is presented.

  11. Kerfless Silicon Precursor Wafer Formed by Rapid Solidification: October 2009 - March 2010

    Energy Technology Data Exchange (ETDEWEB)

    Lorenz, A.

    2011-06-01

    1366 Direct Wafer technology is an ultra-low-cost, kerfless method of producing crystalline silicon wafers compatible with the existing dominant silicon PV supply chain. By doubling utilization of silicon and simplifying the wafering process and equipment, Direct Wafers will support drastic reductions in wafer cost and enable module manufacturing costs < $1/W. This Pre-Incubator subcontract enabled us to accelerate the critical advances necessary to commercialize the technology by 2012. Starting from a promising concept that was initially demonstrated using a model material, we built custom equipment necessary to validate the process in silicon, then developed sufficient understanding of the underlying physics to successfully fabricate wafers meeting target specifications. These wafers, 50 mm x 50 mm x 200 ..mu..m thick, were used to make prototype solar cells via standard industrial processes as the project final deliverable. The demonstrated 10% efficiency is already impressive when compared to most thin films, but still offers considerable room for improvement when compared to typical crystalline silicon solar cells.

  12. AWV: high-throughput cross-array cross-wafer variation mapping

    Science.gov (United States)

    Yeo, Jeong-Ho; Lee, Byoung-Ho; Lee, Tae-Yong; Greenberg, Gadi; Meshulach, Doron; Ravid, Erez; Levi, Shimon; Kan, Kobi; Shabtay, Saar; Cohen, Yehuda; Rotlevi, Ofer

    2008-03-01

    Minute variations in advanced VLSI manufacturing processes are well known to significantly impact device performance and die yield. These variations drive the need for increased measurement sampling with a minimal impact on Fab productivity. Traditional discrete measurements such as CDSEM or OCD, provide, statistical information for process control and monitoring. Typically these measurements require a relatively long time and cover only a fraction of the wafer area. Across array across wafer variation mapping ( AWV) suggests a new approach for high throughput, full wafer process variation monitoring, using a DUV bright-field inspection tool. With this technique we present a full wafer scanning, visualizing the variation trends within a single die and across the wafer. The underlying principle of the AWV inspection method is to measure variations in the reflected light from periodic structures, under optimized illumination and collection conditions. Structural changes in the periodic array induce variations in the reflected light. This information is collected and analyzed in real time. In this paper we present AWV concept, measurements and simulation results. Experiments were performed using a DUV bright-field inspection tool (UVision (TM), Applied Materials) on a memory short loop experiment (SLE), Focus Exposure Matrix (FEM) and normal wafers. AWV and CDSEM results are presented to reflect CD variations within a memory array and across wafers.

  13. Packaging Technologies for High Temperature Electronics and Sensors

    Science.gov (United States)

    Chen, Liangyu; Hunter, Gary W.; Neudeck, Philip G.; Beheim, Glenn M.; Spry, David J.; Meredith, Roger D.

    2013-01-01

    This paper reviews ceramic substrates and thick-film metallization based packaging technologies in development for 500degC silicon carbide (SiC) electronics and sensors. Prototype high temperature ceramic chip-level packages and printed circuit boards (PCBs) based on ceramic substrates of aluminum oxide (Al2O3) and aluminum nitride (AlN) have been designed and fabricated. These ceramic substrate-based chiplevel packages with gold (Au) thick-film metallization have been electrically characterized at temperatures up to 550degC. A 96% alumina based edge connector for a PCB level subsystem interconnection has also been demonstrated recently. The 96% alumina packaging system composed of chip-level packages and PCBs has been tested with high temperature SiC devices at 500degC for over 10,000 hours. In addition to tests in a laboratory environment, a SiC JFET with a packaging system composed of a 96% alumina chip-level package and an alumina printed circuit board mounted on a data acquisition circuit board was launched as a part of the MISSE-7 suite to the International Space Station via a Shuttle mission. This packaged SiC transistor was successfully tested in orbit for eighteen months. A spark-plug type sensor package designed for high temperature SiC capacitive pressure sensors was developed. This sensor package combines the high temperature interconnection system with a commercial high temperature high pressure stainless steel seal gland (electrical feed-through). Test results of a packaged high temperature capacitive pressure sensor at 500degC are also discussed. In addition to the pressure sensor package, efforts for packaging high temperature SiC diode-based gas chemical sensors are in process.

  14. Hydrogel-Forming Microneedles Prepared from “Super Swelling” Polymers Combined with Lyophilised Wafers for Transdermal Drug Delivery

    Science.gov (United States)

    Donnelly, Ryan F.; McCrudden, Maelíosa T. C.; Zaid Alkilani, Ahlam; Larrañeta, Eneko; McAlister, Emma; Courtenay, Aaron J.; Kearney, Mary-Carmel; Singh, Thakur Raghu Raj; McCarthy, Helen O.; Kett, Victoria L.; Caffarel-Salvador, Ester; Al-Zahrani, Sharifa; Woolfson, A. David

    2014-01-01

    We describe, for the first time, hydrogel-forming microneedle arrays prepared from “super swelling” polymeric compositions. We produced a microneedle formulation with enhanced swelling capabilities from aqueous blends containing 20% w/w Gantrez S-97, 7.5% w/w PEG 10,000 and 3% w/w Na2CO3 and utilised a drug reservoir of a lyophilised wafer-like design. These microneedle-lyophilised wafer compositions were robust and effectively penetrated skin, swelling extensively, but being removed intact. In in vitro delivery experiments across excised neonatal porcine skin, approximately 44 mg of the model high dose small molecule drug ibuprofen sodium was delivered in 24 h, equating to 37% of the loading in the lyophilised reservoir. The super swelling microneedles delivered approximately 1.24 mg of the model protein ovalbumin over 24 h, equivalent to a delivery efficiency of approximately 49%. The integrated microneedle-lyophilised wafer delivery system produced a progressive increase in plasma concentrations of ibuprofen sodium in rats over 6 h, with a maximal concentration of approximately 179 µg/ml achieved in this time. The plasma concentration had fallen to 71±6.7 µg/ml by 24 h. Ovalbumin levels peaked in rat plasma after only 1 hour at 42.36±17.01 ng/ml. Ovalbumin plasma levels then remained almost constant up to 6 h, dropping somewhat at 24 h, when 23.61±4.84 ng/ml was detected. This work represents a significant advancement on conventional microneedle systems, which are presently only suitable for bolus delivery of very potent drugs and vaccines. Once fully developed, such technology may greatly expand the range of drugs that can be delivered transdermally, to the benefit of patients and industry. Accordingly, we are currently progressing towards clinical evaluations with a range of candidate molecules. PMID:25360806

  15. Hydrogel-forming microneedles prepared from "super swelling" polymers combined with lyophilised wafers for transdermal drug delivery.

    Science.gov (United States)

    Donnelly, Ryan F; McCrudden, Maelíosa T C; Zaid Alkilani, Ahlam; Larrañeta, Eneko; McAlister, Emma; Courtenay, Aaron J; Kearney, Mary-Carmel; Singh, Thakur Raghu Raj; McCarthy, Helen O; Kett, Victoria L; Caffarel-Salvador, Ester; Al-Zahrani, Sharifa; Woolfson, A David

    2014-01-01

    We describe, for the first time, hydrogel-forming microneedle arrays prepared from "super swelling" polymeric compositions. We produced a microneedle formulation with enhanced swelling capabilities from aqueous blends containing 20% w/w Gantrez S-97, 7.5% w/w PEG 10,000 and 3% w/w Na2CO3 and utilised a drug reservoir of a lyophilised wafer-like design. These microneedle-lyophilised wafer compositions were robust and effectively penetrated skin, swelling extensively, but being removed intact. In in vitro delivery experiments across excised neonatal porcine skin, approximately 44 mg of the model high dose small molecule drug ibuprofen sodium was delivered in 24 h, equating to 37% of the loading in the lyophilised reservoir. The super swelling microneedles delivered approximately 1.24 mg of the model protein ovalbumin over 24 h, equivalent to a delivery efficiency of approximately 49%. The integrated microneedle-lyophilised wafer delivery system produced a progressive increase in plasma concentrations of ibuprofen sodium in rats over 6 h, with a maximal concentration of approximately 179 µg/ml achieved in this time. The plasma concentration had fallen to 71±6.7 µg/ml by 24 h. Ovalbumin levels peaked in rat plasma after only 1 hour at 42.36±17.01 ng/ml. Ovalbumin plasma levels then remained almost constant up to 6 h, dropping somewhat at 24 h, when 23.61±4.84 ng/ml was detected. This work represents a significant advancement on conventional microneedle systems, which are presently only suitable for bolus delivery of very potent drugs and vaccines. Once fully developed, such technology may greatly expand the range of drugs that can be delivered transdermally, to the benefit of patients and industry. Accordingly, we are currently progressing towards clinical evaluations with a range of candidate molecules.

  16. Hydrogel-forming microneedles prepared from "super swelling" polymers combined with lyophilised wafers for transdermal drug delivery.

    Directory of Open Access Journals (Sweden)

    Ryan F Donnelly

    Full Text Available We describe, for the first time, hydrogel-forming microneedle arrays prepared from "super swelling" polymeric compositions. We produced a microneedle formulation with enhanced swelling capabilities from aqueous blends containing 20% w/w Gantrez S-97, 7.5% w/w PEG 10,000 and 3% w/w Na2CO3 and utilised a drug reservoir of a lyophilised wafer-like design. These microneedle-lyophilised wafer compositions were robust and effectively penetrated skin, swelling extensively, but being removed intact. In in vitro delivery experiments across excised neonatal porcine skin, approximately 44 mg of the model high dose small molecule drug ibuprofen sodium was delivered in 24 h, equating to 37% of the loading in the lyophilised reservoir. The super swelling microneedles delivered approximately 1.24 mg of the model protein ovalbumin over 24 h, equivalent to a delivery efficiency of approximately 49%. The integrated microneedle-lyophilised wafer delivery system produced a progressive increase in plasma concentrations of ibuprofen sodium in rats over 6 h, with a maximal concentration of approximately 179 µg/ml achieved in this time. The plasma concentration had fallen to 71±6.7 µg/ml by 24 h. Ovalbumin levels peaked in rat plasma after only 1 hour at 42.36±17.01 ng/ml. Ovalbumin plasma levels then remained almost constant up to 6 h, dropping somewhat at 24 h, when 23.61±4.84 ng/ml was detected. This work represents a significant advancement on conventional microneedle systems, which are presently only suitable for bolus delivery of very potent drugs and vaccines. Once fully developed, such technology may greatly expand the range of drugs that can be delivered transdermally, to the benefit of patients and industry. Accordingly, we are currently progressing towards clinical evaluations with a range of candidate molecules.

  17. Sheet resistance uniformity in drive-in step for different multi-crystalline silicon wafer dispositions

    Energy Technology Data Exchange (ETDEWEB)

    Moussi, A.; Bouhafs, D.; Mahiou, L. [Laboratoire des Cellules Photovoltaiques, Unite de Developpement de la Technologie du Silicium, 2 Bd, Frantz Fanon, B.P. 140, 7 Merveilles Alger (Algeria); Belkaid, M.S. [Dep. Electronique, Faculte de Genie Electrique et Informatique, UMMTO (Algeria)

    2009-09-15

    In this work, we present a study of emitters realized using different configurations of the silicon wafers in the quartz boat. The phosphorous liquid source is sprayed onto p-type multi-crystalline silicon substrates and the drive-in is made at high temperature in a muffle furnace. Three different configurations of the wafers in the boat are tested: separated, back to back and compact block of wafers. A fourth configuration is also used in source-receptor mode. The emitter phosphorous concentration profile is obtained by SIMS analysis. The resulting emitters are characterized by sheet resistance measurements and a comparison is made between the wafers within the same batch and from one batch to another. The uniformity and the standard deviation of the sheet resistance are calculated in each case. The emitter sheet resistance mapping of the wafer set in the middle of the boat for a given process gives a mean R{sub sq} 14.66 {omega}/sq with a standard deviation of 1.76% and uniformity of 18.7%. Standard deviations of 2.116% and 1.559% are obtained for wafers in the batch when using the spaced and compact configurations, respectively. The standard deviation is reduced to 0.68% when the wafers are used in source/receptor mode. A comparison is also made between wafers with different dilution of phosphorous source in ethanol. From these results we can conclude that the compact configuration offers better uniformity and lower standard deviation. Furthermore, when combined with the source-receptor configuration these parameters are significantly improved. This study allows the experimenter to identify the technological parameters of the solar cell emitter manufacturing and target precisely the desired values of the sheet resistance while limiting the number of rejected wafers. (author)

  18. Crisis, Stimulus Package and Migration in China

    NARCIS (Netherlands)

    Csanádi, Maria; Nie, Zihan; Li, Shi

    2015-01-01

    This paper analyzes the short-term and long-term effects that the global economic crisis and the investment priorities of the Chinese Government's stimulus package had on Chinese migrant flows between 2008 and 2014. Combining micro-level household survey data and macro-level statistics, the

  19. Characterization of perovskite layer on various nanostructured silicon wafer

    Science.gov (United States)

    Rostan, Nur Fairuz Mohd; Sepeai, Suhaila; Ramli, Noor Fadhilah; Azhari, Ayu Wazira; Ludin, Norasikin Ahmad; Teridi, Mohd Asri Mat; Ibrahim, Mohd Adib; Zaidi, Saleem H.

    2017-05-01

    Crystalline silicon (c-Si) solar cell dominates 90% of photovoltaic (PV) market. The c-Si is the most mature of all PV technologies and expected to remain leading the PV technology by 2050. The attractive characters of Si solar cell are stability, long lasting and higher lifetime. Presently, the efficiency of c-Si solar cell is still stuck at 25% for one and half decades. Tandem approach is one of the attempts to improve the Si solar cell efficiency with higher bandgap layer is stacked on top of Si bottom cell. Perovskite offers a big potential to be inserted into a tandem solar cell. Perovskite with bandgap of 1.6 to 1.9 eV will be able to absorb high energy photons, meanwhile c-Si with bandgap of 1.124 eV will absorb low energy photons. The high carrier mobility, high carrier lifetime, highly compatible with both solution and evaporation techniques makes perovskite an eligible candidate for perovskite-Si tandem configuration. The solution of methyl ammonium lead iodide (MAPbI3) was prepared by single step precursor process. The perovskite layer was deposited on different c-Si surface structure, namely planar, textured and Si nanowires (SiNWs) by using spin-coating technique at different rotation speeds. The nanostructure of Si surface was textured using alkaline based wet chemical etching process and SiNW was grown using metal assisted etching technique. The detailed surface morphology and absorbance of perovskite were studied in this paper. The results show that the thicknesses of MAPbI3 were reduced with the increasing of rotation speed. In addition, the perovskite layer deposited on the nanostructured Si wafer became rougher as the etching time and rotation speed increased. The average surface roughness increased from ˜24 nm to ˜38 nm for etching time range between 5-60 min at constant low rotation speed (2000 rpm) for SiNWs Si wafer.

  20. Enhanced photoluminescence from photonic crystal-coated GaN LED wafers

    Science.gov (United States)

    Rahman, F.; Khokhar, A. Z.

    2011-06-01

    This paper describes results of studies on photoluminescence from blue-emitting GaN LED wafers coated with a layer of synthetic opal photonic crystals. Commercial LED wafer material was used and samples were coated with thin films consisting of several layers of stacked spherical polystyrene balls. Various optical measurements were performed on these samples while they were excited with a 405 nm laser beam. Diffraction pattern due to the photonic crystal structure, showing the underlying six-fold symmetry, was recorded. The spectrum and angle-resolved intensity of photoluminescence were measured to understand the coupling of LED light with the grown photonic crystal structure on top of the wafer.

  1. Future semiconductor detectors using advanced microelectronics with post-processing, hybridization and packaging technology

    CERN Document Server

    Heijne, Erik H M

    2005-01-01

    Several challenges for tracking with semiconductor detectors in the high rate environment of future elementary particle physics experiments are discussed, such as reduction of spurious hits and ambiguities and identification of short-lived 'messenger' particles inside jets. To meet these requirements the instrumentation increasingly calls on progress in microelectronics. Advanced silicon integration technology for 3D packaging now offers post-processing of CMOS such as wafer thinning to 50µm and through-wafer vias of <10µm. These technologies might be applied to create new tracking detectors which can handle vertexing under the difficult rate conditions. The sensor layers can be only ~50µm thick with low noise performance and better radiation hardness by using small volume pixels. Multi-layer sensors with integrated coincidence signal processing could discriminate real tracks from various sources of background. Even in a ~400µm thick 3D assembly the vectors of tracks can be determined in ~10 degree bin...

  2. Geothermal Greenhouse Information Package

    Energy Technology Data Exchange (ETDEWEB)

    Rafferty, K. [P.E.; Boyd, T. [ed.

    1997-01-01

    This package of information is intended to provide a foundation of background information for developers of geothermal greenhouses. The material is divided into seven sections covering such issues as crop culture and prices, operating costs for greenhouses, heating system design, vendors and a list of other sources of information.

  3. Aquaculture Information Package

    Energy Technology Data Exchange (ETDEWEB)

    Boyd, T.; Rafferty, K. [editors

    1998-01-01

    This package of information is intended to provide background to developers of geothermal aquaculture projects. The material is divided into eight sections and includes information on market and price information for typical species, aquaculture water quality issues, typical species culture information, pond heat loss calculations, an aquaculture glossary, regional and university aquaculture offices and state aquaculture permit requirements.

  4. Waste disposal package

    Science.gov (United States)

    Smith, M.J.

    1985-06-19

    This is a claim for a waste disposal package including an inner or primary canister for containing hazardous and/or radioactive wastes. The primary canister is encapsulated by an outer or secondary barrier formed of a porous ceramic material to control ingress of water to the canister and the release rate of wastes upon breach on the canister. 4 figs.

  5. Openability of tamperproof packaging

    NARCIS (Netherlands)

    Del Castillo C., A.; Wever, R.; Buijs, P.J.; Stevels, A.

    2007-01-01

    Communication, product protection and presentation are three key aspects in the world of packaging nowadays. Due to a retail landscape consisting of large stores, displaying packed products on the shelves in self-service environments, these aspects become increasingly important, not only for Fast

  6. Radioactive waste disposal package

    Science.gov (United States)

    Lampe, Robert F.

    1986-11-04

    A radioactive waste disposal package comprising a canister for containing vitrified radioactive waste material and a sealed outer shell encapsulating the canister. A solid block of filler material is supported in said shell and convertible into a liquid state for flow into the space between the canister and outer shell and subsequently hardened to form a solid, impervious layer occupying such space.

  7. 1366 Project Automate: Enabling Automation for <$0.10/W High-Efficiency Kerfless Wafers Manufactured in the US

    Energy Technology Data Exchange (ETDEWEB)

    Lorenz, Adam [1366 Technologies, Bedford, MA (United States)

    2017-05-10

    For photovoltaic (PV) manufacturing to thrive in the U.S., there must be an innovative core to the technology. Project Automate builds on 1366’s proprietary Direct Wafer® kerfless wafer technology and aims to unlock the cost and efficiency advantages of thin kerfless wafers. Direct Wafer is an innovative, U.S.-friendly (efficient, low-labor content) manufacturing process that addresses the main cost barrier limiting silicon PV cost-reductions – the 35-year-old grand challenge of manufacturing quality wafers (40% of the cost of modules) without the cost and waste of sawing. This simple, scalable process will allow 1366 to manufacture “drop-in” replacement wafers for the $10 billion silicon PV wafer market at 50% of the cost, 60% of the capital, and 30% of the electricity of conventional casting and sawing manufacturing processes. This SolarMat project developed the Direct Wafer processes’ unique capability to tailor the shape of wafers to simultaneously make thinner AND stronger wafers (with lower silicon usage) that enable high-efficiency cell architectures. By producing wafers with a unique target geometry including a thick border (which determines handling characteristics) and thin interior regions (which control light capture and electron transport and therefore determine efficiency), 1366 can simultaneously improve quality and lower cost (using less silicon).

  8. Adhesive disbond detection using piezoelectric wafer active sensors

    Science.gov (United States)

    Roth, William; Giurgiutiu, Victor

    2015-04-01

    The aerospace industry continues to increase the use of adhesives for structural bonding due to the increased joint efficiency (reduced weight), even distribution of the load path and decreases in stress concentrations. However, the limited techniques for verifying the strength of adhesive bonds has reduced its use on primary structures and requires an intensive inspection schedule. This paper discusses a potential structural health monitoring (SHM) technique for the detection of disbonds through the in situ inspection of adhesive joints. This is achieved through the use of piezoelectric wafer active sensors (PWAS), thin unobtrusive sensors which are permanently bonded to the aircraft structure. The detection method discussed in this study is electromechanical impedance spectroscopy (EMIS), a local vibration method. This method detects disbonds from the change in the mechanical impedance of the structure surrounding the disbond. This paper will discuss how predictive modeling can provide valuable insight into the inspection method, and provide better results than empirical methods alone. The inspection scheme was evaluated using the finite element method, and the results were verified experimentally using a large aluminum test article, and included both pristine and disbond coupons.

  9. The surface leakage currents of CdZnTe wafers

    Energy Technology Data Exchange (ETDEWEB)

    Zha Gangqiang [School of Materials Science and Engineering, Northwestern Polytechnical University, Xi' an 710072 (China)]. E-mail: zha_gq@hotmail.com; Jie Wanqi [School of Materials Science and Engineering, Northwestern Polytechnical University, Xi' an 710072 (China); Tan Tingting [School of Materials Science and Engineering, Northwestern Polytechnical University, Xi' an 710072 (China); Li Peisen [School of Materials Science and Engineering, Northwestern Polytechnical University, Xi' an 710072 (China)

    2007-01-30

    The surface leakage currents (SLCs) and surface sheet resistances (SSRs) of CdZnTe (1 1 0) (1 1 1) A and (1 1 1) B surfaces after etching with Br-MeOH solution, chemo-mechanical polishing (CMP) and passivation were measured in the parallel stripe model, respectively. Meanwhile the surface compositions were determined by X-ray photoelectron spectroscopy (XPS). Te enrichment introduced by etching with Br-MeOH resulted in the increase of the SLCs of CdZnTe wafers. After chemo-mechanical polishing, Te enrichment was removed, and SLCs decreased. CdZnTe (1 1 1) B without Te enrichment possesses higher SLC than that of (1 1 1) A, and (1 1 0) surface has the lowest SLC, which should be attributed to the lower surface dangling bonds. Passivation treatment with NH{sub 4}F + H{sub 2}O{sub 2} is an effective method to decrease SLCs of CdZnTe, by which the SLC was decreased two orders.

  10. Engineered waste-package-system design specification

    Energy Technology Data Exchange (ETDEWEB)

    1983-05-01

    This report documents the waste package performance requirements and geologic and waste form data bases used in developing the conceptual designs for waste packages for salt, tuff, and basalt geologies. The data base reflects the latest geotechnical information on the geologic media of interest. The parameters or characteristics specified primarily cover spent fuel, defense high-level waste, and commercial high-level waste forms. The specification documents the direction taken during the conceptual design activity. A separate design specification will be developed prior to the start of the preliminary design activity.

  11. Lunar Dust Analysis Package - LDAP

    Science.gov (United States)

    Chalkley, S. A.; Richter, L.; Goepel, M.; Sovago, M.; Pike, W. T.; Yang, S.; Rodenburg, J.; Claus, D.

    2012-09-01

    identification of other ejecta in the vicinity of the Lander. • Atomic (Magnetic) Force Microscope - providing nano-scale measurement of the fine particles and presence of nanophase Fe which is potentially toxic to humans • Lenseless Microscope, a novel, low mass technology based on combining diffraction patterns derived from a laser illumination of the sample to give high resolution 3D images of the regolith presented. In this paper we cover the high level science requirements and explain how this has driven the overall package design as well as the specific payload features. The complex sample handling system which allows the co-located payloads to share rego-lith samples and be able to make physical measure-ment in the sub micron scale. The use of micro-machining and MEMS technology is covered. The paper also discusses the harsh environmental conditions at the Lunar South Pole and the impact this has on the operation and survivability of an externally mounted package. The expected performance of the whole package, including the use of LIBS under lunar vacuum conditions is also presented.

  12. Methodology For Reduction Of Sampling On The Visual Inspection Of Developed And Etched Wafers

    Science.gov (United States)

    van de Ven, Jamie S.; Khorasani, Fred

    1989-07-01

    There is a lot of inspection in the manufacturing of semiconductor devices. Generally, the more important a manufacturing step, the higher is the level of inspection. In some cases 100% of the wafers are inspected after certain steps. Inspection is a non-value added and expensive activity. It requires an army of "inspectors," often times expensive equipment and becomes a "bottle neck" when the level of inspection is high. Although inspection helps identify quality problems, it hurts productivity. The new management, quality and productivity philosophies recommend against over inspection. [Point #3 in Dr. Deming's 14 Points for Management (1)] 100% inspection is quite unnecessary . Often the nature of a process allows us to reduce inspection drastically and still maintain a high level of confidence in quality. In section 2, we discuss such situations and show that some elementary probability theory allows us to determine sample sizes and measure the chances of catching a bad "lot" and accepting a good lot. In section 3, we provide an example and application of the theory, and make a few comments on money and time saved because of this work. Finally, in section 4, we draw some conclusions about the new quality and productivity philosophies and how applied statisticians and engineers should study every situation individually and avoid blindly using methods and tables given in books.

  13. Nucleosome packaging and nucleosome positioning of genomic DNA

    OpenAIRE

    Lowary, P. T.; Widom, J

    1997-01-01

    The goals of this study were to assess the extent to which bulk genomic DNA sequences contribute to their own packaging in nucleosomes and to reveal the relationship between nucleosome packaging and positioning. Using a competitive nucleosome reconstitution assay, we found that at least 95% of bulk DNA sequences have an affinity for histone octamer in nucleosomes that is similar to that of randomly synthesized DNA; they contribute little to their own packaging at the level of individual nucle...

  14. The impact of packaging transparency on product attractiveness

    OpenAIRE

    Barbara Sabo; Tina Bečica; Nikolina Keleš; Dorotea Kovačević; Maja Brozović

    2017-01-01

    The aim of the study was to investigate the impact of different levels of packaging transparency on the evaluation of attractiveness of a product within the packaging, in relation to whether it is a healthy or unhealthy product. Consumer preferences during buying decision process were also investigated. The study was conducted by two methods. The first one was related to consumer preferences and was based on a choice task, while the other one was related to packaging attractiveness and was ba...

  15. Automated Array Assembly Task In-depth Study of Silicon Wafer Surface Texturizing

    Science.gov (United States)

    Jones, G. T.; Rhee, S. S.

    1979-01-01

    Several aspects of silicon wafer surface texturizing were studied. A low cost cleaning method that utilizes recycled Freon in an ultrasonic vapor degreaser to remove organic and inorganic contaminants from the surface of silicon wafers as received from silicon suppliers was investigated. The use of clean dry air and high throughout wafer batch drying techniques was shown to lower the cost of wafer drying. A two stage texturizing process was examined for suitability in large scale production. Also, an in-depth gettering study with the two stage texturizing process was performed for the enhancement of solar cell efficiency, minimization of current versus voltage curve dispersion, and improvement in process reproducibility. The 10% efficiency improvement goal was exceeded for the near term implementation of flat plate photovoltaic cost reduction.

  16. Low Loss, Finite Width Ground Plane, Thin Film Microstrip Lines on Si Wafers

    Science.gov (United States)

    Ponchak, George E.; Margomenos, Alexandros; Katehi, Linda P. B.

    1999-01-01

    Si RFICs on standard, 2 Omega-cm. Si wafers require novel transmission lines to reduce the loss caused by the resistive substrate. One such transmission line is commonly called Thin Film Microstrip (TFMS), which is created by depositing a metallic ground plane, thin insulating layers, and the microstrip lines on the Si wafer. Thus, the electric fields are isolated from the Si wafer. In this paper, it is shown through experimental results that the ground plane of TFMS may be finite width and comparable to the strip width in size while still achieving low loss on 2 Omega-cm Si. Measured effective permittivity shows that the field interaction with the Si wafer is small.

  17. Tailoring the graphene/silicon carbide interface for monolithic wafer-scale electronics

    National Research Council Canada - National Science Library

    Hertel, S; Waldmann, D; Jobst, J; Albert, A; Albrecht, M; Reshanov, S; Schöner, A; Krieger, M; Weber, H B

    2012-01-01

    .... Here in the search for a comprehensive concept for wafer-scale graphene electronics, we present a monolithic transistor that uses the entire material system epitaxial graphene on silicon carbide (0001...

  18. A study of defects on EUV mask using blank inspection, patterned mask inspection, and wafer inspection

    Energy Technology Data Exchange (ETDEWEB)

    Huh, S.; Ren, L.; Chan, D.; Wurm, S.; Goldberg, K. A.; Mochi, I.; Nakajima, T.; Kishimoto, M.; Ahn, B.; Kang, I.; Park, J.-O.; Cho, K.; Han, S.-I.; Laursen, T.

    2010-03-12

    The availability of defect-free masks remains one of the key challenges for inserting extreme ultraviolet lithography (EUVL) into high volume manufacturing. yet link data is available for understanding native defects on real masks. In this paper, a full-field EUV mask is fabricated to investigate the printability of various defects on the mask. The printability of defects and identification of their source from mask fabrication to handling were studied using wafer inspection. The printable blank defect density excluding particles and patterns is 0.63 cm{sup 2}. Mask inspection is shown to have better sensitivity than wafer inspection. The sensitivity of wafer inspection must be improved using through-focus analysis and a different wafer stack.

  19. Hydrogen-induced program threshold voltage degradation analysis in SONOS wafer

    Science.gov (United States)

    Lin, Qing; Zhao, Crystal; Sheng, Nan

    2016-02-01

    This paper studies the hydrogen-induced program state threshold voltage degradation in SONOS wafers, which ultimately impacts wafer sort test yield. During wafer sort step, all individual integrated circuits noted as die are tested for functional defects by applying special test patterns to them. The proportion between the passing die (good die) and the non-passing die (bad die) is sort yield. The different N2/H2 ratio in IMD1 alloy process yields differently at flash checkerboard test. And the SIMS curves were also obtained to depict the distribution profile of H+ in SONOS ONO stack structure. It is found that, the H+ accumulated in the interface between the Tunnel oxide and Si layer, contributes the charge loss in Oxynitride layer, which leads to the program threshold voltage degradation and even fall below lower specification limit, and then impacts the sort yield of SONOS wafers.

  20. HED-TIE: A wafer-scale approach for fabricating hybrid electronic devices with trench isolated electrodes

    Science.gov (United States)

    Banerjee, Sreetama; Bülz, Daniel; Solonenko, Dmytro; Reuter, Danny; Deibel, Carsten; Hiller, Karla; Zahn, Dietrich R. T.; Salvan, Georgeta

    2017-05-01

    Organic-inorganic hybrid electronic devices (HEDs) offer opportunities for functionalities that are not easily obtainable with either organic or inorganic materials individually. In the strive for down-scaling the channel length in planar geometry HEDs, the best results were achieved with electron beam lithography or nanoimprint lithography. Their application on the wafer level is, however, cost intensive and time consuming. Here, we propose trench isolated electrode (TIE) technology as a fast, cost effective, wafer-level approach for the fabrication of planar HEDs with electrode gaps in the range of 100 nm. We demonstrate that the formation of the organic channel can be realized by deposition from solution as well as by the thermal evaporation of organic molecules. To underline one key feature of planar HED-TIEs, namely full accessibility of the active area of the devices by external stimuli such as light, 6,13-bis (triisopropylsilylethynyl) (TIPS)-pentacene/Au HED-TIEs are successfully tested for possible application as hybrid photodetectors in the visible spectral range.

  1. Silicon wafer wettability and aging behaviors: Impact on gold thin-film morphology

    KAUST Repository

    Yang, Xiaoming

    2014-10-01

    This paper reports on the wettability and aging behaviors of the silicon wafers that had been cleaned using a piranha (3:1 mixture of sulfuric acid (H2SO4, 96%) and hydrogen peroxide (H2O 2, 30%), 120 °C), SC1 (1:1:5 mixture of NH4OH, H 2O2 and H2O, at 80°C) or HF solution (6 parts of 40% NH4F and 1 part of 49% HF, at room temperature) solution, and treated with gaseous plasma. The silicon wafers cleaned using the piranha or SC1 solution were hydrophilic, and the water contact angles on the surfaces would increase along with aging time, until they reached the saturated points of around 70°. The contact angle increase rate of these wafers in a vacuum was much faster than that in the open air, because of loss of water, which was physically adsorbed on the wafer surfaces. The silicon wafers cleaned with the HF solution were hydrophobic. Their contact angle decreased in the atmosphere, while it increased in the vacuum up to 95°. Gold thin films deposited on the hydrophilic wafers were smoother than that deposited on the hydrophobic wafers, because the numerous oxygen groups formed on the hydrophilic surfaces would react with gold adatoms in the sputtering process to form a continuous thin film at the nucleation stage. The argon, nitrogen, oxygen gas plasma treatments could change the silicon wafer surfaces from hydrophobic to hydrophilic by creating a thin (around 2.5 nm) silicon dioxide film, which could be utilized to improve the roughness and adhesion of the gold thin film. © 2014 Elsevier Ltd. All rights reserved.

  2. A 40 nm body-tied FinFET (OMEGA MOSFET) using bulk Si wafer

    Science.gov (United States)

    Park, Tai-su; Yoon, Euijoon; Lee, Jong-Ho

    2003-07-01

    A new body-tied FinFET is proposed and fabricated on bulk Si wafer instead of SOI wafer. Three-dimensional device simulations show the characteristics of the proposed device and show that it can be implemented without deteriorating short channel effect. An active fin width of 25- 40 nm and a gate length of 40 nm were realized by using sidewall spacer technology.

  3. Improved consumer properties of wafers using non-traditional raw materials

    OpenAIRE

    Лозовая, Татьяна Михайловна

    2014-01-01

    An urgent problem of increasing nutritional and biological value of wafers with fatty fillings, formulae of which include non-traditional raw materials is set forth, and some results of our studies are given. The main purpose of the research is to justify the possibility and feasibility of using natural non-traditional raw materials in the production of wafers. For these studies, organoleptic characteristics, nutritional value, amino acid, fatty acid, mineral and vitamin composition, clinical...

  4. Impact of laser treatment on phosphoric acid coated multicrystalline silicon PV-wafers

    OpenAIRE

    Geier, M.; Eberstein, M.; Grießmann, H.; Partsch, U.; Völkel, L.; Böhme, R; Mann, G.; Bonse, J.; Krüger, J

    2011-01-01

    The selective emitter is a well-known technology for producing highly doped areas under the metallization grid to improve the solar cell performance. In this work, the influence of laser irradiation on phosphoric acid coated multicrystalline silicon PV-wafers on the wafer surface structure, the phosphorous depth distribution and the electrical contact resistance within the laser treated area as well as the electrical series resistance of laserprocessed solar cells was evaluated. Different las...

  5. Lakes Ecosystem Services Download Package

    Data.gov (United States)

    U.S. Environmental Protection Agency — This data download package contains Esri 10.0 MXDs, file geodatabases and copy of this FGDC metadata record. The data in this package are used in support of the Lake...

  6. Food packaging history and innovations.

    Science.gov (United States)

    Risch, Sara J

    2009-09-23

    Food packaging has evolved from simply a container to hold food to something today that can play an active role in food quality. Many packages are still simply containers, but they have properties that have been developed to protect the food. These include barriers to oxygen, moisture, and flavors. Active packaging, or that which plays an active role in food quality, includes some microwave packaging as well as packaging that has absorbers built in to remove oxygen from the atmosphere surrounding the product or to provide antimicrobials to the surface of the food. Packaging has allowed access to many foods year-round that otherwise could not be preserved. It is interesting to note that some packages have actually allowed the creation of new categories in the supermarket. Examples include microwave popcorn and fresh-cut produce, which owe their existence to the unique packaging that has been developed.

  7. In vitro and in vivo evaluation of a sublingual fentanyl wafer formulation

    Science.gov (United States)

    Lim, Stephen CB; Paech, Michael J; Sunderland, Bruce; Liu, Yandi

    2013-01-01

    Background The objective of this study was to prepare a novel fentanyl wafer formulation by a freeze-drying method, and to evaluate its in vitro and in vivo release characteristics, including its bioavailability via the sublingual route. Methods The wafer formulation was prepared by freeze-drying an aqueous dispersion of fentanyl containing sodium carboxymethylcellulose and amylogum as matrix formers. Uniformity of weight, friability, and dissolution testing of the fentanyl wafer was achieved using standard methods, and the residual moisture content was measured. The fentanyl wafer was also examined using scanning electron microscopy and x-ray diffraction. The absolute bioavailability of the fentanyl wafer was evaluated in 11 opioid-naïve adult female patients using a randomized crossover design. Results In vitro release showed that almost 90% of the fentanyl dissolved in one minute. In vivo, the first detectable plasma fentanyl concentration was observed after 3.5 minutes and the peak plasma concentration between 61.5 and 67 minutes. The median absolute bioavailability was 53.0%. Conclusion These results indicate that this wafer has potential as an alternative sublingual fentanyl formulation. PMID:23596347

  8. The integration of InGaP LEDs with CMOS on 200 mm silicon wafers

    Science.gov (United States)

    Wang, Bing; Lee, Kwang Hong; Wang, Cong; Wang, Yue; Made, Riko I.; Sasangka, Wardhana Aji; Nguyen, Viet Cuong; Lee, Kenneth Eng Kian; Tan, Chuan Seng; Yoon, Soon Fatt; Fitzgerald, Eugene A.; Michel, Jurgen

    2017-02-01

    The integration of photonics and electronics on a converged silicon CMOS platform is a long pursuit goal for both academe and industry. We have been developing technologies that can integrate III-V compound semiconductors and CMOS circuits on 200 mm silicon wafers. As an example we present our work on the integration of InGaP light-emitting diodes (LEDs) with CMOS. The InGaP LEDs were epitaxially grown on high-quality GaAs and Ge buffers on 200 mm (100) silicon wafers in a MOCVD reactor. Strain engineering was applied to control the wafer bow that is induced by the mismatch of coefficients of thermal expansion between III-V films and silicon substrate. Wafer bonding was used to transfer the foundry-made silicon CMOS wafers to the InGaP LED wafers. Process trenches were opened on the CMOS layer to expose the underneath III-V device layers for LED processing. We show the issues encountered in the 200 mm processing and the methods we have been developing to overcome the problems.

  9. Anticounterfeit packaging technologies

    Directory of Open Access Journals (Sweden)

    Ruchir Y Shah

    2010-01-01

    Full Text Available Packaging is the coordinated system that encloses and protects the dosage form. Counterfeit drugs are the major cause of morbidity, mortality, and failure of public interest in the healthcare system. High price and well-known brands make the pharma market most vulnerable, which accounts for top priority cardiovascular, obesity, and antihyperlipidemic drugs and drugs like sildenafil. Packaging includes overt and covert technologies like barcodes, holograms, sealing tapes, and radio frequency identification devices to preserve the integrity of the pharmaceutical product. But till date all the available techniques are synthetic and although provide considerable protection against counterfeiting, have certain limitations which can be overcome by the application of natural approaches and utilization of the principles of nanotechnology.

  10. RH Packaging Program Guidance

    Energy Technology Data Exchange (ETDEWEB)

    Washington TRU Solutions, LLC

    2003-08-25

    The purpose of this program guidance document is to provide technical requirements for use, operation, inspection, and maintenance of the RH-TRU 72-B Waste Shipping Package and directly related components. This document complies with the requirements as specified in the RH-TRU 72-B Safety Analysis Report for Packaging (SARP), and Nuclear Regulatory Commission (NRC) Certificate of Compliance (C of C) 9212. If there is a conflict between this document and the SARP and/or C of C, the SARP and/or C of C shall govern. The C of C states: ''...each package must be prepared for shipment and operated in accordance with the procedures described in Chapter 7.0, ''Operating Procedures,'' of the application.'' It further states: ''...each package must be tested and maintained in accordance with the procedures described in Chapter 8.0, ''Acceptance Tests and Maintenance Program of the Application.'' Chapter 9.0 of the SARP tasks the Waste Isolation Pilot Plant (WIPP) Management and Operating (M&O) contractor with assuring the packaging is used in accordance with the requirements of the C of C. Because the packaging is NRC approved, users need to be familiar with 10 CFR {section} 71.11, ''Deliberate Misconduct.'' Any time a user suspects or has indications that the conditions of approval in the C of C were not met, the Carlsbad Field Office (CBFO) shall be notified immediately. CBFO will evaluate the issue and notify the NRC if required. This document details the instructions to be followed to operate, maintain, and test the RH-TRU 72-B packaging. This Program Guidance standardizes instructions for all users. Users shall follow these instructions. Following these instructions assures that operations are safe and meet the requirements of the SARP. This document is available on the Internet at: ttp://www.ws/library/t2omi/t2omi.htm. Users are responsible for ensuring they are using the current

  11. The Swarm Magnetometry Package

    DEFF Research Database (Denmark)

    Merayo, José M.G.; Jørgensen, John Leif; Friis-Christensen, Eigil

    2008-01-01

    The Swarm mission under the ESA's Living Planet Programme is planned for launch in 2010 and consists of a constellation of three satellites at LEO. The prime objective of Swarm is to measure the geomagnetic field with unprecedented accuracy in space and time. The magnetometry package consists of ...... of an extremely accurate and stable vector magnetometer, which is co-mounted in an optical bench together with a start tracker system to ensure mechanical stability of the measurements....

  12. Amdahl 470 Chip Package

    CERN Multimedia

    1975-01-01

    In the late 70s the larger IBM computers were water cooled. Amdahl, an IBM competitor, invented an air cooling technology for it's computers. His company worked hard, developing a computer that was faster and less expensive than the IBM System/360 mainframe computer systems. This object contains an actual Amdahl series 470 computer logic chip with an air cooling device mounted on top. The package leads and cooling tower are gold-plated.

  13. Aquaculture information package

    Energy Technology Data Exchange (ETDEWEB)

    Boyd, T.; Rafferty, K.

    1998-08-01

    This package of information is intended to provide background information to developers of geothermal aquaculture projects. The material is divided into eight sections and includes information on market and price information for typical species, aquaculture water quality issues, typical species culture information, pond heat loss calculations, an aquaculture glossary, regional and university aquaculture offices and state aquaculture permit requirements. A bibliography containing 68 references is also included.

  14. Conformal Thin Film Packaging for SiC Sensor Circuits in Harsh Environments

    Science.gov (United States)

    Scardelletti, Maximilian C.; Karnick, David A.; Ponchak, George E.; Zorman, Christian A.

    2011-01-01

    In this investigation sputtered silicon carbide annealed at 300 C for one hour is used as a conformal thin film package. A RF magnetron sputterer was used to deposit 500 nm silicon carbide films on gold metal structures on alumina wafers. To determine the reliability and resistance to immersion in harsh environments, samples were submerged in gold etchant for 24 hours, in BOE for 24 hours, and in an O2 plasma etch for one hour. The adhesion strength of the thin film was measured by a pull test before and after the chemical immersion, which indicated that the film has an adhesion strength better than 10(exp 8) N/m2; this is similar to the adhesion of the gold layer to the alumina wafer. MIM capacitors are used to determine the dielectric constant, which is dependent on the SiC anneal temperature. Finally, to demonstrate that the SiC, conformal, thin film may be used to package RF circuits and sensors, an LC resonator circuit was fabricated and tested with and without the conformal SiC thin film packaging. The results indicate that the SiC coating adds no appreciable degradation to the circuits RF performance. Index Terms Sputter, silicon carbide, MIM capacitors, LC resonators, gold etchants, BOE, O2 plasma

  15. Fully additive chip packaging: science or fiction?

    NARCIS (Netherlands)

    Oosterhuis, G.; Zon, C.M.B. van der; Maalderink, H.H.

    2011-01-01

    The current trend in IC packaging towards an ever increasing degree of integration, combined with a high level of production flexibility calls for novel approaches in manufacturing. To address these challenges in a flexible manufacturing setting, TNO investigated to what extend mask-less additive

  16. Packaging based on polymeric materials

    Directory of Open Access Journals (Sweden)

    Jovanović Slobodan M.

    2005-01-01

    Full Text Available In the past two years the consumption of common in the developed countries world wide (high tonnage polymers for packaging has approached a value of 50 wt.%. In the same period more than 50% of the packaging units on the world market were made of polymeric materials despite the fact that polymeric materials present 17 wt.% of all packaging materials. The basic properties of polymeric materials and their environmental and economical advantages, providing them such a position among packaging materials, are presented in this article. Recycling methods, as well as the development trends of polymeric packaging materials are also presented.

  17. Plutonium stabilization and packaging system

    Energy Technology Data Exchange (ETDEWEB)

    NONE

    1996-05-01

    This document describes the functional design of the Plutonium Stabilization and Packaging System (Pu SPS). The objective of this system is to stabilize and package plutonium metals and oxides of greater than 50% wt, as well as other selected isotopes, in accordance with the requirements of the DOE standard for safe storage of these materials for 50 years. This system will support completion of stabilization and packaging campaigns of the inventory at a number of affected sites before the year 2002. The package will be standard for all sites and will provide a minimum of two uncontaminated, organics free confinement barriers for the packaged material.

  18. An optical MEMS accelerometer fabricated using double-sided deep reactive ion etching on silicon-on-insulator wafer

    Science.gov (United States)

    Teo, Adrian J. T.; Li, Holden; Tan, Say Hwa; Yoon, Yong-Jin

    2017-06-01

    Optical MEMS devices provide fast detection, electromagnetic resilience and high sensitivity. Using this technology, an optical gratings based accelerometer design concept was developed for seismic motion detection purposes that provides miniaturization, high manufacturability, low costs and high sensitivity. Detailed in-house fabrication procedures of a double-sided deep reactive ion etching (DRIE) on a silicon-on-insulator (SOI) wafer for a micro opto electro mechanical system (MOEMS) device are presented and discussed. Experimental results obtained show that the conceptual device successfully captured motion similar to a commercial accelerometer with an average sensitivity of 13.6 mV G-1, and a highest recorded sensitivity of 44.1 mV G-1. A noise level of 13.5 mV was detected due to experimental setup limitations. This is the first MOEMS accelerometer developed using double-sided DRIE on SOI wafer for the application of seismic motion detection, and is a breakthrough technology platform to open up options for lower cost MOEMS devices.

  19. Thermo-mechanical model optimization of HB-LED packaging

    NARCIS (Netherlands)

    Yuan, C.A.; Erinc, M.; Gielen, A.W.J.; Waal, A. van der; Driel, W. van; Zhang, K.

    2011-01-01

    Lighting is an advancing phenomenon both on the technology and on the market level due to the rapid development of the solid state lighting technology. The efforts in improving the efficacy of high brightness LED's (HB-LED) have concentrated on the packaging architecture. Packaging plays a

  20. Integrating a neonatal healthcare package for Malawi (IMCHA ...

    International Development Research Centre (IDRC) Digital Library (Canada)

    Many life-saving interventions have been successful in Malawi but they have not been scaled up into routine clinical practice. This project will determine whether a package of neonatal interventions, known as the Malawi Neonatal Package of Care, can be implemented at the health facility level to reduce neonatal mortality.

  1. High-mobility three-atom-thick semiconducting films with wafer-scale homogeneity.

    Science.gov (United States)

    Kang, Kibum; Xie, Saien; Huang, Lujie; Han, Yimo; Huang, Pinshane Y; Mak, Kin Fai; Kim, Cheol-Joo; Muller, David; Park, Jiwoong

    2015-04-30

    The large-scale growth of semiconducting thin films forms the basis of modern electronics and optoelectronics. A decrease in film thickness to the ultimate limit of the atomic, sub-nanometre length scale, a difficult limit for traditional semiconductors (such as Si and GaAs), would bring wide benefits for applications in ultrathin and flexible electronics, photovoltaics and display technology. For this, transition-metal dichalcogenides (TMDs), which can form stable three-atom-thick monolayers, provide ideal semiconducting materials with high electrical carrier mobility, and their large-scale growth on insulating substrates would enable the batch fabrication of atomically thin high-performance transistors and photodetectors on a technologically relevant scale without film transfer. In addition, their unique electronic band structures provide novel ways of enhancing the functionalities of such devices, including the large excitonic effect, bandgap modulation, indirect-to-direct bandgap transition, piezoelectricity and valleytronics. However, the large-scale growth of monolayer TMD films with spatial homogeneity and high electrical performance remains an unsolved challenge. Here we report the preparation of high-mobility 4-inch wafer-scale films of monolayer molybdenum disulphide (MoS2) and tungsten disulphide, grown directly on insulating SiO2 substrates, with excellent spatial homogeneity over the entire films. They are grown with a newly developed, metal-organic chemical vapour deposition technique, and show high electrical performance, including an electron mobility of 30 cm(2) V(-1) s(-1) at room temperature and 114 cm(2) V(-1) s(-1) at 90 K for MoS2, with little dependence on position or channel length. With the use of these films we successfully demonstrate the wafer-scale batch fabrication of high-performance monolayer MoS2 field-effect transistors with a 99% device yield and the multi-level fabrication of vertically stacked transistor devices for three

  2. White LED with High Package Extraction Efficiency

    Energy Technology Data Exchange (ETDEWEB)

    Yi Zheng; Matthew Stough

    2008-09-30

    generated in the package may cause a deterioration of encapsulant materials, affecting the performance of both the LED die and phosphor, leading to a decrease in the luminous efficacy over lifetime. Recent studies from research groups at Rensselaer Polytechnic Institute found that, under the condition to obtain a white light, about 40% of the light is transmitted outward of the phosphor layer and 60% of the light is reflected inward.1,2 It is claimed that using scattered photon extraction (SPE) technique, luminous efficacy is increased by 60%. In this project, a transparent/translucent monolithic phosphor was used to replace the powdered phosphor layer. In the normal pcLED package, the powdered phosphor is mixed with silicone either to be deposited on the top of LED die forming a chip level conversion (CLC) white LED or to be casted in the package forming a volume conversion white LED. In the monolithic phosphors there are no phosphor powder/silicone interfaces so it can reduce the light scattering caused by phosphor particles. Additionally, a multi-layer thin film selectively reflecting filter is inserted in the white LED package between the blue LED die and phosphor layer. It will selectively transmit the blue light from the LED die and reflect the phosphor's yellow inward emission outward. The two technologies try to recover backward light to the outward direction in the pcLED package thereby improving the package extraction efficiency.

  3. SUSTAINABLE PACKAGING SOLUTIONS FOR ORGANIC FRESH BERRIES

    Directory of Open Access Journals (Sweden)

    Elisabeta Elena TĂNASE

    2017-12-01

    Full Text Available Climate changes and particularly global warming are topics carefully treated by specialists already since decades. The most pregnant factor that influences climate change is pollution, namely the high level carbon dioxide emissions. Besides other substances used by the most of the industries (oil, charcoal, fertilizers, etc., plastics are not to be ignored when talking about pollution. Plastic waste affects animals and humans, as well as their habitat. In this respect, food industry engages in preserving the good functioning of the environment by developing and using biodegradable and bio-based resources for food packaging. The aim of this literature review was to identify the optimal sustainable packaging solution used for berries. The results of the study pointed out that the most used environmentally friendly packaging technique is the one that involves modified atmosphere. In terms of packaging materials, the literature is limited when it comes to biodegradable/bio-based solutions. However, active packaging gains popularity among researchers, considering the endless possibilities to include sustainable compounds in a biopolymer based matrix, in order to prolong the shelf-life of berries or fruits in general.

  4. STATISTICAL PROCESS CONTROL IN SERBIAN FOOD PACKAGING

    Directory of Open Access Journals (Sweden)

    Djekic Ilija

    2014-09-01

    Full Text Available This paper gives an overview of the food packaging process in seven food companies in the dairy and confectionery sector. A total of 23 production runs have been analyzed regarding the three packers' rules outlined in the Serbian legislation and process capability tests related to statistical process control. None of the companies had any type of statistical process control in place. Results confirmed that more companies show overweight packaging compared to underfilling. Production runs are more accurate than precise, although in some cases the productions are both inaccurate and imprecise. Education / training of the new generation of food industry workers (both on operational and managerial level with courses in the food area covering elements of quality assurance and statistical process control can help in implementing effective food packaging.

  5. In vitro and in vivo evaluation of a sublingual fentanyl wafer formulation

    Directory of Open Access Journals (Sweden)

    Lim SCB

    2013-04-01

    Full Text Available Stephen CB Lim,1,3 Michael J Paech,2 Bruce Sunderland,3 Yandi Liu3 1Pharmacy Department, Armadale Health Service, Armadale, 2School of Medicine and Pharmacology, University of Western Australia, and Department of Anaesthesia and Pain Medicine, King Edward Memorial Hospital for Women, Subiaco, 3School of Pharmacy, Curtin Health Innovation Research Institute, Curtin University, Perth, WA, Australia Background: The objective of this study was to prepare a novel fentanyl wafer formulation by a freeze-drying method, and to evaluate its in vitro and in vivo release characteristics, including its bioavailability via the sublingual route. Methods: The wafer formulation was prepared by freeze-drying an aqueous dispersion of fentanyl containing sodium carboxymethylcellulose and amylogum as matrix formers. Uniformity of weight, friability, and dissolution testing of the fentanyl wafer was achieved using standard methods, and the residual moisture content was measured. The fentanyl wafer was also examined using scanning electron microscopy and x-ray diffraction. The absolute bioavailability of the fentanyl wafer was evaluated in 11 opioid-naïve adult female patients using a randomized crossover design. Results: In vitro release showed that almost 90% of the fentanyl dissolved in one minute. In vivo, the first detectable plasma fentanyl concentration was observed after 3.5 minutes and the peak plasma concentration between 61.5 and 67 minutes. The median absolute bioavailability was 53.0%. Conclusion: These results indicate that this wafer has potential as an alternative sublingual fentanyl formulation. Keywords: absolute bioavailability, fentanyl wafer, in vitro dissolution, in vivo study, pharmacokinetics, sublingual

  6. Cascading wafer-scale integrated graphene complementary inverters under ambient conditions.

    Science.gov (United States)

    Rizzi, Laura Giorgia; Bianchi, Massimiliano; Behnam, Ashkan; Carrion, Enrique; Guerriero, Erica; Polloni, Laura; Pop, Eric; Sordan, Roman

    2012-08-08

    The fundamental building blocks of digital electronics are logic gates which must be capable of cascading such that more complex logic functions can be realized. Here we demonstrate integrated graphene complementary inverters which operate with the same input and output voltage logic levels, thus allowing cascading. We obtain signal matching under ambient conditions with inverters fabricated from wafer-scale graphene grown by chemical vapor deposition (CVD). Monolayer graphene was incorporated in self-aligned field-effect transistors in which the top gate overlaps with the source and drain contacts. This results in full-channel gating and leads to the highest low-frequency voltage gain reported so far in top-gated CVD graphene devices operating in air ambient, A(v) ∼ -5. Such gain enabled logic inverters with the same voltage swing of 0.56 V at their input and output. Graphene inverters could find their way in realistic applications where high-speed operation is desired but power dissipation is not a concern, similar to emitter-coupled logic.

  7. Behavior of piezoelectric wafer active sensor in various media

    Science.gov (United States)

    Kamas, Tuncay

    The dissertation addresses structural health monitoring (SHM) techniques using ultrasonic waves generated by piezoelectric wafer active sensors (PWAS) with an emphasis on the development of theoretical models of standing harmonic waves and guided waves. The focal objective of the research is to extend the theoretical study of electro-mechanical coupled PWAS as a resonator/transducer that interacts with standing and traveling waves in various media through electro-mechanical impedance spectroscopy (EMIS) method and guided wave propagation. The analytical models are developed and the coupled field finite element analysis (CF-FEA) models are simulated and verified with experiments. The dissertation is divided into two parts with respect to the developments in EMIS methods and GWP methods. In the first part, analytical and finite element models have been developed for the simulation of PWAS-EMIS in in-plane (longitudinal) and out-of-plane (thickness) mode. Temperature effects on free PWAS-EMIS are also discussed with respect to the in-plane mode. Piezoelectric material degradation on certain electrical and mechanical properties as the temperature increases is simulated by our analytical model for in-plane circular PWAS-EMIS that agrees well with the sets of experiments. Then the thickness mode PWAS-EMIS model was further developed for a PWAS resonator bonded on a plate-like structure. The latter analytical model was to determine the resonance frequencies for the normal mode expansion method through the global matrix method by considering PWAS-substrate and proof mass-PWAS-substrate models. The proof mass concept was adapted to shift the systems resonance frequencies in thickness mode. PWAS in contact with liquid medium on one of its surface has been analytically modeled and simulated the electro-mechanical response of PWAS with various liquids with different material properties such as the density and the viscosity. The second part discusses the guided wave propagation

  8. Si-based multilayered print circuit board for MEMS packaging fabricated by Si deep etching, bonding, and vacuum metal casting

    Science.gov (United States)

    Murakoshi, Yoichi; Hanada, Kotaro; Li, Yaomin; Uchino, Kazuyoshi; Suzuki, Takaaki; Maeda, Ryutaro

    2001-11-01

    In our previous works, metal injection technique into small diameter (10 -100micrometers ) through holes was developed and applied for fabrication of Si based print circuit board. In the present work, we present the metal filling technology by vacuum casting into 3 dimensional through holes and trenches structure fabricated in stacked layered Si wafers prepared by fusion bonding of ICP etched Si wafers. Metal electrical feed through was successfully prepared by the method. Conventional print circuit boards have been fabricated with Epoxy resin based materials. In recent years Si is regarded as a candidate for next generation materials for print circuit board substrates, as the substrate whose thermal elongation same as the mounted chips is an ideal solution to residual stress problems in the elevated temperature application. In this report, we developed the double sided mountable stacked circuit board using Si deep etching technology and fusion bonding. This technology is expected to lead to the realization of the assembling of sensors, actuators and ICs, i.e. 3 dimensional MEMS packaging. In this report, we adopted micromachining technology to this application area and the special emphasis is placed on the low cost and reliable process development. The detailed items to be developed are shown as follows; 1) Development of Si wafer through holes penetration and trench formation by ICP etching. 2) Alignment and bonding of micromachined wafers. 3) Development of insulating layer with oxidation. 4) Development of formation of electrical feed through for stacked layers.

  9. Packaging - Materials review

    Science.gov (United States)

    Herrmann, Matthias

    2014-06-01

    Nowadays, a large number of different electrochemical energy storage systems are known. In the last two decades the development was strongly driven by a continuously growing market of portable electronic devices (e.g. cellular phones, lap top computers, camcorders, cameras, tools). Current intensive efforts are under way to develop systems for automotive industry within the framework of electrically propelled mobility (e.g. hybrid electric vehicles, plug-in hybrid electric vehicles, full electric vehicles) and also for the energy storage market (e.g. electrical grid stability, renewable energies). Besides the different systems (cell chemistries), electrochemical cells and batteries were developed and are offered in many shapes, sizes and designs, in order to meet performance and design requirements of the widespread applications. Proper packaging is thereby one important technological step for designing optimum, reliable and safe batteries for operation. In this contribution, current packaging approaches of cells and batteries together with the corresponding materials are discussed. The focus is laid on rechargeable systems for industrial applications (i.e. alkaline systems, lithium-ion, lead-acid). In principle, four different cell types (shapes) can be identified - button, cylindrical, prismatic and pouch. Cell size can be either in accordance with international (e.g. International Electrotechnical Commission, IEC) or other standards or can meet application-specific dimensions. Since cell housing or container, terminals and, if necessary, safety installations as inactive (non-reactive) materials reduce energy density of the battery, the development of low-weight packages is a challenging task. In addition to that, other requirements have to be fulfilled: mechanical stability and durability, sealing (e.g. high permeation barrier against humidity for lithium-ion technology), high packing efficiency, possible installation of safety devices (current interrupt device

  10. Printing systems for MEMS packaging

    Science.gov (United States)

    Hayes, Donald J.; Cox, Weldon R.; Wallace, David B.

    2001-10-01

    Ink-jet printing technology is, in many ways, ideally suited for addressing a number of these MEMS device packaging challenges. The general advantages of this form of microdispensing derive from the incorporation of data-driven, non-contact processes which enable precise, picoliter-level volumes of material to be deposited with high accuracy and speed at target sites, even on non-planar surfaces. Being data-driven, microjet printing is a highly flexible and automated process which may readily be incorporated into manufacturing lines. It does not require application-specific tooling such as photomasks or screens, and, as an additive process with no chemical waste, it is environmentally friendly. In short, the advantages obtainable with incorporation of micro-jet printing technology in many fabrication applications range from increased process capability, integration and automation to reduced manufacturing costs.

  11. Safety Analysis Report for packaging (onsite) steel waste package

    Energy Technology Data Exchange (ETDEWEB)

    BOEHNKE, W.M.

    2000-07-13

    The steel waste package is used primarily for the shipment of remote-handled radioactive waste from the 324 Building to the 200 Area for interim storage. The steel waste package is authorized for shipment of transuranic isotopes. The maximum allowable radioactive material that is authorized is 500,000 Ci. This exceeds the highway route controlled quantity (3,000 A{sub 2}s) and is a type B packaging.

  12. Should We Analyze for Trace Metal Contamination at the Edge, Bevel, and Edge Exclusion of Wafers?

    Science.gov (United States)

    Beebe, Meredith; Sparks, Chris; Carpio, Ron

    2003-09-01

    The edge, bevel, and edge exclusion area of a wafer has historically been difficult to monitor for trace metals. Standard trace metal surface techniques such as total reflection x-ray fluorescence spectroscopy, time-of-flight secondary ion mass spectrometry, and vapor phase decomposition inductively coupled plasma are currently not capable or have difficulty measuring metals to the edge and bevel of the wafer. With shared metrology toolsets and new materials being introduced into semiconductor fabs, it is important to measure possible contamination in these areas of the wafer. Tools that have edge grip pins or centering and aligning pins, also are at risk to contaminate wafers at the edge and bevel. A technique had been developed known as the beveled edge analysis tool that chemically extracts contamination from the edge, bevel and edge exclusion of a wafer that is then quantified by inductively coupled plasma mass spectrometry. In this study we will show correlation of this technique to standard trace element analysis methods. We will also present data from characterizing processes and fab tools that will benefit from this measurement.

  13. A combined fiber optic digital shearography and holography system for defect inspection in Si-wafers

    Science.gov (United States)

    Udupa, Ganesha; Wang, Jun; Ngoi, Bryan K. A.

    2005-04-01

    The present work relates to surface and/or subsurface defects inspection system for semiconductor industries and particularly to an inspection system for a defect such as swirl defects and particles in an unpolished silicon wafer before the wafer fabrication process by a combined fiber optic digital shearography and holography technique. The dual purpose camera described in this paper gives the possibility of using either digital shearography or holography (DSPI) techniques depending on application needs. The sub-surface defects in a wafer normally create strain concentrations subjected to loading (stressing) which are translated into anomalies in the fringe pattern. A real time technique with the use of Lab view Express 7 software is developed to detect defects in Si-wafer with the application of thermal oading as a stressing method. The results obtained by applying a real time fiber optic shearography technique are described in this paper. The method described here relates specifically to semiconductor wafers, but may be generalized to any other samples.

  14. Gated Silicon Drift Detector Fabricated from a Low-Cost Silicon Wafer

    Directory of Open Access Journals (Sweden)

    Hideharu Matsuura

    2015-05-01

    Full Text Available Inexpensive high-resolution silicon (Si X-ray detectors are required for on-site surveys of traces of hazardous elements in food and soil by measuring the energies and counts of X-ray fluorescence photons radially emitted from these elements. Gated silicon drift detectors (GSDDs are much cheaper to fabricate than commercial silicon drift detectors (SDDs. However, previous GSDDs were fabricated from \\(10\\-k\\(\\Omega \\cdot\\cm Si wafers, which are more expensive than \\(2\\-k\\(\\Omega \\cdot\\cm Si wafers used in commercial SDDs. To fabricate cheaper portable X-ray fluorescence instruments, we investigate GSDDs formed from \\(2\\-k\\(\\Omega \\cdot\\cm Si wafers. The thicknesses of commercial SDDs are up to \\(0.5\\ mm, which can detect photons with energies up to \\(27\\ keV, whereas we describe GSDDs that can detect photons with energies of up to \\(35\\ keV. We simulate the electric potential distributions in GSDDs with Si thicknesses of \\(0.5\\ and \\(1\\ mm at a single high reverse bias. GSDDs with one gate pattern using any resistivity Si wafer can work well for changing the reverse bias that is inversely proportional to the resistivity of the Si wafer.

  15. Gated silicon drift detector fabricated from a low-cost silicon wafer.

    Science.gov (United States)

    Matsuura, Hideharu; Sakurai, Shungo; Oda, Yuya; Fukushima, Shinya; Ishikawa, Shohei; Takeshita, Akinobu; Hidaka, Atsuki

    2015-05-22

    Inexpensive high-resolution silicon (Si) X-ray detectors are required for on-site surveys of traces of hazardous elements in food and soil by measuring the energies and counts of X-ray fluorescence photons radially emitted from these elements. Gated silicon drift detectors (GSDDs) are much cheaper to fabricate than commercial silicon drift detectors (SDDs). However, previous GSDDs were fabricated from 10-kΩ·cm Si wafers, which are more expensive than 2-kΩ·cm Si wafers used in commercial SDDs. To fabricate cheaper portable X-ray fluorescence instruments, we investigate GSDDs formed from 2-kΩ·cm Si wafers. The thicknesses of commercial SDDs are up to 0.5 mm, which can detect photons with energies up to 27 keV, whereas we describe GSDDs that can detect photons with energies of up to 35 keV. We simulate the electric potential distributions in GSDDs with Si thicknesses of 0.5 and 1 mm at a single high reverse bias. GSDDs with one gate pattern using any resistivity Si wafer can work well for changing the reverse bias that is inversely proportional to the resistivity of the Si wafer.

  16. Microwave ECR plasma electron flood for low pressure wafer charge neutralization

    Energy Technology Data Exchange (ETDEWEB)

    Vanderberg, Bo; Nakatsugawa, Tomoya; Divergilio, William [Axcelis Technologies Inc., 108 Cherry Hill Drive, Beverly, MA 01915 (United States)

    2012-11-06

    Modern ion implanters typically use dc arc discharge Plasma Electron Floods (PEFs) to neutralize wafer charge. The arc discharge requires using at least some refractory metal hardware, e.g. a thermionically emitting filament, which can be undesirable in applications where no metallic contamination is critical. rf discharge PEFs have been proposed to mitigate contamination risks but the gas flows required can result in high process chamber pressures. Axcelis has developed a microwave electron cyclotron resonance (ECR) PEF to provide refractory metals contamination-free wafer neutralization with low gas flow requirement. Our PEF uses a custom, reentrant cusp magnet field providing ECR and superior electron confinement. Stable PEF operation with extraction slits sized for 300 mm wafers can be attained at Xe gas flows lower than 0.2 sccm. Electron extraction currents can be as high as 20 mA at absorbed microwave powers < 70 W. On Axcelis' new medium current implanter, plasma generation has proven robust against pressure transients caused by, for example, photoresist outgassing by high power ion beams. Charge monitor and floating potential measurements along the wafer surface corroborate adequate wafer charge neutralization for low energy, high current ion beams.

  17. Thermal effect induced wafer deformation in high-energy e-beam lithography

    Science.gov (United States)

    Chen, P. S.; Wang, W. C.; Lin, S. J.

    2015-03-01

    The incident surface power density in Massive Electron-beam Direct Write (MEBDW) during exposure is ~105 W/cm2, much higher than ~8 W/cm2 ArF scanners and 2.4 W/cm2 EUV. In addition, the wafer's exposure in vacuum environment makes energy dissipation even harder. This thermal effect can cause mechanical distortion of the wafer during exposure and have has a direct influence on pattern placement error and image blur. In this paper, the thermo mechanical distortions caused by wafer heating for MEB system of different electron acceleration voltages have been simulated with finite element method (FEM). The global thermal effect affected by the friction force between the wafer and the wafer chuck as well as different thermal conductivities of the chuck material are simulated. Furthermore, the thermal effects of different lithography systems such as EUV scanners and conventional optical scanners are compared. The thermal effects of MEBDW systems are shown to be acceptable.

  18. Rapid, Non-Contact Method for Measurement of Si-Wafer Thickness: Principles and Preliminary Results; Preprint

    Energy Technology Data Exchange (ETDEWEB)

    Sopori, B.; Auriemma, C.; Li, C.; Madjdpour, J.

    2003-08-01

    The thickness of a semiconductor wafer can critically influence mechanical and/or electronic yield of the device(s) fabricated on it. For most microelectronic (surface) devices, the thickness of a wafer is important primarily for mechanical reasons--to provide control and stability of devices by minimizing stresses resulting from various device-fabrication processes. However, for minority-carrier devices, such as solar cells, the entire thickness of the wafer participates in the optical and electronic performance of the device. In either case, control of wafer thickness through careful measurement is a fundamental requirement in the commercial fabrication of electronic devices.

  19. CH Packaging Operations Manual

    Energy Technology Data Exchange (ETDEWEB)

    None, None

    2008-09-11

    This document provides the user with instructions for assembling a payload. All the steps in Subsections 1.2, Preparing 55-Gallon Drum Payload Assembly; 1.3, Preparing "Short" 85-Gallon Drum Payload Assembly (TRUPACT-II and HalfPACT); 1.4, Preparing "Tall" 85-gallon Drum Payload Assembly (HalfPACT only); 1.5, Preparing 100-Gallon Drum Payload Assembly; 1.6, Preparing SWB Payload Assembly; and 1.7, Preparing TDOP Payload Assembly, must be completed, but may be performed in any order as long as radiological control steps are not bypassed. Transport trailer operations, package loading and unloading from transport trailers, hoisting and rigging activities such as ACGLF operations, equipment checkout and shutdown, and component inspection activities must be performed, but may be performed in any order and in parallel with other activities as long as radiological control steps are not bypassed. Steps involving OCA/ICV lid removal/installation and payload removal/loading may be performed in parallel if there are multiple operators working on the same packaging. Steps involving removal/installation of OCV/ICV upper and lower main O-rings must be performed in sequence.

  20. CH Packaging Operations Manual

    Energy Technology Data Exchange (ETDEWEB)

    None, None

    2009-05-27

    This document provides the user with instructions for assembling a payload. All the steps in Subsections 1.2, Preparing 55-Gallon Drum Payload Assembly; 1.3, Preparing "Short" 85-Gallon Drum Payload Assembly (TRUPACT-II and HalfPACT); 1.4, Preparing "Tall" 85-Gallon Drum Payload Assembly (HalfPACT only); 1.5, Preparing 100-Gallon Drum Payload Assembly; 1.6, Preparing Shielded Container Payload Assembly; 1.7, Preparing SWB Payload Assembly; and 1.8, Preparing TDOP Payload Assembly, must be completed, but may be performed in any order as long as radiological control steps are not bypassed. Transport trailer operations, package loading and unloading from transport trailers, hoisting and rigging activities such as ACGLF operations, equipment checkout and shutdown, and component inspection activities must be performed, but may be performed in any order and in parallel with other activities as long as radiological control steps are not bypassed. Steps involving OCA/ICV lid removal/installation and payload removal/loading may be performed in parallel if there are multiple operators working on the same packaging. Steps involving removal/installation of OCV/ICV upper and lower main O-rings must be performed in sequence, except as noted.

  1. Biodegradable packaging materials : case: PLA

    OpenAIRE

    Jama, Mohamed

    2017-01-01

    The main aim of this bachelor thesis was to investigate the possibility of biodegradable packaging materials. Plastics and other non-degradable packaging materials have been used for many years and they have a negative impact on the environment since they do not degrade. Different research methods are used to get authentic results, which simplifies using biodegradable packaging materials. There were two biodegradability testing methods, which has been applied to this task:-, testing biode...

  2. Finely tunable laser based on a bulk silicon wafer for gas sensing applications

    Science.gov (United States)

    Gallegos-Arellano, E.; Vargas-Rodriguez, E.; Guzman-Chavez, A. D.; Cano-Contreras, M.; Cruz, J. L.; Raja-Ibrahim, R. K.

    2016-06-01

    In this work a very simple continuously tunable laser based on an erbium ring cavity and a silicon wafer is presented. This laser can be tuned with very fine steps, which is a compulsory characteristic for gas sensing applications. Moreover the laser is free of mode hopping within a spectral range sufficiently wide to match one of the ro-vibrational lines of a target molecule. Here the proposed laser reached, at ~1530 nm, a continuous tuning range of around 950 pm (>100 GHz) before mode hopping occurred, when a silicon wafer of 355 μm thickness was used. Additionally, the laser can be finely tuned with small tuning steps of  acetylene in which the mean separation between two ro-vibrational lines is around 600 pm. Finally, it is shown that the tuning range can be modified by using wafers with different thickness.

  3. An electron-multiplying "Micromegas" grid made in silicon wafer post-processing technology

    CERN Document Server

    Chefdeville, M; Giomataris, Ioanis; van der Graaf, H; Heijne, Erik H M; Van der Putten, S; Salm, C; Schmitz, J; Smits, S; Timmermans, J; Visschers, J L

    2006-01-01

    A technology for manufacturing an aluminium grid onto a silicon wafer has been developed. The grid is fixed parallel and precisely to the wafer (anode) surface at a distance of 50 \\mum by means of insulating pillars. When some 400 V are applied between the grid and (anode) wafer, gas multiplication occurs : primary electrons from the drift space above the grid enter the holes and cause electron avalanches in the high-field region between the grid and the anode. Production and operational characteristics of the device are described. With this newly developed technology, CMOS (pixel) readout chips can be covered with a gas multiplication grid. Such a chip forms, together with the grid, an integrated device which can be applied as readout in a wide field of gaseous detectors.

  4. Feature profile evolution in plasma processing using on-wafer monitoring system

    CERN Document Server

    Samukawa, Seiji

    2014-01-01

    This book provides for the first time a good understanding of the etching profile technologies that do not disturb the plasma. Three types of sensors are introduced: on-wafer UV sensors, on-wafer charge-up sensors and on-wafer sheath-shape sensors in the plasma processing and prediction system of real etching profiles based on monitoring data. Readers are made familiar with these sensors, which can measure real plasma process surface conditions such as defect generations due to UV-irradiation, ion flight direction due to charge-up voltage in high-aspect ratio structures and ion sheath conditions at the plasma/surface interface. The plasma etching profile realistically predicted by a computer simulation based on output data from these sensors is described.

  5. Efficiency Improvement of HIT Solar Cells on p-Type Si Wafers

    Directory of Open Access Journals (Sweden)

    Chun-You Wei

    2013-11-01

    Full Text Available Single crystal silicon solar cells are still predominant in the market due to the abundance of silicon on earth and their acceptable efficiency. Different solar-cell structures of single crystalline Si have been investigated to boost efficiency; the heterojunction with intrinsic thin layer (HIT structure is currently the leading technology. The record efficiency values of state-of-the art HIT solar cells have always been based on n-type single-crystalline Si wafers. Improving the efficiency of cells based on p-type single-crystalline Si wafers could provide broader options for the development of HIT solar cells. In this study, we varied the thickness of intrinsic hydrogenated amorphous Si layer to improve the efficiency of HIT solar cells on p-type Si wafers.

  6. Three-Stage Tracking Control for the LED Wafer Transporting Robot

    Directory of Open Access Journals (Sweden)

    Zuoxun Wang

    2015-01-01

    Full Text Available In order to ensure the steady ability of the LED wafer transporting robot, a high order polynomial interpolation method is proposed to plan the motion process of the LED wafer transporting robot. According to the LED wafer transporting robot which is fast and has no vibration, fifth-order polynomial is applied to complete the robot’s motion planning. A new subsection search method is proposed to optimize the transporting robot’s acceleration. Optimal planning curve is achieved by the subsection searching. Extended Kalman filter algorithm and PID algorithm are employed to follow the tracks of planned path. MATLAB simulation and experiment confirm the validity and efficiency of the proposed method.

  7. About the ZOOM minimization package

    Energy Technology Data Exchange (ETDEWEB)

    Fischler, M.; Sachs, D.; /Fermilab

    2004-11-01

    A new object-oriented Minimization package is available for distribution in the same manner as CLHEP. This package, designed for use in HEP applications, has all the capabilities of Minuit, but is a re-write from scratch, adhering to modern C++ design principles. A primary goal of this package is extensibility in several directions, so that its capabilities can be kept fresh with as little maintenance effort as possible. This package is distinguished by the priority that was assigned to C++ design issues, and the focus on producing an extensible system that will resist becoming obsolete.

  8. Neural Implants, Packaging for Biocompatible Implants, and Improving Fabricated Capacitors

    Science.gov (United States)

    Agger, Elizabeth Rose

    We have completed the circuit design and packaging procedure for an NIH-funded neural implant, called a MOTE (Microscale Optoelectronically Transduced Electrode). Neural recording implants for mice have greatly advanced neuroscience, but they are often damaging and limited in their recording location. This project will result in free-floating implants that cause less damage, provide rapid electronic recording, and increase range of recording across the cortex. A low-power silicon IC containing amplification and digitization sub-circuits is powered by a dual-function gallium arsenide photovoltaic and LED. Through thin film deposition, photolithography, and chemical and physical etching, the Molnar Group and the McEuen Group (Applied and Engineering Physics department) will package the IC and LED into a biocompatible implant approximately 100microm3. The IC and LED are complete and we have begun refining this packaging procedure in the Cornell NanoScale Science & Technology Facility. ICs with 3D time-resolved imaging capabilities can image microorganisms and other biological samples given proper packaging. A portable, flat, easily manufactured package would enable scientists to place biological samples on slides directly above the Molnar group's imaging chip. We have developed a packaging procedure using laser cutting, photolithography, epoxies, and metal deposition. Using a flip-chip method, we verified the process by aligning and adhering a sample chip to a holder wafer. In the CNF, we have worked on a long-term metal-insulator-metal (MIM) capacitor characterization project. Former Fellow and continuing CNF user Kwame Amponsah developed the original procedure for the capacitor fabrication, and another former fellow, Jonilyn Longenecker, revised the procedure and began the arduous process of characterization. MIM caps are useful to clean room users as testing devices to verify electronic characteristics of their active circuitry. This project's objective is to

  9. Aerial image measurement technique for automated reticle defect disposition (ARDD) in wafer fabs

    Science.gov (United States)

    Zibold, Axel M.; Schmid, Rainer M.; Stegemann, B.; Scheruebl, Thomas; Harnisch, Wolfgang; Kobiyama, Yuji

    2004-08-01

    The Aerial Image Measurement System (AIMS)* for 193 nm lithography emulation has been brought into operation successfully worldwide. A second generation system comprising 193 nm AIMS capability, mini-environment and SMIF, the AIMS fab 193 plus is currently introduced into the market. By adjustment of numerical aperture (NA), illumination type and partial illumination coherence to match the conditions in 193 nm steppers or scanners, it can emulate the exposure tool for any type of reticles like binary, OPC and PSM down to the 65 nm node. The system allows a rapid prediction of wafer printability of defects or defect repairs, and critical features, like dense patterns or contacts on the masks without the need to perform expensive image qualification consisting of test wafer exposures followed by SEM measurements. Therefore, AIMS is a mask quality verification standard for high-end photo masks and established in mask shops worldwide. The progress on the AIMS technology described in this paper will highlight that besides mask shops there will be a very beneficial use of the AIMS in the wafer fab and we propose an Automated Reticle Defect Disposition (ARDD) process. With smaller nodes, where design rules are 65 nm or less, it is expected that smaller defects on reticles will occur in increasing numbers in the wafer fab. These smaller mask defects will matter more and more and become a serious yield limiting factor. With increasing mask prices and increasing number of defects and severability on reticles it will become cost beneficial to perform defect disposition on the reticles in wafer production. Currently ongoing studies demonstrate AIMS benefits for wafer fab applications. An outlook will be given for extension of 193 nm aerial imaging down to the 45 nm node based on emulation of immersion scanners.

  10. The LISA Technology Package

    Science.gov (United States)

    Livas, Jeff

    2009-01-01

    The LISA Technology Package (LTP) is the payload of the European Space Agency's LISA Pathfinder mission. LISA Pathfinder was instigated to test, in a flight environment, the critical technologies required by LISA; namely, the inertial sensing subsystem and associated control laws and micro-Newton thrusters required to place a macroscopic test mass in pure free-fall. The UP is in the late stages of development -- all subsystems are currently either in the final stages of manufacture or in test. Available flight units are being integrated into the real-time testbeds for system verification tests. This poster will describe the UP and its subsystems, give the current status of the hardware and test campaign, and outline the future milestones leading to the UP delivery.

  11. Tritium waste package

    Science.gov (United States)

    Rossmassler, Rich; Ciebiera, Lloyd; Tulipano, Francis J.; Vinson, Sylvester; Walters, R. Thomas

    1995-01-01

    A containment and waste package system for processing and shipping tritium xide waste received from a process gas includes an outer drum and an inner drum containing a disposable molecular sieve bed (DMSB) seated within outer drum. The DMSB includes an inlet diffuser assembly, an outlet diffuser assembly, and a hydrogen catalytic recombiner. The DMSB absorbs tritium oxide from the process gas and converts it to a solid form so that the tritium is contained during shipment to a disposal site. The DMSB is filled with type 4A molecular sieve pellets capable of adsorbing up to 1000 curies of tritium. The recombiner contains a sufficient amount of catalyst to cause any hydrogen add oxygen present in the process gas to recombine to form water vapor, which is then adsorbed onto the DMSB.

  12. Electronic equipment packaging technology

    CERN Document Server

    Ginsberg, Gerald L

    1992-01-01

    The last twenty years have seen major advances in the electronics industry. Perhaps the most significant aspect of these advances has been the significant role that electronic equipment plays in almost all product markets. Even though electronic equipment is used in a broad base of applications, many future applications have yet to be conceived. This versatility of electron­ ics has been brought about primarily by the significant advances that have been made in integrated circuit technology. The electronic product user is rarely aware of the integrated circuits within the equipment. However, the user is often very aware of the size, weight, mod­ ularity, maintainability, aesthetics, and human interface features of the product. In fact, these are aspects of the products that often are instrumental in deter­ mining its success or failure in the marketplace. Optimizing these and other product features is the primary role of Electronic Equipment Packaging Technology. As the electronics industry continues to pr...

  13. Effect of Activebag® modified atmosphere packaging on the ...

    African Journals Online (AJOL)

    100g) observed at the beginning of storage (6 days after packaging) signalled advanced ripening of unpackaged fruits. However as the storage time progressed, the levels of each of the soluble sugars evaluated were higher in Activebag® ...

  14. US EPA Nonattainment Areas and Designations - Download Package

    Data.gov (United States)

    U.S. Environmental Protection Agency — This downloadable data package contains the following state level layers: Ozone 8-hr (1997 standard), Ozone 8-hr (2008 standard), Lead (2008 standard), SO2 1-hr...

  15. Processing strategies for enhanced resistance to impact fracture of thin small-outline packages

    Science.gov (United States)

    Lee, Seong-Min

    2003-10-01

    The cracking potential of TSOPs (thin small-outline packages) was estimated under impact loading, similar to the process that triggers TSOP fracture during the mold ejection process of plastic-encapsulated microelectronic packaging. It was found that the susceptibility of TSOPs to impact-induced damage is more influenced by the existence of residual stresses than surface defects of the die, which result from the wafer back-lapping process. The experimental results showed that diamond particle-induced crater marks, which contribute to introducing residual stresses to particular sites of the die back surface, can be more critical for determining impact strength of TSOPs than grinding-induced scratch marks. The present work also showed that chemical tempering of the back surface of the die is very effective for suppressing such impact-induced damage of TSOPs under very low impact loads.

  16. Lateral cavity photonic crystal surface emitting laser based on commercial epitaxial wafer.

    Science.gov (United States)

    Wang, Yufei; Qu, Hongwei; Zhou, Wenjun; Qi, Aiyi; Zhang, Jianxin; Liu, Lei; Zheng, Wanhua

    2013-04-08

    A lateral cavity photonic crystal surface emitting laser (LC-PCSEL) with airholes of cone-like shape etched near to the active layer is fabricated. It employs only a simple commercial epitaxial wafer without DBR and needs no wafer bonding technique. Surface emitting lasing action at 1575 nm with power of 1.8 mW is observed at room temperature, providing potential values for mass production of electrically driven PCSELs with low cost. Additionally, Fano resonance is utilized to analyze aperture equivalence of PC, and energy distribution in simplified laser structure is simulated to show oscillation and transmission characteristics of laser.

  17. An electrochemical cell for the efficient turn around of wafer working electrodes.

    Science.gov (United States)

    Wozniak, Nicholas R; Frey, Alyssa A; Osterbur, Lucas W; Boman, Timothy S; Hampton, Jennifer R

    2010-03-01

    We present a new design for an electrochemical cell for use with wafer working electrodes. The key feature of the design is the use of half turn thumb screws to form a liquid-tight seal between an o-ring and the sample surface. The assembly or disassembly of the cell requires a half turn of each thumb screw, which facilitates the quick turn around of wafer samples. The electrochemical performance of the cell is demonstrated by cyclic voltammetry and double step chronoamperometry measurements of the ferricyanide/ferrocyanide couple.

  18. Probing and irradiation tests of ALICE pixel chip wafers and sensors

    CERN Document Server

    Cinausero, M; Antinori, F; Chochula, P; Dinapoli, R; Dima, R; Fabris, D; Galet, G; Lunardon, M; Manea, C; Marchini, S; Martini, S; Moretto, S; Pepato, Adriano; Prete, G; Riedler, P; Scarlassara, F; Segato, G F; Soramel, F; Stefanini, G; Turrisi, R; Vannucci, L; Viesti, G

    2004-01-01

    In the framework of the ALICE Silicon Pixel Detector (SPD) project a system dedicated to the tests of the ALICE1LHCb chip wafers has been assembled and is now in use for the selection of pixel chips to be bump-bonded to sensor ladders. In parallel, radiation hardness tests of the SPD silicon sensors have been carried out using the 27 MeV proton beam delivered by the XTU TANDEM accelerator at the SIRAD facility in LNL. In this paper we describe the wafer probing and irradiation set-ups and we report the obtained results. (6 refs).

  19. Bismuth onion thin film in situ grown on silicon wafer synthesized through a hydrothermal approach

    Science.gov (United States)

    Zhao, Yue; Liu, Hong; Liu, Jin; Hu, Chenguo; Wang, Jiyang

    2010-10-01

    Bismuth onion structured nanospheres with the same structure as carbon onions have been synthesized and observed. The nanospheres were synthesized through a hydrothermal method using bismuth hydroxide and silicon wafer as reactants. By controlling the heating temperature, heating time, and the pressure, nanoscale bismuth spheres can be in situ synthesized on silicon wafer, and forms a bismuth onion film on the substrate. The electronic property of the films was investigated. A formation mechanism of the formation of bismuth onions and the onion film has been proposed on the basis of experimental observations.

  20. Micropore x-ray optics using anisotropic wet etching of (110) silicon wafers.

    Science.gov (United States)

    Ezoe, Yuichiro; Koshiishi, Masaki; Mita, Makoto; Mitsuda, Kazuhisa; Hoshino, Akio; Ishisaki, Yoshitaka; Yang, Zhen; Takano, Takayuki; Maeda, Ryutaro

    2006-12-10

    To develop x-ray mirrors for micropore optics, smooth silicon (111) sidewalls obtained after anisotropic wet etching of a silicon (110) wafer were studied. A sample device with 19 microm wide (111) sidewalls was fabricated using a 220 microm thick silicon (110) wafer and potassium hydroxide solution. For what we believe to be the first time, x-ray reflection on the (111) sidewalls was detected in the angular response measurement. Compared to ray-tracing simulations, the surface roughness of the sidewalls was estimated to be 3-5 nm, which is consistent with the atomic force microscope and the surface profiler measurements.

  1. Split-Capacitance and Conductance-Frequency Characteristics of SOI Wafers in Pseudo-MOSFET Configuration

    KAUST Repository

    Pirro, Luca

    2015-09-01

    Recent experimental results have demonstrated the possibility of characterizing silicon-on-insulator (SOI) wafers through split C-V measurements in the pseudo-MOSFET configuration. This paper analyzes the capacitance and conductance versus frequency characteristics. We discuss the conditions under which it is possible to extract interface trap density in bare SOI wafers. The results indicate, through both measurements and simulations, that the signature due to interface trap density is present in small-area samples, but is masked by the RC response of the channel in regular, large-area ones, making the extraction in standard samples problematic. © 1963-2012 IEEE.

  2. An electrochemical cell for the efficient turn around of wafer working electrodes

    Science.gov (United States)

    Wozniak, Nicholas R.; Frey, Alyssa A.; Osterbur, Lucas W.; Boman, Timothy S.; Hampton, Jennifer R.

    2010-03-01

    We present a new design for an electrochemical cell for use with wafer working electrodes. The key feature of the design is the use of half turn thumb screws to form a liquid-tight seal between an o-ring and the sample surface. The assembly or disassembly of the cell requires a half turn of each thumb screw, which facilitates the quick turn around of wafer samples. The electrochemical performance of the cell is demonstrated by cyclic voltammetry and double step chronoamperometry measurements of the ferricyanide/ferrocyanide couple.

  3. First thin AC-coupled silicon strip sensors on 8-inch wafers

    Energy Technology Data Exchange (ETDEWEB)

    Bergauer, T., E-mail: thomas.bergauer@oeaw.ac.at [Institute of High Energy Physics of the Austrian Academy of Sciences, Nikolsdorfer Gasse 18, 1050 Wien (Vienna) (Austria); Dragicevic, M.; König, A. [Institute of High Energy Physics of the Austrian Academy of Sciences, Nikolsdorfer Gasse 18, 1050 Wien (Vienna) (Austria); Hacker, J.; Bartl, U. [Infineon Technologies Austria AG, Siemensstrasse 2, 9500 Villach (Austria)

    2016-09-11

    The Institute of High Energy Physics (HEPHY) in Vienna and the semiconductor manufacturer Infineon Technologies Austria AG developed a production process for planar AC-coupled silicon strip sensors manufactured on 200 μm thick 8-inch p-type wafers. In late 2015, the first wafers were delivered featuring the world's largest AC-coupled silicon strip sensors. Detailed electrical measurements were carried out at HEPHY, where single strip and global parameters were measured. Mechanical studies were conducted and the long-term behavior was investigated using a climate chamber. Furthermore, the electrical properties of various test structures were investigated to validate the quality of the manufacturing process.

  4. Thermal and structural assessments of a ceramic wafer seal in hypersonic engines

    Science.gov (United States)

    Tong, Mike T.; Steinetz, Bruce M.

    1991-01-01

    The thermal and structural performances of a ceramic wafer seal in a simulated hypersonic engine environment are numerically assessed. The effects of aerodynamic heating, surface contact conductance between the seal and its adjacent surfaces, flow of purge coolant gases, and leakage of hot engine flow path gases on the seal temperature were investigated from the engine inlet back to the entrance region of the combustion chamber. Finite element structural analyses, coupled with Weibull failure analyses, were performed to determine the structural reliability of the wafer seal.

  5. Thermal and structural assessments of a ceramic wafer seal in hypersonic engine

    Science.gov (United States)

    Tong, Mike; Steinetz, Bruce

    1991-01-01

    The thermal and structural performances of a ceramic wafer seal in a simulated hypersonic engine environment are numerically assessed. The effects of aerodynamic heating, surface contact conductance between the seal and its adjacent surfaces, flow of purge coolant gases, and leakage of hot engine flow path gases on the seal temperature were investigated from the engine inlet back to the entrance region of the combustion chamber. Finite element structural analyses, coupled with Weibull failure analyses, were performed to determine the structural reliability of the wafer seal.

  6. A Substrate-Reclamation Technology for GaN-Based Lighting-Emitting Diodes Wafer

    Directory of Open Access Journals (Sweden)

    Shih-Yung Huang

    2017-03-01

    Full Text Available This study reports on the use of a substrate-reclamation technology for a gallium nitride (GaN-based lighting-emitting diode (LED wafer. There are many ways to reclaim sapphire substrates of scrap LED wafers. Compared with a common substrate-reclamation method based on chemical mechanical polishing, this research technology exhibits simple process procedures, without impairing the surface morphology and thickness of the sapphire substrate, as well as the capability of an almost unlimited reclamation cycle. The optical performances of LEDs on non-reclaimed and reclaimed substrates were consistent for 28.37 and 27.69 mcd, respectively.

  7. Nitrates and nitrites content of water boreholes and packaged water ...

    African Journals Online (AJOL)

    Nitrate and nitrite levels were determined in forty-three water samples obtained from different locations in Calabar using colorimetric methods. Twenty-three of these samples were packaged water while twenty were borehole water. Nitrate levels were found to be 24.28 ± 9.30μg/ml and 34.57 ± 14.56µ/ml for packaged water ...

  8. High Temperature Pt/Alumina Co-Fired System for 500 C Electronic Packaging Applications

    Science.gov (United States)

    Chen, Liang-Yu; Neudeck, Philip G.; Spry, David J.; Beheim, Glenn M.; Hunter, Gary W.

    2015-01-01

    Gold thick-film metallization and 96 alumina substrate based prototype packaging system developed for 500C SiC electronics and sensors is briefly reviewed, the needs of improvement are discussed. A high temperature co-fired alumina material system based packaging system composed of 32-pin chip-level package and printed circuit board is discussed for packaging 500C SiC electronics and sensors.

  9. Ensuring socially responsible packaging design

    DEFF Research Database (Denmark)

    Geert Jensen, Birgitte

    Most consumers have experienced occasional problems with opening packaging. Tomato sauce from the tinned mackerel splattered all over the kitchen counter, the unrelenting pickle jar lid, and the package of sliced ham that cannot be opened without a knife or a pair of scissors. The research project...

  10. Packaging perspective, 1910-1985

    Science.gov (United States)

    John W. Koning; James F. Laundrie

    1985-01-01

    For 75 years the Forest Products Laboratory has been concerned for the wise use of wood. One of the major uses of wood is packaging. This report summarizes the research reports completed in packaging and relates the output in terms of forest management and return on the taxpayer’s investment.

  11. Gentoo package dependencies over time

    NARCIS (Netherlands)

    Bloemen, Remco; Amrit, Chintan Amrit; Kuhlmann, Stefan; Ordonez Matamoros, Hector Gonzalo

    2014-01-01

    Open source distributions such as Gentoo need to accurately track dependency relations between software packages in order to install working systems. To do this, Gentoo has a carefully authored database containing those relations. In this paper, we extract the Gentoo package dependency graph and its

  12. Packaging Software Assets for Reuse

    Science.gov (United States)

    Mattmann, C. A.; Marshall, J. J.; Downs, R. R.

    2010-12-01

    The reuse of existing software assets such as code, architecture, libraries, and modules in current software and systems development projects can provide many benefits, including reduced costs, in time and effort, and increased reliability. Many reusable assets are currently available in various online catalogs and repositories, usually broken down by disciplines such as programming language (Ibiblio for Maven/Java developers, PyPI for Python developers, CPAN for Perl developers, etc.). The way these assets are packaged for distribution can play a role in their reuse - an asset that is packaged simply and logically is typically easier to understand, install, and use, thereby increasing its reusability. A well-packaged asset has advantages in being more reusable and thus more likely to provide benefits through its reuse. This presentation will discuss various aspects of software asset packaging and how they can affect the reusability of the assets. The characteristics of well-packaged software will be described. A software packaging domain model will be introduced, and some existing packaging approaches examined. An example case study of a Reuse Enablement System (RES), currently being created by near-term Earth science decadal survey missions, will provide information about the use of the domain model. Awareness of these factors will help software developers package their reusable assets so that they can provide the most benefits for software reuse.

  13. Use of Optical Oxygen Sensors in Non-Destructively Determining the Levels of Oxygen Present in Combined Vacuum and Modified Atmosphere Packaged Pre-Cooked Convenience-Style Foods and the Use of Ethanol Emitters to Extend Product Shelf-Life.

    Science.gov (United States)

    Hempel, Andreas W; Papkovsky, Dmitri B; Kerry, Joseph P

    2013-11-18

    O₂ sensors were used to non-destructively monitor O₂ levels in commercially packed pre-cooked, convenience modified atmosphere packaging (MAP) foods. A substantial level of O₂ (>15%) was present in packs resulting in a shorter than expected shelf-life, where the primary spoilage mechanism was found to be mould. Various combinations of vacuum (0-0.6 MPa) and gas flush (0.02-0.03 MPa) (30% CO₂/70% N₂) settings were assessed as treatments that result in the desired shelf-life (28 days). This was achieved using the combined treatment of vacuum 0.35 MPa and gas flush 0.02 MPa which resulted in a reduction of 6%-9% O2 in all three samples (battered sausages (BS), bacon slices (BA), and meat and potato pies (PP)). Reduced O₂ levels reflect the microbial quality of products, which has been successfully reduced. Duplicate samples of all product packs were produced using ethanol emitters (EE) to see if shelf-life could be further extended. Results showed a further improvement in shelf-life to 35 days. Sensory analysis showed that ethanol flavour and aroma was not perceived by panellists in two of the three products assessed. This study demonstrates how smart packaging technologies, both intelligent and active, can be used to assist in the modification of conventional packaging systems in order to enhance product quality and safety and through the extension of product shelf-life.

  14. Active packaging of cheese with allyl isothiocyanate, an alternative to modified atmosphere packaging.

    Science.gov (United States)

    Winther, Mette; Nielsen, Per Vaeggemose

    2006-10-01

    The natural antimicrobial compound allyl isothiocyanate (AITC), found in mustard oil, is effective against cheese-related fungi both on laboratory media and cheese. Penicillium commune, Penicillium roqueforti, and Aspergillus flavus were more sensitive to AITC when it was added just after the spores had completed 100% germination and branching had started on Czapek yeast extract agar than were spores in the dormant phase. The use of 1 AITC label (Wasaouro interior labels, LD30D, 20 by 20 mm) in combination with atmospheric air in the packaging extended the shelf life of Danish Danbo cheese from 4 1/2 to 13 weeks. Two AITC labels extended the shelf life from 4 1/2 to 28 weeks. Both 1 and 2 labels in combination with modified atmosphere packaging extended the shelf life of the cheese from 18 to 28 weeks. This study showed that AITC was absorbed in the cheese, but it was not possible to detect any volatile breakdown products from AITC in the cheese. Cheese stored for up to 12 weeks with an AITC label had an unacceptable mustard flavor. The mustard flavor decreased to an acceptable level between weeks 12 and 28. Cheese stored in atmospheric air had a fresher taste without a CO2 off-flavor than did cheese stored in modified atmosphere packaging. AITC may be a good alternative to modified atmosphere packaging for cheese. The extended shelf life of cheese in the package is very desirable: the cheese can be transported longer distances, and the packaging can be used for the final maturing of the cheese. Furthermore, AITC can address problems such as pinholes and leaking seals in cheese packaging.

  15. New Technique to Determine Gettering Efficiency of Heavy Metals and Its Application to Carbon-Ion-Implanted Si Epitaxial Wafers

    Science.gov (United States)

    Itoga, Toshihiko; Hozawa, Kazuyuki; Takeda, Kazuo; Isomae, Seiichi; Ohkura, Makoto

    2001-04-01

    Using a newly developed method to evaluate the gettering efficiency of Si wafers, we found that C-ion implantation prior to epitaxial growth greatly improves the gettering efficiency of heavy metals in epitaxial Si wafers. The gettering efficiency was evaluated through direct observation by total X-ray reflection fluorescence (TXRF) by counting the number of heavy metal atoms that diffused from the back to the front surface of wafers. Heavy metals were deposited on the backside surface of Si wafers from metal-dissolved aqua solution. Two-step annealing was carried out after the deposition. The first step caused metal diffusion and the second produced precipitation from the front surface of the wafers. The effectiveness of the method was confirmed by comparing the results obtained from as-received and intrinsic (or internal) gettering (IG)-processed Czochralski-grown Si wafers. The method was applied to C-ion-implanted epitaxial Si wafers to confirm the improvement in gettering efficiency in accordance with the implanted C dose. The effectiveness of the C-ion implantation was also confirmed by evaluating the electrical characteristics of the oxide grown on the Si wafers.

  16. 19 CFR 191.13 - Packaging materials.

    Science.gov (United States)

    2010-04-01

    ... 19 Customs Duties 2 2010-04-01 2010-04-01 false Packaging materials. 191.13 Section 191.13 Customs... (CONTINUED) DRAWBACK General Provisions § 191.13 Packaging materials. (a) Imported packaging material... packaging material when used to package or repackage merchandise or articles exported or destroyed pursuant...

  17. Layer-by-layer assembly of two-dimensional materials into wafer-scale heterostructures

    Science.gov (United States)

    Kang, Kibum; Lee, Kan-Heng; Han, Yimo; Gao, Hui; Xie, Saien; Muller, David A.; Park, Jiwoong

    2017-10-01

    High-performance semiconductor films with vertical compositions that are designed to atomic-scale precision provide the foundation for modern integrated circuitry and novel materials discovery. One approach to realizing such films is sequential layer-by-layer assembly, whereby atomically thin two-dimensional building blocks are vertically stacked, and held together by van der Waals interactions. With this approach, graphene and transition-metal dichalcogenides--which represent one- and three-atom-thick two-dimensional building blocks, respectively--have been used to realize previously inaccessible heterostructures with interesting physical properties. However, no large-scale assembly method exists at present that maintains the intrinsic properties of these two-dimensional building blocks while producing pristine interlayer interfaces, thus limiting the layer-by-layer assembly method to small-scale proof-of-concept demonstrations. Here we report the generation of wafer-scale semiconductor films with a very high level of spatial uniformity and pristine interfaces. The vertical composition and properties of these films are designed at the atomic scale using layer-by-layer assembly of two-dimensional building blocks under vacuum. We fabricate several large-scale, high-quality heterostructure films and devices, including superlattice films with vertical compositions designed layer-by-layer, batch-fabricated tunnel device arrays with resistances that can be tuned over four orders of magnitude, band-engineered heterostructure tunnel diodes, and millimetre-scale ultrathin membranes and windows. The stacked films are detachable, suspendable and compatible with water or plastic surfaces, which will enable their integration with advanced optical and mechanical systems.

  18. Controllable elastocapillary folding of silicon nitride 3D structures by through-wafer filling

    NARCIS (Netherlands)

    Legrain, A.B.H.; Janson, T.G.; Berenschot, Johan W.; Krijnen, Gijsbertus J.M.; Abelmann, Leon; Tas, Niels Roelof

    2013-01-01

    We present the controllable capillary folding of planar silicon nitride templates into 3D micro-structures by means of through-wafer liquid application. We demonstrate for the first time hydro-mechanical, repeatable, actuation of capillary folded structures via addition or retraction of water on

  19. Wafer-scale fabrication of glass-FEP-glass microfluidic devices for lipid bilayer experiments

    NARCIS (Netherlands)

    Bomer, Johan G.; Prokofyev, A.V.; van den Berg, Albert; le Gac, Severine

    2014-01-01

    We report a wafer-scale fabrication process for the production of glass-FEP-glass microdevices using UV-curable adhesive (NOA81) as gluing material, which is applied using a novel "spin & roll" approach. Devices are characterized for the uniformity of the gluing layer, presence of glue in the

  20. Terahertz wafer-scale mobility mapping of graphene on insulating substrates without a gate

    DEFF Research Database (Denmark)

    Buron, Jonas Due; Mackenzie, David M. A.; Petersen, Dirch Hjorth

    2015-01-01

    carriers and these parameters are directly compared to van der Pauw device measurements on the same wafer. The technique is compatible with all substrate materials that exhibit a reasonably low absorption coefficient for terahertz radiation. This includes many materials used for transferring CVD graphene...

  1. Fluorescent 'two-faced' polymer wafers with embedded pyrene-functionalised gelator nanofibres.

    Science.gov (United States)

    Moffat, Jamie R; Smith, David K

    2011-11-21

    Pyrene-functionalised gelators self-assemble into nano-fibrillar organogels in DMSO/styrene/divinylbenzene mixtures, which when polymerised yield polymer wafers with two distinct faces, only one of which is fluorescent and has embedded gelator nanofibres. This journal is © The Royal Society of Chemistry 2011

  2. 75 FR 76952 - Grant of Authority for Subzone Status; Lam Research Corporation (Wafer Fabrication Equipment...

    Science.gov (United States)

    2010-12-10

    ... Foreign-Trade Zones Board Grant of Authority for Subzone Status; Lam Research Corporation (Wafer... distribution facilities of Lam Research Corporation, located in Fremont, Newark, and Livermore, California... equipment at the facilities of Lam Research Corporation, located in Fremont, Newark, and Livermore...

  3. Wafer-Scale Nanopillars Derived from Block Copolymer Lithography for Surface-Enhanced Raman Spectroscopy

    DEFF Research Database (Denmark)

    Li, Tao; Wu, Kaiyu; Rindzevicius, Tomas

    2016-01-01

    We report a novel nanofabrication process via block copolymer lithography using solvent vapor annealing. The nanolithography process is facile and scalable, enabling fabrication of highly ordered periodic patterns over entire wafers as substrates for surface-enhanced Raman spectroscopy (SERS). Di...

  4. Nanomanipulation of 2 inch wafer fabrication of vertically aligned carbon nanotube arrays by nanoimprint lithography

    DEFF Research Database (Denmark)

    Bu, Ian Y. Y.; Eichhorn, Volkmar; Carlson, Kenneth

    2011-01-01

    pattern transfer to a hard metal mask before deep reactive ion etching (RIE) to form the stamp protrusions. This stamp master is then pressed against a wafer covered with nanoimprint resist, at a temperature above the glass transition temperature, transferring the pattern to polymer. Using this process...

  5. Wafer-Scale Leaning Silver Nanopillars for Molecular Detection at Ultra-Low Concentrations

    DEFF Research Database (Denmark)

    Wu, Kaiyu; Rindzevicius, Tomas; Schmidt, Michael Stenbæk

    2015-01-01

    Wafer-scale surface-enhanced Raman scattering (SERS) substrates fabricated using maskless lithography are important for scalable production targets. Large-area, leaning silver-capped silicon nanopillar (Ag NP) structures suitable for SERS molecular detection at extremely low analyte concentrations...

  6. Low temperature fusion wafer bonding quality investigation for failure mode analysis

    NARCIS (Netherlands)

    Dragoi, V.; Czurratis, P.; Brand, S.; Beyersdorfer, J.; Patzig, C.; Krugers, J.P.; Schrank, F.; Siegert, J.; Petzold, M.

    2012-01-01

    In this paper, a brief summary of potential defect formation and failure characteristics for low temperature plasma-assisted Si wafer bonding in correlation to different influencing factors is given. In terms of a failure catalogue classification, these defects are related to incoming material

  7. Graphene-Decorated Nanocomposites for Printable Electrodes in Thin Wafer Devices

    Science.gov (United States)

    Bakhshizadeh, N.; Sivoththaman, S.

    2017-08-01

    Printable electrodes that induce less stress and require lower curing temperatures compared to traditional screen-printed metal pastes are needed in thin wafer devices such as future solar cells, and in flexible electronics. The synthesis of nanocomposites by incorporating graphene nanopowders as well as silver nanowires into epoxy-based electrically conductive adhesives (ECA) is examined to improve electrical conductivity and to develop alternate printable electrode materials that induce less stress on the wafer. For the synthesized graphene and Ag nanowire-decorated ECA nanocomposites, the curing kinetics were studied by dynamic and isothermal differential scanning calorimetry measurements. Thermogravimetric analysis on ECA, ECA-AG and ECA/graphene nanopowder nanocomposites showed that the temperatures for onset of decomposition are higher than their corresponding glass transition temperature (T g) indicating an excellent thermal resistance. Printed ECA/Ag nanowire nanocomposites showed 90% higher electrical conductivity than ECA films, whereas the ECA/graphene nanocomposites increased the conductivity by over two orders of magnitude. Scanning electron microscopy results also revealed the effect of fillers morphology on the conductivity improvement and current transfer mechanisms in nanocomposites. Residual stress analysis performed on Si wafers showed that the ECA and nanocomposite printed wafers are subjected to much lower stress compared to those printed with metallic pastes. The observed parameters of low curing temperature, good thermal resistance, reasonably high conductivity, and low residual stress in the ECA/graphene nanocomposite makes this material a promising alternative in screen-printed electrode formation in thin substrates.

  8. Design Expert Supported Mathematical Optimization and Predictability Study of Buccoadhesive Pharmaceutical Wafers of Loratadine

    Science.gov (United States)

    Dey, Surajit; Parcha, Versha; Bhattacharya, Shiv Sankar; Ghosh, Amitava

    2013-01-01

    Objective. The objective of this work encompasses the application of the response surface approach in the development of buccoadhesive pharmaceutical wafers of Loratadine (LOR). Methods. Experiments were performed according to a 32 factorial design to evaluate the effects of buccoadhesive polymer, sodium alginate (A), and lactose monohydrate as ingredient, of hydrophilic matrix former (B) on the bioadhesive force, disintegration time, percent (%) swelling index, and time taken for 70% drug release (t 70%). The effect of the two independent variables on the response variables was studied by response surface plots and contour plots generated by the Design-Expert software. The desirability function was used to optimize the response variables. Results. The compatibility between LOR and the wafer excipients was confirmed by differential scanning calorimetry, FTIR spectroscopy, and X-ray diffraction (XRD) analysis. Bioadhesion force, measured with TAXT2i texture analyzer, showed that the wafers had a good bioadhesive property which could be advantageous for retaining the drug into the buccal cavity. Conclusion. The observed responses taken were in agreement with the experimental values, and Loratadine wafers were produced with less experimental trials, and a patient compliant product was achieved with the concept of formulation by design. PMID:23781498

  9. Dimensional Control in Corner Lithography for Wafer-Scale Fabrication of Nano-Apertures

    NARCIS (Netherlands)

    Burouni, N.; Berenschot, Johan W.; Elwenspoek, Michael Curt; Tas, Niels Roelof

    2011-01-01

    In this paper we investigate a new method to fabricate 3D-oriented nanostructures in wafer scale, and apply it to fabricate a nano-apertures at the apex of a pyramid. A number of new technologies require the use of apertures to serve as electrical, nano fluidic or optical probes. Controlling the

  10. Study of ammonium fluoride passivation time on CdZnTe bulk crystal wafers

    Energy Technology Data Exchange (ETDEWEB)

    Bensalah, H.; Crocco, J.; Carcelen, V.; Plaza, J.L.; Zheng, Q.; Dieguez, E. [Crystal Growth Laboratory, Departamento de Fisica de Materiales, Universidad Autonoma de Madrid, Cantoblanco, 28049 Madrid (Spain); Marchini, L. [IMEM-CNR, Parma (Italy); Zanichelli, M. [Department of Physics, University of Parma (Italy); Dominguez, G.; Soriano, L. [Departamento de Fisica Aplicada and Instituto de Ciencias de Materiales Nicolas Cabrera, Universidad Autonoma de Madrid, Cantoblanco, 28049 Madrid (Spain)

    2011-07-15

    The chemical etching and the passivation processes of CdZnTe wafers were studied. The treatment effects were tested through an X-Ray Photoelectron Spectroscopy (XPS) analysis and I-V measurement. The chemical etching in 2%Br-MeOH solution may effectively remove the damaged layer and improve the ohmic contact between CdZnTe wafer and Au electrodes making rich the surface with Te. After different etching times, the CdZnTe wafers were passivated with NH{sub 4}F/H{sub 2}O{sub 2}.CdZnTe wafer passivated immediately after etching showed the best passivation efficiency because the enriched Te on the surface was fully oxidized to TeO{sub 2}, which results in the thickest oxide layer, and the most stoichiometric surface. Also the surface leakage current was reduced in comparison with the sample passivated 24 h after etching. (copyright 2011 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim) (orig.)

  11. Graphene-Decorated Nanocomposites for Printable Electrodes in Thin Wafer Devices

    Science.gov (United States)

    Bakhshizadeh, N.; Sivoththaman, S.

    2017-12-01

    Printable electrodes that induce less stress and require lower curing temperatures compared to traditional screen-printed metal pastes are needed in thin wafer devices such as future solar cells, and in flexible electronics. The synthesis of nanocomposites by incorporating graphene nanopowders as well as silver nanowires into epoxy-based electrically conductive adhesives (ECA) is examined to improve electrical conductivity and to develop alternate printable electrode materials that induce less stress on the wafer. For the synthesized graphene and Ag nanowire-decorated ECA nanocomposites, the curing kinetics were studied by dynamic and isothermal differential scanning calorimetry measurements. Thermogravimetric analysis on ECA, ECA-AG and ECA/graphene nanopowder nanocomposites showed that the temperatures for onset of decomposition are higher than their corresponding glass transition temperature ( T g) indicating an excellent thermal resistance. Printed ECA/Ag nanowire nanocomposites showed 90% higher electrical conductivity than ECA films, whereas the ECA/graphene nanocomposites increased the conductivity by over two orders of magnitude. Scanning electron microscopy results also revealed the effect of fillers morphology on the conductivity improvement and current transfer mechanisms in nanocomposites. Residual stress analysis performed on Si wafers showed that the ECA and nanocomposite printed wafers are subjected to much lower stress compared to those printed with metallic pastes. The observed parameters of low curing temperature, good thermal resistance, reasonably high conductivity, and low residual stress in the ECA/graphene nanocomposite makes this material a promising alternative in screen-printed electrode formation in thin substrates.

  12. Smart mask ship to control for enhanced on wafer CD performance

    Science.gov (United States)

    Utzny, Clemens; Schumacher, Karl; Seltmann, Rolf

    2016-10-01

    In the process of semicondutcor fabrication the translation of the final product requirements into specific targets for each component of the manufacturing process is one of the most demanding tasks. This involves the careful assessment of the error budgets of each component as well as the sensible balancing of the costs implied by the requirements. Photolithographic masks play a pivotal role in the semiconductor fabrication. This attributes a crucial role to mask error budgeting within the overall wafer production process. Masks with borderline performance with respect to the wafer fabrication requirements have a detrimental effect on the wafer process window thus inducing delays and costs. However, prohibitively strict mask specifications will induce large costs and delays in the mask manufacturing process. Thus setting smart control mechanisms for mask quality assessment is highly relevant for an efficient production flow. To this end GLOBALFOUNDRIES and the AMTC have set up a new mask specification check to enable a smart ship to control process for mask manufacturing. Within this process the mask CD distribution is checked as to whether it is commensurable with the advanced dose control capabilities of the stepper in the wafer factory. If this is the case, masks with borderline CD performance will be usable within the manufacturing process as the signatures can be compensated. In this paper we give a detailed explanation of the smart ship control approach with its implications for mask quality.

  13. A facility for plastic deformation of germanium single-crystal wafers

    DEFF Research Database (Denmark)

    Lebech, B.; Theodor, K.; Breiting, B.

    1998-01-01

    . All movements and temperature changes are done by a robot via a PLC-control system. Two nine-crystal focusing monochromators (54 x 116 and 70 x 116 mm(2)) made from 100 wafers with average mosaicity similar to 13' have been constructed. Summaries of the test results are presented. (C) 1998 Elsevier...

  14. Low temperature sacrificial wafer bonding for planarization after very deep etching

    NARCIS (Netherlands)

    Spiering, V.L.; Spiering, V.L.; Berenschot, Johan W.; Elwenspoek, Michael Curt; Fluitman, J.H.J.

    1994-01-01

    A new technique, at temperatures of 150°C or 450°C, that provides planarization after a very deep etching step in silicon is presented. Resist spinning and layer patterning as well as realization of bridges or cantilevers across deep holes becomes possible. The sacrificial wafer bonding technique

  15. Fabrication of through-wafer 3D microfluidics in silicon carbide using femtosecond laser

    Science.gov (United States)

    Huang, Yinggang; Wu, Xiudong; Liu, Hewei; Jiang, Hongrui

    2017-06-01

    We demonstrate a prototype through-wafer microfluidic structure in bulk silicon carbide (SiC) fabricated by femtosecond laser micromachining. The effects of laser fluence and scanning speed on the laser-affected zone are also investigated. Furthermore, the wettability of the laser-affected surface for the target liquid, mineral oil, is examined. Microchannels of various cross-sectional shapes are fabricated by the femtosecond laser and their effects on the liquid flow are simulated and compared. This fabrication approach offers a fast and efficient route to implement SiC-based through-wafer micro-structures, which are not able to be realized using other methods such as chemical etching. The flexibility of manufacturing 3D structures based on this fabrication method enables more complex structures as well. Smooth liquid flow in the microchannels of the bulk SiC substrate is presented. The work shown here paves a new way for various applications such as reliable microfluidic systems in a high-temperature, high radioactivity, and corrosive environment, and could be combined with SiC wafer-to-wafer bonding to realize a plethora of novel microelectromechanical (MEMS) structures.

  16. A critical appraisal of medication package inserts

    Directory of Open Access Journals (Sweden)

    Pranjit Narzaree

    2015-10-01

    Full Text Available Introduction: Package Inserts (PIs refers to officially specified document that accompanies a drug for relevant, updated and unbiased information for rational drug use based on regulatory guidelines as per section 6.2 and 6.3 of schedule D of Indian Drug and cosmetic Act 1945. But some studies had shown non-uniformity with suboptimal level of informations which frequently can lead to medication errors. Hence this study was conducted to evaluate the completeness of PIs.Aim: To critically evaluate package inserts of allopathic medicines.Material and Methods: 100 allopathic drug PIs were collected from pharmacies in Rohtak and were checked for the presence of each heading as per schedule D criteria, followed by scrutiny of the information included under the heading. Indian guidelines were also compared with US FDA guidelines for PIs.Scoring of package inserts: The informations were evaluated for completeness and scored as 1 if present otherwise scored as zero for no information or partial information. Scores for each heading were calculated by totaling the scores of all the package inserts. The total scores were expressed as absolute numbers and percentages.Results:  On an average PIs analyzed for the completeness of the criteria scored 10 (Mean± SD = 9.73±2.48 out of 16. Absence of common layout and headings caused inconvenience. In comparison to US FDA guidelines it lacked, disclaimer statement, boxed warning, revision date, approval date, toll-free number etc.Conclusion: PIs don’t seem to be serving effectively because of multiple deficiencies like completeness, uniformity, absence of headings.Keywords: Critical appraisal, package inserts.

  17. Fresh meat packaging: consumer acceptance of modified atmosphere packaging including carbon monoxide.

    Science.gov (United States)

    Grebitus, Carola; Jensen, Helen H; Roosen, Jutta; Sebranek, Joseph G

    2013-01-01

    Consumers' perceptions and evaluations of meat quality attributes such as color and shelf life influence purchasing decisions, and these product attributes can be affected by the type of fresh meat packaging system. Modified atmosphere packaging (MAP) extends the shelf life of fresh meat and, with the inclusion of carbon monoxide (CO-MAP), achieves significant color stabilization. The objective of this study was to assess whether consumers would accept specific packaging technologies and what value consumers place on ground beef packaged under various atmospheres when their choices involved the attributes of color and shelf life. The study used nonhypothetical consumer choice experiments to determine the premiums that consumers are willing to pay for extended shelf life resulting from MAP and for the "cherry red" color in meat resulting from CO-MAP. The experimental design allowed determination of whether consumers would discount foods with MAP or CO-MAP when (i) they are given more detailed information about the technologies and (ii) they have different levels of individual knowledge and media exposure. The empirical analysis was conducted using multinomial logit models. Results indicate that consumers prefer an extension of shelf life as long as the applied technology is known and understood. Consumers had clear preferences for brighter (aerobic and CO) red color and were willing to pay $0.16/lb ($0.35/kg) for each level of change to the preferred color. More information on MAP for extending the shelf life and on CO-MAP for stabilizing color decreased consumers' willingness to pay. An increase in personal knowledge and media exposure influenced acceptance of CO-MAP negatively. The results provide quantitative measures of how packaging affects consumers' acceptance and willingness to pay for products. Such information can benefit food producers and retailers who make decisions about investing in new packaging methods.

  18. Neutron activation analysis of low-level element contents in silicon wafers

    Energy Technology Data Exchange (ETDEWEB)

    Goerner, W. [Bundesanstalt fuer Materialforschung und -pruefung, Berlin (Germany); Berger, A. [Bundesanstalt fuer Materialforschung und -pruefung, Berlin (Germany); Niese, S. [Verein fuer Kernverfahrenstechnik und Analytik Rossendorf e.V. (VKTA), Dresden (Germany); Koehler, M. [Verein fuer Kernverfahrenstechnik und Analytik Rossendorf e.V. (VKTA), Dresden (Germany); Matthes, M. [Verein fuer Kernverfahrenstechnik und Analytik Rossendorf e.V. (VKTA), Dresden (Germany); Gawlik, D. [Hahn-Meitner-Institut, Berlin (Germany)

    1997-03-01

    Semiconductor silicon is among the purest materials having ever been produced by modern technology. Thus, it is quite suitable as a primary reference material validating the correctness and the detection capabilities of developed analytical methods. Among them neutron activation analysis plays a competitive role. The U.S. National Institute of Science and Technology (NIST) has initiated and carried out an interlaboratory comparison in order to study the spread of analytical results worldwide evolved by several laboratories dealing with specimens of extreme purity. The outcome of the experiment was intended to review the capabilities of NAA as well as to differentiate between bulk and surface contamination. (orig./DG)

  19. An electret-based energy harvesting device with a wafer-level fabrication process

    DEFF Research Database (Denmark)

    Crovetto, Andrea; Wang, Fei; Hansen, Ole

    2013-01-01

    is also discussed. With a final chip size of about 1 cm2, a power output of 32.5 nW is successfully harvested with an external load of 17 MΩ, when a harmonic vibration source with an RMS acceleration amplitude of 0.03 g (∼0.3 m s−2) and a resonant frequency of 179 Hz is applied. These results can...

  20. High Throughput, High Precision Hot Testing Tool for HBLED Wafer Level Testing

    Energy Technology Data Exchange (ETDEWEB)

    Solarz, Richard [KLA-Tencor Corporation, Milpitas, CA (United States); McCord, Mark [KLA-Tencor Corporation, Milpitas, CA (United States)

    2015-12-31

    The Socrates research effort developed an in depth understanding and demonstrated in a prototype tool new precise methods for teh characterization of color characteristics and flux from individual LEDs for the production of uniform quality lighting. This effort was focused on improving the color quality and consistency of solid state lighting and potentially reducing characterization costs for all LED product types. The patented laser hot testing method was demonstrated to be far more accurate than all current state of the art color and flux characterization methods in use by the solid state lighting industry today. A seperately patented LED grouping method (statistical binning) was demonstrated to be a useful approach to improving utilization of entire lots of large color and flux distributions of manufactured LEDs for high quality color solid-state lighting. At the conclusion of the research in late 2015 the solid-state lighting industry was however generally satisfied with its existing production methods for high quality color products for the small segment of customers that demand it, albeit with added costs.

  1. IC Compatible Wafer Level Fabrication of Silicon Nanowire Field Effect Transistors for Biosensing Applications

    NARCIS (Netherlands)

    Moh, T.S.Y.

    2013-01-01

    In biosensing, nano-devices such as Silicon Nanowire Field Effect Transistors (SiNW FETs) are promising components/sensors for ultra-high sensitive detection, especially when samples are low in concentration or a limited volume is available. Current processing of SiNW FETs often relies on expensive

  2. Non-Destructive Testing for Control of Radioactive Waste Package

    Science.gov (United States)

    Plumeri, S.; Carrel, F.

    2015-10-01

    Characterization and control of radioactive waste packages are important issues in the management of a radioactive waste repository. Therefore, Andra performs quality control inspection on radwaste package before disposal to ensure the compliance of the radwast characteristics with Andra waste disposal specifications and to check the consistency between Andra measurements results and producer declared properties. Objectives of this quality control are: assessment and improvement of producer radwaste packages quality mastery, guarantee of the radwaste disposal safety, maintain of the public confidence. To control radiological characteristics of radwaste package, non-destructive passive methods (gamma spectrometry and neutrons counting) are commonly used. These passive methods may not be sufficient, for instance to control the mass of fissile material contained inside radwaste package. This is particularly true for large concrete hull of heterogeneous radwaste containing several actinides mixed with fission products like 137Cs. Non-destructive active methods, like measurement of photofission delayed neutrons, allow to quantify the global mass of actinides and is a promising method to quantify mass of fissile material. Andra has performed different non-destructive measurements on concrete intermediate-level short lived nuclear waste (ILW-SL) package to control its nuclear material content. These tests have allowed Andra to have a first evaluation of the performance of photofission delayed neutron measurement and to identify development needed to have a reliable method, especially for fissile material mass control in intermediate-level long lived waste package.

  3. Naval Waste Package Design Sensitivity

    Energy Technology Data Exchange (ETDEWEB)

    T. Schmitt

    2006-12-13

    The purpose of this calculation is to determine the sensitivity of the structural response of the Naval waste packages to varying inner cavity dimensions when subjected to a comer drop and tip-over from elevated surface. This calculation will also determine the sensitivity of the structural response of the Naval waste packages to the upper bound of the naval canister masses. The scope of this document is limited to reporting the calculation results in terms of through-wall stress intensities in the outer corrosion barrier. This calculation is intended for use in support of the preliminary design activities for the license application design of the Naval waste package. It examines the effects of small changes between the naval canister and the inner vessel, and in these dimensions, the Naval Long waste package and Naval Short waste package are similar. Therefore, only the Naval Long waste package is used in this calculation and is based on the proposed potential designs presented by the drawings and sketches in References 2.1.10 to 2.1.17 and 2.1.20. All conclusions are valid for both the Naval Long and Naval Short waste packages.

  4. Perfume Packaging, Seduction and Gender

    Directory of Open Access Journals (Sweden)

    Magdalena Petersson McIntyre

    2013-06-01

    Full Text Available This article examines gender and cultural sense-making in relation to perfumes and their packaging. Gendered meanings of seduction, choice, consumption and taste are brought to the fore with the use of go-along interviews with consumers in per-fume stores. Meeting luxury packages in this feminized environment made the interviewed women speak of bottles as objects to fall in love with and they de-scribed packages as the active part in an act of seduction where they were expect-ing packages to persuade them into consumption. The interviewed men on the other hand portrayed themselves as active choice-makers and stressed that they were always in control and not seduced by packaging. However, while their ways of explaining their relationship with packaging on the surface seems to confirm cultural generalizations in relation to gender and seduction, the article argues that letting oneself be seduced is no less active than seducing. Based on a combination of actor network theories and theories of gender performativity the article points to the agency of packaging for constructions of gender and understands the inter-viewees as equally animated by the flows of passion which guide their actions.

  5. Safety and efficacy of Gliadel wafers for newly diagnosed and recurrent glioblastoma.

    Science.gov (United States)

    De Bonis, Pasquale; Anile, Carmelo; Pompucci, Angelo; Fiorentino, Alba; Balducci, Mario; Chiesa, Silvia; Maira, Giulio; Mangiola, Annunziato

    2012-08-01

    Combining Gliadel wafers and radiochemotherapy with TMZ may carry the risk of increased adverse events (AE). We analyzed the efficacy and safety in patients with glioblastoma who underwent multimodal treatment with implantation of Gliadel wafers. One hundred sixty-five consecutive patients with newly diagnosed (77 patients) or recurrent (88 patients) glioblastoma were studied. Forty-seven patients underwent surgery + Gliadel. The impact of age (≥65 vs. <65), resection extent (gross total vs. partial), use of Gliadel and adjuvant treatment (TMZ vs. other schemes/no adjuvant therapy) on overall survival (OS, for patients with newly diagnosed glioblastoma) and on recurrence-survival (for patients with recurrent glioblastoma) was analyzed with Cox regression. The impact of age, history (newly diagnosed vs. recurrent glioblastoma), number of Gliadel wafers implanted (0 vs. <8 vs. 8), resection extent (gross-total vs. partial) and adjuvant treatment (TMZ vs. other schemes/no adjuvant therapy) on the occurrence of AE and on the occurrence of implantation site-related AE (ISAE) was analyzed with the logistic regression model. Significance was set at p < 0.05. Multivariate analysis showed the only factor associated with longer survival, both for newly diagnosed and for recurrent GBM, was resection extent. Both patients with a higher number of wafers implanted and patients with recurrent tumors were significantly at risk for AE and ISAE. Patients with eight Gliadel wafers implanted had a 3-fold increased risk of AE and a 5.6-fold increased risk of ISAE, and patients with recurrent tumor had a 2.8-fold increased risk of AE and a 9.3-fold increased risk of ISAE. Adding Gliadel to standard treatment did not significantly improve the outcome. The toxicity after Gliadel use was significantly higher, both for patients with newly diagnosed and patients with recurrent glioblastoma.

  6. Safety evaluation for packaging (onsite) concrete-lined waste packaging

    Energy Technology Data Exchange (ETDEWEB)

    Romano, T.

    1997-09-25

    The Pacific Northwest National Laboratory developed a package to ship Type A, non-transuranic, fissile excepted quantities of liquid or solid radioactive material and radioactive mixed waste to the Central Waste Complex for storage on the Hanford Site.

  7. Characterization of integrated circuit packaging materials

    CERN Document Server

    Moore, Thomas

    1993-01-01

    Chapters in this volume address important characteristics of IC packages. Analytical techniques appropriate for IC package characterization are demonstrated through examples of the measurement of critical performance parameters and the analysis of key technological problems of IC packages. Issues are discussed which affect a variety of package types, including plastic surface-mount packages, hermetic packages, and advanced designs such as flip-chip, chip-on-board and multi-chip models.

  8. Packaging systems for animal origin food

    Directory of Open Access Journals (Sweden)

    2011-03-01

    Full Text Available The main task of food packaging is to protect the product during storage and transport against the action of biological, chemical and mechanical factors. The paper presents packaging systems for food of animal origin. Vacuum and modified atmosphere packagings were characterised together with novel types of packagings, referred to as intelligent packaging and active packaging. The aim of this paper was to present all advantages and disadvantages of packaging used for meat products. Such list enables to choose the optimal type of packaging for given assortment of food and specific conditions of the transport and storing.

  9. Applications of Active Packaging in Breads

    Directory of Open Access Journals (Sweden)

    Ali Göncü

    2017-10-01

    Full Text Available Changes on consumer preferences lead to innovations and improvements in new packaging technologies. With these new developments passive packaging technologies aiming to protect food nowadays have left their place to active and intelligent packaging technologies that have other various functions beside protection of food. Active packaging is defined as an innovative packaging type and its usage increases the shelf life of food significantly. Applications of active packaging have begun to be used for packaging of breads. In this study active packaging applications in breads have been reviewed.

  10. Improvement of polycrystalline silicon wafer solar cell efficiency by forming nanoscale pyramids on wafer surface using a self-mask etching technique.

    Science.gov (United States)

    Lin, Hsin-Han; Chen, Wen-Hwa; Hong, Franklin C-N

    2013-05-01

    The creation of nanostructures on polycrystalline silicon wafer surface to reduce the solar reflection can enhance the solar absorption and thus increase the solar-electricity conversion efficiency of solar cells. The self-masking reactive ion etching (RIE) was studied to directly fabricate nanostructures on silicon surface without using a masking process for antireflection purpose. Reactive gases comprising chlorine (Cl2), sulfur hexafluoride (SF6), and oxygen (O2) were activated by radio-frequency plasma in an RIE system at a typical pressure of 120-130 mTorr to fabricate the nanoscale pyramids. Poly-Si wafers were etched directly without masking for 6-10 min to create surface nanostructures by varying the compositions of SF6, Cl2, and O2 gas mixtures in the etching process. The wafers were then treated with acid (KOH:H2O = 1:1) for 1 min to remove the damage layer (100 nm) induced by dry etching. The damage layer significantly reduced the solar cell efficiencies by affecting the electrical properties of the surface layer. The light reflectivity from the surface after acid treatment could be significantly reduced to <10% for the wavelengths between 500 and 900 nm. The effects of RIE and surface treatment conditions on the surface nanostructures and the optical performance as well as the efficiencies of solar cells will be presented and discussed. The authors have successfully fabricated large-area (156 × 156 mm2) subwavelength antireflection structure on poly-Si substrates, which could improve the solar cell efficiency reproducibly up to 16.27%, higher than 15.56% using wet etching.

  11. Gala: A Python package for galactic dynamics

    Science.gov (United States)

    Price-Whelan, Adrian M.

    2017-10-01

    Gala is an Astropy-affiliated Python package for galactic dynamics. Python enables wrapping low-level languages (e.g., C) for speed without losing flexibility or ease-of-use in the user-interface. The API for Gala was designed to provide a class-based and user-friendly interface to fast (C or Cython-optimized) implementations of common operations such as gravitational potential and force evaluation, orbit integration, dynamical transformations, and chaos indicators for nonlinear dynamics. Gala also relies heavily on and interfaces well with the implementations of physical units and astronomical coordinate systems in the Astropy package (astropy.units and astropy.coordinates). Gala was designed to be used by both astronomical researchers and by students in courses on gravitational dynamics or astronomy. It has already been used in a number of scientific publications and has also been used in graduate courses on Galactic dynamics to, e.g., provide interactive visualizations of textbook material.

  12. Emotional response towards food packaging

    DEFF Research Database (Denmark)

    Liao, Lewis Xinwei; Corsi, Armando M.; Chrysochou, Polymeros

    2015-01-01

    In this paper we investigate consumers’ emotional responses to food packaging. More specifically, we use self-report and physiological measures to jointly assess emotional responses to three typical food packaging elements: colours (lowwavelength vs. high-wavelength), images (positive vs. negative......) and typefaces (simple vs. ornate). A sample of 120 participants was exposed to mock package design concepts of chocolate blocks. The results suggest that images generate an emotional response that can be measured by both self-report and physiological measures, whereas colours and typefaces generate emotional...... response that can only be measured by self-report measures. We propose that a joint application of selfreport and physiological measures can lead to richer information and wider interpretation of consumer emotional responses to food packaging elements than using either measure alone....

  13. New Packaging for Amplifier Slabs

    Energy Technology Data Exchange (ETDEWEB)

    Riley, M. [Lawrence Livermore National Lab. (LLNL), Livermore, CA (United States); Thorsness, C. [Lawrence Livermore National Lab. (LLNL), Livermore, CA (United States); Suratwala, T. [Lawrence Livermore National Lab. (LLNL), Livermore, CA (United States); Steele, R. [Lawrence Livermore National Lab. (LLNL), Livermore, CA (United States); Rogowski, G. [Lawrence Livermore National Lab. (LLNL), Livermore, CA (United States)

    2015-03-18

    The following memo provides a discussion and detailed procedure for a new finished amplifier slab shipping and storage container. The new package is designed to maintain an environment of <5% RH to minimize weathering.

  14. Waste forms, packages, and seals working group summary

    Energy Technology Data Exchange (ETDEWEB)

    Sridhar, N. [Center Antonio, TX (United States); McNeil, M.B. [Nuclear Regulatory Commission, Washington, DC (United States)

    1995-09-01

    This article is a summary of the proceedings of a group discussion which took place at the Workshop on the Role of Natural Analogs in Geologic Disposal of High-Level Nuclear Waste in San Antonio, Texas on July 22-25, 1991. The working group concentrated on the subject of radioactive waste forms and packaging. Also included is a description of the use of natural analogs in waste packaging, container materials and waste forms.

  15. The wettability between etching solutions and the surface of multicrystalline silicon wafer during metal-assisted chemical etching process

    Science.gov (United States)

    Niu, Y. C.; Liu, Z.; Liu, X. J.; Gao, Y.; Lin, W. L.; Liu, H. T.; Jiang, Y. S.; Ren, X. K.

    2017-01-01

    In order to investigate the wettability of multicrystalline silicon (mc-Si) with the etching solutions during metal-assisted chemical etching process, different surface structures were fabricated on the p-type multi-wire slurry sawn mc-Si wafers, such as as-cut wafers, polished wafers, and wafers etched in different solutions. The contact angles of different etching solutions on the surfaces of the wafers were measured. It was noted that all contact angles of etching solutions were smaller than the corresponding ones of deionized water, but the contact angles of different etching solutions were quite different. Among the contact angles of the etching solutions of AgNO3-HF, H2O2-HF, TMAH and HNO3-HF, the contact angle of TMAH solution was much larger than the others and that of HNO3-HF solution was much smaller. It is suggested that the larger contact angle may lead to an unevenly etching of silicon wafer due to the long retention of big bubbles on the wafers in the etching reaction, which should be paid attention to and overcome.

  16. AliPDU Package Upgrade

    CERN Document Server

    "Martin, Michael

    2015-01-01

    "AliPDU Package" is a set of script, panels, and datapoints designed in WinCC to manage and monitor PDU's. PDU is an essential component in the data center, in order to make data center working properly through the monitoring of power distribution and environmental condition of the data center. In this project "AliPDU Package" is upgraded so it can be used to monitor environmental condition of data center using PDU's and external environmental sensor connected to PDU.

  17. AliPDU Package Upgrade

    CERN Document Server

    Martin, Michael

    2015-01-01

    AliPDU Package is a set of script, panels, and datapoints designed in WinCC to manage and monitor PDU's. PDU is an essential component in the data center, in order to make data center working properly through the monitoring of power distribution and environmental condition of the data center. In this project "AliPDU Package" is upgraded so it can be used to monitor environmental condition of data center using PDU's and external environmental sensor connected to PDU.

  18. Food Packaging for Sustainable Development

    OpenAIRE

    Williams, Helén

    2011-01-01

    Packaging has been on the environmental agenda for decades. It has been discussed and debated within the society mainly as an environmental problem. Production, distribution and consumption of food and drinks contribute significant to the environmental impact. However, consumers in the EU waste about 20% of the food they buy. The function of packaging in reducing the amount of food losses is an important but often neglected environmental issue. This thesis focuses on the functions of packagin...

  19. Watermarking spot colors in packaging

    Science.gov (United States)

    Reed, Alastair; Filler, TomáÅ.¡; Falkenstern, Kristyn; Bai, Yang

    2015-03-01

    In January 2014, Digimarc announced Digimarc® Barcode for the packaging industry to improve the check-out efficiency and customer experience for retailers. Digimarc Barcode is a machine readable code that carries the same information as a traditional Universal Product Code (UPC) and is introduced by adding a robust digital watermark to the package design. It is imperceptible to the human eye but can be read by a modern barcode scanner at the Point of Sale (POS) station. Compared to a traditional linear barcode, Digimarc Barcode covers the whole package with minimal impact on the graphic design. This significantly improves the Items per Minute (IPM) metric, which retailers use to track the checkout efficiency since it closely relates to their profitability. Increasing IPM by a few percent could lead to potential savings of millions of dollars for retailers, giving them a strong incentive to add the Digimarc Barcode to their packages. Testing performed by Digimarc showed increases in IPM of at least 33% using the Digimarc Barcode, compared to using a traditional barcode. A method of watermarking print ready image data used in the commercial packaging industry is described. A significant proportion of packages are printed using spot colors, therefore spot colors needs to be supported by an embedder for Digimarc Barcode. Digimarc Barcode supports the PANTONE spot color system, which is commonly used in the packaging industry. The Digimarc Barcode embedder allows a user to insert the UPC code in an image while minimizing perceptibility to the Human Visual System (HVS). The Digimarc Barcode is inserted in the printing ink domain, using an Adobe Photoshop plug-in as the last step before printing. Since Photoshop is an industry standard widely used by pre-press shops in the packaging industry, a Digimarc Barcode can be easily inserted and proofed.

  20. Packaging food for radiation processing

    Science.gov (United States)

    Komolprasert, Vanee

    2016-12-01

    Irradiation can play an important role in reducing pathogens that cause food borne illness. Food processors and food safety experts prefer that food be irradiated after packaging to prevent post-irradiation contamination. Food irradiation has been studied for the last century. However, the implementation of irradiation on prepackaged food still faces challenges on how to assess the suitability and safety of these packaging materials used during irradiation. Irradiation is known to induce chemical changes to the food packaging materials resulting in the formation of breakdown products, so called radiolysis products (RP), which may migrate into foods and affect the safety of the irradiated foods. Therefore, the safety of the food packaging material (both polymers and adjuvants) must be determined to ensure safety of irradiated packaged food. Evaluating the safety of food packaging materials presents technical challenges because of the range of possible chemicals generated by ionizing radiation. These challenges and the U.S. regulations on food irradiation are discussed in this article.

  1. Antimicrobial Food Packaging: Potential & Pitfalls

    Directory of Open Access Journals (Sweden)

    BHANU eMALHOTRA

    2015-06-01

    Full Text Available Nowadays food preservation, quality maintenance, and safety are major growing concerns of the food industry. It is evident that over time consumers’ demand for natural and safe food products with stringent regulations to prevent food-borne infectious diseases. Antimicrobial packaging which is thought to be a subset of active packaging and controlled release packaging is one such promising technology which effectively impregnates the antimicrobial into the food packaging film material and subsequently delivers it over the stipulated period of time to kill the pathogenic microorganisms affecting food products thereby increasing the shelf life to severe folds. This paper presents a picture of the recent research on antimicrobial agents that are aimed at enhancing and improving food quality and safety by reduction of pathogen growth and extension of shelf life, in a form of a comprehensive review. Examination of the available antimicrobial packaging technologies is also presented along with their significant impact on food safety. This article entails various antimicrobial agents for commercial applications, as well as the difference between the use of antimicrobials under laboratory scale and real time applications. Development of resistance amongst microorganisms is considered as a future implication of antimicrobials with an aim to come up with actual efficacies in extension of shelf life as well as reduction in bacterial growth through the upcoming and promising use of antimicrobials in food packaging for the forthcoming research down the line.

  2. Iterative learning control for synchronization of reticle stage and wafer stage in step-and-scan lithographic equipment

    Science.gov (United States)

    Li, Lan-lan; Hu, Song; Zhao, Li-xin; Ma, Ping

    2013-08-01

    Lithographic equipments are highly complex machines used to manufacture integrated circuits (ICs). To make larger ICs, a larger lens is required, which, however, is prohibitively expensive. The solution to this problem is to expose a chip not in one flash but in a scanning fashion. For step-and-scan lithographic equipment (wafer scanner), the image quality is decided by many factors, in which synchronization of reticle stage and wafer stage during exposure is a key one. In this paper, the principle of reticle stage and wafer stage was analyzed through investigating the structure of scanners, firstly. While scanning, the reticle stage and wafer stage should scan simultaneously at a high speed and the speed ratio is 1:4. Secondly, an iterative learning controller (ILC) for synchronization of reticle stage and wafer stage is presented. In the controller, a master-slave structure is used, with the wafer stage acting as the master, and the reticle stage as the slave. Since the scanning process of scanner is repetitive, ILC is used to improve tracking performance. A simple design procedure is presented which allows design of the ILC system for the reticle stage and wafer stage independently. Finally, performance of the algorithm is illustrated by simulated on the virtual stages (the reticle stage and wafer stage).The results of simulation experiments and theory analyzing demonstrate that using the proposed controller better synchronization performance can be obtained for the reticle stage and wafer stage in scanner. Theory analysis and experiment shows the method is reasonable and efficient.

  3. Rapid Active Sampling Package

    Science.gov (United States)

    Peters, Gregory

    2010-01-01

    A field-deployable, battery-powered Rapid Active Sampling Package (RASP), originally designed for sampling strong materials during lunar and planetary missions, shows strong utility for terrestrial geological use. The technology is proving to be simple and effective for sampling and processing materials of strength. Although this originally was intended for planetary and lunar applications, the RASP is very useful as a powered hand tool for geologists and the mining industry to quickly sample and process rocks in the field on Earth. The RASP allows geologists to surgically acquire samples of rock for later laboratory analysis. This tool, roughly the size of a wrench, allows the user to cut away swaths of weathering rinds, revealing pristine rock surfaces for observation and subsequent sampling with the same tool. RASPing deeper (.3.5 cm) exposes single rock strata in-situ. Where a geologist fs hammer can only expose unweathered layers of rock, the RASP can do the same, and then has the added ability to capture and process samples into powder with particle sizes less than 150 microns, making it easier for XRD/XRF (x-ray diffraction/x-ray fluorescence). The tool uses a rotating rasp bit (or two counter-rotating bits) that resides inside or above the catch container. The container has an open slot to allow the bit to extend outside the container and to allow cuttings to enter and be caught. When the slot and rasp bit are in contact with a substrate, the bit is plunged into it in a matter of seconds to reach pristine rock. A user in the field may sample a rock multiple times at multiple depths in minutes, instead of having to cut out huge, heavy rock samples for transport back to a lab for analysis. Because of the speed and accuracy of the RASP, hundreds of samples can be taken in one day. RASP-acquired samples are small and easily carried. A user can characterize more area in less time than by using conventional methods. The field-deployable RASP used a Ni

  4. CONSUMERS’ BEHAVIOURS RELATED TO PACKAGING AND THEIR ATTITUDES TOWARDS ENVIRONMENT

    Directory of Open Access Journals (Sweden)

    Marzena Jeżewska-Zychowicz

    2015-09-01

    Full Text Available The aim of the research was to establish the relationship between the attitude of consumers towards the environment and their behaviours when choosing food products taking into consideration their packaging. This relationship was established according to gender, age and the educational level of the consumers. Questionnaire study was carried out in 2010 within 548 adults from Warsaw. Participants were asked questions on attitudes towards environment and behaviours related to reduction of packaging waste. Frequency, factor and cluster analysis were used. Signifi cantly more women than men agreed that buying pro ducts in larger packages and beverages in glass bottles can reduce the amount of garbage. Over twice more people with positive attitude claimed not buying food in disposable plastic or paper packaging. Negative attitude fostered doing nothing to minimize waste packaging. Attitudes towards the environment have had signifi - cant impact on the choice of food packaging. More positive attitudes favoured the reduction of the amount of packaging waste. Thus, environmental campaigns focused on attitudes and environmentally relevant use of food packing are required.

  5. Dynamics of gas levels inside packages containing minimally processed Pera orange Dinâmica dos níveis gasosos dentro de embalagens contendo laranja Pera minimamente processada

    Directory of Open Access Journals (Sweden)

    Maria Cecília de Arruda Palharini

    2012-12-01

    Full Text Available The purpose of this study was to evaluate the changes in concentrations of O2 and CO2 inside packages of minimally processed Pera orange. Previously selected oranges that were washed, sanitized, and chilled were peeled using hydrothermal treatment (immersion of fruits in water at 50 °C for 8 minutes. The peeled oranges were then packed in five different plastic packages under passive and active modified atmosphere (5% O2 + 10% CO2 + 85% N2. The fruits were stored at 6 °C and 12 °C. The package headspace gas composition was evaluated for twelve days at 6 °C and nine days at 12 °C. The polypropylene film (32 µm promoted modified atmosphere similar to that initially injected (5% O2 + 10% CO2 + 85% N2 at 6 °C and 12 °C. With regard to the atmosphere modification system, the injection of a gas mixture anticipated achieving an equilibrium atmosphere inside the packages at 12 °C. At 6 °C, the gas composition inside the packages was kept close to that of the injection, but the equilibrium was not verified.O objetivo deste trabalho foi avaliar as mudanças nas concentrações de O2 e CO2 do interior de embalagens contendo laranja Pera minimamente processada. Laranjas previamente selecionadas, lavadas, sanitizadas e resfriadas foram descascadas por meio de tratamento hidrotérmico (imersão dos frutos em água a 50 °C por 8 minutos. Laranjas descascadas foram acondicionadas em cinco materiais de embalagem sob atmosfera modificada passiva e atmosfera modificada ativa (5% O2 + 10% CO2 + 85% N2. O armazenamento dos frutos foi realizado a 6 °C e 12 °C. A composição gasosa no interior das embalagens foi avaliada durante doze dias a 6 °C e durante 9 dias a 12 °C. O filme de polipropileno (32 µm propiciou atmosfera modificada semelhante injetada inicialmente (5% O2 + 10% CO2 + 85% N2 a 6 °C e 12 °C. Em relação ao sistema de modificação da atmosfera, a injeção de mistura gasosa antecipou a atmosfera de equilíbrio, dentro das embalagens

  6. Prevention policies addressing packaging and packaging waste: Some emerging trends.

    Science.gov (United States)

    Tencati, Antonio; Pogutz, Stefano; Moda, Beatrice; Brambilla, Matteo; Cacia, Claudia

    2016-10-01

    Packaging waste is a major issue in several countries. Representing in industrialized countries around 30-35% of municipal solid waste yearly generated, this waste stream has steadily grown over the years even if, especially in Europe, specific recycling and recovery targets have been fixed. Therefore, an increasing attention starts to be devoted to prevention measures and interventions. Filling a gap in the current literature, this explorative paper is a first attempt to map the increasingly important phenomenon of prevention policies in the packaging sector. Through a theoretical sampling, 11 countries/states (7 in and 4 outside Europe) have been selected and analyzed by gathering and studying primary and secondary data. Results show evidence of three specific trends in packaging waste prevention policies: fostering the adoption of measures directed at improving packaging design and production through an extensive use of the life cycle assessment; raising the awareness of final consumers by increasing the accountability of firms; promoting collaborative efforts along the packaging supply chains. Copyright © 2016 Elsevier Ltd. All rights reserved.

  7. 9 CFR 381.144 - Packaging materials.

    Science.gov (United States)

    2010-01-01

    ... 9 Animals and Animal Products 2 2010-01-01 2010-01-01 false Packaging materials. 381.144 Section... Packaging materials. (a) Edible products may not be packaged in a container which is composed in whole or in... to health. All packaging materials must be safe for the intended use within the meaning of section...

  8. Chemical strategies for modifications of the solar cell process, from wafering to emitter diffusion; Chemische Ansaetze zur Neuordnung des Solarzellenprozesses ausgehend vom Wafering bis hin zur Emitterdiffusion

    Energy Technology Data Exchange (ETDEWEB)

    Mayer, Kuno

    2009-11-06

    The paper describes the classic standard industrial solar cell based on monocrystalline silicon and describes new methods of fabrication. The first is an alternative wafering concept using laser microjet cutting instead of multiwire cutting. This method originally uses pure, deionized water; it was modified so that the liquid jet will not only be a liquid light conductor but also a transport medium for etching fluids supporting thermal abrasion of silicon by the laser jet. Two etching fluids were tested experimentally; it was found that water-free fluids based on perfluorinated solvents with very slight additions of gaseous chlorine are superior to all other options. In the second section, the wet chemical process steps between wafering and emitter diffusion (i.e. the first high-temperature step) was to be modified. Alternatives to 2-propanol were to be found in the experimental part. Purification after texturing was to be rationalized in order to reduce the process cost, either by using less chemical substances or by achieving shorter process times. 1-pentanol and p-toluolsulfonic acid were identified as two potential alternatives to 2-propanol as texture additives. Finally, it could be shown that wire-cut substrates processed with the new texturing agents have higher mechanical stabilities than substrates used with the classic texturing agent 2-propanol. [German] Im ersten Kapitel wird die klassische Standard-Industrie-Solarzelle auf der Basis monokristallinen Siliziums vorgestellt. Der bisherige Herstellungsprozess der Standard-Industrie-Solarzelle, der in wesentlichen Teilen darauf abzielt, diese Verluste zu minimieren, dient als Referenz fuer die Entwicklung neuer Fertigungsverfahren, wie sie in dieser Arbeit vorgestellt werden. Den ersten thematischen Schwerpunkt bildet die Entwicklung eines alternativen Wafering-Konzeptes zum Multi-Drahtsaegen. Die Basis des neuen, hier vorgestellten Wafering-Prozesses bildet das Laser-Micro-Jet-Verfahren. Dieses System

  9. A new method for wafer quality monitoring using semiconductor process big data

    Science.gov (United States)

    Sohn, Younghoon; Lee, Hyun; Yang, Yusin; Jun, Chungsam

    2017-03-01

    In this paper we proposed a new semiconductor quality monitoring methodology - Process Sensor Log Analysis (PSLA) - using process sensor data for the detection of wafer defectivity and quality monitoring. We developed exclusive key parameter selection algorithm and user friendly system which is able to handle large amount of big data very effectively. Several production wafers were selected and analyzed based on the risk analysis of process driven defects, for example alignment quality of process layers. Thickness of spin-coated material can be measured using PSLA without conventional metrology process. In addition, chip yield impact was verified by matching key parameter changes with electrical die sort (EDS) fail maps at the end of the production step. From this work, we were able to determine that process robustness and product yields could be improved by monitoring the key factors in the process big data.

  10. Fabrication of capacitive micromachined ultrasonic transducers based on adhesive wafer bonding technique

    Science.gov (United States)

    Li, Zhenhao; Wong, Lawrence L. P.; Chen, Albert I. H.; Na, Shuai; Sun, Jame; Yeow, John T. W.

    2016-11-01

    This paper reports the fabrication process of wafer bonded capacitive micromachined ultrasonic transducers (CMUTs) using photosensitive benzocyclobutene as a polymer adhesive. Compared with direct bonding and anodic bonding, polymer adhesive bonding provides good tolerance to wafer surface defects and contamination. In addition, the low process temperature of 250 °C is compatible with standard CMOS processes. Single-element CMUTs consisting of cells with a diameter of 46 µm and a cavity depth of 323 nm were fabricated. In-air and immersion acoustic characterizations were performed on the fabricated CMUTs, demonstrating their capability for transmitting and receiving ultrasound signals. An in-air resonance frequency of 5.47 MHz was measured by a vibrometer under a bias voltage of 300 V.

  11. Silicon Wafer Fabrication and Microchannel for Cooling System in ALICE ITS

    CERN Document Server

    Pasuwan, Patrawan

    2013-01-01

    My summer student project covered details of the upgrade of Inner Tracking System (ITS) of the ALICE detector. The tasks are divided in two parts. First was on silicon wafer dicing technology and its resistivity under the supervision of Petra Riedler. Next was on silicon wafer microfabrication and cooling system in microchannel under the supervision of Andrea Francescon. ITS upgrade was proposed for better detection performance and reduction of budget. Detectors in the ITS are composed of monolithic silicon pixel chips. The thickness of the chips was proposed to be 50 μm so that particles that pass through them do not lose too much momentum. Working with very thin chips requires suitable dicing technology. Sum- mary of dicing technology is proposed for the most suitable dicing technique. Properties of the chip can be denoted by observing its resistivity. Literature reviews on surface resistivity profile measurement is represented for consideration. Cooling system is very important for the detector. Fluid t...

  12. Silicon Chemical Vapor Deposition Process Using a Half-Inch Silicon Wafer for Minimal Manufacturing System

    Science.gov (United States)

    Li, Ning; Habuka, Hitoshi; Ikeda, Shin-ichi; Hara, Shiro

    A chemical vapor deposition reactor for producing thin silicon films was designed and developed for achieving a new electronic device production system, the Minimal Manufacturing, using a half-inch wafer. This system requires a rapid process by a small footprint reactor. This was designed and verified by employing the technical issues, such as (i) vertical gas flow, (ii) thermal operation using a highly concentrated infrared flux, and (iii) reactor cleaning by chlorine trifluoride gas. The combination of (i) and (ii) could achieve a low heating power and a fast cooling designed by the heat balance of the small wafer placed at a position outside of the reflector. The cleaning process could be rapid by (iii). The heating step could be skipped because chlorine trifluoride gas was reactive at any temperature higher than room temperature.

  13. Use of Optical Oxygen Sensors in Non-Destructively Determining the Levels of Oxygen Present in Combined Vacuum and Modified Atmosphere Packaged Pre-Cooked Convenience-Style Foods and the Use of Ethanol Emitters to Extend Product Shelf-Life

    Directory of Open Access Journals (Sweden)

    Andreas W. Hempel

    2013-11-01

    Full Text Available O2 sensors were used to non-destructively monitor O2 levels in commercially packed pre-cooked, convenience modified atmosphere packaging (MAP foods. A substantial level of O2 (>15% was present in packs resulting in a shorter than expected shelf-life, where the primary spoilage mechanism was found to be mould. Various combinations of vacuum (0–0.6 MPa and gas flush (0.02–0.03 MPa (30% CO2/70% N2 settings were assessed as treatments that result in the desired shelf-life (28 days. This was achieved using the combined treatment of vacuum 0.35 MPa and gas flush 0.02 MPa which resulted in a reduction of 6%–9% O2 in all three samples (battered sausages (BS, bacon slices (BA, and meat and potato pies (PP. Reduced O2 levels reflect the microbial quality of products, which has been successfully reduced. Duplicate samples of all product packs were produced using ethanol emitters (EE to see if shelf-life could be further extended. Results showed a further improvement in shelf-life to 35 days. Sensory analysis showed that ethanol flavour and aroma was not perceived by panellists in two of the three products assessed. This study demonstrates how smart packaging technologies, both intelligent and active, can be used to assist in the modification of conventional packaging systems in order to enhance product quality and safety and through the extension of product shelf-life.

  14. Humidity Data for 9975 Shipping Packages with Softwood Fiberboard

    Energy Technology Data Exchange (ETDEWEB)

    Daugherty, W. L. [Savannah River Site (SRS), Aiken, SC (United States). Savannah River National Lab. (SRNL)

    2017-01-12

    The 9975 surveillance program is developing a technical basis to support extending the storage period of 9975 packages in K-Area Complex beyond the currently approved 15 years. A key element of this effort is developing a better understanding of degradation of the fiberboard assembly under storage conditions. This degradation is influenced greatly by the moisture content of the fiberboard, which is not well characterized on an individual package basis. Direct measurements of humidity and fiberboard moisture content have been made on two test packages with softwood fiberboard and varying internal heat levels from 0 up to 19W. Comparable measurements with cane fiberboard have been reported previously. With an internal heat load, a temperature gradient in the fiberboard assembly leads to varying relative humidity in the air around the fiberboard. However, the absolute humidity tends to remain approximately constant throughout the package, especially at lower heat loads.

  15. Effects of packaging methods on shelf life of ratite meats

    Directory of Open Access Journals (Sweden)

    Horbańczuk Olaf K.

    2017-09-01

    Full Text Available Over the last years a growing demand for ratite meat, including ostrich, emu, and rhea has been observed in the world. Ratite meat is recognised as a dietetic product because of low level of fat, high share of PUFA, favourable n6/n3 ratio, and higher amounts of iron content in comparison with beef and chicken meat. The abundance of bioactive compounds, e.g. PUFA, makes ratite meat highly susceptible to oxidation processes. Moreover, pH over 6 creates favourable environment for fast microbial growth during storage conditions affecting its shelf life. However, availability of information on ratite meat shelf life among consumers and industry is still limited. Thus, the aim of the present review is to provide current information about the effect of ratite meat packaging type, i.e. air packaging, vacuum packaging with skin pack, modified atmosphere packaging (MAP, on its shelf life quality during storage, including technological and nutritional properties.

  16. Defense Waste Processing Facility Process Simulation Package Life Cycle

    Energy Technology Data Exchange (ETDEWEB)

    Reuter, K.

    1991-12-31

    The Defense Waste Processing Facility (DWPF) will be used to immobilize high level liquid radioactive waste into safe, stable, and manageable solid form. The complexity and classification of the facility requires that a performance based operator training to satisfy Department of Energy orders and guidelines. A major portion of the training program will be the application and utilization of Process Simulation Packages to assist in training the Control Room Operators on the fluctionality of the process and the application of the Distribution Control System (DCS) in operating and managing the DWPF process. The packages are being developed by the DWPF Computer and Information Systems Simulation Group. This paper will describe the DWPF Process Simulation Package Life Cycle. The areas of package scope, development, validation, and configuration management will be reviewed and discussed in detail.

  17. Wafer-scale fabrication of glass-FEP-glass microfluidic devices for lipid bilayer experiments.

    Science.gov (United States)

    Bomer, Johan G; Prokofyev, Alexander V; van den Berg, Albert; Le Gac, Séverine

    2014-12-07

    We report a wafer-scale fabrication process for the production of glass-FEP-glass microdevices using UV-curable adhesive (NOA81) as gluing material, which is applied using a novel "spin & roll" approach. Devices are characterized for the uniformity of the gluing layer, presence of glue in the microchannels, and alignment precision. Experiments on lipid bilayers with electrophysiological recordings using a model pore-forming polypeptide are demonstrated.

  18. Uncertainty of a hybrid surface temperature sensor for silicon wafers and comparison with an embedded thermocouple.

    Science.gov (United States)

    Iuchi, Tohru; Gogami, Atsushi

    2009-12-01

    We have developed a user-friendly hybrid surface temperature sensor. The uncertainties of temperature readings associated with this sensor and a thermocouple embedded in a silicon wafer are compared. The expanded uncertainties (k=2) of the hybrid temperature sensor and the embedded thermocouple are 2.11 and 2.37 K, respectively, in the temperature range between 600 and 1000 K. In the present paper, the uncertainty evaluation and the sources of uncertainty are described.

  19. Influence of Si wafer thinning processes on (sub)surface defects

    Science.gov (United States)

    Inoue, Fumihiro; Jourdain, Anne; Peng, Lan; Phommahaxay, Alain; De Vos, Joeri; Rebibis, Kenneth June; Miller, Andy; Sleeckx, Erik; Beyne, Eric; Uedono, Akira

    2017-05-01

    Wafer-to-wafer three-dimensional (3D) integration with minimal Si thickness can produce interacting multiple devices with significantly scaled vertical interconnections. Realizing such a thin 3D structure, however, depends critically on the surface and subsurface of the remaining backside Si after the thinning processes. The Si (sub)surface after mechanical grinding has already been characterized fruitfully for a range of few dozen of μm. Here, we expand the characterization of Si (sub)surface to 5 μm thickness after thinning process on dielectric bonded wafers. The subsurface defects and damage layer were investigated after grinding, chemical mechanical polishing (CMP), wet etching and plasma dry etching. The (sub)surface defects were characterized using transmission microscopy, atomic force microscopy, and positron annihilation spectroscopy. Although grinding provides the fastest removal rate of Si, the surface roughness was not compatible with subsequent processing. Furthermore, mechanical damage such as dislocations and amorphous Si cannot be reduced regardless of Si thickness and thin wafer handling systems. The CMP after grinding showed excellent performance to remove this grinding damage, even though the removal amount is 1 μm. For the case of Si thinning towards 5 μm using grinding and CMP, the (sub)surface is atomic scale of roughness without vacancy. For the case of grinding + dry etch, vacancy defects were detected in subsurface around 0.5-2 μm. The finished surface after wet etch remains in the nm scale in the strain region. By inserting a CMP step in between grinding and dry etch it is possible to significantly reduce not only the roughness, but also the remaining vacancies at the subsurface. The surface of grinding + CMP + dry etching gives an equivalent mono vacancy result as to that of grinding + CMP. This combination of thinning processes allows development of extremely thin 3D integration devices with minimal roughness and vacancy surface.

  20. Fabrication of a mechanically aligned single-wafer MEMS turbine with turbocharger

    Science.gov (United States)

    Pelekies, S. O.; Schuhmann, T.; Gardner, W. G.; Camacho, A.; Protz, J. M.

    2010-10-01

    We describe the fabrication of a turbocharged, microelectromechanical system (MEMS) turbine. The turbine will be part of a standalone power unit and includes extra layers to connect the turbine to a generator. The project goal is to demonstrate the successful combination of several features, namely: silicon fusion bonding (SFB), a micro turbocharger [2], two rotors, mechanical alignment between two wafers [1], and the use of only one 5" silicon wafer. The dimension of the actual turbine casing will be 14mm. The turbine rotor will have a diameter of 8mm. Given these dimensions, MEMS processes are an adequate way to fabricate the device, but it will be necessary to stack up seven different layers to build the turbine, as it is not possible to construct it out of one thick wafer. SFB will be used for bonding because it permits the great precision necessary for high quality alignment. Yet a more precise alignment will be necessary between the layers that contain the turbine rotor, to decrease imbalance and guarantee operation at a very high rpm. To achieve these tight tolerances, a mechanical alignment feature announced by Liudi Jiang [1] is used. The alignment accuracy is expected to be around 200nm. Despite the fact that the turbine consists of multiple layers, it will be fabricated on only one silicon-on-insulator (SOI) wafer. As a result, all layers are exposed to the same process flow. The fabrication process includes MEMS technology as photolithography, nine deep reactive ion etching (DRIE) steps, and six SFB operations. A total of 14 masks are necessary for the fabrication.