WorldWideScience

Sample records for test circuit fsp-ptc

  1. Load testing circuit

    DEFF Research Database (Denmark)

    2009-01-01

    A load testing circuit a circuit tests the load impedance of a load connected to an amplifier. The load impedance includes a first terminal and a second terminal, the load testing circuit comprising a signal generator providing a test signal of a defined bandwidth to the first terminal of the load...

  2. Nanoelectronic circuit design and test

    Science.gov (United States)

    Simsir, Muzaffer Orkun

    Controlling power consumption in CMOS integrated circuits (ICs) during normal mode of operation is becoming one of the limiting factors to further scaling. In addition, it is a well known fact that during testing of a complex IC, power consumption can far exceed the values reached during its normal operation. High power consumption, combined with limited cooling support, leads to overheating of ICs. This can cause permanent damage to the chip or can invalidate test results due to the fact that extreme temperature variations lead to changes in path delays. Therefore, even good chips can fail the test. For these reasons, thermal problems during test need to be identified to prevent the loss of yield in CMOS ICs. In this thesis, we propose a methodology for thermally characterizing circuits under test. Using this methodology, it is possible to simulate the thermal profiles of the chips during test and prevent possible yield loss because of thermal problems. In addition to the problems associated with power and temperature, a more important barrier is the scaling limitations of the CMOS technology. It has been predicted that in next decade, it will not be possible to scale it further. In the near future, rather than a transition to a completely new technology, extensions to CMOS seem to be more realistic. Double-gate CMOS technology is one of the most promising alternatives that offers a simple extension to CMOS. The transistors of this technology are formed by adding a second gate across the conventional CMOS transistor gate. Designing circuits using this technology has attracted a lot of attention. However, as circuit design methods mature, there is a need to identify how these circuits can be tested. From a circuit testing viewpoint, it is unclear if CMOS fault models are comprehensive enough to model all defects in double-gate CMOS circuits. Therefore, fault models of this technology need to be defined to enable manufacturing-time testing. In this thesis, we

  3. Instrumentation and test gear circuits manual

    CERN Document Server

    Marston, R M

    2013-01-01

    Instrumentation and Test Gear Circuits Manual provides diagrams, graphs, tables, and discussions of several types of practical circuits. The practical circuits covered in this book include attenuators, bridges, scope trace doublers, timebases, and digital frequency meters. Chapter 1 discusses the basic instrumentation and test gear principles. Chapter 2 deals with the design of passive attenuators, and Chapter 3 with passive and active filter circuits. The subsequent chapters tackle 'bridge' circuits, analogue and digital metering techniques and circuitry, signal and waveform generation, and p

  4. An introduction to logic circuit testing

    CERN Document Server

    Lala, Parag K

    2008-01-01

    An Introduction to Logic Circuit Testing provides a detailed coverage of techniques for test generation and testable design of digital electronic circuits/systems. The material covered in the book should be sufficient for a course, or part of a course, in digital circuit testing for senior-level undergraduate and first-year graduate students in Electrical Engineering and Computer Science. The book will also be a valuable resource for engineers working in the industry. This book has four chapters. Chapter 1 deals with various types of faults that may occur in very large scale integration (VLSI)

  5. LS1 Report: short-circuit tests

    CERN Document Server

    Katarina Anthony

    2014-01-01

    As the LS1 draws to an end, teams move from installation projects to a phase of intense testing. Among these are the so-called 'short-circuit tests'. Currently under way at Point 7, these tests verify the cables, the interlocks, the energy extraction systems, the power converters that provide current to the superconducting magnets and the cooling system.   Thermal camera images taken during tests at point 4 (IP4). Before putting beam into the LHC, all of the machine's hardware components need to be put to the test. Out of these, the most complicated are the superconducting circuits, which have a myriad of different failure modes with interlock and control systems. While these will be tested at cold - during powering tests to be done in August - work can still be done beforehand. "While the circuits in the magnets themselves cannot be tested at warm, what we can do is verify the power converter and the circuits right up to the place the cables go into the magn...

  6. Submicrosecond Power-Switching Test Circuit

    Science.gov (United States)

    Folk, Eric N.

    2006-01-01

    A circuit that changes an electrical load in a switching time shorter than 0.3 microsecond has been devised. This circuit can be used in testing the regulation characteristics of power-supply circuits . especially switching power-converter circuits that are supposed to be able to provide acceptably high degrees of regulation in response to rapid load transients. The combination of this power-switching circuit and a known passive constant load could be an attractive alternative to a typical commercially available load-bank circuit that can be made to operate in nominal constant-voltage, constant-current, and constant-resistance modes. The switching provided by a typical commercial load-bank circuit in the constant-resistance mode is not fast enough for testing of regulation in response to load transients. Moreover, some test engineers do not trust the test results obtained when using commercial load-bank circuits because the dynamic responses of those circuits are, variously, partly unknown and/or excessively complex. In contrast, the combination of this circuit and a passive constant load offers both rapid switching and known (or at least better known) load dynamics. The power-switching circuit (see figure) includes a signal-input section, a wide-hysteresis Schmitt trigger that prevents false triggering in the event of switch-contact bounce, a dual-bipolar-transistor power stage that drives the gate of a metal oxide semiconductor field-effect transistor (MOSFET), and the MOSFET, which is the output device that performs the switching of the load. The MOSFET in the specific version of the circuit shown in the figure is rated to stand off a potential of 100 V in the "off" state and to pass a current of 20 A in the "on" state. The switching time of this circuit (the characteristic time of rise or fall of the potential at the drain of the MOSFET) is .300 ns. The circuit can accept any of three control inputs . which one depending on the test that one seeks to perform: a

  7. LHC Report: superconducting circuit powering tests

    CERN Multimedia

    Mirko Pojer

    2015-01-01

    After the long maintenance and consolidation campaign carried out during LS1, the machine is getting ready to start operation with beam at 6.5 TeV… the physics community can’t wait! Prior to this, all hardware and software systems have to be tested to assess their correct and safe operation.   Most of the cold circuits (those with high current/stored energy) possess a sophisticated magnet protection system that is crucial to detect a transition of the coil from the superconducting to the normal state (a quench) and safely extract the energy stored in the circuits (about 1 GJ per dipole circuit at nominal current). LHC operation relies on 1232 superconducting dipoles with a field of up to 8.33 T operating in superfluid helium at 1.9 K, along with more than 500 superconducting quadrupoles operating at 4.2 or 1.9 K. Besides, many other superconducting and normal resistive magnets are used to guarantee the possibility of correcting all beam parameters, for a total of mo...

  8. Test setups for the development of high voltage circuit breakers for high short circuit capacities

    Science.gov (United States)

    Patzelt, R.; Ruhnau, W.; Zemann, E.

    1981-10-01

    A number of test setups and procedures are described for measuring and simulating the current and voltage conditions prevailing in short circuit breakers designed to interrupt short circuit currents from 80 to 100 kA. A synthetic test circuit was successfully developed, using the principles of both voltage and current injection. A capacitance current injection procedure allows for the establishment of the influence of iron in the magnetic circuit on the prospective transient recovery voltage of the breaker. Methods for measuring the post-arc current are indicated, and developed meshed grid and tube shunts are described. Synthetic test circuits are presented which are suitable for testing the capacitive switching capabilities of breakers.

  9. Test results for SEU and SEL immune memory circuits

    Science.gov (United States)

    Wiseman, D.; Canaris, J.; Whitaker, S.; Gambles, J.; Arave, K.; Arave, L.

    1993-01-01

    Test results for three SEU logic/circuit hardened CMOS memory circuits verify upset and latch-up immunity for two configurations to be in excess of 120 MeV cm(exp 2)/mg using a commercial, non-radiation hardened CMOS process. Test chips from three separate fabrication runs in two different process were evaluated.

  10. Documentation of Stainless Steel Lithium Circuit Test Section Design. Suppl

    Science.gov (United States)

    Godfroy, Thomas J. (Compiler); Martin, James J.

    2010-01-01

    The Early Flight Fission-Test Facilities (EFF-TF) team was tasked by Naval Reactors Prime Contract Team (NRPCT) to design, fabricate, and test an actively pumped lithium (Li) flow circuit. This Li circuit takes advantage of work in progress at the EFF TF on a stainless steel sodium/potassium (NaK) circuit. The effort involved modifying the original stainless steel NaK circuit such that it could be operated with Li in place of NaK. This new design considered freeze/thaw issues and required the addition of an expansion tank and expansion/extrusion volumes in the circuit plumbing. Instrumentation has been specified for Li and circuit heaters have been placed throughout the design to ensure adequate operational temperatures and no uncontrolled freezing of the Li. All major components have been designed and fabricated prior to circuit redesign for Li and were not modified. Basic circuit components include: reactor segment, Li to gas heat exchanger, electromagnetic liquid metal pump, load/drain reservoir, expansion reservoir, instrumentation, and trace heaters. The reactor segment, based on a Los Alamos National Laboratory 100-kW design study with 120 fuel pins, is the only prototypic component in the circuit. However, due to earlier funding constraints, a 37-pin partial-array of the core, including the central three rings of fuel pins (pin and flow path dimensions are the same as those in the full design), was selected for fabrication and test. This Technical Publication summarizes the design and integration of the pumped liquid metal Li flow circuit as of May 1, 2005. This supplement contains drawings, analysis, and calculations

  11. Test set-ups for developing high voltage circuit-breaker for high short-circuit capacities

    Energy Technology Data Exchange (ETDEWEB)

    Patzelt, R.; Ruhnau, W.; Zemann, E.

    1981-10-01

    The increasing short-circuit power in networks requires short-circuit breakers which are capable of interrupting short-circuit currents from 80 to 100 kA. The investigation and research development of a synthetic test circuit according to the principles of voltage- and current-injection respectively for short-circuit currents stated above comprises the first part of this report. The second part deals with the influence of Ferrum in the magnetic circuit on the transient recovery voltage wave form which is not influenced by the arc voltage. Investigations on the measurement of the post-arc current is described in the third chapter. In this case the construction and measurement of meshed grid- and tube shunts represent the major constituent. The fourth and last chapter deals with the investigation of synthetic test circuits in order to prove the capacitive switching capabilities of circuit-breakers. Two different switching circuits were subjected to test and subsequently developed for service.

  12. Short Circuit Tests First Step of LHC Hardware Commissioning Completion

    CERN Document Server

    Barbero-Soto, E; Bordry, Frederick; Casas Lino, M P; Coelingh, G J; Cumer, G; Dahlerup-Petersen, K; Guillaume, J C; Inigo-Golfin, J; Montabonnet, V; Nisbet, D; Pojer, M; Principe, R; Rodríguez-Mateos, F; Saban, R; Schmidt, R; Thiesen, H; Vergara-Fernández, A; Zerlauth, M; Castaneda Serra, A; Romera Ramirez, I

    2008-01-01

    For the two counter rotating beams in the Large Hadron Collider (LHC) about 8000 magnets (main dipole and quadrupole magnets, corrector magnets, separation dipoles, matching section quadrupoles etc.) are powered in about 1500 superconducting electrical circuits. The magnets are powered by power converters that have been designed for the LHC with a current between 60 and 13000A. Between October 2005 and September 2007 the so-called Short Circuit Tests were carried-out in 15 underground zones where the power converters of the superconducting circuits are placed. The tests aimed to qualify the normal conducting equipments of the circuits such as power converters and normal conducting high current cables. The correct operation of interlock and energy extraction systems was validated. The infrastructure systems including AC distribution, water and air cooling and the control systems was also commissioned. In this paper the results of the two year test campaign are summarized with particular attention to problems e...

  13. Elements configuration of the open lead test circuit

    Energy Technology Data Exchange (ETDEWEB)

    Fukuzaki, Yumi, E-mail: 14514@sr.kagawa-nct.ac.jp [Advanced course of Electronics, Information and Communication Engineering, National Institute of Technology, Kagawa College, 551 Koda, Mitoyo, Kagawa (Japan); Ono, Akira [Department of Communication Network Engineering, National Institute of Technology, Kagawa College, 551 Koda, Mitoyo, Kagawa (Japan)

    2016-07-06

    In the field of electronics, small electronic devices are widely utilized because they are easy to carry. The devices have various functions by user’s request. Therefore, the lead’s pitch or the ball’s pitch have been narrowed and high-density printed circuit board has been used in the devices. Use of the ICs which have narrow lead pitch makes normal connection difficult. When logic circuits in the devices are fabricated with the state-of-the-art technology, some faults have occurred more frequently. It can be divided into types of open faults and short faults. We have proposed a new test method using a test circuit in the past. This paper propose elements configuration of the test circuit.

  14. Optimization of the powering tests of the LHC superconducting circuits

    CERN Document Server

    Bellesia, B; Denz, R; Fernandez-Robles, C; Pojer, M; Saban, R; Schmidt, R; Solfaroli Camillocci, M; Thiesen, H; Vergara Fernández, A

    2010-01-01

    The Large Hadron Collider has (LHC) 1572 superconducting circuits which are distributed along the eight 3.5 km LHC sectors [1]. Time and resources during the commissioning of the LHC technical systems were mostly consumed by the powering tests of each circuit. The tests consisted in carrying out several powering cycles at different current levels for each superconducting circuit. The Hardware Commissioning Coordination was in charge of planning, following up and piloting the execution of the test program. The first powering test campaign was carried out in summer 2007 for sector 7-8 with an expected duration of 12 weeks. The experience gained during these tests was used by the commissioning team for minimising the duration of the following powering campaigns to comply with the stringent LHC project deadlines. Improvements concerned several areas: strategy, procedures, control tools, automatization, and resource allocation led to an average daily test rate increase from 25 to 200 tests per day. This paper desc...

  15. Optimal planning of series resistor to control time constant of test circuit for high-voltage AC circuit-breakers

    Directory of Open Access Journals (Sweden)

    Yoon-Ho Kim

    2016-01-01

    Full Text Available The equivalent test circuit that can deliver both short-circuit current and recovery voltage is used to verify the performance of high-voltage circuit breakers. Most of the parameters in this circuit can be obtained by using a simple calculation or a simulation program. The ratings of the circuit breaker include rated short-circuit breaking current, rated short-circuit making current, rated operating sequence of the circuit breaker and rated short-time current. Among these ratings, the short-circuit making capacity of the circuit breaker is expressed in peak value and not in RMS value similar to breaking capacity. A series resistor or super-excitation is used to control the peak value of the short-circuit current in the equivalent test circuit. When using a series resistor, a higher rating of circuit breakers leads to a higher thermal capacity, thereby requiring additional space. Therefore, an effective, optimal design of the series resistor is essential. This paper proposes a method for reducing thermal capacity and selecting the optimal resistance to limit the making current by controlling the DC time constant of the test circuit.

  16. RF and microwave integrated circuit development technology, packaging and testing

    CERN Document Server

    Gamand, Patrice; Kelma, Christophe

    2018-01-01

    RF and Microwave Integrated Circuit Development bridges the gap between existing literature, which focus mainly on the 'front-end' part of a product development (system, architecture, design techniques), by providing the reader with an insight into the 'back-end' part of product development. In addition, the authors provide practical answers and solutions regarding the choice of technology, the packaging solutions and the effects on the performance on the circuit and to the industrial testing strategy. It will also discuss future trends and challenges and includes case studies to illustrate examples. * Offers an overview of the challenges in RF/microwave product design * Provides practical answers to packaging issues and evaluates its effect on the performance of the circuit * Includes industrial testing strategies * Examines relevant RF MIC technologies and the factors which affect the choice of technology for a particular application, e.g. technical performance and cost * Discusses future trends and challen...

  17. Radiation Testing and Evaluation Issues for Modern Integrated Circuits

    Science.gov (United States)

    LaBel, Kenneth A.; Cohn, Lew M.

    2005-01-01

    Abstract. Changes in modern integrated circuit (IC) technologies have modified the way we approach and conduct radiation tolerance and testing of electronics. These changes include scaling of geometries, new materials, new packaging technologies, and overall speed and device complexity challenges. In this short course section, we will identify and discuss these issues as they impact radiation testing, modeling, and effects mitigation of modern integrated circuits. The focus will be on CMOS-based technologies, however, other high performance technologies will be discussed where appropriate. The effects of concern will be: Single-Event Effects (SEE) and steady state total ionizing dose (TID) IC response. However, due to the growing use of opto-electronics in space systems issues concerning displacement damage testing will also be considered. This short course section is not intended to provide detailed "how-to-test" information, but simply provide a snapshot of current challenges and some of the approaches being considered.

  18. ELECTRON AND OPTICAL BEAM TESTING OF INTEGRATED CIRCUITS

    OpenAIRE

    Collin, J.-P.

    1989-01-01

    The evolution of Integrated Circuits technology and architecture is pushing today the associated test and characterization technology to even higher levels. The test must not only present even higher parametric performances like voltage, temporal and spatial resolutions and a good fault coverage but also high level functionalities like a CAD link and automation capabilities. Each and all of these characteristics, when they are identified as measurement and functional performances, need more a...

  19. Digital circuit testing a guide to DFT and other techniques

    CERN Document Server

    Wong, Francis C

    1991-01-01

    Recent technological advances have created a testing crisis in the electronics industry--smaller, more highly integrated electronic circuits and new packaging techniques make it increasingly difficult to physically access test nodes. New testing methods are needed for the next generation of electronic equipment and a great deal of emphasis is being placed on the development of these methods. Some of the techniques now becoming popular include design for testability (DFT), built-in self-test (BIST), and automatic test vector generation (ATVG). This book will provide a practical introduction to

  20. Laser system for testing radiation imaging detector circuits

    Science.gov (United States)

    Zubrzycka, Weronika; Kasinski, Krzysztof

    2015-09-01

    Performance and functionality of radiation imaging detector circuits in charge and position measurement systems need to meet tight requirements. It is therefore necessary to thoroughly test sensors as well as read-out electronics. The major disadvantages of using radioactive sources or particle beams for testing are high financial expenses and limited accessibility. As an alternative short pulses of well-focused laser beam are often used for preliminary tests. There are number of laser-based devices available on the market, but very often their applicability in this field is limited. This paper describes concept, design and validation of laser system for testing silicon sensor based radiation imaging detector circuits. The emphasis is put on keeping overall costs low while achieving all required goals: mobility, flexible parameters, remote control and possibility of carrying out automated tests. The main part of the developed device is an optical pick-up unit (OPU) used in optical disc drives. The hardware includes FPGA-controlled circuits for laser positioning in 2 dimensions (horizontal and vertical), precision timing (frequency and number) and amplitude (diode current) of short ns-scale (3.2 ns) light pulses. The system is controlled via USB interface by a dedicated LabVIEW-based application enabling full manual or semi-automated test procedures.

  1. Wafer-level testing and test during burn-in for integrated circuits

    CERN Document Server

    Bahukudumbi, Sudarshan

    2010-01-01

    Wafer-level testing refers to a critical process of subjecting integrated circuits and semiconductor devices to electrical testing while they are still in wafer form. Burn-in is a temperature/bias reliability stress test used in detecting and screening out potential early life device failures. This hands-on resource provides a comprehensive analysis of these methods, showing how wafer-level testing during burn-in (WLTBI) helps lower product cost in semiconductor manufacturing.Engineers learn how to implement the testing of integrated circuits at the wafer-level under various resource constrain

  2. 30 CFR 75.900-3 - Testing, examination, and maintenance of circuit breakers; procedures.

    Science.gov (United States)

    2010-07-01

    ... current circuits serving three-phase alternating current equipment and their auxiliary devices shall be... circuit breakers; procedures. 75.900-3 Section 75.900-3 Mineral Resources MINE SAFETY AND HEALTH... Underground Low- and Medium-Voltage Alternating Current Circuits § 75.900-3 Testing, examination, and...

  3. 30 CFR 75.900-4 - Testing, examination, and maintenance of circuit breakers; record.

    Science.gov (United States)

    2010-07-01

    ... circuits serving three-phase alternating current equipment used in the mine. Such record shall be kept in a... circuit breakers; record. 75.900-4 Section 75.900-4 Mineral Resources MINE SAFETY AND HEALTH... Underground Low- and Medium-Voltage Alternating Current Circuits § 75.900-4 Testing, examination, and...

  4. Modeling a verification test system for mixed-signal circuits

    NARCIS (Netherlands)

    San Segundo Bello, D.; Tangelder, R.J.W.T.; Kerkhoff, Hans G.

    In contrast to the large number of logic gates and storage circuits encountered in digital networks, purely analog networks usually have relatively few circuit primitives (operational amplifiers and so on). The complexity lies not in the number of building blocks but in the complexity of each block

  5. Characterizing Inductive and Capacitive Nonlinear RLC Circuits : A Passivity Test

    NARCIS (Netherlands)

    García-Canseco, Eloísa; Jeltsema, Dimitri; Ortega, Romeo; Scherpen, Jacquelien M.A.

    2004-01-01

    Linear time-invariant RLC circuits are said to be inductive (capacitive) if the current waveform in sinusoidal steady-state has a negative (resp., positive) phase shift with respect to the voltage. Furthermore, it is known that the circuit is inductive (capacitive) if and only if the magnetic energy

  6. Functional test generation for digital circuits described with a declarative language: LUSTRE

    Science.gov (United States)

    Almahrous, Mazen

    1990-08-01

    A functional approach to the test generation problem starting from a high level description is proposed. The circuit tested is modeled, using the LUSTRE high level data flow description language. The different LUSTRE primitives are translated to a SATAN format graph in order to evaluate the testability of the circuit and to generate test sequences. Another method of testing the complex circuits comprising an operative part and a control part is defined. It consists of checking experiments for the control part observed through the operative part. It was applied to the automata generated from a LUSTRE description of the circuit.

  7. Test Generation for Crosstalk-Induced Delay Faults in VLSI Circuits Using Modified FAN Algorithm

    Directory of Open Access Journals (Sweden)

    S. Jayanthy

    2012-01-01

    Full Text Available As design trends move toward nanometer technology, new problems due to noise effects lead to a decrease in reliability and performance of VLSI circuits. Crosstalk is one such noise effect which affects the timing behaviour of circuits. In this paper, an efficient Automatic Test Pattern Generation (ATPG method based on a modified Fanout Oriented (FAN to detect crosstalk-induced delay faults in VLSI circuits is presented. Tests are generated for ISCAS_85 and enhanced scan version of ISCAS_89 benchmark circuits. Experimental results demonstrate that the test program gives better fault coverage, less number of backtracks, and hence reduced test generation time for most of the benchmark circuits when compared to modified Path-Oriented Decision Making (PODEM based ATPG. The number of transitions is also reduced thus reducing the power dissipation of the circuit.

  8. Traveling-Wave Tube Cold-Test Circuit Optimization Using CST MICROWAVE STUDIO

    Science.gov (United States)

    Chevalier, Christine T.; Kory, Carol L.; Wilson, Jeffrey D.; Wintucky, Edwin G.; Dayton, James A., Jr.

    2003-01-01

    The internal optimizer of CST MICROWAVE STUDIO (MWS) was used along with an application-specific Visual Basic for Applications (VBA) script to develop a method to optimize traveling-wave tube (TWT) cold-test circuit performance. The optimization procedure allows simultaneous optimization of circuit specifications including on-axis interaction impedance, bandwidth or geometric limitations. The application of Microwave Studio to TWT cold-test circuit optimization is described.

  9. Integrated Circuit Readout for the Silicon Sensor Test Station

    OpenAIRE

    Atkin, E; Kluev, A.; Silaev, A.; Fedenko, A.; Karmanov, D.; Merkin, M.(Moscow State University, Moscow, Russia); Voronin, A.

    2009-01-01

    Various chips for the silicon sensors measurements are described. These chips are based on 0.35 um and 0.18um CMOS technology. Several analog chips together with self-trigger /derandomizer one allow to measure silicon sensors designed for different purposes. Tracking systems, calorimeters, particle charge measurement system and other application sensors can be investigated by the integrated circuit readout with laser or radioactive sources. Also electrical parameters of silicon sensors can be...

  10. Built-in Self-Test (BIST) Techniques for Circuit Authentication and Identification

    Science.gov (United States)

    2017-03-01

    Built-in Self- Test (BIST) Techniques for Circuit Authentication and Identification Richard Welker, Esko Mikkola, Lloyd Linder, Andrew Levy...using on-chip Built- in Self- Test of individual circuit blocks, such as LNAs and mixers. This work describes a mechanism for multi-variate unique...enhanced test modes where the supply voltage of the device is modulated, the proposed multi-variate techniques achieve UID, with uniqueness violated for

  11. Active Match Load Circuit Intended for Testing Piezoelectric Transformers

    DEFF Research Database (Denmark)

    Andersen, Thomas; Rødgaard, Martin Schøler; Andersen, Michael A. E.

    2012-01-01

    An adjustable high voltage active load circuit for voltage amplitudes above 100 volts, especially intended for resistive matching the output impedance of a piezoelectric transformer (PT) is proposed in this paper. PTs have been around for over 50 years, were C. A. Rosen is common known for his...... famous Rosen type design back in the 1950s. After the discovered of new piezoelectric materials and new PT designs have been invented, the PT based power converters are in the area where they can outperform tradition electromagnetic based converters in certain applications. The performance of PTs can...

  12. Testing and verification of a novel single-channel IGBT driver circuit

    Directory of Open Access Journals (Sweden)

    Lukić Milan

    2016-01-01

    Full Text Available This paper presents a novel single-channel IGBT driver circuit together with a procedure for testing and verification. It is based on a specialized integrated circuit with complete range of protective functions. Experiments are performed to test and verify its behaviour. Experimental results are presented in the form of oscilloscope recordings. It is concluded that the new driver circuit is compatible with modern IGBT transistors and power converter demands and that it can be applied in new designs. It is a part of new 20kW industrial-grade boost converter.

  13. A miniature microcontroller curve tracing circuit for space flight testing transistors

    Science.gov (United States)

    Prokop, N.; Greer, L.; Krasowski, M.; Flatico, J.; Spina, D.

    2015-02-01

    This paper describes a novel miniature microcontroller based curve tracing circuit, which was designed to monitor the environmental effects on Silicon Carbide Junction Field Effect Transistor (SiC JFET) device performance, while exposed to the low earth orbit environment onboard the International Space Station (ISS) as a resident experiment on the 7th Materials on the International Space Station Experiment (MISSE7). Specifically, the microcontroller circuit was designed to operate autonomously and was flown on the external structure of the ISS for over a year. This curve tracing circuit is capable of measuring current vs. voltage (I-V) characteristics of transistors and diodes. The circuit is current limited for low current devices and is specifically designed to test high temperature, high drain-to-source resistance SiC JFETs. The results of each I-V data set are transmitted serially to an external telemetered communication interface. This paper discusses the circuit architecture, its design, and presents example results.

  14. A miniature microcontroller curve tracing circuit for space flight testing transistors.

    Science.gov (United States)

    Prokop, N; Greer, L; Krasowski, M; Flatico, J; Spina, D

    2015-02-01

    This paper describes a novel miniature microcontroller based curve tracing circuit, which was designed to monitor the environmental effects on Silicon Carbide Junction Field Effect Transistor (SiC JFET) device performance, while exposed to the low earth orbit environment onboard the International Space Station (ISS) as a resident experiment on the 7th Materials on the International Space Station Experiment (MISSE7). Specifically, the microcontroller circuit was designed to operate autonomously and was flown on the external structure of the ISS for over a year. This curve tracing circuit is capable of measuring current vs. voltage (I-V) characteristics of transistors and diodes. The circuit is current limited for low current devices and is specifically designed to test high temperature, high drain-to-source resistance SiC JFETs. The results of each I-V data set are transmitted serially to an external telemetered communication interface. This paper discusses the circuit architecture, its design, and presents example results.

  15. Development of a Novel Test Method for On-Demand Internal Short Circuit in a Li-Ion Cell (Presentation)

    Energy Technology Data Exchange (ETDEWEB)

    Keyser, M.; Long, D.; Jung, Y. S.; Pesaran, A.; Darcy, E.; McCarthy, B.; Patrick, L.; Kruger, C.

    2011-01-01

    This presentation describes a cell-level test method that simulates an emergent internal short circuit, produces consistent and reproducible test results, can establish the locations and temperatures/power/SOC conditions where an internal short circuit will result in thermal runaway, and provides relevant data to validate internal short circuit models.

  16. Defect-based testing of LTS digital circuits

    NARCIS (Netherlands)

    Arun, A.J.

    2006-01-01

    A Defect-Based Test (DBT) methodology for Superconductor Electronics (SCE) is presented in this thesis, so that commercial production and efficient testing of systems can be implemented in this technology in the future. In the first chapter, the features and prospects for SCE have been presented.

  17. 4H-SiC JFET Multilayer Integrated Circuit Technologies Tested Up to 1000 K

    Science.gov (United States)

    Spry, D. J.; Neudeck, P. G.; Chen, L.; Chang, C. W.; Lukco, D.; Beheim, G. M.

    2015-01-01

    Testing of semiconductor electronics at temperatures above their designed operating envelope is recognized as vital to qualification and lifetime prediction of circuits. This work describes the high temperature electrical testing of prototype 4H silicon carbide (SiC) junction field effect transistor (JFET) integrated circuits (ICs) technology implemented with multilayer interconnects; these ICs are intended for prolonged operation at temperatures up to 773K (500 C). A 50 mm diameter sapphire wafer was used in place of the standard NASA packaging for this experiment. Testing was carried out between 300K (27 C) and 1150K (877 C) with successful electrical operation of all devices observed up to 1000K (727 C).

  18. 42 CFR 84.97 - Test for carbon dioxide in inspired gas; open- and closed-circuit apparatus; maximum allowable...

    Science.gov (United States)

    2010-10-01

    ... 42 Public Health 1 2010-10-01 2010-10-01 false Test for carbon dioxide in inspired gas; open- and... carbon dioxide in inspired gas; open- and closed-circuit apparatus; maximum allowable limits. (a) Open-circuit apparatus. (1) The concentration of carbon dioxide in inspired gas in open-circuit apparatus will...

  19. Test circuit for verifying dielectric performance of phase-to-enclosure during capacitive current breaking

    Directory of Open Access Journals (Sweden)

    Jung-Hyeon Ryu

    2016-01-01

    Full Text Available In the case of Extra High Voltage and Ultra High Voltage circuit breaker, almost all of testing laboratories adopt the single-phase testing method for verifying the performance of capacitive breaking capability, based on IEC 62271-100 Annex O, due to the limitation of testing facilities. For dead-tank breaker, the tests for the insulating properties of phase-to-enclosure are recommended as a non-mandatory testing item. However, IEC MT36 has proposed the change of standard to specify as a mandatory in its next version planned in 2016. The peak of recovery voltages, occurring just after interrupting the some type of capacitive currents, arrives at different values on supply and load sides. With the technical background, the new capacitive current breaking test circuits are proposed to fulfill the next edition of IEC 62271-100 to be newly published. This paper illustrates the testing methods and simulation results for the single phase test circuits of capacitive current breaking, applicable to the circuit-breakers from 145 to 362 kV.

  20. E-learning platform for automated testing of electronic circuits using signature analysis method

    Science.gov (United States)

    Gherghina, Cǎtǎlina; Bacivarov, Angelica; Bacivarov, Ioan C.; Petricǎ, Gabriel

    2016-12-01

    Dependability of electronic circuits can be ensured only through testing of circuit modules. This is done by generating test vectors and their application to the circuit. Testability should be viewed as a concerted effort to ensure maximum efficiency throughout the product life cycle, from conception and design stage, through production to repairs during products operating. In this paper, is presented the platform developed by authors for training for testability in electronics, in general and in using signature analysis method, in particular. The platform allows highlighting the two approaches in the field namely analog and digital signature of circuits. As a part of this e-learning platform, it has been developed a database for signatures of different electronic components meant to put into the spotlight different techniques implying fault detection, and from this there were also self-repairing techniques of the systems with this kind of components. An approach for realizing self-testing circuits based on MATLAB environment and using signature analysis method is proposed. This paper analyses the benefits of signature analysis method and simulates signature analyzer performance based on the use of pseudo-random sequences, too.

  1. Scalable Testing Platform for CMOS Read In Integrated Circuits

    Science.gov (United States)

    2016-03-31

    Hernandez, Jonathan Dickason, Peyman Barakshan, Nick Waite, Rodney McGee, Fouad Kiamilev Electrical and Computer Engineering Department University of...Instrumentation (PEO STRI ) under Contract No. W91ZLK- 06-C-0006." (b) "Any opinions, findings and conclusions or recommendations expressed in this...Science & Technology (T&E/S&T) Program and/or the US Army Program Executive Office for Simulation, Training and Instrumentation (PEO STRI ).” References

  2. Testing of Diode-Clamping in an Inductive Pulsed Plasma Thruster Circuit

    Science.gov (United States)

    Toftul, Alexandra; Polzin, Kurt A.; Martin, Adam K.; Hudgins, Jerry L.

    2014-01-01

    Testing of a 5.5 kV silicon (Si) diode and 5.8 kV prototype silicon carbide (SiC) diode in an inductive pulsed plasma thruster (IPPT) circuit was performed to obtain a comparison of the resulting circuit recapture efficiency,eta(sub r), defined as the percentage of the initial charge energy remaining on the capacitor bank after the diode interrupts the current. The diode was placed in a pulsed circuit in series with a silicon controlled rectifier (SCR) switch, and the voltages across different components and current waveforms were collected over a range of capacitor charge voltages. Reverse recovery parameters, including turn-off time and peak reverse recovery current, were measured and capacitor voltage waveforms were used to determine the recapture efficiency for each case. The Si fast recovery diode in the circuit was shown to yield a recapture efficiency of up to 20% for the conditions tested, while the SiC diode further increased recapture efficiency to nearly 30%. The data presented show that fast recovery diodes operate on a timescale that permits them to clamp the discharge quickly after the first half cycle, supporting the idea that diode-clamping in IPPT circuit reduces energy dissipation that occurs after the first half cycle

  3. A Detailed Circuit Analysis of the Lawrence Livermore National Laboratory Building 141 Detonator Test Facility

    Energy Technology Data Exchange (ETDEWEB)

    Mayhall, D J; Wilson, M J; Wilson, J H

    2003-10-01

    A detailed electrical equivalent circuit of an as-built utility fault simulator is presented. Standard construction techniques for light industrial facilities were used to build a test-bed for evaluating utility power level faults into unintentional victims. The initial components or victims of interest are commercial detonators. Other possible candidates for fault response analyses include motors, power supplies, control systems, computers, or other electronic equipment. Measured Thevenin parameters of all interconnections provide the selected component values used in the model. Included in the model is an opening 10 HP motor circuit demonstrating voltage transients commonly seen on branch circuits from inductive loads common to industrial installations. Complex transmission lines were developed to represent real world transmission line effects possible from the associated branch circuits. To reduce the initial circuit stabilization delay a set of non-linear resistive elements are employed. The resulting model has assisted in confirming previous detonator safety work and supported the definition of critical parameters needed for continued safety assessment of victims to utility type power sources.

  4. Binary selectable detector holdoff circuit: Design, testing, and application. [to laser radar data acquisition system

    Science.gov (United States)

    Kadrmas, K. A.

    1973-01-01

    A very high speed switching circuit, part of a laser radar data acquisition system, has been designed and tested. The primary function of this circuit was to provide computer controlled switching of photodiode detector preamplifier power supply voltages, typically less than plus or minus 20 volts, in approximately 10 nanoseconds. Thus, in actual use, detector and/or detector preamplifier damage can be avoided as a result of sudden extremely large values of backscattered radiation being detected, such as might be due to short range, very thin atmospheric dust layers. Switching of the power supply voltages was chosen over direct switching the photodiode detector input to the preamplifier, based on system noise considerations. Also, the circuit provides a synchronized trigger pulse output for triggering devices such as the Biomation Model 8100 100 MHz analog to digital converter.

  5. Fabrication and test of nano crossbar switches/MOSFET hybrid circuits by imprinting lithography

    Science.gov (United States)

    Li, Zhiyong; Li, Xuema; Ohlberg, Douglas A. A.; Straznicky, Joseph; Wu, Wei; Yu, Zhaoning; Borghetti, Julien; Tong, William; Stewart, Duncan; Williams, R. Stanley

    2008-03-01

    An integrated circuit combining imprinted, nanoscale crossbar switches with metal-oxide field effect transistors (MOSFET) was fabricated and tested. Construction of the circuits began with fabrication of n-channel MOSFET devices on silicon-on-insulator (SOI) substrates using CMOS compatible process techniques. To protect the FET devices as well as provide a flat surface for subsequent nanoimprint lithography, passivation and planarization layers were deposited. Crossbar junctions were then fabricated next to the FETs using imprint lithography to first define arrays of parallel nanowires over which, a switchable material layer was deposited. This was followed by a second imprint proces to construct another set of parallel wires on top of, and orthogonal to the first, to complete the nano-crossbar array with a half pitch (hp) of 50 nm. The switchable crossbar devices were then connected to the gate of the FETs and the resulting integrated circuit was tested using the FET as the output signal follower. This successful fabrication process serves as a proof-of-principle demonstration and a platform for advanced CMOS/nanoscale crossbar hybrid logic circuits.

  6. Testing of the Front-End Hybrid Circuits for the CMS Tracker Upgrade

    CERN Document Server

    Gadek, Tomasz; Honma, Alan; Kovacs, Mark Istvan; Raymond, David Mark; Rose, Pierre

    2017-01-01

    The upgrade of the CMS tracker for the HL-LHC requires the design of new double-sensor, silicon detector modules, which implement Level 1 trigger functionality in the increased luminosity environment. These new modules will contain two different, high density front-end hybrid circuits, equipped with flip-chip ASICs, auxiliary electronic components and mechanical structures. The hybrids require qualification tests before they are assembled into modules. Test methods are proposed together with the corresponding test hardware and software. They include functional tests and signal injection in a cold environment to find possible failure modes of the hybrids under real operating conditions.

  7. Manufacturing experience and test results of the PS prototype flexible hybrid circuit for the CMS Tracker Upgrade

    CERN Document Server

    Kovacs, Mark Istvan; Gadek, Tomasz; Honma, Alan; Vasey, Francois

    2017-01-01

    The CMS Tracker Phase-2 Upgrade for HL-LHC requires High Density Interconnect (HDI) flexible hybrid circuits to build modules with low mass and high granularity. The hybrids are carbon fibre reinforced flexible circuits with flip-chips and passives. Three different manufacturers produced prototype hybrids for the Pixel-Strip type modules. The first part of the presentation will focus on the design challenges of this state of the art circuit. Afterwards, the difficulties and experience related to the circuit manufacturing and assembly are presented. The description of quality inspection methods with comprehensive test results will lead to the conclusion.

  8. Test and diagnosis of analogue, mixed-signal and RF integrated circuits the system on chip approach

    CERN Document Server

    Sun, Yichuang

    2008-01-01

    This book provides a comprehensive discussion of automatic testing, diagnosis and tuning of analogue, mixed-signal and RF integrated circuits, and systems in a single source. The book contains eleven chapters written by leading researchers worldwide. As well as fundamental concepts and techniques, the book reports systematically the state of the arts and future research directions of these areas. A complete range of circuit components are covered and test issues are also addressed from the SoC perspective.

  9. Design and Test of Application-Specific Integrated Circuits by use of Mobile Clients

    Directory of Open Access Journals (Sweden)

    Michael Auer

    2009-02-01

    Full Text Available The aim of this work is to develop a simultaneous multi user access system – READ (Remote ASIC Design and Test that allows users to perform test and measurements remotely via clients running on mobile devices as well as on standard PCs. The system also facilitates the remote design of circuits with the PAC-Designer The system is controlled by LabVIEW and was implemented using a Data Acquisition Card from National instruments. Such systems are specially suited for manufacturing process monitoring and control. The performance of the simultaneous access was tested under load with a variable number of users. The server implements a queue that processes user’s commands upon request.

  10. Testing of interposer-based 2.5D integrated circuits

    CERN Document Server

    Wang, Ran

    2017-01-01

    This book provides readers with an insightful guide to the design, testing and optimization of 2.5D integrated circuits. The authors describe a set of design-for-test methods to address various challenges posed by the new generation of 2.5D ICs, including pre-bond testing of the silicon interposer, at-speed interconnect testing, built-in self-test architecture, extest scheduling, and a programmable method for low-power scan shift in SoC dies. This book covers many testing techniques that have already been used in mainstream semiconductor companies. Readers will benefit from an in-depth look at test-technology solutions that are needed to make 2.5D ICs a reality and commercially viable. Provides a single-source guide to the practical challenges in testing of 2.5D ICs; Presents an efficient method to locate defects in a passive interposer before stacking; Describes an efficient interconnect-test solution to target through-silicon vias (TSVs), the redistribution layer, and micro-bumps for shorts, opens, and dela...

  11. Experimental Durability Testing of 4H SiC JFET Integrated Circuit Technology at 727 C

    Science.gov (United States)

    Spry, David; Neudeck, Phil; Chen, Liangyu; Chang, Carl; Lukco, Dorothy; Beheim, Glenn M

    2016-01-01

    We have reported SiC integrated circuits (IC's) with two levels of metal interconnect that have demonstrated prolonged operation for thousands of hours at their intended peak ambient operational temperature of 500 C [1, 2]. However, it is recognized that testing of semiconductor microelectronics at temperatures above their designed operating envelope is vital to qualification. Towards this end, we previously reported operation of a 4H-SiC JFET IC ring oscillator on an initial fast thermal ramp test through 727 C [3]. However, this thermal ramp was not ended until a peak temperature of 880 C (well beyond failure) was attained. Further experiments are necessary to better understand failure mechanisms and upper temperature limit of this extreme-temperature capable 4H-SiC IC technology. Here we report on additional experimental testing of custom-packaged 4H-SiC JFET IC devices at temperatures above 500 C. In one test, the temperature was ramped and then held at 727 C, and the devices were periodically measured until electrical failure was observed. A 4H-SiC JFET on this chip electrically functioned with little change for around 25 hours at 727 C before rapid increases in device resistance caused failure. In a second test, devices from our next generation 4H-SiC JFET ICs were ramped up and then held at 700 C (which is below the maximum deposition temperature of the dielectrics). Three ring oscillators functioned for 8 hours at this temperature before degradation. In a third experiment, an alternative die attach of gold paste and package lid was used, and logic circuit operation was demonstrated for 143.5 hours at 700 C.

  12. 30 CFR 77.900-2 - Testing, examination, and maintenance of circuit breakers; record.

    Science.gov (United States)

    2010-07-01

    ... protecting low- and medium-voltage circuits serving three-phase alternating current equipment and such record... circuit breakers; record. 77.900-2 Section 77.900-2 Mineral Resources MINE SAFETY AND HEALTH... AND SURFACE WORK AREAS OF UNDERGROUND COAL MINES Low- and Medium-Voltage Alternating Current Circuits...

  13. 30 CFR 77.900-1 - Testing, examination, and maintenance of circuit breakers; procedures.

    Science.gov (United States)

    2010-07-01

    ... protecting low- and medium-voltage circuits serving portable or mobile three-phase alternating current... circuit breakers; procedures. 77.900-1 Section 77.900-1 Mineral Resources MINE SAFETY AND HEALTH... AND SURFACE WORK AREAS OF UNDERGROUND COAL MINES Low- and Medium-Voltage Alternating Current Circuits...

  14. Principles of vibroacoustic testing of technological equipment of nuclear power plant primary coolant circuit

    Energy Technology Data Exchange (ETDEWEB)

    Samarin, A.A.; Adamenkov, K.A.; Krasyuk, V.Y.; Nozdrin, G.N.; Ivanov, Y.S.; Pospelko, K.A.

    1982-04-01

    Main principles are discussed of noise analysis as is its inclusion in the system of inspecting technological equipment of nuclear power plant primary circuits. Vibrations and noise resulting as system response to external perturbations are used as diagnostic signals. The mathematical formulation of the problem is done, the sources of vibrations and noise are determined, and the possibilities are discussed of analyzing the vibroacoustic signal and the changes in frequency characteristics to diagnose equipment failure states. Experiences are outlined with the placement of transducers in the Novovoronezh Nuclear Power Plant, which considerably affects the quality of control. A flow chart is shown for the vibroacoustic testing organization, and main trends are indicated of the study of vibroacoustic testing systems in nuclear power plants.

  15. Development, testing, and demonstration of an optimal fine coal cleaning circuit

    Energy Technology Data Exchange (ETDEWEB)

    Mishra, M.; Placha, M.; Bethell, P. [and others

    1995-11-01

    The overall objective of this project is to improve the efficiency of fine coal cleaning. The project will be completed in two phases: bench-scale testing and demonstration of four advanced flotation cells and; in-plant proof-of-concept (POC) pilot plant testing of two flotation cells individually and in two-stage combinations. The goal is to ascertain if a two-stage circuit can result in reduced capital and operating costs while achieving improved separation efficiency. The plant selected for this project, Cyprus Emerald Coal Preparation plant, cleans 1200 tph of raw coal. The plant produces approximately 4 million tonnes of clean coal per year at an average as received energy content of 30.2 MJ/Kg (13,000 Btu/lb).

  16. Test gear and measurements a collection of useful and tested circuit design ideas'

    CERN Document Server

    Stewart OBE DLitthc, David

    2013-01-01

    This book provides a clear introduction to test gear in the field of electronics. As well as being a first guide to test gear and its use, the book includes much practical information and reference material for the more experienced electronics enthusiast or student.Based on a collection of feature articles originally published in Electronics - the Maplin Magazine, this work by Danny Stewart is sure to be useful to electronics constructors, students and experimenters alike. Details of all the common (and some not-so-common) items of test gear are included, alongside information regarding its us

  17. Induced over voltage test on transformers using enhanced Z-source inverter based circuit

    Science.gov (United States)

    Peter, Geno; Sherine, Anli

    2017-09-01

    The normal life of a transformer is well above 25 years. The economical operation of the distribution system has its roots in the equipments being used. The economy being such, that it is financially advantageous to replace transformers with more than 15 years of service in the second perennial market. Testing of transformer is required, as its an indication of the extent to which a transformer can comply with the customers specified requirements and the respective standards (IEC 60076-3). In this paper, induced over voltage testing on transformers using enhanced Z source inverter is discussed. Power electronic circuits are now essential for a whole array of industrial electronic products. The bulky motor generator set, which is used to generate the required frequency to conduct the induced over voltage testing of transformers is nowadays replaced by static frequency converter. First conventional Z-source inverter, and second an enhanced Z source inverter is being used to generate the required voltage and frequency to test the transformer for induced over voltage test, and its characteristics is analysed.

  18. Implementation and low speed test of ultra-fast interface circuits for Josephson-CMOS hybrid memories

    Energy Technology Data Exchange (ETDEWEB)

    Fujiwara, K.; Miyakawa, H.; Yoshikawa, N.; Feng, Y.; Whiteley, S.R.; Van Duzer, T

    2003-10-15

    We have been developing Josephson-CMOS hybrid memories where high-density CMOS devices are used as storage cells. One of the key components in the system is the interface circuit, which amplifies the signal from the SFQ circuits into voltage level processible in the CMOS circuits at high-speed. In this paper, we have implemented the ultra-fast interface circuit, which is composed of a Josephson driver and a Josephson-CMOS hybrid amplifier. The propagation delay of the ultra-fast interface circuit is estimated to be about 60 ps assuming a 2.5 kA/cm{sup 2} Nb process and a 0.6 {mu}m CMOS process. A low speed test results of the interface circuit shows that it amplifies the input voltage of 80 {mu}V to 0.9 V. We have also investigated their propagation delay and output voltage swing assuming the spread of the critical current in the Josephson stack.

  19. Effect of High-Humidity Testing on Material Parameters of Flexible Printed Circuit Board Materials

    Science.gov (United States)

    Lahokallio, Sanna; Saarinen, Kirsi; Frisk, Laura

    2013-09-01

    The tendency of polymers to absorb moisture impairs especially their electrical and mechanical properties. These are important characteristics for printed circuit board (PCB) materials, which should provide mechanical support as well as electrical insulation in many different environments in order to guarantee safe operation for electrical devices. Moreover, the effects of moisture are accelerated at increased temperatures. In this study, three flexible PCB dielectric materials, namely polyimide (PI), fluorinated ethylene-propylene (FEP), and polyethylene terephthalate (PET), were aged over different periods of time in a high-humidity test, in which the temperature was 85°C and relative humidity 85%. After aging, the changes in the structure of the polymers were studied by determining different material parameters such as modulus of elasticity, glass-transition temperature, melting point, coefficient of thermal expansion, water absorption, and crystallinity, and changes in the chemical structure with several techniques including thermomechanical analysis, differential scanning calorimetry, Fourier-transform infrared spectroscopy, moisture analysis, and a precision scale. The results showed that PI was extremely stable under the aging conditions and therefore an excellent choice for electrical applications under harsh conditions. Similarly, FEP proved to be relatively stable under the applied aging conditions. However, its crystallinity increased markedly during aging, and after 6000 h of aging the results indicated oxidation. PET suffered from hydrolysis during the test, leading to its embrittlement after 2000 h of aging.

  20. Preliminary Analysis and Test Results for Circuit Cards in X-Ray and Gamma Ray Environments.

    Science.gov (United States)

    1986-01-10

    agreement. A prediction for the plane-box short circuit current source is given by Isc -- 1 f(t) AA [QF - QRB ) + - QFB ) (amps) (1) ,’V-#" where AA is the...box wall, QR is the reverse emission from the box wall, QFB is the forward emission from the card, and QRB is the reverse emission from the card. 10

  1. Fault Modeling and Testing for Analog Circuits in Complex Space Based on Supply Current and Output Voltage

    Directory of Open Access Journals (Sweden)

    Hongzhi Hu

    2015-01-01

    Full Text Available This paper deals with the modeling of fault for analog circuits. A two-dimensional (2D fault model is first proposed based on collaborative analysis of supply current and output voltage. This model is a family of circle loci on the complex plane, and it simplifies greatly the algorithms for test point selection and potential fault simulations, which are primary difficulties in fault diagnosis of analog circuits. Furthermore, in order to reduce the difficulty of fault location, an improved fault model in three-dimensional (3D complex space is proposed, which achieves a far better fault detection ratio (FDR against measurement error and parametric tolerance. To address the problem of fault masking in both 2D and 3D fault models, this paper proposes an effective design for testability (DFT method. By adding redundant bypassing-components in the circuit under test (CUT, this method achieves excellent fault isolation ratio (FIR in ambiguity group isolation. The efficacy of the proposed model and testing method is validated through experimental results provided in this paper.

  2. Design of the Circuit for IPMC Micro-force Sensor and Testing

    Directory of Open Access Journals (Sweden)

    Liu Liqun

    2014-03-01

    Full Text Available The IPMC has perceived performance, so it can be used for making micro-force sensor. But its sensing signal is very weak, a greater influence on perception from the environmental noise signals. In the paper, we design a micro-force sensor system based on IPMC. The current signal conversion of analog circuit, voltage signal amplification, signal processing and other key parts are introduced, meanwhile, the calibration to micro-force sensor is completed.

  3. The Hoff circuit test is more specific than an incremental treadmill test to assess endurance with the ball in youth soccer players.

    Science.gov (United States)

    Zagatto, A M; Papoti, M; Da Silva, Asr; Barbieri, R A; Campos, E Z; Ferreira, E C; Loures, J P; Chamari, K

    2016-09-01

    The assessment of aerobic endurance is important for training prescription in soccer, and is usually measured by straight running without the ball on a track or treadmill. Due to the ball control and technical demands during a specific soccer test, the running speeds are likely to be lower compared to a continuous incremental test. The aim of the present study was to compare the heart rate (HR), rating of perceived exertion (RPE) and speeds corresponding to 2.0 mmol∙L(-1), 3.5 mmol∙L(-1), lactate threshold (Dmax method) and peak lactate determined in the laboratory and in the Hoff circuit soccer-specific test. Sixteen soccer players (16±1 years) underwent two incremental tests (laboratory and Hoff circuit tests). The speeds were significantly higher in the treadmill test than on the Hoff circuit (2.0 mmol∙L(-1): 9.5±1.2 and 8.1±1.0 km∙h(-1); 3.5 mmol∙L(-1): 12.0±1.2 and 10.2±1.1 km∙h(-1); Dmax: 11.4±1.4 and 9.3±0.4 km∙h(-1); peak lactate: 14.9±1.6 and 10.9±0.8 km∙h(-1)). The HR corresponding to 3.5 mmol∙L-1 was significantly higher on the Hoff circuit compared to the laboratory test (187.5±18.0 and 178.2±17.6 bpm, respectively; P <0.001), while the RPE at the last incremental stage was lower on the Hoff circuit (P < 0.01). The speeds during the Hoff specific soccer test and the HR corresponding to 2.0 mmol∙L(-1), 3.5 mmol∙L(-1) and Dmax/threshold were different compared with the laboratory test. The present study shows that it is possible to assess submaximal endurance related variables specifically in soccer players.

  4. Microstepping Test Board with LMD 18245 Specialized Circuit for Bipolar Stepper Motor

    Directory of Open Access Journals (Sweden)

    Alexandru Morar

    2010-12-01

    Full Text Available The paper presents a control system for low speed stepper motor control in a microstepping mode, which was designed and performed with a high performant specialized integrated circuit LMD 18245, made by National Semiconductor company. The microstepping control system improves the positioning accuracy and eliminates low speed ripple and resonance effects in a stepper motor electric drive. The same microstepping system is ideal for robotics, printers, plotters, X-Y-Z tables and can facilitate the construction of very sophisticated positioning control systems while significantly reducing component cost, board space, design time and systems cost. The microstepping card is designed for continuous operation.

  5. Measuring circuits

    CERN Document Server

    Graf, Rudolf F

    1996-01-01

    This series of circuits provides designers with a quick source for measuring circuits. Why waste time paging through huge encyclopedias when you can choose the topic you need and select any of the specialized circuits sorted by application?This book in the series has 250-300 practical, ready-to-use circuit designs, with schematics and brief explanations of circuit operation. The original source for each circuit is listed in an appendix, making it easy to obtain additional information.Ready-to-use circuits.Grouped by application for easy look-up.Circuit source listings

  6. Oscillator circuits

    CERN Document Server

    Graf, Rudolf F

    1996-01-01

    This series of circuits provides designers with a quick source for oscillator circuits. Why waste time paging through huge encyclopedias when you can choose the topic you need and select any of the specialized circuits sorted by application?This book in the series has 250-300 practical, ready-to-use circuit designs, with schematics and brief explanations of circuit operation. The original source for each circuit is listed in an appendix, making it easy to obtain additional information.Ready-to-use circuits.Grouped by application for easy look-up.Circuit source listing

  7. Rational design of modular circuits for gene transcription: A test of the bottom-up approach

    Directory of Open Access Journals (Sweden)

    Giordano Emanuele

    2010-11-01

    Full Text Available Abstract Background Most of synthetic circuits developed so far have been designed by an ad hoc approach, using a small number of components (i.e. LacI, TetR and a trial and error strategy. We are at the point where an increasing number of modular, inter-changeable and well-characterized components is needed to expand the construction of synthetic devices and to allow a rational approach to the design. Results We used interchangeable modular biological parts to create a set of novel synthetic devices for controlling gene transcription, and we developed a mathematical model of the modular circuits. Model parameters were identified by experimental measurements from a subset of modular combinations. The model revealed an unexpected feature of the lactose repressor system, i.e. a residual binding affinity for the operator site by induced lactose repressor molecules. Once this residual affinity was taken into account, the model properly reproduced the experimental data from the training set. The parameters identified in the training set allowed the prediction of the behavior of networks not included in the identification procedure. Conclusions This study provides new quantitative evidences that the use of independent and well-characterized biological parts and mathematical modeling, what is called a bottom-up approach to the construction of gene networks, can allow the design of new and different devices re-using the same modular parts.

  8. EQUIPMENT FOR NONDESTRUCTIVE TESTING OF SILICON WAFERS SUBMICRON TOPOLOGY DURING THE FABRICATION OF INTEGRATED CIRCUITS

    Directory of Open Access Journals (Sweden)

    S. A. Chizhik

    2013-01-01

    Full Text Available The advantages of using an atomic force microscopy in manufacturing of submicron integrated circuits are described. The possibilities of characterizing the surface morphology and the etching profile for silicon substrate and bus lines, estimation of the periodicity and size of bus lines, geometrical stability for elementary bus line are shown. Methods of optical and atomic force microcopies are combined in one diagnostic unit. Scanning  probe  microscope  (SPM  200  is  designed  and  produced.  Complex  SPM  200  realizes  nondestructive control of microelectronics elements made on silicon wafers up to 200 mm in diameter and it is introduced by JSC «Integral» for the purpose of operational control, metrology and acceptance of the final product.

  9. Techniques for control of long-term reliability of complex integrated circuits. I - Reliability assurance by test vehicle qualification.

    Science.gov (United States)

    Van Vonno, N. W.

    1972-01-01

    Development of an alternate approach to the conventional methods of reliability assurance for large-scale integrated circuits. The product treated is a large-scale T squared L array designed for space applications. The concept used is that of qualification of product by evaluation of the basic processing used in fabricating the product, providing an insight into its potential reliability. Test vehicles are described which enable evaluation of device characteristics, surface condition, and various parameters of the two-level metallization system used. Evaluation of these test vehicles is performed on a lot qualification basis, with the lot consisting of one wafer. Assembled test vehicles are evaluated by high temperature stress at 300 C for short time durations. Stressing at these temperatures provides a rapid method of evaluation and permits a go/no go decision to be made on the wafer lot in a timely fashion.

  10. Driver circuit

    Science.gov (United States)

    Matsumoto, Raymond T. (Inventor); Higashi, Stanley T. (Inventor)

    1976-01-01

    A driver circuit which has low power requirements, a relatively small number of components and provides flexibility in output voltage setting. The driver circuit comprises, essentially, two portions which are selectively activated by the application of input signals. The output signal is determined by which of the two circuit portions is activated. While each of the two circuit portions operates in a manner similar to silicon controlled rectifiers (SCR), the circuit portions are on only when an input signal is supplied thereto.

  11. Experimental Durability Testing of 4H SiC JFET Integrated Circuit Technology at 727 Degrees Centigrade

    Science.gov (United States)

    Spry, David J.; Neudeck, Philip G.; Chen, Liangyu; Chang, Carl W.; Lukco, Dorothy; Beheim, Glenn M.

    2016-01-01

    We have reported SiC integrated circuits (ICs) with two levels of metal interconnect that have demonstrated prolonged operation for thousands of hours at their intended peak ambient operational temperature of 500 degrees Centigrade. However, it is recognized that testing of semiconductor microelectronics at temperatures above their designed operating envelope is vital to qualification. Towards this end, we previously reported operation of a 4H-SiC JFET IC ring oscillator on an initial fast thermal ramp test through 727 degrees Centigrade. However, this thermal ramp was not ended until a peak temperature of 880 degrees Centigrade (well beyond failure) was attained. Further experiments are necessary to better understand failure mechanisms and upper temperature limit of this extreme-temperature capable 4H-SiC IC technology.Here we report on additional experimental testing of custom-packaged 4H-SiC JFET IC devices at temperatures above 500 degrees Centigrade. In one test, the temperature was ramped and then held at 727 degrees Centigrade, and the devices were periodically measured until electrical failure was observed. A 4H-SiC JFET on this chip electrically functioned with little change for around 25 hours at 727 degrees Centigrade before rapid increases in device resistance caused failure. In a second test, devices from our next generation 4H-SiC JFET ICs were ramped up and then held at 700 degrees Centigrade (which is below the maximum deposition temperature of the dielectrics). Three ring oscillators functioned for 8 hours at this temperature before degradation. In a third experiment, an alternative die attach of gold paste and package lid was used, and logic circuit operation was demonstrated for 143.5 hours at 700 degrees Centigrade.

  12. An On-Chip Memory for Testing of High-Speed Mixed-Signal Circuits

    OpenAIRE

    Omar, Omar Jaber

    2013-01-01

    Mixed-signal processing systems especially data converters can be reliably tested at high frequencies using on-chip testing schemes based on memory. In this thesis, an on-chip testing strategy based on shift registers/memory (2 k bits) has been proposed for digital-to-analog converters (DACs) operating at 5 GHz. The proposed design uses word length of 8 bits in order to test DAC at high speed of 5 GHz. The proposed testing strategy has been designed in standard 65 nm CMOS technology with addi...

  13. Entropy Based Test Point Evaluation and Selection Method for Analog Circuit Fault Diagnosis

    Directory of Open Access Journals (Sweden)

    Yuan Gao

    2014-01-01

    Full Text Available By simplifying tolerance problem and treating faulty voltages on different test points as independent variables, integer-coded table technique is proposed to simplify the test point selection process. Usually, simplifying tolerance problem may induce a wrong solution while the independence assumption will result in over conservative result. To address these problems, the tolerance problem is thoroughly considered in this paper, and dependency relationship between different test points is considered at the same time. A heuristic graph search method is proposed to facilitate the test point selection process. First, the information theoretic concept of entropy is used to evaluate the optimality of test point. The entropy is calculated by using the ambiguous sets and faulty voltage distribution, determined by component tolerance. Second, the selected optimal test point is used to expand current graph node by using dependence relationship between the test point and graph node. Simulated results indicate that the proposed method more accurately finds the optimal set of test points than other methods; therefore, it is a good solution to minimize the size of the test point set. To simplify and clarify the proposed method, only catastrophic and some specific parametric faults are discussed in this paper.

  14. Characterization of radiation effects in 65 nm digital circuits with the DRAD digital radiation test chip

    Science.gov (United States)

    Jara Casas, L. M.; Ceresa, D.; Kulis, S.; Miryala, S.; Christiansen, J.; Francisco, R.; Gnani, D.

    2017-02-01

    A Digital RADiation (DRAD) test chip has been specifically designed to study the impact of Total Ionizing Dose (TID) (digital logic gates in a 65 nm CMOS technology. Nine different versions of standard cell libraries are studied in this chip, basically differing in the device dimensions, Vt flavor and layout of the device. Each library has eighteen test structures specifically designed to characterize delay degradation and power consumption of the standard cells. For SEU study, a dedicated test structure based on a shift register is designed for each library. TID results up to 500 Mrad are reported.

  15. Characterization of radiation effects in 65 nm digital circuits with the DRAD digital radiation test chip

    Science.gov (United States)

    Jara Casas, L. M.; Ceresa, D.; Kulis, S.; Miryala, S.; Christiansen, J.; Francisco, R.; Gnani, D.

    2017-02-01

    A Digital RADiation (DRAD) test chip has been specifically designed to study the impact of Total Ionizing Dose (TID) (Event Upset (SEU) on digital logic gates in a 65 nm CMOS technology. Nine different versions of standard cell libraries are studied in this chip, basically differing in the device dimensions, Vt flavor and layout of the device. Each library has eighteen test structures specifically designed to characterize delay degradation and power consumption of the standard cells. For SEU study, a dedicated test structure based on a shift register is designed for each library. TID results up to 500 Mrad are reported.

  16. Test of the BEXE autocorrelator circuit at the CLIC laser beam

    CERN Document Server

    Aulenbacher, K; Cornali, R; Manarin, A; Rossa, E; Schmickler, Hermann; Voors, G; CERN. Geneva. SPS and LEP Division

    1997-01-01

    This device allows the measurement of the bunch length of a photon bunch by autocorrelation. The detector works in a very large range from X-rays to Infrared. This report describes the laser beam test and the resulting calibration.

  17. Approaching Repetitive Short Circuit Tests on MW-Scale Power Modules by means of an Automatic Testing Setup

    DEFF Research Database (Denmark)

    Reigosa, Paula Diaz; Wang, Huai; Iannuzzo, Francesco

    2016-01-01

    with no significant damage. The developed system has been demonstrated to be very helpful in performing a large number of repetition tests as required by modern testing protocols for robustness and reliability assess-ment. The software algorithm and a demonstration video are available for download....

  18. Conception et test des circuits et systèmes numériques à haute fiabilité et sécurité

    OpenAIRE

    Di Natale, Giorgio

    2014-01-01

    Research activities I carried on after my nomination as Chargé de Recherche deal with the definition of methodologies and tools for the design, the test and the reliability of secure digital circuits and trustworthy manufacturing. More recently, we have started a new research activity on the test of 3D stacked Integrated CIrcuits, based on the use of Through Silicon Vias. Moreover, thanks to the relationships I have maintained after my post-doc in Italy, I have kept on cooperating with Polite...

  19. An Engineering Methodology for Implementing and Testing VLSI (Very Large Scale Integrated) Circuits

    Science.gov (United States)

    1989-03-01

    Test Facilities i 9-AMstract I cew. tue cen rcierse if tic cssarv aund idcn;ify bv- block nuotter I The engineernu2 methodology for producing a full...5n04 6. Profos, or 11. Loomis. Jr.. Code 621.mn Nava.l Pos tg-raduate School NI ontcre%. C. 3 4-5l Profesor NI. Cotton. C’ode 62CcI Na’. a

  20. IRIS (Integrity and Reliability in Integrated Circuits) Test Article Generation (ITAG)

    Science.gov (United States)

    2015-03-31

    memory controller and the system. This article was delivered as synthesizeable, human readable HDL (both Verilog and VHDL) with datasheet and test...block which is supposed to provide limited analog to digital conversion and temperature sensing. The block was implemented in VLSI for the Virtex-4...custom tools such as USC/ISI’s Torc tools, the physi- cal device can be extensively probed and intentionally set into undocumented modes to determine

  1. Ion Beam Induced Charge Collection (IBICC) from Integrated Circuit Test Structures Using a 10 MeV Carbon Microbeam

    Energy Technology Data Exchange (ETDEWEB)

    Aton, T.J.; Doyle, B.L.; Duggan, J.L.; El Bouanani, M.; Guo, B.N.; McDaniel, F.D.; Renfrow, S.N.; Walsh, D.S.

    1998-11-18

    As future sizes of Integrated Circuits (ICs) continue to shrink the sensitivity of these devices, particularly SRAMs and DRAMs, to natural radiation is increasing. In this paper, the Ion Beam Induced Charge Collection (IBICC) technique is utilized to simulate neutron-induced Si recoil effects in ICS. The IBICC measurements, conducted at the Sandia National Laboratories employed a 10 MeV carbon microbeam with 1pm diameter spot to scan test structures on specifically designed ICS. With the aid of layout information, an analysis of the charge collection efficiency from different test areas is presented. In the present work a 10 MeV Carbon high-resolution microbeam was used to demonstrate the differential charge collection efficiency in ICS with the aid of the IC design Information. When ions strike outside the FET, the charge was only measured on the outer ring, and decreased with strike distance from this diode. When ions directly strike the inner and ring diodes, the collected charge was localized to these diodes. The charge for ions striking the gate region was shared between the inner and ring diodes. I The IBICC measurements directly confirmed the interpretations made in the earlier work.

  2. Results of water corrosion in static cell tests representing multi-metal assemblies in the hydraulic circuits of Tore Supra

    Energy Technology Data Exchange (ETDEWEB)

    Lipa, M.; Blanchet, J. [Association Euratom-CEA Cadarache, 13 - Saint-Paul-lez-Durance (France). Dept. de Recherches sur la Fusion Controlee; Cellier, F. [Framatome, Centre Technique, 71 - Saint Marcel (France)

    2007-07-01

    Full text of publication follows: Tore supra (TS) has used from the beginning of operation in 1989 actively cooled plasma facing components. Since the operation and baking temperature of all in vessel components has been defined to be up to 230 deg. C at 40 bars, a special water chemistry of the cooling water plant was suggested in order to avoid eventual water leaks due to corrosion (general corrosion, galvanic corrosion, stress corrosion, etc.) at relative high temperatures and pressures in tubes, pipes, bellows, water boxes, coils, etc. From the beginning of TS operation, in vessel components (e.g. wall protection panels, limiters, ergodic divertor coils, neutralisers and diagnostics) represented a unique combination of metals in the hydraulic circuit mainly such as stainless steel, Inconel, CuCrZr, Nickel and Copper. These different materials were joined together by welding (St to St, Inconel to Inconel, CuCrZr to CuCrZr and CuCrZr to St-St via a Ni sleeve adapter), brazing (St-St to Cu and Cu-LSTP), friction (CuCrZr and Cu to St-St), explosion (CuCrZr to St-St) and memory metal junction (Cryo-fit to Cu - only test sample). Following experiences obtained with steam generator tubes of nuclear power plants, a cooling water quality of AVT (all volatile treatment) has been defined based on demineralized water with adjustment of the pH value to about 9.0/ 7.0 (25 deg. C/ 200 deg. C) by addiction of ammoniac, and hydrazine in order to absorb oxygen dissolved in water. At that time, a simplified water corrosion test program has been performed using static (no circulation) test cell samples made of above mentioned TS metal combinations. All test cell samples, prepared and filled with AVT water, were performed at 280 deg. C and 65 bars in an autoclave during 3000 hours. The test cell water temperature has been chosen to be sufficient above the TS component working temperature, in order to accelerate an eventual corrosion process. Generally all above mentioned metal

  3. Finalization of the conceptual design of the auxiliary circuits for the European test blanket systems

    Energy Technology Data Exchange (ETDEWEB)

    Aiello, A., E-mail: antonio.aiello@enea.it [ENEA UTIS – C.R. Brasimone, Bacino del Brasimone, I-40032 Camugnano, BO (Italy); Ghidersa, B.E. [Karlsruher Institut für Technologie (KIT) – Institut für Neutronenphysik und Reaktortechnik (INR), D-76021 Karlsruhe (Germany); Utili, M. [ENEA UTIS – C.R. Brasimone, Bacino del Brasimone, I-40032 Camugnano, BO (Italy); Vala, L. [Sustainable Energy (SUSEN), Technological Experimental Circuits, Centrum vyzkumu Rez s.r.o. (CV Rez), Hlavni c.p. 130, CZ-250 68 Husinec-Rez (Czech Republic); Ilkei, T. [Institute for Particle and Nuclear Physics, Wigner Research Centre for Physics, Hungarian Academy of Sciences, Budapest H-1525 (Hungary); Di Gironimo, G.; Mozzillo, R.; Tarallo, A. [CREATE/University of Naples Federico II, Department of Industrial Engineering, P.le Tecchio 80, 80125 Naples (Italy); Ricapito, I.; Calderoni, P. [TBM& MD Project, Fusion for Energy, EU Commission, Carrer J. Pla, 2, Building B3, 08019 Barcelona (Spain)

    2015-10-15

    In view of the ITER conceptual design review, the design of the ancillary systems of the European test blanket systems presented in [1] has been updated and made consistent with the ITER requirements for the present design phase. Europe is developing two concepts of TBM, the helium cooled lithium lead (HCLL) and the helium cooled pebble bed (HCPB) one, having in common the cooling media, pressurized helium at 8 MPa [2]. TBS, namely helium cooling system (HCS), coolant purification system (CPS), lead lithium loop and tritium extraction/removal system (TES–TRS) have the purpose to cool down the TBM and to remove tritium to be driven to TEP from breeder and coolant. These systems are placed in port cell 16 (PC#16), chemical and volume control system (CVCS) area and tritium building. Starting from the pre-conceptual design developed in the past, more mature technical interfaces with the ITER facility have been consolidated and iterative design activities were performed to comply with design requirements/specifications requested by IO to conclude the conceptual design phase. In this paper the present status of design of the TBS is presented together with the preliminary integration in ITER areas.

  4. Conception and test of an integrated circuit (ASIC): application to multiwire chambers and photomultipliers of the GRAAL experience; Conception et test d`un circuit integre (ASIC): application aux chambres multifils et aux photomultiplicateurs de l`experience GRAAL

    Energy Technology Data Exchange (ETDEWEB)

    Bugnet, H.

    1995-11-21

    The nuclear physics project GRAAL (GRenoble Anneau Accelerateur Laser) located at the European Synchrotron Radiation Facility (ESRF) in Grenoble produces a high energy photon beam with a maximum energy of 1.5 GeV. This gamma beam is obtained by Compton backscattering and can be polarized easily. It permits to probe, in an original way, the structure of the nucleon. The associated detector system includes multiwire proportional chambers and scintillator hodoscopes. A kit of six ASICs (Application Specific Integrated Circuit) has been developed and used for the signal processing and data conditioning up to the level of the data acquisition. This integrated electronics can be mounted right on the detectors. Obvious advantages, due to the reduction of the length of the wires and the number of connections, are an improvement of the signal quality and an increase of the reliability. The Wire Processor (WP), ASIC designed and tested during this thesis, treats the signals from the chamber wires and the photomultipliers. In one chip, there are two identical channels permitting the amplification, the amplitude discrimination, the generation of a programmable delay and the writing in a two state memory in case of coincidence with an external strobe signal. The measurement of the multiwire chamber efficiency demonstrates the functioning of the WP, the data conditioning electronics, the data acquisition and the chamber itself. (author). 62 refs., 111 figs., 13 tabs.

  5. Processing and Prolonged 500 C Testing of 4H-SiC JFET Integrated Circuits with Two Levels of Metal Interconnect

    Science.gov (United States)

    Spry, David J.; Neudeck, Philip G.; Chen, Liangyu; Lukco, Dorothy; Chang, Carl W.; Beheim, Glenn M.; Krasowski, Michael J.; Prokop, Norman F.

    2015-01-01

    Complex integrated circuit (IC) chips rely on more than one level of interconnect metallization for routing of electrical power and signals. This work reports the processing and testing of 4H-SiC junction field effect transistor (JFET) prototype IC's with two levels of metal interconnect capable of prolonged operation at 500 C. Packaged functional circuits including 3- and 11-stage ring oscillators, a 4-bit digital to analog converter, and a 4-bit address decoder and random access memory cell have been demonstrated at 500 C. A 3-stage oscillator functioned for over 3000 hours at 500 C in air ambient. Improved reproducibility remains to be accomplished.

  6. Results of water corrosion in static cell tests representing multi-metal assemblies in the hydraulic circuits of Tore supra

    Energy Technology Data Exchange (ETDEWEB)

    Lipa, M. [CEA/DSM/DRFC Centre de Cadarache, 13 - Saint-Paul lez Durance (France); Blanchet, J.; Cellier, F. [Framatome, 71 - Saint Marcel (France). Centre Technique

    2007-07-01

    Following experiences obtained with steam generator tubes of nuclear power plants, a cooling water quality of AVT (all volatile treatment) has been defined based on demineralised water with adjustment of the pH value to about 9.0/7.0 (25 C/200 C) by addiction of ammoniac, and hydrazine in order to absorb oxygen dissolved in water. At that time, a simplified water corrosion test program has been performed using static (no circulation) test cell samples made of above mentioned TS metal combinations. All test cell samples, prepared and filled with AVT water, were performed at 280 C and 65 bars in an autoclave during 3000 hours. The test cell water temperature has been chosen to be sufficient above the TS component working temperature, in order to accelerate an eventual corrosion process. Generally all above mentioned metal combinations survived the test campaign without stress corrosion cracking, with the exception of the memory metal junction (creep in Cu) and the bellows made of St-St 316L and Inconel 625 while 316 Ti bellows survived. In contrary to the vacuum brazed Cu-LSTP to St-St samples, some of flame brazed Cu to St-St samples failed either in the braze joint or in the copper structure itself. For comparison, a spot weld of an inflated 316L panel sample, filled voluntary with a caustic solution of pH 11.5 (25 C), failed after 90 h of testing (intergranular cracking at the spot weld), while an identical sample containing AVT water of pH 9.0 (25 C) survived without damage. The results of these tests, performed during 1986 and 1997, have never been published and therefore are presented more in detail in this paper since corrosion in hydraulic circuits is also an issue of ITER. Up to day, the TS cooling water plant operates with an above mentioned water treatment and no water leaks have been detected on in-vessel components originating from water corrosion at high temperature and high pressure. (orig.)

  7. CMOS analog circuit design

    CERN Document Server

    Allen, Phillip E

    1987-01-01

    This text presents the principles and techniques for designing analog circuits to be implemented in a CMOS technology. The level is appropriate for seniors and graduate students familiar with basic electronics, including biasing, modeling, circuit analysis, and some familiarity with frequency response. Students learn the methodology of analog integrated circuit design through a hierarchically-oriented approach to the subject that provides thorough background and practical guidance for designing CMOS analog circuits, including modeling, simulation, and testing. The authors' vast industrial experience and knowledge is reflected in the circuits, techniques, and principles presented. They even identify the many common pitfalls that lie in the path of the beginning designer--expert advice from veteran designers. The text mixes the academic and practical viewpoints in a treatment that is neither superficial nor overly detailed, providing the perfect balance.

  8. A Calculation Method of Equivalent Circuit Constants of Synchronous Machines Considering Field Transient Characteristics Using DC Decay Testing Method with Open and Shorted Field Windings

    Science.gov (United States)

    Kano, Takashi; Watanabe, Yasutoshi; Ara, Takahiro; Matsumura, Toshiro

    It has been reported that the calculated values of field transient behavior in a synchronous machine differ considerably from the measured values. This discrepancy is caused by the use of equivalent circuit constants in standardized tests provied by JEC2130 and IEC60034-4, in which the mutual leakage reactance between the damper and field windings is not accounted for. The authors have been studying a method for calculating equivalent circuit constants for the accurate simulation of transient behavior including the field winding side, by means of a standstill test with a small-capacity DC power supply (DC decay testing method). The authors have previously presented a calculation method using operational impedances with the field windings opened, shorted, and inserted with an external resistance, obtained by the DC decay test. This paper presents a new method in which the external resistance used in our previous method is no longer needed. Instead, the field winding impedance is determined based on its invariability against slip. The validity of the new method is demonstrated by comparing the calculated and measured values of the armature and field currents during a sudden three-phase short-circuit using 10kVA-200V-31.9A-4P-50Hz test machines.

  9. Electrical Circuit Tester

    Science.gov (United States)

    Love, Frank

    2006-04-18

    An electrical circuit testing device is provided, comprising a case, a digital voltage level testing circuit with a display means, a switch to initiate measurement using the device, a non-shorting switching means for selecting pre-determined electrical wiring configurations to be tested in an outlet, a terminal block, a five-pole electrical plug mounted on the case surface and a set of adapters that can be used for various multiple-pronged electrical outlet configurations for voltages from 100 600 VAC from 50 100 Hz.

  10. Which systems (except main circuits) should be commissioned/tested for 7 TeV operation before the long shutdown?

    OpenAIRE

    Pojer, M

    2011-01-01

    The key driver of the long 2012/13 shutdown is the consolidation of the 13 kA splices. Once the machine will be back to operation, the increase of energy to 7 TeV should be possible. Are all circuits and systems ready for 7 TeV operation? This paper focuses on what else could limit LHC high energy operation and how we can know that in advance. A period of dedicated testing at the end of operation and before the long shutdown could give a precious knowledge on the status of the machine.

  11. Affective Circuits

    DEFF Research Database (Denmark)

    to the intersecting streams of goods, people, ideas, and money as they circulate between African migrants and their kin who remain back home. They also show the complex ways that emotions become entangled in these exchanges. Examining how these circuits operate in domains of social life ranging from child fosterage...... to binational marriages, from coming-of-age to healing and religious rituals, the book also registers the tremendous impact of state officials, laws, and policies on migrant experience. Together these essays paint an especially vivid portrait of new forms of kinship at a time of both intense mobility and ever...

  12. Integrated Circuit Immunity

    Science.gov (United States)

    Sketoe, J. G.; Clark, Anthony

    2000-01-01

    This paper presents a DOD E3 program overview on integrated circuit immunity. The topics include: 1) EMI Immunity Testing; 2) Threshold Definition; 3) Bias Tee Function; 4) Bias Tee Calibration Set-Up; 5) EDM Test Figure; 6) EMI Immunity Levels; 7) NAND vs. and Gate Immunity; 8) TTL vs. LS Immunity Levels; 9) TP vs. OC Immunity Levels; 10) 7805 Volt Reg Immunity; and 11) Seventies Chip Set. This paper is presented in viewgraph form.

  13. LOGIC CIRCUIT

    Science.gov (United States)

    Strong, G.H.; Faught, M.L.

    1963-12-24

    A device for safety rod counting in a nuclear reactor is described. A Wheatstone bridge circuit is adapted to prevent de-energizing the hopper coils of a ball backup system if safety rods, sufficient in total control effect, properly enter the reactor core to effect shut down. A plurality of resistances form one arm of the bridge, each resistance being associated with a particular safety rod and weighted in value according to the control effect of the particular safety rod. Switching means are used to switch each of the resistances in and out of the bridge circuit responsive to the presence of a particular safety rod in its effective position in the reactor core and responsive to the attainment of a predetermined velocity by a particular safety rod enroute to its effective position. The bridge is unbalanced in one direction during normal reactor operation prior to the generation of a scram signal and the switching means and resistances are adapted to unbalance the bridge in the opposite direction if the safety rods produce a predetermined amount of control effect in response to the scram signal. The bridge unbalance reversal is then utilized to prevent the actuation of the ball backup system, or, conversely, a failure of the safety rods to produce the predetermined effect produces no unbalance reversal and the ball backup system is actuated. (AEC)

  14. Comminution circuits for compact itabirites

    Directory of Open Access Journals (Sweden)

    Pedro Ferreira Pinto

    Full Text Available Abstract In the beneficiation of compact Itabirites, crushing and grinding account for major operational and capital costs. As such, the study and development of comminution circuits have a fundamental importance for feasibility and optimization of compact Itabirite beneficiation. This work makes a comparison between comminution circuits for compact Itabirites from the Iron Quadrangle. The circuits developed are: a crushing and ball mill circuit (CB, a SAG mill and ball mill circuit (SAB and a single stage SAG mill circuit (SSSAG. For the SAB circuit, the use of pebble crushing is analyzed (SABC. An industrial circuit for 25 million tons of run of mine was developed for each route from tests on a pilot scale (grinding and industrial scale. The energy consumption obtained for grinding in the pilot tests was compared with that reported by Donda and Bond. The SSSAG route had the lowest energy consumption, 11.8kWh/t and the SAB route had the highest energy consumption, 15.8kWh/t. The CB and SABC routes had a similar energy consumption of 14.4 kWh/t and 14.5 kWh/t respectively.

  15. Inside anesthesia breathing circuits: time to reach a set sevoflurane concentration in toddlers and newborns: simulation using a test lung.

    Science.gov (United States)

    Kern, Delphine; Larcher, Claire; Basset, Bertrand; Alacoque, Xavier; Fesseau, Rose; Samii, Kamran; Minville, Vincent; Fourcade, Olivier

    2012-08-01

    We measured the time it takes to reach the desired inspired anesthetic concentration using the Primus (Drägerwerk, AG, Lübeck, Germany) and the Avance (GE Datex-Ohmeda, Munich, Germany) anesthesia machines with toddler and newborn ventilation settings. The time to reach 95% of inspired target sevoflurane concentration was measured during wash-in from 0 to 6 vol% sevoflurane and during wash-out from 6 to 0 vol% with fresh gas flows equal to 1 and 2 times the minute ventilation. The Avance was faster than the Primus (65 seconds [95% confidence interval (CI): 55 to 78] vs 310 seconds [95% CI: 261 to 359]) at 1.5 L/min fresh gas flow, tidal volume of 50 mL, and 30 breaths/min. Times were shorter by the same magnitude at higher fresh gas flows and higher minute ventilation rates. The effect of doubling fresh gas flow was variable and less than expected. The Primus is slower during newborn than toddler ventilation, whereas the Avance's response time was the same for newborn and toddler ventilation. Our data confirm that the time to reach the target-inspired anesthetic concentration depends on breathing circuit volume, fresh gas flow, and minute ventilation.

  16. Controllable circuit

    DEFF Research Database (Denmark)

    2010-01-01

    signal. The control unit comprises a first signal processing unit, a second signal processing unit, and a combiner unit. The first signal processing unit has an output and is supplied with a first carrier signal and an input signal. The second signal processing unit has an output and is supplied...... with a second carrier signal and the input signal. The combiner unit is connected to the first and second signal processing units combining the outputs of the first and the second signal processing units to form a signal representative of the control signal......A switch-mode power circuit comprises a controllable element and a control unit. The controllable element is configured to control a current in response to a control signal supplied to the controllable element. The control unit is connected to the controllable element and provides the control...

  17. Advantages of the synthetic technique for the conduction of short circuit tests to breakers; Ventajas de la tecnica sintetica para realizar pruebas de corto circuito a interruptores

    Energy Technology Data Exchange (ETDEWEB)

    Sibilski, Henry [Instituto Electrotecnico de Varsovia, Varsovia (Poland); Ochoa Vivanco, Ruben [Instituto de Investigaciones Electricas, Cuernavaca (Mexico)

    1986-12-31

    In this article the operational principle of the synthetic test is described; specifically of the current injection circuit in parallel. Its utilization in the research and development of new breaker models and its wide possibilities regarding its testing characteristics is outlined. Likewise the different tests that can be performed by means of the synthetic technique are described. Finally the importance of the synthetic tests is outlined for the development of own technology in the area of interruption equipment and emphasis is made that in industrialized countries this technique is of common practice. [Espanol] En este articulo se describe el principio de operacion de la prueba sintetica; especificamente del circuito de inyeccion de corriente en paralelo. Se destaca su utilizacion en la investigacion y desarrollo de nuevos modelos de interruptores y sus amplias posibilidades en cuanto a caracteristicas de prueba. Asimismo, se describen las diferentes pruebas que pueden realizarse mediante la tecnica sintetica. Por ultimo, se destaca la importancia de las pruebas sinteticas para el desarrollo de tecnologia propia en el area de equipos de interrupcion, y se hace notar que en paises desarrollados, esta tecnica es practica comun.

  18. Investigation on the Short-Circuit Behavior of an Aged IGBT Module Through a 6 kA/1.1 kV Non-Destructive Testing Equipment

    DEFF Research Database (Denmark)

    Wu, Rui; Smirnova, Liudmila; Iannuzzo, Francesco

    2014-01-01

    This paper describes the design and development of a 6 kA/1.1 kV non-destructive testing system, which aims for short circuit testing of high-power IGBT modules. An ultralow stray inductance of 37 nH is achieved in the implementation of the tester. An 100 MHz FPGA supervising unit enables 10 ns l...

  19. Analog circuit design designing dynamic circuit response

    CERN Document Server

    Feucht, Dennis

    2010-01-01

    This second volume, Designing Dynamic Circuit Response builds upon the first volume Designing Amplifier Circuits by extending coverage to include reactances and their time- and frequency-related behavioral consequences.

  20. The Maplin electronic circuits handbook

    CERN Document Server

    Tooley, Michael

    1990-01-01

    The Maplin Electronic Circuits Handbook provides pertinent data, formula, explanation, practical guidance, theory and practical guidance in the design, testing, and construction of electronic circuits. This book discusses the developments in electronics technology techniques.Organized into 11 chapters, this book begins with an overview of the common types of passive component. This text then provides the reader with sufficient information to make a correct selection of passive components for use in the circuits. Other chapters consider the various types of the most commonly used semiconductor

  1. Analog circuit design designing waveform processing circuits

    CERN Document Server

    Feucht, Dennis

    2010-01-01

    The fourth volume in the set Designing Waveform-Processing Circuits builds on the previous 3 volumes and presents a variety of analog non-amplifier circuits, including voltage references, current sources, filters, hysteresis switches and oscilloscope trigger and sweep circuitry, function generation, absolute-value circuits, and peak detectors.

  2. Development and Field Testing of a Model to Simulate a Demonstration of Le Chatelier's Principle Using the Wheatstone Bridge Circuit.

    Science.gov (United States)

    Vickner, Edward Henry, Jr.

    An electronic simulation model was designed, constructed, and then field tested to determine student opinion of its effectiveness as an instructional aid. The model was designated as the Equilibrium System Simulator (ESS). The model was built on the principle of electrical symmetry applied to the Wheatstone bridge and was constructed from readily…

  3. An Algorithm of an X-ray Hit Allocation to a Single Pixel in a Cluster and Its Test-Circuit Implementation

    Energy Technology Data Exchange (ETDEWEB)

    Deptuch, G. W. [AGH-UST, Cracow; Fahim, F. [Fermilab; Grybos, P. [AGH-UST, Cracow; Hoff, J. [Fermilab; Maj, P. [AGH-UST, Cracow; Siddons, D. P. [Brookhaven; Kmon, P. [AGH-UST, Cracow; Trimpl, M. [Fermilab; Zimmerman, T. [Fermilab

    2017-05-06

    An on-chip implementable algorithm for allocation of an X-ray photon imprint, called a hit, to a single pixel in the presence of charge sharing in a highly segmented pixel detector is described. Its proof-of-principle implementation is also given supported by the results of tests using a highly collimated X-ray photon beam from a synchrotron source. The algorithm handles asynchronous arrivals of X-ray photons. Activation of groups of pixels, comparisons of peak amplitudes of pulses within an active neighborhood and finally latching of the results of these comparisons constitute the three procedural steps of the algorithm. A grouping of pixels to one virtual pixel that recovers composite signals and event driven strobes to control comparisons of fractional signals between neighboring pixels are the actuators of the algorithm. The circuitry necessary to implement the algorithm requires an extensive inter-pixel connection grid of analog and digital signals that are exchanged between pixels. A test-circuit implementation of the algorithm was achieved with a small array of 32×32 pixels and the device was exposed to an 8 keV highly collimated to a diameter of 3 μm X-ray beam. The results of these tests are given in the paper assessing physical implementation of the algorithm.

  4. Development of data acquisition system for test circuit for the Thermo-Hydraulic Laboratory of CDTN; Desenvolvimento de sistema de aquisicao de dados para circuito de testes do Laboratorio de Termo-Hidraulica do CDTN

    Energy Technology Data Exchange (ETDEWEB)

    Corrade, Thales Jose Rodrigues; Mesquita, Amir Zacarias; Santos, Andre Augusto Campagnole dos, E-mail: thalescorrade@hotmail.com, E-mail: amir@cdtn.br, E-mail: aacs@cdtn.br [Centro de Desenvolvimento da Tecnologia Nuclear (CDTN/CNEN-MG), Belo Horizonte, MG (Brazil). Servico de Tecnologia de Reatores

    2013-07-01

    The Circuit Water-Air (CWA), present in the Laboratorio de Termo-Hidraulica of the Centro de Desenvolvimento da Tecnologia Nuclear/Comissao Nacional de Energia Nuclear (CDTN / CNEN), has been used to evaluate devices present in nuclear fuel elements of a PWR (Pressurized Water Reactor). Currently, a segment of 5x5 beam simulators grids with spacer bars is being tested, serving one of the activities under the Project FUJB / FINEP / INB - 'Development of New Generation of Nuclear Fuel Element '. For the measurements of pressure drop along this beam, a system of data acquisition based on Basic language was created. Although this system is efficient and robust, their resources are very limited. Therefore, it was decided to use the software LabVIEW® implementing a more versatile and modern system. This article describes the new data acquisition system, and presents some results. The main parameters are monitored: temperature, density, dynamic viscosity, Reynolds number. The values of standard deviation, mean and uncertainty of an arbitrary channel are calculated. The system was installed and tested in the circuit under experimental conditions and showed satisfactory results.

  5. Equivalent Quantum Circuits

    OpenAIRE

    Garcia-Escartin, Juan Carlos; Chamorro-Posada, Pedro

    2011-01-01

    Quantum algorithms and protocols are often presented as quantum circuits for a better understanding. We give a list of equivalence rules which can help in the analysis and design of quantum circuits. As example applications we study quantum teleportation and dense coding protocols in terms of a simple XOR swapping circuit and give an intuitive picture of a basic gate teleportation circuit.

  6. Universal Quantum Circuits

    OpenAIRE

    Bera, Debajyoti; Fenner, Stephen; Green, Frederic; Homer, Steve

    2008-01-01

    We define and construct efficient depth-universal and almost-size-universal quantum circuits. Such circuits can be viewed as general-purpose simulators for central classes of quantum circuits and can be used to capture the computational power of the circuit class being simulated. For depth we construct universal circuits whose depth is the same order as the circuits being simulated. For size, there is a log factor blow-up in the universal circuits constructed here. We prove that this construc...

  7. Circuit analysis for dummies

    CERN Document Server

    Santiago, John

    2013-01-01

    Circuits overloaded from electric circuit analysis? Many universities require that students pursuing a degree in electrical or computer engineering take an Electric Circuit Analysis course to determine who will ""make the cut"" and continue in the degree program. Circuit Analysis For Dummies will help these students to better understand electric circuit analysis by presenting the information in an effective and straightforward manner. Circuit Analysis For Dummies gives you clear-cut information about the topics covered in an electric circuit analysis courses to help

  8. Solid-state circuits

    CERN Document Server

    Pridham, G J

    2013-01-01

    Solid-State Circuits provides an introduction to the theory and practice underlying solid-state circuits, laying particular emphasis on field effect transistors and integrated circuits. Topics range from construction and characteristics of semiconductor devices to rectification and power supplies, low-frequency amplifiers, sine- and square-wave oscillators, and high-frequency effects and circuits. Black-box equivalent circuits of bipolar transistors, physical equivalent circuits of bipolar transistors, and equivalent circuits of field effect transistors are also covered. This volume is divided

  9. Study on Oscillations during Short Circuit of MW-Scale IGBT Power Modules by Means of a 6-kA/1.1-kV Nondestructive Testing System

    DEFF Research Database (Denmark)

    Wu, Rui; Diaz Reigosa, Paula; Iannuzzo, Francesco

    2015-01-01

    modules displayed severe divergent oscillations, which were subsequently characterized. Experimental tests indicate that nonnegligible circuit stray inductance plays an important role in the divergent oscillations. In addition, the temperature dependence of the transconductance is proposed as an important...... element in triggering for the oscillations....

  10. Electronics circuits and systems

    CERN Document Server

    Bishop, Owen

    2007-01-01

    The material in Electronics - Circuits and Systems is a truly up-to-date textbook, with coverage carefully matched to the electronics units of the 2007 BTEC National Engineering and the latest AS and A Level specifications in Electronics from AQA, OCR and WJEC. The material has been organized with a logical learning progression, making it ideal for a wide range of pre-degree courses in electronics. The approach is student-centred and includes: numerous examples and activities; web research topics; Self Test features, highlighted key facts, formulae and definitions. Each chapter ends with a set

  11. Electronics circuits and systems

    CERN Document Server

    Bishop, Owen

    2011-01-01

    The material in Electronics - Circuits and Systems is a truly up-to-date textbook, with coverage carefully matched to the electronics units of the 2007 BTEC National Engineering and the latest AS and A Level specifications in Electronics from AQA, OCR and WJEC. The material has been organized with a logical learning progression, making it ideal for a wide range of pre-degree courses in electronics. The approach is student-centred and includes: numerous examples and activities; web research topics; Self Test features, highlighted key facts, formulae and definitions. Ea

  12. Improvement and qualification of ultrasonic testing of dissimilar welds in the primary circuit of NPPs; Verbesserung und Qualifizierung der Ultraschallpruefung von Mischnaehten im Primaerkreis von KKW

    Energy Technology Data Exchange (ETDEWEB)

    Mitzscherling, Steffen; Barth, Enrico; Homann, Tobias; Prager, Jens [Bundesanstalt fuer Materialforschung und -pruefung (BAM), Berlin (Germany); Goetschel, Sebastian; Weiser, Martin [Konrad-Zuse-Zentrum fuer Informationstechnik Berlin (ZIB) (Germany)

    2017-08-01

    The austenitic and dissimilar welds found in the primary circuit of nuclear power plants are not only extremely relevant to safety but also place very high demands on material testing. In addition to limited accessibility, the macroscopic structure of the weld seam is of paramount importance for ultrasound testing. In order to reliably determine material errors in position and size, the grain orientations and the elastic constants of the anisotropic weld bead structure must be known. The following work steps are used for the imaging representation of possible material defects: First, the weld seam is sounded in order to be able to determine important weld seam parameters, such as, for example, the grain orientation, using an inverse method. On the basis of these parameters, the sound paths are simulated in the next step by means of raytracing (RT). Finally, this RT simulation is assigned the measurement data (A-scans) from different transmitter and receiver positions and superimposed according to the Synthetic Aperature Focusing Technique (SAFT) method. The combination of inverse process, RT and SAFT also ensures a correct visualization of the faults in anisotropic materials. We explain these three methods and present the test arrangement of test specimens with artificial test errors. Measurement data as well as their evaluation are compared with the results of a CIVA simulation. [German] Die im Primaerkreislauf von Kernkraftwerken anzutreffenden austenitischen Schweiss- und Mischnaehte sind nicht nur extrem sicherheitsrelevant, sondern stellen auch sehr hohe Anforderungen an die Materialpruefung. Neben der eingeschraenkten Zugaenglichkeit ist das makroskopische Gefuege der Schweissnaht fuer die Pruefung mit Ultraschall von hoechster Bedeutung. Um Materialfehler zuverlaessig in Position und Groesse bestimmen zu koennen, muessen die Kornorientierungen und die elastischen Konstanten des anisotropen Schweissnahtgefueges bekannt sein. Fuer die bildgebende Darstellung

  13. The circuit designer's companion

    CERN Document Server

    Williams, Tim

    1991-01-01

    The Circuit Designer's Companion covers the theoretical aspects and practices in analogue and digital circuit design. Electronic circuit design involves designing a circuit that will fulfill its specified function and designing the same circuit so that every production model of it will fulfill its specified function, and no other undesired and unspecified function.This book is composed of nine chapters and starts with a review of the concept of grounding, wiring, and printed circuits. The subsequent chapters deal with the passive and active components of circuitry design. These topics are foll

  14. Electronic devices and circuits

    CERN Document Server

    Pridham, Gordon John

    1972-01-01

    Electronic Devices and Circuits, Volume 3 provides a comprehensive account on electronic devices and circuits and includes introductory network theory and physics. The physics of semiconductor devices is described, along with field effect transistors, small-signal equivalent circuits of bipolar transistors, and integrated circuits. Linear and non-linear circuits as well as logic circuits are also considered. This volume is comprised of 12 chapters and begins with an analysis of the use of Laplace transforms for analysis of filter networks, followed by a discussion on the physical properties of

  15. Intuitive analog circuit design

    CERN Document Server

    Thompson, Marc

    2013-01-01

    Intuitive Analog Circuit Design outlines ways of thinking about analog circuits and systems that let you develop a feel for what a good, working analog circuit design should be. This book reflects author Marc Thompson's 30 years of experience designing analog and power electronics circuits and teaching graduate-level analog circuit design, and is the ideal reference for anyone who needs a straightforward introduction to the subject. In this book, Dr. Thompson describes intuitive and ""back-of-the-envelope"" techniques for designing and analyzing analog circuits, including transistor amplifi

  16. Quantum simulations with circuit quantum electrodynamics

    OpenAIRE

    Romero, G.; Solano, E.; Lamata, L.

    2016-01-01

    Superconducting circuits have become a leading quantum technology for testing fundamentals of quantum mechanics and for the implementation of advanced quantum information protocols. In this chapter, we revise the basic concepts of circuit network theory and circuit quantum electrodynamics for the sake of digital and analog quantum simulations of quantum field theories, relativistic quantum mechanics, and many-body physics, involving fermions and bosons. Based on recent improvements in scalabi...

  17. Electric circuits essentials

    CERN Document Server

    REA, Editors of

    2012-01-01

    REA's Essentials provide quick and easy access to critical information in a variety of different fields, ranging from the most basic to the most advanced. As its name implies, these concise, comprehensive study guides summarize the essentials of the field covered. Essentials are helpful when preparing for exams, doing homework and will remain a lasting reference source for students, teachers, and professionals. Electric Circuits I includes units, notation, resistive circuits, experimental laws, transient circuits, network theorems, techniques of circuit analysis, sinusoidal analysis, polyph

  18. Classical circuit theory

    CERN Document Server

    Wing, Omar

    2008-01-01

    Starting with the basic principles of circuits, this book derives their analytic properties in both the time and frequency domains. It develops an algorithmic method to design common and uncommon types of circuits, such as prototype filters, lumped delay lines, constant phase difference circuits, and delay equalizers.

  19. Signal sampling circuit

    NARCIS (Netherlands)

    Louwsma, S.M.; Vertregt, Maarten

    2011-01-01

    A sampling circuit for sampling a signal is disclosed. The sampling circuit comprises a plurality of sampling channels adapted to sample the signal in time-multiplexed fashion, each sampling channel comprising a respective track-and-hold circuit connected to a respective analogue to digital

  20. Signal sampling circuit

    NARCIS (Netherlands)

    Louwsma, S.M.; Vertregt, Maarten

    2010-01-01

    A sampling circuit for sampling a signal is disclosed. The sampling circuit comprises a plurality of sampling channels adapted to sample the signal in time-multiplexed fashion, each sampling channel comprising a respective track-and-hold circuit connected to a respective analogue to digital

  1. Piezoelectric drive circuit

    Science.gov (United States)

    Treu, Jr., Charles A.

    1999-08-31

    A piezoelectric motor drive circuit is provided which utilizes the piezoelectric elements as oscillators and a Meacham half-bridge approach to develop feedback from the motor ground circuit to produce a signal to drive amplifiers to power the motor. The circuit automatically compensates for shifts in harmonic frequency of the piezoelectric elements due to pressure and temperature changes.

  2. Exact Threshold Circuits

    DEFF Research Database (Denmark)

    Hansen, Kristoffer Arnsfelt; Podolskii, Vladimir V.

    2010-01-01

    with the well-studied corresponding hierarchies defined using ordinary threshold gates. A major open problem in Boolean circuit complexity is to provide an explicit super-polynomial lower bound for depth two threshold circuits. We identify the class of depth two exact threshold circuits as a natural subclass...

  3. Short-circuit logic

    NARCIS (Netherlands)

    Bergstra, J.A.; Ponse, A.

    2010-01-01

    Short-circuit evaluation denotes the semantics of propositional connectives in which the second argument is only evaluated if the first argument does not suffice to determine the value of the expression. In programming, short-circuit evaluation is widely used. A short-circuit logic is a variant of

  4. A concise guide to chaotic electronic circuits

    CERN Document Server

    Buscarino, Arturo; Frasca, Mattia; Sciuto, Gregorio

    2014-01-01

    This brief provides a source of instruction from which students can be taught about the practicalities of designing and using chaotic circuits. The text provides information on suitable materials, circuit design and schemes for design realization. Readers are then shown how to reproduce experiments on chaos and to design new ones. The text guides the reader easily from the basic idea of chaos to the laboratory test providing an experimental basis that can be developed for such applications as secure communications. This brief provides introductory information on sample chaotic circuits, includes coverage of their development, and the “gallery” section provides information on a wide range of circuits. Concise Guide to Chaotic Electronic Circuits will be useful to anyone running a laboratory class involving chaotic circuits and to students wishing to learn about them.

  5. Development of CMOS integrated circuits

    Science.gov (United States)

    Bertino, F.; Feller, A.; Greenhouse, J.; Lombardi, T.; Merriam, A.; Noto, R.; Ozga, S.; Pryor, R.; Ramondetta, P.; Smith, A.

    1979-01-01

    Report documents life cycles of two custom CMOS integrated circuits: (1) 4-bit multiplexed register with shift left and shift right capabilities, and (2) dual 4-bit registers. Cycles described include conception as logic diagrams through design, fabrication, testing, and delivery.

  6. F-Paris: integrated electronic circuits [Tender

    CERN Multimedia

    2003-01-01

    "Fourniture, montage et tests des circuits imprimes et modules multi composants pour le trajectographe central de CMS. Maximum de 12 000 circuits imprimes et modules multi-composants necessaires au trajectographe central de l'experience CMS aupres du Large Hadron Collider" (1 page).

  7. Feedback in analog circuits

    CERN Document Server

    Ochoa, Agustin

    2016-01-01

    This book describes a consistent and direct methodology to the analysis and design of analog circuits with particular application to circuits containing feedback. The analysis and design of circuits containing feedback is generally presented by either following a series of examples where each circuit is simplified through the use of insight or experience (someone else’s), or a complete nodal-matrix analysis generating lots of algebra. Neither of these approaches leads to gaining insight into the design process easily. The author develops a systematic approach to circuit analysis, the Driving Point Impedance and Signal Flow Graphs (DPI/SFG) method that does not require a-priori insight to the circuit being considered and results in factored analysis supporting the design function. This approach enables designers to account fully for loading and the bi-directional nature of elements both in the feedback path and in the amplifier itself, properties many times assumed negligible and ignored. Feedback circuits a...

  8. Model Comparison Exercise Circuit Training Game and Circuit Ladder Drills to Improve Agility and Speed

    Directory of Open Access Journals (Sweden)

    Susilaturochman Hendrawan Koestanto

    2017-11-01

    Full Text Available The purpose of this study was to compare: (1 the effect of circuit training game and circuit ladder drill for the agility; (2 the effect of circuit training game and circuit ladder drill on speed; (3 the difference effect of circuit training game and circuit ladder drill for the speed (4 the difference effect of circuit training game and circuit ladder drill on agility. The type of this research was quantitative with quasi-experimental methods. The design of this research was Factorial Design, with analysing data using ANOVA. The process of data collection was done by using 30 meters sprint speed test and shuttle run test during the pretest and posttest. Furthermore, the data was analyzed by using SPSS 22.0 series. Result: The circuit training game exercise program and circuit ladder drill were significant to increase agility and speed (sig 0.000 < α = 0.005 Group I, II, III had significant differences (sig 0.000 < α = 0.005. The mean of increase in speed of group I = 0.20 seconds, group II = 0.31 seconds, and group III = 0.11 seconds. The average increase agility to group I = 0.34 seconds group II = 0.60 seconds, group III = 0.13 seconds. Based on the analysis above, it could be concluded that there was an increase in the speed and agility of each group after being given a training.

  9. Basics of Verilog HDL and design of digital logic circuit

    Energy Technology Data Exchange (ETDEWEB)

    Beck, Ju Gi

    2008-03-15

    This book explains of the basic of Verilog HDL and design of digital logic circuit with ALTERA Quartus II and MAX + PLUS II. It comprised four charters, which include four chapters, introduction of ASIC, ALTERA design software and introduction, basic of Verilog HDL and making of download cable like parallel download, MAX 7000s device and FPGA circuit constitution and test, design of digital logic circuit with basic of Verilog HDL, design of combination logic circuit and order logic circuit, application circuit design such as 7 segment LED display design, LCD display device design and digital clocks.

  10. Electric circuits and signals

    CERN Document Server

    Sabah, Nassir H

    2007-01-01

    Circuit Variables and Elements Overview Learning Objectives Electric Current Voltage Electric Power and Energy Assigned Positive Directions Active and Passive Circuit Elements Voltage and Current Sources The Resistor The Capacitor The Inductor Concluding Remarks Summary of Main Concepts and Results Learning Outcomes Supplementary Topics on CD Problems and Exercises Basic Circuit Connections and Laws Overview Learning Objectives Circuit Terminology Kirchhoff's Laws Voltage Division and Series Connection of Resistors Current Division and Parallel Connection of Resistors D-Y Transformation Source Equivalence and Transformation Reduced-Voltage Supply Summary of Main Concepts and Results Learning Outcomes Supplementary Topics and Examples on CD Problems and Exercises Basic Analysis of Resistive Circuits Overview Learning Objectives Number of Independent Circuit Equations Node-Voltage Analysis Special Considerations in Node-Voltage Analysis Mesh-Current Analysis Special Conside...

  11. Analog circuits cookbook

    CERN Document Server

    Hickman, Ian

    2013-01-01

    Analog Circuits Cookbook presents articles about advanced circuit techniques, components and concepts, useful IC for analog signal processing in the audio range, direct digital synthesis, and ingenious video op-amp. The book also includes articles about amplitude measurements on RF signals, linear optical imager, power supplies and devices, and RF circuits and techniques. Professionals and students of electrical engineering will find the book informative and useful.

  12. Analog circuit design

    CERN Document Server

    Dobkin, Bob

    2012-01-01

    Analog circuit and system design today is more essential than ever before. With the growth of digital systems, wireless communications, complex industrial and automotive systems, designers are being challenged to develop sophisticated analog solutions. This comprehensive source book of circuit design solutions aids engineers with elegant and practical design techniques that focus on common analog challenges. The book's in-depth application examples provide insight into circuit design and application solutions that you can apply in today's demanding designs. <

  13. Regenerative feedback resonant circuit

    Science.gov (United States)

    Jones, A. Mark; Kelly, James F.; McCloy, John S.; McMakin, Douglas L.

    2014-09-02

    A regenerative feedback resonant circuit for measuring a transient response in a loop is disclosed. The circuit includes an amplifier for generating a signal in the loop. The circuit further includes a resonator having a resonant cavity and a material located within the cavity. The signal sent into the resonator produces a resonant frequency. A variation of the resonant frequency due to perturbations in electromagnetic properties of the material is measured.

  14. CMOS circuits manual

    CERN Document Server

    Marston, R M

    1995-01-01

    CMOS Circuits Manual is a user's guide for CMOS. The book emphasizes the practical aspects of CMOS and provides circuits, tables, and graphs to further relate the fundamentals with the applications. The text first discusses the basic principles and characteristics of the CMOS devices. The succeeding chapters detail the types of CMOS IC, including simple inverter, gate and logic ICs and circuits, and complex counters and decoders. The last chapter presents a miscellaneous collection of two dozen useful CMOS circuits. The book will be useful to researchers and professionals who employ CMOS circu

  15. Circuits and filters handbook

    CERN Document Server

    Chen, Wai-Kai

    2003-01-01

    A bestseller in its first edition, The Circuits and Filters Handbook has been thoroughly updated to provide the most current, most comprehensive information available in both the classical and emerging fields of circuits and filters, both analog and digital. This edition contains 29 new chapters, with significant additions in the areas of computer-aided design, circuit simulation, VLSI circuits, design automation, and active and digital filters. It will undoubtedly take its place as the engineer's first choice in looking for solutions to problems encountered in the design, analysis, and behavi

  16. Nanoscale Microelectronic Circuit Development

    Science.gov (United States)

    2011-06-17

    Project 3: Low-Power All-Digital Chip-to-Chip Interface Circuits by Pavan Kumar Hanumolu (OSU) CDADIC Project 4: Nanoscale Clock and Data Recovery...CDADIC Project 3: Low-Power All-Digital Chip-to-Chip Interface Circuits by Pavan Kumar Hanumolu (OSU) CDADIC Project 6: Stochastic and Passive A/D...Area 3: Reconfigurable Mixed-Signal Circuits CDADIC Project 3: Low-Power All-Digital Chip-to-Chip Interface Circuits by Pavan Kumar Hanumolu (OSU

  17. Timergenerator circuits manual

    CERN Document Server

    Marston, R M

    2013-01-01

    Timer/Generator Circuits Manual is an 11-chapter text that deals mainly with waveform generator techniques and circuits. Each chapter starts with an explanation of the basic principles of its subject followed by a wide range of practical circuit designs. This work presents a total of over 300 practical circuits, diagrams, and tables.Chapter 1 outlines the basic principles and the different types of generator. Chapters 2 to 9 deal with a specific type of waveform generator, including sine, square, triangular, sawtooth, and special waveform generators pulse. These chapters also include pulse gen

  18. Electronic devices and circuits

    CERN Document Server

    Pridham, Gordon John

    1968-01-01

    Electronic Devices and Circuits, Volume 1 deals with the design and applications of electronic devices and circuits such as passive components, diodes, triodes and transistors, rectification and power supplies, amplifying circuits, electronic instruments, and oscillators. These topics are supported with introductory network theory and physics. This volume is comprised of nine chapters and begins by explaining the operation of resistive, inductive, and capacitive elements in direct and alternating current circuits. The theory for some of the expressions quoted in later chapters is presented. Th

  19. Security electronics circuits manual

    CERN Document Server

    MARSTON, R M

    1998-01-01

    Security Electronics Circuits Manual is an invaluable guide for engineers and technicians in the security industry. It will also prove to be a useful guide for students and experimenters, as well as providing experienced amateurs and DIY enthusiasts with numerous ideas to protect their homes, businesses and properties.As with all Ray Marston's Circuits Manuals, the style is easy-to-read and non-mathematical, with the emphasis firmly on practical applications, circuits and design ideas. The ICs and other devices used in the practical circuits are modestly priced and readily available ty

  20. MOS integrated circuit design

    CERN Document Server

    Wolfendale, E

    2013-01-01

    MOS Integral Circuit Design aims to help in the design of integrated circuits, especially large-scale ones, using MOS Technology through teaching of techniques, practical applications, and examples. The book covers topics such as design equation and process parameters; MOS static and dynamic circuits; logic design techniques, system partitioning, and layout techniques. Also featured are computer aids such as logic simulation and mask layout, as well as examples on simple MOS design. The text is recommended for electrical engineers who would like to know how to use MOS for integral circuit desi

  1. 47 CFR 36.126 - Circuit equipment-Category 4.

    Science.gov (United States)

    2010-10-01

    ... is used for the amplification, modulation, regeneration, testing, balancing or control of signals... Equipment Excluding Wideband—Category 4.13—The cost of Circuit Equipment associated with exchange line plant... included in this category: Jointly used message circuits, i.e., message switching plant circuits carrying...

  2. Energy-efficient neuron, synapse and STDP integrated circuits.

    Science.gov (United States)

    Cruz-Albrecht, Jose M; Yung, Michael W; Srinivasa, Narayan

    2012-06-01

    Ultra-low energy biologically-inspired neuron and synapse integrated circuits are presented. The synapse includes a spike timing dependent plasticity (STDP) learning rule circuit. These circuits have been designed, fabricated and tested using a 90 nm CMOS process. Experimental measurements demonstrate proper operation. The neuron and the synapse with STDP circuits have an energy consumption of around 0.4 pJ per spike and synaptic operation respectively.

  3. Analysis of the treatment of plastic from electrical and electronic waste in the Republic of Serbia and the testing of the recycling potential of non-metallic fractions of printed circuit boards

    Directory of Open Access Journals (Sweden)

    Vučinić Aleksandra S.

    2017-01-01

    Full Text Available This paper presents the analysis of the quantity of plastic and waste printed circuit boards obtained after the mechanical treatment of electrical and electronic waste (E-waste in the Republic of Serbia, as well as the recycling of non-metallic fractions of waste printed circuit boards. The aim is to analyze the obtained recycled material and recommendation for possible application of recyclables. The data on the quantities and treatment of plastics and printed circuit boards obtained after the mechanical treatment of WEEE, were gained through questionnaires sent to the operators who treat this type of waste. The results of the questionnaire analysis showed that in 2014 the dismantling of E-waste isolated 1,870.95 t of plastic and 499.85 t of printed circuit boards. In the Republic of Serbia, E-waste recycling is performed exclusively by using mechanical methods. Mechanical methods consist of primary crushing and separation of the materials which have a utility value as secondary raw materials, from the components and materials that have hazardous properties. Respect to that, the recycling of printed circuit boards using some of the metallurgical processes with the aim of extracting copper, precious metals and non-metallic fraction is completely absent, and the circuit boards are exported as a whole. Given the number of printed circuit boards obtained by E-waste dismantling, and the fact that from an economic point of view, hydrometallurgical methods are very suitable technological solutions in the case of a smaller capacity, there is a possibility for establishing the facilities in the Republic of Serbia for the hydrometallurgical treatment that could be used for metals extraction, and non-metallic fractions, which also have their own value. Printed circuit boards granulate obtained after the mechanical pretreatment and the selective removal of metals by hydrometallurgical processes was used for the testing of the recycling potential

  4. Memristor Circuits and Systems

    KAUST Repository

    Zidan, Mohammed A.

    2015-05-01

    Current CMOS-based technologies are facing design challenges related to the continuous scaling down of the minimum feature size, according to Moore’s law. Moreover, conventional computing architecture is no longer an effective way of fulfilling modern applications demands, such as big data analysis, pattern recognition, and vector processing. Therefore, there is an exigent need to shift to new technologies, at both the architecture and the device levels. Recently, memristor devices and structures attracted attention for being promising candidates for this job. Memristor device adds a new dimension for designing novel circuits and systems. In addition, high-density memristor-based crossbar is widely considered to be the essential element for future memory and bio-inspired computing systems. However, numerous challenges need to be addressed before the memristor genuinely replaces current memory and computing technologies, which is the motivation behind this research effort. In order to address the technology challenges, we begin by fabricating and modeling the memristor device. The devices fabricated at our local clean room enriched our understanding of the memristive phenomenon and enabled the experimental testing for our memristor-based circuits. Moreover, our proposed mathematical modeling for memristor behavior is an essential element for the theoretical circuit design stage. Designing and addressing the challenges of memristor systems with practical complexity, however, requires an extra step, which takes the form of a reliable and modular simulation platform. We, therefore, built a new simulation platform for the resistive crossbar, which can simulate realistic size arrays filled with real memory data. In addition, this simulation platform includes various crossbar nonidealities in order to obtain accurate simulation results. Consequently, we were able to address the significant challenges facing the high density memristor crossbar, as the building block for

  5. Offset cancelling circuit

    NARCIS (Netherlands)

    Wiegerink, Remco J.; Seevinck, Evert; de Jager, Wim

    1989-01-01

    A monolithic offset cancelling circuit to reduce the offset voltage at an integrated audio-amplifier output is described. This offset voltage is detected using a low-pass filter with a very large time constant for which only one small on-chip capacitor is needed. The circuit was realized with a

  6. Synchronizing Hyperchaotic Circuits

    DEFF Research Database (Denmark)

    Tamasevicius, Arunas; Cenys, Antanas; Namajunas, Audrius

    1997-01-01

    Regarding possible applications to secure communications the technique of synchronizing hyperchaotic circuits with a single dynamical variable is discussed. Several specific examples including the fourth-order circuits with two positive Lyapunov exponents as well as the oscillator with a delay line...

  7. A Virtual Circuits Lab

    Science.gov (United States)

    Vick, Matthew E.

    2010-01-01

    The University of Colorado's Physics Education Technology (PhET) website offers free, high-quality simulations of many physics experiments that can be used in the classroom. The Circuit Construction Kit, for example, allows students to safely and constructively play with circuit components while learning the mathematics behind many circuit…

  8. A diagnostic expert system for digital circuits

    Science.gov (United States)

    Backlund, R. W.; Wilson, J. D.

    1992-04-01

    A scheme is presented for a diagnostic expert system which is capable of troubleshooting a faulty digital circuit or producing a reduced test vector set for a non-faulty digital circuit. It is based on practical fault-finding logic and utilizes artificial intelligence techniques. The program uses expert knowledge comprised of two components: that which is contained within the program in the form of rules and heuristics, and that which is derived from the circuit under test in the form of specific device information. Using both forward and backward tracking algorithms, signal paths comprised of device and gate interconnections are identified from each output pin to the primary input pins which have effect on them. Beginning at the output, the program proceeds to validate each device in each signal path by forward propagating test values through the device to the output, and backward propagating the same values to the primary inputs. All devices in the circuit are monitored for each test applied and their performance is recorded. Device or gate validation occurs when the recorded history shows that a device has been toggled successfully through all necessary states. When run on a circuit which does not contain a fault, the program determines a reduced test vector set for that circuit.

  9. Approximate circuits for increased reliability

    Science.gov (United States)

    Hamlet, Jason R.; Mayo, Jackson R.

    2015-08-18

    Embodiments of the invention describe a Boolean circuit having a voter circuit and a plurality of approximate circuits each based, at least in part, on a reference circuit. The approximate circuits are each to generate one or more output signals based on values of received input signals. The voter circuit is to receive the one or more output signals generated by each of the approximate circuits, and is to output one or more signals corresponding to a majority value of the received signals. At least some of the approximate circuits are to generate an output value different than the reference circuit for one or more input signal values; however, for each possible input signal value, the majority values of the one or more output signals generated by the approximate circuits and received by the voter circuit correspond to output signal result values of the reference circuit.

  10. Approximate circuits for increased reliability

    Energy Technology Data Exchange (ETDEWEB)

    Hamlet, Jason R.; Mayo, Jackson R.

    2015-12-22

    Embodiments of the invention describe a Boolean circuit having a voter circuit and a plurality of approximate circuits each based, at least in part, on a reference circuit. The approximate circuits are each to generate one or more output signals based on values of received input signals. The voter circuit is to receive the one or more output signals generated by each of the approximate circuits, and is to output one or more signals corresponding to a majority value of the received signals. At least some of the approximate circuits are to generate an output value different than the reference circuit for one or more input signal values; however, for each possible input signal value, the majority values of the one or more output signals generated by the approximate circuits and received by the voter circuit correspond to output signal result values of the reference circuit.

  11. Troubleshooting analog circuits

    CERN Document Server

    Pease, Robert A

    1991-01-01

    Troubleshooting Analog Circuits is a guidebook for solving product or process related problems in analog circuits. The book also provides advice in selecting equipment, preventing problems, and general tips. The coverage of the book includes the philosophy of troubleshooting; the modes of failure of various components; and preventive measures. The text also deals with the active components of analog circuits, including diodes and rectifiers, optically coupled devices, solar cells, and batteries. The book will be of great use to both students and practitioners of electronics engineering. Other

  12. Circuit analysis with Multisim

    CERN Document Server

    Baez-Lopez, David

    2011-01-01

    This book is concerned with circuit simulation using National Instruments Multisim. It focuses on the use and comprehension of the working techniques for electrical and electronic circuit simulation. The first chapters are devoted to basic circuit analysis.It starts by describing in detail how to perform a DC analysis using only resistors and independent and controlled sources. Then, it introduces capacitors and inductors to make a transient analysis. In the case of transient analysis, it is possible to have an initial condition either in the capacitor voltage or in the inductor current, or bo

  13. Optoelectronics circuits manual

    CERN Document Server

    Marston, R M

    2013-01-01

    Optoelectronics Circuits Manual covers the basic principles and characteristics of the best known types of optoelectronic devices, as well as the practical applications of many of these optoelectronic devices. The book describes LED display circuits and LED dot- and bar-graph circuits and discusses the applications of seven-segment displays, light-sensitive devices, optocouplers, and a variety of brightness control techniques. The text also tackles infrared light-beam alarms and multichannel remote control systems. The book provides practical user information and circuitry and illustrations.

  14. Plasmonic Nanoguides and Circuits

    CERN Document Server

    Bozhevolnyi, Sergey

    2008-01-01

    Modern communication systems dealing with huge amounts of data at ever increasing speed try to utilize the best aspects of electronic and optical circuits. Electronic circuits are tiny but their operation speed is limited, whereas optical circuits are extremely fast but their sizes are limited by diffraction. Waveguide components utilizing surface plasmon (SP) modes were found to combine the huge optical bandwidth and compactness of electronics, and plasmonics thereby began to be considered as the next chip-scale technology. In this book, the authors concentrate on the SP waveguide configurati

  15. Modern TTL circuits manual

    CERN Document Server

    Marston, R M

    2013-01-01

    Modern TTL Circuits Manual provides an introduction to the basic principles of Transistor-Transistor Logic (TTL). This book outlines the major features of the 74 series of integrated circuits (ICs) and introduces the various sub-groups of the TTL family.Organized into seven chapters, this book begins with an overview of the basics of digital ICs. This text then examines the symbology and mathematics of digital logic. Other chapters consider a variety of topics, including waveform generator circuitry, clocked flip-flop and counter circuits, special counter/dividers, registers, data latches, com

  16. Pulsed-Power Burnout of Integrated Circuits

    Science.gov (United States)

    Results of pulsed-power burnout testing the Fairchild 9046 quad dual-input nand gate and the Amelco 6041 three-input nand gate showed the circuits to...be vulnerable to junction burnout for pulses of less than 100 V and pulse widths on the order of 100 nsec. Calculations based on Wunsch-Bell junction... burnout theory showed good agreement with the experimental results. Sample calculations applying Wunsch-Bell theory to integrated circuits are given.

  17. Receiver Gain Modulation Circuit

    Science.gov (United States)

    Jones, Hollis; Racette, Paul; Walker, David; Gu, Dazhen

    2011-01-01

    A receiver gain modulation circuit (RGMC) was developed that modulates the power gain of the output of a radiometer receiver with a test signal. As the radiometer receiver switches between calibration noise references, the test signal is mixed with the calibrated noise and thus produces an ensemble set of measurements from which ensemble statistical analysis can be used to extract statistical information about the test signal. The RGMC is an enabling technology of the ensemble detector. As a key component for achieving ensemble detection and analysis, the RGMC has broad aeronautical and space applications. The RGMC can be used to test and develop new calibration algorithms, for example, to detect gain anomalies, and/or correct for slow drifts that affect climate-quality measurements over an accelerated time scale. A generalized approach to analyzing radiometer system designs yields a mathematical treatment of noise reference measurements in calibration algorithms. By treating the measurements from the different noise references as ensemble samples of the receiver state, i.e. receiver gain, a quantitative description of the non-stationary properties of the underlying receiver fluctuations can be derived. Excellent agreement has been obtained between model calculations and radiometric measurements. The mathematical formulation is equivalent to modulating the gain of a stable receiver with an externally generated signal and is the basis for ensemble detection and analysis (EDA). The concept of generating ensemble data sets using an ensemble detector is similar to the ensemble data sets generated as part of ensemble empirical mode decomposition (EEMD) with exception of a key distinguishing factor. EEMD adds noise to the signal under study whereas EDA mixes the signal with calibrated noise. It is mixing with calibrated noise that permits the measurement of temporal-functional variability of uncertainty in the underlying process. The RGMC permits the evaluation of EDA by

  18. Displacement Damage in Bipolar Linear Integrated Circuits

    Science.gov (United States)

    Rax, B. G.; Johnston, A. H.; Miyahira, T.

    2000-01-01

    Although many different processes can be used to manufacture linear integrated circuits, the process that is used for most circuits is optimized for high voltage -- a total power supply voltage of about 40 V -- and low cost. This process, which has changed little during the last twenty years, uses lateral and substrate p-n-p transistors. These p-n-p transistors have very wide base regions, increasing their sensitivity to displacement damage from electrons and protons. Although displacement damage effects can be easily treated for individual transistors, the net effect on linear circuits can be far more complex because circuit operation often depends on the interaction of several internal transistors. Note also that some circuits are made with more advanced processes with much narrower base widths. Devices fabricated with these newer processes are not expected to be significantly affected by displacement damage for proton fluences below 1 x 10(exp 12) p/sq cm. This paper discusses displacement damage in linear integrated circuits with more complex failure modes than those exhibited by simpler devices, such as the LM111 comparator, where the dominant response mode is gain degradation of the input transistor. Some circuits fail catastrophically at much lower equivalent total dose levels compared to tests with gamma rays. The device works satisfactorily up to nearly 1 Mrad(Si) when it is irradiated with gamma rays, but fails catastrophically between 50 and 70 krad(Si) when it is irradiated with protons.

  19. Quantum circuits for cryptanalysis

    Science.gov (United States)

    Amento, Brittanney Jaclyn

    Finite fields of the form F2 m play an important role in coding theory and cryptography. We show that the choice of how to represent the elements of these fields can have a significant impact on the resource requirements for quantum arithmetic. In particular, we show how the Gaussian normal basis representations and "ghost-bit basis" representations can be used to implement inverters with a quantum circuit of depth O(mlog(m)). To the best of our knowledge, this is the first construction with subquadratic depth reported in the literature. Our quantum circuit for the computation of multiplicative inverses is based on the Itoh-Tsujii algorithm which exploits the property that, in a normal basis representation, squaring corresponds to a permutation of the coefficients. We give resource estimates for the resulting quantum circuit for inversion over binary fields F2 m based on an elementary gate set that is useful for fault-tolerant implementation. Elliptic curves over finite fields F2 m play a prominent role in modern cryptography. Published quantum algorithms dealing with such curves build on a short Weierstrass form in combination with affine or projective coordinates. In this thesis we show that changing the curve representation allows a substantial reduction in the number of T-gates needed to implement the curve arithmetic. As a tool, we present a quantum circuit for computing multiplicative inverses in F2m in depth O(m log m) using a polynomial basis representation, which may be of independent interest. Finally, we change our focus from the design of circuits which aim at attacking computational assumptions on asymmetric cryptographic algorithms to the design of a circuit attacking a symmetric cryptographic algorithm. We consider a block cipher, SERPENT, and our design of a quantum circuit implementing this cipher to be used for a key attack using Grover's algorithm as in [18]. This quantum circuit is essential for understanding the complexity of Grover's algorithm.

  20. Color Coding of Circuit Quantities in Introductory Circuit Analysis Instruction

    Science.gov (United States)

    Reisslein, Jana; Johnson, Amy M.; Reisslein, Martin

    2015-01-01

    Learning the analysis of electrical circuits represented by circuit diagrams is often challenging for novice students. An open research question in electrical circuit analysis instruction is whether color coding of the mathematical symbols (variables) that denote electrical quantities can improve circuit analysis learning. The present study…

  1. Effects of smoke on functional circuits

    Energy Technology Data Exchange (ETDEWEB)

    Tanaka, T.J.

    1997-10-01

    Nuclear power plants are converting to digital instrumentation and control systems; however, the effects of abnormal environments such as fire and smoke on such systems are not known. There are no standard tests for smoke, but previous smoke exposure tests at Sandia National Laboratories have shown that digital communications can be temporarily interrupted during a smoke exposure. Another concern is the long-term corrosion of metals exposed to the acidic gases produced by a cable fire. This report documents measurements of basic functional circuits during and up to 1 day after exposure to smoke created by burning cable insulation. Printed wiring boards were exposed to the smoke in an enclosed chamber for 1 hour. For high-resistance circuits, the smoke lowered the resistance of the surface of the board and caused the circuits to short during the exposure. These circuits recovered after the smoke was vented. For low-resistance circuits, the smoke caused their resistance to increase slightly. A polyurethane conformal coating substantially reduced the effects of smoke. A high-speed digital circuit was unaffected. A second experiment on different logic chip technologies showed that the critical shunt resistance that would cause failure was dependent on the chip technology and that the components used in the smoke exposures were some of the most smoke tolerant. The smoke densities in these tests were high enough to cause changes in high impedance (resistance) circuits during exposure, but did not affect most of the other circuits. Conformal coatings and the characteristics of chip technologies should be considered when designing circuitry for nuclear power plant safety systems, which must be highly reliable under a variety of operating and accident conditions. 10 refs., 34 figs., 18 tabs.

  2. 49 CFR 236.103 - Switch circuit controller or point detector.

    Science.gov (United States)

    2010-10-01

    ... 49 Transportation 4 2010-10-01 2010-10-01 false Switch circuit controller or point detector. 236... Rules and Instructions: All Systems Inspections and Tests; All Systems § 236.103 Switch circuit controller or point detector. Switch circuit controller, circuit controller, or point detector operated by...

  3. Vibration Damping Circuit Card Assembly

    Science.gov (United States)

    Hunt, Ronald Allen (Inventor)

    2016-01-01

    A vibration damping circuit card assembly includes a populated circuit card having a mass M. A closed metal container is coupled to a surface of the populated circuit card at approximately a geometric center of the populated circuit card. Tungsten balls fill approximately 90% of the metal container with a collective mass of the tungsten balls being approximately (0.07) M.

  4. Offset cancelling circuit

    OpenAIRE

    Wiegerink, Remco J.; Seevinck, Evert; de Jager, Wim

    1989-01-01

    A monolithic offset cancelling circuit to reduce the offset voltage at an integrated audio-amplifier output is described. This offset voltage is detected using a low-pass filter with a very large time constant for which only one small on-chip capacitor is needed. The circuit was realized with a bipolar cell-based semicustom array. Measurements have shown that a -3-dB bandwidth below 5 Hz can be realized with a capacitor value of 50 pF. The resulting offset voltage at the audio-amplifier outpu...

  5. Primer printed circuit boards

    CERN Document Server

    Argyle, Andrew

    2009-01-01

    Step-by-step instructions for making your own PCBs at home. Making your own printed circuit board (PCB) might seem a daunting task, but once you master the steps, it's easy to attain professional-looking results. Printed circuit boards, which connect chips and other components, are what make almost all modern electronic devices possible. PCBs are made from sheets of fiberglass clad with copper, usually in multiplelayers. Cut a computer motherboard in two, for instance, and you'll often see five or more differently patterned layers. Making boards at home is relatively easy

  6. Electronic circuits fundamentals & applications

    CERN Document Server

    Tooley, Mike

    2015-01-01

    Electronics explained in one volume, using both theoretical and practical applications.New chapter on Raspberry PiCompanion website contains free electronic tools to aid learning for students and a question bank for lecturersPractical investigations and questions within each chapter help reinforce learning Mike Tooley provides all the information required to get to grips with the fundamentals of electronics, detailing the underpinning knowledge necessary to appreciate the operation of a wide range of electronic circuits, including amplifiers, logic circuits, power supplies and oscillators. The

  7. Circuit design for reliability

    CERN Document Server

    Cao, Yu; Wirth, Gilson

    2015-01-01

    This book presents physical understanding, modeling and simulation, on-chip characterization, layout solutions, and design techniques that are effective to enhance the reliability of various circuit units.  The authors provide readers with techniques for state of the art and future technologies, ranging from technology modeling, fault detection and analysis, circuit hardening, and reliability management. Provides comprehensive review on various reliability mechanisms at sub-45nm nodes; Describes practical modeling and characterization techniques for reliability; Includes thorough presentation of robust design techniques for major VLSI design units; Promotes physical understanding with first-principle simulations.

  8. Power amplifier circuit

    NARCIS (Netherlands)

    Takeya, Hideaki; Nauta, Bram

    2015-01-01

    PROBLEM TO BE SOLVED: To provide a power amplifier circuit which has high power efficiency while suppressing a fluctuation of output power relatively to a fluctuation of a power supply voltage in a high-efficiency switching amplifier which operates in a radio frequency band.SOLUTION: A duty ratio

  9. "Printed-circuit" rectenna

    Science.gov (United States)

    Dickinson, R. M.

    1977-01-01

    Rectifying antenna is less bulky structure for absorbing transmitted microwave power and converting it into electrical current. Printed-circuit approach, using microstrip technology and circularly polarized antenna, makes polarization orientation unimportant and allows much smaller arrays for given performance. Innovation is particularly useful with proposed electric vehicles powered by beam microwaves.

  10. Superconducting Quantum Circuits

    NARCIS (Netherlands)

    Majer, J.B.

    2002-01-01

    This thesis describes a number of experiments with superconducting cir- cuits containing small Josephson junctions. The circuits are made out of aluminum islands which are interconnected with a very thin insulating alu- minum oxide layer. The connections form a Josephson junction. The current trough

  11. ESD analog circuits and design

    CERN Document Server

    Voldman, Steven H

    2014-01-01

    A comprehensive and in-depth review of analog circuit layout, schematic architecture, device, power network and ESD design This book will provide a balanced overview of analog circuit design layout, analog circuit schematic development, architecture of chips, and ESD design.  It will start at an introductory level and will bring the reader right up to the state-of-the-art. Two critical design aspects for analog and power integrated circuits are combined. The first design aspect covers analog circuit design techniques to achieve the desired circuit performance. The second and main aspect pres

  12. Reducing energy with asynchronous circuits

    OpenAIRE

    Rivas Barragan, Daniel

    2012-01-01

    Reducing energy consumption using asynchronous circuits. The elastic clocks approach has been implemented along with a closed-feedback loop in order to achieve a lower energy consumption along with more reliability in integrated circuits.

  13. Diode, transistor & fet circuits manual

    CERN Document Server

    Marston, R M

    2013-01-01

    Diode, Transistor and FET Circuits Manual is a handbook of circuits based on discrete semiconductor components such as diodes, transistors, and FETS. The book also includes diagrams and practical circuits. The book describes basic and special diode characteristics, heat wave-rectifier circuits, transformers, filter capacitors, and rectifier ratings. The text also presents practical applications of associated devices, for example, zeners, varicaps, photodiodes, or LEDs, as well as it describes bipolar transistor characteristics. The transistor can be used in three basic amplifier configuration

  14. Circuit Bodging : Atari Punk Console

    NARCIS (Netherlands)

    Allen, B.

    2009-01-01

    Circuit bodging is back! Maxwell is proud to present small, simple, but ultimately lovable little circuits to build for your own, personal pleasure. In this edition we are featuring: The Atari Punk Console. The Atari Punk Console (or APC) is a 555 timer IC based noise maker circuit. The original was

  15. Synthetic in vitro transcription circuits.

    Science.gov (United States)

    Weitz, Maximilian; Simmel, Friedrich C

    2012-01-01

    With the help of only two enzymes--an RNA polymerase and a ribonuclease--reduced versions of transcriptional regulatory circuits can be implemented in vitro. These circuits enable the emulation of naturally occurring biochemical networks, the exploration of biological circuit design principles and the biochemical implementation of powerful computational models.

  16. High voltage MOSFET switching circuit

    Science.gov (United States)

    McEwan, Thomas E.

    1994-01-01

    The problem of source lead inductance in a MOSFET switching circuit is compensated for by adding an inductor to the gate circuit. The gate circuit inductor produces an inductive spike which counters the source lead inductive drop to produce a rectangular drive voltage waveform at the internal gate-source terminals of the MOSFET.

  17. Electrical circuit theory and technology

    CERN Document Server

    Bird, John

    2014-01-01

    This much-loved textbook explains the principles of electrical circuit theory and technology so that students of electrical and mechanical engineering can master the subject. Real-world situations and engineering examples put the theory into context. The inclusion of worked problems with solutions help you to learn and further problems then allow you to test and confirm you have fully understood each subject. In total the book contains 800 worked problems, 1000 further problems and 14 revision tests with answers online. This an ideal text for foundation and undergraduate degree students and those on upper level vocational engineering courses, in particular electrical and mechanical. It provides a sound understanding of the knowledge required by technicians in fields such as electrical engineering, electronics and telecommunications. This edition has been updated with developments in key areas such as semiconductors, transistors, and fuel cells, along with brand new material on ABCD parameters and Fourier's An...

  18. Quantum-circuit refrigerator

    Science.gov (United States)

    Tan, Kuan Yen; Partanen, Matti; Lake, Russell E.; Govenius, Joonas; Masuda, Shumpei; Möttönen, Mikko

    2017-05-01

    Quantum technology promises revolutionizing applications in information processing, communications, sensing and modelling. However, efficient on-demand cooling of the functional quantum degrees of freedom remains challenging in many solid-state implementations, such as superconducting circuits. Here we demonstrate direct cooling of a superconducting resonator mode using voltage-controllable electron tunnelling in a nanoscale refrigerator. This result is revealed by a decreased electron temperature at a resonator-coupled probe resistor, even for an elevated electron temperature at the refrigerator. Our conclusions are verified by control experiments and by a good quantitative agreement between theory and experimental observations at various operation voltages and bath temperatures. In the future, we aim to remove spurious dissipation introduced by our refrigerator and to decrease the operational temperature. Such an ideal quantum-circuit refrigerator has potential applications in the initialization of quantum electric devices. In the superconducting quantum computer, for example, fast and accurate reset of the quantum memory is needed.

  19. Neuromorphic Silicon Neuron Circuits

    Science.gov (United States)

    Indiveri, Giacomo; Linares-Barranco, Bernabé; Hamilton, Tara Julia; van Schaik, André; Etienne-Cummings, Ralph; Delbruck, Tobi; Liu, Shih-Chii; Dudek, Piotr; Häfliger, Philipp; Renaud, Sylvie; Schemmel, Johannes; Cauwenberghs, Gert; Arthur, John; Hynna, Kai; Folowosele, Fopefolu; Saighi, Sylvain; Serrano-Gotarredona, Teresa; Wijekoon, Jayawan; Wang, Yingxue; Boahen, Kwabena

    2011-01-01

    Hardware implementations of spiking neurons can be extremely useful for a large variety of applications, ranging from high-speed modeling of large-scale neural systems to real-time behaving systems, to bidirectional brain–machine interfaces. The specific circuit solutions used to implement silicon neurons depend on the application requirements. In this paper we describe the most common building blocks and techniques used to implement these circuits, and present an overview of a wide range of neuromorphic silicon neurons, which implement different computational models, ranging from biophysically realistic and conductance-based Hodgkin–Huxley models to bi-dimensional generalized adaptive integrate and fire models. We compare the different design methodologies used for each silicon neuron design described, and demonstrate their features with experimental results, measured from a wide range of fabricated VLSI chips. PMID:21747754

  20. Neuromorphic silicon neuron circuits

    Directory of Open Access Journals (Sweden)

    Giacomo eIndiveri

    2011-05-01

    Full Text Available Hardware implementations of spiking neurons can be extremely useful for a large variety of applications, ranging from high-speed modeling of large-scale neural systems to real-time behaving systems, to bidirectional brain-machine interfaces. The specific circuit solutions used to implement silicon neurons depend on the application requirements. In this paper we describe the most common building blocks and techniques used to implement these circuits, and present an overview of a wide range of neuromorphic silicon neurons, which implement different computational models, ranging from biophysically realistic and conductance based Hodgkin-Huxley models to bi-dimensional generalized adaptive Integrate and Fire models. We compare the different design methodologies used for each silicon neuron design described, and demonstrate their features with experimental results, measured from a wide range of fabricated VLSI chips.

  1. Quantum-circuit refrigerator

    Science.gov (United States)

    Tan, Kuan Yen; Partanen, Matti; Lake, Russell E.; Govenius, Joonas; Masuda, Shumpei; Möttönen, Mikko

    2017-01-01

    Quantum technology promises revolutionizing applications in information processing, communications, sensing and modelling. However, efficient on-demand cooling of the functional quantum degrees of freedom remains challenging in many solid-state implementations, such as superconducting circuits. Here we demonstrate direct cooling of a superconducting resonator mode using voltage-controllable electron tunnelling in a nanoscale refrigerator. This result is revealed by a decreased electron temperature at a resonator-coupled probe resistor, even for an elevated electron temperature at the refrigerator. Our conclusions are verified by control experiments and by a good quantitative agreement between theory and experimental observations at various operation voltages and bath temperatures. In the future, we aim to remove spurious dissipation introduced by our refrigerator and to decrease the operational temperature. Such an ideal quantum-circuit refrigerator has potential applications in the initialization of quantum electric devices. In the superconducting quantum computer, for example, fast and accurate reset of the quantum memory is needed. PMID:28480900

  2. Short-circuit experiments on a high Tc-superconducting cable conductor

    DEFF Research Database (Denmark)

    Tønnesen, Ole; Jensen, E.H.; Traholt, C.

    2002-01-01

    A high temperature superconductor (HTS) cable conductor (CC) with a critical current of 2.1 kA was tested over a range of short-circuit currents up to 20 kA. The duration of the short-circuit currents is 1 s. Between each short-circuit test the critical current of the HTS CC was measured in order...

  3. Cartography of serotonergic circuits.

    Science.gov (United States)

    Sparta, Dennis R; Stuber, Garret D

    2014-08-06

    Serotonin is an essential neuromodulator, but the precise circuit connectivity that regulates serotonergic neurons has not been well defined. Using rabies virus tracing strategies Weissbourd et al. (2014) and Pollak Dorocic et al. (2014) in this issue of Neuron and Ogawa et al. (2014) in Cell Reports provide a comprehensive map of the inputs to serotonergic neurons, highlighting the complexity and diversity of potential upstream cellular regulators. Copyright © 2014 Elsevier Inc. All rights reserved.

  4. Linear nearest neighbor optimization in quantum circuits: a multiobjective perspective

    Science.gov (United States)

    Ruffinelli, Daniel; Barán, Benjamín

    2017-09-01

    Several current implementations of quantum circuits rely on the linear nearest neighbor restriction, which only allows interaction between adjacent qubits. Most methods that address the process of converting a generic circuit to an equivalent circuit which satisfies this restriction, minimize the number of additional SWAP gates required by this process. Moreover, most methods which address this problem are designed for 1D circuits. Considering the new and promising proposals for 2D quantum circuits, what we propose is a new perspective on this problem, namely that it can be seen as a multiobjective optimization problem. To test our hypothesis, we developed a multiobjective evolutionary algorithm that solves this problem by considering two objectives: minimizing the size of the 2D grid where the circuit is placed, and minimizing the number of additional SWAP gates. Of the methods designed for 2D circuits, only one considers different grid sizes which are much larger than strictly necessary. Consequently, our algorithm makes considerations which other methods do not make, since it naturally finds the grid which requires fewer SWAP gates for the circuit conversion, whether it is one-dimensional or two-dimensional. Our experimental results indicate that allowing a larger grid size results in fewer additional SWAP gates in about 73% of the tested circuits. Additionally, the average improvement we found when using larger grid sizes is about 30%, while the best improvement over using the smallest possible grid is 63.8%.

  5. An Unsolved Electric Circuit: A Common Misconception

    Science.gov (United States)

    Harsha, N. R. Sree; Sreedevi, A.; Prakash, Anupama

    2015-01-01

    Despite a number of theories in circuit analysis, little is known about the behaviour of ideal equal voltage sources in parallel, connected across a resistive load. We neither have any theory that can predict the voltage source that provides the load current, nor is there any method to test it experimentally. In a series of experiments performed…

  6. Substrate Effects in Wideband SiGe HBT Mixer Circuits

    DEFF Research Database (Denmark)

    Johansen, Tom Keinicke; Vidkjær, Jens; Krozer, Viktor

    2005-01-01

    In this paper, the influence from substrate effects on the performance of wideband SiGe HBT mixer circuits is investigated. Equivalent circuit models including substrate networks are extracted from on-wafer test structures and compared with electromagnetic simulations. Electromagnetic simulations...

  7. Developing 300°C Ceramic Circuit Boards

    Energy Technology Data Exchange (ETDEWEB)

    Normann, Randy A

    2015-02-15

    This paper covers the development of a geothermal ceramic circuit board technology using 3D traces in a machinable ceramic. Test results showing the circuit board to be operational to at least 550°C. Discussion on producing this type of board is outlined along with areas needing improvement.

  8. Development of remedial method for teaching electric circuits in ...

    African Journals Online (AJOL)

    This study was to reveal the kind of thinking and understanding about electric circuits of 123 senior secondary Year Two physics students in Cape Coast ... An electric circuit Remedial Teaching Method was therefore developed, and its impact was assessed using a nonrandomized control pretest/post-test design.

  9. Associative Pattern Recognition In Analog VLSI Circuits

    Science.gov (United States)

    Tawel, Raoul

    1995-01-01

    Winner-take-all circuit selects best-match stored pattern. Prototype cascadable very-large-scale integrated (VLSI) circuit chips built and tested to demonstrate concept of electronic associative pattern recognition. Based on low-power, sub-threshold analog complementary oxide/semiconductor (CMOS) VLSI circuitry, each chip can store 128 sets (vectors) of 16 analog values (vector components), vectors representing known patterns as diverse as spectra, histograms, graphs, or brightnesses of pixels in images. Chips exploit parallel nature of vector quantization architecture to implement highly parallel processing in relatively simple computational cells. Through collective action, cells classify input pattern in fraction of microsecond while consuming power of few microwatts.

  10. Changes to the shuttle circuits

    CERN Multimedia

    GS Department

    2011-01-01

    To fit with passengers expectation, there will be some changes to the shuttle circuits as from Monday 10 October. See details on http://cern.ch/ShuttleService (on line on 7 October). Circuit No. 5 is cancelled as circuit No. 1 also stops at Bldg. 33. In order to guarantee shorter travel times, circuit No. 1 will circulate on Meyrin site only and circuit No. 2, with departures from Bldg. 33 and 500, on Prévessin site only. Site Services Section

  11. Power system with an integrated lubrication circuit

    Science.gov (United States)

    Hoff, Brian D [East Peoria, IL; Akasam, Sivaprasad [Peoria, IL; Algrain, Marcelo C [Peoria, IL; Johnson, Kris W [Washington, IL; Lane, William H [Chillicothe, IL

    2009-11-10

    A power system includes an engine having a first lubrication circuit and at least one auxiliary power unit having a second lubrication circuit. The first lubrication circuit is in fluid communication with the second lubrication circuit.

  12. Reversible gates and circuits descriptions

    Science.gov (United States)

    Gracki, Krzystof

    2017-08-01

    This paper presents basic methods of reversible circuit description. To design reversible circuit a set of gates has to be chosen. Most popular libraries are composed of three types of gates so called CNT gates (Control, NOT and Toffoli). The gate indexing method presented in this paper is based on the CNT gates set. It introduces a uniform indexing of the gates used during synthesis process of reversible circuits. The paper is organized as follows. Section 1 recalls basic concepts of reversible logic. In Section 2 and 3 a graphical representation of the reversible gates and circuits is described. Section 4 describes proposed uniform NCT gates indexing. The presented gate indexing method provides gate numbering scheme independent of lines number of the designed circuit. The solution for a circuit consisting of smaller number of lines is a subset of solution for a larger circuit.

  13. Circuit bridging of components by smoke

    Energy Technology Data Exchange (ETDEWEB)

    Tanaka, T.J.; Nowlen, S.P.; Anderson, D.J. [Sandia National Labs., Albuquerque, NM (United States)

    1996-10-01

    Smoke can adversely affect digital electronics; in the short term, it can lead to circuit bridging and in the long term to corrosion of metal parts. This report is a summary of the work to date and component-level tests by Sandia National Laboratories for the Nuclear Regulatory Commission to determine the impact of smoke on digital instrumentation and control equipment. The component tests focused on short-term effects such as circuit bridging in typical components and the factors that can influence how much the smoke will affect them. These factors include the component technology and packaging, physical board protection, and environmental conditions such as the amount of smoke, temperature of burn, and humidity level. The likelihood of circuit bridging was tested by measuring leakage currents and converting those currents to resistance in ohms. Hermetically sealed ceramic packages were more resistant to smoke than plastic packages. Coating the boards with an acrylic spray provided some protection against circuit bridging. The smoke generation factors that affect the resistance the most are humidity, fuel level, and burn temperature. The use of CO{sub 2} as a fire suppressant, the presence of galvanic metal, and the presence of PVC did not significantly affect the outcome of these results.

  14. Switchless charge-discharge circuit for electrical capacitance tomography

    Science.gov (United States)

    Kryszyn, J.; Smolik, W. T.; Radzik, B.; Olszewski, T.; Szabatin, R.

    2014-11-01

    The main factor limiting the performance of electrical capacitance tomography (ECT) is an extremely low value of inter-electrode capacitances. The charge-discharge circuit is a well suited circuit for a small capacitance measurement due to its immunity to noise and stray capacitance, although it has a problem associated with a charge injected by the analogue switches, which results in a dc offset. This paper presents a new diode-based circuit for capacitance measurement in which a charge transfer method is realized without switches. The circuit was built and tested in one channel configuration with 16 multiplexed electrodes. The performance of the elaborated circuit and a comparison with a classic charge-discharge circuit are presented. The elaborated circuit can be used for sensors with inter-electrode capacitances not lower than 10 fF. The presented approach allows us to obtain a similar performance to the classic charge-discharge circuit, but has a simplified design. A lack of the need to synchronize the analogue switches in the transmitter and the receiver part of this circuit could be a desirable feature in the design of measurement systems integrated with electrodes.

  15. Optoelectronics circuits manual

    CERN Document Server

    Marston, R M

    1999-01-01

    This manual is a useful single-volume guide specifically aimed at the practical design engineer, technician, and experimenter, as well as the electronics student and amateur. It deals with the subject in an easy to read, down to earth, and non-mathematical yet comprehensive manner, explaining the basic principles and characteristics of the best known devices, and presenting the reader with many practical applications and over 200 circuits. Most of the ICs and other devices used are inexpensive and readily available types, with universally recognised type numbers.The second edition

  16. Photonic Integrated Circuits

    Science.gov (United States)

    Krainak, Michael; Merritt, Scott

    2016-01-01

    Integrated photonics generally is the integration of multiple lithographically defined photonic and electronic components and devices (e.g. lasers, detectors, waveguides passive structures, modulators, electronic control and optical interconnects) on a single platform with nanometer-scale feature sizes. The development of photonic integrated circuits permits size, weight, power and cost reductions for spacecraft microprocessors, optical communication, processor buses, advanced data processing, and integrated optic science instrument optical systems, subsystems and components. This is particularly critical for small spacecraft platforms. We will give an overview of some NASA applications for integrated photonics.

  17. Integrated circuit cell library

    Science.gov (United States)

    Whitaker, Sterling R. (Inventor); Miles, Lowell H. (Inventor)

    2005-01-01

    According to the invention, an ASIC cell library for use in creation of custom integrated circuits is disclosed. The ASIC cell library includes some first cells and some second cells. Each of the second cells includes two or more kernel cells. The ASIC cell library is at least 5% comprised of second cells. In various embodiments, the ASIC cell library could be 10% or more, 20% or more, 30% or more, 40% or more, 50% or more, 60% or more, 70% or more, 80% or more, 90% or more, or 95% or more comprised of second cells.

  18. Linear integrated circuits

    CERN Document Server

    Carr, Joseph

    1996-01-01

    The linear IC market is large and growing, as is the demand for well trained technicians and engineers who understand how these devices work and how to apply them. Linear Integrated Circuits provides in-depth coverage of the devices and their operation, but not at the expense of practical applications in which linear devices figure prominently. This book is written for a wide readership from FE and first degree students, to hobbyists and professionals.Chapter 1 offers a general introduction that will provide students with the foundations of linear IC technology. From chapter 2 onwa

  19. Electric circuits problem solver

    CERN Document Server

    REA, Editors of

    2012-01-01

    Each Problem Solver is an insightful and essential study and solution guide chock-full of clear, concise problem-solving gems. All your questions can be found in one convenient source from one of the most trusted names in reference solution guides. More useful, more practical, and more informative, these study aids are the best review books and textbook companions available. Nothing remotely as comprehensive or as helpful exists in their subject anywhere. Perfect for undergraduate and graduate studies.Here in this highly useful reference is the finest overview of electric circuits currently av

  20. Digital Optical Circuit Technology.

    Science.gov (United States)

    1985-03-01

    avait donc pour but de dresser un bilan des recherches; et des raisations intiEressant la technologie des circuits optiques et d󈨁udier leurs...experiment. 3. EXPERIMENTAL WAVEGUIDE DEVICE Experiments were performed using carbon disulphide, CS2 , as the nonlinear medium. CS2 has a high non- linear...x 1.60- 1.595- S1.590 15514 16 18 20 22 24 26 28 Temperature (I C) FIGURE 5 REFRACTIVE INDEX OF CARBON DISULPHIDE AT 1 .O6um AS A FUNCTION OF

  1. Digital Optical Circuit Technology

    Science.gov (United States)

    Dove, B. L. (Editor)

    1985-01-01

    The Proceedings for the 48th Meeting of the AGARD Avionics Panel contain the 18 papers presented a Technical Evaluation Report, and discussions that followed the presentations of papers. Seven papers were presented in the session devoted to optical bistability. Optical logic was addressed by three papers. The session on sources, modulators and demodulators presented three papers. Five papers were given in the final session on all optical systems. The purpose of this Specialists' Meeting was to present the research and development status of digital optical circuit technology and to examine its relevance in the broad context of digital processing, communication, radar, avionics and flight control systems implementation.

  2. Optically controllable molecular logic circuits

    Energy Technology Data Exchange (ETDEWEB)

    Nishimura, Takahiro, E-mail: t-nishimura@ist.osaka-u.ac.jp; Fujii, Ryo; Ogura, Yusuke; Tanida, Jun [Graduate School of Information Science and Technology, Osaka University, 1-5 Yamadaoka, Suita, Osaka 565-0871 (Japan)

    2015-07-06

    Molecular logic circuits represent a promising technology for observation and manipulation of biological systems at the molecular level. However, the implementation of molecular logic circuits for temporal and programmable operation remains challenging. In this paper, we demonstrate an optically controllable logic circuit that uses fluorescence resonance energy transfer (FRET) for signaling. The FRET-based signaling process is modulated by both molecular and optical inputs. Based on the distance dependence of FRET, the FRET pathways required to execute molecular logic operations are formed on a DNA nanostructure as a circuit based on its molecular inputs. In addition, the FRET pathways on the DNA nanostructure are controlled optically, using photoswitching fluorescent molecules to instruct the execution of the desired operation and the related timings. The behavior of the circuit can thus be controlled using external optical signals. As an example, a molecular logic circuit capable of executing two different logic operations was studied. The circuit contains functional DNAs and a DNA scaffold to construct two FRET routes for executing Input 1 AND Input 2 and Input 1 AND NOT Input 3 operations on molecular inputs. The circuit produced the correct outputs with all possible combinations of the inputs by following the light signals. Moreover, the operation execution timings were controlled based on light irradiation and the circuit responded to time-dependent inputs. The experimental results demonstrate that the circuit changes the output for the required operations following the input of temporal light signals.

  3. Design and Implementation of A Circuit Board Calibration System

    Directory of Open Access Journals (Sweden)

    Bai Hang

    2016-01-01

    Full Text Available With the development of science and technology, the traditional artificial detection methods cannot meet the requirements of modern equipment testing and calibration. Combined with the actual demand, a kind of circuit boards calibration system are put forward. It can to realize automatic testing and calibration of the circuit boards. Many functions of the calibration system such as automatic testing, self-test and monitoring are summarized. The hardware is introduced which including the industrial computer system, calibration adapter and so on. Then, development platform, the thought of program design and the structure of the software are introduced in detail. The function of automatic calibration to specific circuit boards are realized. Because the system has good commonality and easy to extend to upgrade, the development ideas and experiences can be applied to similar circuit boards automatic testing system.

  4. Design and implementation of a simple acousto optic dual control circuit

    Science.gov (United States)

    Li, Biqing; Li, Zhao

    2017-04-01

    This page proposed a simple light control circuit which designed by using power supply circuit, sonic circuits, electric circuit and delay circuit four parts. The main chip for CD4011, have inside of the four and to complete the sonic or circuit, electric, delay logic circuit. During the day, no matter how much a pedestrian voice, is ever shine light bulb. Dark night, circuit in a body to make the microphone as long as testing noise, and will automatically be bright for pedestrians lighting, several minutes after the automatic and put out, effective energy saving. Applicable scope and the working principle of the circuit principle diagram and given device parameters selection, power saving effect is obvious, at the same time greatly reduce the maintenance quantity, saving money, use effect is good.

  5. Selection of wires and circuit protective devices for STS Orbiter vehicle payload electrical circuits

    Science.gov (United States)

    Gaston, Darilyn M.

    1991-01-01

    Electrical designers of Orbiter payloads face the challenge of determining proper circuit protection/wire size parameters to satisfy Orbiter engineering and safety requirements. This document is the result of a program undertaken to review test data from all available aerospace sources and perform additional testing to eliminate extrapolation errors. The resulting compilation of data was used to develop guidelines for the selection of wire sizes and circuit protection ratings. The purpose is to provide guidance to the engineering to ensure a design which meets Orbiter standards and which should be applicable to any aerospace design.

  6. Noise in biological circuits.

    Science.gov (United States)

    Simpson, Michael L; Cox, Chris D; Allen, Michael S; McCollum, James M; Dar, Roy D; Karig, David K; Cooke, John F

    2009-01-01

    Noise biology focuses on the sources, processing, and biological consequences of the inherent stochastic fluctuations in molecular transitions or interactions that control cellular behavior. These fluctuations are especially pronounced in small systems where the magnitudes of the fluctuations approach or exceed the mean value of the molecular population. Noise biology is an essential component of nanomedicine where the communication of information is across a boundary that separates small synthetic and biological systems that are bound by their size to reside in environments of large fluctuations. Here we review the fundamentals of the computational, analytical, and experimental approaches to noise biology. We review results that show that the competition between the benefits of low noise and those of low population has resulted in the evolution of genetic system architectures that produce an uneven distribution of stochasticity across the molecular components of cells and, in some cases, use noise to drive biological function. We review the exact and approximate approaches to gene circuit noise analysis and simulation, and review many of the key experimental results obtained using flow cytometry and time-lapse fluorescent microscopy. In addition, we consider the probative value of noise with a discussion of using measured noise properties to elucidate the structure and function of the underlying gene circuit. We conclude with a discussion of the frontiers of and significant future challenges for noise biology. (c) 2009 John Wiley & Sons, Inc.

  7. Arithmetic circuits for DSP applications

    CERN Document Server

    Stouraitis, Thanos

    2017-01-01

    Arithmetic Circuits for DSP Applications is a complete resource on arithmetic circuits for digital signal processing (DSP). It covers the key concepts, designs and developments of different types of arithmetic circuits, which can be used for improving the efficiency of implementation of a multitude of DSP applications. Each chapter includes various applications of the respective class of arithmetic circuits along with information on the future scope of research. Written for students, engineers, and researchers in electrical and computer engineering, this comprehensive text offers a clear understanding of different types of arithmetic circuits used for digital signal processing applications. The text includes contributions from noted researchers on a wide range of topics, including a review o circuits used in implementing basic operations like additions and multiplications; distributed arithmetic as a technique for the multiplier-less implementation of inner products for DSP applications; discussions on look ...

  8. Integrated circuit cooled turbine blade

    Energy Technology Data Exchange (ETDEWEB)

    Lee, Ching-Pang; Jiang, Nan; Um, Jae Y.; Holloman, Harry; Koester, Steven

    2017-08-29

    A turbine rotor blade includes at least two integrated cooling circuits that are formed within the blade that include a leading edge circuit having a first cavity and a second cavity and a trailing edge circuit that includes at least a third cavity located aft of the second cavity. The trailing edge circuit flows aft with at least two substantially 180-degree turns at the tip end and the root end of the blade providing at least a penultimate cavity and a last cavity. The last cavity is located along a trailing edge of the blade. A tip axial cooling channel connects to the first cavity of the leading edge circuit and the penultimate cavity of the trailing edge circuit. At least one crossover hole connects the penultimate cavity to the last cavity substantially near the tip end of the blade.

  9. Automated Design of Quantum Circuits

    Science.gov (United States)

    Williams, Colin P.; Gray, Alexander G.

    2000-01-01

    In order to design a quantum circuit that performs a desired quantum computation, it is necessary to find a decomposition of the unitary matrix that represents that computation in terms of a sequence of quantum gate operations. To date, such designs have either been found by hand or by exhaustive enumeration of all possible circuit topologies. In this paper we propose an automated approach to quantum circuit design using search heuristics based on principles abstracted from evolutionary genetics, i.e. using a genetic programming algorithm adapted specially for this problem. We demonstrate the method on the task of discovering quantum circuit designs for quantum teleportation. We show that to find a given known circuit design (one which was hand-crafted by a human), the method considers roughly an order of magnitude fewer designs than naive enumeration. In addition, the method finds novel circuit designs superior to those previously known.

  10. Synthetic biology: integrated gene circuits.

    Science.gov (United States)

    Nandagopal, Nagarajan; Elowitz, Michael B

    2011-09-02

    A major goal of synthetic biology is to develop a deeper understanding of biological design principles from the bottom up, by building circuits and studying their behavior in cells. Investigators initially sought to design circuits "from scratch" that functioned as independently as possible from the underlying cellular system. More recently, researchers have begun to develop a new generation of synthetic circuits that integrate more closely with endogenous cellular processes. These approaches are providing fundamental insights into the regulatory architecture, dynamics, and evolution of genetic circuits and enabling new levels of control across diverse biological systems.

  11. Unstable oscillators based hyperchaotic circuit

    DEFF Research Database (Denmark)

    Murali, K.; Tamasevicius, A.; G. Mykolaitis, A.

    1999-01-01

    A simple 4th order hyperchaotic circuit with unstable oscillators is described. The circuit contains two negative impedance converters, two inductors, two capacitors, a linear resistor and a diode. The Lyapunov exponents are presented to confirm hyperchaotic nature of the oscillations in the circ......A simple 4th order hyperchaotic circuit with unstable oscillators is described. The circuit contains two negative impedance converters, two inductors, two capacitors, a linear resistor and a diode. The Lyapunov exponents are presented to confirm hyperchaotic nature of the oscillations...

  12. Programmable Low-Voltage Circuit Breaker and Tester

    Science.gov (United States)

    Greenfield, Terry

    2008-01-01

    An instrumentation system that would comprise a remotely controllable and programmable low-voltage circuit breaker plus several electric-circuit-testing subsystems has been conceived, originally for use aboard a spacecraft during all phases of operation from pre-launch testing through launch, ascent, orbit, descent, and landing. The system could also be adapted to similar use aboard aircraft. In comparison with remotely controllable circuit breakers heretofore commercially available, this system would be smaller, less massive, and capable of performing more functions, as needed for aerospace applications.

  13. Determination of short circuit stresses in an air core reactor using ...

    African Journals Online (AJOL)

    DR OKE

    withstood the short circuit test. Keywords: Reactor, Short circuit forces, von Mises stress, Finite Element Method, Inductor ... The value of initial current depends on the instant of switching the circuit. At switching instant t = 0, .... electrical equipments such as transformer, generators, motors etc. The method can be used to ...

  14. A dishwasher for circuits

    CERN Multimedia

    Rosaria Marraffino

    2014-01-01

    You have always been told that electronic devices fear water. However, at the Surface Mount Devices (SMD) Workshop here at CERN all the electronic assemblies are cleaned with a machine that looks like a… dishwasher.   The circuit dishwasher. Credit: Clara Nellist.  If you think the image above shows a dishwasher, you wouldn’t be completely wrong. Apart from the fact that the whole pumping system and the case itself are made entirely from stainless steel and chemical resistant materials, and the fact that it washes electrical boards instead of dishes… it works exactly like a dishwasher. It’s a professional machine (mainly used in the pharmaceutical industry) designed to clean everything that can be washed with a water-based chemical soap. This type of treatment increases the lifetime of the electronic boards and therefore the LHC's reliability by preventing corrosion problems in the severe radiation and ozone environment of the LHC tunn...

  15. Modeling cortical circuits.

    Energy Technology Data Exchange (ETDEWEB)

    Rohrer, Brandon Robinson; Rothganger, Fredrick H.; Verzi, Stephen J.; Xavier, Patrick Gordon

    2010-09-01

    The neocortex is perhaps the highest region of the human brain, where audio and visual perception takes place along with many important cognitive functions. An important research goal is to describe the mechanisms implemented by the neocortex. There is an apparent regularity in the structure of the neocortex [Brodmann 1909, Mountcastle 1957] which may help simplify this task. The work reported here addresses the problem of how to describe the putative repeated units ('cortical circuits') in a manner that is easily understood and manipulated, with the long-term goal of developing a mathematical and algorithmic description of their function. The approach is to reduce each algorithm to an enhanced perceptron-like structure and describe its computation using difference equations. We organize this algorithmic processing into larger structures based on physiological observations, and implement key modeling concepts in software which runs on parallel computing hardware.

  16. Basic electronic circuits

    CERN Document Server

    Buckley, P M

    1980-01-01

    In the past, the teaching of electricity and electronics has more often than not been carried out from a theoretical and often highly academic standpoint. Fundamentals and basic concepts have often been presented with no indication of their practical appli­ cations, and all too frequently they have been illustrated by artificially contrived laboratory experiments bearing little relationship to the outside world. The course comes in the form of fourteen fairly open-ended constructional experiments or projects. Each experiment has associated with it a construction exercise and an explanation. The basic idea behind this dual presentation is that the student can embark on each circuit following only the briefest possible instructions and that an open-ended approach is thereby not prejudiced by an initial lengthy encounter with the theory behind the project; this being a sure way to dampen enthusiasm at the outset. As the investigation progresses, questions inevitably arise. Descriptions of the phenomena encounte...

  17. Optimizing Performance of SABC Comminution Circuit of the Wushan Porphyry Copper Mine—A Practical Approach

    OpenAIRE

    Wei Zhang

    2016-01-01

    This research is focused on the Phase I SABC milling circuit of the Wushan porphyry copper mine. Improvements to the existing circuit were targeted without any significant alterations to existing equipment or the SABC circuit. JKSimMet simulations were used to test various operating and design conditions to improve the comminution process. Modifications to the SABC comminution circuit included an increase in the SAG mill ball charge from 8% to 10% v/v; an increase in the mill ball charge from...

  18. Creating Single-Copy Genetic Circuits.

    Science.gov (United States)

    Lee, Jeong Wook; Gyorgy, Andras; Cameron, D Ewen; Pyenson, Nora; Choi, Kyeong Rok; Way, Jeffrey C; Silver, Pamela A; Del Vecchio, Domitilla; Collins, James J

    2016-07-21

    Synthetic biology is increasingly used to develop sophisticated living devices for basic and applied research. Many of these genetic devices are engineered using multi-copy plasmids, but as the field progresses from proof-of-principle demonstrations to practical applications, it is important to develop single-copy synthetic modules that minimize consumption of cellular resources and can be stably maintained as genomic integrants. Here we use empirical design, mathematical modeling, and iterative construction and testing to build single-copy, bistable toggle switches with improved performance and reduced metabolic load that can be stably integrated into the host genome. Deterministic and stochastic models led us to focus on basal transcription to optimize circuit performance and helped to explain the resulting circuit robustness across a large range of component expression levels. The design parameters developed here provide important guidance for future efforts to convert functional multi-copy gene circuits into optimized single-copy circuits for practical, real-world use. Copyright © 2016 Elsevier Inc. All rights reserved.

  19. Digital circuits using universal logic gates

    Science.gov (United States)

    Whitaker, Sterling R. (Inventor); Miles, Lowell H. (Inventor); Cameron, Eric G. (Inventor); Donohoe, Gregory W. (Inventor); Gambles, Jody W. (Inventor)

    2004-01-01

    According to the invention, a digital circuit design embodied in at least one of a structural netlist, a behavioral netlist, a hardware description language netlist, a full-custom ASIC, a semi-custom ASIC, an IP core, an integrated circuit, a hybrid of chips, one or more masks, a FPGA, and a circuit card assembly is disclosed. The digital circuit design includes first and second sub-circuits. The first sub-circuits comprise a first percentage of the digital circuit design and the second sub-circuits comprise a second percentage of the digital circuit design. Each of the second sub-circuits is substantially comprised of one or more kernel circuits. The kernel circuits are comprised of selection circuits. The second percentage is at least 5%. In various embodiments, the second percentage could be at least 10%, 20%, 30%, 40%, 50%, 60%, 70%, 80%, 90%, or 95%.

  20. Enhancement of Linear Circuit Program

    DEFF Research Database (Denmark)

    Gaunholt, Hans; Dabu, Mihaela; Beldiman, Octavian

    1996-01-01

    In this report a preliminary user friendly interface has been added to the LCP2 program making it possible to describe an electronic circuit by actually drawing the circuit on the screen. Component values and other options and parameters can easily be set by the aid of the interface. The interface...

  1. Compact Circuit Preprocesses Accelerometer Output

    Science.gov (United States)

    Bozeman, Richard J., Jr.

    1993-01-01

    Compact electronic circuit transfers dc power to, and preprocesses ac output of, accelerometer and associated preamplifier. Incorporated into accelerometer case during initial fabrication or retrofit onto commercial accelerometer. Made of commercial integrated circuits and other conventional components; made smaller by use of micrologic and surface-mount technology.

  2. The RD53A Integrated Circuit

    CERN Document Server

    Garcia-Sciveres, Maurice

    2017-01-01

    Implementation details for the RD53A pixel readout integrated circuit designed by the RD53 Collaboration. This is a companion to the specifications document and will eventually become a reference for chip users. RD53A is not intended to be a final production IC for use in an experiment, and contains design variations for testing purposes, making the pixel matrix non-uniform. The chip size is 20.0 mm by 11.8 mm.

  3. Photodiode circuits for retinal prostheses.

    Science.gov (United States)

    Loudin, J D; Cogan, S F; Mathieson, K; Sher, A; Palanker, D V

    2011-10-01

    Photodiode circuits show promise for the development of high-resolution retinal prostheses. While several of these systems have been constructed and some even implanted in humans, existing descriptions of the complex optoelectronic interaction between light, photodiode, and the electrode/electrolyte load are limited. This study examines this interaction in depth with theoretical calculations and experimental measurements. Actively biased photoconductive and passive photovoltaic circuits are investigated, with the photovoltaic circuits consisting of one or more diodes connected in series, and the photoconductive circuits consisting of a single diode in series with a pulsed bias voltage. Circuit behavior and charge injection levels were markedly different for platinum and sputtered iridium-oxide film (SIROF) electrodes. Photovoltaic circuits were able to deliver 0.038 mC/cm(2) (0.75 nC/phase) per photodiode with 50- μm platinum electrodes, and 0.54-mC/cm(2) (11 nC/phase) per photodiode with 50-μ m SIROF electrodes driven with 0.5-ms pulses of light at 25 Hz. The same pulses applied to photoconductive circuits with the same electrodes were able to deliver charge injections as high as 0.38 and 7.6 mC/cm(2) (7.5 and 150 nC/phase), respectively. We demonstrate photovoltaic stimulation of rabbit retina in-vitro, with 0.5-ms pulses of 905-nm light using peak irradiance of 1 mW/mm(2). Based on the experimental data, we derive electrochemical and optical safety limits for pixel density and charge injection in various circuits. While photoconductive circuits offer smaller pixels, photovoltaic systems do not require an external bias voltage. Both classes of circuits show promise for the development of high-resolution optoelectronic retinal prostheses.

  4. Circuit Design of Surface Acoustic Wave Based Micro Force Sensor

    Directory of Open Access Journals (Sweden)

    Yuanyuan Li

    2014-01-01

    Full Text Available Pressure sensors are commonly used in industrial production and mechanical system. However, resistance strain, piezoresistive sensor, and ceramic capacitive pressure sensors possess limitations, especially in micro force measurement. A surface acoustic wave (SAW based micro force sensor is designed in this paper, which is based on the theories of wavelet transform, SAW detection, and pierce oscillator circuits. Using lithium niobate as the basal material, a mathematical model is established to analyze the frequency, and a peripheral circuit is designed to measure the micro force. The SAW based micro force sensor is tested to show the reasonable design of detection circuit and the stability of frequency and amplitude.

  5. Variational integrators for electric circuits

    Energy Technology Data Exchange (ETDEWEB)

    Ober-Blöbaum, Sina, E-mail: sinaob@math.upb.de [Computational Dynamics and Optimal Control, University of Paderborn (Germany); Tao, Molei [Courant Institute of Mathematical Sciences, New York University (United States); Cheng, Mulin [Applied and Computational Mathematics, California Institute of Technology (United States); Owhadi, Houman; Marsden, Jerrold E. [Control and Dynamical Systems, California Institute of Technology (United States); Applied and Computational Mathematics, California Institute of Technology (United States)

    2013-06-01

    In this contribution, we develop a variational integrator for the simulation of (stochastic and multiscale) electric circuits. When considering the dynamics of an electric circuit, one is faced with three special situations: 1. The system involves external (control) forcing through external (controlled) voltage sources and resistors. 2. The system is constrained via the Kirchhoff current (KCL) and voltage laws (KVL). 3. The Lagrangian is degenerate. Based on a geometric setting, an appropriate variational formulation is presented to model the circuit from which the equations of motion are derived. A time-discrete variational formulation provides an iteration scheme for the simulation of the electric circuit. Dependent on the discretization, the intrinsic degeneracy of the system can be canceled for the discrete variational scheme. In this way, a variational integrator is constructed that gains several advantages compared to standard integration tools for circuits; in particular, a comparison to BDF methods (which are usually the method of choice for the simulation of electric circuits) shows that even for simple LCR circuits, a better energy behavior and frequency spectrum preservation can be observed using the developed variational integrator.

  6. Experimental Device for Learning of Logical Circuit Design using Integrated Circuits

    OpenAIRE

    石橋, 孝昭

    2012-01-01

    This paper presents an experimental device for learning of logical circuit design using integrated circuits and breadboards. The experimental device can be made at a low cost and can be used for many subjects such as logical circuits, computer engineering, basic electricity, electrical circuits and electronic circuits. The proposed device is effective to learn the logical circuits than the usual lecture.

  7. 30 CFR 77.800 - High-voltage circuits; circuit breakers.

    Science.gov (United States)

    2010-07-01

    ... 30 Mineral Resources 1 2010-07-01 2010-07-01 false High-voltage circuits; circuit breakers. 77.800... COAL MINES Surface High-Voltage Distribution § 77.800 High-voltage circuits; circuit breakers. High-voltage circuits supplying power to portable or mobile equipment shall be protected by suitable circuit...

  8. Characterization of Tribological Properties of Greases for Industrial Circuit Breakers

    Directory of Open Access Journals (Sweden)

    B. Castaños

    2017-12-01

    Full Text Available Proper grease selection is essential for the electrical industry to minimize friction and wear between the components of circuit breakers under mechanical contact. In this investigation, the tribological properties of commercially available greases for industrial circuit breakers were evaluated. Three tribological tests were performed: the ITeE-PIB Polish Method for testing lubricants under scuffing conditions (extreme pressure, EP, a four-ball test under ASTM D 2266 (anti-wear, AW, and a ball-on-disk test based on ASTM G-99. The worn materials were characterized with an optical 3D profilometer measurement system and a scanning electron microscope (SEM. Additionally, selected greases with the best tribological performance were tested on a testing bench intended for circuit breakers, according to electrical safety standards, which validated the results obtained in the laboratory.

  9. Magnetic circuit modifications in resonant vibration harvesters

    Science.gov (United States)

    Szabo, Zoltan; Fiala, Pavel; Dohnal, Premysl

    2018-01-01

    The paper discusses the conclusions obtained from a research centered on a vibration-powered milli- or micro generator (MG) operating as a harvester to yield the maximum amount of energy transferred by the vibration of an independent system. The investigation expands on the results proposed within papers that theoretically define the properties characterizing the basic configurations of a generator based on applied Faraday's law of induction. We compared two basic principles of circuit closing in a magnetic circuit that, fully or partially, utilizes a ferromagnetic material, and a large number of generator design solutions were examined and tested. In the given context, the article brings a compact survey of the rules facilitating energy transformation and the designing of harvesters.

  10. Custom VLSI circuits for high energy physics

    Energy Technology Data Exchange (ETDEWEB)

    Parker, S. [Univ. of Hawaii, Honolulu, HI (United States)

    1998-06-01

    This article provides a brief guide to integrated circuits, including their design, fabrication, testing, radiation hardness, and packaging. It was requested by the Panel on Instrumentation, Innovation, and Development of the International Committee for Future Accelerators, as one of a series of articles on instrumentation for future experiments. Their original request emphasized a description of available custom circuits and a set of recommendations for future developments. That has been done, but while traps that stop charge in solid-state devices are well known, those that stop physicists trying to develop the devices are not. Several years spent dodging the former and developing the latter made clear the need for a beginner`s guide through the maze, and that is the main purpose of this text.

  11. Inadvertent contamination of anaesthetic circuits with halothane.

    Science.gov (United States)

    Robinson, J S; Thompson, J M; Barratt, R S

    1977-08-01

    All halothane vaporizers tested for leakage when turned off, leaked significant amounts of halothane and this may represent a hazard to patients liable to develop halothane hepatitis or malignant hyperpyrexia. The hazard from leaking vaporizers may be reduced considerably by the use of well-designed bypass units. Circuit contamination by halothane may still result from such sources as neoprene seals around flowmeters, breathing bags and anaesthetic hose which have had previous contact with halothane vapour, whether or not an apparatus is in use. The hazard from contaminated hoses and bags may be reduced considerably by washing and then hanging in a halothane-free atmosphere for a day. The hazard from contamined rubber or plastic components of the anaesthetic machine can be eliminated only by using one apparatus without the vaporizers having been attached at any time during its working life. Similarly, hazards may arise from trichloroethylene vaporizers and from circuit components contaminated with trichloroethylene.

  12. Circuit design on plastic foils

    CERN Document Server

    Raiteri, Daniele; Roermund, Arthur H M

    2015-01-01

    This book illustrates a variety of circuit designs on plastic foils and provides all the information needed to undertake successful designs in large-area electronics.  The authors demonstrate architectural, circuit, layout, and device solutions and explain the reasons and the creative process behind each. Readers will learn how to keep under control large-area technologies and achieve robust, reliable circuit designs that can face the challenges imposed by low-cost low-temperature high-throughput manufacturing.   • Discusses implications of problems associated with large-area electronics and compares them to standard silicon; • Provides the basis for understanding physics and modeling of disordered material; • Includes guidelines to quickly setup the basic CAD tools enabling efficient and reliable designs; • Illustrates practical solutions to cope with hard/soft faults, variability, mismatch, aging and bias stress at architecture, circuit, layout, and device levels.

  13. The Use of Genetic Programming to Evolve Passive Filter Circuits

    Directory of Open Access Journals (Sweden)

    Ogri J. Ushie

    2017-09-01

    Full Text Available This paper introduces the use of Genetic Programming (GP, Genetic Folding and symbolic circuit analysis in Matlab for the evolution of passive filter circuits. Instead of combining MATLAB and PSPICE in electronic circuit simulation, in this work, only MATLAB is used. It helps to reduce elapsed time for transferring the simulation between the two software packages. The circuit evolved from GP using the Matlab program and is automatically converted into a symbolic netlist also by using a Matlab code. The netlist is fed into symbolic circuit analysis in Matlab (SCAM; the SCAM is used to generate matrices that are used for simulation. In this case, it is used to analyse frequency response of passive low-pass, high-pass and band-pass filter circuits. The algorithm is tested with four different examples and the results presented have proved that the algorithm is efficient concerning the design wise. The work has provided an alternative way of using GP for the evolution of passive filter circuits.

  14. Behavioral synthesis of asynchronous circuits

    DEFF Research Database (Denmark)

    Nielsen, Sune Fallgaard

    2005-01-01

    is idle. This reduces unnecessary switching activity in the individual functional units and therefore the energy consumption of the entire circuit. A collection of behavioral synthesis algorithms have been developed allowing the designer to perform time and power constrained design space exploration....... The datapath and control architecture is then expressed in the Balsa-language, and using syntax directed compilation a corresponding handshake circuit implementation (and eventually a layout) is produced....

  15. Paper-based silver-nanowire electronic circuits with outstanding electrical conductivity and extreme bending stability

    Science.gov (United States)

    Huang, Gui-Wen; Xiao, Hong-Mei; Fu, Shao-Yun

    2014-07-01

    Here a facile, green and efficient printing-filtration-press (PFP) technique is reported for room-temperature (RT) mass-production of low-cost, environmentally friendly, high performance paper-based electronic circuits. The as-prepared silver nanowires (Ag-NWs) are uniformly deposited at RT on a pre-printed paper substrate to form high quality circuits via vacuum filtration and pressing. The PFP circuit exhibits more excellent electrical property and bending stability compared with other flexible circuits made by existing techniques. Furthermore, practical applications of the PFP circuits are demonstrated.Here a facile, green and efficient printing-filtration-press (PFP) technique is reported for room-temperature (RT) mass-production of low-cost, environmentally friendly, high performance paper-based electronic circuits. The as-prepared silver nanowires (Ag-NWs) are uniformly deposited at RT on a pre-printed paper substrate to form high quality circuits via vacuum filtration and pressing. The PFP circuit exhibits more excellent electrical property and bending stability compared with other flexible circuits made by existing techniques. Furthermore, practical applications of the PFP circuits are demonstrated. Electronic supplementary information (ESI) available: Video of rolling tests; video of the PFP circuit used as flexible cable in a cell phone; video of the application of the circuit as a RFID tag; a detailed method for synthesizing silver nanowires; details of the PFP technique; folding tests for the circuits; air humidity test for the circuit. See DOI: 10.1039/c4nr00846d

  16. Novel circuits for energizing manganin stress gauges

    Science.gov (United States)

    Tasker, Douglas G.

    2017-01-01

    This paper describes the design of a novel MOSFET pulsed constant current supplies for low impedance Manganin stress gauges. The design emphasis has been on high accuracy, low noise, simple, low cost, disposable supplies that can be used to energize multiple gauges in explosive or shock experiments. The Manganin gauges used to measure stresses in detonating explosive experiments have typical resistances of 50 mΩ and are energized with pulsed currents of 50 A. Conventional pulsed, constant current supplies for these gauges are high voltage devices with outputs as high as 500 V. Common problems with the use of high voltage supplies at explosive firing sites are: erroneous signals caused by ground loops; overdrive of oscilloscopes on gauge failure; gauge signal crosstalk; cost; and errors due to changing load impedances. The new circuit corrects these issues. It is an 18-V circuit, powered by 9-V alkaline batteries, and features an optically isolated trigger, and single-point grounding. These circuits have been successfully tested at the Los Alamos National Laboratory in explosive experiments. [LA-UR-15-24819

  17. Noise-Reduction Circuit For Imaging Photodetectors

    Science.gov (United States)

    Ramirez, Luis J.; Pain, Bedabrata; Staller, Craig; Hickok, Roger W.

    1995-01-01

    Developmental correlated-triple-sampling circuit suppresses capacitor reset noise and attenuates low frequency noise in integrated-and-sampled circuits of multiplexed photodiode arrays. Noise reduction circuit part of Visible and Infrared Mapping Spectrometer (VIMS) instrument to fly aboard Cassini spacecraft to explore Saturn and its moons. Modified versions of circuit also useful for reducing noise in terrestrial photosensor instruments.

  18. Multi-Layer E-Textile Circuits

    Science.gov (United States)

    Dunne, Lucy E.; Bibeau, Kaila; Mulligan, Lucie; Frith, Ashton; Simon, Cory

    2012-01-01

    Stitched e-textile circuits facilitate wearable, flexible, comfortable wearable technology. However, while stitched methods of e-textile circuits are common, multi-layer circuit creation remains a challenge. Here, we present methods of stitched multi-layer circuit creation using accessible tools and techniques.

  19. Nonequilibrium Quantum Simulation in Circuit QED

    Science.gov (United States)

    Raftery, James John

    Superconducting circuits have become a leading architecture for quantum computing and quantum simulation. In particular, the circuit QED framework leverages high coherence qubits and microwave resonators to construct systems realizing quantum optics models with exquisite precision. For example, the Jaynes-Cummings model has been the focus of significant theoretical interest as a means of generating photon-photon interactions. Lattices of such strongly correlated photons are an exciting new test bed for exploring non-equilibrium condensed matter physics such as dissipative phase transitions of light. This thesis covers a series of experiments which establish circuit QED as a powerful tool for exploring condensed matter physics with photons. The first experiment explores the use of ultra high speed arbitrary waveform generators for the direct digital synthesis of complex microwave waveforms. This new technique dramatically simplifies the classical control chain for quantum experiments and enables high bandwidth driving schemes expected to be essential for generating interesting steady-states and dynamical behavior. The last two experiments explore the rich physics of interacting photons, with an emphasis on small systems where a high degree of control is possible. The first experiment realizes a two-site system called the Jaynes-Cummings dimer, which undergoes a self-trapping transition where the strong photon-photon interactions block photon hopping between sites. The observation of this dynamical phase transition and the related dissipation-induced transition are key results of this thesis. The final experiment augments the Jaynes-Cummings dimer by redesigning the circuit to include in-situ control over photon hopping between sites using a tunable coupler. This enables the study of the dimer's localization transition in the steady-state regime.

  20. Experimental study of natural circulation circuit

    Energy Technology Data Exchange (ETDEWEB)

    Lemos, Wanderley F.; Su, Jian, E-mail: wlemos@lasme.coppe.ufrj.br, E-mail: sujian@lasme.coppe.ufrj.br [Coordenacao dos Programas de Pos-Graduacao de Engenharia (LASME/COPPE/UFRJ), Rio de Janeiro, RJ (Brazil). Lab. de Simulacao e Metodos Numericos; Faccini, Jose L.H., E-mail: faccini@ien.gov.br [Instituto de Engenharia Nuclear (LTE/IEN/CNEN-RJ), Rio de Janeiro, RJ (Brazil). Lab. de Termo-Hidraulica Experimental

    2011-07-01

    This work presents an experimental study about fluid flows behavior in natural circulation, under conditions of single-phase flow. The experiment was performed through experimental thermal-hydraulic circuit built at IEN. This test equipment has performance similar to passive system of residual heat removal present in Advanced Pressurized Water Reactors (APWR). This experimental study aims to observing and analyzing the natural circulation phenomenon, using this experimental circuit that was dimensioned and built based on concepts of similarity and scale. This philosophy allows the analysis of natural circulation behavior in single-phase flow conditions proportionally to the functioning real conditions of a nuclear reactor. The experiment was performed through procedures to initialization of hydraulic feeding of primary and secondary circuits and electrical energizing of resistors installed inside heater. Power controller has availability to adjust values of electrical power to feeding resistors, in order to portray several conditions of energy decay of nuclear reactor in a steady state. Data acquisition system allows the measurement and monitoring of the evolution of the temperature in various points through thermocouples installed in strategic points along hydraulic circuit. The behavior of the natural circulation phenomenon was monitored by graphical interface on computer screen, showing the temperature evolutions of measuring points and results stored in digital spreadsheets. The results stored in digital spreadsheets allowed the getting of data to graphic construction and discussion about natural circulation phenomenon. Finally, the calculus of Reynolds number allowed the establishment for a correlation of friction in function of geometric scales of length, heights and cross section of tubing, considering a natural circulation flow throughout in the region of hot leg. (author)

  1. Bioluminescent bioreporter integrated circuits (BBICs)

    Science.gov (United States)

    Simpson, Michael L.; Sayler, Gary S.; Nivens, David; Ripp, Steve; Paulus, Michael J.; Jellison, Gerald E.

    1998-07-01

    As the workhorse of the integrated circuit (IC) industry, the capabilities of CMOS have been expanded well beyond the original applications. The full spectrum of analog circuits from switched-capacitor filters to microwave circuit blocks, and from general-purpose operational amplifiers to sub- nanosecond analog timing circuits for nuclear physics experiments have been implemented in CMOS. This technology has also made in-roads into the growing area of monolithic sensors with devices such as active-pixel sensors and other electro-optical detection devices. While many of the processes used for MEMS fabrication are not compatible with the CMOS IC process, depositing a sensor material onto a previously fabricated CMOS circuit can create a very useful category of sensors. In this work we report a chemical sensor composed of bioluminescent bioreporters (genetically engineered bacteria) deposited onto a micro-luminometer fabricated in a standard CMOS IC process. The bioreporter used for this work emitted 490-nm light when exposed to toluene. This luminescence was detected by the micro- luminometer giving an indication of the concentration of toluene. Other bioluminescent bioreporters sensitive to explosives, mercury, and other organic chemicals and heavy metals have been reported. These could be incorporated (individually or in combination) with the micro-luminometer reported here to form a variety of chemical sensors.

  2. 30 CFR 75.800 - High-voltage circuits; circuit breakers.

    Science.gov (United States)

    2010-07-01

    ... 30 Mineral Resources 1 2010-07-01 2010-07-01 false High-voltage circuits; circuit breakers. 75.800... SAFETY AND HEALTH MANDATORY SAFETY STANDARDS-UNDERGROUND COAL MINES Underground High-Voltage Distribution § 75.800 High-voltage circuits; circuit breakers. High-voltage circuits entering the underground area...

  3. Experimental and theoretical analysis of vacuum circuit breaker prestrike effect on a transformer

    NARCIS (Netherlands)

    Popov, M.; Smeets, R.P.P.; Van der Sluis, L.; De Herdt, H.; Declerq, J.

    2009-01-01

    The work presented in this paper deals with the investigation of circuit breaker prestrike effect that occurs during energizing a distribution transformer. An experimental test setup that consists of a supply transformer, a vacuum circuit breaker (VCB), a cable and a test transformer is built, and

  4. Soft errors from particles to circuits

    CERN Document Server

    Autran, Jean-Luc

    2015-01-01

    ""Soft Errors: From Particles to Circuits covers all aspects of the design, use, application, performance, and testing of parts, devices, and systems and addresses every perspective from an engineering, scientific, or physical point of view. … Many good texts have been written on similar subjects, but none as thorough, as clear, and as complete as this volume. … [The authors] have mastered the past, absorbed the present, and captured the trends of the future in one of the most important technologies of our time. … An extremely useful text that has succeeded in presenting wit

  5. Circuit modeling for electromagnetic compatibility

    CERN Document Server

    Darney, Ian B

    2013-01-01

    Very simply, electromagnetic interference (EMI) costs money, reduces profits, and generally wreaks havoc for circuit designers in all industries. This book shows how the analytic tools of circuit theory can be used to simulate the coupling of interference into, and out of, any signal link in the system being reviewed. The technique is simple, systematic and accurate. It enables the design of any equipment to be tailored to meet EMC requirements. Every electronic system consists of a number of functional modules interconnected by signal links and power supply lines. Electromagnetic interference

  6. Embedded systems circuits and programming

    CERN Document Server

    Sanchez, Julio

    2012-01-01

    During the development of an engineered product, developers often need to create an embedded system--a prototype--that demonstrates the operation/function of the device and proves its viability. Offering practical tools for the development and prototyping phases, Embedded Systems Circuits and Programming provides a tutorial on microcontroller programming and the basics of embedded design. The book focuses on several development tools and resources: Standard and off-the-shelf components, such as input/output devices, integrated circuits, motors, and programmable microcontrollers The implementat

  7. Simplified design of filter circuits

    CERN Document Server

    Lenk, John

    1999-01-01

    Simplified Design of Filter Circuits, the eighth book in this popular series, is a step-by-step guide to designing filters using off-the-shelf ICs. The book starts with the basic operating principles of filters and common applications, then moves on to describe how to design circuits by using and modifying chips available on the market today. Lenk's emphasis is on practical, simplified approaches to solving design problems.Contains practical designs using off-the-shelf ICsStraightforward, no-nonsense approachHighly illustrated with manufacturer's data sheets

  8. Programming languages for circuit design.

    Science.gov (United States)

    Pedersen, Michael; Yordanov, Boyan

    2015-01-01

    This chapter provides an overview of a programming language for Genetic Engineering of Cells (GEC). A GEC program specifies a genetic circuit at a high level of abstraction through constraints on otherwise unspecified DNA parts. The GEC compiler then selects parts which satisfy the constraints from a given parts database. GEC further provides more conventional programming language constructs for abstraction, e.g., through modularity. The GEC language and compiler is available through a Web tool which also provides functionality, e.g., for simulation of designed circuits.

  9. Automated Cell Synthesis of Analog Integrated Circuit Layout Anasyn.

    Science.gov (United States)

    Stanojevich, Bob Srbislav

    This thesis describes a novel model to automate cell generation for the design of analog integrated circuits and the conclusions about important features that such automation should include. This research represents the first attempt to address this problem by analyzing relevant issues of what constitutes an analog cell and how a technique can be implemented to generate these cells automatically. Our motivation for doing this is the critical limitations to circuit performance which arise from cell design. This thesis defines unique construction properties for the layout of some commonly used analog circuit topologies or cells. This thesis defines the physical layout of analog circuit cells beyond simple geometrical description. Each cell is an independent object that can be interfaced and communicated with. This thesis has extended the concept of an analog cell even further by incorporating synthesis rules into the cell definition. These rules are used to dynamically construct the optimized layout that will satisfy many of the options encountered in actual analog circuit design such as area, matching, tolerance, element rationing and parasitic components. This model can construct complex geometric shapes such as common-centroids, waffles, interdigitated, cascode etc. that are optimized at device level with the precise models for parasitic components. Furthermore, Object-Oriented implementation used in this thesis allow for easy integration of this work into other CAD tools. To demonstrate the feasibility and correctness of the ideas described in this thesis, a CAD tool ANASYN has been written. To test and demonstrate the utility and the performance developed, a variety of test cells have been generated. Data presented clearly demonstrate the uniqueness, flexibility, and precision of the analog circuit layout cells implemented in this research thesis. In addition, one test chip and one design chip have been laid out using cells generated by ANASYN and fabricated at

  10. Fuzzy classifier for fault diagnosis in analog electronic circuits.

    Science.gov (United States)

    Kumar, Ashwani; Singh, A P

    2013-11-01

    Many studies have presented different approaches for the fault diagnosis with fault models having ± 50% variation in the component values in analog electronic circuits. There is still a need of the approaches which provide the fault diagnosis with the variation in the component value below ± 50%. A new single and multiple fault diagnosis technique for soft faults in analog electronic circuit using fuzzy classifier has been proposed in this paper. This technique uses the simulation before test (SBT) approach by analyzing the frequency response of the analog circuit under faulty and fault free conditions. Three signature parameters peak gain, frequency and phase associated with peak gain, of the frequency response of the analog circuit are observed and extracted such that they give unique values for faulty and fault free configuration of the circuit. The single and double fault models with the component variations from ± 10% to ± 50% are considered. The fuzzy classifier along the classification of faults gives the estimated component value under faulty and faultfree conditions. The proposed method is validated using simulated data and the real time data for a benchmark analog circuit. The comparative analysis is also presented for both the validations. Copyright © 2013 ISA. Published by Elsevier Ltd. All rights reserved.

  11. On Polymorphic Circuits and Their Design Using Evolutionary Algorithms

    Science.gov (United States)

    Stoica, Adrian; Zebulum, Ricardo; Keymeulen, Didier; Lohn, Jason; Clancy, Daniel (Technical Monitor)

    2002-01-01

    This paper introduces the concept of polymorphic electronics (polytronics) - referring to electronics with superimposed built-in functionality. A function change does not require switches/reconfiguration as in traditional approaches. Instead the change comes from modifications in the characteristics of devices involved in the circuit, in response to controls such as temperature, power supply voltage (VDD), control signals, light, etc. The paper illustrates polytronic circuits in which the control is done by temperature, morphing signals, and VDD respectively. Polytronic circuits are obtained by evolutionary design/evolvable hardware techniques. These techniques are ideal for the polytronics design, a new area that lacks design guidelines, know-how,- yet the requirements/objectives are easy to specify and test. The circuits are evolved/synthesized in two different modes. The first mode explores an unstructured space, in which transistors can be interconnected freely in any arrangement (in simulations only). The second mode uses a Field Programmable Transistor Array (FPTA) model, and the circuit topology is sought as a mapping onto a programmable architecture (these experiments are performed both in simulations and on FPTA chips). The experiments demonstrated the synthesis. of polytronic circuits by evolution. The capacity of storing/hiding "extra" functions provides for watermark/invisible functionality, thus polytronics may find uses in intelligence/security applications.

  12. Integrated testing system FiTest for diagnosis of PCBA

    Science.gov (United States)

    Bogdan, Arkadiusz; Lesniak, Adam

    2016-12-01

    This article presents the innovative integrated testing system FiTest for automatic, quick inspection of printed circuit board assemblies (PCBA) manufactured in Surface Mount Technology (SMT). Integration of Automatic Optical Inspection (AOI), In-Circuit Tests (ICT) and Functional Circuit Tests (FCT) resulted in universal hardware platform for testing variety of electronic circuits. The platform provides increased test coverage, decreased level of false calls and optimization of test duration. The platform is equipped with powerful algorithms performing tests in a stable and repetitive way and providing effective management of diagnosis.

  13. SEMICONDUCTOR INTEGRATED CIRCUITS: Design and research of an LED driving circuit with accurate proportional current sampling mode

    Science.gov (United States)

    Wei, Guo; Xing, Yang; Dazhong, Zhu

    2010-04-01

    An LED driving circuit in accurate proportional current sampling mode is designed and fabricated based on CSMC 0.5 μm standard CMOS technology. It realizes accurate sensing of sampling current variation with output driving current. A better constant output current characteristic is achieved by using an amplifier to clamp the drain voltage of both the sampling MOSFET and power MOSFET to the same value with feedback control. Small signal equivalent circuit analysis shows that the small signal output resistance in the accurate proportional current sampling mode circuit is much larger than that in a traditional proportional current sampling mode circuit, and circuit stability could be assured. Circuit simulation and chip testing results show that when the LED driving current is 350 mA and the power supply is 6 V with ±10% variation, the stability of the output constant current of the accurate proportional current sampling mode LED driving IC will show 41% improvement over that of a traditional proportional current sampling mode LED driving IC.

  14. Integrated Circuit Stellar Magnitude Simulator

    Science.gov (United States)

    Blackburn, James A.

    1978-01-01

    Describes an electronic circuit which can be used to demonstrate the stellar magnitude scale. Six rectangular light-emitting diodes with independently adjustable duty cycles represent stars of magnitudes 1 through 6. Experimentally verifies the logarithmic response of the eye. (Author/GA)

  15. A Low Noise Electronic Circuit

    NARCIS (Netherlands)

    Annema, Anne J.; Leenaerts, Dominicus M.W.; de Vreede, Petrus W.H.

    2002-01-01

    An electronic circuit, which can be used as a Low Noise Amplifier (LNA), comprises two complementary Field Effect Transistors (M1, M2; M5, M6), each having a gate, a source and a drain. The gates are connected together as a common input terminal, and the drains are connected together as a

  16. Invention of the Integrated Circuit

    Indian Academy of Sciences (India)

    Home; Journals; Resonance – Journal of Science Education; Volume 17; Issue 11. Invention of the Integrated Circuit. Jack S Kilby. Classics Volume 17 Issue 11 November 2012 pp 1100-1115. Fulltext. Click here to view fulltext PDF. Permanent link: http://www.ias.ac.in/article/fulltext/reso/017/11/1100-1115 ...

  17. Data assimilation with Chua's circuit

    Indian Academy of Sciences (India)

    noise and observational frequency, using both simulated observations and data obtained from an experimental realization of a commonly used low-dimensional dynamical system, namely, Chua circuit, in both the periodic as well as the chaotic regime. Keywords. Synchronization; ensemble Kalman filter; data assimilation.

  18. Circuit design for RF transceivers

    CERN Document Server

    Leenaerts, Domine; Vaucher, Cicero S

    2007-01-01

    Second edition of this successful 2001 RF Circuit Design book, has been updated, latest technology reviews have been added as well as several actual case studies. Due to the authors being active in industry as well as academia, this should prove to be an essential guide on RF Transceiver Design for students and engineers.

  19. Parallel circuit simulation on supercomputers

    Energy Technology Data Exchange (ETDEWEB)

    Saleh, R.A.; Gallivan, K.A. (Illinois Univ., Urbana, IL (USA). Center for Supercomputing Research and Development); Chang, M.C. (Texas Instruments, Inc., Dallas, TX (USA)); Hajj, I.N.; Trick, T.N. (Illinois Univ., Urbana, IL (USA). Coordinated Science Lab.); Smart, D. (Semiconductor Div., Analog Devices, Wilmington, MA (US))

    1989-12-01

    Circuit simulation is a very time-consuming and numerically intensive application, especially when the problem size is large as in the case of VLSI circuits. To improve the performance of circuit simulators without sacrificing accuracy, a variety of parallel processing algorithms have been investigated due to the recent availability of a number of commercial multiprocessor machines. In this paper, research in the field of parallel circuit simulation is surveyed and the ongoing research in this area at the University of Illinois is described. Both standard and relaxation-based approaches are considered. In particular, the forms of parallelism available within the direct method approach, used in programs such as SPICE2 and SLATE, and within the relaxation-based approaches, such as waveform relaxation, iterated timing analysis, and waveform-relaxation-Newton, are described. The specific implementation issues addressed here are primarily related to general-purpose multiprocessors with a shared-memory architecture having a limited number of processors, although many of the comments also apply to a number of other architectures.

  20. Designing analog circuits in CMOS

    NARCIS (Netherlands)

    Annema, Anne J.; Nauta, Bram; van Langevelde, Ronald; Tuinhout, Hans

    2004-01-01

    The evolution in CMOS technology dictated by Moore's Law is clearly beneficial for designers of digital circuits, but it presents difficult challenges, such as lowered nominal supply voltages, for their peers in the analog world who want to keep pace with this rapid progression. This article

  1. Clocking Scheme for Switched-Capacitor Circuits

    DEFF Research Database (Denmark)

    Steensgaard-Madsen, Jesper

    1998-01-01

    A novel clocking scheme for switched-capacitor (SC) circuits is presented. It can enhance the understanding of SC circuits and the errors caused by MOSFET (MOS) switches. Charge errors, and techniques to make SC circuits less sensitive to them are discussed.......A novel clocking scheme for switched-capacitor (SC) circuits is presented. It can enhance the understanding of SC circuits and the errors caused by MOSFET (MOS) switches. Charge errors, and techniques to make SC circuits less sensitive to them are discussed....

  2. Advanced circuit simulation using Multisim workbench

    CERN Document Server

    Báez-López, David; Cervantes-Villagómez, Ofelia Delfina

    2012-01-01

    Multisim is now the de facto standard for circuit simulation. It is a SPICE-based circuit simulator which combines analog, discrete-time, and mixed-mode circuits. In addition, it is the only simulator which incorporates microcontroller simulation in the same environment. It also includes a tool for printed circuit board design.Advanced Circuit Simulation Using Multisim Workbench is a companion book to Circuit Analysis Using Multisim, published by Morgan & Claypool in 2011. This new book covers advanced analyses and the creation of models and subcircuits. It also includes coverage of transmissi

  3. Digital circuit boards mach 1 GHz

    CERN Document Server

    Morrison, Ralph

    2012-01-01

    A unique, practical approach to the design of high-speed digital circuit boards The demand for ever-faster digital circuit designs is beginning to render the circuit theory used by engineers ineffective. Digital Circuit Boards presents an alternative to the circuit theory approach, emphasizing energy flow rather than just signal interconnection to explain logic circuit behavior. The book shows how treating design in terms of transmission lines will ensure that the logic will function, addressing both storage and movement of electrical energy on these lines. It cove

  4. Electromyostimulation, circuits and monitoring

    Science.gov (United States)

    Doerr, Donald F.

    1994-01-01

    One method to determine the benefit of electromyostimulation (EMS) requires an accurate strength assessment of the muscle of interest using a muscle force testing device. Several commercial devices are available. After a pre-EMS muscle assessment, a protocol with accurately controlled stimulation parameters must be applied and monitored. both the actual current and the resultant muscle force must be measured throughout the study. At the conclusion of the study, a reassessment of the muscle strength must be gathered. In our laboratory, electromyostimulation is being studied as a possible countermeasure to the muscle atrophy (degeneration) experienced in space. This muscle loss not only weakens the astronaut, but adversely affects his/her readaptation to 1-g upon return from space. Muscle atrophy is expected to have a more significant effect in long term space flight as anticipated in our space station. Our studies have concentrated on stimulating the four major muscle groups in the leg. These muscles were stimulated sequentially to allow individual muscle force quantification above the knee and ankle. The leg must be restrained in an instrumented brace to allow this measurement and preclude muscle cramping.

  5. Teaching electric circuits with multiple batteries: A qualitative approach

    Directory of Open Access Journals (Sweden)

    David P. Smith

    2011-11-01

    Full Text Available We have investigated preservice science teachers’ qualitative understanding of circuits consisting of multiple batteries in single and multiple loops using a pretest and post-test method and classroom observations. We found that most students were unable to explain the effects of adding batteries in single and multiple loops, as they tended to use reasoning based on current and resistance where reasoning based on voltage is a necessity. We also found that problems such as thinking of the battery as a source of constant current resurfaced in this new context, and that answers given were inconsistent with current conservation. We describe the curriculum we developed that enables students to model circuits with multiple batteries qualitatively. Post-test results show that the majority of students were able to apply their newly developed model to make accurate predictions for complex circuits.

  6. Multiple Soft Fault Diagnosis of Bjt Circuits

    Directory of Open Access Journals (Sweden)

    Tadeusiewicz Michał

    2014-12-01

    Full Text Available This paper deals with multiple soft fault diagnosis of nonlinear analog circuits comprising bipolar transistors characterized by the Ebers-Moll model. Resistances of the circuit and beta forward factor of a transistor are considered as potentially faulty parameters. The proposed diagnostic method exploits a strongly nonlinear set of algebraic type equations, which may possess multiple solutions, and is capable of finding different sets of the parameters values which meet the diagnostic test. The equations are written on the basis of node analysis and include DC voltages measured at accessible nodes, as well as some measured currents. The unknown variables are node voltages and the parameters which are considered as potentially faulty. The number of these parameters is larger than the number of the accessible nodes. To solve the set of equations the block relaxation method is used with different assignments of the variables to the blocks. Next, the solutions are corrected using the Newton-Raphson algorithm. As a result, one or more sets of the parameters values which satisfy the diagnostic test are obtained. The proposed approach is illustrated with a numerical example.

  7. Crossed SMPS MOSFET-based protection circuit for high frequency ultrasound transceivers and transducers.

    Science.gov (United States)

    Choi, Hojong; Shung, K Kirk

    2014-06-12

    The ultrasonic transducer is one of the core components of ultrasound systems, and the transducer's sensitivity is significantly related the loss of electronic components such as the transmitter, receiver, and protection circuit. In an ultrasonic device, protection circuits are commonly used to isolate the electrical noise between an ultrasound transmitter and transducer and to minimize unwanted discharged pulses in order to protect the ultrasound receiver. However, the performance of the protection circuit and transceiver obviously degrade as the operating frequency or voltage increases. We therefore developed a crossed SMPS (Switching Mode Power Supply) MOSFET-based protection circuit in order to maximize the sensitivity of high frequency transducers in ultrasound systems.The high frequency pulse signals need to trigger the transducer, and high frequency pulse signals must be received by the transducer. We therefore selected the SMPS MOSFET, which is the main component of the protection circuit, to minimize the loss in high frequency operation. The crossed configuration of the protection circuit can drive balanced bipolar high voltage signals from the pulser and transfer the balanced low voltage echo signals from the transducer. The equivalent circuit models of the SMPS MOSFET-based protection circuit are shown in order to select the proper device components. The schematic diagram and operation mechanism of the protection circuit is provided to show how the protection circuit is constructed. The P-Spice circuit simulation was also performed in order to estimate the performance of the crossed MOSFET-based protection circuit. We compared the performance of our crossed SMPS MOSFET-based protection circuit with a commercial diode-based protection circuit. At 60 MHz, our expander and limiter circuits have lower insertion loss than the commercial diode-based circuits. The pulse-echo test is typical method to evaluate the sensitivity of ultrasonic transducers

  8. Fabric circuits and method of manufacturing fabric circuits

    Science.gov (United States)

    Chu, Andrew W. (Inventor); Dobbins, Justin A. (Inventor); Scully, Robert C. (Inventor); Trevino, Robert C. (Inventor); Lin, Greg Y. (Inventor); Fink, Patrick W. (Inventor)

    2011-01-01

    A flexible, fabric-based circuit comprises a non-conductive flexible layer of fabric and a conductive flexible layer of fabric adjacent thereto. A non-conductive thread, an adhesive, and/or other means may be used for attaching the conductive layer to the non-conductive layer. In some embodiments, the layers are attached by a computer-driven embroidery machine at pre-determined portions or locations in accordance with a pre-determined attachment layout before automated cutting. In some other embodiments, an automated milling machine or a computer-driven laser using a pre-designed circuit trace as a template cuts the conductive layer so as to separate an undesired portion of the conductive layer from a desired portion of the conductive layer. Additional layers of conductive fabric may be attached in some embodiments to form a multi-layer construct.

  9. Analog Nonvolatile Computer Memory Circuits

    Science.gov (United States)

    MacLeod, Todd

    2007-01-01

    In nonvolatile random-access memory (RAM) circuits of a proposed type, digital data would be stored in analog form in ferroelectric field-effect transistors (FFETs). This type of memory circuit would offer advantages over prior volatile and nonvolatile types: In a conventional complementary metal oxide/semiconductor static RAM, six transistors must be used to store one bit, and storage is volatile in that data are lost when power is turned off. In a conventional dynamic RAM, three transistors must be used to store one bit, and the stored bit must be refreshed every few milliseconds. In contrast, in a RAM according to the proposal, data would be retained when power was turned off, each memory cell would contain only two FFETs, and the cell could store multiple bits (the exact number of bits depending on the specific design). Conventional flash memory circuits afford nonvolatile storage, but they operate at reading and writing times of the order of thousands of conventional computer memory reading and writing times and, hence, are suitable for use only as off-line storage devices. In addition, flash memories cease to function after limited numbers of writing cycles. The proposed memory circuits would not be subject to either of these limitations. Prior developmental nonvolatile ferroelectric memories are limited to one bit per cell, whereas, as stated above, the proposed memories would not be so limited. The design of a memory circuit according to the proposal must reflect the fact that FFET storage is only partly nonvolatile, in that the signal stored in an FFET decays gradually over time. (Retention times of some advanced FFETs exceed ten years.) Instead of storing a single bit of data as either a positively or negatively saturated state in a ferroelectric device, each memory cell according to the proposal would store two values. The two FFETs in each cell would be denoted the storage FFET and the control FFET. The storage FFET would store an analog signal value

  10. Driver circuit for solid state light sources

    Science.gov (United States)

    Palmer, Fred; Denvir, Kerry; Allen, Steven

    2016-02-16

    A driver circuit for a light source including one or more solid state light sources, a luminaire including the same, and a method of so driving the solid state light sources are provided. The driver circuit includes a rectifier circuit that receives an alternating current (AC) input voltage and provides a rectified AC voltage. The driver circuit also includes a switching converter circuit coupled to the light source. The switching converter circuit provides a direct current (DC) output to the light source in response to the rectified AC voltage. The driver circuit also includes a mixing circuit, coupled to the light source, to switch current through at least one solid state light source of the light source in response to each of a plurality of consecutive half-waves of the rectified AC voltage.

  11. Developing a Domain Model for Relay Circuits

    DEFF Research Database (Denmark)

    Haxthausen, Anne Elisabeth

    2009-01-01

    In this paper we stepwise develop a domain model for relay circuits as used in railway control systems. First we provide an abstract, property-oriented model of networks consisting of components that can be glued together with connectors. This model is strongly inspired by a network model...... for railways madeby Bjørner et.al., however our model is more general: the components can be of any kind and can later be refined to e.g. railway components or circuit components. Then we show how the abstract network model can be refined into an explicit model for relay circuits. The circuit model describes...... the statics as well as the dynamics of relay circuits, i.e. how a relay circuit can be composed legally from electrical components as well as how the components may change state over time. Finally the circuit model is transformed into an executable model, and we show how a concrete circuit can be defined...

  12. Model Order Reduction for Electronic Circuits:

    DEFF Research Database (Denmark)

    Hjorth, Poul G.; Shontz, Suzanne

    Electronic circuits are ubiquitous; they are used in numerous industries including: the semiconductor, communication, robotics, auto, and music industries (among many others). As products become more and more complicated, their electronic circuits also grow in size and complexity. This increased...

  13. Brain-machine interface circuits and systems

    CERN Document Server

    Zjajo, Amir

    2016-01-01

    This book provides a complete overview of significant design challenges in respect to circuit miniaturization and power reduction of the neural recording system, along with circuit topologies, architecture trends, and (post-silicon) circuit optimization algorithms. The introduced novel circuits for signal conditioning, quantization, and classification, as well as system configurations focus on optimized power-per-area performance, from the spatial resolution (i.e. number of channels), feasible wireless data bandwidth and information quality to the delivered power of implantable system.

  14. Circuit Tolerance Design Using Belief Rule Base

    OpenAIRE

    Xiao-Bin Xu; Zheng Liu; Yu-Wang Chen; Dong-Ling Xu; Cheng-Lin Wen

    2015-01-01

    A belief rule-based (BRB) system provides a generic nonlinear modeling and inference mechanism. It is capable of modeling complex causal relationships by utilizing both quantitative information and qualitative knowledge. In this paper, a BRB system is firstly developed to model the highly nonlinear relationship between circuit component parameters and the performance of the circuit by utilizing available knowledge from circuit simulations and circuit designers. By using rule inference in the ...

  15. CMOS digital integrated circuits a first course

    CERN Document Server

    Hawkins, Charles; Zarkesh-Ha, Payman

    2016-01-01

    This book teaches the fundamentals of modern CMOS technology and covers equal treatment to both types of MOSFET transistors that make up computer circuits; power properties of logic circuits; physical and electrical properties of metals; introduction of timing circuit electronics and introduction of layout; real-world examples and problem sets.

  16. On dominating and spanning circuits in graphs

    NARCIS (Netherlands)

    Veldman, H.J.

    1994-01-01

    An eulerian subgraph of a graph is called a circuit. As shown by Harary and Nash-Williams, the existence of a Hamilton cycle in the line graph L(G) of a graph G is equivalent to the existence of a dominating circuit in G, i.e., a circuit such that every edge of G is incident with a vertex of the

  17. An Equivalent Circuit for Landau Damping

    DEFF Research Database (Denmark)

    Pécseli, Hans

    1976-01-01

    An equivalent circuit simulating the effect of Landau damping in a stable plasma‐loaded parallel‐plate capacitor is presented. The circuit contains a double infinity of LC components. The transition from stable to unstable plasmas is simulated by the introduction of active elements into the circuit....

  18. 49 CFR 236.721 - Circuit, control.

    Science.gov (United States)

    2010-10-01

    ... 49 Transportation 4 2010-10-01 2010-10-01 false Circuit, control. 236.721 Section 236.721..., MAINTENANCE, AND REPAIR OF SIGNAL AND TRAIN CONTROL SYSTEMS, DEVICES, AND APPLIANCES Definitions § 236.721 Circuit, control. An electrical circuit between a source of electric energy and a device which it operates. ...

  19. Piezo pump and pressurized circuit provided therewith

    NARCIS (Netherlands)

    Van Es, Johannes; Wits, Wessel Willems

    2015-01-01

    A piezo pump for use in a pressurized circuit includes a pump chamber with an inlet provided with a one way inlet valve, for connection to a feeding line of the pressurized circuit and an outlet provided with a one way outlet valve, for connection to a discharge line of the pressurized circuit and a

  20. Finding All Elementary Circuits Exploiting Transconductance

    NARCIS (Netherlands)

    Klumperink, Eric A.M.; Bruccoleri, F.; Nauta, Bram

    Commonly used elementary circuits like single transistor amplifier stages, the differential pair and current mirror basically exploit the transconductance of transistors. This paper aims at finding ALL elementary transconductance based circuits. For this purpose, all graphs of two-port circuits with

  1. New Logic Circuit with DC Parametric Excitation

    Science.gov (United States)

    Sugahara, Masanori; Kaneda, Hisayoshi

    1982-12-01

    It is shown that dc parametric excitation is possible in a circuit named JUDO, which is composed of two resistively-connected Josephson junctions. Simulation study proves that the circuit has large gain and properties suitable for the construction of small, high-speed logic circuits.

  2. Lower Power Design for UHF RF CMOS Circuits Based on the Power Consumption Acuity

    Directory of Open Access Journals (Sweden)

    Niu Xiang-jie

    2014-01-01

    Full Text Available Excessive energy consumption of UHF tag is the bottleneck of energy saving in its wide range of applications. To address this issue, a lower power design for UHF RF CMOS circuits based on power consumption acuity is proposed in this paper. Through in-depth analysis of the static and dynamic power generation principle of UHF RF circuits in the work, the power consumption acuity can be calculated by using the correlation of circuit power and input vector. Subsequently, under the guide of this acuity, the UHF RF CMOS circuits with better energy saving can be designed. Furthermore, according to the performance indicators of EPC CIG2 UHF RFID in UHF identification, the corresponding circuit is designed and implemented. The test results show that the design of UHF RF circuit based on the acuity of power consumption can reduce 35%–40% power consumption.

  3. Astable Oscillator Circuits using Silicon-on-Insulator Timer Chip for Wide Range Temperature Sensing

    Science.gov (United States)

    Patterson, Richard L.; Culley, Dennis; Hammoud, Ahmad; Elbuluk, Malik

    2008-01-01

    Two astable oscillator circuits were constructed using a new silicon-on-insulator (SOI) 555 timer chip for potential use as a temperature sensor in harsh environments encompassing jet engine and space mission applications. The two circuits, which differed slightly in configuration, were evaluated between -190 and 200 C. The output of each circuit was made to produce a stream of rectangular pulses whose frequency was proportional to the sensed temperature. The preliminary results indicated that both circuits performed relatively well over the entire test temperature range. In addition, after the circuits were subjected to limited thermal cycling over the temperature range of -190 to 200 C, the performance of either circuit did not experience any significant change.

  4. Advanced Microwave Circuits and Systems

    DEFF Research Database (Denmark)

    as sufficient gain in a wide frequency range of operation, which is very difficult to achieve. Most circuits demonstrated are not stable across the frequency band, which makes these amplifiers prone to self-oscillations and therefore limit their applicability. The trade-off between noise figure, gain, linearity......This book is based on recent research work conducted by the authors dealing with the design and development of active and passive microwave components, integrated circuits and systems. It is divided into seven parts. In the first part comprising the first two chapters, alternative concepts...... and equations for multiport network analysis and characterization are provided. A thru-only de-embedding technique for accurate on-wafer characterization is introduced. The second part of the book corresponds to the analysis and design of ultra-wideband low-noise amplifiers (LNA). The LNA is the most critical...

  5. Integrated circuits for multimedia applications

    DEFF Research Database (Denmark)

    Vandi, Luca

    2007-01-01

    , and it is applied to a broad-band dual-loop receiver architecture in order to boost the linearity performances of the stage. A simplified noise- and linearity analysis of the circuit is derived, and a comparison is provided with a more traditional dual-loop topology (a broad-band stage based on shunt......This work presents several key aspects in the design of RF integrated circuits for portable multimedia devices. One chapter is dedicated to the application of negative-feedback topologies to receiver frontends. A novel feedback technique suitable for common multiplier-based mixers is described......-series feedback), showing a difference in compression point in the order of 10dBm for the same power consumption. The same principle is also applied to a more conventional narrow-band stage in which a single loop is employed in order to enhance noise performances. Noise analysis shows sensible improvements...

  6. Foundations for microstrip circuit design

    CERN Document Server

    Edwards, Terry

    2016-01-01

    Building on the success of the previous three editions, Foundations for Microstrip Circuit Design offers extensive new, updated and revised material based upon the latest research. Strongly design-oriented, this fourth edition provides the reader with a fundamental understanding of this fast expanding field making it a definitive source for professional engineers and researchers and an indispensable reference for senior students in electronic engineering. Topics new to this edition: microwave substrates, multilayer transmission line structures, modern EM tools and techniques, microstrip and planar transmision line design, transmission line theory, substrates for planar transmission lines, Vias, wirebonds, 3D integrated interposer structures, computer-aided design, microstrip and power-dependent effects, circuit models, microwave network analysis, microstrip passive elements, and slotline design fundamentals.

  7. Quantum information with superconducting circuits

    OpenAIRE

    Huard, Benjamin

    2014-01-01

    Ce mémoire présente ma contribution à l'avènement des circuits supraconducteurs comme composant de base des systèmes d'information quantique. Les variables macroscopiques des circuits électriques, telles que la tension et le courant, obéissent aux lois de la mécanique quantique tant qu'elles sont suffisamment découplées de leur environnement. Depuis que les premiers qubits supraconducteurs ont été réalisés il y a 15 ans, leurs temps de cohérence ont augmenté de 5 ordres de gra...

  8. Delta connected resonant snubber circuit

    Science.gov (United States)

    Lai, J.S.; Peng, F.Z.; Young, R.W. Sr.; Ott, G.W. Jr.

    1998-01-20

    A delta connected, resonant snubber-based, soft switching, inverter circuit achieves lossless switching during dc-to-ac power conversion and power conditioning with minimum component count and size. Current is supplied to the resonant snubber branches solely by the dc supply voltage through the main inverter switches and the auxiliary switches. Component count and size are reduced by use of a single semiconductor switch in the resonant snubber branches. Component count is also reduced by maximizing the use of stray capacitances of the main switches as parallel resonant capacitors. Resonance charging and discharging of the parallel capacitances allows lossless, zero voltage switching. In one embodiment, circuit component size and count are minimized while achieving lossless, zero voltage switching within a three-phase inverter. 36 figs.

  9. Smart Circuit Breaker Communication Infrastructure

    Directory of Open Access Journals (Sweden)

    Octavian Mihai MACHIDON

    2017-11-01

    Full Text Available The expansion of the Internet of Things has fostered the development of smart technologies in fields such as power transmission and distribution systems (as is the Smart Grid and also in regard to home automation (the Smart Home concept. This paper addresses the network communication infrastructure for a Smart Circuit Breaker system, a novel application at the edge of the two afore-mentioned systems (Smart Grid and Smart Home. Such a communication interface has high requirements from functionality, performance and security point of views, given the large amount of distributed connected elements and the real-time information transmission and system management. The paper describes the design and implementation of the data server, Web interface and the embedded networking capabilities of the smart circuit breakers, underlining the protocols and communication technologies used.

  10. Monolithic readout circuits for RHIC

    Energy Technology Data Exchange (ETDEWEB)

    O`Connor, P.; Harder, J. [Brookhaven National Laboratory, Upton, NY (United States)

    1991-12-31

    Several CMOS ASICs have been developed for a proposed RHIC experiment. This paper discusses why ASIC implementation was chosen for certain functions, circuit specifications and the design techniques used to meet them, and results of simulations and early prototypes. By working closely together from an early stage in the planning process, in-house ASIC designers and detector and data acquisition experimenters can achieve optimal use of this important technology.

  11. Three-Dimensional Circuit Layouts.

    Science.gov (United States)

    1984-06-01

    the models of VLSI layout theory renders the vertices of our circuits as unit-side squares or cubes . 4. Our method of extending the two-dimensional...model assumes isometry in all 4$ dimensions: a unit of height is eqivalent to a unit of width. It is worthwhile placing these assumptions in perspective...2,13]. 4. Aside from clerical simplification, the isometry assumption acknowledges the potential problem of cross-talk between parallel runs of wire

  12. 49 CFR 236.5 - Design of control circuits on closed circuit principle.

    Science.gov (United States)

    2010-10-01

    ... shall be designed on the closed circuit principle, except circuits for roadway equipment of intermittent... 49 Transportation 4 2010-10-01 2010-10-01 false Design of control circuits on closed circuit principle. 236.5 Section 236.5 Transportation Other Regulations Relating to Transportation (Continued...

  13. Comparative Effects of Circuit Training Programme on Speed and ...

    African Journals Online (AJOL)

    This study examined the Comparative Effects of Circuit Training Programme on Speed and Power of Pre- and Post-Menarcheal girls. A pre-test- posttest control group experimental design was used to carry out the study. A total of 80 Secondary School girls from St. Peter's College, Olomore, Abeokuta, in Ogun State of ...

  14. An Inexpensive Coincidence Circuit for the Pasco Geiger Sensors

    CERN Document Server

    Fichera, F; Librizzi, F; Riggi, F

    2005-01-01

    A simple coincidence circuit was devised to carry out educational coincidence experiments involving the use of Geiger counters. The system was tested by commercially available Geiger sensors from PASCO, and is intended to be used in collaboration with high school students and teachers

  15. Reliability of lithium niobate Annealed Proton Exchanged integrated optical circuits

    Science.gov (United States)

    Kissa, Karl M.; Eng, Hogan; Lewis, David K.; Rodino, Vincent D.; Suchoski, Paul G., Jr.; Koziarz, Nancy A.

    1995-06-01

    Several studies have been performed recently that demonstrate the reliability of lithium niobate Annealed Proton Exchanged (APE) Integrated Optical Circuits (IOCs). Studies have been performed on APE IOC die as well as pigtailed and packaged devices. The tests indicate that the reliability of APE IOCs meet or surpass the needs of most military and commercial applications.

  16. Ultra-low power integrated circuit design circuits, systems, and applications

    CERN Document Server

    Li, Dongmei; Wang, Zhihua

    2014-01-01

    This book describes the design of CMOS circuits for ultra-low power consumption including analog, radio frequency (RF), and digital signal processing circuits (DSP). The book addresses issues from circuit and system design to production design, and applies the ultra-low power circuits described to systems for digital hearing aids and capsule endoscope devices. Provides a valuable introduction to ultra-low power circuit design, aimed at practicing design engineers; Describes all key building blocks of ultra-low power circuits, from a systems perspective; Applies circuits and systems described to real product examples such as hearing aids and capsule endoscopes.

  17. Virtual Lab to Develop Achievement in Electronic Circuits for Hearing-Impaired Students

    Science.gov (United States)

    Baladoh, S. M.; Elgamal, A. F.; Abas, H. A.

    2017-01-01

    This paper aims to report and discuss the use of a virtual lab for developing achievement in electronic circuits for hearing-impaired students. Results from a number of studies have proved that the virtual lab allowed students to build and test a wide variety of electronic circuits. The present study was implemented to investigate the…

  18. Design-for-Delay Testability Techniques for High-Speed Digital Circuits

    NARCIS (Netherlands)

    Vermaak, H.J.

    2005-01-01

    The importance of delay faults is enhanced by the ever increasing clock rates and decreasing geometry sizes of nowadays’ circuits. This thesis focuses on the development of Design-for-Delay-Testability (DfDT) techniques for high-speed circuits and embedded cores. The rising costs of IC testing and

  19. A new monolithic integrated circuit for multiwire proportional chamber (MWPC) read-out system

    CERN Document Server

    Bareyre, P; Borel, J; Borgeaud, P; Brisson, J C; Merckel, G; Meunier, P; Ollivier, B; Poinsignon, J; Prunier, J

    1976-01-01

    A new monolithic 8-channel PMOS integrated circuit has been developed for an experiment to be carried out on the CERN 300 GeV accelerator. The circuit, read-out electronics and tests performed on 12 large MWPC (total of 48000 channels) are described and the results are presented. (3 refs).

  20. A Novel Analog Integrated Circuit Design Course Covering Design, Layout, and Resulting Chip Measurement

    Science.gov (United States)

    Lin, Wei-Liang; Cheng, Wang-Chuan; Wu, Chen-Hao; Wu, Hai-Ming; Wu, Chang-Yu; Ho, Kuan-Hsuan; Chan, Chueh-An

    2010-01-01

    This work describes a novel, first-year graduate-level analog integrated circuit (IC) design course. The course teaches students analog circuit design; an external manufacturer then produces their designs in three different silicon chips. The students, working in pairs, then test these chips to verify their success. All work is completed within…

  1. Circuits and electronics hands-on learning with analog discovery

    CERN Document Server

    Okyere Attia, John

    2018-01-01

    The book provides instructions on building circuits on breadboards, connecting the Analog Discovery wires to the circuit under test, and making electrical measurements. Various measurement techniques are described and used in this book, including: impedance measurements, complex power measurements, frequency response measurements, power spectrum measurements, current versus voltage characteristic measurements of diodes, bipolar junction transistors, and Mosfets. The book includes end-of-chapter problems for additional exercises geared towards hands-on learning, experimentation, comparisons between measured results and those obtained from theoretical calculations.

  2. Design of analog integrated circuits and systems

    CERN Document Server

    Laker, Kenneth R

    1994-01-01

    This text is designed for senior or graduate level courses in analog integrated circuits or design of analog integrated circuits. This book combines consideration of CMOS and bipolar circuits into a unified treatment. Also included are CMOS-bipolar circuits made possible by BiCMOS technology. The text progresses from MOS and bipolar device modelling to simple one and two transistor building block circuits. The final two chapters present a unified coverage of sample-data and continuous-time signal processing systems.

  3. CMOS circuit design, layout and simulation

    CERN Document Server

    Baker, R Jacob

    2010-01-01

    The Third Edition of CMOS Circuit Design, Layout, and Simulation continues to cover the practical design of both analog and digital integrated circuits, offering a vital, contemporary view of a wide range of analog/digital circuit blocks including: phase-locked-loops, delta-sigma sensing circuits, voltage/current references, op-amps, the design of data converters, and much more. Regardless of one's integrated circuit (IC) design skill level, this book allows readers to experience both the theory behind, and the hands-on implementation of, complementary metal oxide semiconductor (CMOS) IC design via detailed derivations, discussions, and hundreds of design, layout, and simulation examples.

  4. High resolution capacitance detection circuit for rotor micro-gyroscope

    Directory of Open Access Journals (Sweden)

    Ming-Yuan Ren

    2014-03-01

    Full Text Available Conventional methods for rotor position detection of micro-gyroscopes include common exciting electrodes (single frequency and common sensing electrodes (frequency multiplex, but they have encountered some problems. So we present a high resolution and low noise pick-off circuit for micro-gyroscopes which utilizes the time multiplex method. The detecting circuit adopts a continuous-time current sensing circuit for capacitance measurement, and its noise analysis of the charge amplifier is introduced. The equivalent output noise power spectral density of phase-sensitive demodulation is 120 nV/Hz1/2. Tests revealed that the whole circuitry has a relative capacitance resolution of 1 × 10−8.

  5. Integrated devices in digital circuit design

    Science.gov (United States)

    Hope, G. S.

    Aspects of combinational design are examined, taking into account logical operations, truth tables, Karnaugh maps as input output expressions, minimum forms, maximum forms, minterm forms, symbols, fundamental relationships, Karnaugh maps as design tools, the implementation of logic functions, logic and implementation, logic nor implementation, implementation examples, the exclusive or function, symmetrical forms, reduction, and practical circuits. Multiplexers and demultiplexers in combinational circuits are considered along with fundamental mode circuits, event-driven sequential circuits, event-driven circuit implementation using multiplexers, clock-driven sequential circuits, counters and multiplexers in clock-driven sequential circuits, state diagram construction, registers in logic design, a digital system, programming and programming aids, input and output techniques, operation and configuration of independent systems, and a definition of a Boolean algebra. Attention is also given to Intel's and Motorola's executable instructions.

  6. Universal Programmable Quantum Circuit Schemes to Emulate an Operator

    OpenAIRE

    Daskin, Anmer; Grama, Ananth; Kollias, Giorgos; Kais, Sabre

    2012-01-01

    Unlike fixed designs, programmable circuit designs support an infinite number of operators. The functionality of a programmable circuit can be altered by simply changing the angle values of the rotation gates in the circuit. Here, we present a new quantum circuit design technique resulting in two general programmable circuit schemes. The circuit schemes can be used to simulate any given operator by setting the angle values in the circuit. This provides a fixed circuit design whose angles are ...

  7. High-speed coherent silicon modulator module using photonic integrated circuits: from circuit design to packaged module

    Science.gov (United States)

    Bernabé, S.; Olivier, S.; Myko, A.; Fournier, M.; Blampey, B.; Abraham, A.; Menezo, S.; Hauden, J.; Mottet, A.; Frigui, K.; Ngoho, S.; Frigui, B.; Bila, S.; Marris-Morini, D.; Pérez-Galacho, D.; Brindel, P.; Charlet, G.

    2016-05-01

    Silicon photonics technology is an enabler for the integration of complex circuits on a single chip, for various optical link applications such as routing, optical networks on chip, short range links and long haul transmitters. Quadrature Phase Shift Keying (QPSK) transmitters is one of the typical circuits that can be achieved using silicon photonics integrated circuits. The achievement of 25GBd QPSK transmitter modules requires several building blocks to be optimized: the pn junction used to build a BPSK (Binary Shift Phase Keying) modulator, the RF access and the optical interconnect at the package level. In this paper, we describe the various design steps of a BPSK module and the related tests that are needed at every stage of the fabrication process.

  8. Test

    DEFF Research Database (Denmark)

    Bendixen, Carsten

    2014-01-01

    Bidrag med en kortfattet, introducerende, perspektiverende og begrebsafklarende fremstilling af begrebet test i det pædagogiske univers.......Bidrag med en kortfattet, introducerende, perspektiverende og begrebsafklarende fremstilling af begrebet test i det pædagogiske univers....

  9. Circuit bridging of digital equipment caused by smoke from a cable fire

    Energy Technology Data Exchange (ETDEWEB)

    Tanaka, T.J.; Anderson, D.J.

    1997-03-01

    Advanced reactor systems are likely to use protection systems with digital electronics that ideally should be resistant to environmental hazards, including smoke from possible cable fires. Previous smoke tests have shown that digital safety systems can fail even at relatively low levels of smoke density and that short-term failures are likely to be caused by circuit bridging. Experiments were performed to examine these failures, with a focus on component packaging and protection schemes. Circuit bridging, which causes increased leakage currents and arcs, was gauged by measuring leakage currents among the leads of component packages. The resistance among circuit leads typically varies over a wide range, depending on the nature of the circuitry between the pins, bias conditions, circuit board material, etc. Resistance between leads can be as low as 20 k{Omega} and still be good, depending on the component. For these tests, the authors chose a printed circuit board and components that normally have an interlead resistance above 10{sup 12} {Omega}, but if the circuit is exposed to smoke, circuit bridging causes the resistance to fall below 10{sup 3} {Omega}. Plated-through-hole (PTH) and surface-mounted (SMT) packages were exposed to a series of different smoke environments using a mixture of environmentally qualified cables for fuel. Conformal coatings and enclosures were tested as circuit protection methods. High fuel levels, high humidity, and high flaming burns were the conditions most likely to cause circuit bridging. The inexpensive conformal coating that was tested - an acrylic spray - reduced leakage currents, but enclosure in a chassis with a fan did not. PTH packages were more resistant to smoke-induced circuit bridging than SMT packages. Active components failed most often in tests where the leakage currents were high, but failure did not always accompany high leakage currents.

  10. Analog Circuit Design for Process Variation-Resilient Systems-on-a-Chip

    CERN Document Server

    Onabajo, Marvin

    2012-01-01

    This book describes several techniques to address variation-related design challenges for analog blocks in mixed-signal systems-on-chip. The methods presented are results from recent research works involving receiver front-end circuits, baseband filter linearization, and data conversion. These circuit-level techniques are described, with their relationships to emerging system-level calibration approaches, to tune the performances of analog circuits with digital assistance or control. Coverage also includes a strategy to utilize on-chip temperature sensors to measure the signal power and linearity characteristics of analog/RF circuits, as demonstrated by test chip measurements.    Describes a variety of variation-tolerant analog circuit design examples, including from RF front-ends, high-performance ADCs and baseband filters; Includes built-in testing techniques, linked to current industrial trends; Balances digitally-assisted performance tuning with analog performance tuning and mismatch reduction approach...

  11. Photonic boson sampling in a tunable circuit.

    Science.gov (United States)

    Broome, Matthew A; Fedrizzi, Alessandro; Rahimi-Keshari, Saleh; Dove, Justin; Aaronson, Scott; Ralph, Timothy C; White, Andrew G

    2013-02-15

    Quantum computers are unnecessary for exponentially efficient computation or simulation if the Extended Church-Turing thesis is correct. The thesis would be strongly contradicted by physical devices that efficiently perform tasks believed to be intractable for classical computers. Such a task is boson sampling: sampling the output distributions of n bosons scattered by some passive, linear unitary process. We tested the central premise of boson sampling, experimentally verifying that three-photon scattering amplitudes are given by the permanents of submatrices generated from a unitary describing a six-mode integrated optical circuit. We find the protocol to be robust, working even with the unavoidable effects of photon loss, non-ideal sources, and imperfect detection. Scaling this to large numbers of photons should be a much simpler task than building a universal quantum computer.

  12. RD53A Integrated Circuit Specifications

    CERN Document Server

    Garcia-Sciveres, Mauricio

    2015-01-01

    Specifications for the RD53 collaboration’s first engineering wafer run of an integrated circuit (IC) for hybrid pixel detector readout, called RD53A. RD53A is intended to demonstrate in a large format IC the suitability of the technology (including radiation tolerance), the stable low threshold operation, and the high hit and trigger rate capabilities, required for HL-LHC upgrades of ATLAS and CMS. The wafer scale production will permit the experiments to prototype bump bonding assembly with realistic sensors in this new technology and to measure the performance of hybrid assemblies. RD53A is not intended to be a final production IC for use in an experiment, and will contain design variations for testing purposes, making the pixel matrix non-uniform.

  13. Circuit QED with transmon qubits

    Energy Technology Data Exchange (ETDEWEB)

    Wulschner, Karl Friedrich; Puertas, Javier; Baust, Alexander; Eder, Peter; Fischer, Michael; Goetz, Jan; Haeberlein, Max; Schwarz, Manuel; Xie, Edwar; Zhong, Ling; Deppe, Frank; Fedorov, Kirill; Marx, Achim; Menzel, Edwin; Gross, Rudolf [Walther-Meissner-Institut, Bayerische Akademie der Wissenschaften, Garching (Germany); Physik-Department, TU Muenchen, Garching (Germany); Nanosystems Initiative Munich (NIM), Muenchen (Germany); Huebl, Hans [Walther-Meissner-Institut, Bayerische Akademie der Wissenschaften, Garching (Germany); Nanosystems Initiative Munich (NIM), Muenchen (Germany); Weides, Martin [Karlsruhe Institute of Technology (KIT), Karlsruhe (Germany)

    2015-07-01

    Superconducting quantum bits are basic building blocks for circuit QED systems. Applications in the fields of quantum computation and quantum simulation require long coherence times. We have fabricated and characterized superconducting transmon qubits which are designed to operate at a high ratio of Josephson energy and charging energy. Due to their low sensitivity to charge noise transmon qubits show good coherence properties. We couple transmon qubits to coplanar waveguide resonators and coplanar slotline resonators and characterize the devices at mK-temperatures. From the experimental data we derive the qubit-resonator coupling strength, the qubit relaxation time and calibrate the photon number in the resonator via Stark shifts.

  14. Pragmatic circuits signals and filters

    CERN Document Server

    Eccles, William

    2006-01-01

    Pragmatic Circuits: Signals and Filters is built around the processing of signals. Topics include spectra, a short introduction to the Fourier series, design of filters, and the properties of the Fourier transform. The focus is on signals rather than power. But the treatment is still pragmatic. For example, the author accepts the work of Butterworth and uses his results to design filters in a fairly methodical fashion. This third of three volumes finishes with a look at spectra by showing how to get a spectrum even if a signal is not periodic. The Fourier transform provides a way of dealing wi

  15. Quantum Memristors with Superconducting Circuits.

    Science.gov (United States)

    Salmilehto, J; Deppe, F; Di Ventra, M; Sanz, M; Solano, E

    2017-02-14

    Memristors are resistive elements retaining information of their past dynamics. They have garnered substantial interest due to their potential for representing a paradigm change in electronics, information processing and unconventional computing. Given the advent of quantum technologies, a design for a quantum memristor with superconducting circuits may be envisaged. Along these lines, we introduce such a quantum device whose memristive behavior arises from quasiparticle-induced tunneling when supercurrents are cancelled. For realistic parameters, we find that the relevant hysteretic behavior may be observed using current state-of-the-art measurements of the phase-driven tunneling current. Finally, we develop suitable methods to quantify memory retention in the system.

  16. Printed circuit dispersive transmission line

    Science.gov (United States)

    Ikezi, Hiroyuki; Lin-Liu, Yuh-Ren; DeGrassie, John S.

    1991-01-01

    A printed circuit dispersive transmission line structure is disclosed comprising an insulator, a ground plane formed on one surface of the insulator, a first transmission line formed on a second surface of the insulator, and a second transmission line also formed on the second surface of the insulator and of longer length than the first transmission line and periodically intersecting the first transmission line. In a preferred embodiment, the transmission line structure exhibits highly dispersive characteristics by designing the length of one of the transmission line between two adjacent periodic intersections to be longer than the other.

  17. HF radio systems and circuits

    CERN Document Server

    Sabin, William

    1998-01-01

    A comprehensive reference for the design of high frequency communications systems and equipment. This revised edition is loaded with practical data, much of which cannot be found in other reference books. Its approach to the subject follows the needs of an engineer from system definition and performance requirements down to the individual circuit elements that make up radio transmitters and receivers. The accompanying disk contains updated software on filters, matching networks and receiver analysis. SciTech Publishing also provides many other products related to Communication Systems Design.

  18. Circuit for Driving Piezoelectric Transducers

    Science.gov (United States)

    Randall, David P.; Chapsky, Jacob

    2009-01-01

    The figure schematically depicts an oscillator circuit for driving a piezoelectric transducer to excite vibrations in a mechanical structure. The circuit was designed and built to satisfy application-specific requirements to drive a selected one of 16 such transducers at a regulated amplitude and frequency chosen to optimize the amount of work performed by the transducer and to compensate for both (1) temporal variations of the resonance frequency and damping time of each transducer and (2) initially unknown differences among the resonance frequencies and damping times of different transducers. In other words, the circuit is designed to adjust itself to optimize the performance of whichever transducer is selected at any given time. The basic design concept may be adaptable to other applications that involve the use of piezoelectric transducers in ultrasonic cleaners and other apparatuses in which high-frequency mechanical drives are utilized. This circuit includes three resistor-capacitor networks that, together with the selected piezoelectric transducer, constitute a band-pass filter having a peak response at a frequency of about 2 kHz, which is approximately the resonance frequency of the piezoelectric transducers. Gain for generating oscillations is provided by a power hybrid operational amplifier (U1). A junction field-effect transistor (Q1) in combination with a resistor (R4) is used as a voltage-variable resistor to control the magnitude of the oscillation. The voltage-variable resistor is part of a feedback control loop: Part of the output of the oscillator is rectified and filtered for use as a slow negative feedback to the gate of Q1 to keep the output amplitude constant. The response of this control loop is much slower than 2 kHz and, therefore, does not introduce significant distortion of the oscillator output, which is a fairly clean sine wave. The positive AC feedback needed to sustain oscillations is derived from sampling the current through the

  19. Innovative Magnetic-Field Array Probe for TRUST Integrated Circuits

    Science.gov (United States)

    2017-03-01

    H- field; Probe Array; Counterfeit Detection; IC Trust . Introduction Counterfeiting is a huge flail that still continues to serve in the...Innovative Magnetic-Field Array Probe for TRUST Integrated Circuits   contains the RF-switch matrix and broad-band (BB) low noise amplifiers (LNAs...fabricated, tested and used for IC’s TRUST . Measurement setup has been proposed for system validation and of IC scanning surface. Validation test of the

  20. Designing and engineering evolutionary robust genetic circuits

    Directory of Open Access Journals (Sweden)

    Lieviant Jane A

    2010-11-01

    Full Text Available Abstract Background One problem with engineered genetic circuits in synthetic microbes is their stability over evolutionary time in the absence of selective pressure. Since design of a selective environment for maintaining function of a circuit will be unique to every circuit, general design principles are needed for engineering evolutionary robust circuits that permit the long-term study or applied use of synthetic circuits. Results We first measured the stability of two BioBrick-assembled genetic circuits propagated in Escherichia coli over multiple generations and the mutations that caused their loss-of-function. The first circuit, T9002, loses function in less than 20 generations and the mutation that repeatedly causes its loss-of-function is a deletion between two homologous transcriptional terminators. To measure the effect between transcriptional terminator homology levels and evolutionary stability, we re-engineered six versions of T9002 with a different transcriptional terminator at the end of the circuit. When there is no homology between terminators, the evolutionary half-life of this circuit is significantly improved over 2-fold and is independent of the expression level. Removing homology between terminators and decreasing expression level 4-fold increases the evolutionary half-life over 17-fold. The second circuit, I7101, loses function in less than 50 generations due to a deletion between repeated operator sequences in the promoter. This circuit was re-engineered with different promoters from a promoter library and using a kanamycin resistance gene (kanR within the circuit to put a selective pressure on the promoter. The evolutionary stability dynamics and loss-of-function mutations in all these circuits are described. We also found that on average, evolutionary half-life exponentially decreases with increasing expression levels. Conclusions A wide variety of loss-of-function mutations are observed in BioBrick-assembled genetic

  1. Designing and engineering evolutionary robust genetic circuits.

    Science.gov (United States)

    Sleight, Sean C; Bartley, Bryan A; Lieviant, Jane A; Sauro, Herbert M

    2010-11-01

    One problem with engineered genetic circuits in synthetic microbes is their stability over evolutionary time in the absence of selective pressure. Since design of a selective environment for maintaining function of a circuit will be unique to every circuit, general design principles are needed for engineering evolutionary robust circuits that permit the long-term study or applied use of synthetic circuits. We first measured the stability of two BioBrick-assembled genetic circuits propagated in Escherichia coli over multiple generations and the mutations that caused their loss-of-function. The first circuit, T9002, loses function in less than 20 generations and the mutation that repeatedly causes its loss-of-function is a deletion between two homologous transcriptional terminators. To measure the effect between transcriptional terminator homology levels and evolutionary stability, we re-engineered six versions of T9002 with a different transcriptional terminator at the end of the circuit. When there is no homology between terminators, the evolutionary half-life of this circuit is significantly improved over 2-fold and is independent of the expression level. Removing homology between terminators and decreasing expression level 4-fold increases the evolutionary half-life over 17-fold. The second circuit, I7101, loses function in less than 50 generations due to a deletion between repeated operator sequences in the promoter. This circuit was re-engineered with different promoters from a promoter library and using a kanamycin resistance gene (kanR) within the circuit to put a selective pressure on the promoter. The evolutionary stability dynamics and loss-of-function mutations in all these circuits are described. We also found that on average, evolutionary half-life exponentially decreases with increasing expression levels. A wide variety of loss-of-function mutations are observed in BioBrick-assembled genetic circuits including point mutations, small insertions and

  2. CMOS Interface Circuits for Spin Tunneling Junction Based Magnetic Random Access Memories

    Energy Technology Data Exchange (ETDEWEB)

    Saripalli, Ganesh [Iowa State Univ., Ames, IA (United States)

    2002-01-01

    Magneto resistive memories (MRAM) are non-volatile memories which use magnetic instead of electrical structures to store data. These memories, apart from being non-volatile, offer a possibility to achieve densities better than DRAMs and speeds faster than SRAMs. MRAMs could potentially replace all computer memory RAM technologies in use today, leading to future applications like instan-on computers and longer battery life for pervasive devices. Such rapid development was made possible due to the recent discovery of large magnetoresistance in Spin tunneling junction devices. Spin tunneling junctions (STJ) are composite structures consisting of a thin insulating layer sandwiched between two magnetic layers. This thesis research is targeted towards these spin tunneling junction based Magnetic memories. In any memory, some kind of an interface circuit is needed to read the logic states. In this thesis, four such circuits are proposed and designed for Magnetic memories (MRAM). These circuits interface to the Spin tunneling junctions and act as sense amplifiers to read their magnetic states. The physical structure and functional characteristics of these circuits are discussed in this thesis. Mismatch effects on the circuits and proper design techniques are also presented. To demonstrate the functionality of these interface structures, test circuits were designed and fabricated in TSMC 0.35μ CMOS process. Also circuits to characterize the process mismatches were fabricated and tested. These results were then used in Matlab programs to aid in design process and to predict interface circuit's yields.

  3. Noise Analysis of Switched-Capacitor Circuits

    Science.gov (United States)

    Retdian, Nicodimus; Takagi, Shigetaka

    Switched-capacitor (SC) circuit has been a well known analog circuit block. Since their characteristics are determined by capacitance ratio, SC circuits are suitable for on-chip implementations. Eventhough there are so many publications on the design of SC circuits, only a few of them discuss the property of noise in SC circuits. Linear noise analysis are common in continuous-time systems. However, SC circuits are operating in discrete-time domain and their noise properties are known to be a non-linear phenomenon and dificult to be analyzed by hand. This paper will show a noise analysis of an SC integrator as an example for a better understanding of the analysis method. It will be shown by simulation results that the proposed formula gives a better approximation of noise power spectral density (PSD).

  4. A Singularity in the Kirchhoff's Circuit Equations

    CERN Document Server

    Harsha, N R Sree

    2016-01-01

    Students often have difficulty in understanding qualitatively the behaviour of simple electric circuits. In particular, as different studies have shown, they find multiple batteries connected in multiple loops difficult to analyse. In a recent paper [Phys. Educ. 50 568 (2015)], we showed such an electric circuit, which consists of ideal batteries connected in parallel, that couldn't be solved by the existing circuit analysis methods. In this paper, we shall introduce a new mathematical method of solving simple electric circuits from the solutions of more general circuits and show that the currents, in this particular circuit, take the indeterminate 0/0 form. We shall also present some of the implications of teaching the method. We believe that the description presented in this paper should help the instructors in teaching the behaviour of multiple batteries connected in parallel.

  5. Coherent-feedback control in nanophotonic circuits

    Science.gov (United States)

    Mabuchi, Hideo

    2012-06-01

    The emerging discipline of coherent-feedback quantum control provides core concepts and methods for nanopho- tonic circuit theory, which can be assimilated within modern approaches to computer-aided design. Current research in this area includes the development of software tools to enable a schematic capture workflow for compilation and analysis of quantum stochastic models for nanophotonic circuits, exploration of elementary coherent-feedback circuit motifs, and laboratory demonstrations of quantum nonlinear photonic devices.

  6. Logarithmic current-measuring transistor circuits

    DEFF Research Database (Denmark)

    Højberg, Kristian Søe

    1967-01-01

    Describes two transistorized circuits for the logarithmic measurement of small currents suitable for nuclear reactor instrumentation. The logarithmic element is applied in the feedback path of an amplifier, and only one dual transistor is used as logarithmic diode and temperature compensating...... transistor. A simple one-amplifier circuit is compared with a two-amplifier system. The circuits presented have been developed in connexion with an amplifier using a dual m.o.s. transistor input stage with diode-protected gates....

  7. Hybrid Techniques for Quantum Circuit Simulation

    Science.gov (United States)

    2014-02-01

    manufacture, use, or sell any patented invention that may relate to them. This report was cleared for public release by the 88th ABW, Wright-Patterson AFB...that, for any unitary stabilizer circuit, there exists an equivalent block-structured canonical circuit that applies a block of Hadamard (H) gates...operation, we map it to a conventional logic circuit that processes the SNs in an appropriate way. A quantum gate G corresponds to a 2n × 2n unitary

  8. Analog MOS integrated circuits for signal processing

    Science.gov (United States)

    Gregorian, R.; Temes, G. C.

    Theoretical and practical aspects of analog MOS integrated circuits are discussed. The basic properties of these circuits are described, providing necessary background material in mathematics and semiconductor device physics and technology. The operation and design of such important circuits as switched-capacitor filters, analog-to-digital and digital-to-analog converters, amplifiers, modulators, and oscillators. Practical problems encountered in design are discussed, solutions are provided, and some examples of actual system applications are given.

  9. The analysis and design of linear circuits

    CERN Document Server

    Thomas, Roland E; Toussaint, Gregory J

    2009-01-01

    The Analysis and Design of Linear Circuits, 6e gives the reader the opportunity to not only analyze, but also design and evaluate linear circuits as early as possible. The text's abundance of problems, applications, pedagogical tools, and realistic examples helps engineers develop the skills needed to solve problems, design practical alternatives, and choose the best design from several competing solutions. Engineers searching for an accessible introduction to resistance circuits will benefit from this book that emphasizes the early development of engineering judgment.

  10. Inexact Subgraph Matching for Digital Circuit Analysis

    Science.gov (United States)

    2017-03-01

    circuit graph perspective. As a result, attempting to locate library structures within the larger circuit context via static analysis becomes an...e.g. imaging, biology, and large data set feature analysis ), however, and practical applications of it have been studied for some time. Many of...Digital Circuit Analysis Whitney Batchelor, Frederic Tuttle, Stephen Baka, Scott Harper Secure Computing & Communications Division MacAulay-Brown

  11. Single Event Transients in Linear Integrated Circuits

    Science.gov (United States)

    Buchner, Stephen; McMorrow, Dale

    2005-01-01

    On November 5, 2001, a processor reset occurred on board the Microwave Anisotropy Probe (MAP), a NASA mission to measure the anisotropy of the microwave radiation left over from the Big Bang. The reset caused the spacecraft to enter a safehold mode from which it took several days to recover. Were that to happen regularly, the entire mission would be compromised, so it was important to find the cause of the reset and, if possible, to mitigate it. NASA assembled a team of engineers that included experts in radiation effects to tackle the problem. The first clue was the observation that the processor reset occurred during a solar event characterized by large increases in the proton and heavy ion fluxes emitted by the sun. To the radiation effects engineers on the team, this strongly suggested that particle radiation might be the culprit, particularly when it was discovered that the reset circuit contained three voltage comparators (LM139). Previous testing revealed that large voltage transients, or glitches appeared at the output of the LM139 when it was exposed to a beam of heavy ions [NI96]. The function of the reset circuit was to monitor the supply voltage and to issue a reset command to the processor should the voltage fall below a reference of 2.5 V [PO02]. Eventually, the team of engineers concluded that ionizing particle radiation from the solar event produced a negative voltage transient on the output of one of the LM139s sufficiently large to reset the processor on MAP. Fortunately, as of the end of 2004, only two such resets have occurred. The reset on MAP was not the first malfunction on a spacecraft attributed to a transient. That occurred shortly after the launch of NASA s TOPEX/Poseidon satellite in 1992. It was suspected, and later confirmed, that an anomaly in the Earth Sensor was caused by a transient in an operational amplifier (OP-15) [KO93]. Over the next few years, problems on TDRS, CASSINI, [PR02] SOHO [HA99,HA01] and TERRA were also attributed

  12. Aircraft Age-Related Degradation Study on Single- and Three-Phase Circuit Breakers

    National Research Council Canada - National Science Library

    Peterson, Ronnie

    2002-01-01

    This report provides technical data and brief observations generated for a controlled series of tests on circuit breakers removed from an aging Boeing 727-232 and a McDonnell Douglas DC-10 aircraft...

  13. High temperature superconducting digital circuits and subsystems

    Energy Technology Data Exchange (ETDEWEB)

    Martens, J.S.; Pance, A.; Whiteley, S.R.; Char, K.; Johansson, M.F.; Lee, L. [Conductus, Sunnyvale, CA (United States); Hietala, V.M.; Wendt, J.R. [Sandia National Labs., Albuquerque, NM (United States); Hou, S.Y.; Phillips, J. [AT and T Bell Labs., Murray Hill, NJ (United States)

    1993-10-01

    The advances in the fabrication of high temperature superconducting devices have enabled the demonstration of high performance and useful digital circuits and subsystems. The yield and uniformity of the devices is sufficient for circuit fabrication at the medium scale integration (MSI) level with performance not seen before at 77 K. The circuits demonstrated to date include simple gates, counters, analog to digital converters, and shift registers. All of these are mid-sized building blocks for potential applications in commercial and military systems. The processes used for these circuits and blocks will be discussed along with observed performance data.

  14. Ways to Optimize Analogue Switched Circuits

    Directory of Open Access Journals (Sweden)

    J. Hospodka

    2008-12-01

    Full Text Available This paper describes how analogue switched circuits (switched-capacitor and switched-current circuits can be optimized by means of a personal computer. The optimization of this kind of circuits is not so common and their analysis is more difficult in comparison with continuously working circuits. Firstly, the nonidealities occurring in these circuits whose effect on their characteristics should be optimized are discussed. Then a few ways to analyze analogue switched circuits are shown. From all optimization algorithms applicable for this kind of optimization, two ones that seem to be the most promising are proposed. The differential evolution (one of evolutionary algorithms combined with the simplex method was found to be most appropriate from these two ones. Two types of programs are required for the optimization of these circuits: a program for implementing calculations of the used optimization algorithm and a program for the analysis of the optimized circuit. Several suitable computer programs from both of the groups together with their proper settings according to authors’ experience are proposed. At the end of the paper, an example of a switched-current circuit optimization documenting the previous description is presented.

  15. Electric circuit theory applied electricity and electronics

    CERN Document Server

    Yorke, R

    1981-01-01

    Electric Circuit Theory provides a concise coverage of the framework of electrical engineering. Comprised of six chapters, this book emphasizes the physical process of electrical engineering rather than abstract mathematics. Chapter 1 deals with files, circuits, and parameters, while Chapter 2 covers the natural and forced response of simple circuit. Chapter 3 talks about the sinusoidal steady state, and Chapter 4 discusses the circuit analysis. The fifth chapter tackles frequency response of networks, and the last chapter covers polyphase systems. This book will be of great help to electrical

  16. Circuit complexity in quantum field theory

    Science.gov (United States)

    Jefferson, Robert A.; Myers, Robert C.

    2017-10-01

    Motivated by recent studies of holographic complexity, we examine the question of circuit complexity in quantum field theory. We provide a quantum circuit model for the preparation of Gaussian states, in particular the ground state, in a free scalar field theory for general dimensions. Applying the geometric approach of Nielsen to this quantum circuit model, the complexity of the state becomes the length of the shortest geodesic in the space of circuits. We compare the complexity of the ground state of the free scalar field to the analogous results from holographic complexity, and find some surprising similarities.

  17. Circuit For Control Of Electromechanical Prosthetic Hand

    Science.gov (United States)

    Bozeman, Richard J., Jr.

    1995-01-01

    Proposed circuit for control of electromechanical prosthetic hand derives electrical control signals from shoulder movements. Updated, electronic version of prosthesis, that includes two hooklike fingers actuated via cables from shoulder harness. Circuit built around favored shoulder harness, provides more dexterous movement, without incurring complexity of computer-controlled "bionic" or hydraulically actuated devices. Additional harness and potentiometer connected to similar control circuit mounted on other shoulder. Used to control stepping motor rotating hand about prosthetic wrist to one of number of angles consistent with number of digital outputs. Finger-control signals developed by circuit connected to first shoulder harness transmitted to prosthetic hand via sliprings at prosthetic wrist joint.

  18. Analog circuit design art, science, and personalities

    CERN Document Server

    Williams, Jim

    1991-01-01

    Analog Circuit Design: Art, Science, and Personalities discusses the many approaches and styles in the practice of analog circuit design. The book is written in an informal yet informative manner, making it easily understandable to those new in the field. The selection covers the definition, history, current practice, and future direction of analog design; the practice proper; and the styles in analog circuit design. The book also includes the problems usually encountered in analog circuit design; approach to feedback loop design; and other different techniques and applications. The text is

  19. Hybrid stretchable circuits on silicone substrate

    Energy Technology Data Exchange (ETDEWEB)

    Robinson, A., E-mail: adam.1.robinson@nokia.com; Aziz, A., E-mail: a.aziz1@lancaster.ac.uk [Nanoscience Centre, University of Cambridge, Cambridge CB01FF (United Kingdom); Liu, Q.; Suo, Z. [School of Engineering and Applied Sciences and Kavli Institute for Bionano Science and Technology, Harvard University, Cambridge, Massachusetts 02138 (United States); Lacour, S. P., E-mail: stephanie.lacour@epfl.ch [Centre for Neuroprosthetics and Laboratory for Soft Bioelectronics Interfaces, School of Engineering, Ecole Polytechnique Fédérale de Lausanne, Lausanne 1015 (Switzerland)

    2014-04-14

    When rigid and stretchable components are integrated onto a single elastic carrier substrate, large strain heterogeneities appear in the vicinity of the deformable-non-deformable interfaces. In this paper, we report on a generic approach to manufacture hybrid stretchable circuits where commercial electronic components can be mounted on a stretchable circuit board. Similar to printed circuit board development, the components are electrically bonded on the elastic substrate and interconnected with stretchable electrical traces. The substrate—a silicone matrix carrying concentric rigid disks—ensures both the circuit elasticity and the mechanical integrity of the most fragile materials.

  20. Cell-free extract based optimization of biomolecular circuits with droplet microfluidics.

    Science.gov (United States)

    Hori, Yutaka; Kantak, Chaitanya; Murray, Richard M; Abate, Adam R

    2017-09-12

    Engineering an efficient biomolecular circuit often requires time-consuming iterations of optimization. Cell-free protein expression systems allow rapid testing of biocircuits in vitro, speeding the design-build-test cycle of synthetic biology. In this paper, we combine this with droplet microfluidics to densely scan a transcription-translation biocircuit space. Our system assays millions of parameter combinations per hour, providing a detailed map of function. The ability to comprehensively map biocircuit parameter spaces allows accurate modeling to predict circuit function and identify optimal circuits and conditions.

  1. Automated hierarchical testable design of digital circuits

    Science.gov (United States)

    Kraak, M.

    1993-03-01

    The thesis gives an overview of approaches dealing with the selection of test strategies and methods for digital circuits and the incorporation of test in designs. A review is provided of existing testability analyzers. A new way to analyze testability at three hierarchical levels of abstraction is presented. It is shown how this approach is contained in an expert system rule-base called TRI Stage Testability Analysis (TRISTAN). The paper then deals with testability synthesis. It is shown that a new synthesis method had to be devised to be able to hierarchically select test strategies and methods. The testability synthesizer is also contained in a rule-base, called Intelligent Synthesis of Testable Designs (ISOLDE). TRISTAN and ISOLDE are parts of an expert system called WAGNER. The knowledge processor for WAGNER is covered, presenting its knowledge representation scheme, knowledge acquisition and inference mechanism. Results of experiments done with WAGNER on board and chip level designs are given. Conclusive remarks provide an outlook to continued research.

  2. Scaling of graphene integrated circuits.

    Science.gov (United States)

    Bianchi, Massimiliano; Guerriero, Erica; Fiocco, Marco; Alberti, Ruggero; Polloni, Laura; Behnam, Ashkan; Carrion, Enrique A; Pop, Eric; Sordan, Roman

    2015-05-07

    The influence of transistor size reduction (scaling) on the speed of realistic multi-stage integrated circuits (ICs) represents the main performance metric of a given transistor technology. Despite extensive interest in graphene electronics, scaling efforts have so far focused on individual transistors rather than multi-stage ICs. Here we study the scaling of graphene ICs based on transistors from 3.3 to 0.5 μm gate lengths and with different channel widths, access lengths, and lead thicknesses. The shortest gate delay of 31 ps per stage was obtained in sub-micron graphene ROs oscillating at 4.3 GHz, which is the highest oscillation frequency obtained in any strictly low-dimensional material to date. We also derived the fundamental Johnson limit, showing that scaled graphene ICs could be used at high frequencies in applications with small voltage swing.

  3. TIME CALIBRATED OSCILLOSCOPE SWEEP CIRCUIT

    Science.gov (United States)

    Smith, V.L.; Carstensen, H.K.

    1959-11-24

    An improved time calibrated sweep circuit is presented, which extends the range of usefulness of conventional oscilloscopes as utilized for time calibrated display applications in accordance with U. S. Patent No. 2,832,002. Principal novelty resides in the provision of a pair of separate signal paths, each of which is phase and amplitude adjustable, to connect a high-frequency calibration oscillator to the output of a sawtooth generator also connected to the respective horizontal deflection plates of an oscilloscope cathode ray tube. The amplitude and phase of the calibration oscillator signals in the two signal paths are adjusted to balance out feedthrough currents capacitively coupled at high frequencies of the calibration oscillator from each horizontal deflection plate to the vertical plates of the cathode ray tube.

  4. Coulomb drag in quantum circuits.

    Science.gov (United States)

    Levchenko, Alex; Kamenev, Alex

    2008-11-21

    We study the drag effect in a system of two electrically isolated quantum point contacts, coupled by Coulomb interactions. Drag current exhibits maxima as a function of quantum point contacts gate voltages when the latter are tuned to the transitions between quantized conductance plateaus. In the linear regime this behavior is due to enhanced electron-hole asymmetry near an opening of a new conductance channel. In the nonlinear regime the drag current is proportional to the shot noise of the driving circuit, suggesting that the Coulomb drag experiments may be a convenient way to measure the quantum shot noise. Remarkably, the transition to the nonlinear regime may occur at driving voltages substantially smaller than the temperature.

  5. Optimizing Performance of SABC Comminution Circuit of the Wushan Porphyry Copper Mine—A Practical Approach

    Directory of Open Access Journals (Sweden)

    Wei Zhang

    2016-12-01

    Full Text Available This research is focused on the Phase I SABC milling circuit of the Wushan porphyry copper mine. Improvements to the existing circuit were targeted without any significant alterations to existing equipment or the SABC circuit. JKSimMet simulations were used to test various operating and design conditions to improve the comminution process. Modifications to the SABC comminution circuit included an increase in the SAG mill ball charge from 8% to 10% v/v; an increase in the mill ball charge from 23% v/v to 27% v/v; an increase in the maximum operating power draw in the ball mill to 5800 kW; the replacement of the HP Series pebble crusher with a TC84 crusher; and the addition of a pebble bin. Following these improvements, an increase in circuit throughput, a reduction in energy consumption, and an increase in profitability were obtained.

  6. Continuous renal replacement therapy (CRRT) in patients with liver disease: is circuit life different?

    Science.gov (United States)

    Agarwal, Banwari; Shaw, Steve; Shankar Hari, Manu; Burroughs, Andrew K; Davenport, Andrew

    2009-09-01

    Clotting of haemofiltration circuits is a major complication of continuous renal replacement therapies (CRRT), yet systemic anticoagulation risks haemorrhage. Traditionally, patients with liver failure are managed with no or minimal anticoagulation, because of abnormal clotting tests and the perceived, increased bleeding risk. We retrospectively reviewed CRRT circuit life in 50 patients; 3 groups of liver failure patients treated with CRRT (acute liver failure (ALF), acute on chronic liver disease (ACLD) and post-elective liver transplantation (LTx)), with two control groups; systemic sepsis (SS) and haematological malignancy (Haem). CCRT circuit life was significantly greater in the Haem group, compared to the others; 24.3+/-23.9h, vs. 11+/-10.5 ALF, 11.6+/-6.6 ACLF, 7.4+/-5.1 LTx and 9.2+/-6.5 SS, pCRRT circuit survival without an obvious increase in bleeding or blood transfusion requirement. Thus anticoagulation should be considered in these patients with repeated circuit clotting.

  7. Characterization of the voltage control systems and speed of a synchronous machine of high power for short circuit testing; Caracterizacion de los sistemas de control de voltaje y velocidad de una maquina sincrona de alta potencia para pruebas de corto circuito

    Energy Technology Data Exchange (ETDEWEB)

    Segura Ozuna, Victor Octavio; Hernandez Rodriguez, Isaura Victoria; Alcaide Godinez, Indira Xochiquetzal; Garduno Ramirez, Raul; Montero Cervantes, Julio Cesar [Instituto de Investigaciones Electricas, Cuernavaca, Morelos (Mexico); Ruiz Rodriguez, Genaro; Martinez Torres; Ricardo [CFE-LAPEM, Irapuato, Guanajuato (Mexico)

    2012-07-01

    This paper introduces a characterization of the behavior of the speed and voltage control systems of a special purpose synchronous machine (GCC) based on measuring and monitoring physical signals, and recording of the sampled waveforms. Basically, the GCC supplies the energy to perform high-power short-circuits tests to certify electrical equipment and components, as required by the Comision Federal de Electricidad (CFE) in Mexico. The GCC operates alternately as motor and generator. With the GCC operating as motor, speed control during startup, acceleration, re-acceleration and braking is carried out by a static frequency converter (SFC). Complementary, the voltage controller manipulates excitation power to control terminal voltage when the GCC operates as generator and regulates excitation current when the GCC operates as motor. Compared to conventional voltage regulation systems, which must go off in case of short-circuit, the GCC voltage regulator must keep controlling field excitation to maintain the required line current and terminal voltage during short-circuit tests. Monitoring of physical signals was carried out with a portable data acquisition system based on SCXI and PXI digital platforms. A total of 78 signals were monitored with a 6 kHz sampling rate that was enough to obtain detailed signal waveforms. Data captured was processed and plotted for analysis. The signal graphs show the current real behavior of both, the voltage control system and the speed control system, and constitute a precise characterization of their behavior. [Spanish] Este documento presenta una caracterizacion del comportamiento de los sistemas de control de velocidad y voltaje de una maquina sincrona de proposito especial (GCC) basada en la medicion y monitoreo de senales fisicas, asi como en el registro de las formas de onda muestreadas. Basicamente, la GCC suministra la energia para efectuar pruebas de corto circuito de alta potencia para certificar equipo y componentes

  8. Short circuit in deep brain stimulation.

    Science.gov (United States)

    Samura, Kazuhiro; Miyagi, Yasushi; Okamoto, Tsuyoshi; Hayami, Takehito; Kishimoto, Junji; Katano, Mitsuo; Kamikaseda, Kazufumi

    2012-11-01

    The authors undertook this study to investigate the incidence, cause, and clinical influence of short circuits in patients treated with deep brain stimulation (DBS). After the incidental identification of a short circuit during routine follow-up, the authors initiated a policy at their institution of routinely evaluating both therapeutic impedance and system impendence at every outpatient DBS follow-up visit, irrespective of the presence of symptoms suggesting possible system malfunction. This study represents a report of their findings after 1 year of this policy. Implanted DBS leads exhibiting short circuits were identified in 7 patients (8.9% of the patients seen for outpatient follow-up examinations during the 12-month study period). The mean duration from DBS lead implantation to the discovery of the short circuit was 64.7 months. The symptoms revealing short circuits included the wearing off of therapeutic effect, apraxia of eyelid opening, or dysarthria in 6 patients with Parkinson disease (PD), and dystonia deterioration in 1 patient with generalized dystonia. All DBS leads with short circuits had been anchored to the cranium using titanium miniplates. Altering electrode settings resulted in clinical improvement in the 2 PD cases in which patients had specific symptoms of short circuits (2.5%) but not in the other 4 cases. The patient with dystonia underwent repositioning and replacement of a lead because the previous lead was located too anteriorly, but did not experience symptom improvement. In contrast to the sudden loss of clinical efficacy of DBS caused by an open circuit, short circuits may arise due to a gradual decrease in impedance, causing the insidious development of neurological symptoms via limited or extended potential fields as well as shortened battery longevity. The incidence of short circuits in DBS may be higher than previously thought, especially in cases in which DBS leads are anchored with miniplates. The circuit impedance of DBS

  9. 30 CFR 75.518 - Electric equipment and circuits; overload and short circuit protection.

    Science.gov (United States)

    2010-07-01

    ... electric equipment and circuits against short circuit and overloads. Three-phase motors on all electric equipment shall be provided with overload protection that will deenergize all three phases in the event that... 30 Mineral Resources 1 2010-07-01 2010-07-01 false Electric equipment and circuits; overload and...

  10. Design of an improved RCD buffer circuit for full bridge circuit

    Science.gov (United States)

    Yang, Wenyan; Wei, Xueye; Du, Yongbo; Hu, Liang; Zhang, Liwei; Zhang, Ou

    2017-05-01

    In the full bridge inverter circuit, when the switch tube suddenly opened or closed, the inductor current changes rapidly. Due to the existence of parasitic inductance of the main circuit. Therefore, the surge voltage between drain and source of the switch tube can be generated, which will have an impact on the switch and the output voltage. In order to ab sorb the surge voltage. An improve RCD buffer circuit is proposed in the paper. The peak energy will be absorbed through the buffer capacitor of the circuit. The part energy feedback to the power supply, another part release through the resistor in the form of heat, and the circuit can absorb the voltage spikes. This paper analyzes the process of the improved RCD snubber circuit, According to the specific parameters of the main circuit, a reasonable formula for calculating the resistance capacitance is given. A simulation model will be modulated in Multisim, which compared the waveform of tube voltage and the output waveform of the circuit without snubber circuit with the improved RCD snubber circuit. By comparing and analyzing, it is proved that the improved buffer circuit can absorb surge voltage. Finally, experiments are demonstrated to validate that the correctness of the RC formula and the improved RCD snubber circuit.

  11. Recent advances in silicon photonic integrated circuits

    Science.gov (United States)

    Bowers, John E.; Komljenovic, Tin; Davenport, Michael; Hulme, Jared; Liu, Alan Y.; Santis, Christos T.; Spott, Alexander; Srinivasan, Sudharsanan; Stanton, Eric J.; Zhang, Chong

    2016-02-01

    We review recent breakthroughs in silicon photonics technology and components and describe progress in silicon photonic integrated circuits. Heterogeneous silicon photonics has recently demonstrated performance that significantly outperforms native III-V components. The impact active silicon photonic integrated circuits could have on interconnects, telecommunications, sensors and silicon electronics is reviewed.

  12. CLASSICS Invention of the Integrated Circuit

    Indian Academy of Sciences (India)

    IAS Admin

    electrical functions being connected directly by cutting out areas of the various layers.” This remarkable ... In 1947 I graduated from the University of Illinois with a degree in electrical engineering. I was hired by A. S. .... first circuit attempted was a phase-shift oscillator, a favorite demonstration vehicle for linear circuits at that ...

  13. Approximability of Minimum AND-Circuits

    NARCIS (Netherlands)

    Arpe, J.; Manthey, Bodo

    Given a set of monomials, the {\\sc Minimum AND-Circuit} problem asks for a circuit that computes these monomials using AND-gates of fan-in two and being of minimum size. We prove that the problem is not polynomial-time approximable within a factor of less than 1.0051 unless {\\sc P = NP}, even if the

  14. Textbook Error: Short Circuiting on Electrochemical Cell

    Science.gov (United States)

    Bonicamp, Judith M.; Clark, Roy W.

    2007-01-01

    Short circuiting an electrochemical cell is an unreported but persistent error in the electrochemistry textbooks. It is suggested that diagrams depicting a cell delivering usable current to a load be postponed, the theory of open-circuit galvanic cells is explained, the voltages from the tables of standard reduction potentials is calculated and…

  15. Automatic design of digital synthetic gene circuits.

    Directory of Open Access Journals (Sweden)

    Mario A Marchisio

    2011-02-01

    Full Text Available De novo computational design of synthetic gene circuits that achieve well-defined target functions is a hard task. Existing, brute-force approaches run optimization algorithms on the structure and on the kinetic parameter values of the network. However, more direct rational methods for automatic circuit design are lacking. Focusing on digital synthetic gene circuits, we developed a methodology and a corresponding tool for in silico automatic design. For a given truth table that specifies a circuit's input-output relations, our algorithm generates and ranks several possible circuit schemes without the need for any optimization. Logic behavior is reproduced by the action of regulatory factors and chemicals on the promoters and on the ribosome binding sites of biological Boolean gates. Simulations of circuits with up to four inputs show a faithful and unequivocal truth table representation, even under parametric perturbations and stochastic noise. A comparison with already implemented circuits, in addition, reveals the potential for simpler designs with the same function. Therefore, we expect the method to help both in devising new circuits and in simplifying existing solutions.

  16. RF Circuit Design in Nanometer CMOS

    NARCIS (Netherlands)

    Nauta, Bram

    2007-01-01

    With CMOS technology entering the nanometer regime, the design of analog and RF circuits is complicated by low supply voltages, very non-linear (and nonquadratic) devices and large 1/f noise. At the same time, circuits are required to operate over increasingly wide bandwidths to implement modern

  17. Hyperchaotic circuit with damped harmonic oscillators

    DEFF Research Database (Denmark)

    Lindberg, Erik; Murali, K.; Tamasevicius, A.

    2001-01-01

    A simple fourth-order hyperchaotic circuit with damped harmonic oscillators is described. ANP3 and PSpice simulations including an eigenvalue study of the linearized Jacobian are presented together with a hardware implementation. The circuit contains two inductors with series resistance, two ideal...

  18. Understanding the Behaviour of Infinite Ladder Circuits

    Science.gov (United States)

    Ucak, C.; Yegin, K.

    2008-01-01

    Infinite ladder circuits are often encountered in undergraduate electrical engineering and physics curricula when dealing with series and parallel combination of impedances, as a part of filter design or wave propagation on transmission lines. The input impedance of such infinite ladder circuits is derived by assuming that the input impedance does…

  19. DEVICES FOR COOLING ELECTRONIC CIRCUIT BOARDS

    Directory of Open Access Journals (Sweden)

    T. A. Ismailov

    2014-01-01

    Full Text Available In the work described structural variants of devices for cooling electronic circuit boards, made on the basis of thermoelectric batteries and consumable working substances, implementing uneven process of removing heat from heat-generating components. A comparison of temperature fields of electronic circuit simulator with his uniform and non-uniform cooling. 

  20. Circuit prevents overcharging of secondary cell batteries

    Science.gov (United States)

    Hennigan, T. J.; Potter, N. H.; Sizemore, K. O.

    1966-01-01

    Circuit prevents battery cell overcharging by detecting and reducing the charging voltage to the open-circuit voltage of the battery when this current falls to a predetermined value. The voltage control depends on the fact that the charging current falls significantly when the battery nears its fully charged state.

  1. 47 CFR 32.2232 - Circuit equipment.

    Science.gov (United States)

    2010-10-01

    ... 47 Telecommunication 2 2010-10-01 2010-10-01 false Circuit equipment. 32.2232 Section 32.2232... FOR TELECOMMUNICATIONS COMPANIES Instructions for Balance Sheet Accounts § 32.2232 Circuit equipment. (a) This account shall include the original cost of equipment which is used to reduce the number of...

  2. Dissipative in quantum mesoscopic RLC circuits

    Directory of Open Access Journals (Sweden)

    H Pahlavani

    2010-06-01

    Full Text Available The quantum theory for a mesoscopic electric circuit with charge discreteness is investigated. Taking the Caldirola-Kanai Hamiltonian in studding quantum mechanics of dissipative systems, we obtain the persistent current and the energy spectrum of a damped quantum LC-design mesoscopic circuit under the influence of a time-dependent external field.

  3. Circuits in the Sun: Solar Panel Physics

    Science.gov (United States)

    Gfroerer, Tim

    2013-01-01

    Typical commercial solar panels consist of approximately 60 individual photovoltaic cells connected in series. Since the usual Kirchhoff rules apply, the current is uniform throughout the circuit, while the electric potential of the individual devices is cumulative. Hence, a solar panel is a good analog of a simple resistive series circuit, except…

  4. Hacking DNA copy number for circuit engineering.

    Science.gov (United States)

    Wu, Feilun; You, Lingchong

    2017-07-27

    DNA copy number represents an essential parameter in the dynamics of synthetic gene circuits but typically is not explicitly considered. A new study demonstrates how dynamic control of DNA copy number can serve as an effective strategy to program robust oscillations in gene expression circuits.

  5. Active components for integrated plasmonic circuits

    DEFF Research Database (Denmark)

    Krasavin, A.V.; Bolger, P.M.; Zayats, A.V.

    2009-01-01

    We present a comprehensive study of highly efficient and compact passive and active components for integrated plasmonic circuit based on dielectric-loaded surface plasmon polariton waveguides.......We present a comprehensive study of highly efficient and compact passive and active components for integrated plasmonic circuit based on dielectric-loaded surface plasmon polariton waveguides....

  6. IMPORTANT NOTICE: Cancellation of shuttle Circuit 3

    CERN Document Server

    2013-01-01

    Circuit 3 of the CERN Shuttle Service (Point 5), which has served CMS since the start of LS1, will be cancelled with effect from Tuesday 16 April. This decision has been taken in consultation with CMS, as the circuit was seldom used.   In response to increasing demand for Circuit 1 - Meyrin and feedback from passengers, the two Circuit 3 journeys will be switched to Circuit 1 – Meyrin (see new timetable below): Mornings: Four journeys instead of three. Circuit 1 now starts at 8:10 (instead of 8:19 a.m.) and runs until 9:27 a.m. (instead of 9:16 a.m.). Lunchtimes: Five journeys in place between 12:10 p.m. and 1:47 p.m. Evenings: Circuit starts at 5:23 p.m. (instead of 5:03 p.m.) and ends at 6:20 p.m. at Building 33. Please note that the circuit will depart from Building 13 instead of Building 33.  

  7. Worst Asymmetrical Short-Circuit Current

    DEFF Research Database (Denmark)

    Arana Aristi, Iván; Holmstrøm, O; Grastrup, L

    2010-01-01

    In a typical power plant, the production scenario and the short-circuit time were found for the worst asymmetrical short-circuit current. Then, a sensitivity analysis on the missing generator values was realized in order to minimize the uncertainty of the results. Afterward the worst asymmetrical...

  8. Piezoelectric pump and pressurised circuit provided therewith

    NARCIS (Netherlands)

    Van Es, Johannes; Wits, Wessel Willems

    2015-01-01

    A piezoelectric pump for use in a pressurised circuit is provided, comprising a pump chamber (5) with an inlet (6) provided with a one way inlet valve (7), for connection to a feeding line (8) of the pressurised circuit and an outlet (9) provided with a one way outlet valve (10), for connection to a

  9. Two New Families of Floating FDNR Circuits

    Directory of Open Access Journals (Sweden)

    Ahmed M. Soliman

    2010-01-01

    Full Text Available Two new configurations for realizing ideal floating frequency-dependent negative resistor elements (FDNR are introduced. The proposed circuits are symmetrical and are realizable by four CCII or ICCII or a combination of both. Each configuration is realizable by eight different circuits. Simulation results are included to support the theory.

  10. Design of drive circuit of laser diode

    Science.gov (United States)

    Ran, Yingying; Huang, Xuegong; Xu, Xiaobin

    2016-10-01

    Aiming at the difficult problem of high precision frequency stabilization of semiconductor laser diode, the laser frequency control is realized through the design of the semiconductor drive system. Above all, the relationship between the emission frequency and the temperature of LD is derived theoretically. Then the temperature corresponding to the stable frequency is obtained. According to the desired temperature stability of LD, temperature control system is designed, which is composed of a temperature setting circuit, temperature gathering circuit, the temperature display circuit, analog PID control circuit and a semiconductor refrigerator control circuit module. By sampling technology, voltage of platinum resistance is acquired, and the converted temperature is display on liquid crystal display. PID analog control circuit controls speed stability and precision of temperature control. The constant current source circuit is designed to provide the reference voltage by a voltage stabilizing chip, which is buffered by an operational amplifier. It is connected with the MOSFET to drive the semiconductor laser to provide stable current for the semiconductor laser. PCB circuit board was finished and the experimental was justified. The experimental results show that: the design of the temperature control system could achieve the goal of temperature monitoring. Meanwhile, temperature can be stabilized at 40°C +/- 0.1°C. The output voltage of the constant current source is 2 V. The current is 35 mA.

  11. Sustainability issues in circuit board recycling

    DEFF Research Database (Denmark)

    Legarth, Jens Brøbech; Alting, Leo; Baldo, Gian Luca

    1995-01-01

    The resource recovery and environmental impact issues of printed circuit board recycling by secondary copper smelters are discussed. Guidelines concerning material selection for circuit board manufacture and concerning the recycling processes are given to enhance recovery efficiency and to lower...... the impacts on the external environment from recycling...

  12. Finding all elementary circuits exploiting transconductance

    NARCIS (Netherlands)

    Klumperink, Eric A.M.; Bruccoleri, F.; Nauta, Bram

    2001-01-01

    Commonly used elementary circuits like single-transistor amplifier stages, the differential pair, and current mirrors basically exploit the transconductance property of transistors. This paper aims at finding all elementary transconductance-based circuits. For this purpose, all graphs of two-port

  13. Electronic circuit realization of the logistic map

    Indian Academy of Sciences (India)

    Abstract. An electronic circuit realization of the logistic difference equation is presented using analog electronics. The behaviour of the realized system is evalu- ated against computer simulations of the same. The circuit is found to exhibit the entire range of dynamics of the logistic equation: fixed points, periodicity, period.

  14. Performance of the Main Dipole Magnet Circuits of the LHC during Commissioning

    CERN Document Server

    Verweij, A; Ballarino, A; Bellesia, B; Bordry, Frederick; Cantone, A; Casas Lino, M; Castaneda Serra, A; Castillo Trello, C; Catalan-Lasheras, N; Charifoulline, Z; Coelingh, G; Dahlerup-Petersen, K; D'Angelo, G; Denz, R; Fehér, S; Flora, R; Gruwé, M; Kain, V; Khomenko, B; Kirby, G; MacPherson, A; Marqueta Barbero, A; Mess, K H; Modena, M; Mompo, R; Montabonnet, V; le Naour, S; Nisbet, D; Parma, V; Pojer, M; Ponce, L; Raimondo, A; Redaelli, S; Reymond, H; Richter, D; de Rijk, G; Rijllart, A; Romera Ramirez, I; Saban, R; Sanfilippo, S; Schmidt, R; Siemko, A; Solfaroli Camillocci, M; Thurel, Y; Thiessen, H; Venturini-Delsolaro, W; Vergara Fernandez, A; Wolf, R; Zerlauth, M

    2008-01-01

    During hardware commissioning of the Large Hadron Collider (LHC), 8 main dipole circuits are tested at 1.9 K and up to their nominal current. Each dipole circuit contains 154 magnets of 15 m length, and has a total stored energy of up to 1.3 GJ. All magnets are wound from Nb-Ti superconducting Rutherford cables, and contain heaters to quickly force the transition to the normal conducting state in case of a quench, and hence reduce the hot spot temperature. In this paper the performance of the first three of these circuits is presented, focussing on quench detection, heater performance, operation of the cold bypass diodes, and magnet-to-magnet quench propagation. The results as measured on the entire circuits will be compared to the test results obtained during the reception tests of the individual magnets.

  15. Short-Circuit Robustness Assessment in Power Electronic Modules for Megawatt Applications

    DEFF Research Database (Denmark)

    Iannuzzo, Francesco

    2016-01-01

    In this paper, threats and opportunities in testing of megawatt power electronic modules under short circuit are presented and discussed, together with the introduction of some basic principles of non-destructive testing, a key technique to allow post-failure analysis. The non-destructive testing...... silicon carbide – and new concepts for nondestructive testing of ultrafast power modules adopting such a technology....

  16. A Parallel Genetic Algorithm for Automated Electronic Circuit Design

    Science.gov (United States)

    Long, Jason D.; Colombano, Silvano P.; Haith, Gary L.; Stassinopoulos, Dimitris

    2000-01-01

    Parallelized versions of genetic algorithms (GAs) are popular primarily for three reasons: the GA is an inherently parallel algorithm, typical GA applications are very compute intensive, and powerful computing platforms, especially Beowulf-style computing clusters, are becoming more affordable and easier to implement. In addition, the low communication bandwidth required allows the use of inexpensive networking hardware such as standard office ethernet. In this paper we describe a parallel GA and its use in automated high-level circuit design. Genetic algorithms are a type of trial-and-error search technique that are guided by principles of Darwinian evolution. Just as the genetic material of two living organisms can intermix to produce offspring that are better adapted to their environment, GAs expose genetic material, frequently strings of 1s and Os, to the forces of artificial evolution: selection, mutation, recombination, etc. GAs start with a pool of randomly-generated candidate solutions which are then tested and scored with respect to their utility. Solutions are then bred by probabilistically selecting high quality parents and recombining their genetic representations to produce offspring solutions. Offspring are typically subjected to a small amount of random mutation. After a pool of offspring is produced, this process iterates until a satisfactory solution is found or an iteration limit is reached. Genetic algorithms have been applied to a wide variety of problems in many fields, including chemistry, biology, and many engineering disciplines. There are many styles of parallelism used in implementing parallel GAs. One such method is called the master-slave or processor farm approach. In this technique, slave nodes are used solely to compute fitness evaluations (the most time consuming part). The master processor collects fitness scores from the nodes and performs the genetic operators (selection, reproduction, variation, etc.). Because of dependency

  17. Spin-Circuit Representation of Spin Pumping

    Science.gov (United States)

    Roy, Kuntal

    2017-07-01

    Circuit theory has been tremendously successful in translating physical equations into circuit elements in an organized form for further analysis and proposing creative designs for applications. With the advent of new materials and phenomena in the field of spintronics and nanomagnetics, it is imperative to construct the spin-circuit representations for different materials and phenomena. Spin pumping is a phenomenon by which a pure spin current can be injected into the adjacent layers. If the adjacent layer is a material with a high spin-orbit coupling, a considerable amount of charge voltage can be generated via the inverse spin Hall effect allowing spin detection. Here we develop the spin-circuit representation of spin pumping. We then combine it with the spin-circuit representation for the materials having spin Hall effect to show that it reproduces the standard results as in the literature. We further show how complex multilayers can be analyzed by simply writing a netlist.

  18. Designing Novel Quaternary Quantum Reversible Subtractor Circuits

    Science.gov (United States)

    Haghparast, Majid; Monfared, Asma Taheri

    2018-01-01

    Reversible logic synthesis is an important area of current research because of its ability to reduce energy dissipation. In recent years, multiple valued logic has received great attention due to its ability to reduce the width of the reversible circuit which is a main requirement in quantum technology. Subtractor circuits are between major components used in quantum computers. In this paper, we will discuss the design of a quaternary quantum reversible half subtractor circuit using quaternary 1-qudit, 2-qudit Muthukrishnan-Stroud and 3-qudit controlled gates and a 2-qudit Generalized quaternary gate. Then a design of a quaternary quantum reversible full subtractor circuit based on the quaternary half subtractor will be presenting. The designs shall then be evaluated in terms of quantum cost, constant input, garbage output, and hardware complexity. The proposed quaternary quantum reversible circuits are the first attempt in the designing of the aforementioned subtractor.

  19. Designing Novel Quaternary Quantum Reversible Subtractor Circuits

    Science.gov (United States)

    Haghparast, Majid; Monfared, Asma Taheri

    2017-10-01

    Reversible logic synthesis is an important area of current research because of its ability to reduce energy dissipation. In recent years, multiple valued logic has received great attention due to its ability to reduce the width of the reversible circuit which is a main requirement in quantum technology. Subtractor circuits are between major components used in quantum computers. In this paper, we will discuss the design of a quaternary quantum reversible half subtractor circuit using quaternary 1-qudit, 2-qudit Muthukrishnan-Stroud and 3-qudit controlled gates and a 2-qudit Generalized quaternary gate. Then a design of a quaternary quantum reversible full subtractor circuit based on the quaternary half subtractor will be presenting. The designs shall then be evaluated in terms of quantum cost, constant input, garbage output, and hardware complexity. The proposed quaternary quantum reversible circuits are the first attempt in the designing of the aforementioned subtractor.

  20. Progress in organic integrated circuit manufacture

    Science.gov (United States)

    Taylor, D. Martin

    2016-02-01

    This review article focuses on the development of processes for the manufacture of organic electronic circuits. Beginning with the first report of an organic transistor it highlights the key developments leading to the successful manufacture of microprocessors and other complex circuits incorporating organic transistors. Both batch processing (based on silicon integrated circuit technology) as well as mass-printing, roll-to-roll (R2R) approaches are discussed. Currently, the best circuit performances are achieved using batch processing. It is suggested that an emerging, large mass-market for electronic tags may dictate that R2R manufacture will likely be required to meet the high throughput rates needed. However, significant improvements in resolution and registration are necessary to achieve increased circuit operating speeds.

  1. On equivalent resistance of electrical circuits

    Science.gov (United States)

    Kagan, Mikhail

    2015-01-01

    While the standard (introductory physics) way of computing the equivalent resistance of nontrivial electrical circuits is based on Kirchhoff's rules, there is a mathematically and conceptually simpler approach, called the method of nodal potentials, whose basic variables are the values of the electric potential at the circuit's nodes. In this paper, we review the method of nodal potentials and illustrate it using the Wheatstone bridge as an example. We then derive a closed-form expression for the equivalent resistance of a generic circuit, which we apply to a few sample circuits. The result unveils a curious interplay between electrical circuits, matrix algebra, and graph theory and its applications to computer science. The paper is written at a level accessible by undergraduate students who are familiar with matrix arithmetic. Additional proofs and technical details are provided in appendices.

  2. Grounding and shielding circuits and interference

    CERN Document Server

    Morrison, Ralph

    2016-01-01

    Applies basic field behavior in circuit design and demonstrates how it relates to grounding and shielding requirements and techniques in circuit design This book connects the fundamentals of electromagnetic theory to the problems of interference in all types of electronic design. The text covers power distribution in facilities, mixing of analog and digital circuitry, circuit board layout at high clock rates, and meeting radiation and susceptibility standards. The author examines the grounding and shielding requirements and techniques in circuit design and applies basic physics to circuit behavior. The sixth edition of this book has been updated with new material added throughout the chapters where appropriate. The presentation of the book has also been rearranged in order to reflect the current trends in the field.

  3. In vivo cholinergic circuit evaluation in frontotemporal and Alzheimer dementias.

    Science.gov (United States)

    Di Lazzaro, V; Pilato, F; Dileone, M; Saturno, E; Oliviero, A; Marra, C; Daniele, A; Ranieri, F; Gainotti, G; Tonali, P A

    2006-04-11

    The test of short latency afferent inhibition (SAI) of the motor cortex is helpful in demonstrating dysfunction of central cholinergic circuits in Alzheimer disease (AD). The authors evaluated SAI in 20 patients with frontotemporal dementia (FTD) and compared data with those from 20 patients with AD and 20 controls. SAI was normal in FTD, whereas it was reduced in AD. SAI may represent an additional tool to discriminate FTD from AD.

  4. Light Sources and Ballast Circuits

    Science.gov (United States)

    Yorifuji, Takashi; Sakai, Makoto; Yasuda, Takeo; Maehara, Akiyoshi; Okada, Atsunori; Gouriki, Takeshi; Mannami, Tomoaki

    discharge models were reported. Further, studies on ultra high-pressure mercury lamps as light sources for projectors are becoming the mainstream of HID lamp related researches. For high-pressure sodium lamps, many studies on plant growing and pest control utilizing low insect attracting aspects were also reported in 2006. Additionally, for discharge lamps, the minimum sustaining electric power for arc tubes employed in electrode-less compact fluorescent lamps was investigated. For Hg-free rare-gas fluorescent lamps, a luminance of 10,000cd/m2 was attained by a 1 meter-long external duplex spiral electrode prototype using Xe/Ne barrier discharge. As to startup circuits, the commercialization of energy saving and high value added products mainly associated with fluorescent lamps and HID lamps are becoming common. Further, the miniaturization of startup circuits for self electronic-ballasted lamps has advanced. Speaking of the overall light sources and startup circuits in 2006 and with the enforcement of RoHS in Europe in July, the momentum toward hazardous substance-free and energy saving initiatives has been enhanced from the perspective of protecting the global environment. It is anticipated that similar restrictions will be globally enforced in the future.

  5. EMI-resilient amplifier circuits

    CERN Document Server

    van der Horst, Marcel J; Linnenbank, André C

    2014-01-01

    This book enables circuit designers to reduce the errors introduced by the fundamental limitations and electromagnetic interference (EMI) in negative-feedback amplifiers.  The authors describe a systematic design approach for application specific negative-feedback amplifiers, with specified signal-to-error ratio (SER).  This approach enables designers to calculate noise, bandwidth, EMI, and the required bias parameters of the transistors used in  application specific amplifiers in order to meet the SER requirements.   ·         Describes design methods that incorporate electromagnetic interference (EMI) in the design of application specific negative-feedback amplifiers; ·         Provides designers with a structured methodology to avoid the use of trial and error in meeting signal-to-error ratio (SER) requirements; ·         Equips designers to increase EMI immunity of the amplifier itself, thus avoiding filtering at the input, reducing the number of components and avoiding detr...

  6. Quantum interference in plasmonic circuits.

    Science.gov (United States)

    Heeres, Reinier W; Kouwenhoven, Leo P; Zwiller, Valery

    2013-10-01

    Surface plasmon polaritons (plasmons) are a combination of light and a collective oscillation of the free electron plasma at metal/dielectric interfaces. This interaction allows subwavelength confinement of light beyond the diffraction limit inherent to dielectric structures. As a result, the intensity of the electromagnetic field is enhanced, with the possibility to increase the strength of the optical interactions between waveguides, light sources and detectors. Plasmons maintain non-classical photon statistics and preserve entanglement upon transmission through thin, patterned metallic films or weakly confining waveguides. For quantum applications, it is essential that plasmons behave as indistinguishable quantum particles. Here we report on a quantum interference experiment in a nanoscale plasmonic circuit consisting of an on-chip plasmon beamsplitter with integrated superconducting single-photon detectors to allow efficient single plasmon detection. We demonstrate a quantum-mechanical interaction between pairs of indistinguishable surface plasmons by observing Hong-Ou-Mandel (HOM) interference, a hallmark non-classical interference effect that is the basis of linear optics-based quantum computation. Our work shows that it is feasible to shrink quantum optical experiments to the nanoscale and offers a promising route towards subwavelength quantum optical networks.

  7. Flexible printed circuit board actuators

    Science.gov (United States)

    Lee, Junseok; Cha, Youngsu

    2017-12-01

    Out-of-plane actuators are made possible by the breaking of planar symmetry. In this paper, we present a thin-film out-of-plane electrostatic actuator for a flexible printed circuit board (FPCB) that can be fabricated with a single step of the conventional manufacturing process. No other components are required for actuation except a single sheet of the FPCB, and it works based on the planar asymmetry resulting from asymmetrically patterned top and bottom electrodes on each side of the polyimide film. With the structural asymmetry, the application of a high voltage in the order of kilovolts results in the asymmetry of the electric fields and the body force density, which generates the bending moment that leads to macroscopic deformations. We applied the finite element method to examine the asymmetry induced by the difference in the electrodes. In the experiment, the displacement responses to step input and square wave input of various frequencies were analyzed. It was found that our actuator constitutes an underdamped system, exhibiting resonance characteristics. The maximum oscillatory amplitude was determined at resonance, and the relationship between the displacement and the applied voltage was investigated.

  8. Research on the modeling of the impedance match bond at station track circuit in Chinese high-speed railway

    Directory of Open Access Journals (Sweden)

    Shiwu Yang

    2015-11-01

    Full Text Available Frequency-shift keying audio jointless track circuit is used in high-speed railway in China. However, within the station, track circuit with mechanical insulation is applied. In complex circuit network of electrified railway station, impedance match bond is designed to ensure the normal operation of the track circuit and the protection of strong traction current interference. As a combination of strong and weak electricity components of track circuit, impedance match bond is both the part of the loop of the traction current and the part of the transmission line of track circuit, playing a very critical role in the electrified railway. The structure of impedance match bond is more complex than traditional impedance transformer, including the transformer with larger air-gap, LC resonance circuit for power frequency filtering, and components to enhance the signal frequency. Modeling on impedance match bond and study about the four-terminal network parameters of impedance match bond are in favor of the following two aspects: modeling of the overall traction current and calculation of track circuit working condition. By applying the transformer equivalent circuit model and combination of testing and calculation, the accurate model of impedance match bond is constructed and verified. Finally, for ease of track circuit calculation, four-terminal network model of impedance match bond under different signal carrier frequencies is presented.

  9. A novel interface circuit for triboelectric nanogenerator

    Science.gov (United States)

    Yu, Wuqi; Ma, Jiahao; Zhang, Zhaohua; Ren, Tianling

    2017-10-01

    For most triboelectric nanogenerators (TENGs), the electric output should be a short AC pulse, which has the common characteristic of high voltage but low current. Thus it is necessary to convert the AC to DC and store the electric energy before driving conventional electronics. The traditional AC voltage regulator circuit which commonly consists of transformer, rectifier bridge, filter capacitor, and voltage regulator diode is not suitable for the TENG because the transformer’s consumption of power is appreciable if the TENG output is small. This article describes an innovative design of an interface circuit for a triboelectric nanogenerator that is transformerless and easily integrated. The circuit consists of large-capacity electrolytic capacitors that can realize to intermittently charge lithium-ion batteries and the control section contains the charging chip, the rectifying circuit, a comparator chip and switch chip. More important, the whole interface circuit is completely self-powered and self-controlled. Meanwhile, the chip is widely used in the circuit, so it is convenient to integrate into PCB. In short, this work presents a novel interface circuit for TENGs and makes progress to the practical application and industrialization of nanogenerators. Project supported by the National Natural Science Foundation of China (No. 61434001) and the ‘Thousands Talents’ Program for Pioneer Researchers and Its Innovation Team, China.

  10. Negative inductance circuits for metamaterial bandwidth enhancement

    Science.gov (United States)

    Avignon-Meseldzija, Emilie; Lepetit, Thomas; Ferreira, Pietro Maris; Boust, Fabrice

    2017-12-01

    Passive metamaterials have yet to be translated into applications on a large scale due in large part to their limited bandwidth. To overcome this limitation many authors have suggested coupling metamaterials to non-Foster circuits. However, up to now, the number of convincing demonstrations based on non-Foster metamaterials has been very limited. This paper intends to clarify why progress has been so slow, i.e., the fundamental difficulty in making a truly broadband and efficient non-Foster metamaterial. To this end, we consider two families of metamaterials, namely Artificial Magnetic Media and Artificial Magnetic Conductors. In both cases, it turns out that bandwidth enhancement requires negative inductance with almost zero resistance. To estimate bandwidth enhancement with actual non-Foster circuits, we consider two classes of such circuits, namely Linvill and gyrator. The issue of stability being critical, both metamaterial families are studied with equivalent circuits that include advanced models of these non-Foster circuits. Conclusions are different for Artificial Magnetic Media coupled to Linvill circuits and Artificial Magnetic Conductors coupled to gyrator circuits. In the first case, requirements for bandwidth enhancement and stability are very hard to meet simultaneously whereas, in the second case, an adjustment of the transistor gain does significantly increase bandwidth.

  11. Negative inductance circuits for metamaterial bandwidth enhancement

    Directory of Open Access Journals (Sweden)

    Avignon-Meseldzija Emilie

    2017-01-01

    Full Text Available Passive metamaterials have yet to be translated into applications on a large scale due in large part to their limited bandwidth. To overcome this limitation many authors have suggested coupling metamaterials to non-Foster circuits. However, up to now, the number of convincing demonstrations based on non-Foster metamaterials has been very limited. This paper intends to clarify why progress has been so slow, i.e., the fundamental difficulty in making a truly broadband and efficient non-Foster metamaterial. To this end, we consider two families of metamaterials, namely Artificial Magnetic Media and Artificial Magnetic Conductors. In both cases, it turns out that bandwidth enhancement requires negative inductance with almost zero resistance. To estimate bandwidth enhancement with actual non-Foster circuits, we consider two classes of such circuits, namely Linvill and gyrator. The issue of stability being critical, both metamaterial families are studied with equivalent circuits that include advanced models of these non-Foster circuits. Conclusions are different for Artificial Magnetic Media coupled to Linvill circuits and Artificial Magnetic Conductors coupled to gyrator circuits. In the first case, requirements for bandwidth enhancement and stability are very hard to meet simultaneously whereas, in the second case, an adjustment of the transistor gain does significantly increase bandwidth.

  12. Insulation coordination for 38 KV circuit breakers

    Energy Technology Data Exchange (ETDEWEB)

    Few, R.A.; Harder, J.E.

    1985-09-01

    Based on a review of the impulse insulation requirements for 38 kV circuit breakers and the impact of insulation coordination using modern arresters, a change is suggested in the way the impulse requirements are stated for the circuit breaker. The facets of circuit breaker design which may be affected are indicated. While the general principles of this paper apply to the insulation coordination of all ratings of circuit breakers, a number of factors seem to make the 38 kV vaccum circuit breaker a particularly attractive candidate to consider for revision. Most of these factors are outlined to provide a basis for the consideration of other ratings and types of circuit breakers. Specifically it is suggested that in the present state of the art, circuit breakers for general application at 34.5 kV should have a standard requirement for 150 kV BIL phase to ground, and 200 kV BIL phase to phase and across the open break.

  13. A programming language for composable DNA circuits.

    Science.gov (United States)

    Phillips, Andrew; Cardelli, Luca

    2009-08-06

    Recently, a range of information-processing circuits have been implemented in DNA by using strand displacement as their main computational mechanism. Examples include digital logic circuits and catalytic signal amplification circuits that function as efficient molecular detectors. As new paradigms for DNA computation emerge, the development of corresponding languages and tools for these paradigms will help to facilitate the design of DNA circuits and their automatic compilation to nucleotide sequences. We present a programming language for designing and simulating DNA circuits in which strand displacement is the main computational mechanism. The language includes basic elements of sequence domains, toeholds and branch migration, and assumes that strands do not possess any secondary structure. The language is used to model and simulate a variety of circuits, including an entropy-driven catalytic gate, a simple gate motif for synthesizing large-scale circuits and a scheme for implementing an arbitrary system of chemical reactions. The language is a first step towards the design of modelling and simulation tools for DNA strand displacement, which complements the emergence of novel implementation strategies for DNA computing.

  14. A novel readout integrated circuit for ferroelectric FPA detector

    Science.gov (United States)

    Bai, Piji; Li, Lihua; Ji, Yulong; Zhang, Jia; Li, Min; Liang, Yan; Hu, Yanbo; Li, Songying

    2017-11-01

    Uncooled infrared detectors haves some advantages such as low cost light weight low power consumption, and superior reliability, compared with cryogenically cooled ones Ferroelectric uncooled focal plane array(FPA) are being developed for its AC response and its high reliability As a key part of the ferroelectric assembly the ROIC determines the performance of the assembly. A top-down design model for uncooled ferroelectric readout integrated circuit(ROIC) has been developed. Based on the optical thermal and electrical properties of the ferroelectric detector the RTIA readout integrated circuit is designed. The noise bandwidth of RTIA readout circuit has been developed and analyzed. A novel high gain amplifier, a high pass filter and a low pass filter circuits are designed on the ROIC. In order to improve the ferroelectric FPA package performance and decrease of package cost a temperature sensor is designed on the ROIC chip At last the novel RTIA ROIC is implemented on 0.6μm 2P3M CMOS silicon techniques. According to the experimental chip test results the temporal root mean square(RMS)noise voltage is about 1.4mV the sensitivity of the on chip temperature sensor is 0.6 mV/K from -40°C to 60°C the linearity performance of the ROIC chip is better than 99% Based on the 320×240 RTIA ROIC, a 320×240 infrared ferroelectric FPA is fabricated and tested. Test results shows that the 320×240 RTIA ROIC meets the demand of infrared ferroelectric FPA.

  15. Severe Intraoperative Hypercapnia Complicating an Unsual Malfunction of the Inner Tube of a Co-axial (BAIN'S Circuit

    Directory of Open Access Journals (Sweden)

    Youssef Emam Youssef

    2010-04-01

    Full Text Available The Bain's co-axial circuit system is fully established in general anaesthesia practice. It is favoured for its light weight and suitability for head and neck surgery. However, there are numerous published reports of malfunction of the inner tube of the Bain's co-axial circuit, with potentially lethal complications for the patient. This report presents a case in which a patient connected to a reused Bain's circuit (Datex-Ohmeda developed severe hypercapnia in the early intraoperative period due to unusual defect of the inner tube. This report tests and outlines the integrity of co-axial circuits and also reviews the available literature.

  16. Packaging Of Control Circuits In A Robot Arm

    Science.gov (United States)

    Kast, William

    1994-01-01

    Packaging system houses and connects control circuitry mounted on circuit boards within shoulder, upper section, and lower section of seven-degree-of-freedom robot arm. Has modular design that incorporates surface-mount technology, multilayer circuit boards, large-scale integrated circuits, and multi-layer flat cables between sections for compactness. Three sections of robot arm contain circuit modules in form of stardardized circuit boards. Each module contains two printed-circuit cards, one of each face.

  17. Reversible and quantum circuits optimization and complexity analysis

    CERN Document Server

    Abdessaied, Nabila

    2016-01-01

    This book presents a new optimization flow for quantum circuits realization. At the reversible level, optimization algorithms are presented to reduce the quantum cost. Then, new mapping approaches to decompose reversible circuits to quantum circuits using different quantum libraries are described. Finally, optimization techniques to reduce the quantum cost or the delay are applied to the resulting quantum circuits. Furthermore, this book studies the complexity of reversible circuits and quantum circuits from a theoretical perspective.

  18. No tradeoff between versatility and robustness in gene circuit motifs

    OpenAIRE

    Payne Joshua L.

    2016-01-01

    Circuit motifs are small directed subgraphs that appear in real world networks significantly more often than in randomized networks. In the Boolean model of gene circuits most motifs are realized by multiple circuit genotypes. Each of a motif’s constituent circuit genotypes may have one or more functions which are embodied in the expression patterns the circuit forms in response to specific initial conditions. Recent enumeration of a space of nearly 17 million three gene circuit genotypes rev...

  19. General Voltage Feedback Circuit Model in the Two-Dimensional Networked Resistive Sensor Array

    Directory of Open Access Journals (Sweden)

    JianFeng Wu

    2015-01-01

    Full Text Available To analyze the feature of the two-dimensional networked resistive sensor array, we firstly proposed a general model of voltage feedback circuits (VFCs such as the voltage feedback non-scanned-electrode circuit, the voltage feedback non-scanned-sampling-electrode circuit, and the voltage feedback non-scanned-sampling-electrode circuit. By analyzing the general model, we then gave a general mathematical expression of the effective equivalent resistor of the element being tested in VFCs. Finally, we evaluated the features of VFCs with simulation and test experiment. The results show that the expression is applicable to analyze the VFCs’ performance of parameters such as the multiplexers’ switch resistors, the nonscanned elements, and array size.

  20. Equivalent circuit analysis of terahertz metamaterial filters

    KAUST Repository

    Zhang, Xueqian

    2011-01-01

    An equivalent circuit model for the analysis and design of terahertz (THz) metamaterial filters is presented. The proposed model, derived based on LMC equivalent circuits, takes into account the detailed geometrical parameters and the presence of a dielectric substrate with the existing analytic expressions for self-inductance, mutual inductance, and capacitance. The model is in good agreement with the experimental measurements and full-wave simulations. Exploiting the circuit model has made it possible to predict accurately the resonance frequency of the proposed structures and thus, quick and accurate process of designing THz device from artificial metamaterials is offered. ©2011 Chinese Optics Letters.

  1. Power electronics handbook components, circuits and applications

    CERN Document Server

    Mazda, F F

    1993-01-01

    Power Electronics Handbook: Components, Circuits, and Applications is a collection of materials about power components, circuit design, and applications. Presented in a practical form, theoretical information is given as formulae. The book is divided into three parts. Part 1 deals with the usual components found in power electronics such as semiconductor devices and power semiconductor control components, their electronic compatibility, and protection. Part 2 tackles parts and principles related to circuits such as switches; link frequency chargers; converters; and AC line control, and Part 3

  2. Multi-qubit circuit quantum electrodynamics

    Energy Technology Data Exchange (ETDEWEB)

    Viehmann, Oliver

    2013-09-03

    Circuit QED systems are macroscopic, man-made quantum systems in which superconducting artificial atoms, also called Josephson qubits, interact with a quantized electromagnetic field. These systems have been devised to mimic the physics of elementary quantum optical systems with real atoms in a scalable and more flexible framework. This opens up a variety of possible applications of circuit QED systems. For instance, they provide a promising platform for processing quantum information. Recent years have seen rapid experimental progress on these systems, and experiments with multi-component circuit QED architectures are currently starting to come within reach. In this thesis, circuit QED systems with multiple Josephson qubits are studied theoretically. We focus on simple and experimentally realistic extensions of the currently operated circuit QED setups and pursue investigations in two main directions. First, we consider the equilibrium behavior of circuit QED systems containing a large number of mutually noninteracting Josephson charge qubits. The currently accepted standard description of circuit QED predicts the possibility of superradiant phase transitions in such systems. However, a full microscopic treatment shows that a no-go theorem for superradiant phase transitions known from atomic physics applies to circuit QED systems as well. This reveals previously unknown limitations of the applicability of the standard theory of circuit QED to multi-qubit systems. Second, we explore the potential of circuit QED for quantum simulations of interacting quantum many-body systems. We propose and analyze a circuit QED architecture that implements the quantum Ising chain in a time-dependent transverse magnetic field. Our setup can be used to study quench dynamics, the propagation of localized excitations, and other non-equilibrium features in this paradigmatic model in the theory of non-equilibrium thermodynamics and quantumcritical phenomena. The setup is based on a

  3. Microelectronic circuit design for energy harvesting systems

    CERN Document Server

    Di Paolo Emilio, Maurizio

    2017-01-01

    This book describes the design of microelectronic circuits for energy harvesting, broadband energy conversion, new methods and technologies for energy conversion. The author also discusses the design of power management circuits and the implementation of voltage regulators. Coverage includes advanced methods in low and high power electronics, as well as principles of micro-scale design based on piezoelectric, electromagnetic and thermoelectric technologies with control and conditioning circuit design. Provides a single-source reference to energy harvesting and its applications; Serves as a practical guide to microelectronics design for energy harvesting, with application to mobile power supplies; Enables readers to develop energy harvesting systems for wearable/mobile electronics.

  4. Operational amplifier circuits analysis and design

    CERN Document Server

    Nelson, J C C

    1995-01-01

    This book, a revised and updated version of the author's Basic Operational Amplifiers (Butterworths 1986), enables the non-specialist to make effective use of readily available integrated circuit operational amplifiers for a range of applications, including instrumentation, signal generation and processing.It is assumed the reader has a background in the basic techniques of circuit analysis, particularly the use of j notation for reactive circuits, with a corresponding level of mathematical ability. The underlying theory is explained with sufficient but not excessive, detail. A range of compu

  5. Radio-frequency integrated-circuit engineering

    CERN Document Server

    Nguyen, Cam

    2015-01-01

    Radio-Frequency Integrated-Circuit Engineering addresses the theory, analysis and design of passive and active RFIC's using Si-based CMOS and Bi-CMOS technologies, and other non-silicon based technologies. The materials covered are self-contained and presented in such detail that allows readers with only undergraduate electrical engineering knowledge in EM, RF, and circuits to understand and design RFICs. Organized into sixteen chapters, blending analog and microwave engineering, Radio-Frequency Integrated-Circuit Engineering emphasizes the microwave engineering approach for RFICs. Provide

  6. Laser written waveguide photonic quantum circuits.

    Science.gov (United States)

    Marshall, Graham D; Politi, Alberto; Matthews, Jonathan C F; Dekker, Peter; Ams, Martin; Withford, Michael J; O'Brien, Jeremy L

    2009-07-20

    We report photonic quantum circuits created using an ultrafast laser processing technique that is rapid, requires no lithographic mask and can be used to create three-dimensional networks of waveguide devices. We have characterized directional couplers--the key functional elements of photonic quantum circuits--and found that they perform as well as lithographically produced waveguide devices. We further demonstrate high-performance interferometers and an important multi-photon quantum interference phenomenon for the first time in integrated optics. This direct-write approach will enable the rapid development of sophisticated quantum optical circuits and their scaling into three-dimensions.

  7. Digital Pulse-Width-Modulation Circuit

    Science.gov (United States)

    Wenzler, Carl J.; Eichenberg, Dennis J.

    1995-01-01

    Digital pulse-width-modulation circuit provides programmable duration from 1 microsecond to full on, at repetition rate of 1 kHz. Designed for use in controlling CO2 laser, also used in applications in which precision and flexibility of digital control of pulse durations needed. Circuit incorporates low-power Schottky transistor/transistor-logic (TTL) devices in critical high-speed parts. Designed in TTL to make it compatible with Pro-Log 7914 (or equivalent) decoder input/output (I/O) utility printed-circuit card.

  8. Newnes passive and discrete circuits pocket book

    CERN Document Server

    MARSTON, R M

    2000-01-01

    Newnes Passive and Discrete Circuits Pocket Book is aimed at all engineers, technicians, students and experimenters who can build a design directly from a circuit diagram. In a highly concise form Ray Marston presents a huge compendium of circuits that can be built as they appear, adapted or used as building blocks. The devices used have been carefully chosen for their ease of availability and reasonable price. The selection of devices has been thoroughly updated for the second edition, which has also been expanded to cover the latest ICs.The three sections of the book cover: Moder

  9. A guide to printed circuit board design

    CERN Document Server

    Hamilton, Charles

    1984-01-01

    A Guide to Printed Circuit Board Design discusses the basic design principles of printed circuit board (PCB). The book consists of nine chapters; each chapter provides both text discussion and illustration relevant to the topic being discussed. Chapter 1 talks about understanding the circuit diagram, and Chapter 2 covers how to compile component information file. Chapter 3 deals with the design layout, while Chapter 4 talks about preparing the master artworks. The book also covers generating computer aided design (CAD) master patterns, and then discusses how to prepare the production drawing a

  10. Silicon integrated circuits part A : supplement 2

    CERN Document Server

    Kahng, Dawon

    1981-01-01

    Applied Solid State Science, Supplement 2: Silicon Integrated Circuits, Part A focuses on MOS device physics. This book is divided into three chapters-physics of the MOS transistor; nonvolatile memories; and properties of silicon-on-sapphire substrates devices, and integrated circuits. The topics covered include the short channel effects, MOSFET structures, floating gate devices, technology for nonvolatile semiconductor memories, sapphire substrates, and SOS integrated circuits and systems. The MOS capacitor, MIOS devices, and SOS process and device technology are also deliberated. This public

  11. Tool for Crimping Flexible Circuit Leads

    Science.gov (United States)

    Hulse, Aaron; Diftler, Myron A.

    2009-01-01

    A hand tool has been developed for crimping leads in flexible tails that are parts of some electronic circuits -- especially some sensor circuits. The tool is used to cut the tails to desired lengths and attach solder tabs to the leads. For tailoring small numbers of circuits for special applications, this hand tool is a less expensive alternative to a commercially available automated crimping tool. The crimping tool consists of an off-the-shelf hand crimping tool plus a specialized crimping insert designed specifically for the intended application.

  12. A new time discrimination circuit for the 3D imaging Lidar

    Science.gov (United States)

    Hu, Chunsheng; Huang, Zongsheng; Qin, Shiqiao; Wang, Xingshu

    2012-10-01

    In order to enhance the time discrimination precision in the 3D imaging lidar, we propose a new time discrimination circuit, which improves both the delayer and the attenuator in the previous CFD (Constant Fraction Discriminator) circuit. The proposed circuit mainly includes a delayer, a low-pass filter, and a comparator. The delayer is implemented with a series of inductors and capacitors, which has some advantages: low signal distortion, small volume, easy adjustment, etc. The low-pass filter attenuates the signal amplitude and broadens the signal width, as well as reduces the noise by decreasing the equivalent noise bandwidth, and increases the signal slope at the discrimination time. Therefore, the time discrimination error is reduced significantly. This paper introduces the proposed circuit in detail, carries out a theoretical analysis for the noise and time discrimination error in the proposed circuit and compares them with the previous CFD circuit. The comparison results show that the proposed circuit can reduce the time discrimination error by about 50% under the same noise level. In addition, some experiments have been carried out to test the performances of the circuit. The experiments show that the time delay of the circuit is about 14ns, the time discrimination error is less than 150 ps when the voltage SNR ranges from 18.2 to 81.8, and the time discrimination error is less than 100 ps when the signal amplitude ranges from 0.2 V to 1.86 V. The tested time discrimination error is well in accordance with the theoretical calculation.

  13. Flexible Simulation E-Learning Environment for Studying Digital Circuits and Possibilities for It Deployment as Semantic Web Service

    Science.gov (United States)

    Radoyska, P.; Ivanova, T.; Spasova, N.

    2011-01-01

    In this article we present a partially realized project for building a distributed learning environment for studying digital circuits Test and Diagnostics at TU-Sofia. We describe the main requirements for this environment, substantiate the developer platform choice, and present our simulation and circuit parameter calculation tools.…

  14. Short-Circuit Characterization of 10 kV 10A 4H-SiC MOSFET

    DEFF Research Database (Denmark)

    Eni, Emanuel-Petre; Beczkowski, Szymon; Munk-Nielsen, Stig

    2016-01-01

    The short-circuit capability of a power device is highly relevant for converter design and fault protection. In this paper a 10kV 10A 4H-SiC MOSFET is characterized and its short circuit withstand capability is studied and analyzed at 6 kV DC-link voltage. The test setup for this study is also in...

  15. Aluminum alloy metallization for integrated circuits

    Energy Technology Data Exchange (ETDEWEB)

    Ghate, P.B.

    1981-09-11

    Aluminum metallization is most widely used for contacts and interconnections in both bipolar and MOS integrated circuits. Aluminum alloy films, such as Al-Si and Al-Cu films, were introduced to minimize the erosion of silicon from contact windows and to improve the electromigration resistance of interconnections. Recently, magnetron sputter-deposited aluminum, Al-2wt.%Cu and Al-2wt.%Cu-1wt.%Si films were employed to study the stability and contact resistance of Si-(Al alloy film) contacts on devices with shallow junction depths of the order of 0.35 ..mu..m. Test structures were used to determine the leakage currents of 100n/sup +//p/sup +/ diodes as a function of the storage time (up to 1000 h) at 150 C, and the physical nature of the Si-(Al alloy) contacts was examined using scanning electron microscopy. The compatibility of the Al-Cu-Si metallization with the very large scale integrated requirements of interconnection and Si-metal contacts for shallow junction devices is discussed.

  16. Counterfeit integrated circuits detection and avoidance

    CERN Document Server

    Tehranipoor, Mark (Mohammad); Forte, Domenic

    2015-01-01

    This timely and exhaustive study offers a much-needed examination of the scope and consequences of the electronic counterfeit trade.  The authors describe a variety of shortcomings and vulnerabilities in the electronic component supply chain, which can result in counterfeit integrated circuits (ICs).  Not only does this book provide an assessment of the current counterfeiting problems facing both the public and private sectors, it also offers practical, real-world solutions for combatting this substantial threat.   ·      Helps beginners and practitioners in the field by providing a comprehensive background on the counterfeiting problem; ·      Presents innovative taxonomies for counterfeit types, test methods, and counterfeit defects, which allows for a detailed analysis of counterfeiting and its mitigation; ·      Provides step-by-step solutions for detecting different types of counterfeit ICs; ·      Offers pragmatic and practice-oriented, realistic solutions to counterfeit IC d...

  17. Analog Circuit Design Optimization Based on Evolutionary Algorithms

    Directory of Open Access Journals (Sweden)

    Mansour Barari

    2014-01-01

    Full Text Available This paper investigates an evolutionary-based designing system for automated sizing of analog integrated circuits (ICs. Two evolutionary algorithms, genetic algorithm and PSO (Parswal particle swarm optimization algorithm, are proposed to design analog ICs with practical user-defined specifications. On the basis of the combination of HSPICE and MATLAB, the system links circuit performances, evaluated through specific electrical simulation, to the optimization system in the MATLAB environment, for the selected topology. The system has been tested by typical and hard-to-design cases, such as complex analog blocks with stringent design requirements. The results show that the design specifications are closely met. Comparisons with available methods like genetic algorithms show that the proposed algorithm offers important advantages in terms of optimization quality and robustness. Moreover, the algorithm is shown to be efficient.

  18. Modelling a river catchment using an electrical circuit analogue

    Directory of Open Access Journals (Sweden)

    C. G. Collier

    1998-01-01

    Full Text Available An electrical circuit analogue of a river catchment is described from which is derived an hydrological model of river flow called the River Electrical Water Analogue Research and Development (REWARD model. The model is based upon an analytic solution to the equation governing the flow of electricity in an inductance-capacitance-resistance (LCR circuit. An interpretation of L, C and R in terms of catchment parameters and physical processes is proposed, and tested for the River Irwell catchment in northwest England. Hydrograph characteristics evaluated using the model are compared with observed hydrographs, confirming that the modelling approach does provide a reliable framework within which to investigate the impact of variations in model input data.

  19. Efficient quantum circuits for Schur and Clebsch-Gordan transforms.

    Science.gov (United States)

    Bacon, Dave; Chuang, Isaac L; Harrow, Aram W

    2006-10-27

    The Schur basis on n d-dimensional quantum systems is a generalization of the total angular momentum basis that is useful for exploiting symmetry under permutations or collective unitary rotations. We present efficient {size poly[n,d,log(1/epsilon)] for accuracy epsilon} quantum circuits for the Schur transform, which is the change of basis between the computational and the Schur bases. Our circuits provide explicit efficient methods for solving such diverse problems as estimating the spectrum of a density operator, quantum hypothesis testing, and communicating without a shared reference frame. We thus render tractable a large series of methods for extracting resources from quantum systems and for numerous quantum information protocols.

  20. WASTE PRINTED CIRCUIT BOARDS SEPARATION IN ELECTROSTATIC SEPARATOR

    Directory of Open Access Journals (Sweden)

    Branimir Fuk

    2012-12-01

    Full Text Available Printed circuit boards from electronic waste are very important source of precious metals by recycling. The biggest challenge is liberation and separation of useful components; thin film which contains copper, zinc, tin, lead and precious metals like silver, gold and palladium from non useful components; polymers, ceramics and glass fibbers. The paper presents results for separation of shredded printed circuit boards from TV sets in electrostatic separator. Testing where conducted with material class 2/1 and 1/0.5 mm in laboratory on equipment for mineral processing. Results showed influence from independent variable; separation knife gradient, drum rotation speed and voltage on concentrate quality and recovery (the paper is published in Croatian.

  1. Lateral power transistors in integrated circuits

    CERN Document Server

    Erlbacher, Tobias

    2014-01-01

    This book details and compares recent advancements in the development of novel lateral power transistors (LDMOS devices) for integrated circuits in power electronic applications. It includes the state-of-the-art concept of double-acting RESURF topologies.

  2. Fast frequency divider circuit using combinational logic

    Science.gov (United States)

    Helinski, Ryan

    2017-05-30

    The various technologies presented herein relate to performing on-chip frequency division of an operating frequency of a ring oscillator (RO). Per the various embodiments herein, a conflict between RO size versus operational frequency can be addressed by dividing the output frequency of the RO to a frequency that can be measured on-chip. A frequency divider circuit (comprising NOR gates and latches, for example) can be utilized in conjunction with the RO on the chip. In an embodiment, the frequency divider circuit can include a pair of latches coupled to the RO to facilitate dividing the oscillating frequency of the RO by 2. In another embodiment, the frequency divider circuit can include four latches (operating in pairs) coupled to the RO to facilitate dividing the oscillating frequency of the RO by 4. A plurality of ROs can be MUXed to the plurality of ROs by a single oscillation-counting circuit.

  3. CMOS circuits for passive wireless microsystems

    CERN Document Server

    Yuan, Fei

    2011-01-01

    Here is a comprehensive examination of CMOS circuits for passive wireless microsystems. Covers design challenges, fundamental issues of ultra-low power wireless communications, radio-frequency power harvesting, and advanced design techniques, and more.

  4. Laser written waveguide photonic quantum circuits

    National Research Council Canada - National Science Library

    Graham D. Marshall; Alberto Politi; Jonathan C. F. Matthews; Peter Dekker; Martin Ams; Michael J. Withford; Jeremy L. O'Brien

    2009-01-01

    We report photonic quantum circuits created using an ultrafast laser processing technique that is rapid, requires no lithographic mask and can be used to create three-dimensional networks of waveguide devices...

  5. Magnetic Logic Circuits for Extreme Environments Project

    Data.gov (United States)

    National Aeronautics and Space Administration — The program aims to demonstrate a new genre of all-magnetic logic circuits which are radiation-tolerant and capable of reliable operation in extreme environmental...

  6. Electronic Components and Circuits for Extreme Temperature Environments

    Science.gov (United States)

    Patterson, Richard L.; Hammoud, Ahmad; Dickman, John E.; Gerber, Scott

    2003-01-01

    Planetary exploration missions and deep space probes require electrical power management and control systems that are capable of efficient and reliable operation in very low temperature environments. Presently, spacecraft operating in the cold environment of deep space carry a large number of radioisotope heating units in order to maintain the surrounding temperature of the on-board electronics at approximately 20 C. Electronics capable of operation at cryogenic temperatures will not only tolerate the hostile environment of deep space but also reduce system size and weight by eliminating or reducing the radioisotope heating units and their associate structures; thereby reducing system development as well as launch costs. In addition, power electronic circuits designed for operation at low temperatures are expected to result in more efficient systems than those at room temperature. This improvement results from better behavior and tolerance in the electrical and thermal properties of semiconductor and dielectric materials at low temperatures. The Low Temperature Electronics Program at the NASA Glenn Research Center focuses on research and development of electrical components, circuits, and systems suitable for applications in the aerospace environment and deep space exploration missions. Research is being conducted on devices and systems for reliable use down to cryogenic temperatures. Some of the commercial-off-the-shelf as well as developed components that are being characterized include switching devices, resistors, magnetics, and capacitors. Semiconductor devices and integrated circuits including digital-to-analog and analog-to-digital converters, DC/DC converters, operational amplifiers, and oscillators are also being investigated for potential use in low temperature applications. An overview of the NASA Glenn Research Center Low Temperature Electronic Program will be presented in this paper. A description of the low temperature test facilities along with

  7. Full circuit calculation for electromagnetic pulse transmission in a high current facility

    Directory of Open Access Journals (Sweden)

    Wenkang Zou

    2014-11-01

    Full Text Available We describe herein for the first time a full circuit model for electromagnetic pulse transmission in the Primary Test Stand (PTS—the first TW class pulsed power driver in China. The PTS is designed to generate 8–10 MA current into a z-pinch load in nearly 90 ns rise time for inertial confinement fusion and other high energy density physics research. The PTS facility has four conical magnetic insulation transmission lines, in which electron current loss exists during the establishment of magnetic insulation. At the same time, equivalent resistance of switches and equivalent inductance of pinch changes with time. However, none of these models are included in a commercially developed circuit code so far. Therefore, in order to characterize the electromagnetic transmission process in the PTS, a full circuit model, in which switch resistance, magnetic insulation transmission line current loss and a time-dependent load can be taken into account, was developed. Circuit topology and an equivalent circuit model of the facility were introduced. Pulse transmission calculation of shot 0057 was demonstrated with the corresponding code FAST (full-circuit analysis and simulation tool by setting controllable parameters the same as in the experiment. Preliminary full circuit simulation results for electromagnetic pulse transmission to the load are presented. Although divergences exist between calculated and experimentally obtained waveforms before the vacuum section, consistency with load current is satisfactory, especially at the rising edge.

  8. Effect of a Diagram on Primary Students' Understanding About Electric Circuits

    Science.gov (United States)

    Preston, Christine Margaret

    2017-09-01

    This article reports on the effect of using a diagram to develop primary students' conceptual understanding about electric circuits. Diagrammatic representations of electric circuits are used for teaching and assessment despite the absence of research on their pedagogical effectiveness with young learners. Individual interviews were used to closely analyse Years 3 and 5 (8-11-year-old) students' explanations about electric circuits. Data was collected from 20 students in the same school providing pre-, post- and delayed post-test dialogue. Students' thinking about electric circuits and changes in their explanations provide insights into the role of diagrams in understanding science concepts. Findings indicate that diagram interaction positively enhanced understanding, challenged non-scientific views and promoted scientific models of electric circuits. Differences in students' understanding about electric circuits were influenced by prior knowledge, meta-conceptual awareness and diagram conventions including a stylistic feature of the diagram used. A significant finding that students' conceptual models of electric circuits were energy rather than current based has implications for electricity instruction at the primary level.

  9. Breakdown of transistors in Marx bank circuit

    Science.gov (United States)

    Chatterjee, Amitabh

    2000-09-01

    We reconsider the mode of operation of a Marx bank circuit and analyze the secondary breakdown of transistors with shorted emitter-base. The mechanism of breakdown of the transistor when a fast rising voltage pulse is applied across is investigated. The device exhibits chaotic behavior at the breakdown point where it can go into two possible modes of breakdown. A new explanation for the working of the circuit consistent with the experimental observations is proposed.

  10. Supply Voltage Glitches Effects on CMOS Circuits

    OpenAIRE

    Djellid-Ouar, Anissa; Cathébras, Guy; Bancel, Frédéric

    2006-01-01

    International audience; Among the attacks applied on secure circuits, fault injection techniques consist in the use of a combination of environmental conditions that induce computational errors in the chip that can leak protected informations. The purpose of our study is to build an accurate model able to describe the behaviour of CMOS circuits in presence of deliberated short supply voltage variations. This behaviour depends strongly on the basic gates (combinational logic, registers. . . ) ...

  11. From circuits to behaviour in the amygdala

    Science.gov (United States)

    Janak, Patricia H.; Tye, Kay M.

    2015-01-01

    The amygdala has long been associated with emotion and motivation, playing an essential part in processing both fearful and rewarding environmental stimuli. How can a single structure be crucial for such different functions? With recent technological advances that allow for causal investigations of specific neural circuit elements, we can now begin to map the complex anatomical connections of the amygdala onto behavioural function. Understanding how the amygdala contributes to a wide array of behaviours requires the study of distinct amygdala circuits. PMID:25592533

  12. Closed circuit television welding alignment system

    Energy Technology Data Exchange (ETDEWEB)

    Darner, G.S.

    1976-09-01

    Closed circuit television (CCTV) weld targeting systems were developed to provide accurate and repeatable positioning of the electrode of an electronic arc welder with respect to the parts being joined. A sliding mirror electrode holder was developed for use with closed circuit television equipment on existing weld fixturing. A complete motorized CCTV weld alignment system was developed to provide weld targeting for even the most critical positioning requirements.

  13. Evolvable designs of experiments applications for circuits

    CERN Document Server

    Iordache, Octavian

    2009-01-01

    Adopting a groundbreaking approach, the highly regarded author shows how to design methods for planning increasingly complex experiments. He begins with a brief introduction to standard quality methods and the technology in standard electric circuits. The book then gives numerous examples of how to apply the proposed methodology in a series of real-life case studies. Although these case studies are taken from the printed circuit board industry, the methods are equally applicable to other fields of engineering.

  14. Electronic circuits, systems and standards the best of EDN

    CERN Document Server

    Hickman, Ian

    2013-01-01

    Electronic Circuits, Systems and Standards: The Best of EDN is a collection of 66 EDN articles. The topics covered in this collection are diverse but all are relevant to controlled circulation electronics. The coverage of the text includes topics about software and algorithms, such as simple random number algorithm; simple log algorithm; and efficient algorithm for repeated FFTs. The book also tackles measurement related topics, including test for identifying a Gaussian noise source; enhancing product reliability; and amplitude-locked loop speeds filter test. The text will be useful to student

  15. Implementation of a noise reduction circuit for spaceflight IR spectrometers

    Science.gov (United States)

    Ramirez, L.; Hickok, R.; Pain, B.; Staller, C.

    1992-01-01

    The paper discusses the implementation and analysis of a correlated triple sampling circuit using analog subtractor/integrators. The software and test setup for noise measurements are also described. The correlation circuitry is part of the signal chain for a 256-element InSb line array used in the Visible and Infrared Mapping Spectrometer. Using a focal-plane array (FPA) simulator, system noise measurements of 0.7 DN are obtained. A test setup for FPA/SPE (signal processing electronics) characterization along with noise measurements is demonstrated.

  16. Hysteresis in a quantized superfluid `atomtronic' circuit

    Science.gov (United States)

    Eckel, Stephen; Lee, Jeffrey G.; Jendrzejewski, Fred; Murray, Noel; Clark, Charles W.; Lobb, Christopher J.; Phillips, William D.; Edwards, Mark; Campbell, Gretchen K.

    2014-02-01

    Atomtronics is an emerging interdisciplinary field that seeks to develop new functional methods by creating devices and circuits where ultracold atoms, often superfluids, have a role analogous to that of electrons in electronics. Hysteresis is widely used in electronic circuits--it is routinely observed in superconducting circuits and is essential in radio-frequency superconducting quantum interference devices. Furthermore, it is as fundamental to superfluidity (and superconductivity) as quantized persistent currents, critical velocity and Josephson effects. Nevertheless, despite multiple theoretical predictions, hysteresis has not been previously observed in any superfluid, atomic-gas Bose-Einstein condensate. Here we directly detect hysteresis between quantized circulation states in an atomtronic circuit formed from a ring of superfluid Bose-Einstein condensate obstructed by a rotating weak link (a region of low atomic density). This contrasts with previous experiments on superfluid liquid helium where hysteresis was observed directly in systems in which the quantization of flow could not be observed, and indirectly in systems that showed quantized flow. Our techniques allow us to tune the size of the hysteresis loop and to consider the fundamental excitations that accompany hysteresis. The results suggest that the relevant excitations involved in hysteresis are vortices, and indicate that dissipation has an important role in the dynamics. Controlled hysteresis in atomtronic circuits may prove to be a crucial feature for the development of practical devices, just as it has in electronic circuits such as memories, digital noise filters (for example Schmitt triggers) and magnetometers (for example superconducting quantum interference devices).

  17. A Simple Memristor Model for Circuit Simulations

    Science.gov (United States)

    Fullerton, Farrah-Amoy; Joe, Aaleyah; Gergel-Hackett, Nadine; Department of Chemistry; Physics Team

    This work describes the development of a model for the memristor, a novel nanoelectronic technology. The model was designed to replicate the real-world electrical characteristics of previously fabricated memristor devices, but was constructed with basic circuit elements using a free widely available circuit simulator, LT Spice. The modeled memrsistors were then used to construct a circuit that performs material implication. Material implication is a digital logic that can be used to perform all of the same basic functions as traditional CMOS gates, but with fewer nanoelectronic devices. This memristor-based digital logic could enable memristors' use in new paradigms of computer architecture with advantages in size, speed, and power over traditional computing circuits. Additionally, the ability to model the real-world electrical characteristics of memristors in a free circuit simulator using its standard library of elements could enable not only the development of memristor material implication, but also the development of a virtually unlimited array of other memristor-based circuits.

  18. Design automation for integrated nonlinear logic circuits (Conference Presentation)

    Science.gov (United States)

    Van Vaerenbergh, Thomas; Pelc, Jason; Santori, Charles; Bose, Ranojoy; Kielpinski, Dave; Beausoleil, Raymond G.

    2016-05-01

    PCells (modules) which consist of primitive building-block PCells (components). To automatically produce layouts, we built on a construct provided by Luceda called a PlaceAndAutoRoute cell: we create a module component by supplying a list of child cells, and a list of the desired connections between the cells (e.g. the out0 port of a microring is connected to a grating coupler). This functionality allowed us to write algorithms to automatically lay out the components: for instance, by laying out the first component and walking through the list of connections to check to see if the next component is already placed or not. The placement and orientation of the new component is determined by minimizing the length of a connecting waveguide. Our photonic circuits also utilize electrical signals to tune the photonic elements (setting propagation phases or microring resonant frequencies via thermo-optical tuning): the algorithm also routes the contacts for the metal heaters to contact pads at the edge of the circuit being designed where it can be contacted by electrical probes. We are currently validating a test run fabricated over the summer, and will use detailed characterization results to prepare our final design cycle in which we aim to demonstrate complex operational logic circuits containing ~50-100 nonlinear resonators.

  19. A wideband low-noise pulsed laser detection circuit for the 3D imaging lidar

    Science.gov (United States)

    Hu, Chunsheng; Huang, Zongsheng; Qin, Shiqiao; Wang, Xingshu

    2012-09-01

    In order to enhance the measurement precision and detection range of the 3D imaging lidar (light detection and ranging), we propose a new broadband low-noise detection circuit for the pulse laser, which mainly includes a high-speed APD (Avalanche Photodiode) detector and a broadband low-noise transimpedance amplifier. In the detection circuit, a high negative bias voltage is applied to the APD detector and used to set the static input current of the amplifier NE5210 to 200 &muA with a proper bias method. By this bias method, the allowable input current range of the amplifier NE5210 is enhanced by about 1 time. This paper introduces the main framework and performance of the detection circuit. The output noise voltage, output signal voltage and voltage SNR (Signal-to-noise Ratio) of the detection circuit are analyzed and calculated as well. Some experiments have been carried out with the proposed detection circuit, showing that the detection circuit can detect a narrow pulse laser with about 4 ns pulse width. Based on our experiments and analyses, the pass band of the detection circuit ranges from 0.56 MHz to 200MHz approximately, the allowable input current of the amplifier NE5210 varies from -460 μA to 0, and the effective output differential voltage ranges from -1.6 V to 1.4 V. The proposed detection circuit is implemented and tested in a high-speed 3D imaging lidar. As well as 3D imaging lidars, the detection circuit can be applied to the pulse laser range finder and other pulse laser detection system.

  20. VHDL simulation of the implementation of a costfunction circuit

    Science.gov (United States)

    Ming, Imvidhaya

    1990-09-01

    Since VHDL is a DoD standard hardware description language, it is widely used in the design of logic circuits at different levels. VHDL can be used to do behavioral modeling which is desirable in top-down system design. A cost function calculation in a graph partition algorithm is used here as an example to test the VHDL design methodology. Subroutines or statements in the software can be implemented into hardware if the subroutines or the statements in that software are suitably grouped. While the design of hardware is considered, high density integration of circuit is also the primary goal. Parts of an old design were condensed using programmable EPLDs which were programmed by commercial software development tools. The methodology of implementation goes from a register transfer language description to data flow design and control flow design. The costfunction calculation was successfully put into 4 EP1800 chips and the design was simulated in VHDL. The primary goal of integration was achieved at the expense of speed. To support the total simulation several behavior models were created. Results of simulation revealed that the adder circuit in the EP1800 can be further improved. Experiences of using VHDL are discussed in this thesis.

  1. Experimental study of two-phase natural circulation circuit

    Energy Technology Data Exchange (ETDEWEB)

    Lemos, Wanderley Freitas; Su, Jian, E-mail: wlemos@lasme.coppe.ufrj.br, E-mail: sujian@nuclear.ufrj.br [Coordenacao dos Programas de Pos-Graduacao em Engenharia (COPPE/UFRJ), Rio de Janeiro, RJ (Brazil). Programa de Engenharia Nuclear; Faccini, Jose Luiz Horacio, E-mail: faccini@ien.gov.br [Instituto de Engenharia Nuclear (IEN/CNEN-RJ), RIo de Janeiro, RJ (Brazil). Lab. de Termo-Hidraulica Experimental

    2012-07-01

    This paper reports an experimental study on the behavior of fluid flow in natural circulation under single-and two-phase flow conditions. The natural circulation circuit was designed based on concepts of similarity and scale in proportion to the actual operating conditions of a nuclear reactor. This test equipment has similar performance to the passive system for removal of residual heat presents in Advanced Pressurized Water Reactors (A PWR). The experiment was carried out by supplying water to primary and secondary circuits, as well as electrical power resistors installed inside the heater. Power controller has available to adjust the values for supply of electrical power resistors, in order to simulate conditions of decay of power from the nuclear reactor in steady state. Data acquisition system allows the measurement and control of the temperature at different points by means of thermocouples installed at several points along the circuit. The behavior of the phenomenon of natural circulation was monitored by a software with graphical interface, showing the evolution of temperature measurement points and the results stored in digital format spreadsheets. Besides, the natural circulation flow rate was measured by a flowmeter installed on the hot leg. A flow visualization technique was used the for identifying vertical flow regimes of two-phase natural circulation. Finally, the Reynolds Number was calculated for the establishment of a friction factor correlation dependent on the scale geometrical length, height and diameter of the pipe. (author)

  2. A Digital Auto-Zeroing Circuit to Reduce Offset in Sub-Threshold Sense Amplifiers

    Directory of Open Access Journals (Sweden)

    Benton H. Calhoun

    2013-05-01

    Full Text Available Device variability in modern processes has become a major concern in SRAM design leading to degradation of both performance and yield. Variation induced offset in the sense amplifiers requires a larger bitline differential, which slows down SRAM access times and causes increased power consumption. The effect aggravated in the sub-threshold region. In this paper, we propose a circuit that reduces the sense amp offset using an auto-zeroing scheme with automatic temperature, voltage, and aging tracking. The circuit enables flexible tuning of the offset voltage. Measurements taken from a 45 nm test chip show the circuit is able to limit the offset to 20 mV. A 16kB SRAM is designed using the auto-zeroing circuit for the sense amps. The reduction in the total read energy and delay is reported for various configurations of the memory.

  3. Short-circuit protection of LLC resonant converter using voltages across resonant tank elements

    Directory of Open Access Journals (Sweden)

    Denys Igorovych Zaikin

    2015-06-01

    Full Text Available This paper describes two methods for the short-circuit protection of the LLC resonant converter. One of them uses the voltage across the capacitor and the other uses the voltage across the inductor of the resonant tank. These voltages can be processed (integrated or differentiated to recover the resonant tank current. The two circuits illustrated in the described methods make it possible to develop a robust LLC converter design and to avoid using lossy current measurement elements, such as a shunt resistor or current transformer. The methods also allow measuring resonant tank current without breaking high-current paths and connecting the measuring circuit in parallel with the inductor or capacitor of the resonant tank. Practical implementations of these indirect current measurements have been experimentally tested for the short-circuit protection of the 1600 W LLC converter.

  4. 30 CFR 75.900-2 - Approved circuit schemes.

    Science.gov (United States)

    2010-07-01

    ... device installed in the main secondary circuit at the source transformer may be used to provide undervoltage protection for each circuit that receives power from that transformer. (c) One circuit breaker may... may be used for undervoltage protection if the relay coils are designed to trip the circuit breaker...

  5. 46 CFR 111.75-5 - Lighting branch circuits.

    Science.gov (United States)

    2010-10-01

    ... 46 Shipping 4 2010-10-01 2010-10-01 false Lighting branch circuits. 111.75-5 Section 111.75-5...-GENERAL REQUIREMENTS Lighting Circuits and Protection § 111.75-5 Lighting branch circuits. (a) Loads. A lighting distribution panel must not supply branch circuits rated at over 30 amperes. (b) Connected Load...

  6. 49 CFR 236.723 - Circuit, double wire; line.

    Science.gov (United States)

    2010-10-01

    ... 49 Transportation 4 2010-10-01 2010-10-01 false Circuit, double wire; line. 236.723 Section 236.723 Transportation Other Regulations Relating to Transportation (Continued) FEDERAL RAILROAD... § 236.723 Circuit, double wire; line. An electric circuit not employing a common return wire; a circuit...

  7. 49 CFR 236.725 - Circuit, switch shunting.

    Science.gov (United States)

    2010-10-01

    ... 49 Transportation 4 2010-10-01 2010-10-01 false Circuit, switch shunting. 236.725 Section 236.725 Transportation Other Regulations Relating to Transportation (Continued) FEDERAL RAILROAD ADMINISTRATION... Circuit, switch shunting. A shunting circuit which is closed through contacts of a switch circuit...

  8. 49 CFR 236.786 - Principle, closed circuit.

    Science.gov (United States)

    2010-10-01

    ... 49 Transportation 4 2010-10-01 2010-10-01 false Principle, closed circuit. 236.786 Section 236.786 Transportation Other Regulations Relating to Transportation (Continued) FEDERAL RAILROAD ADMINISTRATION... Principle, closed circuit. The principle of circuit design where a normally energized electric circuit which...

  9. Make a Mystery Circuit with a Bar Light Fixture

    Science.gov (United States)

    Lietz, Martha

    2007-01-01

    Teachers have been building mystery circuits or so-called "black box circuits" to use as a demonstration with their students for years. This paper presents an easy way to make simple mystery circuits using inexpensive light fixtures (see Fig. 1) available at almost any home improvement store. In a black box circuit, only the lightbulbs are visible…

  10. Fingerprinted circuits and methods of making and identifying the same

    Science.gov (United States)

    Ferguson, Michael Ian (Inventor)

    2012-01-01

    A circuit having a fingerprint for identification of a particular instantiation of the circuit is disclosed. The circuit may include a plurality of digital circuits or gates. Each of the digital circuits or gates is responsive to a configuration voltage applied to its analog input for controlling whether or not the digital circuit or gate performs its intended digital function and each of the digital circuits or gates transitioning between its functional state and its at least one other state when the configuration voltage equals a boundary voltage. The boundary voltage varies between different instantiations of the circuit for a majority of the digital circuits or gates and these differing boundary voltages serving to identify (or fingerprint) different instantiations of the same circuit.

  11. A comparison of modified Howland circuits as current generators with current mirror type circuits.

    Science.gov (United States)

    Bertemes-Filho, P; Brown, B H; Wilson, A J

    2000-02-01

    Multi-frequency electrical impedance tomography (EIT) systems require stable voltage controlled current generators that will work over a wide frequency range and with a large variation in load impedance. In this paper we compare the performance of two commonly used designs: the first is a modified Howland circuit whilst the second is based on a current mirror. The output current and the output impedance of both circuits were determined through PSPICE simulation and through measurement. Both circuits were stable over the frequency ranges 1 kHz to 1 MHz. The maximum variation of output current with frequency for the modified Howland circuit was 2.0% and for the circuit based on a current mirror 1.6%. The output impedance for both circuits was greater than 100 kohms for frequencies up to 100 kHz. However, neither circuit achieved this output impedance at 1 MHz. Comparing the results from the two circuits suggests that there is little to choose between them in terms of a practical implementation.

  12. Layout to circuit extraction for three-dimensional thermal-electrical circuit simulation of device structures

    NARCIS (Netherlands)

    Krabbenborg, B.H.; Krabbenborg, B.H.; Bosma, A.; de Graaff, H.C.; de Graaff, H.C.; Mouthaan, A.J.

    1996-01-01

    In this paper, a method is proposed for extraction of coupled networks from layout information for simulation of electrothermal device behavior. The networks represent a three-dimensional (3-D) device structure with circuit elements. The electrical and thermal characteristics of this circuit

  13. 30 CFR 75.900 - Low- and medium-voltage circuits serving three-phase alternating current equipment; circuit...

    Science.gov (United States)

    2010-07-01

    ... 30 Mineral Resources 1 2010-07-01 2010-07-01 false Low- and medium-voltage circuits serving three... STANDARDS-UNDERGROUND COAL MINES Underground Low- and Medium-Voltage Alternating Current Circuits § 75.900 Low- and medium-voltage circuits serving three-phase alternating current equipment; circuit breakers...

  14. Tuned-circuit Johnson noise thermometry

    Science.gov (United States)

    Roberts, M. J.; Blalock, T. V.; Shepard, R. L.

    Three tuned circuits that can be used in Johnson noise thermometry have been analyzed; series resistance-inductance-capacitance (RLC), parallel RLC, and transformer coupled. Tuned circuits allow the temperature of the sensor to be determined by a single noise voltage, which is ideally independent of the resistance of the sensor, thereby reducing the complexity of temperature-measuring systems for space applications. Direct-coupled and transformer-coupled tuned circuits may offer advantage to the SP-100 system designer interfacing with data systems. A study was performed to establish whether the advantages of the ideal tuned circuits would be obtained with real, lossy inductive components and would provide a measurement system independent of aging and temperature effects on sensor resistance. Theoretical mean-squared output voltage dependence on sensor temperature and resistance, output capacitor value, and inductor temperature and resistance are derived for the series and parallel RLC cases. It is shown for tuned circuits using lossless inductors that the mean squared voltage is kT sub R/C, where T sub R is the sensor temperature and C is the capacitance of the capacitor. For lossy inductors and transformers, the mean-squared capacitor voltage is a function of sensor resistance, which may change in an unknown manner during an extended mission.

  15. Document analysis with neural net circuits

    Science.gov (United States)

    Graf, Hans Peter

    1994-01-01

    Document analysis is one of the main applications of machine vision today and offers great opportunities for neural net circuits. Despite more and more data processing with computers, the number of paper documents is still increasing rapidly. A fast translation of data from paper into electronic format is needed almost everywhere, and when done manually, this is a time consuming process. Markets range from small scanners for personal use to high-volume document analysis systems, such as address readers for the postal service or check processing systems for banks. A major concern with present systems is the accuracy of the automatic interpretation. Today's algorithms fail miserably when noise is present, when print quality is poor, or when the layout is complex. A common approach to circumvent these problems is to restrict the variations of the documents handled by a system. In our laboratory, we had the best luck with circuits implementing basic functions, such as convolutions, that can be used in many different algorithms. To illustrate the flexibility of this approach, three applications of the NET32K circuit are described in this short viewgraph presentation: locating address blocks, cleaning document images by removing noise, and locating areas of interest in personal checks to improve image compression. Several of the ideas realized in this circuit that were inspired by neural nets, such as analog computation with a low resolution, resulted in a chip that is well suited for real-world document analysis applications and that compares favorably with alternative, 'conventional' circuits.

  16. Communication and Sensing Circuits on Cellulose

    Directory of Open Access Journals (Sweden)

    Federico Alimenti

    2015-06-01

    Full Text Available This paper proposes a review of several circuits for communication and wireless sensing applications implemented on cellulose-based materials. These circuits have been developed during the last years exploiting the adhesive copper laminate method. Such a technique relies on a copper adhesive tape that is shaped by a photo-lithographic process and then transferred to the hosting substrate (i.e., paper by means of a sacrificial layer. The presented circuits span from UHF oscillators to a mixer working at 24 GHz and constitute an almost complete set of building blocks that can be applied to a huge variety communication apparatuses. Each circuit is validated experimentally showing performance comparable with the state-of-the-art. This paper demonstrates that circuits on cellulose are capable of operating at record frequencies and that ultra- low cost, green i.e., recyclable and biodegradable materials can be a viable solution to realize high frequency hardware for the upcoming Internet of Things (IoT era.

  17. Advances in Analog Circuit Design 2015

    CERN Document Server

    Baschirotto, Andrea; Harpe, Pieter

    2016-01-01

    This book is based on the 18 tutorials presented during the 24th workshop on Advances in Analog Circuit Design. Expert designers present readers with information about a variety of topics at the frontier of analog circuit design, including low-power and energy-efficient analog electronics, with specific contributions focusing on the design of efficient sensor interfaces and low-power RF systems. This book serves as a valuable reference to the state-of-the-art, for anyone involved in analog circuit research and development. ·         Provides a state-of-the-art reference in analog circuit design, written by experts from industry and academia; ·         Presents material in a tutorial-based format; ·         Includes coverage of high-performance analog-to-digital and digital to analog converters, integrated circuit design in scaled technologies, and time-domain signal processing.

  18. Adjustable direct current and pulsed circuit fault current limiter

    Science.gov (United States)

    Boenig, Heinrich J.; Schillig, Josef B.

    2003-09-23

    A fault current limiting system for direct current circuits and for pulsed power circuit. In the circuits, a current source biases a diode that is in series with the circuits' transmission line. If fault current in a circuit exceeds current from the current source biasing the diode open, the diode will cease conducting and route the fault current through the current source and an inductor. This limits the rate of rise and the peak value of the fault current.

  19. Research of Driving Circuit in Coaxial Induction Coilgun

    Directory of Open Access Journals (Sweden)

    Yadong Zhang

    2013-09-01

    Full Text Available Power supply is crucial equipment in coaxial induction coil launcher.Configuration of the driving circuit influences the efficiency of the coil launcher directly.This paper gives a detailed analysis of the properties of the driving circuit construction based on the capacitor source. Three topologies of the driving circuit are compared including oscillation circuit, crowbar circuit and half-wave circuit. It is proved that which circuit has the better efficiency depends on the detailed parameters of the experiment, especially the crowbar resistance. Crowbar resistor regulates not only efficiency of the system, but also temperature rise of the coil. Electromagnetic force (EMF applied on the armature will be another question which influences service condition of the driving circuits. Oscillation circuit and crowbar circuit should apply to the asynchronous induction coil launcher and synchronous induction coil launcher, respectively. Half-wave circuit is seldom used in the experiment. Although efficiency of the half-wave circuit is very high, the speed of the armature is low. A simple independent half-wave circuit is suggested in this paper. Generally speaking, the comprehensive property of crowbar circuit is the most practical in the three typical circuits. Conclusions of the paper could provide guidelines for practice.

  20. Application of Memristors in Microwave Passive Circuits

    Directory of Open Access Journals (Sweden)

    M.Potrebic

    2015-06-01

    Full Text Available The recent implementation of the fourth fundamental electric circuit element, the memristor, opened new vistas in many fields of engineering applications. In this paper, we explore several RF/microwave passive circuits that might benefit from the memristor salient characteristics. We consider a power divider, coupled resonator bandpass filters, and a low-reflection quasi-Gaussian lowpass filter with lossy elements. We utilize memristors as configurable linear resistors and we propose memristor-based bandpass filters that feature suppression of parasitic frequency pass bands and widening of the desired rejection band. The simulations are performed in the time domain, using LTspice, and the RF/microwave circuits under consideration are modeled by ideal elements available in LTspice.

  1. INDUSTRIAL HYDRAULIC ACCUMULATORS AND APPLICATION CIRCUITS

    Directory of Open Access Journals (Sweden)

    Mustafa GÖLCÜ

    2002-01-01

    Full Text Available Important developments in industrial hydraulic technologies extended their application areas including big power transmission systems. Efficient and powerful systems have been developed using sensitive control units. However, it is necessary to provide safe operating working conditions since some systems can not work properly in some situations. For instance, lack of the fluid in the system or leakage of the fluid from the system may cause serious damage in the circuit. When the pressure reaches the high levels, instantaneous shock strokes may also occur. Hydraulic accumulators are used to prevent such kind of problems. In this study, types of accumulators used in hydraulic circuits are introduced and necessary formulas for selection of the accumulators are presented with an example. The usage of accumulators in different circuits is shown with figures.

  2. The Circuit Ideal of a Vector Configuration

    DEFF Research Database (Denmark)

    Jensen, Anders Nedergaard; Bogart, Tristram; Thomas, Rekha

    The circuit ideal, $\\ica$, of a configuration $\\A = \\{\\a_1, ..., \\a_n\\} \\subset \\Z^d$ is the ideal generated by the binomials ${\\x}^{\\cc^+} - {\\x}^{\\cc^-} \\in \\k[x_1, ..., x_n]$ as $\\cc = \\cc^+ - \\cc^- \\in \\Z^n$ varies over the circuits of $\\A$. This ideal is contained in the toric ideal, $\\ia......$, of $\\A$ which has numerous applications and is nontrivial to compute. Since circuits can be computed using linear algebra and the two ideals often coincide, it is worthwhile to understand when equality occurs. In this paper we study $\\ica$ in relation to $\\ia$ from various algebraic and combinatorial...... perspectives. We prove that the obstruction to equality of the ideals is the existence of certain polytopes. This result is based on a complete characterization of the standard pairs/associated primes of a monomial initial ideal of $\\ica$ and their differences from those for the corresponding toric initial...

  3. Radiation-hardened transistor and integrated circuit

    Science.gov (United States)

    Ma, Kwok K.

    2007-11-20

    A composite transistor is disclosed for use in radiation hardening a CMOS IC formed on an SOI or bulk semiconductor substrate. The composite transistor has a circuit transistor and a blocking transistor connected in series with a common gate connection. A body terminal of the blocking transistor is connected only to a source terminal thereof, and to no other connection point. The blocking transistor acts to prevent a single-event transient (SET) occurring in the circuit transistor from being coupled outside the composite transistor. Similarly, when a SET occurs in the blocking transistor, the circuit transistor prevents the SET from being coupled outside the composite transistor. N-type and P-type composite transistors can be used for each and every transistor in the CMOS IC to radiation harden the IC, and can be used to form inverters and transmission gates which are the building blocks of CMOS ICs.

  4. Peak holding circuit for extremely narrow pulses

    Science.gov (United States)

    Oneill, R. W. (Inventor)

    1975-01-01

    An improved pulse stretching circuit comprising: a high speed wide-band amplifier connected in a fast charge integrator configuration; a holding circuit including a capacitor connected in parallel with a discharging network which employs a resistor and an FET; and an output buffer amplifier. Input pulses of very short duration are applied to the integrator charging the capacitor to a value proportional to the input pulse amplitude. After a predetermined period of time, conventional circuitry generates a dump pulse which is applied to the gate of the FET making a low resistance path to ground which discharges the capacitor. When the dump pulse terminates, the circuit is ready to accept another pulse to be stretched. The very short input pulses are thus stretched in width so that they may be analyzed by conventional pulse height analyzers.

  5. Fractional-order RC and RL circuits

    KAUST Repository

    Radwan, Ahmed Gomaa

    2012-05-30

    This paper is a step forward to generalize the fundamentals of the conventional RC and RL circuits in fractional-order sense. The effect of fractional orders is the key factor for extra freedom, more flexibility, and novelty. The conditions for RC and RL circuits to act as pure imaginary impedances are derived, which are unrealizable in the conventional case. In addition, the sensitivity analyses of the magnitude and phase response with respect to all parameters showing the locations of these critical values are discussed. A qualitative revision for the fractional RC and RL circuits in the frequency domain is provided. Numerical and PSpice simulations are included to validate this study. © Springer Science+Business Media, LLC 2012.

  6. VHDL simulation of the implementation of a costfunction circuit

    OpenAIRE

    Imvidhaya, Ming

    1990-01-01

    Approved for public release; distribution unlimited. Since VHDL is a DoD standard hardware description language, it is widely used in the design of logic circuits at different levels. VHDL can be used to do behavioral modeling which is desirable in top-down system design. A cost function calculation in a graph partition algorithm is used here as an example to test the VHDL design methodology. Subroutines or statements in the software can be implemented into hardware if the subroutines or t...

  7. Equivalent Circuit Modeling of Hysteresis Motors

    Energy Technology Data Exchange (ETDEWEB)

    Nitao, J J; Scharlemann, E T; Kirkendall, B A

    2009-08-31

    We performed a literature review and found that many equivalent circuit models of hysteresis motors in use today are incorrect. The model by Miyairi and Kataoka (1965) is the correct one. We extended the model by transforming it to quadrature coordinates, amenable to circuit or digital simulation. 'Hunting' is an oscillatory phenomenon often observed in hysteresis motors. While several works have attempted to model the phenomenon with some partial success, we present a new complete model that predicts hunting from first principles.

  8. The algebraic theory of switching circuits

    CERN Document Server

    Moisil, G G

    1969-01-01

    The Algebraic Theory of Switching Circuits covers the application of various algebraic tools to the delineation of the algebraic theory of switching circuits for automation with contacts and relays.This book is organized into five parts encompassing 31 chapters. Part I deals with the principles and application of Boolean algebra and the theory of finite fields (Galois fields). Part II emphasizes the importance of the sequential operation of the automata and the variables associated to the current and to the contacts. This part also tackles the recurrence relations that describe operations of t

  9. Symbolic Analysis of OTRAs-Based Circuits

    Directory of Open Access Journals (Sweden)

    C. Sánchez-López

    2011-04-01

    Full Text Available A new nullor-based model to describe the behavior of Operational Transresistance Amplifiers (OTRAs is introduced.The new model is composed of four nullors and three grounded resistors. As a consequence, standard nodal analysiscan be applied to compute fully-symbolic small-signal characteristics of OTRA-based analog circuits, and the nullorbasedOTRAs model can be used in CAD tools. In this manner, the fully-symbolic transfer functions of severalapplication circuits, such as filters and oscillators can easily be approximated.

  10. Modeling digital switching circuits with linear algebra

    CERN Document Server

    Thornton, Mitchell A

    2014-01-01

    Modeling Digital Switching Circuits with Linear Algebra describes an approach for modeling digital information and circuitry that is an alternative to Boolean algebra. While the Boolean algebraic model has been wildly successful and is responsible for many advances in modern information technology, the approach described in this book offers new insight and different ways of solving problems. Modeling the bit as a vector instead of a scalar value in the set {0, 1} allows digital circuits to be characterized with transfer functions in the form of a linear transformation matrix. The use of transf

  11. RF microwave circuit design for wireless applications

    CERN Document Server

    Rohde, Ulrich L

    2012-01-01

    Provides researchers and engineers with a complete set of modeling, design, and implementation tools for tackling the newest IC technologies Revised and completely updated, RF/Microwave Circuit Design for Wireless Applications, Second Edition is a unique, state-of-the-art guide to wireless integrated circuit design that provides researchers and engineers with a complete set of modeling, design, and implementation tools for tackling even the newest IC technologies. It emphasizes practical design solutions for high-performance devices and circuitry, incorporating ample exa

  12. Data readout system utilizing photonic integrated circuit

    Energy Technology Data Exchange (ETDEWEB)

    Stopiński, S., E-mail: S.Stopinski@tue.nl [COBRA Research Institute, Eindhoven University of Technology (Netherlands); Institute of Microelectronics and Optoelectronics, Warsaw University of Technology (Poland); Malinowski, M.; Piramidowicz, R. [Institute of Microelectronics and Optoelectronics, Warsaw University of Technology (Poland); Smit, M.K.; Leijtens, X.J.M. [COBRA Research Institute, Eindhoven University of Technology (Netherlands)

    2013-10-11

    We describe a novel optical solution for data readout systems. The core of the system is an Indium-Phosphide photonic integrated circuit performing as a front-end readout unit. It functions as an optical serializer in which the serialization of the input signal is provided by means of on-chip optical delay lines. The circuit employs electro-optic phase shifters to build amplitude modulators, power splitters for signal distribution, semiconductor optical amplifiers for signal amplification as well as on-chip reflectors. We present the concept of the system, the design and first characterization results of the devices that were fabricated in a multi-project wafer run.

  13. Lumped elements for RF and microwave circuits

    CERN Document Server

    Bahl, Inder

    2003-01-01

    Due to the unprecedented growth in wireless applications over the past decade, development of low-cost solutions for RF and microwave communication systems has become of great importance. This practical new book is the first comprehensive treatment of lumped elements, which are playing a critical role in the development of the circuits that make these cost-effective systems possible. The books offers you an in-depth understanding of the different types of RF and microwave circuit elements, including inductors, capacitors, resistors, transformers, via holes, airbridges, and crossovers. Support

  14. Basic matrix algebra and transistor circuits

    CERN Document Server

    Zelinger, G

    1963-01-01

    Basic Matrix Algebra and Transistor Circuits deals with mastering the techniques of matrix algebra for application in transistors. This book attempts to unify fundamental subjects, such as matrix algebra, four-terminal network theory, transistor equivalent circuits, and pertinent design matters. Part I of this book focuses on basic matrix algebra of four-terminal networks, with descriptions of the different systems of matrices. This part also discusses both simple and complex network configurations and their associated transmission. This discussion is followed by the alternative methods of de

  15. Artwork Analysis Tools for VLSI Circuits.

    Science.gov (United States)

    1980-06-01

    derived frcm the art- work.i~nFo :.- Is zr Code DI t pecal Sculnfv CLA a uPICAT OP T0416 PA*6WM Dine Bftee AMA& -’M Artwork Analysis Tools for VLSI Circuits... code of the program and in pre-generated bit tables. The design rules thcmselves are not input directly into the checker. The rules were interpreted...circuit simulation is swich -level sintulation. In this type, transistors are modeled as switches that are either on or off. Fixed delays are a%.ociated

  16. RF and microwave coupled-line circuits

    CERN Document Server

    Mongia, R K; Bhartia, P; Hong, J; Gupta, K C

    2007-01-01

    This extensively revised edition of the 1999 Artech House classic, RF and Microwave Coupled-Line Circuits, offers you a thoroughly up-to-date understanding of coupled line fundamentals, explaining their applications in designing microwave and millimeter-wave components used in today's communications, microwave, and radar systems. The Second Edition includes a wealth of new material, particularly relating to applications. You find brand new discussions on a novel simple design technique for multilayer coupled circuits, high pass filters using coupled lines, software packages used for filter des

  17. Microwave filters and circuits contributions from Japan

    CERN Document Server

    Matsumoto, Akio

    1970-01-01

    Microwave Filters and Circuits: Contributions from Japan covers ideas and novel circuits used to design microwave filter that have been developed in Japan, as well as network theory into the field of microwave transmission networks. The book discusses the general properties and synthesis of transmission-line networks; transmission-line filters on the image-parameter basis; and experimental results on a class of transmission-line filter constructed only with commensurate TEM lossless transmission lines. The text describes lines constants, approximation problems in transmission-line networks, as

  18. Simplified design of micropower and battery circuits

    CERN Document Server

    Lenk, John

    1995-01-01

    'Simplified Design of Micropower and Battery Circuits' provides a simplified, step-by-step approach to micropower and supply cell circuit design. No previous experience in design is required to use the techniques described, thus making the book well suited for the beginner, student, or experimenter as well as the design professional.The book concentrates on the use of commercial micropower ICs by discussing selections of external components that modify the IC-package characteristics. The basic approach is to start design problems with approximations for trial-value components in expe

  19. Thermal rectification in nonlinear quantum circuits

    DEFF Research Database (Denmark)

    Ruokola, T.; Ojanen, T.; Jauho, Antti-Pekka

    2009-01-01

    We present a theoretical study of radiative heat transport in nonlinear solid-state quantum circuits. We give a detailed account of heat rectification effects, i.e., the asymmetry of heat current with respect to a reversal of the thermal gradient, in a system consisting of two reservoirs at finite...... temperatures coupled through a nonlinear resonator. We suggest an experimentally feasible superconducting circuit employing the Josephson nonlinearity to realize a controllable low-temperature heat rectifier with a maximal asymmetry of the order of 10%. We also discover a parameter regime where...

  20. Phase-controlled integrated photonic quantum circuits.

    Science.gov (United States)

    Smith, Brian J; Kundys, Dmytro; Thomas-Peter, Nicholas; Smith, P G R; Walmsley, I A

    2009-08-03

    Scalable photonic quantum technologies are based on multiple nested interferometers. To realize this architecture, integrated optical structures are needed to ensure stable, controllable, and repeatable operation. Here we show a key proof-of-principle demonstration of an externallycontrolled photonic quantum circuit based upon UV-written waveguide technology. In particular, we present non-classical interference of photon pairs in a Mach-Zehnder interferometer constructed with X couplers in an integrated optical circuit with a thermo-optic phase shifter in one of the interferometer arms.

  1. Printed-Circuit Cross-Slot Antenna

    Science.gov (United States)

    Foy, Wong; Chung, Hsien-Hsien; Peng, Sheng Y.

    1990-01-01

    Coupling between perpendicular slots suppressed. Balanced feed configuration minimizes coupling between slots of printed-circuit cross-slot antenna unit. Unit and array have conventional cavity-backed-printed-circuit, crossed-slot antenna design. Strip-line feeders behind planar conductive antenna element deliver power to horizontal slot in opposite phase. As result, little or no power propagates into vertical slot. Similar considerations apply to strip lines that feed vertical slot. Units of this type elements of phased-array antennas for radar, mobile/satellite communications, and other applications requiring flush mounting and/or rapid steering of beams with circular polarization.

  2. Resonant circuit model for efficient metamaterial absorber.

    Science.gov (United States)

    Sellier, Alexandre; Teperik, Tatiana V; de Lustrac, André

    2013-11-04

    The resonant absorption in a planar metamaterial is studied theoretically. We present a simple physical model describing this phenomenon in terms of equivalent resonant circuit. We discuss the role of radiative and dissipative damping of resonant mode supported by a metamaterial in the formation of absorption spectra. We show that the results of rigorous calculations of Maxwell equations can be fully retrieved with simple model describing the system in terms of equivalent resonant circuit. This simple model allows us to explain the total absorption effect observed in the system on a common physical ground by referring it to the impedance matching condition at the resonance.

  3. Analog circuit design art, science and personalities

    CERN Document Server

    Williams, Jim

    1991-01-01

    This book is far more than just another tutorial or reference guide - it's a tour through the world of analog design, combining theory and applications with the philosophies behind the design process. Readers will learn how leading analog circuit designers approach problems and how they think about solutions to those problems. They'll also learn about the `analog way' - a broad, flexible method of thinking about analog design tasks.A comprehensive and useful guide to analog theory and applications. Covers visualizing the operation of analog circuits. Looks at how to rap

  4. Built-in self test

    Science.gov (United States)

    Jansen, B.; Vandegoor, A. J.

    1988-11-01

    Because of the increasing complexity of digital circuits, it is becoming more and more difficult to determine whether a circuit is correct or faulty. Faults in a circuit can hardly be detected just by looking at the outside what the reaction of the circuit is to a certain input sequence. Fault tolerant computing can be a solution. Built-In Self Test (BIST) techniques can also be used to verify whether the circuit is correct, not only during normal operation, but also during the early development periods. The result of using BIST techniques is a considerable reduction of time between design and the final product, and a reduction of maintenance time and cost. BIST is a test method of which the circuit can separate itself from the surrounding logic, and perform a test. After the self test, the circuit reports to the surrounding logic whether it is correct. The advantage of BIST is that it is a universal and systematic test method with a solid mathematical foundation. Based on the stuck-at fault model, it is possible to compute the fault coverage, which is the number of faults detected by the BIST method. The theory of BIST is described. A circuit is divided into combinational and sequential parts, which are tested separately. The sequential parts are tested with a so-called scan-path test. Alternative test methods to test the combinational parts are described. The method to compute the number of patterns needed to detect all faults with a certain probability as function of complexity of the circuit is given. The theory of CRC signature analyzers, and the probability of masking are also described and illustrated with some examples, which can directly be used in practice.

  5. Mechanisms of hierarchical reinforcement learning in cortico-striatal circuits 2: evidence from fMRI.

    Science.gov (United States)

    Badre, David; Frank, Michael J

    2012-03-01

    The frontal lobes may be organized hierarchically such that more rostral frontal regions modulate cognitive control operations in caudal regions. In our companion paper (Frank MJ, Badre D. 2011. Mechanisms of hierarchical reinforcement learning in corticostriatal circuits I: computational analysis. 22:509-526), we provide novel neural circuit and algorithmic models of hierarchical cognitive control in cortico-striatal circuits. Here, we test key model predictions using functional magnetic resonance imaging (fMRI). Our neural circuit model proposes that contextual representations in rostral frontal cortex influence the striatal gating of contextual representations in caudal frontal cortex. Reinforcement learning operates at each level, such that the system adaptively learns to gate higher order contextual information into rostral regions. Our algorithmic Bayesian "mixture of experts" model captures the key computations of this neural model and provides trial-by-trial estimates of the learner's latent hypothesis states. In the present paper, we used these quantitative estimates to reanalyze fMRI data from a hierarchical reinforcement learning task reported in Badre D, Kayser AS, D'Esposito M. 2010. Frontal cortex and the discovery of abstract action rules. Neuron. 66:315--326. Results validate key predictions of the models and provide evidence for an individual cortico-striatal circuit for reinforcement learning of hierarchical structure at a specific level of policy abstraction. These findings are initially consistent with the proposal that hierarchical control in frontal cortex may emerge from interactions among nested cortico-striatal circuits at different levels of abstraction.

  6. Biocompatible circuit-breaker chip for thermal management of biomedical microsystems

    Science.gov (United States)

    Luo, Yi; Dahmardeh, Masoud; Takahata, Kenichi

    2015-05-01

    This paper presents a thermoresponsive micro circuit breaker for biomedical applications specifically targeted at electronic intelligent implants. The circuit breaker is micromachined to have a shape-memory-alloy cantilever actuator as a normally closed temperature-sensitive switch to protect the device of interest from overheating, a critical safety feature for smart implants including those that are electrothermally driven with wireless micro heaters. The device is fabricated in a size of 1.5  ×  2.0  ×  0.46 mm3 using biocompatible materials and a chip-based titanium package, exhibiting a nominal cold-state resistance of 14 Ω. The breaker rapidly enters the full open condition when the chip temperature exceeds 63 °C, temporarily breaking the circuit of interest to lower its temperature until chip temperature drops to 51 °C, at which the breaker closes the circuit to allow current to flow through it again, physically limiting the maximum temperature of the circuit. This functionality is tested in combination with a wireless resonant heater powered by radio-frequency electromagnetic radiation, demonstrating self-regulation of heater temperature. The developed circuit-breaker chip operates in a fully passive manner that removes the need for active sensor and circuitry to achieve temperature regulation in a target device, contributing to the miniaturization of biomedical microsystems including electronic smart implants where thermal management is essential.

  7. Application of the DRS4 chip for GHz waveform digitizing circuits

    Science.gov (United States)

    Yang, Hai-Bo; Su, Hong; Kong, Jie; Cheng, Ke; Chen, Jin-Da; Du, Cheng-Ming; Zhang, Jing-Zhe

    2015-05-01

    A new fast waveform sampling digitizing circuit based on the domino ring sampler (DRS), a switched capacitor array (SCA) chip, is presented in this paper, which is different from the traditional waveform digitizing circuit constructed with an analog to digital converter (ADC) or time to digital converter. A DRS4 chip is used as a core device in our circuit, which has a fast sampling rate up to five gigabit samples per second (GSPS). Quite satisfactory results are acquired by the preliminary performance test for this circuit board. Eight channels can be provided by one board, which has a 1 V input dynamic range for each channel. The circuit linearity is better than 0.1%, the noise is less than 0.5 mV (root mean square, RMS), and its time resolution is about 50 ps. Several boards can be cascaded to construct a multi-board system. The advantages of high resolution, low cost, low power dissipation, high channel density and small size make the circuit board useful not only for physics experiments, but also for other applications. Supported by National Natural Science Foundation of China (11305233), Specific Fund Research Based on Large-scale Science Instrument Facilities of China (2011YQ12009604)

  8. A study on thermoforming process of stretchable circuit and its performance in manufacturing of automotive lighting

    Science.gov (United States)

    Sharif, M. F. M.; Saad, A. A.; Abdullah, M. Z.; Ani, F. C.; Ali, M. Y. T.; Abdullah, M. K.; Ibrahim, M. S.; Ahmad, Z.

    2017-12-01

    This paper aims to study the effect of the thermoforming process on the assembly of a newly developed stretchable material for electric circuit and LEDs for manufacturing of automotive lighting. The thermoforming process was conducted using a mould developed based on commercially available automotive lighting product. The circuit was initially printed on a flat thermoplastic substrate using screen printing technique prior to the thermoforming process. The quality of the product was investigated before and after thermoforming process through quantitative measurement and visual inspection in terms of the circuit's resistivity and the electrical conductivity, respectively. The resistivity measurement was conducted by using four point probes instrument to compare the resistivity of the circuit which depends on stretch level of circuit and substrate during the thermoforming process. The stretch level was found to be different along the geometry due to the unsymmetrical geometry of the mould. The electrical conductivity of the circuit was also tested by LEDs illumination through power supply connection. This study shows promising results in applying thermoforming process in the fabrication of 3-dimensional shape product with lower cost equipment.

  9. Automated Design of Synthetic Cell Classifier Circuits Using a Two-Step Optimization Strategy.

    Science.gov (United States)

    Mohammadi, Pejman; Beerenwinkel, Niko; Benenson, Yaakov

    2017-02-22

    Cell classifiers are genetic logic circuits that transduce endogenous molecular inputs into cell-type-specific responses. Designing classifiers that achieve optimal differential response between specific cell types is a hard computational problem because it involves selection of endogenous inputs and optimization of both biochemical parameters and a logic function. To address this problem, we first derive an optimal set of biochemical parameters with the largest expected differential response over a diverse set of logic circuits, and second, we use these parameters in an evolutionary algorithm to select circuit inputs and optimize the logic function. Using this approach, we design experimentally feasible microRNA-based circuits capable of perfect discrimination for several real-world cell-classification tasks. We also find that under realistic cell-to-cell variation, circuit performance is comparable to standard cross-validation performance estimates. Our approach facilitates the generation of candidate circuits for experimental testing in therapeutic settings that require precise cell targeting, such as cancer therapy. Copyright © 2017 Elsevier Inc. All rights reserved.

  10. Energy and data conversion circuits for low power sensory systems

    Science.gov (United States)

    Ghosh, Suvradip

    converter hardware design is based on current-mode circuits and it was fabricated on a 0.5 mum CMOS process and tested. Experiment results show a lossless compression ratio of 1.52 and a near-lossless compression of 5.2 can be achieved for 32 x 32 pixel image.

  11. Integrated diode circuits for greater than 1 THz

    Science.gov (United States)

    Schoenthal, Gerhard Siegbert

    The terahertz frequency band, spanning from roughly 100 GHz to 10 THz, forms the transition from electronics to photonics. This band is often referred to as the "terahertz technology gap" because it lacks typical microwave and optical components. The deficit of terahertz devices makes it difficult to conduct important scientific measurements that are exclusive to this band in fields such as radio astronomy and chemical spectroscopy. In addition, a number of scientific, military and commercial applications will become more practical when a suitable terahertz technology is developed. UVa's Applied Electrophysics Laboratory has extended non-linear microwave diode technology into the terahertz region. Initial success was achieved with whisker-contacted diodes and then discrete planar Schottky diodes soldered onto quartz circuits. Work at UVa and the Jet Propulsion Laboratory succeeded in integrating this diode technology onto low dielectric substrates, thereby producing more practical components with greater yield and improved performance. However, the development of circuit integration technologies for greater than 1 THz and the development of broadly tunable sources of terahertz power remain as major research goals. Meeting these critical needs is the primary motivation for this research. To achieve this goal and demonstrate a useful prototype for one of our sponsors, this research project has focused on the development of a Sideband Generator at 1.6 THz. This component allows use of a fixed narrow band source as a tunable power source for terahertz spectroscopy and compact range radar. To prove the new fabrication and circuit technologies, initial devices were fabricated and tested at 200 and 600 GHz. These circuits included non-ohmic cathodes, air-bridged fingers, oxideless anode formation, and improved quartz integration processes. The excellent performance of these components validated these new concepts. The prototype process was then further optimized to

  12. Inter digital transducer modelling through Mason equivalent circuit model

    DEFF Research Database (Denmark)

    Mishra, Dipti; Singh, Abhishek; Hussain, Dil muhammed Akbar

    2016-01-01

    The frequency reliance of inter-digital transducer is analyzed with the help of MASON's Equivalent circuit which is based on Smith's Equivalent circuit which is further based on Foster's Network. An inter-digital transducer has been demonstrated as a RLC network. The circuit is simulated by Simul......The frequency reliance of inter-digital transducer is analyzed with the help of MASON's Equivalent circuit which is based on Smith's Equivalent circuit which is further based on Foster's Network. An inter-digital transducer has been demonstrated as a RLC network. The circuit is simulated...... by Simulation program with Integrated Circuit Emphasis (HSPICE), a well-liked electronic path simulator. The acoustic wave devices are not suitable to simulation through circuit simulator. In this paper, an electrical model of Mason's Equivalent electrical circuit for an inter-digital transducer (IDT...

  13. Synthesis for Negative Group Delay Circuits Using Distributed and Second-Order RC Circuit Configurations

    Science.gov (United States)

    Ahn, Kyoung-Pyo; Ishikawa, Ryo; Saitou, Akira; Honjo, Kazuhiko

    This paper describes the characteristic of negative group delay (NGD) circuits for various configurations including first-order, distributed, and second-order RC circuit configurations. This study includes locus, magnitude, and phase characteristics of the NGD circuits. The simplest NGD circuit is available using first-order RC or RL configuration. As an example of distributed circuit configuration, it is verified that losses in a distributed line causes NGD characteristic at higher cut-off band of a coupled four-line bandpass filter. Also, novel wideband NGD circuits using second-order RC configuration, instead of conventional RLC configuration, are proposed. Adding a parallel resistor to a parallel-T filter enables NGD characteristic to it. Also, a Wien-Robinson bridge is modified to have NGD characteristic by controlling the voltage division ratio. They are fabricated on MMIC substrate, and their NGD characteristics are verified with measured results. They have larger insertion loss than multi-stage RLC NGD circuits, however they can realize second-order NGD characteristic without practical implementation of inductors.

  14. The Induction of Chaos in Electronic Circuits Final Report-October 1, 2001

    Energy Technology Data Exchange (ETDEWEB)

    R.M.Wheat, Jr.

    2003-04-01

    This project, now known by the name ''Chaos in Electronic Circuits,'' was originally tasked as a two-year project to examine various ''fault'' or ''non-normal'' operational states of common electronic circuits with some focus on determining the feasibility of exploiting these states. Efforts over the two-year duration of this project have been dominated by the study of the chaotic behavior of electronic circuits. These efforts have included setting up laboratory space and hardware for conducting laboratory tests and experiments, acquiring and developing computer simulation and analysis capabilities, conducting literature surveys, developing test circuitry and computer models to exercise and test our capabilities, and experimenting with and studying the use of RF injection as a means of inducing chaotic behavior in electronics. An extensive array of nonlinear time series analysis tools have been developed and integrated into a package named ''After Acquisition'' (AA), including capabilities such as Delayed Coordinate Embedding Mapping (DCEM), Time Resolved (3-D) Fourier Transform, and several other phase space re-creation methods. Many computer models have been developed for Spice and for the ATP (Alternative Transients Program), modeling the several working circuits that have been developed for use in the laboratory. And finally, methods of induction of chaos in electronic circuits have been explored.

  15. Principles of transistor circuits introduction to the design of amplifiers, receivers and digital circuits

    CERN Document Server

    Amos, S W

    2013-01-01

    Principles of Transistor Circuits: Sixth Edition discusses the principles, concepts, and practices involved integrated circuits. The current edition includes up-to-date circuits, the section on thyristors has been revised to give more information on modern types, and dated information has been eliminated. The book covers related topics such as semiconductors and junction diodes; the principles behind transistors; and common amplifiers. The book also covers bias and DC stabilization; large-signal and small-signal AF amplifiers; DC and pulse amplifiers; sinusoidal oscillators; pulse and sawtooth

  16. The Influence of Vacuum Circuit Breakers and Different Motor Models on Switching Overvoltages in Motor Circuits

    Science.gov (United States)

    Wong, Cat S. M.; Snider, L. A.; Lo, Edward W. C.; Chung, T. S.

    Switching of induction motors with vacuum circuit breakers continues to be a concern. In this paper the influence on statistical overvoltages of the stochastic characteristics of vacuum circuit breakers, high frequency models of motors and transformers, and network characteristics, including cable lengths and network topology are evaluated and a general view of the overvoltages phenomena is presented. Finally, a real case study on the statistical voltage levels and risk-of-failure resulting from switching of a vacuum circuit breaker in an industrial installation in Hong Kong is presented.

  17. Estimating the short-circuit impedance

    DEFF Research Database (Denmark)

    Nielsen, Arne Hejde; Pedersen, Knud Ole Helgesen; Poulsen, Niels Kjølstad

    1997-01-01

    and current are derived each period, and the short-circuit impedance is estimated from variations in these components created by load changes in the grid. Due to the noisy and dynamic grid with high harmonic distortion it is necessary to threat the calculated values statistical. This is done recursively...

  18. Fuel Cell Equivalent Electric Circuit Parameter Mapping

    DEFF Research Database (Denmark)

    Jeppesen, Christian; Zhou, Fan; Andreasen, Søren Juhl

    In this work a simple model for a fuel cell is investigated for diagnostic purpose. The fuel cell is characterized, with respect to the electrical impedance of the fuel cell at non-faulty conditions and under variations in load current. Based on this the equivalent electrical circuit parameters can...

  19. Diode and Diode Circuits, a Programmed Text.

    Science.gov (United States)

    Balabanian, Norman; Kirwin, Gerald J.

    This programed text on diode and diode circuits was developed under contract with the United States Office of Education as Number 4 in a series of materials for use in an electrical engineering sequence. It is intended as a supplement to a regular text and other instructional material. (DH)

  20. Programmable delay circuit for sparker signal analysis

    Digital Repository Service at National Institute of Oceanography (India)

    Pathak, D.

    on it to classify the seafloor sediment properties. A specific purpose oriented programmable delay circuit was developed to generate the necessary delay so that the A/D conversion could start just before the arrival of the echo from the water bottom interface...