WorldWideScience

Sample records for superconducting integrated circuits

  1. Interconnect rise time in superconducting integrating circuits

    International Nuclear Information System (INIS)

    Preis, D.; Shlager, K.

    1988-01-01

    The influence of resistive losses on the voltage rise time of an integrated-circuit interconnection is reported. A distribution-circuit model is used to present the interconnect. Numerous parametric curves are presented based on numerical evaluation of the exact analytical expression for the model's transient response. For the superconducting case in which the series resistance of the interconnect approaches zero, the step-response rise time is longer but signal strength increases significantly

  2. High transition temperature superconducting integrated circuit

    International Nuclear Information System (INIS)

    DiIorio, M.S.

    1985-01-01

    This thesis describes the design and fabrication of the first superconducting integrated circuit capable of operating at over 10K. The primary component of the circuit is a dc SQUID (Superconducting QUantum Interference Device) which is extremely sensitive to magnetic fields. The dc SQUID consists of two superconductor-normal metal-superconductor (SNS) Josephson microbridges that are fabricated using a novel step-edge process which permits the use of high transition temperature superconductors. By utilizing electron-beam lithography in conjunction with ion-beam etching, very small microbridges can be produced. Such microbridges lead to high performance dc SQUIDs with products of the critical current and normal resistance reaching 1 mV at 4.2 K. These SQUIDs have been extensively characterized, and exhibit excellent electrical characteristics over a wide temperature range. In order to couple electrical signals into the SQUID in a practical fashion, a planar input coil was integrated for efficient coupling. A process was developed to incorporate the technologically important high transition temperature superconducting materials, Nb-Sn and Nb-Ge, using integrated circuit techniques. The primary obstacles were presented by the metallurgical idiosyncrasies of the various materials, such as the need to deposit the superconductors at elevated temperatures, 800-900 0 C, in order to achieve a high transition temperature

  3. Superconducting power distribution structure for integrated circuits

    International Nuclear Information System (INIS)

    Ruby, R.C.

    1991-01-01

    This patent describes a superconducting power distribution structure for an integrated circuit. It comprises a first superconducting capacitor plate; a second superconducting capacitor plate provided with electrical isolation means within the second capacitor plate; dielectric means separating the first capacitor plate from the second capacitor plate; first via means coupled at a first end to the first capacitor plate and extending through the dielectric and the electrical isolation means of the second capacitor plate; first contact means coupled to a second end of the first via means; and second contact means coupled to the second capacitor plate such that the first contact means and the second contact means are accessible from the same side of the second capacitor plate

  4. A new approach of optimization procedure for superconducting integrated circuits

    International Nuclear Information System (INIS)

    Saitoh, K.; Soutome, Y.; Tarutani, Y.; Takagi, K.

    1999-01-01

    We have developed and tested a new circuit simulation procedure for superconducting integrated circuits which can be used to optimize circuit parameters. This method reveals a stable operation region in the circuit parameter space in connection with the global bias margin by means of a contour plot of the global bias margin versus the circuit parameters. An optimal set of parameters with margins larger than these of the initial values has been found in the stable region. (author)

  5. Integrated digital superconducting logic circuits for the quantum synthesizer. Report

    International Nuclear Information System (INIS)

    Buchholz, F.I.; Kohlmann, J.; Khabipov, M.; Brandt, C.M.; Hagedorn, D.; Balashov, D.; Maibaum, F.; Tolkacheva, E.; Niemeyer, J.

    2006-11-01

    This report presents the results, which were reached in the framework of the BMBF cooperative plan ''Quantum Synthesizer'' in the partial plan ''Integrated Digital Superconducting Logic Circuits''. As essential goal of the plan a novel instrument on the base of quantum-coherent superconducting circuits should be developed. which allows to generate praxis-relevant wave forms with quantum accuracy, the quantum synthesizer. The main topics of development of the reported partial plan lied at the one hand in the development of integrated, digital, superconducting circuit in rapid-single-flux (RSFQ) quantum logics for the pattern generator of the quantum synthesizer, at the other hand in the further development of the fabrication technology for the aiming of high circuit complexity. In order to fulfil these requirements at the PTB a new design system was implemented, based on the software of Cadence. Together with the required RSFQ extensions for the design of digital superconducting circuits was a platform generated, on which the reachable circuit complexity is exclusively limited by the technology parameters of the available fabrication technology: Physical simulations are with PSCAN up to a complexity of more than 1000 circuit elements possible; furthermore VHDL allows the verification of arbitrarily large circuit architectures. In accordance for this the production line at the PTB was brought to a level, which allows in Nb/Al-Al x O y /Nb SIS technology implementation the fabrication of highly integrable RSFQ circuit architectures. The developed and fabricated basic circuits of the pattern generator have proved correct functionality and reliability in the measuring operation. Thereby for the circular RSFQ shift registers a key role as local memories in the construction of the pattern generator is devolved upon. The registers were realized with the aimed bit lengths up to 128 bit and with reachable signal-processing speeds of above 10 GHz. At the interface RSFQ

  6. Micromachined integrated quantum circuit containing a superconducting qubit

    Science.gov (United States)

    Brecht, Teresa; Chu, Yiwen; Axline, Christopher; Pfaff, Wolfgang; Blumoff, Jacob; Chou, Kevin; Krayzman, Lev; Frunzio, Luigi; Schoelkopf, Robert

    We demonstrate a functional multilayer microwave integrated quantum circuit (MMIQC). This novel hardware architecture combines the high coherence and isolation of three-dimensional structures with the advantages of integrated circuits made with lithographic techniques. We present fabrication and measurement of a two-cavity/one-qubit prototype, including a transmon coupled to a three-dimensional microwave cavity micromachined in a silicon wafer. It comprises a simple MMIQC with competitive lifetimes and the ability to perform circuit QED operations in the strong dispersive regime. Furthermore, the design and fabrication techniques that we have developed are extensible to more complex quantum information processing devices.

  7. 'Speedy' superconducting circuits

    International Nuclear Information System (INIS)

    Holst, T.

    1994-01-01

    The most promising concept for realizing ultra-fast superconducting digital circuits is the Rapid Single Flux Quantum (RSFQ) logic. The basic physical principle behind RSFQ logic, which include the storage and transfer of individual magnetic flux quanta in Superconducting Quantum Interference Devices (SQUIDs), is explained. A Set-Reset flip-flop is used as an example of the implementation of an RSFQ based circuit. Finally, the outlook for high-temperature superconducting materials in connection with RSFQ circuits is discussed in some details. (au)

  8. High-T /SUB c/ Superconducting integrated circuit: a dc SQUID with input coil

    International Nuclear Information System (INIS)

    Di Iorio, M.S.; Beasley, M.R.

    1985-01-01

    We have fabricated a high transition temperature superconducting integrated circuit consisting of a dc SQUID and an input coupling coil. The purpose is to ascertain the generic problems associated with constructing a high-T /SUB c/ circuit as well as to fabricate a high performance dc SQUID. The superconductor used for both the SQUID and the input coil is Nb 3 Sn which must be deposited at 800 0 C. Importantly, the insulator separating SQUID and input coil maintains its integrity at this elevated temperature. A hole in the insulator permits contact to the innermost winding of the coil. This contact has been achieved without significant degradation of the superconductivity. Consequently, the device operates over a wide temperature range, from below 4.2 K to near T /SUB c/

  9. Experimentally verified inductance extraction and parameter study for superconductive integrated circuit wires crossing ground plane holes

    International Nuclear Information System (INIS)

    Fourie, Coenrad J; Wetzstein, Olaf; Kunert, Juergen; Meyer, Hans-Georg; Toepfer, Hannes

    2013-01-01

    As the complexity of rapid single flux quantum (RSFQ) circuits increases, both current and power consumption of the circuits become important design criteria. Various new concepts such as inductive biasing for energy efficient RSFQ circuits and inductively coupled RSFQ cells for current recycling have been proposed to overcome increasingly severe design problems. Both of these techniques use ground plane holes to increase the inductance or coupling factor of superconducting integrated circuit wires. New design tools are consequently required to handle the new topographies. One important issue in such circuit design is the accurate calculation of networks of inductances even in the presence of finite holes in the ground plane. We show how a fast network extraction method using InductEx, which is a pre- and post-processor for the magnetoquasistatic field solver FastHenry, is used to calculate the inductances of a set of SQUIDs (superconducting quantum interference devices) with ground plane holes of different sizes. The results are compared to measurements of physical structures fabricated with the IPHT Jena 1 kA cm −2 RSFQ niobium process to verify accuracy. We then do a parameter study and derive empirical equations for fast and useful estimation of the inductance of wires surrounded by ground plane holes. We also investigate practical circuits and show excellent accuracy. (paper)

  10. Three-dimensional multi-terminal superconductive integrated circuit inductance extraction

    International Nuclear Information System (INIS)

    Fourie, Coenrad J; Wetzstein, Olaf; Kunert, Jürgen; Ortlepp, Thomas

    2011-01-01

    Accurate inductance calculations are critical for the design of both digital and analogue superconductive integrated circuits, and three-dimensional calculations are gaining importance with the advent of inductive biasing, inductive coupling and sky plane shielding for RSFQ cells. InductEx, an extraction programme based on the three-dimensional calculation software FastHenry, was proposed earlier. InductEx uses segmentation techniques designed to accurately model the geometries of superconductive integrated circuit structures. Inductance extraction for complex multi-terminal three-dimensional structures from current distributions calculated by FastHenry is discussed. Results for both a reflection plane modelling an infinite ground plane and a finite segmented ground plane that allows inductive elements to extend over holes in the ground plane are shown. Several SQUIDs were designed for and fabricated with IPHT's 1 kA cm −2 RSFQ1D niobium process. These SQUIDs implement a number of loop structures that span different layers, include vias, inductively coupled control lines and ground plane holes. We measured the loop inductance of these SQUIDs and show how the results are used to calibrate the layer parameters in InductEx and verify the extraction accuracy. We also show that, with proper modelling, FastHenry can be fast enough to be used for the extraction of typical RSFQ cell inductances.

  11. Superconducting quantum circuits theory and application

    OpenAIRE

    Deng, Xiuhao

    2015-01-01

    Superconducting quantum circuit models are widely used to understand superconducting devices. This thesis consists of four studies wherein the superconducting quantum circuit is used to illustrate challenges related to quantum information encoding and processing, quantum simulation, quantum signal detection and amplification.The existence of scalar Aharanov-Bohm phase has been a controversial topic for decades. Scalar AB phase, defined as time integral of electric potential, gives rises to a...

  12. Measurement of the Boltzmann constant by Johnson noise thermometry using a superconducting integrated circuit

    Science.gov (United States)

    Urano, C.; Yamazawa, K.; Kaneko, N.-H.

    2017-12-01

    We report on our measurement of the Boltzmann constant by Johnson noise thermometry (JNT) using an integrated quantum voltage noise source (IQVNS) that is fully implemented with superconducting integrated circuit technology. The IQVNS generates calculable pseudo white noise voltages to calibrate the JNT system. The thermal noise of a sensing resistor placed at the temperature of the triple point of water was measured precisely by the IQVNS-based JNT. We accumulated data of more than 429 200 s in total (over 6 d) and used the Akaike information criterion to estimate the fitting frequency range for the quadratic model to calculate the Boltzmann constant. Upon detailed evaluation of the uncertainty components, the experimentally obtained Boltzmann constant was k=1.380 6436× {{10}-23} J K-1 with a relative combined uncertainty of 10.22× {{10}-6} . The value of k is relatively -3.56× {{10}-6} lower than the CODATA 2014 value (Mohr et al 2016 Rev. Mod. Phys. 88 035009).

  13. Four-junction superconducting circuit

    Science.gov (United States)

    Qiu, Yueyin; Xiong, Wei; He, Xiao-Ling; Li, Tie-Fu; You, J. Q.

    2016-01-01

    We develop a theory for the quantum circuit consisting of a superconducting loop interrupted by four Josephson junctions and pierced by a magnetic flux (either static or time-dependent). In addition to the similarity with the typical three-junction flux qubit in the double-well regime, we demonstrate the difference of the four-junction circuit from its three-junction analogue, including its advantages over the latter. Moreover, the four-junction circuit in the single-well regime is also investigated. Our theory provides a tool to explore the physical properties of this four-junction superconducting circuit. PMID:27356619

  14. Superconducting quantum circuits theory and application

    Science.gov (United States)

    Deng, Xiuhao

    Superconducting quantum circuit models are widely used to understand superconducting devices. This thesis consists of four studies wherein the superconducting quantum circuit is used to illustrate challenges related to quantum information encoding and processing, quantum simulation, quantum signal detection and amplification. The existence of scalar Aharanov-Bohm phase has been a controversial topic for decades. Scalar AB phase, defined as time integral of electric potential, gives rises to an extra phase factor in wavefunction. We proposed a superconducting quantum Faraday cage to detect temporal interference effect as a consequence of scalar AB phase. Using the superconducting quantum circuit model, the physical system is solved and resulting AB effect is predicted. Further discussion in this chapter shows that treating the experimental apparatus quantum mechanically, spatial scalar AB effect, proposed by Aharanov-Bohm, can't be observed. Either a decoherent interference apparatus is used to observe spatial scalar AB effect, or a quantum Faraday cage is used to observe temporal scalar AB effect. The second study involves protecting a quantum system from losing coherence, which is crucial to any practical quantum computation scheme. We present a theory to encode any qubit, especially superconducting qubits, into a universal quantum degeneracy point (UQDP) where low frequency noise is suppressed significantly. Numerical simulations for superconducting charge qubit using experimental parameters show that its coherence time is prolong by two orders of magnitude using our universal degeneracy point approach. With this improvement, a set of universal quantum gates can be performed at high fidelity without losing too much quantum coherence. Starting in 2004, the use of circuit QED has enabled the manipulation of superconducting qubits with photons. We applied quantum optical approach to model coupled resonators and obtained a four-wave mixing toolbox to operate photons

  15. Fermionic models with superconducting circuits

    Energy Technology Data Exchange (ETDEWEB)

    Las Heras, Urtzi; Garcia-Alvarez, Laura; Mezzacapo, Antonio; Lamata, Lucas [University of the Basque Country UPV/EHU, Department of Physical Chemistry, Bilbao (Spain); Solano, Enrique [University of the Basque Country UPV/EHU, Department of Physical Chemistry, Bilbao (Spain); IKERBASQUE, Basque Foundation for Science, Bilbao (Spain)

    2015-12-01

    We propose a method for the efficient quantum simulation of fermionic systems with superconducting circuits. It consists in the suitable use of Jordan-Wigner mapping, Trotter decomposition, and multiqubit gates, be with the use of a quantum bus or direct capacitive couplings. We apply our method to the paradigmatic cases of 1D and 2D Fermi-Hubbard models, involving couplings with nearest and next-nearest neighbours. Furthermore, we propose an optimal architecture for this model and discuss the benchmarking of the simulations in realistic circuit quantum electrodynamics setups. (orig.)

  16. Superconducting flux flow digital circuits

    International Nuclear Information System (INIS)

    Martens, J.S.; Zipperian, T.E.; Hietala, V.M.; Ginley, D.S.; Tigges, C.P.; Phillips, J.M.; Siegal, M.P.

    1993-01-01

    The authors have developed a family of digital logic circuits based on superconducting flux flow transistors that show high speed, reasonable signal levels, large fan-out, and large noise margins. The circuits are made from high-temperature superconductors (HTS) and have been shown to operate at over 90 K. NOR gates have been demonstrated with fan-outs of more than 5 and fully loaded switching times less than a fixture-limited 50 ps. Ring-oscillator data suggest inverter delay times of about 40ps when using a 3-μm linewidths. Simple flip-flops have also been demonstrated showing large noise margins, response times of less than 30 ps, and static power dissipation on the order of 30 nW. Among other uses, this logic family is appropriate as an interface between logic families such as single flux quantum and conventional semiconductor logic

  17. Coherent defects in superconducting circuits

    International Nuclear Information System (INIS)

    Mueller, Clemens

    2011-01-01

    The interaction of superconducting circuits with additional quantum systems is a topic that has found extensive study in the recent past. In the limit where the added system are incoherent, this is the standard field of decoherence and the system dynamics can be described by a simple master equation. In the other limit however, when the additional parts are coherent, the resulting time-evolution can become more complicated. In this thesis we have investigated the interaction of superconducting circuits with coherent and incoherent two-level defects. We have shown theoretical calculations characterizing this interaction for all relevant parameter regimes. In the weak coupling limit, the interaction can be described in an effective bath picture, where the TLS act as parts of a large, decohering environment. For strong coupling, however, the coherent dynamics of the full coupled system has to be considered. We show the calculations of the coupled time-evolution and again characterize the interaction by an effective decoherence rate. We also used experimental data to characterize the microscopic origin of the defects and the details of their interaction with the circuits. The results obtained by analyzing spectroscopic data allow us to place strong constraint on several microscopic models for the observed TLS. However, these calculations are not yet fully conclusive as to the physical nature of the TLS. We propose additional experiments to fully characterize the interaction part of the Hamiltonian, thus providing the answer to the question of the physical origin of the coupling. Additionally we have developed a method to directly drive individual defect states via virtual excitation of the qubit. This method allows one to directly probe the properties of single TLS and possibly make use of their superior coherence times for quantum information purposes. The last part of this thesis provided a way for a possible implementation of geometric quantum computation in

  18. Traveling wave tube oscillator/amplifier with superconducting rf circuit

    International Nuclear Information System (INIS)

    Jasper, L.J. Jr.

    1989-01-01

    This patent describes a device comprising: an electron gun for producing an electron beam; a collector for collecting the electron beam; a vacuum housing surrounding the electron beam and having an integral slow wave circuit, the circuit being made from superconducting ceramic material; means for maintaining the temperature of the superconducting ceramic below its critical temperature; means for extracting an output signal from the slow wave circuit; means for creating a magnetic field within the vacuum housing so that interaction between the electron beam and the slow wave circuit produces the output signal

  19. Method of manufacturing Josephson junction integrated circuits

    International Nuclear Information System (INIS)

    Jillie, D.W. Jr.; Smith, L.N.

    1985-01-01

    Josephson junction integrated circuits of the current injection type and magnetically controlled type utilize a superconductive layer that forms both Josephson junction electrode for the Josephson junction devices on the integrated circuit as well as a ground plane for the integrated circuit. Large area Josephson junctions are utilized for effecting contact to lower superconductive layers and islands are formed in superconductive layers to provide isolation between the groudplane function and the Josephson junction electrode function as well as to effect crossovers. A superconductor-barrier-superconductor trilayer patterned by local anodization is also utilized with additional layers formed thereover. Methods of manufacturing the embodiments of the invention are disclosed

  20. Power operated contact apparatus for superconductive circuit

    Energy Technology Data Exchange (ETDEWEB)

    Woods, D.C.; Efferson, K.R.

    1989-10-10

    This patent describes a power operated contact apparatus for extending and retracting one or more electrical leads into and out of a cryostat for making and breaking, at a cryogenic temperature, electrical contact with a superconductive circuit. It comprises at least one rigid elongated lead for extending into a cold space of the cryostat which is at or near a cryogenic temperature. The lead having an inner end and a outer end; a connector fixed at the inner end of the lead for making electrical contact in the cold space with a connector of the superconductive circuit; guide means journaling the lead for allowing the lead to move axially relative to the guide means and sealing against the lead; a foundation for sealed attachment to the cryostat and to the guide means so that the connector on the inner end of the lead is extendable into making electrical contact with the connector of the superconductive circuit in the cold space; power operated means mounted on the foundation and fixed to the outer end of the lead for extending and retracting the lead to and from making electrical contact with the superconductive circuit in the cold space; and means for de-icing the exterior of the leads and guide means when the leads are connected to the superconducting circuit.

  1. Feedback control of superconducting quantum circuits

    NARCIS (Netherlands)

    Ristè, D.

    2014-01-01

    Superconducting circuits have recently risen to the forefront of the solid-state prototypes for quantum computing. Reaching the stage of robust quantum computing requires closing the loop between measurement and control of quantum bits (qubits). This thesis presents the realization of feedback

  2. Single-flux-quantum circuit technology for superconducting radiation detectors

    International Nuclear Information System (INIS)

    Fujimaki, Akira; Onogi, Masashi; Matsumoto, Tomohiro; Tanaka, Masamitsu; Sekiya, Akito; Hayakawa, Hisao; Yorozu, Shinichi; Terai, Hirotaka; Yoshikawa, Nobuyuki

    2003-01-01

    We discuss the application of the single-flux-quantum (SFQ) logic circuits to multi superconducting radiation detectors system. The SFQ-based analog-to-digital converters (ADCs) have the advantage in current sensitivity, which can reach less than 10 nA in a well-tuned ADC. We have also developed the design technology of the SFQ circuits. We demonstrate high-speed operation of large-scale integrated circuits such as a 2x2 cross/bar switch, arithmetic logic unit, indicating that our present SFQ technology is applicable to the multi radiation detectors system. (author)

  3. Quantum information processing with superconducting circuits: a review

    Science.gov (United States)

    Wendin, G.

    2017-10-01

    During the last ten years, superconducting circuits have passed from being interesting physical devices to becoming contenders for near-future useful and scalable quantum information processing (QIP). Advanced quantum simulation experiments have been shown with up to nine qubits, while a demonstration of quantum supremacy with fifty qubits is anticipated in just a few years. Quantum supremacy means that the quantum system can no longer be simulated by the most powerful classical supercomputers. Integrated classical-quantum computing systems are already emerging that can be used for software development and experimentation, even via web interfaces. Therefore, the time is ripe for describing some of the recent development of superconducting devices, systems and applications. As such, the discussion of superconducting qubits and circuits is limited to devices that are proven useful for current or near future applications. Consequently, the centre of interest is the practical applications of QIP, such as computation and simulation in Physics and Chemistry.

  4. LHC Report: superconducting circuit powering tests

    CERN Multimedia

    Mirko Pojer

    2015-01-01

    After the long maintenance and consolidation campaign carried out during LS1, the machine is getting ready to start operation with beam at 6.5 TeV… the physics community can’t wait! Prior to this, all hardware and software systems have to be tested to assess their correct and safe operation.   Most of the cold circuits (those with high current/stored energy) possess a sophisticated magnet protection system that is crucial to detect a transition of the coil from the superconducting to the normal state (a quench) and safely extract the energy stored in the circuits (about 1 GJ per dipole circuit at nominal current). LHC operation relies on 1232 superconducting dipoles with a field of up to 8.33 T operating in superfluid helium at 1.9 K, along with more than 500 superconducting quadrupoles operating at 4.2 or 1.9 K. Besides, many other superconducting and normal resistive magnets are used to guarantee the possibility of correcting all beam parameters, for a total of mo...

  5. Signal processing: opportunities for superconductive circuits

    International Nuclear Information System (INIS)

    Ralston, R.W.

    1985-01-01

    Prime motivators in the evolution of increasingly sophisticated communication and detection systems are the needs for handling ever wider signal bandwidths and higher data processing speeds. These same needs drive the development of electronic device technology. Until recently the superconductive community has been tightly focused on digital devices for high speed computers. The purpose of this paper is to describe opportunities and challenges which exist for both analog and digital devices in a less familiar area, that of wideband signal processing. The function and purpose of analog signal-processing components, including matched filters, correlators and Fourier transformers, will be described and examples of superconductive implementations given. A canonic signal-processing system is then configured using these components in combination with analog/digital converters and digital output circuits to highlight the important issues of dynamic range, accuracy and equivalent computation rate. Superconductive circuits hold promise for processing signals of 10-GHz bandwidth. Signal processing systems, however, can be properly designed and implemented only through a synergistic combination of the talents of device physicists, circuit designers, algorithm architects and system engineers. An immediate challenge to the applied superconductivity community is to begin sharing ideas with these other researchers

  6. The integration of cryogenic cooling systems with superconducting electronic systems

    International Nuclear Information System (INIS)

    Green, Michael A.

    2003-01-01

    The need for cryogenic cooling has been critical issue that has kept superconducting electronic devices from reaching the market place. Even though the performance of the superconducting circuit is superior to silicon electronics, the requirement for cryogenic cooling has put the superconducting devices at a disadvantage. This report will talk about the various methods for refrigerating superconducting devices. Cryocooler types will be compared for vibration, efficiency, and cost. Some solutions to specific problems of integrating cryocoolers to superconducting devices are presented.

  7. MOS integrated circuit design

    CERN Document Server

    Wolfendale, E

    2013-01-01

    MOS Integral Circuit Design aims to help in the design of integrated circuits, especially large-scale ones, using MOS Technology through teaching of techniques, practical applications, and examples. The book covers topics such as design equation and process parameters; MOS static and dynamic circuits; logic design techniques, system partitioning, and layout techniques. Also featured are computer aids such as logic simulation and mask layout, as well as examples on simple MOS design. The text is recommended for electrical engineers who would like to know how to use MOS for integral circuit desi

  8. Nonclassical correlations in superconducting circuits

    Energy Technology Data Exchange (ETDEWEB)

    Migliore, Rosanna [Dipartimento di Scienze Fisiche ed Astronomiche, Universita di Palermo (Italy); CNR-INFM, UdR CNISM di Palermo, Palermo (Italy); Scala, Matteo [Dipartimento di Scienze Fisiche ed Astronomiche, Universita di Palermo (Italy); Departamento de Optica, Facultad de Fisica, Universidad Complutense, Madrid (Spain); Guccione, Marina; Sanchez-Soto, Luis L. [Dipartimento di Scienze Fisiche ed Astronomiche, Universita di Palermo (Italy); Messina, Antonino [Departamento de Optica, Facultad de Fisica, Universidad Complutense, Madrid (Spain)

    2009-05-15

    A key step on the road map to solid-state quantum information processing (and to a deeper understanding of many counterintuitive aspects of quantum mechanics) is the generation and manipulation of nonclassical correlations between different quantum systems. Within this framework, we analyze the possibility of generating maximally entangled states in a system of two superconducting flux qubits, as well as the effectof their own environments on the entanglement dynamics. The analysis reported here confirms that the phenomena of sudden birth and sudden death of the entanglement do not depend on the particular measure of the entanglement adopted (copyright 2009 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim) (orig.)

  9. Multiplexing Superconducting Qubit Circuit for Single Microwave Photon Generation

    Science.gov (United States)

    George, R. E.; Senior, J.; Saira, O.-P.; Pekola, J. P.; de Graaf, S. E.; Lindström, T.; Pashkin, Yu A.

    2017-10-01

    We report on a device that integrates eight superconducting transmon qubits in λ /4 superconducting coplanar waveguide resonators fed from a common feedline. Using this multiplexing architecture, each resonator and qubit can be addressed individually, thus reducing the required hardware resources and allowing their individual characterisation by spectroscopic methods. The measured device parameters agree with the designed values, and the resonators and qubits exhibit excellent coherence properties and strong coupling, with the qubit relaxation rate dominated by the Purcell effect when brought in resonance with the resonator. Our analysis shows that the circuit is suitable for generation of single microwave photons on demand with an efficiency exceeding 80%.

  10. Quantum memristor in a superconducting circuit

    Science.gov (United States)

    Salmilehto, Juha; Sanz, Mikel; di Ventra, Massimiliano; Solano, Enrique

    Memristors, resistive elements that retain information of their past, have garnered interest due to their paradigm-changing potential in information processing and electronics. The emergent hysteretic behaviour allows for novel architectural applications and has recently been classically demonstrated in a simplified superconducting setup using the phase-dependent conductance in the tunnel-junction-microscopic model. In this contribution, we present a truly quantum model for a memristor constructed using established elements and techniques in superconducting nanoelectronics, and explore the parameters for feasible operation as well as refine the methods for quantifying the memory retention. In particular, the memristive behaviour is shown to arise from quasiparticle-induced tunneling in the full dissipative model and can be observed in the phase-driven tunneling current. The relevant hysteretic behaviour should be observable using current state-of-the-art measurements for detecting quasiparticle excitations. Our theoretical findings constitute the first quantum memristor in a superconducting circuit and act as the starting point for designing further circuit elements that have non-Markovian characteristics The authors acknowledge support from the CCQED EU project and the Finnish Cultural Foundation.

  11. Current distribution characteristics of superconducting parallel circuits

    International Nuclear Information System (INIS)

    Mori, K.; Suzuki, Y.; Hara, N.; Kitamura, M.; Tominaka, T.

    1994-01-01

    In order to increase the current carrying capacity of the current path of the superconducting magnet system, the portion of parallel circuits such as insulated multi-strand cables or parallel persistent current switches (PCS) are made. In superconducting parallel circuits of an insulated multi-strand cable or a parallel persistent current switch (PCS), the current distribution during the current sweep, the persistent mode, and the quench process were investigated. In order to measure the current distribution, two methods were used. (1) Each strand was surrounded with a pure iron core with the air gap. In the air gap, a Hall probe was located. The accuracy of this method was deteriorated by the magnetic hysteresis of iron. (2) The Rogowski coil without iron was used for the current measurement of each path in a 4-parallel PCS. As a result, it was shown that the current distribution characteristics of a parallel PCS is very similar to that of an insulated multi-strand cable for the quench process

  12. Silicon integrated circuit process

    International Nuclear Information System (INIS)

    Lee, Jong Duck

    1985-12-01

    This book introduces the process of silicon integrated circuit. It is composed of seven parts, which are oxidation process, diffusion process, ion implantation process such as ion implantation equipment, damage, annealing and influence on manufacture of integrated circuit and device, chemical vapor deposition process like silicon Epitaxy LPCVD and PECVD, photolithography process, including a sensitizer, spin, harden bake, reflection of light and problems related process, infrared light bake, wet-etch, dry etch, special etch and problems of etching, metal process like metal process like metal-silicon connection, aluminum process, credibility of aluminum and test process.

  13. Silicon integrated circuit process

    Energy Technology Data Exchange (ETDEWEB)

    Lee, Jong Duck

    1985-12-15

    This book introduces the process of silicon integrated circuit. It is composed of seven parts, which are oxidation process, diffusion process, ion implantation process such as ion implantation equipment, damage, annealing and influence on manufacture of integrated circuit and device, chemical vapor deposition process like silicon Epitaxy LPCVD and PECVD, photolithography process, including a sensitizer, spin, harden bake, reflection of light and problems related process, infrared light bake, wet-etch, dry etch, special etch and problems of etching, metal process like metal process like metal-silicon connection, aluminum process, credibility of aluminum and test process.

  14. Photonic Integrated Circuits

    Science.gov (United States)

    Krainak, Michael; Merritt, Scott

    2016-01-01

    Integrated photonics generally is the integration of multiple lithographically defined photonic and electronic components and devices (e.g. lasers, detectors, waveguides passive structures, modulators, electronic control and optical interconnects) on a single platform with nanometer-scale feature sizes. The development of photonic integrated circuits permits size, weight, power and cost reductions for spacecraft microprocessors, optical communication, processor buses, advanced data processing, and integrated optic science instrument optical systems, subsystems and components. This is particularly critical for small spacecraft platforms. We will give an overview of some NASA applications for integrated photonics.

  15. Circuit QED lattices: Towards quantum simulation with superconducting circuits

    Energy Technology Data Exchange (ETDEWEB)

    Schmidt, Sebastian [Institute for Theoretical Physics, ETH Zurich, 8093, Zurich (Switzerland); Koch, Jens [Department of Physics and Astronomy, Northwestern University, Evanston, IL, 60208 (United States)

    2013-06-15

    The Jaynes-Cummings model describes the coupling between photons and a single two-level atom in a simplified representation of light-matter interactions. In circuit QED, this model is implemented by combining microwave resonators and superconducting qubits on a microchip with unprecedented experimental control. Arranging qubits and resonators in the form of a lattice realizes a new kind of Hubbard model, the Jaynes-Cummings-Hubbard model, in which the elementary excitations are polariton quasi-particles. Due to the genuine openness of photonic systems, circuit QED lattices offer the possibility to study the intricate interplay of collective behavior, strong correlations and non-equilibrium physics. Thus, turning circuit QED into an architecture for quantum simulation, i.e., using a well-controlled system to mimic the intricate quantum behavior of another system too daunting for a theorist to tackle head-on, is an exciting idea which has served as theorists' playground for a while and is now also starting to catch on in experiments. This review gives a summary of the most recent theoretical proposals and experimental efforts. (copyright 2013 by WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim)

  16. An integrated circuit switch

    Science.gov (United States)

    Bonin, E. L.

    1969-01-01

    Multi-chip integrated circuit switch consists of a GaAs photon-emitting diode in close proximity with S1 phototransistor. A high current gain is obtained when the transistor has a high forward common-emitter current gain.

  17. Integrated circuit structure

    International Nuclear Information System (INIS)

    1981-01-01

    The invention describes the fabrication of integrated circuit structures, such as read-only memory components of field-effect transistors, which may be fabricated and then maintained in inventory, and later selectively modified in accordance with a desired pattern. It is claimed that MOS depletion-mode devices in accordance with the invention can be fabricated at lower cost and at higher yields. (U.K.)

  18. Integrated Circuit Immunity

    Science.gov (United States)

    Sketoe, J. G.; Clark, Anthony

    2000-01-01

    This paper presents a DOD E3 program overview on integrated circuit immunity. The topics include: 1) EMI Immunity Testing; 2) Threshold Definition; 3) Bias Tee Function; 4) Bias Tee Calibration Set-Up; 5) EDM Test Figure; 6) EMI Immunity Levels; 7) NAND vs. and Gate Immunity; 8) TTL vs. LS Immunity Levels; 9) TP vs. OC Immunity Levels; 10) 7805 Volt Reg Immunity; and 11) Seventies Chip Set. This paper is presented in viewgraph form.

  19. Integrated coincidence circuits

    International Nuclear Information System (INIS)

    Borejko, V.F.; Grebenyuk, V.M.; Zinov, V.G.

    1976-01-01

    The description is given of two coincidence units employing integral circuits in the VISHNYA standard. The units are distinguished for the coincidence selection element which is essentially a combination of a tunnel diode and microcircuits. The output fast response of the units is at least 90 MHz in the mode of the output signal unshaped in duration and 50 MHz minimum in the mode of the output signal shaping. The resolution time of the units is dependent upon the duration of input signals

  20. Conductus makes high-Tc integrated circuit

    International Nuclear Information System (INIS)

    Anon.

    1991-01-01

    This paper reports that researchers at Conductus have successfully demonstrated what the company says is the world's first integrated circuit containing active devices made from high-temperature superconductors. The circuit is a SQUID magnetometer made from seven layers of material: three layers of yttrium-barium-copper oxide, two layers of insulating material, a seed layer to create grain boundaries for the Josephson junctions, and a layer of silver for making electrical contact to the device. The chip also contains vias, or pathways that make a superconducting contact between the superconducting layers otherwise separated by insulators. Conductus had previously announced the development of a SQUID magnetometer that featured a SQUID sensor and a flux transformer manufactured on separate chips. What makes this achievement important is that the company was able to put both components on the same chip, thus creating a simple integrated circuit on a single chip. This is still a long way from conventional semiconductor technology, with as many as a million components per chip, or even the sophisticated low-Tc superconducting chips made by the Japanese, but the SQUID magnetometer demonstrates all the elements and techniques necessary to build more complex high-temperature superconductor integrated circuits, making this an important first step

  1. Semiconductor integrated circuits

    International Nuclear Information System (INIS)

    Michel, A.E.; Schwenker, R.O.; Ziegler, J.F.

    1979-01-01

    An improved method involving ion implantation to form non-epitaxial semiconductor integrated circuits. These are made by forming a silicon substrate of one conductivity type with a recessed silicon dioxide region extending into the substrate and enclosing a portion of the silicon substrate. A beam of ions of opposite conductivity type impurity is directed at the substrate at an energy and dosage level sufficient to form a first region of opposite conductivity within the silicon dioxide region. This impurity having a concentration peak below the surface of the substrate forms a region of the one conductivity type which extends from the substrate surface into the first opposite type region to a depth between the concentration peak and the surface and forms a second region of opposite conductivity type. The method, materials and ion beam conditions are detailed. Vertical bipolar integrated circuits can be made this way when the first opposite type conductivity region will function as a collector. Also circuits with inverted bipolar devices when this first region functions as a 'buried'' emitter region. (U.K.)

  2. Fabrication and characterization of aluminum airbridges for superconducting microwave circuits

    International Nuclear Information System (INIS)

    Chen, Zijun; Kelly, J.; Barends, R.; Bochmann, J.; Chen, Yu; Chiaro, B.; Dunsworth, A.; Jeffrey, E.; Mutus, J. Y.; O'Malley, P. J. J.; Neill, C.; Roushan, P.; Sank, D.; Vainsencher, A.; Wenner, J.; White, T. C.; Megrant, A.; Cleland, A. N.; Martinis, John M.

    2014-01-01

    Superconducting microwave circuits based on coplanar waveguides (CPW) are susceptible to parasitic slotline modes which can lead to loss and decoherence. We motivate the use of superconducting airbridges as a reliable method for preventing the propagation of these modes. We describe the fabrication of these airbridges on superconducting resonators, which we use to measure the loss due to placing airbridges over CPW lines. We find that the additional loss at single photon levels is small, and decreases at higher drive powers

  3. Integrated circuit cell library

    Science.gov (United States)

    Whitaker, Sterling R. (Inventor); Miles, Lowell H. (Inventor)

    2005-01-01

    According to the invention, an ASIC cell library for use in creation of custom integrated circuits is disclosed. The ASIC cell library includes some first cells and some second cells. Each of the second cells includes two or more kernel cells. The ASIC cell library is at least 5% comprised of second cells. In various embodiments, the ASIC cell library could be 10% or more, 20% or more, 30% or more, 40% or more, 50% or more, 60% or more, 70% or more, 80% or more, 90% or more, or 95% or more comprised of second cells.

  4. Nano integrated circuit process

    International Nuclear Information System (INIS)

    Yoon, Yung Sup

    2004-02-01

    This book contains nine chapters, which are introduction of manufacture of semiconductor chip, oxidation such as Dry-oxidation, wet oxidation, oxidation model and oxide film, diffusion like diffusion process, diffusion equation, diffusion coefficient and diffusion system, ion implantation, including ion distribution, channeling, multiimplantation and masking and its system, sputtering such as CVD and PVD, lithography, wet etch and dry etch, interconnection and flattening like metal-silicon connection, silicide, multiple layer metal process and flattening, an integrated circuit process, including MOSFET and CMOS.

  5. Linear integrated circuits

    CERN Document Server

    Carr, Joseph

    1996-01-01

    The linear IC market is large and growing, as is the demand for well trained technicians and engineers who understand how these devices work and how to apply them. Linear Integrated Circuits provides in-depth coverage of the devices and their operation, but not at the expense of practical applications in which linear devices figure prominently. This book is written for a wide readership from FE and first degree students, to hobbyists and professionals.Chapter 1 offers a general introduction that will provide students with the foundations of linear IC technology. From chapter 2 onwa

  6. Nano integrated circuit process

    Energy Technology Data Exchange (ETDEWEB)

    Yoon, Yung Sup

    2004-02-15

    This book contains nine chapters, which are introduction of manufacture of semiconductor chip, oxidation such as Dry-oxidation, wet oxidation, oxidation model and oxide film, diffusion like diffusion process, diffusion equation, diffusion coefficient and diffusion system, ion implantation, including ion distribution, channeling, multiimplantation and masking and its system, sputtering such as CVD and PVD, lithography, wet etch and dry etch, interconnection and flattening like metal-silicon connection, silicide, multiple layer metal process and flattening, an integrated circuit process, including MOSFET and CMOS.

  7. Superconducting push-pull flux quantum logic circuits

    International Nuclear Information System (INIS)

    Murphy, J.H.; Daniel, M.R.; Przybysz, J.X.

    1993-01-01

    A superconducting digital logic circuit is described comprising: a first circuit branch including first and second Josephson junctions electrically connected in series with each other; means for applying a positive bias voltage to a first end of said circuit branch; means for applying a negative bias voltage to a second end of said circuit branch; means for applying a first dual polarity input voltage signal to a first node in said circuit branch; and means for extracting a first output voltage signal from said first node in said circuit branch

  8. Entangled Coherent States Generation in two Superconducting LC Circuits

    International Nuclear Information System (INIS)

    Chen Meiyu; Zhang Weimin

    2008-01-01

    We proposed a novel pure electronic (solid state) device consisting of two superconducting LC circuits coupled to a superconducting flux qubit. The entangled coherent states of the two LC modes is generated through the measurement of the flux qubit states. The interaction of the flux qubit and two LC circuits is controlled by the external microwave control lines. The geometrical structure of the LC circuits is adjustable and makes a strong coupling between them achievable. This entangled coherent state generator can be realized by using the conventional microelectronic fabrication techniques which increases the feasibility of the experiment.

  9. A chopper circuit for energy transfer between superconducting magnets

    International Nuclear Information System (INIS)

    Onishi, Toshitada; Tateishi, Hiroshi; Takeda, Masatoshi; Matsuura, Toshiaki; Nakatani, Toshio.

    1986-01-01

    It has been suggested that superconducting magnets could provide a medium for storing energy and supplying the large energy pulses needed by experimental nuclear-fusion equipment and similar loads. Based on this concept, tests on energy transfer between superconducting magnets are currently being conducted at the Agency of Industrial Science and Technology's Electrotechnical Laboratory. Mitsubishi Electric has pioneered the world's first chopper circuit for this application. The circuit has the advantages of being simple and permitting high-speed, bipolar energy transfer. The article describes this circuit and its testing. (author)

  10. Thermionic integrated circuits: electronics for hostile environments

    International Nuclear Information System (INIS)

    Lynn, D.K.; McCormick, J.B.; MacRoberts, M.D.J.; Wilde, D.K.; Dooley, G.R.; Brown, D.R.

    1985-01-01

    Thermionic integrated circuits combine vacuum tube technology with integrated circuit techniques to form integrated vacuum triode circuits. These circuits are capable of extended operation in both high-temperature and high-radiation environments

  11. Microwave integrated circuit for Josephson voltage standards

    Science.gov (United States)

    Holdeman, L. B.; Toots, J.; Chang, C. C. (Inventor)

    1980-01-01

    A microwave integrated circuit comprised of one or more Josephson junctions and short sections of microstrip or stripline transmission line is fabricated from thin layers of superconducting metal on a dielectric substrate. The short sections of transmission are combined to form the elements of the circuit and particularly, two microwave resonators. The Josephson junctions are located between the resonators and the impedance of the Josephson junctions forms part of the circuitry that couples the two resonators. The microwave integrated circuit has an application in Josephson voltage standards. In this application, the device is asymmetrically driven at a selected frequency (approximately equal to the resonance frequency of the resonators), and a d.c. bias is applied to the junction. By observing the current voltage characteristic of the junction, a precise voltage, proportional to the frequency of the microwave drive signal, is obtained.

  12. Integrated coherent matter wave circuits

    International Nuclear Information System (INIS)

    Ryu, C.; Boshier, M. G.

    2015-01-01

    An integrated coherent matter wave circuit is a single device, analogous to an integrated optical circuit, in which coherent de Broglie waves are created and then launched into waveguides where they can be switched, divided, recombined, and detected as they propagate. Applications of such circuits include guided atom interferometers, atomtronic circuits, and precisely controlled delivery of atoms. We report experiments demonstrating integrated circuits for guided coherent matter waves. The circuit elements are created with the painted potential technique, a form of time-averaged optical dipole potential in which a rapidly moving, tightly focused laser beam exerts forces on atoms through their electric polarizability. Moreover, the source of coherent matter waves is a Bose-Einstein condensate (BEC). Finally, we launch BECs into painted waveguides that guide them around bends and form switches, phase coherent beamsplitters, and closed circuits. These are the basic elements that are needed to engineer arbitrarily complex matter wave circuitry

  13. Transistor and integrated circuit manufacture

    International Nuclear Information System (INIS)

    Colman, D.

    1978-01-01

    This invention relates to the manufacture of transistors and integrated circuits by ion bombardment techniques and is particularly, but not exclusively, of value in the manufacture of so-called integrated injection logic circuitry. (author)

  14. Transistor and integrated circuit manufacture

    Energy Technology Data Exchange (ETDEWEB)

    Colman, D

    1978-09-27

    This invention relates to the manufacture of transistors and integrated circuits by ion bombardment techniques and is particularly, but not exclusively, of value in the manufacture of so-called integrated injection logic circuitry.

  15. Implementing quantum optics with parametrically driven superconducting circuits

    Science.gov (United States)

    Aumentado, Jose

    Parametric coupling has received much attention, in part because it forms the core of many low-noise amplifiers in superconducting quantum information experiments. However, parametric coupling in superconducting circuits is, as a general rule, simple to generate and forms the basis of a methodology for interacting microwave fields at different frequencies. In the quantum regime, this has important consequences, allowing relative novices to do experiments in superconducting circuits today that were previously heroic efforts in quantum optics and cavity-QED. In this talk, I'll give an overview of some of our work demonstrating parametric coupling within the context of circuit-QED as well as some of the possibilities this concept creates in our field.

  16. Superconducting Multilayer High-Density Flexible Printed Circuit Board for Very High Thermal Resistance Interconnections

    Science.gov (United States)

    de la Broïse, Xavier; Le Coguie, Alain; Sauvageot, Jean-Luc; Pigot, Claude; Coppolani, Xavier; Moreau, Vincent; d'Hollosy, Samuel; Knarosovski, Timur; Engel, Andreas

    2018-05-01

    We have successively developed two superconducting flexible PCBs for cryogenic applications. The first one is monolayer, includes 552 tracks (10 µm wide, 20 µm spacing), and receives 24 wire-bonded integrated circuits. The second one is multilayer, with one track layer between two shielding layers interconnected by microvias, includes 37 tracks, and can be interconnected at both ends by wire bonding or by connectors. The first cold measurements have been performed and show good performances. The novelty of these products is, for the first one, the association of superconducting materials with very narrow pitch and bonded integrated circuits and, for the second one, the introduction of a superconducting multilayer structure interconnected by vias which is, to our knowledge, a world-first.

  17. Secure integrated circuits and systems

    CERN Document Server

    Verbauwhede, Ingrid MR

    2010-01-01

    On any advanced integrated circuit or 'system-on-chip' there is a need for security. In many applications the actual implementation has become the weakest link in security rather than the algorithms or protocols. The purpose of the book is to give the integrated circuits and systems designer an insight into the basics of security and cryptography from the implementation point of view. As a designer of integrated circuits and systems it is important to know both the state-of-the-art attacks as well as the countermeasures. Optimizing for security is different from optimizations for speed, area,

  18. Integrated circuit cooled turbine blade

    Science.gov (United States)

    Lee, Ching-Pang; Jiang, Nan; Um, Jae Y.; Holloman, Harry; Koester, Steven

    2017-08-29

    A turbine rotor blade includes at least two integrated cooling circuits that are formed within the blade that include a leading edge circuit having a first cavity and a second cavity and a trailing edge circuit that includes at least a third cavity located aft of the second cavity. The trailing edge circuit flows aft with at least two substantially 180-degree turns at the tip end and the root end of the blade providing at least a penultimate cavity and a last cavity. The last cavity is located along a trailing edge of the blade. A tip axial cooling channel connects to the first cavity of the leading edge circuit and the penultimate cavity of the trailing edge circuit. At least one crossover hole connects the penultimate cavity to the last cavity substantially near the tip end of the blade.

  19. Quantum interference in heterogeneous superconducting-photonic circuits on a silicon chip.

    Science.gov (United States)

    Schuck, C; Guo, X; Fan, L; Ma, X; Poot, M; Tang, H X

    2016-01-21

    Quantum information processing holds great promise for communicating and computing data efficiently. However, scaling current photonic implementation approaches to larger system size remains an outstanding challenge for realizing disruptive quantum technology. Two main ingredients of quantum information processors are quantum interference and single-photon detectors. Here we develop a hybrid superconducting-photonic circuit system to show how these elements can be combined in a scalable fashion on a silicon chip. We demonstrate the suitability of this approach for integrated quantum optics by interfering and detecting photon pairs directly on the chip with waveguide-coupled single-photon detectors. Using a directional coupler implemented with silicon nitride nanophotonic waveguides, we observe 97% interference visibility when measuring photon statistics with two monolithically integrated superconducting single-photon detectors. The photonic circuit and detector fabrication processes are compatible with standard semiconductor thin-film technology, making it possible to implement more complex and larger scale quantum photonic circuits on silicon chips.

  20. Variational integrators for electric circuits

    International Nuclear Information System (INIS)

    Ober-Blöbaum, Sina; Tao, Molei; Cheng, Mulin; Owhadi, Houman; Marsden, Jerrold E.

    2013-01-01

    In this contribution, we develop a variational integrator for the simulation of (stochastic and multiscale) electric circuits. When considering the dynamics of an electric circuit, one is faced with three special situations: 1. The system involves external (control) forcing through external (controlled) voltage sources and resistors. 2. The system is constrained via the Kirchhoff current (KCL) and voltage laws (KVL). 3. The Lagrangian is degenerate. Based on a geometric setting, an appropriate variational formulation is presented to model the circuit from which the equations of motion are derived. A time-discrete variational formulation provides an iteration scheme for the simulation of the electric circuit. Dependent on the discretization, the intrinsic degeneracy of the system can be canceled for the discrete variational scheme. In this way, a variational integrator is constructed that gains several advantages compared to standard integration tools for circuits; in particular, a comparison to BDF methods (which are usually the method of choice for the simulation of electric circuits) shows that even for simple LCR circuits, a better energy behavior and frequency spectrum preservation can be observed using the developed variational integrator

  1. Optimization of the powering tests of the LHC superconducting circuits

    CERN Document Server

    Bellesia, B; Denz, R; Fernandez-Robles, C; Pojer, M; Saban, R; Schmidt, R; Solfaroli Camillocci, M; Thiesen, H; Vergara Fernández, A

    2010-01-01

    The Large Hadron Collider has (LHC) 1572 superconducting circuits which are distributed along the eight 3.5 km LHC sectors [1]. Time and resources during the commissioning of the LHC technical systems were mostly consumed by the powering tests of each circuit. The tests consisted in carrying out several powering cycles at different current levels for each superconducting circuit. The Hardware Commissioning Coordination was in charge of planning, following up and piloting the execution of the test program. The first powering test campaign was carried out in summer 2007 for sector 7-8 with an expected duration of 12 weeks. The experience gained during these tests was used by the commissioning team for minimising the duration of the following powering campaigns to comply with the stringent LHC project deadlines. Improvements concerned several areas: strategy, procedures, control tools, automatization, and resource allocation led to an average daily test rate increase from 25 to 200 tests per day. This paper desc...

  2. High Q-factor tunable superconducting HF circuit

    CERN Document Server

    Vopilkin, E A; Pavlov, S A; Ponomarev, L I; Ganitsev, A Y; Zhukov, A S; Vladimirov, V V; Letyago, A G; Parshikov, V V

    2001-01-01

    Feasibility of constructing a high Q-factor (Q approx 10 sup 5) mechanically tunable in a wide range of frequencies (12-63 MHz) vibration circuit of HF range was considered. The tunable circuit integrates two single circuits made using YBaCuO films. The circuit frequency is tuned by changing distance X (capacity) between substrates. Potentiality of using substrates of lanthanum aluminate, neodymium gallate and strontium titanate for manufacture of single circuits was considered. Q-factor of the circuit amounted to 68000 at resonance frequency of 6.88 MHz

  3. High Q-factor tunable superconducting HF circuit

    International Nuclear Information System (INIS)

    Vopilkin, E.A.; Parafin, A.E.; Pavlov, S.A.; Ponomarev, L.I.; Ganitsev, A.Yu.; Zhukov, A.S.; Vladimirov, V.V.; Letyago, A.G.; Parshikov, V.V.

    2001-01-01

    Feasibility of constructing a high Q-factor (Q ∼ 10 5 ) mechanically tunable in a wide range of frequencies (12-63 MHz) vibration circuit of HF range was considered. The tunable circuit integrates two single circuits made using YBaCuO films. The circuit frequency is tuned by changing distance X (capacity) between substrates. Potentiality of using substrates of lanthanum aluminate, neodymium gallate and strontium titanate for manufacture of single circuits was considered. Q-factor of the circuit amounted to 68000 at resonance frequency of 6.88 MHz [ru

  4. Integrated Optical Circuit Engineering

    Science.gov (United States)

    Sriram, S.

    1985-04-01

    Implementation of single-mode optical fiber systems depends largely on the availability of integrated optical components for such functions as switching, multiplexing, and modulation. The technology of integrated optics is maturing very rapidly, and its growth justifies the optimism that now exists in the optical community.

  5. Application of NMR circuit for superconducting magnet using signal averaging

    International Nuclear Information System (INIS)

    Yamada, R.; Ishimoto, H.; Shea, M.F.; Schmidt, E.E.; Borer, K.

    1977-01-01

    An NMR circuit was used to measure the absolute field values of Fermilab Energy Doubler magnets up to 44 kG. A signal averaging method to improve the S/N ratio was implemented by means of a Tektronix Digital Processing Oscilloscope, followed by the development of an inexpensive microprocessor based system contained in a NIM module. Some of the data obtained from measuring two superconducting dipole magnets are presented

  6. Vertically Integrated Circuits at Fermilab

    International Nuclear Information System (INIS)

    Deptuch, Grzegorz; Demarteau, Marcel; Hoff, James; Lipton, Ronald; Shenai, Alpana; Trimpl, Marcel; Yarema, Raymond; Zimmerman, Tom

    2009-01-01

    The exploration of the vertically integrated circuits, also commonly known as 3D-IC technology, for applications in radiation detection started at Fermilab in 2006. This paper examines the opportunities that vertical integration offers by looking at various 3D designs that have been completed by Fermilab. The emphasis is on opportunities that are presented by through silicon vias (TSV), wafer and circuit thinning and finally fusion bonding techniques to replace conventional bump bonding. Early work by Fermilab has led to an international consortium for the development of 3D-IC circuits for High Energy Physics. The consortium has submitted over 25 different designs for the Fermilab organized MPW run organized for the first time.

  7. The interplay of superconducting quantum circuits and propagating microwave states

    Energy Technology Data Exchange (ETDEWEB)

    Goetz, Jan

    2017-06-26

    Superconducting circuit quantum electrodynamics (QED) has developed into a powerful platform for studying the interaction between matter and different states of light. In this context, superconducting quantum bits (qubits) act as artificial atoms interacting with quantized modes of the electromagnetic field. The field can be trapped in superconducting microwave resonators or propagating in transmission lines. In this thesis, we particularly study circuit QED systems where microwave fields are coupled with superconducting flux and transmon qubits. We optimize the coherence properties of the resonators, by analyzing loss mechanisms at excitation powers of approximately one photon on average. We find that two-level fluctuators associated with oxide layers at substrate and metal surfaces and metal-metal interfaces represent the predominant loss channel. Furthermore, we show how broadband thermal photon fields influence the relaxation and dephasing properties of a superconducting transmon qubit. To this end, we study several second-order loss channels of the transmon qubit and find that the broadband fields introduce a larger decay rate than expected from the Purcell filter defined by the resonator. Additionally, we show that qubit dephasing at the flux-insensitive point as well as low-frequency parameter fluctuations can be enhanced by thermal fields. Finally, we study how artificial atoms react to changes in inherent properties of the light fields. We perform a detailed analysis of the photon statistics of thermal fields using their relation to the qubits coherence properties. We quantitatively recover the expected n{sup 2} + n-law for the photon number variance and confirm this result by direct correlation measurements. We then show a novel technique for the in-situ conversion of the interaction parity in light-matter interaction. To this end, we couple spatially controlled microwave fields to a flux qubit with two degrees of freedom.

  8. The interplay of superconducting quantum circuits and propagating microwave states

    International Nuclear Information System (INIS)

    Goetz, Jan

    2017-01-01

    Superconducting circuit quantum electrodynamics (QED) has developed into a powerful platform for studying the interaction between matter and different states of light. In this context, superconducting quantum bits (qubits) act as artificial atoms interacting with quantized modes of the electromagnetic field. The field can be trapped in superconducting microwave resonators or propagating in transmission lines. In this thesis, we particularly study circuit QED systems where microwave fields are coupled with superconducting flux and transmon qubits. We optimize the coherence properties of the resonators, by analyzing loss mechanisms at excitation powers of approximately one photon on average. We find that two-level fluctuators associated with oxide layers at substrate and metal surfaces and metal-metal interfaces represent the predominant loss channel. Furthermore, we show how broadband thermal photon fields influence the relaxation and dephasing properties of a superconducting transmon qubit. To this end, we study several second-order loss channels of the transmon qubit and find that the broadband fields introduce a larger decay rate than expected from the Purcell filter defined by the resonator. Additionally, we show that qubit dephasing at the flux-insensitive point as well as low-frequency parameter fluctuations can be enhanced by thermal fields. Finally, we study how artificial atoms react to changes in inherent properties of the light fields. We perform a detailed analysis of the photon statistics of thermal fields using their relation to the qubits coherence properties. We quantitatively recover the expected n 2 + n-law for the photon number variance and confirm this result by direct correlation measurements. We then show a novel technique for the in-situ conversion of the interaction parity in light-matter interaction. To this end, we couple spatially controlled microwave fields to a flux qubit with two degrees of freedom.

  9. 3D integrated superconducting qubits

    Science.gov (United States)

    Rosenberg, D.; Kim, D.; Das, R.; Yost, D.; Gustavsson, S.; Hover, D.; Krantz, P.; Melville, A.; Racz, L.; Samach, G. O.; Weber, S. J.; Yan, F.; Yoder, J. L.; Kerman, A. J.; Oliver, W. D.

    2017-10-01

    As the field of quantum computing advances from the few-qubit stage to larger-scale processors, qubit addressability and extensibility will necessitate the use of 3D integration and packaging. While 3D integration is well-developed for commercial electronics, relatively little work has been performed to determine its compatibility with high-coherence solid-state qubits. Of particular concern, qubit coherence times can be suppressed by the requisite processing steps and close proximity of another chip. In this work, we use a flip-chip process to bond a chip with superconducting flux qubits to another chip containing structures for qubit readout and control. We demonstrate that high qubit coherence (T1, T2,echo > 20 μs) is maintained in a flip-chip geometry in the presence of galvanic, capacitive, and inductive coupling between the chips.

  10. Microcontroller based Integrated Circuit Tester

    OpenAIRE

    Yousif Taha Yousif Elamin; Abdelrasoul Jabar Alzubaidi

    2015-01-01

    The digital integrated circuit (IC) tester is implemented by using the ATmega32 microcontroller . The microcontroller processes the inputs and outputs and displays the results on a Liquid Crystal Display (LCD). The basic function of the digital IC tester is to test a digital IC for correct logical functioning as described in the truth table and/or function table. The designed model can test digital ICs having 14 pins. Since it is programmable, any number of ICs can be tested . Thi...

  11. Refractory silicides for integrated circuits

    International Nuclear Information System (INIS)

    Murarka, S.P.

    1980-01-01

    Transition metal silicides have, in the past, attracted attention because of their usefulness as high temperature materials and in integrated circuits as Schottky barrier and ohmic contacts. More recently, with the increasing silicon integrated circuits (SIC) packing density, the line widths get narrower and the sheet resistance contribution to the RC delay increases. The possibility of using low resistivity silicides, which can be formed directly on the polysilicon, makes these silicides highly attractive. The usefulness of a silicide metallization scheme for integrated circuits depends, not only on the desired low resistivity, but also on the ease with which the silicide can be formed and patterned and on the stability of the silicides throughout device processing and during actual device usage. In this paper, various properties and the formation techniques of the silicides have been reviewed. Correlations between the various properties and the metal or silicide electronic or crystallographic structure have been made to predict the more useful silicides for SIC applications. Special reference to the silicide resistivity, stress, and oxidizability during the formation and subsequent processing has been given. Various formation and etching techniques are discussed

  12. Atomic physics and quantum optics using superconducting circuits.

    Science.gov (United States)

    You, J Q; Nori, Franco

    2011-06-29

    Superconducting circuits based on Josephson junctions exhibit macroscopic quantum coherence and can behave like artificial atoms. Recent technological advances have made it possible to implement atomic-physics and quantum-optics experiments on a chip using these artificial atoms. This Review presents a brief overview of the progress achieved so far in this rapidly advancing field. We not only discuss phenomena analogous to those in atomic physics and quantum optics with natural atoms, but also highlight those not occurring in natural atoms. In addition, we summarize several prospective directions in this emerging interdisciplinary field.

  13. Integrated circuits, and design and manufacture thereof

    Science.gov (United States)

    Auracher, Stefan; Pribbernow, Claus; Hils, Andreas

    2006-04-18

    A representation of a macro for an integrated circuit layout. The representation may define sub-circuit cells of a module. The module may have a predefined functionality. The sub-circuit cells may include at least one reusable circuit cell. The reusable circuit cell may be configured such that when the predefined functionality of the module is not used, the reusable circuit cell is available for re-use.

  14. Large impedances and Majorana bound states in superconducting circuits

    International Nuclear Information System (INIS)

    Ulrich, Jascha

    2017-01-01

    Superconducting circuits offer the opportunity to study quantum mechanics on mesoscopic scales unimpeded by dissipation. This fact and the nonlinearity of the Josephson inductance make it possible to use superconducting circuits as artificial atoms whose long-lived states can be selectively addressed and studied. A pronounced nonlinearity of the energy spectrum, however, requires quantum fluctuations of the flux across the Josephson junction which are large on the scale of the superconducting flux quantum Φ Q =h/2e. This implies charge fluctuations below the single Cooper-pair limit via flux-charge duality. The localization of charge leads to a strong susceptibility to interactions with charges in the environment which has motivated the search for schemes to decouple charges from their environment. This thesis is concerned with theoretical challenges arising from two complementary approaches to this problem: the realization of large impedances and the fractionalization of electrons by means of Majorana bound states. In recent years, the decoupling of charges from the environment through reactive large impedances, so-called ''superinductances'' L, has attracted much interest. These inductances feature small parasitic capacitance C such that the characteristic impedance √(L/C) is much larger than the superconducting resistance quantum R Q =h/4e 2 . Superinductances have various applications ranging from qubit designs such as the 0-π qubit or the fluxonium to impedance matching, Bloch oscillations and the stabilization of phase slips in superconducting nanowires. Although there exists a well-established formalism for the quantization of superconducting circuits in terms of node fluxes, this formalism is ill-suited for the description of fast flux transport with localized charges in large-impedance environments. In particular, the nonlinear capacitive behavior of phase slip junctions cannot be modeled in a straightforward way using node fluxes

  15. Lumped element modelling of superconducting circuits with SPICE

    CERN Document Server

    Baveco, Maurice Antoine

    2015-01-01

    In this project research is carried out aimed at benchmarking a general-purpose circuit simulation software tool (”SPICE”). The project lasted for 8 weeks, from 29 June 2015 until 21 August 2015 at Performance Evaluation section at CERN. The goal was to apply it on a model of superconducting magnets, namely the main dipole circuit (RB circuit) of the the LHC (Large Hadron Collider), developed by members of the section. Then the strengths and the flaws of the tool were investigated. Transient effects were the main simulation focus point. In the first stage a simplified RB circuit was modelled in SPICE based on subcircuits. The first results were promising but still not with a perfect agreement. After implementing more detailed subcircuits there is an improvement and promising agreement achieved between SPICE and the results of the paper (PSpice) [2]. In general there are more strengths than drawbacks of simulating with SPICE. For example, it should have a shorter simulation time than PSpice for the same mo...

  16. A voltage biased superconducting quantum interference device bootstrap circuit

    International Nuclear Information System (INIS)

    Xie Xiaoming; Wang Huiwu; Wang Yongliang; Dong Hui; Jiang Mianheng; Zhang Yi; Krause, Hans-Joachim; Braginski, Alex I; Offenhaeusser, Andreas; Mueck, Michael

    2010-01-01

    We present a dc superconducting quantum interference device (SQUID) readout circuit operating in the voltage bias mode and called a SQUID bootstrap circuit (SBC). The SBC is an alternative implementation of two existing methods for suppression of room-temperature amplifier noise: additional voltage feedback and current feedback. Two circuit branches are connected in parallel. In the dc SQUID branch, an inductively coupled coil connected in series provides the bias current feedback for enhancing the flux-to-current coefficient. The circuit branch parallel to the dc SQUID branch contains an inductively coupled voltage feedback coil with a shunt resistor in series for suppressing the preamplifier noise current by increasing the dynamic resistance. We show that the SBC effectively reduces the preamplifier noise to below the SQUID intrinsic noise. For a helium-cooled planar SQUID magnetometer with a SQUID inductance of 350 pH, a flux noise of about 3 μΦ 0 Hz -1/2 and a magnetic field resolution of less than 3 fT Hz -1/2 were obtained. The SBC leads to a convenient direct readout electronics for a dc SQUID with a wider adjustment tolerance than other feedback schemes.

  17. Electron commutator on integrated circuits

    International Nuclear Information System (INIS)

    Demidenko, V.V.

    1975-01-01

    The scheme and the parameters of an electron 16-channel contactless commutator based entirely on integrated circuits are described. The device consists of a unit of analog keys based on field-controlled metal-insulator-semiconductor (m.i.s.) transistors, operation amplifier comparators controlling these keys, and a level distributor. The distributor is based on a ''matrix'' scheme and comprises two ring-shaped shift registers plugged in series and a decoder base on two-input logical elements I-NE. The principal dynamical parameters of the circuit are as follows: the control signal delay in the distributor. 50 nsec; the total channel switch-over time, 500-600 nsec. The commutator transmits both constant signals and pulses whose duration reaches tens of nsec. The commutator can be used in data acquisition and processing systems, for shaping complicated signals (for example), (otherwise signals), for simultaneous oscillographing of several signals, and so forth [ru

  18. Superconductive magnet having shim coils and quench protection circuits

    International Nuclear Information System (INIS)

    Schwall, R.E.

    1987-01-01

    A superconductive magnet is described comprising: a first persistent current loop comprising a first superconductor and a main coil connected to the first superconductor, the main coil being operative in response to superconduction therein to generate a primary magnetic field; a second persistent current loop comprising a second superconductor and a shim coil connected thereto, the shim coil being operative in response to superconduction therein to generate a corrective field for correcting aberrations in a predetermined gradient in the primary magnetic field, the shim coil having fewer turns than the main coil and being inductively coupled therewith whereby small changes in the current in the main coil cause much greater changes in the current in the shim coil. The magnet is characterized by an improvement which consists of: a first heater connected across the second persistent loop in parallel with the shim coil, the first heater being normally inoperative to carry current while the shim coil and the second superconductor are superconducting, the first heater being operative in response to current therein to heat the shim coil to a resistive state; and protective circuit means comprising a second heater connected to the main coil for carrying current from the main coil upon quenching of the main coil, the second heater being disposed in thermal contact with the second superconductor to heat the second superconductor to a resistive state in response to the current from the main coil to thereby divert current in the second persistent loop through the second heater causing it to heat the shim coil to a resistive state and resistively dissipate energy therein

  19. One-way quantum computing in superconducting circuits

    Science.gov (United States)

    Albarrán-Arriagada, F.; Alvarado Barrios, G.; Sanz, M.; Romero, G.; Lamata, L.; Retamal, J. C.; Solano, E.

    2018-03-01

    We propose a method for the implementation of one-way quantum computing in superconducting circuits. Measurement-based quantum computing is a universal quantum computation paradigm in which an initial cluster state provides the quantum resource, while the iteration of sequential measurements and local rotations encodes the quantum algorithm. Up to now, technical constraints have limited a scalable approach to this quantum computing alternative. The initial cluster state can be generated with available controlled-phase gates, while the quantum algorithm makes use of high-fidelity readout and coherent feedforward. With current technology, we estimate that quantum algorithms with above 20 qubits may be implemented in the path toward quantum supremacy. Moreover, we propose an alternative initial state with properties of maximal persistence and maximal connectedness, reducing the required resources of one-way quantum computing protocols.

  20. INTEGRATED SENSOR EVALUATION CIRCUIT AND METHOD FOR OPERATING SAID CIRCUIT

    OpenAIRE

    Krüger, Jens; Gausa, Dominik

    2015-01-01

    WO15090426A1 Sensor evaluation device and method for operating said device Integrated sensor evaluation circuit for evaluating a sensor signal (14) received from a sensor (12), having a first connection (28a) for connection to the sensor and a second connection (28b) for connection to the sensor. The integrated sensor evaluation circuit comprises a configuration data memory (16) for storing configuration data which describe signal properties of a plurality of sensor control signals (26a-c). T...

  1. Graphene radio frequency receiver integrated circuit.

    Science.gov (United States)

    Han, Shu-Jen; Garcia, Alberto Valdes; Oida, Satoshi; Jenkins, Keith A; Haensch, Wilfried

    2014-01-01

    Graphene has attracted much interest as a future channel material in radio frequency electronics because of its superior electrical properties. Fabrication of a graphene integrated circuit without significantly degrading transistor performance has proven to be challenging, posing one of the major bottlenecks to compete with existing technologies. Here we present a fabrication method fully preserving graphene transistor quality, demonstrated with the implementation of a high-performance three-stage graphene integrated circuit. The circuit operates as a radio frequency receiver performing signal amplification, filtering and downconversion mixing. All circuit components are integrated into 0.6 mm(2) area and fabricated on 200 mm silicon wafers, showing the unprecedented graphene circuit complexity and silicon complementary metal-oxide-semiconductor process compatibility. The demonstrated circuit performance allow us to use graphene integrated circuit to perform practical wireless communication functions, receiving and restoring digital text transmitted on a 4.3-GHz carrier signal.

  2. Scaling of graphene integrated circuits.

    Science.gov (United States)

    Bianchi, Massimiliano; Guerriero, Erica; Fiocco, Marco; Alberti, Ruggero; Polloni, Laura; Behnam, Ashkan; Carrion, Enrique A; Pop, Eric; Sordan, Roman

    2015-05-07

    The influence of transistor size reduction (scaling) on the speed of realistic multi-stage integrated circuits (ICs) represents the main performance metric of a given transistor technology. Despite extensive interest in graphene electronics, scaling efforts have so far focused on individual transistors rather than multi-stage ICs. Here we study the scaling of graphene ICs based on transistors from 3.3 to 0.5 μm gate lengths and with different channel widths, access lengths, and lead thicknesses. The shortest gate delay of 31 ps per stage was obtained in sub-micron graphene ROs oscillating at 4.3 GHz, which is the highest oscillation frequency obtained in any strictly low-dimensional material to date. We also derived the fundamental Johnson limit, showing that scaled graphene ICs could be used at high frequencies in applications with small voltage swing.

  3. Integrated Circuit Electromagnetic Immunity Handbook

    Science.gov (United States)

    Sketoe, J. G.

    2000-08-01

    This handbook presents the results of the Boeing Company effort for NASA under contract NAS8-98217. Immunity level data for certain integrated circuit parts are discussed herein, along with analytical techniques for applying the data to electronics systems. This handbook is built heavily on the one produced in the seventies by McDonnell Douglas Astronautics Company (MDAC, MDC Report E1929 of 1 August 1978, entitled Integrated Circuit Electromagnetic Susceptibility Handbook, known commonly as the ICES Handbook, which has served countless systems designers for over 20 years). Sections 2 and 3 supplement the device susceptibility data presented in section 4 by presenting information on related material required to use the IC susceptibility information. Section 2 concerns itself with electromagnetic susceptibility analysis and serves as a guide in using the information contained in the rest of the handbook. A suggested system hardening requirements is presented in this chapter. Section 3 briefly discusses coupling and shielding considerations. For conservatism and simplicity, a worst case approach is advocated to determine the maximum amount of RF power picked up from a given field. This handbook expands the scope of the immunity data in this Handbook is to of 10 MHz to 10 GHz. However, the analytical techniques provided are applicable to much higher frequencies as well. It is expected however, that the upper frequency limit of concern is near 10 GHz. This is due to two factors; the pickup of microwave energy on system cables and wiring falls off as the square of the wavelength, and component response falls off at a rapid rate due to the effects of parasitic shunt paths for the RF energy. It should be noted also that the pickup on wires and cables does not approach infinity as the frequency decreases (as would be expected by extrapolating the square law dependence of the high frequency roll-off to lower frequencies) but levels off due to mismatch effects.

  4. Design of analog integrated circuits and systems

    CERN Document Server

    Laker, Kenneth R

    1994-01-01

    This text is designed for senior or graduate level courses in analog integrated circuits or design of analog integrated circuits. This book combines consideration of CMOS and bipolar circuits into a unified treatment. Also included are CMOS-bipolar circuits made possible by BiCMOS technology. The text progresses from MOS and bipolar device modelling to simple one and two transistor building block circuits. The final two chapters present a unified coverage of sample-data and continuous-time signal processing systems.

  5. Hybdrid integral circuit for proportional chambers

    International Nuclear Information System (INIS)

    Yanik, R.; Khudy, M.; Povinets, P.; Strmen', P.; Grabachek, Z.; Feshchenko, A.A.

    1978-01-01

    Outlined briefly are a hybrid integrated circuit of the channel. One channel contains an input amplifier, delay circuit, and memory register on the base of the D-type flip-flop and controlled by the recording gate pulse. Provided at the output of the channel is a readout gating circuit. Presented are the flowsheet of the channel, the shaper amplifier and logical channel. At present the logical circuit was accepted for manufacture

  6. A Fault Tolerant Integrated Circuit Memory

    OpenAIRE

    Barton, Anthony Francis

    1980-01-01

    Most commercially produced integrated circuits are incapable of tolerating manufacturing defects. The area and function of the circuits is thus limited by the probability of faults occurring within the circuit. This thesis examines techniques for using redundancy in memory circuits to provide fault tolerance and to increase storage capacity. A hierarchical memory architecture using multiple Hamming codes is introduced and analysed to determine its resistance to manufa...

  7. Integrated circuit and method of arbitration in a network on an integrated circuit.

    NARCIS (Netherlands)

    2011-01-01

    The invention relates to an integrated circuit and to a method of arbitration in a network on an integrated circuit. According to the invention, a method of arbitration in a network on an integrated circuit is provided, the network comprising a router unit, the router unit comprising a first input

  8. Post irradiation effects (PIE) in integrated circuits

    International Nuclear Information System (INIS)

    Barnes, C.E.; Shaw, D.C.; Fleetwood, D.M.; Winokur, P.S.

    1992-01-01

    Post Irradiation Effects (PIE) ranging from normal recovery catastrophic failure have been observed in integrated circuits during the PIE period. These variations indicate that a rebound or PIE recipe used for radiation hardness assurance must be chosen with care. In this paper, the authors provide examples of PIE in a variety of integrated circuits of importance to spacecraft electronics

  9. Active components for integrated plasmonic circuits

    DEFF Research Database (Denmark)

    Krasavin, A.V.; Bolger, P.M.; Zayats, A.V.

    2009-01-01

    We present a comprehensive study of highly efficient and compact passive and active components for integrated plasmonic circuit based on dielectric-loaded surface plasmon polariton waveguides.......We present a comprehensive study of highly efficient and compact passive and active components for integrated plasmonic circuit based on dielectric-loaded surface plasmon polariton waveguides....

  10. Integrated optical circuit comprising a polarization convertor

    NARCIS (Netherlands)

    1998-01-01

    An integrated optical circuit includes a first device and a second device, which devices are connected by a polarization convertor. The polarization convertor includes a curved section of a waveguide, integrated in the optical circuit. The curved section may have several differently curved

  11. The Software Reliability of Large Scale Integration Circuit and Very Large Scale Integration Circuit

    OpenAIRE

    Artem Ganiyev; Jan Vitasek

    2010-01-01

    This article describes evaluation method of faultless function of large scale integration circuits (LSI) and very large scale integration circuits (VLSI). In the article there is a comparative analysis of factors which determine faultless of integrated circuits, analysis of already existing methods and model of faultless function evaluation of LSI and VLSI. The main part describes a proposed algorithm and program for analysis of fault rate in LSI and VLSI circuits.

  12. Realizing a Circuit Analog of an Optomechanical System with Longitudinally Coupled Superconducting Resonators

    OpenAIRE

    Eichler, C.; Petta, J. R.

    2017-01-01

    We realize a superconducting circuit analog of the generic cavity-optomechanical Hamiltonian by longitudinally coupling two superconducting resonators, which are an order of magnitude different in frequency. We achieve longitudinal coupling by embedding a superconducting quantum interference device (SQUID) into a high frequency resonator, making its resonance frequency depend on the zero point current fluctuations of a nearby low frequency LC-resonator. By employing sideband drive fields we e...

  13. Radiation-hardened CMOS integrated circuits

    International Nuclear Information System (INIS)

    Derbenwick, G.F.; Hughes, R.C.

    1977-01-01

    Electronic circuits that operate properly after exposure to ionizing radiation are necessary for nuclear weapon systems, satellites, and apparatus designed for use in radiation environments. The program to develop and theoretically model radiation-tolerant integrated circuit components has resulted in devices that show an improvement in hardness up to a factor of ten thousand over earlier devices. An inverter circuit produced functions properly after an exposure of 10 6 Gy (Si) which, as far as is known, is the record for an integrated circuit

  14. Phase-controlled coherent population trapping in superconducting quantum circuits

    International Nuclear Information System (INIS)

    Cheng Guang-Ling; Wang Yi-Ping; Chen Ai-Xi

    2015-01-01

    We investigate the influences of the-applied-field phases and amplitudes on the coherent population trapping behavior in superconducting quantum circuits. Based on the interactions of the microwave fields with a single Δ-type three-level fluxonium qubit, the coherent population trapping could be obtainable and it is very sensitive to the relative phase and amplitudes of the applied fields. When the relative phase is tuned to 0 or π, the maximal atomic coherence is present and coherent population trapping occurs. While for the choice of π/2, the atomic coherence becomes weak. Meanwhile, for the fixed relative phase π/2, the value of coherence would decrease with the increase of Rabi frequency of the external field coupled with two lower levels. The responsible physical mechanism is quantum interference induced by the control fields, which is indicated in the dressed-state representation. The microwave coherent phenomenon is present in our scheme, which will have potential applications in optical communication and nonlinear optics in solid-state devices. (paper)

  15. Digitized adiabatic quantum computing with a superconducting circuit.

    Science.gov (United States)

    Barends, R; Shabani, A; Lamata, L; Kelly, J; Mezzacapo, A; Las Heras, U; Babbush, R; Fowler, A G; Campbell, B; Chen, Yu; Chen, Z; Chiaro, B; Dunsworth, A; Jeffrey, E; Lucero, E; Megrant, A; Mutus, J Y; Neeley, M; Neill, C; O'Malley, P J J; Quintana, C; Roushan, P; Sank, D; Vainsencher, A; Wenner, J; White, T C; Solano, E; Neven, H; Martinis, John M

    2016-06-09

    Quantum mechanics can help to solve complex problems in physics and chemistry, provided they can be programmed in a physical device. In adiabatic quantum computing, a system is slowly evolved from the ground state of a simple initial Hamiltonian to a final Hamiltonian that encodes a computational problem. The appeal of this approach lies in the combination of simplicity and generality; in principle, any problem can be encoded. In practice, applications are restricted by limited connectivity, available interactions and noise. A complementary approach is digital quantum computing, which enables the construction of arbitrary interactions and is compatible with error correction, but uses quantum circuit algorithms that are problem-specific. Here we combine the advantages of both approaches by implementing digitized adiabatic quantum computing in a superconducting system. We tomographically probe the system during the digitized evolution and explore the scaling of errors with system size. We then let the full system find the solution to random instances of the one-dimensional Ising problem as well as problem Hamiltonians that involve more complex interactions. This digital quantum simulation of the adiabatic algorithm consists of up to nine qubits and up to 1,000 quantum logic gates. The demonstration of digitized adiabatic quantum computing in the solid state opens a path to synthesizing long-range correlations and solving complex computational problems. When combined with fault-tolerance, our approach becomes a general-purpose algorithm that is scalable.

  16. Test and Diagnosis of Integrated Circuits

    OpenAIRE

    Bosio , Alberto

    2015-01-01

    The ever-increasing growth of the semiconductor market results in an increasing complexity of digital circuits. Smaller, faster, cheaper and low-power consumption are the main challenges in semiconductor industry. The reduction of transistor size and the latest packaging technology (i.e., System-On-a-Chip, System-In-Package, Trough Silicon Via 3D Integrated Circuits) allows the semiconductor industry to satisfy the latest challenges. Although producing such advanced circuits can benefit users...

  17. An analog integrated circuit design laboratory

    OpenAIRE

    Mondragon-Torres, A.F.; Mayhugh, Jr.; Pineda de Gyvez, J.; Silva-Martinez, J.; Sanchez-Sinencio, E.

    2003-01-01

    We present the structure of an analog integrated circuit design laboratory to instruct at both, senior undergraduate and entry graduate levels. The teaching material includes: a laboratory manual with analog circuit design theory, pre-laboratory exercises and circuit design specifications; a reference web page with step by step instructions and examples; the use of mathematical tools for automation and analysis; and state of the art CAD design tools in use by industry. Upon completion of the ...

  18. Reverse engineering of integrated circuits

    Science.gov (United States)

    Chisholm, Gregory H.; Eckmann, Steven T.; Lain, Christopher M.; Veroff, Robert L.

    2003-01-01

    Software and a method therein to analyze circuits. The software comprises several tools, each of which perform particular functions in the Reverse Engineering process. The analyst, through a standard interface, directs each tool to the portion of the task to which it is most well suited, rendering previously intractable problems solvable. The tools are generally used iteratively to produce a successively more abstract picture of a circuit, about which incomplete a priori knowledge exists.

  19. Semiconductors integrated circuit design for manufacturability

    CERN Document Server

    Balasinki, Artur

    2011-01-01

    Because of the continuous evolution of integrated circuit manufacturing (ICM) and design for manufacturability (DfM), most books on the subject are obsolete before they even go to press. That's why the field requires a reference that takes the focus off of numbers and concentrates more on larger economic concepts than on technical details. Semiconductors: Integrated Circuit Design for Manufacturability covers the gradual evolution of integrated circuit design (ICD) as a basis to propose strategies for improving return-on-investment (ROI) for ICD in manufacturing. Where most books put the spotl

  20. Silicon integrated circuits part A : supplement 2

    CERN Document Server

    Kahng, Dawon

    1981-01-01

    Applied Solid State Science, Supplement 2: Silicon Integrated Circuits, Part A focuses on MOS device physics. This book is divided into three chapters-physics of the MOS transistor; nonvolatile memories; and properties of silicon-on-sapphire substrates devices, and integrated circuits. The topics covered include the short channel effects, MOSFET structures, floating gate devices, technology for nonvolatile semiconductor memories, sapphire substrates, and SOS integrated circuits and systems. The MOS capacitor, MIOS devices, and SOS process and device technology are also deliberated. This public

  1. A new integrated microwave SQUID circuit design

    International Nuclear Information System (INIS)

    Erne, S.N.; Finnegan, T.F.

    1980-01-01

    In this paper we consider the design and operation of a planar thin-film rf-SQUID circuit which can be realized via microwave-integrated-circuit (MIC) techniques and which differs substantially from pervious microwave SQUID configurations involving either mechanical point-contact or cylindrical thin-film micro-bridge geometries. (orig.)

  2. Latch-up in CMOS integrated circuits

    International Nuclear Information System (INIS)

    Estreich, D.B.; Dutton, R.W.

    1978-04-01

    An analysis is presented of latch-up in CMOS integrated circuits. A latch-up prediction algorithm has been developed and used to evaluate methods to control latch-up. Experimental verification of the algorithm is demonstrated

  3. LC Quadrature Generation in Integrated Circuits

    DEFF Research Database (Denmark)

    Christensen, Kåre Tais

    2001-01-01

    Today quadrature signals for IQ demodulation are provided through RC polyphase networks, quadrature oscillators or double frequency VCOs. This paper presents a new method for generating quadrature signals in integrated circuits using only inductors and capacitors. This LC quadrature generation...

  4. Lateral power transistors in integrated circuits

    CERN Document Server

    Erlbacher, Tobias

    2014-01-01

    This book details and compares recent advancements in the development of novel lateral power transistors (LDMOS devices) for integrated circuits in power electronic applications. It includes the state-of-the-art concept of double-acting RESURF topologies.

  5. A superconducting supercollider calorimeter photomultiplier tube preamplifier circuit

    Energy Technology Data Exchange (ETDEWEB)

    Panescu, D; Lackey, J; Robl, P; Smith, W H [Wisconsin Univ., Madison, WI (United States). Physics Dept.

    1992-07-15

    This study presents the design of the front end amplifier for a scintillator calorimeter with photomultiplier tube (PMT) readout. The design is based on analytical computations and SPICE simulations, and is checked against tests performed on a prototyped circuit. We were looking to achieve (1) a very low droop within the 4 ns after the integration of the photomultiplier tube (PMT) signal was completed, (2) a very low noise figure for the whole amplifier in a 100 MHz bandwidth, (3) an input impedance optimized for the PMT which is actually used, (4) baseline restoration as quick as possible at the output of the clip amps, (5) no loss of information due to the saturation at intermediary stages (e.g. integrator), and (6) an output driving 100 {Omega} twisted pair cables, or 50 {Omega} coaxial cables, in order to transmit the signal to switched capacitor arrays for analog storage. (orig.).

  6. Atomic physics and quantum optics using superconducting circuits: from the Dynamical Casimir effect to Majorana fermions

    Science.gov (United States)

    Nori, Franco

    2012-02-01

    This talk will present an overview of some of our recent results on atomic physics and quantum optics using superconducting circuits. Particular emphasis will be given to photons interacting with qubits, interferometry, the Dynamical Casimir effect, and also studying Majorana fermions using superconducting circuits.[4pt] References available online at our web site:[0pt] J.Q. You, Z.D. Wang, W. Zhang, F. Nori, Manipulating and probing Majorana fermions using superconducting circuits, (2011). Arxiv. J.R. Johansson, G. Johansson, C.M. Wilson, F. Nori, Dynamical Casimir effect in a superconducting coplanar waveguide, Phys. Rev. Lett. 103, 147003 (2009). [0pt] J.R. Johansson, G. Johansson, C.M. Wilson, F. Nori, Dynamical Casimir effect in superconducting microwave circuits, Phys. Rev. A 82, 052509 (2010). [0pt] C.M. Wilson, G. Johansson, A. Pourkabirian, J.R. Johansson, T. Duty, F. Nori, P. Delsing, Observation of the Dynamical Casimir Effect in a superconducting circuit. Nature, in press (Nov. 2011). P.D. Nation, J.R. Johansson, M.P. Blencowe, F. Nori, Stimulating uncertainty: Amplifying the quantum vacuum with superconducting circuits, Rev. Mod. Phys., in press (2011). [0pt] J.Q. You, F. Nori, Atomic physics and quantum optics using superconducting circuits, Nature 474, 589 (2011). [0pt] S.N. Shevchenko, S. Ashhab, F. Nori, Landau-Zener-Stuckelberg interferometry, Phys. Reports 492, 1 (2010). [0pt] I. Buluta, S. Ashhab, F. Nori. Natural and artificial atoms for quantum computation, Reports on Progress in Physics 74, 104401 (2011). [0pt] I.Buluta, F. Nori, Quantum Simulators, Science 326, 108 (2009). [0pt] L.F. Wei, K. Maruyama, X.B. Wang, J.Q. You, F. Nori, Testing quantum contextuality with macroscopic superconducting circuits, Phys. Rev. B 81, 174513 (2010). [0pt] J.Q. You, X.-F. Shi, X. Hu, F. Nori, Quantum emulation of a spin system with topologically protected ground states using superconducting quantum circuit, Phys. Rev. A 81, 063823 (2010).

  7. How complex can integrated optical circuits become?

    NARCIS (Netherlands)

    Smit, M.K.; Hill, M.T.; Baets, R.G.F.; Bente, E.A.J.M.; Dorren, H.J.S.; Karouta, F.; Koenraad, P.M.; Koonen, A.M.J.; Leijtens, X.J.M.; Nötzel, R.; Oei, Y.S.; Waardt, de H.; Tol, van der J.J.G.M.; Khoe, G.D.

    2007-01-01

    The integration scale in Photonic Integrated Circuits will be pushed to VLSI-level in the coming decade. This will bring major changes in both application and manufacturing. In this paper developments in Photonic Integration are reviewed and the limits for reduction of device demensions are

  8. Integrated Circuit Stellar Magnitude Simulator

    Science.gov (United States)

    Blackburn, James A.

    1978-01-01

    Describes an electronic circuit which can be used to demonstrate the stellar magnitude scale. Six rectangular light-emitting diodes with independently adjustable duty cycles represent stars of magnitudes 1 through 6. Experimentally verifies the logarithmic response of the eye. (Author/GA)

  9. Radio-frequency integrated-circuit engineering

    CERN Document Server

    Nguyen, Cam

    2015-01-01

    Radio-Frequency Integrated-Circuit Engineering addresses the theory, analysis and design of passive and active RFIC's using Si-based CMOS and Bi-CMOS technologies, and other non-silicon based technologies. The materials covered are self-contained and presented in such detail that allows readers with only undergraduate electrical engineering knowledge in EM, RF, and circuits to understand and design RFICs. Organized into sixteen chapters, blending analog and microwave engineering, Radio-Frequency Integrated-Circuit Engineering emphasizes the microwave engineering approach for RFICs. Provide

  10. Experimental Device for Learning of Logical Circuit Design using Integrated Circuits

    OpenAIRE

    石橋, 孝昭

    2012-01-01

    This paper presents an experimental device for learning of logical circuit design using integrated circuits and breadboards. The experimental device can be made at a low cost and can be used for many subjects such as logical circuits, computer engineering, basic electricity, electrical circuits and electronic circuits. The proposed device is effective to learn the logical circuits than the usual lecture.

  11. Widely Tunable On-Chip Microwave Circulator for Superconducting Quantum Circuits

    Science.gov (United States)

    Chapman, Benjamin J.; Rosenthal, Eric I.; Kerckhoff, Joseph; Moores, Bradley A.; Vale, Leila R.; Mates, J. A. B.; Hilton, Gene C.; Lalumière, Kevin; Blais, Alexandre; Lehnert, K. W.

    2017-10-01

    We report on the design and performance of an on-chip microwave circulator with a widely (GHz) tunable operation frequency. Nonreciprocity is created with a combination of frequency conversion and delay, and requires neither permanent magnets nor microwave bias tones, allowing on-chip integration with other superconducting circuits without the need for high-bandwidth control lines. Isolation in the device exceeds 20 dB over a bandwidth of tens of MHz, and its insertion loss is small, reaching as low as 0.9 dB at select operation frequencies. Furthermore, the device is linear with respect to input power for signal powers up to hundreds of fW (≈103 circulating photons), and the direction of circulation can be dynamically reconfigured. We demonstrate its operation at a selection of frequencies between 4 and 6 GHz.

  12. Monolithic microwave integrated circuit with integral array antenna

    International Nuclear Information System (INIS)

    Stockton, R.J.; Munson, R.E.

    1984-01-01

    A monolithic microwave integrated circuit including an integral array antenna. The system includes radiating elements, feed network, phasing network, active and/or passive semiconductor devices, digital logic interface circuits and a microcomputer controller simultaneously incorporated on a single substrate by means of a controlled fabrication process sequence

  13. The Photon Shell Game and the Quantum von Neumann Architecture with Superconducting Circuits

    Science.gov (United States)

    Mariantoni, Matteo

    2012-02-01

    Superconducting quantum circuits have made significant advances over the past decade, allowing more complex and integrated circuits that perform with good fidelity. We have recently implemented a machine comprising seven quantum channels, with three superconducting resonators, two phase qubits, and two zeroing registers. I will explain the design and operation of this machine, first showing how a single microwave photon | 1 > can be prepared in one resonator and coherently transferred between the three resonators. I will also show how more exotic states such as double photon states | 2 > and superposition states | 0 >+ | 1 > can be shuffled among the resonators as well [1]. I will then demonstrate how this machine can be used as the quantum-mechanical analog of the von Neumann computer architecture, which for a classical computer comprises a central processing unit and a memory holding both instructions and data. The quantum version comprises a quantum central processing unit (quCPU) that exchanges data with a quantum random-access memory (quRAM) integrated on one chip, with instructions stored on a classical computer. I will also present a proof-of-concept demonstration of a code that involves all seven quantum elements: (1), Preparing an entangled state in the quCPU, (2), writing it to the quRAM, (3), preparing a second state in the quCPU, (4), zeroing it, and, (5), reading out the first state stored in the quRAM [2]. Finally, I will demonstrate that the quantum von Neumann machine provides one unit cell of a two-dimensional qubit-resonator array that can be used for surface code quantum computing. This will allow the realization of a scalable, fault-tolerant quantum processor with the most forgiving error rates to date. [4pt] [1] M. Mariantoni et al., Nature Physics 7, 287-293 (2011.)[0pt] [2] M. Mariantoni et al., Science 334, 61-65 (2011).

  14. Materials issues in silicon integrated circuit processing

    International Nuclear Information System (INIS)

    Wittmer, M.; Stimmell, J.; Strathman, M.

    1986-01-01

    The symposium on ''Materials Issues in Integrated Circuit Processing'' sought to bring together all of the materials issued pertinent to modern integrated circuit processing. The inherent properties of the materials are becoming an important concern in integrated circuit manufacturing and accordingly research in materials science is vital for the successful implementation of modern integrated circuit technology. The session on Silicon Materials Science revealed the advanced stage of knowledge which topics such as point defects, intrinsic and extrinsic gettering and diffusion kinetics have achieved. Adaption of this knowledge to specific integrated circuit processing technologies is beginning to be addressed. The session on Epitaxy included invited papers on epitaxial insulators and IR detectors. Heteroepitaxy on silicon is receiving great attention and the results presented in this session suggest that 3-d integrated structures are an increasingly realistic possibility. Progress in low temperature silicon epitaxy and epitaxy of thin films with abrupt interfaces was also reported. Diffusion and Ion Implantation were well presented. Regrowth of implant-damaged layers and the nature of the defects which remain after regrowth were discussed in no less than seven papers. Substantial progress was also reported in the understanding of amorphising boron implants and the use of gallium implants for the formation of shallow p/sup +/ -layers

  15. Character of quantum interference on superconducting circuits made of V3Si

    International Nuclear Information System (INIS)

    Golovashkin, A.I.; Lykov, A.N.; Prishchepa, S.L.

    1981-01-01

    The characteristics of circuits formed by two parallel superconducting bridge-type contacts made of V 3 Si are studied. The bridges made of V 3 Si films having the 1-30 μm width and 1-2 μm length and the circuits of different areas have been located in a magnetic field perpendicular to the film plane. Current oscillations through the circuit during magnetic field variations have shown themselves through periodic changes in output voltage of the circuit. The attained value of the voltage oscillation amplitude on the parallel bridge-type contacts is 60 μV. For the first time the periodic voltage oscillations are obtained using such circuits during variations of the external magnetic field. The oscillation period is defined by the quantum of magnetic flux. Perspectiveness of V 3 Si for construction of superconducting quantum interference devices is shown [ru

  16. Integrated circuits for multimedia applications

    DEFF Research Database (Denmark)

    Vandi, Luca

    2007-01-01

    , and it is applied to a broad-band dual-loop receiver architecture in order to boost the linearity performances of the stage. A simplified noise- and linearity analysis of the circuit is derived, and a comparison is provided with a more traditional dual-loop topology (a broad-band stage based on shunt...... the impact of substrate-induced currents. Basic models are derived in the design phase, and the technological limits of the device are considered. Measurement results show that a very compact coil can provide ~1nH inductance up to 20GHz (physical limit for the measurement equipment), with a peak quality...

  17. Polysilicon photoconductor for integrated circuits

    Science.gov (United States)

    Hammond, R.B.; Bowman, D.R.

    1989-04-11

    A photoconductive element of polycrystalline silicon is provided with intrinsic response time which does not limit overall circuit response. An undoped polycrystalline silicon layer is deposited by LPCVD to a selected thickness on silicon dioxide. The deposited polycrystalline silicon is then annealed at a selected temperature and for a time effective to obtain crystal sizes effective to produce an enhanced current output. The annealed polycrystalline layer is subsequently exposed and damaged by ion implantation to a damage factor effective to obtain a fast photoconductive response. 6 figs.

  18. Integrated circuit design using design automation

    International Nuclear Information System (INIS)

    Gwyn, C.W.

    1976-09-01

    Although the use of computer aids to develop integrated circuits is relatively new at Sandia, the program has been very successful. The results have verified the utility of the in-house CAD design capability. Custom IC's have been developed in much shorter times than available through semiconductor device manufacturers. In addition, security problems were minimized and a saving was realized in circuit cost. The custom CMOS IC's were designed at less than half the cost of designing with conventional techniques. In addition to the computer aided design, the prototype fabrication and testing capability provided by the semiconductor development laboratory and microelectronics computer network allows the circuits to be fabricated and evaluated before the designs are transferred to the commercial semiconductor manufacturers for production. The Sandia design and prototype fabrication facilities provide the capability of complete custom integrated circuit development entirely within the ERDA laboratories

  19. Maximum Temperature Detection System for Integrated Circuits

    Science.gov (United States)

    Frankiewicz, Maciej; Kos, Andrzej

    2015-03-01

    The paper describes structure and measurement results of the system detecting present maximum temperature on the surface of an integrated circuit. The system consists of the set of proportional to absolute temperature sensors, temperature processing path and a digital part designed in VHDL. Analogue parts of the circuit where designed with full-custom technique. The system is a part of temperature-controlled oscillator circuit - a power management system based on dynamic frequency scaling method. The oscillator cooperates with microprocessor dedicated for thermal experiments. The whole system is implemented in UMC CMOS 0.18 μm (1.8 V) technology.

  20. Active Trimming of Hybrid Integrated Circuits

    OpenAIRE

    Németh, P.; Krémer, P.

    1984-01-01

    One of the more important fields of the microelectronics industry is the manufacturing of hybrid integrated circuits.An important part of the manufacturing process is concerned with the trimming of the hybrid integratedl circuits. This article deals with the basic principles of active trimming and introduces a microprocessor controlled trimming machine. By comparing active trimming with passive techniques, it can be shown that the active system has some advantages. This article outlines these...

  1. Integrated circuit implementation of fuzzy controllers

    OpenAIRE

    Huertas Díaz, José Luis; Sánchez Solano, Santiago; Baturone Castillo, María Iluminada; Barriga Barros, Ángel

    1996-01-01

    This paper presents mixed-signal current-mode CMOS circuits to implement programmable fuzzy controllers that perform the singleton or zero-order Sugeno’s method. Design equations to characterize these circuits are provided to explain the precision and speed that they offer. This analysis is illustrated with the experimental results of prototypes integrated in standard CMOS technologies. These tests show that an equivalent precision of 6 bits is achieved. The connection of these...

  2. A fast charge integrating and shaping circuit

    International Nuclear Information System (INIS)

    Kulka, Z.; Szoncso, F.

    1990-01-01

    The development of a low cost fast charge integrating and shaping circuit (FCISC) was motivated by the need for an interface between the photomultipliers of an existing hadronic calorimeter and recently developed new readout electronics designed to match the output of small ionization chambers for the upgraded UA1 detector at the CERN proton-antiproton collider. This paper describes the design principles of gated and ungated charge integrating and shaping circuits. An FCISC prototype using discrete components was made and its properties were determined with a computerized test setup. Finally an SMD implementation of the FCISC is presented and the performance is reported. (orig.)

  3. Test Structures For Bumpy Integrated Circuits

    Science.gov (United States)

    Buehler, Martin G.; Sayah, Hoshyar R.

    1989-01-01

    Cross-bridge resistors added to comb and serpentine patterns. Improved combination of test structures built into integrated circuit used to evaluate design rules, fabrication processes, and quality of interconnections. Consist of meshing serpentines and combs, and cross bridge. Structures used to make electrical measurements revealing defects in design or fabrication. Combination of test structures includes three comb arrays, two serpentine arrays, and cross bridge. Made of aluminum or polycrystalline silicon, depending on material in integrated-circuit layers evaluated. Aluminum combs and serpentine arrays deposited over steps made by polycrystalline silicon and diffusion layers, while polycrystalline silicon versions of these structures used to cross over steps made by thick oxide layer.

  4. Radiation-hardened CMOS integrated circuits

    International Nuclear Information System (INIS)

    Pikor, A.; Reiss, E.M.

    1980-01-01

    Substantial effort has been directed at radiation-hardening CMOS integrated circuits using various oxide processes. While most of these integrated circuits have been successful in demonstrating megarad hardness, further investigations have shown that the 'wet-oxide process' is most compatible with the RCA CD4000 Series process. This article describes advances in the wet-oxide process that have resulted in multimegarad hardness and yield to MIL-M-38510 screening requirements. The implementation of these advances into volume manufacturing is geared towards supplying devices for aerospace requirements such as the Defense Meterological Satellite program (DMSP) and the Global Positioning Satellite (GPS). (author)

  5. Microwave integrated circuits for space applications

    Science.gov (United States)

    Leonard, Regis F.; Romanofsky, Robert R.

    1991-01-01

    Monolithic microwave integrated circuits (MMIC), which incorporate all the elements of a microwave circuit on a single semiconductor substrate, offer the potential for drastic reductions in circuit weight and volume and increased reliability, all of which make many new concepts in electronic circuitry for space applications feasible, including phased array antennas. NASA has undertaken an extensive program aimed at development of MMICs for space applications. The first such circuits targeted for development were an extension of work in hybrid (discrete component) technology in support of the Advanced Communication Technology Satellite (ACTS). It focused on power amplifiers, receivers, and switches at ACTS frequencies. More recent work, however, focused on frequencies appropriate for other NASA programs and emphasizes advanced materials in an effort to enhance efficiency, power handling capability, and frequency of operation or noise figure to meet the requirements of space systems.

  6. Superconducting Submm Integrated Receiver for TELIS

    Energy Technology Data Exchange (ETDEWEB)

    Koshelets, V P [Institute of Radio Engineering and Electronics (IREE) (Russian Federation); Ermakov, A B [Institute of Radio Engineering and Electronics (IREE) (Russian Federation); Filippenko, L V [Institute of Radio Engineering and Electronics (IREE) (Russian Federation); Koryukin, O V [Institute of Radio Engineering and Electronics (IREE) (Russian Federation); Khudchenko, A V [Institute of Radio Engineering and Electronics (IREE) (Russian Federation); Sobolev, A S [Institute of Radio Engineering and Electronics (IREE) (Russian Federation); Torgashin, M Yu [Institute of Radio Engineering and Electronics (IREE) (Russian Federation); Yagoubov, P A [SRON National Institute for Space Research (Netherlands); Hoogeveen, R W M [SRON National Institute for Space Research (Netherlands); Vreeling, W J [SRON National Institute for Space Research (Netherlands); Wild, W [SRON National Institute for Space Research (Netherlands); Pylypenko, O M [State Research Center of Superconducting Electronics ' Iceberg' (Ukraine)

    2006-06-01

    In this report we present design and first experimental results for development of the submm superconducting integrated receiver spectrometer for Terahertz Limb Sounder (TELIS). TELIS is a collaborative European project to build up a three-channel heterodyne balloon-based spectrometer for measuring a variety of atmospheric constituents of the stratosphere. The 550 - 650 GHz channel of TELIS is based on a phase-locked Superconducting Integrated Receiver (SIR). SIR is an on-chip combination of a low-noise Superconductor-Insulator-Superconductor (SIS) mixer with quasioptical antenna, a superconducting Flux Flow Oscillator (FFO) acting as Local Oscillator (LO), and SIS harmonic mixer (HM) for FFO phase locking. A number of new solutions were implemented in the new generation of SIR chips. To achieve the wide-band performance of the spectrometer, a side-feed twin-SIS mixer and balanced SIS mixer with 0.8 {mu}m{sup 2} junctions integrated with a double-dipole (or double-slot) antenna is used. An improved design of the FFO for TELIS has been developed and optimized providing a free-running linewidth between 10 and 2 MHz in the frequency range 500 - 700 GHz. It is important to ensure that tuning of a phase-locked (PL) SIR can be performed remotely by telecommand. For this purpose a number of approaches for the PL SIR automatic computer control have been developed. All receiver components (including input optical elements and Martin-Puplett polarization rotating interferometer for single side band operation) will be mounted on a single 4.2 K plate inside a 40 x 180 x 80 mm{sup 3} box. First measurements give an uncorrected double side band (DSB) noise temperature below 250 K measured with the phase-locked FFO; more detailed results are presented at the conference.

  7. Superconducting Submm Integrated Receiver for TELIS

    International Nuclear Information System (INIS)

    Koshelets, V P; Ermakov, A B; Filippenko, L V; Koryukin, O V; Khudchenko, A V; Sobolev, A S; Torgashin, M Yu; Yagoubov, P A; Hoogeveen, R W M; Vreeling, W J; Wild, W; Pylypenko, O M

    2006-01-01

    In this report we present design and first experimental results for development of the submm superconducting integrated receiver spectrometer for Terahertz Limb Sounder (TELIS). TELIS is a collaborative European project to build up a three-channel heterodyne balloon-based spectrometer for measuring a variety of atmospheric constituents of the stratosphere. The 550 - 650 GHz channel of TELIS is based on a phase-locked Superconducting Integrated Receiver (SIR). SIR is an on-chip combination of a low-noise Superconductor-Insulator-Superconductor (SIS) mixer with quasioptical antenna, a superconducting Flux Flow Oscillator (FFO) acting as Local Oscillator (LO), and SIS harmonic mixer (HM) for FFO phase locking. A number of new solutions were implemented in the new generation of SIR chips. To achieve the wide-band performance of the spectrometer, a side-feed twin-SIS mixer and balanced SIS mixer with 0.8 μm 2 junctions integrated with a double-dipole (or double-slot) antenna is used. An improved design of the FFO for TELIS has been developed and optimized providing a free-running linewidth between 10 and 2 MHz in the frequency range 500 - 700 GHz. It is important to ensure that tuning of a phase-locked (PL) SIR can be performed remotely by telecommand. For this purpose a number of approaches for the PL SIR automatic computer control have been developed. All receiver components (including input optical elements and Martin-Puplett polarization rotating interferometer for single side band operation) will be mounted on a single 4.2 K plate inside a 40 x 180 x 80 mm 3 box. First measurements give an uncorrected double side band (DSB) noise temperature below 250 K measured with the phase-locked FFO; more detailed results are presented at the conference

  8. Performance of the Superconducting Corrector Magnet Circuits during the Commissioning of the LHC

    International Nuclear Information System (INIS)

    Venturini Delsolaro, W.; Baggiolini, V.; Ballarino, A.; Bellesia, B.; Bordry, F.; Cantone, A.; Casas Lino, M.P.; CastilloTrello, C.; Catalan-Lasheras, N.; Charifoulline, Zinour; Charrondiere, C.; CERN; Madrid, CIEMAT; Fermilab

    2008-01-01

    The LHC is a complex machine requiring more than 7400 superconducting corrector magnets distributed along a circumference of 26.7 km. These magnets are powered in 1446 different electrical circuits at currents ranging from 60 A up to 600 A. Among the corrector circuits the 600 A corrector magnets form the most diverse and differentiated group. All together, about 60000 high current connections had to be made. A fault in a circuit or one of the superconducting connections would have severe consequences for the accelerator operation. All magnets are wound from various types of Nb-Ti superconducting strands, and many contain parallel protection resistors to by-pass the current still flowing in the other magnets of the same circuit when they quench. In this paper the performance of these magnet circuits is presented, focusing on the quench behavior of the magnets. Quench detection and the performance of the electrical interconnects will be dealt with. The results as measured on the entire circuits are compared to the test results obtained at the reception of the individual magnets

  9. Performance of the Superconducting Corrector Magnet Circuits during the Commissioning of the LHC

    CERN Document Server

    Venturini-Delsolaro, W; Ballarino, A; Bellesia, B; Bordry, Frederick; Cantone, A; Casas Lino, M; Castaneda Serra, A; Castillo Trello, C; Catalan-Lasheras, N; Charifoulline, Z; Charrondiere, C; Dahlerup-Petersen, K; D'Angelo, G; Denz, R; Fehér, S; Flora, R; Gruwé, M; Kain, V; Karppinen, M; Khomenko, B; Kirby, G; MacPherson, A; Marqueta Barbero, A; Mess, K H; Modena, M; Mompo, R; Montabonnet, V; le Naour, S; Nisbet, D; Parma, V; Pojer, M; Ponce, L; Raimondo, A; Redaelli, S; Remondino, V; Reymond, H; de Rijk, G; Rijllart, A; Romera Ramirez, I; Saban, R; Sanfilippo, S; Schirm, K; Schmidt, R; Siemko, A; Solfaroli Camillocci, M; Thurel, Y; Thiesen, H; Vergara Fernandez, A; Verweij, A; Wolf, R; Zerlauth, M

    2008-01-01

    The LHC is a complex machine requiring more than 7400 superconducting corrector magnets distributed along a circumference of 26.7 km. These magnets are powered in 1446 different electrical circuits at currents ranging from 60 A up to 600 A. Among the corrector circuits the 600 A corrector magnets form the most diverse and differentiated group. All together, about 60000 high current connections had to be made. A fault in a circuit or one of the superconducting connections would have severe consequences for the accelerator operation. All magnets are wound from various types of Nb-Ti superconducting strands, and many contain parallel protection resistors to by-pass the current still flowing in the other magnets of the same circuit when they quench. In this paper the performance of these magnet circuits is presented, focussing on the quench behaviour of the magnets. Quench detection and the performance of the electrical interconnects will be dealt with. The results as measured on the entire circuits are compar...

  10. Silicon Photonic Integrated Circuit Mode Multiplexer

    DEFF Research Database (Denmark)

    Ding, Yunhong; Ou, Haiyan; Xu, Jing

    2013-01-01

    We propose and demonstrate a novel silicon photonic integrated circuit enabling multiplexing of orthogonal modes in a few-mode fiber (FMF). By selectively launching light to four vertical grating couplers, all six orthogonal spatial and polarization modes supported by the FMF are successfully...

  11. Accurate Electromagnetic Modeling Methods for Integrated Circuits

    NARCIS (Netherlands)

    Sheng, Z.

    2010-01-01

    The present development of modern integrated circuits (IC’s) is characterized by a number of critical factors that make their design and verification considerably more difficult than before. This dissertation addresses the important questions of modeling all electromagnetic behavior of features on

  12. Integrated Circuits in the Introductory Electronics Laboratory

    Science.gov (United States)

    English, Thomas C.; Lind, David A.

    1973-01-01

    Discusses the use of an integrated circuit operational amplifier in an introductory electronics laboratory course for undergraduate science majors. The advantages of this approach and the implications for scientific instrumentation are identified. Describes a number of experiments suitable for the undergraduate laboratory. (Author/DF)

  13. Lithographic technology for microwave integrated circuits

    OpenAIRE

    Shepherd, PR; Evans, PSA; Ramsey, BJ; Harrison, DJ

    1997-01-01

    Conductive lithographic films (CLFs) have been developed primarily as substitutes for resin/laminate boards, which share properties with the metallisation patterns used in planar microwave integrated circuits (MICs). The authors examine the microwave properties of the films and show that, although the losses are greater, they have potential as an alternative to the traditional manufacturing process of MICs.

  14. Package Holds Five Monolithic Microwave Integrated Circuits

    Science.gov (United States)

    Mysoor, Narayan R.; Decker, D. Richard; Olson, Hilding M.

    1996-01-01

    Packages protect and hold monolithic microwave integrated circuit (MMIC) chips while providing dc and radio-frequency (RF) electrical connections for chips undergoing development. Required to be compact, lightweight, and rugged. Designed to minimize undesired resonances, reflections, losses, and impedance mismatches.

  15. Short Circuits of a 10 MW High Temperature Superconducting Wind Turbine Generator

    NARCIS (Netherlands)

    Song, X.; Polinder, H.; Liu, D.; Mijatovic, Nenad; Holbøll, Joachim; Jensen, Bogi Bech

    Direct drive high temperature superconducting (HTS) wind turbine generators have been proposed to tackle challenges for ever increasing wind turbine ratings. Due to smaller reactances in HTS generators, higher fault currents and larger transient torques could occur if sudden short circuits happen at

  16. Experimental system design for the integration of trapped-ion and superconducting qubit systems

    Science.gov (United States)

    De Motte, D.; Grounds, A. R.; Rehák, M.; Rodriguez Blanco, A.; Lekitsch, B.; Giri, G. S.; Neilinger, P.; Oelsner, G.; Il'ichev, E.; Grajcar, M.; Hensinger, W. K.

    2016-12-01

    We present a design for the experimental integration of ion trapping and superconducting qubit systems as a step towards the realization of a quantum hybrid system. The scheme addresses two key difficulties in realizing such a system: a combined microfabricated ion trap and superconducting qubit architecture, and the experimental infrastructure to facilitate both technologies. Developing upon work by Kielpinski et al. (Phys Rev Lett 108(13):130504, 2012. doi: 10.1103/PhysRevLett.108.130504), we describe the design, simulation and fabrication process for a microfabricated ion trap capable of coupling an ion to a superconducting microwave LC circuit with a coupling strength in the tens of kHz. We also describe existing difficulties in combining the experimental infrastructure of an ion trapping set-up into a dilution refrigerator with superconducting qubits and present solutions that can be immediately implemented using current technology.

  17. Qubit state tomography in a superconducting circuit via weak measurements

    Science.gov (United States)

    Qin, Lupei; Xu, Luting; Feng, Wei; Li, Xin-Qi

    2017-03-01

    In this work we present a study on a new scheme for measuring the qubit state in a circuit quantum electrodynamics (QED) system, based on weak measurement and the concept of weak value. To be applicable under generic parameter conditions, our formulation and analysis are carried out for finite-strength weak measurement, and in particular beyond the bad-cavity and weak-response limits. The proposed study is accessible to present state-of-the-art circuit QED experiments.

  18. Data readout system utilizing photonic integrated circuit

    Energy Technology Data Exchange (ETDEWEB)

    Stopiński, S., E-mail: S.Stopinski@tue.nl [COBRA Research Institute, Eindhoven University of Technology (Netherlands); Institute of Microelectronics and Optoelectronics, Warsaw University of Technology (Poland); Malinowski, M.; Piramidowicz, R. [Institute of Microelectronics and Optoelectronics, Warsaw University of Technology (Poland); Smit, M.K.; Leijtens, X.J.M. [COBRA Research Institute, Eindhoven University of Technology (Netherlands)

    2013-10-11

    We describe a novel optical solution for data readout systems. The core of the system is an Indium-Phosphide photonic integrated circuit performing as a front-end readout unit. It functions as an optical serializer in which the serialization of the input signal is provided by means of on-chip optical delay lines. The circuit employs electro-optic phase shifters to build amplitude modulators, power splitters for signal distribution, semiconductor optical amplifiers for signal amplification as well as on-chip reflectors. We present the concept of the system, the design and first characterization results of the devices that were fabricated in a multi-project wafer run.

  19. Power management techniques for integrated circuit design

    CERN Document Server

    Chen, Ke-Horng

    2016-01-01

    This book begins with the premise that energy demands are directing scientists towards ever-greener methods of power management, so highly integrated power control ICs (integrated chip/circuit) are increasingly in demand for further reducing power consumption. * A timely and comprehensive reference guide for IC designers dealing with the increasingly widespread demand for integrated low power management * Includes new topics such as LED lighting, fast transient response, DVS-tracking and design with advanced technology nodes * Leading author (Chen) is an active and renowned contributor to the power management IC design field, and has extensive industry experience * Accompanying website includes presentation files with book illustrations, lecture notes, simulation circuits, solution manuals, instructors manuals, and program downloads.

  20. Characteristic Of Induction Magnetic Field On The Laboratory Scale Superconducting Fault Current Limiter Circuit

    International Nuclear Information System (INIS)

    Adi, Wisnu Ari; Sukirman, E.; Didin, S.W.; Yustinus, P.M.; Siregar, Riswal H.

    2004-01-01

    Model construction of the laboratory scale superconducting fault current limiter circuit (SFCL) has been performed. The SFCL is fault current limiter and used as electric network security. It mainly consists of a copper coil, a superconducting ring and an iron core that are concentrically arranged. The SFCL circuit is essentially a transformer where the secondary windings are being replaced by the ring of YBa 2 Cu 3 O 7-x superconductor (HTS). The ring has critical transition temperature Tc = 92 K and critical current Ic = 3.61 A. Characterization of the SFCL circuit is simulated by ANSYS version 5.4 software. The SFCL circuit consists of load and transformer impedances. The results show that the inductions of magnet field flux in the iron core of primer windings and ring disappear to one other before fault state. It means that impedance of the transformer is zero. After the condition a superconductivity behavior of the ring is disappear so that the impedance of the transformer becomes very high. From this experiment, we concluded that the SFCL circuit could work normally if the resultant of induction magnetic in the iron core (transformer) is zero

  1. Superconducting high current magnetic Circuit: Design and Parameter Estimation of a Simulation Model

    CERN Document Server

    Kiefer, Alexander; Reich, Werner Dr

    The Large Hadron Collider (LHC) utilizes superconducting main dipole magnets that bend the trajectory of the particle beams. In order to adjust the not completely homogeneous magnetic feld of the main dipole magnets, amongst others, sextupole correctcorrector magnets are used. In one of the 16 corrector magnet circuits placed in the LHC, 154 of these sextupole corrector magnets (MCS) are connected in series. This circuit extends on a 3.35 km tunnel section of the LHC. In 2015, at one of the 16 circuits a fault was detected. The simulation of this circuit is helpful for fnding the fault by applying alternating current at different frequencies. Within this Thesis a PSpice model for the simulation of the superconducting corrector magnet circuit was designed. The physical properties of the circuit and its elements were analyzed and implemented. For the magnets and bus-bars, sub-circuits were created which reflect the parasitic effects of electrodynamics and electrostats. The inductance values and capacitance valu...

  2. Development of 3D integrated circuits for HEP

    International Nuclear Information System (INIS)

    Yarema, R.; Fermilab

    2006-01-01

    Three dimensional integrated circuits are well suited to improving circuit bandwidth and increasing effective circuit density. Recent advances in industry have made 3D integrated circuits an option for HEP. The 3D technology is discussed in this paper and several examples are shown. Design of a 3D demonstrator chip for the ILC is presented

  3. Interacting two-level defects as sources of fluctuating high-frequency noise in superconducting circuits

    Energy Technology Data Exchange (ETDEWEB)

    Mueller, Clemens [ARC Centre of Excellence for Engineered Quantum Systems, The University of Queensland, Brisbane (Australia); Lisenfeld, Juergen [Physikalisches Institut, Karlsruhe Institute of Technology, Karlsruhe (Germany); Shnirman, Alexander [Institut fuer Theory der Kondensierten Materie, Karlsruhe Institute of Technology, Karlsruhe (Germany); LD Landau Institute for Theoretical Physics, Moscow (Russian Federation); Poletto, Stefano [IBM TJ Watson Research Centre, Yorktown Heights (United States)

    2016-07-01

    Since the very first experiments, superconducting circuits have suffered from strong coupling to environmental noise, destroying quantum coherence and degrading performance. In state-of-the-art experiments, it is found that the relaxation time of superconducting qubits fluctuates as a function of time. We present measurements of such fluctuations in a 3D-transmon circuit and develop a qualitative model based on interactions within a bath of background two-level systems (TLS) which emerge from defects in the device material. In our model, the time-dependent noise density acting on the qubit emerges from its near-resonant coupling to high-frequency TLS which experience energy fluctuations due to their interaction with thermally fluctuating TLS at low frequencies. We support the model by providing experimental evidence of such energy fluctuations observed in a single TLS in a phase qubit circuit.

  4. Hybrid quantum circuit with a superconducting qubit coupled to an electron spin ensemble

    Energy Technology Data Exchange (ETDEWEB)

    Kubo, Yuimaru; Grezes, Cecile; Vion, Denis; Esteve, Daniel; Bertet, Patrice [Quantronics Group, SPEC (CNRS URA 2464), CEA-Saclay, 91191 Gif-sur-Yvette (France); Diniz, Igor; Auffeves, Alexia [Institut Neel, CNRS, BP 166, 38042 Grenoble (France); Isoya, Jun-ichi [Research Center for Knowledge Communities, University of Tsukuba, 305-8550 Tsukuba (Japan); Jacques, Vincent; Dreau, Anais; Roch, Jean-Francois [LPQM (CNRS, UMR 8537), Ecole Normale Superieure de Cachan, 94235 Cachan (France)

    2013-07-01

    We report the experimental realization of a hybrid quantum circuit combining a superconducting qubit and an ensemble of electronic spins. The qubit, of the transmon type, is coherently coupled to the spin ensemble consisting of nitrogen-vacancy (NV) centers in a diamond crystal via a frequency-tunable superconducting resonator acting as a quantum bus. Using this circuit, we prepare arbitrary superpositions of the qubit states that we store into collective excitations of the spin ensemble and retrieve back into the qubit. We also report a new method for detecting the magnetic resonance of electronic spins at low temperature with a qubit using the hybrid quantum circuit, as well as our recent progress on spin echo experiments.

  5. Reverse Engineering Integrated Circuits Using Finite State Machine Analysis

    Energy Technology Data Exchange (ETDEWEB)

    Oler, Kiri J. [Pacific Northwest National Lab. (PNNL), Richland, WA (United States); Miller, Carl H. [Pacific Northwest National Lab. (PNNL), Richland, WA (United States)

    2016-04-12

    In this paper, we present a methodology for reverse engineering integrated circuits, including a mathematical verification of a scalable algorithm used to generate minimal finite state machine representations of integrated circuits.

  6. Boson sampling with integrated optical circuits

    International Nuclear Information System (INIS)

    Bentivegna, M.

    2014-01-01

    Simulating the evolution of non-interacting bosons through a linear transformation acting on the system’s Fock state is strongly believed to be hard for a classical computer. This is commonly known as the Boson Sampling problem, and has recently got attention as the first possible way to demonstrate the superior computational power of quantum devices over classical ones. In this paper we describe the quantum optics approach to this problem, highlighting the role of integrated optical circuits.

  7. High-frequency analog integrated circuit design

    CERN Document Server

    1995-01-01

    To learn more about designing analog integrated circuits (ICs) at microwave frequencies using GaAs materials, turn to this text and reference. It addresses GaAs MESFET-based IC processing. Describes the newfound ability to apply silicon analog design techniques to reliable GaAs materials and devices which, until now, was only available through technical papers scattered throughout hundred of articles in dozens of professional journals.

  8. Design of Integrated Circuits Approaching Terahertz Frequencies

    OpenAIRE

    Yan, Lei; Johansen, Tom Keinicke

    2013-01-01

    In this thesis, monolithic microwave integrated circuits(MMICs) are presented for millimeter-wave and submillimeter-wave or terahertz(THz) applications. Millimeter-wave power generation from solid state devices is not only crucial for the emerging high data rate wireless communications but also important for driving THz signal sources. To meet the requirement of high output power, amplifiers based on InP double heterojunction bipolar transistor (DHBT) devices from the III-V Lab in Marcoussic,...

  9. Silicon wafers for integrated circuit process

    OpenAIRE

    Leroy , B.

    1986-01-01

    Silicon as a substrate material will continue to dominate the market of integrated circuits for many years. We first review how crystal pulling procedures impact the quality of silicon. We then investigate how thermal treatments affect the behaviour of oxygen and carbon, and how, as a result, the quality of silicon wafers evolves. Gettering techniques are then presented. We conclude by detailing the requirements that wafers must satisfy at the incoming inspection.

  10. Substrate optimization for integrated circuit antennas

    OpenAIRE

    Alexopoulos, N. G.; Katehi, P. B.; Rutledge, D. B.

    1982-01-01

    Imaging systems in microwaves, millimeter and submillimeter wave applications employ printed circuit antenna elements. The effect of substrate properties is analyzed in this paper by both reciprocity theorem as well as integral equation approach for infinitesimally short as well as finite length dipole and slot elements. Radiation efficiency and substrate surface wave guidance is studied for practical substrate materials as GaAs, Silicon, Quartz and Duroid.

  11. Minimizing time for test in integrated circuit

    OpenAIRE

    Andonova, A. S.; Dimitrov, D. G.; Atanasova, N. G.

    2004-01-01

    The cost for testing integrated circuits represents a growing percentage of the total cost for their production. The former strictly depends on the length of the test session, and its reduction has been the target of many efforts in the past. This paper proposes a new method for reducing the test length by adopting a new architecture and exploiting an evolutionary optimisation algorithm. A prototype of the proposed approach was tested on 1SCAS standard benchmarks and theexperimental results s...

  12. Viewing Integrated-Circuit Interconnections By SEM

    Science.gov (United States)

    Lawton, Russel A.; Gauldin, Robert E.; Ruiz, Ronald P.

    1990-01-01

    Back-scattering of energetic electrons reveals hidden metal layers. Experiment shows that with suitable operating adjustments, scanning electron microscopy (SEM) used to look for defects in aluminum interconnections in integrated circuits. Enables monitoring, in situ, of changes in defects caused by changes in temperature. Gives truer picture of defects, as etching can change stress field of metal-and-passivation pattern, causing changes in defects.

  13. RD53A Integrated Circuit Specifications

    OpenAIRE

    Garcia-Sciveres, Mauricio

    2015-01-01

    Specifications for the RD53 collaboration’s first engineering wafer run of an integrated circuit (IC) for hybrid pixel detector readout, called RD53A. RD53A is intended to demonstrate in a large format IC the suitability of the technology (including radiation tolerance), the stable low threshold operation, and the high hit and trigger rate capabilities, required for HL-LHC upgrades of ATLAS and CMS. The wafer scale production will permit the experiments to prototype bump bonding assembly with...

  14. The RD53A Integrated Circuit

    CERN Document Server

    Garcia-Sciveres, Maurice

    2017-01-01

    Implementation details for the RD53A pixel readout integrated circuit designed by the RD53 Collaboration. This is a companion to the specifications document and will eventually become a reference for chip users. RD53A is not intended to be a final production IC for use in an experiment, and contains design variations for testing purposes, making the pixel matrix non-uniform. The chip size is 20.0 mm by 11.8 mm.

  15. Towards phase-coherent caloritronics in superconducting circuits

    Science.gov (United States)

    Fornieri, Antonio; Giazotto, Francesco

    2017-10-01

    The emerging field of phase-coherent caloritronics (from the Latin word calor, heat) is based on the possibility of controlling heat currents by using the phase difference of the superconducting order parameter. The goal is to design and implement thermal devices that can control energy transfer with a degree of accuracy approaching that reached for charge transport by contemporary electronic components. This can be done by making use of the macroscopic quantum coherence intrinsic to superconducting condensates, which manifests itself through the Josephson effect and the proximity effect. Here, we review recent experimental results obtained in the realization of heat interferometers and thermal rectifiers, and discuss a few proposals for exotic nonlinear phase-coherent caloritronic devices, such as thermal transistors, solid-state memories, phase-coherent heat splitters, microwave refrigerators, thermal engines and heat valves. Besides being attractive from the fundamental physics point of view, these systems are expected to have a vast impact on many cryogenic microcircuits requiring energy management, and possibly lay the first stone for the foundation of electronic thermal logic.

  16. Progress in radiation immune thermionic integrated circuits

    International Nuclear Information System (INIS)

    Lynn, D.K.; McCormick, J.B.

    1985-08-01

    This report describes the results of a program directed at evaluating the thermionic integrated circuit (TIC) technology for applicability to military systems. Previous programs under the sponsorship of the Department of Energy, Office of Basic Energy Sciences, have developed an initial TIC technology base and demonstrated operation in high-temperature and high-radiation environments. The program described in this report has two parts: (1) a technical portion in which experiments and analyses were conducted to refine perceptions of near-term as well as ultimate performance levels of the TIC technology and (2) an applications portion in which the technical conclusions were to be evaluated against potential military applications. This report draws several conclusions that strongly suggest that (1) useful radiation-hard/high-temperature operable integrated circuits can be developed using the TIC technology; (2) because of their ability to survive and operate in hostile environments, a variety of potential military applications have been projected for this technology; and (3) based on the above two conclusions, an aggressive TIC development program should be initiated to provide the designers of future systems with integrated circuits and devices with the unique features of the TICs

  17. Progress in radiation immune thermionic integrated circuits

    Energy Technology Data Exchange (ETDEWEB)

    Lynn, D.K.; McCormick, J.B. (comps.)

    1985-08-01

    This report describes the results of a program directed at evaluating the thermionic integrated circuit (TIC) technology for applicability to military systems. Previous programs under the sponsorship of the Department of Energy, Office of Basic Energy Sciences, have developed an initial TIC technology base and demonstrated operation in high-temperature and high-radiation environments. The program described in this report has two parts: (1) a technical portion in which experiments and analyses were conducted to refine perceptions of near-term as well as ultimate performance levels of the TIC technology and (2) an applications portion in which the technical conclusions were to be evaluated against potential military applications. This report draws several conclusions that strongly suggest that (1) useful radiation-hard/high-temperature operable integrated circuits can be developed using the TIC technology; (2) because of their ability to survive and operate in hostile environments, a variety of potential military applications have been projected for this technology; and (3) based on the above two conclusions, an aggressive TIC development program should be initiated to provide the designers of future systems with integrated circuits and devices with the unique features of the TICs.

  18. Power system with an integrated lubrication circuit

    Science.gov (United States)

    Hoff, Brian D [East Peoria, IL; Akasam, Sivaprasad [Peoria, IL; Algrain, Marcelo C [Peoria, IL; Johnson, Kris W [Washington, IL; Lane, William H [Chillicothe, IL

    2009-11-10

    A power system includes an engine having a first lubrication circuit and at least one auxiliary power unit having a second lubrication circuit. The first lubrication circuit is in fluid communication with the second lubrication circuit.

  19. Design of Integrated Circuits Approaching Terahertz Frequencies

    DEFF Research Database (Denmark)

    Yan, Lei

    In this thesis, monolithic microwave integrated circuits(MMICs) are presented for millimeter-wave and submillimeter-wave or terahertz(THz) applications. Millimeter-wave power generation from solid state devices is not only crucial for the emerging high data rate wireless communications but also...... heterodyne receivers with requirements of room temperature operation, low system complexity, and high sensitivity, monolithic integrated Schottky diode technology is chosen for the implementation of submillimeterwave components. The corresponding subharmonic mixer and multiplier for a THz radiometer system...

  20. Radiation sensitivity of integrated circuits Pt. 1

    International Nuclear Information System (INIS)

    Bereczkine Kerenyi, Ilona

    1986-01-01

    The cosmic ray sensitivity of CMOS integrated circuits are overviewed in three parts. The aim is to analyze the effects of ionizing radiation on the degradation of electronic parameters, the effects of the electric state during irradiation, and the radiation hardening of ICs. In this Part 1 a general introduction of the response of semiconductors to cosmic radiation is given, and the radiation tolerance and hardening of small-scale integrated CMOS ICs is analyzed in detail. The devices include various basic inverters and simple gate ICs. (R.P.)

  1. 3D Integration for Superconducting Qubits

    Science.gov (United States)

    Rosenberg, Danna; Kim, David; Yost, Donna-Ruth; Mallek, Justin; Yoder, Jonilyn; Das, Rabindra; Racz, Livia; Hover, David; Weber, Steven; Kerman, Andrew; Oliver, William

    Superconducting qubits are a prime candidate for constructing a large-scale quantum processor due to their lithographic scalability, speed, and relatively long coherence times. Moving beyond the few qubit level, however, requires the use of a three-dimensional approach for routing control and readout lines. 3D integration techniques can be used to construct a structure where the sensitive qubits are shielded from a potentially-lossy readout and interconnect chip by an intermediate chip with through-substrate vias, with indium bump bonds providing structural support and electrical conductivity. We will discuss our work developing 3D-integrated coupled qubits, focusing on the characterization of 3D integration components and the effects on qubit performance and design. This research was funded by the Office of the Director of National Intelligence (ODNI), Intelligence Advanced Research Projects Activity (IARPA) via MIT Lincoln Laboratory under Air Force Contract No. FA8721-05-C-0002. The views and conclusions contained herein are those of the authors and should not be interpreted as necessarily representing the official policies or endorsements, either expressed or implied, of ODNI, IARPA, or the US Government.

  2. Sequential circuit design for radiation hardened multiple voltage integrated circuits

    Science.gov (United States)

    Clark, Lawrence T [Phoenix, AZ; McIver, III, John K.

    2009-11-24

    The present invention includes a radiation hardened sequential circuit, such as a bistable circuit, flip-flop or other suitable design that presents substantial immunity to ionizing radiation while simultaneously maintaining a low operating voltage. In one embodiment, the circuit includes a plurality of logic elements that operate on relatively low voltage, and a master and slave latches each having storage elements that operate on a relatively high voltage.

  3. Mouldable all-carbon integrated circuits.

    Science.gov (United States)

    Sun, Dong-Ming; Timmermans, Marina Y; Kaskela, Antti; Nasibulin, Albert G; Kishimoto, Shigeru; Mizutani, Takashi; Kauppinen, Esko I; Ohno, Yutaka

    2013-01-01

    A variety of plastic products, ranging from those for daily necessities to electronics products and medical devices, are produced by moulding techniques. The incorporation of electronic circuits into various plastic products is limited by the brittle nature of silicon wafers. Here we report mouldable integrated circuits for the first time. The devices are composed entirely of carbon-based materials, that is, their active channels and passive elements are all fabricated from stretchable and thermostable assemblies of carbon nanotubes, with plastic polymer dielectric layers and substrates. The all-carbon thin-film transistors exhibit a mobility of 1,027 cm(2) V(-1) s(-1) and an ON/OFF ratio of 10(5). The devices also exhibit extreme biaxial stretchability of up to 18% when subjected to thermopressure forming. We demonstrate functional integrated circuits that can be moulded into a three-dimensional dome. Such mouldable electronics open new possibilities by allowing for the addition of electronic/plastic-like functionalities to plastic/electronic products, improving their designability.

  4. Short Circuits of a 10 MW High Temperature Superconducting Wind Turbine Generator

    DEFF Research Database (Denmark)

    Song, Xiaowei (Andy); Liu, Dong; Polinder, Henk

    2016-01-01

    Direct drive high temperature superconducting (HTS) wind turbine generators have been proposed to tackle challenges for ever increasing wind turbine ratings. Due to smaller reactances in HTS generators, higher fault currents and larger transient torques could occur if sudden short circuits happen...... at generator terminals. In this paper, a finite element model that couples magnetic fields and the generator’s equivalent circuits is developed to simulate short circuit faults. Afterwards, the model is used to study the transient performance of a 10 MW HTS wind turbine generator under four different short...... that the short circuits pose great challenges to the generator, and careful consideration should be given to protect the generator. The results presented in this paper would be beneficial to the design, operation and protection of an HTS wind turbine generator....

  5. Short Circuits of a 10-MW High-Temperature Superconducting Wind Turbine Generator

    DEFF Research Database (Denmark)

    Song, Xiaowei (Andy); Liu, Dong; Polinder, Henk

    2017-01-01

    Direct Drive high-temperature superconducting (HTS) wind turbine generators have been proposed to tackle challenges for ever increasing wind turbine ratings. Due to smaller reactances in HTS generators, higher fault currents and larger transient torques could occur if sudden short circuits take...... place at generator terminals. In this paper, a finite element model that couples magnetic fields and the generator's equivalent circuits is developed to simulate short-circuit faults. Afterward, the model is used to study the transient performance of a 10-MW HTS wind turbine generator under four...... show that the short circuits pose great challenges to the generator, and careful consideration should be given to protect the generator. The findings presented in this paper would be beneficial to the design, operation and protection of an HTS wind turbine generator....

  6. Measuring ac losses in superconducting cables using a resonant circuit:Resonant current experiment (RESCUE)

    DEFF Research Database (Denmark)

    Däumling, Manfred; Olsen, Søren Krüger; Rasmussen, Carsten

    1998-01-01

    be recorded using, for example, a digital oscilloscope. The amplitude decay of the periodic voltage or current accurately reflects the power loss in the system. It consists of two components-an ohmic purely exponential one (from leads, contacts, etc.), and a nonexponential component originating from......A simple way to obtain true ac losses with a resonant circuit containing a superconductor, using the decay of the circuit current, is described. For the measurement a capacitor is short circuited with a superconducting cable. Energy in the circuit is provided by either charging up the capacitors...... with a certain voltage, or letting a de flow in the superconductor. When the oscillations are started-either by opening a switch in case a de is flowing or by closing a switch to connect the charged capacitors with the superconductor-the current (via a Rogowski coil) or the voltage on the capacitor can...

  7. Vacuum die attach for integrated circuits

    Science.gov (United States)

    Schmitt, E.H.; Tuckerman, D.B.

    1991-09-10

    A thin film eutectic bond for attaching an integrated circuit die to a circuit substrate is formed by coating at least one bonding surface on the die and substrate with an alloying metal, assembling the die and substrate under compression loading, and heating the assembly to an alloying temperature in a vacuum. A very thin bond, 10 microns or less, which is substantially void free, is produced. These bonds have high reliability, good heat and electrical conduction, and high temperature tolerance. The bonds are formed in a vacuum chamber, using a positioning and loading fixture to compression load the die, and an IR lamp or other heat source. For bonding a silicon die to a silicon substrate, a gold silicon alloy bond is used. Multiple dies can be bonded simultaneously. No scrubbing is required. 1 figure.

  8. Integrated Circuits for Analog Signal Processing

    CERN Document Server

    2013-01-01

      This book presents theory, design methods and novel applications for integrated circuits for analog signal processing.  The discussion covers a wide variety of active devices, active elements and amplifiers, working in voltage mode, current mode and mixed mode.  This includes voltage operational amplifiers, current operational amplifiers, operational transconductance amplifiers, operational transresistance amplifiers, current conveyors, current differencing transconductance amplifiers, etc.  Design methods and challenges posed by nanometer technology are discussed and applications described, including signal amplification, filtering, data acquisition systems such as neural recording, sensor conditioning such as biomedical implants, actuator conditioning, noise generators, oscillators, mixers, etc.   Presents analysis and synthesis methods to generate all circuit topologies from which the designer can select the best one for the desired application; Includes design guidelines for active devices/elements...

  9. Engineering high-order nonlinear dissipation for quantum superconducting circuits

    Science.gov (United States)

    Mundhada, S. O.; Grimm, A.; Touzard, S.; Shankar, S.; Minev, Z. K.; Vool, U.; Mirrahimi, M.; Devoret, M. H.

    Engineering nonlinear driven-dissipative processes is essential for quantum control. In the case of a harmonic oscillator, nonlinear dissipation can stabilize a decoherence-free manifold, leading to protected quantum information encoding. One possible approach to implement such nonlinear interactions is to combine the nonlinearities provided by Josephson circuits with parametric pump drives. However, it is usually hard to achieve strong nonlinearities while avoiding undesired couplings. Here we propose a scheme to engineer a four-photon drive and dissipation in a harmonic oscillator by cascading experimentally demonstrated two-photon processes. We also report experimental progress towards realization of such a scheme. Work supported by: ARO, ONR, AFOSR and YINQE.

  10. Experience with the Quality Assurance of the Superconducting Electrical Circuits of the LHC Machine

    CERN Document Server

    Bozzini, D; Kotarba, A; Mess, Karl Hubert; Olek, S; Russenschuck, Stephan

    2006-01-01

    The coherence between the powering reference database for the LHC and the Electrical Quality Assurance (ELQA) is guaranteed on the procedural level. However, a challenge remains the coherence between the database, the magnet test and assembly procedures, and the connection of all superconducting circuits in the LHC machine. In this paper, the methods, tooling, and procedures for the ELQA during the assembly phase of the LHC will be presented in view of the practical experience gained in the LHC tunnel. Some examples of detected polarity errors and electrical non-conformities will be presented. The parameters measured at ambient temperature, such as the dielectric insulation of circuits, will be discussed.

  11. Influence of an inner short-circuit on the behaviour of the superconducting magnet

    International Nuclear Information System (INIS)

    Zizek, F.

    1984-01-01

    On exciting one of the superconducting quadrupole magnets, voltage pulses were observed on the winding outlets. Over a certain current level the pulses disappeared and a quench of the magnet was registered. A subsequent analysis proved that phenomenon was caused by short-circuiting of the turns inside one of the quadrupole coils. The voltage pulses were caused by repeated quenches of the short-circuited part of the winding. The above effect did not appear until a certain rate of rise of the current was attained

  12. Influence of an inner short-circuit on the behaviour of the superconducting magnet

    Energy Technology Data Exchange (ETDEWEB)

    Zizek, F. (Skoda k.p., Plzen (Czechoslovakia))

    1984-01-01

    On exciting one of the superconducting quadrupole magnets, voltage pulses were observed on the winding outlets. Over a certain current level the pulses disappeared and a quench of the magnet was registered. A subsequent analysis proved that phenomenon was caused by short-circuiting of the turns inside one of the quadrupole coils. The voltage pulses were caused by repeated quenches of the short-circuited part of the winding. The above effect did not appear until a certain rate of rise of the current was attained.

  13. Electrical Quality Assurance of the Superconducting Circuits during LHC Machine Assembly

    CERN Document Server

    Bozzini, D; Desebe, O; Mess, K H; Russenschuck, Stephan; Bednarek, M; Dworak, D; Górnicki, E; Jurkiewicz, P; Kapusta, P; Kotarba, A; Ludwin, J; Olek, S; Talach, M; Zieblinski, M; Klisch, M; Prochal, B

    2008-01-01

    Based on the LHC powering reference database, all-together 1750 superconducting circuits were connected in the various cryogenic transfer lines of the LHC machine. Testing the continuity, magnet polarity, and the quality of the electrical insulation were the main tasks of the Electrical Quality Assurance (ELQA) activities during the LHC machine assembly. With the assembly of the LHC now complete, the paper reviews the work flow, resources, and the qualification results including the different types of electrical non-conformities.

  14. Thermoelectricity from wasted heat of integrated circuits

    KAUST Repository

    Fahad, Hossain M.

    2012-05-22

    We demonstrate that waste heat from integrated circuits especially computer microprocessors can be recycled as valuable electricity to power up a portion of the circuitry or other important accessories such as on-chip cooling modules, etc. This gives a positive spin to a negative effect of ever increasing heat dissipation associated with increased power consumption aligned with shrinking down trend of transistor dimension. This concept can also be used as an important vehicle for self-powered systemson- chip. We provide theoretical analysis supported by simulation data followed by experimental verification of on-chip thermoelectricity generation from dissipated (otherwise wasted) heat of a microprocessor.

  15. Continuous surveillance of reactor coolant circuit integrity

    International Nuclear Information System (INIS)

    1986-01-01

    Continuous surveillance is important to assuring the integrity of a reactor coolant circuit. It can give pre-warning of structural degradation and indicate where off-line inspection should be focussed. These proceedings describe the state of development of several techniques which may be used. These involve measuring structural vibration, core neutron noise, acoustic emission from cracks, coolant leakage, or operating parameters such as coolant temperature and pressure. Twenty three papers have been abstracted and indexed separately for inclusion in the data base

  16. Organic membrane photonic integrated circuits (OMPICs).

    Science.gov (United States)

    Amemiya, Tomohiro; Kanazawa, Toru; Hiratani, Takuo; Inoue, Daisuke; Gu, Zhichen; Yamasaki, Satoshi; Urakami, Tatsuhiro; Arai, Shigehisa

    2017-08-07

    We propose the concept of organic membrane photonic integrated circuits (OMPICs), which incorporate various functions needed for optical signal processing into a flexible organic membrane. We describe the structure of several devices used within the proposed OMPICs (e.g., transmission lines, I/O couplers, phase shifters, photodetectors, modulators), and theoretically investigate their characteristics. We then present a method of fabricating the photonic devices monolithically in an organic membrane and demonstrate the operation of transmission lines and I/O couplers, the most basic elements of OMPICs.

  17. Testing Fixture For Microwave Integrated Circuits

    Science.gov (United States)

    Romanofsky, Robert; Shalkhauser, Kurt

    1989-01-01

    Testing fixture facilitates radio-frequency characterization of microwave and millimeter-wave integrated circuits. Includes base onto which two cosine-tapered ridge waveguide-to-microstrip transitions fastened. Length and profile of taper determined analytically to provide maximum bandwidth and minimum insertion loss. Each cosine taper provides transformation from high impedance of waveguide to characteristic impedance of microstrip. Used in conjunction with automatic network analyzer to provide user with deembedded scattering parameters of device under test. Operates from 26.5 to 40.0 GHz, but operation extends to much higher frequencies.

  18. Microwave plasmatrons for giant integrated circuit processing

    Energy Technology Data Exchange (ETDEWEB)

    Petrin, A.B.

    2000-02-01

    A method for calculating the interaction of a powerful microwave with a plane layer of magnetoactive low-pressure plasma under conditions of electron cyclotron resonance is presented. In this paper, the plasma layer is situated between a plane dielectric layer and a plane metal screen. The calculation model contains the microwave energy balance, particle balance, and electron energy balance. The equation that expressed microwave properties of nonuniform magnetoactive plasma is found. The numerical calculations of the microwave-plasma interaction for a one-dimensional model of the problem are considered. Applications of the results for microwave plasmatrons designed for processing giant integrated circuits are suggested.

  19. Accelerating functional verification of an integrated circuit

    Science.gov (United States)

    Deindl, Michael; Ruedinger, Jeffrey Joseph; Zoellin, Christian G.

    2015-10-27

    Illustrative embodiments include a method, system, and computer program product for accelerating functional verification in simulation testing of an integrated circuit (IC). Using a processor and a memory, a serial operation is replaced with a direct register access operation, wherein the serial operation is configured to perform bit shifting operation using a register in a simulation of the IC. The serial operation is blocked from manipulating the register in the simulation of the IC. Using the register in the simulation of the IC, the direct register access operation is performed in place of the serial operation.

  20. Long-wavelength III-V/silicon photonic integrated circuits

    NARCIS (Netherlands)

    Roelkens, G.C.; Kuyken, B.; Leo, F.; Hattasan, N.; Ryckeboer, E.M.P.; Muneeb, M.; Hu, C.L.; Malik, A.; Hens, Z.; Baets, R.G.F.; Shimura, Y.; Gencarelli, F.; Vincent, B.; Loo, van de R.; Verheyen, P.A.; Lepage, G.; Campenhout, van J.; Cerutti, L.; Rodriquez, J.B.; Tournie, E.; Chen, X; Nedeljkovic, G.; Mashanovich, G.; Liu, X.; Green, W.S.

    2013-01-01

    We review our work in the field of short-wave infrared and mid-infrared photonic integrated circuits for applications in spectroscopic sensing systems. Passive silicon waveguide circuits, GeSn photodetectors, the integration of III-V and IV-VI semiconductors on these circuits, and silicon nonlinear

  1. On-chip integration of a superconducting microwave circulator and a Josephson parametric amplifier

    Science.gov (United States)

    Rosenthal, Eric I.; Chapman, Benjamin J.; Moores, Bradley A.; Kerckhoff, Joseph; Malnou, Maxime; Palken, D. A.; Mates, J. A. B.; Hilton, G. C.; Vale, L. R.; Ullom, J. N.; Lehnert, K. W.

    Recent progress in microwave amplification based on parametric processes in superconducting circuits has revolutionized the measurement of feeble microwave signals. These devices, which operate near the quantum limit, are routinely used in ultralow temperature cryostats to: readout superconducting qubits, search for axionic dark matter, and characterize astrophysical sensors. However, these amplifiers often require ferrite circulators to separate incoming and outgoing traveling waves. For this reason, measurement efficiency and scalability are limited. In order to facilitate the routing of quantum signals we have created a superconducting, on-chip microwave circulator without permanent magnets. We integrate our circulator on-chip with a Josephson parametric amplifier for the purpose of near quantum-limited directional amplification. In this talk I will present a design overview and preliminary measurements.

  2. Macromodels of digital integrated circuits for program packages of circuit engineering design

    Science.gov (United States)

    Petrenko, A. I.; Sliusar, P. B.; Timchenko, A. P.

    1984-04-01

    Various aspects of the generation of macromodels of digital integrated circuits are examined, and their effective application in program packages of circuit engineering design is considered. Three levels of macromodels are identified, and the application of such models to the simulation of circuit outputs is discussed.

  3. The circuit of polychromator for Experimental Advanced Superconducting Tokamak edge Thomson scattering diagnostic

    International Nuclear Information System (INIS)

    Zang, Qing; Zhao, Junyu; Chen, Hui; Li, Fengjuan; Hsieh, C. L.

    2013-01-01

    The detector circuit is the core component of filter polychromator which is used for scattering light analysis in Thomson scattering diagnostic, and is responsible for the precision and stability of a system. High signal-to-noise and stability are primary requirements for the diagnostic. Recently, an upgraded detector circuit for weak light detecting in Experimental Advanced Superconducting Tokamak (EAST) edge Thomson scattering system has been designed, which can be used for the measurement of large electron temperature (T e ) gradient and low electron density (n e ). In this new circuit, a thermoelectric-cooled avalanche photodiode with the aid circuit is involved for increasing stability and enhancing signal-to-noise ratio (SNR), especially the circuit will never be influenced by ambient temperature. These features are expected to improve the accuracy of EAST Thomson diagnostic dramatically. Related mechanical construction of the circuit is redesigned as well for heat-sinking and installation. All parameters are optimized, and SNR is dramatically improved. The number of minimum detectable photons is only 10

  4. Innovative Magnetic-Field Array Probe for TRUST Integrated Circuits

    Science.gov (United States)

    2017-03-01

    Despite all actions and concerns, this problem continues to escalate due to offshore fabrication of the integrated circuits ICs [1]. In order to...diagnosis and fault isolation in ICs, as well as the characterization of the functionality of ICs including malicious circuitry. Integrated circuits ...Innovative Magnetic-Field Array Probe for TRUST Integrated Circuits   contains the RF-switch matrix and broad-band (BB) low noise amplifiers (LNAs

  5. Microwaves integrated circuits: hybrids and monolithics - fabrication technology

    International Nuclear Information System (INIS)

    Cunha Pinto, J.K. da

    1983-01-01

    Several types of microwave integrated circuits are presented together with comments about technologies and fabrication processes; advantages and disadvantages in their utilization are analysed. Basic structures, propagation modes, materials used and major steps in the construction of hybrid thin film and monolithic microwave integrated circuits are described. Important technological applications are revised and main activities of the microelectronics lab. of the University of Sao Paulo (Brazil) in the field of hybrid and monolithic microwave integrated circuits are summarized. (C.L.B.) [pt

  6. Integrated optical circuits for numerical computation

    Science.gov (United States)

    Verber, C. M.; Kenan, R. P.

    1983-01-01

    The development of integrated optical circuits (IOC) for numerical-computation applications is reviewed, with a focus on the use of systolic architectures. The basic architecture criteria for optical processors are shown to be the same as those proposed by Kung (1982) for VLSI design, and the advantages of IOCs over bulk techniques are indicated. The operation and fabrication of electrooptic grating structures are outlined, and the application of IOCs of this type to an existing 32-bit, 32-Mbit/sec digital correlator, a proposed matrix multiplier, and a proposed pipeline processor for polynomial evaluation is discussed. The problems arising from the inherent nonlinearity of electrooptic gratings are considered. Diagrams and drawings of the application concepts are provided.

  7. Parallel Jacobi EVD Methods on Integrated Circuits

    Directory of Open Access Journals (Sweden)

    Chi-Chia Sun

    2014-01-01

    Full Text Available Design strategies for parallel iterative algorithms are presented. In order to further study different tradeoff strategies in design criteria for integrated circuits, A 10 × 10 Jacobi Brent-Luk-EVD array with the simplified μ-CORDIC processor is used as an example. The experimental results show that using the μ-CORDIC processor is beneficial for the design criteria as it yields a smaller area, faster overall computation time, and less energy consumption than the regular CORDIC processor. It is worth to notice that the proposed parallel EVD method can be applied to real-time and low-power array signal processing algorithms performing beamforming or DOA estimation.

  8. Monolithic microwave integrated circuit water vapor radiometer

    Science.gov (United States)

    Sukamto, L. M.; Cooley, T. W.; Janssen, M. A.; Parks, G. S.

    1991-01-01

    A proof of concept Monolithic Microwave Integrated Circuit (MMIC) Water Vapor Radiometer (WVR) is under development at the Jet Propulsion Laboratory (JPL). WVR's are used to remotely sense water vapor and cloud liquid water in the atmosphere and are valuable for meteorological applications as well as for determination of signal path delays due to water vapor in the atmosphere. The high cost and large size of existing WVR instruments motivate the development of miniature MMIC WVR's, which have great potential for low cost mass production. The miniaturization of WVR components allows large scale deployment of WVR's for Earth environment and meteorological applications. Small WVR's can also result in improved thermal stability, resulting in improved calibration stability. Described here is the design and fabrication of a 31.4 GHz MMIC radiometer as one channel of a thermally stable WVR as a means of assessing MMIC technology feasibility.

  9. RD53A Integrated Circuit Specifications

    CERN Document Server

    Garcia-Sciveres, Mauricio

    2015-01-01

    Specifications for the RD53 collaboration’s first engineering wafer run of an integrated circuit (IC) for hybrid pixel detector readout, called RD53A. RD53A is intended to demonstrate in a large format IC the suitability of the technology (including radiation tolerance), the stable low threshold operation, and the high hit and trigger rate capabilities, required for HL-LHC upgrades of ATLAS and CMS. The wafer scale production will permit the experiments to prototype bump bonding assembly with realistic sensors in this new technology and to measure the performance of hybrid assemblies. RD53A is not intended to be a final production IC for use in an experiment, and will contain design variations for testing purposes, making the pixel matrix non-uniform.

  10. MIMIC For Millimeter Wave Integrated Circuit Radars

    Science.gov (United States)

    Seashore, C. R.

    1987-09-01

    A significant program is currently underway in the U.S. to investigate, develop and produce a variety of GaAs analog circuits for use in microwave and millimeter wave sensors and systems. This represents a "new wave" of RF technology which promises to significantly change system engineering thinking relative to RF Architectures. At millimeter wave frequencies, we look forward to a relatively high level of critical component integration based on MESFET and HEMT device implementations. These designs will spawn more compact RF front ends with colocated antenna/transceiver functions and innovative packaging concepts which will survive and function in a typical military operational environment which includes challenging temperature, shock and special handling requirements.

  11. Photonic integrated circuits: new challenges for lithography

    Science.gov (United States)

    Bolten, Jens; Wahlbrink, Thorsten; Prinzen, Andreas; Porschatis, Caroline; Lerch, Holger; Giesecke, Anna Lena

    2016-10-01

    In this work routes towards the fabrication of photonic integrated circuits (PICs) and the challenges their fabrication poses on lithography, such as large differences in feature dimension of adjacent device features, non-Manhattan-type features, high aspect ratios and significant topographic steps as well as tight lithographic requirements with respect to critical dimension control, line edge roughness and other key figures of merit not only for very small but also for relatively large features, are highlighted. Several ways those challenges are faced in today's low-volume fabrication of PICs, including the concept multi project wafer runs and mix and match approaches, are presented and possible paths towards a real market uptake of PICs are discussed.

  12. Integrated Reconfigurable High-Voltage Transmitting Circuit for CMUTs

    DEFF Research Database (Denmark)

    Llimos Muntal, Pere; Larsen, Dennis Øland; Jørgensen, Ivan Harald Holger

    2014-01-01

    -out and measurements are performed on the integrated circuit. The transmitting circuit is reconfigurable externally making it able to drive a wide variety of CMUTs. The transmitting circuit can generate several pulse shapes, pulse voltages up to 100 V, maximum pulse range of 50 V and frequencies up to 5 MHz. The area...

  13. Adaptive control of power supply for integrated circuits

    NARCIS (Netherlands)

    2012-01-01

    The present invention relates to a circuit arrangement and method for controlling power supply in an integrated circuit wherein at least one working parameter of at least one electrically isolated circuit region (10) is monitored, and the conductivity of a variable resistor means is locally

  14. Performance of the Protection System for Superconducting Circuits during LHC Operation

    OpenAIRE

    Denz, R; Charifoulline, Z; Dahlerup-Petersen, K; Schmidt, R; Siemko, A; Steckert, J

    2011-01-01

    The protection system for superconducting magnets and bus-bars is an essential part of the LHC machine protection and ensures the integrity of substantial elements of the accelerator. Due to the large amount of hardwired and software interlock channels the dependability of the system is a critical parameter for the successful operation of the LHC.

  15. Nanofabrication for On-Chip Optical Levitation, Atom-Trapping, and Superconducting Quantum Circuits

    Science.gov (United States)

    Norte, Richard Alexander

    a final value of Qm = 5.8(1.1) x 105, representing more than an order of magnitude improvement over the conventional limits of SiO2 for a pendulum geometry. Our technique may enable new opportunities for mechanical sensing and facilitate observations of quantum behavior in this class of mechanical systems. We then give a detailed overview of the techniques used to produce high-aspect-ratio nanostructures with applications in a wide range of quantum optics experiments. The ability to fabricate such nanodevices with high precision opens the door to a vast array of experiments which integrate macroscopic optical setups with lithographically engineered nanodevices. Coupled with atom-trapping experiments in the Kimble Lab, we use these techniques to realize a new waveguide chip designed to address ultra-cold atoms along lithographically patterned nanobeams which have large atom-photon coupling and near 4pi Steradian optical access for cooling and trapping atoms. We describe a fully integrated and scalable design where cold atoms are spatially overlapped with the nanostring cavities in order to observe a resonant optical depth of d0 ≈ 0.15. The nanodevice illuminates new possibilities for integrating atoms into photonic circuits and engineering quantum states of atoms and light on a microscopic scale. We then describe our work with superconducting microwave resonators coupled to a phononic cavity towards the goal of building an integrated device for quantum-limited microwave-to-optical wavelength conversion. We give an overview of our characterizations of several types of substrates for fabricating a low-loss high-frequency electromechanical system. We describe our electromechanical system fabricated on a SiN membrane which consists of a 12 GHz superconducting LC resonator coupled capacitively to the high frequency localized modes of a phononic nanobeam. Using our suspended membrane geometry we isolate our system from substrates with significant loss tangents

  16. CMOS digital integrated circuits a first course

    CERN Document Server

    Hawkins, Charles; Zarkesh-Ha, Payman

    2016-01-01

    This book teaches the fundamentals of modern CMOS technology and covers equal treatment to both types of MOSFET transistors that make up computer circuits; power properties of logic circuits; physical and electrical properties of metals; introduction of timing circuit electronics and introduction of layout; real-world examples and problem sets.

  17. SiGe Integrated Circuit Developments for SQUID/TES Readout

    Science.gov (United States)

    Prêle, D.; Voisin, F.; Beillimaz, C.; Chen, S.; Piat, M.; Goldwurm, A.; Laurent, P.

    2018-03-01

    SiGe integrated circuits dedicated to the readout of superconducting bolometer arrays for astrophysics have been developed since more than 10 years at APC. Whether for Cosmic Microwave Background (CMB) observations with the QUBIC ground-based experiment (Aumont et al. in astro-ph.IM, 2016. arXiv:1609.04372) or for the Hot and Energetic Universe science theme with the X-IFU instrument on-board of the ATHENA space mission (Barret et al. in SPIE 9905, space telescopes & instrumentation 2016: UV to γ Ray, 2016. https://doi.org/10.1117/12.2232432), several kinds of Transition Edge Sensor (TES) (Irwin and Hilton, in ENSS (ed) Cryogenic particle detection, Springer, Berlin, 2005) arrays have been investigated. To readout such superconducting detector arrays, we use time or frequency domain multiplexers (TDM, FDM) (Prêle in JINST 10:C08015, 2016. https://doi.org/10.1088/1748-0221/10/08/C08015) with Superconducting QUantum Interference Devices (SQUID). In addition to the SQUID devices, low-noise biasing and amplification are needed. These last functions can be obtained by using BiCMOS SiGe technology in an Application Specific Integrated Circuit (ASIC). ASIC technology allows integration of highly optimised circuits specifically designed for a unique application. Moreover, we could reach very low-noise and wide band amplification using SiGe bipolar transistor either at room or cryogenic temperatures (Cressler in J Phys IV 04(C6):C6-101, 1994. https://doi.org/10.1051/jp4:1994616). This paper discusses the use of SiGe integrated circuits for SQUID/TES readout and gives an update of the last developments dedicated to the QUBIC telescope and to the X-IFU instrument. Both ASIC called SQmux128 and AwaXe are described showing the interest of such SiGe technology for SQUID multiplexer controls.

  18. Energy-efficient neuron, synapse and STDP integrated circuits.

    Science.gov (United States)

    Cruz-Albrecht, Jose M; Yung, Michael W; Srinivasa, Narayan

    2012-06-01

    Ultra-low energy biologically-inspired neuron and synapse integrated circuits are presented. The synapse includes a spike timing dependent plasticity (STDP) learning rule circuit. These circuits have been designed, fabricated and tested using a 90 nm CMOS process. Experimental measurements demonstrate proper operation. The neuron and the synapse with STDP circuits have an energy consumption of around 0.4 pJ per spike and synaptic operation respectively.

  19. Heavy ions testing experimental results on programmable integrated circuits

    International Nuclear Information System (INIS)

    Velazco, R.; Provost-Grellier, A.

    1988-01-01

    The natural radiation environment in space has been shown to produce anomalies in satellite-borne microelectronics. It becomes then mandatory to define qualification strategies allowing to choose the less vulnerable circuits. In this paper, is presented a strategy devoted to one of the most critical effects, the soft errors (so called upset). The method addresses programmable integrated circuits i.e. circuits able to execute an instruction or command set. Experimental results on representative circuits will illustrate the approach. 11 refs [fr

  20. Reverse Engineering Camouflaged Sequential Integrated Circuits Without Scan Access

    OpenAIRE

    Massad, Mohamed El; Garg, Siddharth; Tripunitara, Mahesh

    2017-01-01

    Integrated circuit (IC) camouflaging is a promising technique to protect the design of a chip from reverse engineering. However, recent work has shown that even camouflaged ICs can be reverse engineered from the observed input/output behaviour of a chip using SAT solvers. However, these so-called SAT attacks have so far targeted only camouflaged combinational circuits. For camouflaged sequential circuits, the SAT attack requires that the internal state of the circuit is controllable and obser...

  1. Fermion-fermion scattering in quantum field theory with superconducting circuits.

    Science.gov (United States)

    García-Álvarez, L; Casanova, J; Mezzacapo, A; Egusquiza, I L; Lamata, L; Romero, G; Solano, E

    2015-02-20

    We propose an analog-digital quantum simulation of fermion-fermion scattering mediated by a continuum of bosonic modes within a circuit quantum electrodynamics scenario. This quantum technology naturally provides strong coupling of superconducting qubits with a continuum of electromagnetic modes in an open transmission line. In this way, we propose qubits to efficiently simulate fermionic modes via digital techniques, while we consider the continuum complexity of an open transmission line to simulate the continuum complexity of bosonic modes in quantum field theories. Therefore, we believe that the complexity-simulating-complexity concept should become a leading paradigm in any effort towards scalable quantum simulations.

  2. Study and realization of a power circuit of a superconducting dipole generator of a magnetic field

    International Nuclear Information System (INIS)

    Rouanet, E.

    1993-01-01

    The project of experimental reactor building on controlled fusion (I.T.E.R) needed the development of a superconducting cable made of niobium-tin. Tested with a current of fifty kilo amperes under a twelve tesla constant field, this cable has to be tested under a variable field. The installation of the power circuit of the dipole field generator, consisted to the study and realization of the four following points: an important power cable; a tension protection organ of the dipole, under a seventeen milli Henrys inductance and four kilo amperes; a current regulating system given by the generator; a complete pilot system of the test station

  3. 10-Qubit Entanglement and Parallel Logic Operations with a Superconducting Circuit

    Science.gov (United States)

    Song, Chao; Xu, Kai; Liu, Wuxin; Yang, Chui-ping; Zheng, Shi-Biao; Deng, Hui; Xie, Qiwei; Huang, Keqiang; Guo, Qiujiang; Zhang, Libo; Zhang, Pengfei; Xu, Da; Zheng, Dongning; Zhu, Xiaobo; Wang, H.; Chen, Y.-A.; Lu, C.-Y.; Han, Siyuan; Pan, Jian-Wei

    2017-11-01

    Here we report on the production and tomography of genuinely entangled Greenberger-Horne-Zeilinger states with up to ten qubits connecting to a bus resonator in a superconducting circuit, where the resonator-mediated qubit-qubit interactions are used to controllably entangle multiple qubits and to operate on different pairs of qubits in parallel. The resulting 10-qubit density matrix is probed by quantum state tomography, with a fidelity of 0.668 ±0.025 . Our results demonstrate the largest entanglement created so far in solid-state architectures and pave the way to large-scale quantum computation.

  4. Consolidation of the LHC superconducting magnets and circuits during LS1

    International Nuclear Information System (INIS)

    Tock, J.P.

    2012-01-01

    All the activities necessary to consolidate the LHC superconducting magnets and circuits are presented, especially the consolidation of the main splices, replacement of weak cryo-magnets, the consolidation of the DFBAs (electrical feed-boxes) and the special interventions. For each of them, the baseline strategy is presented, highlighting the reasons that led to these choices and the remaining risk level. In particular, the progress of the work of the LHC Splices Task Force, the recommendations of the second LHC Splices Review (November 2011) and their analysis are reported. Finally, the work planning, the organization chart and the associated resources are detailed. (author)

  5. Integrated circuits based on conjugated polymer monolayer.

    Science.gov (United States)

    Li, Mengmeng; Mangalore, Deepthi Kamath; Zhao, Jingbo; Carpenter, Joshua H; Yan, Hongping; Ade, Harald; Yan, He; Müllen, Klaus; Blom, Paul W M; Pisula, Wojciech; de Leeuw, Dago M; Asadi, Kamal

    2018-01-31

    It is still a great challenge to fabricate conjugated polymer monolayer field-effect transistors (PoM-FETs) due to intricate crystallization and film formation of conjugated polymers. Here we demonstrate PoM-FETs based on a single monolayer of a conjugated polymer. The resulting PoM-FETs are highly reproducible and exhibit charge carrier mobilities reaching 3 cm 2  V -1  s -1 . The high performance is attributed to the strong interactions of the polymer chains present already in solution leading to pronounced edge-on packing and well-defined microstructure in the monolayer. The high reproducibility enables the integration of discrete unipolar PoM-FETs into inverters and ring oscillators. Real logic functionality has been demonstrated by constructing a 15-bit code generator in which hundreds of self-assembled PoM-FETs are addressed simultaneously. Our results provide the state-of-the-art example of integrated circuits based on a conjugated polymer monolayer, opening prospective pathways for bottom-up organic electronics.

  6. Silicon carbide MOSFET integrated circuit technology

    Energy Technology Data Exchange (ETDEWEB)

    Brown, D.M.; Downey, E.; Ghezzo, M.; Kretchmer, J.; Krishnamurthy, V.; Hennessy, W.; Michon, G. [General Electric Co., Schenectady, NY (United States). Corporate Research and Development Center

    1997-07-16

    The research and development activities carried out to demonstrate the status of MOS planar technology for the manufacture of high temperature SiC ICs will be described. These activities resulted in the design, fabrication and demonstration of the World`s first SiC analog IC - a monolithic MOSFET operational amplifier. Research tasks required for the development of a planar SiC MOSFET IC technology included characterization of the SiC/SiO{sub 2} interface using thermally grown oxides: high temperature (350 C) reliability studies of thermally grown oxides: ion implantation studies of donor (N) and acceptor (B) dopants to form junction diodes: epitaxial layer characterization: N channel inversion and depletion mode MOSFETs; device isolation methods and finally integrated circuit design, fabrication and testing of the World`s first monolithic SiC operational amplifier IC. These studies defined a SiC n-channel depletion mode MOSFET IC technology and outlined tasks required to improve all types of SiC devices. For instance, high temperature circuit drift instabilities at 350 C were discovered and characterized. This type of instability needs to be understood and resolved because it affects the high temperature reliability of other types of SiC devices. Improvements in SiC wafer surface quality and the use of deposited oxides instead of thermally grown SiO{sub 2} gate dielectrics will probably be required for enhanced reliability. The slow reverse recovery time exhibited by n{sup +}-p diodes formed by N ion implantation is a problem that needs to be resolved for all types of planar bipolar devices. The reproducibility of acceptor implants needs to be improved before CMOS ICs and many types of power device structures will be manufacturable. (orig.) 51 refs.

  7. Wide-band polarization controller for Si photonic integrated circuits.

    Science.gov (United States)

    Velha, P; Sorianello, V; Preite, M V; De Angelis, G; Cassese, T; Bianchi, A; Testa, F; Romagnoli, M

    2016-12-15

    A circuit for the management of any arbitrary polarization state of light is demonstrated on an integrated silicon (Si) photonics platform. This circuit allows us to adapt any polarization into the standard fundamental TE mode of a Si waveguide and, conversely, to control the polarization and set it to any arbitrary polarization state. In addition, the integrated thermal tuning allows kilohertz speed which can be used to perform a polarization scrambler. The circuit was used in a WDM link and successfully used to adapt four channels into a standard Si photonic integrated circuit.

  8. Experiments on two-resonator circuit quantum electrodynamics. A superconducting quantum switch

    Energy Technology Data Exchange (ETDEWEB)

    Hoffmann, Elisabeth Christiane Maria

    2013-05-29

    The field of cavity quantum electrodynamics (QED) studies the interaction between light and matter on a fundamental level. In typical experiments individual natural atoms are interacting with individual photons trapped in three-dimensional cavities. Within the last decade the prospering new field of circuit QED has been developed. Here, the natural atoms are replaced by artificial solid state quantum circuits offering large dipole moments which are coupled to quasi-onedimensional cavities providing a small mode volume and hence a large vacuum field strength. In our experiments Josephson junction based superconducting quantum bits are coupled to superconducting microwave resonators. In circuit QED the number of parameters that can be varied is increased and regimes that are not accessible using natural atoms can be entered and investigated. Apart from design flexibility and tunability of system parameters a particular advantage of circuit QED is the scalability to larger system size enabled by well developed micro- and nanofabrication tools. When scaling up the resonator-qubit systems beyond a few coupled circuits, the rapidly increasing number of interacting subsystems requires an active control and directed transmission of quantum signals. This can, for example, be achieved by implementing switchable coupling between two microwave resonators. To this end, a superconducting flux qubit is used to realize a suitable coupling between two microwave resonators, all working in the Gigahertz regime. The resulting device is called quantum switch. The flux qubit mediates a second order tunable and switchable coupling between the resonators. Depending on the qubit state, this coupling can compensate for the direct geometric coupling of the two resonators. As the qubit may also be in a quantum superposition state, the switch itself can be ''quantum'': it can be a superposition of ''on'' and ''off''. This work

  9. Experiments on two-resonator circuit quantum electrodynamics. A superconducting quantum switch

    International Nuclear Information System (INIS)

    Hoffmann, Elisabeth Christiane Maria

    2013-01-01

    The field of cavity quantum electrodynamics (QED) studies the interaction between light and matter on a fundamental level. In typical experiments individual natural atoms are interacting with individual photons trapped in three-dimensional cavities. Within the last decade the prospering new field of circuit QED has been developed. Here, the natural atoms are replaced by artificial solid state quantum circuits offering large dipole moments which are coupled to quasi-onedimensional cavities providing a small mode volume and hence a large vacuum field strength. In our experiments Josephson junction based superconducting quantum bits are coupled to superconducting microwave resonators. In circuit QED the number of parameters that can be varied is increased and regimes that are not accessible using natural atoms can be entered and investigated. Apart from design flexibility and tunability of system parameters a particular advantage of circuit QED is the scalability to larger system size enabled by well developed micro- and nanofabrication tools. When scaling up the resonator-qubit systems beyond a few coupled circuits, the rapidly increasing number of interacting subsystems requires an active control and directed transmission of quantum signals. This can, for example, be achieved by implementing switchable coupling between two microwave resonators. To this end, a superconducting flux qubit is used to realize a suitable coupling between two microwave resonators, all working in the Gigahertz regime. The resulting device is called quantum switch. The flux qubit mediates a second order tunable and switchable coupling between the resonators. Depending on the qubit state, this coupling can compensate for the direct geometric coupling of the two resonators. As the qubit may also be in a quantum superposition state, the switch itself can be ''quantum'': it can be a superposition of ''on'' and ''off''. This work presents the theoretical background, the fabrication techniques and

  10. Topology Optimization of Building Blocks for Photonic Integrated Circuits

    DEFF Research Database (Denmark)

    Jensen, Jakob Søndergaard; Sigmund, Ole

    2005-01-01

    Photonic integrated circuits are likely candidates as high speed replacements for the standard electrical integrated circuits of today. However, in order to obtain a satisfactorily performance many design prob- lems that up until now have resulted in too high losses must be resolved. In this work...... we demonstrate how the method of topology optimization can be used to design a variety of high performance building blocks for the future circuits....

  11. Integrated optical switch circuit operating under FPGA control

    NARCIS (Netherlands)

    Stabile, R.; Zal, M.; Williams, K.A.; Bienstman, P.; Morthier, G.; Roelkens, G.; et al., xx

    2011-01-01

    Integrated photonic circuits are enabling an abrupt step change in networking systems providing massive bandwidth and record transmission. The increasing complexity of high connectivity photonic integrated switches requires sophisticated control planes and more intimate high speed electronics. Here

  12. A mechanical arcless dc circuit breaker for a superconducting magnet system

    International Nuclear Information System (INIS)

    Yamaguchi, S.; Sasao, H.; Matumura, Y.; Tukamoto, T.

    1993-01-01

    Next fusion research experiments plan to use many superconducting magnets. When a quench phenomenon is observed, the current should be interrupted to protect the magnet. Therefore, a dc circuit breaker is necessary. There are four technical situations to be considered for the dc circuit breaker system; (1) high rated current, (2) smaller size breaker, (3) high reliability and (4) no surge voltage during the interruption. The sizer of the breaker is limited by the arc current density of the contacts, and the low current density is better in the circuit breakers. A high rated current also needs the large contacts of the breaker. Here, we introduce a new type of dc circuit breaker system which does not generate an arc plasma between the contacts, equip the high rated current disconnecting switch and a fuse for the failure of the interruption, and use the conventional ac breaker. The switch size of the breaker is almost one hundred times smaller than that of the previous switch. (orig.)

  13. Fabrication of Circuit QED Quantum Processors, Part 1: Extensible Footprint for a Superconducting Surface Code

    Science.gov (United States)

    Bruno, A.; Michalak, D. J.; Poletto, S.; Clarke, J. S.; Dicarlo, L.

    Large-scale quantum computation hinges on the ability to preserve and process quantum information with higher fidelity by increasing redundancy in a quantum error correction code. We present the realization of a scalable footprint for superconducting surface code based on planar circuit QED. We developed a tileable unit cell for surface code with all I/O routed vertically by means of superconducting through-silicon vias (TSVs). We address some of the challenges encountered during the fabrication and assembly of these chips, such as the quality of etch of the TSV, the uniformity of the ALD TiN coating conformal to the TSV, and the reliability of superconducting indium contact between the chips and PCB. We compare measured performance to a detailed list of specifications required for the realization of quantum fault tolerance. Our demonstration using centimeter-scale chips can accommodate the 50 qubits needed to target the experimental demonstration of small-distance logical qubits. Research funded by Intel Corporation and IARPA.

  14. Securing Health Sensing Using Integrated Circuit Metric

    Science.gov (United States)

    Tahir, Ruhma; Tahir, Hasan; McDonald-Maier, Klaus

    2015-01-01

    Convergence of technologies from several domains of computing and healthcare have aided in the creation of devices that can help health professionals in monitoring their patients remotely. An increase in networked healthcare devices has resulted in incidents related to data theft, medical identity theft and insurance fraud. In this paper, we discuss the design and implementation of a secure lightweight wearable health sensing system. The proposed system is based on an emerging security technology called Integrated Circuit Metric (ICMetric) that extracts the inherent features of a device to generate a unique device identification. In this paper, we provide details of how the physical characteristics of a health sensor can be used for the generation of hardware “fingerprints”. The obtained fingerprints are used to deliver security services like authentication, confidentiality, secure admission and symmetric key generation. The generated symmetric key is used to securely communicate the health records and data of the patient. Based on experimental results and the security analysis of the proposed scheme, it is apparent that the proposed system enables high levels of security for health monitoring in resource optimized manner. PMID:26492250

  15. Counterfeit integrated circuits detection and avoidance

    CERN Document Server

    Tehranipoor, Mark (Mohammad); Forte, Domenic

    2015-01-01

    This timely and exhaustive study offers a much-needed examination of the scope and consequences of the electronic counterfeit trade.  The authors describe a variety of shortcomings and vulnerabilities in the electronic component supply chain, which can result in counterfeit integrated circuits (ICs).  Not only does this book provide an assessment of the current counterfeiting problems facing both the public and private sectors, it also offers practical, real-world solutions for combatting this substantial threat.   ·      Helps beginners and practitioners in the field by providing a comprehensive background on the counterfeiting problem; ·      Presents innovative taxonomies for counterfeit types, test methods, and counterfeit defects, which allows for a detailed analysis of counterfeiting and its mitigation; ·      Provides step-by-step solutions for detecting different types of counterfeit ICs; ·      Offers pragmatic and practice-oriented, realistic solutions to counterfeit IC d...

  16. Securing Health Sensing Using Integrated Circuit Metric

    Directory of Open Access Journals (Sweden)

    Ruhma Tahir

    2015-10-01

    Full Text Available Convergence of technologies from several domains of computing and healthcare have aided in the creation of devices that can help health professionals in monitoring their patients remotely. An increase in networked healthcare devices has resulted in incidents related to data theft, medical identity theft and insurance fraud. In this paper, we discuss the design and implementation of a secure lightweight wearable health sensing system. The proposed system is based on an emerging security technology called Integrated Circuit Metric (ICMetric that extracts the inherent features of a device to generate a unique device identification. In this paper, we provide details of how the physical characteristics of a health sensor can be used for the generation of hardware “fingerprints”. The obtained fingerprints are used to deliver security services like authentication, confidentiality, secure admission and symmetric key generation. The generated symmetric key is used to securely communicate the health records and data of the patient. Based on experimental results and the security analysis of the proposed scheme, it is apparent that the proposed system enables high levels of security for health monitoring in resource optimized manner.

  17. Designing TSVs for 3D Integrated Circuits

    CERN Document Server

    Khan, Nauman

    2013-01-01

    This book explores the challenges and presents best strategies for designing Through-Silicon Vias (TSVs) for 3D integrated circuits.  It describes a novel technique to mitigate TSV-induced noise, the GND Plug, which is superior to others adapted from 2-D planar technologies, such as a backside ground plane and traditional substrate contacts. The book also investigates, in the form of a comparative study, the impact of TSV size and granularity, spacing of C4 connectors, off-chip power delivery network, shared and dedicated TSVs, and coaxial TSVs on the quality of power delivery in 3-D ICs. The authors provide detailed best design practices for designing 3-D power delivery networks.  Since TSVs occupy silicon real-estate and impact device density, this book provides four iterative algorithms to minimize the number of TSVs in a power delivery network. Unlike other existing methods, these algorithms can be applied in early design stages when only functional block- level behaviors and a floorplan are available....

  18. Securing health sensing using integrated circuit metric.

    Science.gov (United States)

    Tahir, Ruhma; Tahir, Hasan; McDonald-Maier, Klaus

    2015-10-20

    Convergence of technologies from several domains of computing and healthcare have aided in the creation of devices that can help health professionals in monitoring their patients remotely. An increase in networked healthcare devices has resulted in incidents related to data theft, medical identity theft and insurance fraud. In this paper, we discuss the design and implementation of a secure lightweight wearable health sensing system. The proposed system is based on an emerging security technology called Integrated Circuit Metric (ICMetric) that extracts the inherent features of a device to generate a unique device identification. In this paper, we provide details of how the physical characteristics of a health sensor can be used for the generation of hardware "fingerprints". The obtained fingerprints are used to deliver security services like authentication, confidentiality, secure admission and symmetric key generation. The generated symmetric key is used to securely communicate the health records and data of the patient. Based on experimental results and the security analysis of the proposed scheme, it is apparent that the proposed system enables high levels of security for health monitoring in resource optimized manner.

  19. F-Paris: integrated electronic circuits [Tender

    CERN Multimedia

    2003-01-01

    "Fourniture, montage et tests des circuits imprimes et modules multi composants pour le trajectographe central de CMS. Maximum de 12 000 circuits imprimes et modules multi-composants necessaires au trajectographe central de l'experience CMS aupres du Large Hadron Collider" (1 page).

  20. Precise linear gating circuit on integrated microcircuits

    Energy Technology Data Exchange (ETDEWEB)

    Butskii, V.V.; Vetokhin, S.S.; Reznikov, I.V.

    Precise linear gating circuit on four microcircuits is described. A basic flowsheet of the gating circuit is given. The gating circuit consists of two input differential cascades total load of which is two current followers possessing low input and high output resistances. Follower outlets are connected to high ohmic dynamic load formed with a current source which permits to get high amplification (>1000) at one cascade. Nonlinearity amounts to <0.1% in the range of input signal amplitudes of -10-+10 V. Front duration for an output signal with 10 V amplitude amounts to 100 ns. Attenuation of input signal with a closed gating circuit is 60 db. The gating circuits described is used in the device intended for processing of scintillation sensor signals.

  1. Computer-aided engineering of semiconductor integrated circuits

    Science.gov (United States)

    Meindl, J. D.; Dutton, R. W.; Gibbons, J. F.; Helms, C. R.; Plummer, J. D.; Tiller, W. A.; Ho, C. P.; Saraswat, K. C.; Deal, B. E.; Kamins, T. I.

    1980-07-01

    Economical procurement of small quantities of high performance custom integrated circuits for military systems is impeded by inadequate process, device and circuit models that handicap low cost computer aided design. The principal objective of this program is to formulate physical models of fabrication processes, devices and circuits to allow total computer-aided design of custom large-scale integrated circuits. The basic areas under investigation are (1) thermal oxidation, (2) ion implantation and diffusion, (3) chemical vapor deposition of silicon and refractory metal silicides, (4) device simulation and analytic measurements. This report discusses the fourth year of the program.

  2. Integrated differential high-voltage transmitting circuit for CMUTs

    DEFF Research Database (Denmark)

    Llimos Muntal, Pere; Larsen, Dennis Øland; Farch, Kjartan

    2015-01-01

    In this paper an integrated differential high-voltage transmitting circuit for capacitive micromachined ultrasonic transducers (CMUTs) used in portable ultrasound scanners is designed and implemented in a 0.35 μm high-voltage process. Measurements are performed on the integrated circuit in order...... to assess its performance. The circuit generates pulses at differential voltage levels of 60V, 80V and 100 V, a frequency up to 5MHz and a measured driving strength of 1.75 V/ns with the CMUT connected. The total on-chip area occupied by the transmitting circuit is 0.18 mm2 and the power consumption...

  3. Design of 3D integrated circuits and systems

    CERN Document Server

    Sharma, Rohit

    2014-01-01

    Three-dimensional (3D) integration of microsystems and subsystems has become essential to the future of semiconductor technology development. 3D integration requires a greater understanding of several interconnected systems stacked over each other. While this vertical growth profoundly increases the system functionality, it also exponentially increases the design complexity. Design of 3D Integrated Circuits and Systems tackles all aspects of 3D integration, including 3D circuit and system design, new processes and simulation techniques, alternative communication schemes for 3D circuits and sys

  4. Application specific integrated circuits and hybrid micro circuits for nuclear instrumentation

    International Nuclear Information System (INIS)

    Chandratre, V.B.; Sukhwani, Menka; Mukhopadhyay, P.K.; Shastrakar, R.S.; Sudheer, M.; Shedam, V.; Keni, Anubha

    2009-01-01

    Rapid development in semiconductor technology, sensors, detectors and requirements of high energy physics experiments as well as advances in commercially available nuclear instruments have lead to challenges for instrumentation. These challenges are met with development of Application Specific Integrated Circuits and Hybrid Micro Circuits. This paper discusses various activities in ASIC and HMC development in Bhabha Atomic Research Centre. (author)

  5. Parallel sparse direct solver for integrated circuit simulation

    CERN Document Server

    Chen, Xiaoming; Yang, Huazhong

    2017-01-01

    This book describes algorithmic methods and parallelization techniques to design a parallel sparse direct solver which is specifically targeted at integrated circuit simulation problems. The authors describe a complete flow and detailed parallel algorithms of the sparse direct solver. They also show how to improve the performance by simple but effective numerical techniques. The sparse direct solver techniques described can be applied to any SPICE-like integrated circuit simulator and have been proven to be high-performance in actual circuit simulation. Readers will benefit from the state-of-the-art parallel integrated circuit simulation techniques described in this book, especially the latest parallel sparse matrix solution techniques. · Introduces complicated algorithms of sparse linear solvers, using concise principles and simple examples, without complex theory or lengthy derivations; · Describes a parallel sparse direct solver that can be adopted to accelerate any SPICE-like integrated circuit simulato...

  6. Nanophotonic integrated circuits from nanoresonators grown on silicon.

    Science.gov (United States)

    Chen, Roger; Ng, Kar Wei; Ko, Wai Son; Parekh, Devang; Lu, Fanglu; Tran, Thai-Truong D; Li, Kun; Chang-Hasnain, Connie

    2014-07-07

    Harnessing light with photonic circuits promises to catalyse powerful new technologies much like electronic circuits have in the past. Analogous to Moore's law, complexity and functionality of photonic integrated circuits depend on device size and performance scale. Semiconductor nanostructures offer an attractive approach to miniaturize photonics. However, shrinking photonics has come at great cost to performance, and assembling such devices into functional photonic circuits has remained an unfulfilled feat. Here we demonstrate an on-chip optical link constructed from InGaAs nanoresonators grown directly on a silicon substrate. Using nanoresonators, we show a complete toolkit of circuit elements including light emitters, photodetectors and a photovoltaic power supply. Devices operate with gigahertz bandwidths while consuming subpicojoule energy per bit, vastly eclipsing performance of prior nanostructure-based optoelectronics. Additionally, electrically driven stimulated emission from an as-grown nanostructure is presented for the first time. These results reveal a roadmap towards future ultradense nanophotonic integrated circuits.

  7. Superconductivity

    International Nuclear Information System (INIS)

    Taylor, A.W.B.; Noakes, G.R.

    1981-01-01

    This book is an elementray introduction into superconductivity. The topics are the superconducting state, the magnetic properties of superconductors, type I superconductors, type II superconductors and a chapter on the superconductivity theory. (WL)

  8. Theory, analysis and applications of the operation of the superconducting transformer supplying a direct current to a non-dissipative superconducting charge circuit

    International Nuclear Information System (INIS)

    Sole, J.

    1967-01-01

    The author derives the very simple equations governing the operation of a transformer with superconducting windings supplying direct current to a non-dissipative superconducting charge circuit. An analysis of the various possible modes of operation with direct or slowly varying current raises the problem of the magnetic core. The study. leads to a conclusion which a priori might be surprising: the elimination of the magnetic core and the use of a primary super-conductor. An example of a possible realization of such a transformer is given as an indication, and the present prospects for different applications are considered. (author) [fr

  9. Superconducting Qubit Optical Transducer (SQOT)

    Science.gov (United States)

    2015-08-05

    parts on optical signals and any quasiparticle loss caused by optical photons on microwave signals. Using a superconducting 3D cavity as the microwave...plasmonic and quasiparticle losses. 3. The electro-optic material should be easily integrable with superconducting circuits. A fully integrated

  10. Reconfigurable SDM Switching Using Novel Silicon Photonic Integrated Circuit

    DEFF Research Database (Denmark)

    Ding, Yunhong; Kamchevska, Valerija; Dalgaard, Kjeld

    2016-01-01

    -division multiplexing switching using silicon photonic integrated circuit, which is fabricated on a novel silicon-oninsulator platform with buried Al mirror. The silicon photonic integrated circuit is composed of a 7x7 switch and low loss grating coupler array based multicore fiber couplers. Thanks to the Al mirror......, grating couplers with ultra-low coupling loss with optical multicore fibers is achieved. The lowest total insertion loss of the silicon integrated circuit is as low as 4.5 dB, with low crosstalk lower than -30 dB. Excellent performances in terms of low insertion loss and low crosstalk are obtained...

  11. Integrated electric circuit CAD system in Minolta Camera Co. Ltd

    Energy Technology Data Exchange (ETDEWEB)

    Nakagami, Tsuyoshi; Hirata, Sumiaki; Matsumura, Fumihiko

    1988-08-26

    Development background, fundamental concept, details and future plan of the integrated electric circuit CAD system for OA equipment are presented. The central integrated database is basically intended to store experiences or know-hows, to cover the wide range of data required for designs, and to provide a friendly interface. This easy-to-use integrated database covers the drawing data, parts information, design standards, know-hows and system data. The system contains the circuit design function to support drawing circuit diagrams, the wiring design function to support the wiring and arrangement of printed circuit boards and various parts integratedly, and the function to verify designs, to make full use of parts or technical information, to maintain the system security. In the future, as the system will be wholly in operation, the design period reduction, quality improvement and cost saving will be attained by this integrated design system. (19 figs, 2 tabs)

  12. A full feature FASTBUS slave interface using semicustom integrated circuits

    International Nuclear Information System (INIS)

    Skegg, R.; Daviel, A.; Downing, R.

    1986-01-01

    Two semi-custom integrated circuits have been designed and manufactured which enable the construction of a full featured FASTBUS slave interface without the need for a detailed knowledge of the FASTBUS protocol. A relatively small amount of board space is required compared to implementations using conventional circuits. The semi-custom devices are described in detail, and an application example is given. (orig.)

  13. Hybrid integrated circuit for charge-to-time interval conversion

    Energy Technology Data Exchange (ETDEWEB)

    Basiladze, S.G.; Dotsenko, Yu.Yu.; Man' yakov, P.K.; Fedorchenko, S.N. (Joint Inst. for Nuclear Research, Dubna (USSR))

    The hybrid integrated circuit for charge-to time interval conversion with nanosecond input fast response is described. The circuit can be used in energy measuring channels, time-to-digital converters and in the modified variant in amplitude-to-digital converters. The converter described consists of a buffer amplifier, a linear transmission circuit, a direct current source and a unit of time interval separation. The buffer amplifier represents a current follower providing low input and high output resistances by the current feedback. It is concluded that the described converter excelled the QT100B circuit analogous to it in a number of parameters especially, in thermostability.

  14. Continuous-variable geometric phase and its manipulation for quantum computation in a superconducting circuit.

    Science.gov (United States)

    Song, Chao; Zheng, Shi-Biao; Zhang, Pengfei; Xu, Kai; Zhang, Libo; Guo, Qiujiang; Liu, Wuxin; Xu, Da; Deng, Hui; Huang, Keqiang; Zheng, Dongning; Zhu, Xiaobo; Wang, H

    2017-10-20

    Geometric phase, associated with holonomy transformation in quantum state space, is an important quantum-mechanical effect. Besides fundamental interest, this effect has practical applications, among which geometric quantum computation is a paradigm, where quantum logic operations are realized through geometric phase manipulation that has some intrinsic noise-resilient advantages and may enable simplified implementation of multi-qubit gates compared to the dynamical approach. Here we report observation of a continuous-variable geometric phase and demonstrate a quantum gate protocol based on this phase in a superconducting circuit, where five qubits are controllably coupled to a resonator. Our geometric approach allows for one-step implementation of n-qubit controlled-phase gates, which represents a remarkable advantage compared to gate decomposition methods, where the number of required steps dramatically increases with n. Following this approach, we realize these gates with n up to 4, verifying the high efficiency of this geometric manipulation for quantum computation.

  15. Epitaxial Al2O3 capacitors for low microwave loss superconducting quantum circuits

    Directory of Open Access Journals (Sweden)

    K.-H. Cho

    2013-10-01

    Full Text Available We have characterized the microwave loss of high-Q parallel plate capacitors fabricated from thin-film Al/Al2O3/Re heterostructures on (0001 Al2O3 substrates. The superconductor-insulator-superconductor trilayers were grown in situ in a hybrid deposition system: the epitaxial Re base and polycrystalline Al counterelectrode layers were grown by sputtering, while the epitaxial Al2O3 layer was grown by pulsed laser deposition. Structural analysis indicates a highly crystalline epitaxial Al2O3 layer and sharp interfaces. The measured intrinsic (low-power, low-temperature quality factor of the resonators is as high as 3 × 104. These results indicate that low-loss grown Al2O3 is an attractive candidate dielectric for high-fidelity superconducting qubit circuits.

  16. System Theoretic Dependability Analysis of the LHC Superconducting Magnet Circuit Protection

    CERN Document Server

    AUTHOR|(CDS)2254970

    Subject of the present work is the application of the methods STPA (System Theoretic Process Analysis) and CAST (Causal Analysis based on STAMP) to analyze the protection systems of the superconducting magnet circuit of the LHC at CERN, Geneva. The named methods are derived from the at MIT developed STAMP (System Theoretic Accident Model and Processes) accident model. The CAST method was applied to the analysis of the 2008 Incident during the Hardware Commissioning. An incorrect interconnection between two magnets damaged the accelerator severely. The analysis defines the control structure of the Commissioning and investigates every subsystem and the interaction between the components. The results were social and technical requirements. Among others, it shows the necessity for safety culture at CERN and a revision of the magnet interconnection process. The present analysis found the same root causes for the incident than a task force did in 2009. Further, the CAST analysis found more, socio-technica...

  17. Precise microwave characterization of MgO substrates for HTS circuits with superconducting post dielectric resonator

    International Nuclear Information System (INIS)

    Mazierska, Janina; Ledenyov, Dimitri; Jacob, Mohan V; Krupka, Jerzy

    2005-01-01

    Accurate data of complex permittivity of dielectric substrates are needed for efficient design of HTS microwave planar circuits. We have tested MgO substrates from three different manufacturing batches using a dielectric resonator with superconducting parts recently developed for precise microwave characterization of laminar dielectrics at cryogenic temperatures. The measurement fixture has been fabricated using a SrLaAlO 3 post dielectric resonator with DyBa 2 Cu 3 O 7 end plates and silver-plated copper sidewalls to achieve the resolution of loss tangent measurements of 2 x 10 -6 . The tested MgO substrates exhibited the average relative permittivity of 9.63 and tanδ from 3.7 x 10 -7 to 2 x 10 -5 at frequency of 10.5 GHz in the temperature range from 14 to 80 K

  18. Precise microwave characterization of MgO substrates for HTS circuits with superconducting post dielectric resonator

    Energy Technology Data Exchange (ETDEWEB)

    Mazierska, Janina [Institute of Information Sciences and Technology, Massey University, Palmerston North, P. Bag 11222 (New Zealand); Ledenyov, Dimitri [Electrical and Computer Engineering, James Cook University, Townsville, Q4811 (Australia); Jacob, Mohan V [Electrical and Computer Engineering, James Cook University, Townsville, Q4811 (Australia); Krupka, Jerzy [Instytut Mikroelektroniki i Optoelektroniki Politechniki Warszawskiej, Koszykowa 75, 00-662 Warsaw (Poland)

    2005-01-01

    Accurate data of complex permittivity of dielectric substrates are needed for efficient design of HTS microwave planar circuits. We have tested MgO substrates from three different manufacturing batches using a dielectric resonator with superconducting parts recently developed for precise microwave characterization of laminar dielectrics at cryogenic temperatures. The measurement fixture has been fabricated using a SrLaAlO{sub 3} post dielectric resonator with DyBa{sub 2}Cu{sub 3}O{sub 7} end plates and silver-plated copper sidewalls to achieve the resolution of loss tangent measurements of 2 x 10{sup -6}. The tested MgO substrates exhibited the average relative permittivity of 9.63 and tan{delta} from 3.7 x 10{sup -7} to 2 x 10{sup -5} at frequency of 10.5 GHz in the temperature range from 14 to 80 K.

  19. On the design of fully-integrated charge preamplifiers for the Superconducting Super Collider

    International Nuclear Information System (INIS)

    VanPeteghem, P.M.; Ling, K.Y.; Lee, S.Y.; Liu, H.H.; DiBitonto, D.

    1990-01-01

    The specifications imposed on the charge preamplifiers, to be used in the Superconducting Supercollider are very demanding: the rise time should be less than 100 nsec and noise should be less than 1,000 electrons RMS for a total power consumption of less than 80 mWatt. Furthermore, several hundreds of thousands (or even millions) of channels have to be manufactured. Hence, integrated circuit (IC) implementations can be more economical than discrete implementations, due to the compact size and ease of manufacturing. BiFET IC technology is currently the most attractive technology, because it is a mature IC technology, and readily available from several industrial vendors. As a case study, a BiFET prototype preamplifier is presented, where circuit performance has been tested for total radiation doses up to 1.4 MegaRads

  20. Vertically integrated circuit development at Fermilab for detectors

    International Nuclear Information System (INIS)

    Yarema, R; Deptuch, G; Hoff, J; Khalid, F; Lipton, R; Shenai, A; Trimpl, M; Zimmerman, T

    2013-01-01

    Today vertically integrated circuits, (a.k.a. 3D integrated circuits) is a popular topic in many trade journals. The many advantages of these circuits have been described such as higher speed due to shorter trace lenghts, the ability to reduce cross talk by placing analog and digital circuits on different levels, higher circuit density without the going to smaller feature sizes, lower interconnect capacitance leading to lower power, reduced chip size, and different processing for the various layers to optimize performance. There are some added advantages specifically for MAPS (Monolithic Active Pixel Sensors) in High Energy Physics: four side buttable pixel arrays, 100% diode fill factor, the ability to move PMOS transistors out of the diode sensing layer, and a increase in channel density. Fermilab began investigating 3D circuits in 2006. Many different bonding processes have been described for fabricating 3D circuits [1]. Fermilab has used three different processes to fabricate several circuits for specific applications in High Energy Physics and X-ray imaging. This paper covers some of the early 3D work at Fermilab and then moves to more recent activities. The major processes we have used are discussed and some of the problems encountered are described. An overview of pertinent 3D circuit designs is presented along with test results thus far.

  1. Status of the consolidation of the LHC superconducting magnets and circuits

    International Nuclear Information System (INIS)

    Tock, J Ph; Atieh, S; Bodart, D; Bordry, F; Bourcey, N; Cruikshank, P; Dahlerup-Petersen, K; Dalin, J M; Garion, C; Musso, A; Ostojic, R; Perin, A; Pojer, M; Savary, F; Scheuerlein, C

    2014-01-01

    The first LHC long shutdown (LS1) started in February 2013. It was triggered by the need to consolidate the 13 kA splices between the superconducting magnets to allow the LHC to reach safely its design energy of 14 TeV center of mass. The final design of the consolidated splices is recalled. 1695 interconnections containing 10 170 splices have to be opened. In addition to the work on the 13 kA splices, the other interventions performed during the first long shut-down on all the superconducting circuits are described. All this work has been structured in a project, gathering about 280 persons. The opening of the interconnections started in April 2013 and consolidation works are planned to be completed by August 2014. This paper describes first the preparation phase with the building of the teams and the detailed planning of the operation. Then, it gives feedback from the worksite, namely lessons learnt and adaptations that were implemented, both from the technical and organizational points of view. Finally, perspectives for the completion of this consolidation campaign are given.

  2. Status of the Consolidation of the LHC Superconducting Magnets and Circuits

    Science.gov (United States)

    Tock, J. Ph; Atieh, S.; Bodart, D.; Bordry, F.; Bourcey, N.; Cruikshank, P.; Dahlerup-Petersen, K.; Dalin, J. M.; Garion, C.; Musso, A.; Ostojic, R.; Perin, A.; Pojer, M.; Savary, F.; Scheuerlein, C.

    2014-05-01

    The first LHC long shutdown (LS1) started in February 2013. It was triggered by the need to consolidate the 13 kA splices between the superconducting magnets to allow the LHC to reach safely its design energy of 14 TeV center of mass. The final design of the consolidated splices is recalled. 1695 interconnections containing 10 170 splices have to be opened. In addition to the work on the 13 kA splices, the other interventions performed during the first long shut-down on all the superconducting circuits are described. All this work has been structured in a project, gathering about 280 persons. The opening of the interconnections started in April 2013 and consolidation works are planned to be completed by August 2014. This paper describes first the preparation phase with the building of the teams and the detailed planning of the operation. Then, it gives feedback from the worksite, namely lessons learnt and adaptations that were implemented, both from the technical and organizational points of view. Finally, perspectives for the completion of this consolidation campaign are given.

  3. Logistic Regression Modeling of Diminishing Manufacturing Sources for Integrated Circuits

    National Research Council Canada - National Science Library

    Gravier, Michael

    1999-01-01

    .... This thesis draws on available data from the electronics integrated circuit industry to attempt to assess whether statistical modeling offers a viable method for predicting the presence of DMSMS...

  4. Microwave integrated circuit mask design, using computer aided microfilm techniques

    Energy Technology Data Exchange (ETDEWEB)

    Reymond, J.M.; Batliwala, E.R.; Ajose, S.O.

    1977-01-01

    This paper examines the possibility of using a computer interfaced with a precision film C.R.T. information retrieval system, to produce photomasks suitable for the production of microwave integrated circuits.

  5. Integrated neuron circuit for implementing neuromorphic system with synaptic device

    Science.gov (United States)

    Lee, Jeong-Jun; Park, Jungjin; Kwon, Min-Woo; Hwang, Sungmin; Kim, Hyungjin; Park, Byung-Gook

    2018-02-01

    In this paper, we propose and fabricate Integrate & Fire neuron circuit for implementing neuromorphic system. Overall operation of the circuit is verified by measuring discrete devices and the output characteristics of the circuit. Since the neuron circuit shows asymmetric output characteristic that can drive synaptic device with Spike-Timing-Dependent-Plasticity (STDP) characteristic, the autonomous weight update process is also verified by connecting the synaptic device and the neuron circuit. The timing difference of the pre-neuron and the post-neuron induce autonomous weight change of the synaptic device. Unlike 2-terminal devices, which is frequently used to implement neuromorphic system, proposed scheme of the system enables autonomous weight update and simple configuration by using 4-terminal synapse device and appropriate neuron circuit. Weight update process in the multi-layer neuron-synapse connection ensures implementation of the hardware-based artificial intelligence, based on Spiking-Neural- Network (SNN).

  6. Feasibility study of superconducting power cables for DC electric railway feeding systems in view of thermal condition at short circuit accident

    Science.gov (United States)

    Kumagai, Daisuke; Ohsaki, Hiroyuki; Tomita, Masaru

    2016-12-01

    A superconducting power cable has merits of a high power transmission capacity, transmission losses reduction, a compactness, etc., therefore, we have been studying the feasibility of applying superconducting power cables to DC electric railway feeding systems. However, a superconducting power cable is required to be cooled down and kept at a very low temperature, so it is important to reveal its thermal and cooling characteristics. In this study, electric circuit analysis models of the system and thermal analysis models of superconducting cables were constructed and the system behaviors were simulated. We analyzed the heat generation by a short circuit accident and transient temperature distribution of the cable to estimate the value of temperature rise and the time required from the accident. From these results, we discussed a feasibility of superconducting cables for DC electric railway feeding systems. The results showed that the short circuit accident had little impact on the thermal condition of a superconducting cable in the installed system.

  7. Pulsed laser-induced SEU in integrated circuits

    International Nuclear Information System (INIS)

    Buchner, S.; Kang, K.; Stapor, W.J.; Campbell, A.B.; Knudson, A.R.; McDonald, P.; Rivet, S.

    1990-01-01

    The authors have used a pulsed picosecond laser to measure the threshold for single event upset (SEU) and single event latchup (SEL) for two different kinds of integrated circuits. The relative thresholds show good agreement with published ion upset data. The consistency of the results together with the advantages of using a laser system suggest that the pulsed laser can be used for SEU/SEL hardness assurance of integrated circuits

  8. Addressable-Matrix Integrated-Circuit Test Structure

    Science.gov (United States)

    Sayah, Hoshyar R.; Buehler, Martin G.

    1991-01-01

    Method of quality control based on use of row- and column-addressable test structure speeds collection of data on widths of resistor lines and coverage of steps in integrated circuits. By use of straightforward mathematical model, line widths and step coverages deduced from measurements of electrical resistances in each of various combinations of lines, steps, and bridges addressable in test structure. Intended for use in evaluating processes and equipment used in manufacture of application-specific integrated circuits.

  9. Analog integrated circuits design for processing physiological signals.

    Science.gov (United States)

    Li, Yan; Poon, Carmen C Y; Zhang, Yuan-Ting

    2010-01-01

    Analog integrated circuits (ICs) designed for processing physiological signals are important building blocks of wearable and implantable medical devices used for health monitoring or restoring lost body functions. Due to the nature of physiological signals and the corresponding application scenarios, the ICs designed for these applications should have low power consumption, low cutoff frequency, and low input-referred noise. In this paper, techniques for designing the analog front-end circuits with these three characteristics will be reviewed, including subthreshold circuits, bulk-driven MOSFETs, floating gate MOSFETs, and log-domain circuits to reduce power consumption; methods for designing fully integrated low cutoff frequency circuits; as well as chopper stabilization (CHS) and other techniques that can be used to achieve a high signal-to-noise performance. Novel applications using these techniques will also be discussed.

  10. Superconductivity

    CERN Document Server

    Poole, Charles P; Farach, Horacio A

    1995-01-01

    Superconductivity covers the nature of the phenomenon of superconductivity. The book discusses the fundamental principles of superconductivity; the essential features of the superconducting state-the phenomena of zero resistance and perfect diamagnetism; and the properties of the various classes of superconductors, including the organics, the buckministerfullerenes, and the precursors to the cuprates. The text also describes superconductivity from the viewpoint of thermodynamics and provides expressions for the free energy; the Ginzburg-Landau and BCS theories; and the structures of the high

  11. Photonic integrated circuits : a new approach to laser technology

    NARCIS (Netherlands)

    Piramidowicz, R.; Stopinski, S.T.; Lawniczuk, K.; Welikow, K.; Szczepanski, P.; Leijtens, X.J.M.; Smit, M.K.

    2012-01-01

    In this work a brief review on photonic integrated circuits (PICs) is presented with a specific focus on integrated lasers and amplifiers. The work presents the history of development of the integration technology in photonics and its comparison to microelectronics. The major part of the review is

  12. Maintaining Qubit Coherence in the face of Increased Superconducting Circuit Complexity

    Science.gov (United States)

    Hover, David; Weber, Steve; Rosenberg, Danna; Samach, Gabriel; Sears, Adam; Birenbaum, Jeffrey; Woods, Wayne; Yoder, Jonilyn; Racz, Livia; Kerman, Jamie; Oliver, William D.

    Maintaining qubit coherence in the face of increased superconducting circuit complexity is a challenge when designing an extensible quantum computing architecture. We consider this challenge in the context of inductively coupled, long-lived, capacitively-shunted flux qubits. Specifically, we discuss our efforts to mitigate the effects of radiation loss, parasitic chip-modes, cross-coupling, and Purcell decay. Our approach employs numerical modeling of the ideal Hamiltonian and electromagnetic analysis of the circuit, both of which are independently shown to be consistent with experimental results. This research was funded by the Office of the Director of National Intelligence (ODNI), Intelligence Advanced Research Projects Activity (IARPA) and by the Assistant Secretary of Defense for Research & Engineering under Air Force Contract No. FA8721-05-C-0002. The views and conclusions contained herein are those of the authors and should not be interpreted as necessarily representing the official policies or endorsements, either expressed or implied, of ODNI, IARPA, or the US Government.

  13. Coupling an Ensemble of Electrons on Superfluid Helium to a Superconducting Circuit

    Directory of Open Access Journals (Sweden)

    Ge Yang

    2016-03-01

    Full Text Available The quantized lateral motional states and the spin states of electrons trapped on the surface of superfluid helium have been proposed as basic building blocks of a scalable quantum computer. Circuit quantum electrodynamics allows strong dipole coupling between electrons and a high-Q superconducting microwave resonator, enabling such sensitive detection and manipulation of electron degrees of freedom. Here, we present the first realization of a hybrid circuit in which a large number of electrons are trapped on the surface of superfluid helium inside a coplanar waveguide resonator. The high finesse of the resonator allows us to observe large dispersive shifts that are many times the linewidth and make fast and sensitive measurements on the collective vibrational modes of the electron ensemble, as well as the superfluid helium film underneath. Furthermore, a large ensemble coupling is observed in the dispersive regime during experiment, and it shows excellent agreement with our numeric model. The coupling strength of the ensemble to the cavity is found to be ≈1  MHz per electron, indicating the feasibility of achieving single electron strong coupling.

  14. Automatic analysis at the commissioning of the LHC superconducting electrical circuits

    International Nuclear Information System (INIS)

    Reymond, H.; Andreassen, O.O.; Charrondiere, C.; Rijllart, A.; Zerlauth, M.

    2012-01-01

    Since the beginning of 2010 the LHC has been operating in a routinely manner, starting with a commissioning phase and then an operation for physics phase. The commissioning of the superconducting electrical circuits requires rigorous test procedures before entering into operation. To maximize the beam operation time of the LHC, these tests should be done as fast as procedures allow. A full commissioning need 12000 tests and is required after circuits have been warmed above liquid nitrogen temperature. Below this temperature, after an end of year break of two months, commissioning needs about 6000 tests. As the manual analysis of the tests takes a major part of the commissioning time, we automated existing analysis tools. We present here how these LabVIEW TM applications were automated, the evaluation of the gain in commissioning time and reduction of experts on night shift observed during the LHC hardware commissioning campaign of 2011 compared to 2010. We end with an outlook at what can be further optimized. (authors)

  15. Automatic Analysis at the Commissioning of the LHC Superconducting Electrical Circuits

    CERN Document Server

    Reymond, H; Charrondiere, C; Rijllart, A; Zerlauth, M

    2011-01-01

    Since the beginning of 2010 the LHC has been operating in a routinely manner, starting with a commissioning phase and then an operation for physics phase. The commissioning of the superconducting electrical circuits requires rigorous test procedures before entering into operation. To maximize the beam operation time of the LHC, these tests should be done as fast as procedures allow. A full commissioning need 12000 tests and is required after circuits have been warmed above liquid nitrogen temperature. Below this temperature, after an end of year break of two months, commissioning needs about 6000 tests. As the manual analysis of the tests takes a major part of the commissioning time, we automated existing analysis tools. We present here how these LabVIEW™ applications were automated, the evaluation of the gain in commissioning time and reduction of experts on night shift observed during the LHC hardware commissioning campaign of 2011 compared to 2010. We end with an outlook at what can be further optimized.

  16. Microwave GaAs Integrated Circuits On Quartz Substrates

    Science.gov (United States)

    Siegel, Peter H.; Mehdi, Imran; Wilson, Barbara

    1994-01-01

    Integrated circuits for use in detecting electromagnetic radiation at millimeter and submillimeter wavelengths constructed by bonding GaAs-based integrated circuits onto quartz-substrate-based stripline circuits. Approach offers combined advantages of high-speed semiconductor active devices made only on epitaxially deposited GaAs substrates with low-dielectric-loss, mechanically rugged quartz substrates. Other potential applications include integration of antenna elements with active devices, using carrier substrates other than quartz to meet particular requirements using lifted-off GaAs layer in membrane configuration with quartz substrate supporting edges only, and using lift-off technique to fabricate ultrathin discrete devices diced separately and inserted into predefined larger circuits. In different device concept, quartz substrate utilized as transparent support for GaAs devices excited from back side by optical radiation.

  17. First applications of high temperature superconductors in microelectronic. Subproject: Foundations of a reality-near simulation of superconducting high frequency circuits. Final report

    International Nuclear Information System (INIS)

    Wolff, I.; Konopka, J.; Fritsch, U.; Hofschen, S.; Rittweger, M.; Becks, T.; Schroeder, W.; Ma Jianguo.

    1994-01-01

    The basis of computer aided design of the physical properties of high temperature superconductors in high frequency and microwave areas were not well known and understood at the beginning of this research project. For this reason within in the research project as well new modells for describing the microwave properties of these superconductors have been developed as alos well known numerical analysis techniques as e.g. the boundary integral method, the method of finite differences in time domain and the spectral domain analysis technique have been changed so that they meet the requirements of superconducting high frequency and microwave circuits. Hereby it especially also was considered that the substrate materials used for high temperature superconductors normally have high dielectric constants and big anisotropies so that new analysis techniques had to be developed to consider the influence of these parameters on the components and circuits. The dielectric properties of the substrate materials furthermore have been a subject of measurement activities in which the permittivity tensor of the materials have been determined with high accuracy and ogver a large frequency range. As a result of the performed investigations now improved numerical simulation techniques on a realistic basis are available for the analysis of superconducting high frequency and microwave circuits. (orig.) [de

  18. Integrating Neural Circuits Controlling Female Sexual Behavior.

    Science.gov (United States)

    Micevych, Paul E; Meisel, Robert L

    2017-01-01

    The hypothalamus is most often associated with innate behaviors such as is hunger, thirst and sex. While the expression of these behaviors important for survival of the individual or the species is nested within the hypothalamus, the desire (i.e., motivation) for them is centered within the mesolimbic reward circuitry. In this review, we will use female sexual behavior as a model to examine the interaction of these circuits. We will examine the evidence for a hypothalamic circuit that regulates consummatory aspects of reproductive behavior, i.e., lordosis behavior, a measure of sexual receptivity that involves estradiol membrane-initiated signaling in the arcuate nucleus (ARH), activating β-endorphin projections to the medial preoptic nucleus (MPN), which in turn modulate ventromedial hypothalamic nucleus (VMH) activity-the common output from the hypothalamus. Estradiol modulates not only a series of neuropeptides, transmitters and receptors but induces dendritic spines that are for estrogenic induction of lordosis behavior. Simultaneously, in the nucleus accumbens of the mesolimbic system, the mating experience produces long term changes in dopamine signaling and structure. Sexual experience sensitizes the response of nucleus accumbens neurons to dopamine signaling through the induction of a long lasting early immediate gene. While estrogen alone increases spines in the ARH, sexual experience increases dendritic spine density in the nucleus accumbens. These two circuits appear to converge onto the medial preoptic area where there is a reciprocal influence of motivational circuits on consummatory behavior and vice versa . While it has not been formally demonstrated in the human, such circuitry is generally highly conserved and thus, understanding the anatomy, neurochemistry and physiology can provide useful insight into the motivation for sexual behavior and other innate behaviors in humans.

  19. Integrating Neural Circuits Controlling Female Sexual Behavior

    Directory of Open Access Journals (Sweden)

    Paul E. Micevych

    2017-06-01

    Full Text Available The hypothalamus is most often associated with innate behaviors such as is hunger, thirst and sex. While the expression of these behaviors important for survival of the individual or the species is nested within the hypothalamus, the desire (i.e., motivation for them is centered within the mesolimbic reward circuitry. In this review, we will use female sexual behavior as a model to examine the interaction of these circuits. We will examine the evidence for a hypothalamic circuit that regulates consummatory aspects of reproductive behavior, i.e., lordosis behavior, a measure of sexual receptivity that involves estradiol membrane-initiated signaling in the arcuate nucleus (ARH, activating β-endorphin projections to the medial preoptic nucleus (MPN, which in turn modulate ventromedial hypothalamic nucleus (VMH activity—the common output from the hypothalamus. Estradiol modulates not only a series of neuropeptides, transmitters and receptors but induces dendritic spines that are for estrogenic induction of lordosis behavior. Simultaneously, in the nucleus accumbens of the mesolimbic system, the mating experience produces long term changes in dopamine signaling and structure. Sexual experience sensitizes the response of nucleus accumbens neurons to dopamine signaling through the induction of a long lasting early immediate gene. While estrogen alone increases spines in the ARH, sexual experience increases dendritic spine density in the nucleus accumbens. These two circuits appear to converge onto the medial preoptic area where there is a reciprocal influence of motivational circuits on consummatory behavior and vice versa. While it has not been formally demonstrated in the human, such circuitry is generally highly conserved and thus, understanding the anatomy, neurochemistry and physiology can provide useful insight into the motivation for sexual behavior and other innate behaviors in humans.

  20. Cryogenic readout integrated circuits for submillimeter-wave camera

    International Nuclear Information System (INIS)

    Nagata, H.; Kobayashi, J.; Matsuo, H.; Akiba, M.; Fujiwara, M.

    2006-01-01

    The development of cryogenic readout circuits for Superconducting Tunneling Junction (Sj) direct detectors for submillimeter wave is presented. A SONY n-channel depletion-mode GaAs Junction Field Effect Transistor (JFET) is a candidate for circuit elements of the preamplifier. We measured electrical characteristics of the GaAs JFETs in the temperature range between 0.3 and 4.2K, and found that the GaAs JFETs work with low power consumption of a few microwatts, and show good current-voltage characteristics without cryogenic anomalies such as kink phenomena or hysteresis behaviors. Furthermore, measurements at 0.3K show that the input referred noise is as low as 0.6μV/Hz at 1Hz. Based on these results and noise calculations, we estimate that a Capacitive Transimpedance Amplifier with the GaAs JFETs will have low noise and STJ detectors will operate below background noise limit

  1. Cryogenic readout integrated circuits for submillimeter-wave camera

    Energy Technology Data Exchange (ETDEWEB)

    Nagata, H. [National Astronomical Observatory of Japan, Mitaka, Tokyo 181-8588 (Japan) and National Astronomical Observatory of Japan, Mitaka, Tokyo 181-8588 (Japan)]. E-mail: hirohisa.nagata@nao.ac.jp; Kobayashi, J. [National Astronomical Observatory of Japan, Mitaka, Tokyo 181-8588 (Japan); The Graduate University for Advanced Studies, Shonan Village, Hayama, Kanagawa 240-0193 (Japan); Matsuo, H. [National Astronomical Observatory of Japan, Mitaka, Tokyo 181-8588 (Japan); Akiba, M. [National Institute of Information and Communications Technology, Koganei, Tokyo 184-8795 (Japan); Fujiwara, M. [National Institute of Information and Communications Technology, Koganei, Tokyo 184-8795 (Japan)

    2006-04-15

    The development of cryogenic readout circuits for Superconducting Tunneling Junction (Sj) direct detectors for submillimeter wave is presented. A SONY n-channel depletion-mode GaAs Junction Field Effect Transistor (JFET) is a candidate for circuit elements of the preamplifier. We measured electrical characteristics of the GaAs JFETs in the temperature range between 0.3 and 4.2K, and found that the GaAs JFETs work with low power consumption of a few microwatts, and show good current-voltage characteristics without cryogenic anomalies such as kink phenomena or hysteresis behaviors. Furthermore, measurements at 0.3K show that the input referred noise is as low as 0.6{mu}V/Hz at 1Hz. Based on these results and noise calculations, we estimate that a Capacitive Transimpedance Amplifier with the GaAs JFETs will have low noise and STJ detectors will operate below background noise limit.

  2. An improved superconducting neural circuit and its application for a neural network solving a combinatorial optimization problem

    International Nuclear Information System (INIS)

    Onomi, T; Nakajima, K

    2014-01-01

    We have proposed a superconducting Hopfield-type neural network for solving the N-Queens problem which is one of combinatorial optimization problems. The sigmoid-shape function of a neuron output is represented by the output of coupled SQUIDs gate consisting of a single-junction and a double-junction SQUIDs. One of the important factors for an improvement of the network performance is an improvement of a threshold characteristic of a neuron circuit. In this paper, we report an improved design of coupled SQUID gates for a superconducting neural network. A step-like function with a steep threshold at a rising edge is desirable for a neuron circuit to solve a combinatorial optimization problem. A neuron circuit is composed of two coupled SQUIDs gates with a cascade connection in order to obtain such characteristics. The designed neuron circuit is fabricated by a 2.5 kA/cm 2 Nb/AlOx/Nb process. The operation of a fabricated neuron circuit is experimentally demonstrated. Moreover, we discuss about the performance of the neural network using the improved neuron circuits and delayed negative self-connections.

  3. Hybrid finite difference/finite element solution method development for non-linear superconducting magnet and electrical circuit breakdown transient analysis

    International Nuclear Information System (INIS)

    Kraus, H.G.; Jones, J.L.

    1986-01-01

    The problem of non-linear superconducting magnet and electrical protection circuit system transients is formulated. To enable studying the effects of coil normalization transients, coil distortion (due to imbalanced magnetic forces), internal coil arcs and shorts, and other normal and off-normal circuit element responses, the following capabilities are included: temporal, voltage and current-dependent voltage sources, current sources, resistors, capacitors and inductors. The concept of self-mutual inductance, and the form of the associated inductance matrix, is discussed for internally shorted coils. This is a Kirchhoff's voltage loop law and Kirchhoff's current node law formulation. The non-linear integrodifferential equation set is solved via a unique hybrid finite difference/integral finite element technique. (author)

  4. Superconductivity

    International Nuclear Information System (INIS)

    Langone, J.

    1989-01-01

    This book explains the theoretical background of superconductivity. Includes discussion of electricity, material fabrication, maglev trains, the superconducting supercollider, and Japanese-US competition. The authors reports the latest discoveries

  5. Superconductivity

    International Nuclear Information System (INIS)

    Onnes, H.K.

    1988-01-01

    The author traces the development of superconductivity from 1911 to 1986. Some of the areas he explores are the Meissner Effect, theoretical developments, experimental developments, engineering achievements, research in superconducting magnets, and research in superconducting electronics. The article also mentions applications shown to be technically feasible, but not yet commercialized. High-temperature superconductivity may provide enough leverage to bring these applications to the marketplace

  6. Investigation for connecting waveguide in off-planar integrated circuits.

    Science.gov (United States)

    Lin, Jie; Feng, Zhifang

    2017-09-01

    The transmission properties of a vertical waveguide connected by different devices in off-planar integrated circuits are designed, investigated, and analyzed in detail by the finite-difference time-domain method. The results show that both guide bandwidth and transmission efficiency can be adjusted effectively by shifting the vertical waveguide continuously. Surprisingly, the wide guide band (0.385[c/a]∼0.407[c/a]) and well transmission (-6  dB) are observed simultaneously in several directions when the vertical waveguide is located at a specific location. The results are very important for all-optical integrated circuits, especially in compact integration.

  7. Chemical sensors fabricated by a photonic integrated circuit foundry

    Science.gov (United States)

    Stievater, Todd H.; Koo, Kee; Tyndall, Nathan F.; Holmstrom, Scott A.; Kozak, Dmitry A.; Goetz, Peter G.; McGill, R. Andrew; Pruessner, Marcel W.

    2018-02-01

    We describe the detection of trace concentrations of chemical agents using waveguide-enhanced Raman spectroscopy in a photonic integrated circuit fabricated by AIM Photonics. The photonic integrated circuit is based on a five-centimeter long silicon nitride waveguide with a trench etched in the top cladding to allow access to the evanescent field of the propagating mode by analyte molecules. This waveguide transducer is coated with a sorbent polymer to enhance detection sensitivity and placed between low-loss edge couplers. The photonic integrated circuit is laid-out using the AIM Photonics Process Design Kit and fabricated on a Multi-Project Wafer. We detect chemical warfare agent simulants at sub parts-per-million levels in times of less than a minute. We also discuss anticipated improvements in the level of integration for photonic chemical sensors, as well as existing challenges.

  8. Micro-relay technology for energy-efficient integrated circuits

    CERN Document Server

    Kam, Hei

    2015-01-01

    This book describes the design of relay-based circuit systems from device fabrication to circuit micro-architectures. This book is ideal for both device engineers as well as circuit system designers and highlights the importance of co-design across design hierarchies when optimizing system performance (in this case, energy-efficiency). This book is ideal for researchers and engineers focused on semiconductors, integrated circuits, and energy efficient electronics. This book also: ·         Covers microsystem fabrication, MEMS device design, circuit design, circuit micro-architecture, and CAD ·         Describes work previously done in the field and also lays the groundwork and criteria for future energy-efficient device and system design ·         Maximizes reader insights into the design and modeling of micro-relay, micro-relay reliability, integrated circuit design with micro-relays, and more

  9. Designing Kerr interactions using multiple superconducting qubit types in a single circuit

    Science.gov (United States)

    Elliott, Matthew; Joo, Jaewoo; Ginossar, Eran

    2018-02-01

    The engineering of Kerr interactions is of great interest for processing quantum information in multipartite quantum systems and for investigating many-body physics in a complex cavity-qubit network. We study how coupling multiple different types of superconducting qubits to the same cavity modes can be used to modify the self- and cross-Kerr effects acting on the cavities and demonstrate that this type of architecture could be of significant benefit for quantum technologies. Using both analytical perturbation theory results and numerical simulations, we first show that coupling two superconducting qubits with opposite anharmonicities to a single cavity enables the effective self-Kerr interaction to be diminished, while retaining the number splitting effect that enables control and measurement of the cavity field. We demonstrate that this reduction of the self-Kerr effect can maintain the fidelity of coherent states and generalised Schrödinger cat states for much longer than typical coherence times in realistic devices. Next, we find that the cross-Kerr interaction between two cavities can be modified by coupling them both to the same pair of qubit devices. When one of the qubits is tunable in frequency, the strength of entangling interactions between the cavities can be varied on demand, forming the basis for logic operations on the two modes. Finally, we discuss the feasibility of producing an array of cavities and qubits where intermediary and on-site qubits can tune the strength of self- and cross-Kerr interactions across the whole system. This architecture could provide a way to engineer interesting many-body Hamiltonians and be a useful platform for quantum simulation in circuit quantum electrodynamics.

  10. Molecular annotation of integrative feeding neural circuits.

    Science.gov (United States)

    Pérez, Cristian A; Stanley, Sarah A; Wysocki, Robert W; Havranova, Jana; Ahrens-Nicklas, Rebecca; Onyimba, Frances; Friedman, Jeffrey M

    2011-02-02

    The identity of higher-order neurons and circuits playing an associative role to control feeding is unknown. We injected pseudorabies virus, a retrograde tracer, into masseter muscle, salivary gland, and tongue of BAC-transgenic mice expressing GFP in specific neural populations and identified several CNS regions that project multisynaptically to the periphery. MCH and orexin neurons were identified in the lateral hypothalamus, and Nurr1 and Cnr1 in the amygdala and insular/rhinal cortices. Cholera toxin β tracing showed that insular Nurr1(+) and Cnr1(+) neurons project to the amygdala or lateral hypothalamus, respectively. Finally, we show that cortical Cnr1(+) neurons show increased Cnr1 mRNA and c-Fos expression after fasting, consistent with a possible role for Cnr1(+) neurons in feeding. Overall, these studies define a general approach for identifying specific molecular markers for neurons in complex neural circuits. These markers now provide a means for functional studies of specific neuronal populations in feeding or other complex behaviors. Copyright © 2011 Elsevier Inc. All rights reserved.

  11. Thermal measurement a requirement for monolithic microwave integrated circuit design

    OpenAIRE

    Hopper, Richard; Oxley, C. H.

    2008-01-01

    The thermal management of structures such as Monolithic Microwave Integrated Circuits (MMICs) is important, given increased circuit packing densities and RF output powers. The paper will describe the IR measurement technology necessary to obtain accurate temperature profiles on the surface of semiconductor devices. The measurement procedure will be explained, including the device mounting arrangement and emissivity correction technique. The paper will show how the measurement technique has be...

  12. Monolithic microwave integrated circuits: Interconnections and packaging considerations

    Science.gov (United States)

    Bhasin, K. B.; Downey, A. N.; Ponchak, G. E.; Romanofsky, R. R.; Anzic, G.; Connolly, D. J.

    1984-01-01

    Monolithic microwave integrated circuits (MMIC's) above 18 GHz were developed because of important potential system benefits in cost reliability, reproducibility, and control of circuit parameters. The importance of interconnection and packaging techniques that do not compromise these MMIC virtues is emphasized. Currently available microwave transmission media are evaluated to determine their suitability for MMIC interconnections. An antipodal finline type of microstrip waveguide transition's performance is presented. Packaging requirements for MMIC's are discussed for thermal, mechanical, and electrical parameters for optimum desired performance.

  13. Application specific integrated circuit for high temperature oil well applications

    Energy Technology Data Exchange (ETDEWEB)

    Fallet, T.; Gakkestad, J.; Forre, G.

    1994-12-31

    This paper describes the design of an integrated BiCMOS circuit for high temperature applications. The circuit contains Pierce oscillators with automatic gain control, and measurements show that it is operating up to 266{sup o}C. The relative frequency variation up to 200 {sup o}C is less than 60 ppm caused mainly by the crystal element itself. 4 refs., 7 figs.

  14. Silicon-based optical integrated circuits for terabit communication networks

    International Nuclear Information System (INIS)

    Svidzinsky, K K

    2003-01-01

    A brief review is presented of the development of silicon-based optical integrated circuits used as components in modern all-optical communication networks with the terabit-per-second transmission capacity. The designs and technologies for manufacturing these circuits are described and the problems related to their development and application in WDM communication systems are considered. (special issue devoted to the memory of academician a m prokhorov)

  15. Monolithic microwave integrated circuits: Interconnections and packaging considerations

    Science.gov (United States)

    Bhasin, K. B.; Downey, A. N.; Ponchak, G. E.; Romanofsky, R. R.; Anzic, G.; Connolly, D. J.

    Monolithic microwave integrated circuits (MMIC's) above 18 GHz were developed because of important potential system benefits in cost reliability, reproducibility, and control of circuit parameters. The importance of interconnection and packaging techniques that do not compromise these MMIC virtues is emphasized. Currently available microwave transmission media are evaluated to determine their suitability for MMIC interconnections. An antipodal finline type of microstrip waveguide transition's performance is presented. Packaging requirements for MMIC's are discussed for thermal, mechanical, and electrical parameters for optimum desired performance.

  16. Development of integrated thermionic circuits for high-temperature applications

    International Nuclear Information System (INIS)

    McCormick, J.B.; Wilde, D.; Depp, S.; Hamilton, D.J.; Kerwin, W.; Derouin, C.; Roybal, L.; Dooley, R.

    1981-01-01

    A class of devices known as integrated thermionic circuits (ITC) capable of extended operation in ambient temperatures up to 500 0 C is described. The evolution of the ITC concept is discussed. A set of practical design and performance equations is demonstrated. Recent experimental results are discussed in which both devices and simple circuits have successfully operated in 500 0 C environments for extended periods of time

  17. Advanced Fabrication Processes for Superconducting Very Large Scale Integrated Circuits

    Science.gov (United States)

    2015-10-13

    transistors. There are several reasons for this gigantic disparity: insufficient funding and lack of profit-driven investments in superconductor...wafers. It can be seen that there is a small statistical difference between the mean values of conductance of JJs over various topographies and the...conductance and, hence, higher critical current and a bit wider statistical distribution than JJs above the ground plane, Fig. 6(b). However, a die

  18. Dielectric isolation for power integrated circuits; Isolation dielectrique enterree pour les circuits integres de puissance

    Energy Technology Data Exchange (ETDEWEB)

    Zerrouk, D.

    1997-07-18

    Considerable efforts have been recently directed towards integrating onto the same chip, sense or protection elements that is low voltage analog and/or digital control circuitry together with high voltage/high current devices. Most of these so called `smart power` devices use either self isolation, junction isolation or Silicon-On-Insulator (SOI) to integrate low voltage elements with vertical power devices. Dielectric isolation is superior to the other isolation techniques such as self isolation or junction isolation. Thesis work consists of the study of the feasibility of a dielectric technology based on the melting and the solidification in a Rapid Thermal Processing furnace (RTP), of thick polysilicon films deposited on oxide. The purpose of this technique is to obtain substrate with localized SOI structures for smart power applications. SOI technology offers significant potential advantages, such as non-occurrence of latch-up in CMOS structures, high packaging density, low parasitic capacitance and the possibility of 3D structures. In addition, SOI technology using thick silicon films (10-100 {mu}m) offers special advantages for high voltage integrated circuits. Several techniques have been developed to form SOI films. Zone melting recrystallization is one of the most promising for localized SOI. The SOI structures have first been analyzed in term of extended defects. N-channel MOSFET`s transistors have also been fabricated in the SOI substrates and electrically characterized (threshold voltages, off-state leakage current, mobilities,...). The SOI transistors exhibit good characteristics, although inferior to witness transistors. The recrystallized silicon films are therefore found to be suitable for the fabrication of SOI devices. (author) 106 refs.

  19. Superconductivity

    International Nuclear Information System (INIS)

    Andersen, N.H.; Mortensen, K.

    1988-12-01

    This report contains lecture notes of the basic lectures presented at the 1st Topsoee Summer School on Superconductivity held at Risoe National Laboratory, June 20-24, 1988. The following lecture notes are included: L.M. Falicov: 'Superconductivity: Phenomenology', A. Bohr and O. Ulfbeck: 'Quantal structure of superconductivity. Gauge angle', G. Aeppli: 'Muons, neutrons and superconductivity', N.F. Pedersen: 'The Josephson junction', C. Michel: 'Physicochemistry of high-T c superconductors', C. Laverick and J.K. Hulm: 'Manufacturing and application of superconducting wires', J. Clarke: 'SQUID concepts and systems'. (orig.) With 10 tabs., 128 figs., 219 refs

  20. Hybrid CMOS/Molecular Integrated Circuits

    Science.gov (United States)

    Stan, M. R.; Rose, G. S.; Ziegler, M. M.

    CMOS silicon technologies are likely to run out of steam in the next 10-15 years despite revolutionary advances in the past few decades. Molecular and other nanoscale technologies show significant promise but it is unlikely that they will completely replace CMOS, at least in the near term. This chapter explores opportunities for using CMOS and nanotechnology to enhance and complement each other in hybrid circuits. As an example of such a hybrid CMOS/nano system, a nanoscale programmable logic array (PLA) based on majority logic is described along with its supplemental CMOS circuitry. It is believed that such systems will be able to sustain the historical advances in the semiconductor industry while addressing manufacturability, yield, power, cost, and performance challenges.

  1. Process Variations and Probabilistic Integrated Circuit Design

    CERN Document Server

    Haase, Joachim

    2012-01-01

    Uncertainty in key parameters within a chip and between different chips in the deep sub micron era plays a more and more important role. As a result, manufacturing process spreads need to be considered during the design process.  Quantitative methodology is needed to ensure faultless functionality, despite existing process variations within given bounds, during product development.   This book presents the technological, physical, and mathematical fundamentals for a design paradigm shift, from a deterministic process to a probability-orientated design process for microelectronic circuits.  Readers will learn to evaluate the different sources of variations in the design flow in order to establish different design variants, while applying appropriate methods and tools to evaluate and optimize their design.  Trains IC designers to recognize problems caused by parameter variations during manufacturing and to choose the best methods available to mitigate these issues during the design process; Offers both qual...

  2. Superconductivity

    International Nuclear Information System (INIS)

    Palmieri, V.

    1990-01-01

    This paper reports on superconductivity the absence of electrical resistance has always fascinated the mind of researchers with a promise of applications unachievable by conventional technologies. Since its discovery superconductivity has been posing many questions and challenges to solid state physics, quantum mechanics, chemistry and material science. Simulations arrived to superconductivity from particle physics, astrophysic, electronics, electrical engineering and so on. In seventy-five years the original promises of superconductivity were going to become reality: a microscopical theory gave to superconductivity the cloth of the science and the level of technological advances was getting higher and higher. High field superconducting magnets became commercially available, superconducting electronic devices were invented, high field accelerating gradients were obtained in superconductive cavities and superconducting particle detectors were under study. Other improvements came in a quiet progression when a tornado brought a revolution in the field: new materials had been discovered and superconductivity, from being a phenomenon relegated to the liquid Helium temperatures, became achievable over the liquid Nitrogen temperature. All the physics and the technological implications under superconductivity have to be considered ab initio

  3. Superconductivity

    CERN Document Server

    Thomas, D B

    1974-01-01

    A short general review is presented of the progress made in applied superconductivity as a result of work performed in connection with the high-energy physics program in Europe. The phenomenon of superconductivity and properties of superconductors of Types I and II are outlined. The main body of the paper deals with the development of niobium-titanium superconducting magnets and of radio-frequency superconducting cavities and accelerating structures. Examples of applications in and for high-energy physics experiments are given, including the large superconducting magnet for the Big European Bubble Chamber, prototype synchrotron magnets for the Super Proton Synchrotron, superconducting d.c. beam line magnets, and superconducting RF cavities for use in various laboratories. (0 refs).

  4. Radiation effects in semiconductors: technologies for hardened integrated circuits

    International Nuclear Information System (INIS)

    Charlot, J.M.

    1983-09-01

    Various technologies are used to manufacture integrated circuits for electronic systems. But for specific applications, including those with radiation environment, it is necessary to choose an appropriate technologie or to improve a specific one in order to reach a definite hardening level. The aim of this paper is to present the main effects induced by radiation (neutrons and gamma rays) into the basic semiconductor devices, to explain some physical degradation mechanisms and to propose solutions for hardened integrated circuit fabrication. The analysis involves essentially the monolithic structure of the integrated circuits and the isolation technology of active elements. In conclusion, the advantages of EPIC and SOS technologies are described and the potentialities of new technologies (GaAs and SOI) are presented

  5. A CMOS integrated timing discriminator circuit for fast scintillation counters

    International Nuclear Information System (INIS)

    Jochmann, M.W.

    1998-01-01

    Based on a zero-crossing discriminator using a CR differentiation network for pulse shaping, a new CMOS integrated timing discriminator circuit is proposed for fast (t r ≥ 2 ns) scintillation counters at the cooler synchrotron COSY-Juelich. By eliminating the input signal's amplitude information by means of an analog continuous-time divider, a normalized pulse shape at the zero-crossing point is gained over a wide dynamic input amplitude range. In combination with an arming comparator and a monostable multivibrator this yields in a highly precise timing discriminator circuit, that is expected to be useful in different time measurement applications. First measurement results of a CMOS integrated logarithmic amplifier, which is part of the analog continuous-time divider, agree well with the corresponding simulations. Moreover, SPICE simulations of the integrated discriminator circuit promise a time walk well below 200 ps (FWHM) over a 40 dB input amplitude dynamic range

  6. Radiation effects in semiconductors: technologies for hardened integrated circuits

    International Nuclear Information System (INIS)

    Charlot, J.M.

    1984-01-01

    Various technologies are used to manufacture integrated circuits for electronic systems. But for specific applications, including those with radiation environment, it is necessary to choose an appropriate technology or to improve a specific one in order to reach a definite hardening level. The aim of this paper is to present the main effects induced by radiation (neutrons and gamma rays) into the basic semiconductor devices, to explain some physical degradation mechanisms and to propose solutions for hardened integrated circuit fabrication. The analysis involves essentially the monolithic structure of the integrated circuits and the isolation technology of active elements. In conclusion, the advantages of EPIC and SOS technologies are described and the potentialities of new technologies (GaAs and SOI) are presented. (author)

  7. Effects of an electromagnetic shield and armature teeth on the short-circuit performance of a direct drive superconducting generator for 10 MW wind turbines

    DEFF Research Database (Denmark)

    Liu, Dong; Polinder, Henk; Abrahamsen, Asger Bech

    2015-01-01

    reactance. An electromagnetic (EM) shield between the rotor and the stator as well as iron or non-magnetic composite (NMC) armature teeth affects the sub-transient reactance of a superconducting machine so that they play a role in the short-circuit performance of a superconducting wind generator. This paper...

  8. Thermally-induced voltage alteration for integrated circuit analysis

    Energy Technology Data Exchange (ETDEWEB)

    Cole, E.I. Jr.

    2000-06-20

    A thermally-induced voltage alteration (TIVA) apparatus and method are disclosed for analyzing an integrated circuit (IC) either from a device side of the IC or through the IC substrate to locate any open-circuit or short-circuit defects therein. The TIVA apparatus uses constant-current biasing of the IC while scanning a focused laser beam over electrical conductors (i.e. a patterned metallization) in the IC to produce localized heating of the conductors. This localized heating produces a thermoelectric potential due to the Seebeck effect in any conductors with open-circuit defects and a resistance change in any conductors with short-circuit defects, both of which alter the power demand by the IC and thereby change the voltage of a source or power supply providing the constant-current biasing. By measuring the change in the supply voltage and the position of the focused and scanned laser beam over time, any open-circuit or short-circuit defects in the IC can be located and imaged. The TIVA apparatus can be formed in part from a scanning optical microscope, and has applications for qualification testing or failure analysis of ICs.

  9. Rabi model as a quantum coherent heat engine: From quantum biology to superconducting circuits

    Science.gov (United States)

    Altintas, Ferdi; Hardal, Ali Ü. C.; Müstecaplıoǧlu, Özgür E.

    2015-02-01

    We propose a multilevel quantum heat engine with a working medium described by a generalized Rabi model which consists of a two-level system coupled to a single-mode bosonic field. The model is constructed to be a continuum limit of a quantum biological description of light-harvesting complexes so that it can amplify quantum coherence by a mechanism which is a quantum analog of classical Huygens clocks. The engine operates in a quantum Otto cycle where the working medium is coupled to classical heat baths in the isochoric processes of the four-stroke cycle, while either the coupling strength or the resonance frequency is changed in the adiabatic stages. We found that such an engine can produce work with an efficiency close to the Carnot bound when it operates at low temperatures and in the ultrastrong-coupling regime. The interplay of the effects of quantum coherence and quantum correlations on the engine performance is discussed in terms of second-order coherence, quantum mutual information, and the logarithmic negativity of entanglement. We point out that the proposed quantum Otto engine can be implemented experimentally with modern circuit quantum electrodynamic systems where flux qubits can be coupled ultrastrongly to superconducting transmission-line resonators.

  10. Silicon integrated circuits advances in materials and device research

    CERN Document Server

    Kahng, Dawon

    1981-01-01

    Silicon Integrated Circuits, Part B covers the special considerations needed to achieve high-power Si-integrated circuits. The book presents articles about the most important operations needed for the high-power circuitry, namely impurity diffusion and oxidation; crystal defects under thermal equilibrium in silicon and the development of high-power device physics; and associated technology. The text also describes the ever-evolving processing technology and the most promising approaches, along with the understanding of processing-related areas of physics and chemistry. Physicists, chemists, an

  11. Programmable delay unit incorporating a semi-custom integrated circuit

    International Nuclear Information System (INIS)

    Linstadt, E.

    1985-04-01

    The synchronization of SLC accelerator control and monitoring functions is realized by a CAMAC module, the PDU II (Programmable Delay Unit II, SLAC 253-002), which includes a semi-custom gate array integrated circuit. The PDU II distributes 16 channels of independently programmable delayed pulses to other modules within the same CAMAC crate. The delays are programmable in increments of 8.4 ns. Functional descriptions of both the module and the semi-custom integrated circuit used to generate the output pulses are given

  12. 3D circuit integration for Vertex and other detectors

    Energy Technology Data Exchange (ETDEWEB)

    Yarema, Ray; /Fermilab

    2007-09-01

    High Energy Physics continues to push the technical boundaries for electronics. There is no area where this is truer than for vertex detectors. Lower mass and power along with higher resolution and radiation tolerance are driving forces. New technologies such as SOI CMOS detectors and three dimensional (3D) integrated circuits offer new opportunities to meet these challenges. The fundamentals for SOI CMOS detectors and 3D integrated circuits are discussed. Examples of each approach for physics applications are presented. Cost issues and ways to reduce development costs are discussed.

  13. Integrated circuits for particle physics experiments

    CERN Document Server

    Snoeys, W; Campbell, M; Cantatore, E; Faccio, F; Heijne, Erik H M; Jarron, Pierre; Kloukinas, Kostas C; Marchioro, A; Moreira, P; Toifl, Thomas H; Wyllie, Ken H

    2000-01-01

    High energy particle physics experiments investigate the nature of matter through the identification of subatomic particles produced in collisions of protons, electrons, or heavy ions which have been accelerated to very high energies. Future experiments will have hundreds of millions of detector channels to observe the interaction region where collisions take place at a 40 MHz rate. This paper gives an overview of the electronics requirements for such experiments and explains how data reduction, timing distribution, and radiation tolerance in commercial CMOS circuits are achieved for these big systems. As a detailed example, the electronics for the innermost layers of the future tracking detector, the pixel vertex detector, is discussed with special attention to system aspects. A small-scale prototype (130 channels) implemented in standard 0.25 mu m CMOS remains fully functional after a 30 Mrad(SiO/sub 2/) irradiation. A full-scale pixel readout chip containing 8000 readout channels in a 14 by 16 mm/sup 2/ ar...

  14. Printed organic thin-film transistor-based integrated circuits

    International Nuclear Information System (INIS)

    Mandal, Saumen; Noh, Yong-Young

    2015-01-01

    Organic electronics is moving ahead on its journey towards reality. However, this technology will only be possible when it is able to meet specific criteria including flexibility, transparency, disposability and low cost. Printing is one of the conventional techniques to deposit thin films from solution-based ink. It is used worldwide for visual modes of information, and it is now poised to enter into the manufacturing processes of various consumer electronics. The continuous progress made in the field of functional organic semiconductors has achieved high solubility in common solvents as well as high charge carrier mobility, which offers ample opportunity for organic-based printed integrated circuits. In this paper, we present a comprehensive review of all-printed organic thin-film transistor-based integrated circuits, mainly ring oscillators. First, the necessity of all-printed organic integrated circuits is discussed; we consider how the gap between printed electronics and real applications can be bridged. Next, various materials for printed organic integrated circuits are discussed. The features of these circuits and their suitability for electronics using different printing and coating techniques follow. Interconnection technology is equally important to make this product industrially viable; much attention in this review is placed here. For high-frequency operation, channel length should be sufficiently small; this could be achievable with a combination of surface treatment-assisted printing or laser writing. Registration is also an important issue related to printing; the printed gate should be perfectly aligned with the source and drain to minimize parasitic capacitances. All-printed organic inverters and ring oscillators are discussed here, along with their importance. Finally, future applications of all-printed organic integrated circuits are highlighted. (paper)

  15. Design optimization of radiation-hardened CMOS integrated circuits

    International Nuclear Information System (INIS)

    1975-01-01

    Ionizing-radiation-induced threshold voltage shifts in CMOS integrated circuits will drastically degrade circuit performance unless the design parameters related to the fabrication process are properly chosen. To formulate an approach to CMOS design optimization, experimentally observed analytical relationships showing strong dependences between threshold voltage shifts and silicon dioxide thickness are utilized. These measurements were made using radiation-hardened aluminum-gate CMOS inverter circuits and have been corroborated by independent data taken from MOS capacitor structures. Knowledge of these relationships allows one to define ranges of acceptable CMOS design parameters based upon radiation-hardening capabilities and post-irradiation performance specifications. Furthermore, they permit actual design optimization of CMOS integrated circuits which results in optimum pre- and post-irradiation performance with respect to speed, noise margins, and quiescent power consumption. Theoretical and experimental results of these procedures, the applications of which can mean the difference between failure and success of a CMOS integrated circuit in a radiation environment, are presented

  16. Smart Power: New power integrated circuit technologies and their applications

    Science.gov (United States)

    Kuivalainen, Pekka; Pohjonen, Helena; Yli-Pietilae, Timo; Lenkkeri, Jaakko

    1992-05-01

    Power Integrated Circuits (PIC) is one of the most rapidly growing branches of the semiconductor technology. The PIC markets has been forecast to grow from 660 million dollars in 1990 to 1658 million dollars in 1994. It has even been forecast that at the end of the 1990's the PIC markets would correspond to the value of the whole semiconductor production in 1990. Automotive electronics will play the leading role in the development of the standard PIC's. Integrated motor drivers (36 V/4 A), smart integrated switches (60 V/30 A), solenoid drivers, integrated switch-mode power supplies and regulators are the latest standard devices of the PIC manufactures. ASIC (Application Specific Integrated Circuits) PIC solutions are needed for the same reasons as other ASIC devices: there are no proper standard devices, a company has a lot of application knowhow, which should be kept inside the company, the size of the product must be reduced, and assembly costs are wished to be reduced by decreasing the number of discrete devices. During the next few years the most probable ASIC PIC applications in Finland will be integrated solenoid and motor drivers, an integrated electronic lamp ballast circuit and various sensor interface circuits. Application of the PIC technologies to machines and actuators will strongly be increased all over the world. This means that various PIC's, either standard PIC's or full custom ASIC circuits, will appear in many products which compete with the corresponding Finnish products. Therefore the development of the PIC technologies must be followed carefully in order to immediately be able to apply the latest development in the smart power technologies and their design methods.

  17. Superconductivity

    International Nuclear Information System (INIS)

    Kakani, S.L.; Kakani, Shubhra

    2007-01-01

    The monograph provides readable introduction to the basics of superconductivity for beginners and experimentalists. For theorists, the monograph provides nice and brief description of the broad spectrum of experimental properties, theoretical concepts with all details, which theorists should learn, and provides a sound basis for students interested in studying superconducting theory at the microscopic level. Special chapter on the theory of high-temperature superconductivity in cuprates is devoted

  18. Program NICOLET to integrate energy loss in superconducting coils

    International Nuclear Information System (INIS)

    Vogel, H.F.

    1978-08-01

    A voltage pickup coil, inductively coupled to the magnetic field of the superconducting coil under test, is connected so its output may be compared with the terminal voltage of the coil under test. The integrated voltage difference is indicative of the resistive volt-seconds. When multiplied with the main coil current, the volt-seconds yield the loss. In other words, a hysteresis loop is obtained if the integrated voltage difference phi = ∫ΔVdt is plotted as a function of the coil current, i. First, time functions of the two signals phi(t) and i(t) are recorded on a dual-trace digital oscilloscope, and these signals are then recorded on magnetic tape. On a CDC-6600, the recorded information is decoded and plotted, and the hysteresis loops are integrated by the set of FORTRAN programs NICOLET described in this report. 4 figures

  19. Three-dimensional integrated circuit design

    CERN Document Server

    Xie, Yuan; Sapatnekar, Sachin S

    2009-01-01

    This book presents an overview of the field of 3D IC design, with an emphasis on electronic design automation (EDA) tools and algorithms that can enable the adoption of 3D ICs, and the architectural implementation and potential for future 3D system design. The aim of this book is to provide the reader with a complete understanding of: the promise of 3D ICs in building novel systems that enable the chip industry to continue along the path of performance scaling, the state of the art in fabrication technologies for 3D integration, the most prominent 3D-specific EDA challenges, along with solutio

  20. Performance of digital integrated circuit technologies at very high temperatures

    Energy Technology Data Exchange (ETDEWEB)

    Prince, J.L.; Draper, B.L.; Rapp, E.A.; Kromberg, J.N.; Fitch, L.T.

    1980-01-01

    Results of investigations of the performance and reliability of digital bipolar and CMOS integrated circuits over the 25 to 340/sup 0/C range are reported. Included in these results are both parametric variation information and analysis of the functional failure mechanisms. Although most of the work was done using commercially available circuits (TTL and CMOS) and test chips from commercially compatible processes, some results of experimental simulations of dielectrically isolated CMOS are also discussed. It was found that commercial Schottky clamped TTL, and dielectrically isolated, low power Schottky-clamped TTL, functioned to junction temperatures in excess of 325/sup 0/C. Standard gold doped TTL functioned only to 250/sup 0/C, while commercial, isolated I/sup 2/L functioned to the range 250/sup 0/C to 275/sup 0/C. Commercial junction isolated CMOS, buffered and unbuffered, functioned to the range 280/sup 0/C to 310/sup 0/C/sup +/, depending on the manufacturer. Experimental simulations of simple dielectrically isolated CMOS integrated circuits, fabricated with heavier doping levels than normal, functioned to temperatures in excess of 340/sup 0/C. High temperature life testing of experimental, silicone-encapsulated simple TTL and CMOS integrated circuits have shown no obvious life limiting problems to date. No barrier to reliable functionality of TTL bipolar or CMOS integrated ciruits at temperatures in excess of 300/sup 0/C has been found.

  1. Novel technique for reliability testing of silicon integrated circuits

    NARCIS (Netherlands)

    Le Minh, P.; Wallinga, Hans; Woerlee, P.H.; van den Berg, Albert; Holleman, J.

    2001-01-01

    We propose a simple, inexpensive technique with high resolution to identify the weak spots in integrated circuits by means of a non-destructive photochemical process in which photoresist is used as the photon detection tool. The experiment was done to localize the breakdown link of thin silicon

  2. Classical Conditioning with Pulsed Integrated Neural Networks: Circuits and System

    DEFF Research Database (Denmark)

    Lehmann, Torsten

    1998-01-01

    In this paper we investigate on-chip learning for pulsed, integrated neural networks. We discuss the implementational problems the technology imposes on learning systems and we find that abiologically inspired approach using simple circuit structures is most likely to bring success. We develop a ...... chip to solve simple classical conditioning tasks, thus verifying the design methodologies put forward in the paper....

  3. A study of radiation hardness screening techniques of integrated circuits

    International Nuclear Information System (INIS)

    Wang Xuli

    2002-01-01

    The principle and operational procedure of Integrated Circuits (ICs) screening with irradiation-and-anneal and multicomponent regression analysis are discussed. The key technology, advantages and shortcomings of the two methods are described in contrast, and some advices are given with the state-of-the-art of the screening technology

  4. Radiation response of high speed CMOS integrated circuits

    International Nuclear Information System (INIS)

    Yue, H.; Davison, D.; Jennings, R.F.; Lothongkam, P.; Rinerson, D.; Wyland, D.

    1987-01-01

    This paper studies the total dose and dose rate radiation response of the FCT family of high speed CMOS integrated circuits. Data taken on the devices is used to establish the dominant failure modes, and this data is further analyzed using one-sided tolerance factors for normal distribution statistical analysis

  5. Heat sinking of highly integrated photonic and electronic circuits

    NARCIS (Netherlands)

    van Rijn, M.B.J.; Smit, M.K.

    2017-01-01

    Dense integration of photonic and electronic circuits poses high requirements on thermal management. In this paper we present analysis of temperature distributions in PICs in InP membranes on top of a BiCMOS chip, which contain hot spots in both the photonic and the electronic layer (lasers, optical

  6. An integrated circuit/packet switched video conferencing system

    International Nuclear Information System (INIS)

    Kippenhan Junior, H.A.; Lidinsky, W.P.; Roediger, G.A.; Waits, T.A.

    1996-01-01

    The HEP Network Resource Center (HEPNRC) at Fermilab and the Collider Detector Facility (CDF) collaboration have evolved a flexible, cost-effective, widely accessible video conferencing system for use by high energy physics collaborations and others wishing to use video conferencing. No current systems seemed to fully meet the needs of high energy physics collaborations. However, two classes of video conferencing technology: circuit-switched and packet-switched, if integrated, might encompass most of HEPS's needs. It was also realized that, even with this integration, some additional functions were needed and some of the existing functions were not always wanted. HEPNRC with the help of members of the CDF collaboration set out to develop such an integrated system using as many existing subsystems and components as possible. This system is called VUPAC (Video conferencing Using Packets and Circuits). This paper begins with brief descriptions of the circuit-switched and packet-switched video conferencing systems. Following this, issues and limitations of these systems are considered. Next the VUPAC system is described. Integration is accomplished primarily by a circuit/packet video conferencing interface. Augmentation is centered in another subsystem called MSB (Multiport MultiSession Bridge). Finally, there is a discussion of the future work needed in the evolution of this system. (author)

  7. Plasma Etching for Failure Analysis of Integrated Circuit Packages

    NARCIS (Netherlands)

    Tang, J.; Schelen, J.B.J.; Beenakker, C.I.M.

    2011-01-01

    Plastic integrated circuit packages with copper wire bonds are decapsulated by a Microwave Induced Plasma system. Improvements on microwave coupling of the system are achieved by frequency tuning and antenna modification. Plasmas with a mixture of O2 and CF4 showed a high etching rate around 2

  8. An integrated circuit/packet switched video conferencing system

    Energy Technology Data Exchange (ETDEWEB)

    Kippenhan Junior, H.A.; Lidinsky, W.P.; Roediger, G.A. [Fermi National Accelerator Lab., Batavia, IL (United States). HEP Network Resource Center; Waits, T.A. [Rutgers Univ., Piscataway, NJ (United States). Dept. of Physics and Astronomy

    1996-07-01

    The HEP Network Resource Center (HEPNRC) at Fermilab and the Collider Detector Facility (CDF) collaboration have evolved a flexible, cost-effective, widely accessible video conferencing system for use by high energy physics collaborations and others wishing to use video conferencing. No current systems seemed to fully meet the needs of high energy physics collaborations. However, two classes of video conferencing technology: circuit-switched and packet-switched, if integrated, might encompass most of HEPS's needs. It was also realized that, even with this integration, some additional functions were needed and some of the existing functions were not always wanted. HEPNRC with the help of members of the CDF collaboration set out to develop such an integrated system using as many existing subsystems and components as possible. This system is called VUPAC (Video conferencing Using Packets and Circuits). This paper begins with brief descriptions of the circuit-switched and packet-switched video conferencing systems. Following this, issues and limitations of these systems are considered. Next the VUPAC system is described. Integration is accomplished primarily by a circuit/packet video conferencing interface. Augmentation is centered in another subsystem called MSB (Multiport MultiSession Bridge). Finally, there is a discussion of the future work needed in the evolution of this system. (author)

  9. FUZZY NEURAL NETWORK FOR OBJECT IDENTIFICATION ON INTEGRATED CIRCUIT LAYOUTS

    Directory of Open Access Journals (Sweden)

    A. A. Doudkin

    2015-01-01

    Full Text Available Fuzzy neural network model based on neocognitron is proposed to identify layout objects on images of topological layers of integrated circuits. Testing of the model on images of real chip layouts was showed a highеr degree of identification of the proposed neural network in comparison to base neocognitron.

  10. Foundry fabricated photonic integrated circuit optical phase lock loop.

    Science.gov (United States)

    Bałakier, Katarzyna; Fice, Martyn J; Ponnampalam, Lalitha; Graham, Chris S; Wonfor, Adrian; Seeds, Alwyn J; Renaud, Cyril C

    2017-07-24

    This paper describes the first foundry-based InP photonic integrated circuit (PIC) designed to work within a heterodyne optical phase locked loop (OPLL). The PIC and an external electronic circuit were used to phase-lock a single-line semiconductor laser diode to an incoming reference laser, with tuneable frequency offset from 4 GHz to 12 GHz. The PIC contains 33 active and passive components monolithically integrated on a single chip, fully demonstrating the capability of a generic foundry PIC fabrication model. The electronic part of the OPLL consists of commercially available RF components. This semi-packaged system stabilizes the phase and frequency of the integrated laser so that an absolute frequency, high-purity heterodyne signal can be generated when the OPLL is in operation, with phase noise lower than -100 dBc/Hz at 10 kHz offset from the carrier. This is the lowest phase noise level ever demonstrated by monolithically integrated OPLLs.

  11. Effects of Armature Winding Segmentation with Multiple Converters on the Short Circuit Torque of 10-MW Superconducting Wind Turbine Generators

    DEFF Research Database (Denmark)

    Liu, Dong; Polinder, Henk; Abrahamsen, Asger Bech

    2017-01-01

    Superconducting synchronous generators (SCSGs) are drawing more attention in large direct-drive wind turbine applications. Despite low weight and compactness, the short circuit torque of an SCSG may be too high for wind turbine constructions due to a large magnetic air gap of an SCSG. This paper...... aims at assessing the effects of armature winding segmentation on reducing the short circuit torque of 10-MW SCSGs. A concept of armature winding segmentation with multiple power electronic converters is presented. Four SCSG designs using different topologies are examined. Results show that armature...... winding segmentation effectively reduce the short circuit torque in all the four SCSG designs when one segment is shorted at the terminal....

  12. Radio frequency integrated circuit design for cognitive radio systems

    CERN Document Server

    Fahim, Amr

    2015-01-01

    This book fills a disconnect in the literature between Cognitive Radio systems and a detailed account of the circuit implementation and architectures required to implement such systems.  Throughout the book, requirements and constraints imposed by cognitive radio systems are emphasized when discussing the circuit implementation details.  In addition, this book details several novel concepts that advance state-of-the-art cognitive radio systems.  This is a valuable reference for anybody with background in analog and radio frequency (RF) integrated circuit design, needing to learn more about integrated circuits requirements and implementation for cognitive radio systems. ·         Describes in detail cognitive radio systems, as well as the circuit implementation and architectures required to implement them; ·         Serves as an excellent reference to state-of-the-art wideband transceiver design; ·         Emphasizes practical requirements and constraints imposed by cognitive radi...

  13. Flexible circuits with integrated switches for robotic shape sensing

    Science.gov (United States)

    Harnett, C. K.

    2016-05-01

    Digital switches are commonly used for detecting surface contact and limb-position limits in robotics. The typical momentary-contact digital switch is a mechanical device made from metal springs, designed to connect with a rigid printed circuit board (PCB). However, flexible printed circuits are taking over from the rigid PCB in robotics because the circuits can bend while carrying signals and power through moving joints. This project is motivated by a previous work where an array of surface-mount momentary contact switches on a flexible circuit acted as an all-digital shape sensor compatible with the power resources of energy harvesting systems. Without a rigid segment, the smallest commercially-available surface-mount switches would detach from the flexible circuit after several bending cycles, sometimes violently. This report describes a low-cost, conductive fiber based method to integrate electromechanical switches into flexible circuits and other soft, bendable materials. Because the switches are digital (on/off), they differ from commercially-available continuous-valued bend/flex sensors. No amplification or analog-to-digital conversion is needed to read the signal, but the tradeoff is that the digital switches only give a threshold curvature value. Boundary conditions on the edges of the flexible circuit are key to setting the threshold curvature value for switching. This presentation will discuss threshold-setting, size scaling of the design, automation for inserting a digital switch into the flexible circuit fabrication process, and methods for reconstructing a shape from an array of digital switch states.

  14. Radiation hardening of integrated circuits technologies

    International Nuclear Information System (INIS)

    Auberton-Herve, A.J.; Leray, J.L.

    1991-01-01

    The radiation hardening studies started in the mid decade -1960-1970. To survive the different military or space radiative environment, a new engineering science borned, to understand the degradation of electronics components. The different solutions to improve the electronic behavior in such environment, have been named radiation hardening of the technologies. Improvement of existing technologies, and qualification method have been widely studied. However, at the other hand, specific technologies was developped : The Silicon On Insulator technologies for CMOS or Bipolar. The HSOI3HD technology (supported by DGA-CEA DAM and LETI with THOMSON TMS) offers today the highest hardening level for the integration density of hundreds of thousand transistors on the same silicon. Full complex systems would be realized on a single die with a technological radiation hardening and no more system hardening

  15. Superconductivity

    International Nuclear Information System (INIS)

    Caruana, C.M.

    1988-01-01

    Despite reports of new, high-temperature superconductive materials almost every day, participants at the First Congress on Superconductivity do not anticipate commercial applications with these materials soon. What many do envision is the discovery of superconducting materials that can function at much warmer, perhaps even room temperatures. Others hope superconductivity will usher in a new age of technology as semiconductors and transistors did. This article reviews what the speakers had to say at the four-day congress held in Houston last February. Several speakers voiced concern that the Reagan administration's apparent lack of interest in funding superconductivity research while other countries, notably Japan, continue to pour money into research and development could hamper America's international competitiveness

  16. Additional signature of the dynamical Casimir effect in a superconducting circuit

    International Nuclear Information System (INIS)

    Rego, Andreson L.C.; Farina, C.; Silva, Hector O.; Alves, Danilo T.

    2013-01-01

    Full text: The dynamical Casimir effect (DCE) is one of the most fascinating quantum vacuum effects that consists, essentially, on the particle creation as a result of the interaction between a quantized field and a moving mirror. In this sense, particle creation due to external time-dependent potentials or backgrounds, or even time dependent electromagnetic properties of a material medium can also be included in a general definition of DCE. For simplicity, this interaction is simulated, in general, by means of idealized boundary conditions (BC). As a consequence of the particle creation, the moving mirror experiences a dissipative radiation reaction force acting on it. In order to generate an appreciable number of photons to be observed, the DCE was investigated in other contexts, as for example, in the circuit quantum electrodynamics. This theory predicted high photon creation rate by the modulation of the length of an open transmission line coupled to a superconducting quantum interference device (SQUID), an extremely sensitive magnetometer (J.R. Johansson et al, 2009/2010). A time dependent magnetic flux can be applied to the SQUID changing its inductance, leading to a time-dependent BC which simulates a moving boundary It was in the last scenario that the first observation of the DCE was announced by Wilson and collaborators (Wilson et al, 2011). Taking as motivation the experiment that observed the DCE, we investigate the influence of the generalized time-dependent Robin BC, that presents an extra term involving the second order time derivative of the field, in the particle creation via DCE. This kind of BC may appear quite naturally in the context of circuit quantum electrodynamics and the extra term was neglected in the theoretical aspects of the first observation of the DCE. Appropriate adjustments of this new parameter can not only enhance the total number of created particles but also give rise to a non-parabolic shape of the particle creation spectral

  17. Digital integrated circuit design using Verilog and SystemVerilog

    CERN Document Server

    Mehler, Ronald W

    2014-01-01

    For those with a basic understanding of digital design, this book teaches the essential skills to design digital integrated circuits using Verilog and the relevant extensions of SystemVerilog. In addition to covering the syntax of Verilog and SystemVerilog, the author provides an appreciation of design challenges and solutions for producing working circuits. The book covers not only the syntax and limitations of HDL coding, but deals extensively with design problems such as partitioning and synchronization, helping you to produce designs that are not only logically correct, but will actually

  18. Flexible, High-Speed CdSe Nanocrystal Integrated Circuits.

    Science.gov (United States)

    Stinner, F Scott; Lai, Yuming; Straus, Daniel B; Diroll, Benjamin T; Kim, David K; Murray, Christopher B; Kagan, Cherie R

    2015-10-14

    We report large-area, flexible, high-speed analog and digital colloidal CdSe nanocrystal integrated circuits operating at low voltages. Using photolithography and a newly developed process to fabricate vertical interconnect access holes, we scale down device dimensions, reducing parasitic capacitances and increasing the frequency of circuit operation, and scale up device fabrication over 4 in. flexible substrates. We demonstrate amplifiers with ∼7 kHz bandwidth, ring oscillators with <10 μs stage delays, and NAND and NOR logic gates.

  19. Integrated circuit devices in control systems of coal mining complexes

    Energy Technology Data Exchange (ETDEWEB)

    1983-01-01

    Systems of automatic monitoring and control of coal mining complexes developed in the 1960's used electromagnetic relays, thyristors, and flip-flops on transistors of varying conductivity. The circuits' designers, devoted much attention to ensuring spark safety, lowering power consumption, and raising noise immunity and repairability of functional devices. The fast development of integrated circuitry led to the use of microelectronic components in most devices of mine automation. An analysis of specifications and experimental research into integrated circuits (IMS) shows that the series K 176 IMS components made by CMOS technology best meet mine conditions of operation. The use of IMS devices under mine conditions has demonstrated their high reliability. Further development of integrated circuitry involve using microprocessors and microcomputers. (SC)

  20. Multi-Objective Optimization in Physical Synthesis of Integrated Circuits

    CERN Document Server

    A Papa, David

    2013-01-01

    This book introduces techniques that advance the capabilities and strength of modern software tools for physical synthesis, with the ultimate goal to improve the quality of leading-edge semiconductor products.  It provides a comprehensive introduction to physical synthesis and takes the reader methodically from first principles through state-of-the-art optimizations used in cutting edge industrial tools. It explains how to integrate chip optimizations in novel ways to create powerful circuit transformations that help satisfy performance requirements. Broadens the scope of physical synthesis optimization to include accurate transformations operating between the global and local scales; Integrates groups of related transformations to break circular dependencies and increase the number of circuit elements that can be jointly optimized to escape local minima;  Derives several multi-objective optimizations from first observations through complete algorithms and experiments; Describes integrated optimization te...

  1. RF and microwave integrated circuit development technology, packaging and testing

    CERN Document Server

    Gamand, Patrice; Kelma, Christophe

    2018-01-01

    RF and Microwave Integrated Circuit Development bridges the gap between existing literature, which focus mainly on the 'front-end' part of a product development (system, architecture, design techniques), by providing the reader with an insight into the 'back-end' part of product development. In addition, the authors provide practical answers and solutions regarding the choice of technology, the packaging solutions and the effects on the performance on the circuit and to the industrial testing strategy. It will also discuss future trends and challenges and includes case studies to illustrate examples. * Offers an overview of the challenges in RF/microwave product design * Provides practical answers to packaging issues and evaluates its effect on the performance of the circuit * Includes industrial testing strategies * Examines relevant RF MIC technologies and the factors which affect the choice of technology for a particular application, e.g. technical performance and cost * Discusses future trends and challen...

  2. Integrated microchannel cooling in a three dimensional integrated circuit: A thermal management

    Directory of Open Access Journals (Sweden)

    Wang Kang-Jia

    2016-01-01

    Full Text Available Microchannel cooling is a promising technology for solving the three-dimensional integrated circuit thermal problems. However, the relationship between the microchannel cooling parameters and thermal behavior of the three dimensional integrated circuit is complex and difficult to understand. In this paper, we perform a detailed evaluation of the influence of the microchannel structure and the parameters of the cooling liquid on steady-state temperature profiles. The results presented in this paper are expected to aid in the development of thermal design guidelines for three dimensional integrated circuit with microchannel cooling.

  3. Development of quench detection/protection system based on active power method for superconducting magnet by using capacitor circuit

    International Nuclear Information System (INIS)

    Nanato, N.; Otsuka, T.; Hesaka, S.; Murase, S.

    2013-01-01

    Highlights: ► The authors have presented an active power method for quench detection. ► A method for improving its characteristics using a capacitor circuit was proposed. ► Quench detection/protection test for a Bi2223 superconducting coil was carried out. ► The proposed method was more useful than the conventional one. -- Abstract: When a quench occurs in a superconducting magnet, excessive joule heating in normal region may damage the magnet. It is necessary to detect the quench as soon as possible and discharge magnetic energy stored in the magnet. The authors have presented a quench detection/protection system based on an active power method which detects the quench regardless of a self-inductive and mutual-inductive voltages and electromagnetic noise. In the conventional active power method, the inductive voltages are removed by cancel coils. In this paper, the authors propose a method to cancel an inductive voltage using a capacitor circuit. The quench detection/protection system becomes more precise and smaller than the conventional system through the capacitor circuit

  4. Double-layer rotor magnetic shield performance analysis in high temperature superconducting synchronous generators under short circuit fault conditions

    Science.gov (United States)

    Hekmati, Arsalan; Aliahmadi, Mehdi

    2016-12-01

    High temperature superconducting, HTS, synchronous machines benefit from a rotor magnetic shield in order to protect superconducting coils against asynchronous magnetic fields. This magnetic shield, however, suffers from exerted Lorentz forces generated in light of induced eddy currents during transient conditions, e.g. stator windings short-circuit fault. In addition, to the exerted electromagnetic forces, eddy current losses and the associated effects on the cryogenic system are the other consequences of shielding HTS coils. This study aims at investigating the Rotor Magnetic Shield, RMS, performance in HTS synchronous generators under stator winding short-circuit fault conditions. The induced eddy currents in different circumferential positions of the rotor magnetic shield along with associated Joule heating losses would be studied using 2-D time-stepping Finite Element Analysis, FEA. The investigation of Lorentz forces exerted on the magnetic shield during transient conditions has also been performed in this paper. The obtained results show that double line-to-ground fault is of the most importance among different types of short-circuit faults. It was revealed that when it comes to the design of the rotor magnetic shields, in addition to the eddy current distribution and the associated ohmic losses, two phase-to-ground fault should be taken into account since the produced electromagnetic forces in the time of fault conditions are more severe during double line-to-ground fault.

  5. Monolithically Integrated Flexible Black Phosphorus Complementary Inverter Circuits.

    Science.gov (United States)

    Liu, Yuanda; Ang, Kah-Wee

    2017-07-25

    Two-dimensional (2D) inverters are a fundamental building block for flexible logic circuits which have previously been realized by heterogeneously wiring transistors with two discrete channel materials. Here, we demonstrate a monolithically integrated complementary inverter made using a homogeneous black phosphorus (BP) nanosheet on flexible substrates. The digital logic inverter circuit is demonstrated via effective threshold voltage tuning within a single BP material, which offers both electron and hole dominated conducting channels with nearly symmetric pinch-off and current saturation. Controllable electron concentration is achieved by accurately modulating the aluminum (Al) donor doping, which realizes BP n-FET with a room-temperature on/off ratio >10 3 . Simultaneously, work function engineering is employed to obtain a low Schottky barrier contact electrode that facilities hole injection, thus enhancing the current density of the BP p-FET by 9.4 times. The flexible inverter circuit shows a clear digital logic voltage inversion operation along with a larger-than-unity direct current voltage gain, while exhibits alternating current dynamic signal switching at a record high frequency up to 100 kHz and remarkable electrical stability upon mechanical bending with a radii as small as 4 mm. Our study demonstrates a practical monolithic integration strategy for achieving functional logic circuits on one material platform, paving the way for future high-density flexible electronic applications.

  6. A TDC integrated circuit for drift chamber readout

    International Nuclear Information System (INIS)

    Passaseo, M.; Petrolo, E.; Veneziano, S.

    1995-01-01

    A custom integrated circuit for the measurement of the signal drift-time coming from the KLOE chamber developed by INFN Sezione di Roma is presented. The circuit is a multichannel common start/stop TDC, with 32 channels per chip. The TDC integrated circuit will be developed as a full-custom device in 0.5 μm CMOS technology, with 1 ns LSB realized using a Gray counter working at the frequency of 1 GHz. The circuit is capable of detecting rising/falling edges, with a double edge resolution of 8 ns; the hits are recorded as 16 bit words, hits older than a programmable time window are discarded, if not confirmed by a stop signal. The chip has four event-buffers, which are used only if at least one hit is present in one of the 32 channels. The readout of the data passes through the I/O port at a speed of 33 MHz; empty channels are automatically skipped during the readout phase. (orig.)

  7. A TDC integrated circuit for drift chamber readout

    Energy Technology Data Exchange (ETDEWEB)

    Passaseo, M. [Istituto Nazionale di Fisica Nucleare, Rome (Italy); Petrolo, E. [Istituto Nazionale di Fisica Nucleare, Rome (Italy); Veneziano, S. [Istituto Nazionale di Fisica Nucleare, Rome (Italy)

    1995-12-11

    A custom integrated circuit for the measurement of the signal drift-time coming from the KLOE chamber developed by INFN Sezione di Roma is presented. The circuit is a multichannel common start/stop TDC, with 32 channels per chip. The TDC integrated circuit will be developed as a full-custom device in 0.5 {mu}m CMOS technology, with 1 ns LSB realized using a Gray counter working at the frequency of 1 GHz. The circuit is capable of detecting rising/falling edges, with a double edge resolution of 8 ns; the hits are recorded as 16 bit words, hits older than a programmable time window are discarded, if not confirmed by a stop signal. The chip has four event-buffers, which are used only if at least one hit is present in one of the 32 channels. The readout of the data passes through the I/O port at a speed of 33 MHz; empty channels are automatically skipped during the readout phase. (orig.).

  8. Trends in integrated circuit design for particle physics experiments

    International Nuclear Information System (INIS)

    Atkin, E V

    2017-01-01

    Integrated circuits are one of the key complex units available to designers of multichannel detector setups. A whole number of factors makes Application Specific Integrated Circuits (ASICs) valuable for Particle Physics and Astrophysics experiments. Among them the most important ones are: integration scale, low power dissipation, radiation tolerance. In order to make possible future experiments in the intensity, cosmic, and energy frontiers today ASICs should provide new level of functionality at a new set of constraints and trade-offs, like low-noise high-dynamic range amplification and pulse shaping, high-speed waveform sampling, low power digitization, fast digital data processing, serialization and data transmission. All integrated circuits, necessary for physical instrumentation, should be radiation tolerant at an earlier not reached level (hundreds of Mrad) of total ionizing dose and allow minute almost 3D assemblies. The paper is based on literary source analysis and presents an overview of the state of the art and trends in nowadays chip design, using partially own ASIC lab experience. That shows a next stage of ising micro- and nanoelectronics in physical instrumentation. (paper)

  9. Organic printed photonics: From microring lasers to integrated circuits.

    Science.gov (United States)

    Zhang, Chuang; Zou, Chang-Ling; Zhao, Yan; Dong, Chun-Hua; Wei, Cong; Wang, Hanlin; Liu, Yunqi; Guo, Guang-Can; Yao, Jiannian; Zhao, Yong Sheng

    2015-09-01

    A photonic integrated circuit (PIC) is the optical analogy of an electronic loop in which photons are signal carriers with high transport speed and parallel processing capability. Besides the most frequently demonstrated silicon-based circuits, PICs require a variety of materials for light generation, processing, modulation, and detection. With their diversity and flexibility, organic molecular materials provide an alternative platform for photonics; however, the versatile fabrication of organic integrated circuits with the desired photonic performance remains a big challenge. The rapid development of flexible electronics has shown that a solution printing technique has considerable potential for the large-scale fabrication and integration of microsized/nanosized devices. We propose the idea of soft photonics and demonstrate the function-directed fabrication of high-quality organic photonic devices and circuits. We prepared size-tunable and reproducible polymer microring resonators on a wafer-scale transparent and flexible chip using a solution printing technique. The printed optical resonator showed a quality (Q) factor higher than 4 × 10(5), which is comparable to that of silicon-based resonators. The high material compatibility of this printed photonic chip enabled us to realize low-threshold microlasers by doping organic functional molecules into a typical photonic device. On an identical chip, this construction strategy allowed us to design a complex assembly of one-dimensional waveguide and resonator components for light signal filtering and optical storage toward the large-scale on-chip integration of microscopic photonic units. Thus, we have developed a scheme for soft photonic integration that may motivate further studies on organic photonic materials and devices.

  10. Superconductivity

    CERN Document Server

    Ketterson, John B

    2008-01-01

    Conceived as the definitive reference in a classic and important field of modern physics, this extensive and comprehensive handbook systematically reviews the basic physics, theory and recent advances in the field of superconductivity. Leading researchers, including Nobel laureates, describe the state-of-the-art in conventional and unconventional superconductors at a particularly opportune time, as new experimental techniques and field-theoretical methods have emerged. In addition to full-coverage of novel materials and underlying mechanisms, the handbook reflects continued intense research into electron-phone based superconductivity. Considerable attention is devoted to high-Tc superconductivity, novel superconductivity, including triplet pairing in the ruthenates, novel superconductors, such as heavy-Fermion metals and organic materials, and also granular superconductors. What’s more, several contributions address superconductors with impurities and nanostructured superconductors. Important new results on...

  11. Quantum Bayesian rule for weak measurements of qubits in superconducting circuit QED

    International Nuclear Information System (INIS)

    Wang, Peiyue; Qin, Lupei; Li, Xin-Qi

    2014-01-01

    Compared with the quantum trajectory equation (QTE), the quantum Bayesian approach has the advantage of being more efficient to infer a quantum state under monitoring, based on the integrated output of measurements. For weak measurement of qubits in circuit quantum electrodynamics (cQED), properly accounting for the measurement backaction effects within the Bayesian framework is an important problem of current interest. Elegant work towards this task was carried out by Korotkov in ‘bad-cavity’ and weak-response limits (Korotkov 2011 Quantum Bayesian approach to circuit QED measurement (arXiv:1111.4016)). In the present work, based on insights from the cavity-field states (dynamics) and the help of an effective QTE, we generalize the results of Korotkov to more general system parameters. The obtained Bayesian rule is in full agreement with Korotkov's result in limiting cases and as well holds satisfactory accuracy in non-limiting cases in comparison with the QTE simulations. We expect the proposed Bayesian rule to be useful for future cQED measurement and control experiments. (paper)

  12. Feasibility analysis of a novel hybrid-type superconducting circuit breaker in multi-terminal HVDC networks

    International Nuclear Information System (INIS)

    Khan, Umer Amir; Lee, Jong-Geon; Seo, In-Jin; Amir, Faisal; Lee, Bang-Wook

    2015-01-01

    Highlights: • A novel hybrid-type superconducting circuit breaker (SDCCB) is proposed. • SDCCB has SFCL located in the main current path to limit the fault current until the final trip signal. • SFCL in SDCCB suppressed the fast rising DC fault current for a predefined time. • SFCL significantly reduced the DC current breaking stress on SDCCB components. • SDCCB isolated the HVDC faulty line in three, four, and five converter stations MTDC. - Abstract: Voltage source converter-based HVDC systems (VSC-HVDC) are a better alternative than conventional thyristor-based HVDC systems, especially for developing multi-terminal HVDC systems (MTDC). However, one of the key obstacles in developing MTDC is the absence of an adequate protection system that can quickly detect faults, locate the faulty line and trip the HVDC circuit breakers (DCCBs) to interrupt the DC fault current. In this paper, a novel hybrid-type superconducting circuit breaker (SDCCB) is proposed and feasibility analyses of its application in MTDC are presented. The SDCCB has a superconducting fault current limiter (SFCL) located in the main current path to limit fault currents until the final trip signal is received. After the trip signal the IGBT located in the main line commutates the current into a parallel line where DC current is forced to zero by the combination of IGBTs and surge arresters. Fault simulations for three-, four- and five-terminal MTDC were performed and SDCCB performance was evaluated in these MTDC. Passive current limitation by SFCL caused a significant reduction of fault current interruption stress in the SDCCB. It was observed that the DC current could change direction in MTDC after a fault and the SDCCB was modified to break the DC current in both the forward and reverse directions. The simulation results suggest that the proposed SDCCB could successfully suppress the DC fault current, cause a timely interruption, and isolate the faulty HVDC line in MTDC.

  13. Feasibility analysis of a novel hybrid-type superconducting circuit breaker in multi-terminal HVDC networks

    Energy Technology Data Exchange (ETDEWEB)

    Khan, Umer Amir [Hanyang University, Sa-3dong, Sangrok-gu, Ansan 426-791 (Korea, Republic of); National University of Sciences and Technology, PNEC Campus, Habib Rehmatullah Road, Karachi (Pakistan); Lee, Jong-Geon; Seo, In-Jin [Hanyang University, Sa-3dong, Sangrok-gu, Ansan 426-791 (Korea, Republic of); Amir, Faisal [National University of Sciences and Technology, PNEC Campus, Habib Rehmatullah Road, Karachi (Pakistan); Lee, Bang-Wook, E-mail: bangwook@hanyang.ac.kr [Hanyang University, Sa-3dong, Sangrok-gu, Ansan 426-791 (Korea, Republic of)

    2015-11-15

    Highlights: • A novel hybrid-type superconducting circuit breaker (SDCCB) is proposed. • SDCCB has SFCL located in the main current path to limit the fault current until the final trip signal. • SFCL in SDCCB suppressed the fast rising DC fault current for a predefined time. • SFCL significantly reduced the DC current breaking stress on SDCCB components. • SDCCB isolated the HVDC faulty line in three, four, and five converter stations MTDC. - Abstract: Voltage source converter-based HVDC systems (VSC-HVDC) are a better alternative than conventional thyristor-based HVDC systems, especially for developing multi-terminal HVDC systems (MTDC). However, one of the key obstacles in developing MTDC is the absence of an adequate protection system that can quickly detect faults, locate the faulty line and trip the HVDC circuit breakers (DCCBs) to interrupt the DC fault current. In this paper, a novel hybrid-type superconducting circuit breaker (SDCCB) is proposed and feasibility analyses of its application in MTDC are presented. The SDCCB has a superconducting fault current limiter (SFCL) located in the main current path to limit fault currents until the final trip signal is received. After the trip signal the IGBT located in the main line commutates the current into a parallel line where DC current is forced to zero by the combination of IGBTs and surge arresters. Fault simulations for three-, four- and five-terminal MTDC were performed and SDCCB performance was evaluated in these MTDC. Passive current limitation by SFCL caused a significant reduction of fault current interruption stress in the SDCCB. It was observed that the DC current could change direction in MTDC after a fault and the SDCCB was modified to break the DC current in both the forward and reverse directions. The simulation results suggest that the proposed SDCCB could successfully suppress the DC fault current, cause a timely interruption, and isolate the faulty HVDC line in MTDC.

  14. 75 FR 49524 - In the Matter of Certain Integrated Circuits, Chipsets, and Products Containing Same Including...

    Science.gov (United States)

    2010-08-13

    ... the United States after importation of certain integrated circuits, chipsets, and products containing... INTERNATIONAL TRADE COMMISSION [Investigation No. 337-TA-709] In the Matter of Certain Integrated Circuits, Chipsets, and Products Containing Same Including Televisions, Media Players, and Cameras; Notice...

  15. 76 FR 34101 - In the Matter of Certain Integrated Circuits, Chipsets, and Products Containing Same Including...

    Science.gov (United States)

    2011-06-10

    ... within the United States after importation of certain integrated circuits, chipsets, and products... INTERNATIONAL TRADE COMMISSION [Investigation No. 337-TA-709] In the Matter of Certain Integrated Circuits, Chipsets, and Products Containing Same Including Televisions, Media Players, and Cameras; Notice...

  16. 75 FR 65654 - In the Matter of: Certain Integrated Circuits, Chipsets, and Products Containing Same Including...

    Science.gov (United States)

    2010-10-26

    ... within the United States after importation of certain integrated circuits, chipsets, and products... INTERNATIONAL TRADE COMMISSION [Investigation No. 337-TA-709] In the Matter of: Certain Integrated Circuits, Chipsets, and Products Containing Same Including Televisions, Media Players, and Cameras; Notice...

  17. Investigation of SFQ integrated circuits using Nb fabrication technology

    International Nuclear Information System (INIS)

    Numata, H.; Tanaka, M.; Kitagawa, Y.; Tahara, S.

    1999-01-01

    In NEC's standard process, the minimum junction size is 2 μm and the critical current density (J C ) is 2.5 kA cm -2 . In the process, i-line stepper lithography and reactive ion etching with SF 6 gas are used and the standard deviation (σ) of the critical current (I C ) was 0.9% for the 2 μm junctions. This junction uniformity enables integration of more than 10M junctions if an I C variation of ±10% permits correct circuit operation. A 512-bit shift register was designed and fabricated by our standard process. Correct 512-bit delay operation was obtained. These results are promising for the large-scale integration of single flux quantum circuits. (author)

  18. Gigahertz flexible graphene transistors for microwave integrated circuits.

    Science.gov (United States)

    Yeh, Chao-Hui; Lain, Yi-Wei; Chiu, Yu-Chiao; Liao, Chen-Hung; Moyano, David Ricardo; Hsu, Shawn S H; Chiu, Po-Wen

    2014-08-26

    Flexible integrated circuits with complex functionalities are the missing link for the active development of wearable electronic devices. Here, we report a scalable approach to fabricate self-aligned graphene microwave transistors for the implementation of flexible low-noise amplifiers and frequency mixers, two fundamental building blocks of a wireless communication receiver. A devised AlOx T-gate structure is used to achieve an appreciable increase of device transconductance and a commensurate reduction of the associated parasitic resistance, thus yielding a remarkable extrinsic cutoff frequency of 32 GHz and a maximum oscillation frequency of 20 GHz; in both cases the operation frequency is an order of magnitude higher than previously reported. The two frequencies work at 22 and 13 GHz even when subjected to a strain of 2.5%. The gigahertz microwave integrated circuits demonstrated here pave the way for applications which require high flexibility and radio frequency operations.

  19. On-chip enzymatic microbiofuel cell-powered integrated circuits.

    Science.gov (United States)

    Mark, Andrew G; Suraniti, Emmanuel; Roche, Jérôme; Richter, Harald; Kuhn, Alexander; Mano, Nicolas; Fischer, Peer

    2017-05-16

    A variety of diagnostic and therapeutic medical technologies rely on long term implantation of an electronic device to monitor or regulate a patient's condition. One proposed approach to powering these devices is to use a biofuel cell to convert the chemical energy from blood nutrients into electrical current to supply the electronics. We present here an enzymatic microbiofuel cell whose electrodes are directly integrated into a digital electronic circuit. Glucose oxidizing and oxygen reducing enzymes are immobilized on microelectrodes of an application specific integrated circuit (ASIC) using redox hydrogels to produce an enzymatic biofuel cell, capable of harvesting electrical power from just a single droplet of 5 mM glucose solution. Optimisation of the fuel cell voltage and power to match the requirements of the electronics allow self-powered operation of the on-board digital circuitry. This study represents a step towards implantable self-powered electronic devices that gather their energy from physiological fluids.

  20. Total Dose Effects on Bipolar Integrated Circuits at Low Temperature

    Science.gov (United States)

    Johnston, A. H.; Swimm, R. T.; Thorbourn, D. O.

    2012-01-01

    Total dose damage in bipolar integrated circuits is investigated at low temperature, along with the temperature dependence of the electrical parameters of internal transistors. Bandgap narrowing causes the gain of npn transistors to decrease far more at low temperature compared to pnp transistors, due to the large difference in emitter doping concentration. When irradiations are done at temperatures of -140 deg C, no damage occurs until devices are warmed to temperatures above -50 deg C. After warm-up, subsequent cooling shows that damage is then present at low temperature. This can be explained by the very strong temperature dependence of dispersive transport in the continuous-time-random-walk model for hole transport. For linear integrated circuits, low temperature operation is affected by the strong temperature dependence of npn transistors along with the higher sensitivity of lateral and substrate pnp transistors to radiation damage.

  1. Monolithic Microwave Integrated Circuit (MMIC) technology for space communications applications

    Science.gov (United States)

    Connolly, Denis J.; Bhasin, Kul B.; Romanofsky, Robert R.

    1987-01-01

    Future communications satellites are likely to use gallium arsenide (GaAs) monolithic microwave integrated-circuit (MMIC) technology in most, if not all, communications payload subsystems. Multiple-scanning-beam antenna systems are expected to use GaAs MMIC's to increase functional capability, to reduce volume, weight, and cost, and to greatly improve system reliability. RF and IF matrix switch technology based on GaAs MMIC's is also being developed for these reasons. MMIC technology, including gigabit-rate GaAs digital integrated circuits, offers substantial advantages in power consumption and weight over silicon technologies for high-throughput, on-board baseband processor systems. For the more distant future pseudomorphic indium gallium arsenide (InGaAs) and other advanced III-V materials offer the possibility of MMIC subsystems well up into the millimeter wavelength region. All of these technology elements are in NASA's MMIC program. Their status is reviewed.

  2. Status of readout integrated circuits for radiation detector

    International Nuclear Information System (INIS)

    Moon, B. S.; Hong, S. B.; Cheng, J. E. and others

    2001-09-01

    In this report, we describe the current status of readout integrated circuits developed for radiation detectors, along with new technologies being applied to this field. The current status of ASCIC chip development related to the readout electronics is also included in this report. Major sources of this report are from product catalogs and web sites of the related industries. In the field of semiconductor process technology in Korea, the current status of the multi-project wafer(MPW) of IDEC, the multi-project chip(MPC) of ISRC and other domestic semiconductor process industries is described. In the case of other countries, the status of the MPW of MOSIS in USA and the MPW of EUROPRACTICE in Europe is studied. This report also describes the technologies and products of readout integrated circuits of industries worldwide

  3. Advances in quantum control of three-level superconducting circuit architectures

    Energy Technology Data Exchange (ETDEWEB)

    Falci, G.; Paladino, E. [Dipartimento di Fisica e Astronomia, Universita di Catania (Italy); CNR-IMM UOS Universita (MATIS), Consiglio Nazionale delle Ricerche, Catania (Italy); INFN, Sezione di Catania (Italy); Di Stefano, P.G. [Dipartimento di Fisica e Astronomia, Universita di Catania (Italy); Centre for Theoretical Atomic, Molecular and Optical Physics, School of Mathematics and Physics, Queen' s University Belfast(United Kingdom); Ridolfo, A.; D' Arrigo, A. [Dipartimento di Fisica e Astronomia, Universita di Catania (Italy); Paraoanu, G.S. [Low Temperature Laboratory, Department of Applied Physics, Aalto University School of Science (Finland)

    2017-06-15

    Advanced control in Lambda (Λ) scheme of a solid state architecture of artificial atoms and quantized modes would allow the translation to the solid-state realm of a whole class of phenomena from quantum optics, thus exploiting new physics emerging in larger integrated quantum networks and for stronger couplings. However control solid-state devices has constraints coming from selection rules, due to symmetries which on the other hand yield protection from decoherence, and from design issues, for instance that coupling to microwave cavities is not directly switchable. We present two new schemes for the Λ-STIRAP control problem with the constraint of one or two classical driving fields being always-on. We show how these protocols are converted to apply to circuit-QED architectures. We finally illustrate an application to coherent spectroscopy of the so called ultrastrong atom-cavity coupling regime. (copyright 2016 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim)

  4. Highly focused ion beams in integrated circuit testing

    International Nuclear Information System (INIS)

    Horn, K.M.; Dodd, P.E.; Doyle, B.L.

    1996-01-01

    The nuclear microprobe has proven to be a useful tool in radiation testing of integrated circuits. This paper reviews single event upset (SEU) and ion beam induced charge collection (IBICC) imaging techniques, with special attention to damage-dependent effects. Comparisons of IBICC measurements with three-dimensional charge transport simulations of charge collection are then presented for isolated p-channel field effect transistors under conducting and non-conducting bias conditions

  5. Optimization of Segmentation Quality of Integrated Circuit Images

    Directory of Open Access Journals (Sweden)

    Gintautas Mušketas

    2012-04-01

    Full Text Available The paper presents investigation into the application of genetic algorithms for the segmentation of the active regions of integrated circuit images. This article is dedicated to a theoretical examination of the applied methods (morphological dilation, erosion, hit-and-miss, threshold and describes genetic algorithms, image segmentation as optimization problem. The genetic optimization of the predefined filter sequence parameters is carried out. Improvement to segmentation accuracy using a non optimized filter sequence makes 6%.Artcile in Lithuanian

  6. Monolithic microwave integrated circuit technology for advanced space communication

    Science.gov (United States)

    Ponchak, George E.; Romanofsky, Robert R.

    1988-01-01

    Future Space Communications subsystems will utilize GaAs Monolithic Microwave Integrated Circuits (MMIC's) to reduce volume, weight, and cost and to enhance system reliability. Recent advances in GaAs MMIC technology have led to high-performance devices which show promise for insertion into these next generation systems. The status and development of a number of these devices operating from Ku through Ka band will be discussed along with anticipated potential applications.

  7. The integrated circuit IC EMP transient state disturbance effect experiment method investigates

    International Nuclear Information System (INIS)

    Li Xiaowei

    2004-01-01

    Transient state disturbance characteristic study on the integrated circuit, IC, need from its coupling path outset. Through cable (aerial) coupling, EMP converts to an pulse current voltage and results in the impact to the integrated circuit I/O orifice passing the cable. Aiming at the armament system construction feature, EMP effect to the integrated circuit, IC inside the system is analyzed. The integrated circuit, IC EMP effect experiment current injection method is investigated and a few experiments method is given. (authors)

  8. Short circuit analysis of distribution system with integration of DG

    DEFF Research Database (Denmark)

    Su, Chi; Liu, Zhou; Chen, Zhe

    2014-01-01

    and as a result bring challenges to the network protection system. This problem has been frequently discussed in the literature, but mostly considering only the balanced fault situation. This paper presents an investigation on the influence of full converter based wind turbine (WT) integration on fault currents......Integration of distributed generation (DG) such as wind turbines into distribution system is increasing all around the world, because of the flexible and environmentally friendly characteristics. However, DG integration may change the pattern of the fault currents in the distribution system...... during both balanced and unbalanced faults. Major factors such as external grid short circuit power capacity, WT integration location, connection type of WT integration transformer are taken into account. In turn, the challenges brought to the protection system in the distribution network are presented...

  9. Integrated biocircuits: engineering functional multicellular circuits and devices

    Science.gov (United States)

    Prox, Jordan; Smith, Tory; Holl, Chad; Chehade, Nick; Guo, Liang

    2018-04-01

    Objective. Implantable neurotechnologies have revolutionized neuromodulatory medicine for treating the dysfunction of diseased neural circuitry. However, challenges with biocompatibility and lack of full control over neural network communication and function limits the potential to create more stable and robust neuromodulation devices. Thus, we propose a platform technology of implantable and programmable cellular systems, namely Integrated Biocircuits, which use only cells as the functional components of the device. Approach. We envision the foundational principles for this concept begins with novel in vitro platforms used for the study and reconstruction of cellular circuitry. Additionally, recent advancements in organoid and 3D culture systems account for microenvironment factors of cytoarchitecture to construct multicellular circuits as they are normally formed in the brain. We explore the current state of the art of these platforms to provide knowledge of their advancements in circuit fabrication and identify the current biological principles that could be applied in designing integrated biocircuit devices. Main results. We have highlighted the exemplary methodologies and techniques of in vitro circuit fabrication and propose the integration of selected controllable parameters, which would be required in creating suitable biodevices. Significance. We provide our perspective and propose new insights into the future of neuromodulaion devices within the scope of living cellular systems that can be applied in designing more reliable and biocompatible stimulation-based neuroprosthetics.

  10. Characterization of a dc SQUID based accelerometer circuit for a superconducting gravity gradiometer

    International Nuclear Information System (INIS)

    Scharnweber, R.; Lumley, J.M.

    1999-01-01

    A demonstrator set-up to test superconducting components has been designed and fabricated in order to characterize their functionality for use in a superconducting gravity gradiometer. The displacement of a freely oscillating levitated niobium proof mass in this acceleration transducer is measured inductively and read out by a direct current superconducting quantum interference device. It has been confirmed experimentally that the oscillation frequency depends on the current of the levitation magnet that is operated in persistent-current mode. The results allow us to establish testing and operational procedures that can be used in a more complex multichannel system to confirm functionality and to adjust the levitated proof mass. (author)

  11. Characterization of a dc SQUID based accelerometer circuit for a superconducting gravity gradiometer

    Energy Technology Data Exchange (ETDEWEB)

    Scharnweber, R.; Lumley, J.M. [Oxford Instruments, Scientific Research Division, Research Instruments (Cambridge), Newton House, Cambridge Business Park, Cowley Road, Cambridge CB4 4WZ (United Kingdom)

    1999-11-01

    A demonstrator set-up to test superconducting components has been designed and fabricated in order to characterize their functionality for use in a superconducting gravity gradiometer. The displacement of a freely oscillating levitated niobium proof mass in this acceleration transducer is measured inductively and read out by a direct current superconducting quantum interference device. It has been confirmed experimentally that the oscillation frequency depends on the current of the levitation magnet that is operated in persistent-current mode. The results allow us to establish testing and operational procedures that can be used in a more complex multichannel system to confirm functionality and to adjust the levitated proof mass. (author)

  12. Short-circuit experiments on a high Tc-superconducting cable conductor

    DEFF Research Database (Denmark)

    Tønnesen, Ole; Jensen, E.H.; Traholt, C.

    2002-01-01

    A high temperature superconductor (HTS) cable conductor (CC) with a critical current of 2.1 kA was tested over a range of short-circuit currents up to 20 kA. The duration of the short-circuit currents is 1 s. Between each short-circuit test the critical current of the HTS CC was measured in order...

  13. 76 FR 41521 - In the Matter of Certain Integrated Circuits, Chipsets, and Products Containing Same Including...

    Science.gov (United States)

    2011-07-14

    ... INTERNATIONAL TRADE COMMISSION [Inv. No. 337-TA-786] In the Matter of Certain Integrated Circuits... sale within the United States after importation of certain integrated circuits, chipsets, and products... after importation of certain integrated circuits, chipsets, and products containing same including...

  14. 76 FR 58041 - Certain Digital Televisions Containing Integrated Circuit Devices and Components Thereof; Notice...

    Science.gov (United States)

    2011-09-19

    ... Integrated Circuit Devices and Components Thereof; Notice of Institution of Investigation; Institution of... integrated circuit devices and components thereof by reason of infringement of certain claims of U.S. Patent... after importation of certain digital televisions containing integrated circuit devices and components...

  15. 75 FR 5804 - In the Matter of: Certain Semiconductor Integrated Circuits and Products Containing Same; Notice...

    Science.gov (United States)

    2010-02-04

    ... Semiconductor Integrated Circuits and Products Containing Same; Notice of Commission Determination To Review in... importation of certain semiconductor integrated circuits and products containing same by reason of... (collectively ``Seagate''). Qimonda accuses of infringement certain LSI integrated circuits, as well as certain...

  16. 75 FR 16837 - In the Matter of Certain Integrated Circuits, Chipsets, and Products Containing Same Including...

    Science.gov (United States)

    2010-04-02

    ... INTERNATIONAL TRADE COMMISSION [Inv. No. 337-TA-709] In the Matter of Certain Integrated Circuits... importation of certain integrated circuits, chipsets, and products containing same including televisions... importation, or the sale within the United States after importation of certain integrated circuits, chipsets...

  17. Arbitrary modeling of TSVs for 3D integrated circuits

    CERN Document Server

    Salah, Khaled; El-Rouby, Alaa

    2014-01-01

    This book presents a wide-band and technology independent, SPICE-compatible RLC model for through-silicon vias (TSVs) in 3D integrated circuits. This model accounts for a variety of effects, including skin effect, depletion capacitance and nearby contact effects. Readers will benefit from in-depth coverage of concepts and technology such as 3D integration, Macro modeling, dimensional analysis and compact modeling, as well as closed form equations for the through silicon via parasitics. Concepts covered are demonstrated by using TSVs in applications such as a spiral inductor?and inductive-based

  18. Diamond electro-optomechanical resonators integrated in nanophotonic circuits

    Energy Technology Data Exchange (ETDEWEB)

    Rath, P.; Ummethala, S.; Pernice, W. H. P., E-mail: wolfram.pernice@kit.edu [Institute of Nanotechnology, Karlsruhe Institute of Technology, 76344 Eggenstein-Leopoldshafen (Germany); Diewald, S. [Center for Functional Nanostructures, Karlsruhe Institute of Technology, 76131 Karlsruhe (Germany); Lewes-Malandrakis, G.; Brink, D.; Heidrich, N.; Nebel, C. [Fraunhofer Institute for Applied Solid State Physics, Tullastr. 72, 79108 Freiburg (Germany)

    2014-12-22

    Diamond integrated photonic devices are promising candidates for emerging applications in nanophotonics and quantum optics. Here, we demonstrate active modulation of diamond nanophotonic circuits by exploiting mechanical degrees of freedom in free-standing diamond electro-optomechanical resonators. We obtain high quality factors up to 9600, allowing us to read out the driven nanomechanical response with integrated optical interferometers with high sensitivity. We are able to excite higher order mechanical modes up to 115 MHz and observe the nanomechanical response also under ambient conditions.

  19. Pneumatic oscillator circuits for timing and control of integrated microfluidics.

    Science.gov (United States)

    Duncan, Philip N; Nguyen, Transon V; Hui, Elliot E

    2013-11-05

    Frequency references are fundamental to most digital systems, providing the basis for process synchronization, timing of outputs, and waveform synthesis. Recently, there has been growing interest in digital logic systems that are constructed out of microfluidics rather than electronics, as a possible means toward fully integrated laboratory-on-a-chip systems that do not require any external control apparatus. However, the full realization of this goal has not been possible due to the lack of on-chip frequency references, thus requiring timing signals to be provided from off-chip. Although microfluidic oscillators have been demonstrated, there have been no reported efforts to characterize, model, or optimize timing accuracy, which is the fundamental metric of a clock. Here, we report pneumatic ring oscillator circuits built from microfluidic valves and channels. Further, we present a compressible-flow analysis that differs fundamentally from conventional circuit theory, and we show the utility of this physically based model for the optimization of oscillator stability. Finally, we leverage microfluidic clocks to demonstrate circuits for the generation of phase-shifted waveforms, self-driving peristaltic pumps, and frequency division. Thus, pneumatic oscillators can serve as on-chip frequency references for microfluidic digital logic circuits. On-chip clocks and pumps both constitute critical building blocks on the path toward achieving autonomous laboratory-on-a-chip devices.

  20. Universal discrete Fourier optics RF photonic integrated circuit architecture.

    Science.gov (United States)

    Hall, Trevor J; Hasan, Mehedi

    2016-04-04

    This paper describes a coherent electro-optic circuit architecture that generates a frequency comb consisting of N spatially separated orders using a generalised Mach-Zenhder interferometer (MZI) with its N × 1 combiner replaced by an optical N × N Discrete Fourier Transform (DFT). Advantage may be taken of the tight optical path-length control, component and circuit symmetries and emerging trimming algorithms offered by photonic integration in any platform that offers linear electro-optic phase modulation such as LiNbO3, silicon, III-V or hybrid technology. The circuit architecture subsumes all MZI-based RF photonic circuit architectures in the prior art given an appropriate choice of output port(s) and dimension N although the principal application envisaged is phase correlated subcarrier generation for all optical orthogonal frequency division multiplexing. A transfer matrix approach is used to model the operation of the architecture. The predictions of the model are validated by simulations performed using an industry standard software tool. Implementation is found to be practical.

  1. FDTD-SPICE for Characterizing Metamaterials Integrated with Electronic Circuits

    Directory of Open Access Journals (Sweden)

    Zhengwei Hao

    2012-01-01

    Full Text Available A powerful time-domain FDTD-SPICE simulator is implemented and applied to the broadband analysis of metamaterials integrated with active and tunable circuit elements. First, the FDTD-SPICE modeling theory is studied and details of interprocess communication and hybridization of the two techniques are discussed. To verify the model, some simple cases are simulated with results in both time domain and frequency domain. Then, simulation of a metamaterial structure constructed from periodic resonant loops integrated with lumped capacitor elements is studied, which demonstrates tuning resonance frequency of medium by changing the capacitance of the integrated elements. To increase the bandwidth of the metamaterial, non-Foster transistor configurations are integrated with the loops and FDTD-SPICE is applied to successfully bridge the physics of electromagnetic and circuit topologies and to model the whole composite structure. Our model is also applied to the design and simulation of a metasurface integrated with nonlinear varactors featuring tunable reflection phase characteristic.

  2. Upgrade of the protection system for superconducting circuits in the LHC

    CERN Document Server

    Denz, R; Formenti, F; Meß, K H; Siemko, A; Steckert, J; Walckiers, L; Strait, J

    2010-01-01

    Prior to the re-start of the Large Hadron Collider LHC in 2009 the protection system for superconducting magnets and bus-bars QPS will be substantially upgraded. The foreseen modifications will enhance the capability of the system in detecting problems related to the electrical interconnections between superconducting magnets as well as the detection of so-called aperture symmetric quenches in the LHC main magnets.

  3. Upgrade of the protection system for superconducting circuits in the LHC

    OpenAIRE

    Denz, R; Dahlerup-Petersen, K; Formenti, F; Meß, K H; Siemko, A; Steckert, J; Walckiers, L; Strait, J

    2009-01-01

    Prior to the re-start of the Large Hadron Collider LHC in 2009 the protection system for superconducting magnets and bus-bars QPS will be substantially upgraded. The foreseen modifications will enhance the capability of the system in detecting problems related to the electrical interconnections between superconducting magnets as well as the detection of so-called aperture symmetric quenches in the LHC main magnets.

  4. Superconductivity

    CERN Document Server

    Poole, Charles P; Creswick, Richard J; Prozorov, Ruslan

    2014-01-01

    Superconductivity, Third Edition is an encyclopedic treatment of all aspects of the subject, from classic materials to fullerenes. Emphasis is on balanced coverage, with a comprehensive reference list and significant graphics from all areas of the published literature. Widely used theoretical approaches are explained in detail. Topics of special interest include high temperature superconductors, spectroscopy, critical states, transport properties, and tunneling. This book covers the whole field of superconductivity from both the theoretical and the experimental point of view. This third edition features extensive revisions throughout, and new chapters on second critical field and iron based superconductors.

  5. Generation of optical vortices in an integrated optical circuit

    Science.gov (United States)

    Tudor, Rebeca; Kusko, Mihai; Kusko, Cristian

    2017-09-01

    In this work, the generation of optical vortices in an optical integrated circuit is numerically demonstrated. The optical vortices with topological charge m = ±1 are obtained by the coherent superposition of the first order modes present in a waveguide with a rectangular cross section, where the phase delay between these two propagating modes is Δφ = ±π/2. The optical integrated circuit consists of an input waveguide continued with a y-splitter. The left and the right arms of the splitter form two coupling regions K1 and K2 with a multimode output waveguide. In each coupling region, the fundamental modes present in the arms of the splitter are selectively coupled into the output waveguide horizontal and vertical first order modes, respectively. We showed by employing the beam propagation method simulations that the fine tuning of the geometrical parameters of the optical circuit makes possible the generation of optical vortices in both transverse electric (TE) and transverse magnetic (TM) modes. Also, we demonstrated that by placing a thermo-optical element on one of the y-splitter arms, it is possible to switch the topological charge of the generated vortex from m = 1 to m = -1.

  6. Design automation for integrated nonlinear logic circuits (Conference Presentation)

    Science.gov (United States)

    Van Vaerenbergh, Thomas; Pelc, Jason; Santori, Charles; Bose, Ranojoy; Kielpinski, Dave; Beausoleil, Raymond G.

    2016-05-01

    A key enabler of the IT revolution of the late 20th century was the development of electronic design automation (EDA) tools allowing engineers to manage the complexity of electronic circuits with transistor counts now reaching into the billions. Recently, we have been developing large-scale nonlinear photonic integrated logic circuits for next generation all-optical information processing. At this time a sufficiently powerful EDA-style software tool chain to design this type of complex circuits does not yet exist. Here we describe a hierarchical approach to automating the design and validation of photonic integrated circuits, which can scale to several orders of magnitude higher complexity than the state of the art. Most photonic integrated circuits developed today consist of a small number of components, and only limited hierarchy. For example, a simple photonic transceiver may contain on the order of 10 building-block components, consisting of grating couplers for photonic I/O, modulators, and signal splitters/combiners. Because this is relatively easy to lay out by hand (or simple script) existing photonic design tools have relatively little automation in comparison to electronics tools. But demonstrating all-optical logic will require significantly more complex photonic circuits containing up to 1,000 components, hence becoming infeasible to design manually. Our design framework is based off Python-based software from Luceda Photonics which provides an environment to describe components, simulate their behavior, and export design files (GDS) to foundries for fabrication. At a fundamental level, a photonic component is described as a parametric cell (PCell) similarly to electronics design. PCells are described by geometric characteristics of their layout. A critical part of the design framework is the implementation of PCells as Python objects. PCell objects can then use inheritance to simplify design, and hierarchical designs can be made by creating composite

  7. Feasibility analysis of a novel hybrid-type superconducting circuit breaker in multi-terminal HVDC networks

    Science.gov (United States)

    Khan, Umer Amir; Lee, Jong-Geon; Seo, In-Jin; Amir, Faisal; Lee, Bang-Wook

    2015-11-01

    Voltage source converter-based HVDC systems (VSC-HVDC) are a better alternative than conventional thyristor-based HVDC systems, especially for developing multi-terminal HVDC systems (MTDC). However, one of the key obstacles in developing MTDC is the absence of an adequate protection system that can quickly detect faults, locate the faulty line and trip the HVDC circuit breakers (DCCBs) to interrupt the DC fault current. In this paper, a novel hybrid-type superconducting circuit breaker (SDCCB) is proposed and feasibility analyses of its application in MTDC are presented. The SDCCB has a superconducting fault current limiter (SFCL) located in the main current path to limit fault currents until the final trip signal is received. After the trip signal the IGBT located in the main line commutates the current into a parallel line where DC current is forced to zero by the combination of IGBTs and surge arresters. Fault simulations for three-, four- and five-terminal MTDC were performed and SDCCB performance was evaluated in these MTDC. Passive current limitation by SFCL caused a significant reduction of fault current interruption stress in the SDCCB. It was observed that the DC current could change direction in MTDC after a fault and the SDCCB was modified to break the DC current in both the forward and reverse directions. The simulation results suggest that the proposed SDCCB could successfully suppress the DC fault current, cause a timely interruption, and isolate the faulty HVDC line in MTDC.

  8. Set of CAMAC modules on the base of large integrated circuits for an accelerator synchronization system

    International Nuclear Information System (INIS)

    Glejbman, Eh.M.; Pilyar, N.V.

    1986-01-01

    Parameters of functional moduli in the CAMAC standard developed for accelerator synchronization system are presented. They comprise BZN-8K and BZ-8K digital delay circuits, timing circuit and pulse selection circuit. In every module 3 large integral circuits of KR 580 VI53 type programmed timer, circuits of the given system bus bar interface with bus bars of crate, circuits of data recording control, 2 peripheric storage devices, circuits of initial regime setting, input and output shapers, circuits of installation and removal of blocking in channels are used

  9. InP-based three-dimensional photonic integrated circuits

    Science.gov (United States)

    Tsou, Diana; Zaytsev, Sergey; Pauchard, Alexandre; Hummel, Steve; Lo, Yu-Hwa

    2001-10-01

    Fast-growing internet traffic volumes require high data communication bandwidth over longer distances than short wavelength (850 nm) multi-mode fiber systems can provide. Access network bottlenecks put pressure on short-range (SR) telecommunication systems. To effectively address these datacom and telecom market needs, low cost, high-speed laser modules at 1310 and 1550 nm wavelengths are required. The great success of GaAs 850 nm VCSELs for Gb/s Ethernet has motivated efforts to extend VCSEL technology to longer wavelengths in the 1310 and 1550 nm regimes. However, the technological challenges associated with available intrinsic materials for long wavelength VCSELs are tremendous. Even with recent advances in this area, it is believed that significant additional development is necessary before long wavelength VCSELs that meet commercial specifications will be widely available. In addition, the more stringent OC192 and OC768 specifications for single-mode fiber (SMF) datacom may require more than just a long wavelength laser diode, VCSEL or not, to address numerous cost and performance issues. We believe that photonic integrated circuits, which compactly integrate surface-emitting lasers with additional active and passive optical components with extended functionality, will provide the best solutions to today's problems. Photonic integrated circuits (PICs) have been investigated for more than a decade. However, they have produced limited commercial impact to date primarily because the highly complicated fabrication processes produce significant yield and device performance issues. In this presentation, we will discuss a new technology platform for fabricating InP-based photonic integrated circuits compatible with surface-emitting laser technology. Employing InP transparency at 1310 and 1550 nm wavelengths, we have created 3-D photonic integrated circuits (PICs) by utilizing light beams in both surface normal and in-plane directions within the InP-based structure

  10. A novel readout integrated circuit for ferroelectric FPA detector

    Science.gov (United States)

    Bai, Piji; Li, Lihua; Ji, Yulong; Zhang, Jia; Li, Min; Liang, Yan; Hu, Yanbo; Li, Songying

    2017-11-01

    Uncooled infrared detectors haves some advantages such as low cost light weight low power consumption, and superior reliability, compared with cryogenically cooled ones Ferroelectric uncooled focal plane array(FPA) are being developed for its AC response and its high reliability As a key part of the ferroelectric assembly the ROIC determines the performance of the assembly. A top-down design model for uncooled ferroelectric readout integrated circuit(ROIC) has been developed. Based on the optical thermal and electrical properties of the ferroelectric detector the RTIA readout integrated circuit is designed. The noise bandwidth of RTIA readout circuit has been developed and analyzed. A novel high gain amplifier, a high pass filter and a low pass filter circuits are designed on the ROIC. In order to improve the ferroelectric FPA package performance and decrease of package cost a temperature sensor is designed on the ROIC chip At last the novel RTIA ROIC is implemented on 0.6μm 2P3M CMOS silicon techniques. According to the experimental chip test results the temporal root mean square(RMS)noise voltage is about 1.4mV the sensitivity of the on chip temperature sensor is 0.6 mV/K from -40°C to 60°C the linearity performance of the ROIC chip is better than 99% Based on the 320×240 RTIA ROIC, a 320×240 infrared ferroelectric FPA is fabricated and tested. Test results shows that the 320×240 RTIA ROIC meets the demand of infrared ferroelectric FPA.

  11. Lithography for enabling advances in integrated circuits and devices.

    Science.gov (United States)

    Garner, C Michael

    2012-08-28

    Because the transistor was fabricated in volume, lithography has enabled the increase in density of devices and integrated circuits. With the invention of the integrated circuit, lithography enabled the integration of higher densities of field-effect transistors through evolutionary applications of optical lithography. In 1994, the semiconductor industry determined that continuing the increase in density transistors was increasingly difficult and required coordinated development of lithography and process capabilities. It established the US National Technology Roadmap for Semiconductors and this was expanded in 1999 to the International Technology Roadmap for Semiconductors to align multiple industries to provide the complex capabilities to continue increasing the density of integrated circuits to nanometre scales. Since the 1960s, lithography has become increasingly complex with the evolution from contact printers, to steppers, pattern reduction technology at i-line, 248 nm and 193 nm wavelengths, which required dramatic improvements of mask-making technology, photolithography printing and alignment capabilities and photoresist capabilities. At the same time, pattern transfer has evolved from wet etching of features, to plasma etch and more complex etching capabilities to fabricate features that are currently 32 nm in high-volume production. To continue increasing the density of devices and interconnects, new pattern transfer technologies will be needed with options for the future including extreme ultraviolet lithography, imprint technology and directed self-assembly. While complementary metal oxide semiconductors will continue to be extended for many years, these advanced pattern transfer technologies may enable development of novel memory and logic technologies based on different physical phenomena in the future to enhance and extend information processing.

  12. Thermally-isolated silicon-based integrated circuits and related methods

    Science.gov (United States)

    Wojciechowski, Kenneth; Olsson, Roy H.; Clews, Peggy J.; Bauer, Todd

    2017-05-09

    Thermally isolated devices may be formed by performing a series of etches on a silicon-based substrate. As a result of the series of etches, silicon material may be removed from underneath a region of an integrated circuit (IC). The removal of the silicon material from underneath the IC forms a gap between remaining substrate and the integrated circuit, though the integrated circuit remains connected to the substrate via a support bar arrangement that suspends the integrated circuit over the substrate. The creation of this gap functions to release the device from the substrate and create a thermally-isolated integrated circuit.

  13. Method of making thermally-isolated silicon-based integrated circuits

    Science.gov (United States)

    Wojciechowski, Kenneth; Olsson, Roy; Clews, Peggy J.; Bauer, Todd

    2017-11-21

    Thermally isolated devices may be formed by performing a series of etches on a silicon-based substrate. As a result of the series of etches, silicon material may be removed from underneath a region of an integrated circuit (IC). The removal of the silicon material from underneath the IC forms a gap between remaining substrate and the integrated circuit, though the integrated circuit remains connected to the substrate via a support bar arrangement that suspends the integrated circuit over the substrate. The creation of this gap functions to release the device from the substrate and create a thermally-isolated integrated circuit.

  14. High-precision analog circuit technology for power supply integrated circuits; Dengen IC yo koseido anarogu kairo gijutsu

    Energy Technology Data Exchange (ETDEWEB)

    Nakamori, A.; Suzuki, T.; Mizoe, K. [Fuji Electric Corporate Research and Development,Ltd., Kanagawa (Japan)

    2000-08-10

    With the recent rapid spread of portable electronic appliances, specification requirements such as compact power supply and long operation with batteries have become severer. Power supply ICs (integrated circuits) are required to reduce power consumption in the circuit and perform high-precision control. To meet these requirements, Fuji Electric develops high-precision CMOS (complementary metal-oxide semiconductor) analog technology. This paper describes three analog circuit technologies of a voltage reference, an operational amplifier and a comparator as circuit components particularly important for the precision of power supply ICs. (author)

  15. Thermionic integrated circuit technology for high power space applications

    International Nuclear Information System (INIS)

    Yadavalli, S.R.

    1984-01-01

    Thermionic triode and integrated circuit technology is in its infancy and it is emerging. The Thermionic triode can operate at relatively high voltages (up to 2000V) and at least tens of amperes. These devices, including their use in integrated circuitry, operate at high temperatures (800 0 C) and are very tolerant to nuclear and other radiations. These properties can be very useful in large space power applications such as that represented by the SP-100 system which uses a nuclear reactor. This paper presents an assessment of the application of thermionic integrated circuitry with space nuclear power system technology. A comparison is made with conventional semiconductor circuitry considering a dissipative shunt regulator for SP-100 type nuclear power system rated at 100 kW. The particular advantages of thermionic circuitry are significant reductions in size and mass of heat dissipation and radiation shield subsystems

  16. Implantable neurotechnologies: a review of integrated circuit neural amplifiers.

    Science.gov (United States)

    Ng, Kian Ann; Greenwald, Elliot; Xu, Yong Ping; Thakor, Nitish V

    2016-01-01

    Neural signal recording is critical in modern day neuroscience research and emerging neural prosthesis programs. Neural recording requires the use of precise, low-noise amplifier systems to acquire and condition the weak neural signals that are transduced through electrode interfaces. Neural amplifiers and amplifier-based systems are available commercially or can be designed in-house and fabricated using integrated circuit (IC) technologies, resulting in very large-scale integration or application-specific integrated circuit solutions. IC-based neural amplifiers are now used to acquire untethered/portable neural recordings, as they meet the requirements of a miniaturized form factor, light weight and low power consumption. Furthermore, such miniaturized and low-power IC neural amplifiers are now being used in emerging implantable neural prosthesis technologies. This review focuses on neural amplifier-based devices and is presented in two interrelated parts. First, neural signal recording is reviewed, and practical challenges are highlighted. Current amplifier designs with increased functionality and performance and without penalties in chip size and power are featured. Second, applications of IC-based neural amplifiers in basic science experiments (e.g., cortical studies using animal models), neural prostheses (e.g., brain/nerve machine interfaces) and treatment of neuronal diseases (e.g., DBS for treatment of epilepsy) are highlighted. The review concludes with future outlooks of this technology and important challenges with regard to neural signal amplification.

  17. Extremely flexible nanoscale ultrathin body silicon integrated circuits on plastic.

    Science.gov (United States)

    Shahrjerdi, Davood; Bedell, Stephen W

    2013-01-09

    In recent years, flexible devices based on nanoscale materials and structures have begun to emerge, exploiting semiconductor nanowires, graphene, and carbon nanotubes. This is primarily to circumvent the existing shortcomings of the conventional flexible electronics based on organic and amorphous semiconductors. The aim of this new class of flexible nanoelectronics is to attain high-performance devices with increased packing density. However, highly integrated flexible circuits with nanoscale transistors have not yet been demonstrated. Here, we show nanoscale flexible circuits on 60 Å thick silicon, including functional ring oscillators and memory cells. The 100-stage ring oscillators exhibit the stage delay of ~16 ps at a power supply voltage of 0.9 V, the best reported for any flexible circuits to date. The mechanical flexibility is achieved by employing the controlled spalling technology, enabling the large-area transfer of the ultrathin body silicon devices to a plastic substrate at room temperature. These results provide a simple and cost-effective pathway to enable ultralight flexible nanoelectronics with unprecedented level of system complexity based on mainstream silicon technology.

  18. Transient-induced latchup in CMOS integrated circuits

    CERN Document Server

    Ker, Ming-Dou

    2009-01-01

    "Transient-Induced Latchup in CMOS Integrated Circuits equips the practicing engineer with all the tools needed to address this regularly occurring problem while becoming more proficient at IC layout. Ker and Hsu introduce the phenomenon and basic physical mechanism of latchup, explaining the critical issues that have resurfaced for CMOS technologies. Once readers can gain an understanding of the standard practices for TLU, Ker and Hsu discuss the physical mechanism of TLU under a system-level ESD test, while introducing an efficient component-level TLU measurement setup. The authors then present experimental methodologies to extract safe and area-efficient compact layout rules for latchup prevention, including layout rules for I/O cells, internal circuits, and between I/O and internal circuits. The book concludes with an appendix giving a practical example of extracting layout rules and guidelines for latchup prevention in a 0.18-micrometer 1.8V/3.3V silicided CMOS process."--Publisher's description.

  19. Ultra-low power integrated circuit design circuits, systems, and applications

    CERN Document Server

    Li, Dongmei; Wang, Zhihua

    2014-01-01

    This book describes the design of CMOS circuits for ultra-low power consumption including analog, radio frequency (RF), and digital signal processing circuits (DSP). The book addresses issues from circuit and system design to production design, and applies the ultra-low power circuits described to systems for digital hearing aids and capsule endoscope devices. Provides a valuable introduction to ultra-low power circuit design, aimed at practicing design engineers; Describes all key building blocks of ultra-low power circuits, from a systems perspective; Applies circuits and systems described to real product examples such as hearing aids and capsule endoscopes.

  20. Method for deposition of a conductor in integrated circuits

    Science.gov (United States)

    Creighton, J. Randall; Dominguez, Frank; Johnson, A. Wayne; Omstead, Thomas R.

    1997-01-01

    A method is described for fabricating integrated semiconductor circuits and, more particularly, for the selective deposition of a conductor onto a substrate employing a chemical vapor deposition process. By way of example, tungsten can be selectively deposited onto a silicon substrate. At the onset of loss of selectivity of deposition of tungsten onto the silicon substrate, the deposition process is interrupted and unwanted tungsten which has deposited on a mask layer with the silicon substrate can be removed employing a halogen etchant. Thereafter, a plurality of deposition/etch back cycles can be carried out to achieve a predetermined thickness of tungsten.

  1. Analysis and Evaluation of Statistical Models for Integrated Circuits Design

    Directory of Open Access Journals (Sweden)

    Sáenz-Noval J.J.

    2011-10-01

    Full Text Available Statistical models for integrated circuits (IC allow us to estimate the percentage of acceptable devices in the batch before fabrication. Actually, Pelgrom is the statistical model most accepted in the industry; however it was derived from a micrometer technology, which does not guarantee reliability in nanometric manufacturing processes. This work considers three of the most relevant statistical models in the industry and evaluates their limitations and advantages in analog design, so that the designer has a better criterion to make a choice. Moreover, it shows how several statistical models can be used for each one of the stages and design purposes.

  2. Integrated circuit authentication hardware Trojans and counterfeit detection

    CERN Document Server

    Tehranipoor, Mohammad; Zhang, Xuehui

    2013-01-01

    This book describes techniques to verify the authenticity of integrated circuits (ICs). It focuses on hardware Trojan detection and prevention and counterfeit detection and prevention. The authors discuss a variety of detection schemes and design methodologies for improving Trojan detection techniques, as well as various attempts at developing hardware Trojans in IP cores and ICs. While describing existing Trojan detection methods, the authors also analyze their effectiveness in disclosing various types of Trojans, and demonstrate several architecture-level solutions. 

  3. The FE-I4 pixel readout integrated circuit

    Energy Technology Data Exchange (ETDEWEB)

    Garcia-Sciveres, M., E-mail: mgarcia-sciveres@bl.gov [Lawrence Berkeley National Laboratory, Berkeley, CA (United States); Arutinov, D.; Barbero, M. [University of Bonn, Bonn (Germany); Beccherle, R. [Istituto Nazionale di Fisica Nucleare Sezione di Genova, Genova (Italy); Dube, S.; Elledge, D. [Lawrence Berkeley National Laboratory, Berkeley, CA (United States); Fleury, J. [Laboratoire de l' Accelerateur Lineaire, Orsay (France); Fougeron, D.; Gensolen, F. [Centre de Physique des Particules de Marseille, Marseille (France); Gnani, D. [Lawrence Berkeley National Laboratory, Berkeley, CA (United States); Gromov, V. [Nationaal Instituut voor Subatomaire Fysica, Amsterdam (Netherlands); Hemperek, T.; Karagounis, M. [University of Bonn, Bonn (Germany); Kluit, R. [Nationaal Instituut voor Subatomaire Fysica, Amsterdam (Netherlands); Kruth, A. [University of Bonn, Bonn (Germany); Mekkaoui, A. [Lawrence Berkeley National Laboratory, Berkeley, CA (United States); Menouni, M. [Centre de Physique des Particules de Marseille, Marseille (France); Schipper, J.-D. [Nationaal Instituut voor Subatomaire Fysica, Amsterdam (Netherlands)

    2011-04-21

    A new pixel readout integrated circuit denominated FE-I4 is being designed to meet the requirements of ATLAS experiment upgrades. It will be the largest readout IC produced to date for particle physics applications, filling the maximum allowed reticle area. This will significantly reduce the cost of future hybrid pixel detectors. In addition, FE-I4 will have smaller pixels and higher rate capability than the present generation of LHC pixel detectors. Design features are described along with simulation and test results, including low power and high rate readout architecture, mixed signal design strategy, and yield hardening.

  4. CALCULATIONS OF DOUBLE IMPURITY DIFFUSION IN INTEGRATED CIRCUIT PRODUCTION

    Directory of Open Access Journals (Sweden)

    V. A. Bondarev

    2005-01-01

    Full Text Available Analytical formulae for calculating simultaneous diffusion of two impurities in silicon are presented. The formulae are based on analytical solutions of diffusion equations that have been obtained for the first time by the author while using some special mathematical functions. In contrast to usual formal mathematical approaches, new functions are determined in the process of investigation of real physical models. Algorithms involve some important relations from thermodynamics of irreversible processes and also variational thermodynamic functionals that were previously obtained by the author for transfer processes. Calculations considerably reduce the time required for development of new integrated circuits

  5. Cycles of self-pulsations in a photonic integrated circuit.

    Science.gov (United States)

    Karsaklian Dal Bosco, Andreas; Kanno, Kazutaka; Uchida, Atsushi; Sciamanna, Marc; Harayama, Takahisa; Yoshimura, Kazuyuki

    2015-12-01

    We report experimentally on the bifurcation cascade leading to the appearance of self-pulsation in a photonic integrated circuit in which a laser diode is subjected to delayed optical feedback. We study the evolution of the self-pulsing frequency with the increase of both the feedback strength and the injection current. Experimental observations show good qualitative accordance with numerical results carried out with the Lang-Kobayashi rate equation model. We explain the mechanism underlying the self-pulsations by a phenomenon of beating between successive pairs of external cavity modes and antimodes.

  6. Investigation of Optimal Integrated Circuit Raster Image Vectorization Method

    Directory of Open Access Journals (Sweden)

    Leonas Jasevičius

    2011-03-01

    Full Text Available Visual analysis of integrated circuit layer requires raster image vectorization stage to extract layer topology data to CAD tools. In this paper vectorization problems of raster IC layer images are presented. Various line extraction from raster images algorithms and their properties are discussed. Optimal raster image vectorization method was developed which allows utilization of common vectorization algorithms to achieve the best possible extracted vector data match with perfect manual vectorization results. To develop the optimal method, vectorized data quality dependence on initial raster image skeleton filter selection was assessed.Article in Lithuanian

  7. Design and application of multilayer monolithic microwave integrated circuit transformers

    Energy Technology Data Exchange (ETDEWEB)

    Economides, S.B

    1999-07-01

    fabricated on standard foundry processes. With careful modelling it is also feasible to integrate the two couplers into a single tri-filar transformer structure. This is a robust balun topology, which could be widely adopted. A push-pull MESFET amplifier with 8 dB gain demonstrated this at 12 GHz, using the balun chips connected to amplifier circuits. (author)

  8. Superconductivity

    International Nuclear Information System (INIS)

    Narlikar, A.V.

    1993-01-01

    Amongst the numerous scientific discoveries that the 20th century has to its credit, superconductivity stands out as an exceptional example of having retained its original dynamism and excitement even for more than 80 years after its discovery. It has proved itself to be a rich field by continually offering frontal challenges in both research and applications. Indeed, one finds that a majority of internationally renowned condensed matter theorists, at some point of their career, have found excitement in working in this important area. Superconductivity presents a unique example of having fetched Nobel awards as many as four times to date, and yet, interestingly enough, the field still remains open for new insights and discoveries which could undeniably be of immense technological value. 1 fig

  9. Chemistry integrated circuit: chemical system on a complementary metal oxide semiconductor integrated circuit.

    Science.gov (United States)

    Nakazato, Kazuo

    2014-03-28

    By integrating chemical reactions on a large-scale integration (LSI) chip, new types of device can be created. For biomedical applications, monolithically integrated sensor arrays for potentiometric, amperometric and impedimetric sensing of biomolecules have been developed. The potentiometric sensor array detects pH and redox reaction as a statistical distribution of fluctuations in time and space. For the amperometric sensor array, a microelectrode structure for measuring multiple currents at high speed has been proposed. The impedimetric sensor array is designed to measure impedance up to 10 MHz. The multimodal sensor array will enable synthetic analysis and make it possible to standardize biosensor chips. Another approach is to create new functional devices by integrating molecular systems with LSI chips, for example image sensors that incorporate biological materials with a sensor array. The quantum yield of the photoelectric conversion of photosynthesis is 100%, which is extremely difficult to achieve by artificial means. In a recently developed process, a molecular wire is plugged directly into a biological photosynthetic system to efficiently conduct electrons to a gold electrode. A single photon can be detected at room temperature using such a system combined with a molecular single-electron transistor.

  10. Superconductivity

    International Nuclear Information System (INIS)

    Anon.

    1988-01-01

    This book profiles the research activity of 42 companies in the superconductivity field, worldwide. It forms a unique and comprehensive directory to this emerging technology. For each research site, it details the various projects in progress, analyzes the level of activity, pinpoints applications and R and D areas, reviews strategies and provides complete contact information. It lists key individuals, offers international comparisons of government funding, reviews market forecasts and development timetables and features a bibliography of selected articles on the subject

  11. Superconductivity

    International Nuclear Information System (INIS)

    Buller, L.; Carrillo, F.; Dietert, R.; Kotziapashis, A.

    1989-01-01

    Superconductors are materials which combine the property of zero electric resistance with the capability to exclude any adjacent magnetic field. This leads to many large scale applications such as the much publicized levitating train, generation of magnetic fields in MHD electric generators, and special medical diagnostic equipment. On a smaller-scale, superconductive materials could replace existing resistive connectors and decrease signal delays by reducing the RLC time constants. Thus, a computer could operate at much higher speeds, and consequently at lower power levels which would reduce the need for heat removal and allow closer spacing of circuitry. Although technical advances and proposed applications are constantly being published, it should be recognized that superconductivity is a slowly developing technology. It has taken scientists almost eighty years to learn what they now know about this material and its function. The present paper provides an overview of the historical development of superconductivity and describes some of the potential applications for this new technology as it pertains to the electronics industry

  12. Economic testing of large integrated switching circuits - a challenge to the test engineer

    International Nuclear Information System (INIS)

    Kreinberg, W.

    1978-01-01

    With reference to large integrated switching circuits, one can use an incoming standard programme test or the customer's switching circuits. The author describes the development of suitable, extensive and economical test programmes. (orig.) [de

  13. Post-irradiation effects in CMOS integrated circuits

    International Nuclear Information System (INIS)

    Zietlow, T.C.; Barnes, C.E.; Morse, T.C.; Grusynski, J.S.; Nakamura, K.; Amram, A.; Wilson, K.T.

    1988-01-01

    The post-irradiation response of CMOS integrated circuits from three vendors has been measured as a function of temperature and irradiation bias. The author's have found that a worst-case anneal temperature for rebound testing is highly process dependent. At an anneal temperature of 80 0 C, the timing parameters of a 16K SRAM from vendor A quickly saturate at maximum values, and display no further changes at this temperature. At higher temperature, evidence for the anneal of interface state charge is observed. Dynamic bias during irradiation results in the same saturation value for the timing parameters, but the anneal time required to reach this value is longer. CMOS/SOS integrated circuits (vendor B) were also examined, and showed similar behavior, except that the saturation value for the timing parameters was stable up to 105 0 C. After irradiation to 10 Mrad(Si), a 16K SRAM (vendor C) was annealed at 80 0 C. In contrast to the results from the vendor A SRAM, the access time decreased toward prerad values during the anneal. Another part irradiated in the same manner but annealed at room temperature showed a slight increase during the anneal

  14. Organic-inorganic hybrid material SUNCONNECT® for photonic integrated circuit

    Science.gov (United States)

    Nawata, Hideyuki; Oshima, Juro; Kashino, Tsubasa

    2018-02-01

    In this paper, we report the feature and properties about organic-inorganic hybrid material, "SUNCONNECT®" for photonic integrated circuit. "SUNCONNECT®" materials have low propagation loss at 1310nm (0.29dB/cm) and 1550nm (0.45dB/cm) respectively. In addition, the material has high thermal resistance both high temperature annealing test at 300°C and also 260°C solder heat resistance test. For actual device application, high reliability is required. 85°C /85% test was examined by using multi-mode waveguide. As a result, it indicated that variation of insertion loss property was not changed significantly after high temperature / high humidity test. For the application to photonic integrated circuit, it was demonstrated to fabricate polymer optical waveguide by using three different methods. Single-micron core pattern can be fabricated on cladding layer by using UV lithography with proximity gap exposure. Also, single-mode waveguide can be also fabricated with over cladding. On the other hands, "Mosquito method" and imprint method can be applied to fabricate polymer optical waveguide. Remarkably, these two methods can fabricate gradedindex type optical waveguide without using photo mask. In order to evaluate the optical performance, NFP's observation, measurement of insertion loss and propagation loss by cut-back methods were carried out by using each waveguide sample.

  15. Development of optical packet and circuit integrated ring network testbed.

    Science.gov (United States)

    Furukawa, Hideaki; Harai, Hiroaki; Miyazawa, Takaya; Shinada, Satoshi; Kawasaki, Wataru; Wada, Naoya

    2011-12-12

    We developed novel integrated optical packet and circuit switch-node equipment. Compared with our previous equipment, a polarization-independent 4 × 4 semiconductor optical amplifier switch subsystem, gain-controlled optical amplifiers, and one 100 Gbps optical packet transponder and seven 10 Gbps optical path transponders with 10 Gigabit Ethernet (10GbE) client-interfaces were newly installed in the present system. The switch and amplifiers can provide more stable operation without equipment adjustments for the frequent polarization-rotations and dynamic packet-rate changes of optical packets. We constructed an optical packet and circuit integrated ring network testbed consisting of two switch nodes for accelerating network development, and we demonstrated 66 km fiber transmission and switching operation of multiplexed 14-wavelength 10 Gbps optical paths and 100 Gbps optical packets encapsulating 10GbE frames. Error-free (frame error rate optical packets of various packet lengths and packet rates, and stable operation of the network testbed was confirmed. In addition, 4K uncompressed video streaming over OPS links was successfully demonstrated. © 2011 Optical Society of America

  16. Integrated circuit amplifiers for multi-electrode intracortical recording.

    Science.gov (United States)

    Jochum, Thomas; Denison, Timothy; Wolf, Patrick

    2009-02-01

    Significant progress has been made in systems that interpret the electrical signals of the brain in order to control an actuator. One version of these systems senses neuronal extracellular action potentials with an array of up to 100 miniature probes inserted into the cortex. The impedance of each probe is high, so environmental electrical noise is readily coupled to the neuronal signal. To minimize this noise, an amplifier is placed close to each probe. Thus, the need has arisen for many amplifiers to be placed near the cortex. Commercially available integrated circuits do not satisfy the area, power and noise requirements of this application, so researchers have designed custom integrated-circuit amplifiers. This paper presents a comprehensive survey of the neural amplifiers described in publications prior to 2008. Methods to achieve high input impedance, low noise and a large time-constant high-pass filter are reviewed. A tutorial on the biological, electrochemical, mechanical and electromagnetic phenomena that influence amplifier design is provided. Areas for additional research, including sub-nanoampere electrolysis and chronic cortical heating, are discussed. Unresolved design concerns, including teraohm circuitry, electrical overstress and component failure, are identified.

  17. Flexible, Photopatterned, Colloidal CdSe Semiconductor Nanocrystal Integrated Circuits

    Science.gov (United States)

    Stinner, F. Scott

    As semiconductor manufacturing pushes towards smaller and faster transistors, a parallel goal exists to create transistors which are not nearly as small. These transistors are not intended to match the performance of traditional crystalline semiconductors; they are designed to be significantly lower in cost and manufactured using methods that can make them physically flexible for applications where form is more important than speed. One of the developing technologies for this application is semiconductor nanocrystals. We first explore methods to develop CdSe nanocrystal semiconducting "inks" into large-scale, high-speed integrated circuits. We demonstrate photopatterned transistors with mobilities of 10 cm2/Vs on Kapton substrates. We develop new methods for vertical interconnect access holes to demonstrate multi-device integrated circuits including inverting amplifiers with 7 kHz bandwidths, ring oscillators with NFC) link. The device draws its power from the NFC transmitter common on smartphones and eliminates the need for a fixed battery. This allows for the mass deployment of flexible, interactive displays on product packaging.

  18. Mixed signal custom integrated circuit development for physics instrumentation

    International Nuclear Information System (INIS)

    Britton, C.L. Jr.; Bryan, W.L.; Emery, M.S.

    1998-01-01

    The Monolithic Systems Development Group at the Oak Ridge National Laboratory has been greatly involved in custom mixed-mode integrated circuit development for the PHENIX detector at the Relativistic Heavy Ion collider (RHIC) at Brookhaven National Laboratory and position-sensitive germanium spectrometer front-ends for the Naval Research Laboratory (NRL). This paper will outline the work done for both PHENIX and the Naval Research Laboratory in the area of full-custom, mixed-signal CMOS integrated electronics. This paper presents the architectures chosen for the various PHENIX detectors which include position-sensitive silicon, capacitive pixel, and phototube detectors, and performance results for the subsystems as well as a system description of the NRL germanium strip system and its performance. The performance of the custom preamplifiers, discriminators, analog memories, analog-digital converters, and control circuitry for all systems will be presented

  19. Integrated optoelectronic materials and circuits for optical interconnects

    International Nuclear Information System (INIS)

    Hutcheson, L.D.

    1988-01-01

    Conventional interconnect and switching technology is rapidly becoming a critical issue in the realization of systems using high speed silicon and GaAs based technologies. In recent years clock speeds and on-chip density for VLSI/VHSIC technology has made packaging these high speed chips extremely difficult. A strong case can be made for using optical interconnects for on-chip/on-wafer, chip-to-chip and board-to-board high speed communications. GaAs integrated optoelectronic circuits (IOC's) are being developed in a number of laboratories for performing Input/Output functions at all levels. In this paper integrated optoelectronic materials, electronics and optoelectronic devices are presented. IOC's are examined from the standpoint of what it takes to fabricate the devices and what performance can be expected

  20. Numerical counting ratemeter with variable time constant and integrated circuits

    International Nuclear Information System (INIS)

    Kaiser, J.; Fuan, J.

    1967-01-01

    We present here the prototype of a numerical counting ratemeter which is a special version of variable time-constant frequency meter (1). The originality of this work lies in the fact that the change in the time constant is carried out automatically. Since the criterion for this change is the accuracy in the annunciated result, the integration time is varied as a function of the frequency. For the prototype described in this report, the time constant varies from 1 sec to 1 millisec. for frequencies in the range 10 Hz to 10 MHz. This prototype is built entirely of MECL-type integrated circuits from Motorola and is thus contained in two relatively small boxes. (authors) [fr

  1. Mixed signal custom integrated circuit development for physics instrumentation

    Energy Technology Data Exchange (ETDEWEB)

    Britton, C.L. Jr.; Bryan, W.L.; Emery, M.S. [and others

    1998-10-01

    The Monolithic Systems Development Group at the Oak Ridge National Laboratory has been greatly involved in custom mixed-mode integrated circuit development for the PHENIX detector at the Relativistic Heavy Ion collider (RHIC) at Brookhaven National Laboratory and position-sensitive germanium spectrometer front-ends for the Naval Research Laboratory (NRL). This paper will outline the work done for both PHENIX and the Naval Research Laboratory in the area of full-custom, mixed-signal CMOS integrated electronics. This paper presents the architectures chosen for the various PHENIX detectors which include position-sensitive silicon, capacitive pixel, and phototube detectors, and performance results for the subsystems as well as a system description of the NRL germanium strip system and its performance. The performance of the custom preamplifiers, discriminators, analog memories, analog-digital converters, and control circuitry for all systems will be presented.

  2. Packaging and interconnection for superconductive circuitry

    International Nuclear Information System (INIS)

    Anacker, W.

    1976-01-01

    A three dimensional microelectronic module packaged for reduced signal propagation delay times including a plurality of circuit carrying means, which may comprise unbacked chips, with integrated superconductive circuitry thereon is described. The circuit carrying means are supported on their edges and have contact lands in the vicinity of, or at, the edges to provide for interconnecting circuitry. The circuit carrying means are supported by supporting means which include slots to provide a path for interconnection wiring to contact the lands of the circuit carrying means. Further interconnecting wiring may take the form of integrated circuit wiring on the reverse side of the supporting means. The low heat dissipation of the superconductive circuitry allows the circuit carrying means to be spaced approximately no less than 30 mils apart. The three dimensional arrangement provides lower random propagation delays than would a planar array of circuits

  3. Control technology for integrated circuit fabrication at Micro-Circuit Engineering, Incorporated, West Palm Beach, Florida

    Science.gov (United States)

    Mihlan, G. I.; Mitchell, R. I.; Smith, R. K.

    1984-07-01

    A survey to assess control technology for integrated circuit fabrication was conducted. Engineering controls included local and general exhaust ventilation, shielding, and personal protective equipment. Devices or work stations that contained toxic materials that were potentially dangerous were controlled by local exhaust ventilation. Less hazardous areas were controlled by general exhaust ventilation. Process isolation was used in the plasma etching, low pressure chemical vapor deposition, and metallization operations. Shielding was used in ion implantation units to control X-ray emissions, in contact mask alignes to limit ultraviolet (UV) emissions, and in plasma etching units to control radiofrequency and UV emissions. Most operations were automated. Use of personal protective equipment varied by job function.

  4. Removal of Gross Air Embolization from Cardiopulmonary Bypass Circuits with Integrated Arterial Line Filters: A Comparison of Circuit Designs.

    Science.gov (United States)

    Reagor, James A; Holt, David W

    2016-03-01

    Advances in technology, the desire to minimize blood product transfusions, and concerns relating to inflammatory mediators have lead many practitioners and manufacturers to minimize cardiopulmonary bypass (CBP) circuit designs. The oxygenator and arterial line filter (ALF) have been integrated into one device as a method of attaining a reduction in prime volume and surface area. The instructions for use of a currently available oxygenator with integrated ALF recommends incorporating a recirculation line distal to the oxygenator. However, according to an unscientific survey, 70% of respondents utilize CPB circuits incorporating integrated ALFs without a path of recirculation distal to the oxygenator outlet. Considering this circuit design, the ability to quickly remove a gross air bolus in the blood path distal to the oxygenator may be compromised. This in vitro study was designed to determine if the time required to remove a gross air bolus from a CPB circuit without a path of recirculation distal to the oxygenator will be significantly longer than that of a circuit with a path of recirculation distal to the oxygenator. A significant difference was found in the mean time required to remove a gross air bolus between the circuit designs (p = .0003). Additionally, There was found to be a statistically significant difference in the mean time required to remove a gross air bolus between Trial 1 and Trials 4 (p = .015) and 5 (p =.014) irrespective of the circuit design. Under the parameters of this study, a recirculation line distal to an oxygenator with an integrated ALF significantly decreases the time it takes to remove an air bolus from the CPB circuit and may be safer for clinical use than the same circuit without a recirculation line.

  5. Superconductivity

    International Nuclear Information System (INIS)

    2007-01-01

    During 2007, a large amount of the work was centred on the ITER project and related tasks. The activities based on low-temperature superconducting (LTS) materials included the manufacture and qualification of ITER full-size conductors under relevant operating conditions, the design of conductors and magnets for the JT-60SA tokamak and the manufacture of the conductors for the European dipole facility. A preliminary study was also performed to develop a new test facility at ENEA in order to test long-length ITER or DEMO full-size conductors. Several studies on different superconducting materials were also started to create a more complete database of superconductor properties, and also for use in magnet design. In this context, an extensive measurement campaign on transport and magnetic properties was carried out on commercially available NbTi strands. Work was started on characterising MgB 2 wire and bulk samples to optimise their performance. In addition, an intense experimental study was started to clarify the effect of mechanical loads on the transport properties of multi-filamentary Nb 3 Sn strands with twisted or untwisted superconducting filaments. The experimental activity on high-temperature superconducting (HTS) materials was mainly focussed on the development and characterisation of YBa 2 Cu 3 O 7-X (YBCO) based coated conductors. Several characteristics regarding YBCO deposition, current transport performance and tape manufacture were investigated. In the framework of chemical approaches for YBCO film growth, a new method, developed in collaboration with the Technical University of Cluj-Napoca (TUCN), Romania, was studied to obtain YBCO film via chemical solution deposition, which modifies the well-assessed metallic organic deposition trifluoroacetate (MOD-TFA) approach. The results are promising in terms of critical current and film thickness values. YBCO properties in films with artificially added pinning sites were characterised in collaboration with

  6. Diagnosis of soft faults in analog integrated circuits based on fractional correlation

    International Nuclear Information System (INIS)

    Deng Yong; Shi Yibing; Zhang Wei

    2012-01-01

    Aiming at the problem of diagnosing soft faults in analog integrated circuits, an approach based on fractional correlation is proposed. First, the Volterra series of the circuit under test (CUT) decomposed by the fractional wavelet packet are used to calculate the fractional correlation functions. Then, the calculated fractional correlation functions are used to form the fault signatures of the CUT. By comparing the fault signatures, the different soft faulty conditions of the CUT are identified and the faults are located. Simulations of benchmark circuits illustrate the proposed method and validate its effectiveness in diagnosing soft faults in analog integrated circuits. (semiconductor integrated circuits)

  7. Long-wavelength photonic integrated circuits and avalanche photodetectors

    Science.gov (United States)

    Tsou, Yi-Jen D.; Zaytsev, Sergey; Pauchard, Alexandre; Hummel, Steve; Lo, Yu-Hwa

    2001-10-01

    Fast-growing internet traffic volume require high data communication bandwidth over longer distances. Access network bottlenecks put pressure on short-range (SR) telecommunication systems. To effectively address these datacom and telecom market needs, low-cost, high-speed laser modules at 1310 to 1550 nm wavelengths and avalanche photodetectors are required. The great success of GaAs 850nm VCSEls for Gb/s Ethernet has motivated efforts to extend VCSEL technology to longer wavelengths in the 1310 and 1550 nm regimes. However, the technological challenges associated with materials for long wavelength VCSELs are tremendous. Even with recent advances in this area, it is believed that significant additional development is necessary before long wavelength VCSELs that meet commercial specifications will be widely available. In addition, the more stringent OC192 and OC768 specifications for single-mode fiber (SMF) datacom may require more than just a long wavelength laser diode, VCSEL or not, to address numerous cost and performance issues. We believe that photonic integrated circuits (PICs), which compactly integrate surface-emitting lasers with additional active and passive optical components with extended functionality, will provide the best solutions to today's problems. Photonic integrated circuits have been investigated for more than a decade. However, they have produced limited commercial impact to date primarily because the highly complicated fabrication processes produce significant yield and device performance issues. In this presentation, we will discuss a new technology platform of InP-based PICs compatible with surface-emitting laser technology, as well as a high data rate externally modulated laser module. Avalanche photodetectors (APDs) are the key component in the receiver to achieve high data rate over long transmission distance because of their high sensitivity and large gain- bandwidth product. We have used wafer fusion technology to achieve In

  8. Perspective: The future of quantum dot photonic integrated circuits

    Directory of Open Access Journals (Sweden)

    Justin C. Norman

    2018-03-01

    Full Text Available Direct epitaxial integration of III-V materials on Si offers substantial manufacturing cost and scalability advantages over heterogeneous integration. The challenge is that epitaxial growth introduces high densities of crystalline defects that limit device performance and lifetime. Quantum dot lasers, amplifiers, modulators, and photodetectors epitaxially grown on Si are showing promise for achieving low-cost, scalable integration with silicon photonics. The unique electrical confinement properties of quantum dots provide reduced sensitivity to the crystalline defects that result from III-V/Si growth, while their unique gain dynamics show promise for improved performance and new functionalities relative to their quantum well counterparts in many devices. Clear advantages for using quantum dot active layers for lasers and amplifiers on and off Si have already been demonstrated, and results for quantum dot based photodetectors and modulators look promising. Laser performance on Si is improving rapidly with continuous-wave threshold currents below 1 mA, injection efficiencies of 87%, and output powers of 175 mW at 20 °C. 1500-h reliability tests at 35 °C showed an extrapolated mean-time-to-failure of more than ten million hours. This represents a significant stride toward efficient, scalable, and reliable III-V lasers on on-axis Si substrates for photonic integrate circuits that are fully compatible with complementary metal-oxide-semiconductor (CMOS foundries.

  9. Perspective: The future of quantum dot photonic integrated circuits

    Science.gov (United States)

    Norman, Justin C.; Jung, Daehwan; Wan, Yating; Bowers, John E.

    2018-03-01

    Direct epitaxial integration of III-V materials on Si offers substantial manufacturing cost and scalability advantages over heterogeneous integration. The challenge is that epitaxial growth introduces high densities of crystalline defects that limit device performance and lifetime. Quantum dot lasers, amplifiers, modulators, and photodetectors epitaxially grown on Si are showing promise for achieving low-cost, scalable integration with silicon photonics. The unique electrical confinement properties of quantum dots provide reduced sensitivity to the crystalline defects that result from III-V/Si growth, while their unique gain dynamics show promise for improved performance and new functionalities relative to their quantum well counterparts in many devices. Clear advantages for using quantum dot active layers for lasers and amplifiers on and off Si have already been demonstrated, and results for quantum dot based photodetectors and modulators look promising. Laser performance on Si is improving rapidly with continuous-wave threshold currents below 1 mA, injection efficiencies of 87%, and output powers of 175 mW at 20 °C. 1500-h reliability tests at 35 °C showed an extrapolated mean-time-to-failure of more than ten million hours. This represents a significant stride toward efficient, scalable, and reliable III-V lasers on on-axis Si substrates for photonic integrate circuits that are fully compatible with complementary metal-oxide-semiconductor (CMOS) foundries.

  10. Integrated Circuit Design in US High-Energy Physics

    Energy Technology Data Exchange (ETDEWEB)

    Geronimo, G. D. [Brookhaven National Lab. (BNL), Upton, NY (United States); Christian, D. [Fermi National Accelerator Lab. (FNAL), Batavia, IL (United States); Bebek, C. [Lawrence Berkeley National Lab. (LBNL), Berkeley, CA (United States); Garcia-Sciveres, M. [Lawrence Berkeley National Lab. (LBNL), Berkeley, CA (United States); Lippe, H. V. D. [Lawrence Berkeley National Lab. (LBNL), Berkeley, CA (United States); Haller, G. [SLAC National Accelerator Lab., Menlo Park, CA (United States); Grillo, AA [Univ. of California, Santa Cruz, CA (United States); Newcomer, M [Univ. of Pennsylvania, Philadelphia, PA (United States)

    2013-07-10

    This whitepaper summarizes the status, plans, and challenges in the area of integrated circuit design in the United States for future High Energy Physics (HEP) experiments. It has been submitted to CPAD (Coordinating Panel for Advanced Detectors) and the HEP Community Summer Study 2013(Snowmass on the Mississippi) held in Minnesota July 29 to August 6, 2013. A workshop titled: US Workshop on IC Design for High Energy Physics, HEPIC2013 was held May 30 to June 1, 2013 at Lawrence Berkeley National Laboratory (LBNL). A draft of the whitepaper was distributed to the attendees before the workshop, the content was discussed at the meeting, and this document is the resulting final product. The scope of the whitepaper includes the following topics: Needs for IC technologies to enable future experiments in the three HEP frontiers Energy, Cosmic and Intensity Frontiers; Challenges in the different technology and circuit design areas and the related R&D needs; Motivation for using different fabrication technologies; Outlook of future technologies including 2.5D and 3D; Survey of ICs used in current experiments and ICs targeted for approved or proposed experiments; IC design at US institutes and recommendations for collaboration in the future.

  11. Silicon photonics integrated circuits: a manufacturing platform for high density, low power optical I/O's.

    Science.gov (United States)

    Absil, Philippe P; Verheyen, Peter; De Heyn, Peter; Pantouvaki, Marianna; Lepage, Guy; De Coster, Jeroen; Van Campenhout, Joris

    2015-04-06

    Silicon photonics integrated circuits are considered to enable future computing systems with optical input-outputs co-packaged with CMOS chips to circumvent the limitations of electrical interfaces. In this paper we present the recent progress made to enable dense multiplexing by exploiting the integration advantage of silicon photonics integrated circuits. We also discuss the manufacturability of such circuits, a key factor for a wide adoption of this technology.

  12. Integrated circuit for processing a low-frequency signal from a seismic detector

    Energy Technology Data Exchange (ETDEWEB)

    Malashevich, N. I.; Roslyakov, A. S.; Polomoshnov, S. A., E-mail: S.Polomoshnov@tsen.ru; Fedorov, R. A. [Research and Production Complex ' Technological Center' of the Moscow Institute of Electronic Technology (Russian Federation)

    2011-12-15

    Specific features for the detection and processing of a low-frequency signal from a seismic detector are considered in terms of an integrated circuit based on a large matrix crystal of the 5507 series. This integrated circuit is designed for the detection of human movements. The specific features of the information signal, obtained at the output of the seismic detector, and the main characteristics of the integrated circuit and its structure are reported.

  13. CMOS analog integrated circuit design technology; CMOS anarogu IC sekkei gijutsu

    Energy Technology Data Exchange (ETDEWEB)

    Fujimoto, H.; Fujisawa, A. [Fuji Electric Co. Ltd., Tokyo (Japan)

    2000-08-10

    In the field of the LSI (large scale integrated circuit) in rapid progress toward high integration and advanced functions, CAD (computer-aided design) technology has become indispensable to LSI development within a short period. Fuji Electric has developed design technologies and automatic design system to develop high-quality analog ICs (integrated circuits), including power supply ICs. within a short period. This paper describes CMOS (complementary metal-oxide semiconductor) analog macro cell, circuit simulation, automatic routing, and backannotation technologies. (author)

  14. Technique for selection of transient radiation-hard junction-isolated integrated circuits

    International Nuclear Information System (INIS)

    Crowley, J.L.; Junga, F.A.; Stultz, T.J.

    1976-01-01

    A technique is presented which demonstrates the feasibility of selecting junction-isolated integrated circuits (JI/ICS) for use in transient radiation environments. The procedure guarantees that all PNPN paths within the integrated circuit are identified and describes the methods used to determine whether the paths represent latchup susceptible structures. Two examples of the latchup analysis are given involving an SSI and an LSI bipolar junction-isolated integrated circuit

  15. Analog Integrated Circuit Design for Spike Time Dependent Encoder and Reservoir in Reservoir Computing Processors

    Science.gov (United States)

    2018-01-01

    HAS BEEN REVIEWED AND IS APPROVED FOR PUBLICATION IN ACCORDANCE WITH ASSIGNED DISTRIBUTION STATEMENT. FOR THE CHIEF ENGINEER : / S / / S...bridged high-performance computing, nanotechnology , and integrated circuits & systems. 15. SUBJECT TERMS neuromorphic computing, neuron design, spike...multidisciplinary effort encompassed high-performance computing, nanotechnology , integrated circuits, and integrated systems. The project’s architecture was

  16. 77 FR 35426 - Certain Radio Frequency Integrated Circuits and Devices Containing Same; Institution of...

    Science.gov (United States)

    2012-06-13

    ... of certain radio frequency integrated circuits and devices containing same by reason of infringement... importation of certain radio frequency integrated circuits and devices containing same that infringe one or... INTERNATIONAL TRADE COMMISSION [Investigation No. 337-TA-848] Certain Radio Frequency Integrated...

  17. Design and testing of integrated circuits for reactor protection channels

    International Nuclear Information System (INIS)

    Battle, R.E.; Vandermolen, R.I.; Jagadish, U.; Swail, B.K.; Naser, J.; Rana, I.

    1995-01-01

    Custom and semicustom application-specific integrated circuit design and testing methods are investigated for use in research and commercial nuclear reactor safety systems. The Electric Power Research Institute and Oak Ridge National Laboratory are working together through a cooperative research and development agreement to apply modern technology to a nuclear reactor protection system. Purpose of this project is to demonstrate to the nuclear industry an alternative approach for new or upgrade reactor protection and safety system signal processing and voting logic. Motivation for this project stems from (1) the difficulty of proving that software-based protection systems are adequately reliable, (2) the obsolescence of the original equipment, and (3) the improved performance of digital processing

  18. Wireless Neural Recording With Single Low-Power Integrated Circuit

    Science.gov (United States)

    Harrison, Reid R.; Kier, Ryan J.; Chestek, Cynthia A.; Gilja, Vikash; Nuyujukian, Paul; Ryu, Stephen; Greger, Bradley; Solzbacher, Florian; Shenoy, Krishna V.

    2010-01-01

    We present benchtop and in vivo experimental results from an integrated circuit designed for wireless implantable neural recording applications. The chip, which was fabricated in a commercially available 0.6-μm 2P3M BiCMOS process, contains 100 amplifiers, a 10-bit analog-to-digital converter (ADC), 100 threshold-based spike detectors, and a 902–928 MHz frequency-shift-keying (FSK) transmitter. Neural signals from a selected amplifier are sampled by the ADC at 15.7 kSps and telemetered over the FSK wireless data link. Power, clock, and command signals are sent to the chip wirelessly over a 2.765-MHz inductive (coil-to-coil) link. The chip is capable of operating with only two off-chip components: a power/command receiving coil and a 100-nF capacitor. PMID:19497825

  19. Infrared transparent graphene heater for silicon photonic integrated circuits.

    Science.gov (United States)

    Schall, Daniel; Mohsin, Muhammad; Sagade, Abhay A; Otto, Martin; Chmielak, Bartos; Suckow, Stephan; Giesecke, Anna Lena; Neumaier, Daniel; Kurz, Heinrich

    2016-04-18

    Thermo-optical tuning of the refractive index is one of the pivotal operations performed in integrated silicon photonic circuits for thermal stabilization, compensation of fabrication tolerances, and implementation of photonic operations. Currently, heaters based on metal wires provide the temperature control in the silicon waveguide. The strong interaction of metal and light, however, necessitates a certain gap between the heater and the photonic structure to avoid significant transmission loss. Here we present a graphene heater that overcomes this constraint and enables an energy efficient tuning of the refractive index. We achieve a tuning power as low as 22 mW per free spectral range and fast response time of 3 µs, outperforming metal based waveguide heaters. Simulations support the experimental results and suggest that for graphene heaters the spacing to the silicon can be further reduced yielding the best possible energy efficiency and operation speed.

  20. Apparatus and method for defect testing of integrated circuits

    Science.gov (United States)

    Cole, Jr., Edward I.; Soden, Jerry M.

    2000-01-01

    An apparatus and method for defect and failure-mechanism testing of integrated circuits (ICs) is disclosed. The apparatus provides an operating voltage, V.sub.DD, to an IC under test and measures a transient voltage component, V.sub.DDT, signal that is produced in response to switching transients that occur as test vectors are provided as inputs to the IC. The amplitude or time delay of the V.sub.DDT signal can be used to distinguish between defective and defect-free (i.e. known good) ICs. The V.sub.DDT signal is measured with a transient digitizer, a digital oscilloscope, or with an IC tester that is also used to input the test vectors to the IC. The present invention has applications for IC process development, for the testing of ICs during manufacture, and for qualifying ICs for reliability.

  1. Photonic integrated circuits unveil crisis-induced intermittency.

    Science.gov (United States)

    Karsaklian Dal Bosco, Andreas; Akizawa, Yasuhiro; Kanno, Kazutaka; Uchida, Atsushi; Harayama, Takahisa; Yoshimura, Kazuyuki

    2016-09-19

    We experimentally investigate an intermittent route to chaos in a photonic integrated circuit consisting of a semiconductor laser with time-delayed optical feedback from a short external cavity. The transition from a period-doubling dynamics to a fully-developed chaos reveals a stage intermittently exhibiting these two dynamics. We unveil the bifurcation mechanism underlying this route to chaos by using the Lang-Kobayashi model and demonstrate that the process is based on a phenomenon of attractor expansion initiated by a particular distribution of the local Lyapunov exponents. We emphasize on the crucial importance of the distribution of the steady-state solutions introduced by the time-delayed feedback on the existence of this intermittent dynamics.

  2. Plasmonic nanopatch array for optical integrated circuit applications.

    Science.gov (United States)

    Qu, Shi-Wei; Nie, Zai-Ping

    2013-11-08

    Future plasmonic integrated circuits with the capability of extremely high-speed data processing at optical frequencies will be dominated by the efficient optical emission (excitation) from (of) plasmonic waveguides. Towards this goal, plasmonic nanoantennas, currently a hot topic in the field of plasmonics, have potential to bridge the mismatch between the wave vector of free-space photonics and that of the guided plasmonics. To manipulate light at will, plasmonic nanoantenna arrays will definitely be more efficient than isolated nanoantennas. In this article, the concepts of microwave antenna arrays are applied to efficiently convert plasmonic waves in the plasmonic waveguides into free-space optical waves or vice versa. The proposed plasmonic nanoantenna array, with nanopatch antennas and a coupled wedge plasmon waveguide, can also act as an efficient spectrometer to project different wavelengths into different directions, or as a spatial filter to absorb a specific wavelength at a specified incident angle.

  3. Monolithic microwave integrated circuit devices for active array antennas

    Science.gov (United States)

    Mittra, R.

    1984-01-01

    Two different aspects of active antenna array design were investigated. The transition between monolithic microwave integrated circuits and rectangular waveguides was studied along with crosstalk in multiconductor transmission lines. The boundary value problem associated with a discontinuity in a microstrip line is formulated. This entailed, as a first step, the derivation of the propagating as well as evanescent modes of a microstrip line. The solution is derived to a simple discontinuity problem: change in width of the center strip. As for the multiconductor transmission line problem. A computer algorithm was developed for computing the crosstalk noise from the signal to the sense lines. The computation is based on the assumption that these lines are terminated in passive loads.

  4. Two multichannel integrated circuits for neural recording and signal processing.

    Science.gov (United States)

    Obeid, Iyad; Morizio, James C; Moxon, Karen A; Nicolelis, Miguel A L; Wolf, Patrick D

    2003-02-01

    We have developed, manufactured, and tested two analog CMOS integrated circuit "neurochips" for recording from arrays of densely packed neural electrodes. Device A is a 16-channel buffer consisting of parallel noninverting amplifiers with a gain of 2 V/V. Device B is a 16-channel two-stage analog signal processor with differential amplification and high-pass filtering. It features selectable gains of 250 and 500 V/V as well as reference channel selection. The resulting amplifiers on Device A had a mean gain of 1.99 V/V with an equivalent input noise of 10 microV(rms). Those on Device B had mean gains of 53.4 and 47.4 dB with a high-pass filter pole at 211 Hz and an equivalent input noise of 4.4 microV(rms). Both devices were tested in vivo with electrode arrays implanted in the somatosensory cortex.

  5. Wireless neural recording with single low-power integrated circuit.

    Science.gov (United States)

    Harrison, Reid R; Kier, Ryan J; Chestek, Cynthia A; Gilja, Vikash; Nuyujukian, Paul; Ryu, Stephen; Greger, Bradley; Solzbacher, Florian; Shenoy, Krishna V

    2009-08-01

    We present benchtop and in vivo experimental results from an integrated circuit designed for wireless implantable neural recording applications. The chip, which was fabricated in a commercially available 0.6- mum 2P3M BiCMOS process, contains 100 amplifiers, a 10-bit analog-to-digital converter (ADC), 100 threshold-based spike detectors, and a 902-928 MHz frequency-shift-keying (FSK) transmitter. Neural signals from a selected amplifier are sampled by the ADC at 15.7 kSps and telemetered over the FSK wireless data link. Power, clock, and command signals are sent to the chip wirelessly over a 2.765-MHz inductive (coil-to-coil) link. The chip is capable of operating with only two off-chip components: a power/command receiving coil and a 100-nF capacitor.

  6. Neural Circuit to Integrate Opposing Motions in the Visual Field.

    Science.gov (United States)

    Mauss, Alex S; Pankova, Katarina; Arenz, Alexander; Nern, Aljoscha; Rubin, Gerald M; Borst, Alexander

    2015-07-16

    When navigating in their environment, animals use visual motion cues as feedback signals that are elicited by their own motion. Such signals are provided by wide-field neurons sampling motion directions at multiple image points as the animal maneuvers. Each one of these neurons responds selectively to a specific optic flow-field representing the spatial distribution of motion vectors on the retina. Here, we describe the discovery of a group of local, inhibitory interneurons in the fruit fly Drosophila key for filtering these cues. Using anatomy, molecular characterization, activity manipulation, and physiological recordings, we demonstrate that these interneurons convey direction-selective inhibition to wide-field neurons with opposite preferred direction and provide evidence for how their connectivity enables the computation required for integrating opposing motions. Our results indicate that, rather than sharpening directional selectivity per se, these circuit elements reduce noise by eliminating non-specific responses to complex visual information. Copyright © 2015 Elsevier Inc. All rights reserved.

  7. Networked Social Reproduction: Crises in the Integrated Circuit

    Directory of Open Access Journals (Sweden)

    Elise Danielle Thorburn

    2016-07-01

    Full Text Available This paper argues that the means of communication are sites for, and aspects of, social reproduction. In contemporary capitalism, motivated as it is by new, networked digital technologies, social reproduction is increasingly virtualised through the means of communication. Although recent political struggles have demonstrated how networked technologies can liberate social reproduction from the profit motive and from commodifying impulses, the tendency is to invoke and accelerate socially reproductive crises—crises in the capacity to reproduce ourselves both daily and intergenerationally. These crises have psychic and corporeal impacts, and intensify Tronti’s “social factory” thesis of capital’s technical composition. In order to develop modes and means of liberatory communication in the integrated circuit it is necessary to untangle and chart both the pathways and outcomes of the crises networked social reproduction invokes.

  8. Design and testing of integrated circuits for reactor protection channels

    International Nuclear Information System (INIS)

    Battle, R.E.; Vandermolen, R.I.; Jagadish, U.; Swail, B.K.; Naser, J.

    1995-01-01

    Custom and semicustom application-specific integrated circuit design and testing methods are investigated for use in research and commercial nuclear reactor safety systems. The Electric Power Research Institute and Oak Ridge National Laboratory are working together through a cooperative research and development agreement to apply modern technology to a nuclear reactor protection system. The purpose of this project is to demonstrate to the nuclear industry an alternative approach for new or upgrade reactor protection and safety system signal processing and voting logic. Motivation for this project stems from (1) the difficulty of proving that software-based protection systems are adequately reliable, (2) the obsolescence of the original equipment, and (3) the improved performance of digital processing. A demonstration model for protection system of PWR reactor has been designed and built

  9. Enabling the Internet of Things from integrated circuits to integrated systems

    CERN Document Server

    2017-01-01

    This book offers the first comprehensive view on integrated circuit and system design for the Internet of Things (IoT), and in particular for the tiny nodes at its edge. The authors provide a fresh perspective on how the IoT will evolve based on recent and foreseeable trends in the semiconductor industry, highlighting the key challenges, as well as the opportunities for circuit and system innovation to address them. This book describes what the IoT really means from the design point of view, and how the constraints imposed by applications translate into integrated circuit requirements and design guidelines. Chapter contributions equally come from industry and academia. After providing a system perspective on IoT nodes, this book focuses on state-of-the-art design techniques for IoT applications, encompassing the fundamental sub-systems encountered in Systems on Chip for IoT: ultra-low power digital architectures and circuits low- and zero-leakage memories (including emerging technologies) circuits for hardwar...

  10. Leaky Integrate-and-Fire Neuron Circuit Based on Floating-Gate Integrator

    Science.gov (United States)

    Kornijcuk, Vladimir; Lim, Hyungkwang; Seok, Jun Yeong; Kim, Guhyun; Kim, Seong Keun; Kim, Inho; Choi, Byung Joon; Jeong, Doo Seok

    2016-01-01

    The artificial spiking neural network (SNN) is promising and has been brought to the notice of the theoretical neuroscience and neuromorphic engineering research communities. In this light, we propose a new type of artificial spiking neuron based on leaky integrate-and-fire (LIF) behavior. A distinctive feature of the proposed FG-LIF neuron is the use of a floating-gate (FG) integrator rather than a capacitor-based one. The relaxation time of the charge on the FG relies mainly on the tunnel barrier profile, e.g., barrier height and thickness (rather than the area). This opens up the possibility of large-scale integration of neurons. The circuit simulation results offered biologically plausible spiking activity (circuit was subject to possible types of noise, e.g., thermal noise and burst noise. The simulation results indicated remarkable distributional features of interspike intervals that are fitted to Gamma distribution functions, similar to biological neurons in the neocortex. PMID:27242416

  11. Intelligent switches of integrated lightwave circuits with core telecommunication functions

    Science.gov (United States)

    Izhaky, Nahum; Duer, Reuven; Berns, Neil; Tal, Eran; Vinikman, Shirly; Schoenwald, Jeffrey S.; Shani, Yosi

    2001-05-01

    We present a brief overview of a promising switching technology based on Silica on Silicon thermo-optic integrated circuits. This is basically a 2D solid-state optical device capable of non-blocking switching operation. Except of its excellent performance (insertion lossvariable output power control (attenuation), for instance, to equalize signal levels and compensate for unbalanced different optical input powers, or to equalize unbalanced EDFA gain curve. We examine the market segments appropriate for the switch size and technology, followed by a discussion of the basic features of the technology. The discussion is focused on important requirements from the switch and the technology (e.g., insertion loss, power consumption, channel isolation, extinction ratio, switching time, and heat dissipation). The mechanical design is also considered. It must take into account integration of optical fiber, optical planar wafer, analog electronics and digital microprocessor controls, embedded software, and heating power dissipation. The Lynx Photon.8x8 switch is compared to competing technologies, in terms of typical market performance requirements.

  12. Effects of total dose of ionizing radiation on integrated circuits

    Energy Technology Data Exchange (ETDEWEB)

    Silveira, Marcilei A.G.; Cirne, K.H.; Gimenez, S.; Santos, R.B.B. [Centro Universitario da FEI, Sao Bernardo do Campo, SP (Brazil); Added, N.; Barbosa, M.D.L.; Medina, N.H.; Tabacniks, M.H. [Universidade de Sao Paulo (IF/USP), SP (Brazil). Inst. de Fisica; Lima, J.A. de; Seixas Junior, L.E.; Melo, W. [Centro de Tecnologia da Informacao Paulo Archer, Sao Paulo, SP (Brazil)

    2011-07-01

    Full text: The study of ionizing radiation effects on materials used in electronic devices is of great relevance for the progress of global technological development and, particularly, it is a necessity in some strategic areas in Brazil. Electronic circuits are strongly influenced by radiation and the need for IC's featuring radiation hardness is largely growing to meet the stringent environment in space electronics. On the other hand, aerospace agencies are encouraging both scientific community and semiconductors industry to develop hardened-by-design components using standard manufacturing processes to achieve maximum performance, while significantly reducing costs. To understand the physical phenomena responsible for changes in devices exposed to ionizing radiation several kinds of radiation should then be considered, among them alpha particles, protons, gamma and X-rays. Radiation effects on the integrated circuits are usually divided into two categories: total ionizing dose (TID), a cumulative dose that shifts the threshold voltage and increases transistor's off-state current; single events effects (SEE), a transient effect which can deposit charge directly into the device and disturb the properties of electronic circuits. TID is one of the most common effects and may generate degradation in some parameters of the CMOS electronic devices, such as the threshold voltage oscillation, increase of the sub-threshold slope and increase of the off-state current. The effects of ionizing radiation are the creation of electron-hole pairs in the oxide layer changing operation mode parameters of the electronic device. Indirectly, there will be also changes in the device due to the formation of secondary electrons from the interaction of electromagnetic radiation with the material, since the charge carriers can be trapped both in the oxide layer and in the interface with the oxide. In this work we have investigated the behavior of MOSFET devices fabricated with

  13. Focused ion beam damage to MOS integrated circuits

    International Nuclear Information System (INIS)

    Fleetwood, D.M.; Campbell, Ann N.; Hembree, Charles E.; Tangyunyong, Paiboon; Jessing, Jeffrey R.; Soden, Jerry M.

    2000-01-01

    Commercial focused ion beam (FIB) systems are commonly used to image integrated circuits (ICS) after device processing, especially in failure analysis applications. FIB systems are also often employed to repair faults in metal lines for otherwise functioning ICS, and are being evaluated for applications in film deposition and nanofabrication. A problem that is often seen in FIB imaging and repair is that ICS can be damaged during the exposure process. This can result in degraded response or out-right circuit failure. Because FIB processes typically require the surface of an IC to be exposed to an intense beam of 30--50 keV Ga + ions, both charging and secondary radiation damage are potential concerns. In previous studies, both types of effects have been suggested as possible causes of device degradation, depending on the type of device examined and/or the bias conditions. Understanding the causes of this damage is important for ICS that are imaged or repaired by a FIB between manufacture and operation, since the performance and reliability of a given IC is otherwise at risk in subsequent system application. In this summary, the authors discuss the relative roles of radiation damage and charging effects during FIB imaging. Data from exposures of packaged parts under controlled bias indicate the possibility for secondary radiation damage during FIB exposure. On the other hand, FIB exposure of unbiased wafers (a more common application) typically results in damage caused by high-voltage stress or electrostatic discharge. Implications for FIB exposure and subsequent IC use are discussed

  14. An optoelectronic integrated device including a laser and its driving circuit

    Energy Technology Data Exchange (ETDEWEB)

    Matsueda, H.; Nakano, H.; Tanaka, T.P.

    1984-10-01

    A monolithic optoelectronic integrated circuit (OEIC) including a laser diode, photomonitor and driving and detecting circuits has been fabricated on a semi-insulating GaAs substrate. The OEIC has a horizontal integrating structure which is suitable for realising high-density multifunctional devices. The fabricating process and the static and dynamic characteristics of the optical and electronic elements are described. The preliminary results of the co-operative operation of the laser and its driving circuit are also presented.

  15. Enhancing LVRT of DFIG by Using a Superconducting Current Limiter on Rotor Circuit

    Directory of Open Access Journals (Sweden)

    Flávio Oliveira

    2015-12-01

    Full Text Available This paper have studied the dynamic of a 2.0 MW Doubly Fed Induction Generator (DFIG during a severe voltage sag. Using the dynamic model of a DFIG, it was possible to determine the current, Electromagnetic Force and flux behavior during three-phase symmetrical voltage dip. Among the technologies of wind turbines the DFIG is widely employed; however, this machine is extremely susceptible to disturbances from the grid. In order to improve DFIG Low Voltage Ride-Through (LVRT, it is proposed a novel solution, using Superconducting Current Limiter (SCL in two arrangements: one, the SCL is placed between the machine rotor and the rotor side converter (RSC, and another placed in the RSC DC-link. The proposal is validated through simulation using PSCAD™/EMTDC™ and according to requirements of specific regulations. The analysis ensure that both SCL arrangements behave likewise, and are effective in decrement the rotor currents during the disturbance.

  16. Hidden Correlations in Indivisible Qudits as a Resource for Quantum Technologies on Examples of Superconducting Circuits

    International Nuclear Information System (INIS)

    Man'ko, M A; Man'ko, V I

    2016-01-01

    We show that the density-matrix states of noncomposite qudit systems satisfy entropic and information relations like the subadditivity condition, strong subadditivity condition, and Araki-Lieb inequality, which characterize hidden quantum correlations of observables associated with these indivisible systems. We derive these relations employing a specific map of the entropic inequalities known for density matrices of multiqudit systems to the inequalities for density matrices of single-qudit systems. We present the obtained relations in the form of mathematical inequalities for arbitrary Hermitian N × N-matrices. We consider examples of superconducting qubits and qudits. We discuss the hidden correlations in single- qudit states as a new resource for quantum technologies analogous to the known resource in correlations associated with the entanglement in multiqudit systems. (paper)

  17. Two-qubit gate operations in superconducting circuits with strong coupling and weak anharmonicity

    International Nuclear Information System (INIS)

    Lü Xinyou; Ashhab, S; Cui Wei; Wu Rebing; Nori, Franco

    2012-01-01

    We theoretically study the implementation of two-qubit gates in a system of two coupled superconducting qubits. In particular, we analyze two-qubit gate operations under the condition that the coupling strength is comparable with or even larger than the anharmonicity of the qubits. By numerically solving the time-dependent Schrödinger equation under the assumption of negligible decoherence, we obtain the dependence of the two-qubit gate fidelity on the system parameters in the case of both direct and indirect qubit-qubit coupling. Our numerical results can be used to identify the ‘safe’ parameter regime for experimentally implementing two-qubit gates with high fidelity in these systems. (paper)

  18. Development of wide range charge integration application specified integrated circuit for photo-sensor

    Energy Technology Data Exchange (ETDEWEB)

    Katayose, Yusaku, E-mail: katayose@ynu.ac.jp [Department of Physics, Yokohama National University, 79-5 Tokiwadai, Hodogaya-ku, Yokohama, Kanagawa 240-8501 (Japan); Ikeda, Hirokazu [Institute of Space and Astronautical Science (ISAS)/Japan Aerospace Exploration Agency (JAXA), 3-1-1 Yoshinodai, Chuo-ku, Sagamihara, Kanagawa 252-5210 (Japan); Tanaka, Manobu [National Laboratory for High Energy Physics, KEK, 1-1 Oho, Tsukuba, Ibaraki 305-0801 (Japan); Shibata, Makio [Department of Physics, Yokohama National University, 79-5 Tokiwadai, Hodogaya-ku, Yokohama, Kanagawa 240-8501 (Japan)

    2013-01-21

    A front-end application specified integrated circuit (ASIC) is developed with a wide dynamic range amplifier (WDAMP) to read-out signals from a photo-sensor like a photodiode. The WDAMP ASIC consists of a charge sensitive preamplifier, four wave-shaping circuits with different amplification factors and Wilkinson-type analog-to-digital converter (ADC). To realize a wider range, the integrating capacitor in the preamplifier can be changed from 4 pF to 16 pF by a two-bit switch. The output of a preamplifier is shared by the four wave-shaping circuits with four gains of 1, 4, 16 and 64 to adapt the input range of ADC. A 0.25-μm CMOS process (of UMC electronics CO., LTD) is used to fabricate the ASIC with four-channels. The dynamic range of four orders of magnitude is achieved with the maximum range over 20 pC and the noise performance of 0.46 fC + 6.4×10{sup −4} fC/pF. -- Highlights: ► A front-end ASIC is developed with a wide dynamic range amplifier. ► The ASIC consists of a CSA, four wave-shaping circuits and pulse-height-to-time converters. ► The dynamic range of four orders of magnitude is achieved with the maximum range over 20 pC.

  19. Monolithic Microwave Integrated Circuits Based on GaAs Mesfet Technology

    Science.gov (United States)

    Bahl, Inder J.

    Advanced military microwave systems are demanding increased integration, reliability, radiation hardness, compact size and lower cost when produced in large volume, whereas the microwave commercial market, including wireless communications, mandates low cost circuits. Monolithic Microwave Integrated Circuit (MMIC) technology provides an economically viable approach to meeting these needs. In this paper the design considerations for several types of MMICs and their performance status are presented. Multifunction integrated circuits that advance the MMIC technology are described, including integrated microwave/digital functions and a highly integrated transceiver at C-band.

  20. Superconductivity

    Energy Technology Data Exchange (ETDEWEB)

    Batistoni, Paola; De Marco, Francesco; Pieroni, Leonardo [ed.

    2005-07-01

    Research on superconductivity at ENEA is mainly devoted to projects related to the ITER magnet system. In this framework, ENEA has been strongly involved in the design, manufacturing and test campaigns of the ITER toroidal field model coil (TFMC), which reached a world record in operating current (up to 80 kA). Further to this result, the activities in 2004 were devoted to optimising the ITER conductor performance. ENEA participated in the tasks launched by EFDA to define and produce industrial-scale advanced Nb3Sn strand to be used in manufacturing the ITER high-field central solenoid (CS) and toroidal field (TF) magnets. As well as contributing to the design of the new strand and the final conductor layout, ENEA will also perform characterisation tests, addressing in particular the influence of mechanical stress on the Nb3Sn performance. As a member of the international ITER-magnet testing group, ENEA plays a central role in the measurement campaigns and data analyses for each ITER-related conductor and coil. The next phase in the R and D of the ITER magnets will be their mechanical characterisation in order to define the fabrication route of the coils and structures. During 2004 the cryogenic measurement campaign on the Large Hadron Collider (LHC) by-pass diode stacks was completed. As the diode-test activity was the only LHC contract to be finished on schedule, the 'Centre Europeenne pour la Recherche Nucleaire' (CERN) asked ENEA to participate in an international tender for the cold check of the current leads for the LHC magnets. The contract was obtained, and during 2004, the experimental setup was designed and realised and the data acquisition system was developed. The measurement campaign was successfully started at the end of 2004 and will be completed in 2006.

  1. 77 FR 25747 - Certain Semiconductor Integrated Circuit Devices and Products Containing Same; Institution of...

    Science.gov (United States)

    2012-05-01

    ... INTERNATIONAL TRADE COMMISSION [Inv. No. 337-TA-840] Certain Semiconductor Integrated Circuit... States after importation of certain semiconductor integrated circuit devices and products containing same... No. 6,847,904 (``the '904 patent''). The complaint further alleges that an industry in the United...

  2. Experimental Demonstration of 7 Tb/s Switching Using Novel Silicon Photonic Integrated Circuit

    DEFF Research Database (Denmark)

    Ding, Yunhong; Kamchevska, Valerija; Dalgaard, Kjeld

    2016-01-01

    We demonstrate BER performance <10^-9 for a 1 Tb/s/core transmission over 7-core fiber and SDM switching using a novel silicon photonic integrated circuit composed of a 7x7 fiber switch and low loss SDM couplers.......We demonstrate BER performance integrated circuit composed of a 7x7 fiber switch and low loss SDM couplers....

  3. Integrated circuits with emitter coupling and their application in nanosecond nuclear electronics

    International Nuclear Information System (INIS)

    Basiladze, S.G.

    1976-01-01

    Principal static and dynamic characteristics are considered of integrated circuits with emitter coupling, as well as problems of signal transmission. Diagrams are given of amplifiers, discriminators, time interval drivers, generators, etc. Systems and units of nanosecond electronics employing integrated circuits with emitter coupling are briefly described

  4. Integrated all optical transmodulator circuits with non-linear gain elements and tunable optical fibers

    NARCIS (Netherlands)

    Kuindersma, P.I.; Leijtens, X.J.M.; Zantvoort, van J.H.C.; Waardt, de H.

    2012-01-01

    We characterize integrated InP circuits for high speed ‘all-optical’ signal processing. Single chip circuits act as optical transistors. Transmodulation is performed by non-linear gain sections. Integrated tunable filters give signal equalization in time domain.

  5. Speech recognition by means of a three-integrated-circuit set

    Energy Technology Data Exchange (ETDEWEB)

    Zoicas, A.

    1983-11-03

    The author uses pattern recognition methods for detecting word boundaries, and monitors incoming speech at 12 millisecond intervals. Frequency is divided into eight bands and analysis is achieved in an analogue interface integrated circuit, a pipeline digital processor and a control integrated circuit. Applications are suggested, including speech input to personal computers. 3 references.

  6. Short circuit detection in the winding and operation of superconducting magnets

    International Nuclear Information System (INIS)

    Walstrom, P.L.

    1982-01-01

    Three categories of shorts will be discussed: (1) shorts to the metallic bobbin or other structural elements, (2) shorts between turns caused by instrumentation wires that are deliberately connected to a turn at the end (e.g., voltage taps) and that short out to another turn but are not completely severed in the process, and (3) short circuits between turns caused by direct contact due to insulation failure by chips of metal bridging turns and by instrumentation wires that bridge turns but are severed in the process of shorting

  7. Design structure for in-system redundant array repair in integrated circuits

    Science.gov (United States)

    Bright, Arthur A.; Crumley, Paul G.; Dombrowa, Marc; Douskey, Steven M.; Haring, Rudolf A.; Oakland, Steven F.; Quellette, Michael R.; Strissel, Scott A.

    2008-11-25

    A design structure for repairing an integrated circuit during operation of the integrated circuit. The integrated circuit comprising of a multitude of memory arrays and a fuse box holding control data for controlling redundancy logic of the arrays. The design structure provides the integrated circuit with a control data selector for passing the control data from the fuse box to the memory arrays; providing a source of alternate control data, external of the integrated circuit; and connecting the source of alternate control data to the control data selector. The design structure further passes the alternate control data from the source thereof, through the control data selector and to the memory arrays to control the redundancy logic of the memory arrays.

  8. Wireless Amperometric Neurochemical Monitoring Using an Integrated Telemetry Circuit

    Science.gov (United States)

    Roham, Masoud; Halpern, Jeffrey M.; Martin, Heidi B.; Chiel, Hillel J.

    2015-01-01

    An integrated circuit for wireless real-time monitoring of neurochemical activity in the nervous system is described. The chip is capable of conducting high-resolution amperometric measurements in four settings of the input current. The chip architecture includes a first-order ΔΣ modulator (ΔΣM) and a frequency-shift-keyed (FSK) voltage-controlled oscillator (VCO) operating near 433 MHz. It is fabricated using the AMI 0.5 μm double-poly triple-metal n-well CMOS process, and requires only one off-chip component for operation. Measured dc current resolutions of ~250 fA, ~1.5 pA, ~4.5 pA, and ~17 pA were achieved for input currents in the range of ±5, ±37, ±150, and ±600 nA, respectively. The chip has been interfaced with a diamond-coated, quartz-insulated, microneedle, tungsten electrode, and successfully recorded dopamine concentration levels as low as 0.5 μM wirelessly over a transmission distance of ~0.5 m in flow injection analysis experiments. PMID:18990633

  9. GaAs integrated circuits and heterojunction devices

    Science.gov (United States)

    Fowlis, Colin

    1986-06-01

    The state of the art of GaAs technology in the U.S. as it applies to digital and analog integrated circuits is examined. In a market projection, it is noted that whereas analog ICs now largely dominate the market, in 1994 they will amount to only 39 percent vs. 57 percent for digital ICs. The military segment of the market will remain the largest (42 percent in 1994 vs. 70 percent today). ICs using depletion-mode-only FETs can be constructed in various forms, the closest to production being BFL or buffered FET logic. Schottky diode FET logic - a lower power approach - can reach higher complexities and strong efforts are being made in this direction. Enhancement type devices appear essential to reach LSI and VLSI complexity, but process control is still very difficult; strong efforts are under way, both in the U.S. and in Japan. Heterojunction devices appear very promising, although structures are fairly complex, and special fabrication techniques, such as molecular beam epitaxy and MOCVD, are necessary. High-electron-mobility-transistor (HEMT) devices show significant performance advantages over MESFETs at low temperatures. Initial results of heterojunction bipolar transistor devices show promise for high speed A/D converter applications.

  10. Latch-up control in CMOS integrated circuits

    International Nuclear Information System (INIS)

    Ochoa, A.; Dawes, W.; Estreich, D.; Packard, H.

    1979-01-01

    The potential for latch-up, a pnpn self-sustaining low impedance state, is inherent in standard bulk CMOS-integrated circuit structures. Under normal bias, the parasitic SCR is in its blocking state but, if subjected to a large voltage spike or if exposed to an ionizing environment, triggering may occur. This may result in device burn-out or loss of state. The problem has been extensively studied for space and weapons applications. Prevention of latch-up has been achieved in conservative design (approx. 9 μm p-well depths) by the use of minority lifetime control methods such as gold doping and neutron irradiation and by modifying the base transport factor with buried layers. The push toward VLSI densities will enhance parasitic action sufficiently so that the problem will become of more universal concern. The paper will surveys latch-up control methods presently employed for weapons and space applications on present (approx. 9 μm p-well) CMOS and indicates the extent of their applicability to VLSI designs

  11. Integrated circuits and electrode interfaces for noninvasive physiological monitoring.

    Science.gov (United States)

    Ha, Sohmyung; Kim, Chul; Chi, Yu M; Akinin, Abraham; Maier, Christoph; Ueno, Akinori; Cauwenberghs, Gert

    2014-05-01

    This paper presents an overview of the fundamentals and state of the-art in noninvasive physiological monitoring instrumentation with a focus on electrode and optrode interfaces to the body, and micropower-integrated circuit design for unobtrusive wearable applications. Since the electrode/optrode-body interface is a performance limiting factor in noninvasive monitoring systems, practical interface configurations are offered for biopotential acquisition, electrode-tissue impedance measurement, and optical biosignal sensing. A systematic approach to instrumentation amplifier (IA) design using CMOS transistors operating in weak inversion is shown to offer high energy and noise efficiency. Practical methodologies to obviate 1/f noise, counteract electrode offset drift, improve common-mode rejection ratio, and obtain subhertz high-pass cutoff are illustrated with a survey of the state-of-the-art IAs. Furthermore, fundamental principles and state-of-the-art technologies for electrode-tissue impedance measurement, photoplethysmography, functional near-infrared spectroscopy, and signal coding and quantization are reviewed, with additional guidelines for overall power management including wireless transmission. Examples are presented of practical dry-contact and noncontact cardiac, respiratory, muscle and brain monitoring systems, and their clinical applications.

  12. Graphene-on-silicon hybrid plasmonic-photonic integrated circuits.

    Science.gov (United States)

    Xiao, Ting-Hui; Cheng, Zhenzhou; Goda, Keisuke

    2017-06-16

    Graphene surface plasmons (GSPs) have shown great potential in biochemical sensing, thermal imaging, and optoelectronics. To excite GSPs, several methods based on the near-field optical microscope and graphene nanostructures have been developed in the past few years. However, these methods suffer from their bulky setups and low GSP-excitation efficiency due to the short interaction length between free-space vertical excitation light and the atomic layer of graphene. Here we present a CMOS-compatible design of graphene-on-silicon hybrid plasmonic-photonic integrated circuits that achieve the in-plane excitation of GSP polaritons as well as localized surface plasmon (SP) resonance. By employing a suspended membrane slot waveguide, our design is able to excite GSP polaritons on a chip. Moreover, by utilizing a graphene nanoribbon array, we engineer the transmission spectrum of the waveguide by excitation of localized SP resonance. Our theoretical and computational study paves a new avenue to enable, modulate, and monitor GSPs on a chip, potentially applicable for the development of on-chip electro-optic devices.

  13. In situ high-resolution thermal microscopy on integrated circuits.

    Science.gov (United States)

    Zhuo, Guan-Yu; Su, Hai-Ching; Wang, Hsien-Yi; Chan, Ming-Che

    2017-09-04

    The miniaturization of metal tracks in integrated circuits (ICs) can cause abnormal heat dissipation, resulting in electrostatic discharge, overvoltage breakdown, and other unwanted issues. Unfortunately, locating areas of abnormal heat dissipation is limited either by the spatial resolution or imaging acquisition speed of current thermal analytical techniques. A rapid, non-contact approach to the thermal imaging of ICs with sub-μm resolution could help to alleviate this issue. In this work, based on the intensity of the temperature-dependent two-photon fluorescence (TPF) of Rhodamine 6G (R6G) material, we developed a novel fast and non-invasive thermal microscopy with a sub-μm resolution. Its application to the location of hotspots that may evolve into thermally induced defects in ICs was also demonstrated. To the best of our knowledge, this is the first study to present high-resolution 2D thermal microscopic images of ICs, showing the generation, propagation, and distribution of heat during its operation. According to the demonstrated results, this scheme has considerable potential for future in situ hotspot analysis during the optimization stage of IC development.

  14. Experimental demonstration of interferometric imaging using photonic integrated circuits.

    Science.gov (United States)

    Su, Tiehui; Scott, Ryan P; Ogden, Chad; Thurman, Samuel T; Kendrick, Richard L; Duncan, Alan; Yu, Runxiang; Yoo, S J B

    2017-05-29

    This paper reports design, fabrication, and demonstration of a silica photonic integrated circuit (PIC) capable of conducting interferometric imaging with multiple baselines around λ = 1550 nm. The PIC consists of four sets of five waveguides (total of twenty waveguides), each leading to a three-band spectrometer (total of sixty waveguides), after which a tunable Mach-Zehnder interferometer (MZI) constructs interferograms from each pair of the waveguides. A total of thirty sets of interferograms (ten pairs of three spectral bands) is collected by the detector array at the output of the PIC. The optical path difference (OPD) of each interferometer baseline is kept to within 1 µm to maximize the visibility of the interference measurement. We constructed an experiment to utilize the two baselines for complex visibility measurement on a point source and a variable width slit. We used the point source to demonstrate near unity value of the PIC instrumental visibility, and used the variable slit to demonstrate visibility measurement for a simple extended object. The experimental result demonstrates the visibility of baseline 5 and 20 mm for a slit width of 0 to 500 µm in good agreement with theoretical predictions.

  15. Microcoil Spring Interconnects for Ceramic Grid Array Integrated Circuits

    Science.gov (United States)

    Strickland, S. M.; Hester, J. D.; Gowan, A. K.; Montgomery, R. K.; Geist, D. L.; Blanche, J. F.; McGuire, G. D.; Nash, T. S.

    2011-01-01

    As integrated circuit miniaturization trends continue, they drive the need for smaller higher input/output (I/O) packages. Hermetically sealed ceramic area array parts are the package of choice by the space community for high reliability space flight electronic hardware. Unfortunately, the coefficient of thermal expansion mismatch between the ceramic area array package and the epoxy glass printed wiring board limits the life of the interconnecting solder joint. This work presents the results of an investigation by Marshall Space Flight Center into a method to increase the life of this second level interconnection by the use of compliant microcoil springs. The design of the spring and its attachment process are presented along with thermal cycling results of microcoil springs (MCS) compared with state-of-the-art ball and column interconnections. Vibration testing has been conducted on MCS and high lead column parts. Radio frequency simulation and measurements have been made and the MCS has been modeled and a stress analysis performed. Thermal cycling and vibration testing have shown MCS interconnects to be significantly more reliable than solder columns. Also, MCS interconnects are less prone to handling damage than solder columns. Future work that includes shock testing, incorporation into a digital signal processor board, and process evaluation of expansion from a 400 I/O device to a device with over 1,100 I/O is identified.

  16. Tomography of integrated circuit interconnect with an electromigration void

    Energy Technology Data Exchange (ETDEWEB)

    Levine, Zachary H. [National Institute of Standards and Technology, Gaithersburg, Maryland 20899-8410 (United States); Rensselaer Polytechnic Institute, Troy, New York 12180-3590 (United States); Kalukin, Andrew R. [National Institute of Standards and Technology, Gaithersburg, Maryland 20899-8410 (United States); Kuhn, Markus [Intel Corporation RA1-329, 5200 Northeast Elam Young Parkway, Hillsboro, Oregon 74124 (United States); Frigo, Sean P. [Advanced Photon Source, Argonne National Laboratory, 9700 South Cass Avenue, Argonne, Illinois 60439 (United States); McNulty, Ian [Advanced Photon Source, Argonne National Laboratory, 9700 South Cass Avenue, Argonne, Illinois 60439 (United States); Retsch, Cornelia C. [Advanced Photon Source, Argonne National Laboratory, 9700 South Cass Avenue, Argonne, Illinois 60439 (United States); Wang, Yuxin [Advanced Photon Source, Argonne National Laboratory, 9700 South Cass Avenue, Argonne, Illinois 60439 (United States); Arp, Uwe [National Institute of Standards and Technology, Gaithersburg, Maryland 20899-8410 (United States); Lucatorto, Thomas B. [National Institute of Standards and Technology, Gaithersburg, Maryland 20899-8410 (United States); Ravel, Bruce D. [National Institute of Standards and Technology, Gaithersburg, Maryland 20899-8410 (United States)] (and others)

    2000-05-01

    An integrated circuit interconnect was subject to accelerated-life test conditions to induce an electromigration void. The silicon substrate was removed, leaving only the interconnect test structure encased in silica. We imaged the sample with 1750 eV photons using the 2-ID-B scanning transmission x-ray microscope at the Advanced Photon Source, a third-generation synchrotron facility. Fourteen views through the sample were obtained over a 170 degree sign range of angles (with a 40 degree sign gap) about a single rotation axis. Two sampled regions were selected for three-dimensional reconstruction: one of the ragged end of a wire depleted by the void, the other of the adjacent interlevel connection (or ''via''). We applied two reconstruction techniques: the simultaneous iterative reconstruction technique and a Bayesian reconstruction technique, the generalized Gaussian Markov random field method. The stated uncertainties are total, with one standard deviation, which resolved the sample to 200{+-}70 and 140{+-}30 nm, respectively. The tungsten via is distinguished from the aluminum wire by higher absorption. Within the void, the aluminum is entirely depleted from under the tungsten via. The reconstructed data show the applicability of this technique to three-dimensional imaging of buried defects in submicrometer structures relevant to the microelectronics industry. (c) 2000 American Institute of Physics.

  17. Neural Networks Integrated Circuit for Biomimetics MEMS Microrobot

    Directory of Open Access Journals (Sweden)

    Ken Saito

    2014-06-01

    Full Text Available In this paper, we will propose the neural networks integrated circuit (NNIC which is the driving waveform generator of the 4.0, 2.7, 2.5 mm, width, length, height in size biomimetics microelectromechanical systems (MEMS microrobot. The microrobot was made from silicon wafer fabricated by micro fabrication technology. The mechanical system of the robot was equipped with small size rotary type actuators, link mechanisms and six legs to realize the ant-like switching behavior. The NNIC generates the driving waveform using synchronization phenomena such as biological neural networks. The driving waveform can operate the actuators of the MEMS microrobot directly. Therefore, the NNIC bare chip realizes the robot control without using any software programs or A/D converters. The microrobot performed forward and backward locomotion, and also changes direction by inputting an external single trigger pulse. The locomotion speed of the microrobot was 26.4 mm/min when the step width was 0.88 mm. The power consumption of the system was 250 mWh when the room temperature was 298 K.

  18. High Voltage Dielectrophoretic and Magnetophoretic Hybrid Integrated Circuit / Microfluidic Chip

    Science.gov (United States)

    Issadore, David; Franke, Thomas; Brown, Keith A.; Hunt, Thomas P.; Westervelt, Robert M.

    2010-01-01

    A hybrid integrated circuit (IC) / microfluidic chip is presented that independently and simultaneously traps and moves microscopic objects suspended in fluid using both electric and magnetic fields. This hybrid chip controls the location of dielectric objects, such as living cells and drops of fluid, on a 60 × 61 array of pixels that are 30 × 38 μm2 in size, each of which can be individually addressed with a 50 V peak-to-peak, DC to 10 MHz radio frequency voltage. These high voltage pixels produce electric fields above the chip’s surface with a magnitude , resulting in strong dielectrophoresis (DEP) forces . Underneath the array of DEP pixels there is a magnetic matrix that consists of two perpendicular sets of 60 metal wires running across the chip. Each wire can be sourced with 120 mA to trap and move magnetically susceptible objects using magnetophoresis (MP). The DEP pixel array and magnetic matrix can be used simultaneously to apply forces to microscopic objects, such as living cells or lipid vesicles, that are tagged with magnetic nanoparticles. The capabilities of the hybrid IC / microfluidic chip demonstrated in this paper provide important building blocks for a platform for biological and chemical applications. PMID:20625468

  19. Mathematical model of an integrated circuit cooling through cylindrical rods

    Directory of Open Access Journals (Sweden)

    Beltrán-Prieto Luis Antonio

    2017-01-01

    Full Text Available One of the main challenges in integrated circuits development is to propose alternatives to handle the extreme heat generated by high frequency of electrons moving in a reduced space that cause overheating and reduce the lifespan of the device. The use of cooling fins offers an alternative to enhance the heat transfer using combined a conduction-convection systems. Mathematical model of such process is important for parametric design and also to gain information about temperature distribution along the surface of the transistor. In this paper, we aim to obtain the equations for heat transfer along the chip and the fin by performing energy balance and heat transfer by conduction from the chip to the rod, followed by dissipation to the surrounding by convection. Newton's law of cooling and Fourier law were used to obtain the equations that describe the profile temperature in the rod and the surface of the chip. Ordinary differential equations were obtained and the respective analytical solutions were derived after consideration of boundary conditions. The temperature along the rod decreased considerably from the initial temperature (in contatct with the chip surface. This indicates the benefit of using a cilindrical rod to distribute the heat generated in the chip.

  20. Wireless amperometric neurochemical monitoring using an integrated telemetry circuit.

    Science.gov (United States)

    Roham, Masoud; Halpern, Jeffrey M; Martin, Heidi B; Chiel, Hillel J; Mohseni, Pedram

    2008-11-01

    An integrated circuit for wireless real-time monitoring of neurochemical activity in the nervous system is described. The chip is capable of conducting high-resolution amperometric measurements in four settings of the input current. The chip architecture includes a first-order Delta Sigma modulator (Delta Sigma M) and a frequency-shift-keyed (FSK) voltage-controlled oscillator (VCO) operating near 433 MHz. It is fabricated using the AMI 0.5 microm double-poly triple-metal n-well CMOS process, and requires only one off-chip component for operation. Measured dc current resolutions of approximately 250 fA, approximately 1.5 pA, approximately 4.5 pA, and approximately 17 pA were achieved for input currents in the range of +/-5, +/-37, +/-150, and +/-600 nA, respectively. The chip has been interfaced with a diamond-coated, quartz-insulated, microneedle, tungsten electrode, and successfully recorded dopamine concentration levels as low as 0.5 microM wirelessly over a transmission distance of approximately 0.5 m in flow injection analysis experiments.

  1. PETRIC - A positron emission tomography readout integrated circuit

    Energy Technology Data Exchange (ETDEWEB)

    Pedrali-Noy, Marzio; Gruber, Gregory; Krieger, Bradley; Mandelli, Emmanuele; Meddeler, Gerrit; Moses, William; Rosso, Valeria

    2000-11-05

    We present architecture, critical design issues and performance measurements of PETRIC, a 64-channel mixed signal front-end integrated circuit (IC) for reading out a photodiode (PD) array coupled with LSO scintillator crystals for a medical imaging application (PET). Each channel consists of a low noise charge sensitive pre-amplifier (CSA), an RC-CR pulse shaper and a winner-take-all (WTA) multiplexer that selects the channel with the largest input signal. Triggered by an external timing signal, a switch opens and a capacitor stores the peak voltage of the winner channel. The shaper rise and fall times are adjustable by means of external current inputs over a continuous range of 0.7 (mu)s to 9 (mu)s. Power consumption is 5.4 mW per channel, measured Equivalent Noise Charge (ENC) at 1 (mu)s peaking time. Zero leakage current is 33 rms electrons plus 7.3 rms electrons per pF of input capacitance. Design is fabricated in 0.5 (mu)m 3.3V CMOS technology.

  2. Integrated high-transition temperature magnetometer with only two superconducting layers

    DEFF Research Database (Denmark)

    Kromann, R.; Kingston, J.J.; Miklich, A.H.

    1993-01-01

    We describe the fabrication and testing of an integrated YBa2Cu3O7-x thin-film magnetometer consisting of a dc superconducting quantum interference device (SQUID), with biepitaxial grain boundary junctions, integrated with a flux transformer on a single substrate. Only two superconducting layers...... are required, the SQUID body serving as the crossunder that completes the multiturn flux transformer. The highest temperature at which any of the magnetometers functioned was 76 K. At 60 K the magnetic field gain of this device was 63, and the magnetic field noise was 160 fT Hz-1/2 at 2 kHz, increasing to 3...

  3. Monolithic Microwave Integrated Circuit (MMIC) Phased Array Demonstrated With ACTS

    Science.gov (United States)

    1996-01-01

    Monolithic Microwave Integrated Circuit (MMIC) arrays developed by the NASA Lewis Research Center and the Air Force Rome Laboratory were demonstrated in aeronautical terminals and in mobile or fixed Earth terminals linked with NASA's Advanced Communications Technology Satellite (ACTS). Four K/Ka-band experimental arrays were demonstrated between May 1994 and May 1995. Each array had GaAs MMIC devices at each radiating element for electronic beam steering and distributed power amplification. The 30-GHz transmit array used in uplinks to ACTS was developed by Lewis and Texas Instruments. The three 20-GHz receive arrays used in downlinks from ACTS were developed in cooperation with the Air Force Rome Laboratory, taking advantage of existing Air Force integrated-circuit, active-phased-array development contracts with the Boeing Company and Lockheed Martin Corporation. Four demonstrations, each related to an application of high interest to both commercial and Department of Defense organizations, were conducted. The location, type of link, and the data rate achieved for each of the applications is shown. In one demonstration-- an aeronautical terminal experiment called AERO-X--a duplex voice link between an aeronautical terminal on the Lewis Learjet and ACTS was achieved. Two others demonstrated duplex voice links (and in one case, interactive video links as well) between ACTS and an Army high-mobility, multipurpose wheeled vehicle (HMMWV, or "humvee"). In the fourth demonstration, the array was on a fixed mount and was electronically steered toward ACTS. Lewis served as project manager for all demonstrations and as overall system integrator. Lewis engineers developed the array system including a controller for open-loop tracking of ACTS during flight and HMMWV motion, as well as a laptop data display and recording system used in all demonstrations. The Jet Propulsion Laboratory supported the AERO-X program, providing elements of the ACTS Mobile Terminal. The successful

  4. Reactor protection system design using application specific integrated circuits

    International Nuclear Information System (INIS)

    Battle, R.E.; Bryan, W.L.; Kisner, R.A.; Wilson, T.L. Jr.

    1992-01-01

    Implementing reactor protection systems (RPS) or other engineering safeguard systems with application specific integrated circuits (ASICs) offers significant advantages over conventional analog or software based RPSs. Conventional analog RPSs suffer from setpoints drifts and large numbers of discrete analog electronics, hardware logic, and relays which reduce reliability because of the large number of potential failures of components or interconnections. To resolve problems associated with conventional discrete RPSs and proposed software based RPS systems, a hybrid analog and digital RPS system implemented with custom ASICs is proposed. The actual design of the ASIC RPS resembles a software based RPS but the programmable software portion of each channel is implemented in a fixed digital logic design including any input variable computations. Set point drifts are zero as in proposed software systems, but the verification and validation of the computations is made easier since the computational logic an be exhaustively tested. The functionality is assured fixed because there can be no future changes to the ASIC without redesign and fabrication. Subtle error conditions caused by out of order evaluation or time dependent evaluation of system variables against protection criteria are eliminated by implementing all evaluation computations in parallel for simultaneous results. On- chip redundancy within each RPS channel and continuous self-testing of all channels provided enhanced assurance that a particular channel is available and faults are identified as soon as possible for corrective actions. The use of highly integrated ASICs to implement channel electronics rather than the use of discrete electronics greatly reduces the total number of components and interconnections in the RPS to further increase system reliability. A prototype ASIC RPS channel design and the design environment used for ASIC RPS systems design is discussed

  5. Novel immunoassay formats for integrated microfluidic circuits: diffusion immunoassays (DIA)

    Science.gov (United States)

    Weigl, Bernhard H.; Hatch, Anson; Kamholz, Andrew E.; Yager, Paul

    2000-03-01

    Novel designs of integrated fluidic microchips allow separations, chemical reactions, and calibration-free analytical measurements to be performed directly in very small quantities of complex samples such as whole blood and contaminated environmental samples. This technology lends itself to applications such as clinical diagnostics, including tumor marker screening, and environmental sensing in remote locations. Lab-on-a-Chip based systems offer many *advantages over traditional analytical devices: They consume extremely low volumes of both samples and reagents. Each chip is inexpensive and small. The sampling-to-result time is extremely short. They perform all analytical functions, including sampling, sample pretreatment, separation, dilution, and mixing steps, chemical reactions, and detection in an integrated microfluidic circuit. Lab-on-a-Chip systems enable the design of small, portable, rugged, low-cost, easy to use, yet extremely versatile and capable diagnostic instruments. In addition, fluids flowing in microchannels exhibit unique characteristics ('microfluidics'), which allow the design of analytical devices and assay formats that would not function on a macroscale. Existing Lab-on-a-chip technologies work very well for highly predictable and homogeneous samples common in genetic testing and drug discovery processes. One of the biggest challenges for current Labs-on-a-chip, however, is to perform analysis in the presence of the complexity and heterogeneity of actual samples such as whole blood or contaminated environmental samples. Micronics has developed a variety of Lab-on-a-Chip assays that can overcome those shortcomings. We will now present various types of novel Lab- on-a-Chip-based immunoassays, including the so-called Diffusion Immunoassays (DIA) that are based on the competitive laminar diffusion of analyte molecules and tracer molecules into a region of the chip containing antibodies that target the analyte molecules. Advantages of this

  6. Thermoreflectance temperature imaging of integrated circuits: calibration technique and quantitative comparison with integrated sensors and simulations

    International Nuclear Information System (INIS)

    Tessier, G; Polignano, M-L; Pavageau, S; Filloy, C; Fournier, D; Cerutti, F; Mica, I

    2006-01-01

    Camera-based thermoreflectance microscopy is a unique tool for high spatial resolution thermal imaging of working integrated circuits. However, a calibration is necessary to obtain quantitative temperatures on the complex surface of integrated circuits. The spatial and temperature resolutions reached by thermoreflectance are excellent (360 nm and 2.5 x 10 -2 K in 1 min here), but the precision is more difficult to assess, notably due to the lack of comparable thermal techniques at submicron scales. We propose here a Peltier element control of the whole package temperature in order to obtain calibration coefficients simultaneously on several materials visible on the surface of the circuit. Under high magnifications, movements associated with thermal expansion are corrected using a piezo electric displacement and a software image shift. This calibration method has been validated by comparison with temperatures measured using integrated thermistors and diodes and by a finite volume simulation. We show that thermoreflectance measurements agree within a precision of ±2.3% with the on-chip sensors measurements. The diode temperature is found to underestimate the actual temperature of the active area by almost 70% due to the thermal contact of the diode with the substrate, acting as a heat sink

  7. Accurate automatic tuning circuit for bipolar integrated filters

    NARCIS (Netherlands)

    de Heij, Wim J.A.; de Heij, W.J.A.; Hoen, Klaas; Hoen, Klaas; Seevinck, Evert; Seevinck, E.

    1990-01-01

    An accurate automatic tuning circuit for tuning the cutoff frequency and Q-factor of high-frequency bipolar filters is presented. The circuit is based on a voltage controlled quadrature oscillator (VCO). The frequency and the RMS (root mean square) amplitude of the oscillator output signal are

  8. Integrated reconfigurable high-voltage transmitting circuit for CMUTs

    DEFF Research Database (Denmark)

    Llimos Muntal, Pere; Larsen, Dennis Øland; Jørgensen, Ivan Harald Holger

    2015-01-01

    In this paper a high-voltage transmitting circuit aimed for capacitive micromachined ultrasonic transducers (CMUTs) used in scanners for medical applications is designed and implemented in a 0.35 μm high-voltage CMOS process. The transmitting circuit is reconfigurable externally making it able...... to drive a wide variety of CMUTs. The transmitting circuit can generate several pulse shapes with voltages up to 100 V, maximum pulse range of 50 V, frequencies up to 5 MHz and different driving slew rates. Measurements are performed on the circuit in order to assess its functionality and power consumption...... performance. The design occupies an on-chip area of 0.938 mm2 and the power consumption of a 128-element transmitting circuit array that would be used in an portable ultrasound scanner is found to be a maximum of 181 mW....

  9. Monolitic integrated circuit for the strobed charge-to-time converter

    International Nuclear Information System (INIS)

    Bel'skij, V.I.; Bushnin, Yu.B.; Zimin, S.A.; Punzhin, Yu.N.; Sen'ko, V.A.; Soldatov, M.M.; Tokarchuk, V.P.

    1985-01-01

    The developed and comercially produced semiconducting circuit - gating charge-to-time converter KR1101PD1 is described. The considered integrated circuit is a short pulse charge-to-time converter with integration of input current. The circuit is designed for construction of time-to-pulse analog-to-digital converters utilized in multichannel detection systems when studying complex topology processes. Input resistance of the circuit is 0.1 Ω permissible input current is 50 mA, maximum measured charge is 300-1000 pC

  10. Failure of the integrated circuits involving complementary MOS transistors under thermal and ionizing radiation stresses

    International Nuclear Information System (INIS)

    Sarrabayrouse, G.; Rossel, P.; Buxo, J.; Vialaret, G.

    Some criteria for reliability and sorting of complementary MOS transistor integrated circuits are proposed, that take account for special environmental stresses near plane reactors or nuclear reactor cores. An analysis of the damaging causes for these circuits at high and low temperatures is proposed, results obtained on the evolution of these devices under irradiation and irradiation behaviors are discussed. The whole set of experiments has been carried out on CD 4007 AD(K) circuits [fr

  11. Experimental Study of WBFC method for testing electromagnetic immunity of integrated circuits

    OpenAIRE

    香川, 直己; カガワ, ナオキ; Naoki, KAGAWA

    2004-01-01

    The author made a workbench faraday cage, WBFC, in order to estimate performance of the WBFC method for the measurement of common mode noise immunity of integrated circuits. In this report, characteristics of the constructed workbench faraday cage and results of experimental study of effects of the common mode noise on a circuit board including an electronic device are shown. Selected DUT, LM324 is popular operational amplifier for electrical circuits in vehicles.

  12. Integrated Power Flow and Short Circuit Calculation Method for Distribution Network with Inverter Based Distributed Generation

    OpenAIRE

    Yang, Shan; Tong, Xiangqian

    2016-01-01

    Power flow calculation and short circuit calculation are the basis of theoretical research for distribution network with inverter based distributed generation. The similarity of equivalent model for inverter based distributed generation during normal and fault conditions of distribution network and the differences between power flow and short circuit calculation are analyzed in this paper. Then an integrated power flow and short circuit calculation method for distribution network with inverte...

  13. High-speed Integrated Circuits for electrical/Optical Interfaces

    DEFF Research Database (Denmark)

    Jespersen, Christoffer Felix

    2008-01-01

    This thesis is a continuation of the effort to increase the bandwidth of communicationnetworks. The thesis presents the results of the design of several high-speed electrical ircuits for an electrical/optical interface. These circuits have been a contribution to the ESTA project in collaboration...... circuits at the receiver interface, though VCOs are also found in the transmitter where a multitude of independent sources have to be mutually synchronized before multiplexing. The circuits are based on an InP DHBT process (VIP-2) supplied by Vitesse and made publicly available as MPW. The VIP-2 process...... represents the avant-garde of InP technology, with ft and fmax well above 300 GHz. Principles of high speed design are presented and described as a useful background before proceeding to circuits. A static divider is used as an example to illustrate many of the design principles. Theory and fundamentals...

  14. Superconducting detectors for semiconductor quantum photonics

    International Nuclear Information System (INIS)

    Reithmaier, Guenther M.

    2015-01-01

    In this thesis we present the first successful on-chip detection of quantum light, thereby demonstrating the monolithic integration of superconducting single photon detectors with individually addressable semiconductor quantum dots in a prototypical quantum photonic circuit. Therefore, we optimized both the deposition of high quality superconducting NbN thin films on GaAs substrates and the fabrication of superconducting detectors and successfully integrated these novel devices with GaAs/AlGaAs ridge waveguides loaded with self-assembled InGaAs quantum dots.

  15. A numerical integration-based yield estimation method for integrated circuits

    International Nuclear Information System (INIS)

    Liang Tao; Jia Xinzhang

    2011-01-01

    A novel integration-based yield estimation method is developed for yield optimization of integrated circuits. This method tries to integrate the joint probability density function on the acceptability region directly. To achieve this goal, the simulated performance data of unknown distribution should be converted to follow a multivariate normal distribution by using Box-Cox transformation (BCT). In order to reduce the estimation variances of the model parameters of the density function, orthogonal array-based modified Latin hypercube sampling (OA-MLHS) is presented to generate samples in the disturbance space during simulations. The principle of variance reduction of model parameters estimation through OA-MLHS together with BCT is also discussed. Two yield estimation examples, a fourth-order OTA-C filter and a three-dimensional (3D) quadratic function are used for comparison of our method with Monte Carlo based methods including Latin hypercube sampling and importance sampling under several combinations of sample sizes and yield values. Extensive simulations show that our method is superior to other methods with respect to accuracy and efficiency under all of the given cases. Therefore, our method is more suitable for parametric yield optimization. (semiconductor integrated circuits)

  16. A numerical integration-based yield estimation method for integrated circuits

    Energy Technology Data Exchange (ETDEWEB)

    Liang Tao; Jia Xinzhang, E-mail: tliang@yahoo.cn [Key Laboratory of Ministry of Education for Wide Bandgap Semiconductor Materials and Devices, School of Microelectronics, Xidian University, Xi' an 710071 (China)

    2011-04-15

    A novel integration-based yield estimation method is developed for yield optimization of integrated circuits. This method tries to integrate the joint probability density function on the acceptability region directly. To achieve this goal, the simulated performance data of unknown distribution should be converted to follow a multivariate normal distribution by using Box-Cox transformation (BCT). In order to reduce the estimation variances of the model parameters of the density function, orthogonal array-based modified Latin hypercube sampling (OA-MLHS) is presented to generate samples in the disturbance space during simulations. The principle of variance reduction of model parameters estimation through OA-MLHS together with BCT is also discussed. Two yield estimation examples, a fourth-order OTA-C filter and a three-dimensional (3D) quadratic function are used for comparison of our method with Monte Carlo based methods including Latin hypercube sampling and importance sampling under several combinations of sample sizes and yield values. Extensive simulations show that our method is superior to other methods with respect to accuracy and efficiency under all of the given cases. Therefore, our method is more suitable for parametric yield optimization. (semiconductor integrated circuits)

  17. Miniaturized Ultrasound Imaging Probes Enabled by CMUT Arrays with Integrated Frontend Electronic Circuits

    Science.gov (United States)

    Khuri-Yakub, B. (Pierre) T.; Oralkan, Ömer; Nikoozadeh, Amin; Wygant, Ira O.; Zhuang, Steve; Gencel, Mustafa; Choe, Jung Woo; Stephens, Douglas N.; de la Rama, Alan; Chen, Peter; Lin, Feng; Dentinger, Aaron; Wildes, Douglas; Thomenius, Kai; Shivkumar, Kalyanam; Mahajan, Aman; Seo, Chi Hyung; O’Donnell, Matthew; Truong, Uyen; Sahn, David J.

    2010-01-01

    Capacitive micromachined ultrasonic transducer (CMUT) arrays are conveniently integrated with frontend integrated circuits either monolithically or in a hybrid multichip form. This integration helps with reducing the number of active data processing channels for 2D arrays. This approach also preserves the signal integrity for arrays with small elements. Therefore CMUT arrays integrated with electronic circuits are most suitable to implement miniaturized probes required for many intravascular, intracardiac, and endoscopic applications. This paper presents examples of miniaturized CMUT probes utilizing 1D, 2D, and ring arrays with integrated electronics. PMID:21097106

  18. Review of Polynomial Chaos-Based Methods for Uncertainty Quantification in Modern Integrated Circuits

    Directory of Open Access Journals (Sweden)

    Arun Kaintura

    2018-02-01

    Full Text Available Advances in manufacturing process technology are key ensembles for the production of integrated circuits in the sub-micrometer region. It is of paramount importance to assess the effects of tolerances in the manufacturing process on the performance of modern integrated circuits. The polynomial chaos expansion has emerged as a suitable alternative to standard Monte Carlo-based methods that are accurate, but computationally cumbersome. This paper provides an overview of the most recent developments and challenges in the application of polynomial chaos-based techniques for uncertainty quantification in integrated circuits, with particular focus on high-dimensional problems.

  19. Highly integrated optical phased arrays: photonic integrated circuits for optical beam shaping and beam steering

    Science.gov (United States)

    Heck, Martijn J. R.

    2017-01-01

    Technologies for efficient generation and fast scanning of narrow free-space laser beams find major applications in three-dimensional (3D) imaging and mapping, like Lidar for remote sensing and navigation, and secure free-space optical communications. The ultimate goal for such a system is to reduce its size, weight, and power consumption, so that it can be mounted on, e.g. drones and autonomous cars. Moreover, beam scanning should ideally be done at video frame rates, something that is beyond the capabilities of current opto-mechanical systems. Photonic integrated circuit (PIC) technology holds the promise of achieving low-cost, compact, robust and energy-efficient complex optical systems. PICs integrate, for example, lasers, modulators, detectors, and filters on a single piece of semiconductor, typically silicon or indium phosphide, much like electronic integrated circuits. This technology is maturing fast, driven by high-bandwidth communications applications, and mature fabrication facilities. State-of-the-art commercial PICs integrate hundreds of elements, and the integration of thousands of elements has been shown in the laboratory. Over the last few years, there has been a considerable research effort to integrate beam steering systems on a PIC, and various beam steering demonstrators based on optical phased arrays have been realized. Arrays of up to thousands of coherent emitters, including their phase and amplitude control, have been integrated, and various applications have been explored. In this review paper, I will present an overview of the state of the art of this technology and its opportunities, illustrated by recent breakthroughs.

  20. Highly integrated optical phased arrays: photonic integrated circuits for optical beam shaping and beam steering

    Directory of Open Access Journals (Sweden)

    Heck Martijn J.R.

    2016-06-01

    Full Text Available Technologies for efficient generation and fast scanning of narrow free-space laser beams find major applications in three-dimensional (3D imaging and mapping, like Lidar for remote sensing and navigation, and secure free-space optical communications. The ultimate goal for such a system is to reduce its size, weight, and power consumption, so that it can be mounted on, e.g. drones and autonomous cars. Moreover, beam scanning should ideally be done at video frame rates, something that is beyond the capabilities of current opto-mechanical systems. Photonic integrated circuit (PIC technology holds the promise of achieving low-cost, compact, robust and energy-efficient complex optical systems. PICs integrate, for example, lasers, modulators, detectors, and filters on a single piece of semiconductor, typically silicon or indium phosphide, much like electronic integrated circuits. This technology is maturing fast, driven by high-bandwidth communications applications, and mature fabrication facilities. State-of-the-art commercial PICs integrate hundreds of elements, and the integration of thousands of elements has been shown in the laboratory. Over the last few years, there has been a considerable research effort to integrate beam steering systems on a PIC, and various beam steering demonstrators based on optical phased arrays have been realized. Arrays of up to thousands of coherent emitters, including their phase and amplitude control, have been integrated, and various applications have been explored. In this review paper, I will present an overview of the state of the art of this technology and its opportunities, illustrated by recent breakthroughs.

  1. Development of an alternating integrator for magnetic measurements for experimental advanced superconducting tokamak

    Energy Technology Data Exchange (ETDEWEB)

    Liu, D. M., E-mail: dmliu@live.cn; Zhao, W. Z.; He, Y. G.; Chen, B. [School of Electrical Engineering and Automation, Hefei University of Technology, Hefei 230009 (China); Wan, B. N.; Shen, B.; Huang, J.; Liu, H. Q. [Institute of Plasma Physics, Chinese Academy of Sciences, Hefei 230031 (China)

    2014-11-15

    A high-performance integrator is one of the key electronic devices for reliably controlling plasma in the experimental advanced superconducting tokamak for long pulse operation. We once designed an integrator system of real-time drift compensation, which has a low integration drift. However, it is not feasible for really continuous operations due to capacitive leakage error and nonlinearity error. To solve the above-mentioned problems, this paper presents a new alternating integrator. In the new integrator, the integrator system of real-time drift compensation is adopted as one integral cell while two such integral cells work alternately. To achieve the alternate function, a Field Programmable Gate Array built in the digitizer is utilized. The performance test shows that the developed integrator with the integration time constant of 20 ms has a low integration drift (<15 mV) for 1000 s.

  2. SEMICONDUCTOR INTEGRATED CIRCUITS: A reconfigurable analog baseband circuit for WLAN, WCDMA, and Bluetooth

    Science.gov (United States)

    Tao, Tong; Baoyong, Chi; Ziqiang, Wang; Ying, Zhang; Hanjun, Jiang; Zhihua, Wang

    2010-05-01

    A reconfigurable analog baseband circuit for WLAN, WCDMA, and Bluetooth in 0.35 μm CMOS is presented. The circuit consists of two variable gain amplifiers (VGA) in cascade and a Gm-C elliptic low-pass filter (LPF). The filter-order and the cut-off frequency of the LPF can be reconfigured to satisfy the requirements of various applications. In order to achieve the optimum power consumption, the bandwidth of the VGAs can also be dynamically reconfigured and some Gm cells can be cut off in the given application. Simulation results show that the analog baseband circuit consumes 16.8 mW for WLAN, 8.9 mW for WCDMA and only 6.5 mW for Bluetooth, all with a 3 V power supply. The analog baseband circuit could provide -10 to +40 dB variable gain, third-order low pass filtering with 1 MHz cut-off frequency for Bluetooth, fourth-order low pass filtering with 2.2 MHz cut-off frequency for WCDMA, and fifth-order low pass filtering with 11 MHz cut-off frequency for WLAN, respectively.

  3. Deeply-etched DBR mirrors for photonic integrated circuits and tunable lasers

    NARCIS (Netherlands)

    Docter, B.

    2009-01-01

    Deeply-etched Distributed Bragg Reflector (DBR) mirrors are a new versatile building block for Photonic Integrated Circuits that allows us to create more complex circuits for optical telecommunication applications. The DBR mirrors increase the device design flexibility because the mirrors can be

  4. Single-event effects in analog and mixed-signal integrated circuits

    International Nuclear Information System (INIS)

    Turflinger, T.L.

    1996-01-01

    Analog and mixed-signal integrated circuits are also susceptible to single-event effects, but they have rarely been tested. Analog circuit single-particle transients require modified test techniques and data analysis. Existing work is reviewed and future concerns are outlined

  5. A Novel Analog Integrated Circuit Design Course Covering Design, Layout, and Resulting Chip Measurement

    Science.gov (United States)

    Lin, Wei-Liang; Cheng, Wang-Chuan; Wu, Chen-Hao; Wu, Hai-Ming; Wu, Chang-Yu; Ho, Kuan-Hsuan; Chan, Chueh-An

    2010-01-01

    This work describes a novel, first-year graduate-level analog integrated circuit (IC) design course. The course teaches students analog circuit design; an external manufacturer then produces their designs in three different silicon chips. The students, working in pairs, then test these chips to verify their success. All work is completed within…

  6. Ultra low-power integrated circuit design for wireless neural interfaces

    CERN Document Server

    Holleman, Jeremy; Otis, Brian

    2014-01-01

    Presenting results from real prototype systems, this volume provides an overview of ultra low-power integrated circuits and systems for neural signal processing and wireless communication. Topics include analog, radio, and signal processing theory and design for ultra low-power circuits.

  7. Prediction of ionizing radiation effects in integrated circuits using black-box models

    International Nuclear Information System (INIS)

    Williamson, P.W.

    1976-10-01

    A method is described which allows general black-box modelling of integrated circuits as distinct from the existing method of deriving the radiation induced response of the model from actual terminal measurements on the device during irradiation. Both digital and linear circuits are discussed. (author)

  8. Waveguide-integrated single- and multi-photon detection at telecom wavelengths using superconducting nanowires

    International Nuclear Information System (INIS)

    Ferrari, Simone; Kahl, Oliver; Kovalyuk, Vadim; Goltsman, Gregory N.; Korneev, Alexander; Pernice, Wolfram H. P.

    2015-01-01

    We investigate single- and multi-photon detection regimes of superconducting nanowire detectors embedded in silicon nitride nanophotonic circuits. At near-infrared wavelengths, simultaneous detection of up to three photons is observed for 120 nm wide nanowires biased far from the critical current, while narrow nanowires below 100 nm provide efficient single photon detection. A theoretical model is proposed to determine the different detection regimes and to calculate the corresponding internal quantum efficiency. The predicted saturation of the internal quantum efficiency in the single photon regime agrees well with plateau behavior observed at high bias currents

  9. Waveguide-integrated single- and multi-photon detection at telecom wavelengths using superconducting nanowires

    Energy Technology Data Exchange (ETDEWEB)

    Ferrari, Simone; Kahl, Oliver [Institute of Nanotechnology, Karlsruhe Institute of Technology, Karlsruhe 76132 (Germany); Kovalyuk, Vadim [Institute of Nanotechnology, Karlsruhe Institute of Technology, Karlsruhe 76132 (Germany); Department of Physics, Moscow State Pedagogical University, Moscow 119992 (Russian Federation); Goltsman, Gregory N. [Department of Physics, Moscow State Pedagogical University, Moscow 119992 (Russian Federation); National Research University Higher School of Economics, 20 Myasnitskaya Ulitsa, Moscow 101000 (Russian Federation); Korneev, Alexander [Department of Physics, Moscow State Pedagogical University, Moscow 119992 (Russian Federation); Moscow Institute of Physics and Technology (State University), Moscow 141700 (Russian Federation); Pernice, Wolfram H. P., E-mail: wolfram.pernice@kit.edu [Institute of Nanotechnology, Karlsruhe Institute of Technology, Karlsruhe 76132 (Germany); Department of Physics, University of Münster, 48149 Münster (Germany)

    2015-04-13

    We investigate single- and multi-photon detection regimes of superconducting nanowire detectors embedded in silicon nitride nanophotonic circuits. At near-infrared wavelengths, simultaneous detection of up to three photons is observed for 120 nm wide nanowires biased far from the critical current, while narrow nanowires below 100 nm provide efficient single photon detection. A theoretical model is proposed to determine the different detection regimes and to calculate the corresponding internal quantum efficiency. The predicted saturation of the internal quantum efficiency in the single photon regime agrees well with plateau behavior observed at high bias currents.

  10. Superconducting Qubit with Integrated Single Flux Quantum Controller Part II: Experimental Characterization

    Science.gov (United States)

    Leonard, Edward, Jr.; Beck, Matthew; Thorbeck, Ted; Zhu, Shaojiang; Howington, Caleb; Nelson, Jj; Plourde, Britton; McDermott, Robert

    We describe the characterization of a single flux quantum (SFQ) pulse generator cofabricated with a superconducting quantum circuit on a single chip. Resonant trains of SFQ pulses are used to induce coherent qubit rotations on the Bloch sphere. We describe the SFQ drive characteristics of the qubit at the fundamental transition frequency and at subharmonics (ω01 / n , n = 2 , 3 , 4 , ⋯). We address the issue of quasiparticle poisoning due to the proximal SFQ pulse generator, and we characterize the fidelity of SFQ-based rotations using randomized benchmarking. Present address: IBM T.J. Watson Research Center.

  11. Superconducting Qubit with Integrated Single Flux Quantum Controller Part I: Theory and Fabrication

    Science.gov (United States)

    Beck, Matthew; Leonard, Edward, Jr.; Thorbeck, Ted; Zhu, Shaojiang; Howington, Caleb; Nelson, Jj; Plourde, Britton; McDermott, Robert

    As the size of quantum processors grow, so do the classical control requirements. The single flux quantum (SFQ) Josephson digital logic family offers an attractive route to proximal classical control of multi-qubit processors. Here we describe coherent control of qubits via trains of SFQ pulses. We discuss the fabrication of an SFQ-based pulse generator and a superconducting transmon qubit on a single chip. Sources of excess microwave loss stemming from the complex multilayer fabrication of the SFQ circuit are discussed. We show how to mitigate this loss through judicious choice of process workflow and appropriate use of sacrificial protection layers. Present address: IBM T.J. Watson Research Center.

  12. Nonreciprocal frequency conversion in a multimode microwave optomechanical circuit

    Science.gov (United States)

    Feofanov, A. K.; Bernier, N. R.; Toth, L. D.; Koottandavida, A.; Kippenberg, T. J.

    Nonreciprocal devices such as isolators, circulators, and directional amplifiers are pivotal to quantum signal processing with superconducting circuits. In the microwave domain, commercially available nonreciprocal devices are based on ferrite materials. They are barely compatible with superconducting quantum circuits, lossy, and cannot be integrated on chip. Significant potential exists for implementing non-magnetic chip-scale nonreciprocal devices using microwave optomechanical circuits. Here we demonstrate a possibility of nonreciprocal frequency conversion in a multimode microwave optomechanical circuit using solely optomechanical interaction between modes. The conversion scheme and the results reflecting the actual progress on the experimental implementation of the scheme will be presented.

  13. An analog front-end bipolar-transistor integrated circuit for the SDC silicon tracker

    International Nuclear Information System (INIS)

    Kipnis, I.; Spieler, H.; Collins, T.

    1994-01-01

    Since 1989 the Solenoidal Detector Collaboration (SDC) has been developing a general purpose detector to be operated at the Superconducting Super Collider (SSC). A low-noise, low-power, high-bandwidth, radiation hard, silicon bipolar-transistor full-custom integrated circuit (IC) containing 64 channels of analog signal processing has been developed for the SDS silicon tracker. The IC was designed and tested at LBL and was fabricated using AT and T's CBIC-U2, 4 GHz f T complementary bipolar technology. Each channel contains the following functions: low-noise preamplification, pulse shaping and threshold discrimination. This is the first iteration of the production analog IC for the SDC silicon tracker. The IC is laid out to directly match the 50 μm pitch double-sided silicon strip detector. The chip measures 6.8 mm x 3.1 mm and contains 3,600 transistors. Three stages of amplification provide 180 mV/fC of gain with a 35 nsec peaking time at the comparator input. For a 14 pF detector capacitance, the equivalent noise charge is 1300 el. rms at a power consumption of 1 mW/channel from a single 3.5 V supply. With the discriminator threshold set to 4 times the noise level, a 16nsec time-walk for 1.25 to 10 fC signals is achieved using a time-walk compensation network. Irradiation tests at TRIUMF to a φ = 10 14 protons/cm 2 have been performed on the JC, demonstrating the radiation hardness of the complementary bipolar process

  14. RNA signal amplifier circuit with integrated fluorescence output.

    Science.gov (United States)

    Akter, Farhima; Yokobayashi, Yohei

    2015-05-15

    We designed an in vitro signal amplification circuit that takes a short RNA input that catalytically activates the Spinach RNA aptamer to produce a fluorescent output. The circuit consists of three RNA strands: an internally blocked Spinach aptamer, a fuel strand, and an input strand (catalyst), as well as the Spinach aptamer ligand 3,5-difluoro-4-hydroxylbenzylidene imidazolinone (DFHBI). The input strand initially displaces the internal inhibitory strand to activate the fluorescent aptamer while exposing a toehold to which the fuel strand can bind to further displace and recycle the input strand. Under a favorable condition, one input strand was able to activate up to five molecules of the internally blocked Spinach aptamer in 185 min at 30 °C. The simple RNA circuit reported here serves as a model for catalytic activation of arbitrary RNA effectors by chemical triggers.

  15. Experimental and numerical study of electrical crosstalk in photonic integrated circuits

    NARCIS (Netherlands)

    Yao, W.; Gilardi, G.; Calabretta, N.; Smit, M.K.; Wale, M.J.

    2015-01-01

    This paper presents measurement results on electrical crosstalk between interconnect lines and electro-optical phaseshifters in photonic integrated circuits. The results indicate that overall crosstalk originates from radiative and substrate coupling between lines and from shared ground connections.

  16. Fast electromagnetic characterization of integrated circuit passive isolation structures based on interference blocking

    NARCIS (Netherlands)

    Grau Novellas, M.; Serra, R.; Rose, Matthias

    2017-01-01

    An early characterization of integrated circuit passive isolation structures is crucial to predict their performance and effectiveness in minimizing substrate coupling. In this paper, an electromagnetic (EM) modeling methodology is proposed, which can be applied to different types of isolation

  17. Development of pixel readout integrated circuits for extreme rate and radiation

    CERN Document Server

    Garcia-Sciveres, M; CERN. Geneva. The LHC experiments Committee; LHCC

    2013-01-01

    Letter of Intent for RD Collaboration Proposal focused on development of a next generation pixel readout integrated circuits needed for high luminosity LHC detector upgrades. Brings together ATLAS and CMS pixel chip design communities.

  18. Design of a semi-custom integrated circuit for the SLAC SLC timing control system

    International Nuclear Information System (INIS)

    Linstadt, E.

    1984-10-01

    A semi-custom (gate array) integrated circuit has been designed for use in the SLAC Linear Collider timing and control system. The design process and SLAC's experiences during the phases of the design cycle are described. Issues concerning the partitioning of the design into semi-custom and standard components are discussed. Functional descriptions of the semi-custom integrated circuit and the timing module in which it is used are given

  19. Review of Polynomial Chaos-Based Methods for Uncertainty Quantification in Modern Integrated Circuits

    OpenAIRE

    Arun Kaintura; Tom Dhaene; Domenico Spina

    2018-01-01

    Advances in manufacturing process technology are key ensembles for the production of integrated circuits in the sub-micrometer region. It is of paramount importance to assess the effects of tolerances in the manufacturing process on the performance of modern integrated circuits. The polynomial chaos expansion has emerged as a suitable alternative to standard Monte Carlo-based methods that are accurate, but computationally cumbersome. This paper provides an overview of the most recent developm...

  20. Principal working group 3 on primary circuit integrity

    Energy Technology Data Exchange (ETDEWEB)

    NONE

    1993-12-31

    The main themes of this conference (13 papers) are: operating experience on leakages and failures in nuclear power plant piping, coolant circuits and steam generator tubes, probabilistic estimation and risk assessment, system failure analysis, leakage events and frequency, leak rate models and crack propagation mechanics, damage mechanisms and rupture probability.