Study of cutting speed on surface roughness and chip formation when machining nickel-based alloy

International Nuclear Information System (INIS)

Khidhir, Basim A.; Mohamed, Bashir

2010-01-01

Nickel- based alloy is difficult-to-machine because of its low thermal diffusive property and high strength at higher temperature. The machinability of nickel- based Hastelloy C-276 in turning operations has been carried out using different types of inserts under dry conditions on a computer numerical control (CNC) turning machine at different stages of cutting speed. The effects of cutting speed on surface roughness have been investigated. This study explores the types of wear caused by the effect of cutting speed on coated and uncoated carbide inserts. In addition, the effect of burr formation is investigated. The chip burr is found to have different shapes at lower speeds. Triangles and squares have been noticed for both coated and uncoated tips as well. The conclusion from this study is that the transition from thick continuous chip to wider discontinuous chip is caused by different types of inserts. The chip burr has a significant effect on tool damage starting in the line of depth-of-cut. For the coated insert tips, the burr disappears when the speed increases to above 150 m/min with the improvement of surface roughness; increasing the speed above the same limit for uncoated insert tips increases the chip burr size. The results of this study showed that the surface finish of nickel-based alloy is highly affected by the insert type with respect to cutting speed changes and its effect on chip burr formation and tool failure

Chip formation and surface integrity in high-speed machining of hardened steel

Science.gov (United States)

Kishawy, Hossam Eldeen A.

Increasing demands for high production rates as well as cost reduction have emphasized the potential for the industrial application of hard turning technology during the past few years. Machining instead of grinding hardened steel components reduces the machining sequence, the machining time, and the specific cutting energy. Hard turning Is characterized by the generation of high temperatures, the formation of saw toothed chips, and the high ratio of thrust to tangential cutting force components. Although a large volume of literature exists on hard turning, the change in machined surface physical properties represents a major challenge. Thus, a better understanding of the cutting mechanism in hard turning is still required. In particular, the chip formation process and the surface integrity of the machined surface are important issues which require further research. In this thesis, a mechanistic model for saw toothed chip formation is presented. This model is based on the concept of crack initiation on the free surface of the workpiece. The model presented explains the mechanism of chip formation. In addition, experimental investigation is conducted in order to study the chip morphology. The effect of process parameters, including edge preparation and tool wear on the chip morphology, is studied using Scanning Electron Microscopy (SEM). The dynamics of chip formation are also investigated. The surface integrity of the machined parts is also investigated. This investigation focusses on residual stresses as well as surface and sub-surface deformation. A three dimensional thermo-elasto-plastic finite element model is developed to predict the machining residual stresses. The effect of flank wear is introduced during the analysis. Although residual stresses have complicated origins and are introduced by many factors, in this model only the thermal and mechanical factors are considered. The finite element analysis demonstrates the significant effect of the heat generated

Design of analog-type high-speed SerDes using digital components for optical chip-to-chip link

Science.gov (United States)

Sangirov, Jamshid; Nguyen, Nga T. H.; Ngo, Trong-Hieu; Im, Dong-min; Ukaegbu, Augustine I.; Lee, Tae-Woo; Cho, Mu Hee; Park, Hyo-Hoon

2010-02-01

An analog-type high-speed serializer/deserializer (SerDes) has been designed for optical links especially between CPU and memory. The circuit uses a system clock and its phases to multiplex data to the serial link which avoids the need for a PLL-based high frequency clock generation used in serializing parallel data as in conventional SerDes design. The multiplexed link combined with the de-serializing clock is used as a reference signal for de-serialization. The SerDes is being designed in a 0.13 μm Si-CMOS technology. The fabricated serializer has a core chip size of 360 x750 μm2. Power dissipation for the SerDes is 71.4 mW operating up to 6.5 Gbps.

Single chip camera active pixel sensor

Science.gov (United States)

Shaw, Timothy (Inventor); Pain, Bedabrata (Inventor); Olson, Brita (Inventor); Nixon, Robert H. (Inventor); Fossum, Eric R. (Inventor); Panicacci, Roger A. (Inventor); Mansoorian, Barmak (Inventor)

2003-01-01

A totally digital single chip camera includes communications to operate most of its structure in serial communication mode. The digital single chip camera include a D/A converter for converting an input digital word into an analog reference signal. The chip includes all of the necessary circuitry for operating the chip using a single pin.

MACSYM. Towards a system of measurement and control on a single chip

Energy Technology Data Exchange (ETDEWEB)

Zannoli, S

1984-03-01

Since it is now possible to produce A/D and D/A integrated circuits on a single chip at a remarkably low cost, the production of an entire system for the acquisition of measurements and control of data on a single chip can be foreseen. The MACSYM (measurement and control system), produced by Analog Devices Inc., contains all its components on a single circuit board. The MACSYM 150 is a multiprocessor with separate analogue and digital buses. Because it contains three CPUS with special functions, it has high operating speeds and can handle a number of programs simultaneously. Since this model is designed for on line and real time measurements of physical quantities it has a number of different stores, including a central store, a store for graphs in colour and fast output and input stores for metered data. The author describes the interface provided and the terminals to which data can be supplied and mentions the programming language used.

Transparent Nanopore Cavity Arrays Enable Highly Parallelized Optical Studies of Single Membrane Proteins on Chip.

Science.gov (United States)

Diederichs, Tim; Nguyen, Quoc Hung; Urban, Michael; Tampé, Robert; Tornow, Marc

2018-06-13

Membrane proteins involved in transport processes are key targets for pharmaceutical research and industry. Despite continuous improvements and new developments in the field of electrical readouts for the analysis of transport kinetics, a well-suited methodology for high-throughput characterization of single transporters with nonionic substrates and slow turnover rates is still lacking. Here, we report on a novel architecture of silicon chips with embedded nanopore microcavities, based on a silicon-on-insulator technology for high-throughput optical readouts. Arrays containing more than 14 000 inverted-pyramidal cavities of 50 femtoliter volumes and 80 nm circular pore openings were constructed via high-resolution electron-beam lithography in combination with reactive ion etching and anisotropic wet etching. These cavities feature both, an optically transparent bottom and top cap. Atomic force microscopy analysis reveals an overall extremely smooth chip surface, particularly in the vicinity of the nanopores, which exhibits well-defined edges. Our unprecedented transparent chip design provides parallel and independent fluorescent readout of both cavities and buffer reservoir for unbiased single-transporter recordings. Spreading of large unilamellar vesicles with efficiencies up to 96% created nanopore-supported lipid bilayers, which are stable for more than 1 day. A high lipid mobility in the supported membrane was determined by fluorescent recovery after photobleaching. Flux kinetics of α-hemolysin were characterized at single-pore resolution with a rate constant of 0.96 ± 0.06 × 10 -3 s -1 . Here, we deliver an ideal chip platform for pharmaceutical research, which features high parallelism and throughput, synergistically combined with single-transporter resolution.

Full-frame, high-speed 3D shape and deformation measurements using stereo-digital image correlation and a single color high-speed camera

Science.gov (United States)

Yu, Liping; Pan, Bing

2017-08-01

Full-frame, high-speed 3D shape and deformation measurement using stereo-digital image correlation (stereo-DIC) technique and a single high-speed color camera is proposed. With the aid of a skillfully designed pseudo stereo-imaging apparatus, color images of a test object surface, composed of blue and red channel images from two different optical paths, are recorded by a high-speed color CMOS camera. The recorded color images can be separated into red and blue channel sub-images using a simple but effective color crosstalk correction method. These separated blue and red channel sub-images are processed by regular stereo-DIC method to retrieve full-field 3D shape and deformation on the test object surface. Compared with existing two-camera high-speed stereo-DIC or four-mirror-adapter-assisted singe-camera high-speed stereo-DIC, the proposed single-camera high-speed stereo-DIC technique offers prominent advantages of full-frame measurements using a single high-speed camera but without sacrificing its spatial resolution. Two real experiments, including shape measurement of a curved surface and vibration measurement of a Chinese double-side drum, demonstrated the effectiveness and accuracy of the proposed technique.

A mixed signal multi-chip module with high speed serial output links for the ATLAS Level-1 trigger

CERN Document Server

Pfeiffer, U

2000-01-01

We have built and tested a mixed signal multi-chip module (MCM) to be used in the Level-1 Pre-Processor system for the Calorimeter Trigger of the ATLAS experiment at CERN. The MCM performs high speed digital signal processing on four analogue input signals. Results are transmitted serially at a serial data rate of 800 MBd. Nine chips of different technologies are mounted on a four layer Cu substrate. ADC converters and serialiser chips are the major consumers of electrical power on the MCM, which amounts to 9 W for all dies. Special cut-out areas are used to dissipate heat directly to the copper substrate. In this paper we report on design criteria, chosen MCM technology for substrate and die mounting, experiences with the MCM operation and measurement results. (4 refs).

Plastic straw: future of high-speed signaling

Science.gov (United States)

Song, Ha Il; Jin, Huxian; Bae, Hyeon-Min

2015-11-01

The ever-increasing demand for bandwidth triggered by mobile and video Internet traffic requires advanced interconnect solutions satisfying functional and economic constraints. A new interconnect called E-TUBE is proposed as a cost-and-power-effective all-electrical-domain wideband waveguide solution for high-speed high-volume short-reach communication links. The E-TUBE achieves an unprecedented level of performance in terms of bandwidth-per-carrier frequency, power, and density without requiring a precision manufacturing process unlike conventional optical/waveguide solutions. The E-TUBE exhibits a frequency-independent loss-profile of 4 dB/m and has nearly 20-GHz bandwidth over the V band. A single-sideband signal transmission enabled by the inherent frequency response of the E-TUBE renders two-times data throughput without any physical overhead compared to conventional radio frequency communication technologies. This new interconnect scheme would be attractive to parties interested in high throughput links, including but not limited to, 100/400 Gbps chip-to-chip communications.

High-speed single-photon signaling for daytime QKD

Science.gov (United States)

Bienfang, Joshua; Restelli, Alessandro; Clark, Charles

2011-03-01

The distribution of quantum-generated cryptographic key at high throughputs can be critically limited by the performance of the systems' single-photon detectors. While noise and afterpulsing are considerations for all single-photon QKD systems, high-transmission rate systems also have critical detector timing-resolution and recovery time requirements. We present experimental results exploiting the high timing resolution and count-rate stability of modified single-photon avalanche diodes (SPADs) in our GHz QKD system operating over a 1.5 km free-space link that demonstrate the ability to apply extremely short temporal gates, enabling daytime free-space QKD with a 4% QBER. We also discuss recent advances in gating techniques for InGaAs SPADs that are suitable for high-speed fiber-based QKD. We present afterpulse-probability measurements that demonstrate the ability to support single-photon count rates above 100 MHz with low afterpulse probability. These results will benefit the design and characterization of free-space and fiber QKD systems. A. Restelli, J.C. Bienfang A. Mink, and C.W. Clark, IEEE J. Sel. Topics in Quant. Electron 16, 1084 (2010).

A scalable single-chip multi-processor architecture with on-chip RTOS kernel

NARCIS (Netherlands)

Theelen, B.D.; Verschueren, A.C.; Reyes Suarez, V.V.; Stevens, M.P.J.; Nunez, A.

2003-01-01

Now that system-on-chip technology is emerging, single-chip multi-processors are becoming feasible. A key problem of designing such systems is the complexity of their on-chip interconnects and memory architecture. It is furthermore unclear at what level software should be integrated. An example of a

High-speed readout of high-Z pixel detectors with the LAMBDA detector

International Nuclear Information System (INIS)

Pennicard, D.; Smoljanin, S.; Sheviakov, I.; Xia, Q.; Rothkirch, A.; Yu, Y.; Struth, B.; Hirsemann, H.; Graafsma, H.

2014-01-01

High-frame-rate X-ray pixel detectors make it possible to perform time-resolved experiments at synchrotron beamlines, and to make better use of these sources by shortening experiment times. LAMBDA is a photon-counting hybrid pixel detector based on the Medipix3 chip, designed to combine a small pixel size of 55 μm, a large tileable module design, high speed, and compatibility with ''high-Z'' sensors for hard X-ray detection. This technical paper focuses on LAMBDA's high-speed-readout functionality, which allows a frame rate of 2000 frames per second with no deadtime between successive images. This takes advantage of the Medipix3 chip's ''continuous read-write'' function and highly parallelised readout. The readout electronics serialise this data and send it back to a server PC over two 10 Gigabit Ethernet links. The server PC controls the detector and receives, processes and stores the data using software designed for the Tango control system. As a demonstration of high-speed readout of a high-Z sensor, a GaAs LAMBDA detector was used to make a high-speed X-ray video of a computer fan

An automatic single channel analyzer based on single-chip microcomputer

International Nuclear Information System (INIS)

Yan Xuekun; Jia Mingchun; Zhang Yan; Liu Mingjian; Luo Ming

2008-01-01

The hardware and software of an automatic single channel analyzer based on AT89C51RC single-chip microcomputer is described in this paper. The equipment takes a method of channel-width-adjusting symmetrically, and makes use of single-chip microcomputer to control the two DAC0832 so as to adjust the discriminating threshold and channel-width automatically. As a result, the auto-measuring of the single channel analyzer is realized. Its circuit configuration is simple, and the uniformity of its channel-width is well, too. (authors)

A 3 W High-Voltage Single-Chip Green Light-Emitting Diode with Multiple-Cells Network

Directory of Open Access Journals (Sweden)

W. Wang

2015-01-01

Full Text Available A parallel and series network structure was introduced into the design of the high-voltage single-chip (HV-SC light-emitting diode to inhibit the effect of current crowding and to improve the yield. Using such a design, a 6.6×5 mm2 large area LED chip of 24 parallel stages was demonstrated with 3 W light output power (LOP at the current of 500 mA. The forward voltage was measured to be 83 V with the same current injection, corresponding to 3.5 V for a single stage. The LED chip’s average thermal resistance was identified to be 0.28 K/W by using infrared thermography analysis.

Study on irradiation effects of nucleus electromagnetic pulse on single chip computer system

International Nuclear Information System (INIS)

Hou Minsheng; Liu Shanghe; Wang Shuping

2001-01-01

Intense electromagnetic pulse, namely nucleus electromagnetic pulse (NEMP), lightning electromagnetic pulse (LEMP) and high power microwave (HPM), can disturb and destroy the single chip computer system. To study this issue, the authors made irradiation experiments by NEMPs generated by gigahertz transversal electromagnetic (GTEM) Cell. The experiments show that shutdown, restarting, communication errors of the single chip microcomputer system would occur when it was irradiated by the NEMPs. Based on the experiments, the cause on the effects on the single chip microcomputer system is discussed

A Single-Chip CMOS Pulse Oximeter with On-Chip Lock-In Detection

Directory of Open Access Journals (Sweden)

Diwei He

2015-07-01

Full Text Available Pulse oximetry is a noninvasive and continuous method for monitoring the blood oxygen saturation level. This paper presents the design and testing of a single-chip pulse oximeter fabricated in a 0.35 µm CMOS process. The chip includes photodiode, transimpedance amplifier, analogue band-pass filters, analogue-to-digital converters, digital signal processor and LED timing control. The experimentally measured AC and DC characteristics of individual circuits including the DC output voltage of the transimpedance amplifier, transimpedance gain of the transimpedance amplifier, and the central frequency and bandwidth of the analogue band-pass filters, show a good match (within 1% with the circuit simulations. With modulated light source and integrated lock-in detection the sensor effectively suppresses the interference from ambient light and 1/f noise. In a breath hold and release experiment the single chip sensor demonstrates consistent and comparable performance to commercial pulse oximetry devices with a mean of 1.2% difference. The single-chip sensor enables a compact and robust design solution that offers a route towards wearable devices for health monitoring.

A Single-Chip CMOS Pulse Oximeter with On-Chip Lock-In Detection.

Science.gov (United States)

He, Diwei; Morgan, Stephen P; Trachanis, Dimitrios; van Hese, Jan; Drogoudis, Dimitris; Fummi, Franco; Stefanni, Francesco; Guarnieri, Valerio; Hayes-Gill, Barrie R

2015-07-14

Pulse oximetry is a noninvasive and continuous method for monitoring the blood oxygen saturation level. This paper presents the design and testing of a single-chip pulse oximeter fabricated in a 0.35 µm CMOS process. The chip includes photodiode, transimpedance amplifier, analogue band-pass filters, analogue-to-digital converters, digital signal processor and LED timing control. The experimentally measured AC and DC characteristics of individual circuits including the DC output voltage of the transimpedance amplifier, transimpedance gain of the transimpedance amplifier, and the central frequency and bandwidth of the analogue band-pass filters, show a good match (within 1%) with the circuit simulations. With modulated light source and integrated lock-in detection the sensor effectively suppresses the interference from ambient light and 1/f noise. In a breath hold and release experiment the single chip sensor demonstrates consistent and comparable performance to commercial pulse oximetry devices with a mean of 1.2% difference. The single-chip sensor enables a compact and robust design solution that offers a route towards wearable devices for health monitoring.

Optimization of high frequency flip-chip interconnects for digital superconducting circuits

International Nuclear Information System (INIS)

Rafique, M R; Engseth, H; Kidiyarova-Shevchenko, A

2006-01-01

This paper presents the results of theoretical optimization of the multi-chip-module (MCM) contact and driver circuitries for gigabit chip-to-chip communication. Optimization has been done using 3D electromagnetic (EM) simulations of MCM contacts and time domain simulations of drivers and receivers. A single optimized MCM contact has a signal reflection of less than -20 dB for more than 400 GHz bandwidth. The MCM data link with the optimized SFQ driver, receiver and two MCM contacts has operational margins on the global bias current of ± 30% at 30 Gbit s -1 speedand can operate above 100 Gbit s -1 speed. Wide bandwidth transmission requires the realization of an advanced flip-chip process with a small dimension of the MCM contact (less than 30 μm diameter of the contact pad) and small height of the flip-chip contact bumps of the order of 2 μm. Current processes with about 7 μm height of the bumps require the application of a double-flux-quantum (DFQ) driver. The data link with the DFQ driver was also simulated. It has operational margins on the global bias current of ± 30% at 30 Gbit s -1 ; however, the maximum speed of operation is 61 Gbit s -1 . Several test structures have been designed for measurements of signal reflection, bit error rate and operational margins of the data link

A Single-Chip Solar Energy Harvesting IC Using Integrated Photodiodes for Biomedical Implant Applications.

Science.gov (United States)

Chen, Zhiyuan; Law, Man-Kay; Mak, Pui-In; Martins, Rui P

2017-02-01

In this paper, an ultra-compact single-chip solar energy harvesting IC using on-chip solar cell for biomedical implant applications is presented. By employing an on-chip charge pump with parallel connected photodiodes, a 3.5 × efficiency improvement can be achieved when compared with the conventional stacked photodiode approach to boost the harvested voltage while preserving a single-chip solution. A photodiode-assisted dual startup circuit (PDSC) is also proposed to improve the area efficiency and increase the startup speed by 77%. By employing an auxiliary charge pump (AQP) using zero threshold voltage (ZVT) devices in parallel with the main charge pump, a low startup voltage of 0.25 V is obtained while minimizing the reversion loss. A 4 V in gate drive voltage is utilized to reduce the conduction loss. Systematic charge pump and solar cell area optimization is also introduced to improve the energy harvesting efficiency. The proposed system is implemented in a standard 0.18- [Formula: see text] CMOS technology and occupies an active area of 1.54 [Formula: see text]. Measurement results show that the on-chip charge pump can achieve a maximum efficiency of 67%. With an incident power of 1.22 [Formula: see text] from a halogen light source, the proposed energy harvesting IC can deliver an output power of 1.65 [Formula: see text] at 64% charge pump efficiency. The chip prototype is also verified using in-vitro experiment.

Experimental single-chip color HDTV image acquisition system with 8M-pixel CMOS image sensor

Science.gov (United States)

Shimamoto, Hiroshi; Yamashita, Takayuki; Funatsu, Ryohei; Mitani, Kohji; Nojiri, Yuji

2006-02-01

We have developed an experimental single-chip color HDTV image acquisition system using 8M-pixel CMOS image sensor. The sensor has 3840 × 2160 effective pixels and is progressively scanned at 60 frames per second. We describe the color filter array and interpolation method to improve image quality with a high-pixel-count single-chip sensor. We also describe an experimental image acquisition system we used to measured spatial frequency characteristics in the horizontal direction. The results indicate good prospects for achieving a high quality single chip HDTV camera that reduces pseudo signals and maintains high spatial frequency characteristics within the frequency band for HDTV.

Cost-effective, compact and high-speed integrable multi-mode interference modulator

NARCIS (Netherlands)

Lenstra, Daan; Yao, Weiming; Cardarelli, Simone; Mink, Jan

2017-01-01

Theoretical analysis of the modulation performance of this wave-guide device shows great potential when combined with a single-mode laser on a monolithic optical chip. On the basis of the reversed-bias electro-optic effect, modulation speeds surmounting 25 Gbit/s with 10 dB extinction ratio are

Single-chip CMUT-on-CMOS front-end system for real-time volumetric IVUS and ICE imaging.

Science.gov (United States)

Gurun, Gokce; Tekes, Coskun; Zahorian, Jaime; Xu, Toby; Satir, Sarp; Karaman, Mustafa; Hasler, Jennifer; Degertekin, F Levent

2014-02-01

Intravascular ultrasound (IVUS) and intracardiac echography (ICE) catheters with real-time volumetric ultrasound imaging capability can provide unique benefits to many interventional procedures used in the diagnosis and treatment of coronary and structural heart diseases. Integration of capacitive micromachined ultrasonic transducer (CMUT) arrays with front-end electronics in single-chip configuration allows for implementation of such catheter probes with reduced interconnect complexity, miniaturization, and high mechanical flexibility. We implemented a single-chip forward-looking (FL) ultrasound imaging system by fabricating a 1.4-mm-diameter dual-ring CMUT array using CMUT-on-CMOS technology on a front-end IC implemented in 0.35-μm CMOS process. The dual-ring array has 56 transmit elements and 48 receive elements on two separate concentric annular rings. The IC incorporates a 25-V pulser for each transmitter and a low-noise capacitive transimpedance amplifier (TIA) for each receiver, along with digital control and smart power management. The final shape of the silicon chip is a 1.5-mm-diameter donut with a 430-μm center hole for a guide wire. The overall front-end system requires only 13 external connections and provides 4 parallel RF outputs while consuming an average power of 20 mW. We measured RF A-scans from the integrated single- chip array which show full functionality at 20.1 MHz with 43% fractional bandwidth. We also tested and demonstrated the image quality of the system on a wire phantom and an ex vivo chicken heart sample. The measured axial and lateral point resolutions are 92 μm and 251 μm, respectively. We successfully acquired volumetric imaging data from the ex vivo chicken heart at 60 frames per second without any signal averaging. These demonstrative results indicate that single-chip CMUT-on-CMOS systems have the potential to produce realtime volumetric images with image quality and speed suitable for catheter-based clinical applications.

Single-mode temperature and polarisation-stable high-speed 850nm vertical cavity surface emitting lasers

International Nuclear Information System (INIS)

Nazaruk, D E; Blokhin, S A; Maleev, N A; Bobrov, M A; Pavlov, M M; Kulagina, M M; Vashanova, K A; Zadiranov, Yu M; Ustinov, V M; Kuzmenkov, A G; Vasil'ev, A P; Gladyshev, A G; Blokhin, A A; Salut, 7 Larina Str, N Novgorod, 603950 (Russian Federation))" data-affiliation=" (JSV Salut, 7 Larina Str, N Novgorod, 603950 (Russian Federation))" >Fefelov, A G

2014-01-01

A new intracavity-contacted design to realize temperature and polarization-stable high-speed single-mode 850 nm vertical cavity surface emitting lasers (VCSELs) grown by molecular-beam epitaxy is proposed. Temperature dependences of static and dynamic characteristics of the 4.5 pm oxide aperture InGaAlAs VCSEL were investigated in detail. Due to optimal gain-cavity detuning and enhanced carrier localization in the active region the threshold current remains below 0.75 mA for the temperature range within 20-90°C, while the output power exceeds 1 mW up to 90°C. Single-mode operation with side-mode suppression ratio higher than 30 dB and orthogonal polarization suppression ratio more than 18 dB was obtained in the whole current and temperature operation range. Device demonstrates serial resistance less than 250 Ohm, which is rather low for any type of single-mode short- wavelength VCSELs. VCSEL demonstrates temperature robust high-speed operation with modulation bandwidth higher than 13 GHz in the entire temperature range of 20-90°C. Despite high resonance frequency the high-speed performance of developed VCSELs was limited by the cut-off frequency of the parasitic low pass filter created by device resistances and capacitances. The proposed design is promising for single-mode high-speed VCSEL applications in a wide spectral range

Ultrahigh-speed Si-integrated on-chip laser with tailored dynamic characteristics

DEFF Research Database (Denmark)

Park, Gyeong Cheol; Xue, Weiqi; Piels, Molly

2016-01-01

-pumped compact optical feedback structure can be realised, which together tailor the frequency response function for achieving a very high speed at low injection currents. Furthermore, light can be emitted laterally into a Si waveguide. From an 1.54-μm optically-pumped laser, a 3-dB frequency of 27 GHz...... was obtained at a pumping level corresponding to sub-mA. Using measured 3-dB frequen-cies and calculated equivalent currents, the modulation current efficiency factor (MCEF) is estimated to be 42.1 GHz/mA(1/2), which is superior among microcavity lasers. This shows a high potential for a very high speed at low......For on-chip interconnects, an ideal light source should have an ultralow energy consumption per bandwidth (operating en-ergy) as well as sufficient output power for error-free detection. Nanocavity lasers have been considered the most ideal for smaller operating energy. However, they have...

On-chip highly sensitive saliva glucose sensing using multilayer films composed of single-walled carbon nanotubes, gold nanoparticles, and glucose oxidase

Directory of Open Access Journals (Sweden)

Wenjun Zhang

2015-06-01

Full Text Available It is very important for human health to rapidly and accurately detect glucose levels in biological environments, especially for diabetes mellitus. We proposed a simple, highly sensitive, accurate, convenient, low-cost, and disposable glucose biosensor on a single chip. A working (sensor electrode, a counter electrode, and a reference electrode are integrated on a single chip through micro-fabrication. The working electrode is functionalized through a layer-by-layer (LBL assembly of single-walled carbon nanotubes (SWNTs and multilayer films composed of chitosan (CS, gold nanoparticles (GNp, and glucose oxidase (GOx to obtain high sensitivity and accuracy. The glucose sensor has following features: (1 direct electron transfer between GOx and the electrode surface; (2 on-a-chip; (3 glucose detection down to 0.1 mg/dL (5.6 μM; (4 good sensing linearity over 0.017–0.81 mM; (5 high sensitivity (61.4 μA/mM-cm2 with a small reactive area (8 mm2; (6 fast response; (7 high reproducibility and repeatability; (8 reliable and accurate saliva glucose detection. Thus, this disposable biosensor will be an alternative for real time tracking of glucose levels from body fluids, e.g. saliva, in a noninvasive, pain-free, accurate, and continuous way. In addition to being used as a disposable glucose biosensor, it also provides a suitable platform for on-chip electrochemical sensing for other chemical agents and biomolecules.

On-Chip Enucleation of Bovine Oocytes using Microrobot-Assisted Flow-Speed Control

Directory of Open Access Journals (Sweden)

Akihiko Ichikawa

2013-06-01

Full Text Available In this study, we developed a microfluidic chip with a magnetically driven microrobot for oocyte enucleation. A microfluidic system was specially designed for enucleation, and the microrobot actively controls the local flow-speed distribution in the microfluidic chip. The microrobot can adjust fluid resistances in a channel and can open or close the channel to control the flow distribution. Analytical modeling was conducted to control the fluid speed distribution using the microrobot, and the model was experimentally validated. The novelties of the developed microfluidic system are as follows: (1 the cutting speed improved significantly owing to the local fluid flow control; (2 the cutting volume of the oocyte can be adjusted so that the oocyte undergoes less damage; and (3 the nucleus can be removed properly using the combination of a microrobot and hydrodynamic forces. Using this device, we achieved a minimally invasive enucleation process. The average enucleation time was 2.5 s and the average removal volume ratio was 20%. The proposed new system has the advantages of better operation speed, greater cutting precision, and potential for repeatable enucleation.

High-speed architecture for the decoding of trellis-coded modulation

Science.gov (United States)

Osborne, William P.

1992-01-01

Since 1971, when the Viterbi Algorithm was introduced as the optimal method of decoding convolutional codes, improvements in circuit technology, especially VLSI, have steadily increased its speed and practicality. Trellis-Coded Modulation (TCM) combines convolutional coding with higher level modulation (non-binary source alphabet) to provide forward error correction and spectral efficiency. For binary codes, the current stare-of-the-art is a 64-state Viterbi decoder on a single CMOS chip, operating at a data rate of 25 Mbps. Recently, there has been an interest in increasing the speed of the Viterbi Algorithm by improving the decoder architecture, or by reducing the algorithm itself. Designs employing new architectural techniques are now in existence, however these techniques are currently applied to simpler binary codes, not to TCM. The purpose of this report is to discuss TCM architectural considerations in general, and to present the design, at the logic gate level, or a specific TCM decoder which applies these considerations to achieve high-speed decoding.

Single-Chip Computers With Microelectromechanical Systems-Based Magnetic Memory

NARCIS (Netherlands)

Carley, L. Richard; Bain, James A.; Fedder, Gary K.; Greve, David W.; Guillou, David F.; Lu, Michael S.C.; Mukherjee, Tamal; Santhanam, Suresh; Abelmann, Leon; Min, Seungook

This article describes an approach for implementing a complete computer system (CPU, RAM, I/O, and nonvolatile mass memory) on a single integrated-circuit substrate (a chip)—hence, the name "single-chip computer." The approach presented combines advances in the field of microelectromechanical

Application of single-chip microcomputer in radiation detection

International Nuclear Information System (INIS)

Zhang Songshou

1993-01-01

The single-chip microcomputer has some advantages in many aspects for example the strong function, the small volume, the low-power, firmed and reliable. It is used widely in the control of industry, instrument, communication and machine, etc.. The paper introduces that the single-chip microcomputer is used in radiation detection, mostly including the use of control, linear, compensation, calculation, prefabricated change, improving precision and training

Design of Water Temperature Control System Based on Single Chip Microcomputer

Science.gov (United States)

Tan, Hanhong; Yan, Qiyan

2017-12-01

In this paper, we mainly introduce a multi-function water temperature controller designed with 51 single-chip microcomputer. This controller has automatic and manual water, set the water temperature, real-time display of water and temperature and alarm function, and has a simple structure, high reliability, low cost. The current water temperature controller on the market basically use bimetal temperature control, temperature control accuracy is low, poor reliability, a single function. With the development of microelectronics technology, monolithic microprocessor function is increasing, the price is low, in all aspects of widely used. In the water temperature controller in the application of single-chip, with a simple design, high reliability, easy to expand the advantages of the function. Is based on the appeal background, so this paper focuses on the temperature controller in the intelligent control of the discussion.

Single-chip microcomputer application in nuclear radiation monitoring instruments

International Nuclear Information System (INIS)

Zhang Songshou

1994-01-01

The single-chip microcomputer has advantage in many respects i.e. multiple function, small size, low-power consumption,reliability etc. It is widely used now in industry, instrumentation, communication and machinery. The author introduced usage of single-chip microcomputer in nuclear radiation monitoring instruments for control, linear compensation, calculation, changeable parameter presetting and military training

The single chip microcomputer technique in an intelligent nuclear instrument

International Nuclear Information System (INIS)

Wang Tieliu; Sun Punan; Wang Ying

1995-01-01

The authors present that how to acquire and process the output signals from the nuclear detector adopting single chip microcomputer technique, including working principles and the designing method of the computer's software and hardware in the single chip microcomputer instrument

Generation, transmission, and detection of terahertz photons on an electrically driven single chip

Energy Technology Data Exchange (ETDEWEB)

Ikushima, Kenji; Ito, Atsushi; Okano, Shun [Department of Applied Physics, Tokyo University of Agriculture and Technology, 2-24-16 Nakacho, Koganei, Tokyo 184-8588 (Japan)

2014-02-03

We demonstrate single photon counting of terahertz (THz) waves transmitted from a local THz point source through a coplanar two-wire waveguide on a GaAs/AlGaAs single heterostructure crystal. In the electrically driven all-in-one chip, quantum Hall edge transport is used to achieve a noiseless injection current for a monochromatic point source of THz fields. The local THz fields are coupled to a coplanar two-wire metal waveguide and transmitted over a macroscopic scale greater than the wavelength (38 μm in GaAs). THz waves propagating on the waveguide are counted as individual photons by a quantum-dot single-electron transistor on the same chip. Photon counting on integrated high-frequency circuits will open the possibilities for on-chip quantum optical experiments.

Single-Photon Tracking for High-Speed Vision

Directory of Open Access Journals (Sweden)

Istvan Gyongy

2018-01-01

Full Text Available Quanta Imager Sensors provide photon detections at high frame rates, with negligible read-out noise, making them ideal for high-speed optical tracking. At the basic level of bit-planes or binary maps of photon detections, objects may present limited detail. However, through motion estimation and spatial reassignment of photon detections, the objects can be reconstructed with minimal motion artefacts. We here present the first demonstration of high-speed two-dimensional (2D tracking and reconstruction of rigid, planar objects with a Quanta Image Sensor, including a demonstration of depth-resolved tracking.

Distributed Processing Using Single-chip Microcomputers

National Research Council Canada - National Science Library

Pritchett, William

1996-01-01

This project investigates the use of single-chip microprocessors as nodes in a token ring control network and explores the implementation of a protocol to manage communication across such a network...

A High-Speed Design of Montgomery Multiplier

Science.gov (United States)

Fan, Yibo; Ikenaga, Takeshi; Goto, Satoshi

With the increase of key length used in public cryptographic algorithms such as RSA and ECC, the speed of Montgomery multiplication becomes a bottleneck. This paper proposes a high speed design of Montgomery multiplier. Firstly, a modified scalable high-radix Montgomery algorithm is proposed to reduce critical path. Secondly, a high-radix clock-saving dataflow is proposed to support high-radix operation and one clock cycle delay in dataflow. Finally, a hardware-reused architecture is proposed to reduce the hardware cost and a parallel radix-16 design of data path is proposed to accelerate the speed. By using HHNEC 0.25μm standard cell library, the implementation results show that the total cost of Montgomery multiplier is 130 KGates, the clock frequency is 180MHz and the throughput of 1024-bit RSA encryption is 352kbps. This design is suitable to be used in high speed RSA or ECC encryption/decryption. As a scalable design, it supports any key-length encryption/decryption up to the size of on-chip memory.

A Single-Chip CMOS Pulse Oximeter with On-Chip Lock-In Detection

OpenAIRE

Diwei He; Stephen P. Morgan; Dimitrios Trachanis; Jan van Hese; Dimitris Drogoudis; Franco Fummi; Francesco Stefanni; Valerio Guarnieri; Barrie R. Hayes-Gill

2015-01-01

Pulse oximetry is a noninvasive and continuous method for monitoring the blood oxygen saturation level. This paper presents the design and testing of a single-chip pulse oximeter fabricated in a 0.35 ?m CMOS process. The chip includes photodiode, transimpedance amplifier, analogue band-pass filters, analogue-to-digital converters, digital signal processor and LED timing control. The experimentally measured AC and DC characteristics of individual circuits including the DC output voltage of the...

Residential High-Speed Internet Among Those Likely to Benefit From an Online Health Insurance Marketplace

Directory of Open Access Journals (Sweden)

Michel H. Boudreaux PhD

2016-01-01

Full Text Available Using data from the 2013 American Community Survey, we found that 24.3 million people (about 1 in 4 who were either eligible for Medicaid/Children’s Health Inusrance Program (CHIP or appeared likely to shop for Qualified Health Plan (QHP lacked residential high-speed Internet. Specifically, 28.6% or 18.9 million people eligible for Medicaid/CHIP and 17.1% or 5.5 million people who appeared likely to shop for a QHP did not have high-speed Internet in the home. For both the Medicaid/CHIP eligible and those likely to shop for a QHP, the proportion of people living in households without Internet varied substantially by race, geography, and other socio-demographic characteristics.

The Advances, Challenges and Future Possibilities of Millimeter-Wave Chip-to-Chip Interconnections for Multi-Chip Systems

Directory of Open Access Journals (Sweden)

Amlan Ganguly

2018-02-01

Full Text Available With aggressive scaling of device geometries, density of manufacturing faults is expected to increase. Therefore, yield of complex Multi-Processor Systems-on-Chips (MP-SoCs will decrease due to higher probability of manufacturing defects especially, in dies with large area. Therefore, disintegration of large SoCs into smaller chips called chiplets will improve yield and cost of complex platform-based systems. This will also provide functional flexibility, modular scalability as well as the capability to integrate heterogeneous architectures and technologies in a single unit. However, with scaling of the number of chiplets in such a system, the shared resources in the system such as the interconnection fabric and memory modules will become performance bottlenecks. Additionally, the integration of heterogeneous chiplets operating at different frequencies and voltages can be challenging. State-of-the-art inter-chip communication requires power-hungry high-speed I/O circuits and data transfer over long wired traces on substrates. This increases energy consumption and latency while decreasing data bandwidth for chip-to-chip communication. In this paper, we explore the advances and the challenges of interconnecting a multi-chip system with millimeter-wave (mm-wave wireless interconnects from a variety of perspectives spanning multiple aspects of the wireless interconnection design. Our discussion on the recent advances include aspects such as interconnection topology, physical layer, Medium Access Control (MAC and routing protocols. We also present some potential paradigm-shifting applications as well as complementary technologies of wireless inter-chip communications.

CMOS analog integrated circuits high-speed and power-efficient design

CERN Document Server

Ndjountche, Tertulien

2011-01-01

High-speed, power-efficient analog integrated circuits can be used as standalone devices or to interface modern digital signal processors and micro-controllers in various applications, including multimedia, communication, instrumentation, and control systems. New architectures and low device geometry of complementary metaloxidesemiconductor (CMOS) technologies have accelerated the movement toward system on a chip design, which merges analog circuits with digital, and radio-frequency components. CMOS: Analog Integrated Circuits: High-Speed and Power-Efficient Design describes the important tren

Research on Dynamic Torque Measurement of High Speed Rotating Axis Based on Whole Optical Fiber Technique

Energy Technology Data Exchange (ETDEWEB)

Ma, H P; Jin, Y Q; Ha, Y W; Liu, L H [Department of Automatic Measurement and Control, Harbin Institute of Technology, PO Box 305, Harbin, 150001 (China)

2006-10-15

Non-contact torque measurement system of fiber grating is proposed in this paper. It is used for the dynamic torque measurement of the rotating axis in the spaceflight servo system. Optical fiber is used as sensing probe with high sensitivity, anti-electromagnetic interference, resistance to high temperature and corrosion. It is suitable to apply in a bad environment. Signals are processed by digital circuit and Single Chip Microcomputer. This project can realize super speed dynamic measurement and it is the first time to apply the project in the spaceflight system.

Research on Dynamic Torque Measurement of High Speed Rotating Axis Based on Whole Optical Fiber Technique

Science.gov (United States)

Ma, H. P.; Jin, Y. Q.; Ha, Y. W.; Liu, L. H.

2006-10-01

Non-contact torque measurement system of fiber grating is proposed in this paper. It is used for the dynamic torque measurement of the rotating axis in the spaceflight servo system. Optical fiber is used as sensing probe with high sensitivity, anti-electromagnetic interference, resistance to high temperature and corrosion. It is suitable to apply in a bad environment. Signals are processed by digital circuit and Single Chip Microcomputer. This project can realize super speed dynamic measurement and it is the first time to apply the project in the spaceflight system.

Research on Dynamic Torque Measurement of High Speed Rotating Axis Based on Whole Optical Fiber Technique

International Nuclear Information System (INIS)

Ma, H P; Jin, Y Q; Ha, Y W; Liu, L H

2006-01-01

Non-contact torque measurement system of fiber grating is proposed in this paper. It is used for the dynamic torque measurement of the rotating axis in the spaceflight servo system. Optical fiber is used as sensing probe with high sensitivity, anti-electromagnetic interference, resistance to high temperature and corrosion. It is suitable to apply in a bad environment. Signals are processed by digital circuit and Single Chip Microcomputer. This project can realize super speed dynamic measurement and it is the first time to apply the project in the spaceflight system

Impact of high-pressure coolant supply on chip formation in milling

Science.gov (United States)

Klocke, F.; Döbbeler, B.; Lakner, T.

2017-10-01

Machining of titanium alloys is considered as difficult, because of their high temperature strength, low thermal conductivity and low E-modulus, which contributes to high mechanical loads and high temperatures in the contact zone between tool and workpiece. The generated heat in the cutting zone can be dissipated only in a low extent. When cutting steel materials, up to 75% of the process heat is transported away by the chips, contrary to only 25% when machining titanium alloys. As a result, the cutting tool heats up, which leads to high tool wear. Therefore, machining of titanium alloys is only possible with relatively low cutting speeds. This leads to low levels of productivity for milling processes with titanium alloys. One way to increase productivity is to use more cutting edges in tools with the same diameter. However, the limiting factor of adding more cutting edges to a milling tool is the minimum size of the chip spaces, which are sufficient for a stable chip evacuation. This paper presents experimental results on the chip formation and chip size influenced by high-pressure coolant supply, which can lead to smaller chips and to smaller sizes of the chip spaces, respectively. Both influences, the pressure of the supplied coolant and the volumetric flow rate were individually examined. Alpha-beta annealed titanium TiAl6V4 was examined in relation to the reference material quenched and tempered steel 42CrMo4+QT (AISI 4140+QT). The work shows that with proper chip control due to high-pressure coolant supply in milling, the number of cutting edges on the same diameter tool can be increased, which leads to improved productivity.

Toyota's new single-chip microcomputer based engine and transmission control system

Energy Technology Data Exchange (ETDEWEB)

Kawamura, T.; Kawai, M.; Aoki, K.; Tamaki, K.; Sugawara, M.

1985-01-01

Toyota succeeded in the fall of 1984 in manufacturing a complex engine and transmission control system using a newly developed single-chip microcomputer. This microcomputer, equipped with an 8K-byte ROM (Read Only Memory) and a 256-byte RAM (Random Access Memory), a powerful real time processing function, and a high-speed optimum instruction set, is better suited for automobiles. Application of the latest CMOS technology has enabled lower power consumption and improved noise immunity. The new system, which includes a new function; the electronic spark advance with knock control in addition to the conventional sophisticated system, has greatly improved the performance and driveability of vehicles. The newly designed electronic control unit (ECU) has been greatly improved in reliability and has not changed in its size with the adoption of the highly integrated new microcomputer, which is due to the fact that it uses fewer LSIs (Large Scale Integrated circuits) than the conventional ECU, although it includes the great additional function.

A Low Cost Single Chip VDL Compatible Transceiver ASIC

Science.gov (United States)

Becker, Robert

2004-01-01

Recent trends in commercial communications system components have focussed almost exclusively on cellular telephone technology. As many of the traditional sources of receiver components have discontinued non-cellular telephone products, the designers of avionics and other low volume radio applications find themselves increasingly unable to find highly integrated components. This is particularly true for low power, low cost applications which cannot afford the lavish current consumption of the software defined radio approach increasingly taken by certified device manufacturers. In this paper, we describe a low power transceiver chip targeting applications from low VHF to low UHF frequencies typical of avionics systems. The chip encompasses a selectable single or double conversion design for the receiver and a low power IF upconversion transmitter. All local oscillators are synthesized and integrated into the chip. An on-chip I-Q modulator and demodulator provide baseband modulation and demodulation capability allowing the use of low power, fixed point signal processing components for signal demodulation. The goal of this program is to demonstrate a low cost VDL mode-3 transceiver using this chip to receive text weather information sent using 4-slot TDMA with no support for voice. The data will be sent from an experimental ground station. This work is funded by NASA Glenn Research Center.

Residential High-Speed Internet Among Those Likely to Benefit From an Online Health Insurance Marketplace.

Science.gov (United States)

Boudreaux, Michel H; Gonzales, Gilbert; Blewett, Lynn; Fried, Brett; Karaca-Mandic, Pinar

2016-01-01

Using data from the 2013 American Community Survey, we found that 24.3 million people (about 1 in 4) who were either eligible for Medicaid/Children's Health Insurance Program (CHIP) or appeared likely to shop for Qualified Health Plan (QHP) lacked residential high-speed Internet. Specifically, 28.6% or 18.9 million people eligible for Medicaid/CHIP and 17.1% or 5.5 million people who appeared likely to shop for a QHP did not have high-speed Internet in the home. For both the Medicaid/CHIP eligible and those likely to shop for a QHP, the proportion of people living in households without Internet varied substantially by race, geography, and other socio-demographic characteristics. © The Author(s) 2016.

X-CHIP: an integrated platform for high-throughput protein crystallization and on-the-chip X-ray diffraction data collection

International Nuclear Information System (INIS)

Kisselman, Gera; Qiu, Wei; Romanov, Vladimir; Thompson, Christine M.; Lam, Robert; Battaile, Kevin P.; Pai, Emil F.; Chirgadze, Nickolay Y.

2011-01-01

The X-CHIP (X-ray Crystallography High-throughput Integrated Platform) is a novel microchip that has been developed to combine multiple steps of the crystallographic pipeline from crystallization to diffraction data collection on a single device to streamline the entire process. The X-CHIP (X-ray Crystallization High-throughput Integrated Platform) is a novel microchip that has been developed to combine multiple steps of the crystallographic pipeline from crystallization to diffraction data collection on a single device to streamline the entire process. The system has been designed for crystallization condition screening, visual crystal inspection, initial X-ray screening and data collection in a high-throughput fashion. X-ray diffraction data acquisition can be performed directly on-the-chip at room temperature using an in situ approach. The capabilities of the chip eliminate the necessity for manual crystal handling and cryoprotection of crystal samples, while allowing data collection from multiple crystals in the same drop. This technology would be especially beneficial for projects with large volumes of data, such as protein-complex studies and fragment-based screening. The platform employs hydrophilic and hydrophobic concentric ring surfaces on a miniature plate transparent to visible light and X-rays to create a well defined and stable microbatch crystallization environment. The results of crystallization and data-collection experiments demonstrate that high-quality well diffracting crystals can be grown and high-resolution diffraction data sets can be collected using this technology. Furthermore, the quality of a single-wavelength anomalous dispersion data set collected with the X-CHIP at room temperature was sufficient to generate interpretable electron-density maps. This technology is highly resource-efficient owing to the use of nanolitre-scale drop volumes. It does not require any modification for most in-house and synchrotron beamline systems and offers

X-CHIP: an integrated platform for high-throughput protein crystallization and on-the-chip X-ray diffraction data collection

Energy Technology Data Exchange (ETDEWEB)

Kisselman, Gera; Qiu, Wei; Romanov, Vladimir; Thompson, Christine M.; Lam, Robert [Ontario Cancer Institute, Princess Margaret Hospital, University Health Network, Toronto, Ontario M5G 2C4 (Canada); Battaile, Kevin P. [Argonne National Laboratory, Argonne, Illinois 60439 (United States); Pai, Emil F.; Chirgadze, Nickolay Y., E-mail: nchirgad@uhnresearch.ca [Ontario Cancer Institute, Princess Margaret Hospital, University Health Network, Toronto, Ontario M5G 2C4 (Canada); University of Toronto, Toronto, Ontario M5S 1A8 (Canada)

2011-06-01

The X-CHIP (X-ray Crystallography High-throughput Integrated Platform) is a novel microchip that has been developed to combine multiple steps of the crystallographic pipeline from crystallization to diffraction data collection on a single device to streamline the entire process. The X-CHIP (X-ray Crystallization High-throughput Integrated Platform) is a novel microchip that has been developed to combine multiple steps of the crystallographic pipeline from crystallization to diffraction data collection on a single device to streamline the entire process. The system has been designed for crystallization condition screening, visual crystal inspection, initial X-ray screening and data collection in a high-throughput fashion. X-ray diffraction data acquisition can be performed directly on-the-chip at room temperature using an in situ approach. The capabilities of the chip eliminate the necessity for manual crystal handling and cryoprotection of crystal samples, while allowing data collection from multiple crystals in the same drop. This technology would be especially beneficial for projects with large volumes of data, such as protein-complex studies and fragment-based screening. The platform employs hydrophilic and hydrophobic concentric ring surfaces on a miniature plate transparent to visible light and X-rays to create a well defined and stable microbatch crystallization environment. The results of crystallization and data-collection experiments demonstrate that high-quality well diffracting crystals can be grown and high-resolution diffraction data sets can be collected using this technology. Furthermore, the quality of a single-wavelength anomalous dispersion data set collected with the X-CHIP at room temperature was sufficient to generate interpretable electron-density maps. This technology is highly resource-efficient owing to the use of nanolitre-scale drop volumes. It does not require any modification for most in-house and synchrotron beamline systems and offers

Development of a Metal Cutting Tool Fase in Order to Create the Conditions of Ringed Chips Wrapping

OpenAIRE

Korchuganova, Mariya Anatolievna; Syrbakov, Andrey Pavlovich; Chernysheva, Tatiana Yurievna; Ivanov, G.; Korchuganov, Maksim Anatolievich

2016-01-01

When processing ductile metals with high cutting speed, there is a need to take additional measures for a comfortable and safe formation and removal of chips. In the conditions of large-scale manufacture, it is recommended to produce flow chips in the form of short fragments, while in the conditions of small-lot and single-piece manufacture, it is reasonable to wrap the chips spirally with a rather small turn radius. Such way of chips formation reduces the time of its removal from the working...

An Analysis of an Ultra-High Speed Content-Addressable Database Retrieval System

National Research Council Canada - National Science Library

Costianes, Peter

2001-01-01

...) and its implementation as a high speed optical chip. The paradigm uses polarization states to represent binary very words and EO modulators to represent database words to perform what is essentially XOR operations...

Full-field parallel interferometry coherence probe microscope for high-speed optical metrology.

Science.gov (United States)

Safrani, A; Abdulhalim, I

2015-06-01

Parallel detection of several achromatic phase-shifted images is used to obtain a high-speed, high-resolution, full-field, optical coherence probe tomography system based on polarization interferometry. The high enface imaging speed, short coherence gate, and high lateral resolution provided by the system are exploited to determine microbump height uniformity in an integrated semiconductor chip at 50 frames per second. The technique is demonstrated using the Linnik microscope, although it can be implemented on any polarization-based interference microscopy system.

Quantitation of ultraviolet-induced single-strand breaks using oligonucleotide chip

International Nuclear Information System (INIS)

Pal, Sukdeb; Kim, Min Jung; Choo, Jaebum; Kang, Seong Ho; Lee, Kyeong-Hee; Song, Joon Myong

2008-01-01

A simple, accurate and robust methodology was established for the direct quantification of ultraviolet (UV)-induced single-strand break (SSB) using oligonucleotide chip. Oligonucleotide chips were fabricated by covalently anchoring the fluorescent-labeled ssDNAs onto silicon dioxide chip surfaces. Assuming that the possibility of more than one UV-induced SSB to be generated in a small oligonucleotide is extremely low, SSB formation was investigated quantifying the endpoint probe density by fluorescence measurement upon UV irradiation. The SSB yields obtained based on the highly sensitive laser-induced fluorometric determination of fluorophore-labeled oligonucleotides were found to coincide well with that predicted from a theoretical extrapolation of the results obtained for plasmid DNAs using conventional agarose gel electrophoresis. The developed method has the potential to serve as a high throughput, sample-thrifty, and time saving tool to realize more realistic, and direct quantification of radiation and chemical-induced strand breaks. It will be especially useful for determining the frequency of SSBs or lesions convertible to SSBs by specific cleaving reagents or enzymes

A novel conductive-polymer-based integration process for high-performance flip-chip packages

Science.gov (United States)

Lohokare, Saurabh

Conductive polymers have recently attracted considerable attention for low-temperature fabrication of lead-free, reworkable, and flexible flip-chip interconnects. Using these materials, I demonstrate in this thesis a process that enables low-cost and high-resolution flip-chip interconnects using conventional micro-fabrication techniques. This fabrication process offers improved performance as compared to conventional flip-chip techniques, such as screen-printing, and allows for definition of interconnects with excellent surface uniformity and control over the bump profile. In order to demonstrate the utility and wide applicability of this process, several test implementations that serve as case studies were investigated. Specifically, novel InGaAsSb avalanche photodiodes (APDs), operating around lambda = 2m and targeted for free-space communication and biomedical spectroscopy applications, were fabricated and flip-chip-integrated to test the static electrical characteristics of the polymer bumps. Additionally, the dynamic electrical performance characteristics of the polymer bumps were studied by using AlGaAsSb/AlGaSb p-i-n photodetectors as a case study. The fabrication of these photodetectors, operating around lambda = 1.55mum and targeted for optical communication applications, was accomplished using a customized inductively coupled plasma (ICP) etch process that resulted in a low dark current and excellent speed (3dB bandwidth of 10GHz) and, responsivity (60% external quantum efficiency) characteristics. Furthermore, flip-chip integration was used to demonstrate a three-dimensional, point-to-point micro-optical interconnect, which was 2.33mm-long in a system 15.27mm3 in volume. Lastly, high-speed parallel optical interconnects were demonstrated using polymer-flip-chip-integrated 10GHz vertical-cavity surface-emitting laser (VCSEL) and DOEs. Such interconnects offer the ability to alleviate the communication bottleneck that is projected to occur in future, high

Holistic design in high-speed optical interconnects

Science.gov (United States)

Saeedi, Saman

Integrated circuit scaling has enabled a huge growth in processing capability, which necessitates a corresponding increase in inter-chip communication bandwidth. As bandwidth requirements for chip-to-chip interconnection scale, deficiencies of electrical channels become more apparent. Optical links present a viable alternative due to their low frequency-dependent loss and higher bandwidth density in the form of wavelength division multiplexing. As integrated photonics and bonding technologies are maturing, commercialization of hybrid-integrated optical links are becoming a reality. Increasing silicon integration leads to better performance in optical links but necessitates a corresponding co-design strategy in both electronics and photonics. In this light, holistic design of high-speed optical links with an in-depth understanding of photonics and state-of-the-art electronics brings their performance to unprecedented levels. This thesis presents developments in high-speed optical links by co-designing and co-integrating the primary elements of an optical link: receiver, transmitter, and clocking. In the first part of this thesis a 3D-integrated CMOS/Silicon-photonic receiver will be presented. The electronic chip features a novel design that employs a low-bandwidth TIA front-end, double-sampling and equalization through dynamic offset modulation. Measured results show -14.9dBm of sensitivity and energy eciency of 170fJ/b at 25Gb/s. The same receiver front-end is also used to implement source-synchronous 4-channel WDM-based parallel optical receiver. Quadrature ILO-based clocking is employed for synchronization and a novel frequency-tracking method that exploits the dynamics of IL in a quadrature ring oscillator to increase the effective locking range. An adaptive body-biasing circuit is designed to maintain the per-bit-energy consumption constant across wide data-rates. The prototype measurements indicate a record-low power consumption of 153fJ/b at 32Gb/s. The

A design of a high speed dual spectrometer by single line scan camera

Science.gov (United States)

Palawong, Kunakorn; Meemon, Panomsak

2018-03-01

A spectrometer that can capture two orthogonal polarization components of s light beam is demanded for polarization sensitive imaging system. Here, we describe the design and implementation of a high speed spectrometer for simultaneous capturing of two orthogonal polarization components, i.e. vertical and horizontal components, of light beam. The design consists of a polarization beam splitter, two polarization-maintain optical fibers, two collimators, a single line-scan camera, a focusing lens, and a reflection blaze grating. The alignment of two beam paths was designed to be symmetrically incident on the blaze side and reverse blaze side of reflection grating, respectively. The two diffracted beams were passed through the same focusing lens and focused on the single line-scan sensors of a CMOS camera. The two spectra of orthogonal polarization were imaged on 1000 pixels per spectrum. With the proposed setup, the amplitude and shape of the two detected spectra can be controlled by rotating the collimators. The technique for optical alignment of spectrometer will be presented and discussed. The two orthogonal polarization spectra can be simultaneously captured at a speed of 70,000 spectra per second. The high speed dual spectrometer can simultaneously detected two orthogonal polarizations, which is an important component for the development of polarization-sensitive optical coherence tomography. The performance of the spectrometer have been measured and analyzed.

A single-chip computer analysis system for liquid fluorescence

International Nuclear Information System (INIS)

Zhang Yongming; Wu Ruisheng; Li Bin

1998-01-01

The single-chip computer analysis system for liquid fluorescence is an intelligent analytic instrument, which is based on the principle that the liquid containing hydrocarbons can give out several characteristic fluorescences when irradiated by strong light. Besides a single-chip computer, the system makes use of the keyboard and the calculation and printing functions of a CASIO printing calculator. It combines optics, mechanism and electronics into one, and is small, light and practical, so it can be used for surface water sample analysis in oil field and impurity analysis of other materials

X-ray quality increasing system controlled by single-chip microcomputer in single phase fluoroscopy unit

International Nuclear Information System (INIS)

Wang Qiaolin; Gu Hongmei

2004-01-01

Objective: To decrease the amount of radiation that doctor and patient receives by increasing X-ray quality. Methods: Using Single-chip Microcomputer technology, test and modulate AC(Alternating Current) from high voltage generator by IGBT. X-ray tube generates X-rays only at high energy area. Thus the amount of radiation decreases. Results: The tube current decreases remarkably and the amount of radiation that doctor and patient receives decreases effectively. Conclusion: the system can effectively decrease the amount of radiation and is widely applicable to the upgrade of all kinds of single phase X-ray units. (authors)

Comparison of microrings and microdisks for high-speed optical modulation in silicon photonics

Science.gov (United States)

Ying, Zhoufeng; Wang, Zheng; Zhao, Zheng; Dhar, Shounak; Pan, David Z.; Soref, Richard; Chen, Ray T.

2018-03-01

The past several decades have witnessed the gradual transition from electrical to optical interconnects, ranging from long-haul telecommunication to chip-to-chip interconnects. As one type of key component in integrated optical interconnect and high-performance computing, optical modulators have been well developed these past few years, including ultrahigh-speed microring and microdisk modulators. In this paper, a comparison between microring and microdisk modulators is well analyzed in terms of dimensions, static and dynamic power consumption, and fabrication tolerance. The results show that microdisks have advantages over microrings in these aspects, which gives instructions to the chip design of high-density integrated systems for optical interconnects and optical computing.

The Charging Process in a High-speed, Single-cylinder, Four-stroke Engine

Science.gov (United States)

Reynolds, Blake; Schecter, Harry; Taylor, E S

1939-01-01

Experimental measurements and theoretical calculations were made on an aircraft-type, single cylinder engine, in order to determine the physical nature of the inlet process, especially at high piston speeds. The engine was run at speeds from 1,500 to 2,600 r.p.m. (mean piston speeds of 1,370 to 2,380 feet per minute). Measurements were made of the cylinder pressure during the inlet stroke and of the power output and volumetric efficiency. Measurements were also made, with the engine not running, to determine the resistance and mass of air in the inlet valve port at various crank angles. Results of analysis indicate that mass has an appreciable effect, but friction plays the major part in restricting flow. The observed fact that the volumetric efficiency is considerably less than 100 percent is attributed to thermal effects. An estimate was made of the magnitude of these effects in the present case, and their general nature is discussed.

Ultra-high-speed Optical Signal Processing using Silicon Photonics

DEFF Research Database (Denmark)

Oxenløwe, Leif Katsuo; Ji, Hua; Jensen, Asger Sellerup

with a photonic layer on top to interconnect them. For such systems, silicon is an attractive candidate enabling both electronic and photonic control. For some network scenarios, it may be beneficial to use optical on-chip packet switching, and for high data-density environments one may take advantage...... of the ultra-fast nonlinear response of silicon photonic waveguides. These chips offer ultra-broadband wavelength operation, ultra-high timing resolution and ultra-fast response, and when used appropriately offer energy-efficient switching. In this presentation we review some all-optical functionalities based...... on silicon photonics. In particular we use nano-engineered silicon waveguides (nanowires) [1] enabling efficient phasematched four-wave mixing (FWM), cross-phase modulation (XPM) or self-phase modulation (SPM) for ultra-high-speed optical signal processing of ultra-high bit rate serial data signals. We show...

A high speed dual-gain preamplifier system with multiple channels

International Nuclear Information System (INIS)

Zhao Lei; Liu Shubin; Xian Ze; An Qi

2008-01-01

In this paper, a multiple-channel high speed preamplifier module with dual-gain is presented, together with its design principle, test methods and performance parameter. By proper choice of the chips and careful circuit design, the preamplifier accomplishes a fine performance in high speed analog signal processing. The 3 dB bandwidth is above 440 MHz for gain factor of 2 and 280 MHz for gain factor of 8, with the leading edge time of less than 2 ns. The preamplifier module has been used in the research project of β-delayed neutron emission of radionuclides in neutron-rich region. (authors)

Ultra-thin silicon (UTSi) on insulator CMOS transceiver and time-division multiplexed switch chips for smart pixel integration

Science.gov (United States)

Zhang, Liping; Sawchuk, Alexander A.

2001-12-01

We describe the design, fabrication and functionality of two different 0.5 micron CMOS optoelectronic integrated circuit (OEIC) chips based on the Peregrine Semiconductor Ultra-Thin Silicon on insulator technology. The Peregrine UTSi silicon- on-sapphire (SOS) technology is a member of the silicon-on- insulator (SOI) family. The low-loss synthetic sapphire substrate is optically transparent and has good thermal conductivity and coefficient of thermal expansion properties, which meet the requirements for flip-chip bonding of VCSELs and other optoelectronic input-output components. One chip contains transceiver and network components, including four channel high-speed CMOS transceiver modules, pseudo-random bit stream (PRBS) generators, a voltage controlled oscillator (VCO) and other test circuits. The transceiver chips can operate in both self-testing mode and networking mode. An on- chip clock and true-single-phase-clock (TSPC) D-flip-flop have been designed to generate a PRBS at over 2.5 Gb/s for the high-speed transceiver arrays to operate in self-testing mode. In the networking mode, an even number of transceiver chips forms a ring network through free-space or fiber ribbon interconnections. The second chip contains four channel optical time-division multiplex (TDM) switches, optical transceiver arrays, an active pixel detector and additional test devices. The eventual applications of these chips will require monolithic OEICs with integrated optical input and output. After fabrication and testing, the CMOS transceiver array dies will be packaged with 850 nm vertical cavity surface emitting lasers (VCSELs), and metal-semiconductor- metal (MSM) or GaAs p-i-n detector die arrays to achieve high- speed optical interconnections. The hybrid technique could be either wire bonding or flip-chip bonding of the CMOS SOS smart-pixel arrays with arrays of VCSELs and photodetectors onto an optoelectronic chip carrier as a multi-chip module (MCM).

Design and Characterization of 64K Pixels Chips Working in Single Photon Processing Mode

CERN Document Server

Llopart Cudie, Xavier; Campbell, M

2007-01-01

Progress in CMOS technology and in fine pitch bump bonding has made possible the development of high granularity single photon counting detectors for X-ray imaging. This thesis studies the design and characterization of three pulse processing chips with 65536 square pixels of 55 µm x 55 µm designed in a commercial 0.25 µm 6-metal CMOS technology. The 3 chips share the same architecture and dimensions and are named Medipix2, Mpix2MXR20 and Timepix. The Medipix2 chip is a pixel detector readout chip consisting of 256 x 256 identical elements, each working in single photon counting mode for positive or negative input charge signals. The preamplifier feedback provides compensation for detector leakage current on a pixel by pixel basis. Two identical pulse height discriminators are used to define an energy window. Every event falling inside the energy window is counted with a 13 bit pseudo-random counter. The counter logic, based in a shift register, also behaves as the input/output register for the pixel. Each...

A compact PE memory for vision chips

Science.gov (United States)

Cong, Shi; Zhe, Chen; Jie, Yang; Nanjian, Wu; Zhihua, Wang

2014-09-01

This paper presents a novel compact memory in the processing element (PE) for single-instruction multiple-data (SIMD) vision chips. The PE memory is constructed with 8 × 8 register cells, where one latch in the slave stage is shared by eight latches in the master stage. The memory supports simultaneous read and write on the same address in one clock cycle. Its compact area of 14.33 μm2/bit promises a higher integration level of the processor. A prototype chip with a 64 × 64 PE array is fabricated in a UMC 0.18 μm CMOS technology. Five types of the PE memory cell structure are designed and compared. The testing results demonstrate that the proposed PE memory architecture well satisfies the requirement of the vision chip in high-speed real-time vision applications, such as 1000 fps edge extraction.

A compact PE memory for vision chips

International Nuclear Information System (INIS)

Shi Cong; Chen Zhe; Yang Jie; Wu Nanjian; Wang Zhihua

2014-01-01

This paper presents a novel compact memory in the processing element (PE) for single-instruction multiple-data (SIMD) vision chips. The PE memory is constructed with 8 × 8 register cells, where one latch in the slave stage is shared by eight latches in the master stage. The memory supports simultaneous read and write on the same address in one clock cycle. Its compact area of 14.33 μm 2 /bit promises a higher integration level of the processor. A prototype chip with a 64 × 64 PE array is fabricated in a UMC 0.18 μm CMOS technology. Five types of the PE memory cell structure are designed and compared. The testing results demonstrate that the proposed PE memory architecture well satisfies the requirement of the vision chip in high-speed real-time vision applications, such as 1000 fps edge extraction. (semiconductor integrated circuits)

Oxide-confined 2D VCSEL arrays for high-density inter/intra-chip interconnects

Science.gov (United States)

King, Roger; Michalzik, Rainer; Jung, Christian; Grabherr, Martin; Eberhard, Franz; Jaeger, Roland; Schnitzer, Peter; Ebeling, Karl J.

1998-04-01

We have designed and fabricated 4 X 8 vertical-cavity surface-emitting laser (VCSEL) arrays intended to be used as transmitters in short-distance parallel optical interconnects. In order to meet the requirements of 2D, high-speed optical links, each of the 32 laser diodes is supplied with two individual top contacts. The metallization scheme allows flip-chip mounting of the array modules junction-side down on silicon complementary metal oxide semiconductor (CMOS) chips. The optical and electrical characteristics across the arrays with device pitch of 250 micrometers are quite homogeneous. Arrays with 3 micrometers , 6 micrometers and 10 micrometers active diameter lasers have been investigated. The small devices show threshold currents of 600 (mu) A, single-mode output powers as high as 3 mW and maximum wavelength deviations of only 3 nm. The driving characteristics of all arrays are fully compatible to advanced 3.3 V CMOS technology. Using these arrays, we have measured small-signal modulation bandwidths exceeding 10 GHz and transmitted pseudo random data at 8 Gbit/s channel over 500 m graded index multimode fiber. This corresponds to a data transmission rate of 256 Gbit/s per array of 1 X 2 mm2 footprint area.

Programmable lab-on-a-chip system for single cell analysis

Science.gov (United States)

Thalhammer, S.

2009-05-01

The collection, selection, amplification and detection of minimum genetic samples became a part of everyday life in medical and biological laboratories, to analyze DNA-fragments of pathogens, patient samples and traces on crime scenes. About a decade ago, a handful of researchers began discussing an intriguing idea. Could the equipment needed for everyday chemistry and biology procedures be shrunk to fit on a chip in the size of a fingernail? Miniature devices for, say, analysing DNA and proteins should be faster and cheaper than conventional versions. Lab-on-a-chip is an advanced technology that integrates a microfluidic system on a microscale chip device. The "laboratory" is created by means of channels, mixers, reservoirs, diffusion chambers, integrated electrodes, pumps, valves and more. With lab-ona- chip technology, complete laboratories on a square centimetre can be created. Here, a multifunctional programmable Lab-on-a-Chip driven by nanofluidics and controlled by surface acoustic waves (SAW) is presented. This system combines serial DNA-isolation-, amplification- and array-detection-process on a modified glass-platform. The fluid actuation is controlled via SAW by interdigital transducers implemented in the chemical modified chip surface. The chemical surface modification allows fluid handling in the sub-microliter range. Minute amount of sample material is extracted by laser-based microdissection out of e.g. histological sections at the single cell level. A few picogram of genetic material are isolated and transferred via a low-pressure transfer system (SPATS) onto the chip. Subsequently the genetic material inside single droplets, which behave like "virtual" beaker, is transported to the reaction and analysis centers on the chip surface via surface acoustic waves, mainly known as noise dumping filters in mobile phones. At these "biological reactors" the genetic material is processed, e.g. amplified via polymerase chain reaction methods, and genetically

A new method for grain refinement in magnesium alloy: High speed extrusion machining

Energy Technology Data Exchange (ETDEWEB)

Liu, Yao, E-mail: liuyao@ustb.edu.cn [School of Mathematics and Physics, University of Science and Technology Beijing, Beijing 100083 (China); Cai, Songlin [China Electric Power Research Institute, State Grid Corporation of China, Beijing 100192 (China); Dai, Lanhong [State Key Laboratory of Nonlinear Mechanics, Institute of Mechanics, Chinese Academy of Science, Beijing 100190 (China)

2016-01-10

Magnesium alloys have received broad attentions in industry due to their competitive strength to density ratio, but the poor ductility and strength limit their wide range of applications as engineering materials. A novel severe plastic deformation (SPD) technique of high speed extrusion machining (HSEM) was used here. This method could improve the aforementioned disadvantages of magnesium alloys by one single processing step. In this work, systematic HSEM experiments with different chip thickness ratios were conducted for magnesium alloy AZ31B. The microstructure of the chips reveals that HSEM is an effective SPD method for attaining magnesium alloys with different grain sizes and textures. The magnesium alloy with bimodal grain size distribution has increased mechanical properties than initial sample. The electron backscatter diffraction (EBSD) analysis shows that the dynamic recrystallization (DRX) affects the grain refinement and resulting hardness in AZ31B. Based on the experimental observations, a new theoretical model is put forward to describe the effect of DRX on materials during HSEM. Compared with the experimental measurements, the theoretical model is effective to predict the mechanical property of materials after HSEM.

Design of high-speed data transmission system for Lanzhou heavy ion therapy accelerator

International Nuclear Information System (INIS)

Mao Wenyu; Qiao Weimin; Jing Lan; Li Guihua

2012-01-01

In order to satisfy the transmission requirements of partial synchronization data and process data for the heavy ion therapy accelerator, a high-speed, error-correction, long-distance, and real-time data transmission system was proposed and achieved. It can improve the efficiency and reliability of the accelerator control and synchronization. The system optimizes the hardware configuration and layout of the traditional system. FPGA, gigabit fiber module, PXI and SDRAM are the main parts of the system. It replaces the low-speed, short-distance, and poor anti-interference of the traditional data path and the data processing chips. Through the programming in the two FPGA chips, the PXI and DMA transmission mode was used to exchange data with the server of the accelerator. The front-end of the system achieves a real-time, long-distance, and high-speed serial frame transmission with 800 MHz carrier and 100 MHz base band signal. The real-time -data like synchronous event signal, power waveform data of the heavy ion therapy accelerator can be transmitted efficiently between the server and the remote controller through the system. (authors)

On-chip single photon filtering and multiplexing in hybrid quantum photonic circuits.

Science.gov (United States)

Elshaari, Ali W; Zadeh, Iman Esmaeil; Fognini, Andreas; Reimer, Michael E; Dalacu, Dan; Poole, Philip J; Zwiller, Val; Jöns, Klaus D

2017-08-30

Quantum light plays a pivotal role in modern science and future photonic applications. Since the advent of integrated quantum nanophotonics different material platforms based on III-V nanostructures-, colour centers-, and nonlinear waveguides as on-chip light sources have been investigated. Each platform has unique advantages and limitations; however, all implementations face major challenges with filtering of individual quantum states, scalable integration, deterministic multiplexing of selected quantum emitters, and on-chip excitation suppression. Here we overcome all of these challenges with a hybrid and scalable approach, where single III-V quantum emitters are positioned and deterministically integrated in a complementary metal-oxide-semiconductor-compatible photonic circuit. We demonstrate reconfigurable on-chip single-photon filtering and wavelength division multiplexing with a foot print one million times smaller than similar table-top approaches, while offering excitation suppression of more than 95 dB and efficient routing of single photons over a bandwidth of 40 nm. Our work marks an important step to harvest quantum optical technologies' full potential.Combining different integration platforms on the same chip is currently one of the main challenges for quantum technologies. Here, Elshaari et al. show III-V Quantum Dots embedded in nanowires operating in a CMOS compatible circuit, with controlled on-chip filtering and tunable routing.

A proposed holistic approach to on-chip, off-chip, test, and package interconnections

Science.gov (United States)

Bartelink, Dirk J.

1998-11-01

The term interconnection has traditionally implied a `robust' connection from a transistor or a group of transistors in an IC to the outside world, usually a PC board. Optimum system utilization is done from outside the IC. As an alternative, this paper addresses `unimpeded' transistor-to-transistor interconnection aimed at reaching the high circuit densities and computational capabilities of neighboring IC's. In this view, interconnections are not made to some human-centric place outside the IC world requiring robustness—except for system input and output connections. This unimpeded interconnect style is currently available only through intra-chip signal traces in `system-on-a-chip' implementations, as exemplified by embedded DRAMs. Because the traditional off-chip penalty in performance and wiring density is so large, a merging of complex process technologies is the only option today. It is suggested that, for system integration to move forward, the traditional robustness requirement inherited from conventional packaging interconnect and IC manufacturing test must be discarded. Traditional system assembly from vendor parts requires robustness under shipping, inspection and assembly. The trend toward systems on a chip signifies willingness by semiconductor companies to design and fabricate whole systems in house, so that `in-house' chip-to-chip assembly is not beyond reach. In this scenario, bare chips never leave the controlled environment of the IC fabricator while the two major contributors to off-chip signal penalty, ESD protection and the need to source a 50-ohm test head, are avoided. With in-house assembly, ESD protection can be eliminated with the precautions already familiar in plasma etching. Test interconnection impacts the fundamentals of IC manufacturing, particularly with clock speeds approaching 1GHz, and cannot be an afterthought. It should be an integral part of the chip-to-chip interconnection bandwidth optimization, because—as we must

Study of a Microfluidic Chip Integrating Single Cell Trap and 3D Stable Rotation Manipulation

Directory of Open Access Journals (Sweden)

Liang Huang

2016-08-01

Full Text Available Single cell manipulation technology has been widely applied in biological fields, such as cell injection/enucleation, cell physiological measurement, and cell imaging. Recently, a biochip platform with a novel configuration of electrodes for cell 3D rotation has been successfully developed by generating rotating electric fields. However, the rotation platform still has two major shortcomings that need to be improved. The primary problem is that there is no on-chip module to facilitate the placement of a single cell into the rotation chamber, which causes very low efficiency in experiment to manually pipette single 10-micron-scale cells into rotation position. Secondly, the cell in the chamber may suffer from unstable rotation, which includes gravity-induced sinking down to the chamber bottom or electric-force-induced on-plane movement. To solve the two problems, in this paper we propose a new microfluidic chip with manipulation capabilities of single cell trap and single cell 3D stable rotation, both on one chip. The new microfluidic chip consists of two parts. The top capture part is based on the least flow resistance principle and is used to capture a single cell and to transport it to the rotation chamber. The bottom rotation part is based on dielectrophoresis (DEP and is used to 3D rotate the single cell in the rotation chamber with enhanced stability. The two parts are aligned and bonded together to form closed channels for microfluidic handling. Using COMSOL simulation and preliminary experiments, we have verified, in principle, the concept of on-chip single cell traps and 3D stable rotation, and identified key parameters for chip structures, microfluidic handling, and electrode configurations. The work has laid a solid foundation for on-going chip fabrication and experiment validation.

On-chip plasmon-induced transparency based on plasmonic coupled nanocavities.

Science.gov (United States)

Zhu, Yu; Hu, Xiaoyong; Yang, Hong; Gong, Qihuang

2014-01-17

On-chip plasmon-induced transparency offers the possibility of realization of ultrahigh-speed information processing chips. Unfortunately, little experimental progress has been made to date because it is difficult to obtain on-chip plasmon-induced transparency using only a single meta-molecule in plasmonic circuits. Here, we report a simple and efficient strategy to realize on-chip plasmon-induced transparency in a nanoscale U-shaped plasmonic waveguide side-coupled nanocavity pair. High tunability in the transparency window is achieved by covering the pair with different organic polymer layers. It is possible to realize ultrafast all-optical tunability based on pump light-induced refractive index change of a graphene cover layer. Compared with previous reports, the overall feature size of the plasmonic nanostructure is reduced by more than three orders of magnitude, while ultrahigh tunability of the transparency window is maintained. This work also provides a superior platform for the study of the various physical effects and phenomena of nonlinear optics and quantum optics.

Application of single-chip microcomputer to portable radon and radon daughters monitor

International Nuclear Information System (INIS)

Meng Yecheng; Huang Zhanyun; She Chengye

1992-01-01

Application of single-chip microcomputer to portable radon and radon daughters monitor is introduced in this paper. With the single-chip microcomputer automation comes into effect in the process from sampling to measuring of radon and radon daughters. The concentrations of radon and radon daughters can be easily shown when the conversion coefficients are pre-settled before the measurement. Moreover, the principle and design are briefly discussed according to the characteristics of the monitor

Vision for single flux quantum very large scale integrated technology

International Nuclear Information System (INIS)

Silver, Arnold; Bunyk, Paul; Kleinsasser, Alan; Spargo, John

2006-01-01

Single flux quantum (SFQ) electronics is extremely fast and has very low on-chip power dissipation. SFQ VLSI is an excellent candidate for high-performance computing and other applications requiring extremely high-speed signal processing. Despite this, SFQ technology has generally not been accepted for system implementation. We argue that this is due, at least in part, to the use of outdated tools to produce SFQ circuits and chips. Assuming the use of tools equivalent to those employed in the semiconductor industry, we estimate the density of Josephson junctions, circuit speed, and power dissipation that could be achieved with SFQ technology. Today, CMOS lithography is at 90-65 nm with about 20 layers. Assuming equivalent technology, aggressively increasing the current density above 100 kA cm -2 to achieve junction speeds approximately 1000 GHz, and reducing device footprints by converting device profiles from planar to vertical, one could expect to integrate about 250 M Josephson junctions cm -2 into SFQ digital circuits. This should enable circuit operation with clock frequencies above 200 GHz and place approximately 20 K gates within a radius of one clock period. As a result, complete microprocessors, including integrated memory registers, could be fabricated on a single chip

Vision for single flux quantum very large scale integrated technology

Energy Technology Data Exchange (ETDEWEB)

Silver, Arnold [Northrop Grumman Space Technology, One Space Park, Redondo Beach, CA 90278 (United States); Bunyk, Paul [Northrop Grumman Space Technology, One Space Park, Redondo Beach, CA 90278 (United States); Kleinsasser, Alan [Jet Propulsion Laboratory, 4800 Oak Grove Drive, Pasadena, CA 91109-8099 (United States); Spargo, John [Northrop Grumman Space Technology, One Space Park, Redondo Beach, CA 90278 (United States)

2006-05-15

Single flux quantum (SFQ) electronics is extremely fast and has very low on-chip power dissipation. SFQ VLSI is an excellent candidate for high-performance computing and other applications requiring extremely high-speed signal processing. Despite this, SFQ technology has generally not been accepted for system implementation. We argue that this is due, at least in part, to the use of outdated tools to produce SFQ circuits and chips. Assuming the use of tools equivalent to those employed in the semiconductor industry, we estimate the density of Josephson junctions, circuit speed, and power dissipation that could be achieved with SFQ technology. Today, CMOS lithography is at 90-65 nm with about 20 layers. Assuming equivalent technology, aggressively increasing the current density above 100 kA cm{sup -2} to achieve junction speeds approximately 1000 GHz, and reducing device footprints by converting device profiles from planar to vertical, one could expect to integrate about 250 M Josephson junctions cm{sup -2} into SFQ digital circuits. This should enable circuit operation with clock frequencies above 200 GHz and place approximately 20 K gates within a radius of one clock period. As a result, complete microprocessors, including integrated memory registers, could be fabricated on a single chip.

Chromatically encoded high-speed photography of cavitation bubble dynamics inside inhomogeneous ophthalmic tissue

Science.gov (United States)

Tinne, N.; Matthias, B.; Kranert, F.; Wetzel, C.; Krüger, A.; Ripken, T.

2016-03-01

The interaction effect of photodisruption, which is used for dissection of biological tissue with fs-laser pulses, has been intensively studied inside water as prevalent sample medium. In this case, the single effect is highly reproducible and, hence, the method of time-resolved photography is sufficiently applicable. In contrast, the reproducibility significantly decreases analyzing more solid and anisotropic media like biological tissue. Therefore, a high-speed photographic approach is necessary in this case. The presented study introduces a novel technique for high-speed photography based on the principle of chromatic encoding. For illumination of the region of interest within the sample medium, the light paths of up to 12 LEDs with various emission wavelengths are overlaid via optical filters. Here, MOSFET-electronics provide a LED flash with a duration diodes are externally triggered with a distinct delay for every LED. Furthermore, the different illumination wavelengths are chromatically separated again for detection via camera chip. Thus, the experimental setup enables the generation of a time-sequence of laser-tissue interaction inside anisotropic biological tissue and for the optimization of the surgical process with high-repetition rate fs-lasers. Additionally, this application is also suitable for the investigation of other microscopic, ultra-fast events in transparent inhomogeneous materials.

Highly specific detection of genetic modification events using an enzyme-linked probe hybridization chip.

Science.gov (United States)

Zhang, M Z; Zhang, X F; Chen, X M; Chen, X; Wu, S; Xu, L L

2015-08-10

The enzyme-linked probe hybridization chip utilizes a method based on ligase-hybridizing probe chip technology, with the principle of using thio-primers for protection against enzyme digestion, and using lambda DNA exonuclease to cut multiple PCR products obtained from the sample being tested into single-strand chains for hybridization. The 5'-end amino-labeled probe was fixed onto the aldehyde chip, and hybridized with the single-stranded PCR product, followed by addition of a fluorescent-modified probe that was then enzymatically linked with the adjacent, substrate-bound probe in order to achieve highly specific, parallel, and high-throughput detection. Specificity and sensitivity testing demonstrated that enzyme-linked probe hybridization technology could be applied to the specific detection of eight genetic modification events at the same time, with a sensitivity reaching 0.1% and the achievement of accurate, efficient, and stable results.

Single-chip serial channel enhances multi-processor systems

Energy Technology Data Exchange (ETDEWEB)

Millar, J.

1982-01-01

In this paper multiprocessor systems are described and explained. The impact that VLSI advancements are having on multiprocessor design is pointed out. The TMS 7041 single-chip microcomputer is described briefly, highlighting its multiprocessor communication capability. And finally, a typical multiprocessor system is shown, implementing the TMS 7041.

Microstructural characterization of WC-TiC-Co cutting tools during high-speed machining of P20 mold steel

International Nuclear Information System (INIS)

Farhat, Z.N.

2003-01-01

The wear behavior of tungsten carbide (WC)-TiC-Co cutting tools during cutting P20 tool steel was investigated. Orthogonal cutting tests were performed on a CNC lathe using five speeds, namely, 60, 120, 240, 380 and 600 m/min. Wear, as the width of the wear land, was monitored at five time intervals. Wear characterization of the rake and the flank surfaces as well as the collected chips was performed using scanning electron microscopy (SEM), backscattered electron imaging and energy-dispersive X-ray analysis (EDX). Microhardness of collected chips was also performed to monitor strain hardening effects during cutting. Two dominant wear mechanisms were identified: at high speed (380-600 m/min), wear was found to occur by a melt wear mechanism; at low speed (60-120 m/min), adhesion (built-up edge) followed by delamination was found to be the cause of wear damage. It was also found that deformation in the chips occurred by localized shear deformation

An ultra-high-speed direct digital frequency synthesizer implemented in GaAs HBT technology

International Nuclear Information System (INIS)

Chen Gaopeng; Wu Danyu; Jin Zhi; Liu Xinyu

2010-01-01

This paper presents a 10-GHz 8-bit direct digital synthesizer (DDS) microwave monolithic integrated circuit implemented in 1 μm GaAs HBT technology. The DDS takes a double-edge-trigger (DET) 8-stage pipeline accumulator with sine-weighted DAC-based ROM-less architecture, which can maximize the utilization ratio of the GaAs HBT's high-speed potential. With an output frequency up to 5 GHz, the DDS gives an average spurious free dynamic range of 23.24 dBc through the first Nyquist band, and consumes 2.4 W of DC power from a single -4.6 V DC supply. Using 1651 GaAs HBT transistors, the total area of the DDS chip is 2.4 x 2.0 mm 2 . (semiconductor integrated circuits)

10-bit rapid single flux quantum digital-to-analog converter for ac voltage standard

International Nuclear Information System (INIS)

Maezawa, M; Hirayama, F

2008-01-01

Digital-to-analog (D/A) converters based on rapid single flux quantum (RSFQ) technology are under development for ac voltage standard applications. We present design and test results on a prototype 10-bit version integrated on a single chip. The 10-bit chip includes over 6000 Josephson junctions and consumes a bias current exceeding 1 A. To reduce the effects of the high bias current on circuit operation, a custom design method was employed in part and large circuit blocks were divided into smaller ones. The 10-bit chips were fabricated and tested at low speed. The test results suggested that our design approach could manage large bias currents on the order of 1 A per chip

High-performance, scalable optical network-on-chip architectures

Science.gov (United States)

Tan, Xianfang

The rapid advance of technology enables a large number of processing cores to be integrated into a single chip which is called a Chip Multiprocessor (CMP) or a Multiprocessor System-on-Chip (MPSoC) design. The on-chip interconnection network, which is the communication infrastructure for these processing cores, plays a central role in a many-core system. With the continuously increasing complexity of many-core systems, traditional metallic wired electronic networks-on-chip (NoC) became a bottleneck because of the unbearable latency in data transmission and extremely high energy consumption on chip. Optical networks-on-chip (ONoC) has been proposed as a promising alternative paradigm for electronic NoC with the benefits of optical signaling communication such as extremely high bandwidth, negligible latency, and low power consumption. This dissertation focus on the design of high-performance and scalable ONoC architectures and the contributions are highlighted as follow: 1. A micro-ring resonator (MRR)-based Generic Wavelength-routed Optical Router (GWOR) is proposed. A method for developing any sized GWOR is introduced. GWOR is a scalable non-blocking ONoC architecture with simple structure, low cost and high power efficiency compared to existing ONoC designs. 2. To expand the bandwidth and improve the fault tolerance of the GWOR, a redundant GWOR architecture is designed by cascading different type of GWORs into one network. 3. The redundant GWOR built with MRR-based comb switches is proposed. Comb switches can expand the bandwidth while keep the topology of GWOR unchanged by replacing the general MRRs with comb switches. 4. A butterfly fat tree (BFT)-based hybrid optoelectronic NoC (HONoC) architecture is developed in which GWORs are used for global communication and electronic routers are used for local communication. The proposed HONoC uses less numbers of electronic routers and links than its counterpart of electronic BFT-based NoC. It takes the advantages of

Integrating photonics with silicon nanoelectronics for the next generation of systems on a chip.

Science.gov (United States)

Atabaki, Amir H; Moazeni, Sajjad; Pavanello, Fabio; Gevorgyan, Hayk; Notaros, Jelena; Alloatti, Luca; Wade, Mark T; Sun, Chen; Kruger, Seth A; Meng, Huaiyu; Al Qubaisi, Kenaish; Wang, Imbert; Zhang, Bohan; Khilo, Anatol; Baiocco, Christopher V; Popović, Miloš A; Stojanović, Vladimir M; Ram, Rajeev J

2018-04-01

Electronic and photonic technologies have transformed our lives-from computing and mobile devices, to information technology and the internet. Our future demands in these fields require innovation in each technology separately, but also depend on our ability to harness their complementary physics through integrated solutions 1,2 . This goal is hindered by the fact that most silicon nanotechnologies-which enable our processors, computer memory, communications chips and image sensors-rely on bulk silicon substrates, a cost-effective solution with an abundant supply chain, but with substantial limitations for the integration of photonic functions. Here we introduce photonics into bulk silicon complementary metal-oxide-semiconductor (CMOS) chips using a layer of polycrystalline silicon deposited on silicon oxide (glass) islands fabricated alongside transistors. We use this single deposited layer to realize optical waveguides and resonators, high-speed optical modulators and sensitive avalanche photodetectors. We integrated this photonic platform with a 65-nanometre-transistor bulk CMOS process technology inside a 300-millimetre-diameter-wafer microelectronics foundry. We then implemented integrated high-speed optical transceivers in this platform that operate at ten gigabits per second, composed of millions of transistors, and arrayed on a single optical bus for wavelength division multiplexing, to address the demand for high-bandwidth optical interconnects in data centres and high-performance computing 3,4 . By decoupling the formation of photonic devices from that of transistors, this integration approach can achieve many of the goals of multi-chip solutions 5 , but with the performance, complexity and scalability of 'systems on a chip' 1,6-8 . As transistors smaller than ten nanometres across become commercially available 9 , and as new nanotechnologies emerge 10,11 , this approach could provide a way to integrate photonics with state-of-the-art nanoelectronics.

Adiabatic shear bands as predictors of strain rate in high speed machining of ramax-2

International Nuclear Information System (INIS)

Zeb, M.A.; Irfan, M.A.; Velduis, A.C.

2008-01-01

Shear band formation was studied in the chips obtained by turning of stainless steel- Ramax-2 (AISI 420F). The machining was performed on a CNC lathe using a PVD (Physical Vapor Deposition) cutting tool insert. The cutting speeds ranged from 50 m/ min to 250 m/min. Dry cutting conditions were employed. At cutting speeds higher than 30 m/mill, the chip did not remain intact with the workpiece using quick stop device. It was difficult to get the chip root SEM (Scanning Electron Microscope) micrographs at further higher speeds. Therefore, the width of the shear bands was used as the predictor of the strain rates involved at various cutting speeds. The results showed that the strain rates are quite in agreement with the amount of strain rate found during machining of such types of stainless steels. It was also observed that shear band density increased with increasing cutting speed. (author)

New Observations on High-Speed Machining of Hardened AISI 4340 Steel Using Alumina-Based Ceramic Tools

Directory of Open Access Journals (Sweden)

Mohamed Shalaby

2018-05-01

Full Text Available High-speed machining (HSM is used in industry to improve the productivity and quality of the cutting operations. In this investigation, pure alumina ceramics with the addition of ZrO2, and mixed alumina (Al2O3 + TiC tools were used in the dry hard turning of AISI 4340 (52 HRC at different high cutting speeds of 150, 250, 700 and 1000 m/min. It was observed that at cutting speeds of 150 and 250 m/min, pure alumina ceramic tools had better wear resistance than mixed alumina ones. However, upon increasing the cutting speed from 700 to 1000 m/min, mixed alumina ceramic tools outperformed pure ceramic ones. Scanning electron microscopy (SEM and X-ray photoelectron spectroscopy (XPS were used to investigate the worn cutting edges and analyze the obtained results. It was found that the tribo-films formed at the cutting zone during machining affected the wear resistances of the tools and influenced the coefficient of friction at the tool-chip interface. These observations were confirmed by the chip compression ratio results at different cutting conditions. Raising cutting speed to 1000 m/min corresponded to a remarkable decrease in cutting force components in the dry hard turning of AISI 4340 steel.

High-Speed Computation using FPGA for Excellent Performance of Direct Torque Control of Induction Machines

Directory of Open Access Journals (Sweden)

Tole Sutikno

2016-03-01

Full Text Available The major problems in hysteresis-based DTC are high torque ripple and variable switching frequency. In order to minimize the torque ripple, high sampling time and fast digital realization should be applied. The high sampling and fast digital realization time can be achieved by utilizing high-speed processor where the operation of the discrete hysteresis regulator is becoming similar to the operation of analog-based comparator. This can be achieved by utilizing field programmable gate array (FPGA which can perform a sampling at a very high speed, compared to the fact that developing an ASIC chip is expensive and laborious.

High-Tc dc-SQUID gradiometers in flip-chip configuration

International Nuclear Information System (INIS)

Peiselt, K; Schmidl, F; Linzen, S; Anton, A S; Huebner, U; Seidel, P

2003-01-01

We describe a new design of a gradiometric flip-chip antenna, which is inductively coupled to a dc-SQUID gradiometer. Both components are patterned out of thin films of the high-T c superconductor YBa 2 Cu 3 O 7-x (YBCO). For the flip-chip antenna, a 40 mm x 10 mm SrTiO 3 single crystalline substrate is used, while the gradiometer sensors are prepared on 10 mm x 10 mm SrTiO 3 bicrystal substrates. Special attention is paid to the inductive coupling between the flip-chip antenna and the read-out gradiometer antenna. We investigate different designs of coupling loops in order to optimize the coupling inductance between both components of the sensor. With optimized coupling the sensor achieves a field-gradient resolution of 12 fT cm -1 Hz -1/2 in the white noise region and of 310 fT cm -1 Hz -1/2 at 1 Hz in the unshielded laboratory environment

High-Tc dc-SQUID gradiometers in flip-chip configuration

Science.gov (United States)

Peiselt, K.; Schmidl, F.; Linzen, S.; Anton, A. S.; Hübner, U.; Seidel, P.

2003-12-01

We describe a new design of a gradiometric flip-chip antenna, which is inductively coupled to a dc-SQUID gradiometer. Both components are patterned out of thin films of the high-Tc superconductor YBa2Cu3O7-x (YBCO). For the flip-chip antenna, a 40 mm × 10 mm SrTiO3 single crystalline substrate is used, while the gradiometer sensors are prepared on 10 mm × 10 mm SrTiO3 bicrystal substrates. Special attention is paid to the inductive coupling between the flip-chip antenna and the read-out gradiometer antenna. We investigate different designs of coupling loops in order to optimize the coupling inductance between both components of the sensor. With optimized coupling the sensor achieves a field-gradient resolution of 12 fT cm-1 Hz-1/2 in the white noise region and of 310 fT cm-1 Hz-1/2 at 1 Hz in the unshielded laboratory environment.

Influence of transient radiation for the behaviour of the 80C31 single-chip microcontrollers

International Nuclear Information System (INIS)

Zhou Kaiming; Xie Zeyuan; Yang Youli

2006-01-01

Radiation characteristic of transient dose rate and the changed rule of latchup current with the gamma dose rate in 'flash-1' were researched in the 80C31 Single-chip Microcontrollers. The latchup current characteristic of the 80C31 Single-chip Microcontrollers was analyzed in shallow deep latchup. (authors)

High-speed computation of the EM algorithm for PET image reconstruction

International Nuclear Information System (INIS)

Rajan, K.; Patnaik, L.M.; Ramakrishna, J.

1994-01-01

The PET image reconstruction based on the EM algorithm has several attractive advantages over the conventional convolution backprojection algorithms. However, two major drawbacks have impeded the routine use of the EM algorithm, namely, the long computational time due to slow convergence and the large memory required for the storage of the image, projection data and the probability matrix. In this study, the authors attempts to solve these two problems by parallelizing the EM algorithm on a multiprocessor system. The authors have implemented an extended hypercube (EH) architecture for the high-speed computation of the EM algorithm using the commercially available fast floating point digital signal processor (DSP) chips as the processing elements (PEs). The authors discuss and compare the performance of the EM algorithm on a 386/387 machine, CD 4360 mainframe, and on the EH system. The results show that the computational speed performance of an EH using DSP chips as PEs executing the EM image reconstruction algorithm is about 130 times better than that of the CD 4360 mainframe. The EH topology is expandable with more number of PEs

Genome-wide association study for milking speed in French Holstein cows

DEFF Research Database (Denmark)

Marete, Andrew Gitahi; Sahana, Goutam; Fritz, Sebastian

2018-01-01

Using a combination of data from the BovineSNP50 BeadChip SNP array (Illumina, San Diego, CA) and a EuroGenomics (Amsterdam, the Netherlands) custom single nucleotide polymorphism (SNP) chip with SNP pre-selected from whole genome sequence data, we carried out an association study of milking speed...... associated with milking speed. As clinical mastitis and somatic cell score have an unfavorable genetic correlation with milking speed, we tested whether the most significant SNP on these 22 chromosomes associated with milking speed were also associated with clinical mastitis or somatic cell score. Nine...... hundred seventy-one genome-wide significant SNP were associated with milking speed. Of these, 86 were associated with clinical mastitis and 198 with somatic cell score. The most significant association signals for milking speed were observed on chromosomes 7, 8, 10, 14, and 18. The most significant signal...

A monolithic glass chip for active single-cell sorting based on mechanical phenotyping.

Science.gov (United States)

Faigle, Christoph; Lautenschläger, Franziska; Whyte, Graeme; Homewood, Philip; Martín-Badosa, Estela; Guck, Jochen

2015-03-07

The mechanical properties of biological cells have long been considered as inherent markers of biological function and disease. However, the screening and active sorting of heterogeneous populations based on serial single-cell mechanical measurements has not been demonstrated. Here we present a novel monolithic glass chip for combined fluorescence detection and mechanical phenotyping using an optical stretcher. A new design and manufacturing process, involving the bonding of two asymmetrically etched glass plates, combines exact optical fiber alignment, low laser damage threshold and high imaging quality with the possibility of several microfluidic inlet and outlet channels. We show the utility of such a custom-built optical stretcher glass chip by measuring and sorting single cells in a heterogeneous population based on their different mechanical properties and verify sorting accuracy by simultaneous fluorescence detection. This offers new possibilities of exact characterization and sorting of small populations based on rheological properties for biological and biomedical applications.

Architectures for single-chip image computing

Science.gov (United States)

Gove, Robert J.

1992-04-01

This paper will focus on the architectures of VLSI programmable processing components for image computing applications. TI, the maker of industry-leading RISC, DSP, and graphics components, has developed an architecture for a new-generation of image processors capable of implementing a plurality of image, graphics, video, and audio computing functions. We will show that the use of a single-chip heterogeneous MIMD parallel architecture best suits this class of processors--those which will dominate the desktop multimedia, document imaging, computer graphics, and visualization systems of this decade.

The Design of High Performance, Low Power Triple-Track Magnetic Sensor Chip

Directory of Open Access Journals (Sweden)

Junning Chen

2013-07-01

Full Text Available This paper presents a design of a high performance and low power consumption triple-track magnetic sensor chip which was fabricated in TSMC 0.35 μm CMOS process. This chip is able to simultaneously sense, decode and read out the information stored in triple-track magnetic cards. A reference voltage generating circuit, a low-cost filter circuit, a power-on reset circuit, an RC oscillator, and a pre-decoding circuit are utilized as the basic modules. The triple-track magnetic sensor chip has four states, i.e., reset, sleep, swiping card and data read-out. In sleep state, the internal RC oscillator is closed, which means that the digital part does not operate to optimize energy consumption. In order to improve decoding accuracy and expand the sensing range of the signal, two kinds of circuit are put forward, naming offset correction circuit, and tracking circuit. With these two circuits, the sensing function of this chip can be more efficiently and accurately. We simulated these circuit modules with TSMC technology library. The results showed that these modules worked well within wide range input signal. Based on these results, the layout and tape-out were carried out. The measurement results showed that the chip do function well within a wide swipe speed range, which achieved the design target.

Fabrication of an infrared Shack-Hartmann sensor by combining high-speed single-point diamond milling and precision compression molding processes.

Science.gov (United States)

Zhang, Lin; Zhou, Wenchen; Naples, Neil J; Yi, Allen Y

2018-05-01

A novel fabrication method by combining high-speed single-point diamond milling and precision compression molding processes for fabrication of discontinuous freeform microlens arrays was proposed. Compared with slow tool servo diamond broaching, high-speed single-point diamond milling was selected for its flexibility in the fabrication of true 3D optical surfaces with discontinuous features. The advantage of single-point diamond milling is that the surface features can be constructed sequentially by spacing the axes of a virtual spindle at arbitrary positions based on the combination of rotational and translational motions of both the high-speed spindle and linear slides. By employing this method, each micro-lenslet was regarded as a microstructure cell by passing the axis of the virtual spindle through the vertex of each cell. An optimization arithmetic based on minimum-area fabrication was introduced to the machining process to further increase the machining efficiency. After the mold insert was machined, it was employed to replicate the microlens array onto chalcogenide glass. In the ensuing optical measurement, the self-built Shack-Hartmann wavefront sensor was proven to be accurate in detecting an infrared wavefront by both experiments and numerical simulation. The combined results showed that precision compression molding of chalcogenide glasses could be an economic and precision optical fabrication technology for high-volume production of infrared optics.

The artificial satellite observation chronograph controlled by single chip microcomputer.

Science.gov (United States)

Pan, Guangrong; Tan, Jufan; Ding, Yuanjun

1991-06-01

The instrument specifications, hardware structure, software design, and other characteristics of the chronograph mounting on a theodolite used for artificial satellite observation are presented. The instrument is a real time control system with a single chip microcomputer.

A single chip with multiple talents

CERN Multimedia

Francesco Poppi

2010-01-01

The Medipix chips developed at CERN are being used in a variety of fields: from medicine to education and back to high-tech engineering. The scene is set for a bright future for this versatile technology.   The Medipix chip. It didn’t take long for a brilliant team of physicists and engineers who were working on pixel detectors for the LHC to realize that the technology had great potential in medical imaging. This was the birth of the Medipix project. Fifteen years later, with the collaboration of 18 research institutes, the team has produced an advanced version of the initial ideas: Medipix3 is a device that can measure very accurately the position and energy of the photons (one by one) that hit the associated detector. Radiography and computed tomography (CT) use X-ray photons to study the human body. The different energies of the photons in the beam can be thought of as the colours of the X-ray spectrum. This is why the use of Medipix3 chips in such diagnostic techniques is referred...

On-Chip Single-Plasmon Nanocircuit Driven by a Self-Assembled Quantum Dot.

Science.gov (United States)

Wu, Xiaofei; Jiang, Ping; Razinskas, Gary; Huo, Yongheng; Zhang, Hongyi; Kamp, Martin; Rastelli, Armando; Schmidt, Oliver G; Hecht, Bert; Lindfors, Klas; Lippitz, Markus

2017-07-12

Quantum photonics holds great promise for future technologies such as secure communication, quantum computation, quantum simulation, and quantum metrology. An outstanding challenge for quantum photonics is to develop scalable miniature circuits that integrate single-photon sources, linear optical components, and detectors on a chip. Plasmonic nanocircuits will play essential roles in such developments. However, for quantum plasmonic circuits, integration of stable, bright, and narrow-band single photon sources in the structure has so far not been reported. Here we present a plasmonic nanocircuit driven by a self-assembled GaAs quantum dot. Through a planar dielectric-plasmonic hybrid waveguide, the quantum dot efficiently excites narrow-band single plasmons that are guided in a two-wire transmission line until they are converted into single photons by an optical antenna. Our work demonstrates the feasibility of fully on-chip plasmonic nanocircuits for quantum optical applications.

High-speed high-sensitivity infrared spectroscopy using mid-infrared swept lasers (Conference Presentation)

Science.gov (United States)

Childs, David T. D.; Groom, Kristian M.; Hogg, Richard A.; Revin, Dmitry G.; Cockburn, John W.; Rehman, Ihtesham U.; Matcher, Stephen J.

2016-03-01

Infrared spectroscopy is a highly attractive read-out technology for compositional analysis of biomedical specimens because of its unique combination of high molecular sensitivity without the need for exogenous labels. Traditional techniques such as FTIR and Raman have suffered from comparatively low speed and sensitivity however recent innovations are challenging this situation. Direct mid-IR spectroscopy is being speeded up by innovations such as MEMS-based FTIR instruments with very high mirror speeds and supercontinuum sources producing very high sample irradiation levels. Here we explore another possible method - external cavity quantum cascade lasers (EC-QCL's) with high cavity tuning speeds (mid-IR swept lasers). Swept lasers have been heavily developed in the near-infrared where they are used for non-destructive low-coherence imaging (OCT). We adapt these concepts in two ways. Firstly by combining mid-IR quantum cascade gain chips with external cavity designs adapted from OCT we achieve spectral acquisition rates approaching 1 kHz and demonstrate potential to reach 100 kHz. Secondly we show that mid-IR swept lasers share a fundamental sensitivity advantage with near-IR OCT swept lasers. This makes them potentially able to achieve the same spectral SNR as an FTIR instrument in a time x N shorter (N being the number of spectral points) under otherwise matched conditions. This effect is demonstrated using measurements of a PDMS sample. The combination of potentially very high spectral acquisition rates, fundamental SNR advantage and the use of low-cost detector systems could make mid-IR swept lasers a powerful technology for high-throughput biomedical spectroscopy.

Variation Tolerant On-Chip Interconnects

CERN Document Server

Nigussie, Ethiopia Enideg

2012-01-01

This book presents design techniques, analysis and implementation of high performance and power efficient, variation tolerant on-chip interconnects.  Given the design paradigm shift to multi-core, interconnect-centric designs and the increase in sources of variability and their impact in sub-100nm technologies, this book will be an invaluable reference for anyone concerned with the design of next generation, high-performance electronics systems. Provides comprehensive, circuit-level explanation of high-performance, energy-efficient, variation-tolerant on-chip interconnect; Describes design techniques to mitigate problems caused by variation; Includes techniques for design and implementation of self-timed on-chip interconnect, delay variation insensitive communication protocols, high speed signaling techniques and circuits, bit-width independent completion detection and process, voltage and temperature variation tolerance.                          

Precision Photothermal Annealing of Nanoporous Gold Thin Films for the Microfabrication of a Single-chip Material Libraries

Energy Technology Data Exchange (ETDEWEB)

Harris, C. D. [Lawrence Livermore National Lab. (LLNL), Livermore, CA (United States); Shen, N. [Lawrence Livermore National Lab. (LLNL), Livermore, CA (United States); Rubenchik, A. [Lawrence Livermore National Lab. (LLNL), Livermore, CA (United States); Demos, S. G. [Lawrence Livermore National Lab. (LLNL), Livermore, CA (United States); Matthews, M. J. [Lawrence Livermore National Lab. (LLNL), Livermore, CA (United States)

2015-06-30

Single-chip material libraries of thin films of nanostructured materials are a promising approach for high throughput studies of structure-property relationship in the fields of physics and biology. Nanoporous gold (np-Au), produced by an alloy corrosion process, is a nanostructured material of specific interest in both these fields. One attractive property of np-Au is its self-similar coarsening behavior by thermally induced surface diffusion. However, traditional heat application techniques for the modification of np-Au are bulk processes that cannot be used to generate a library of different pore sizes on a single chip. Laser micromachining offers an attractive solution to this problem by providing a means to apply energy with high spatial and temporal resolution. In the present study we use finite element multiphysics simulations to predict the effects of laser mode (continuous-wave vs. pulsed) and supporting substrate thermal conductivity on the local np-Au film temperatures during photothermal annealing and subsequently investigate the mechanisms by which the np-Au network is coarsening. Our simulations predict that continuous-wave mode laser irradiation on a silicon supporting substrate supports the widest range of morphologies that can be created through the photothermal annealing of thin film np-Au. Using this result we successfully fabricate a single-chip material library consisting of 81 np-Au samples of 9 different morphologies for use in increased throughput material interaction studies.

Modelling Of Residual Stresses Induced By High Speed Milling Process

International Nuclear Information System (INIS)

Desmaison, Olivier; Mocellin, Katia; Jardin, Nicolas

2011-01-01

Maintenance processes used in heavy industries often include high speed milling operations. The reliability of the post-process material state has to be studied. Numerical simulation appears to be a very interesting way to supply an efficient residual stresses (RS) distribution prediction.Because the adiabatic shear band and the serrated chip shaping are features of the austenitic stainless steel high speed machining, a 2D high speed orthogonal cutting model is briefly presented. This finite element model, developed on Forge registered software, is based on data taken from Outeiro and al.'s paper [1]. A new behaviour law fully coupling Johnson-Cook's constitutive law and Latham and Cockcroft's damage model is detailed in this paper. It ensures results that fit those found in literature.Then, the numerical tools used on the 2D model are integrated to a 3D high speed milling model. Residual stresses distribution is analysed, on the surface and into the depth of the material. Various revolutions and passes of the two teeth hemispheric mill on the workpiece are simulated. Thus the sensitivity of the residual stresses generation to the cutting conditions can be discussed. In order to validate the 3D model, a comparison of the cutting forces measured by EDF R and D to those given by numerical simulations is achieved.

FISH & CHIPS: Single Chip Silicon MEMS CTDL Salinity, Temperature, Pressure and Light sensor for use in fisheries research

DEFF Research Database (Denmark)

Hyldgård, Anders; Hansen, Ole; Thomsen, Erik Vilain

2005-01-01

A single-chip silicon MEMS CTDL multi sensor for use in aqueous environments is presented. The new sensor chip consists of a conductivity sensor based on platinum electrodes (C), an ion-implanted thermistor temperature sensor (T), a piezoresistive pressure sensor (D for depth/pressure) and an ion......-implanted p-n junction light sensor (L). The design and fabrication process is described. A temperature sensitivity of 0.8 × 10-3K-1 has been measured and detailed analysis of conductivity measurement data shows a cell constant of 81 cm-1....

Characterization of AGIPD1.0: The full scale chip

Energy Technology Data Exchange (ETDEWEB)

Mezza, D., E-mail: davide.mezza@psi.ch [Paul-Scherrer-Institute (PSI), Villigen (Switzerland); Allahgholi, A.; Arino-Estrada, G.; Bianco, L.; Delfs, A. [Deutsches Elektronensynchrotron DESY, Hamburg (Germany); Dinapoli, R. [Paul-Scherrer-Institute (PSI), Villigen (Switzerland); Goettlicher, P. [Deutsches Elektronensynchrotron DESY, Hamburg (Germany); Graafsma, H. [Deutsches Elektronensynchrotron DESY, Hamburg (Germany); Mid Sweden University, Sundsvall (Sweden); Greiffenberg, D. [Paul-Scherrer-Institute (PSI), Villigen (Switzerland); Hirsemann, H.; Jack, S. [Deutsches Elektronensynchrotron DESY, Hamburg (Germany); Klanner, R. [University of Hamburg, Hamburg (Germany); Klyuev, A. [Deutsches Elektronensynchrotron DESY, Hamburg (Germany); Krueger, H. [University of Bonn, Bonn (Germany); Marras, A. [Deutsches Elektronensynchrotron DESY, Hamburg (Germany); Mozzanica, A. [Paul-Scherrer-Institute (PSI), Villigen (Switzerland); Poehlsen, J. [Deutsches Elektronensynchrotron DESY, Hamburg (Germany); Schmitt, B. [Paul-Scherrer-Institute (PSI), Villigen (Switzerland); Schwandt, J. [University of Hamburg, Hamburg (Germany); Sheviakov, I. [Deutsches Elektronensynchrotron DESY, Hamburg (Germany); and others

2016-12-01

The AGIPD (adaptive gain integrating pixel detector) detector is a high frame rate (4.5 MHz) and high dynamic range (up to 10{sup 4} ·12.4 keV photons) detector with single photon resolution (down to 4 keV taking 5σ as limit and lowest noise settings) developed for the European XFEL (XFEL.EU). This work is focused on the characterization of AGIPD1.0, which is the first full scale version of the chip. The chip is 64×64 pixels and each pixel has a size of 200×200 μm{sup 2}. Each pixel can store up to 352 images at a rate of 4.5 MHz (corresponding to 220 ns). A detailed characterization of the AGIPD1.0 chip has been performed in order to assess the main performance of the ASIC in terms of gain, noise, speed and dynamic range. From the measurements presented in this paper a good uniformity of the gain, a noise around 320 e{sup −} (rms) in standard mode and around 240 e{sup −} (rms) in high gain mode has been measured. Furthermore a detailed discussion about the non-linear behavior after the gain switching is presented with both experimental results and simulations.

Versatile single-chip event sequencer for atomic physics experiments

Science.gov (United States)

Eyler, Edward

2010-03-01

A very inexpensive dsPIC microcontroller with internal 32-bit counters is used to produce a flexible timing signal generator with up to 16 TTL-compatible digital outputs, with a time resolution and accuracy of 50 ns. This time resolution is easily sufficient for event sequencing in typical experiments involving cold atoms or laser spectroscopy. This single-chip device is capable of triggered operation and can also function as a sweeping delay generator. With one additional chip it can also concurrently produce accurately timed analog ramps, and another one-chip addition allows real-time control from an external computer. Compared to an FPGA-based digital pattern generator, this design is slower but simpler and more flexible, and it can be reprogrammed using ordinary `C' code without special knowledge. I will also describe the use of the same microcontroller with additional hardware to implement a digital lock-in amplifier and PID controller for laser locking, including a simple graphics-based control unit. This work is supported in part by the NSF.

Radiation effect characterization and test methods of single-chip and multi-chip stacked 16Mbit DRAMs

International Nuclear Information System (INIS)

LaBel, K.A.; Gates, M.M.; Moran, A.K.; Kim, H.S.; Seidleck, C.M.; Marshall, P.; Kinnison, J.; Carkhuff, B.

1996-01-01

This paper presents radiation effects characterization performed by the NASA Goddard Space Flight Center (GSFC) on spaceflight candidate 16Mbit DRAMs. This includes heavy ion, proton, and Co60 irradiations on single-chip devices as well as proton irradiation of a stacked DRAM module. Lastly, a discussion of test methodology is undertaken

Efficient generation of single and entangled photons on a silicon photonic integrated chip

International Nuclear Information System (INIS)

Mower, Jacob; Englund, Dirk

2011-01-01

We present a protocol for generating on-demand, indistinguishable single photons on a silicon photonic integrated chip. The source is a time-multiplexed spontaneous parametric down-conversion element that allows optimization of single-photon versus multiphoton emission while realizing high output rate and indistinguishability. We minimize both the scaling of active elements and the scaling of active element loss with multiplexing. We then discuss detection strategies and data processing to further optimize the procedure. We simulate an improvement in single-photon-generation efficiency over previous time-multiplexing protocols, assuming existing fabrication capabilities. We then apply this system to generate heralded Bell states. The generation efficiency of both nonclassical states could be increased substantially with improved fabrication procedures.

High speed non-latching squid binary ripple counter

International Nuclear Information System (INIS)

Silver, A.H.; Phillips, R.R.; Sandell, R.D.

1985-01-01

High speed, single flux quantum (SFQ) binary scalers are important components in superconducting analog-to-digital converters (ADC). This paper reviews the concept for a SQUID ADC and the design of an SFQ binary ripple counter, and reports the simulation of key components, and fabrication and performance of non-latching SQUID scalers and SFQ binary ripple counters. The SQUIDs were fabricated with Nb/Nb 2 O 5 /PbIn junctions and interconnected by monolithic superconducting transmission lines and isolation resistors. Each SQUID functioned as a bistable flip-flop with the input connected to the center of the device and the output across one junction. All junctions were critically damped to optimize the pulse response. Operation was verified by observing the dc I-V curves of successive SQUIDs driven by a cw pulse train generated on the same chip. Each SQUID exhibited constant-voltage current steps at 1/2 the voltage of the preceding device as expected from the Josephson voltage-to-frequency relation. Steps were observed only for the same voltage polarity of successive devices and for proper phase bias of the SQUID. Binary frequency division was recorded up to 40GHz for devices designed to operate to 28GHz

High-Speed Soft-Decision Decoding of Two Reed-Muller Codes

Science.gov (United States)

Lin, Shu; Uehara, Gregory T.

1996-01-01

implement the system at high speed. Second, we will describe details of the 8-trellis diagram we found to best meet the trade-offs between chip and overall system complexity. The chosen approach implements the trellis for the (64, 40, 8) RM subcode with 32 independent sub-trellises. And third, we will describe results of our feasibility study on the implementation of such an IC chip in CMOS technology to implement one of these sub-trellises.

EIGER: Next generation single photon counting detector for X-ray applications

Energy Technology Data Exchange (ETDEWEB)

Dinapoli, Roberto, E-mail: roberto.dinapoli@psi.ch [Paul Scherrer Institut, 5232 Villigen PSI (Switzerland); Bergamaschi, Anna; Henrich, Beat; Horisberger, Roland; Johnson, Ian; Mozzanica, Aldo; Schmid, Elmar; Schmitt, Bernd; Schreiber, Akos; Shi, Xintian; Theidel, Gerd [Paul Scherrer Institut, 5232 Villigen PSI (Switzerland)

2011-09-11

EIGER is an advanced family of single photon counting hybrid pixel detectors, primarily aimed at diffraction experiments at synchrotrons. Optimization of maximal functionality and minimal pixel size (using a 0.25{mu}m process and conserving the radiation tolerant design) has resulted in 75x75{mu}m{sup 2} pixels. Every pixel comprises a preamplifier, shaper, discriminator (with a 6 bit DAC for threshold trimming), a configurable 4/8/12 bit counter with double buffering, as well as readout, control and test circuitry. A novel feature of this chip is its double buffered counter, meaning a next frame can be acquired while the previous one is being readout. An array of 256x256 pixels fits on a {approx}2x2cm{sup 2} chip and a sensor of {approx}8x4cm{sup 2} will be equipped with eight readout chips to form a module containing 0.5 Mpixel. Several modules can then be tiled to form larger area detectors. Detectors up to 4x8 modules (16 Mpixel) are planned. To achieve frame rates of up to 24 kHz the readout architecture is highly parallel, and the chip readout happens in parallel on 32 readout lines with a 100 MHz Double Data Rate clock. Several chips and singles (i.e. a single chip bump-bonded to a single chip silicon sensor) were tested both with a lab X-ray source and at Swiss Light Source (SLS) beamlines. These tests demonstrate the full functionality of the chip and provide a first assessment of its performance. High resolution X-ray images and 'high speed movies' were produced, even without threshold trimming, at the target system frame rates (up to {approx}24kHz in 4 bit mode). In parallel, dedicated hardware, firmware and software had to be developed to comply with the enormous data rate the chip is capable of delivering. Details of the chip design and tests will be given, as well as highlights of both test and final readout systems.

Cutting Temperature Investigation of AISI H13 in High Speed End Milling

Directory of Open Access Journals (Sweden)

Muhammad Riza

2016-10-01

Full Text Available Heat produced at the tool-chip interface during high speed milling operations have been known as a significant factor that affect to tool life and workpiece geometry or properties. This paper aims to investigate cutting temperature behaviours of AISI H13 (48 HRC under high speed machining circumstances during pocketing. The experiments were conducted on CNC vertical machining centre by using PVD coated carbide insert. Milling processes were done at cutting speeds 150, 200 and 250 m/min and feed rate were 0.05, 0.1 and 0.15 mm/tooth. Depths of cut applied were 0.1, 0.15 and 0.2 mm. Tool path method applied in this experiment was contour in. Results presented in this paper indicate that by increasing cutting speed the cutting temperature is lower than low cutting speed. However, by decreasing feed rate leads to cutting temperature low. Cutting temperature phenomena at the corner of pocket milling were also investigated. The phenomena showed that cutting temperature tends to decrease a moment when cutter comes to the corner of pocket and turning point of tool path and increase extremely a moment before leaving the corner and turning point.

Optimizing residence time, temperature and speed to improve TMP pulp properties and reduce energy

Energy Technology Data Exchange (ETDEWEB)

Sabourin, M.; Xu, E.; Cort, B.; Boileau, I.; Waller, A.

1997-04-01

The concept of reducing energy consumption in pulp mills by increasing the disc speed of refining has been established using single disc and double disc refiners in both pilot plant and mill applications. The RTS study evaluated in this paper reviews the effect of high-speed single disc refining coupled with shortdwell-high pressure retention conditions. Coupling these variables permitted evaluation of an optimum residence time, temperature and speed (RTS) operational window. The objective of the RTS conditions to sufficiently soften the wood chips through high temperature such that the fibre is more receptive to initial defiberization at high intensity. The improved pulp from the primary refiner at high intensity could potentially demonstrate improvements in physical pulp properties at a reduced specific energy requirement. The spruce/fir RTS-TMP described here required significantly less specific energy and produced TMP with slightly improved strength properties and equivalent optical properties compared to conventional TMP pulp. Studies on the radiate pine furnish indicated that the physical pulp property/specific energy relationships could be adjusted by manipulating the residence time. 4 refs., 10 tabs., 10 figs.

Single software platform used for high speed data transfer implementation in a 65k pixel camera working in single photon counting mode

International Nuclear Information System (INIS)

Maj, P.; Kasiński, K.; Gryboś, P.; Szczygieł, R.; Kozioł, A.

2015-01-01

Integrated circuits designed for specific applications generally use non-standard communication methods. Hybrid pixel detector readout electronics produces a huge amount of data as a result of number of frames per seconds. The data needs to be transmitted to a higher level system without limiting the ASIC's capabilities. Nowadays, the Camera Link interface is still one of the fastest communication methods, allowing transmission speeds up to 800 MB/s. In order to communicate between a higher level system and the ASIC with a dedicated protocol, an FPGA with dedicated code is required. The configuration data is received from the PC and written to the ASIC. At the same time, the same FPGA should be able to transmit the data from the ASIC to the PC at the very high speed. The camera should be an embedded system enabling autonomous operation and self-monitoring. In the presented solution, at least three different hardware platforms are used—FPGA, microprocessor with real-time operating system and the PC with end-user software. We present the use of a single software platform for high speed data transfer from 65k pixel camera to the personal computer

Single software platform used for high speed data transfer implementation in a 65k pixel camera working in single photon counting mode

Science.gov (United States)

Maj, P.; Kasiński, K.; Gryboś, P.; Szczygieł, R.; Kozioł, A.

2015-12-01

Integrated circuits designed for specific applications generally use non-standard communication methods. Hybrid pixel detector readout electronics produces a huge amount of data as a result of number of frames per seconds. The data needs to be transmitted to a higher level system without limiting the ASIC's capabilities. Nowadays, the Camera Link interface is still one of the fastest communication methods, allowing transmission speeds up to 800 MB/s. In order to communicate between a higher level system and the ASIC with a dedicated protocol, an FPGA with dedicated code is required. The configuration data is received from the PC and written to the ASIC. At the same time, the same FPGA should be able to transmit the data from the ASIC to the PC at the very high speed. The camera should be an embedded system enabling autonomous operation and self-monitoring. In the presented solution, at least three different hardware platforms are used—FPGA, microprocessor with real-time operating system and the PC with end-user software. We present the use of a single software platform for high speed data transfer from 65k pixel camera to the personal computer.

Reliable Single Chip Genotyping with Semi-Parametric Log-Concave Mixtures

NARCIS (Netherlands)

R.C.A. Rippe (Ralph); J.J. Meulman (Jacqueline); P.H.C. Eilers (Paul)

2012-01-01

textabstractThe common approach to SNP genotyping is to use (model-based) clustering per individual SNP, on a set of arrays. Genotyping all SNPs on a single array is much more attractive, in terms of flexibility, stability and applicability, when developing new chips. A new semi-parametric method,

Mixed-signal early vision chip with embedded image and programming memories and digital I/O

Science.gov (United States)

Linan-Cembrano, Gustavo; Rodriguez-Vazquez, Angel; Dominguez-Castro, Rafael; Espejo, Servando

2003-04-01

From a system level perspective, this paper presents a 128x128 flexible and reconfigurable Focal-Plane Analog Programmable Array Processor, which has been designed as a single chip in a 0.35μm standard digital 1P-5M CMOS technology. The core processing array has been designed to achieve high-speed of operation and large-enough accuracy (~7bit) with low power consumption. The chip includes on-chip program memory to allow for the execution of complex, sequential and/or bifurcation flow image processing algorithms. It also includes the structures and circuits needed to guarantee its embedding into conventional digital hosting systems: external data interchange and control are completely digital. The chip contains close to four million transistors, 90% of them working in analog mode. The chip features up to 330GOPs (Giga Operations per second), and uses the power supply (180GOP/Joule) and the silicon area (3.8 GOPS/mm2) efficiently, as it is able to maintain VGA processing throughputs of 100Frames/s with about 15 basic image processing tasks on each frame.

On-chip power delivery and management

CERN Document Server

Vaisband, Inna P; Popovich, Mikhail; Mezhiba, Andrey V; Köse, Selçuk; Friedman, Eby G

2016-01-01

This book describes methods for distributing power in high speed, high complexity integrated circuits with power levels exceeding many tens of watts and power supplies below a volt. It provides a broad and cohesive treatment of power delivery and management systems and related design problems, including both circuit network models and design techniques for on-chip decoupling capacitors, providing insight and intuition into the behavior and design of on-chip power distribution systems. Organized into subareas to provide a more intuitive flow to the reader, this fourth edition adds more than a hundred pages of new content, including inductance models for interdigitated structures, design strategies for multi-layer power grids, advanced methods for efficient power grid design and analysis, and methodologies for simultaneously placing on-chip multiple power supplies and decoupling capacitors. The emphasis of this additional material is on managing the complexity of on-chip power distribution networks.

Intrinsic imperfection of self-differencing single-photon detectors harms the security of high-speed quantum cryptography systems

Science.gov (United States)

Jiang, Mu-Sheng; Sun, Shi-Hai; Tang, Guang-Zhao; Ma, Xiang-Chun; Li, Chun-Yan; Liang, Lin-Mei

2013-12-01

Thanks to the high-speed self-differencing single-photon detector (SD-SPD), the secret key rate of quantum key distribution (QKD), which can, in principle, offer unconditionally secure private communications between two users (Alice and Bob), can exceed 1 Mbit/s. However, the SD-SPD may contain loopholes, which can be exploited by an eavesdropper (Eve) to hack into the unconditional security of the high-speed QKD systems. In this paper, we analyze the fact that the SD-SPD can be remotely controlled by Eve in order to spy on full information without being discovered, then proof-of-principle experiments are demonstrated. Here, we point out that this loophole is introduced directly by the operating principle of the SD-SPD, thus, it cannot be removed, except for the fact that some active countermeasures are applied by the legitimate parties.

Development of a Metal Cutting Tool Fase in Order to Create the Conditions of Ringed Chips Wrapping

Science.gov (United States)

Korchuganova, M.; Syrbakov, A.; Chernysheva, T.; Ivanov, G.; Korchuganov, M.

2016-08-01

When processing ductile metals with high cutting speed, there is a need to take additional measures for a comfortable and safe formation and removal of chips. In the conditions of large-scale manufacture, it is recommended to produce flow chips in the form of short fragments, while in the conditions of small-lot and single-piece manufacture, it is reasonable to wrap the chips spirally with a rather small turn radius. Such way of chips formation reduces the time of its removal from the working area as well as facilitates its transportation and processing. In order to solve the problem of chip wrapping and breakage, almost all modern manufacturers of tools with replaceable many-sided plates (RMSP) followed the way of complication of tool faces and determination of the areas of effective chip breaking. On the one hand, the suggested solution turns out to be effective; however, as showed the analysis of recommended cutting modes for complex forms of RMSP made by leading manufacturers, they all correspond to the definite cross section of the cut-layer S/t=0.1.

Optical bio-sensors in microfluidic chips

NARCIS (Netherlands)

Pollnau, Markus; Dongre, C.; Pham Van So, P.V.S.; Bernhardi, Edward; Worhoff, Kerstin; de Ridder, R.M.; Hoekstra, Hugo

2012-01-01

Direct femtosecond laser writing is used to integrate optical waveguides that intersect the microfluidic channels in a commercial optofluidic chip. With laser excitation, fluorescently labeled DNA molecules of different sizes are separated by capillary electrophoresis with high operating speed and

A Facile Droplet-Chip-Time-Resolved Inductively Coupled Plasma Mass Spectrometry Online System for Determination of Zinc in Single Cell.

Science.gov (United States)

Wang, Han; Chen, Beibei; He, Man; Hu, Bin

2017-05-02

Single cell analysis is a significant research field in recent years reflecting the heterogeneity of cells in a biological system. In this work, a facile droplet chip was fabricated and online combined with time-resolved inductively coupled plasma mass spectrometry (ICPMS) via a microflow nebulizer for the determination of zinc in single HepG2 cells. On the focusing geometric designed PDMS microfluidic chip, the aqueous cell suspension was ejected and divided by hexanol to generate droplets. The droplets encapsulated single cells remain intact during the transportation into ICP for subsequent detection. Under the optimized conditions, the frequency of droplet generation is 3-6 × 10 6 min -1 , and the injected cell number is 2500 min -1 , which can ensure the single cell encapsulation. ZnO nanoparticles (NPs) were used for the quantification of zinc in single cells, and the accuracy was validated by conventional acid digestion-ICPMS method. The ZnO NPs incubated HepG2 cells were analyzed as model samples, and the results exhibit the heterogeneity of HepG2 cells in the uptake/adsorption of ZnO NPs. The developed online droplet-chip-ICPMS analysis system achieves stable single cell encapsulation and has high throughput for single cell analysis. It has the potential in monitoring the content as well as distribution of trace elements/NPs at the single cell level.

Cohort analysis of a single nucleotide polymorphism on DNA chips.

Science.gov (United States)

Schwonbeck, Susanne; Krause-Griep, Andrea; Gajovic-Eichelmann, Nenad; Ehrentreich-Förster, Eva; Meinl, Walter; Glatt, Hansrüdi; Bier, Frank F

2004-11-15

A method has been developed to determine SNPs on DNA chips by applying a flow-through bioscanner. As a practical application we demonstrated the fast and simple SNP analysis of 24 genotypes in an array of 96 spots with a single hybridisation and dissociation experiment. The main advantage of this methodical concept is the parallel and fast analysis without any need of enzymatic digestion. Additionally, the DNA chip format used is appropriate for parallel analysis up to 400 spots. The polymorphism in the gene of the human phenol sulfotransferase SULT1A1 was studied as a model SNP. Biotinylated PCR products containing the SNP (The SNP summary web site: ) (mutant) and those containing no mutation (wild-type) were brought onto the chips coated with NeutrAvidin using non-contact spotting. This was followed by an analysis which was carried out in a flow-through biochip scanner while constantly rinsing with buffer. After removing the non-biotinylated strand a fluorescent probe was hybridised, which is complementary to the wild-type sequence. If this probe binds to a mutant sequence, then one single base is not fully matching. Thereby, the mismatched hybrid (mutant) is less stable than the full-matched hybrid (wild-type). The final step after hybridisation on the chip involves rinsing with a buffer to start dissociation of the fluorescent probe from the immobilised DNA strand. The online measurement of the fluorescence intensity by the biochip scanner provides the possibility to follow the kinetics of the hybridisation and dissociation processes. According to the different stability of the full-match and the mismatch, either visual discrimination or kinetic analysis is possible to distinguish SNP-containing sequence from the wild-type sequence.

Wear mechanism of CBN cutting tool during high-speed machining of mold steel

International Nuclear Information System (INIS)

Farhat, Z.N.

2003-01-01

Wear behavior of cubic boron nitride (CBN) cutting tool when cutting P20 tool steel was investigated. Oblique cutting tests were performed on a CNC lathe using five speeds, namely, 240, 600 and 1000 m min -1 . The CBN cutting tools were found to be superior to tungsten carbide (WC) tools. Fourfold increase in productivity and significant reduction in chipping and cratering was achieved for CBN as compared to WC. Wear, as the width of the wear land (VB), was monitored at selected time intervals; furthermore, topography of worn surfaces was performed, using a profilometer. Wear characterization of the rake and the flank surfaces as well as of the collected chips was conducted using a scanning electron microscopy (SEM), backscattered electron imaging and energy depressive X-ray (EDX). It was found that deformation in the chips occurs by localized shear deformation and the dominant wear mechanism at all speeds used was identified to be diffusive wear. At a 1000 m min -1 cutting speed, a secondary wear mechanism was identified, which is melt wear, i.e., formation of low melting point Cr and Mn compounds with the tool material and the subsequent ejection from the cutting zone

Reconfigurable radio-frequency arbitrary waveforms synthesized in a silicon photonic chip.

Science.gov (United States)

Wang, Jian; Shen, Hao; Fan, Li; Wu, Rui; Niu, Ben; Varghese, Leo T; Xuan, Yi; Leaird, Daniel E; Wang, Xi; Gan, Fuwan; Weiner, Andrew M; Qi, Minghao

2015-01-12

Photonic methods of radio-frequency waveform generation and processing can provide performance advantages and flexibility over electronic methods due to the ultrawide bandwidth offered by the optical carriers. However, bulk optics implementations suffer from the lack of integration and slow reconfiguration speed. Here we propose an architecture of integrated photonic radio-frequency generation and processing and implement it on a silicon chip fabricated in a semiconductor manufacturing foundry. Our device can generate programmable radio-frequency bursts or continuous waveforms with only the light source, electrical drives/controls and detectors being off-chip. It modulates an individual pulse in a radio-frequency burst within 4 ns, achieving a reconfiguration speed three orders of magnitude faster than thermal tuning. The on-chip optical delay elements offer an integrated approach to accurately manipulating individual radio-frequency waveform features without constraints set by the speed and timing jitter of electronics, and should find applications ranging from high-speed wireless to defence electronics.

Design of automatic curtain controlled by wireless based on single chip 51 microcomputer

Science.gov (United States)

Han, Dafeng; Chen, Xiaoning

2017-08-01

In order to realize the wireless control of the domestic intelligent curtains, a set of wireless intelligent curtain control system based on 51 single chip microcomputer have been designed in this paper. The intelligent curtain can work in the manual mode, automatic mode and sleep mode and can be carried out by the button and mobile phone APP mode loop switch. Through the photosensitive resistance module and human pyroelectric infrared sensor to collect the indoor light value and the data whether there is the person in the room, and then after single chip processing, the motor drive module is controlled to realize the positive inversion of the asynchronous motor, the intelligent opening and closing of the curtain have been realized. The operation of the motor can be stopped under the action of the switch and the curtain opening and closing and timing switch can be controlled through the keys and mobile phone APP. The optical fiber intensity, working mode, curtain state and system time are displayed by LCD1602. The system has a high reliability and security under practical testing and with the popularity and development of smart home, the design has broad market prospects.

Transportable GPU (General Processor Units) chip set technology for standard computer architectures

Science.gov (United States)

Fosdick, R. E.; Denison, H. C.

1982-11-01

The USAFR-developed GPU Chip Set has been utilized by Tracor to implement both USAF and Navy Standard 16-Bit Airborne Computer Architectures. Both configurations are currently being delivered into DOD full-scale development programs. Leadless Hermetic Chip Carrier packaging has facilitated implementation of both architectures on single 41/2 x 5 substrates. The CMOS and CMOS/SOS implementations of the GPU Chip Set have allowed both CPU implementations to use less than 3 watts of power each. Recent efforts by Tracor for USAF have included the definition of a next-generation GPU Chip Set that will retain the application-proven architecture of the current chip set while offering the added cost advantages of transportability across ISO-CMOS and CMOS/SOS processes and across numerous semiconductor manufacturers using a newly-defined set of common design rules. The Enhanced GPU Chip Set will increase speed by an approximate factor of 3 while significantly reducing chip counts and costs of standard CPU implementations.

Development of a high-throughput Candida albicans biofilm chip.

Directory of Open Access Journals (Sweden)

Anand Srinivasan

2011-04-01

Full Text Available We have developed a high-density microarray platform consisting of nano-biofilms of Candida albicans. A robotic microarrayer was used to print yeast cells of C. albicans encapsulated in a collagen matrix at a volume as low as 50 nL onto surface-modified microscope slides. Upon incubation, the cells grow into fully formed "nano-biofilms". The morphological and architectural complexity of these biofilms were evaluated by scanning electron and confocal scanning laser microscopy. The extent of biofilm formation was determined using a microarray scanner from changes in fluorescence intensities due to FUN 1 metabolic processing. This staining technique was also adapted for antifungal susceptibility testing, which demonstrated that, similar to regular biofilms, cells within the on-chip biofilms displayed elevated levels of resistance against antifungal agents (fluconazole and amphotericin B. Thus, results from structural analyses and antifungal susceptibility testing indicated that despite miniaturization, these biofilms display the typical phenotypic properties associated with the biofilm mode of growth. In its final format, the C. albicans biofilm chip (CaBChip is composed of 768 equivalent and spatially distinct nano-biofilms on a single slide; multiple chips can be printed and processed simultaneously. Compared to current methods for the formation of microbial biofilms, namely the 96-well microtiter plate model, this fungal biofilm chip has advantages in terms of miniaturization and automation, which combine to cut reagent use and analysis time, minimize labor intensive steps, and dramatically reduce assay costs. Such a chip should accelerate the antifungal drug discovery process by enabling rapid, convenient and inexpensive screening of hundreds-to-thousands of compounds simultaneously.

Testing of a single-polarity piezoresistive three-dimensional stress-sensing chip

International Nuclear Information System (INIS)

Gharib, H H; Moussa, W A

2013-01-01

A new piezoresistive stress-sensing rosette is developed to extract the components of the three-dimensional (3D) stress tensor using single-polarity (n-type) piezoresistors. This paper presents the testing of a micro-fabricated sensing chip utilizing the developed single-polarity rosette. The testing is conducted using a four-point bending of a chip-on-beam to induce five controlled stress components, which are analyzed both numerically and experimentally. Numerical analysis using finite element analysis is conducted to study the levels of the induced stress components at three rosette-sites and the levels of the stress field non-uniformities, and to simulate the extracted stress components from the sensing rosette. The experimental analysis applied tensile and compressive loads over three rosette-sites at different load increments. The experimentally extracted stress components show good linearity with the applied load and values close to the numerical model. (paper)

Flexible multimode polymer waveguides for high-speed short-reach communication links

Science.gov (United States)

Bamiedakis, N.; Shi, F.; Chu, D.; Penty, R. V.; White, I. H.

2018-02-01

Multimode polymer waveguides have attracted great interest for use in high-speed short-reach communication links as they can be cost-effectively integrated onto standard PCBs using conventional methods of the electronics industry and provide low loss (30 GHz×m) interconnection. The formation of such waveguides on flexible substrates can further provide flexible low-weight low-thickness interconnects and offer additional freedom in the implementation of high-speed short-reach optical links. These attributes make these flexible waveguides particularly attractive for use in low-cost detachable chip-to-chip links and in environments where weight and shape conformity become important, such as in cars and aircraft. However, the highly-multimoded nature of these waveguides raises important questions about their performance under severe flex due to mode loss and mode coupling. In this work therefore, we investigate the loss, crosstalk and bandwidth performance of such waveguides under out-of plane bending and in-plane twisting under different launch conditions and carry out data transmission tests at 40 Gb/s on a 1 m long spiral flexible waveguide under flexure. Excellent optical transmission characteristics are obtained while robust loss, crosstalk and bandwidth performance are demonstrated under flexure. Error-free (BER<10-12) 40 Gb/s data transmission is achieved over the 1 m long spiral waveguide for a 180° bend with a 4 mm radius. The obtained results demonstrate the excellent optical and mechanical properties of this technology and highlight its potential for use in real-world systems.

High-speed charge-to-time converter ASIC for the Super-Kamiokande detector

Energy Technology Data Exchange (ETDEWEB)

Nishino, H., E-mail: nishino@post.kek.j [Institute for Cosmic Ray Research, University of Tokyo, Chiba 277-8582 (Japan); Awai, K.; Hayato, Y.; Nakayama, S.; Okumura, K.; Shiozawa, M.; Takeda, A. [Institute for Cosmic Ray Research, University of Tokyo, Chiba 277-8582 (Japan); Ishikawa, K.; Minegishi, A. [Iwatsu Test Instruments Corporation, Tokyo 168-8511 (Japan); Arai, Y. [The Institute of Particle and Nuclear Studies, KEK, Ibaraki 305-0801 (Japan)

2009-11-11

A new application-specific integrated circuit (ASIC), the high-speed charge-to-time converter (QTC) IWATSU CLC101, provides three channels, each consisting of preamplifier, discriminator, low-pass filter, and charge integration circuitry, optimized for the waveform of a photomultiplier tube (PMT). This ASIC detects PMT signals using individual built-in discriminators and drives output timing signals whose width represents the integrated charge of the PMT signal. Combined with external input circuits composed of passive elements, the QTC provides full analog signal processing for the detector's PMTs, ready for further processing by time-to-digital converters (TDCs). High-rate (>1MHz) signal processing is achieved by short-charge-conversion-time and baseline-restoration circuits. Wide-range charge measurements are enabled by offering three gain ranges while maintaining a short cycle time. QTC chip test results show good analog performance, with efficient detection for a single photoelectron signal, four orders of magnitude dynamic range (0.3mVapprox3V; 0.2approx2500pC), 1% charge linearity, 0.2 pC charge resolution, and 0.1 ns timing resolution. Test results on ambient temperature dependence, channel isolation, and rate dependence also meet specifications.

High-speed charge-to-time converter ASIC for the Super-Kamiokande detector

International Nuclear Information System (INIS)

Nishino, H.; Awai, K.; Hayato, Y.; Nakayama, S.; Okumura, K.; Shiozawa, M.; Takeda, A.; Ishikawa, K.; Minegishi, A.; Arai, Y.

2009-01-01

A new application-specific integrated circuit (ASIC), the high-speed charge-to-time converter (QTC) IWATSU CLC101, provides three channels, each consisting of preamplifier, discriminator, low-pass filter, and charge integration circuitry, optimized for the waveform of a photomultiplier tube (PMT). This ASIC detects PMT signals using individual built-in discriminators and drives output timing signals whose width represents the integrated charge of the PMT signal. Combined with external input circuits composed of passive elements, the QTC provides full analog signal processing for the detector's PMTs, ready for further processing by time-to-digital converters (TDCs). High-rate (>1MHz) signal processing is achieved by short-charge-conversion-time and baseline-restoration circuits. Wide-range charge measurements are enabled by offering three gain ranges while maintaining a short cycle time. QTC chip test results show good analog performance, with efficient detection for a single photoelectron signal, four orders of magnitude dynamic range (0.3mV∼3V; 0.2∼2500pC), 1% charge linearity, 0.2 pC charge resolution, and 0.1 ns timing resolution. Test results on ambient temperature dependence, channel isolation, and rate dependence also meet specifications.

Characterization of Tool Wear in High-Speed Milling of Hardened Powder Metallurgical Steels

Directory of Open Access Journals (Sweden)

Fritz Klocke

2011-01-01

Full Text Available In this experimental study, the cutting performance of ball-end mills in high-speed dry-hard milling of powder metallurgical steels was investigated. The cutting performance of the milling tools was mainly evaluated in terms of cutting length, tool wear, and cutting forces. Two different types of hardened steels were machined, the cold working steel HS 4-2-4 PM (K490 Microclean/66 HRC and the high speed steel HS 6-5-3 PM (S790 Microclean/64 HRC. The milling tests were performed at effective cutting speeds of 225, 300, and 400 m/min with a four fluted solid carbide ball-end mill (0 = 6, TiAlN coating. It was observed that by means of analytically optimised chipping parameters and increased cutting speed, the tool life can be drastically enhanced. Further, in machining the harder material HS 4-2-4 PM, the tool life is up to three times in regard to the less harder material HS 6-5-3 PM. Thus, it can be assumed that not only the hardness of the material to be machined plays a vital role for the high-speed dry-hard cutting performance, but also the microstructure and thermal characteristics of the investigated powder metallurgical steels in their hardened state.

Reliable single chip genotyping with semi-parametric log-concave mixtures.

Directory of Open Access Journals (Sweden)

Ralph C A Rippe

Full Text Available The common approach to SNP genotyping is to use (model-based clustering per individual SNP, on a set of arrays. Genotyping all SNPs on a single array is much more attractive, in terms of flexibility, stability and applicability, when developing new chips. A new semi-parametric method, named SCALA, is proposed. It is based on a mixture model using semi-parametric log-concave densities. Instead of using the raw data, the mixture is fitted on a two-dimensional histogram, thereby making computation time almost independent of the number of SNPs. Furthermore, the algorithm is effective in low-MAF situations.Comparisons between SCALA and CRLMM on HapMap genotypes show very reliable calling of single arrays. Some heterozygous genotypes from HapMap are called homozygous by SCALA and to lesser extent by CRLMM too. Furthermore, HapMap's NoCalls (NN could be genotyped by SCALA, mostly with high probability. The software is available as R scripts from the website www.math.leidenuniv.nl/~rrippe.

A 16X16 Discrete Cosine Transform Chip

Science.gov (United States)

Sun, M. T.; Chen, T. C.; Gottlieb, A.; Wu, L.; Liou, M. L.

1987-10-01

Among various transform coding techniques for image compression the Discrete Cosine Transform (DCT) is considered to be the most effective method and has been widely used in the laboratory as well as in the market, place. DCT is computationally intensive. For video application at 14.3 MHz sample rate, a direct implementation of a 16x16 DCT requires a throughput, rate of approximately half a billion multiplications per second. In order to reduce the cost of hardware implementation, a single chip DCT implementation is highly desirable. In this paper, the implementation of a 16x16 DCT chip using a concurrent architecture will be presented. The chip is designed for real-time processing of 14.3 MHz sampled video data. It uses row-column decomposition to implement the two-dimensional transform. Distributed arithmetic combined with hit-serial and hit-parallel structures is used to implement the required vector inner products concurrently. Several schemes are utilized to reduce the size of required memory. The resultant circuit only uses memory, shift registers, and adders. No multipliers are required. It achieves high speed performance with a very regular and efficient integrated circuit realization. The chip accepts 0-bit input and produces 14-bit DCT coefficients. 12 bits are maintained after the first one-dimensional transform. The circuit has been laid out using a 2-μm CMOS technology with a symbolic design tool MULGA. The core contains approximately 73,000 transistors in an area of 7.2 x 7.0

High-Speed Rapid-Single-Flux-Quantum Multiplexer and Demultiplexer Design and Testing

Science.gov (United States)

2007-08-22

Herr, N. Vukovic , C. A. Mancini, M. F. Bocko, and M. J . Feldman, "High speed testing of a four-bit RSFQ decimation digital filter," IEEE Trans. Appl...61] A. M. Herr, C. A. Mancini, N. Vukovic , M. F. Bocko, and M. J . Feldman, "High-speed operation of a 64-bit circular shift register," IEEE Trans...10-19 J . A rich library of basic cells such as flip-flops, buffers, adders, multipliers, clock generator circuits, and phase-locking circuits have been

Motion stability of high-speed maglev systems in consideration of aerodynamic effects: a study of a single magnetic suspension system

Science.gov (United States)

Wu, Han; Zeng, Xiao-Hui; Yu, Yang

2017-12-01

In this study, the intrinsic mechanism of aerodynamic effects on the motion stability of a high-speed maglev system was investigated. The concept of a critical speed for maglev vehicles considering the aerodynamic effect is proposed. The study was carried out based on a single magnetic suspension system, which is convenient for proposing relevant concepts and obtaining explicit expressions. This study shows that the motion stability of the suspension system is closely related to the vehicle speed when aerodynamic effects are considered. With increases of the vehicle speed, the stability behavior of the system changes. At a certain vehicle speed, the stability of the system reaches a critical state, followed by instability. The speed corresponding to the critical state is the critical speed. Analysis reveals that when the system reaches the critical state, it takes two forms, with two critical speeds, and thus two expressions for the critical speed are obtained. The conditions of the existence of the critical speed were determined, and the effects of the control parameters and the lift coefficient on the critical speed were analyzed by numerical analysis. The results show that the first critical speed appears when the aerodynamic force is upward, and the second critical speed appears when the aerodynamic force is downward. Moreover, both critical speeds decrease with the increase of the lift coefficient.

The development and validation of EpiComet-Chip, a modified high-throughput comet assay for the assessment of DNA methylation status.

Science.gov (United States)

Townsend, Todd A; Parrish, Marcus C; Engelward, Bevin P; Manjanatha, Mugimane G

2017-08-01

DNA damage and alterations in global DNA methylation status are associated with multiple human diseases and are frequently correlated with clinically relevant information. Therefore, assessing DNA damage and epigenetic modifications, including DNA methylation, is critical for predicting human exposure risk of pharmacological and biological agents. We previously developed a higher-throughput platform for the single cell gel electrophoresis (comet) assay, CometChip, to assess DNA damage and genotoxic potential. Here, we utilized the methylation-dependent endonuclease, McrBC, to develop a modified alkaline comet assay, "EpiComet," which allows single platform evaluation of genotoxicity and global DNA methylation [5-methylcytosine (5-mC)] status of single-cell populations under user-defined conditions. Further, we leveraged the CometChip platform to create an EpiComet-Chip system capable of performing quantification across simultaneous exposure protocols to enable unprecedented speed and simplicity. This system detected global methylation alterations in response to exposures which included chemotherapeutic and environmental agents. Using EpiComet-Chip on 63 matched samples, we correctly identified single-sample hypermethylation (≥1.5-fold) at 87% (20/23), hypomethylation (≥1.25-fold) at 100% (9/9), with a 4% (2/54) false-negative rate (FNR), and 10% (4/40) false-positive rate (FPR). Using a more stringent threshold to define hypermethylation (≥1.75-fold) allowed us to correctly identify 94% of hypermethylation (17/18), but increased our FPR to 16% (7/45). The successful application of this novel technology will aid hazard identification and risk characterization of FDA-regulated products, while providing utility for investigating epigenetic modes of action of agents in target organs, as the assay is amenable to cultured cells or nucleated cells from any tissue. Environ. Mol. Mutagen. 58:508-521, 2017. © 2017 Wiley Periodicals, Inc. © 2017 Wiley Periodicals, Inc.

High-speed uncooled MWIR hostile fire indication sensor

Science.gov (United States)

Zhang, L.; Pantuso, F. P.; Jin, G.; Mazurenko, A.; Erdtmann, M.; Radhakrishnan, S.; Salerno, J.

2011-06-01

Hostile fire indication (HFI) systems require high-resolution sensor operation at extremely high speeds to capture hostile fire events, including rocket-propelled grenades, anti-aircraft artillery, heavy machine guns, anti-tank guided missiles and small arms. HFI must also be conducted in a waveband with large available signal and low background clutter, in particular the mid-wavelength infrared (MWIR). The shortcoming of current HFI sensors in the MWIR is the bandwidth of the sensor is not sufficient to achieve the required frame rate at the high sensor resolution. Furthermore, current HFI sensors require cryogenic cooling that contributes to size, weight, and power (SWAP) in aircraft-mounted applications where these factors are at a premium. Based on its uncooled photomechanical infrared imaging technology, Agiltron has developed a low-SWAP, high-speed MWIR HFI sensor that breaks the bandwidth bottleneck typical of current infrared sensors. This accomplishment is made possible by using a commercial-off-the-shelf, high-performance visible imager as the readout integrated circuit and physically separating this visible imager from the MWIR-optimized photomechanical sensor chip. With this approach, we have achieved high-resolution operation of our MWIR HFI sensor at 1000 fps, which is unprecedented for an uncooled infrared sensor. We have field tested our MWIR HFI sensor for detecting all hostile fire events mentioned above at several test ranges under a wide range of environmental conditions. The field testing results will be presented.

Ultrahigh-speed hybrid laser for silicon photonic integrated chips

DEFF Research Database (Denmark)

Chung, Il-Sug; Park, Gyeong Cheol; Ran, Qijiang

2013-01-01

Increasing power consumption for electrical interconnects between and inside chips is posing a real challenge to continue the performance scaling of processors/computers as predicted by D. Moore. In recent processors, energy consumption for electrical interconnects is half of power supplied...... and will be 80% in near future. This challenge strongly has motivated replacing electrical interconnects with optical ones even in chip level communications [1]. This chip-level optical interconnects need quite different performance of optoelectronic devices than required for conventional optical communications....... For a light source, the energy consumption per sending a bit is required to be

Low-Speed Stability-and-Control and Ground-Effects Measurements on the Industry Reference High Speed Civil Transport

Science.gov (United States)

Kemmerly, Guy T.; Campbell, Bryan A.; Banks, Daniel W.; Yaros, Steven F.

1999-01-01

As a part of a national effort to develop an economically feasible High Speed Civil Transport (HSCT), a single configuration has been accepted as the testing baseline by the organizations working in the High Speed Research (HSR) program. The configuration is based on a design developed by the Boeing Company and is referred to as the Reference H (Ref H). The data contained in this report are low-speed stability-and-control and ground-effect measurements obtained on a 0.06 scale model of the Ref H in a subsonic tunnel.

Dynamic response analysis of single-span guideway caused by high speed maglev train

Directory of Open Access Journals (Sweden)

Jin Shi

Full Text Available High speed maglev is one of the most important reformations in the ground transportation systems because of its no physical contact nature. This paper intends to study the dynamic response of the single-span guideway induced by moving maglev train. The dynamic model of the maglev train-guideway system is established. In this model, a maglev train consists of three vehicles and each vehicle is regarded as a multibody system with 34 degrees-of-freedom. The guideway is modeled as a simply supported beam. Considering the motion-dependent nature of electromagnetic forces in the maglev system, an iterative approach is presented to compute the dynamic response of a maglev train-guideway system. The histories of the train traversing the guideways are simulated and the dynamic responses of the guideway and the train vehicles are calculated. A field experiment is carried out to verify the results of the analysis. The resonant conditions of single-span guideway are analyzed. The results show that all the dynamic indexes of train-guideway system are far less than permissive values of railway and maglev system, the vertical resonant of guideways caused by periodical excitations of the train will not happen.

Interfacing Lab-on-a-Chip Embryo Technology with High-Definition Imaging Cytometry.

Science.gov (United States)

Zhu, Feng; Hall, Christopher J; Crosier, Philip S; Wlodkowic, Donald

2015-08-01

To spearhead deployment of zebrafish embryo biotests in large-scale drug discovery studies, automated platforms are needed to integrate embryo in-test positioning and immobilization (suitable for high-content imaging) with fluidic modules for continuous drug and medium delivery under microperfusion to developing embryos. In this work, we present an innovative design of a high-throughput three-dimensional (3D) microfluidic chip-based device for automated immobilization and culture and time-lapse imaging of developing zebrafish embryos under continuous microperfusion. The 3D Lab-on-a-Chip array was fabricated in poly(methyl methacrylate) (PMMA) transparent thermoplastic using infrared laser micromachining, while the off-chip interfaces were fabricated using additive manufacturing processes (fused deposition modelling and stereolithography). The system's design facilitated rapid loading and immobilization of a large number of embryos in predefined clusters of traps during continuous microperfusion of drugs/toxins. It was conceptually designed to seamlessly interface with both upright and inverted fluorescent imaging systems and also to directly interface with conventional microtiter plate readers that accept 96-well plates. Compared with the conventional Petri dish assays, the chip-based bioassay was much more convenient and efficient as only small amounts of drug solutions were required for the whole perfusion system running continuously over 72 h. Embryos were spatially separated in the traps that assisted tracing single embryos, preventing interembryo contamination and improving imaging accessibility.

Towards Chip Scale Liquid Chromatography and High Throughput Immunosensing

Energy Technology Data Exchange (ETDEWEB)

Ni, Jing [Iowa State Univ., Ames, IA (United States)

2000-09-21

This work describes several research projects aimed towards developing new instruments and novel methods for high throughput chemical and biological analysis. Approaches are taken in two directions. The first direction takes advantage of well-established semiconductor fabrication techniques and applies them to miniaturize instruments that are workhorses in analytical laboratories. Specifically, the first part of this work focused on the development of micropumps and microvalves for controlled fluid delivery. The mechanism of these micropumps and microvalves relies on the electrochemically-induced surface tension change at a mercury/electrolyte interface. A miniaturized flow injection analysis device was integrated and flow injection analyses were demonstrated. In the second part of this work, microfluidic chips were also designed, fabricated, and tested. Separations of two fluorescent dyes were demonstrated in microfabricated channels, based on an open-tubular liquid chromatography (OT LC) or an electrochemically-modulated liquid chromatography (EMLC) format. A reduction in instrument size can potentially increase analysis speed, and allow exceedingly small amounts of sample to be analyzed under diverse separation conditions. The second direction explores the surface enhanced Raman spectroscopy (SERS) as a signal transduction method for immunoassay analysis. It takes advantage of the improved detection sensitivity as a result of surface enhancement on colloidal gold, the narrow width of Raman band, and the stability of Raman scattering signals to distinguish several different species simultaneously without exploiting spatially-separated addresses on a biochip. By labeling gold nanoparticles with different Raman reporters in conjunction with different detection antibodies, a simultaneous detection of a dual-analyte immunoassay was demonstrated. Using this scheme for quantitative analysis was also studied and preliminary dose-response curves from an immunoassay of a

High speed machinability of the aerospace alloy AA7075 T6 under different cooling conditions

Science.gov (United States)

Imbrogno, Stano; Rinaldi, Sergio; Suarez, Asier Gurruchaga; Arrazola, Pedro J.; Umbrello, Domenico

2018-05-01

This paper describes the results of an experimental investigation aimed to st udy the machinability of AA7075 T6 (160 HV) for aerospace industry at high cutting speeds. The paper investigates the effects of different lubri-cooling strategies (cryogenic, M QL and dry) during high speed turning process on cutting forces, tool wear, chip morphology and cutting temperatures. The cutting speeds selected were 1000m/min, 1250m/min and 1500 m/min, while the feed rate values used were 0.1mm/rev and 0.3 mm/rev. The results of cryogenic and M QL application is compared with dry application. It was found that the cryogenic and M QL lubri-cooling techniques could represent a functional alternative to the common dry cutting application in order to implement a more effect ive high speed turning process. Higher cuttingparameters would be able to increase the productivity and reduce the production costs. The effects of the cutting parameters and on the variables object of study were investigated and the role of the different lubri-cooling conditions was assessed.

Single-Chip Multiple-Frequency RF MEMS Resonant Platform for Wireless Communications, Phase I

Data.gov (United States)

National Aeronautics and Space Administration — A novel, single-chip, multiple-frequency platform for RF/IF filtering and clock reference based on contour-mode aluminum nitride (AlN) MEMS piezoelectric resonators...

K-band single-chip electron spin resonance detector.

Science.gov (United States)

Anders, Jens; Angerhofer, Alexander; Boero, Giovanni

2012-04-01

We report on the design, fabrication, and characterization of an integrated detector for electron spin resonance spectroscopy operating at 27 GHz. The microsystem, consisting of an LC-oscillator and a frequency division module, is integrated onto a single silicon chip using a conventional complementary metal-oxide-semiconductor technology. The achieved room temperature spin sensitivity is about 10(8)spins/G Hz(1/2), with a sensitive volume of about (100 μm)(3). Operation at 77K is also demonstrated. Copyright © 2012 Elsevier Inc. All rights reserved.

High Speed Wireless Signal Generation and Demodulation

DEFF Research Database (Denmark)

Caballero Jambrina, Antonio; Sambaraju, Rakesh; Zibar, Darko

We present the experimental demonstration of high speed wireless generation, up to 40 Gb/s, in the 75-110 GHz wireless band. All-optical OFDM and photonic up-conversion are used for generation and single side-band modulation with digital coherent detection for demodulation....

Improved Laser Manipulation for On-chip Fabricated Microstructures Based on Solution Replacement and Its Application in Single Cell Analysis

Directory of Open Access Journals (Sweden)

Tao Yue

2014-02-01

Full Text Available In this paper, we present the fabrication and assembly of microstructures inside a microfluidic device based on a photocrosslinkable resin and optical tweezers. We also report a method of solution replacement inside the microfluidic channel in order to improve the manipulation performance and apply the assembled microstructures for single cell cultivation. By the illumination of patterned ultraviolet (UV through a microscope, microstructures of arbitrary shape were fabricated by the photocrosslinkable resin inside a microfluidic channel. Based on the microfluidic channel with both glass and polydimethylsiloxane (PDMS surfaces, immovable and movable microstructures were fabricated and manipulated. The microstructures were fabricated at the desired places and manipulated by the optical tweezers. A rotational microstructure including a microgear and a rotation axis was assembled and rotated in demonstrating this technique. The improved laser manipulation of microstructures was achieved based on the on-chip solution replacement method. The manipulation speed of the microstructures increased when the viscosity of the solvent decreased. The movement efficiency of the fabricated microstructures inside the lower viscosity solvent was evaluated and compared with those microstructures inside the former high viscosity solvent. A novel cell cage was fabricated and the cultivation of a single yeast cell (w303 was demonstrated in the cell cage, inside the microfluidic device.

Chip-integrated ultrawide-band all-optical logic comparator in plasmonic circuits.

Science.gov (United States)

Lu, Cuicui; Hu, Xiaoyong; Yang, Hong; Gong, Qihuang

2014-01-27

Optical computing opens up the possibility for the realization of ultrahigh-speed and ultrawide-band information processing. Integrated all-optical logic comparator is one of the indispensable core components of optical computing systems. Unfortunately, up to now, no any nanoscale all-optical logic comparator suitable for on-chip integration applications has been realized experimentally. Here, we report a subtle and effective technical solution to circumvent the obstacles of inherent Ohmic losses of metal and limited propagation length of SPPs. A nanoscale all-optical logic comparator suitable for on-chip integration applications is realized in plasmonic circuits directly. The incident single-bit (or dual-bit) logic signals can be compared and the comparison results are endowed with different logic encodings. An ultrabroad operating wavelength range from 700 to 1000 nm, and an ultrahigh output logic-state contrast-ratio of more than 25 dB are realized experimentally. No high power requirement is needed. Though nanoscale SPP light source and the logic comparator device are integrated into the same plasmonic chip, an ultrasmall feature size is maintained. This work not only paves a way for the realization of complex logic device such as adders and multiplier, but also opens up the possibility for realizing quantum solid chips based on plasmonic circuits.

Ring resonator-based single-chip 1x8 optical beam forming network in LPCVD waveguide technology

NARCIS (Netherlands)

Zhuang, L.; Roeloffzen, C.G.H.; Heideman, Rene; Borreman, A.; Meijerink, Arjan; van Etten, Wim; Koonen, A.M.J.; Leijtens, X.J.M.; van den Boom, H.P.A.; Verdurmen, E.J.M.; Molina Vázquez, J.

2006-01-01

Optical ring resonators (ORRs) are good candidates to provide continuously tunable delay in beam forming networks (BFNs) for phased array antenna systems. Delay and splitting/combining elements can be integrated on a single optical chip to form an OBFN. A state-of-the-art 1×8 OBFN chip has been

A single chip pulse processor for nuclear spectroscopy

International Nuclear Information System (INIS)

Hilsenrath, F.; Bakke, J.C.; Voss, H.D.

1985-01-01

A high performance digital pulse processor, integrated into a single gate array microcircuit, has been developed for spaceflight applications. The new approach takes advantage of the latest CMOS high speed A/D flash converters and low-power gated logic arrays. The pulse processor measures pulse height, pulse area and the required timing information (e.g. multi detector coincidence and pulse pile-up detection). The pulse processor features high throughput rate (e.g. 0.5 Mhz for 2 usec gausssian pulses) and improved differential linearity (e.g. + or - 0.2 LSB for a + or - 1 LSB A/D). Because of the parallel digital architecture of the device, the interface is microprocessor bus compatible. A satellite flight application of this module is presented for use in the X-ray imager and high energy particle spectrometers of the PEM experiment on the Upper Atmospheric Research Satellite

High speed atom source

International Nuclear Information System (INIS)

Hoshino, Hitoshi.

1990-01-01

In a high speed atom source, since the speed is not identical between ions and electrons, no sufficient neutralizing effect for ionic rays due to the mixing of the ionic rays and the electron rays can be obtained failing to obtain high speed atomic rays at high density. In view of the above, a speed control means is disposed for equalizing the speed of ions forming ionic rays and the speed of electrons forming electron rays. Further, incident angle of the electron rays and/or ionic rays to a magnet or an electrode is made variable. As a result, the relative speed between the ions and the electrons to the processing direction is reduced to zero, in which the probability of association between the ions and the electrons due to the coulomb force is increased to improve the neutralizing efficiency to easily obtain fine and high density high speed electron rays. Further, by varying the incident angle, a track capable of obtaining an ideal mixing depending on the energy of the neutralized ionic rays is formed. Since the high speed electron rays has such high density, they can be irradiated easily to the minute region of the specimen. (N.H.)

Real-time Image Processing for Microscopy-based Label-free Imaging Flow Cytometry in a Microfluidic Chip.

Science.gov (United States)

Heo, Young Jin; Lee, Donghyeon; Kang, Junsu; Lee, Keondo; Chung, Wan Kyun

2017-09-14

Imaging flow cytometry (IFC) is an emerging technology that acquires single-cell images at high-throughput for analysis of a cell population. Rich information that comes from high sensitivity and spatial resolution of a single-cell microscopic image is beneficial for single-cell analysis in various biological applications. In this paper, we present a fast image-processing pipeline (R-MOD: Real-time Moving Object Detector) based on deep learning for high-throughput microscopy-based label-free IFC in a microfluidic chip. The R-MOD pipeline acquires all single-cell images of cells in flow, and identifies the acquired images as a real-time process with minimum hardware that consists of a microscope and a high-speed camera. Experiments show that R-MOD has the fast and reliable accuracy (500 fps and 93.3% mAP), and is expected to be used as a powerful tool for biomedical and clinical applications.

Rapid and Low-Cost CRP Measurement by Integrating a Paper-Based Microfluidic Immunoassay with Smartphone (CRP-Chip)

Science.gov (United States)

Dong, Meili; Wu, Jiandong; Ma, Zimin; Peretz-Soroka, Hagit; Zhang, Michael; Komenda, Paul; Tangri, Navdeep; Liu, Yong; Rigatto, Claudio; Lin, Francis

2017-01-01

Traditional diagnostic tests for chronic diseases are expensive and require a specialized laboratory, therefore limiting their use for point-of-care (PoC) testing. To address this gap, we developed a method for rapid and low-cost C-reactive protein (CRP) detection from blood by integrating a paper-based microfluidic immunoassay with a smartphone (CRP-Chip). We chose CRP for this initial development because it is a strong biomarker of prognosis in chronic heart and kidney disease. The microfluidic immunoassay is realized by lateral flow and gold nanoparticle-based colorimetric detection of the target protein. The test image signal is acquired and analyzed using a commercial smartphone with an attached microlens and a 3D-printed chip–phone interface. The CRP-Chip was validated for detecting CRP in blood samples from chronic kidney disease patients and healthy subjects. The linear detection range of the CRP-Chip is up to 2 μg/mL and the detection limit is 54 ng/mL. The CRP-Chip test result yields high reproducibility and is consistent with the standard ELISA kit. A single CRP-Chip can perform the test in triplicate on a single chip within 15 min for less than 50 US cents of material cost. This CRP-Chip with attractive features of low-cost, fast test speed, and integrated easy operation with smartphones has the potential to enable future clinical PoC chronic disease diagnosis and risk stratification by parallel measurements of a panel of protein biomarkers. PMID:28346363

Design and reliability analysis of high-speed and continuous data recording system based on disk array

Science.gov (United States)

Jiang, Changlong; Ma, Cheng; He, Ning; Zhang, Xugang; Wang, Chongyang; Jia, Huibo

2002-12-01

In many real-time fields the sustained high-speed data recording system is required. This paper proposes a high-speed and sustained data recording system based on the complex-RAID 3+0. The system consists of Array Controller Module (ACM), String Controller Module (SCM) and Main Controller Module (MCM). ACM implemented by an FPGA chip is used to split the high-speed incoming data stream into several lower-speed streams and generate one parity code stream synchronously. It also can inversely recover the original data stream while reading. SCMs record lower-speed streams from the ACM into the SCSI disk drivers. In the SCM, the dual-page buffer technology is adopted to implement speed-matching function and satisfy the need of sustainable recording. MCM monitors the whole system, controls ACM and SCMs to realize the data stripping, reconstruction, and recovery functions. The method of how to determine the system scale is presented. At the end, two new ways Floating Parity Group (FPG) and full 2D-Parity Group (full 2D-PG) are proposed to improve the system reliability and compared with the Traditional Parity Group (TPG). This recording system can be used conveniently in many areas of data recording, storing, playback and remote backup with its high-reliability.

Measure Guideline: Replacing Single-Speed Pool Pumps with Variable Speed Pumps for Energy Savings

Energy Technology Data Exchange (ETDEWEB)

Hunt, A.; Easley, S.

2012-05-01

The report evaluates potential energy savings by replacing traditional single-speed pool pumps with variable speed pool pumps, and provide a basic cost comparison between continued uses of traditional pumps verses new pumps. A simple step-by-step process for inspecting the pool area and installing a new pool pump follows.

The development of the time-keeping clock with TS-1 single chip microcomputer.

Science.gov (United States)

Zhou, Jiguang; Li, Yongan

The authors have developed a time-keeping clock with Intel 8751 single chip microcomputer that has been successfully used in time-keeping station. The hard-soft ware design and performance of the clock are introduced.

Neuromorphic VLSI Models of Selective Attention: From Single Chip Vision Sensors to Multi-chip Systems.

Science.gov (United States)

Indiveri, Giacomo

2008-09-03

Biological organisms perform complex selective attention operations continuously and effortlessly. These operations allow them to quickly determine the motor actions to take in response to combinations of external stimuli and internal states, and to pay attention to subsets of sensory inputs suppressing non salient ones. Selective attention strategies are extremely effective in both natural and artificial systems which have to cope with large amounts of input data and have limited computational resources. One of the main computational primitives used to perform these selection operations is the Winner-Take-All (WTA) network. These types of networks are formed by arrays of coupled computational nodes that selectively amplify the strongest input signals, and suppress the weaker ones. Neuromorphic circuits are an optimal medium for constructing WTA networks and for implementing efficient hardware models of selective attention systems. In this paper we present an overview of selective attention systems based on neuromorphic WTA circuits ranging from single-chip vision sensors for selecting and tracking the position of salient features, to multi-chip systems implement saliency-map based models of selective attention.

Neuromorphic VLSI Models of Selective Attention: From Single Chip Vision Sensors to Multi-chip Systems

Directory of Open Access Journals (Sweden)

Giacomo Indiveri

2008-09-01

Full Text Available Biological organisms perform complex selective attention operations continuously and effortlessly. These operations allow them to quickly determine the motor actions to take in response to combinations of external stimuli and internal states, and to pay attention to subsets of sensory inputs suppressing non salient ones. Selective attention strategies are extremely effective in both natural and artificial systems which have to cope with large amounts of input data and have limited computational resources. One of the main computational primitives used to perform these selection operations is the Winner-Take-All (WTA network. These types of networks are formed by arrays of coupled computational nodes that selectively amplify the strongest input signals, and suppress the weaker ones. Neuromorphic circuits are an optimal medium for constructing WTA networks and for implementing efficient hardware models of selective attention systems. In this paper we present an overview of selective attention systems based on neuromorphic WTA circuits ranging from single-chip vision sensors for selecting and tracking the position of salient features, to multi-chip systems implement saliency-map based models of selective attention.

Neutron-induced Single Event Upset on the RPC front-end chips for the CMS experiment

Energy Technology Data Exchange (ETDEWEB)

Abbrescia, M.; Colaleo, A.; Iaselli, G.; Loddo, F.; Maggi, M.; Marangelli, B.; Natali, S.; Nuzzo, S.; Pugliese, G.; Ranieri, A.; Romano, F.; Altieri, S.; Belli, G.; Bruno, G.; Guida, R.; Merlo, M.; Ratti, S.P.; Riccardi, C.; Torre, P.; Vitulo, P. E-mail: paolo.vitulo@pv.infn.it; De Bari, A.; Manera, S

2002-05-21

Neutrons from a reactor and from a cyclotron have been used to characterise the CMS Resistive Plate Chambers (RPCs) front-end chip to neutron-induced damaging events. Single Event Upset (SEU) cross-sections have been measured up to 60 MeV for different chip thresholds. Tests at a reactor were done with an integrated fast (E{sub n}>3 MeV) neutron fluence of 1.7x10{sup 10} cm{sup -2} and a thermal neutron fluence of 9.5x10{sup 11} cm{sup -2}. High-energy neutrons from a cyclotron were used up to a fluence of 10{sup 12} cm{sup -2}. Data indicate the existence of a chip SEU sensitivity already at thermal energy and a saturated SEU cross-section from 3 to 60 MeV. Values of the SEU cross-sections from the thermal run well agree with those obtained by another CMS group that uses the same technology (0.8 {mu}m BiCMOS) though with different architecture. Cross-sections obtained with fast neutrons (from 3 MeV to about 10 MeV) are consistently higher by one order of magnitude compared to the thermal one. The average time between consecutive SEU events in each chip of the CMS barrel RPCs can be estimated to be 1 h.

Measure Guideline. Replacing Single-Speed Pool Pumps with Variable Speed Pumps for Energy Savings

Energy Technology Data Exchange (ETDEWEB)

Hunt, A. [Building Media and the Building America Retrofit Alliance (BARA), Wilmington, DE (United States); Easley, S. [Building Media and the Building America Retrofit Alliance (BARA), Wilmington, DE (United States)

2012-05-01

This measure guideline evaluates potential energy savings by replacing traditional single-speed pool pumps with variable speed pool pumps, and provides a basic cost comparison between continued uses of traditional pumps verses new pumps. A simple step-by-step process for inspecting the pool area and installing a new pool pump follows.

An Integrated Power-Efficient Active Rectifier With Offset-Controlled High Speed Comparators for Inductively Powered Applications

Science.gov (United States)

Lee, Hyung-Min; Ghovanloo, Maysam

2011-01-01

We present an active full-wave rectifier with offset-controlled high speed comparators in standard CMOS that provides high power conversion efficiency (PCE) in high frequency (HF) range for inductively powered devices. This rectifier provides much lower dropout voltage and far better PCE compared to the passive on-chip or off-chip rectifiers. The built-in offset-control functions in the comparators compensate for both turn-on and turn-off delays in the main rectifying switches, thus maximizing the forward current delivered to the load and minimizing the back current to improve the PCE. We have fabricated this active rectifier in a 0.5-μm 3M2P standard CMOS process, occupying 0.18 mm2 of chip area. With 3.8 V peak ac input at 13.56 MHz, the rectifier provides 3.12 V dc output to a 500 Ω load, resulting in the PCE of 80.2%, which is the highest measured at this frequency. In addition, overvoltage protection (OVP) as safety measure and built-in back telemetry capabilities have been incorporated in our design using detuning and load shift keying (LSK) techniques, respectively, and tested. PMID:22174666

On-chip real-time single-copy polymerase chain reaction in picoliter droplets

Energy Technology Data Exchange (ETDEWEB)

Beer, N R; Hindson, B; Wheeler, E; Hall, S B; Rose, K A; Kennedy, I; Colston, B

2007-04-20

The first lab-on-chip system for picoliter droplet generation and PCR amplification with real-time fluorescence detection has performed PCR in isolated droplets at volumes 10{sup 6} smaller than commercial real-time PCR systems. The system utilized a shearing T-junction in a silicon device to generate a stream of monodisperse picoliter droplets that were isolated from the microfluidic channel walls and each other by the oil phase carrier. An off-chip valving system stopped the droplets on-chip, allowing them to be thermal cycled through the PCR protocol without droplet motion. With this system a 10-pL droplet, encapsulating less than one copy of viral genomic DNA through Poisson statistics, showed real-time PCR amplification curves with a cycle threshold of {approx}18, twenty cycles earlier than commercial instruments. This combination of the established real-time PCR assay with digital microfluidics is ideal for isolating single-copy nucleic acids in a complex environment.

UW VLSI chip tester

Science.gov (United States)

McKenzie, Neil

1989-12-01

We present a design for a low-cost, functional VLSI chip tester. It is based on the Apple MacIntosh II personal computer. It tests chips that have up to 128 pins. All pin drivers of the tester are bidirectional; each pin is programmed independently as an input or an output. The tester can test both static and dynamic chips. Rudimentary speed testing is provided. Chips are tested by executing C programs written by the user. A software library is provided for program development. Tests run under both the Mac Operating System and A/UX. The design is implemented using Xilinx Logic Cell Arrays. Price/performance tradeoffs are discussed.

High-speed highly temperature stable 980 nm VCSELs operating at 25 Gb/s at up to 85 °C for short reach optical interconnects

Science.gov (United States)

Mutig, Alex; Lott, James A.; Blokhin, Sergey A.; Moser, Philip; Wolf, Philip; Hofmann, Werner; Nadtochiy, Alexey M.; Bimberg, Dieter

2011-03-01

The progressive penetration of optical communication links into traditional copper interconnect markets greatly expands the applications of vertical cavity surface emitting lasers (VCSELs) for the next-generation of board-to-board, moduleto- module, chip-to-chip, and on-chip optical interconnects. Stability of the VCSEL parameters at high temperatures is indispensable for such applications, since these lasers typically reside directly on or near integrated circuit chips. Here we present 980 nm oxide-confined VCSELs operating error-free at bit rates up to 25 Gbit/s at temperatures as high as 85 °C without adjustment of the drive current and peak-to-peak modulation voltage. The driver design is therefore simplified and the power consumption of the driver electronics is lowered, reducing the production and operational costs. Small and large signal modulation experiments at various temperatures from 20 up to 85 °C for lasers with different oxide aperture diameters are presented in order to analyze the physical processes controlling the performance of the VCSELs. Temperature insensitive maximum -3 dB bandwidths of around 13-15 GHz for VCSELs with aperture diameters of 10 μm and corresponding parasitic cut-off frequencies exceeding 22 GHz are observed. Presented results demonstrate the suitability of our VCSELs for practical high speed and high temperature stable short-reach optical links.

High-speed three-dimensional plasma temperature determination of axially symmetric free-burning arcs

International Nuclear Information System (INIS)

Bachmann, B; Ekkert, K; Bachmann, J-P; Marques, J-L; Schein, J; Kozakov, R; Gött, G; Schöpp, H; Uhrlandt, D

2013-01-01

In this paper we introduce an experimental technique that allows for high-speed, three-dimensional determination of electron density and temperature in axially symmetric free-burning arcs. Optical filters with narrow spectral bands of 487.5–488.5 nm and 689–699 nm are utilized to gain two-dimensional spectral information of a free-burning argon tungsten inert gas arc. A setup of mirrors allows one to image identical arc sections of the two spectral bands onto a single camera chip. Two-different Abel inversion algorithms have been developed to reconstruct the original radial distribution of emission coefficients detected with each spectral window and to confirm the results. With the assumption of local thermodynamic equilibrium we calculate emission coefficients as a function of temperature by application of the Saha equation, the ideal gas law, the quasineutral gas condition and the NIST compilation of spectral lines. Ratios of calculated emission coefficients are compared with measured ones yielding local plasma temperatures. In the case of axial symmetry the three-dimensional plasma temperature distributions have been determined at dc currents of 100, 125, 150 and 200 A yielding temperatures up to 20000 K in the hot cathode region. These measurements have been validated by four different techniques utilizing a high-resolution spectrometer at different positions in the plasma. Plasma temperatures show good agreement throughout the different methods. Additionally spatially resolved transient plasma temperatures have been measured of a dc pulsed process employing a high-speed frame rate of 33000 frames per second showing the modulation of the arc isothermals with time and providing information about the sensitivity of the experimental approach. (paper)

Source-synchronous networks-on-chip circuit and architectural interconnect modeling

CERN Document Server

Mandal, Ayan; Mahapatra, Rabi

2014-01-01

This book describes novel methods for network-on-chip (NoC) design, using source-synchronous high-speed resonant clocks.  The authors discuss NoCs from the bottom up, providing circuit level details, before providing architectural simulations. As a result, readers will get a complete picture of how a NoC can be designed and optimized.  Using the methods described in this book, readers are enabled to design NoCs that are 5X better than existing approaches in terms of latency and throughput and can also sustain a significantly greater amount of traffic.   • Describes novel methods for high-speed network-on-chip (NoC) design; • Enables readers to understand NoC design from both circuit and architectural levels; • Provides circuit-level details of the NoC (including clocking, router design), along with a high-speed, resonant clocking style which is used in the NoC; • Includes architectural simulations of the NoC, demonstrating significantly superior performance over the state-of-the-art.

Investigation of High-Speed Cryogenic Machining Based on Finite Element Approach

Directory of Open Access Journals (Sweden)

Pooyan Vahidi Pashaki

Full Text Available Abstract The simulation of cryogenic machining process because of using a three-dimensional model and high process duration time in the finite element method, have been studied rarely. In this study, to overcome this limitation, a 2.5D finite element model using the commercial finite element software ABAQUS has been developed for the cryogenic machining process and by considering more realistic assumptions, the chip formation procedure investigated. In the proposed method, the liquid nitrogen has been used as a coolant. At the modeling of friction during the interaction of tools - chip, the Coulomb law has been used. In order to simulate the behavior of plasticity and failure criterion, Johnson-Cook model was used, and unlike previous investigations, thermal and mechanical properties of materials as a function of temperature were applied to the software. After examining accuracy of the model with present experimental data, the effect of parameters such as rake angle and the cutting speed as well as dry machining of aluminum alloy by the use of coupled dynamic temperature solution has been studied. Results indicated that at the cutting velocity of 10 m/s, cryogenic cooling has caused into decreasing 60 percent of tools temperature in comparison with the dry cooling. Furthermore, a chip which has been made by cryogenic machining were connected and without fracture in contrast to dry machining.

Development of γ dose rate monitor based on FPGA and single-chip microcomputer

International Nuclear Information System (INIS)

He Zhiguo; Ling Qiu; Guo Lanying; Yang Binhua

2009-01-01

A novelγdose rate monitor with multiple channels signal collection in which takes the FPGA as the core process chip and single-chip microcomputer as the data processor had been developed. This paper introduced the communication interface design between FPGA and MCU, and gave the data acquisition module and the function simulation chart designed by FPGA. In addition, the software and hardware design diagrams of MCU had been given in this paper. The maximum digitallization was carried on in the designing process. The experiments showed that the scheme for the system matched to the requests completely. (authors)

Development of based on 89S51 single-chip microcomputer electronic dosimeter

International Nuclear Information System (INIS)

Wang Junhua; Zhou Jiachao; Sun Jianghan; Du Xiao

2009-01-01

It describes the main design features and basic properties of based on 89S51 single-chip microcomputer electronic dosimeter with wide range and multi purposes. The dosimeter can display dose rate or accumulative dose or the maximum dose rate, record accumulative dose, the maximum dose rate and classes. (authors)

A low power high speed radiation hard serializer for High Energy Physics experiments

CERN Document Server

AUTHOR|(CDS)2080243; Marchioro, Alessandro; Ottavi, Marco

This Ph.D. thesis focuses on the development and the characterization of novel solutions for electronic systems for high-speed data transmission in extremely high radio-active environment (e.g. high energy physics application). The text proposes two alternative full-custom solutions for a fundamental enabling block for a lowpower serial data transmission system, the serializer. This block will find place in a future transceiver conceived for the future upgraded phase of the Large Hadron Collider, or LHC, at CERN. The first solution proposed, called “triple module redundancy”, is based on hardware redundancy, a well-known solution, to obtain protection against the temporary malfunctioning induced by radiation. In the second case a new architecture, called “code protected”, is proposed. This architecture takes advantage of the error correction code present in the data word to obtain radiation robustness on data and some parts of the control logic and to further reduce the power consumption. A test chip ...

High-Speed Single Quantum Dot Imaging of Artificial Lipids in Live Cells Reveal Partial Hop Diffusion

DEFF Research Database (Denmark)

Lagerholm, B. Christoffer; Clausen, Mathias P.; Christensen, Eva Arnspang

2010-01-01

-81). These findings have yet to be independently confirmed. In this work, we show that high-speed single particle tracking with quantum dots(QDs)and using a standard wide-field fluorescence microscope and an EMCCD is possible at image acquisition rates of up to ~2000 Hz with an image integration time of ~0.5 msec....... The spatial precision in these experiments is ~40 nm (as determined from the standard deviation of repeated position measurements of an immobile QD on a cell). Using this system, we further show that an artificial lipid, biotin-cap-DPPE, inserted in a mouse embryo fibroblast (MEF), labeled with sAv-QD655...

A nuclear pulse amplitude acquisition system based on 80C31 single-chip microcomputer

International Nuclear Information System (INIS)

Zhao Xiuliang; Qu Guopu; Guo Lanying; Zhang Songbai

1999-01-01

A kind of multichannel nuclear pulse amplitude signal acquisition system is described, which is composed of pulse peak detector, integrated S/H circuit, A/D converter and 80C31 single-chip microcomputer

A novel high electrode count spike recording array using an 81,920 pixel transimpedance amplifier-based imaging chip.

Science.gov (United States)

Johnson, Lee J; Cohen, Ethan; Ilg, Doug; Klein, Richard; Skeath, Perry; Scribner, Dean A

2012-04-15

Microelectrode recording arrays of 60-100 electrodes are commonly used to record neuronal biopotentials, and these have aided our understanding of brain function, development and pathology. However, higher density microelectrode recording arrays of larger area are needed to study neuronal function over broader brain regions such as in cerebral cortex or hippocampal slices. Here, we present a novel design of a high electrode count picocurrent imaging array (PIA), based on an 81,920 pixel Indigo ISC9809 readout integrated circuit camera chip. While originally developed for interfacing to infrared photodetector arrays, we have adapted the chip for neuron recording by bonding it to microwire glass resulting in an array with an inter-electrode pixel spacing of 30 μm. In a high density electrode array, the ability to selectively record neural regions at high speed and with good signal to noise ratio are both functionally important. A critical feature of our PIA is that each pixel contains a dedicated low noise transimpedance amplifier (∼0.32 pA rms) which allows recording high signal to noise ratio biocurrents comparable to single electrode voltage amplifier recordings. Using selective sampling of 256 pixel subarray regions, we recorded the extracellular biocurrents of rabbit retinal ganglion cell spikes at sampling rates up to 7.2 kHz. Full array local electroretinogram currents could also be recorded at frame rates up to 100 Hz. A PIA with a full complement of 4 readout circuits would span 1cm and could acquire simultaneous data from selected regions of 1024 electrodes at sampling rates up to 9.3 kHz. Published by Elsevier B.V.

Analysis of a flip-chip bonded tunable high-temperature superconducting coplanar waveguide resonator using the conformal mapping technique

CERN Document Server

Misra, M; Murakami, H; Tonouchi, M

2003-01-01

We have studied the tuning properties of a high-temperature superconducting (HTS) half-wavelength coplanar waveguide (CPW) resonator operating at 5 GHz. The tuning schemes are based on flip-chip bonding of an electrically tunable ferroelectric (FE) thin film and a mechanically movable low-loss single crystal on top of the resonator. Using the conformal mapping method, closed-form analytical expressions have been derived for a flip-chip bonded conductor-backed and top-shielded CPW transmission line. The obtained expressions are used to analyse the volume effect of the FE thin film and the gap between the flip-chip and the CPW resonator on the tuning properties of the device. It has been found that large frequency modulation of the resonator produces impedance mismatch, which can considerably enhance the insertion loss of high-performance HTS microwave devices. Analysis also suggests that, for electrically tunable devices, flip-chip bonded FE thin films on HTS CPW devices provide a relatively higher performance...

Fully Automated On-Chip Imaging Flow Cytometry System with Disposable Contamination-Free Plastic Re-Cultivation Chip

Directory of Open Access Journals (Sweden)

Tomoyuki Kaneko

2011-06-01

Full Text Available We have developed a novel imaging cytometry system using a poly(methyl methacrylate (PMMA based microfluidic chip. The system was contamination-free, because sample suspensions contacted only with a flammable PMMA chip and no other component of the system. The transparency and low-fluorescence of PMMA was suitable for microscopic imaging of cells flowing through microchannels on the chip. Sample particles flowing through microchannels on the chip were discriminated by an image-recognition unit with a high-speed camera in real time at the rate of 200 event/s, e.g., microparticles 2.5 μm and 3.0 μm in diameter were differentiated with an error rate of less than 2%. Desired cells were separated automatically from other cells by electrophoretic or dielectrophoretic force one by one with a separation efficiency of 90%. Cells in suspension with fluorescent dye were separated using the same kind of microfluidic chip. Sample of 5 μL with 1 × 106 particle/mL was processed within 40 min. Separated cells could be cultured on the microfluidic chip without contamination. The whole operation of sample handling was automated using 3D micropipetting system. These results showed that the novel imaging flow cytometry system is practically applicable for biological research and clinical diagnostics.

On-chip Magnetic Separation and Cell Encapsulation in Droplets

Science.gov (United States)

Chen, A.; Byvank, T.; Bharde, A.; Miller, B. L.; Chalmers, J. J.; Sooryakumar, R.; Chang, W.-J.; Bashir, R.

2012-02-01

The demand for high-throughput single cell assays is gaining importance because of the heterogeneity of many cell suspensions, even after significant initial sorting. These suspensions may display cell-to-cell variability at the gene expression level that could impact single cell functional genomics, cancer, stem-cell research and drug screening. The on-chip monitoring of individual cells in an isolated environment could prevent cross-contamination, provide high recovery yield and ability to study biological traits at a single cell level These advantages of on-chip biological experiments contrast to conventional methods, which require bulk samples that provide only averaged information on cell metabolism. We report on a device that integrates microfluidic technology with a magnetic tweezers array to combine the functionality of separation and encapsulation of objects such as immunomagnetically labeled cells or magnetic beads into pico-liter droplets on the same chip. The ability to control the separation throughput that is independent of the hydrodynamic droplet generation rate allows the encapsulation efficiency to be optimized. The device can potentially be integrated with on-chip labeling and/or bio-detection to become a powerful single-cell analysis device.

A one-step strategy for ultra-fast and low-cost mass production of plastic membrane microfluidic chips.

Science.gov (United States)

Hu, Chong; Lin, Sheng; Li, Wanbo; Sun, Han; Chen, Yangfan; Chan, Chiu-Wing; Leung, Chung-Hang; Ma, Dik-Lung; Wu, Hongkai; Ren, Kangning

2016-10-05

An ultra-fast, extremely cost-effective, and environmentally friendly method was developed for fabricating flexible microfluidic chips with plastic membranes. With this method, we could fabricate plastic microfluidic chips rapidly (within 12 seconds per piece) at an extremely low cost (less than $0.02 per piece). We used a heated perfluoropolymer perfluoroalkoxy (often called Teflon PFA) solid stamp to press a pile of two pieces of plastic membranes, low density polyethylene (LDPE) and polyethylene terephthalate (PET) coated with an ethylene-vinyl acetate copolymer (EVA). During the short period of contact with the heated PFA stamp, the pressed area of the membranes permanently bonded, while the LDPE membrane spontaneously rose up at the area not pressed, forming microchannels automatically. These two regions were clearly distinguishable even at the micrometer scale so we were able to fabricate microchannels with widths down to 50 microns. This method combines the two steps in the conventional strategy for microchannel fabrication, generating microchannels and sealing channels, into a single step. The production is a green process without using any solvent or generating any waste. Also, the chips showed good resistance against the absorption of Rhodamine 6G, oligonucleotides, and green fluorescent protein (GFP). We demonstrated some typical microfluidic manipulations with the flexible plastic membrane chips, including droplet formation, on-chip capillary electrophoresis, and peristaltic pumping for quantitative injection of samples and reagents. In addition, we demonstrated convenient on-chip detection of lead ions in water samples by a peristaltic-pumping design, as an example of the application of the plastic membrane chips in a resource-limited environment. Due to the high speed and low cost of the fabrication process, this single-step method will facilitate the mass production of microfluidic chips and commercialization of microfluidic technologies.

Design of a high speed rotating mechanical shutter

International Nuclear Information System (INIS)

Stowers, I.F.; Merritt, B.T.; McFann, C.B.

1979-01-01

A high-speed rotating shutter was designed to operate in a 10 -6 Torr vacuum at the optical focus of a laser spatial filter. The shutter is basically a wheel, with a single 3 x 10-mm slot at the perimeter, which rotates with a peripheral speed of 1 km/s. The motor to drive the rotating wheel is magnetically suspended and synchronously wound. The wheel achieves a 4 μs opening time and a timing accuracy of better than 0.2 μs

Double Helical Gear Performance Results in High Speed Gear Trains

Science.gov (United States)

Handschuh, Robert F.; Ehinger, Ryan; Sinusas, Eric; Kilmain, Charles

2010-01-01

The operation of high speed gearing systems in the transmissions of tiltrotor aircraft has an effect on overall propulsion system efficiency. Recent work has focused on many aspects of high-speed helical gear trains as would be used in tiltrotor aircraft such as operational characteristics, comparison of analytical predictions to experimental data and the affect of superfinishing on transmission performance. Baseline tests of an aerospace quality system have been conducted in the NASA Glenn High-Speed Helical Gear Train Test Facility and have been described in earlier studies. These earlier tests had utilized single helical gears. The results that will be described in this study are those attained using double helical gears. This type of gear mesh can be configured in this facility to either pump the air-oil environment from the center gap between the meshing gears to the outside of tooth ends or in the reverse direction. Tests were conducted with both inward and outward air-oil pumping directions. Results are compared to the earlier baseline results of single helical gears.

Analysis of Microstructure and Chip Formation When Machining Ti-6Al-4V

Directory of Open Access Journals (Sweden)

Islam Shyha

2018-03-01

Full Text Available Microstructure and chip formation were evaluated during the step shoulder down-milling of Ti-6Al-4V using a water-miscible vegetable oil-based cutting fluid. Experiments were conducted using the Cut-list fluid supply system previous developed by the authors and a conventional cutting fluid supply system. A thin plastically deformed layer below the machined surface was observed during the metallurgical investigation of the surfaces produced using both systems. Despite noticeable reductions in cutting fluid consumption achieved by Cut-list, no significant disparity was found in microstructural damage. The microstructure of the machined surfaces was strongly affected by cutting speed and fluid flow rate with a discontinuous serrated chip being the principal type. However, increases in cutting fluid flow rate associated with increased cutting speed significantly changed chip morphology where average distance between chip segments increased with cutting speed. Cut-list produced smaller saw-tooth height and larger segmented width, while the transition from aperiodic to periodic serrated chip formation was governed by cutting speed and feed rate. Chip segmentation frequency and shear angle were also sensitive to cutting speed.

Advanced chip designs and novel cooling techniques for brightness scaling of industrial, high power diode laser bars

Science.gov (United States)

Heinemann, S.; McDougall, S. D.; Ryu, G.; Zhao, L.; Liu, X.; Holy, C.; Jiang, C.-L.; Modak, P.; Xiong, Y.; Vethake, T.; Strohmaier, S. G.; Schmidt, B.; Zimer, H.

2018-02-01

The advance of high power semiconductor diode laser technology is driven by the rapidly growing industrial laser market, with such high power solid state laser systems requiring ever more reliable diode sources with higher brightness and efficiency at lower cost. In this paper we report simulation and experimental data demonstrating most recent progress in high brightness semiconductor laser bars for industrial applications. The advancements are in three principle areas: vertical laser chip epitaxy design, lateral laser chip current injection control, and chip cooling technology. With such improvements, we demonstrate disk laser pump laser bars with output power over 250W with 60% efficiency at the operating current. Ion implantation was investigated for improved current confinement. Initial lifetime tests show excellent reliability. For direct diode applications 96% polarization are additional requirements. Double sided cooling deploying hard solder and optimized laser design enable single emitter performance also for high fill factor bars and allow further power scaling to more than 350W with 65% peak efficiency with less than 8 degrees slow axis divergence and high polarization.

A CMOS 0.18 μm 600 MHz clock multiplier PLL and a pseudo-LVDS driver for the high speed data transmission for the ALICE Inner Tracking System front-end chip

International Nuclear Information System (INIS)

Lattuca, A.; Mazza, G.; Rinella, G. Aglieri; Cavicchioli, C.; Hillemanns, H.; Hristozkov, S.; Junique, A.; Keil, M.; Kofarago, M.; Kugathasan, T.; Chanlek, N.; Collu, A.; Degerli, Y.; Flouzat, C.; Guilloux, F.; Dorokhov, A.; Gajanana, D.; Gao, C.; Kim, D.; Kwon, Y.

2016-01-01

This work presents the 600 MHz clock multiplier PLL and the pseudo-LVDS driver which are two essential components of the Data Transmission Unit (DTU), a fast serial link for the 1.2 Gb/s data transmission of the ALICE inner detector front-end chip (ALPIDE). The PLL multiplies the 40 MHz input clock in order to obtain the 600 MHz and the 200 MHz clock for a fast serializer which works in Double Data Rate mode. The outputs of the serializer feed the pseudo-LVDS driver inputs which transmits the data from the pixel chip to the patch panel with a limited number of signal lines. The driver drives a 5.3 m-6.5 m long differential transmission line by steering a maximum of 5 mA of current at the target speed. To overcome bandwidth limitations coming from the long cables the pre-emphasis can be applied to the output. Currents for the main and pre-emphasis driver can individually be adjusted using on-chip digital-to-analog converters. The circuits will be integrated in the pixel chip and are designed in the same 0.18 μm CMOS technology and will operate from the same 1.8 V supply. Design and test results of both circuits are presented

A CMOS 0.18 μm 600 MHz clock multiplier PLL and a pseudo-LVDS driver for the high speed data transmission for the ALICE Inner Tracking System front-end chip

Science.gov (United States)

Lattuca, A.; Mazza, G.; Aglieri Rinella, G.; Cavicchioli, C.; Chanlek, N.; Collu, A.; Degerli, Y.; Dorokhov, A.; Flouzat, C.; Gajanana, D.; Gao, C.; Guilloux, F.; Hillemanns, H.; Hristozkov, S.; Junique, A.; Keil, M.; Kim, D.; Kofarago, M.; Kugathasan, T.; Kwon, Y.; Mager, M.; Sielewicz, K. Marek; Marin Tobon, C. Augusto; Marras, D.; Martinengo, P.; Mugnier, H.; Musa, L.; Pham, T. Hung; Puggioni, C.; Reidt, F.; Riedler, P.; Rousset, J.; Siddhanta, S.; Snoeys, W.; Song, M.; Usai, G.; Van Hoorne, J. Willem; Yang, P.

2016-01-01

This work presents the 600 MHz clock multiplier PLL and the pseudo-LVDS driver which are two essential components of the Data Transmission Unit (DTU), a fast serial link for the 1.2 Gb/s data transmission of the ALICE inner detector front-end chip (ALPIDE). The PLL multiplies the 40 MHz input clock in order to obtain the 600 MHz and the 200 MHz clock for a fast serializer which works in Double Data Rate mode. The outputs of the serializer feed the pseudo-LVDS driver inputs which transmits the data from the pixel chip to the patch panel with a limited number of signal lines. The driver drives a 5.3 m-6.5 m long differential transmission line by steering a maximum of 5 mA of current at the target speed. To overcome bandwidth limitations coming from the long cables the pre-emphasis can be applied to the output. Currents for the main and pre-emphasis driver can individually be adjusted using on-chip digital-to-analog converters. The circuits will be integrated in the pixel chip and are designed in the same 0.18 μm CMOS technology and will operate from the same 1.8 V supply. Design and test results of both circuits are presented.

Rework of flip chip bonded radiation pixel detectors

International Nuclear Information System (INIS)

Vaehaenen, S.; Heikkinen, H.; Pohjonen, H.; Salonen, J.; Savolainen-Pulli, S.

2008-01-01

In this paper, some practical aspects of reworking flip chip hybridized pixel detectors are discussed. As flip chip technology has been advancing in terms of placement accuracy and reliability, large-area hybrid pixel detectors have been developed. The area requirements are usually fulfilled by placing several readout chips (ROCs) on single sensor chip. However, as the number of ROCs increases, the probability of failure in the hybridization process and the ROC operation also increases. Because high accuracy flip chip bonding takes time, a significant part of the price of a pixel detector comes from the flip chip assembly process itself. As large-area detector substrates are expensive, and many flip chip placements are required, the price of an assembled detector can become very high. In a typical case, there is just one bad ROC (out of several) on a faulty detector to be replaced. Considering the high price of pixel detectors and the fact that reworking faulty ROCs does not take much longer than the original placement, it is worthwhile to investigate the feasibility of a rework process

Rework of flip chip bonded radiation pixel detectors

Energy Technology Data Exchange (ETDEWEB)

Vaehaenen, S. [VTT MEMS and Micropackaging, Espoo 02150 (Finland)], E-mail: sami.vahanen@vtt.fi; Heikkinen, H.; Pohjonen, H.; Salonen, J.; Savolainen-Pulli, S. [VTT MEMS and Micropackaging, Espoo 02150 (Finland)

2008-06-11

In this paper, some practical aspects of reworking flip chip hybridized pixel detectors are discussed. As flip chip technology has been advancing in terms of placement accuracy and reliability, large-area hybrid pixel detectors have been developed. The area requirements are usually fulfilled by placing several readout chips (ROCs) on single sensor chip. However, as the number of ROCs increases, the probability of failure in the hybridization process and the ROC operation also increases. Because high accuracy flip chip bonding takes time, a significant part of the price of a pixel detector comes from the flip chip assembly process itself. As large-area detector substrates are expensive, and many flip chip placements are required, the price of an assembled detector can become very high. In a typical case, there is just one bad ROC (out of several) on a faulty detector to be replaced. Considering the high price of pixel detectors and the fact that reworking faulty ROCs does not take much longer than the original placement, it is worthwhile to investigate the feasibility of a rework process.

A low-cost multichannel pulse-height analyzer PHA 256 using single-chip microcomputer

International Nuclear Information System (INIS)

Koehler, M.; Meiling, W.

1985-01-01

The PHA 256 multichannel analyzer on the base of the U8820 single-chip microcomputer applied for radiation measurements, for example in monitoring systems with scintillation detectors, is described. The analyzer contains a power supply unit and 7 boards, namely, the processor board; data and program memory; 8-bit analog-to-digital converter; driver to display device; keyboard with 23 function keys; pulse amplifier and high-voltage supply (up to 2 kV). Software used provides preprocessing of spectra supported by following functions: addition and subtraction of different spectra, spectrum monitoring by use of a 5-point-algorithm, calculation of peak areas with linearly interpolated background

A 2.4GHz ULP OOK single-chip transceiver for healthcare applications

NARCIS (Netherlands)

Vidojkovic, M.; Huang, X.; Harpe, P.J.A.; Rampu, S.; Zhou, C.; Huang, Li; Molengraft, van de J.; Imamura, K.; Büsze, B.; Bouwens, F.; Konijnenburg, M.; Santana, J.; Breeschoten, A.; Huisken, J.; Philips, K.; Dolmans, G.; Groot, de H.W.H.

2011-01-01

This paper describes an ultra-low power (ULP) single chip transceiver for wireless body area network (WBAN) applications. It supports on-off keying (OOK) modulation, and it operates in the 2.36–2.4 GHz medical BAN and 2.4–2.485 GHz ISM bands. It is implemented in 90 nm CMOS technology. The direct

Analysis of the resistive network in a bio-inspired CMOS vision chip

Science.gov (United States)

Kong, Jae-Sung; Sung, Dong-Kyu; Hyun, Hyo-Young; Shin, Jang-Kyoo

2007-12-01

CMOS vision chips for edge detection based on a resistive circuit have recently been developed. These chips help develop neuromorphic systems with a compact size, high speed of operation, and low power dissipation. The output of the vision chip depends dominantly upon the electrical characteristics of the resistive network which consists of a resistive circuit. In this paper, the body effect of the MOSFET for current distribution in a resistive circuit is discussed with a simple model. In order to evaluate the model, two 160×120 CMOS vision chips have been fabricated by using a standard CMOS technology. The experimental results have been nicely matched with our prediction.

Gold-coated polydimethylsiloxane microwells for high-throughput electrochemiluminescence analysis of intracellular glucose at single cells.

Science.gov (United States)

Xia, Juan; Zhou, Junyu; Zhang, Ronggui; Jiang, Dechen; Jiang, Depeng

2018-06-04

In this communication, a gold-coated polydimethylsiloxane (PDMS) chip with cell-sized microwells was prepared through a stamping and spraying process that was applied directly for high-throughput electrochemiluminescence (ECL) analysis of intracellular glucose at single cells. As compared with the previous multiple-step fabrication of photoresist-based microwells on the electrode, the preparation process is simple and offers fresh electrode surface for higher luminescence intensity. More luminescence intensity was recorded from cell-retained microwells than that at the planar region among the microwells that was correlated with the content of intracellular glucose. The successful monitoring of intracellular glucose at single cells using this PDMS chip will provide an alternative strategy for high-throughput single-cell analysis. Graphical abstract ᅟ.

High-speed classification of coherent X-ray diffraction patterns on the K computer for high-resolution single biomolecule imaging

Energy Technology Data Exchange (ETDEWEB)

Tokuhisa, Atsushi [RIKEN SPring-8 Center, 1-1-1 Kouto, Sayo-cho, Sayo-gun, Hyogo 679-5148 (Japan); Arai, Junya [The University of Tokyo, 7-3-1 Hongo, Bunkyo-ku, Tokyo 113-0033 (Japan); Joti, Yasumasa [JASRI, 1-1-1 Kouto, Sayo-cho, Sayo-gun, Hyogo 679-5198 (Japan); Ohno, Yoshiyuki; Kameyama, Toyohisa; Yamamoto, Keiji; Hatanaka, Masayuki; Gerofi, Balazs; Shimada, Akio; Kurokawa, Motoyoshi; Shoji, Fumiyoshi [RIKEN Advanced Institute for Computational Science, 7-1-26 Minatojima-minami-machi, Chuo-ku, Kobe, Hyogo 650-0047 (Japan); Okada, Kensuke [RIKEN SPring-8 Center, 1-1-1 Kouto, Sayo-cho, Sayo-gun, Hyogo 679-5148 (Japan); Sugimoto, Takashi [JASRI, 1-1-1 Kouto, Sayo-cho, Sayo-gun, Hyogo 679-5198 (Japan); Yamaga, Mitsuhiro; Tanaka, Ryotaro [RIKEN SPring-8 Center, 1-1-1 Kouto, Sayo-cho, Sayo-gun, Hyogo 679-5148 (Japan); Yokokawa, Mitsuo; Hori, Atsushi [RIKEN Advanced Institute for Computational Science, 7-1-26 Minatojima-minami-machi, Chuo-ku, Kobe, Hyogo 650-0047 (Japan); Ishikawa, Yutaka, E-mail: ishikawa@is.s.u-tokyo.ac.jp [The University of Tokyo, 7-3-1 Hongo, Bunkyo-ku, Tokyo 113-0033 (Japan); Hatsui, Takaki, E-mail: ishikawa@is.s.u-tokyo.ac.jp [RIKEN SPring-8 Center, 1-1-1 Kouto, Sayo-cho, Sayo-gun, Hyogo 679-5148 (Japan); Go, Nobuhiro [Japan Atomic Energy Agency, 8-1-7 Umemidai, Kizugawa, Kyoto 619-0215 (Japan)

2013-11-01

A code with an algorithm for high-speed classification of X-ray diffraction patterns has been developed. Results obtained for a set of 1 × 10{sup 6} simulated diffraction patterns are also reported. Single-particle coherent X-ray diffraction imaging using an X-ray free-electron laser has the potential to reveal the three-dimensional structure of a biological supra-molecule at sub-nanometer resolution. In order to realise this method, it is necessary to analyze as many as 1 × 10{sup 6} noisy X-ray diffraction patterns, each for an unknown random target orientation. To cope with the severe quantum noise, patterns need to be classified according to their similarities and average similar patterns to improve the signal-to-noise ratio. A high-speed scalable scheme has been developed to carry out classification on the K computer, a 10PFLOPS supercomputer at RIKEN Advanced Institute for Computational Science. It is designed to work on the real-time basis with the experimental diffraction pattern collection at the X-ray free-electron laser facility SACLA so that the result of classification can be feedback for optimizing experimental parameters during the experiment. The present status of our effort developing the system and also a result of application to a set of simulated diffraction patterns is reported. About 1 × 10{sup 6} diffraction patterns were successfully classificatied by running 255 separate 1 h jobs in 385-node mode.

Local structure of metallic chips examined by X-ray microdiffraction

International Nuclear Information System (INIS)

Saksl, K.; Rokicki, P.; Siemers, C.; Ostroushko, D.; Bednarčík, J.; Rütt, U.

2013-01-01

Highlights: •We present a detailed microstructure and phase analysis of chips produced by cutting. •3D analysis proved mixed nature of shear bands propagation to the material. •We examine phase composition of the chips by focused X-ray beam. •Crystallites in segment and shear band change their orientation up to 10°. -- Abstract: Nickel-base alloys are used in high-temperature applications whenever steels or titanium alloys cannot be applied anymore. This class of alloys is furthermore used in low-temperature applications in the oil or gas industry in case the corrosion resistance of stainless steels in related liquid media is not sufficient and titanium alloys would be too expensive. Nickel-base alloys, however, due to their high strength and toughness can be machined only at low cutting speeds as otherwise poor surface quality and enhanced tool wear is observed. From all aspects influencing the machinability, the chip formation mechanism is the key factor and only a thorough understanding of this mechanism can lead to an optimisation of the cutting process. In the current study, a detailed microstructure and phase analysis of Alloy 625 chips produced in an orthogonal cutting process at conventional cutting speeds is presented. Utilising hard monochromatic X-rays focused down to micrometre size, microstructural differences between distinct structural units of the chips, namely, the segments and shear bands, are investigated. Scanning cross sections of the chips with this small beam allowed us to determine misorientation between the segments and shear bands crystal lattices which as we found are not changing abruptly but continuously, with an absolute difference up to 10°

Local structure of metallic chips examined by X-ray microdiffraction

Energy Technology Data Exchange (ETDEWEB)

Saksl, K., E-mail: ksaksl@imr.saske.sk [Institut of Materials Research, Slovak Academy of Sciences, Watsonova 47, 040 01 Košice (Slovakia); Rokicki, P. [The Faculty of Mechanical Engineering and Aeronautics, Rzeszow University of Technology, Al. Powstancow Warszawy 12, 35-959 Rzeszow (Poland); Siemers, C. [Institut fuer Werkstoffe, Technische Universitaet Braunschweig, Langer Kamp 8, 38106 Braunschweig (Germany); Ostroushko, D. [Faculty of Metallurgy and Materials Engineering, VŠB – Technical University of Ostrava, 17.listopadu 15, 708 33 Ostrava (Czech Republic); Bednarčík, J.; Rütt, U. [HASYLAB at DESY, Notkestr. 85, D-22607 Hamburg (Germany)

2013-12-25

Highlights: •We present a detailed microstructure and phase analysis of chips produced by cutting. •3D analysis proved mixed nature of shear bands propagation to the material. •We examine phase composition of the chips by focused X-ray beam. •Crystallites in segment and shear band change their orientation up to 10°. -- Abstract: Nickel-base alloys are used in high-temperature applications whenever steels or titanium alloys cannot be applied anymore. This class of alloys is furthermore used in low-temperature applications in the oil or gas industry in case the corrosion resistance of stainless steels in related liquid media is not sufficient and titanium alloys would be too expensive. Nickel-base alloys, however, due to their high strength and toughness can be machined only at low cutting speeds as otherwise poor surface quality and enhanced tool wear is observed. From all aspects influencing the machinability, the chip formation mechanism is the key factor and only a thorough understanding of this mechanism can lead to an optimisation of the cutting process. In the current study, a detailed microstructure and phase analysis of Alloy 625 chips produced in an orthogonal cutting process at conventional cutting speeds is presented. Utilising hard monochromatic X-rays focused down to micrometre size, microstructural differences between distinct structural units of the chips, namely, the segments and shear bands, are investigated. Scanning cross sections of the chips with this small beam allowed us to determine misorientation between the segments and shear bands crystal lattices which as we found are not changing abruptly but continuously, with an absolute difference up to 10°.

High Speed and High Spatial Density Parameter Measurement Using Fiber Optic Sensing Technology

Science.gov (United States)

Parker, Allen R. Jr. (Inventor); Chan, Hon Man (Inventor); Richards, William Lance (Inventor); Piazza, Anthony (Inventor); Hamory, Philip J (Inventor)

2017-01-01

The present invention is an improved fiber optic sensing system (FOSS) having the ability to provide both high spatial resolution and high frequency strain measurements. The inventive hybrid FOSS fiber combines sensors from high acquisition speed and low spatial resolution Wavelength-Division Multiplexing (WDM) systems and from low acquisition speed and high spatial resolution Optical Frequency Domain Reflection (OFDR) systems. Two unique light sources utilizing different wavelengths are coupled with the hybrid FOSS fiber to generate reflected data from both the WDM sensors and OFDR sensors operating on a single fiber optic cable without incurring interference from one another. The two data sets are then de-multiplexed for analysis, optionally with conventionally-available WDM and OFDR system analyzers.

Miniature high speed compressor having embedded permanent magnet motor

Science.gov (United States)

Zhou, Lei (Inventor); Zheng, Liping (Inventor); Chow, Louis (Inventor); Kapat, Jayanta S. (Inventor); Wu, Thomas X. (Inventor); Kota, Krishna M. (Inventor); Li, Xiaoyi (Inventor); Acharya, Dipjyoti (Inventor)

2011-01-01

A high speed centrifugal compressor for compressing fluids includes a permanent magnet synchronous motor (PMSM) having a hollow shaft, the being supported on its ends by ball bearing supports. A permanent magnet core is embedded inside the shaft. A stator with a winding is located radially outward of the shaft. The PMSM includes a rotor including at least one impeller secured to the shaft or integrated with the shaft as a single piece. The rotor is a high rigidity rotor providing a bending mode speed of at least 100,000 RPM which advantageously permits implementation of relatively low-cost ball bearing supports.

High-speed VCSEL-based optical interconnects

Science.gov (United States)

Ishak, Waguih S.

2001-11-01

Vertical Cavity Surface Emitting Lasers (VCSEL) have made significant inroads into commercial realization especially in the area of data communications. Single VCSEL devices are key components in Gb Ethernet Transceivers. A multi-element VCSEL array is the key enabling technology for high-speed multi Gb/s parallel optical interconnect modules. In 1996, several companies introduced a new generation of fiber optic products based VCSEL technology such as multimode fiber transceivers for the ANSI Fiber Channel and Gigabit Ethernet IEEE 802.3 standards. VCSELs offer unique advantages over its edge-emitting counterparts in several areas. These include low-cost (LED-like) manufacturability, low current operation and array integrability. As data rates continue to increase, VCSELs offer the advantage of being able to provide the highest modulation bandwidth per milliamp of modulation current. Currently, most of the VCSEL-based products use short (780 - 980 nm) wavelength lasers. However, significant research efforts are taking place at universities and industrial research labs around the world to develop reliable, manufacturable and high-power long (1300 - 1550 nm) wavelength VCSELs. These lasers will allow longer (several km) transmission distances and will help alleviate some of the eye-safety issues. Perhaps, the most important advantage of VCSELs is the ability to form two-dimensional arrays much easier than in the case of edge-emitting lasers. These arrays (single and two-dimensional) will allow a whole new family of applications, specifically in very high-speed computer and switch interconnects.

Comprehensive surface treatment of high-speed steel tool

Science.gov (United States)

Fedorov, Sergey V.; Aleshin, Sergey V.; Swe, Min Htet; Abdirova, Raushan D.; Kapitanov, Alexey V.; Egorov, Sergey B.

2018-03-01

One of the promising directions of hardening of high-speed steel tool is the creation on their surface of the layered structures with the gradient of physic-chemical properties between the wear-resistant coatings to the base material. Among the methods of such surface modification, a special process takes place based on the use of pulsed high-intensity charged particle beams. The high speed of heating and cooling allows structural-phase transformations in the surface layer, which cannot be realized in a stationary mode. The treatment was conducted in a RITM-SP unit, which constitutes a combination of a source of low-energy high-current electron beams "RITM" and two magnetron spraying systems on a single vacuum chamber. The unit enables deposition of films on the surface of the desired product and subsequent liquid-phase mixing of materials of the film and the substrate by an intense pulse electron beam. The article discusses features of the structure of the subsurface layer of high-speed steel M2, modified by surface alloying of a low-energy high-current electron beam, and its effect on the wear resistance of the tool when dry cutting hard to machine Nickel alloy. A significant decrease of intensity of wear of high-speed steel with combined treatment happens due to the displacement of the zone of wear and decrease the radius of rounding of the cutting edge because of changes in conditions of interaction with the material being treated.

Three-dimensional integration of nanotechnologies for computing and data storage on a single chip

Science.gov (United States)

Shulaker, Max M.; Hills, Gage; Park, Rebecca S.; Howe, Roger T.; Saraswat, Krishna; Wong, H.-S. Philip; Mitra, Subhasish

2017-07-01

The computing demands of future data-intensive applications will greatly exceed the capabilities of current electronics, and are unlikely to be met by isolated improvements in transistors, data storage technologies or integrated circuit architectures alone. Instead, transformative nanosystems, which use new nanotechnologies to simultaneously realize improved devices and new integrated circuit architectures, are required. Here we present a prototype of such a transformative nanosystem. It consists of more than one million resistive random-access memory cells and more than two million carbon-nanotube field-effect transistors—promising new nanotechnologies for use in energy-efficient digital logic circuits and for dense data storage—fabricated on vertically stacked layers in a single chip. Unlike conventional integrated circuit architectures, the layered fabrication realizes a three-dimensional integrated circuit architecture with fine-grained and dense vertical connectivity between layers of computing, data storage, and input and output (in this instance, sensing). As a result, our nanosystem can capture massive amounts of data every second, store it directly on-chip, perform in situ processing of the captured data, and produce ‘highly processed’ information. As a working prototype, our nanosystem senses and classifies ambient gases. Furthermore, because the layers are fabricated on top of silicon logic circuitry, our nanosystem is compatible with existing infrastructure for silicon-based technologies. Such complex nano-electronic systems will be essential for future high-performance and highly energy-efficient electronic systems.

Application of high voltage electric field (HVEF) drying technology in potato chips

International Nuclear Information System (INIS)

Bai, Yaxiang; Shi, Hua; Yang, Yaxin

2013-01-01

In order to improve the drying efficiency and qualities of vegetable by high voltage electric field (HVEF), potato chips as a representative of vegetable was dried using a high voltage electric drying systems at 20°C. The shrinkage rate, water absorption and rehydration ratio of dried potato chips were measured. The results indicated that the drying rate of potato chips was significantly improved in the high voltage electric drying systems. The shrinkage rate of potato chips dried by high voltage electric field was 1.1% lower than that by oven drying method. And the rehydration rate of high voltage electric field was 24.6% higher than that by oven drying method. High voltage electric field drying is very advantageous and can be used as a substitute for traditional drying method.

The effect of Cytochalasin D on F-Actin behavior of single-cell electroendocytosis using multi-chamber micro cell chip

KAUST Repository

Lin, Ran

2012-03-01

Electroendocytosis (EED) is a pulsed-electric-field (PEF) induced endocytosis, facilitating cells uptake molecules through nanometer-sized EED vesicles. We herein investigate the effect of a chemical inhibitor, Cytochalasin D (CD) on the actin-filaments (F-Actin) behavior of single-cell EED. The CD concentration (C CD) can control the depolymerization of F-actin. A multi-chamber micro cell chip was fabricated to study the EED under different conditions. Large-scale single-cell data demonstrated EED highly depends on both electric field and C CD. © 2012 IEEE.

The effect of Cytochalasin D on F-Actin behavior of single-cell electroendocytosis using multi-chamber micro cell chip

KAUST Repository

Lin, Ran; Chang, Donald C.; Lee, Yi Kuen

2012-01-01

Electroendocytosis (EED) is a pulsed-electric-field (PEF) induced endocytosis, facilitating cells uptake molecules through nanometer-sized EED vesicles. We herein investigate the effect of a chemical inhibitor, Cytochalasin D (CD) on the actin-filaments (F-Actin) behavior of single-cell EED. The CD concentration (C CD) can control the depolymerization of F-actin. A multi-chamber micro cell chip was fabricated to study the EED under different conditions. Large-scale single-cell data demonstrated EED highly depends on both electric field and C CD. © 2012 IEEE.

Identifying EGFR-Expressed Cells and Detecting EGFR Multi-Mutations at Single-Cell Level by Microfluidic Chip

Science.gov (United States)

Li, Ren; Zhou, Mingxing; Li, Jine; Wang, Zihua; Zhang, Weikai; Yue, Chunyan; Ma, Yan; Peng, Hailin; Wei, Zewen; Hu, Zhiyuan

2018-03-01

EGFR mutations companion diagnostics have been proved to be crucial for the efficacy of tyrosine kinase inhibitor targeted cancer therapies. To uncover multiple mutations occurred in minority of EGFR-mutated cells, which may be covered by the noises from majority of un-mutated cells, is currently becoming an urgent clinical requirement. Here we present the validation of a microfluidic-chip-based method for detecting EGFR multi-mutations at single-cell level. By trapping and immunofluorescently imaging single cells in specifically designed silicon microwells, the EGFR-expressed cells were easily identified. By in situ lysing single cells, the cell lysates of EGFR-expressed cells were retrieved without cross-contamination. Benefited from excluding the noise from cells without EGFR expression, the simple and cost-effective Sanger's sequencing, but not the expensive deep sequencing of the whole cell population, was used to discover multi-mutations. We verified the new method with precisely discovering three most important EGFR drug-related mutations from a sample in which EGFR-mutated cells only account for a small percentage of whole cell population. The microfluidic chip is capable of discovering not only the existence of specific EGFR multi-mutations, but also other valuable single-cell-level information: on which specific cells the mutations occurred, or whether different mutations coexist on the same cells. This microfluidic chip constitutes a promising method to promote simple and cost-effective Sanger's sequencing to be a routine test before performing targeted cancer therapy.[Figure not available: see fulltext.

Research on monitoring technology of axial gap change about high-speed rotating machinery

International Nuclear Information System (INIS)

Zhang Xiaochan; Liu Fanglei; Hu Shihua; Xie Qing; Li Zhen

2014-01-01

This paper describes that the only measuring point of high-speed rotating machinery (speed monitoring transducer) measuring the operation of the axial gap change and application. According to mechanism analysis the speed monitoring transducer's signal, prove its amplitude changes including the axial gap change information. To carry out the speed monitoring transducer qualitative and quantitative axial gap change research, Find the output signal amplitude and clearance change corresponding relationship formula of speed monitoring transducer, define the measurement method. Based on the above analsis, manufacture the single channel measurement devices and multiple unit measurement system, provide an important fault decision of high-speed rotating machinery, it can be applied to new equipment development and production. (authors)

Online hyphenation of extraction, Sephadex LH-20 column chromatography, and high-speed countercurrent chromatography: A highly efficient strategy for the preparative separation of andrographolide from Andrographis paniculata in a single step.

Science.gov (United States)

Zhang, Ying-Qi; Wang, Shan-Shan; Han, Chao; Xu, Jin-Fang; Luo, Jian-Guang; Kong, Ling-Yi

2017-12-01

A novel isolation strategy, online hyphenation of ultrasonic extraction, Sephadex LH-20 column chromatography combined with high-speed countercurrent chromatography, was developed for pure compounds extraction and purification. Andrographolide from Andrographis paniculata was achieved only in a single step purification protocol via the present strategy. The crude powder was ultrasonic extracted and extraction was pumped into Sephadex LH-20 column directly to cut the nontarget fractions followed by the second-dimensional high-speed countercurrent chromatography, hyphenated by a six-port valve equipped at the post-end of Sephadex LH-20 column, for the final purification. The results yielded andrographolide with the amount of 1.02 mg and a purity of 98.5% in a single step, indicating that the present method is effective to harvest target compound from medicinal plant. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Simulations of High Speed Fragment Trajectories

Science.gov (United States)

Yeh, Peter; Attaway, Stephen; Arunajatesan, Srinivasan; Fisher, Travis

2017-11-01

Flying shrapnel from an explosion are capable of traveling at supersonic speeds and distances much farther than expected due to aerodynamic interactions. Predicting the trajectories and stable tumbling modes of arbitrary shaped fragments is a fundamental problem applicable to range safety calculations, damage assessment, and military technology. Traditional approaches rely on characterizing fragment flight using a single drag coefficient, which may be inaccurate for fragments with large aspect ratios. In our work we develop a procedure to simulate trajectories of arbitrary shaped fragments with higher fidelity using high performance computing. We employ a two-step approach in which the force and moment coefficients are first computed as a function of orientation using compressible computational fluid dynamics. The force and moment data are then input into a six-degree-of-freedom rigid body dynamics solver to integrate trajectories in time. Results of these high fidelity simulations allow us to further understand the flight dynamics and tumbling modes of a single fragment. Furthermore, we use these results to determine the validity and uncertainty of inexpensive methods such as the single drag coefficient model.

On-Chip Sorting of Long Semiconducting Carbon Nanotubes for Multiple Transistors along an Identical Array.

Science.gov (United States)

Otsuka, Keigo; Inoue, Taiki; Maeda, Etsuo; Kometani, Reo; Chiashi, Shohei; Maruyama, Shigeo

2017-11-28

Ballistic transport and sub-10 nm channel lengths have been achieved in transistors containing one single-walled carbon nanotube (SWNT). To fill the gap between single-tube transistors and high-performance logic circuits for the replacement of silicon, large-area, high-density, and purely semiconducting (s-) SWNT arrays are highly desired. Here we demonstrate the fabrication of multiple transistors along a purely semiconducting SWNT array via an on-chip purification method. Water- and polymer-assisted burning from site-controlled nanogaps is developed for the reliable full-length removal of metallic SWNTs with the damage to s-SWNTs minimized even in high-density arrays. All the transistors with various channel lengths show large on-state current and excellent switching behavior in the off-state. Since our method potentially provides pure s-SWNT arrays over a large area with negligible damage, numerous transistors with arbitrary dimensions could be fabricated using a conventional semiconductor process, leading to SWNT-based logic, high-speed communication, and other next-generation electronic devices.

High-speed Light Peak optical link for high energy applications

Energy Technology Data Exchange (ETDEWEB)

Chang, F.X. [Academia Sinica, Taipei, Taiwan (China); Chiang, F. [FOCI Fiber Optic Comm., Inc., Hsinchu, Taiwan (China); Deng, B. [Hubei Polytechnic University, Huangshi, Hubei (China); Southern Methodist University, Dallas, TX (United States); Hou, J. [FOCI Fiber Optic Comm., Inc., Hsinchu, Taiwan (China); Hou, S., E-mail: suen@gate.sinica.edu.tw [Academia Sinica, Taipei, Taiwan (China); Liu, C.; Liu, T. [Southern Methodist University, Dallas, TX (United States); Teng, P.K. [Academia Sinica, Taipei, Taiwan (China); Wang, C.H. [National United University, Miaoli, Taiwan (China); Xu, T. [Shandong University, Ji' nan (China); Southern Methodist University, Dallas, TX (United States); Ye, J. [Southern Methodist University, Dallas, TX (United States)

2014-11-21

Optical links provide high speed data transmission with low mass fibers favorable for applications in high energy experiments. We report investigation of a compact Light Peak optical engine designed for data transmission at 4.8 Gbps. The module is assembled with bare die VCSEL, PIN diodes and a control IC aligned within a prism receptacle for light coupling to fiber ferrule. Radiation damage in the receptacle was examined with {sup 60}Co gamma ray. Radiation induced single event effects in the optical engine were studied with protons, neutrons and X-ray tests.

Overuse Injuries Associated with Mountain Biking: Is Single-Speed Riding a Predisposing Factor?

Directory of Open Access Journals (Sweden)

Michael T. Lebec

2014-01-01

Full Text Available Though mountain bikers are at significant risk for overuse injury, there is minimal quality research describing this relationship. Single-speed mountain biking, in which participants pedal a bike with only a single gear, may place riders at even greater risk for overuse problems due to the disproportionate physical effort associated with this type of riding. The focus of this study was to provide additional perspective on overuse injuries sustained by mountain bikers and to determine if single-speed mountain biking places participants at greater risk for overuse conditions. Four hundred and four (404 mountain bikers were surveyed concerning overuse injuries sustained during the previous year. Findings indicate that 63% of respondents reported an overuse injury affecting at least one area with the most commonly reported areas being the lumbar spine, knees, hand/wrist, and cervical spine. Individuals riding single-speed mountain bikes did not have a higher incidence of overuse injuries than riders of multiple-geared bikes. However, respondents who split time between riding single-speed and multiple-geared bikes were significantly more likely to report an overuse syndrome than those only riding single-speed or multiple-geared bikes (p = 0.0104. This group of riders may be at greater risk for overuse injury due to excessive fatigue and poor biomechanics.

Dye molecules as single-photon sources and large optical nonlinearities on a chip

International Nuclear Information System (INIS)

Hwang, J; Hinds, E A

2011-01-01

We point out that individual organic dye molecules, deposited close to optical waveguides on a photonic chip, can act as single-photon sources. A thin silicon nitride strip waveguide is expected to collect 28% of the photons from a single dibenzoterrylene molecule. These molecules can also provide large, localized optical nonlinearities, which are enough to discriminate between one photon or two through a differential phase shift of 2 0 per photon. This new atom-photon interface may be used as a resource for processing quantum information.

Energy Harvesting Chip and the Chip Based Power Supply Development for a Wireless Sensor Network.

Science.gov (United States)

Lee, Dasheng

2008-12-02

In this study, an energy harvesting chip was developed to scavenge energy from artificial light to charge a wireless sensor node. The chip core is a miniature transformer with a nano-ferrofluid magnetic core. The chip embedded transformer can convert harvested energy from its solar cell to variable voltage output for driving multiple loads. This chip system yields a simple, small, and more importantly, a battery-less power supply solution. The sensor node is equipped with multiple sensors that can be enabled by the energy harvesting power supply to collect information about the human body comfort degree. Compared with lab instruments, the nodes with temperature, humidity and photosensors driven by harvested energy had variation coefficient measurement precision of less than 6% deviation under low environmental light of 240 lux. The thermal comfort was affected by the air speed. A flow sensor equipped on the sensor node was used to detect airflow speed. Due to its high power consumption, this sensor node provided 15% less accuracy than the instruments, but it still can meet the requirement of analysis for predicted mean votes (PMV) measurement. The energy harvesting wireless sensor network (WSN) was deployed in a 24-hour convenience store to detect thermal comfort degree from the air conditioning control. During one year operation, the sensor network powered by the energy harvesting chip retained normal functions to collect the PMV index of the store. According to the one month statistics of communication status, the packet loss rate (PLR) is 2.3%, which is as good as the presented results of those WSNs powered by battery. Referring to the electric power records, almost 54% energy can be saved by the feedback control of an energy harvesting sensor network. These results illustrate that, scavenging energy not only creates a reliable power source for electronic devices, such as wireless sensor nodes, but can also be an energy source by building an energy efficient

Energy Harvesting Chip and the Chip Based Power Supply Development for a Wireless Sensor Network

Science.gov (United States)

Lee, Dasheng

2008-01-01

In this study, an energy harvesting chip was developed to scavenge energy from artificial light to charge a wireless sensor node. The chip core is a miniature transformer with a nano-ferrofluid magnetic core. The chip embedded transformer can convert harvested energy from its solar cell to variable voltage output for driving multiple loads. This chip system yields a simple, small, and more importantly, a battery-less power supply solution. The sensor node is equipped with multiple sensors that can be enabled by the energy harvesting power supply to collect information about the human body comfort degree. Compared with lab instruments, the nodes with temperature, humidity and photosensors driven by harvested energy had variation coefficient measurement precision of less than 6% deviation under low environmental light of 240 lux. The thermal comfort was affected by the air speed. A flow sensor equipped on the sensor node was used to detect airflow speed. Due to its high power consumption, this sensor node provided 15% less accuracy than the instruments, but it still can meet the requirement of analysis for predicted mean votes (PMV) measurement. The energy harvesting wireless sensor network (WSN) was deployed in a 24-hour convenience store to detect thermal comfort degree from the air conditioning control. During one year operation, the sensor network powered by the energy harvesting chip retained normal functions to collect the PMV index of the store. According to the one month statistics of communication status, the packet loss rate (PLR) is 2.3%, which is as good as the presented results of those WSNs powered by battery. Referring to the electric power records, almost 54% energy can be saved by the feedback control of an energy harvesting sensor network. These results illustrate that, scavenging energy not only creates a reliable power source for electronic devices, such as wireless sensor nodes, but can also be an energy source by building an energy efficient

Energy Harvesting Chip and the Chip Based Power Supply Development for a Wireless Sensor Network

Directory of Open Access Journals (Sweden)

Dasheng Lee

2008-12-01

Full Text Available In this study, an energy harvesting chip was developed to scavenge energy from artificial light to charge a wireless sensor node. The chip core is a miniature transformer with a nano-ferrofluid magnetic core. The chip embedded transformer can convert harvested energy from its solar cell to variable voltage output for driving multiple loads. This chip system yields a simple, small, and more importantly, a battery-less power supply solution. The sensor node is equipped with multiple sensors that can be enabled by the energy harvesting power supply to collect information about the human body comfort degree. Compared with lab instruments, the nodes with temperature, humidity and photosensors driven by harvested energy had variation coefficient measurement precision of less than 6% deviation under low environmental light of 240 lux. The thermal comfort was affected by the air speed. A flow sensor equipped on the sensor node was used to detect airflow speed. Due to its high power consumption, this sensor node provided 15% less accuracy than the instruments, but it still can meet the requirement of analysis for predicted mean votes (PMV measurement. The energy harvesting wireless sensor network (WSN was deployed in a 24-hour convenience store to detect thermal comfort degree from the air conditioning control. During one year operation, the sensor network powered by the energy harvesting chip retained normal functions to collect the PMV index of the store. According to the one month statistics of communication status, the packet loss rate (PLR is 2.3%, which is as good as the presented results of those WSNs powered by battery. Referring to the electric power records, almost 54% energy can be saved by the feedback control of an energy harvesting sensor network. These results illustrate that, scavenging energy not only creates a reliable power source for electronic devices, such as wireless sensor nodes, but can also be an energy source by building an

Color sensor and neural processor on one chip

Science.gov (United States)

Fiesler, Emile; Campbell, Shannon R.; Kempem, Lother; Duong, Tuan A.

1998-10-01

Low-cost, compact, and robust color sensor that can operate in real-time under various environmental conditions can benefit many applications, including quality control, chemical sensing, food production, medical diagnostics, energy conservation, monitoring of hazardous waste, and recycling. Unfortunately, existing color sensor are either bulky and expensive or do not provide the required speed and accuracy. In this publication we describe the design of an accurate real-time color classification sensor, together with preprocessing and a subsequent neural network processor integrated on a single complementary metal oxide semiconductor (CMOS) integrated circuit. This one-chip sensor and information processor will be low in cost, robust, and mass-producible using standard commercial CMOS processes. The performance of the chip and the feasibility of its manufacturing is proven through computer simulations based on CMOS hardware parameters. Comparisons with competing methodologies show a significantly higher performance for our device.

X-γ dose rate continuous monitor with wide range based on single-chip microcomputer

International Nuclear Information System (INIS)

Wu Debo; Ling Qiu; Guo Lanying; Yang Binhua

2007-01-01

This paper describes a concept about circuit designing of X-γ dose rate continuous monitor with wide range based on single-chip microcomputer, and also presents the design procedure of hardware and software, and gives several methods for solving the design procedure of hardware and software with emphasis. (authors)

Addressing On-Chip Power Converstion and Dissipation Issues in Many-Core System-on-a-Chip Based on Conventional Silicon and Emerging Nanotechnologies

Science.gov (United States)

Ashenafi, Emeshaw

regulator design very unattractive for SOC integration and multi-/many-core environments. To circumvent the challenges, three alternative techniques based on active circuit elements to replace the passive LC filter of the buck convertor are developed. The first inductorless on-chip switching voltage regulator architecture is based on a cascaded 2nd order multiple feedback (MFB) low-pass filter (LPF). This design has the ability to modulate to multiple voltage settings via pulse-with modulation (PWM). The second approach is a supplementary design utilizing a hybrid low drop-out scheme to lower the output ripple of the switching regulator over a wider frequency range. The third design approach allows the integration of an entire power management system within a single chipset by combining a highly efficient switching regulator with an intermittently efficient linear regulator (area efficient), for robust and highly efficient on-chip regulation. The static power (Pstatic) or subthreshold leakage power (Pleak) increases with technology scaling. To mitigate static power dissipation, power gating techniques are implemented. Power gating is one of the popular methods to manage leakage power during standby periods in low-power high-speed IC design. It works by using transistor based switches to shut down part of the circuit block and put them in the idle mode. The efficiency of a power gating scheme involves minimum Ioff and high Ion for the sleep transistor. A conventional sleep transistor circuit design requires an additional header, footer, or both switches to turn off the logic block. This additional transistor causes signal delay and increases the chip area. We propose two innovative designs for next generation sleep transistor designs. For an above threshold operation, we present a sleep transistor design based on fully depleted silicon-on-insulator (FDSOI) device. For a subthreshold circuit operation, we implement a sleep transistor utilizing the newly developed silicon

Wear evaluation of flank in burins of high speed steel modified with titanium ions

Science.gov (United States)

E Caballero, J.; V-Niño, E. D.

2017-12-01

This report shows the results obtained researching the flank wearing resistance performed by the high-speed steel (HSS) burins without any surface treatment (reference substrate) and others with surface treatment based on Titanium ions. The flank wearing was carried out by means of an industrial process by chip removal with repetitive tests of dry finished turning of AISI/SAE 1045 steel bars. The useful service life of the burins was evaluated according to ISO 3685:1993, and it was found that the burins treated with Titanium ions showed an increase in the flank wearing resistance with respect to the ones used as reference.

Single event upset studies on the CMS tracker APV25 readout chip

International Nuclear Information System (INIS)

Noah, E.; Bauer, T.; Bisello, D.; Faccio, F.; Friedl, M.; Fulcher, J.R.; Hall, G.; Huhtinen, M.; Kaminsky, A.; Pernicka, M.; Raymond, M.; Wyss, J.

2002-01-01

The microstrip tracker for the CMS experiment at the CERN Large Hadron Collider will be read out using APV25 chips. During high luminosity running the tracker will be exposed to particle fluxes up to 10 7 cm -2 s -1 , which raises concerns that the APV25 could occasionally suffer Single Event Upsets (SEUs). The effect of SEU on the APV25 has been studied to investigate implications for CMS detector operation and from the viewpoint of detailed circuit operation, to improve the understanding of its origin and what factors affect its magnitude. Simulations were performed to reconstruct the effects created by highly ionising particles striking sensitive parts of the circuits, along with consideration of the underlying mechanisms of charge deposition, collection and the consequences. A model to predict the behaviour of the memory circuits in the APV25 has been developed and data collected from dedicated experiments using both heavy ions and hadrons have been shown to support it

A high-speed tunable beam splitter for feed-forward photonic quantum information processing.

Science.gov (United States)

Ma, Xiao-Song; Zotter, Stefan; Tetik, Nuray; Qarry, Angie; Jennewein, Thomas; Zeilinger, Anton

2011-11-07

We realize quantum gates for path qubits with a high-speed, polarization-independent and tunable beam splitter. Two electro-optical modulators act in a Mach-Zehnder interferometer as high-speed phase shifters and rapidly tune its splitting ratio. We test its performance with heralded single photons, observing a polarization-independent interference contrast above 95%. The switching time is about 5.6 ns, and a maximal repetition rate is 2.5 MHz. We demonstrate tunable feed-forward operations of a single-qubit gate of path-encoded qubits and a two-qubit gate via measurement-induced interaction between two photons.

Realization of a counter/timer circuit used in digital pulse height analysis in a single chip

International Nuclear Information System (INIS)

Mahmoud, I.I.

2000-01-01

This paper presents a single chip realization of a counter circuit, which is used in random signal processing and nuclear gamma ray spectrometers. The circuit contains a counter to count the repetition rate of a selected pulse train coming from a single channel analyzer circuit. Also, it contains a timer to measure the accumulation period. The timer possesses a predetermined time facility so that processing lasts for a certain adjustable predetermined period. The counter and the timer are synchronized to start and stop simultaneously at the beginning and end of the counting interval. A multiplexed BCD to 7-segment decoder/driver is also included in the circuit. The multiplexing allows the decrease of pin count of the chip.Two stages are designed, simulated for a single channel, however more stages and channels can be added by copying the designed circuits. Schematic flow of Xilinx v.1.2I is used as the design strategy with top-level schematic design containing VHDL and schematic macros

Single-chip RF communications systems in CMOS

DEFF Research Database (Denmark)

Olesen, Ole

1997-01-01

The paper describes the state of the art of the Nordic mobile communication project ConFront. This is a cooperation project with 3 Nordic universities and local industry. The ultimate goal is to make a CMOS one-chip mobile phone.......The paper describes the state of the art of the Nordic mobile communication project ConFront. This is a cooperation project with 3 Nordic universities and local industry. The ultimate goal is to make a CMOS one-chip mobile phone....

Design of a 1-chip IBM-3270 protocol handler

NARCIS (Netherlands)

Spaanenburg, L.

1989-01-01

The single-chip design of a 20MHz IBM-3270 coax protocol handler in a conventional 3 μ CMOS process-technology is discussed. The harmonious combination of CMOS circuit tricks and high-level design disciplines allows the 50k transistor design to be compiled and optimized into a 35 mm**2 chip in 4

Chip formation in turning S45C medium carbon steel in cryogenic conditions

Directory of Open Access Journals (Sweden)

Jaharah A. Ghani

2017-09-01

Full Text Available This paper presents the tribology issue regarding the chip formation in machining medium carbon steel (S45C using a coated and uncoated carbide tools. The machining parameters under investigation were cutting speed, feed rate, and depth of cut under dry and cryogenic cutting condition using coated and uncoated carbide tools. The chip shape was largely depended on the combination of machining parameters, especially at high depth of cut and feed rate; the favorable chip was produced. Larger value of shear angle results in smaller shear plane area that provides benefits of lower cutting force needed to shear off the chips and lower cutting temperature being generated during the machining process.

Chip-integrated plasmonic cavity-enhanced single nitrogen-vacancy center emission

DEFF Research Database (Denmark)

Siampour, Hamidreza; Kumar, Shailesh; Bozhevolnyi, Sergey I.

2017-01-01

High temporal stability and spin dynamics of individual nitrogen-vacancy (NV) centers in diamond crystals make them one of the most promising quantum emitters operating at room temperature. We demonstrate a chip-integrated cavity-coupled emission into propagating surface plasmon polariton (SPP...

A High-Throughput, High-Accuracy System-Level Simulation Framework for System on Chips

Directory of Open Access Journals (Sweden)

Guanyi Sun

2011-01-01

Full Text Available Today's System-on-Chips (SoCs design is extremely challenging because it involves complicated design tradeoffs and heterogeneous design expertise. To explore the large solution space, system architects have to rely on system-level simulators to identify an optimized SoC architecture. In this paper, we propose a system-level simulation framework, System Performance Simulation Implementation Mechanism, or SPSIM. Based on SystemC TLM2.0, the framework consists of an executable SoC model, a simulation tool chain, and a modeling methodology. Compared with the large body of existing research in this area, this work is aimed at delivering a high simulation throughput and, at the same time, guaranteeing a high accuracy on real industrial applications. Integrating the leading TLM techniques, our simulator can attain a simulation speed that is not slower than that of the hardware execution by a factor of 35 on a set of real-world applications. SPSIM incorporates effective timing models, which can achieve a high accuracy after hardware-based calibration. Experimental results on a set of mobile applications proved that the difference between the simulated and measured results of timing performance is within 10%, which in the past can only be attained by cycle-accurate models.

High-speed 1.3 -1.55 um InGaAs/InP PIN photodetector for microwave photonics

Science.gov (United States)

Kozyreva, O. A.; Solov'ev, Y. V.; Polukhin, I. S.; Mikhailov, A. K.; Mikhailovskiy, G. A.; Odnoblyudov, M. A.; Gareev, E. Z.; Kolodeznyi, E. S.; Novikov, I. I.; Karachinsky, L. Ya; Egorov, A. Yu; Bougrov, V. E.

2017-11-01

We have fabricated the 1.3-1.55 um PIN photodetector based on InGaAs/InP heterostructure. Measurement results of optical and electrical characteristics of PIN photodetector chip were the following: photoconductivity at 1550 nm was 0.65 A/W and internal capacitance was 0.025 pF. Microwave model of photodetector was developed and verified by measurements of scattering matrix. The implementation of broadband (up to 20 GHz) hybrid integrated matching and biasing circuit for high-speed photodetector is presented.

A New Three-Dimensional High-Accuracy Automatic Alignment System For Single-Mode Fibers

Science.gov (United States)

Yun-jiang, Rao; Shang-lian, Huang; Ping, Li; Yu-mei, Wen; Jun, Tang

1990-02-01

In order to achieve the low-loss splices of single-mode fibers, a new three-dimension high-accuracy automatic alignment system for single -mode fibers has been developed, which includes a new-type three-dimension high-resolution microdisplacement servo stage driven by piezoelectric elements, a new high-accuracy measurement system for the misalignment error of the fiber core-axis, and a special single chip microcomputer processing system. The experimental results show that alignment accuracy of ±0.1 pin with a movable stroke of -±20μm has been obtained. This new system has more advantages than that reported.

The composing technique of fast and large scale nuclear data acquisition and control system with single chip microcomputers and PC computers

International Nuclear Information System (INIS)

Xu Zurun; Wu Shiying; Liu Haitao; Yao Yangsen; Wang Yingguan; Yang Chaowen

1998-01-01

The technique of employing single-chip microcomputers and PC computers to compose a fast and large scale nuclear data acquisition and control system was discussed in detail. The optimum composition mode of this kind of system, the acquisition and control circuit unit based on single-chip microcomputers, the real-time communication methods and the software composition under the Windows 3.2 were also described. One, two and three dimensional spectra measured by this system were demonstrated

The composing technique of fast and large scale nuclear data acquisition and control system with single chip microcomputers and PC computers

International Nuclear Information System (INIS)

Xu Zurun; Wu Shiying; Liu Haitao; Yao Yangsen; Wang Yingguan; Yang Chaowen

1997-01-01

The technique of employing single-chip microcomputers and PC computers to compose a fast and large scale nuclear data acquisition and control system was discussed in detail. The optimum composition mode of this kind of system, the acquisition and control circuit unit based on single-chip microcomputers, the real-time communication methods and the software composition under the Windows 3.2 were also described. One, two and three dimensional spectra measured by this system were demonstrated

Automatic Tuning of Control Parameters for Single Speed Engines

OpenAIRE

Olsson, Johan

2004-01-01

In Scania’s single speed engines for industrial and marine use, the engine speed is controlled by a PI-controller. This controller is tuned independent of engine type and application. This brings certain disadvantages since the engines are used in a wide range of applications where the dynamics may differ. In this thesis, the possibility to tune the controller automatically for a specific engine installation has been investigated. The work shows that automatic tuning is possible. By performin...

Establishing Relationship between Process Parameters and Temperature during High Speed End Milling of Soda Lime Glass

Science.gov (United States)

Nasima Bagum, Mst.; Konneh, Mohamed; Yeakub Ali, Mohammad

2018-01-01

In glass machining crack free surface is required in biomedical and optical industry. Ductile mode machining allows materials removal from brittle materials in a ductile manner rather than by brittle fracture. Although end milling is a versatile process, it has not been applied frequently for machining soda lime glass. Soda lime glass is a strain rate and temperature sensitive material; especially around glass transition temperature Tg, ductility increased and strength decreased. Hence, it is envisaged that the generated temperature by high-speed end milling (HSEM) could be brought close to the glass transition temperature, which promote ductile machining. In this research, the objective is to investigate the effect of high speed machining parameters on generated temperature. The cutting parameters were optimized to generate temperature around glass transition temperature of soda lime using response surface methodology (RSM). Result showed that the most influencing process parameter is feed rate followed by spindle speed and depth of cut to generate temperature. Confirmation test showed that combination of spindle speed 30,173 rpm, feed rate 13.2 mm/min and depth of cut 37.68 µm generate 635°C, hence ductile chip removal with machined surface Ra 0.358 µm was possible to achieve.

High speed cutting of AZ31 magnesium alloy

Directory of Open Access Journals (Sweden)

Liwei Lu

2016-06-01

Full Text Available Using LBR-370 numerical control lathe, high speed cutting was applied to AZ31 magnesium alloy. The influence of cutting parameters on microstructure, surface roughness and machining hardening were investigated by using the methods of single factor and orthogonal experiment. The results show that the cutting parameters have an important effect on microstructure, surface roughness and machine hardening. The depth of stress layer, roughness and hardening present a declining tendency with the increase of the cutting speed and also increase with the augment of the cutting depth and feed rate. Moreover, we established a prediction model of the roughness, which has an important guidance on actual machining process of magnesium alloy.

High-speed AC motors

Energy Technology Data Exchange (ETDEWEB)

Jokinen, T.; Arkkio, A. [Helsinki University of Technology Laboratory of Electromechanics, Otaniemi (Finland)

1997-12-31

The paper deals with various types of highspeed electric motors, and their limiting powers. Standard machines with laminated rotors can be utilised if the speed is moderate. The solid rotor construction makes it possible to reach higher power and speed levels than those of laminated rotors. The development work on high-speed motors done at Helsinki University of Technology is presented, too. (orig.) 12 refs.

Development and validation of a general-purpose ASIC chip for the control of switched reluctance machines

International Nuclear Information System (INIS)

Chen Haijin; Lu Shengli; Shi Longxing

2009-01-01

A general-purpose application specific integrated circuit (ASIC) chip for the control of switched reluctance machines (SRMs) was designed and validated to fill the gap between the microcontroller capability and the controller requirements of high performance switched reluctance drive (SRD) systems. It can be used for the control of SRM running either in low speed or in high-speed, i.e., either in chopped current control (CCC) mode or in angular position control (APC) mode. Main functions of the chip include filtering and cycle calculation of rotor angular position signals, commutation logic according to rotor cycle and turn-on/turn-off angles (θ on /θ off ), controllable pulse width modulation (PWM) waveforms generation, chopping control with adjustable delay time, and commutation control with adjustable delay time. All the control parameters of the chip are set online by the microcontroller through a serial peripheral interface (SPI). The chip has been designed with the standard cell based design methodology, and implemented in the central semiconductor manufacturing corporation (CSMC) 0.5 μm complementary metal-oxide-semiconductor (CMOS) process technology. After a successful automatic test equipment (ATE) test using the Nextest's Maverick test system, the chip was further validated through an experimental three-phase 6/2-pole SRD system. Both the ATE test and experimental validation results show that the chip can meet the control requirements of high performance SRD systems, and simplify the controller construction. For a resolution of 0.36 deg. (electrical degree), the chip's maximum processable frequency of the rotor angular position signals is 10 kHz, which is 300,000 rev/min when a three-phase 6/2-pole SRM is concerned

GaN-based integrated photonics chip with suspended LED and waveguide

Science.gov (United States)

Li, Xin; Wang, Yongjin; Hane, Kazuhiro; Shi, Zheng; Yan, Jiang

2018-05-01

We propose a GaN-based integrated photonics chip with suspended LED and straight waveguide with different geometric parameters. The integrated photonics chip is prepared by double-side process. Light transmission performance of the integrated chip verse current is quantitatively analyzed by capturing light transmitted to waveguide tip and BPM (beam propagation method) simulation. Reduction of the waveguide width from 8 μm to 4 μm results in an over linear reduction of the light output power while a doubling of the length from 250 μm to 500 μm only results in under linear decrease of the output power. Free-space data transmission with 80 Mbps random binary sequence of the integrated chip is capable of achieving high speed data transmission via visible light. This study provides a potential approach for GaN-based integrated photonics chip as micro light source and passive optical device in VLC (visible light communication).

Towards Single-Step Biofabrication of Organs on a Chip via 3D Printing.

Science.gov (United States)

Knowlton, Stephanie; Yenilmez, Bekir; Tasoglu, Savas

2016-09-01

Organ-on-a-chip engineering employs microfabrication of living tissues within microscale fluid channels to create constructs that closely mimic human organs. With the advent of 3D printing, we predict that single-step fabrication of these devices will enable rapid design and cost-effective iterations in the development stage, facilitating rapid innovation in this field. Copyright © 2016 Elsevier Ltd. All rights reserved.

Remote monitor used on the 13N leak rate measurement system based on single-chip microcomputer

International Nuclear Information System (INIS)

Tang Rulong; Qiu Xiaoping; Guo Lanying

2012-01-01

It describes a design on Remote Monitor based on single-chip microcomputer, and also presents the design procedure of hardware and software for circuit design, and gives some of specific instructions about the important parts of the design. (authors)

On-chip spectroscopy with thermally tuned high-Q photonic crystal cavities

Energy Technology Data Exchange (ETDEWEB)

Liapis, Andreas C., E-mail: andreas.liapis@gmail.com; Gao, Boshen; Siddiqui, Mahmudur R. [The Institute of Optics, University of Rochester, Rochester, New York 14627 (United States); Shi, Zhimin [Department of Physics, University of South Florida, Tampa, Florida 33620 (United States); Boyd, Robert W. [The Institute of Optics, University of Rochester, Rochester, New York 14627 (United States); Department of Physics and School of Electrical Engineering and Computer Science, University of Ottawa, Ottawa, Ontario K1N 6N5 (Canada)

2016-01-11

Spectroscopic methods are a sensitive way to determine the chemical composition of potentially hazardous materials. Here, we demonstrate that thermally tuned high-Q photonic crystal cavities can be used as a compact high-resolution on-chip spectrometer. We have used such a chip-scale spectrometer to measure the absorption spectra of both acetylene and hydrogen cyanide in the 1550 nm spectral band and show that we can discriminate between the two chemical species even though the two materials have spectral features in the same spectral region. Our results pave the way for the development of chip-size chemical sensors that can detect toxic substances.

A molecular dynamics investigation into the mechanisms of subsurface damage and material removal of monocrystalline copper subjected to nanoscale high speed grinding

International Nuclear Information System (INIS)

Li, Jia; Fang, Qihong; Liu, Youwen; Zhang, Liangchi

2014-01-01

This paper investigates the mechanisms of subsurface damage and material removal of monocrystalline copper when it is under a nanoscale high speed grinding of a diamond tip. The analysis was carried out with the aid of three-dimensional molecular dynamics simulations. The key factors that would influence the deformation of the material were carefully explored by analyzing the chip, dislocation movement, and workpiece deformation, which include grinding speed, depth of cut, grid tip radius, crystal orientation and machining angle of copper. An analytical model was also established to predict the emission of partial dislocations during the nanoscale high speed grinding. The investigation showed that a higher grinding velocity, a larger tip radius or a larger depth of cut would result in a larger chipping volume and a greater temperature rise in the copper workpiece. A lower grinding velocity would produce more intrinsic stacking faults. It was also found that the transition of deformation mechanisms depends on the competition between the dislocations and deformation twinning. There is a critical machining angle, at which a higher velocity, a smaller tip radius, or a smaller depth of cut will reduce the subsurface damage and improve the smoothness of a ground surface. The established analytical model showed that the Shockley dislocation emission is most likely to occur with the crystal orientations of (0 0 1)[1 0 0] at 45° angle.

Rotational microfluidic motor for on-chip microcentrifugation

Science.gov (United States)

Shilton, Richie J.; Glass, Nick R.; Chan, Peggy; Yeo, Leslie Y.; Friend, James R.

2011-06-01

We report on the design of a surface acoustic wave (SAW) driven fluid-coupled micromotor which runs at high rotational velocities. A pair of opposing SAWs generated on a lithium niobate substrate are each obliquely passed into either side of a fluid drop to drive rotation of the fluid, and the thin circular disk set on the drop. Using water for the drop, a 5 mm diameter disk was driven with rotation speeds and start-up torques up to 2250 rpm and 60 nN m, respectively. Most importantly for lab-on-a-chip applications, radial accelerations of 172 m/s2 was obtained, presenting possibilities for microcentrifugation, flow sequencing, assays, and cell culturing in truly microscale lab-on-a-chip devices.

Global On-Chip Differential Interconnects with Optimally-Placed Twists

NARCIS (Netherlands)

Mensink, E.; Schinkel, Daniel; Klumperink, Eric A.M.; van Tuijl, Adrianus Johannes Maria; Nauta, Bram

2005-01-01

Global on-chip communication is receiving quite some attention as global interconnects are rapidly becoming a speed, power and reliability bottleneck for digital CMOS systems. Recently, we proposed a bus-transceiver test chip in 0.13 μm CMOS using 10 mm long uninterrupted differential interconnects

An automatic system for elaboration of chip breaking diagrams

DEFF Research Database (Denmark)

Andreasen, Jan Lasson; De Chiffre, Leonardo

1998-01-01

A laboratory system for fully automatic elaboration of chip breaking diagrams has been developed and tested. The system is based on automatic chip breaking detection by frequency analysis of cutting forces in connection with programming of a CNC-lathe to scan different feeds, speeds and cutting...

High speed all optical shear wave imaging optical coherence elastography (Conference Presentation)

Science.gov (United States)

Song, Shaozhen; Hsieh, Bao-Yu; Wei, Wei; Shen, Tueng; O'Donnell, Matthew; Wang, Ruikang K.

2016-03-01

Optical Coherence Elastography (OCE) is a non-invasive testing modality that maps the mechanical property of soft tissues with high sensitivity and spatial resolution using phase-sensitive optical coherence tomography (PhS-OCT). Shear wave OCE (SW-OCE) is a leading technique that relies on the speed of propagating shear waves to provide a quantitative elastography. Previous shear wave imaging OCT techniques are based on repeated M-B scans, which have several drawbacks such as long acquisition time and repeated wave stimulations. Recent developments of Fourier domain mode-locked high-speed swept-source OCT system has enabled enough speed to perform KHz B-scan rate OCT imaging. Here we propose ultra-high speed, single shot shear wave imaging to capture single-shot transient shear wave propagation to perform SW-OCE. The frame rate of shear wave imaging is 16 kHz, at A-line rate of ~1.62 MHz, which allows the detection of high-frequency shear wave of up to 8 kHz. The shear wave is generated photothermal-acoustically, by ultra-violet pulsed laser, which requires no contact to OCE subjects, while launching high frequency shear waves that carries rich localized elasticity information. The image acquisition and processing can be performed at video-rate, which enables real-time 3D elastography. SW-OCE measurements are demonstrated on tissue-mimicking phantoms and porcine ocular tissue. This approach opens up the feasibility to perform real-time 3D SW-OCE in clinical applications, to obtain high-resolution localized quantitative measurement of tissue biomechanical property.

Flip-chip bonded optoelectronic integration based on ultrathin silicon (UTSi) CMOS

Science.gov (United States)

Hong, Sunkwang; Ho, Tawei; Zhang, Liping; Sawchuk, Alexander A.

2003-06-01

We describe the design and test of flip-chip bonded optoelectronic CMOS devices based on Peregrine Semiconductor's 0.5 micron Ultra-Thin Silicon on sapphire (UTSi) technology. The UTSi process eliminates the substrate leakage that typically results in crosstalk and reduces parasitic capacitance to the substrate, providing many benefits compared to bulk silicon CMOS. The low-loss synthetic sapphire substrate is optically transparent and has a coefficient of thermal expansion suitable for flip-chip bonding of vertical cavity surface emitting lasers (VCSELs) and detectors. We have designed two different UTSi CMOS chips. One contains a flip-chip bonded 1 x 4 photodiode array, a receiver array, a double edge triggered D-flip flop-based 2047-pattern pseudo random bit stream (PRBS) generator and a quadrature-phase LC-voltage controlled oscillator (VCO). The other chip contains a flip-chip bonded 1 x 4 VCSEL array, a driver array based on high-speed low-voltage differential signals (LVDS) and a full-balanced differential LC-VCO. Each VCSEL driver and receiver has individual input and bias voltage adjustments. Each UTSi chip is mounted on different printed circuit boards (PCBs) which have holes with about 1 mm radius for optical output and input paths through the sapphire substrate. We discuss preliminary testing of these chips.

High-speed imaging of explosive eruptions: applications and perspectives

Science.gov (United States)

Taddeucci, Jacopo; Scarlato, Piergiorgio; Gaudin, Damien; Capponi, Antonio; Alatorre-Ibarguengoitia, Miguel-Angel; Moroni, Monica

2013-04-01

Explosive eruptions, being by definition highly dynamic over short time scales, necessarily call for observational systems capable of relatively high sampling rates. "Traditional" tools, like as seismic and acoustic networks, have recently been joined by Doppler radar and electric sensors. Recent developments in high-speed camera systems now allow direct visual information of eruptions to be obtained with a spatial and temporal resolution suitable for the analysis of several key eruption processes. Here we summarize the methods employed to gather and process high-speed videos of explosive eruptions, and provide an overview of the several applications of these new type of data in understanding different aspects of explosive volcanism. Our most recent set up for high-speed imaging of explosive eruptions (FAMoUS - FAst, MUltiparametric Set-up,) includes: 1) a monochrome high speed camera, capable of 500 frames per second (fps) at high-definition (1280x1024 pixel) resolution and up to 200000 fps at reduced resolution; 2) a thermal camera capable of 50-200 fps at 480-120x640 pixel resolution; and 3) two acoustic to infrasonic sensors. All instruments are time-synchronized via a data logging system, a hand- or software-operated trigger, and via GPS, allowing signals from other instruments or networks to be directly recorded by the same logging unit or to be readily synchronized for comparison. FAMoUS weights less than 20 kg, easily fits into four, hand-luggage-sized backpacks, and can be deployed in less than 20' (and removed in less than 2', if needed). So far, explosive eruptions have been recorded in high-speed at several active volcanoes, including Fuego and Santiaguito (Guatemala), Stromboli (Italy), Yasur (Vanuatu), and Eyjafiallajokull (Iceland). Image processing and analysis from these eruptions helped illuminate several eruptive processes, including: 1) Pyroclasts ejection. High-speed videos reveal multiple, discrete ejection pulses within a single Strombolian

Integration of micro-optics and microfluidics in a glass chip by fs-laser for optofluidic applications

Science.gov (United States)

Osellame, Roberto; Martinez, Rebeca; Laporta, Paolo; Ramponi, Roberta; Cerullo, Giulio

2009-02-01

A lab-on-a-chip (LOC) is a device that incorporates in a single substrate the functionalities of a biological laboratory, i.e. a network of fluidic channels, reservoirs, valves, pumps and sensors, all with micrometer dimensions. Its main advantages are the possibility of working with small samples quantities (from nano- to picoliters), high sensitivity, speed of analysis and the possibility of measurement automation and standardization. They are becoming the most powerful tools of analytical chemistry with a broad application in life sciences, biotechnology and drug development. The next technological challenge of LOCs is direct on-chip integration of photonic functionalities for sensing of biomolecules flowing in the microchannels. Ultrafast laser processing of the bulk of a dielectric material is a very flexible and simple method to produce photonic devices inside microfluidic chips for capillary electrophoresis (CE) or chemical microreactors. By taking advantage of the unique three-dimensional capabilities of this fabrication technique, more complex functionalities, such as splitters or Mach-Zehnder interferometers, can be implemented. In this work we report on the use of femtosecond laser pulses to fabricate photonic devices (as waveguides, splitters and interferometers) inside commercial CE chips, without affecting the manufacturing procedure of the microfluidic part of the device. The fabrication of single waveguides intersecting the channels allows one to perform absorption or Laser Induced Fluorescence (LIF) sensing of the molecules separated inside the microchannels. Waveguide splitters are used for multipoint excitation of the microfluidic channel for parallel or higher sensitivity measurements. Finally, Mach-Zehnder interferometers are used for label-free sensing of the samples flowing in the microfluidic channels by means of refractive index changes detection.

Chip based single cell analysis for nanotoxicity assessment.

Science.gov (United States)

Shah, Pratikkumar; Kaushik, Ajeet; Zhu, Xuena; Zhang, Chengxiao; Li, Chen-Zhong

2014-05-07

Nanomaterials, because of their tunable properties and performances, have been utilized extensively in everyday life related consumable products and technology. On exposure, beyond the physiological range, nanomaterials cause health risks via affecting the function of organisms, genomic systems, and even the central nervous system. Thus, new analytical approaches for nanotoxicity assessment to verify the feasibility of nanomaterials for future use are in demand. The conventional analytical techniques, such as spectrophotometric assay-based techniques, usually require a lengthy and time-consuming process and often produce false positives, and often cannot be implemented at a single cell level measurement for studying cell behavior without interference from its surrounding environment. Hence, there is a demand for a precise, accurate, sensitive assessment for toxicity using single cells. Recently, due to the advantages of automation of fluids and minimization of human errors, the integration of a cell-on-a-chip (CoC) with a microfluidic system is in practice for nanotoxicity assessments. This review explains nanotoxicity and its assessment approaches with advantages/limitations and new approaches to overcome the confines of traditional techniques. Recent advances in nanotoxicity assessment using a CoC integrated with a microfluidic system are also discussed in this review, which may be of use for nanotoxicity assessment and diagnostics.

TC9447F, single-chip DSP (digital signal processor) for audio; 1 chip audio yo DSP LSI TC9447F

Energy Technology Data Exchange (ETDEWEB)

NONE

1999-03-01

TC9447F is a single-chip DSP for audio which builds in 2-channel AD converter/4-channel DA converter. It can build various application programs such as the sound field control like hall simulation, digital filter like equalizer, and dynamic range control, in the program memory (ROM). Further, it builds in {+-}10dB trim use electronic volume for two channels. It also builds data delay use RAM (64K-bit) in, so no RAM to be separately attached is necessary. (translated by NEDO)

High-Speed and Low-Energy Flip-Flop Operation of Asymmetric Active-Multimode Interferometer Bi-Stable Laser Diodes

DEFF Research Database (Denmark)

Jiang, Haisong; Chaen, Yutaka; Hagio, Takuma

2011-01-01

High-speed (121/25 ps rise/fall time) and low-switching energy (7.1 and 3.4 fJ) alloptical flip-flop operation of single-wavelength high-mesa asymmetric active-MMI bi-stable laser diodes is demonstrated for the first time using 25 ps long switching pulses.......High-speed (121/25 ps rise/fall time) and low-switching energy (7.1 and 3.4 fJ) alloptical flip-flop operation of single-wavelength high-mesa asymmetric active-MMI bi-stable laser diodes is demonstrated for the first time using 25 ps long switching pulses....

Investigations on high speed MHD liquid flow

International Nuclear Information System (INIS)

Yamasaki, Takasuke; Kamiyama, Shin-ichi.

1982-01-01

Lately, the pressure drop problem of MHD two-phase flow in a duct has been investigated theoretically and experimentally in conjunction with the problems of liquid metal MHD two-phase flow power-generating cycle or of liquid metal boiling two-phase flow in the blanket of a nuclear fusion reactor. Though many research results have been reported so far for MHD single-phase flow, the hydrodynamic studies on high speed two-phase flow are reported only rarely, specifically the study dealing with the generation of cavitation is not found. In the present investigation, the basic equation was derived, analyzing the high speed MHD liquid flow in a diverging duct as the one-dimensional flow of homogeneous two-phase fluid of small void ratio. Furthermore, the theoretical solution for the effect of magnetic field on cavitation-generating conditions was tried. The pressure distribution in MHD flow in a duct largely varies with load factor, and even if the void ratio is small, the pressure distribution in two-phase flow is considerably different from that in single-phase flow. Even if the MHD two-phase flow in a duct is subsonic flow at the throat, the critical conditions may be achieved sometimes in a diverging duct. It was shown that cavitation is more likely to occur as magnetic field becomes more intense if it is generated downstream of the throat. This explains the experimental results qualitatively. (Wakatsuki, Y.)

ALICE chip processor

CERN Multimedia

Maximilien Brice

2003-01-01

This tiny chip provides data processing for the time projection chamber on ALICE. Known as the ALICE TPC Read Out (ALTRO), this device was designed to minimize the size and power consumption of the TPC front end electronics. This single chip contains 16 low-power analogue-to-digital converters with six million transistors of digital processing and 8 kbits of data storage.

High speed heterostructure devices

CERN Document Server

Beer, Albert C; Willardson, R K; Kiehl, Richard A; Sollner, T C L Gerhard

1994-01-01

Volume 41 includes an in-depth review of the most important, high-speed switches made with heterojunction technology. This volume is aimed at the graduate student or working researcher who needs a broad overview andan introduction to current literature. Key Features * The first complete review of InP-based HFETs and complementary HFETs, which promise very low power and high speed * Offers a complete, three-chapter review of resonant tunneling * Provides an emphasis on circuits as well as devices.

Scalable fabrication of high-power graphene micro-supercapacitors for flexible and on-chip energy storage

Science.gov (United States)

El-Kady, Maher F.; Kaner, Richard B.

2013-02-01

The rapid development of miniaturized electronic devices has increased the demand for compact on-chip energy storage. Microscale supercapacitors have great potential to complement or replace batteries and electrolytic capacitors in a variety of applications. However, conventional micro-fabrication techniques have proven to be cumbersome in building cost-effective micro-devices, thus limiting their widespread application. Here we demonstrate a scalable fabrication of graphene micro-supercapacitors over large areas by direct laser writing on graphite oxide films using a standard LightScribe DVD burner. More than 100 micro-supercapacitors can be produced on a single disc in 30 min or less. The devices are built on flexible substrates for flexible electronics and on-chip uses that can be integrated with MEMS or CMOS in a single chip. Remarkably, miniaturizing the devices to the microscale results in enhanced charge-storage capacity and rate capability. These micro-supercapacitors demonstrate a power density of ~200 W cm-3, which is among the highest values achieved for any supercapacitor.

Monitoring and data acquisition of the high speed hydrogen pellet in SPINS

Energy Technology Data Exchange (ETDEWEB)

Mukherjee, Samiran Shanti, E-mail: samiran@ipr.res.in; Mishra, Jyotishankar; Gangradey, Ranjana; Dutta, Pramit; Rastogi, Naveen; Panchal, Paresh; Nayak, Pratik; Agarwal, Jyoti; Bairagi, Pawan; Patel, Haresh; Sharma, Hardik

2016-11-15

Highlights: • Pellet INjector System with monitoring and data acquisition is described. • A high speed camera was used to view pellet size, and its flight trajectory. • PXI based high speed control system is used data acquisition. • Pellets of length 2–4.8 mm and speed 250–750 m/s were obtained. - Abstract: Injection of solid hydrogen pellets is an efficient way of replenishing the spent fuel in high temperature plasmas. Aiming that, a Single Pellet INjector System (SPINS) is developed at Institute for Plasma Research (IPR), India, to initiate pellet injection related research in SST-1. The pellet injector is controlled by a PXI system based data acquisition and control (DAC) system for pellet formation, precise firing control, data collection and diagnostics. The velocity of high speed moving pellets is estimated by using two sets of light gate diagnostic. Apart from light gate, a fast framing camera is used to measure the pellet size and its speed. The pellet images are captured at a frame rate of ∼200,000 frames per second at (128 × 64) pixel resolution with an exposure time of 1 μs. Using these diagnostic, various cylindrical pellets of length ranging from 2 to 4.8 mm and speed 250–750 m/s were successfully obtained. This paper describes the control and data acquisition system of SPINS, the techniques for measurement of pellet velocity and capturing images of high speed moving pellet.

A primary battery-on-a-chip using monolayer graphene

Science.gov (United States)

Iost, Rodrigo M.; Crespilho, Frank N.; Kern, Klaus; Balasubramanian, Kannan

2016-07-01

We present here a bottom-up approach for realizing on-chip on-demand batteries starting out with chemical vapor deposition-grown graphene. Single graphene monolayers contacted by electrode lines on a silicon chip serve as electrodes. The anode and cathode are realized by electrodeposition of zinc and copper respectively onto graphene, leading to the realization of a miniature graphene-based Daniell cell on a chip. The electrolyte is housed partly in a gel and partly in liquid form in an on-chip enclosure molded using a 3d printer or made out of poly(dimethylsiloxane). The realized batteries provide a stable voltage (∼1.1 V) for many hours and exhibit capacities as high as 15 μAh, providing enough power to operate a pocket calculator. The realized batteries show promise for deployment as on-chip power sources for autonomous systems in lab-on-a-chip or biomedical applications.

Self-corrected chip-based dual-comb spectrometer.

Science.gov (United States)

Hébert, Nicolas Bourbeau; Genest, Jérôme; Deschênes, Jean-Daniel; Bergeron, Hugo; Chen, George Y; Khurmi, Champak; Lancaster, David G

2017-04-03

We present a dual-comb spectrometer based on two passively mode-locked waveguide lasers integrated in a single Er-doped ZBLAN chip. This original design yields two free-running frequency combs having a high level of mutual stability. We developed in parallel a self-correction algorithm that compensates residual relative fluctuations and yields mode-resolved spectra without the help of any reference laser or control system. Fluctuations are extracted directly from the interferograms using the concept of ambiguity function, which leads to a significant simplification of the instrument that will greatly ease its widespread adoption and commercial deployment. Comparison with a correction algorithm relying on a single-frequency laser indicates discrepancies of only 50 attoseconds on optical timings. The capacities of this instrument are finally demonstrated with the acquisition of a high-resolution molecular spectrum covering 20 nm. This new chip-based multi-laser platform is ideal for the development of high-repetition-rate, compact and fieldable comb spectrometers in the near- and mid-infrared.

Chip-to-Chip Half Duplex Spiking Data Communication over Power Supply Rails

Science.gov (United States)

Hashida, Takushi; Nagata, Makoto

Chip-to-chip serial data communication is superposed on power supply over common Vdd/Vss connections through chip, package, and board traces. A power line transceiver demonstrates half duplex spiking communication at more than 100Mbps. A pair of transceivers consumes 1.35mA from 3.3V, at 130Mbps. On-chip power line LC low pass filter attenuates pseudo-differential communication spikes by 30dB, purifying power supply current for internal circuits. Bi-directional spiking communication was successfully examined in a 90-nm CMOS prototype setup of on-chip waveform capturing. A micro controller forwards clock pulses to and receives data streams from a comparator based waveform capturer formed on a different chip, through a single pair of power and ground traces. The bit error rate is small enough not to degrade waveform acquisition capability, maintaining the spurious free dynamic range of higher than 50dB.

Monolithic array of 32 SPAD pixels for single-photon imaging at high frame rates

International Nuclear Information System (INIS)

Tisa, Simone; Guerrieri, Fabrizio; Zappa, Franco

2009-01-01

We present a single-chip monolithic array of 32 Single-Photon Avalanche Diodes (SPAD) and associated electronics for imaging at high frame rates and high sensitivity. Photodetectors, front-end circuitry and control electronics used to manage the array are monolithically integrated on the same chip in a standard 0.35 μm CMOS high-voltage technology. The array is composed of 32 'smart' pixels working in photon counting mode and functioning in a parallel fashion. Every cell comprises of an integrated SPAD photodetector, a novel quenching circuit named as Variable Load Quenching Circuit (VLQC), counting electronics and a buffer memory. Proper ancillary electronics that perform the arbitration of photon counts between two consecutive frames is integrated as well. Thanks to the presence of in-pixel memory registers, the inter-frame dead time between subsequent frames is limited to few nanoseconds. Since integration and download are performed simultaneously and the array can be addressed like a standard digital memory, the achievable maximum frame rate is very high in the order of hundreds of thousands of frame/s.

Compact sub-nanosecond pulse seed source with diode laser driven by a high-speed circuit

Science.gov (United States)

Wang, Xiaoqian; Wang, Bo; Wang, Junhua; Cheng, Wenyong

2018-06-01

A compact sub-nanosecond pulse seed source with 1550 nm diode laser (DL) was obtained by employing a high-speed circuit. The circuit mainly consisted of a short pulse generator and a short pulse driver. The short pulse generator, making up of a complex programmable logic device (CPLD), a level translator, two programmable delay chips and an AND gate chip, output a triggering signal to control metal-oxide-semiconductor field-effect transistor (MOSFET) switch of the short pulse driver. The MOSFET switch with fast rising time and falling time both shorter than 1 ns drove the DL to emit short optical pulses. Performances of the pulse seed source were tested. The results showed that continuously adjustable repetition frequency ranging from 500 kHz to 100 MHz and pulse duration in the range of 538 ps to 10 ns were obtained, respectively. 537 μW output was obtained at the highest repetition frequency of 100 MHz with the shortest pulse duration of 538 ps. These seed pulses were injected into an fiber amplifier, and no optical pulse distortions were found.

The Application of Virtex-II Pro FPGA in High-Speed Image Processing Technology of Robot Vision Sensor

International Nuclear Information System (INIS)

Ren, Y J; Zhu, J G; Yang, X Y; Ye, S H

2006-01-01

The Virtex-II Pro FPGA is applied to the vision sensor tracking system of IRB2400 robot. The hardware platform, which undertakes the task of improving SNR and compressing data, is constructed by using the high-speed image processing of FPGA. The lower level image-processing algorithm is realized by combining the FPGA frame and the embedded CPU. The velocity of image processing is accelerated due to the introduction of FPGA and CPU. The usage of the embedded CPU makes it easily to realize the logic design of interface. Some key techniques are presented in the text, such as read-write process, template matching, convolution, and some modules are simulated too. In the end, the compare among the modules using this design, using the PC computer and using the DSP, is carried out. Because the high-speed image processing system core is a chip of FPGA, the function of which can renew conveniently, therefore, to a degree, the measure system is intelligent

The Application of Virtex-II Pro FPGA in High-Speed Image Processing Technology of Robot Vision Sensor

Science.gov (United States)

Ren, Y. J.; Zhu, J. G.; Yang, X. Y.; Ye, S. H.

2006-10-01

The Virtex-II Pro FPGA is applied to the vision sensor tracking system of IRB2400 robot. The hardware platform, which undertakes the task of improving SNR and compressing data, is constructed by using the high-speed image processing of FPGA. The lower level image-processing algorithm is realized by combining the FPGA frame and the embedded CPU. The velocity of image processing is accelerated due to the introduction of FPGA and CPU. The usage of the embedded CPU makes it easily to realize the logic design of interface. Some key techniques are presented in the text, such as read-write process, template matching, convolution, and some modules are simulated too. In the end, the compare among the modules using this design, using the PC computer and using the DSP, is carried out. Because the high-speed image processing system core is a chip of FPGA, the function of which can renew conveniently, therefore, to a degree, the measure system is intelligent.

Status and outlook of CHIP-TRAP: The Central Michigan University high precision Penning trap

Science.gov (United States)

Redshaw, M.; Bryce, R. A.; Hawks, P.; Gamage, N. D.; Hunt, C.; Kandegedara, R. M. E. B.; Ratnayake, I. S.; Sharp, L.

2016-06-01

At Central Michigan University we are developing a high-precision Penning trap mass spectrometer (CHIP-TRAP) that will focus on measurements with long-lived radioactive isotopes. CHIP-TRAP will consist of a pair of hyperbolic precision-measurement Penning traps, and a cylindrical capture/filter trap in a 12 T magnetic field. Ions will be produced by external ion sources, including a laser ablation source, and transported to the capture trap at low energies enabling ions of a given m / q ratio to be selected via their time-of-flight. In the capture trap, contaminant ions will be removed with a mass-selective rf dipole excitation and the ion of interest will be transported to the measurement traps. A phase-sensitive image charge detection technique will be used for simultaneous cyclotron frequency measurements on single ions in the two precision traps, resulting in a reduction in statistical uncertainty due to magnetic field fluctuations.

FY1995 trial production of brain functional chip; 1995 nendo no kino shuseki chip no shisaku

Energy Technology Data Exchange (ETDEWEB)

NONE

1997-03-01

The present computer system will run on a program which is prepared in advance. On the other hand, the human brain can acquire some processes from learning with experiments. It would be very useful us human nature, if these learning process should be build up artificially. Our aim is to reveal basic self-acquiring mechanism of information and its processes of the brain, and preliminary research, including theoretical problems, for building up specialized processor chip. Many research on the brain have been held at the views of scientifically and medically. However; we focused on the principle brain learning process itself. The results of the research was directly realized on a specialized processor chip tuned for high-speed simulation of neural network. We could pointed out some problems on the present brain type processor, and discussed about basic technique for implementation of the next age brain type processor and theories. (NEDO)

Towards realising high-speed large-bandwidth quantum memory

Institute of Scientific and Technical Information of China (English)

SHI BaoSen; DING DongSheng

2016-01-01

Indispensable for quantum communication and quantum computation,quantum memory executes on demand storage and retrieval of quantum states such as those of a single photon,an entangled pair or squeezed states.Among the various forms of quantum memory,Raman quantum memory has advantages forits broadband and high-speed characteristics,which results in a huge potential for applications in quantum networks and quantum computation.However,realising Raman quantum memory with true single photons and photonic entanglementis challenging.In this review,after briefly introducing the main benchmarks in the development of quantum memory and describing the state of the art,we focus on our recent experimental progress inquantum memorystorage of quantum states using the Raman scheme.

Optimization of PAM-4 transmitters based on lumped silicon photonic MZMs for high-speed short-reach optical links.

Science.gov (United States)

Zhou, Shiyu; Wu, Hsin-Ta; Sadeghipour, Khosrov; Scarcella, Carmelo; Eason, Cormac; Rensing, Marc; Power, Mark J; Antony, Cleitus; O'Brien, Peter; Townsend, Paul D; Ossieur, Peter

2017-02-20

We demonstrate how to optimize the performance of PAM-4 transmitters based on lumped Silicon Photonic Mach-Zehnder Modulators (MZMs) for short-reach optical links. Firstly, we analyze the trade-off that occurs between extinction ratio and modulation loss when driving an MZM with a voltage swing less than the MZM's Vπ. This is important when driver circuits are realized in deep submicron CMOS process nodes. Next, a driving scheme based upon a switched capacitor approach is proposed to maximize the achievable bandwidth of the combined lumped MZM and CMOS driver chip. This scheme allows the use of lumped MZM for high speed optical links with reduced RF driver power consumption compared to the conventional approach of driving MZMs (with transmission line based electrodes) with a power amplifier. This is critical for upcoming short-reach link standards such as 400Gb/s 802.3 Ethernet. The driver chip was fabricated using a 65nm CMOS technology and flip-chipped on top of the Silicon Photonic chip (fabricated using IMEC's ISIPP25G technology) that contains the MZM. Open eyes with 4dB extinction ratio for a 36Gb/s (18Gbaud) PAM-4 signal are experimentally demonstrated. The electronic driver chip has a core area of only 0.11mm2 and consumes 236mW from 1.2V and 2.4V supply voltages. This corresponds to an energy efficiency of 6.55pJ/bit including Gray encoder and retiming, or 5.37pJ/bit for the driver circuit only.

Effects of temperature and torsion speed on torsional properties of single-walled carbon nanotubes

International Nuclear Information System (INIS)

Khoei, A.R.; Ban, E.; Banihashemi, P.; Abdolhosseini Qomi, M.J.

2011-01-01

Carbon nanotubes (CNTs) are excellent candidates for torsional elements used in nanoelectro-mechanical systems (NEMS). Simulations show that after being twisted to a certain angle, they buckle and lose their mechanical strength. In this paper, classical molecular dynamics simulations are performed on single-walled carbon nanotubes (CNTs) to investigate the effects of torsion speed and temperature on CNT torsional properties. The AIREBO potential is employed to describe the bonded interactions between carbon atoms. The MD simulations clearly show that the buckling of CNTs in torsion is a reversible process, in which by unloading the buckled CNT in opposite direction, it returns to its original configuration. In addition, the numerical results reveal that the torsional shear modulus of CNTs increases by increasing the temperature and decreasing the torsion speed. Furthermore, the buckling torsion angle of CNTs increases by increasing the torsion speed and decreasing the temperature. Finally, it is observed that torsional properties of CNTs are highly affected by speed of twist and temperature of the nanotubes.

Prediction of 3D chip formation in the facing cutting with lathe machine using FEM

Science.gov (United States)

Prasetyo, Yudhi; Tauviqirrahman, Mohamad; Rusnaldy

2016-04-01

This paper presents the prediction of the chip formation at the machining process using a lathe machine in a more specific way focusing on facing cutting (face turning). The main purpose is to propose a new approach to predict the chip formation with the variation of the cutting directions i.e., the backward and forward direction. In addition, the interaction between stress analysis and chip formation on cutting process was also investigated. The simulations were conducted using three dimensional (3D) finite element method based on ABAQUS software with aluminum and high speed steel (HSS) as the workpiece and the tool materials, respectively. The simulation result showed that the chip resulted using a backward direction depicts a better formation than that using a conventional (forward) direction.

Initial multicentre experience of high-speed myocardial perfusion imaging: comparison between high-speed and conventional single-photon emission computed tomography with angiographic validation

Energy Technology Data Exchange (ETDEWEB)

Neill, Johanne [University College London Hospital, Institute of Nuclear Medicine, London (United Kingdom); The Prince Charles Hospital, Brisbane (Australia); Prvulovich, Elizabeth M.; Bomanji, Jamshed B. [University College London Hospital, Institute of Nuclear Medicine, London (United Kingdom); Fish, Matthews B. [Sacred Heart Medical Center (SHMC), Springfield, OR (United States); Berman, Daniel S.; Slomka, Piotr J. [Cedars-Sinai Medical Center, Los Angeles, CA (United States); Sharir, Tali [Procardia Maccabi Healthcare Services (PMHS), Tel Aviv (Israel); Martin, William H. [Vanderbilt University Medical Center (VUMC), Nashville, TN (United States); DiCarli, Marcelo F. [Brigham and Women' s Hospital (BWH), Boston, MA (United States); Ziffer, Jack A. [Baptist Hospital of Miami (BHM), Miami, FL (United States); Shiti, Dalia [Spectrum-Dynamics, Caesarea (Israel); Ben-Haim, Simona [University College London Hospital, Institute of Nuclear Medicine, London (United Kingdom); Chaim Sheba Medical Center, Department of Nuclear Medicine, Tel-Hashomer (Israel)

2013-07-15

High-speed (HS) single-photon emission computed tomography (SPECT) with a recently developed solid-state camera shows comparable myocardial perfusion abnormalities to those seen in conventional SPECT. We aimed to compare HS and conventional SPECT images from multiple centres with coronary angiographic findings. The study included 50 patients who had sequential conventional SPECT and HS SPECT myocardial perfusion studies and coronary angiography within 3 months. Stress and rest perfusion images were visually analysed and scored semiquantitatively using a 17-segment model by two experienced blinded readers. Global and coronary territorial summed stress scores (SSS) and summed rest scores (SRS) were calculated. Global SSS {>=}3 or coronary territorial SSS {>=}2 was considered abnormal. In addition the total perfusion deficit (TPD) was automatically derived. TPD >5 % and coronary territorial TPD {>=}3 % were defined as abnormal. Coronary angiograms were analysed for site and severity of coronary stenosis; {>=}50 % was considered significant. Of the 50 patients, 13 (26 %) had no stenosis, 22 (44 %) had single-vessel disease, 6 (12 %) had double-vessel disease and 9 (18 %) had triple-vessel disease. There was a good linear correlation between the visual global SSS and SRS (Spearman's {rho} 0.897 and 0.866, respectively; p < 0.001). In relation to coronary angiography, the sensitivities, specificities and accuracies of HS SPECT and conventional SPECT by visual assessment were 92 % (35/38), 83 % (10/12) and 90 % (45/50) vs. 84 % (32/38), 50 % (6/12) and 76 % (38/50), respectively (p < 0.001). The sensitivities, specificities and accuracies of HS SPECT and conventional SPECT in relation to automated TPD assessment were 89 % (31/35), 57 % (8/14) and 80 % (39/49) vs. 86 % (31/36), 77 % (10/13) and 84 % (41/49), respectively. HS SPECT allows fast acquisition of myocardial perfusion images that correlate well with angiographic findings with overall accuracy by visual

14 CFR 23.253 - High speed characteristics.

Science.gov (United States)

2010-01-01

... 14 Aeronautics and Space 1 2010-01-01 2010-01-01 false High speed characteristics. 23.253 Section... Requirements § 23.253 High speed characteristics. If a maximum operating speed VMO/MMO is established under § 23.1505(c), the following speed increase and recovery characteristics must be met: (a) Operating...

Analysis of single-cell differences by use of an on-chip microculture system and optical trapping.

Science.gov (United States)

Wakamoto, Y; Inoue, I; Moriguchi, H; Yasuda, K

2001-09-01

A method is described for continuous observation of isolated single cells that enables genetically identical cells to be compared; it uses an on-chip microculture system and optical tweezers. Photolithography is used to construct microchambers with 5-microm-high walls made of thick photoresist (SU-8) on the surface of a glass slide. These microchambers are connected by a channel through which cells are transported, by means of optical tweezers, from a cultivation microchamber to an analysis microchamber, or from the analysis microchamber to a waste microchamber. The microchambers are covered with a semi-permeable membrane to separate them from nutrient medium circulating through a "cover chamber" above. Differential analysis of isolated direct descendants of single cells showed that this system could be used to compare genetically identical cells under contamination-free conditions. It should thus help in the clarification of heterogeneous phenomena, for example unequal cell division and cell differentiation.

Time resolution performance studies of contemporary high speed photomultipliers

International Nuclear Information System (INIS)

Leskovar, B.; Lo, C.C.

1978-01-01

The time resolution capabilities of prototype microchannel plate and static crossed-field photomultipliers have been investigated. Measurements were made of electron transit time, rise time, time response, single phtoelectron time spread and multiphotoelectron time spread for LEP HR350 proximity focused high gain curved microchannel plate and VPM-154A/1.6L static crossed-field photomultipliers. The experimental data have been compared with results obtained with conventionally designed high speed photomultipliers. Descriptions are given of both the measuring techniques and the measuring systems. 16 refs

High-speed single-shot optical focusing through dynamic scattering media with full-phase wavefront shaping

Science.gov (United States)

Hemphill, Ashton S.; Shen, Yuecheng; Liu, Yan; Wang, Lihong V.

2017-11-01

In biological applications, optical focusing is limited by the diffusion of light, which prevents focusing at depths greater than ˜1 mm in soft tissue. Wavefront shaping extends the depth by compensating for phase distortions induced by scattering and thus allows for focusing light through biological tissue beyond the optical diffusion limit by using constructive interference. However, due to physiological motion, light scattering in tissue is deterministic only within a brief speckle correlation time. In in vivo tissue, this speckle correlation time is on the order of milliseconds, and so the wavefront must be optimized within this brief period. The speed of digital wavefront shaping has typically been limited by the relatively long time required to measure and display the optimal phase pattern. This limitation stems from the low speeds of cameras, data transfer and processing, and spatial light modulators. While binary-phase modulation requiring only two images for the phase measurement has recently been reported, most techniques require at least three frames for the full-phase measurement. Here, we present a full-phase digital optical phase conjugation method based on off-axis holography for single-shot optical focusing through scattering media. By using off-axis holography in conjunction with graphics processing unit based processing, we take advantage of the single-shot full-phase measurement while using parallel computation to quickly reconstruct the phase map. With this system, we can focus light through scattering media with a system latency of approximately 9 ms, on the order of the in vivo speckle correlation time.

Automated imaging of cellular spheroids with selective plane illumination microscopy on a chip (Conference Presentation)

Science.gov (United States)

Paiè, Petra; Bassi, Andrea; Bragheri, Francesca; Osellame, Roberto

2017-02-01

Selective plane illumination microscopy (SPIM) is an optical sectioning technique that allows imaging of biological samples at high spatio-temporal resolution. Standard SPIM devices require dedicated set-ups, complex sample preparation and accurate system alignment, thus limiting the automation of the technique, its accessibility and throughput. We present a millimeter-scaled optofluidic device that incorporates selective plane illumination and fully automatic sample delivery and scanning. To this end an integrated cylindrical lens and a three-dimensional fluidic network were fabricated by femtosecond laser micromachining into a single glass chip. This device can upgrade any standard fluorescence microscope to a SPIM system. We used SPIM on a CHIP to automatically scan biological samples under a conventional microscope, without the need of any motorized stage: tissue spheroids expressing fluorescent proteins were flowed in the microchannel at constant speed and their sections were acquired while passing through the light sheet. We demonstrate high-throughput imaging of the entire sample volume (with a rate of 30 samples/min), segmentation and quantification in thick (100-300 μm diameter) cellular spheroids. This optofluidic device gives access to SPIM analyses to non-expert end-users, opening the way to automatic and fast screening of a high number of samples at subcellular resolution.

Thermographic measurements of high-speed metal cutting

Science.gov (United States)

Mueller, Bernhard; Renz, Ulrich

2002-03-01

Thermographic measurements of a high-speed cutting process have been performed with an infrared camera. To realize images without motion blur the integration times were reduced to a few microseconds. Since the high tool wear influences the measured temperatures a set-up has been realized which enables small cutting lengths. Only single images have been recorded because the process is too fast to acquire a sequence of images even with the frame rate of the very fast infrared camera which has been used. To expose the camera when the rotating tool is in the middle of the camera image an experimental set-up with a light barrier and a digital delay generator with a time resolution of 1 ns has been realized. This enables a very exact triggering of the camera at the desired position of the tool in the image. Since the cutting depth is between 0.1 and 0.2 mm a high spatial resolution was also necessary which was obtained by a special close-up lens allowing a resolution of app. 45 microns. The experimental set-up will be described and infrared images and evaluated temperatures of a titanium alloy and a carbon steel will be presented for cutting speeds up to 42 m/s.

Computational Model for Impact-Resisting Critical Thickness of High-Speed Machine Outer Protective Plate

Science.gov (United States)

Wu, Huaying; Wang, Li Zhong; Wang, Yantao; Yuan, Xiaolei

2018-05-01

The blade or surface grinding blade of the hypervelocity grinding wheel may be damaged due to too high rotation rate of the spindle of the machine and then fly out. Its speed as a projectile may severely endanger the field persons. Critical thickness model of the protective plate of the high-speed machine is studied in this paper. For easy analysis, the shapes of the possible impact objects flying from the high-speed machine are simplified as sharp-nose model, ball-nose model and flat-nose model. Whose front ending shape to represent point, line and surface contacting. Impact analysis based on J-C model is performed for the low-carbon steel plate with different thicknesses in this paper. One critical thickness computational model for the protective plate of high-speed machine is established according to the damage characteristics of the thin plate to get relation among plate thickness and mass, shape and size and impact speed of impact object. The air cannon is used for impact test. The model accuracy is validated. This model can guide identification of the thickness of single-layer outer protective plate of a high-speed machine.

On-Chip Method to Measure Mechanical Characteristics of a Single Cell by Using Moiré Fringe

Directory of Open Access Journals (Sweden)

Hirotaka Sugiura

2015-06-01

Full Text Available We propose a method to characterize the mechanical properties of cells using a robot-integrated microfluidic chip (robochip and microscopy. The microfluidic chip is designed to apply the specified deformations to a single detached cell using an on-chip actuator probe. The reaction force is simultaneously measured using an on-chip force sensor composed of a hollow folded beam and probe structure. In order to measure the cellular characteristics in further detail, a sub-pixel level of resolution of probe position is required. Therefore, we utilize the phase detection of moiré fringe. Using this method, the experimental resolution of the probe position reaches 42 nm. This is approximately ten times smaller than the optical wavelength, which is the limit of sharp imaging with a microscope. Calibration of the force sensor is also important in accurately measuring cellular reaction forces. We calibrated the spring constant from the frequency response, by the proposed sensing method of the probe position. As a representative of mechanical characteristics, we measured the elastic modulus of Madin-Darby Cannie Kidney (MDCK cells. In spite of the rigid spring constant, the resolution and sensitivity were twice that achieved in our previous study. Unique cellular characteristics can be elucidated by the improvements in sensing resolution and accuracy.

"Hook"-calibration of GeneChip-microarrays: Chip characteristics and expression measures

Directory of Open Access Journals (Sweden)

Krohn Knut

2008-08-01

Full Text Available Abstract Background Microarray experiments rely on several critical steps that may introduce biases and uncertainty in downstream analyses. These steps include mRNA sample extraction, amplification and labelling, hybridization, and scanning causing chip-specific systematic variations on the raw intensity level. Also the chosen array-type and the up-to-dateness of the genomic information probed on the chip affect the quality of the expression measures. In the accompanying publication we presented theory and algorithm of the so-called hook method which aims at correcting expression data for systematic biases using a series of new chip characteristics. Results In this publication we summarize the essential chip characteristics provided by this method, analyze special benchmark experiments to estimate transcript related expression measures and illustrate the potency of the method to detect and to quantify the quality of a particular hybridization. It is shown that our single-chip approach provides expression measures responding linearly on changes of the transcript concentration over three orders of magnitude. In addition, the method calculates a detection call judging the relation between the signal and the detection limit of the particular measurement. The performance of the method in the context of different chip generations and probe set assignments is illustrated. The hook method characterizes the RNA-quality in terms of the 3'/5'-amplification bias and the sample-specific calling rate. We show that the proper judgement of these effects requires the disentanglement of non-specific and specific hybridization which, otherwise, can lead to misinterpretations of expression changes. The consequences of modifying probe/target interactions by either changing the labelling protocol or by substituting RNA by DNA targets are demonstrated. Conclusion The single-chip based hook-method provides accurate expression estimates and chip-summary characteristics

WDM-Coherent OCDMA over one single device based on short chip Super Structured Fiber Bragg Gratings.

Science.gov (United States)

Amaya, Waldimar; Pastor, Daniel; Baños, Rocio; Garcia-Munoz, Victor

2011-11-21

We theoretically propose and demonstrate experimentally a Coherent Direct Sequence OCDMA en/decoder for multi-channel WDM operation based on a single device. It presents a broadband spectral envelope and a periodic spectral pattern that can be employed for en/decoding multiple sub-bands simultaneously. Multi-channel operation is verified experimentally by means of Multi-Band Super Structured Fiber Bragg Gratings with binary phase encoded chips fabricated with 1mm inter-chip separation that provides 4x100 GHz ITU sub-band separation at 1.25 Gbps. The WDM-OCDMA system verification was carried out employing simultaneous encoding of four adjacent sub-bands and two different OCDMA codes. © 2011 Optical Society of America

Novel High Pressure Pump-on-a-Chip Technology, Phase II

Data.gov (United States)

National Aeronautics and Space Administration — HJ Science & Technology, Inc. proposes to develop a novel high pressure "pump-on-a-chip" (HPPOC) technology capable of generating high pressure and flow rate on...

High-Resolution Digital-to-Time Converter Implemented in an FPGA Chip

Directory of Open Access Journals (Sweden)

Hai Wang

2017-01-01

Full Text Available This paper presents the design and implementation of a new digital-to-time converter (DTC. The obtained resolution is 1.02 ps, and the dynamic range is about 590 ns. The experimental results indicate that the measured differential nonlinearity (DNL and integral nonlinearity (INL are −0.17~+0.13 LSB and −0.35~+0.62 LSB, respectively. This DTC builds coarse and fine Vernier delay lines constructed by programmable delay lines (PDLs to ensure high performance delay. Benefited by the close-loop feedback mechanism of the PDLs’ control module, the presented DTC has excellent voltage and temperature stability. What is more, the proposed DTC can be implemented in a single field programmable gate array (FPGA chip.

High-Speed Photography

International Nuclear Information System (INIS)

Paisley, D.L.; Schelev, M.Y.

1998-01-01

The applications of high-speed photography to a diverse set of subjects including inertial confinement fusion, laser surgical procedures, communications, automotive airbags, lightning etc. are briefly discussed. (AIP) copyright 1998 Society of Photo-Optical Instrumentation Engineers

Study on the separation effect of high-speed ultrasonic vibration cutting.

Science.gov (United States)

Zhang, Xiangyu; Sui, He; Zhang, Deyuan; Jiang, Xinggang

2018-07-01

High-speed ultrasonic vibration cutting (HUVC) has been proven to be significantly effective when turning Ti-6Al-4V alloy in recent researches. Despite of breaking through the cutting speed restriction of the ultrasonic vibration cutting (UVC) method, HUVC can also achieve the reduction of cutting force and the improvements in surface quality and cutting efficiency in the high-speed machining field. These benefits all result from the separation effect that occurs during the HUVC process. Despite the fact that the influences of vibration and cutting parameters have been discussed in previous researches, the separation analysis of HUVC should be conducted in detail in real cutting situations, and the tool geometry parameters should also be considered. In this paper, three situations are investigated in details: (1) cutting without negative transient clearance angle and without tool wear, (2) cutting with negative transient clearance angle and without tool wear, and (3) cutting with tool wear. And then, complete separation state, partial separation state and continuous cutting state are deduced according to real cutting processes. All the analysis about the above situations demonstrate that the tool-workpiece separation will take place only if appropriate cutting parameters, vibration parameters, and tool geometry parameters are set up. The best separation effect was obtained with a low feedrate and a phase shift approaching 180 degrees. Moreover, flank face interference resulted from the negative transient clearance angle and tool wear contributes to an improved separation effect that makes the workpiece and tool separate even at zero phase shift. Finally, axial and radial transient cutting force are firstly obtained to verify the separation effect of HUVC, and the cutting chips are collected to weigh the influence of flank face interference. Copyright © 2018 Elsevier B.V. All rights reserved.

Time resolution performance studies of contemporary high speed photomultipliers

International Nuclear Information System (INIS)

Leskovar, B.; Lo, C.C.

1977-01-01

The time resolution capabilities of prototype microchannel plate and static crossed-field photomultipliers have been investigated. Measurements were made of electron transit time, rise time, time response, single photoelectron time spread and multiphotoelectron time spread for LEP HR350 proximity focused high gain curved microchannel plate and VPM-154A/1.6L static crossed-field photomultipliers. The experimental data have been compared with results obtained with conventionally designed RCS 8850 and C31024 high speed photomultipliers. Descriptions are given of both the measuring techniques and the measuring systems

End effect braking force reduction in high-speed single-sided linear induction machine

International Nuclear Information System (INIS)

Shiri, Abbas; Shoulaie, Abbas

2012-01-01

Highlights: ► A new analytical equation to model the end effect braking force of SLIM is derived. ► Equations for efficiency, power factor and output thrust are analytically derived. ► The effect of design variables on the performance of the motor is analyzed. ► An optimization method is employed to minimize the end effect braking force (EEBF). ► The results show that EEBF is minimized by appropriate selection of motor parameters. - Abstract: Linear induction motors have been widely employed in industry because of their simple structure and low construction cost. However, they suffer from low efficiency and power factor. In addition, existence of so called end effect influences their performance especially in high speeds. The end effect deteriorates the performance of the motor by producing braking force. So, in this paper, by using Duncan equivalent circuit model, a new analytical equation is proposed to model end effect braking force. Employing the proposed equation and considering all phenomena involved in the single-sided linear induction motor, a simple design procedure is presented and the effect of different design variables on the performance of the motor is analyzed. A multi-objective optimization method based on genetic algorithm is introduced to maximize efficiency and power factor, as well as to minimize the end effect braking force, simultaneously. Finally, to validate the optimization results, 2D finite element method is employed.

High Pressure Sensing and Dynamics Using High Speed Fiber Bragg Grating Interrogation Systems

Energy Technology Data Exchange (ETDEWEB)

Rodriguez, G. [LANL; Sandberg, R. L. [LANL; Lalone, B. M. [NSTec; Marshall, B. R. [NSTec; Grover, M. [NSTec; Stevens, G. D. [NSTec; Udd, E. [Columbia Gorge Research

2014-06-01

Fiber Bragg gratings (FBGs) are developing into useful sensing tools for measuring high pressure dynamics in extreme environments under shock loading conditions. Approaches using traditional diode array coupled FBG interrogation systems are often limited to readout speeds in the sub-MHz range. For shock wave physics, required detection speeds approaching 100 MHz are desired. We explore the use of two types of FBG sensing systems that are aimed at applying this technology as embedded high pressure probes for transient shock events. Both approaches measure time resolved spectral shifts in the return light from short (few mm long) uniform FBGs at 1550 nm. In the first approach, we use a fiber coupled spectrometer to demultiplex spectral channels into an array (up to 12) of single element InGaAs photoreceivers. By monitoring the detectors during a shock impact event with high speed recording, we are able to track the pressure induced spectral shifting in FBG down to a time resolution of 20 ns. In the second approach, developed at the Special Technologies Lab, a coherent mode-locked fiber laser is used to illuminate the FBG sensor. After the sensor, wavelength-to-time mapping is accomplished with a chromatic dispersive element, and entire spectra are sampled using a single detector at the modelocked laser repetition rate of 50 MHz. By sampling with a 12 GHz InGaAs detector, direct wavelength mapping in time is recorded, and the pressure induced FBG spectral shift is sampled at 50 MHz. Here, the sensing systems are used to monitor the spectral shifts of FBGs that are immersed into liquid water and shock compressed using explosives. In this configuration, the gratings survive to pressures approaching 50 kbar. We describe both approaches and present the measured spectral shifts from the shock experiments.

High pressure sensing and dynamics using high speed fiber Bragg grating interrogation systems

Science.gov (United States)

Rodriguez, G.; Sandberg, R. L.; Lalone, B. M.; Marshall, B. R.; Grover, M.; Stevens, G.; Udd, E.

2014-06-01

Fiber Bragg gratings (FBGs) are developing into useful sensing tools for measuring high pressure dynamics in extreme environments under shock loading conditions. Approaches using traditional diode array coupled FBG interrogation systems are often limited to readout speeds in the sub-MHz range. For shock wave physics, required detection speeds approaching 100 MHz are desired. We explore the use of two types of FBG sensing systems that are aimed at applying this technology as embedded high pressure probes for transient shock events. Both approaches measure time resolved spectral shifts in the return light from short (few mm long) uniform FBGs at 1550 nm. In the first approach, we use a fiber coupled spectrometer to demultiplex spectral channels into an array (up to 12) of single element InGaAs photoreceivers. By monitoring the detectors during a shock impact event with high speed recording, we are able to track the pressure induced spectral shifting in FBG down to a time resolution of 20 ns. In the second approach, developed at the Special Technologies Lab, a coherent mode-locked fiber laser is used to illuminate the FBG sensor. After the sensor, wavelength-to-time mapping is accomplished with a chromatic dispersive element, and entire spectra are sampled using a single detector at the modelocked laser repetition rate of 50 MHz. By sampling with a 12 GHz InGaAs detector, direct wavelength mapping in time is recorded, and the pressure induced FBG spectral shift is sampled at 50 MHz. Here, the sensing systems are used to monitor the spectral shifts of FBGs that are immersed into liquid water and shock compressed using explosives. In this configuration, the gratings survive to pressures approaching 50 kbar. We describe both approaches and present the measured spectral shifts from the shock experiments.

SEAL FOR HIGH SPEED CENTRIFUGE

Science.gov (United States)

Skarstrom, C.W.

1957-12-17

A seal is described for a high speed centrifuge wherein the centrifugal force of rotation acts on the gasket to form a tight seal. The cylindrical rotating bowl of the centrifuge contains a closure member resting on a shoulder in the bowl wall having a lower surface containing bands of gasket material, parallel and adjacent to the cylinder wall. As the centrifuge speed increases, centrifugal force acts on the bands of gasket material forcing them in to a sealing contact against the cylinder wall. This arrangememt forms a simple and effective seal for high speed centrifuges, replacing more costly methods such as welding a closure in place.

Freeze frame analysis on high speed cinematography of Nd/YAG laser explosions in ocular tissues.

Science.gov (United States)

Vernon, S A; Cheng, H

1986-01-01

High speed colour cinematography at 400 frames per second was used to photograph both single and train burst Nd/YAG laser applications in ox eyes at threshold energy levels. Measurements of the extent and speed of particle scatter and tissue distortion from the acoustic transient were made from a sequential freeze frame analysis of the films. Particles were observed to travel over 8 mm from the site of Nd/YAG application 20 milliseconds after a single pulse at initial speeds in excess of 20 km/h. The use of train bursts of pulses was seen to increase the number of particles scattered and project the wavefront of particles further from the point of laser application. Images PMID:3754458

Freeze frame analysis on high speed cinematography of Nd/YAG laser explosions in ocular tissues.

Science.gov (United States)

Vernon, S A; Cheng, H

1986-05-01

High speed colour cinematography at 400 frames per second was used to photograph both single and train burst Nd/YAG laser applications in ox eyes at threshold energy levels. Measurements of the extent and speed of particle scatter and tissue distortion from the acoustic transient were made from a sequential freeze frame analysis of the films. Particles were observed to travel over 8 mm from the site of Nd/YAG application 20 milliseconds after a single pulse at initial speeds in excess of 20 km/h. The use of train bursts of pulses was seen to increase the number of particles scattered and project the wavefront of particles further from the point of laser application.

Single-chip ring resonator-based 1 x 8 optical beam forming network in CMOS-compatible waveguide technology

NARCIS (Netherlands)

Zhuang, L.; Roeloffzen, C.G.H.; Heideman, Rene; Borreman, A.; Meijerink, Arjan; van Etten, Wim

2007-01-01

Optical ring resonators (ORRs) are good candidates to provide continuously tunable delay in optical beam forming networks (OBFNs) for phased array antenna systems. Delay and splitting/combining elements can be integrated on a single optical chip to form an OBFN. A state-of-the-art ring resonator-

High-Speed Data Recorder for Space, Geodesy, and Other High-Speed Recording Applications

Science.gov (United States)

Taveniku, Mikael

2013-01-01

A high-speed data recorder and replay equipment has been developed for reliable high-data-rate recording to disk media. It solves problems with slow or faulty disks, multiple disk insertions, high-altitude operation, reliable performance using COTS hardware, and long-term maintenance and upgrade path challenges. The current generation data recor - ders used within the VLBI community are aging, special-purpose machines that are both slow (do not meet today's requirements) and are very expensive to maintain and operate. Furthermore, they are not easily upgraded to take advantage of commercial technology development, and are not scalable to multiple 10s of Gbit/s data rates required by new applications. The innovation provides a softwaredefined, high-speed data recorder that is scalable with technology advances in the commercial space. It maximally utilizes current technologies without being locked to a particular hardware platform. The innovation also provides a cost-effective way of streaming large amounts of data from sensors to disk, enabling many applications to store raw sensor data and perform post and signal processing offline. This recording system will be applicable to many applications needing realworld, high-speed data collection, including electronic warfare, softwaredefined radar, signal history storage of multispectral sensors, development of autonomous vehicles, and more.

Slow drilling speeds for single-drill implant bed preparation. Experimental in vitro study.

Science.gov (United States)

Delgado-Ruiz, R A; Velasco Ortega, E; Romanos, G E; Gerhke, S; Newen, I; Calvo-Guirado, J L

2018-01-01

To evaluate the real-time bone temperature changes during the preparation of the implant bed with a single-drill protocol with different drill designs and different slow drilling speeds in artificial type IV bone. For this experimental in vitro study, 600 implant bed preparations were performed in 10 bovine bone disks using three test slow drilling speeds (50/150/300 rpm) and a control drilling speed (1200 rpm). The temperature at crestal and apical areas and time variations produced during drilling with three different drill designs with similar diameter and length but different geometry were recorded with real-life thermographic analysis. Statistical analysis was performed by two-way analysis of variance. Multiple comparisons of temperatures and time with the different drill designs and speeds were performed with the Tukey's test. T Max values for the control drilling speed with all the drill designs (D1 + 1200; D2 + 1200; D3 + 1200) were higher compared to those for the controls for 11 ± 1.32 °C (p drilling at 50 rpm resulted in the lowest temperature increment (22.11 ± 0.8 °C) compared to the other slow drilling speeds of 150 (24.752 ± 1.1 °C) and 300 rpm (25.977 ± 1.2 °C) (p drilling speeds compared to that for the control drilling speed. Slow drilling speeds required significantly more time to finish the preparation of the implant bed shown as follows: 50 rpm > 150 rpm > 300 rpm > control (p drill protocol with slow drilling speeds (50, 150, and 300 rpm) without irrigation in type IV bone increases the temperature at the coronal and apical levels but is below the critical threshold of 47 °C. The drill design in single-drill protocols using slow speeds (50, 150, and 300 rpm) does not have an influence on the thermal variations. The time to accomplish the implant bed preparation with a single-drill protocol in type IV bone is influenced by the drilling speed and not by the drill design. As the speed decreases, then

On-chip dual-comb source for spectroscopy.

Science.gov (United States)

Dutt, Avik; Joshi, Chaitanya; Ji, Xingchen; Cardenas, Jaime; Okawachi, Yoshitomo; Luke, Kevin; Gaeta, Alexander L; Lipson, Michal

2018-03-01

Dual-comb spectroscopy is a powerful technique for real-time, broadband optical sampling of molecular spectra, which requires no moving components. Recent developments with microresonator-based platforms have enabled frequency combs at the chip scale. However, the need to precisely match the resonance wavelengths of distinct high quality-factor microcavities has hindered the development of on-chip dual combs. We report the simultaneous generation of two microresonator combs on the same chip from a single laser, drastically reducing experimental complexity. We demonstrate broadband optical spectra spanning 51 THz and low-noise operation of both combs by deterministically tuning into soliton mode-locked states using integrated microheaters, resulting in narrow (lasers or microwave oscillators. We demonstrate high signal-to-noise ratio absorption spectroscopy spanning 170 nm using the dual-comb source over a 20-μs acquisition time. Our device paves the way for compact and robust spectrometers at nanosecond time scales enabled by large beat-note spacings (>1 GHz).

Nanoliter Centrifugal Liquid Dispenser Coupled with Superhydrophobic Microwell Array Chips for High-Throughput Cell Assays

Directory of Open Access Journals (Sweden)

Yuyi Wang

2018-06-01

Full Text Available Microfluidic systems have been regarded as a potential platform for high-throughput screening technology in drug discovery due to their low sample consumption, high integration, and easy operation. The handling of small-volume liquid is an essential operation in microfluidic systems, especially in investigating large-scale combination conditions. Here, we develop a nanoliter centrifugal liquid dispenser (NanoCLD coupled with superhydrophobic microwell array chips for high-throughput cell-based assays in the nanoliter scale. The NanoCLD consists of a plastic stock block with an array of drilled through holes, a reagent microwell array chip (reagent chip, and an alignment bottom assembled together in a fixture. A simple centrifugation at 800 rpm can dispense ~160 nL reagents into microwells in 5 min. The dispensed reagents are then delivered to cells by sandwiching the reagent chip upside down with another microwell array chip (cell chip on which cells are cultured. A gradient of doxorubicin is then dispensed to the cell chip using the NanoCLD for validating the feasibility of performing drug tests on our microchip platform. This novel nanoliter-volume liquid dispensing method is simple, easy to operate, and especially suitable for repeatedly dispensing many different reagents simultaneously to microwells.

The high speed civil transport and NASA's High Speed Research (HSR) program

Science.gov (United States)

Shaw, Robert J.

1994-01-01

Ongoing studies being conducted not only in this country but in Europe and Asia suggest that a second generation supersonic transport, or High-Speed Civil Transport (HSCT), could become an important part of the 21st century international air transportation system. However, major environmental compatibility and economic viability issues must be resolved if the HSCT is to become a reality. This talk will overview the NASA High-Speed Research (HSR) program which is aimed at providing the U.S. industry with a technology base to allow them to consider launching an HSCT program early in the next century. The talk will also discuss some of the comparable activities going on within Europe and Japan.

Embedded Processor Based Automatic Temperature Control of VLSI Chips

Directory of Open Access Journals (Sweden)

Narasimha Murthy Yayavaram

2009-01-01

Full Text Available This paper presents embedded processor based automatic temperature control of VLSI chips, using temperature sensor LM35 and ARM processor LPC2378. Due to the very high packing density, VLSI chips get heated very soon and if not cooled properly, the performance is very much affected. In the present work, the sensor which is kept very near proximity to the IC will sense the temperature and the speed of the fan arranged near to the IC is controlled based on the PWM signal generated by the ARM processor. A buzzer is also provided with the hardware, to indicate either the failure of the fan or overheating of the IC. The entire process is achieved by developing a suitable embedded C program.

High-speed digital imaging of cytosolic Ca2+ and contraction in single cardiomyocytes.

Science.gov (United States)

O'Rourke, B; Reibel, D K; Thomas, A P

1990-07-01

A charge-coupled device (CCD) camera, with the capacity for simultaneous spatially resolved photon counting and rapid frame transfer, was utilized for high-speed digital image collection from an inverted epifluorescence microscope. The unique properties of the CCD detector were applied to an analysis of cell shortening and the Ca2+ transient from fluorescence images of fura-2-loaded [corrected] cardiomyocytes. On electrical stimulation of the cell, a series of sequential subimages was collected and used to create images of Ca2+ within the cell during contraction. The high photosensitivity of the camera, combined with a detector-based frame storage technique, permitted collection of fluorescence images 10 ms apart. This rate of image collection was sufficient to resolve the rapid events of contraction, e.g., the upstroke of the Ca2+ transient (less than 40 ms) and the time to peak shortening (less than 80 ms). The technique was used to examine the effects of beta-adrenoceptor activation, fura-2 load, and stimulus frequency on cytosolic Ca2+ transients and contractions of single cardiomyocytes. beta-Adrenoceptor stimulation resulted in pronounced increases in peak Ca2+, maximal rates of rise and decay of Ca2+, extent of shortening, and maximal velocities of shortening and relaxation. Raising the intracellular load of fura-2 had little effect on the rising phase of Ca2+ or the extent of shortening but extended the duration of the Ca2+ transient and contraction. In related experiments utilizing differential-interference contrast microscopy, the same technique was applied to visualize sarcomere dynamics in contracting cells. This newly developed technique is a versatile tool for analyzing the Ca2+ transient and mechanical events in studies of excitation-contraction coupling in cardiomyocytes.

Using a High-Speed Camera to Measure the Speed of Sound

Science.gov (United States)

Hack, William Nathan; Baird, William H.

2012-01-01

The speed of sound is a physical property that can be measured easily in the lab. However, finding an inexpensive and intuitive way for students to determine this speed has been more involved. The introduction of affordable consumer-grade high-speed cameras (such as the Exilim EX-FC100) makes conceptually simple experiments feasible. Since the…

FISH & CHIPS: Four Electrode Conductivity / Salinity Sensor on a Silicon Multi-sensor chip for Fisheries Research

DEFF Research Database (Denmark)

Hyldgård, Anders; Olafsdottir, Iris; Olesen, M.

2005-01-01

The design and fabrication of a single chip silicon salinity, temperature, pressure and light multisensor is presented. The behavior 2- and 4-electrode conductivity microsensors are described and methods for precise determination of water conductivity are given......The design and fabrication of a single chip silicon salinity, temperature, pressure and light multisensor is presented. The behavior 2- and 4-electrode conductivity microsensors are described and methods for precise determination of water conductivity are given...

High-Speed On-Board Data Processing for Science Instruments

Science.gov (United States)

Beyon, Jeffrey Y.; Ng, Tak-Kwong; Lin, Bing; Hu, Yongxiang; Harrison, Wallace

2014-01-01

A new development of on-board data processing platform has been in progress at NASA Langley Research Center since April, 2012, and the overall review of such work is presented in this paper. The project is called High-Speed On-Board Data Processing for Science Instruments (HOPS) and focuses on a high-speed scalable data processing platform for three particular National Research Council's Decadal Survey missions such as Active Sensing of CO2 Emissions over Nights, Days, and Seasons (ASCENDS), Aerosol-Cloud-Ecosystems (ACE), and Doppler Aerosol Wind Lidar (DAWN) 3-D Winds. HOPS utilizes advanced general purpose computing with Field Programmable Gate Array (FPGA) based algorithm implementation techniques. The significance of HOPS is to enable high speed on-board data processing for current and future science missions with its reconfigurable and scalable data processing platform. A single HOPS processing board is expected to provide approximately 66 times faster data processing speed for ASCENDS, more than 70% reduction in both power and weight, and about two orders of cost reduction compared to the state-of-the-art (SOA) on-board data processing system. Such benchmark predictions are based on the data when HOPS was originally proposed in August, 2011. The details of these improvement measures are also presented. The two facets of HOPS development are identifying the most computationally intensive algorithm segments of each mission and implementing them in a FPGA-based data processing board. A general introduction of such facets is also the purpose of this paper.

A study of single multiplicative neuron model with nonlinear filters for hourly wind speed prediction

International Nuclear Information System (INIS)

Wu, Xuedong; Zhu, Zhiyu; Su, Xunliang; Fan, Shaosheng; Du, Zhaoping; Chang, Yanchao; Zeng, Qingjun

2015-01-01

Wind speed prediction is one important methods to guarantee the wind energy integrated into the whole power system smoothly. However, wind power has a non–schedulable nature due to the strong stochastic nature and dynamic uncertainty nature of wind speed. Therefore, wind speed prediction is an indispensable requirement for power system operators. Two new approaches for hourly wind speed prediction are developed in this study by integrating the single multiplicative neuron model and the iterated nonlinear filters for updating the wind speed sequence accurately. In the presented methods, a nonlinear state–space model is first formed based on the single multiplicative neuron model and then the iterated nonlinear filters are employed to perform dynamic state estimation on wind speed sequence with stochastic uncertainty. The suggested approaches are demonstrated using three cases wind speed data and are compared with autoregressive moving average, artificial neural network, kernel ridge regression based residual active learning and single multiplicative neuron model methods. Three types of prediction errors, mean absolute error improvement ratio and running time are employed for different models’ performance comparison. Comparison results from Tables 1–3 indicate that the presented strategies have much better performance for hourly wind speed prediction than other technologies. - Highlights: • Developed two novel hybrid modeling methods for hourly wind speed prediction. • Uncertainty and fluctuations of wind speed can be better explained by novel methods. • Proposed strategies have online adaptive learning ability. • Proposed approaches have shown better performance compared with existed approaches. • Comparison and analysis of two proposed novel models for three cases are provided

33 CFR 84.24 - High-speed craft.

Science.gov (United States)

2010-07-01

... 33 Navigation and Navigable Waters 1 2010-07-01 2010-07-01 false High-speed craft. 84.24 Section... RULES ANNEX I: POSITIONING AND TECHNICAL DETAILS OF LIGHTS AND SHAPES § 84.24 High-speed craft. (a) The masthead light of high-speed craft with a length to breadth ratio of less than 3.0 may be placed at a...

Modern trends in designing high-speed trains

Directory of Open Access Journals (Sweden)

Golubović Snežana D.

2015-01-01

Full Text Available Increased advantages of railway transportation systems over other types of transportation systems in the past sixty years have been a result of an intensive development of the new generations of high-speed trains. Not only do these types of trains comply with the need for increased speed of transportation and make the duration of the journey shorter, but they also meet the demands for increased reliability, safety and direct application of energy efficiency to the transportation system itself. Along with increased train speed, the motion resistance is increased as well, whereby at speeds over 200 km/h the proportion of air resistance becomes the most dominant member. One of the most efficient measures for reducing air resistance, as well as other negative consequences of high-speed motion, is the development of the aerodynamic shape of the train. This paper presents some construction solutions that affect the aerodynamic properties of high-speed trains, first and foremost, the nose shape, as well as the similarities and differences of individual subsystems necessary for the functioning of modern high-speed rail systems. We analysed two approaches to solving the problem of the aerodynamic shape of the train and the appropriate infrastructure using the examples of Japan and France. Two models of high-speed trains, Shinkansen (Japan and TGV, i.e. AGV (France, have been discussed.

High speed trains Velaro for Russia; Hochgeschwindigkeitszuege Velaro fuer Russland

Energy Technology Data Exchange (ETDEWEB)

Lipp, Andreas; John, David [Siemens AG, I MO TR HI RUS, Erlangen (Germany); Mangler, Ruediger [Siemens AG, I MO TR DH, Krefeld (Germany); Nazarov, Aleksander S. [OAO RZD, Moscow (Russian Federation). Dept. of Technical Policy; Nazarov, Oleg N. [VNIIZhT Moscow (Russian Federation); Shilkin, Vitali P. [OAO RZD, Moscow (Russian Federation)

2008-07-01

From December 2008 on, eight ten-piece high-speed trains from the Velaro family from Siemens will be delivered to Russia. The two electrical multiple unit versions - single and double system trains equipped with distributed traction - will be put into service on the existing Moscow - St. Petersburg and Moscow - Nizhni Novgorod lines. The technical design and the special features for deployment in Russia are described. (orig.)

Simple Exact Algorithm for Transistor Sizing of Low-Power High-Speed Arithmetic Circuits

Directory of Open Access Journals (Sweden)

Tooraj Nikoubin

2010-01-01

Full Text Available A new transistor sizing algorithm, SEA (Simple Exact Algorithm, for optimizing low-power and high-speed arithmetic integrated circuits is proposed. In comparison with other transistor sizing algorithms, simplicity, accuracy, independency of order and initial sizing factors of transistors, and flexibility in choosing the optimization parameters such as power consumption, delay, Power-Delay Product (PDP, chip area or the combination of them are considered as the advantages of this new algorithm. More exhaustive rules of grouping transistors are the main trait of our algorithm. Hence, the SEA algorithm dominates some major transistor sizing metrics such as optimization rate, simulation speed, and reliability. According to approximate comparison of the SEA algorithm with MDE and ADC for a number of conventional full adder circuits, delay and PDP have been improved 55.01% and 57.92% on an average, respectively. By comparing the SEA and Chang's algorithm, 25.64% improvement in PDP and 33.16% improvement in delay have been achieved. All the simulations have been performed with 0.13 m technology based on the BSIM3v3 model using HSpice simulator software.

High-speed stimulated Brillouin scattering spectroscopy at 780 nm

Directory of Open Access Journals (Sweden)

Itay Remer

2016-09-01

Full Text Available We demonstrate a high-speed stimulated Brillouin scattering (SBS spectroscopy system that is able to acquire stimulated Brillouin gain point-spectra in water samples and Intralipid tissue phantoms over 2 GHz within 10 ms and 100 ms, respectively, showing a 10-100 fold increase in acquisition rates over current frequency-domain SBS spectrometers. This improvement was accomplished by integrating an ultra-narrowband hot rubidium-85 vapor notch filter in a simplified frequency-domain SBS spectrometer comprising nearly counter-propagating continuous-wave pump-probe light at 780 nm and conventional single-modulation lock-in detection. The optical notch filter significantly suppressed stray pump light, enabling detection of stimulated Brillouin gain spectra with substantially improved acquisition times at adequate signal-to-noise ratios (∼25 dB in water samples and ∼15 dB in tissue phantoms. These results represent an important step towards the use of SBS spectroscopy for high-speed measurements of Brillouin gain resonances in scattering and non-scattering samples.

A single-walled carbon nanotube thin film-based pH-sensing microfluidic chip.

Science.gov (United States)

Li, Cheng Ai; Han, Kwi Nam; Pham, Xuan-Hung; Seong, Gi Hun

2014-04-21

A novel microfluidic pH-sensing chip was developed based on pH-sensitive single-walled carbon nanotubes (SWCNTs). In this study, the SWCNT thin film acted both as an electrode and a pH-sensitive membrane. The potentiometric pH response was observed by electronic structure changes in the semiconducting SWCNTs in response to the pH level. In a microfluidic chip consisting of a SWCNT pH-sensing working electrode and an Ag/AgCl reference electrode, the calibration plot exhibited promising pH-sensing performance with an ideal Nernstian response of 59.71 mV pH(-1) between pH 3 and 11 (standard deviation of the sensitivity is 1.5 mV pH(-1), R(2) = 0.985). Moreover, the SWCNT electrode in the microfluidic device showed no significant variation at any pH value in the range of the flow rate between 0.1 and 15 μl min(-1). The selectivity coefficients of the SWCNT electrode revealed good selectivity against common interfering ions.

Individualized Pixel Synthesis and Characterization of Combinatorial Materials Chips

Directory of Open Access Journals (Sweden)

Xiao-Dong Xiang

2015-06-01

Full Text Available Conventionally, an experimentally determined phase diagram requires studies of phase formation at a range of temperatures for each composition, which takes years of effort from multiple research groups. Combinatorial materials chip technology, featuring high-throughput synthesis and characterization, is able to determine the phase diagram of an entire composition spread of a binary or ternary system at a single temperature on one materials library, which, though significantly increasing efficiency, still requires many libraries processed at a series of temperatures in order to complete a phase diagram. In this paper, we propose a “one-chip method” to construct a complete phase diagram by individually synthesizing each pixel step by step with a progressive pulse of energy to heat at different temperatures while monitoring the phase evolution on the pixel in situ in real time. Repeating this process pixel by pixel throughout the whole chip allows the entire binary or ternary phase diagram to be mapped on one chip in a single experiment. The feasibility of this methodology is demonstrated in a study of a Ge-Sb-Te ternary alloy system, on which the amorphous-crystalline phase boundary is determined.

Changes of indicators of high-speed and high-speed and power preparedness at volleyball players of 12–13 years old

Directory of Open Access Journals (Sweden)

Oleg Shevchenko

2016-04-01

Full Text Available Purpose: to define changes of indicators of high-speed and high-speed and power preparedness of volleyball players of 12–13 years old. Material & Methods: the test exercises, which are recommended by the training program of CYSS on volleyball, were used for the definition of the level of development of high-speed and high-speed and power abilities of volleyball players. 25 young volleyball players from the group of the previous basic preparation took part in the experiment. Sports experience of sportsmen is 3–4 years. The analysis of scientifically-methodical literature, pedagogical testing, pedagogical experiment, methods of mathematical statistics were carried out. Results: the analyzed level of high-speed and high-speed and power abilities of volleyball players. Conclusions: the results had reliable changes (t=2,2–2,4 at р<0,05 of the level of high-speed and high-speed and power abilities of volleyball players of 12–13years old in the experimental group at the end of the experiment, except run on 30 m that demonstrates a positive influence of application of special exercises in the educational-training process.

Reducing Heating In High-Speed Cinematography

Science.gov (United States)

Slater, Howard A.

1989-01-01

Infrared-absorbing and infrared-reflecting glass filters simple and effective means for reducing rise in temperature during high-speed motion-picture photography. "Hot-mirror" and "cold-mirror" configurations, employed in projection of images, helps prevent excessive heating of scenes by powerful lamps used in high-speed photography.

High speed data acquisition

International Nuclear Information System (INIS)

Cooper, P.S.

1997-07-01

A general introduction to high speed data acquisition system techniques in modern particle physics experiments is given. Examples are drawn from the SELEX(E78 1) high statistics charmed baryon production and decay experiment now taking data at Fermilab

Ultra high tip speed (670.6 m/sec) fan stage with composite rotor: Aerodynamic and mechanical design

Science.gov (United States)

Halle, J. E.; Burger, G. D.; Dundas, R. E.

1977-01-01

A highly loaded, single-stage compressor having a tip speed of 670.6 m/sec was designed for the purpose of investigating very high tip speeds and high aerodynamic loadings to obtain high stage pressure ratios at acceptable levels of efficiency. The design pressure ratio is 2.8 at an adiabatic efficiency of 84.4%. Corrected design flow is 83.4 kg/sec; corrected design speed is 15,200 rpm; and rotor inlet tip diameter is 0.853 m. The rotor uses multiple-circular-arc airfoils from 0 to 15% span, precompression airfoils assuming single, strong oblique shocks from 21 to 43% span, and precompression airfoils assuming multiple oblique shocks from 52% span to the tip. Because of the high tip speeds, the rotor blades are designed to be fabricated of composite materials. Two composite materials were investigated: Courtaulds HTS graphite fiber in a Kerimid 601 polyimide matrix and the same fibers in a PMR polyimide matrix. In addition to providing a description of the aerodynamic and mechanical design of the 670.0 m/sec fan, discussion is presented of the results of structural tests of blades fabricated with both types of matrices.

Ceramic thermal wind sensor based on advanced direct chip attaching package

International Nuclear Information System (INIS)

Zhou Lin; Qin Ming; Chen Shengqi; Chen Bei

2014-01-01

An advanced direct chip attaching packaged two-dimensional ceramic thermal wind sensor is studied. The thermal wind sensor chip is fabricated by metal lift-off processes on the ceramic substrate. An advanced direct chip attaching (DCA) packaging is adopted and this new packaged method simplifies the processes of packaging further. Simulations of the advanced DCA packaged sensor based on computational fluid dynamics (CFD) model show the sensor can detect wind speed and direction effectively. The wind tunnel testing results show the advanced DCA packaged sensor can detect the wind direction from 0° to 360° and wind speed from 0 to 20 m/s with the error less than 0.5 m/s. The nonlinear fitting based least square method in Matlab is used to analyze the performance of the sensor. (semiconductor devices)

SPADAS: a high-speed 3D single-photon camera for advanced driver assistance systems

Science.gov (United States)

Bronzi, D.; Zou, Y.; Bellisai, S.; Villa, F.; Tisa, S.; Tosi, A.; Zappa, F.

2015-02-01

Advanced Driver Assistance Systems (ADAS) are the most advanced technologies to fight road accidents. Within ADAS, an important role is played by radar- and lidar-based sensors, which are mostly employed for collision avoidance and adaptive cruise control. Nonetheless, they have a narrow field-of-view and a limited ability to detect and differentiate objects. Standard camera-based technologies (e.g. stereovision) could balance these weaknesses, but they are currently not able to fulfill all automotive requirements (distance range, accuracy, acquisition speed, and frame-rate). To this purpose, we developed an automotive-oriented CMOS single-photon camera for optical 3D ranging based on indirect time-of-flight (iTOF) measurements. Imagers based on Single-photon avalanche diode (SPAD) arrays offer higher sensitivity with respect to CCD/CMOS rangefinders, have inherent better time resolution, higher accuracy and better linearity. Moreover, iTOF requires neither high bandwidth electronics nor short-pulsed lasers, hence allowing the development of cost-effective systems. The CMOS SPAD sensor is based on 64 × 32 pixels, each able to process both 2D intensity-data and 3D depth-ranging information, with background suppression. Pixel-level memories allow fully parallel imaging and prevents motion artefacts (skew, wobble, motion blur) and partial exposure effects, which otherwise would hinder the detection of fast moving objects. The camera is housed in an aluminum case supporting a 12 mm F/1.4 C-mount imaging lens, with a 40°×20° field-of-view. The whole system is very rugged and compact and a perfect solution for vehicle's cockpit, with dimensions of 80 mm × 45 mm × 70 mm, and less that 1 W consumption. To provide the required optical power (1.5 W, eye safe) and to allow fast (up to 25 MHz) modulation of the active illumination, we developed a modular laser source, based on five laser driver cards, with three 808 nm lasers each. We present the full characterization of

An Experiment Study on Surface Roughness in High Speed Milling NAK80 Die Steel

Directory of Open Access Journals (Sweden)

Su Fa

2016-01-01

Full Text Available The paper introduces that the high speed milling experiments on NAK80 die steel was carried out on the DMU 60 mono BLOCK five axis linkage high speed CNC machining center tool by the TiAlN coated tools, in order to research the effect of milling parameters on surface roughness Ra. The results showed that the Ra value increased with the decrease of milling speed vc, increased with the axial depth of milling ap, and feed per tooth fz and radial depth of milling ae. On the basis of the single factor experiment results, the mathematics model for between surface roughness and milling parameters were established by linear regression analysis.

Perspective: Fabrication of integrated organ-on-a-chip via bioprinting.

Science.gov (United States)

Yang, Qingzhen; Lian, Qin; Xu, Feng

2017-05-01

Organ-on-a-chip has emerged as a powerful platform with widespread applications in biomedical engineering, such as pathology studies and drug screening. However, the fabrication of organ-on-a-chip is still a challenging task due to its complexity. For an integrated organ-on-a-chip, it may contain four key elements, i.e., a microfluidic chip, live cells/microtissues that are cultured in this chip, components for stimulus loading to mature the microtissues, and sensors for results readout. Recently, bioprinting has been used for fabricating organ-on-a-chip as it enables the printing of multiple materials, including biocompatible materials and even live cells in a programmable manner with a high spatial resolution. Besides, all four elements for organ-on-a-chip could be printed in a single continuous procedure on one printer; in other words, the fabrication process is assembly free. In this paper, we discuss the recent advances of organ-on-a-chip fabrication by bioprinting. Light is shed on the printing strategies, materials, and biocompatibility. In addition, some specific bioprinted organs-on-chips are analyzed in detail. Because the bioprinted organ-on-a-chip is still in its early stage, significant efforts are still needed. Thus, the challenges presented together with possible solutions and future trends are also discussed.

Highly sensitive bacterial susceptibility test against penicillin using parylene-matrix chip.

Science.gov (United States)

Park, Jong-Min; Kim, Jo-Il; Song, Hyun-Woo; Noh, Joo-Yoon; Kang, Min-Jung; Pyun, Jae-Chul

2015-09-15

This work presented a highly sensitive bacterial antibiotic susceptibility test through β-lactamase assay using Parylene-matrix chip. β-lactamases (EC 3.5.2.6) are an important family of enzymes that confer resistance to β-lactam antibiotics by catalyzing the hydrolysis of these antibiotics. Here we present a highly sensitive assay to quantitate β-lactamase-mediated hydrolysis of penicillin into penicilloic acid. Typically, MALDI-TOF mass spectrometry has been used to quantitate low molecular weight analytes and to discriminate them from noise peaks of matrix fragments that occur at low m/z ratios (m/ztest was carried out using Parylene-matrix chip and MALDI-TOF mass spectrometry. The Parylene-matrix chip was successfully used to quantitate penicillin (m/z: [PEN+H](+)=335.1 and [PEN+Na](+)=357.8) and penicilloic acid (m/z: [PA+H](+)=353.1) in a β-lactamase assay with minimal interference of low molecular weight noise peaks. The β-lactamase assay was carried out with an antibiotic-resistant E. coli strain and an antibiotic-susceptible E. coli strain, revealing that the minimum number of E. coli cells required to screen for antibiotic resistance was 1000 cells for the MALDI-TOF mass spectrometry/Parylene-matrix chip assay. Copyright © 2015 Elsevier B.V. All rights reserved.

Wake flow characteristics at high wind speed

DEFF Research Database (Denmark)

Aagaard Madsen, Helge; Larsen, Torben J.; Larsen, Gunner Chr.

2016-01-01

Wake flow characteristic at high wind speeds is the main subject of this paper. Although the wake losses decrease at high wind speeds it has been found in a recent study that for multiple wake inflow the increase in loading due to wake effects are substantial even at wind speeds well above rated ...

From genes to protein mechanics on a chip.

Science.gov (United States)

Otten, Marcus; Ott, Wolfgang; Jobst, Markus A; Milles, Lukas F; Verdorfer, Tobias; Pippig, Diana A; Nash, Michael A; Gaub, Hermann E

2014-11-01

Single-molecule force spectroscopy enables mechanical testing of individual proteins, but low experimental throughput limits the ability to screen constructs in parallel. We describe a microfluidic platform for on-chip expression, covalent surface attachment and measurement of single-molecule protein mechanical properties. A dockerin tag on each protein molecule allowed us to perform thousands of pulling cycles using a single cohesin-modified cantilever. The ability to synthesize and mechanically probe protein libraries enables high-throughput mechanical phenotyping.

Neural chips, neural computers and application in high and superhigh energy physics experiments

International Nuclear Information System (INIS)

Nikityuk, N.M.; )

2001-01-01

Architecture peculiarity and characteristics of series of neural chips and neural computes used in scientific instruments are considered. Tendency of development and use of them in high energy and superhigh energy physics experiments are described. Comparative data which characterize the efficient use of neural chips for useful event selection, classification elementary particles, reconstruction of tracks of charged particles and for search of hypothesis Higgs particles are given. The characteristics of native neural chips and accelerated neural boards are considered [ru

Magnetically-focusing biochip structures for high-speed active biosensing with improved selectivity

Science.gov (United States)

Yoo, Haneul; Lee, Dong Jun; Kim, Daesan; Park, Juhun; Chen, Xing; Hong, Seunghun

2018-06-01

We report a magnetically-focusing biochip structure enabling a single layered magnetic trap-and-release cycle for biosensors with an improved detection speed and selectivity. Here, magnetic beads functionalized with specific receptor molecules were utilized to trap target molecules in a solution and transport actively to and away from the sensor surfaces to enhance the detection speed and reduce the non-specific bindings, respectively. Using our method, we demonstrated the high speed detection of IL-13 antigens with the improved detection speed by more than an order of magnitude. Furthermore, the release step in our method was found to reduce the non-specific bindings and improve the selectivity and sensitivity of biosensors. This method is a simple but powerful strategy and should open up various applications such as ultra-fast biosensors for point-of-care services.

14 CFR 25.253 - High-speed characteristics.

Science.gov (United States)

2010-01-01

... 14 Aeronautics and Space 1 2010-01-01 2010-01-01 false High-speed characteristics. 25.253 Section...-speed characteristics. (a) Speed increase and recovery characteristics. The following speed increase and recovery characteristics must be met: (1) Operating conditions and characteristics likely to cause...

Evaluation of single tracks of 17-4PH steel manufactured at different power densities and scanning speeds by selective laser melting

Directory of Open Access Journals (Sweden)

Makoana, N. W.

2016-11-01

Full Text Available In Selective Laser Melting, the initial units produced are single tracks that overlap to create a single layer; from the sequence of layers, a 3D object is manufactured. The properties of the parts produced by SLM depend heavily on the properties of each single track and each layer formed by these tracks. This study evaluates the effect of processing parameters on the geometrical characteristics of single tracks manufactured from 17-4PH stainless steel powder. A single-mode continuous-wave ytterbium fibre laser was used to manufacture single tracks at laser powers in the range of 100-300 W with a constant spot size of ∼80μm. The single tracks produced were subjected to standard metallographic preparation techniques for further analysis with an optical microscope. Deep molten pool shapes were observed at low scan speeds, while shallow molten pool shapes were observed at high scan speeds. At higher laser power densities, under-cutting and humping effects were also observed. The dimensions of single tracks processed without powder generally decrease with increasing scan speed at constant laser power. However, the geometrical features of the single tracks processed with powder revealed pronounced irregularities believed to be caused by non-homogeneity in the deposited powder layer.

On-chip manipulation of single microparticles, cells, and organisms using surface acoustic waves.

Science.gov (United States)

Ding, Xiaoyun; Lin, Sz-Chin Steven; Kiraly, Brian; Yue, Hongjun; Li, Sixing; Chiang, I-Kao; Shi, Jinjie; Benkovic, Stephen J; Huang, Tony Jun

2012-07-10

Techniques that can dexterously manipulate single particles, cells, and organisms are invaluable for many applications in biology, chemistry, engineering, and physics. Here, we demonstrate standing surface acoustic wave based "acoustic tweezers" that can trap and manipulate single microparticles, cells, and entire organisms (i.e., Caenorhabditis elegans) in a single-layer microfluidic chip. Our acoustic tweezers utilize the wide resonance band of chirped interdigital transducers to achieve real-time control of a standing surface acoustic wave field, which enables flexible manipulation of most known microparticles. The power density required by our acoustic device is significantly lower than its optical counterparts (10,000,000 times less than optical tweezers and 100 times less than optoelectronic tweezers), which renders the technique more biocompatible and amenable to miniaturization. Cell-viability tests were conducted to verify the tweezers' compatibility with biological objects. With its advantages in biocompatibility, miniaturization, and versatility, the acoustic tweezers presented here will become a powerful tool for many disciplines of science and engineering.

The SAHR Setup-Controlling Hopping Speed and Height Using a Single Actuator

Directory of Open Access Journals (Sweden)

N. Cherouvim

2008-01-01

Full Text Available In this paper we present and experimentally validate a control method for regulating both the forward speed and the apex height of a one-legged hopping robot, using only a single actuator. The control method is based on a dynamic model of the hopping robot and makes use of the dynamic coupling of the vertical and forward motions of the robot. The control is applied first to a simulated model of the robot and shown to track a desired forward robot speed and a desired apex height. Then the SAHR (single actuator hopping robot hardware is introduced and is used as an experimental platform with which to evaluate the performance of the control method. The control method is applied to the physical setup and is shown to lead to a stable hopping gait with a desired forward speed and apex height, despite the unmodelled disturbances met on the laboratory floor.

Chicago-St. Louis high speed rail plan

International Nuclear Information System (INIS)

Stead, M.E.

1994-01-01

The Illinois Department of Transportation (IDOT), in cooperation with Amtrak, undertook the Chicago-St. Louis High Speed Rail Financial and Implementation Plan study in order to develop a realistic and achievable blueprint for implementation of high speed rail in the Chicago-St. Louis corridor. This report presents a summary of the Price Waterhouse Project Team's analysis and the Financial and Implementation Plan for implementing high speed rail service in the Chicago-St. Louis corridor

Chicago-St. Louis high speed rail plan

Energy Technology Data Exchange (ETDEWEB)

Stead, M.E.

1994-12-31

The Illinois Department of Transportation (IDOT), in cooperation with Amtrak, undertook the Chicago-St. Louis High Speed Rail Financial and Implementation Plan study in order to develop a realistic and achievable blueprint for implementation of high speed rail in the Chicago-St. Louis corridor. This report presents a summary of the Price Waterhouse Project Team`s analysis and the Financial and Implementation Plan for implementing high speed rail service in the Chicago-St. Louis corridor.

Single-Trial Event-Related Potential Based Rapid Image Triage System

Directory of Open Access Journals (Sweden)

Ke Yu

2011-06-01

Full Text Available Searching for points of interest (POI in large-volume imagery is a challenging problem with few good solutions. In this work, a neural engineering approach called rapid image triage (RIT which could offer about a ten-fold speed up in POI searching is developed. It is essentially a cortically-coupled computer vision technique, whereby the user is presented bursts of images at a speed of 6–15 images per second and then neural signals called event-related potential (ERP is used as the ‘cue’ for user seeing images of high relevance likelihood. Compared to past efforts, the implemented system has several unique features: (1 it applies overlapping frames in image chip preparation, to ensure rapid image triage performance; (2 a novel common spatial-temporal pattern (CSTP algorithm that makes use of both spatial and temporal patterns of ERP topography is proposed for high-accuracy single-trial ERP detection; (3 a weighted version of probabilistic support-vector-machine (SVM is used to address the inherent unbalanced nature of single-trial ERP detection for RIT. High accuracy, fast learning, and real-time capability of the developed system shown on 20 subjects demonstrate the feasibility of a brainmachine integrated rapid image triage system for fast detection of POI from large-volume imagery.

Development of Neuromorphic Sift Operator with Application to High Speed Image Matching

Science.gov (United States)

Shankayi, M.; Saadatseresht, M.; Bitetto, M. A. V.

2015-12-01

There was always a speed/accuracy challenge in photogrammetric mapping process, including feature detection and matching. Most of the researches have improved algorithm's speed with simplifications or software modifications which increase the accuracy of the image matching process. This research tries to improve speed without enhancing the accuracy of the same algorithm using Neuromorphic techniques. In this research we have developed a general design of a Neuromorphic ASIC to handle algorithms such as SIFT. We also have investigated neural assignment in each step of the SIFT algorithm. With a rough estimation based on delay of the used elements including MAC and comparator, we have estimated the resulting chip's performance for 3 scenarios, Full HD movie (Videogrammetry), 24 MP (UAV photogrammetry), and 88 MP image sequence. Our estimations led to approximate 3000 fps for Full HD movie, 250 fps for 24 MP image sequence and 68 fps for 88MP Ultracam image sequence which can be a huge improvement for current photogrammetric processing systems. We also estimated the power consumption of less than10 watts which is not comparable to current workflows.

Lubrication and cooling for high speed gears

Science.gov (United States)

Townsend, D. P.

1985-01-01

The problems and failures occurring with the operation of high speed gears are discussed. The gearing losses associated with high speed gearing such as tooth mesh friction, bearing friction, churning, and windage are discussed with various ways shown to help reduce these losses and thereby improve efficiency. Several different methods of oil jet lubrication for high speed gearing are given such as into mesh, out of mesh, and radial jet lubrication. The experiments and analytical results for the various methods of oil jet lubrication are shown with the strengths and weaknesses of each method discussed. The analytical and experimental results of gear lubrication and cooling at various test conditions are presented. These results show the very definite need of improved methods of gear cooling at high speed and high load conditions.

Detecting a single molecule using a micropore-nanopore hybrid chip.

Science.gov (United States)

Liu, Lei; Zhu, Lizhong; Ni, Zhonghua; Chen, Yunfei

2013-11-21

Nanopore-based DNA sequencing and biomolecule sensing have attracted more and more attention. In this work, novel sensing devices were built on the basis of the chips containing nanopore arrays in polycarbonate (PC) membranes and micropores in Si3N4 films. Using the integrated chips, the transmembrane ionic current induced by biomolecule's translocation was recorded and analyzed, which suggested that the detected current did not change linearly as commonly expected with increasing biomolecule concentration. On the other hand, detailed translocation information (such as translocation gesture) was also extracted from the discrete current blockages in basic current curves. These results indicated that the nanofluidic device based on the chips integrated by micropores and nanopores possessed comparative potentials in biomolecule sensing.

The use of high-speed imaging in education

Science.gov (United States)

Kleine, H.; McNamara, G.; Rayner, J.

2017-02-01

Recent improvements in camera technology and the associated improved access to high-speed camera equipment have made it possible to use high-speed imaging not only in a research environment but also specifically for educational purposes. This includes high-speed sequences that are created both with and for a target audience of students in high schools and universities. The primary goal is to engage students in scientific exploration by providing them with a tool that allows them to see and measure otherwise inaccessible phenomena. High-speed imaging has the potential to stimulate students' curiosity as the results are often surprising or may contradict initial assumptions. "Live" demonstrations in class or student- run experiments are highly suitable to have a profound influence on student learning. Another aspect is the production of high-speed images for demonstration purposes. While some of the approaches known from the application of high speed imaging in a research environment can simply be transferred, additional techniques must often be developed to make the results more easily accessible for the targeted audience. This paper describes a range of student-centered activities that can be undertaken which demonstrate how student engagement and learning can be enhanced through the use of high speed imaging using readily available technologies.

High speed ultra-broadband amplitude modulators with ultrahigh extinction >65 dB.

Science.gov (United States)

Liu, S; Cai, H; DeRose, C T; Davids, P; Pomerene, A; Starbuck, A L; Trotter, D C; Camacho, R; Urayama, J; Lentine, A

2017-05-15

We experimentally demonstrate ultrahigh extinction ratio (>65 dB) amplitude modulators (AMs) that can be electrically tuned to operate across a broad spectral range of 160 nm from 1480 - 1640 nm and 95 nm from 1280 - 1375 nm. Our on-chip AMs employ one extra coupler compared with conventional Mach-Zehnder interferometers (MZI), thus form a cascaded MZI (CMZI) structure. Either directional or adiabatic couplers are used to compose the CMZI AMs and experimental comparisons are made between these two different structures. We investigate the performance of CMZI AMs under extreme conditions such as using 95:5 split ratio couplers and unbalanced waveguide losses. Electro-optic phase shifters are also integrated in the CMZI AMs for high-speed operation. Finally, we investigate the output optical phase when the amplitude is modulated, which provides us valuable information when both amplitude and phase are to be controlled. Our demonstration not only paves the road to applications such as quantum information processing that requires high extinction ratio AMs but also significantly alleviates the tight fabrication tolerance needed for large-scale integrated photonics.

A new intelligent curtain control system based on 51 single chip microcomputer

Science.gov (United States)

Sun, Tuan; Wang, Yanhua; Wu, Mengmeng

2017-04-01

This paper uses 51 (single chip microcomputer) SCM as the operation and data processing center. According to the change of sunshine intensity and ambient temperature, a new type of intelligent curtain control system is designed by adopting photosensitive element and temperature sensor. In addition, the design also has a manual control mode. In the rain, when the light intensity is weak, the open position of the curtain can be set by the user. The system can maximize the user to provide user-friendly operation and comfortable living environment. The system can be applied to home or office environment, with a wide range of applications and simple operation and so on.

Single-event transient imaging with an ultra-high-speed temporally compressive multi-aperture CMOS image sensor.

Science.gov (United States)

Mochizuki, Futa; Kagawa, Keiichiro; Okihara, Shin-ichiro; Seo, Min-Woong; Zhang, Bo; Takasawa, Taishi; Yasutomi, Keita; Kawahito, Shoji

2016-02-22

In the work described in this paper, an image reproduction scheme with an ultra-high-speed temporally compressive multi-aperture CMOS image sensor was demonstrated. The sensor captures an object by compressing a sequence of images with focal-plane temporally random-coded shutters, followed by reconstruction of time-resolved images. Because signals are modulated pixel-by-pixel during capturing, the maximum frame rate is defined only by the charge transfer speed and can thus be higher than those of conventional ultra-high-speed cameras. The frame rate and optical efficiency of the multi-aperture scheme are discussed. To demonstrate the proposed imaging method, a 5×3 multi-aperture image sensor was fabricated. The average rising and falling times of the shutters were 1.53 ns and 1.69 ns, respectively. The maximum skew among the shutters was 3 ns. The sensor observed plasma emission by compressing it to 15 frames, and a series of 32 images at 200 Mfps was reconstructed. In the experiment, by correcting disparities and considering temporal pixel responses, artifacts in the reconstructed images were reduced. An improvement in PSNR from 25.8 dB to 30.8 dB was confirmed in simulations.

High-speed elevators controlled by inverters

Energy Technology Data Exchange (ETDEWEB)

Sakai, Yoshio; Takahashi, Hideaki; Nakamura, Kiyoshi; Kinoshita, Hiroshi

1988-10-25

The super-high-speed elevator with superiority to 300m/min of speed, requires both the large capacity power and wide range speed controls. Therefore, in order to materialize the smooth and quiet operation characteristics, by applying the inverter control, the low torque ripple control in the low frequency range and high frequency large capacity inverting for lowering the motor in noise are necessary with their being assured of reliability. To satisfy the above necessary items, together with the development of a sine wave pulse width and frequency modulation (PWM/PFM) control system, to more precisely enable the sine wave electric current control, and 3kHz switching power converter, using a 800A power transistor module, a supervoltage control circuit under the extraordinary condition was designed. As a result of commercializing a 360m/min super-high speed inverter elevator, the power source unit, due to the effect of high power factor, could be reduced by 30% in capacity and also the higher harmonic wave including ratio could be considerably lowered to the inferiority to 5%. 2 references, 7 figures, 1 table.

A stable high-speed rotational transmission system based on nanotubes

International Nuclear Information System (INIS)

Cai, Kun; Yin, Hang; Wei, Ning; Chen, Zhen; Shi, Jiao

2015-01-01

A stable rotational transmission system is designed with a single-walled carbon nanotube (SWCNT)-based motor and double-walled carbon nanotubes (DWCNTs)-based bearing. The system response is investigated using molecular dynamics (MD) simulation. It is found that the rotating motor can actuate the rotation of the inner tube in bearing because of the attraction between the two adjacent coaxial ends of motor and rotor (the inner tube in bearing). To have a stable nanostructure, each carbon atom on the adjacent ends of motor and rotor is bonded with a hydrogen atom. To obtain a stable high-speed rotational transmission system, both an armchair and a zigzag model are used in MD simulation. In each model, the motor with different diameters and rotational speeds is employed to examine the rotational transmission of corresponding DWCNTs. It is demonstrated that the long range van der Waals interaction between the adjacent ends of motor and rotor leads to a stable configuration of the adjacent ends, and further leads to a stable rotation of rotor when driven by a high-speed motor. As compared with the armchair model, the rotor in the zigzag model could reach a stable rotation mode much easier

High - speed steel for precise cased tools

International Nuclear Information System (INIS)

Karwiarz, J.; Mazur, A.

2001-01-01

The test results of high-vanadium high - speed steel (SWV9) for precise casted tools are presented. The face -milling cutters of NFCa80A type have been tested in industrial operating conditions. An average life - time of SWV9 steel tools was 3-10 times longer compare to the conventional high - speed milling cutters. Metallography of SWB9 precise casted steel revealed beneficial for tool properties distribution of primary vanadium carbides in the steel matrix. Presented results should be a good argument for wide application of high - vanadium high - speed steel for precise casted tools. (author)

Single-photon manipulation in Nanophotonic Circuits

DEFF Research Database (Denmark)

Hansen, Sofie Lindskov

Quantum dots in photonic nanostructures has long been known to be a very powerful and versatile solid-state platform for conducting quantum optics experiments. The present PhD thesis describes experimental demonstrations of single-photon generation and subsequent manipulation all realized...... on a gallium arsenide platform. This platform offers near-unity coupling between embedded single-photon emitters and a photonic mode, as well as the ability to suppress decoherence mechanisms, making it highly suited for quantum information applications. In this thesis we show how a single-photon router can...... be realized on a chip with embedded quantum dots. This allows for on-chip generation and manipulation of single photons. The router consists of an on-chip interferometer where the phase difference between the arms of the interferometer is controlled electrically. The response time of the device...

Comparison of single-/few-/multi-mode 850 nm VCSELs for optical OFDM transmission.

Science.gov (United States)

Kao, Hsuan-Yun; Tsai, Cheng-Ting; Leong, Shan-Fong; Peng, Chun-Yen; Chi, Yu-Chieh; Huang, Jian Jang; Kuo, Hao-Chung; Shih, Tien-Tsorng; Jou, Jau-Ji; Cheng, Wood-Hi; Wu, Chao-Hsin; Lin, Gong-Ru

2017-07-10

For high-speed optical OFDM transmission applications, a comprehensive comparison of the homemade multi-/few-/single-transverse mode (MM/FM/SM) vertical cavity surface emitting laser (VCSEL) chips is performed. With microwave probe, the direct encoding of pre-leveled 16-QAM OFDM data and transmission over 100-m-long OM4 multi-mode-fiber (MMF) are demonstrated for intra-datacenter applications. The MM VCSEL chip with the largest emission aperture of 11 μm reveals the highest differential quantum efficiency which provides the highest optical power of 8.67 mW but exhibits the lowest encodable bandwidth of 21 GHz. In contrast, the SM VCSEL chip fabricated with the smallest emission aperture of only 3 μm provides the highest 3-dB encoding bandwidth up to 23 GHz at a cost of slight heat accumulation. After optimization, with the trade-off set between the receiving signal-to-noise ratio (SNR) and bandwidth, the FM VCSEL chip guarantees the highest optical OFDM transmission bit rate of 96 Gbit/s under back-to-back case with its strongest throughput. Among three VCSEL chips, the SM VCSEL chip with nearly modal-dispersion free feature is treated as the best candidate for carrying the pre-leveled 16-QAM OFDM data over 100-m OM4-MMF with same material structure but exhibits different oxide-layer confined gain cross-sections with one another at 80-Gbit/s with the smallest receiving power penalty of 1.77 dB.

Mechanisms and FEM Simulation of Chip Formation in Orthogonal Cutting In-Situ TiB₂/7050Al MMC.

Science.gov (United States)

Xiong, Yifeng; Wang, Wenhu; Jiang, Ruisong; Lin, Kunyang; Shao, Mingwei

2018-04-15

The in-situ TiB₂/7050Al composite is a new kind of Al-based metal matrix composite (MMC) with super properties, such as low density, improved strength, and wear resistance. This paper, for a deep insight into its cutting performance, involves a study of the chip formation process and finite element simulation during orthogonal cutting in-situ TiB₂/7050Al MMC. With chips, material properties, cutting forces, and tool geometry parameters, the Johnson-Cook (J-C) constitutive equation of in-situ TiB₂/7050Al composite was established. Then, the cutting simulation model was established by applying the Abaqus-Explicit method, and the serrated chip, shear plane, strain rate, and temperature were analyzed. The experimental and simulation results showed that the obtained material's constitutive equation was of high reliability, and the saw-tooth chips occurred commonly under either low or high cutting speed and small or large feed rate. From result analysis, it was found that the mechanisms of chip formation included plastic deformation, adiabatic shear, shearing slip, and crack extension. In addition, it was found that the existence of small, hard particles reduced the ductility of the MMC and resulted in segmental chips.

Silicon carbide transparent chips for compact atomic sensors

Science.gov (United States)

Huet, L.; Ammar, M.; Morvan, E.; Sarazin, N.; Pocholle, J.-P.; Reichel, J.; Guerlin, C.; Schwartz, S.

2017-11-01

Atom chips [1] are an efficient tool for trapping, cooling and manipulating cold atoms, which could open the way to a new generation of compact atomic sensors addressing space applications. This is in particular due to the fact that they can achieve strong magnetic field gradients near the chip surface, hence strong atomic confinement at moderate electrical power. However, this advantage usually comes at the price of reducing the optical access to the atoms, which are confined very close to the chip surface. We will report at the conference experimental investigations showing how these limits could be pushed farther by using an atom chip made of a gold microcircuit deposited on a single-crystal Silicon Carbide (SiC) substrate [2]. With a band gap energy value of about 3.2 eV at room temperature, the latter material is transparent at 780nm, potentially restoring quasi full optical access to the atoms. Moreover, it combines a very high electrical resistivity with a very high thermal conductivity, making it a good candidate for supporting wires with large currents without the need of any additional electrical insulation layer [3].

High speed global shutter image sensors for professional applications

Science.gov (United States)

Wu, Xu; Meynants, Guy

2015-04-01

Global shutter imagers expand the use to miscellaneous applications, such as machine vision, 3D imaging, medical imaging, space etc. to eliminate motion artifacts in rolling shutter imagers. A low noise global shutter pixel requires more than one non-light sensitive memory to reduce the read noise. But larger memory area reduces the fill-factor of the pixels. Modern micro-lenses technology can compensate this fill-factor loss. Backside illumination (BSI) is another popular technique to improve the pixel fill-factor. But some pixel architecture may not reach sufficient shutter efficiency with backside illumination. Non-light sensitive memory elements make the fabrication with BSI possible. Machine vision like fast inspection system, medical imaging like 3D medical or scientific applications always ask for high frame rate global shutter image sensors. Thanks to the CMOS technology, fast Analog-to-digital converters (ADCs) can be integrated on chip. Dual correlated double sampling (CDS) on chip ADC with high interface digital data rate reduces the read noise and makes more on-chip operation control. As a result, a global shutter imager with digital interface is a very popular solution for applications with high performance and high frame rate requirements. In this paper we will review the global shutter architectures developed in CMOSIS, discuss their optimization process and compare their performances after fabrication.

Investigation of Inner Loop Flight Control Strategies for High-Speed Research

Science.gov (United States)

Newman, Brett; Kassem, Ayman

1999-01-01

This report describes the activities and findings conducted under contract NAS1-19858 with NASA Langley Research Center. Subject matter is the investigation of suitable flight control design methodologies and solutions for large, flexible high-speed vehicles. Specifically, methodologies are to address the inner control loops used for stabilization and augmentation of a highly coupled airframe system possibly involving rigid-body motion, structural vibrations, unsteady aerodynamics, and actuator dynamics. Techniques considered in this body of work are primarily conventional-based, and the vehicle of interest is the High-Speed Civil Transport (HSCT). Major findings include 1) current aeroelastic vehicle modeling procedures require further emphasis and refinement, 2) traditional and nontraditional inner loop flight control strategies employing a single feedback loop do not appear sufficient for highly flexible HSCT class vehicles, 3) inner loop flight control systems will, in all likelihood, require multiple interacting feedback loops, and 4) Ref. H HSCT configuration presents major challenges to designing acceptable closed-loop flight dynamics.

A high frequency test bench for rapid single-flux-quantum circuits

International Nuclear Information System (INIS)

Engseth, H; Intiso, S; Rafique, M R; Tolkacheva, E; Kidiyarova-Shevchenko, A

2006-01-01

We have designed and experimentally verified a test bench for high frequency testing of rapid single-flux-quantum (RSFQ) circuits. This test bench uses an external tunable clock signal that is stable in amplitude, phase and frequency. The high frequency external clock reads out the clock pattern stored in a long shift register. The clock pattern is consequently shifted out at high speed and split to feed both the circuit under test and an additional shift register in the test bench for later verification at low speed. This method can be employed for reliable high speed verification of RSFQ circuit operation, with use of only low speed read-out electronics. The test bench consists of 158 Josephson junctions and the occupied area is 3300 x 660 μm 2 . It was experimentally verified up to 33 GHz with ± 21.7% margins on the global bias supply current

Modeling And Simulation Of Highly Advanced Multilevel Inverter For Speed Control Of Induction Motor

Directory of Open Access Journals (Sweden)

Ravi Raj

2017-02-01

Full Text Available In this Paper the problem of removing Power dissipation from single phase Induction Motor with DC sources is considered by the speed control of Induction Motor with highly advanced 9-Level multi-level Inverter which having approximate zero Harmonics. As the demand of power is increasing day by day. So that we must introduced very advanced Electrical Instruments which having high efficiency and less dissipation of power. The requirement of very advanced Inverter is necessary. Here we are designing a Multi-level Inverter up to the 9-level using IGBT Insulated-gate bipolar transistor by Mat lab which having negligible total harmonic distortion THD thats why it will control the speed of single phase Induction motor which is presently widely used in our daily needs. Also several informative Simulation results verify the authority and truthiness of the proposed Model.

Design and FPGA-implementation of multilayer neural networks with on-chip learning

International Nuclear Information System (INIS)

Haggag, S.S.M.Y

2008-01-01

Artificial Neural Networks (ANN) is used in many applications in the industry because of their parallel structure, high speed, and their ability to give easy solution to complicated problems. For example identifying the orange and apple in the sorting machine with neural network is easier than using image processing techniques to do the same thing. There are different software for designing, training, and testing the ANN, but in order to use the ANN in the industry, it should be implemented on hardware outside the computer. Neural networks are artificial systems inspired on the brain's cognitive behavior, which can learn tasks with some degree of complexity, such as signal processing, diagnosis, robotics, image processing, and pattern recognition. Many applications demand a high computing power and the traditional software implementation are not sufficient.This thesis presents design and FPGA implementation of Multilayer Neural Networks with On-chip learning in re-configurable hardware. Hardware implementation of neural network algorithm is very interesting due their high performance and they can easily be made parallel. The architecture proposed herein takes advantage of distinct data paths for the forward and backward propagation stages and a pipelined adaptation of the on- line backpropagation algorithm to significantly improve the performance of the learning phase. The architecture is easily scalable and able to cope with arbitrary network sizes with the same hardware. The implementation is targeted diagnosis of the Research Reactor accidents to avoid the risk of occurrence of a nuclear accident. The proposed designed circuits are implemented using Xilinx FPGA Chip XC40150xv and occupied 73% of Chip CLBs. It achieved 10.8 μs to take decision in the forward propagation compared with current software implemented of RPS which take 24 ms. The results show that the proposed architecture leads to significant speed up comparing to high end software solutions. On-chip

High-speed ground transportation development outside United States

Energy Technology Data Exchange (ETDEWEB)

Eastham, T.R. [Queen`s Univ., Kingston, Ontario (United Kingdom)

1995-09-01

This paper surveys the state of high-speed (in excess of 200 km/h) ground-transportation developments outside the United States. Both high-speed rail and Maglev systems are covered. Many vehicle systems capable of providing intercity service in the speed range 200--500 km/h are or will soon be available. The current state of various technologies, their implementation, and the near-term plans of countries that are most active in high-speed ground transportation development are reported.

Aerodynamic design on high-speed trains

Science.gov (United States)

Ding, San-San; Li, Qiang; Tian, Ai-Qin; Du, Jian; Liu, Jia-Li

2016-04-01

Compared with the traditional train, the operational speed of the high-speed train has largely improved, and the dynamic environment of the train has changed from one of mechanical domination to one of aerodynamic domination. The aerodynamic problem has become the key technological challenge of high-speed trains and significantly affects the economy, environment, safety, and comfort. In this paper, the relationships among the aerodynamic design principle, aerodynamic performance indexes, and design variables are first studied, and the research methods of train aerodynamics are proposed, including numerical simulation, a reduced-scale test, and a full-scale test. Technological schemes of train aerodynamics involve the optimization design of the streamlined head and the smooth design of the body surface. Optimization design of the streamlined head includes conception design, project design, numerical simulation, and a reduced-scale test. Smooth design of the body surface is mainly used for the key parts, such as electric-current collecting system, wheel truck compartment, and windshield. The aerodynamic design method established in this paper has been successfully applied to various high-speed trains (CRH380A, CRH380AM, CRH6, CRH2G, and the Standard electric multiple unit (EMU)) that have met expected design objectives. The research results can provide an effective guideline for the aerodynamic design of high-speed trains.

NanoTopoChip: High-throughput nanotopographical cell instruction.

Science.gov (United States)

Hulshof, Frits F B; Zhao, Yiping; Vasilevich, Aliaksei; Beijer, Nick R M; de Boer, Meint; Papenburg, Bernke J; van Blitterswijk, Clemens; Stamatialis, Dimitrios; de Boer, Jan

2017-10-15

Surface topography is able to influence cell phenotype in numerous ways and offers opportunities to manipulate cells and tissues. In this work, we develop the Nano-TopoChip and study the cell instructive effects of nanoscale topographies. A combination of deep UV projection lithography and conventional lithography was used to fabricate a library of more than 1200 different defined nanotopographies. To illustrate the cell instructive effects of nanotopography, actin-RFP labeled U2OS osteosarcoma cells were cultured and imaged on the Nano-TopoChip. Automated image analysis shows that of many cell morphological parameters, cell spreading, cell orientation and actin morphology are mostly affected by the nanotopographies. Additionally, by using modeling, the changes of cell morphological parameters could by predicted by several feature shape parameters such as lateral size and spacing. This work overcomes the technological challenges of fabricating high quality defined nanoscale features on unprecedented large surface areas of a material relevant for tissue culture such as PS and the screening system is able to infer nanotopography - cell morphological parameter relationships. Our screening platform provides opportunities to identify and study the effect of nanotopography with beneficial properties for the culture of various cell types. The nanotopography of biomaterial surfaces can be modified to influence adhering cells with the aim to improve the performance of medical implants and tissue culture substrates. However, the necessary knowledge of the underlying mechanisms remains incomplete. One reason for this is the limited availability of high-resolution nanotopographies on relevant biomaterials, suitable to conduct systematic biological studies. The present study shows the fabrication of a library of nano-sized surface topographies with high fidelity. The potential of this library, called the 'NanoTopoChip' is shown in a proof of principle HTS study which

High-speed double-disc TMP [thermomechanical pulp] from northern and southern softwoods: One or two refining stages

Energy Technology Data Exchange (ETDEWEB)

Sabourin, M.J. (Andritz Sprout-Bauer, Inc., Springfield, OH (United States)); Cort, J.B.; Musselman, R.L. (Andritz Sprout-Bauer, Inc., Muncy, PA (United States))

1994-01-01

Pilot-plant studies were carried out to evaluate one- and two-stage high-speed refining processes for production of thermomechanical pulp (TMP) at minimal energy consumption. Both northern (black spruce/balsam fir) and southern (lobolly pine) wood species were tested. Preliminary results indicate both one- and two-stage high-speed refining are suitable for the production of TMP from spruce and fir. Single-stage, high-speed refining of spruce/fir resulted in over 25% energy savings compared to conventional TMP production. The resulting TMP had improved optical and shive content properties, with slightly reduced pulp strength and long fiber content. Two stages of refining were necessary to optimize pulp quality from the lobolly pine furnish. A 15% energy reduction was obtained when comparing high-speed and conventional TMP pulping of lobolly pine at similar operating conditions. The high-speed pine TMP had comparable bonding strength, shive content, and lower tear than conventional two-stage lobolly pine TMP. 14 refs., 11 figs., 6 tabs.

High Voltage Dielectrophoretic and Magnetophoretic Hybrid Integrated Circuit / Microfluidic Chip

Science.gov (United States)

Issadore, David; Franke, Thomas; Brown, Keith A.; Hunt, Thomas P.; Westervelt, Robert M.

2010-01-01

A hybrid integrated circuit (IC) / microfluidic chip is presented that independently and simultaneously traps and moves microscopic objects suspended in fluid using both electric and magnetic fields. This hybrid chip controls the location of dielectric objects, such as living cells and drops of fluid, on a 60 × 61 array of pixels that are 30 × 38 μm2 in size, each of which can be individually addressed with a 50 V peak-to-peak, DC to 10 MHz radio frequency voltage. These high voltage pixels produce electric fields above the chip’s surface with a magnitude , resulting in strong dielectrophoresis (DEP) forces . Underneath the array of DEP pixels there is a magnetic matrix that consists of two perpendicular sets of 60 metal wires running across the chip. Each wire can be sourced with 120 mA to trap and move magnetically susceptible objects using magnetophoresis (MP). The DEP pixel array and magnetic matrix can be used simultaneously to apply forces to microscopic objects, such as living cells or lipid vesicles, that are tagged with magnetic nanoparticles. The capabilities of the hybrid IC / microfluidic chip demonstrated in this paper provide important building blocks for a platform for biological and chemical applications. PMID:20625468

Application of drive circuit based on L298N in direct current motor speed control system

Science.gov (United States)

Yin, Liuliu; Wang, Fang; Han, Sen; Li, Yuchen; Sun, Hao; Lu, Qingjie; Yang, Cheng; Wang, Quanzhao

2016-10-01

In the experiment of researching the nanometer laser interferometer, our design of laser interferometer circuit system is up to the wireless communication technique of the 802.15.4 IEEE standard, and we use the RF TI provided by Basic to receive the data on speed control system software. The system's hardware is connected with control module and the DC motor. However, in the experiment, we found that single chip microcomputer control module is very difficult to drive the DC motor directly. The reason is that the DC motor's starting and braking current is larger than the causing current of the single chip microcomputer control module. In order to solve this problem, we add a driving module that control board can transmit PWM wave signal through I/O port to drive the DC motor, the driving circuit board can come true the function of the DC motor's positive and reversal rotation and speed adjustment. In many various driving module, the L298N module's integrated level is higher compared with other driver module. The L298N model is easy to control, it not only can control the DC motor, but also achieve motor speed control by modulating PWM wave that the control panel output. It also has the over-current protection function, when the motor lock, the L298N model can protect circuit and motor. So we use the driver module based on L298N to drive the DC motor. It is concluded that the L298N driver circuit module plays a very important role in the process of driving the DC motor in the DC motor speed control system.

Pulsed laser triggered high speed microfluidic fluorescence activated cell sorter†‡

Science.gov (United States)

Wu, Ting-Hsiang; Chen, Yue; Park, Sung-Yong; Hong, Jason; Teslaa, Tara; Zhong, Jiang F.; Di Carlo, Dino; Teitell, Michael A.

2014-01-01

We report a high speed and high purity pulsed laser triggered fluorescence activated cell sorter (PLACS) with a sorting throughput up to 20 000 mammalian cells s−1 with 37% sorting purity, 90% cell viability in enrichment mode, and >90% purity in high purity mode at 1500 cells s−1 or 3000 beads s−1. Fast switching (30 μs) and a small perturbation volume (~90 pL) is achieved by a unique sorting mechanism in which explosive vapor bubbles are generated using focused laser pulses in a single layer microfluidic PDMS channel. PMID:22361780

Fluxless flip-chip bonding using a lead-free solder bumping technique

Science.gov (United States)

Hansen, K.; Kousar, S.; Pitzl, D.; Arab, S.

2017-09-01

With the LHC exceeding the nominal instantaneous luminosity, the current barrel pixel detector (BPIX) of the CMS experiment at CERN will reach its performance limits and undergo significant radiation damage. In order to improve detector performance in high luminosity conditions, the entire BPIX is replaced with an upgraded version containing an additional detection layer. Half of the modules comprising this additional layer are produced at DESY using fluxless and lead-free bumping and bonding techniques. Sequential solder-jetting technique is utilized to wet 40-μm SAC305 solder spheres on the silicon-sensor pads with electroless Ni, Pd and immersion Au (ENEPIG) under-bump metallization (UBM). The bumped sensors are flip-chip assembled with readout chips (ROCs) and then reflowed using a flux-less bonding facility. The challenges for jetting low solder volume have been analyzed and will be presented in this paper. An average speed of 3.4 balls per second is obtained to jet about 67 thousand solder balls on a single chip. On average, 7 modules have been produced per week. The bump-bond quality is evaluated in terms of electrical and mechanical properties. The peak-bump resistance is about 17.5 mΩ. The cross-section study revealed different types of intermetallic compounds (IMC) as a result of interfacial reactions between UBM and solder material. The effect of crystalline phases on the mechanical properties of the joint is discussed. The mean shear strength per bump after the final module reflow is about 16 cN. The results and sources of yield loss of module production are reported. The achieved yield is 95%.

Analytical thermal modelling of multilayered active embedded chips into high density electronic board

Directory of Open Access Journals (Sweden)

Monier-Vinard Eric

2013-01-01

Full Text Available The recent Printed Wiring Board embedding technology is an attractive packaging alternative that allows a very high degree of miniaturization by stacking multiple layers of embedded chips. This disruptive technology will further increase the thermal management challenges by concentrating heat dissipation at the heart of the organic substrate structure. In order to allow the electronic designer to early analyze the limits of the power dissipation, depending on the embedded chip location inside the board, as well as the thermal interactions with other buried chips or surface mounted electronic components, an analytical thermal modelling approach was established. The presented work describes the comparison of the analytical model results with the numerical models of various embedded chips configurations. The thermal behaviour predictions of the analytical model, found to be within ±10% of relative error, demonstrate its relevance for modelling high density electronic board. Besides the approach promotes a practical solution to study the potential gain to conduct a part of heat flow from the components towards a set of localized cooled board pads.

An Automatic Baseline Regulation in a Highly Integrated Receiver Chip for JUNO

Science.gov (United States)

Muralidharan, P.; Zambanini, A.; Karagounis, M.; Grewing, C.; Liebau, D.; Nielinger, D.; Robens, M.; Kruth, A.; Peters, C.; Parkalian, N.; Yegin, U.; van Waasen, S.

2017-09-01

This paper describes the data processing unit and an automatic baseline regulation of a highly integrated readout chip (Vulcan) for JUNO. The chip collects data continuously at 1 Gsamples/sec. The Primary data processing which is performed in the integrated circuit can aid to reduce the memory and data processing efforts in the subsequent stages. In addition, a baseline regulator compensating a shift in the baseline is described.

Development of a synchrotron timing system on a programmable chip

International Nuclear Information System (INIS)

Lin Feiyu; Qiao Weimin; Wang Yanyu; Guo Yuhui

2009-01-01

A synchrotron requires extremely high time constraints for timing signals, so timing system is very important for a synchrotron control system. A FPGA+ARM+Linux+DSP architecture has been mainly used in timing control of the HIRFL-CSR control system. In this paper, we report the development of the SOPC(System On a Programmable Chip) based on FPGA and uClinux.It can integrate all the functions of ARM+Linux in one single FPGA chip, hence no need of the dedicated ARM chip, and the reduced cost. The maximum operation frequency of this system is 185 MHz. The hardware consumes less than 4% of total resources of FPGA chip. And both the hardware system and the operating system of the SOPC are reconfigurable. The SOPC system has a wide prospect of applications in accelerator engineering and many fields of scientific research. (authors)

High-speed imaging at high x-ray energy: CdTe sensors coupled to charge-integrating pixel array detectors

Energy Technology Data Exchange (ETDEWEB)

Becker, Julian; Tate, Mark W.; Shanks, Katherine S.; Philipp, Hugh T.; Weiss, Joel T.; Purohit, Prafull [Laboratory of Atomic and Solid State Physics, Cornell University, Ithaca, NY 14853 (United States); Chamberlain, Darol [Cornell High Energy Synchrotron Source (CHESS), Cornell University, Ithaca, NY 14853 (United States); Gruner, Sol M., E-mail: smg26@cornell.edu [Laboratory of Atomic and Solid State Physics, Cornell University, Ithaca, NY 14853 (United States); Cornell High Energy Synchrotron Source (CHESS), Cornell University, Ithaca, NY 14853 (United States)

2016-07-27

Pixel Array Detectors (PADs) consist of an x-ray sensor layer bonded pixel-by-pixel to an underlying readout chip. This approach allows both the sensor and the custom pixel electronics to be tailored independently to best match the x-ray imaging requirements. Here we describe the hybridization of CdTe sensors to two different charge-integrating readout chips, the Keck PAD and the Mixed-Mode PAD (MM-PAD), both developed previously in our laboratory. The charge-integrating architecture of each of these PADs extends the instantaneous counting rate by many orders of magnitude beyond that obtainable with photon counting architectures. The Keck PAD chip consists of rapid, 8-frame, in-pixel storage elements with framing periods <150 ns. The second detector, the MM-PAD, has an extended dynamic range by utilizing an in-pixel overflow counter coupled with charge removal circuitry activated at each overflow. This allows the recording of signals from the single-photon level to tens of millions of x-rays/pixel/frame while framing at 1 kHz. Both detector chips consist of a 128×128 pixel array with (150 µm){sup 2} pixels.

A Single Chip VLSI Implementation of a QPSK/SQPSK Demodulator for a VSAT Receiver Station

Science.gov (United States)

Kwatra, S. C.; King, Brent

1995-01-01

This thesis presents a VLSI implementation of a QPSK/SQPSK demodulator. It is designed to be employed in a VSAT earth station that utilizes the FDMA/TDM link. A single chip architecture is used to enable this chip to be easily employed in the VSAT system. This demodulator contains lowpass filters, integrate and dump units, unique word detectors, a timing recovery unit, a phase recovery unit and a down conversion unit. The design stages start with a functional representation of the system by using the C programming language. Then it progresses into a register based representation using the VHDL language. The layout components are designed based on these VHDL models and simulated. Component generators are developed for the adder, multiplier, read-only memory and serial access memory in order to shorten the design time. These sub-components are then block routed to form the main components of the system. The main components are block routed to form the final demodulator.

Silicon-Chip-Based Optical Frequency Combs

Science.gov (United States)

2015-10-26

fiber-based polarization controllers and a polarization beam splitter , and the output power is monitored with a sensitive photodiode. We use a...a single CW laser beam coupled to a microresonators can produce stabilized, octave-spanning combs through highly cascaded four-wave mixing (FWM...resonator designs , the resonator and the coupling waveguide are monolithically integrated. Thus, the entire on-chip configuration of CMOS-compatible

Single event upsets in semiconductor devices induced by highly ionising particles.

Science.gov (United States)

Sannikov, A V

2004-01-01

A new model of single event upsets (SEUs), created in memory cells by heavy ions and high energy hadrons, has been developed. The model takes into account the spatial distribution of charge collection efficiency over the cell area not considered in previous approaches. Three-dimensional calculations made by the HADRON code have shown good agreement with experimental data for the energy dependence of proton SEU cross sections, sensitive depths and other SEU observables. The model is promising for prediction of SEU rates for memory chips exposed in space and in high-energy experiments as well as for the development of a high-energy neutron dosemeter based on the SEU effect.

High-speed schlieren videography of vortex-ring impact on a wall

Science.gov (United States)

Kissner, Benjamin; Hargather, Michael; Settles, Gary

2011-11-01

Ring vortices of approximately 20 cm diameter are generated through the use of an Airzooka toy. To make the vortex visible, it is seeded with difluoroethane gas, producing a refractive-index difference with the air. A 1-meter-diameter, single-mirror, double-pass schlieren system is used to visualize the ring-vortex motion, and also to provide the wall with which the vortex collides. High-speed imaging is provided by a Photron SA-1 digital video camera. The Airzooka is fired toward the mirror almost along the optical axis of the schlieren system, so that the view of the vortex-mirror collision is normal to the path of vortex motion. Vortex-wall interactions similar to those first observed by Walker et al. (JFM 181, 1987) are recorded at high speed. The presentation will consist of a screening and discussion of these video results.

High Speed White Dwarf Asteroseismology with the Herty Hall Cluster

Science.gov (United States)

Gray, Aaron; Kim, A.

2012-01-01

Asteroseismology is the process of using observed oscillations of stars to infer their interior structure. In high speed asteroseismology, we complete that by quickly computing hundreds of thousands of models to match the observed period spectra. Each model on a single processor takes five to ten seconds to run. Therefore, we use a cluster of sixteen Dell Workstations with dual-core processors. The computers use the Ubuntu operating system and Apache Hadoop software to manage workloads.

Impulsive shock induced single drop steam explosion visualized by high-speed x-ray radiography and photography - metallic melt

International Nuclear Information System (INIS)

Park, H. S.; Hansson, R. C.; Sehgal, B. R.

2003-01-01

Experimental investigation of fine fragmentation process during vapor explosion was conducted in a small-scale single drop system employing continuous high-speed X-ray radiography and photography. A molten tin drop of about 0.7 g at approximately 1000 .deg. C was dropped into a water pool, at temperatures ranging from 20 to 90 .deg. C, and the explosion was triggered by an external shock pulse of about 1 MPa. X-ray radiographs show that finely fragmented melt particles accelerates to the vapor bubble boundary and forms a particle shell during the period of vapor bubble expansion due to vapor explosions. From the photographs, it was possible to observe a number of counter-jets on the vapor boundary. For tests with highly subcooled coolant, local explosion due to external impulsive shock trigger initiates the stratified mode of explosion along the entire melt surface. For tests with lower subcooled coolant local explosions were initiated by an external impulsive shock trigger and by collapse of vapor/gas pocket attached on the top of the melt drop. Transient spatial distribution map of melt fragments during vapor explosion was obtained by a series of image processing and calibration tests

Characterization of Ni/SnPb-TiW/Pt Flip Chip Interconnections in Silicon Pixel Detector Modules

CERN Document Server

Karadzhinova, Aneliya; Härkönen, Jaakko; Luukka, Panja-riina; Mäenpää, Teppo; Tuominen, Eija; Haeggstrom, Edward; Kalliopuska, Juha; Vahanen, Sami; Kassamakov, Ivan

2014-01-01

In contemporary high energy physics experiments, silicon detectors are essential for recording the trajectory of new particles generated by multiple simultaneous collisions. Modern particle tracking systems may feature 100 million channels, or pixels, which need to be individually connected to read-out chains. Silicon pixel detectors are typically connected to readout chips by flip-chip bonding using solder bumps. High-quality electro-mechanical flip-chip interconnects minimizes the number of dead read-out channels in the particle tracking system. Furthermore, the detector modules must endure handling during installation and withstand heat generation and cooling during operation. Silicon pixel detector modules were constructed by flip-chip bonding 16 readout chips to a single sensor. Eutectic SnPb solder bumps were deposited on the readout chips and the sensor chips were coated with TiW/Pt thin film UBM (under bump metallization). The modules were assembled at Advacam Ltd, Finland. We studied the uniformity o...

Molecular dynamic simulations of the high-speed copper nanoparticles collision with the aluminum surface

Science.gov (United States)

Pogorelko, V. V.; Mayer, A. E.

2016-11-01

With the use of the molecular dynamic simulations, we investigated the effect of the high-speed (500 m/s, 1000 m/s) copper nanoparticle impact on the mechanical properties of an aluminum surface. Dislocation analysis shows that a large number of dislocations are formed in the impact area; the total length of dislocations is determined not only by the speed and size of the incoming copper nanoparticle (kinetic energy of the nanoparticle), but by a temperature of the system as well. The dislocations occupy the whole area of the aluminum single crystal at high kinetic energy of the nanoparticle. With the decrease of the nanoparticle kinetic energy, the dislocation structures are formed in the near-surface layer; formation of the dislocation loops takes place. Temperature rise of the system (aluminum substrate + nanoparticle) reduces the total dislocation length in the single crystal of aluminum; there is deeper penetration of the copper atoms in the aluminum at high temperatures. Average energy of the nanoparticles and room temperature of the system are optimal for production of high-quality layers of copper on the aluminum surface.

Detection and classification of ebola on microfluidic chips

Science.gov (United States)

Lin, Xue; Jin, Xiangyu; Fan, Yunqian; Huang, Qin; Kou, Yue; Zu, Guo; Huang, Shiguang; Liu, Xiaosheng; Huang, Guoliang

2016-10-01

Point-of-care testing (POCT) for an infectious diseases is the prerequisite to control of the disease and limitation of its spread. A microfluidic chip for detection and classification of four strains of Ebola virus was developed and evaluated. This assay was based on reverse transcription loop-mediated isothermal amplification (RT-LAMP) and specific primers for Ebola Zaire virus, Ebola Sudan virus, Ebola Tai Forest virus and Ebola Bundibugyo virus were designed. The sensitivity of the microfluidic chip was under 103 copies per milliliter, as determined by ten repeated tests. This assay is unique in its ability to enable diagnosis of the Ebola infections and simultaneous typing of Ebola virus on a single chip. It offers short reaction time, ease of use and high specificity. These features should enable POCT in remote area during outbreaks of Ebola virus.

High speed VLSI neural network for high energy physics

NARCIS (Netherlands)

Masa, P.; Masa, P.; Hoen, K.; Hoen, Klaas; Wallinga, Hans

1994-01-01

A CMOS neural network IC is discussed which was designed for very high speed applications. The parallel architecture, analog computing and digital weight storage provides unprecedented computing speed combined with ease of use. The circuit classifies up to 70 dimensional vectors within 20

Fault-tolerance techniques for high-speed fiber-optic networks

Science.gov (United States)

Deruiter, John

1991-01-01

Four fiber optic network topologies (linear bus, ring, central star, and distributed star) are discussed relative to their application to high data throughput, fault tolerant networks. The topologies are also examined in terms of redundancy and the need to provide for single point, failure free (or better) system operation. Linear bus topology, although traditionally the method of choice for wire systems, presents implementation problems when larger fiber optic systems are considered. Ring topology works well for high speed systems when coupled with a token passing protocol, but it requires a significant increase in protocol complexity to manage system reconfiguration due to ring and node failures. Star topologies offer a natural fault tolerance, without added protocol complexity, while still providing high data throughput capability.

A 6.25 Gb/s equalizer in 0.18 μm CMOS technology for high-speed SerDes

International Nuclear Information System (INIS)

Zhang Mingke; Hu Qingsheng

2013-01-01

This paper presents a 0.18 μm CMOS 6.25 Gb/s equalizer for high speed backplane communication. The proposed equalizer is a combined one consisting of a one-tap feed-forward equalizer (FFE) and a two-tap half-rate decision feedback equalizer (DFE) in order to cancel both pre-cursor and post-cursor ISI. By employing an active-inductive peaking circuit for the delay line, the bandwidth of the FFE is increased and the area cost is minimized. CML-based circuits such as DFFs, summers and multiplexes all help to improve the speed of DFEs. Measurement results illustrate that the equalizer operates well when equalizing 6.25 Gb/s data is passed over a 30-inch channel with a loss of 22 dB and consumes 55.8 mW with the supply voltage of 1.8 V. The overall chip area including pads is 0.3 × 0.5 mm 2 . (semiconductor integrated circuits)

Diagnostics for liquid dispersion due to a high-speed impact with accident or vulnerability assessment application

International Nuclear Information System (INIS)

Jepsen, Richard A; O'Hern, Timothy; Demosthenous, Byron; Bystrom, Ed; Nissen, Mark; Romero, Edward; Yoon, Sam S

2009-01-01

The high-speed impact and subsequent dispersion of a large liquid slug is of interest for assessing vulnerability of structures when subjected to such an event. The Weber number associated with such liquid impacts is generally between 10 5 and 10 8 . Because of the experiment scale and destructive nature of these high-energy impacts, most traditional diagnostics are difficult to implement. Therefore, unique diagnostics were employed in several tests to gather information on impact force, spreading instability, slug break-up, ejection velocity, droplet deformation and spray characteristics. Measurement techniques discussed here include high-speed photometrics, particle image velocimetry (PIV), TrackEye particle analysis, speckle correlation, single-pass schlieren imaging, phase Doppler particle analyzer (PDPA) and load cell measurements as applied to large-scale, high-speed liquid impacts

Impedance spectra of patch clamp scenarios for single cells immobilized on a lab-on-a-chip

DEFF Research Database (Denmark)

Alberti, Massimo; Snakenborg, Detlef; Lopacinska, Joanna M.

2014-01-01

and simulated impedance spectra proved that the presented method could distinguish between a cell-attached mode and a whole-cell mode even with low-quality seals. In physiological conditions, the capacitance of HeLa cells was measured to *38 pF. The first gigaseal was recorded and maintained for 40 min. Once...... membrane. After incubating the chip for 24 h, HeLa cells adhered and grew on the chip surface but did not survive when trapped on the microapertures. The microfluidic system proved to work as a micro electrophysiological analysis system, and the IS-based method can be used for further studies on the post......A simple method based on impedance spectroscopy (IS) was developed to distinguish between different patch clamp modes for single cells trapped on microapertures in a patch clamp microchannel array designed for patch clamping on cultured cells. The method allows detecting via impedance analysis...

ASIC Wafer Test System for the ATLAS Semiconductor Tracker Front-End Chip

International Nuclear Information System (INIS)

Anghinolfi, F.; Bialas, W.; Busek, N.; Ciocio, A.; Cosgrove, D.; Fadeyev, V.; Flacco, C.; Gilchriese, M.; Grillo, A.A.; Haber, C.; Kaplon, J.; Lacasta, C.; Murray, W.; Niggli, H.; Pritchard, T.; Rosenbaum, F.; Spieler, H.; Stezelberger, T.; Vu, C.; Wilder, M.; Yaver, H.; Zetti, F.

2002-01-01

An ASIC wafer test system has been developed to provide comprehensive production screening of the ATLAS Semiconductor Tracker front-end chip (ABCD3T). The ABCD3T[1] features a 128-channel analog front-end, a digital pipeline, and communication circuitry, clocked at 40 MHz, which is the bunch crossing frequency at the LHC (Large Hadron Collider). The tester measures values and tolerance ranges of all critical IC parameters, including DC parameters, electronic noise, time resolution, clock levels and clock timing. The tester is controlled by an FPGA (ORCA3T) programmed to issue the input commands to the IC and to interpret the output data. This allows the high-speed wafer-level IC testing necessary to meet the production schedule. To characterize signal amplitudes and phase margins, the tester utilizes pin-driver, delay, and DAC chips, which control the amplitudes and delays of signals sent to the IC under test. Output signals from the IC under test go through window comparator chips to measure their levels. A probe card has been designed specifically to reduce pick-up noise that can affect the measurements. The system can operate at frequencies up to 100 MHz to study the speed limits of the digital circuitry before and after radiation damage. Testing requirements and design solutions are presented

Deterministic Integration of Quantum Dots into on-Chip Multimode Interference Beamsplitters Using in Situ Electron Beam Lithography.

Science.gov (United States)

Schnauber, Peter; Schall, Johannes; Bounouar, Samir; Höhne, Theresa; Park, Suk-In; Ryu, Geun-Hwan; Heindel, Tobias; Burger, Sven; Song, Jin-Dong; Rodt, Sven; Reitzenstein, Stephan

2018-04-11

The development of multinode quantum optical circuits has attracted great attention in recent years. In particular, interfacing quantum-light sources, gates, and detectors on a single chip is highly desirable for the realization of large networks. In this context, fabrication techniques that enable the deterministic integration of preselected quantum-light emitters into nanophotonic elements play a key role when moving forward to circuits containing multiple emitters. Here, we present the deterministic integration of an InAs quantum dot into a 50/50 multimode interference beamsplitter via in situ electron beam lithography. We demonstrate the combined emitter-gate interface functionality by measuring triggered single-photon emission on-chip with g (2) (0) = 0.13 ± 0.02. Due to its high patterning resolution as well as spectral and spatial control, in situ electron beam lithography allows for integration of preselected quantum emitters into complex photonic systems. Being a scalable single-step approach, it paves the way toward multinode, fully integrated quantum photonic chips.

Recent high-speed ballistics experiments at ORNL

International Nuclear Information System (INIS)

Combs, S.K.; Gouge, M.J.; Baylor, L.R.; Fisher, P.W.; Foster, C.A.; Foust, C.R.; Milora, S.L.; Qualls, A.L.

1994-01-01

Oak Ridge National Laboratory (ORNL) has been developing pellet injectors for plasma fueling experiments on magnetic confinement devices for almost 20 years. With these devices, pellets (1 to 8 mm in diameter) composed of hydrogen isotopes are formed (at temperatures <20 K) and typically accelerated to speeds of ∼ 1.0 to 2.0 km/s for injection into plasmas of experimental fusion devices. A variety of pellet injector designs have been developed at ORNL, including repeating pneumatic injectors (single- and multiple-barrel light gas guns) that can inject up to hundreds of pellets for long-pulse plasma operation. The repeating pneumatic injectors are of particular importance because long-pulse fueling is required for present large experimental fusion devices, with steady-state operation the objective for future fusion reactors. In this paper, recent advancements in the development of repeating pneumatic injectors are described, including (1) a small-bore (1.8-mm), high-firing-rate (10-Hz) version of a single-stage light gas gun; (2) a repeating single-stage light gas gun for 8-mm-diam tritium pellets; (3) a repeating two-stage light gas gun for operation at higher pellet velocities; and (4) a steady-state hydrogen extruder feed system

MICROSTRUCTURING OF SILICON SINGLE CRYSTALS BY FIBER LASER IN HIGH-SPEED SCANNING MODE

Directory of Open Access Journals (Sweden)

T. A. Trifonova

2015-11-01

Full Text Available Subject of Study. The surface structure of the silicon wafers (substrate with a thermally grown silicon dioxide on the surface (of SiO2/Si is studied after irradiation by pulse fiber laser of ILI-1-20 type. The main requirements for exposure modes of the system are: the preservation of the integrity of the film of silicon dioxide in the process of microstructuring and the absence of interference of surrounding irradiated areas of the substrate. Method. Studies were carried out on silicon wafers KEF-4,5 oriented in the crystallographic plane (111 with the source (natural silicon dioxide (SiO2 with thickness of about 4 nm, and SiO2 with 40 nm and 150 nm thickness, grown by thermal oxidation in moist oxygen. Also, wafers KHB-10 oriented in the plane (100 with 500 nm thickness of thermal oxide were investigated. Irradiation of SiO2/Si system was produced by laser complex based on ytterbium fiber pulse laser ILI-1-20. Nominal output power of the laser was 20 W, and the laser wavelength was λ = 1062 nm. Irradiation was carried out by a focused beam spot with a diameter of 25 microns and a pulse repetition rate of 99 kHz. The samples with 150 nm and 40 nm thickness of SiO2 were irradiated at a power density equal to 1,2·102 W/cm2, and the samples of SiO2 with 500 nm thickness were irradiated at a power density equal to 2,0·102 W/cm2. Scanning was performed using a two-axis Coordinate Scanning Device based on VM2500+ drives with control via a PC with the software package "SinMarkTM." Only one scan line was used at the maximum speed of the beam equal to 8750 mm/s. Morphology control of the irradiated samples was conducted by an optical microscope ZeissA1M with high-resolution CCD array. A scanning probe microscope Nanoedicator of the NT-MDT company was used for structural measurements. Main Results. It has been shown that at a single exposure of high-frequency pulsed laser radiation on SiO2/Si system, with maintaining the integrity of the SiO2 film

Proposed high speed pellet injection system 'HIPEL' for Large Helical Device

International Nuclear Information System (INIS)

Sudo, S.; Kanno, M.; Kaneko, H.; Saka, S.; Shirai, T.; Baba, T.

1993-11-01

From the results of the simulation study including pellet ablation and 1-D transport code, it is found that a high speed pellet injector with pellet velocity of more than 3 km/s is necessary for the penetration of the pellet with diameter of 3 mm into the core region under the expected plasma condition of Large Helical Device (LHD) of heliotron/stellarator type with superconducting coils at NIFS in Japan. Therefore, a two stage pellet injector was constructed and tested successfully in order to obtain the pellet velocity range of 3 km/s. Based upon the above results, a high speed flexible multiple-pellet injection system 'HIPEL' for LHD is proposed. HIPEL consists of independent (1) 10 two-stage gun barrels and (2) 10 single-stage gun barrels. It has multi purposes such as refueling and flexible density profile control, diagnostics and the other functions. (author)

New potentional of high-speed water jet technology for renovating concrete structures

Science.gov (United States)

Bodnárová, L.; Sitek, L.; Hela, R.; Foldyna, J.

2011-06-01

The paper discusses the background and results of research focused on the action of a high-speed water jet on concrete with different qualities. The sufficient and careful removal of degraded concrete layers is very important for the renovation of concrete structures. High-speed water jet technology is one of the most common methods used for removing degraded concrete layers. Different types of high-speed water jets were tested in the experimental part. The classical technology of a single continuous water jet generated with one nozzle was tested as well as the technology of revolving water jets generated by multiple nozzles (used mainly for the renovation of larger areas). A continuous flat water jet and pulsating flat water jet were tested the first time, because the connection of a water jet with the acoustic generator of a pulsating jet offers new possibilities for the use of a water jet (see [1] and [2]). A water jet with such a modification is capable of efficient action and can even be used for cutting solid concrete with a relatively low consumption of energy. A flat pulsating water jet which can be newly used for renovation seems to be a promising technology.

High-speed and high-fidelity system and method for collecting network traffic

Science.gov (United States)

Weigle, Eric H [Los Alamos, NM

2010-08-24

A system is provided for the high-speed and high-fidelity collection of network traffic. The system can collect traffic at gigabit-per-second (Gbps) speeds, scale to terabit-per-second (Tbps) speeds, and support additional functions such as real-time network intrusion detection. The present system uses a dedicated operating system for traffic collection to maximize efficiency, scalability, and performance. A scalable infrastructure and apparatus for the present system is provided by splitting the work performed on one host onto multiple hosts. The present system simultaneously addresses the issues of scalability, performance, cost, and adaptability with respect to network monitoring, collection, and other network tasks. In addition to high-speed and high-fidelity network collection, the present system provides a flexible infrastructure to perform virtually any function at high speeds such as real-time network intrusion detection and wide-area network emulation for research purposes.

Gate Drive For High Speed, High Power IGBTs

Energy Technology Data Exchange (ETDEWEB)

Nguyen, M.N.; Cassel, R.L.; de Lamare, J.E.; Pappas, G.C.; /SLAC

2007-06-18

A new gate drive for high-voltage, high-power IGBTs has been developed for the SLAC NLC (Next Linear Collider) Solid State Induction Modulator. This paper describes the design and implementation of a driver that allows an IGBT module rated at 800A/3300V to switch up to 3000A at 2200V in 3{micro}S with a rate of current rise of more than 10000A/{micro}S, while still being short circuit protected. Issues regarding fast turn on, high de-saturation voltage detection, and low short circuit peak current will be presented. A novel approach is also used to counter the effect of unequal current sharing between parallel chips inside most high-power IGBT modules. It effectively reduces the collector-emitter peak current, and thus protects the IGBT from being destroyed during soft short circuit conditions at high di/dt.

Gate Drive For High Speed, High Power IGBTs

International Nuclear Information System (INIS)

Nguyen, M.N.; Cassel, R.L.; de Lamare, J.E.; Pappas, G.C.; SLAC

2007-01-01

A new gate drive for high-voltage, high-power IGBTs has been developed for the SLAC NLC (Next Linear Collider) Solid State Induction Modulator. This paper describes the design and implementation of a driver that allows an IGBT module rated at 800A/3300V to switch up to 3000A at 2200V in 3(micro)S with a rate of current rise of more than 10000A/(micro)S, while still being short circuit protected. Issues regarding fast turn on, high de-saturation voltage detection, and low short circuit peak current will be presented. A novel approach is also used to counter the effect of unequal current sharing between parallel chips inside most high-power IGBT modules. It effectively reduces the collector-emitter peak current, and thus protects the IGBT from being destroyed during soft short circuit conditions at high di/dt

Exploration within the Network-on-Chip Paradigm

NARCIS (Netherlands)

Wolkotte, P.T.

2009-01-01

A general purpose processor used to consist of a single processing core, which performed and controlled all tasks on the chip. Its functionality and maximum clock frequency grew steadily over the years. Due to the continuous increase of the number of transistors available on-chip and the operational

Radiation induced Single Event Effects in the ATLAS MDT-ASD front-end chip

CERN Document Server

Posch, C

2002-01-01

Single Event Effect (SEE) tests of the MDT-ASD, the ATLAS MDT front-end chip have been performed at the Harvard Cyclotron Lab. The MDT-ASD is an 8-channel drift tube read-out ASIC fabricated in a commercial 0.5um CMOS process (AMOS14TB). The chip contains a 53 bit register which holds the setup information and an associated shift register of the same length plus some additional control logic. 10 test devices were exposed to a 160 MeV proton beam with a fluence of 1.05E9 p.cm-2.s-1 up to >4.4E p.cm-2 per device. After a total fluence of 4.46E13 p.cm-2, 7 soft SEEs (non-permanent bit flips in the registers) and 0 hard/destructive SEE (e.g. latch-ups, SEL) had occurred. The simulated fluence for 10 years of LHC operation at nominal luminosity for worst case location MDT components is 2.67E11 h.cm-2. The rate of SEUs in the ASD setup register for all of ATLAS, derived from these numbers, is 2.4 per day. It is foreseen to update the active registers of the on-detector electronics at regular intervals. Depending on...

Flip chip assembly of thinned chips for hybrid pixel detector applications

International Nuclear Information System (INIS)

Fritzsch, T; Zoschke, K; Rothermund, M; Oppermann, H; Woehrmann, M; Ehrmann, O; Lang, K D; Huegging, F

2014-01-01

There is a steady trend to ultra-thin microelectronic devices. Especially for future particle detector systems a reduced readout chip thickness is required to limit the loss of tracking precision due to scattering. The reduction of silicon thickness is performed at wafer level in a two-step thinning process. To minimize the risk of wafer breakage the thinned wafer needs to be handled by a carrier during the whole process chain of wafer bumping. Another key process is the flip chip assembly of thinned readout chips onto thin sensor tiles. Besides the prevention of silicon breakage the minimization of chip warpage is one additional task for a high yield and reliable flip chip process. A new technology using glass carrier wafer will be described in detail. The main advantage of this technology is the combination of a carrier support during wafer processing and the chip support during flip chip assembly. For that a glass wafer is glue-bonded onto the backside of the thinned readout chip wafer. After the bump deposition process the glass-readout chip stack is diced in one step. Finally the glass carrier chip is released by laser illumination after flip chip assembly of the readout chip onto sensor tile. The results of the flip chip assembly process development for the ATLAS IBL upgrade are described more in detail. The new ATLAS FEI4B chip with a size of 20 × 19 mm 2 is flip chip bonded with a thickness of only 150 μm, but the capability of this technology has been demonstrated on hybrid modules with a reduced readout chip thickness of down to 50 μm which is a major step for ultra-thin electronic systems

Flip chip assembly of thinned chips for hybrid pixel detector applications

CERN Document Server

Fritzsch, T; Woehrmann, M; Rothermund, M; Huegging, F; Ehrmann, O; Oppermann, H; Lang, K.D

2014-01-01

There is a steady trend to ultra-thin microelectronic devices. Especially for future particle detector systems a reduced readout chip thickness is required to limit the loss of tracking precision due to scattering. The reduction of silicon thickness is performed at wafer level in a two-step thinning process. To minimize the risk of wafer breakage the thinned wafer needs to be handled by a carrier during the whole process chain of wafer bumping. Another key process is the flip chip assembly of thinned readout chips onto thin sensor tiles. Besides the prevention of silicon breakage the minimization of chip warpage is one additional task for a high yield and reliable flip chip process. A new technology using glass carrier wafer will be described in detail. The main advantage of this technology is the combination of a carrier support during wafer processing and the chip support during flip chip assembly. For that a glass wafer is glue-bonded onto the backside of the thinned readout chip wafer. After the bump depo...

A new circuit for at-speed scan SoC testing

International Nuclear Information System (INIS)

Lin Wei; Shi Wenlong

2013-01-01

It is very important to detect transition-delay faults and stuck-at faults in system on chip (SoC) under 90 nm processing technology, and the transition-delay faults can only be detected by using an at-speed testing method. In this paper, an on-chip clock (OCC) controller with a bypass function based on an internal phase-locked loop is designed to test faults in SoC. Furthermore, a clock chain logic which can eliminate the metastable state is realized to generate an enable signal for the OCC controller, and then, the test pattern is generated by automatic test pattern generation (ATPG) tools. Next, the scan test pattern is simulated by using the Synopsys tool and the correctness of the design is verified. The result shows that the design of an at-speed scan test in this paper is highly efficient for detecting timing-related defects. Finally, the 89.29% transition-delay fault coverage and the 94.50% stuck-at fault coverage are achieved, and it is successfully applied to an integrated circuit design. (semiconductor integrated circuits)

Investigations of Thickness Requirement in DNV Rules for High-Speed Craft

DEFF Research Database (Denmark)

Pedersen, Preben Terndrup; Zhang, Shengming

1997-01-01

Simple formulas for determining impact strength of high-speed craft collisions with floating objects are given in this note. Thereby the minimum mass of a floating object that just ruptures the shell plating is predicted. The minimum thickness requirements of DNV rules for aluminiumcrafts and GRP...... single skin crafts can be converted to critical impact energy and minimum object mass. Some comparisons show an acceptable agreement between present method and DNV test results....

Potential scenarios of concern for high speed rail operations

Science.gov (United States)

2011-03-16

Currently, multiple operating authorities are proposing the : introduction of high-speed rail service in the United States. : While high-speed rail service shares a number of basic : principles with conventional-speed rail service, the operational : ...

Design Of Single-Axis And Dual-Axis Solar Tracking Systems Protected Against High Wind Speeds

Directory of Open Access Journals (Sweden)

Mai Salaheldin Elsherbiny

2017-09-01

Full Text Available Solar energy is rapidly gaining ground as an important mean of expanding renewable energy use. Solar tracking is employed in order to maximize collected solar radiation by a photovoltaic panel. In this paper we present a prototype for Automatic solar tracker that is designed using Arduino UNO with Wind sensor to Cease Wind effect on panels if wind speed exceeds certain threshold. The Proposed solar tracker tracks the location of the sun anywhere in any time by calculating the position of the sun. For producing the maximum amount of solar energy a solar panel must always be perpendicular to the source of light. Because the sun motion plane varies daily and during the day it moves from east to west one needs two axis tracking to follow the suns position. Maximum possible power is collected when two axis tracking is done. However two axis tracking is relatively costly and complex. A compromise between maximum power collection and system simplicity is obtained by single axis tracking where the plane North south axis is fixed while the east west motion is accomplished. This work deals with the design of both single and two axis tracking systems. Automatic trackers is also compared to Fixed one in terms of Energy generated Efficiency Cost and System reliability.

Effect of osmotic dehydration and vacuum-frying parameters to produce high-quality mango chips.

Science.gov (United States)

Nunes, Yolanda; Moreira, Rosana G

2009-09-01

Mango (Mangifera indica L.) is a fruit rich in flavor and nutritional values, which is an excellent candidate for producing chips. The objective of this study was to develop high-quality mango chips using vacuum frying. Mango ("Tommy Atkins") slices were pretreated with different maltodextrin concentrations (40, 50, and 65, w/v), osmotic dehydration times (45, 60, and 70 min), and solution temperatures (22 and 40 degrees C). Pretreated slices were vacuum fried at 120, 130, and 138 degrees C and product quality attributes (oil content, texture, color, carotenoid content) determined. The effect of frying temperatures at optimum osmotic dehydration times (65 [w/v] at 40 degrees C) was assessed. All samples were acceptable (scores > 5) to consumer panelists. The best mango chips were those pretreated with 65 (w/v) concentration for 60 min and vacuum fried at 120 degrees C. Mango chips under atmospheric frying had less carotenoid retention (32%) than those under vacuum frying (up to 65%). These results may help further optimize vacuum-frying processing of high-quality fruit-based snacks.

Single nozzle spray drift measurements of drift reducing nozzles at two forward speeds

NARCIS (Netherlands)

Stallinga, H.; Zande, van de J.C.; Michielsen, J.G.P.; Velde, van P.

2016-01-01

In 2011‒2012 single nozzle field experiments were carried out to determine the effect of different flat fan spray nozzles of the spray drift reduction classes 50, 75, 90 and 95% on spray drift at two different forward speeds (7.2 km h-1 and 14.4 km h-1). Experiments were performed with a single

High-Speed Non-Volatile Optical Memory: Achievements and Challenges

Directory of Open Access Journals (Sweden)

Vadym Zayets

2017-01-01

Full Text Available We have proposed, fabricated, and studied a new design of a high-speed optical non-volatile memory. The recoding mechanism of the proposed memory utilizes a magnetization reversal of a nanomagnet by a spin-polarized photocurrent. It was shown experimentally that the operational speed of this memory may be extremely fast above 1 TBit/s. The challenges to realize both a high-speed recording and a high-speed reading are discussed. The memory is compact, integratable, and compatible with present semiconductor technology. If realized, it will advance data processing and computing technology towards a faster operation speed.

High-speed large angle mammography tomosynthesis system

Science.gov (United States)

Eberhard, Jeffrey W.; Staudinger, Paul; Smolenski, Joe; Ding, Jason; Schmitz, Andrea; McCoy, Julie; Rumsey, Michael; Al-Khalidy, Abdulrahman; Ross, William; Landberg, Cynthia E.; Claus, Bernhard E. H.; Carson, Paul; Goodsitt, Mitchell; Chan, Heang-Ping; Roubidoux, Marilyn; Thomas, Jerry A.; Osland, Jacqueline

2006-03-01

A new mammography tomosynthesis prototype system that acquires 21 projection images over a 60 degree angular range in approximately 8 seconds has been developed and characterized. Fast imaging sequences are facilitated by a high power tube and generator for faster delivery of the x-ray exposure and a high speed detector read-out. An enhanced a-Si/CsI flat panel digital detector provides greater DQE at low exposure, enabling tomo image sequence acquisitions at total patient dose levels between 150% and 200% of the dose of a standard mammographic view. For clinical scenarios where a single MLO tomographic acquisition per breast may replace the standard CC and MLO views, total tomosynthesis breast dose is comparable to or below the dose in standard mammography. The system supports co-registered acquisition of x-ray tomosynthesis and 3-D ultrasound data sets by incorporating an ultrasound transducer scanning system that flips into position above the compression paddle for the ultrasound exam. Initial images acquired with the system are presented.

High speed laser tomography system

Science.gov (United States)

Samsonov, D.; Elsaesser, A.; Edwards, A.; Thomas, H. M.; Morfill, G. E.

2008-03-01

A high speed laser tomography system was developed capable of acquiring three-dimensional (3D) images of optically thin clouds of moving micron-sized particles. It operates by parallel-shifting an illuminating laser sheet with a pair of galvanometer-driven mirrors and synchronously recording two-dimensional (2D) images of thin slices of the imaged volume. The maximum scanning speed achieved was 120000slices/s, sequences of 24 volume scans (up to 256 slices each) have been obtained. The 2D slices were stacked to form 3D images of the volume, then the positions of the particles were identified and followed in the consecutive scans. The system was used to image a complex plasma with particles moving at speeds up to cm/s.

A Historical Review of High Speed Metal Forming

OpenAIRE

Zittel, G.

2010-01-01

This paper will present a Historical Review of High Speed Metal Forming beginning with the first thought of forming metal by using an electromagnetic impulse to today, whereby High Speed Metal Forming is an accepted production process. Although this paper will briefly cover the basic physics of the process, it will not dwell on it. It will rather show how the industrial acceptance of High Speed Metal Forming is tightly connected to the knowledge acquired from many applications studies. These ...

Mechanisms and FEM Simulation of Chip Formation in Orthogonal Cutting In-Situ TiB2/7050Al MMC

Science.gov (United States)

Wang, Wenhu; Jiang, Ruisong; Lin, Kunyang; Shao, Mingwei

2018-01-01

The in-situ TiB2/7050Al composite is a new kind of Al-based metal matrix composite (MMC) with super properties, such as low density, improved strength, and wear resistance. This paper, for a deep insight into its cutting performance, involves a study of the chip formation process and finite element simulation during orthogonal cutting in-situ TiB2/7050Al MMC. With chips, material properties, cutting forces, and tool geometry parameters, the Johnson–Cook (J–C) constitutive equation of in-situ TiB2/7050Al composite was established. Then, the cutting simulation model was established by applying the Abaqus–Explicit method, and the serrated chip, shear plane, strain rate, and temperature were analyzed. The experimental and simulation results showed that the obtained material’s constitutive equation was of high reliability, and the saw-tooth chips occurred commonly under either low or high cutting speed and small or large feed rate. From result analysis, it was found that the mechanisms of chip formation included plastic deformation, adiabatic shear, shearing slip, and crack extension. In addition, it was found that the existence of small, hard particles reduced the ductility of the MMC and resulted in segmental chips. PMID:29662047

A 1,000 Frames/s Programmable Vision Chip with Variable Resolution and Row-Pixel-Mixed Parallel Image Processors

Directory of Open Access Journals (Sweden)

Nanjian Wu

2009-07-01

Full Text Available A programmable vision chip with variable resolution and row-pixel-mixed parallel image processors is presented. The chip consists of a CMOS sensor array, with row-parallel 6-bit Algorithmic ADCs, row-parallel gray-scale image processors, pixel-parallel SIMD Processing Element (PE array, and instruction controller. The resolution of the image in the chip is variable: high resolution for a focused area and low resolution for general view. It implements gray-scale and binary mathematical morphology algorithms in series to carry out low-level and mid-level image processing and sends out features of the image for various applications. It can perform image processing at over 1,000 frames/s (fps. A prototype chip with 64 × 64 pixels resolution and 6-bit gray-scale image is fabricated in 0.18 mm Standard CMOS process. The area size of chip is 1.5 mm × 3.5 mm. Each pixel size is 9.5 μm × 9.5 μm and each processing element size is 23 μm × 29 μm. The experiment results demonstrate that the chip can perform low-level and mid-level image processing and it can be applied in the real-time vision applications, such as high speed target tracking.

Experimental evaluation of high speed impulse radio UWB interference on WiMAX narrowband systems

DEFF Research Database (Denmark)

Yu, Xianbin; Yin, Xiaoli; Tafur Monroy, Idelfonso

2010-01-01

Interference of high speed impulse radio ultrawideband (IR-UWB) on 5.735GHz single carrier 64/256-QAM WiMAX narrowband signals is experimentally investigated. The experimental results indicate that the coexistence of 625Mbps and 2Gbps IR-UWB signals causes penalties of 3dB and 0.5dB respectively...... to the WiMAX channel. At higher bit rates, IR-UWB technology is therefore expected to reduce its interference on WiMAX signals. This work serves as further motivation for the exploration of IR-UWB systems with higher speed and higher capacity....

SPAD electronics for high-speed quantum communications

Science.gov (United States)

Bienfang, Joshua C.; Restelli, Alessandro; Migdall, Alan

2011-01-01

We discuss high-speed electronics that support the use of single-photon avalanche diodes (SPADs) in gigahertz singlephoton communications systems. For InGaAs/InP SPADs, recent work has demonstrated reduced afterpulsing and count rates approaching 500 MHz can be achieved with gigahertz periodic-gating techniques designed to minimize the total avalanche charge to less than 100 fC. We investigate afterpulsing in this regime and establish a connection to observations using more conventional techniques. For Si SPADs, we report the benefits of improved timing electronics that enhance the temporal resolution of Si SPADs used in a free-space quantum key distribution (QKD) system operating in the GHz regime. We establish that the effects of count-rate fluctuations induced by daytime turbulent scintillation are significantly reduced, benefitting the performance of the QKD system.

Electrical lysis: dynamics revisited and advances in On-chip operation.

Science.gov (United States)

Morshed, Bashir; Shams, Maitham; Mussivand, Tofy

2013-01-01

Electrical lysis (EL) is the process of breaking the cell membrane to expose the internal contents under an applied high electric field. Lysis is an important phenomenon for cellular analysis, medical treatment, and biofouling control. This paper aims to review, summarize, and analyze recent advancements on EL. Major databases including PubMed, Ei Engineering Village, IEEE Xplore, and Scholars Portal were searched using relevant keywords. More than 50 articles published in English since 1997 are cited in this article. EL has several key advantages compared to other lysis techniques such as chemical, mechanical, sonication, or laser, including rapid speed of operation, ability to control, miniaturization, low cost, and low power requirement. A variety of cell types have been investigated for including protoplasts, E. coli, yeasts, blood cells, and cancer cells. EL has been developed and applied for decontamination, cytology, genetics, single-cell analysis, cancer treatment, and other applications. On-chip EL is a promising technology for multiplexed automated implementation of cell-sample preparation and processing with micro- or nanoliter reagents.

On-chip high-voltage generator design design methodology for charge pumps

CERN Document Server

Tanzawa, Toru

2016-01-01

This book provides various design techniques for switched-capacitor on-chip high-voltage generators, including charge pump circuits, regulators, level shifters, references, and oscillators.  Readers will see these techniques applied to system design in order to address the challenge of how the on-chip high-voltage generator is designed for Flash memories, LCD drivers, and other semiconductor devices to optimize the entire circuit area and power efficiency with a low voltage supply, while minimizing the cost.  This new edition includes a variety of useful updates, including coverage of power efficiency and comprehensive optimization methodologies for DC-DC voltage multipliers, modeling of extremely low voltage Dickson charge pumps, and modeling and optimum design of AC-DC switched-capacitor multipliers for energy harvesting and power transfer for RFID.

High-speed photography. Technique and evolution

International Nuclear Information System (INIS)

Sanchez-Tembleque, R.

1981-01-01

It is intended to present some general considerations about ''Higg-speed photography'' as a tool of work common in mos research laboratories in the world. ''High-speed photography'' relies on the principles of photography of actions, that change rapidly with the time. The evolution of this technique goes along with the discovering of new phenomena in wich higher speeds are involved. At present is normal to deal with changing rates involving picoseconds times (10 -12 s) and new developments on the field of femtosecond (10 -15 s) theoretically are contemplated. (author)

High speed friction microscopy and nanoscale friction coefficient mapping

International Nuclear Information System (INIS)

Bosse, James L; Lee, Sungjun; Huey, Bryan D; Andersen, Andreas Sø; Sutherland, Duncan S

2014-01-01

As mechanical devices in the nano/micro length scale are increasingly employed, it is crucial to understand nanoscale friction and wear especially at technically relevant sliding velocities. Accordingly, a novel technique has been developed for friction coefficient mapping (FCM), leveraging recent advances in high speed AFM. The technique efficiently acquires friction versus force curves based on a sequence of images at a single location, each with incrementally lower loads. As a result, true maps of the coefficient of friction can be uniquely calculated for heterogeneous surfaces. These parameters are determined at a scan velocity as fast as 2 mm s −1 for microfabricated SiO 2 mesas and Au coated pits, yielding results that are identical to traditional speed measurements despite being ∼1000 times faster. To demonstrate the upper limit of sliding velocity for the custom setup, the friction properties of mica are reported from 200 µm s −1 up to 2 cm s −1 . While FCM is applicable to any AFM and scanning speed, quantitative nanotribology investigations of heterogeneous sliding or rolling components are therefore uniquely possible, even at realistic velocities for devices such as MEMS, biological implants, or data storage systems. (paper)

Price of forest chips decreasing

International Nuclear Information System (INIS)

Hakkila, P.

2001-01-01

Use of forest chips was studied in 1999 in the national Puuenergia (Wood Energy) research program. Wood combusting heating plants were questioned about are the main reasons restricting the increment of the use of forest chips. Heating plants, which did not use forest chips at all or which used less than 250 m 3 (625 bulk- m 3 ) in 1999 were excluded. The main restrictions for additional use of forest chips were: too high price of forest chips; lack of suppliers and/or uncertainty of deliveries; technical problems of reception and processing of forest chips; insufficiency of boiler output especially in winter; and unsatisfactory quality of chips. The price of forest chips becomes relatively high because wood biomass used for production of forest chips has to be collected from wide area. Heavy equipment has to be used even though small fragments of wood are processed, which increases the price of chips. It is essential for forest chips that the costs can be pressed down because competition with fossil fuels, peat and industrial wood residues is hard. Low market price leads to the situation in which forest owner gets no price of the raw material, the entrepreneurs operate at the limit of profitability and renovation of machinery is difficult, and forest chips suppliers have to sell the chips at prime costs. Price of forest chips has decreased significantly during the past decade. Nominal price of forest chips is now lower than two decades ago. The real price of chips has decreased even more than the nominal price, 35% during the past decade and 20% during the last five years. Chips, made of small diameter wood, are expensive because the price includes the felling costs and harvesting is carried out at thinning lots. Price is especially high if chips are made of delimbed small diameter wood due to increased the work and reduced amount of chips. The price of logging residue chips is most profitable because cutting does not cause additional costs. Recovery of chips is

Review of High-Speed Fiber Optic Grating Sensors Systems

Energy Technology Data Exchange (ETDEWEB)

Udd, E; Benterou, J; May, C; Mihailov, S J; Lu, P

2010-03-24

Fiber grating sensors can be used to support a wide variety of high speed measurement applications. This includes measurements of vibrations on bridges, traffic monitoring on freeways, ultrasonic detection to support non-destructive tests on metal plates and providing details of detonation events. This paper provides a brief overview of some of the techniques that have been used to support high speed measurements using fiber grating sensors over frequency ranges from 10s of kHz, to MHZ and finally toward frequencies approaching the GHz regime. Very early in the development of fiber grating sensor systems it was realized that a high speed fiber grating sensor system could be realized by placing an optical filter that might be a fiber grating in front of a detector so that spectral changes in the reflection from a fiber grating were amplitude modulated. In principal the only limitation on this type of system involved the speed of the output detector which with the development of high speed communication links moved from the regime of 10s of MHz toward 10s of GHz. The earliest deployed systems involved civil structures including measurements of the strain fields on composite utility poles and missile bodies during break tests, bridges and freeways. This was followed by a series of developments that included high speed fiber grating sensors to support nondestructive testing via ultrasonic wave detection, high speed machining and monitoring ship hulls. Each of these applications involved monitoring mechanical motion of structures and thus interest was in speeds up to a few 10s of MHz. Most recently there has been interest in using fiber grating to monitor the very high speed events such as detonations and this has led to utilization of fiber gratings that are consumed during an event that may require detection speeds of hundreds of MHz and in the future multiple GHz.

Rapid single flux quantum logic in high temperature superconductor technology

NARCIS (Netherlands)

Shunmugavel, K.

2006-01-01

A Josephson junction is the basic element of rapid single flux quantum logic (RSFQ) circuits. A high operating speed and low power consumption are the main advantages of RSFQ logic over semiconductor electronic circuits. To realize complex RSFQ circuits in HTS technology one needs a reproducible

A reference Pelton turbine - High speed visualization in the rotating frame

Science.gov (United States)

Solemslie, Bjørn W.; Dahlhaug, Ole G.

2016-11-01

To enable a detailed study the flow mechanisms effecting the flow within the reference Pelton runner designed at the Waterpower Laboratory (NTNLT) a flow visualization system has been developed. The system enables high speed filming of the hydraulic surface of a single bucket in the rotating frame of reference. It is built with an angular borescopes adapter entering the turbine along the rotational axis and a borescope embedded within a bucket. A stationary high speed camera located outside the turbine housing has been connected to the optical arrangement by a non-contact coupling. The view point of the system includes the whole hydraulic surface of one half of a bucket. The system has been designed to minimize the amount of vibrations and to ensure that the vibrations felt by the borescope are the same as those affecting the camera. The preliminary results captured with the system are promising and enable a detailed study of the flow within the turbine.

Trigger Data Serializer ASIC chip for the ATLAS New Small Wheel sTGC Detector

CERN Document Server

Wang, Jinhong; The ATLAS collaboration

2014-01-01

The small-strip Thin-Gap Chambers (sTGC) will be used as both trigger and precision tracking muon detectors for the Phase-I upgrade of the ATLAS New Small Wheel (NSW) muon detector. Signals from both the sTGC pad and strip detectors will be first read out by the Amplifier-Shaper-Discriminator (ASD) chip designed by the Brookhaven National Laboratory, and then collected and transmitted by a Trigger Data Serializer (TDS) chip at a rate of 4.8 Gbps to other related circuits. The pad-TDS chip checks the presence of pad hits and sends the information together with Bunching Crossing ID to the pad-trigger logic to define roads of interest. The strip-TDS chip collects and buffers strip charge information and transmits a range of strips within the road of interest to the router board located on the rim of the NSW. The large number of input channels (128 differential input channels), short time available to prepare and transmit trigger data (<100 ns), high speed output data rate (4.8 Gbps), harsh radiation environme...

TARGET: A multi-channel digitizer chip for very-high-energy gamma-ray telescopes

Energy Technology Data Exchange (ETDEWEB)

Bechtol, K.; Funk, S.; /Stanford U., HEPL /KIPAC, Menlo Park; Okumura, A.; /JAXA, Sagamihara /Stanford U., HEPL /KIPAC, Menlo Park; Ruckman, L.; /Hawaii U.; Simons, A.; Tajima, H.; Vandenbroucke, J.; /Stanford U., HEPL /KIPAC, Menlo Park; Varner, G.; /Hawaii U.

2011-08-11

The next-generation very-high-energy (VHE) gamma-ray observatory, the Cherenkov Telescope Array, will feature dozens of imaging atmospheric Cherenkov telescopes (IACTs), each with thousands of pixels of photosensors. To be affordable and reliable, reading out such a mega-channel array requires event recording technology that is highly integrated and modular, with a low cost per channel. We present the design and performance of a chip targeted to this application: the TeV Array Readout with GSa/s sampling and Event Trigger (TARGET). This application-specific integrated circuit (ASIC) has 16 parallel input channels, a 4096-sample buffer for each channel, adjustable input termination, self-trigger functionality, and tight window-selected readout. We report the performance of TARGET in terms of sampling frequency, power consumption, dynamic range, current-mode gain, analog bandwidth, and cross talk. The large number of channels per chip allows a low cost per channel ($10 to $20 including front-end and back-end electronics but not including photosensors) to be achieved with a TARGET-based IACT readout system. In addition to basic performance parameters of the TARGET chip itself, we present a camera module prototype as well as a second-generation chip (TARGET 2), both of which have been produced.