Multifunctional epitaxial systems on silicon substrates

Energy Technology Data Exchange (ETDEWEB)

Singamaneni, Srinivasa Rao, E-mail: ssingam@ncsu.edu [Department of Materials Science and Engineering, North Carolina State University, Raleigh, North Carolina 27695 (United States); Materials Science Division, Army Research Office, Research Triangle Park, North Carolina 27709 (United States); Department of Physics, The University of Texas at El Paso, El Paso, Texas 79968 (United States); Prater, John Thomas [Department of Materials Science and Engineering, North Carolina State University, Raleigh, North Carolina 27695 (United States); Materials Science Division, Army Research Office, Research Triangle Park, North Carolina 27709 (United States); Narayan, Jagdish [Department of Materials Science and Engineering, North Carolina State University, Raleigh, North Carolina 27695 (United States)

2016-09-15

Multifunctional heterostructures can exhibit a wide range of functional properties, including colossal magneto-resistance, magnetocaloric, and multiferroic behavior, and can display interesting physical phenomena including spin and charge ordering and strong spin-orbit coupling. However, putting this functionality to work remains a challenge. To date, most of the work reported in the literature has dealt with heterostructures deposited onto closely lattice matched insulating substrates such as DyScO{sub 3}, SrTiO{sub 3} (STO), or STO buffered Si(100) using concepts of lattice matching epitaxy (LME). However, strain in heterostructures grown by LME is typically not fully relaxed and the layers contain detrimental defects such as threading dislocations that can significantly degrade the physical properties of the films and adversely affect the device characteristics. In addition, most of the substrates are incompatible with existing CMOS-based technology, where Si (100) substrates dominate. This review discusses recent advances in the integration of multifunctional oxide and non-oxide materials onto silicon substrates. An alternative thin film growth approach, called “domain matching epitaxy,” is presented which identifies approaches for minimizing lattice strain and unwanted defects in large misfit systems (7%–25% and higher). This approach broadly allows for the integration of multifunctional materials onto silicon substrates, such that sensing, computation, and response functions can be combined to produce next generation “smart” devices. In general, pulsed laser deposition has been used to epitaxially grow these materials, although the concepts developed here can be extended to other deposition techniques, as well. It will be shown that TiN and yttria-stabilized zirconia template layers provide promising platforms for the integration of new functionality into silicon-based computer chips. This review paper reports on a number of thin

Intrinsic gettering of nickel impuriy deep levels in silicon substrate ...

African Journals Online (AJOL)

The intrinsic gettering of nickel impurity in p-type silicon substrate has been investigated. The density of electrically active nickel in intentionally contaminated silicon was determined before and after oxygen precipitation by means of resistivity measurements. These data, coupled with minority carrier lifetime and infrared ...

Selective growth of carbon nanotube on silicon substrates

Institute of Scientific and Technical Information of China (English)

ZOU Xiao-ping; H. ABE; T. SHIMIZU; A. ANDO; H. TOKUMOT; ZHU Shen-ming; ZHOU Hao-shen

2006-01-01

The carbon nanotube (CNT) growth of iron oxide-deposited trench-patterns and the locally-ordered CNT arrays on silicon substrate were achieved by simple thermal chemical vapor deposition(STCVD) of ethanol vapor. The CNTs were uniformly synthesized with good selectivity on trench-patterned silicon substrates. This fabrication process is compatible with currently used semiconductor-processing technologies,and the carbon-nanotube fabrication process can be widely applied for the development of electronic devices using carbon-nanotube field emitters as cold cathodes and can revolutionize the area of field-emitting electronic devices. The site-selective growth of CNT from an iron oxide nanoparticle catalyst patterned were also achieved by drying-mediated self-assembly technique. The present method offers a simple and cost-effective method to grow carbon nanotubes with self-assembled patterns.

Vapor phase epitaxy of silicon on meso porous silicon for deposition on economical substrate and low cost photovoltaic application

International Nuclear Information System (INIS)

Quoizola, S.

2003-01-01

The silicon is more and more used in the industry. Meanwhile the production cost is a problem to solve to develop the photovoltaic cells production. This thesis presents a new technology based on the use of a meso-porous silicon upper layer,to grow the active silicon layer of 50 μm width. The photovoltaic cell is then realized, the device is removed and placed on a low cost substrate. The silicon substrate of beginning can be used again after cleaning. The first chapter presents the operating and the characteristics of the silicon photovoltaic cell. The second chapter is devoted to the growth technique, the vapor phase epitaxy, and the third chapter to the epitaxy layer. The chapter four deals with the porous silicon and the structure chosen in this study. The chapter five is devoted to the characterization of the epitaxy layer on porous silicon. The photovoltaic cells realized on these layers are presented in the last chapter. (A.L.B.)

Thin Single Crystal Silicon Solar Cells on Ceramic Substrates: November 2009 - November 2010

Energy Technology Data Exchange (ETDEWEB)

Kumar, A.; Ravi, K. V.

2011-06-01

In this program we have been developing a technology for fabricating thin (< 50 micrometres) single crystal silicon wafers on foreign substrates. We reverse the conventional approach of depositing or forming silicon on foreign substrates by depositing or forming thick (200 to 400 micrometres) ceramic materials on high quality single crystal silicon films ~ 50 micrometres thick. Our key innovation is the fabrication of thin, refractory, and self-adhering 'handling layers or substrates' on thin epitaxial silicon films in-situ, from powder precursors obtained from low cost raw materials. This 'handling layer' has sufficient strength for device and module processing and fabrication. Successful production of full sized (125 mm X 125 mm) silicon on ceramic wafers with 50 micrometre thick single crystal silicon has been achieved and device process flow developed for solar cell fabrication. Impurity transfer from the ceramic to the silicon during the elevated temperature consolidation process has resulted in very low minority carrier lifetimes and resulting low cell efficiencies. Detailed analysis of minority carrier lifetime, metals analysis and device characterization have been done. A full sized solar cell efficiency of 8% has been demonstrated.

Substrate and p-layer effects on polymorphous silicon solar cells

Directory of Open Access Journals (Sweden)

Abolmasov S.N.

2014-07-01

Full Text Available The influence of textured transparent conducting oxide (TCO substrate and p-layer on the performance of single-junction hydrogenated polymorphous silicon (pm-Si:H solar cells has been addressed. Comparative studies were performed using p-i-n devices with identical i/n-layers and back reflectors fabricated on textured Asahi U-type fluorine-doped SnO2, low-pressure chemical vapor deposited (LPCVD boron-doped ZnO and sputtered/etched aluminum-doped ZnO substrates. The p-layers were hydrogenated amorphous silicon carbon and microcrystalline silicon oxide. As expected, the type of TCO and p-layer both have a great influence on the initial conversion efficiency of the solar cells. However they have no effect on the defect density of the pm-Si:H absorber layer.

Spectroellipsometric detection of silicon substrate damage caused by radiofrequency sputtering of niobium oxide

Science.gov (United States)

Lohner, Tivadar; Serényi, Miklós; Szilágyi, Edit; Zolnai, Zsolt; Czigány, Zsolt; Khánh, Nguyen Quoc; Petrik, Péter; Fried, Miklós

2017-11-01

Substrate surface damage induced by deposition of metal atoms by radiofrequency (rf) sputtering or ion beam sputtering onto single-crystalline silicon (c-Si) surface has been characterized earlier by electrical measurements. The question arises whether it is possible to characterize surface damage using spectroscopic ellipsometry (SE). In our experiments niobium oxide layers were deposited by rf sputtering on c-Si substrates in gas mixture of oxygen and argon. Multiple angle of incidence spectroscopic ellipsometry measurements were performed, a four-layer optical model (surface roughness layer, niobium oxide layer, native silicon oxide layer and ion implantation-amorphized silicon [i-a-Si] layer on a c-Si substrate) was created in order to evaluate the spectra. The evaluations yielded thicknesses of several nm for the i-a-Si layer. Better agreement could be achieved between the measured and the generated spectra by inserting a mixed layer (with components of c-Si and i-a-Si applying the effective medium approximation) between the silicon oxide layer and the c-Si substrate. High depth resolution Rutherford backscattering (RBS) measurements were performed to investigate the interface disorder between the deposited niobium oxide layer and the c-Si substrate. Atomic resolution cross-sectional transmission electron microscopy investigation was applied to visualize the details of the damaged subsurface region of the substrate.

Synthesis and analysis of gold nanoclusters on silicon substrates by ion beams

International Nuclear Information System (INIS)

Sood, D.K.; Venkatachalam, D.K.; Bhargava, S.K.; Evans, P.J.

2005-01-01

To facilitate the growth of silica nanowires on silicon substrates, two different seeding techniques: 1) ion implantation and 2) chemical deposition of as-synthesised gold colloids have been compared for the formation of catalysing gold nanoclusters. The prepared substrates of both types were analysed using Rutherford backscattering spectrometry at ANSTO to determine the amount of gold and its depth distribution. The topography of the substrates deposited with chemically synthesised gold nanoparticles were studied under SEM. The preliminary ion beam (RBS) analysis has shown ion implantation as a novel technique for seeding Au nanoclusters on silicon substrates facilitating growth of nanowires. This method holds a great potential for using any metal across the periodic table that can act as catalysing seed nanoclusters for nanowire growth. The use of chemical deposition as a seeding technique to deposit as-synthesised gold nanoparticles requires further investigations. RBS results show significant difference in the depth distribution of the gold nanoparticles on silicon substrates seeded by two different techniques. (author). 6 refs., 4 figs

Investigation of carbon nanotube-containing film on silicon substrates and its tribological behavior

Energy Technology Data Exchange (ETDEWEB)

Sun, Zhiyong [School of Mechanical Engineering, Shanghai Jiao Tong University, Shanghai 200240 (China); Cheng, Xianhua, E-mail: xhcheng@sjtu.edu.cn [School of Mechanical Engineering, Shanghai Jiao Tong University, Shanghai 200240 (China); State Key Laboratory of Solid Lubrication, Lanzhou Institute of Chemical Physics, Chinese Academy of Sciences, Lanzhou 730000 (China)

2015-11-15

Highlights: • CNT-containing film was self-assembled on silicon substrates. • CNTs are strongly bonded with the substrates by chemical combination between La and oxygen-containing functional groups. • CNT-containing film has excellent friction reduction, load-carrying capacity and anti-wear ability. - Abstract: Carbon nanotubes (CNTs) were functionalized with Lanthanum (La) modifier and appropriate acid-treatment methods. CNT-containing film was deposited on silicon substrates via a self-assembly process. The formation and microstructure of La treated CNTs and CNT-containing film were characterized by high-resolution transmission electron microscopy (HRTEM), scanning electron microscopy (SEM), X-ray photoelectron spectrometry (XPS) and water contact angle (WCA). Its tribological properties were evaluated with a UMT-2MT reciprocating friction tester. The results show that CNTs were adsorbed on silicon substrates by means of chemically bonding between La and oxygen-containing functional groups. The friction coefficient of the silicon substrates is reduced from 0.87 to 0.12 after the deposition of CNT-containing film on its surface. CNT-containing film shows excellent antiwear, friction reducing ability and load-carrying capacity due to excellent mechanical and self-lubrication properties of CNTs.

A CMOS-compatible silicon substrate optimization technique and its application in radio frequency crosstalk isolation

International Nuclear Information System (INIS)

Li Chen; Liao Huailin; Huang Ru; Wang Yangyuan

2008-01-01

In this paper, a complementary metal-oxide semiconductor (CMOS)-compatible silicon substrate optimization technique is proposed to achieve effective isolation. The selective growth of porous silicon is used to effectively suppress the substrate crosstalk. The isolation structures are fabricated in standard CMOS process and then this post-CMOS substrate optimization technique is carried out to greatly improve the performances of crosstalk isolation. Three-dimensional electro-magnetic simulation is implemented to verify the obvious effect of our substrate optimization technique. The morphologies and growth condition of porous silicon fabricated have been investigated in detail. Furthermore, a thick selectively grown porous silicon (SGPS) trench for crosstalk isolation has been formed and about 20dB improvement in substrate isolation is achieved. These results demonstrate that our post-CMOS SGPS technique is very promising for RF IC applications. (cross-disciplinary physics and related areas of science and technology)

Intercalation of metals and silicon at the interface of epitaxial graphene and its substrates

International Nuclear Information System (INIS)

Huang Li; Xu Wen-Yan; Que Yan-De; Mao Jin-Hai; Meng Lei; Pan Li-Da; Li Geng; Wang Ye-Liang; Du Shi-Xuan; Gao Hong-Jun; Liu Yun-Qi

2013-01-01

Intercalations of metals and silicon between epitaxial graphene and its substrates are reviewed. For metal intercalation, seven different metals have been successfully intercalated at the interface of graphene/Ru(0001) and form different intercalated structures. Meanwhile, graphene maintains its original high quality after the intercalation and shows features of weakened interaction with the substrate. For silicon intercalation, two systems, graphene on Ru(0001) and on Ir(111), have been investigated. In both cases, graphene preserves its high quality and regains its original superlative properties after the silicon intercalation. More importantly, we demonstrate that thicker silicon layers can be intercalated at the interface, which allows the atomic control of the distance between graphene and the metal substrates. These results show the great potential of the intercalation method as a non-damaging approach to decouple epitaxial graphene from its substrates and even form a dielectric layer for future electronic applications. (topical review - low-dimensional nanostructures and devices)

Fabrication and characterization of surface barrier detector from commercial silicon substrate

International Nuclear Information System (INIS)

Costa, Fabio Eduardo da; Silva, Julio Batista Rodrigues da

2015-01-01

This work used 5 silicon substrates, n-type with resistivity between 500-20,000 Ω.cm, with 12 mm diameter and 1 mm thickness, from Wacker - Chemitronic, Germany. To produce the surface barrier detectors, the substrates were first cleaned, then, they were etched with HNO 3 solution. After this, a deposition of suitable materials on the crystal was made, to produce the desired population inversion of the crystal characteristics. The substrates received a 10 mm diameter gold contact in one of the surfaces and a 5 mm diameter aluminum in the other. The curves I x V and the energy spectra for 28 keV and 59 keV, for each of the produced detectors, were measured. From the 5 substrates, 4 of them resulted in detectors and one did not present even diode characteristics. The results showed that the procedures used are suitable to produce detectors with this type of silicon substrates. (author)

Silicon-on-insulator (SOI) active pixel sensors with the photosite implemented in the substrate

Science.gov (United States)

Zheng, Xinyu (Inventor); Pain, Bedabrata (Inventor)

2005-01-01

Active pixel sensors for a high quality imager are fabricated using a silicon-on-insulator (SOI) process by integrating the photodetectors on the SOI substrate and forming pixel readout transistors on the SOI thin-film. The technique can include forming silicon islands on a buried insulator layer disposed on a silicon substrate and selectively etching away the buried insulator layer over a region of the substrate to define a photodetector area. Dopants of a first conductivity type are implanted to form a signal node in the photodetector area and to form simultaneously drain/source regions for a first transistor in at least a first one of the silicon islands. Dopants of a second conductivity type are implanted to form drain/source regions for a second transistor in at least a second one of the silicon islands. Isolation rings around the photodetector also can be formed when dopants of the second conductivity type are implanted. Interconnections among the transistors and the photodetector are provided to allow signals sensed by the photodetector to be read out via the transistors formed on the silicon islands.

High performance multilayered nano-crystalline silicon/silicon-oxide light-emitting diodes on glass substrates

Energy Technology Data Exchange (ETDEWEB)

Darbari, S; Shahmohammadi, M; Mortazavi, M; Mohajerzadeh, S [Thin Film and Nano-Electronic Laboratory, School of ECE, University of Tehran, Tehran (Iran, Islamic Republic of); Abdi, Y [Nano-Physics Research Laboratory, Department of Physics, University of Tehran, Tehran (Iran, Islamic Republic of); Robertson, M; Morrison, T, E-mail: mohajer@ut.ac.ir [Department of Physics, Acadia University, Wolfville, NS (Canada)

2011-09-16

A low-temperature hydrogenation-assisted sequential deposition and crystallization technique is reported for the preparation of nano-scale silicon quantum dots suitable for light-emitting applications. Radio-frequency plasma-enhanced deposition was used to realize multiple layers of nano-crystalline silicon while reactive ion etching was employed to create nano-scale features. The physical characteristics of the films prepared using different plasma conditions were investigated using scanning electron microscopy, transmission electron microscopy, room temperature photoluminescence and infrared spectroscopy. The formation of multilayered structures improved the photon-emission properties as observed by photoluminescence and a thin layer of silicon oxy-nitride was then used for electrical isolation between adjacent silicon layers. The preparation of light-emitting diodes directly on glass substrates has been demonstrated and the electroluminescence spectrum has been measured.

Growth of carbon nanotubes by Fe-catalyzed chemical vapor processes on silicon-based substrates

Science.gov (United States)

Angelucci, Renato; Rizzoli, Rita; Vinciguerra, Vincenzo; Fortuna Bevilacqua, Maria; Guerri, Sergio; Corticelli, Franco; Passini, Mara

2007-03-01

In this paper, a site-selective catalytic chemical vapor deposition synthesis of carbon nanotubes on silicon-based substrates has been developed in order to get horizontally oriented nanotubes for field effect transistors and other electronic devices. Properly micro-fabricated silicon oxide and polysilicon structures have been used as substrates. Iron nanoparticles have been obtained both from a thin Fe film evaporated by e-gun and from iron nitrate solutions accurately dispersed on the substrates. Single-walled nanotubes with diameters as small as 1 nm, bridging polysilicon and silicon dioxide “pillars”, have been grown. The morphology and structure of CNTs have been characterized by SEM, AFM and Raman spectroscopy.

Evaluation of substrate noise suppression method to mitigate crosstalk among trough-silicon vias

Science.gov (United States)

Araga, Yuuki; Kikuchi, Katsuya; Aoyagi, Masahiro

2018-04-01

Substrate noise from a single through-silicon via (TSV) and the noise attenuation by a substrate tap and a guard ring are clarified. A CMOS test vehicle is designed, and 6-µm-diameter TSVs are manufactured on a 20-µm-thick silicon substrate by the via-last method. An on-chip waveform-capturing circuitry is embedded in the test vehicle to capture transient waveforms of substrate noise. The embedded waveform-capturing circuitry demonstrates small and local noise propagation. Experimental results show increased substrate noise level induced by TSVs and the effectiveness of the substrate tap and guard ring for mitigating the crosstalk among TSVs. An analytical model to explain substrate noise propagation is developed to validate experimental results. Results obtained using the substrate model with a multilayer mesh shows good consistency with experimental results, indicating that the model can be used for examination of noise suppression methods.

Nanopatterned Silicon Substrate Use in Heterojunction Thin Film Solar Cells Made by Magnetron Sputtering

Directory of Open Access Journals (Sweden)

Shao-Ze Tseng

2014-01-01

Full Text Available This paper describes a method for fabricating silicon heterojunction thin film solar cells with an ITO/p-type a-Si : H/n-type c-Si structure by radiofrequency magnetron sputtering. A short-circuit current density and efficiency of 28.80 mA/cm2 and 8.67% were achieved. Novel nanopatterned silicon wafers for use in cells are presented. Improved heterojunction cells are formed on a nanopatterned silicon substrate that is prepared with a self-assembled monolayer of SiO2 nanospheres with a diameter of 550 nm used as an etching mask. The efficiency of the nanopattern silicon substrate heterojunction cells was 31.49% greater than that of heterojunction cells on a flat silicon wafer.

Preparation of Mica and Silicon Substrates for DNA Origami Analysis and Experimentation

Science.gov (United States)

Pillers, Michelle A.; Shute, Rebecca; Farchone, Adam; Linder, Keenan P.; Doerfler, Rose; Gavin, Corey; Goss, Valerie; Lieberman, Marya

2015-01-01

The designed nature and controlled, one-pot synthesis of DNA origami provides exciting opportunities in many fields, particularly nanoelectronics. Many of these applications require interaction with and adhesion of DNA nanostructures to a substrate. Due to its atomically flat and easily cleaned nature, mica has been the substrate of choice for DNA origami experiments. However, the practical applications of mica are relatively limited compared to those of semiconductor substrates. For this reason, a straightforward, stable, and repeatable process for DNA origami adhesion on derivatized silicon oxide is presented here. To promote the adhesion of DNA nanostructures to silicon oxide surface, a self-assembled monolayer of 3-aminopropyltriethoxysilane (APTES) is deposited from an aqueous solution that is compatible with many photoresists. The substrate must be cleaned of all organic and metal contaminants using Radio Corporation of America (RCA) cleaning processes and the native oxide layer must be etched to ensure a flat, functionalizable surface. Cleanrooms are equipped with facilities for silicon cleaning, however many components of DNA origami buffers and solutions are often not allowed in them due to contamination concerns. This manuscript describes the set-up and protocol for in-lab, small-scale silicon cleaning for researchers who do not have access to a cleanroom or would like to incorporate processes that could cause contamination of a cleanroom CMOS clean bench. Additionally, variables for regulating coverage are discussed and how to recognize and avoid common sample preparation problems is described. PMID:26274888

Bidisperse silica nanoparticles close-packed monolayer on silicon substrate by three step spin method

Science.gov (United States)

Khanna, Sakshum; Marathey, Priyanka; Utsav, Chaliawala, Harsh; Mukhopadhyay, Indrajit

2018-05-01

We present the studies on the structural properties of monolayer Bidisperse silica (SiO2) nanoparticles (BDS) on Silicon (Si-100) substrate using spin coating technique. The Bidisperse silica nanoparticle was synthesised by the modified sol-gel process. Nanoparticles on the substrate are generally assembled in non-close/close-packed monolayer (CPM) form. The CPM form is obtained by depositing the colloidal suspension onto the silicon substrate using complex techniques. Here we report an effective method for forming a monolayer of bidisperse silica nanoparticle by three step spin coating technique. The samples were prepared by mixing the monodisperse solutions of different particles size 40 and 100 nm diameters. The bidisperse silica nanoparticles were self-assembled on the silicon substrate forming a close-packed monolayer film. The scanning electron microscope images of bidisperse films provided in-depth film structure of the film. The maximum surface coverage obtained was around 70-80%.

Formation of Al2O3-HfO2 Eutectic EBC Film on Silicon Carbide Substrate

Directory of Open Access Journals (Sweden)

Kyosuke Seya

2015-01-01

Full Text Available The formation mechanism of Al2O3-HfO2 eutectic structure, the preparation method, and the formation mechanism of the eutectic EBC layer on the silicon carbide substrate are summarized. Al2O3-HfO2 eutectic EBC film is prepared by optical zone melting method on the silicon carbide substrate. At high temperature, a small amount of silicon carbide decomposed into silicon and carbon. The components of Al2O3 and HfO2 in molten phase also react with the free carbon. The Al2O3 phase reacts with free carbon and vapor species of AlO phase is formed. The composition of the molten phase becomes HfO2 rich from the eutectic composition. HfO2 phase also reacts with the free carbon and HfC phase is formed on the silicon carbide substrate; then a high density intermediate layer is formed. The adhesion between the intermediate layer and the substrate is excellent by an anchor effect. When the solidification process finished before all of HfO2 phase is reduced to HfC phase, HfC-HfO2 functionally graded layer is formed on the silicon carbide substrate and the Al2O3-HfO2 eutectic structure grows from the top of the intermediate layer.

Optimization and characterization of biomolecule immobilization on silicon substrates using (3-aminopropyl)triethoxysilane (APTES) and glutaraldehyde linker

International Nuclear Information System (INIS)

Gunda, Naga Siva Kumar; Singh, Minashree; Norman, Lana; Kaur, Kamaljit; Mitra, Sushanta K.

2014-01-01

In the present work, we developed and optimized a technique to produce a thin, stable silane layer on silicon substrate in a controlled environment using (3-aminopropyl)triethoxysilane (APTES). The effect of APTES concentration and silanization time on the formation of silane layer is studied using spectroscopic ellipsometry and Fourier transform infrared spectroscopy (FTIR). Biomolecules of interest are immobilized on optimized silane layer formed silicon substrates using glutaraldehyde linker. Surface analytical techniques such as ellipsometry, FTIR, contact angle measurement system, and atomic force microscopy are employed to characterize the bio-chemically modified silicon surfaces at each step of the biomolecule immobilization process. It is observed that a uniform, homogenous and highly dense layer of biomolecules are immobilized with optimized silane layer on the silicon substrate. The developed immobilization method is successfully implemented on different silicon substrates (flat and pillar). Also, different types of biomolecules such as anti-human IgG (rabbit monoclonal to human IgG), Listeria monocytogenes, myoglobin and dengue capture antibodies were successfully immobilized. Further, standard sandwich immunoassay (antibody–antigen–antibody) is employed on respective capture antibody coated silicon substrates. Fluorescence microscopy is used to detect the respective FITC tagged detection antibodies bound to the surface after immunoassay.

Optimization and characterization of biomolecule immobilization on silicon substrates using (3-aminopropyl)triethoxysilane (APTES) and glutaraldehyde linker

Energy Technology Data Exchange (ETDEWEB)

Gunda, Naga Siva Kumar [Department of Mechanical Engineering, University of Alberta, Edmonton, Canada T6G 2G8 (Canada); Singh, Minashree [Department of Pharmacy and Pharmaceutical Sciences, University of Alberta, Edmonton, Canada T6G 1C9 (Canada); Norman, Lana [Department of Chemical and Materials Engineering, University of Alberta, Edmonton, AB, Canada T6G 2V4 (Canada); Kaur, Kamaljit [Department of Pharmacy and Pharmaceutical Sciences, University of Alberta, Edmonton, Canada T6G 1C9 (Canada); Mitra, Sushanta K., E-mail: sushanta.mitra@ualberta.ca [Department of Mechanical Engineering, University of Alberta, Edmonton, Canada T6G 2G8 (Canada)

2014-06-01

In the present work, we developed and optimized a technique to produce a thin, stable silane layer on silicon substrate in a controlled environment using (3-aminopropyl)triethoxysilane (APTES). The effect of APTES concentration and silanization time on the formation of silane layer is studied using spectroscopic ellipsometry and Fourier transform infrared spectroscopy (FTIR). Biomolecules of interest are immobilized on optimized silane layer formed silicon substrates using glutaraldehyde linker. Surface analytical techniques such as ellipsometry, FTIR, contact angle measurement system, and atomic force microscopy are employed to characterize the bio-chemically modified silicon surfaces at each step of the biomolecule immobilization process. It is observed that a uniform, homogenous and highly dense layer of biomolecules are immobilized with optimized silane layer on the silicon substrate. The developed immobilization method is successfully implemented on different silicon substrates (flat and pillar). Also, different types of biomolecules such as anti-human IgG (rabbit monoclonal to human IgG), Listeria monocytogenes, myoglobin and dengue capture antibodies were successfully immobilized. Further, standard sandwich immunoassay (antibody–antigen–antibody) is employed on respective capture antibody coated silicon substrates. Fluorescence microscopy is used to detect the respective FITC tagged detection antibodies bound to the surface after immunoassay.

Defects study of hydrogenated amorphous silicon samples and their relation with the substrate and deposition conditions

International Nuclear Information System (INIS)

Darwich, R.

2009-07-01

The goal of this work is to study the properties of the defects aiming to explore the types of defects and the effect of various deposition parameters such as substrate temperature, the kind of the substrate, gas pressure and deposition rate. Two kinds of samples have been used; The first one was a series of Schottky diodes, and the second one a series of solar cells (p-i-n junction) deposited on crystalline silicon or on corning glass substrates with different deposition parameters. The deposition parameters were chosen to obtain materials whose their structures varying from amorphous to microcrystalline silicon including polymorphous silicon. Our results show that the polymorphous silicon samples deposited at high deposition rates present the best photovoltaic properties in comparison with those deposited at low rates. Also we found that the defects concentration in high deposition rate samples is less at least by two orders than that obtained in low deposition rate polymorphous, microcrystalline and amorphous samples. This study shows also that there is no effect of the substrate, or the thin films of highly doped amorphous silicon deposited on the substrate, on the creation and properties of these defects. Finally, different experimental methods have been used; a comparison between their results has been presented. (author)

Investigations of different doping concentration of phosphorus and boron into silicon substrate on the variable temperature Raman characteristics

Science.gov (United States)

Li, Xiaoli; Ding, Kai; Liu, Jian; Gao, Junxuan; Zhang, Weifeng

2018-01-01

Different doped silicon substrates have different device applications and have been used to fabricate solar panels and large scale integrated circuits. The thermal transport in silicon substrates are dominated by lattice vibrations, doping type, and doping concentration. In this paper, a variable-temperature Raman spectroscopic system is applied to record the frequency and linewidth changes of the silicon peak at 520 cm-1 in five chips of silicon substrate with different doping concentration of phosphorus and boron at the 83K to 1473K temperature range. The doping has better heat sensitive to temperature on the frequency shift over the low temperature range from 83K to 300K but on FWHM in high temperature range from 300K to 1473K. The results will be helpful for fundamental study and practical applications of silicon substrates.

Chemical resistivity of self-assembled monolayer covalently attached to silicon substrate to hydrofluoric acid and ammonium fluoride

Science.gov (United States)

Saito, N.; Youda, S.; Hayashi, K.; Sugimura, H.; Takai, O.

2003-06-01

Self-assembled monolayers (SAMs) were prepared on hydrogen-terminated silicon substrates through chemical vapor deposition using 1-hexadecene (HD) as a precursor. The HD-SAMs prepared in an atmosphere under a reduced pressure (≈50 Pa) showed better chemical resistivities to hydrofluoric acid and ammonium fluoride (NH 4F) solutions than that of an organosilane SAM formed on oxide-covered silicon substrates. The surface covered with the HD-SAM was micro-patterned by vacuum ultraviolet photolithography and consequently divided into two areas terminated with HD-SAM or silicon dioxide. This micro-patterned sample was immersed in a 40 vol.% NH 4F aqueous solution. Surface images obtained by an optical microscopy clearly show that the micro-patterns of HD-SAM/silicon dioxide were successfully transferred into the silicon substrate.

Flexible and tunable silicon photonic circuits on plastic substrates

Science.gov (United States)

Chen, Yu; Li, Huan; Li, Mo

2012-09-01

Flexible microelectronics has shown tremendous promise in a broad spectrum of applications, especially those that cannot be addressed by conventional microelectronics in rigid materials and constructions. These unconventional yet important applications range from flexible consumer electronics to conformal sensor arrays and biomedical devices. A recent paradigm shift in implementing flexible electronics is to physically transfer highly integrated devices made in high-quality, crystalline semiconductors on to plastic substrates. Here we demonstrate a flexible form of silicon photonics using the transfer-and-bond fabrication method. Photonic circuits including interferometers and resonators have been transferred onto flexible plastic substrates with preserved functionalities and performance. By mechanically deforming, the optical characteristics of the devices can be tuned reversibly over a remarkably large range. The demonstration of the new flexible photonic systems based on the silicon-on-plastic (SOP) platform could open the door to many future applications, including tunable photonics, optomechanical sensors and biomechanical and bio-photonic probes.

Characterization of defects in hydrogenated amorphous silicon deposited on different substrates by capacitance techniques

International Nuclear Information System (INIS)

Darwich, R.; Roca i Cabarrocas, P.

2011-01-01

Hydrogenated amorphous silicon (a-Si:H) thin films deposited on crystalline silicon and Corning glass substrate were analyzed using different capacitance techniques. The distribution of localized states and some electronic properties were studied using the temperature, frequency and bias dependence of the Schottky barrier capacitance and deep level transient spectroscopy. Our results show that the distribution of the gap states depends on the type of substrate. We have found that the films deposited on c-Si substrate represent only one positively charged or prerelaxed neutral deep state and one interface state, while the films deposited on glass substrate have one interface state and three types of deep defect states, positively or prerelaxed neutral, neutral and negatively charged.

Growth of misfit dislocation-free p/p+ thick epitaxial silicon wafers on Ge-B-codoped substrates

International Nuclear Information System (INIS)

Jiang Huihua; Yang Deren; Ma Xiangyang; Tian Daxi; Li Liben; Que Duanlin

2006-01-01

The growth of p/p + silicon epitaxial silicon wafers (epi-wafers) without misfit dislocations has been successfully achieved by using heavily boron-doped Czochralski (CZ) silicon wafers codoped with desirable level of germanium as the substrates. The lattice compensation by codoping of germanium and boron into the silicon matrix to reduce the lattice mismatch between the substrate (heavily boron-doped) and epi-layer (lightly boron-doped) is the basic idea underlying in the present achievement. In principle, the codoping of germanium and boron in the CZ silicon can be tailored to achieve misfit dislocation-free epi-layer with required thickness. It is reasonably expected that the presented solution to elimination of misfit dislocations in the p/p + silicon wafers can be applied in the volume production

Electron-spin-resonance study of radiation-induced paramagnetic defects in oxides grown on (100) silicon substrates

International Nuclear Information System (INIS)

Kim, Y.Y.; Lenahan, P.M.

1988-01-01

We have used electron-spin resonance to investigate radiation-induced point defects in Si/SiO 2 structures with (100) silicon substrates. We find that the radiation-induced point defects are quite similar to defects generated in Si/SiO 2 structures grown on (111) silicon substrates. In both cases, an oxygen-deficient silicon center, the E' defect, appears to be responsible for trapped positive charge. In both cases trivalent silicon (P/sub b/ centers) defects are primarily responsible for radiation-induced interface states. In earlier electron-spin-resonance studies of unirradiated (100) substrate capacitors two types of P/sub b/ centers were observed; in oxides prepared in three different ways only one of these centers, the P/sub b/ 0 defect, is generated in large numbers by ionizing radiation

Substrate and Passivation Techniques for Flexible Amorphous Silicon-Based X-ray Detectors.

Science.gov (United States)

Marrs, Michael A; Raupp, Gregory B

2016-07-26

Flexible active matrix display technology has been adapted to create new flexible photo-sensing electronic devices, including flexible X-ray detectors. Monolithic integration of amorphous silicon (a-Si) PIN photodiodes on a flexible substrate poses significant challenges associated with the intrinsic film stress of amorphous silicon. This paper examines how altering device structuring and diode passivation layers can greatly improve the electrical performance and the mechanical reliability of the device, thereby eliminating one of the major weaknesses of a-Si PIN diodes in comparison to alternative photodetector technology, such as organic bulk heterojunction photodiodes and amorphous selenium. A dark current of 0.5 pA/mm² and photodiode quantum efficiency of 74% are possible with a pixelated diode structure with a silicon nitride/SU-8 bilayer passivation structure on a 20 µm-thick polyimide substrate.

Characterization of nanostructured CuO-porous silicon matrixformed on copper coated silicon substrate via electrochemical etching

International Nuclear Information System (INIS)

Naddaf, M.; Mrad, O.; Al-Zier, A.

2015-01-01

A pulsed anodic etching method has been utilized for nanostructuring of a copper-coated p-type (100) silicon substrate, using HF-based solution as electrolyte. Scanning electron microscopy reveals the formation of a nanostructured matrix that consists of island-like textures with nanosize grains grown onto fiber-like columnar structures separated with etch pits of grooved porous structures. Spatial micro-Raman scattering analysis indicates that the island-like texture is composed of single-phase cupric oxide (CuO) nanocrystals, while the grooved porous structure is barely related to formation of porous silicon (PS). X-ray diffraction shows that both the grown CuO nanostructures and the etched silicon layer have the same preferred (220) orientation. Chemical composition obtained by means of X-ray photoelectron spectroscopic (XPS) analysis confirms the presence of the single-phase CuO on the surface of the patterned CuO-PS matrix. As compared to PS formed on the bare silicon substrate, the room-temperature photoluminescence (PL) from the CuO-PS matrix exhibits an additional weak (blue) PL band as well as a blue shift in the PL band of PS (S-band). This has been revealed from XPS analysis to be associated with the enhancement in the SiO2 content as well as formation of the carbonyl group on the surface in the case of the CuO-PS matrix.(author)

Process for depositing an oxide epitaxially onto a silicon substrate and structures prepared with the process

Science.gov (United States)

McKee, Rodney A.; Walker, Frederick J.

1993-01-01

A process and structure involving a silicon substrate utilizes an ultra high vacuum and molecular beam epitaxy (MBE) methods to grow an epitaxial oxide film upon a surface of the substrate. As the film is grown, the lattice of the compound formed at the silicon interface becomes stabilized, and a base layer comprised of an oxide having a sodium chloride-type lattice structure grows epitaxially upon the compound so as to cover the substrate surface. A perovskite may then be grown epitaxially upon the base layer to render a product which incorporates silicon, with its electronic capabilities, with a perovskite having technologically-significant properties of its own.

Novel method of separating macroporous arrays from p-type silicon substrate

International Nuclear Information System (INIS)

Peng Bobo; Wang Fei; Liu Tao; Yang Zhenya; Wang Lianwei; Fu, Ricky K. Y.; Chu, Paul K.

2012-01-01

This paper presents a novel method to fabricate separated macroporous silicon using a single step of photo-assisted electrochemical etching. The method is applied to fabricate silicon microchannel plates in 100 mm p-type silicon wafers, which can be used as electron multipliers and three-dimensional Li-ion microbatteries. Increasing the backside illumination intensity and decreasing the bias simultaneously can generate additional holes during the electrochemical etching which will create lateral etching at the pore tips. In this way the silicon microchannel can be separated from the substrate when the desired depth is reached, then it can be cut into the desired shape by using a laser cutting machine. Also, the mechanism of lateral etching is proposed. (semiconductor materials)

Silicon nitride and intrinsic amorphous silicon double antireflection coatings for thin-film solar cells on foreign substrates

International Nuclear Information System (INIS)

Li, Da; Kunz, Thomas; Wolf, Nadine; Liebig, Jan Philipp; Wittmann, Stephan; Ahmad, Taimoor; Hessmann, Maik T.; Auer, Richard; Göken, Mathias; Brabec, Christoph J.

2015-01-01

Hydrogenated intrinsic amorphous silicon (a-Si:H) was investigated as a surface passivation method for crystalline silicon thin film solar cells on graphite substrates. The results of the experiments, including quantum efficiency and current density-voltage measurements, show improvements in cell performance. This improvement is due to surface passivation by an a-Si:H(i) layer, which increases the open circuit voltage and the fill factor. In comparison with our previous work, we have achieved an increase of 0.6% absolute cell efficiency for a 40 μm thick 4 cm 2 aperture area on the graphite substrate. The optical properties of the SiN x /a-Si:H(i) stack were studied using spectroscopic ellipsometer techniques. Scanning transmission electron microscopy inside a scanning electron microscope was applied to characterize the cross section of the SiN x /a-Si:H(i) stack using focus ion beam preparation. - Highlights: • We report a 10.8% efficiency for thin-film silicon solar cell on graphite. • Hydrogenated intrinsic amorphous silicon was applied for surface passivation. • SiN x /a-Si:H(i) stacks were characterized by spectroscopic ellipsometer techniques. • Cross-section micrograph was obtained by scanning transmission electron microscopy. • Quantum efficiency and J-V measurements show improvements in the cell performance

INFLUENCE OF THE SILICON INTERLAYER ON DIAMOND-LIKE CARBON FILMS DEPOSITED ON GLASS SUBSTRATES

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Deiler Antonio Lima Oliveira

2012-06-01

Full Text Available Diamond-like carbon (DLC films as a hard protective coating have achieved great success in a diversity of technological applications. However, adhesion of DLC films to substrates can restrict their applications. The influence of a silicon interlayer in order to improve DLC adhesion on glass substrates was investigated. Amorphous silicon interlayer and DLC films were deposited using plasma enhanced chemical vapor deposition from silane and methane, respectively. The bonding structure, transmittance, refraction index, and adherence of the films were also evaluated regarding the thickness of the silicon interlayer. Raman scattering spectroscopy did not show any substantial difference in DLC structure due to the interlayer thickness of the silicon. Optical measurements showed a sharp decrease of transmittance in the ultra-violet region caused by the fundamental absorption of the light. In addition, the absorption edge of transmittance shifted toward longer wavelength side in the ultra-violet region as the thickness of the silicon interlayer increased. The tribological results showed an increase of DLC adherence as the silicon interlayer increased, which was characterized by less cracks around the grooves.

Progress in the Development of SERS-Active Substrates Based on Metal-Coated Porous Silicon.

Science.gov (United States)

Bandarenka, Hanna V; Girel, Kseniya V; Zavatski, Sergey A; Panarin, Andrei; Terekhov, Sergei N

2018-05-21

The present work gives an overview of the developments in surface-enhanced Raman scattering (SERS) with metal-coated porous silicon used as an active substrate. We focused this review on the research referenced to SERS-active materials based on porous silicon, beginning from the patent application in 2002 and enclosing the studies of this year. Porous silicon and metal deposition technologies are discussed. Since the earliest studies, a number of fundamentally different plasmonic nanostructures including metallic dendrites, quasi-ordered arrays of metallic nanoparticles (NPs), and metallic nanovoids have been grown on porous silicon, defined by the morphology of this host material. SERS-active substrates based on porous silicon have been found to combine a high and well-reproducible signal level, storage stability, cost-effective technology and handy use. They make it possible to identify and study many compounds including biomolecules with a detection limit varying from milli- to femtomolar concentrations. The progress reviewed here demonstrates the great prospects for the extensive use of the metal-coated porous silicon for bioanalysis by SERS-spectroscopy.

Progress in the Development of SERS-Active Substrates Based on Metal-Coated Porous Silicon

Directory of Open Access Journals (Sweden)

Hanna V. Bandarenka

2018-05-01

Full Text Available The present work gives an overview of the developments in surface-enhanced Raman scattering (SERS with metal-coated porous silicon used as an active substrate. We focused this review on the research referenced to SERS-active materials based on porous silicon, beginning from the patent application in 2002 and enclosing the studies of this year. Porous silicon and metal deposition technologies are discussed. Since the earliest studies, a number of fundamentally different plasmonic nanostructures including metallic dendrites, quasi-ordered arrays of metallic nanoparticles (NPs, and metallic nanovoids have been grown on porous silicon, defined by the morphology of this host material. SERS-active substrates based on porous silicon have been found to combine a high and well-reproducible signal level, storage stability, cost-effective technology and handy use. They make it possible to identify and study many compounds including biomolecules with a detection limit varying from milli- to femtomolar concentrations. The progress reviewed here demonstrates the great prospects for the extensive use of the metal-coated porous silicon for bioanalysis by SERS-spectroscopy.

Self-assembled monolayers of perfluoroalkylsilane on plasma-hydroxylated silicon substrates

Energy Technology Data Exchange (ETDEWEB)

Wu, Lin; Cai, Lu; Liu, Anqi; Wang, Wei; Yuan, Yanhua [College of Textile, Clothing Engineering, Soochow University, Suzhou 215021 (China); National Engineering Laboratory for Modern Silk, Suzhou 215123 (China); Li, Zhanxiong, E-mail: lizhanxiong@suda.edu.cn [College of Textile, Clothing Engineering, Soochow University, Suzhou 215021 (China); State Key Laboratory of Disaster Prevention & Mitigation of Explosion & Impact, Nanjing 210007 (China)

2015-09-15

Highlights: • A novel kind of fluoroalkylsilane monomers with different fluoroalkyl chain length was synthesized. • The fluoroalkyl-terminated self-assembled monolayers (SAMs) on silanol-terminated silicon substrates were chemically fabricated using the liquid phase deposition method. • Fluoroalkylsilanes were used for the self-assembly rather than the silane coupling agents and fluorochemicals to fabricate controllable, ordered SAMs. • The angle-dependent XPS study was conducted to investigate the changes of surface structures as well as elemental compositions of the SAMs. • The results indicated that fluoroalkyl groups would migrate from the inner part of the monolayers to the outermost interface after heat treatment, resulting into the microphase separation of the SAMs surface. - Abstract: In this study, a novel kind of fluoroalkylsilane monomers with different fluoroalkyl chain lengths was synthesized via three steps method and characterized by Fourier transform infrared (FT-IR) spectroscopy, {sup 1}H and {sup 19}F nuclear magnetic resonance ({sup 1}H NMR and {sup 19}F NMR), and mass spectra (MS). Fluoroalkyl-terminated self-assembled monolayers (SAMs) on silanol-terminated silicon substrates (O{sub 2} plasma treatment) were chemically fabricated via –Si–O– covalent bonds using the liquid phase deposition method (LPD). The wetabilities of the SAMs were characterized by water contact angles (CA), surface free energies and adhesive force (AF) measurements. 3-(1H,1H,2H,2H-perfluorooctyloxycarbonyl) -propionamidepropyl-triethoxysilane (PFOPT) assembled monolayer was chosen for in-depth investigation as its CA was higher than the others. Attenuated total reflection infrared spectroscopy (ATR-IR) and X-ray photoelectron spectroscopy (XPS) were used to validate the attachment of PFOPT on the silicon substrate, together with the chemical composition and structure of the SAMs. The surface morphologies and roughness of the monolayers were obtained and

Metal Nanoparticles Deposited on Porous Silicon Templates as Novel Substrates for SERS

Directory of Open Access Journals (Sweden)

Lara Mikac

2015-12-01

Full Text Available In this paper, results on preparation of stable and uniform SERS solid substrates using macroporous silicon (pSi with deposited silver and gold are presented. Macroporous silicon is produced by anodisation of p-type silicon in hydrofluoric acid. The as prepared pSi is then used as a template for Ag and Au depositions. The noble metals were deposited in three different ways: by immersion in silver nitrate solution, by drop-casting silver colloidal solution and by pulsed laser ablation (PLA. Substrates obtained by different deposition processes were evaluated for SERS efficiency using methylene blue (MB and rhodamine 6G (R6G at 514.5, 633 and 785 nm. Using 514.5 nm excitation and R6G the limits of detection (LOD for macroporous Si samples with noble metal nanostructures obtained by immersion of pSi sample in silver nitrate solution and by applying silver colloidal solution to pSi template were 10–9 M and 10–8 M respectively. Using 633 nm laser and MB the most noticeable SERS activity gave pSi samples ablated with 30000 and 45000 laser pulses where the LODs of 10–10 M were obtained. The detection limit of 10–10 M was also reached for 4 mA cm–2-15 min pSi sample, silver ablated with 30000 pulses. Macroporous silicon proved to be a good base for the preparation of SERS substrates.

Fabrication and characterization of surface barrier detector from commercial silicon substrate

International Nuclear Information System (INIS)

Silva, Julio Batista Rodrigues

2016-01-01

In this work it was developed radiation detectors silicon surface barrier that were capable of detecting the presence of gamma radiation from a low energy of iodine-125 seeds used in brachytherapy treatments. >From commercial silicon substrates detectors were developed, one sequence left of chemical treatments to the surfaces of these substrates with the intention of minimizing the possible noise generated, validation of the samples obtained as diodes, ensuring detector characteristics and effective use as detector for Iodine-125 radioactive sources with energy of about 25 keV and Americium-251 with energy on the order of 59 keV. Finished performing the analysis of the obtained energy spectra and so it was possible to observe the ability of these detectors to measure the energy from these seeds. (author)

Characterization of nanostructured CuO-porous silicon matrix formed on copper-coated silicon substrate via electrochemical etching

Science.gov (United States)

Naddaf, M.; Mrad, O.; Al-zier, A.

2014-06-01

A pulsed anodic etching method has been utilized for nanostructuring of a copper-coated p-type (100) silicon substrate, using HF-based solution as electrolyte. Scanning electron microscopy reveals the formation of a nanostructured matrix that consists of island-like textures with nanosize grains grown onto fiber-like columnar structures separated with etch pits of grooved porous structures. Spatial micro-Raman scattering analysis indicates that the island-like texture is composed of single-phase cupric oxide (CuO) nanocrystals, while the grooved porous structure is barely related to formation of porous silicon (PS). X-ray diffraction shows that both the grown CuO nanostructures and the etched silicon layer have the same preferred (220) orientation. Chemical composition obtained by means of X-ray photoelectron spectroscopic (XPS) analysis confirms the presence of the single-phase CuO on the surface of the patterned CuO-PS matrix. As compared to PS formed on the bare silicon substrate, the room-temperature photoluminescence (PL) from the CuO-PS matrix exhibits an additional weak `blue' PL band as well as a blue shift in the PL band of PS (S-band). This has been revealed from XPS analysis to be associated with the enhancement in the SiO2 content as well as formation of the carbonyl group on the surface in the case of the CuO-PS matrix.

Effects of varying oxygen partial pressure on molten silicon-ceramic substrate interactions

Science.gov (United States)

Ownby, D. P.; Barsoum, M. W.

1980-01-01

The silicon sessile drop contact angle was measured on hot pressed silicon nitride, silicon nitride coated on hot pressed silicon nitride, silicon carbon coated on graphite, and on Sialon to determine the degree to which silicon wets these substances. The post-sessile drop experiment samples were sectioned and photomicrographs were taken of the silicon-substrate interface to observe the degree of surface dissolution and degradation. Of these materials, silicon did not form a true sessile drop on the SiC on graphite due to infiltration of the silicon through the SiC coating, nor on the Sialon due to the formation of a more-or-less rigid coating on the liquid silicon. The most wetting was obtained on the coated Si3N4 with a value of 42 deg. The oxygen concentrations in a silicon ribbon furnace and in a sessile drop furnace were measured using the protable thoria-yttria solid solution electrolyte oxygen sensor. Oxygen partial pressures of 10 to the minus 7 power atm and 10 to the minus 8 power atm were obtained at the two facilities. These measurements are believed to represent nonequilibrium conditions.

Porous Silicon Covered with Silver Nanoparticles as Surface-Enhanced Raman Scattering (SERS) Substrate for Ultra-Low Concentration Detection.

Science.gov (United States)

Kosović, Marin; Balarin, Maja; Ivanda, Mile; Đerek, Vedran; Marciuš, Marijan; Ristić, Mira; Gamulin, Ozren

2015-12-01

Microporous and macro-mesoporous silicon templates for surface-enhanced Raman scattering (SERS) substrates were produced by anodization of low doped p-type silicon wafers. By immersion plating in AgNO3, the templates were covered with silver metallic film consisting of different silver nanostructures. Scanning electron microscopy (SEM) micrographs of these SERS substrates showed diverse morphology with significant difference in an average size and size distribution of silver nanoparticles. Ultraviolet-visible-near-infrared (UV-Vis-NIR) reflection spectroscopy showed plasmonic absorption at 398 and 469 nm, which is in accordance with the SEM findings. The activity of the SERS substrates was tested using rhodamine 6G (R6G) dye molecules and 514.5 nm laser excitation. Contrary to the microporous silicon template, the SERS substrate prepared from macro-mesoporous silicon template showed significantly broader size distribution of irregular silver nanoparticles as well as localized surface plasmon resonance closer to excitation laser wavelength. Such silver morphology has high SERS sensitivity that enables ultralow concentration detection of R6G dye molecules up to 10(-15) M. To our knowledge, this is the lowest concentration detected of R6G dye molecules on porous silicon-based SERS substrates, which might even indicate possible single molecule detection.

Collapsed adhesion of carbon nanotubes on silicon substrates: continuum mechanics and atomistic simulations

Science.gov (United States)

Yuan, Xuebo; Wang, Youshan

2018-02-01

Carbon nanotubes (CNTs) can undergo collapse from the ordinary cylindrical configurations to bilayer ribbons when adhered on substrates. In this study, the collapsed adhesion of CNTs on the silicon substrates is investigated using both classical molecular dynamics (MD) simulations and continuum analysis. The governing equations and transversality conditions are derived based on the minimum potential energy principle and the energy-variational method, considering both the van der Waals interactions between CNTs and substrates and those inside CNTs. Closed-form solutions for the collapsed configuration are obtained which show good agreement with the results of MD simulations. The stability of adhesive configurations is investigated by analyzing the energy states. It is found that the adhesive states of single-walled CNTs (SWCNTs) (n, n) on the silicon substrates can be categorized by two critical radii, 0.716 and 0.892 nm. For SWCNTs with radius larger than 0.892 nm, they would fully collapse on the silicon substrates. For SWCNTs with radius less than 0.716 nm, the initial cylindrical configuration is energetically favorable. For SWCNTs with radius between two critical radii, the radially deformed state is metastable. The non-contact ends of all collapsed SWCNTs are identical with the same arc length of 2.38 nm. Finally, the role of number of walls on the adhesive configuration is investigated quantitatively. For multi-walled CNTs with the number of walls exceeding a certain value, the cylindrical configuration is stable due to the increasing bending stiffness. The present study can be useful for the design of CNT-based nanodevices.

Crystallization and growth of Ni-Si alloy thin films on inert and on silicon substrates

Science.gov (United States)

Grimberg, I.; Weiss, B. Z.

1995-04-01

The crystallization kinetics and thermal stability of NiSi2±0.2 alloy thin films coevaporated on two different substrates were studied. The substrates were: silicon single crystal [Si(100)] and thermally oxidized silicon single crystal. In situ resistance measurements, transmission electron microscopy, x-ray diffraction, Auger electron spectroscopy, and Rutherford backscattering spectroscopy were used. The postdeposition microstructure consisted of a mixture of amorphous and crystalline phases. The amorphous phase, independent of the composition, crystallizes homogeneously to NiSi2 at temperatures lower than 200 °C. The activation energy, determined in the range of 1.4-2.54 eV, depends on the type of the substrate and on the composition of the alloyed films. The activation energy for the alloys deposited on the inert substrate was found to be lower than for the alloys deposited on silicon single crystal. The lowest activation energy was obtained for nonstoichiometric NiSi2.2, the highest for NiSi2—on both substrates. The crystallization mode depends on the structure of the as-deposited films, especially the density of the existing crystalline nuclei. Substantial differences were observed in the thermal stability of the NiSi2 compound on both substrates. With the alloy films deposited on the Si substrate, only the NiSi2 phase was identified after annealing to temperatures up to 800 °C. In the films deposited on the inert substrate, NiSi and NiSi2 phases were identified when the Ni content in the alloy exceeded 33 at. %. The effects of composition and the type of substrate on the crystallization kinetics and thermal stability are discussed.

Titanium disilicide formation by sputtering of titanium on heated silicon substrate

Science.gov (United States)

Tanielian, M.; Blackstone, S.

1984-09-01

We have sputter deposited titanium on bare silicon substrates at elevated temperatures. We find that at a substrate temperature of about 515 °C titanium silicide is formed due to the reaction of the titanium with the Si. The resistivity of the silicide is about 15 μΩ cm and it is not etchable in a selective titanium etch. This process can have applications in low-temperature, metal-oxide-semiconductor self-aligned silicide formation for very large scale integrated

Growth of Gold-assisted Gallium Arsenide Nanowires on Silicon Substrates via Molecular Beam Epitaxy

Directory of Open Access Journals (Sweden)

Ramon M. delos Santos

2008-06-01

Full Text Available Gallium arsenide nanowires were grown on silicon (100 substrates by what is called the vapor-liquid-solid (VLS growth mechanism using a molecular beam epitaxy (MBE system. Good quality nanowires with surface density of approximately 108 nanowires per square centimeter were produced by utilizing gold nanoparticles, with density of 1011 nanoparticles per square centimeter, as catalysts for nanowire growth. X-ray diffraction measurements, scanning electron microscopy, transmission electron microscopy and Raman spectroscopy revealed that the nanowires are epitaxially grown on the silicon substrates, are oriented along the [111] direction and have cubic zincblende structure.

Monolithic amorphous silicon modules on continuous polymer substrate

Energy Technology Data Exchange (ETDEWEB)

Grimmer, D.P. (Iowa Thin Film Technologies, Inc., Ames, IA (United States))

1992-03-01

This report examines manufacturing monolithic amorphous silicon modules on a continuous polymer substrate. Module production costs can be reduced by increasing module performance, expanding production, and improving and modifying production processes. Material costs can be reduced by developing processes that use a 1-mil polyimide substrate and multilayers of low-cost material for the front encapsulant. Research to speed up a-Si and ZnO deposition rates is needed to improve throughputs. To keep throughput rates compatible with depositions, multibeam fiber optic delivery systems for laser scribing can be used. However, mechanical scribing systems promise even higher throughputs. Tandem cells and production experience can increase device efficiency and stability. Two alternative manufacturing processes are described: (1) wet etching and sheet handling and (2) wet etching and roll-to-roll fabrication.

Very high frequency plasma deposited amorphous/nanocrystalline silicon tandem solar cells on flexible substrates

NARCIS (Netherlands)

Liu, Y.|info:eu-repo/dai/nl/304831743

2010-01-01

The work in this thesis is to develop high quality intrinsic layers (especially nc-Si:H) for micromorph silicon tandem solar cells/modules on plastic substrates following the substrate transfer method or knows as the Helianthos procedure. Two objectives are covered in this thesis: (1) preliminary

Aligned three-dimensional prismlike magnesium nanostructures realized onto silicon substrate

International Nuclear Information System (INIS)

Zhang Kaili; Rossi, Carole; Tenailleau, Christophe; Alphonse, Pierre

2008-01-01

A simple approach is proposed to realize three-dimensional (3D) prismlike Mg nanostructures, which has several advantages over previous investigations such as suitable for mass production, reduced impurities, tailored dimensions, and easier integration into microsystem. 3D Mg nanostructures are realized onto silicon substrate using a conventional thermal evaporator, where the incident angle of Mg vapor flux with respect to the substrate surface normal is fixed at 88 deg. The as-prepared 3D Mg nanostructures are characterized by scanning electron microscopy, x-ray diffraction, energy dispersive x-ray analysis, transmission electron microscopy, high-resolution transmission electron microscopy, and surface area measurement

Wet-chemical passivation of atomically flat and structured silicon substrates for solar cell application

Science.gov (United States)

Angermann, H.; Rappich, J.; Korte, L.; Sieber, I.; Conrad, E.; Schmidt, M.; Hübener, K.; Polte, J.; Hauschild, J.

2008-04-01

Special sequences of wet-chemical oxidation and etching steps were optimised with respect to the etching behaviour of differently oriented silicon to prepare very smooth silicon interfaces with excellent electronic properties on mono- and poly-crystalline substrates. Surface photovoltage (SPV) and photoluminescence (PL) measurements, atomic force microscopy (AFM) and scanning electron microscopy (SEM) investigations were utilised to develop wet-chemical smoothing procedures for atomically flat and structured surfaces, respectively. Hydrogen-termination as well as passivation by wet-chemical oxides were used to inhibit surface contamination and native oxidation during the technological processing. Compared to conventional pre-treatments, significantly lower micro-roughness and densities of surface states were achieved on mono-crystalline Si(100), on evenly distributed atomic steps, such as on vicinal Si(111), on silicon wafers with randomly distributed upside pyramids, and on poly-crystalline EFG ( Edge-defined Film-fed- Growth) silicon substrates. The recombination loss at a-Si:H/c-Si interfaces prepared on c-Si substrates with randomly distributed upside pyramids was markedly reduced by an optimised wet-chemical smoothing procedure, as determined by PL measurements. For amorphous-crystalline hetero-junction solar cells (ZnO/a-Si:H(n)/c-Si(p)/Al) with textured c-Si substrates the smoothening procedure results in a significant increase of short circuit current Isc, fill factor and efficiency η. The scatter in the cell parameters for measurements on different cells is much narrower, as compared to conventional pre-treatments, indicating more well-defined and reproducible surface conditions prior to a-Si:H emitter deposition and/or a higher stability of the c-Si surface against variations in the a-Si:H deposition conditions.

Intensifying the Casimir force between two silicon substrates within three different layers of materials

International Nuclear Information System (INIS)

Seyedzahedi, A.; Moradian, A.; Setare, M.R.

2016-01-01

We investigate the Casimir force for a system composed of two thick slabs as substrates within three different homogeneous layers. We use the scattering approach along with the Matsubara formalism in order to calculate the Casimir force at finite temperature. First, we focus on constructing the reflection matrices and then we calculate the Casimir force for a water–lipid system. According to the conventional use of silicon as a substrate, we apply the formalism to calculate the Casimir force for layers of Au, VO 2 , mica, KCl and foam rubber on the thick slabs of silicon. Afterwards, introducing an increasing factor, we compare our results with Lifshitz force in the vacuum between two semispaces of silicon in order to illustrate the influence of the layers on intensifying the Casimir force. We also calculate the Casimir force between two slabs of the forementioned materials with finite thicknesses to indicate the substrate's role in increasing the obtained Casimir force. Our simple calculation is interesting since one can extend it along with the Rigorous Coupled Wave Analysis to systems containing inhomogeneous layers as good candidates for designing nanomechanical devices.

Intensifying the Casimir force between two silicon substrates within three different layers of materials

Energy Technology Data Exchange (ETDEWEB)

Seyedzahedi, A. [Department of Science, University of Kurdistan, Sanandaj (Iran, Islamic Republic of); Moradian, A., E-mail: a.moradian@uok.ac.ir [Department of Science, Campus of Bijar, University of Kurdistan, Bijar (Iran, Islamic Republic of); Setare, M.R., E-mail: rezakord@ipm.ir [Department of Science, University of Kurdistan, Sanandaj (Iran, Islamic Republic of)

2016-04-01

We investigate the Casimir force for a system composed of two thick slabs as substrates within three different homogeneous layers. We use the scattering approach along with the Matsubara formalism in order to calculate the Casimir force at finite temperature. First, we focus on constructing the reflection matrices and then we calculate the Casimir force for a water–lipid system. According to the conventional use of silicon as a substrate, we apply the formalism to calculate the Casimir force for layers of Au, VO{sub 2}, mica, KCl and foam rubber on the thick slabs of silicon. Afterwards, introducing an increasing factor, we compare our results with Lifshitz force in the vacuum between two semispaces of silicon in order to illustrate the influence of the layers on intensifying the Casimir force. We also calculate the Casimir force between two slabs of the forementioned materials with finite thicknesses to indicate the substrate's role in increasing the obtained Casimir force. Our simple calculation is interesting since one can extend it along with the Rigorous Coupled Wave Analysis to systems containing inhomogeneous layers as good candidates for designing nanomechanical devices.

Non-agglomerated silicon nanoparticles on (0 0 1) silicon substrate formed by PLA and their photoluminescence properties

International Nuclear Information System (INIS)

Du Jun; Tu Hailing; Wang Lei

2009-01-01

In this work, non-agglomerated silicon nanoparticles formed on Si(0 0 1) substrate were synthesized by pulsed laser ablation (PLA) and their photoluminescence (PL) properties were studied. The controllable parameters in PLA process include mainly pulsed laser energy, target-to-substrate distance and buffer gas pressure. In particular, the effect of buffer gas pressure on the formation of non-agglomerated and size-controlled silicon nanoparticles has been discussed. The results show that non-agglomerated and size-controlled silicon nanoparticles can be fabricated with particle size in the range of 2-10 nm when Ar buffer gas pressure was varied from 50 to 10 Pa. Most of these nanoparticles are in form of single crystal with less surface oxidation in the as-deposited samples. The PL peak positions are located at 581-615 nm for Si nanoparticles with size of 2-10 nm. When exposed to air for up to 60 days, the core/shell structure of Si nanoparticles would be formed, which in turn could be responsible for the blue shift of PL peak position. Pt noble metal coating has passivation effect for surface stabilization of Si nanoparticles and shows relatively satisfied time-stability of PL intensity. These results suggest that the Si nanoparticles prepared by PLA have a large potential for the fabrication of optically active photonic devices based on the Si technology.

Gas microstrip detectors on polymer, silicon and glass substrates

International Nuclear Information System (INIS)

Barasch, E.F.; Demroff, H.P.; Drew, M.M.; Elliott, T.S.; Gaedke, R.M.; Goss, L.T.; Kasprowicz, T.B.; Lee, B.; Mazumdar, T.K.; McIntyre, P.M.; Pang, Y.; Smith, D.D.; Trost, H.J.; Vanstraelen, G.; Wahl, J.

1993-01-01

We present results on the performance of Gas Microstrip Detectors on various substrates. These include a 300 μm anode-anode pitch pattern on Tempax borosilicate glass and ABS/copolyether, a 200 μm pattern on Upilex ''S'' polyimide, Texin 4215, Tedlar, ion-implanted Kapton, orientation-dependent etched flat-topped silicon (''knife-edge chamber''), and iron-vanadium glass, and a 100 μm pitch pattern on Upilex ''S'' and ion-implanted Kapton. (orig.)

Room-temperature operation of a 2.25 μm electrically pumped laser fabricated on a silicon substrate

International Nuclear Information System (INIS)

Rodriguez, J. B.; Cerutti, L.; Grech, P.; Tournie, E.

2009-01-01

We report on a GaSb-based type-I laser structure grown by molecular beam epitaxy on a (001) silicon substrate. A thin AlSb nucleation layer followed by a 1 μm thick GaSb buffer layer was used to accommodate the very large lattice mismatch existing with the silicon substrate. Processed devices with mesa geometry exhibited laser operation in pulsed mode with a duty cycle up to 10% at room temperature

Growth on elastic silicone substrate elicits a partial myogenic response in periodontal ligament derived stem cells

Directory of Open Access Journals (Sweden)

Daniel Pelaez

2016-12-01

Full Text Available The processes of cellular differentiation and phenotypic maintenance can be influenced by stimuli from a variety of different factors. One commonly overlooked factor is the mechanical properties of the growth substrate in which stem cells are maintained or differentiated down various lineages. Here we explored the effect that growth on an elastic silicone substrate had on the myogenic expression and cytoskeletal morphology of periodontal ligament derived stem cells. Cells were grown on either collagen I coated tissue culture polystyrene plates or collagen I coated elastic silicone membranes for a period of 4 days without further induction from soluble factors in the culture media. Following the 4-day growth, gene expression and immunohistochemical analysis for key cardiomyogenic markers was performed along with a morphological assessment of cytoskeletal organization. Results show that cells grown on the elastic substrate significantly upregulate key markers associated with contractile activity in muscle tissues. Namely, the myosin light chain polypeptides 2 and 7, as well as the myosin heavy chain polypeptide 7 genes underwent a statistically significant upregulation in the cells grown on elastic silicone membranes. Similarly, the cells on the softer elastic substrate stained positive for both sarcomeric actin and cardiac troponin t proteins following just 4 days of growth on the softer material. Cytoskeletal analysis showed that substrate stiffness had a marked effect on the organization and distribution of filamentous actin fibers within the cell body. Growth on silicone membranes produced flatter and shorter cellular morphologies with filamentous actin fibers projecting anisotropically throughout the cell body. These results demonstrate how crucial the mechanical properties of the growth substrate of cells can be on the ultimate cellular phenotype. These observations highlight the need to further optimize differentiation protocols to enhance

Dual-side and three-dimensional microelectrode arrays fabricated from ultra-thin silicon substrates

International Nuclear Information System (INIS)

Du, Jiangang; Masmanidis, Sotiris C; Roukes, Michael L

2009-01-01

A method for fabricating planar implantable microelectrode arrays was demonstrated using a process that relied on ultra-thin silicon substrates, which ranged in thickness from 25 to 50 µm. The challenge of handling these fragile materials was met via a temporary substrate support mechanism. In order to compensate for putative electrical shielding of extracellular neuronal fields, separately addressable electrode arrays were defined on each side of the silicon device. Deep reactive ion etching was employed to create sharp implantable shafts with lengths of up to 5 mm. The devices were flip-chip bonded onto printed circuit boards (PCBs) by means of an anisotropic conductive adhesive film. This scalable assembly technique enabled three-dimensional (3D) integration through formation of stacks of multiple silicon and PCB layers. Simulations and measurements of microelectrode noise appear to suggest that low impedance surfaces, which could be formed by electrodeposition of gold or other materials, are required to ensure an optimal signal-to-noise ratio as well a low level of interchannel crosstalk

Large-grain polycrystalline silicon film by sequential lateral solidification on a plastic substrate

International Nuclear Information System (INIS)

Kim, Yong-Hae; Chung, Choong-Heui; Yun, Sun Jin; Moon, Jaehyun; Park, Dong-Jin; Kim, Dae-Won; Lim, Jung Wook; Song, Yoon-Ho; Lee, Jin Ho

2005-01-01

A large-grain polycrystalline silicon film was obtained on a plastic substrate by sequential lateral solidification. With various combinations of sputtering powers and Ar working gas pressures, the conditions for producing dense amorphous silicon (a-Si) and SiO 2 films were optimized. The successful crystallization of the a-Si film is attributed to the production of a dense a-Si film that has low argon content and can endure high-intensity laser irradiation

Plasma deposition of thin film silicon at low substrate temperature and at high growth rate

NARCIS (Netherlands)

Verkerk, A.D.|info:eu-repo/dai/nl/304831719

2009-01-01

To expand the range of applications for thin film solar cells incorporating hydrogenated amorphous silicon (a-Si:H) and hydrogenated nanocrystalline silicon (nc-Si:H), the growth rate has to be increased 0.5 or less to several nm/s and the substrate temperature should be lowered to around 100 C. In

Study on defects and impurities in cast-grown polycrystalline silicon substrates for solar cells

International Nuclear Information System (INIS)

Arafune, K.; Sasaki, T.; Wakabayashi, F.; Terada, Y.; Ohshita, Y.; Yamaguchi, M.

2006-01-01

We focused on the defects and impurities in polycrystalline silicon substrates, which deteriorate solar cell efficiency. Comparison of the minority carrier lifetime with the grain size showed that the region with short minority carrier lifetimes did not correspond to the region with small grains. Conversely, the minority carrier lifetime decreased as the etch-pit density (EPD) increased, suggesting that the minority carrier lifetime is strongly affected by the EPD. Electron beam induced current measurements revealed that a combination of grain boundaries and point defects had high recombination activity. Regarding impurities, the interstitial oxygen concentration was relatively low compared with that in a Czochralski-grown silicon substrate, the total carbon concentration exceeded the solubility limit of silicon melt. X-ray microprobe fluorescence measurements revealed a large amount of iron in the regions where there were many etch-pits and grain boundaries with etch-pits. X-ray absorption near edge spectrum analysis revealed trapped iron in the form of oxidized iron

Free-standing silicon micro machined resistors from (110) substrate

International Nuclear Information System (INIS)

Bernardini, R.; Diligenti, A.; Nannini, A.; Piotto, M.

1998-01-01

A simple process to obtain silicon planes released from the substrate and provided with large area pads for ohmic contacts is described. Resistors 500 μm long with a 40 μm x 1 μm cross section were obtained. Resistance measurements showed that the current flows in a reduced cross section, probably owing to the presence of a superficial depletion layer. Preliminary magnetoresistance measurements are presented. Reduction of the resistor cross section can be obtained by thermal oxidation

Characterization of self-assembled monolayers (SAMs) on silicon substrate comparative with polymer substrate for Escherichia coli O157:H7 detection

International Nuclear Information System (INIS)

Moldovan, Carmen; Mihailescu, Carmen; Stan, Dana; Ruta, Lavinia; Iosub, Rodica; Gavrila, Raluca; Purica, Munizer; Vasilica, Schiopu

2009-01-01

This article presents the characterization of two substrates, silicon and polymer coated with gold, that are functionalized by mixed self-assembled monolayers (SAMs) in order to efficiently immobilize the anti-Escherichia coli O157:H7 polyclonal purified antibody. A biosurface functionalized by SAMs (self-assembled monolayers) technique has been developed. Immobilization of goat anti-E. coli O157:H7 antibody was performed by covalently bonding of thiolate mixed self-assembled monolayers (SAMs) realized on two substrates: polymer coated with gold and silicon coated with gold. The F(ab') 2 fragments of the antibodies have been used for eliminating nonspecific bindings between the Fc portions of antibodies and the Fc receptor on cells. The properties of the monolayers and the biofilm formatted with attached antibody molecules were analyzed at each step using infrared spectroscopy (FTIR-ATR), atomic force microscopy (AFM), scanning electron microscopy (SEM) and cyclic voltammetry (CV). In our study the gold-coated silicon substrates approach yielded the best results. These experimental results revealed the necessity to investigate each stage of the immobilization process taking into account in the same time the factors that influence the chemistry of the surface and the further interactions as well and also provide a solid basis for further studies aiming at elaborating sensitive and specific immunosensor or a microarray for the detection of E. coli O157:H7.

Characterization of self-assembled monolayers (SAMs) on silicon substrate comparative with polymer substrate for Escherichia coli O157:H7 detection

Energy Technology Data Exchange (ETDEWEB)

Moldovan, Carmen, E-mail: carmen.moldovan@imt.ro [National Institute for R and D in Microtechnologies, IMT-Bucharest, 126A Erou Iancu Nicolae, 077190 Bucharest (Romania); Mihailescu, Carmen, E-mail: carmen_mihail28@yahoo.com [University of Bucharest, 90-92 Sos Panduri, Bucharest (Romania); Stan, Dana, E-mail: dana_stan2005@yahoo.com [DDS Diagnostic, 1 Segovia Street, Bucharest (Romania); Ruta, Lavinia, E-mail: laviniacoco@yahoo.com [University of Bucharest, 90-92 Sos Panduri, Bucharest (Romania); Iosub, Rodica, E-mail: rodica.iosub@imt.ro [National Institute for R and D in Microtechnologies, IMT-Bucharest, 126A Erou Iancu Nicolae, 077190 Bucharest (Romania); Gavrila, Raluca, E-mail: raluca.gavrila@imt.ro [National Institute for R and D in Microtechnologies, IMT-Bucharest, 126A Erou Iancu Nicolae, 077190 Bucharest (Romania); Purica, Munizer, E-mail: munizer.purica@imt.ro [National Institute for R and D in Microtechnologies, IMT-Bucharest, 126A Erou Iancu Nicolae, 077190 Bucharest (Romania); Vasilica, Schiopu, E-mail: vasilica.schiopu@imt.ro [National Institute for R and D in Microtechnologies, IMT-Bucharest, 126A Erou Iancu Nicolae, 077190 Bucharest (Romania)

2009-08-30

This article presents the characterization of two substrates, silicon and polymer coated with gold, that are functionalized by mixed self-assembled monolayers (SAMs) in order to efficiently immobilize the anti-Escherichia coli O157:H7 polyclonal purified antibody. A biosurface functionalized by SAMs (self-assembled monolayers) technique has been developed. Immobilization of goat anti-E. coli O157:H7 antibody was performed by covalently bonding of thiolate mixed self-assembled monolayers (SAMs) realized on two substrates: polymer coated with gold and silicon coated with gold. The F(ab'){sub 2} fragments of the antibodies have been used for eliminating nonspecific bindings between the Fc portions of antibodies and the Fc receptor on cells. The properties of the monolayers and the biofilm formatted with attached antibody molecules were analyzed at each step using infrared spectroscopy (FTIR-ATR), atomic force microscopy (AFM), scanning electron microscopy (SEM) and cyclic voltammetry (CV). In our study the gold-coated silicon substrates approach yielded the best results. These experimental results revealed the necessity to investigate each stage of the immobilization process taking into account in the same time the factors that influence the chemistry of the surface and the further interactions as well and also provide a solid basis for further studies aiming at elaborating sensitive and specific immunosensor or a microarray for the detection of E. coli O157:H7.

Human aortic endothelial cell morphology influenced by topography of porous silicon substrates.

Science.gov (United States)

Formentín, Pilar; Catalán, Úrsula; Fernández-Castillejo, Sara; Alba, Maria; Baranowska, Malgorzata; Solà, Rosa; Pallarès, Josep; Marsal, Lluís F

2015-10-01

Porous silicon has received much attention because of its optical properties and for its usefulness in cell-based biosensing, drug delivery, and tissue engineering applications. Surface properties of the biomaterial are associated with cell adhesion and with proliferation, migration, and differentiation. The present article analyzes the behavior of human aortic endothelial cells in macro- and nanoporous collagen-modified porous silicon samples. On both substrates, cells are well adhered and numerous. Confocal microscopy and scanning electron microscopy were employed to study the effects of porosity on the morphology of the cells. On macroporous silicon, filopodia is not observed but the cell spreads on the surface, increasing the lamellipodia surface which penetrates the macropore. On nanoporous silicon, multiple filopodia were found to branch out from the cell body. These results demonstrate that the pore size plays a key role in controlling the morphology and growth rate of human aortic endothelial cells, and that these forms of silicon can be used to control cell development in tissue engineering as well as in basic cell biology research. © The Author(s) 2015.

ZnO buffer layer for metal films on silicon substrates

Science.gov (United States)

Ihlefeld, Jon

2014-09-16

Dramatic improvements in metallization integrity and electroceramic thin film performance can be achieved by the use of the ZnO buffer layer to minimize interfacial energy between metallization and adhesion layers. In particular, the invention provides a substrate metallization method utilizing a ZnO adhesion layer that has a high work of adhesion, which in turn enables processing under thermal budgets typically reserved for more exotic ceramic, single-crystal, or metal foil substrates. Embodiments of the present invention can be used in a broad range of applications beyond ferroelectric capacitors, including microelectromechanical systems, micro-printed heaters and sensors, and electrochemical energy storage, where integrity of metallized silicon to high temperatures is necessary.

Synthesis of silicon nanocomposite for printable photovoltaic devices on flexible substrate

Science.gov (United States)

Odo, E. A.; Faremi, A. A.

2017-06-01

Renewed interest has been established in the preparation of silicon nanoparticles for electronic device applications. In this work, we report on the production of silicon powders using a simple ball mill and of silicon nanocomposite ink for screen-printable photovoltaic device on a flexible substrate. Bulk single crystalline silicon was milled for 25 h in the ball mill. The structural properties of the produced silicon nanoparticles were investigated using X-ray diffraction (XRD) and transmission electron microscopy. The results show that the particles remained highly crystalline, though transformed from their original single crystalline state to polycrystalline. The elemental composition using energy dispersive X-ray florescence spectroscopy (EDXRF) revealed that contamination from iron (Fe) and chromium (Cr) of the milling media and oxygen from the atmosphere were insignificant. The size distribution of the nanoparticles follows a lognormal pattern that ranges from 60 nm to about 1.2 μm and a mean particle size of about 103 nm. Electrical characterization of screen-printed PN structures of the nanocomposite formed by embedding the powder into a suitable water-soluble polymer on Kapton sheet reveals an enhanced photocurrent transport resulting from photo-induced carrier generation in the depletion region with energy greater that the Schottky barrier height at the metal-composite interface.

Non-silicon substrate bonding mediated by poly(dimethylsiloxane) interfacial coating

Energy Technology Data Exchange (ETDEWEB)

Zhang, Hainan [Department of BioNano Technology, Gachon University, Gyeonggi-do 461-701 (Korea, Republic of); Lee, Nae Yoon, E-mail: nylee@gachon.ac.kr [Department of BioNano Technology, Gachon University, Gyeonggi-do 461-701 (Korea, Republic of); Gachon Medical Research Institute, Gil Medical Center, Inchon 405-760 (Korea, Republic of)

2015-02-01

Graphical abstract: Low-molecular-weight PDMS coating on the surfaces of non-silicon substrates such as thermoplastics ensures permanent sealing with a silicone elastomer, PDMS, simply by surface oxidization followed by ambient condition bonding, mediated by a robust siloxane bond formation at the interface. - Highlights: • Non-silicon thermoplastic was bonded with poly(dimethylsiloxane) silicone elastomer. • Low-molecular-weight PDMS interfacial layer was chemically coated on thermoplastic. • Bonding was realized by corona treatment and physical contact under ambient condition. • Bonding is universally applicable regardless of thermoplastic type and property. • Homogeneous PDMS-like microchannel was obtained inside the thermoplastic-PDMS microdevice. - Abstract: In this paper, we introduce a simple and robust strategy for bonding poly(dimethylsiloxane) (PDMS) with various thermoplastic substrates to fabricate a thermoplastic-based closed microfluidic device and examine the feasibility of using the proposed method for realizing plastic–plastic bonding. The proposed bonding strategy was realized by first coating amine functionality on an oxidized thermoplastic surface. Next, the amine-functionalized surface was reacted with a monolayer of low-molecular-weight PDMS, terminated with epoxy functionality, by forming a robust amine-epoxy bond. Both the PDMS-coated thermoplastic and PDMS were then oxidized and permanently assembled at 25 °C under a pressure of 0.1 MPa for 15 min, resulting in PDMS-like surfaces on all four inner walls of the microchannel. Surface characterizations were conducted, including water contact angle measurement, X-ray photoelectron spectroscopy (XPS), and fluorescence measurement, to confirm the successful coating of the thin PDMS layer on the plastic surface, and the bond strength was analyzed by conducting a peel test, burst test, and leakage test. Using the proposed method, we could successfully bond various thermoplastics such

Light emitting structures porous silicon-silicon substrate

International Nuclear Information System (INIS)

Monastyrskii, L.S.; Olenych, I.B.; Panasjuk, M.R.; Savchyn, V.P.

1999-01-01

The research of spectroscopic properties of porous silicon has been done. Complex of photoluminescence, electroluminescence, cathodoluminescence, thermostimulated depolarisation current analyte methods have been applied to study of geterostructures and free layers of porous silicon. Light emitting processes had tendency to decrease. The character of decay for all kinds of luminescence were different

Growth of light-emitting SiGe heterostructures on strained silicon-on-insulator substrates with a thin oxide layer

Energy Technology Data Exchange (ETDEWEB)

Baidakova, N. A., E-mail: banatale@ipmras.ru [Russian Academy of Sciences, Institute for Physics of Microstructures (Russian Federation); Bobrov, A. I. [University of Nizhny Novgorod (Russian Federation); Drozdov, M. N.; Novikov, A. V. [Russian Academy of Sciences, Institute for Physics of Microstructures (Russian Federation); Pavlov, D. A. [University of Nizhny Novgorod (Russian Federation); Shaleev, M. V.; Yunin, P. A.; Yurasov, D. V.; Krasilnik, Z. F. [Russian Academy of Sciences, Institute for Physics of Microstructures (Russian Federation)

2015-08-15

The possibility of using substrates based on “strained silicon on insulator” structures with a thin (25 nm) buried oxide layer for the growth of light-emitting SiGe structures is studied. It is shown that, in contrast to “strained silicon on insulator” substrates with a thick (hundreds of nanometers) oxide layer, the temperature stability of substrates with a thin oxide is much lower. Methods for the chemical and thermal cleaning of the surface of such substrates, which make it possible to both retain the elastic stresses in the thin Si layer on the oxide and provide cleaning of the surface from contaminating impurities, are perfecte. It is demonstrated that it is possible to use the method of molecular-beam epitaxy to grow light-emitting SiGe structures of high crystalline quality on such substrates.

Plasmonic properties of gold nanoparticles on silicon substrates: Understanding Fano-like spectra observed in reflection

Science.gov (United States)

Bossard-Giannesini, Léo; Cruguel, Hervé; Lacaze, Emmanuelle; Pluchery, Olivier

2016-09-01

Gold nanoparticles (AuNPs) are known for their localized surface plasmon resonance (LSPR) that can be measured with UV-visible spectroscopy. AuNPs are often deposited on silicon substrates for various applications, and the LSPR is measured in reflection. In this case, optical spectra are measured by surface differential reflectance spectroscopy (SDRS) and the absorbance exhibits a negative peak. This article studies both experimentally and theoretically on the single layers of 16 nm diameter spherical gold nanoparticles (AuNPs) grafted on silicon. The morphology and surface density of AuNPs were investigated by atomic force microscopy (AFM). The plasmon response in transmission on the glass substrate and in reflection on the silicon substrate is described by an analytical model based on the Fresnel equations and the Maxwell-Garnett effective medium theory (FMG). The FMG model shows a strong dependence to the incidence angle of the light. At low incident angles, the peak appears negatively with a shallow intensity, and at angles above 30°, the usual positive shape of the plasmon is retrieved. The relevance of the FMG model is compared to the Mie theory within the dipolar approximation. We conclude that no Fano effect is responsible for this derivative shape. An easy-to-use formula is derived that agrees with our experimental data.

Influence of calcium and silicon supplementation into Pleurotus ostreatus substrates on quality of fresh and canned mushrooms.

Science.gov (United States)

Thongsook, T; Kongbangkerd, T

2011-08-01

Supplements of gypsum (calcium source), pumice (silicon source) and pumice sulfate (silicon and calcium source) into substrates for oyster mushrooms (Pleurotus ostreatus) were searched for their effects on production as well as qualities of fresh and canned mushrooms. The addition of pumice up to 30% had no effect on total yield, size distribution and cap diameters. The supplementation of gypsum at 10% decreased the total yield; and although gypsum at 5% did not affect total yield, the treatment increased the proportion of large-sized caps. High content (>10%) of pumice sulfate resulted in the lower yield. Calcium and silicon contents in the fruit bodies were not influenced by supplementations. The centrifugal drip loss values and solid content of fresh mushrooms, and the percentage of weight gained and firmness of canned mushrooms, cultivated in substrates supplemented with gypsum, pumice and pumice sulfate were significantly (p≤0.05) higher than those of the control. Scanning electron micrographs revealed the more compacted hyphae of mushroom stalks supplemented with silicon and/or calcium after heat treatment, compared to the control. Supplementation of P. ostreatus substrates with 20% pumice was the most practical treatment because it showed no effect on yield and the most cost-effective.

Networks of neuroblastoma cells on porous silicon substrates reveal a small world topology

KAUST Repository

Marinaro, Giovanni; La Rocca, Rosanna; Toma, Andrea; Barberio, Marianna; Cancedda, Laura; Di Fabrizio, Enzo M.; Decuzzi, Paolo C W; Gentile, Francesco T.

2015-01-01

The human brain is a tightly interweaving network of neural cells where the complexity of the network is given by the large number of its constituents and its architecture. The topological structure of neurons in the brain translates into its increased computational capabilities, low energy consumption, and nondeterministic functions, which differentiate human behavior from artificial computational schemes. In this manuscript, we fabricated porous silicon chips with a small pore size ranging from 8 to 75 nm and large fractal dimensions up to Df ∼ 2.8. In culturing neuroblastoma N2A cells on the described substrates, we found that those cells adhere more firmly to and proliferate on the porous surfaces compared to the conventional nominally flat silicon substrates, which were used as controls. More importantly, we observed that N2A cells on the porous substrates create highly clustered, small world topology patterns. We conjecture that neurons with a similar architecture may elaborate information more efficiently than in random or regular grids. Moreover, we hypothesize that systems of neurons on nano-scale geometry evolve in time to form networks in which the propagation of information is maximized. This journal is

Growth and characterization of thick cBN coatings on silicon and tool substrates

International Nuclear Information System (INIS)

Bewilogua, K.; Keunecke, M.; Weigel, K.; Wiemann, E.

2004-01-01

Recently some research groups have achieved progress in the deposition of cubic boron nitride (cBN) coatings with a thickness of 2 μm and more, which is necessary for cutting tool applications. In our laboratory, thick cBN coatings were sputter deposited on silicon substrates using a boron carbide target. Following a boron carbide interlayer (few 100 nm thick), a gradient layer with continuously increasing nitrogen content was prepared. After the cBN nucleation, the process parameters were modified for the cBN film growth to a thickness of more than 2 μm. However, the transfer of this technology to technically relevant substrates, like cemented carbide cutting inserts, required some further process modifications. At first, a titanium interlayer had to be deposited followed by a more than 1-μm-thick boron carbide layer. The next steps were identical to those on silicon substrates. The total coating thickness was in the range of 3 μm with a 0.5- to nearly 1-μm-thick cBN top layer. In spite of the enormous intrinsic stress, both the coatings on silicon and on cemented carbide exhibited a good adhesion and a prolonged stability in humid air. Oxidation experiments revealed a stability of the coating system on cemented carbide up to 700 deg. C and higher. Coated cutting inserts were tested in turning operations with different metallic workpiece materials. The test results will be compared to those of well-established cutting materials, like polycrystalline cubic boron nitride (PCBN) and oxide ceramics, considering the wear of coated tools

Physical and electrical characterization of corundum substrates and epitaxial silicon layers in view of fabricating integrated circuits

International Nuclear Information System (INIS)

Trilhe, J.; Legal, H.; Rolland, G.

1975-01-01

The S.O.S. technology (silicon on insulating substrate) allows compact, radiation hard, fast integrated circuits to be fabricated. It is noticeable that complex integrated circuits on corundum substrates obtained with various fabrication processes have various electrical characteristics. Possible correlations between the macroscopic defects of the substrate and the electrical characteristics of the circuit were investigated [fr

Substrate bias effect on crystallinity of polycrystalline silicon thin films prepared by pulsed ion-beam evaporation method

Energy Technology Data Exchange (ETDEWEB)

Ali, Fazlat; Gunji, Michiharu; Yang, Sung-Chae; Suzuki, Tsuneo; Suematsu, Hisayuki; Jiang, Weihua; Yatsui, Kiyoshi [Nagaoka Univ. of Technology, Extreme Energy-Density Research Inst., Nagaoka, Niigata (Japan)

2002-06-01

The deposition of polycrystalline silicon thin films has been tried by a pulsed ion-beam evaporation method, where high crystallinity and deposition rate have been achieved without heating the substrate. The crystallinity and the deposition rate were improved by applying bias voltage to the substrate, where instantaneous substrate heating might have occurred by ion-bombardment. (author)

Substrate bias effect on crystallinity of polycrystalline silicon thin films prepared by pulsed ion-beam evaporation method

International Nuclear Information System (INIS)

Ali, Fazlat; Gunji, Michiharu; Yang, Sung-Chae; Suzuki, Tsuneo; Suematsu, Hisayuki; Jiang, Weihua; Yatsui, Kiyoshi

2002-01-01

The deposition of polycrystalline silicon thin films has been tried by a pulsed ion-beam evaporation method, where high crystallinity and deposition rate have been achieved without heating the substrate. The crystallinity and the deposition rate were improved by applying bias voltage to the substrate, where instantaneous substrate heating might have occurred by ion-bombardment. (author)

Impact of the silicon substrate resistivity and growth condition on the deep levels in Ni-Au/AlN/Si MIS Capacitors

Science.gov (United States)

Wang, Chong; Simoen, Eddy; Zhao, Ming; Li, Wei

2017-10-01

Deep levels formed under different growth conditions of a 200 nm AlN buffer layer on B-doped Czochralski Si(111) substrates with different resistivity were investigated by deep-level transient spectroscopy (DLTS) on metal-insulator-semiconductor capacitors. Growth-temperature-dependent Al diffusion in the Si substrate was derived from the free carrier density obtained by capacitance-voltage measurement on samples grown on p- substrates. The DLTS spectra revealed a high concentration of point and extended defects in the p- and p+ silicon substrates, respectively. This indicated a difference in the electrically active defects in the silicon substrate close to the AlN/Si interface, depending on the B doping concentration.

Gold nanoparticle growth control - Implementing novel wet chemistry method on silicon substrate

KAUST Repository

Al-Ameer, Ammar

2013-04-01

Controlling particle size, shape, nucleation, and self-assembly on surfaces are some of the main challenges facing electronic device fabrication. In this work, growth of gold nanoparticles over a wide range of sizes was investigated by using a novel wet chemical method, where potassium iodide is used as the reducing solution and gold chloride as the metal precursor, on silicon substrates. Four parameters were studied: soaking time, solution temperature, concentration of the solution of gold chloride, and surface pre-treatment of the substrate. Synthesized nanoparticles were then characterized using scanning electron microscopy (SEM). The precise control of the location and order of the grown gold overlayer was achieved by using focused ion beam (FIB) patterning of a silicon surface, pre-treated with potassium iodide. By varying the soaking time and temperature, different particle sizes and shapes were obtained. Flat geometrical shapes and spherical shapes were observed. We believe, that the method described in this work is potentially a straightforward and efficient way to fabricate gold contacts for microelectronics. © 2013 IEEE.

Analysis of signals propagating in a phononic crystal PZT layer deposited on a silicon substrate.

Science.gov (United States)

Hladky-Hennion, Anne-Christine; Vasseur, Jérôme; Dubus, Bertrand; Morvan, Bruno; Wilkie-Chancellier, Nicolas; Martinez, Loïc

2013-12-01

The design of a stop-band filter constituted by a periodically patterned lead zirconate titanate (PZT) layer, polarized along its thickness, deposited on a silicon substrate and sandwiched between interdigitated electrodes for emission/reception of guided elastic waves, is investigated. The filter characteristics are theoretically evaluated by using finite element simulations: dispersion curves of a patterned PZT layer with a specific pattern geometry deposited on a silicon substrate present an absolute stop band. The whole structure is modeled with realistic conditions, including appropriate interdigitated electrodes to propagate a guided mode in the piezoelectric layer. A robust method for signal analysis based on the Gabor transform is applied to treat transmitted signals; extract attenuation, group delays, and wave number variations versus frequency; and identify stop-band filter characteristics.

Catalytic growth of carbon nanowires on composite diamond/silicon substrates

Energy Technology Data Exchange (ETDEWEB)

Sellam, Amine [Université de Lorraine, Institut Jean Lamour, Département CP2S (UMR CNRS 7198), Parc de Saurupt, F-54042 Nancy Cedex (France); Miska, Patrice [Université de Lorraine, Institut Jean Lamour, Département P2M (UMR CNRS 7198), Parc de Saurupt, F-54042 Nancy Cedex (France); Ghanbaja, Jaafar [Université de Lorraine, Institut Jean Lamour, Département CP2S (UMR CNRS 7198), Parc de Saurupt, F-54042 Nancy Cedex (France); Barrat, Silvère, E-mail: Silvere.Barrat@ijl.nancy-universite.fr [Université de Lorraine, Institut Jean Lamour, Département CP2S (UMR CNRS 7198), Parc de Saurupt, F-54042 Nancy Cedex (France)

2014-01-01

Polycrystalline diamond (PCD) films and carbon nanowires (CNWs) provide individually highly attractive properties for science and technology applications. The possibility of carbon composite materials made from a combination of these materials remains a potential approach widely discussed in literature but modestly investigated. We report in this work an early attempt to explore this opportunity in the light of some specific experimental considerations. Carbon nanowires (CNWs) are grown at low temperature without the conventional use of external hydrocarbon vapor source on silicon substrates partially covered by a thin film of coalesced micrometric CVD diamond. Composite substrates constituted by PCD on silicon were first cleaned with H{sub 2} plasma then used for the PVD deposition of 5 nm Ni thin films. Then, samples were heat treated in a CVD reactor at 580 °C in the presence of pure H{sub 2} pressure of 60 hPa at different annealing times. Comparative effect of annealing time on the dewetting of Ni thin films and the subsequent CNWs growth process was considered in this work using systematic observations by SEM. Possible mechanisms underlying CNWs growth in pure H{sub 2} gas were proposed. The nature and structure of these CNWs have been investigated by TEM microscopy and by Raman spectroscopy on the sample showing the highest CNWs density.

Electrical leakage phenomenon in heteroepitaxial cubic silicon carbide on silicon

Science.gov (United States)

Pradeepkumar, Aiswarya; Zielinski, Marcin; Bosi, Matteo; Verzellesi, Giovanni; Gaskill, D. Kurt; Iacopi, Francesca

2018-06-01

Heteroepitaxial 3C-SiC films on silicon substrates are of technological interest as enablers to integrate the excellent electrical, electronic, mechanical, thermal, and epitaxial properties of bulk silicon carbide into well-established silicon technologies. One critical bottleneck of this integration is the establishment of a stable and reliable electronic junction at the heteroepitaxial interface of the n-type SiC with the silicon substrate. We have thus investigated in detail the electrical and transport properties of heteroepitaxial cubic silicon carbide films grown via different methods on low-doped and high-resistivity silicon substrates by using van der Pauw Hall and transfer length measurements as test vehicles. We have found that Si and C intermixing upon or after growth, particularly by the diffusion of carbon into the silicon matrix, creates extensive interstitial carbon traps and hampers the formation of a stable rectifying or insulating junction at the SiC/Si interface. Although a reliable p-n junction may not be realistic in the SiC/Si system, we can achieve, from a point of view of the electrical isolation of in-plane SiC structures, leakage suppression through the substrate by using a high-resistivity silicon substrate coupled with deep recess etching in between the SiC structures.

Dewetting and deposition of thin films with insoluble surfactants from curved silicone hydrogel substrates

NARCIS (Netherlands)

Bhamla, M.S.; Balemans, C.; Fuller, G.G.

2015-01-01

We investigate the stabilizing effect of insoluble surfactant monolayers on thin aqueous films. We first describe an experimental platform that enables the formation of aqueous films laden with dipalmitoylphosphatidylcholine (DPPC) monolayers on curved silicone hydrogel (SiHy) substrates. We show

Realization of dual-heterojunction solar cells on ultra-thin ∼25 μm, flexible silicon substrates

KAUST Repository

Onyegam, Emmanuel U.; Sarkar, Dabraj; Hilali, Mohamed M.; Saha, Sayan; Mathew, Leo; Rao, Rajesh A.; Smith, Ryan S.; Xu, Dewei; Jawarani, Dharmesh; Garcia, Ricardo; Ainom, Moses; Banerjee, Sanjay K.

2014-01-01

Silicon heterojunction (HJ) solar cells with different rear passivation and contact designs were fabricated on ∼ 25 μ m semiconductor-on-metal (SOM) exfoliated substrates. It was found that the performance of these cells is limited by recombination at the rear-surface. Employing the dual-HJ architecture resulted in the improvement of open-circuit voltage (Voc) from 605 mV (single-HJ) to 645 mV with no front side intrinsic amorphous silicon (i-layer) passivation. Addition of un-optimized front side i-layer passivation resulted in further enhancement in Voc to 662 mV. Pathways to achieving further improvement in the performance of HJ solar cells on ultra-thin SOM substrates are discussed. © 2014 AIP Publishing LLC.

Realization of dual-heterojunction solar cells on ultra-thin ∼25 μm, flexible silicon substrates

KAUST Repository

Onyegam, Emmanuel U.

2014-04-14

Silicon heterojunction (HJ) solar cells with different rear passivation and contact designs were fabricated on ∼ 25 μ m semiconductor-on-metal (SOM) exfoliated substrates. It was found that the performance of these cells is limited by recombination at the rear-surface. Employing the dual-HJ architecture resulted in the improvement of open-circuit voltage (Voc) from 605 mV (single-HJ) to 645 mV with no front side intrinsic amorphous silicon (i-layer) passivation. Addition of un-optimized front side i-layer passivation resulted in further enhancement in Voc to 662 mV. Pathways to achieving further improvement in the performance of HJ solar cells on ultra-thin SOM substrates are discussed. © 2014 AIP Publishing LLC.

Microcrystalline silicon growth by low laser energy crystallization on a plastic substrate

International Nuclear Information System (INIS)

Kim, D. Y.; Seo, C. K.; Shim, M. S.; Kim, C. H.; Yi, J.

2004-01-01

We are reporting the crystallization of amorphous silicon (a-Si) using a XeCl excimer laser treatment. Although polycarbonate (PC) plastic substrates are very weak at high temperatures of more than 150 .deg. C, they are very useful for applications to microelectronics because of light weight, high transmittance, and flexibility. In order to crystallize a-Si films on plastic substrates, we suggest that a CeO 2 seed layer will be very helpful at a low laser energy density. The seed layer is deposited at room temperature by rf using magnetron sputtering. A seed layer deposition method will be also presented in detail in this article. We compare a-Si crytallization without a seed layer with one with a seed layer deposited between the a-Si and the plastic substrate. The a-Si was deposited on the plastic substrate by using inductively coupled plasma Chemical-Vapor Deposition (ICPCVD) at the room temperature. In this paper, we will present the crystallization properties of a-Si with and without a CeO 2 seed layer on the plastic substrate.

Annealing behavior of oxygen in-diffusion from SiO2 film to silicon substrate

International Nuclear Information System (INIS)

Abe, T.; Yamada-Kaneta, H.

2004-01-01

Diffusion behavior of oxygen at (near) the Si/SiO 2 interface was investigated. We first oxidized the floating-zone-grown silicon substrates, and then annealed the SiO 2 -covered substrates in an argon ambient. We examined two different conditions for oxidation: wet and dry oxidation. By the secondary-ion-mass spectrometry, we measured the depth profiles of the oxygen in-diffusion of these heat-treated silicon substrates: We found that the energy of dissolution (in-diffusion) of an oxygen atom that dominates the oxygen concentration at the Si/SiO 2 interface depends on the oxidation condition: 2.0 and 1.7 eV for wet and dry oxidation, respectively. We also found that the barrier heights for the oxygen diffusion in argon anneal were significantly different for different ambients adopted for the SiO 2 formation: 3.3 and 1.8 eV for wet and dry oxidation, respectively. These findings suggest that the microscopic behavior of the oxygen atoms at the Si/SiO 2 interface during the argon anneal depends on the ambient adopted for the SiO 2 formation

Silicon nanowire-based tunneling field-effect transistors on flexible plastic substrates.

Science.gov (United States)

Lee, Myeongwon; Koo, Jamin; Chung, Eun-Ae; Jeong, Dong-Young; Koo, Yong-Seo; Kim, Sangsig

2009-11-11

A technique to implement silicon nanowire (SiNW)-based tunneling field-effect transistors (TFETs) on flexible plastic substrates is developed for the first time. The p-i-n configured Si NWs are obtained from an Si wafer using a conventional top-down CMOS-compatible technology, and they are then transferred onto the plastic substrate. Based on gate-controlled band-to-band tunneling (BTBT) as their working principle, the SiNW-based TFETs show normal p-channel switching behavior with a threshold voltage of -1.86 V and a subthreshold swing of 827 mV/dec. In addition, ambipolar conduction is observed due to the presence of the BTBT between the heavily doped p+ drain and n+ channel regions, indicating that our TFETs can operate in the n-channel mode as well. Furthermore, the BTBT generation rates for both the p-channel and n-channel operating modes are nearly independent of the bending state (strain = 0.8%) of the plastic substrate.

Silicon nanowire-based tunneling field-effect transistors on flexible plastic substrates

International Nuclear Information System (INIS)

Lee, Myeongwon; Koo, Jamin; Chung, Eun-Ae; Jeong, Dong-Young; Kim, Sangsig; Koo, Yong-Seo

2009-01-01

A technique to implement silicon nanowire (SiNW)-based tunneling field-effect transistors (TFETs) on flexible plastic substrates is developed for the first time. The p-i-n configured Si NWs are obtained from an Si wafer using a conventional top-down CMOS-compatible technology, and they are then transferred onto the plastic substrate. Based on gate-controlled band-to-band tunneling (BTBT) as their working principle, the SiNW-based TFETs show normal p-channel switching behavior with a threshold voltage of -1.86 V and a subthreshold swing of 827 mV/dec. In addition, ambipolar conduction is observed due to the presence of the BTBT between the heavily doped p + drain and n + channel regions, indicating that our TFETs can operate in the n-channel mode as well. Furthermore, the BTBT generation rates for both the p-channel and n-channel operating modes are nearly independent of the bending state (strain = 0.8%) of the plastic substrate.

Silicon nanowire-based tunneling field-effect transistors on flexible plastic substrates

Energy Technology Data Exchange (ETDEWEB)

Lee, Myeongwon; Koo, Jamin; Chung, Eun-Ae; Jeong, Dong-Young; Kim, Sangsig [Department of Electrical Engineering and Institute for Nano Science, Korea University, 5-1, Anam-Dong, Seongbuk-Gu, Seoul 136-701 (Korea, Republic of); Koo, Yong-Seo, E-mail: sangsig@korea.ac.k [Department of Electrical Engineering, Seokyeong University, 16-1, Jungneung-dong, Seongbuk-gu, Seoul 136-704 (Korea, Republic of)

2009-11-11

A technique to implement silicon nanowire (SiNW)-based tunneling field-effect transistors (TFETs) on flexible plastic substrates is developed for the first time. The p-i-n configured Si NWs are obtained from an Si wafer using a conventional top-down CMOS-compatible technology, and they are then transferred onto the plastic substrate. Based on gate-controlled band-to-band tunneling (BTBT) as their working principle, the SiNW-based TFETs show normal p-channel switching behavior with a threshold voltage of -1.86 V and a subthreshold swing of 827 mV/dec. In addition, ambipolar conduction is observed due to the presence of the BTBT between the heavily doped p{sup +} drain and n{sup +} channel regions, indicating that our TFETs can operate in the n-channel mode as well. Furthermore, the BTBT generation rates for both the p-channel and n-channel operating modes are nearly independent of the bending state (strain = 0.8%) of the plastic substrate.

Dry aerosol jet printing of conductive silver lines on a heated silicon substrate

Science.gov (United States)

Efimov, A. A.; Arsenov, P. V.; Protas, N. V.; Minkov, K. N.; Urazov, M. N.; Ivanov, V. V.

2018-02-01

A new method for dry aerosol jet printing conductive lines on a heated substrate is presented. The method is based on the use of a spark discharge generator as a source of dry nanoparticles and a heating plate for their sintering. This method allows creating conductive silver lines on a heated silicon substrate up to 300 °C without an additional sintering step. It was found that for effective sintering lines of silver nanoparticles the temperature of the heated substrate should be about more than 200-250 °C. Average thickness of the sintered silver lines was equal to ∼20 µm. Printed lines showed electrical resistivity equal to 35 μΩ·cm, which is 23 times greater than the resistivity of bulk silver.

First-principles investigation of indium diffusion in a silicon substrate

International Nuclear Information System (INIS)

Yoon, Kwan-Sun; Hwang, Chi-Ok; Yoo, Jae-Hyun; Won, Tae-Young

2006-01-01

In this paper, we report the total energy, the minimum energy path, and the migration energy of indium in a silicon substrate by using ab-initio calculations. Stable configurations during indium diffusion were obtained from the calculation of the total energy, and we estimated the minimum energy path (MEP) with the nudged elastic band (NEB) method. After finding the MEP, we found the energy barrier for the diffusion of indium to be 0.8 eV from an exact calculation of the total energies at the minimum and the transition state.

Thin-Film layers with Interfaces that reduce RF Losses on High-Resistivity Silicon Substrates

NARCIS (Netherlands)

Evseev, S. B.; Milosavljevic, S.; Nanver, L. K.

2017-01-01

Radio-Frequency (RF) losses on High-Resistivity Silicon (HRS) substrates were studied for several different surface passivation layers comprising thin-films of SiC, SiN and SiO2 In many combinations, losses from conductive surface channels were reduced and increasing the number of interfaces between

Pulsed Laser Deposition of Zinc Sulfide Thin Films on Silicon: The influence of substrate orientation and preparation on thin film morphology and texture

OpenAIRE

Heimdal, Carl Philip J

2014-01-01

The effect of orientation and preparation of silicon substrates on the growth morphology and crystalline structure of ZnS thin films deposited by pulsed laser deposition (PLD) has been investigated through scanning electron microscopy (SEM) and grazing incidence x-ray diffraction (GIXRD). ZnS thin films were grown on silicon (100) and (111), on HF-treated and untreated silicon (100) as well as substrates coated with Al, Ge and Au. The ZnS films showed entirely different morphologies for ZnS f...

High-temperature laser annealing for thin film polycrystalline silicon solar cell on glass substrate

Science.gov (United States)

Chowdhury, A.; Schneider, J.; Dore, J.; Mermet, F.; Slaoui, A.

2012-06-01

Thin film polycrystalline silicon films grown on glass substrate were irradiated with an infrared continuous wave laser for defects annealing and/or dopants activation. The samples were uniformly scanned using an attachment with the laser system. Substrate temperature, scan speed and laser power were varied to find suitable laser annealing conditions. The Raman spectroscopy and Suns- V oc analysis were carried out to qualify the films quality after laser annealing. A maximum enhancement of the open circuit voltage V oc of about 100 mV is obtained after laser annealing of as-grown polysilicon structures. A strong correlation was found between the full width half maximum of the Si crystalline peak and V oc. It is interpreted as due to defects annealing as well as to dopants activation in the absorbing silicon layer. The maximum V oc reached is 485 mV after laser treatment and plasma hydrogenation, thanks to defects passivation.

Heterogenous integration of a thin-film GaAs photodetector and a microfluidic device on a silicon substrate

International Nuclear Information System (INIS)

Song, Fuchuan; Xiao, Jing; Udawala, Fidaali; Seo, Sang-Woo

2011-01-01

In this paper, heterogeneous integration of a III–V semiconductor thin-film photodetector (PD) with a microfluidic device is demonstrated on a SiO 2 –Si substrate. Thin-film format of optical devices provides an intimate integration of optical functions with microfluidic devices. As a demonstration of a multi-material and functional system, the biphasic flow structure in the polymeric microfluidic channels was co-integrated with a III–V semiconductor thin-film PD. The fluorescent drops formed in the microfluidic device are successfully detected with an integrated thin-film PD on a silicon substrate. The proposed three-dimensional integration structure is an alternative approach to combine optical functions with microfluidic functions on silicon-based electronic functions.

Integrated Circuit Interconnect Lines on Lossy Silicon Substrate with Finite Element Method

OpenAIRE

Sarhan M. Musa,; Matthew N. O. Sadiku

2014-01-01

The silicon substrate has a significant effect on the inductance parameter of a lossy interconnect line on integrated circuit. It is essential to take this into account in determining the transmission line electrical parameters. In this paper, a new quasi-TEM capacitance and inductance analysis of multiconductor multilayer interconnects is successfully demonstrated using finite element method (FEM). We specifically illustrate the electrostatic modeling of single and coupled in...

Experimental study on surface wrinkling of silicon monoxide film on compliant substrate under thermally induced loads

Science.gov (United States)

Li, Chuanwei; Kong, Yingxiao; Jiang, Wenchong; Wang, Zhiyong; Li, Linan; Wang, Shibin

2017-06-01

The wrinkling of a silicon monoxide thin film on a compliant poly(dimethylsiloxane) (PDMS) substrate structure was experimentally investigated in this study. The self-expansion effect of PDMS during film deposition was utilized to impose a pretensile strain on the structure through a specially made fixture. A laser scanning confocal microscope (LSCM) system with an in situ heating stage was employed for the real-time measurement. The Young’s modulus of the silicon monoxide thin film as well as the PDMS substrate was measured on the basis of the elasticity theory. Moreover, the effects of temperature variations on geometric parameters in the postbuckling state, such as wavelength and amplitude, were analyzed. It was proved that wavelength is relatively immune to thermal loads, while amplitude is much more sensitive.

Deposition of magnetoelectric hexaferrite thin films on substrates of silicon

Energy Technology Data Exchange (ETDEWEB)

Zare, Saba; Izadkhah, Hessam; Vittoria, Carmine

2016-12-15

Magnetoelectric M-type hexaferrite thin films (SrCo{sub 2}Ti{sub 2}Fe{sub 8}O{sub 19}) were deposited using Pulsed Laser Deposition (PLD) technique on Silicon substrate. A conductive oxide layer of Indium-Tin Oxide (ITO) was deposited as a buffer layer with the dual purposes of 1) to reduce lattice mismatch between the film and silicon and 2) to lower applied voltages to observe magnetoelectric effects at room temperature on Silicon based devices. The film exhibited magnetoelectric effects as confirmed by vibrating sample magnetometer (VSM) techniques in voltages as low as 0.5 V. Without the oxide conductive layer the required voltages to observe magnetoelectric effects was typically about 1000 times larger. The magnetoelectric thin films were characterized by X-ray diffractometer, scanning electron microscope, energy-dispersive spectroscopy, vibrating sample magnetometer, and ferromagnetic resonance techniques. We measured saturation magnetization of 650 G, and coercive field of about 150 Oe for these thin films. The change in remanence magnetization was measured in the presence of DC voltages and the changes in remanence were in the order of 15% with the application of only 0.5 V (DC voltage). We deduced a magnetoelectric coupling, α, of 1.36×10{sup −9} s m{sup −1} in SrCo{sub 2}Ti{sub 2}Fe{sub 8}O{sub 19} thin films.

Silicon on insulator self-aligned transistors

Science.gov (United States)

McCarthy, Anthony M.

2003-11-18

A method for fabricating thin-film single-crystal silicon-on-insulator (SOI) self-aligned transistors. Standard processing of silicon substrates is used to fabricate the transistors. Physical spaces, between the source and gate, and the drain and gate, introduced by etching the polysilicon gate material, are used to provide connecting implants (bridges) which allow the transistor to perform normally. After completion of the silicon substrate processing, the silicon wafer is bonded to an insulator (glass) substrate, and the silicon substrate is removed leaving the transistors on the insulator (glass) substrate. Transistors fabricated by this method may be utilized, for example, in flat panel displays, etc.

Gas phase considerations for the deposition of thin film silicon solar cells by VHF-PECVD at low substrate temperatures

NARCIS (Netherlands)

Rath, J.K.; Verkerk, A.D.; Brinza, M.; Schropp, R.E.I.; Goedheer, W.J.; Krzhizhanovskaya, V.V.; Gorbachev, Y.E.; Orlov, K.E.; Khilkevitch, E.M.; Smirnov, A.S.

2008-01-01

Fabrication of thin film silicon solar cells on cheap plastics or paper-like substrate requires deposition process at very low substrate temperature, typically ≤ 100 °C. In a chemical vapor deposition process, low growth temperatures lead to materials with low density, high porosity, high disorder

The effect of silicon crystallographic orientation on the formation of silicon nanoclusters during anodic electrochemical etching

International Nuclear Information System (INIS)

Timokhov, D. F.; Timokhov, F. P.

2009-01-01

Possible ways for increasing the photoluminescence quantum yield of porous silicon layers have been investigated. The effect of the anodization parameters on the photoluminescence properties for porous silicon layers formed on silicon substrates with different crystallographic orientations was studied. The average diameters for silicon nanoclusters are calculated from the photoluminescence spectra of porous silicon. The influence of the substrate crystallographic orientation on the photoluminescence quantum yield of porous silicon is revealed. A model explaining the effect of the substrate orientation on the photoluminescence properties for the porous silicon layers formed by anode electrochemical etching is proposed.

Hot-Electron Bolometer Mixers on Silicon-on-Insulator Substrates for Terahertz Frequencies

Science.gov (United States)

Skalare, Anders; Stern, Jeffrey; Bumble, Bruce; Maiwald, Frank

2005-01-01

A terahertz Hot-Electron Bolometer (HEB) mixer design using device substrates based on Silicon-On-Insulator (SOI) technology is described. This substrate technology allows very thin chips (6 pm) with almost arbitrary shape to be manufactured, so that they can be tightly fitted into a waveguide structure and operated at very high frequencies with only low risk for power leakages and resonance modes. The NbTiN-based bolometers are contacted by gold beam-leads, while other beamleads are used to hold the chip in place in the waveguide test fixture. The initial tests yielded an equivalent receiver noise temperature of 3460 K double-sideband at a local oscillator frequency of 1.462 THz and an intermediate frequency of 1.4 GHz.

Process Simulation and Characterization of Substrate Engineered Silicon Thin Film Transistor for Display Sensors and Large Area Electronics

International Nuclear Information System (INIS)

Hashmi, S M; Ahmed, S

2013-01-01

Design, simulation, fabrication and post-process qualification of substrate-engineered Thin Film Transistors (TFTs) are carried out to suggest an alternate manufacturing process step focused on display sensors and large area electronics applications. Damage created by ion implantation of Helium and Silicon ions into single-crystalline n-type silicon substrate provides an alternate route to create an amorphized region responsible for the fabrication of TFT structures with controllable and application-specific output parameters. The post-process qualification of starting material and full-cycle devices using Rutherford Backscattering Spectrometry (RBS) and Proton or Particle induced X-ray Emission (PIXE) techniques also provide an insight to optimize the process protocols as well as their applicability in the manufacturing cycle

Formation of hexagonal silicon carbide by high energy ion beam irradiation on Si (1 0 0) substrate

International Nuclear Information System (INIS)

Bhuyan, H; Favre, M; Valderrama, E; Avaria, G; Chuaqui, H; Mitchell, I; Wyndham, E; Saavedra, R; Paulraj, M

2007-01-01

We report the investigation of high energy ion beam irradiation on Si (1 0 0) substrates at room temperature using a low energy plasma focus (PF) device operating in methane gas. The unexposed and ion exposed substrates were characterized by x-ray diffraction, scanning electron microscopy (SEM), photothermal beam deflection, energy-dispersive x-ray analysis and atomic force microscopy (AFM) and the results are reported. The interaction of the pulsed PF ion beams, with characteristic energy in the 60-450 keV range, with the Si surface, results in the formation of a surface layer of hexagonal silicon carbide. The SEM and AFM analyses indicate clear step bunching on the silicon carbide surface with an average step height of 50 nm and a terrace width of 800 nm

Study of thickness and uniformity of oxide passivation with DI-O3 on silicon substrate for electronic and photonic applications

Science.gov (United States)

Sharma, Mamta; Hazra, Purnima; Singh, Satyendra Kumar

2018-05-01

Since the beginning of semiconductor fabrication technology evolution, clean and passivated substrate surface is one of the prime requirements for fabrication of Electronic and optoelectronic device fabrication. However, as the scale of silicon circuits and device architectures are continuously decreased from micrometer to nanometer (from VLSI to ULSI technology), the cleaning methods to achieve better wafer surface qualities has raised research interests. The development of controlled and uniform silicon dioxide is the most effective and reliable way to achieve better wafer surface quality for fabrication of electronic devices. On the other hand, in order to meet the requirement of high environment safety/regulatory standards, the innovation of cleaning technology is also in demand. The controlled silicon dioxide layer formed by oxidant de-ionized ozonated water has better uniformity. As the uniformity of the controlled silicon dioxide layer is improved on the substrate, it enhances the performance of the devices. We can increase the thickness of oxide layer, by increasing the ozone time treatment. We reported first time to measurement of thickness of controlled silicon dioxide layer and obtained the uniform layer for same ozone time.

The role of the substrate in Graphene/Silicon photodiodes

Science.gov (United States)

Luongo, G.; Giubileo, F.; Iemmo, L.; Di Bartolomeo, A.

2018-01-01

The Graphene/Silicon (Gr/Si) junction can function as a Schottky diode with performances strictly related to the quality of the interface. Here, we focus on the substrate geometry and on its effects on Gr/Si junction physics. We fabricate and study the electrical and optical behaviour of two types of devices: one made of a Gr/Si planar junction, the second realized with graphene on an array of Si nanotips. We show that the Gr/Si flat device exhibits a reverse photocurrent higher than the forward current and achieves a photoresponsivity of 2.5 A/W. The high photoresponse is due to the charges photogenerated in Si below a parasitic graphene/SiO2/Si structure, which are injected into the Gr/Si junction region. The other device with graphene on Si-tips displays a reverse current that grows exponentially with the bias. We explain this behaviour by taking into account the tip geometry of the substrate, which magnifies the electric field and shifts the Fermi level of graphene, thus enabling fine-tuning of the Schottky barrier height. The Gr/Si-tip device achieves a higher photoresponsivity, up to 3 A/W, likely due to photocharge internal multiplication.

Upconversion and tribological properties of β-NaYF{sub 4}:Yb,Er film synthesized on silicon substrate

Energy Technology Data Exchange (ETDEWEB)

Wang, Chuanying [School of Mechanical Engineering, Shanghai Jiao Tong University, Shanghai 200240 (China); Cheng, Xianhua, E-mail: xhcheng@sjtu.edu.cn [School of Mechanical Engineering, Shanghai Jiao Tong University, Shanghai 200240 (China); State Key Laboratory of Solid Lubrication, Lanzhou Institute of Chemical Physics, Chinese Academy of Sciences, Lanzhou 730000 (China)

2016-05-15

Highlights: • β-NaYF{sub 4}:Yb,Er upconversion (UC) film was synthesized on silicon substrate. • Tribological test was used to qualitatively evaluate the adhesion of the UC film. • The UC film was combined with Si substrate by covalent chemical bonds. • The method used in this work can be applicable for other UC films. - Abstract: In this work, β-NaYF{sub 4}:Yb,Er upconversion (UC) film was successfully prepared on silicon (Si) substrate via self-assemble method for the first time. The chemical composition and surface morphology of the UC film were characterized by Fourier transform infrared spectroscopy (FT-IR), X-ray photoelectron spectroscopy (XPS), water contact angle (WCA), X-ray power diffraction (XRD), and scanning electron microscopy (SEM) measurements. To investigate the effects of KH-560 primer film and chemical reactions on the UC luminescence properties of β-NaYF{sub 4}:Yb,Er UC film, decay profiles of the 540 nm and 655 nm radiations were measured. Furthermore, tribological test was applied to qualitatively evaluate the adhesion of the UC film. The results indicate that the UC film has been successfully prepared on Si substrate by covalent chemical bonds. This work provides a facile way to synthesize β-NaYF{sub 4}:Yb,Er UC film with robust adhesion to the substrate, which can be applicable for other UC films.

MgB2 thin films on silicon nitride substrates prepared by an in situ method

International Nuclear Information System (INIS)

Monticone, Eugenio; Gandini, Claudio; Portesi, Chiara; Rajteri, Mauro; Bodoardo, Silvia; Penazzi, Nerino; Dellarocca, Valeria; Gonnelli, Renato S

2004-01-01

Large-area MgB 2 thin films were deposited on silicon nitride and sapphire substrates by co-deposition of Mg and B. After a post-annealing in Ar atmosphere at temperatures between 773 and 1173 K depending on the substrate, the films showed a critical temperature higher than 35 K with a transition width less than 0.5 K. The x-ray diffraction pattern suggested a c-axis preferential orientation in films deposited on amorphous substrate. The smooth surface and the good structural properties of these MgB 2 films allowed their reproducible patterning by a standard photolithographic process down to dimensions of the order of 10 μm and without a considerable degradation of the superconducting properties

Epitaxial growth of silicon for layer transfer

Science.gov (United States)

Teplin, Charles; Branz, Howard M

2015-03-24

Methods of preparing a thin crystalline silicon film for transfer and devices utilizing a transferred crystalline silicon film are disclosed. The methods include preparing a silicon growth substrate which has an interface defining substance associated with an exterior surface. The methods further include depositing an epitaxial layer of silicon on the silicon growth substrate at the surface and separating the epitaxial layer from the substrate substantially along the plane or other surface defined by the interface defining substance. The epitaxial layer may be utilized as a thin film of crystalline silicon in any type of semiconductor device which requires a crystalline silicon layer. In use, the epitaxial transfer layer may be associated with a secondary substrate.

Fabrication of Si-based planar type patch clamp biosensor using silicon on insulator substrate

International Nuclear Information System (INIS)

Zhang, Z.L.; Asano, T.; Uno, H.; Tero, R.; Suzui, M.; Nakao, S.; Kaito, T.; Shibasaki, K.; Tominaga, M.; Utsumi, Y.; Gao, Y.L.; Urisu, T.

2008-01-01

The aim of this paper is to fabricate the planar type patch clamp ion-channel biosensor, which is suitable for the high throughput screening, using silicon-on-insulator (SOI) substrate. The micropore with 1.2 μm diameter is formed through the top Si layer and the SiO 2 box layer of the SOI substrate by focused ion beam (FIB). Then the substrate is assembled into the microfluidic circuit. The human embryonic kidney 293 (HEK-293) cell transfected with transient receptor potential vanilloid type 1 (TRPV1) is positioned on the micropore and the whole-cell configuration is formed by the suction. Capsaicin is added to the extracellular solution as a ligand molecule, and the channel current showing the desensitization unique to TRPV1 is measured successfully

Fabrication of Si-based planar type patch clamp biosensor using silicon on insulator substrate

Energy Technology Data Exchange (ETDEWEB)

Zhang, Z.L.; Asano, T. [Graduate University for Advanced Studies, Myodaiji, Okazaki, 444-8585 (Japan); Uno, H. [Institute for Molecular Science, Myodaiji, Okazaki, 444-8585 (Japan); Tero, R. [Graduate University for Advanced Studies, Myodaiji, Okazaki, 444-8585 (Japan); Institute for Molecular Science, Myodaiji, Okazaki, 444-8585 (Japan); Suzui, M.; Nakao, S. [Institute for Molecular Science, Myodaiji, Okazaki, 444-8585 (Japan); Kaito, T. [SII NanoTechnology Inc., 36-1, Takenoshita, Oyama-cho, Sunto-gun, Shizuoka, 410-1393 (Japan); Shibasaki, K.; Tominaga, M. [Okazaki Institute for Integrative Bioscience, 5-1, Higashiyama, Myodaiji, Okazaki, 444-8787 (Japan); Utsumi, Y. [Laboratory of Advanced Science and Technology for Industry, University of Hyogo, 3-1-2, Koto, Kamigori, Ako-gun, Hyogo, 678-1205 (Japan); Gao, Y.L. [Department of Physics and Astronomy, Rochester University, Rochester, New York 14627 (United States); Urisu, T. [Graduate University for Advanced Studies, Myodaiji, Okazaki, 444-8585 (Japan); Institute for Molecular Science, Myodaiji, Okazaki, 444-8585 (Japan)], E-mail: urisu@ims.ac.jp

2008-03-03

The aim of this paper is to fabricate the planar type patch clamp ion-channel biosensor, which is suitable for the high throughput screening, using silicon-on-insulator (SOI) substrate. The micropore with 1.2 {mu}m diameter is formed through the top Si layer and the SiO{sub 2} box layer of the SOI substrate by focused ion beam (FIB). Then the substrate is assembled into the microfluidic circuit. The human embryonic kidney 293 (HEK-293) cell transfected with transient receptor potential vanilloid type 1 (TRPV1) is positioned on the micropore and the whole-cell configuration is formed by the suction. Capsaicin is added to the extracellular solution as a ligand molecule, and the channel current showing the desensitization unique to TRPV1 is measured successfully.

Investigation on nonlinear optical properties of MoS2 nanoflakes grown on silicon and quartz substrates

Science.gov (United States)

Bayesteh, Samaneh; Zahra Mortazavi, Seyedeh; Reyhani, Ali

2018-05-01

In this study, MoS2 nanoflakes were directly grown on different substrates—Si/SiO2 and quartz—by one-step thermal chemical vapor deposition using MoO3 and sulfide powders as precursors. Scanning electron microscopy and x-ray diffraction patterns demonstrated the formation of MoS2 structures on both substrates. Moreover, UV-visible and photoluminescence analysis confirmed the formation of MoS2 few-layer structures. According to Raman spectroscopy, by assessment of the line width and frequency shift differences between the and A 1g, it was inferred that the MoS2 grown on the silicon substrate was monolayer and that grown on the quartz substrate was multilayer. In addition, open-aperture and close-aperture Z-scan techniques were employed to study the nonlinear optical properties including nonlinear absorption and nonlinear refraction of the grown MoS2. All experiments were performed using a diode laser with a wavelength of 532 nm as the light source. It is noticeable that both samples demonstrate obvious self-defocusing behavior. The monolayer MoS2 grown on the silicon substrate displayed considerable two-photon absorption while, the multilayer MoS2 synthesized on the quartz exhibited saturable absorption. In general, few-layered MoS2 would be useful for the development of nanophotonic devices like optical limiters, optical switchers, etc.

Buried oxide layer in silicon

Science.gov (United States)

Sadana, Devendra Kumar; Holland, Orin Wayne

2001-01-01

A process for forming Silicon-On-Insulator is described incorporating the steps of ion implantation of oxygen into a silicon substrate at elevated temperature, ion implanting oxygen at a temperature below 200.degree. C. at a lower dose to form an amorphous silicon layer, and annealing steps to form a mixture of defective single crystal silicon and polycrystalline silicon or polycrystalline silicon alone and then silicon oxide from the amorphous silicon layer to form a continuous silicon oxide layer below the surface of the silicon substrate to provide an isolated superficial layer of silicon. The invention overcomes the problem of buried isolated islands of silicon oxide forming a discontinuous buried oxide layer.

Design, fabrication and characterisation of advanced substrate crosstalk suppression structures in silicon on insulator substrates with buried ground planes (GPSOI)

International Nuclear Information System (INIS)

Stefanou, Stefanos

2002-07-01

Substrate crosstalk or coupling has been acknowledged to be a limiting factor in mixed signal RF integration. Although high levels of integration and high frequencies of operation are desirable for mixed mode RF and microwave circuits, they make substrate crosstalk more pronounced and may lead to circuit performance degradation. High signal isolation is dictated by requirements for low power dissipation, reduced number of components and lower integration costs for feasible system-on-chip (SoC) solutions. Substrate crosstalk suppression in ground plane silicon-on-insulator (GPSOI) substrates is investigated in this thesis. Test structures are designed and fabricated on SOI substrates with a buried WSi 2 plane that is connected to ground; hence it is called a ground plane. A Faraday cage structure that exhibits very high degrees of signal isolation is presented and compared to other SOI isolation schemes. The Faraday cage structure is shown to achieve 20 dB increased isolation in the frequency range of 0.5-50 GHz compared to published data for high resistivity (200 Ωcm) thin film SOI substrates with no ground planes, but where capacitive guard rings were used. The measurement results are analysed with the aid of planar electromagnetic simulators and compact lumped element models of all the fabricated test structures are developed. The accuracy of the lumped models is validated against experimental measurements. (author)

Numerical study of self-heating effects of small-size MOSFETs fabricated on silicon-on-aluminum nitride substrate

International Nuclear Information System (INIS)

Ding Yanfang; Zhu Ziqiang; Zhu Ming; Lin Chenglu

2006-01-01

Compared with bulk-silicon technology, silicon-on-insulator (SOI) technology possesses many advantages but it is inevitable that the buried silicon dioxide layer also thermally insulates the metal-oxide-silicon field-effect transistors (MOSFETs) from the bulk due to the low thermal conductivity. One of the alternative insulator to replace the buried oxide layer is aluminum nitride (MN), which has a thermal conductivity that is about 200 times higher than that of SiO 2 (320 W·m -1 ·K -1 versus 1.4 W·m -1 ·K -l ). To investigate the self-heating effects of small-size MOSFETs fabricated on silicon-on-aluminum nitride (SOAN) substrate, a two-dimensional numerical analysis is performed by using a device simulator called MEDICI run on a Solaris workstation to simulate the electrical characteristics and temperature distribution by comparing with those of bulk and standard SOI MOSFETs. Our study suggests that AIN is a suitable alternative to silicon dioxide as a buried dielectric in SOI and expands the applications of SOI to high temperature conditions. (authors)

Triple-junction thin-film silicon solar cell fabricated on periodically textured substrate with a stabilized efficiency of 13.6%

Science.gov (United States)

Sai, Hitoshi; Matsui, Takuya; Koida, Takashi; Matsubara, Koji; Kondo, Michio; Sugiyama, Shuichiro; Katayama, Hirotaka; Takeuchi, Yoshiaki; Yoshida, Isao

2015-05-01

We report a high-efficiency triple-junction thin-film silicon solar cell fabricated with the so-called substrate configuration. It was verified whether the design criteria for developing single-junction microcrystalline silicon (μc-Si:H) solar cells are applicable to multijunction solar cells. Furthermore, a notably high short-circuit current density of 32.9 mA/cm2 was achieved in a single-junction μc-Si:H cell fabricated on a periodically textured substrate with a high-mobility front transparent contacting layer. These technologies were also combined into a-Si:H/μc-Si:H/μc-Si:H triple-junction cells, and a world record stabilized efficiency of 13.6% was achieved.

Optical and electrical characteristics of zirconium oxide thin films deposited on silicon substrates by spray pyrolysis

International Nuclear Information System (INIS)

Aguilar-Frutis, M.; Araiza, J.J.; Falcony, C.; Garcia, M.

2002-01-01

The optical and electrical characteristics of zirconium oxide thin films deposited by spray pyrolysis on silicon substrates are reported. The films were deposited from a spraying solution of zirconium acetylacetonate in N,N-dimethylformamide using an ultrasonic mist generator on (100) Si substrates. The substrate temperature during deposition was in the range of 400 to 600 grad C. Deposition rates up to 16 A/sec were obtained depending on the spraying solution concentration and on the substrate temperature. A refraction index of the order of 2.0 was measured on these films by ellipsometry. The electrical characteristics of the films were determined from the capacitance and current versus voltage measurements. The addition of water mist during the spraying deposition process was also studied in the characteristics of the films. (Authors)

Three-dimensionally structured silicon as a substrate for the MOVPE growth of GaN nanoLEDs

Energy Technology Data Exchange (ETDEWEB)

Fuendling, Soenke; Li, Shunfeng; Soekmen, Uensal; Merzsch, Stephan; Peiner, Erwin; Wehmann, Hergo-Heinrich; Waag, Andreas [Institut fuer Halbleitertechnik, TU Braunschweig, Braunschweig (Germany); Hinze, Peter; Weimann, Thomas [Physikalisch-Technische Bundesanstalt (PTB), Braunschweig (Germany); Jahn, Uwe; Trampert, Achim; Riechert, Henning [Paul-Drude-Institut fuer Festkoerperelektronik, Berlin (Germany)

2009-06-15

Three-dimensionally patterned Si(111) substrates are used to grow GaN based heterostructures by metalorganic vapour phase epitaxy, with the goal of fabricating well controlled, defect reduced GaN-based nanoLEDs. In contrast to other approaches to achieve GaN nanorods, we employed silicon substrates with deep etched nanopillars to control the GaN nanorods growth by varying the size and distance of the Si pillars. The small footprint of GaN nanorods grown on Si pillars minimise the influence of the lattice mismatched substrate and improve the material quality. For the Si pillars an inductively coupled plasma dry-etching process at cryogenic temperature has been developed. An InGaN/GaN multi quantum well (MQW) structure has been incorporated into the GaN nanorods. We found GaN nanostructures grown on top of the silicon pillars with a pyramidal shape. This shape results from a competitive growth on different facets as well as from surface diffusion of the growth species. Spatially resolved optical properties of the structures are analysed by cathodoluminescence. Strongly spatial-dependent MQW emission spectra indicate the growth rate differences on top of the rods. (copyright 2009 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim) (orig.)

Rapid thermal process by RF heating of nano-graphene layer/silicon substrate structure: Heat explosion theory approach

Science.gov (United States)

Sinder, M.; Pelleg, J.; Meerovich, V.; Sokolovsky, V.

2018-03-01

RF heating kinetics of a nano-graphene layer/silicon substrate structure is analyzed theoretically as a function of the thickness and sheet resistance of the graphene layer, the dimensions and thermal parameters of the structure, as well as of cooling conditions and of the amplitude and frequency of the applied RF magnetic field. It is shown that two regimes of the heating can be realized. The first one is characterized by heating of the structure up to a finite temperature determined by equilibrium between the dissipated loss power caused by induced eddy-currents and the heat transfer to environment. The second regime corresponds to a fast unlimited temperature increase (heat explosion). The criterions of realization of these regimes are presented in the analytical form. Using the criterions and literature data, it is shown the possibility of the heat explosion regime for a graphene layer/silicon substrate structure at RF heating.

Substrate temperature dependence of microcrystallinity in plasma-deposited, boron-doped hydrogenated silicon alloys

International Nuclear Information System (INIS)

Rajeswaran, G.; Kampas, F.J.; Vanier, P.E.; Sabatini, R.L.; Tafto, J.

1983-01-01

The glow-discharge decomposition of silane diluted in hydrogen using diborane as a dopant results in the deposition of p-type microcrystalline silicon films at relatively low temperatures. The conductivity of these films is critically dependent on the substrate temperature when the ratio of silane flow rate to total gas flow rate is 1%. Electron micrographs show that highly conducting films contain numerous clusters of 2.5-nm crystallites that are embedded in an amorphous medium

Micro knife-edge optical measurement device in a silicon-on-insulator substrate.

Science.gov (United States)

Chiu, Yi; Pan, Jiun-Hung

2007-05-14

The knife-edge method is a commonly used technique to characterize the optical profiles of laser beams or focused spots. In this paper, we present a micro knife-edge scanner fabricated in a silicon-on-insulator substrate using the micro-electromechanical-system technology. A photo detector can be fabricated in the device to allow further integration with on-chip signal conditioning circuitry. A novel backside deep reactive ion etching process is proposed to solve the residual stress effect due to the buried oxide layer. Focused optical spot profile measurement is demonstrated.

Design and fabrication of non silicon substrate based MEMS energy harvester for arbitrary surface applications

Science.gov (United States)

Balpande, Suresh S.; Pande, Rajesh S.

2016-04-01

Internet of Things (IoT) uses MEMS sensor nodes and actuators to sense and control objects through Internet. IOT deploys millions of chemical battery driven sensors at different locations which are not reliable many times because of frequent requirement of charging & battery replacement in case of underground laying, placement at harsh environmental conditions, huge count and difference between demand (24 % per year) and availability (energy density growing rate 8% per year). Energy harvester fabricated on silicon wafers have been widely used in manufacturing MEMS structures. These devices require complex fabrication processes, costly chemicals & clean room. In addition to this silicon wafer based devices are not suitable for curved surfaces like pipes, human bodies, organisms, or other arbitrary surface like clothes, structure surfaces which does not have flat and smooth surface always. Therefore, devices based on rigid silicon wafers are not suitable for these applications. Flexible structures are the key solution for this problems. Energy transduction mechanism generates power from free surrounding vibrations or impact. Sensor nodes application has been purposefully selected due to discrete power requirement at low duty cycle. Such nodes require an average power budget in the range of about 0.1 microwatt to 1 mW over a period of 3-5 seconds. Energy harvester is the best alternate source in contrast with battery for sensor node application. Novel design of Energy Harvester based on cheapest flexible non silicon substrate i.e. cellulose acetate substrate have been modeled, simulated and analyzed on COMSOL multiphysics and fabricated using sol-gel spin coating setup. Single cantilever based harvester generates 60-75 mV peak electric potential at 22Hz frequency and approximately 22 µW power at 1K-Ohm load. Cantilever array can be employed for generating higher voltage by replicating this structure. This work covers design, optimization, fabrication of harvester and

Substrate-bias effect on the breakdown characteristic in a new silicon high-voltage device structure

International Nuclear Information System (INIS)

Li Qi; Wang Weidong; Zhao Qiuming; Wei Xueming

2012-01-01

A novel silicon double-RESURF LDMOS structure with an improved breakdown characteristic by substrate bias technology (SB) is reported. The P-type epitaxial layer is embedded between an N-type drift region and an N-type substrate to block the conduction path in the off-state and change the distributions of the bulk electric field. The substrate bias strengthens the charge share effect of the drift region near the source, and the vertical electric field peak under the drain is decreased, which is especially helpful in improving the vertical breakdown voltage in a lateral power device with a thin drift region. The numerical results by MEDICI indicate that the breakdown voltage of the proposed device is increased by 97% compared with a conventional LDMOS, while maintaining a lowon-resistance. (semiconductor devices)

An investigation of the adhesion of gold contacts on silicon detectors of nuclear radiation as a function of the substrate temperature

International Nuclear Information System (INIS)

Gumnerova, L.; Mikhajlov, M.

1981-01-01

The dependence of the adhesion of a thin gold film to an etched single crystal silicon substrate temperature and duration of aging is investigated. N-type silicon samples of 3Ω/m specific resistivity and 0.002 m thick are used. These samples are lapped by a series of abrasive powders with a grain diameter of 40 μm to 7 μm and etched by a 1:3:0.5 (HF:HNO 3 :CH 3 COOH) etching agent. The principal schemes of the evaporation equipment and the adhesion testing device are presented. Gold contacts are deposited at substrate temperature ranging from room temperature up to 433 K. The obtained gold films on the silicon substrates are tested and the results are given. It is seen that the adhesion of the gold film to the sample heated up to 373 K is about 50 times higher than the adhesion of the fresh unheated sample. The comparison between samples subjected to aging shows that the adhesion of heated samples is about 10 times higher and does not change essentially after ageing. Some possible explanations of this phenomena are given

Enhanced optical output power of InGaN/GaN light-emitting diodes grown on a silicon (111) substrate with a nanoporous GaN layer.

Science.gov (United States)

Lee, Kwang Jae; Chun, Jaeyi; Kim, Sang-Jo; Oh, Semi; Ha, Chang-Soo; Park, Jung-Won; Lee, Seung-Jae; Song, Jae-Chul; Baek, Jong Hyeob; Park, Seong-Ju

2016-03-07

We report the growth of InGaN/GaN multiple quantum wells blue light-emitting diodes (LEDs) on a silicon (111) substrate with an embedded nanoporous (NP) GaN layer. The NP GaN layer is fabricated by electrochemical etching of n-type GaN on the silicon substrate. The crystalline quality of crack-free GaN grown on the NP GaN layer is remarkably improved and the residual tensile stress is also decreased. The optical output power is increased by 120% at an injection current of 20 mA compared with that of conventional LEDs without a NP GaN layer. The large enhancement of optical output power is attributed to the reduction of threading dislocation, effective scattering of light in the LED, and the suppression of light propagation into the silicon substrate by the NP GaN layer.

Adhesion energies of 2D graphene and MoS{sub 2} to silicon and metal substrates

Energy Technology Data Exchange (ETDEWEB)

Torres, Jorge; Liu, Pei; Yun, Minhee [Department of Electrical and Computer Engineering, University of Pittsburgh, Pittsburgh, PA (United States); Zhu, Yisi [Materials Science Division, Argonne National Lab, Lemont, IL (United States); Lim, Seong Chu [Department of Energy Science, Sungkyunkwan University (SKKU), Suwon (Korea, Republic of); Center for Integrated Nanostructure Physics, Institute for Basic Science (IBS), Suwon (Korea, Republic of)

2018-01-15

In this paper, results for the adhesion energy of graphene and MoS{sub 2} to silicon based and metal substrates using the intercalation of nanoparticles method are presented. In this method, nanoparticles are dispersed onto the substrates before transferring the 2D material onto the substrate. This causes a blister to form, the width and height of which can be measured by AFM. Using a simple model then allows for the adhesion energy to be found. The substrates tested are SiO{sub 2}, Si{sub 3}N{sub 4}, gold, and platinum. Gold is found to have the highest adhesion energy per area of 7687.10 and 1207.26 mJ m{sup -2} for graphene and MoS{sub 2} respectively. (copyright 2017 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim)

The effect of baking conditions on the effective contact areas of screen-printed silver layer on silicon substrate

Energy Technology Data Exchange (ETDEWEB)

Tietun Sun; Jianmin Miao; Rongming Lin; Yongqing Fu [Nanyang Technological Univ., Micromachines Lab., Singapore (Singapore)

2005-01-01

In this paper, Ag-based paste was screen-printed on polished as well as on textured p-type (100) single crystalline silicon wafers. Three types of baking processes were studied: the tube furnace, the belt furnace and the hot plate baking. The effective contact areas of Ag/Si system were measured with a novel method, namely metal insulator semiconductor structure measurement. The results show that after baking on the hot plate at 400 deg C for 5 min, the size and number of pores in the Ag film layer as well as at the interface between silver layer and silicon decreases significantly, the effective contact area also increases about 20%, particularly on the textured silicon substrate. (Author)

The effect of baking conditions on the effective contact areas of screen-printed silver layer on silicon substrate

Energy Technology Data Exchange (ETDEWEB)

Sun, Tietun; Miao, Jianmin; Lin, Rongming; Fu, Yongqing [Micromachines Laboratory, School of Mechanical and Production Engineering, Nanyang Technological University, 50 Nanyang Avenue, Singapore 639798 (Singapore)

2005-01-01

In this paper, Ag-based paste was screen-printed on the polished as well as on the textured p-type (100) single crystalline silicon wafers. Three types of baking processes were studied: the tube furnace, the belt furnace and the hot plate baking. The effective contact areas of Ag/Si system were measured with a novel method, namely metal insulator semiconductor structure measurement. The results show that after baking on the hot plate at 400{sup o}C for 5min, the size and number of pores in the Ag film layer as well as at the interface between silver layer and silicon decreases significantly, the effective contact area also increases about 20%, particularly on the textured silicon substrate.

Effect of annealing temperature on optical and electrical properties of metallophthalocyanine thin films deposited on silicon substrate

Directory of Open Access Journals (Sweden)

Skonieczny R.

2016-09-01

Full Text Available The cobalt phthalocyanine (CoPc thin films (300 nm thick deposited on n-type silicon substrate have been studied using micro-Raman spectroscopy, atomic force spectroscopy (AFM and I-V measurement. The CoPc thin layers have been deposited at room temperature by the quasi-molecular beam evaporation technique. The micro-Raman spectra of CoPc thin films have been recorded in the spectral range of 1000 cm-1 to 1900 cm-1 using 488 nm excitation wavelength. Moreover, using surface Raman mapping it was possible to obtain information about polymorphic forms distribution (before and after annealing of metallophthalocyanine (α and β form from polarized Raman spectra. The I-V characteristics of the Au/CoPc/n-Si/Al Schottky barrier were also investigated. The obtained results showed that influence of the annealing process plays a crucial role in the ordering and electrical conductivity of the molecular structure of CoPc thin films deposited on n-type silicon substrate.

Design and simulation of a novel GaN based resonant tunneling high electron mobility transistor on a silicon substrate

International Nuclear Information System (INIS)

Chowdhury, Subhra; Biswas, Dhrubes; Chattaraj, Swarnabha

2015-01-01

For the first time, we have introduced a novel GaN based resonant tunneling high electron mobility transistor (RTHEMT) on a silicon substrate. A monolithically integrated GaN based inverted high electron mobility transistor (HEMT) and a resonant tunneling diode (RTD) are designed and simulated using the ATLAS simulator and MATLAB in this study. The 10% Al composition in the barrier layer of the GaN based RTD structure provides a peak-to-valley current ratio of 2.66 which controls the GaN based HEMT performance. Thus the results indicate an improvement in the current–voltage characteristics of the RTHEMT by controlling the gate voltage in this structure. The introduction of silicon as a substrate is a unique step taken by us for this type of RTHEMT structure. (paper)

Enhanced Raman scattering in porous silicon grating.

Science.gov (United States)

Wang, Jiajia; Jia, Zhenhong; Lv, Changwu

2018-03-19

The enhancement of Raman signal on monocrystalline silicon gratings with varying groove depths and on porous silicon grating were studied for a highly sensitive surface enhanced Raman scattering (SERS) response. In the experiment conducted, porous silicon gratings were fabricated. Silver nanoparticles (Ag NPs) were then deposited on the porous silicon grating to enhance the Raman signal of the detective objects. Results show that the enhancement of Raman signal on silicon grating improved when groove depth increased. The enhanced performance of Raman signal on porous silicon grating was also further improved. The Rhodamine SERS response based on Ag NPs/ porous silicon grating substrates was enhanced relative to the SERS response on Ag NPs/ porous silicon substrates. Ag NPs / porous silicon grating SERS substrate system achieved a highly sensitive SERS response due to the coupling of various Raman enhancement factors.

Phase transformation during silica cluster impact on crystal silicon substrate studied by molecular dynamics simulation

International Nuclear Information System (INIS)

Chen Ruling; Luo Jianbin; Guo Dan; Lu Xinchun

2008-01-01

The process of a silica cluster impact on a crystal silicon substrate is studied by molecular dynamics simulation. At the impact loading stage, crystal silicon of the impact zone transforms to a locally ordered molten with increasing the local temperature and pressure of the impact zone. And then the transient molten forms amorphous silicon directly as the local temperature and pressure decrease at the impact unloading stage. Moreover, the phase behavior between the locally ordered molten and amorphous silicon exhibits the reversible structural transition. The transient molten contains not only lots of four-fold atom but also many three- and five-fold atoms. And the five-fold atom is similar to the mixture structure of semi-Si-II and semi-bct5-Si. The structure transformation between five- and four-fold atoms is affected by both pressure and temperature. The structure transformation between three- and four-fold atoms is affected mostly by temperature. The direct structure transformation between five- and three-fold atoms is not observed. Finally, these five- and three-fold atoms are also different from the usual five- and three-fold deficient atoms of amorphous silicon. In addition, according to the change of coordination number of atoms the impact process is divided into six stages: elastic, plastic, hysteresis, phase regressive, adhesion and cooling stages

Dewetting and deposition of thin films with insoluble surfactants from curved silicone hydrogel substrates.

Science.gov (United States)

Bhamla, M Saad; Balemans, Caroline; Fuller, Gerald G

2015-07-01

We investigate the stabilizing effect of insoluble surfactant monolayers on thin aqueous films. We first describe an experimental platform that enables the formation of aqueous films laden with dipalmitoylphosphatidylcholine (DPPC) monolayers on curved silicone hydrogel (SiHy) substrates. We show that these surfactant layers extend the lifetime of the aqueous films. The films eventually "dewet" by the nucleation and growth of dry areas and the onset of this dewetting can be controlled by the surface rheology of the DPPC layer. We thus demonstrate that increasing the interfacial rheology of the DPPC layer leads to stable films that delay dewetting. We also show that dewetting can be exploited to controllably pattern the underlying curved SiHy substrates with DPPC layers. Copyright © 2015 Elsevier Inc. All rights reserved.

Direct-current substrate bias effects on amorphous silicon sputter-deposited films for thin film transistor fabrication

International Nuclear Information System (INIS)

Jun, Seung-Ik; Rack, Philip D.; McKnight, Timothy E.; Melechko, Anatoli V.; Simpson, Michael L.

2005-01-01

The effect that direct current (dc) substrate bias has on radio frequency-sputter-deposited amorphous silicon (a-Si) films has been investigated. The substrate bias produces a denser a-Si film with fewer defects compared to unbiased films. The reduced number of defects results in a higher resistivity because defect-mediated conduction paths are reduced. Thin film transistors (TFTs) that were completely sputter deposited were fabricated and characterized. The TFT with the biased a-Si film showed lower leakage (off-state) current, higher on/off current ratio, and higher transconductance (field effect mobility) than the TFT with the unbiased a-Si film

Self-Assembled Local Artificial Substrates of GaAs on Si Substrate

Directory of Open Access Journals (Sweden)

Frigeri C

2010-01-01

Full Text Available Abstract We propose a self-assembling procedure for the fabrication of GaAs islands by Droplet Epitaxy on silicon substrate. Controlling substrate temperature and amount of supplied gallium is possible to tune the base size of the islands from 70 up to 250 nm and the density from 107 to 109 cm−2. The islands show a standard deviation of base size distribution below 10% and their shape evolves changing the aspect ratio from 0.3 to 0.5 as size increases. Due to their characteristics, these islands are suitable to be used as local artificial substrates for the integration of III–V quantum nanostructures directly on silicon substrate.

Impact of deposition temperature on the properties of SnS thin films grown over silicon substrate—comparative study of structural and optical properties with films grown on glass substrates

Science.gov (United States)

Assili, Kawther; Alouani, Khaled; Vilanova, Xavier

2017-11-01

Tin sulfide (SnS) thin films were chemically deposited over silicon substrate in a temperature range of 250 °C-400 °C. The effects of deposition temperature on the structural, morphological and optical properties of the films were evaluated. All films present an orthorhombic SnS structure with a preferred orientation along (040). High absorption coefficients (in the range of 105 cm-1) were found for all obtained films with an increase in α value when deposition temperature decreases. Furthermore, the effects of substrate type were investigated based on comparison between the present results and those obtained for SnS films grown under the same deposition conditions but over glass substrate. The results suggest that the formation of SnS films onto glass substrate is faster than onto silicon substrate. It is found that the substrate nature affects the orientation growth of the films and that SnS films deposited onto Si present more defects than those deposited onto glass substrate. The optical transmittance is also restricted by the substrate type, mostly below 1000 nm. The obtained results for SnS films onto silicon suggest their promising integration within optoelectronic devices.

Combined Effect of Surface Nano-Topography and Delivery of Therapeutics on the Adhesion of Tumor Cells on Porous Silicon Substrates

KAUST Repository

De Vitis, S.

2016-02-23

Porous silicon is a nano material in which pores with different sizes, densities and depths are infiltrated in conventional silicon imparting it augmented properties including biodegradability, biocompatibility, photoluminescence. Here, we realized porous silicon substrates in which the pore size and the fractal dimension were varied over a significant range. We loaded the described substrates with a PtCl(O, O′ − acac)(DMSO) antitumor drug and determined its release profile as a function of pore size over time up to 15 days. We observed that the efficacy of delivery augments with the pore size moving from small (∼ 8nm, efficiency of delivery ∼ 0.2) to large (∼ 55nm, efficiency of delivery ∼ 0.7). Then, we verified the adhesion of MCF-7 breast cancer cells on the described substrates with and without the administration of the antitumor drug. This permitted to decouple and understand the coincidental effects of nano-topography and a controlled dosage of drugs on cell adhesion and growth. While large pore sizes guarantee elevated drug dosages, large fractal dimensions boost cell adhesion on a surface. For the particular case of tumor cells and the delivery of an anti-tumor drug, substrates with a small fractal dimension and large pore size hamper cell growth. The competition between nano-topography and a controlled dosage of drugs may either accelerate or block the adhesion of cells on a nanostructured surface, for applications in tissue engineering, regenerative medicine, personalized lab-on-a-chips, and the rational design of implantable drug delivery systems.

Formation of multiple levels of porous silicon for buried insulators and conductors in silicon device technologies

Science.gov (United States)

Blewer, Robert S.; Gullinger, Terry R.; Kelly, Michael J.; Tsao, Sylvia S.

1991-01-01

A method of forming a multiple level porous silicon substrate for semiconductor integrated circuits including anodizing non-porous silicon layers of a multi-layer silicon substrate to form multiple levels of porous silicon. At least one porous silicon layer is then oxidized to form an insulating layer and at least one other layer of porous silicon beneath the insulating layer is metallized to form a buried conductive layer. Preferably the insulating layer and conductive layer are separated by an anodization barrier formed of non-porous silicon. By etching through the anodization barrier and subsequently forming a metallized conductive layer, a fully or partially insulated buried conductor may be fabricated under single crystal silicon.

Al and Cu Implantation into Silicon Substrate for Ohmic Contact in Solar Cell Fabrication

International Nuclear Information System (INIS)

Sri Sulamdari; Sudjatmoko; Wirjoadi; Yunanto; Bambang Siswanto

2002-01-01

Research on the implantation of Al and Cu ions into silicon substrate for ohmic contact in solar cell fabrication has been carried using ion accelerator machine. Al and Cu ions are from 98% Al and 99.9% Cu powder ionized in ion source system. provided in ion implantor machine. Before implantation process, (0.5 x 1) cm 2 N type and P type silicon were washed in water and then etched in Cp-4A solution. After that, P type silicon were implanted with Al ions and N type silicon were implanted with Cu ions with the ions dose from 10 13 ion/cm 2 - 10 16 ion/cm 2 and energy 20 keV - 80 keV. Implanted samples were then annealed at temperature 400 o C - 850 o C. Implanted and annealed samples were characterized their resistivities using four point probe FPP-5000. It was found that at full electrically active conditions the ρ s for N type was 1.30 x 10 8 Ω/sq, this was achieved at ion dose 10 13 ion/cm 2 and annealing temperature 500 o C. While for P type, the ρ s was 1.13 x 10 2 Ω/sq, this was achieved at ion dose 10 13 ion/cm 2 and energy 40 keV, and annealing temperature 500 o C. (author)

Plastic properties of thin films on substrates as measured by submicron indentation hardness and substrate curvature techniques

International Nuclear Information System (INIS)

Doerner, M.F.; Gardner, D.S.; Nix, W.D.

1986-01-01

Substrate curvature and submicron indentation measurements have been used recently to study plastic deformation in thin films on substrates. In the present work both of these techniques have been employed to study the strength of aluminum and tungsten thin films on silicon substrates. In the case of aluminum films on silicon substrates, the film strength is found to increase with decreasing thickness. Grain size variations with film thickness do not account for the variations in strength. Wafer curvature measurements give strengths higher than those predicted from hardness measurements suggesting the substrate plays a role in strengthening the film. The observed strengthening effect with decreased thickness may be due to image forces on dislocations in the film due to the elastically stiffer silicon substrate. For sputtered tungsten films, where the substrate is less stiff than the film, the film strength decreases with decreasing film thickness

Development of Silicon-substrate Based Fabry-Perot Etalons for far-IR Astrophysics

Science.gov (United States)

Stacey, Gordon

We propose to design, construct and test silicon-substrate-based (SSB) mirrors necessary for high performance Fabry-Perot interferometers (FPIs) to be used in the 25-40 um mid-IR band. These mirrors will be fabricated from silicon wafers that are anti-reflection coated (ARC) by micromachining an artificial dielectric meta-material on one side, and depositing optimized gold-metalized patterns on the other. Two mirrors with the metalized surfaces facing one-another form the Fabry-Perot cavity, also known as the FPI etalon. The exterior surfaces of the silicon mirrors are anti-reflection coated for both good transmission in the science band, and to prevent unwanted parasitic FPI cavities from forming between the four surfaces (one anti-reflection coated, one metalized for each mirror) of the FPI etalon. The mirrors will be tested within a Miniature Cryogenic Scanning Fabry-Perot (MCSF) that we have designed through support of a previous NASA grant (NNX09AB95G). This design is based on our long experience in constructing and using scanning FPI in the mid-IR to submm range, and fits within test-beds we have on hand that are suitable for both warm and cold tests. The key technologies are the ARC and tuned mirrors that are enabled by silicon nano-machining techniques. The creation of these SSB mirrors promises greatly improved performance over previous versions of mid-IR to submm-band FPIs that are based on mirrors made from free-standing metal mesh stretched over support rings. Performance is improved both structurally and in terms of sensitivity, and is measured as the product of the cavity finesse times transmission. Our electromagnetic modeling suggests that SSB mirrors will improve this product by a factor of 2 over the best free standing mesh etalons available. This translates into a factor of sqrt(2) improvement in sensitivity per etalon, or a full factor of 2 when used in a tandem (dual etalon) FPI spectrometer. The SSB improvements are due to both the stiff (~ 0

Low-field microwave absorption and magnetoresistance in iron nanostructures grown by electrodeposition on n-type lightly doped silicon substrates

Energy Technology Data Exchange (ETDEWEB)

Felix, J.F. [Universidade Federal de Viçosa-UFV, Departamento de Física, 36570-900 Viçosa, MG (Brazil); Universidade de Brasília-UnB, Instituto de Física, Núcleo de Física Aplicada, 70910-900 Brasília, DF (Brazil); Figueiredo, L.C. [Universidade de Brasília-UnB, Instituto de Física, Núcleo de Física Aplicada, 70910-900 Brasília, DF (Brazil); Mendes, J.B.S. [Universidade Federal de Viçosa-UFV, Departamento de Física, 36570-900 Viçosa, MG (Brazil); Morais, P.C. [Universidade de Brasília-UnB, Instituto de Física, Núcleo de Física Aplicada, 70910-900 Brasília, DF (Brazil); Huazhong University of Science and Technology, School of Automation, 430074 Wuhan (China); Araujo, C.I.L. de., E-mail: dearaujo@ufv.br [Universidade de Brasília-UnB, Instituto de Física, Núcleo de Física Aplicada, 70910-900 Brasília, DF (Brazil)

2015-12-01

In this study we investigate magnetic properties, surface morphology and crystal structure in iron nanoclusters electrodeposited on lightly doped (100) n-type silicon substrates. Our goal is to investigate the spin injection and detection in the Fe/Si lateral structures. The samples obtained under electric percolation were characterized by magnetoresistive and magnetic resonance measurements with cycling the sweeping applied field in order to understand the spin dynamics in the as-produced samples. The observed hysteresis in the magnetic resonance spectra, plus the presence of a broad peak in the non-saturated regime confirming the low field microwave absorption (LFMA), were correlated to the peaks and slopes found in the magnetoresistance curves. The results suggest long range spin injection and detection in low resistive silicon and the magnetic resonance technique is herein introduced as a promising tool for analysis of electric contactless magnetoresistive samples. - Highlights: • Electrodeposition of Fe nanostructures on high resistive silicon substrates. • Spin polarized current among clusters through Si suggested by isotropic magnetoresistance. • Low field microwave absorption arising from the sample shape anisotropy. • Contactless magnetoresistive device characterization by resonance measurements.

A study for the detection of ionizing particles with phototransistors on thick high-resistivity silicon substrates

International Nuclear Information System (INIS)

Batignani, G.; Angelini, C.; Bisogni, M.G.; Boscardin, M.; Bettarini, S.; Bondioli, M.; Bosisio, L.; Bucci, F.; Calderini, G.; Carpinelli, M.; Ciacchi, M.; Dalla Betta, G.F.; Dittongo, S.; Forti, F.; Giorgi, M.A.; Gregori, P.; Han, D.J.; Manfredi, P.F.; Manghisoni, M.; Marchiori, G.; Neri, N.; Novelli, M.; Paoloni, E.; Piemonte, C.; Rachevskaia, I.; Rama, M.; Ratti, L.; Re, V.; Rizzo, G.; Ronchin, S.; Rosso, V.; Simi, G.; Speziali, V.; Stefanini, A.; Zorzi, N.

2004-01-01

We report on bipolar NPN phototransistors fabricated at ITC-IRST on thick high-resistivity silicon substrates. The phototransistor emitter is composed of a phosphorus n+ implant, the base is a diffused high-energy boron implant, and the collector is the 600-800 μm thick silicon bulk, contacted on the backplane. We have studied the current amplification for two different doping profiles of the emitter, obtaining values of β ranging from 60 to 3000. For various emitter and base configurations, we measured the static device characteristics and extracted the leakage currents and the base resistance, verifying the fundamental relationship between them and the total base capacitances. The use of such phototransistors to detect ionizing particles is exploited and discussed

A study for the detection of ionizing particles with phototransistors on thick high-resistivity silicon substrates

Energy Technology Data Exchange (ETDEWEB)

Batignani, G. E-mail: giovanni.batignani@pi.infn.it; Angelini, C.; Bisogni, M.G.; Boscardin, M.; Bettarini, S.; Bondioli, M.; Bosisio, L.; Bucci, F.; Calderini, G.; Carpinelli, M.; Ciacchi, M.; Dalla Betta, G.F.; Dittongo, S.; Forti, F.; Giorgi, M.A.; Gregori, P.; Han, D.J.; Manfredi, P.F.; Manghisoni, M.; Marchiori, G.; Neri, N.; Novelli, M.; Paoloni, E.; Piemonte, C.; Rachevskaia, I.; Rama, M.; Ratti, L.; Re, V.; Rizzo, G.; Ronchin, S.; Rosso, V.; Simi, G.; Speziali, V.; Stefanini, A.; Zorzi, N

2004-09-01

We report on bipolar NPN phototransistors fabricated at ITC-IRST on thick high-resistivity silicon substrates. The phototransistor emitter is composed of a phosphorus n+ implant, the base is a diffused high-energy boron implant, and the collector is the 600-800 {mu}m thick silicon bulk, contacted on the backplane. We have studied the current amplification for two different doping profiles of the emitter, obtaining values of {beta} ranging from 60 to 3000. For various emitter and base configurations, we measured the static device characteristics and extracted the leakage currents and the base resistance, verifying the fundamental relationship between them and the total base capacitances. The use of such phototransistors to detect ionizing particles is exploited and discussed.

Design and fabrication of non silicon substrate based MEMS energy harvester for arbitrary surface applications

Energy Technology Data Exchange (ETDEWEB)

Balpande, Suresh S., E-mail: balpandes@rknec.edu [Ph.D.. Scholar, Department of Electronics Engineering Shri Ramdeobaba College of Engineering & Management, Nagpur-13, (M.S.) (India); Pande, Rajesh S. [Professor, Department of Electronics Engineering Shri Ramdeobaba College of Engineering & Management, Nagpur-13, (M.S.) (India)

2016-04-13

Internet of Things (IoT) uses MEMS sensor nodes and actuators to sense and control objects through Internet. IOT deploys millions of chemical battery driven sensors at different locations which are not reliable many times because of frequent requirement of charging & battery replacement in case of underground laying, placement at harsh environmental conditions, huge count and difference between demand (24 % per year) and availability (energy density growing rate 8% per year). Energy harvester fabricated on silicon wafers have been widely used in manufacturing MEMS structures. These devices require complex fabrication processes, costly chemicals & clean room. In addition to this silicon wafer based devices are not suitable for curved surfaces like pipes, human bodies, organisms, or other arbitrary surface like clothes, structure surfaces which does not have flat and smooth surface always. Therefore, devices based on rigid silicon wafers are not suitable for these applications. Flexible structures are the key solution for this problems. Energy transduction mechanism generates power from free surrounding vibrations or impact. Sensor nodes application has been purposefully selected due to discrete power requirement at low duty cycle. Such nodes require an average power budget in the range of about 0.1 microwatt to 1 mW over a period of 3-5 seconds. Energy harvester is the best alternate source in contrast with battery for sensor node application. Novel design of Energy Harvester based on cheapest flexible non silicon substrate i.e. cellulose acetate substrate have been modeled, simulated and analyzed on COMSOL multiphysics and fabricated using sol-gel spin coating setup. Single cantilever based harvester generates 60-75 mV peak electric potential at 22Hz frequency and approximately 22 µW power at 1K-Ohm load. Cantilever array can be employed for generating higher voltage by replicating this structure. This work covers design, optimization, fabrication of

Design and fabrication of non silicon substrate based MEMS energy harvester for arbitrary surface applications

International Nuclear Information System (INIS)

Balpande, Suresh S.; Pande, Rajesh S.

2016-01-01

Internet of Things (IoT) uses MEMS sensor nodes and actuators to sense and control objects through Internet. IOT deploys millions of chemical battery driven sensors at different locations which are not reliable many times because of frequent requirement of charging & battery replacement in case of underground laying, placement at harsh environmental conditions, huge count and difference between demand (24 % per year) and availability (energy density growing rate 8% per year). Energy harvester fabricated on silicon wafers have been widely used in manufacturing MEMS structures. These devices require complex fabrication processes, costly chemicals & clean room. In addition to this silicon wafer based devices are not suitable for curved surfaces like pipes, human bodies, organisms, or other arbitrary surface like clothes, structure surfaces which does not have flat and smooth surface always. Therefore, devices based on rigid silicon wafers are not suitable for these applications. Flexible structures are the key solution for this problems. Energy transduction mechanism generates power from free surrounding vibrations or impact. Sensor nodes application has been purposefully selected due to discrete power requirement at low duty cycle. Such nodes require an average power budget in the range of about 0.1 microwatt to 1 mW over a period of 3-5 seconds. Energy harvester is the best alternate source in contrast with battery for sensor node application. Novel design of Energy Harvester based on cheapest flexible non silicon substrate i.e. cellulose acetate substrate have been modeled, simulated and analyzed on COMSOL multiphysics and fabricated using sol-gel spin coating setup. Single cantilever based harvester generates 60-75 mV peak electric potential at 22Hz frequency and approximately 22 µW power at 1K-Ohm load. Cantilever array can be employed for generating higher voltage by replicating this structure. This work covers design, optimization, fabrication of

Plasma surface oxidation of 316L stainless steel for improving adhesion strength of silicone rubber coating to metal substrate

Energy Technology Data Exchange (ETDEWEB)

Latifi, Afrooz, E-mail: afroozlatifi@yahoo.com [Department of Biomaterials, Biomedical Engineering Faculty, Science and Research Branch, Islamic Azad University, Tehran (Iran, Islamic Republic of); Imani, Mohammad [Novel Drug Delivery Systems Dept., Iran Polymer and Petrochemical Institute, P.O. Box 14965/115, Tehran (Iran, Islamic Republic of); Khorasani, Mohammad Taghi [Biomaterials Dept., Iran Polymer and Petrochemical Institute, P.O. Box 14965/159, Tehran (Iran, Islamic Republic of); Daliri Joupari, Morteza [Animal and Marine Biotechnology Dept., National Institute of Genetic Engineering and Biotechnology, P.O. Box 14965/161, Tehran (Iran, Islamic Republic of)

2014-11-30

Highlights: • Stainless steel 316L was surface modified by plasma surface oxidation (PSO) and silicone rubber (SR) coating. • On the PSO substrates, concentration of oxide species was increased ca. 2.5 times comparing to non-PSO substrates. • The surface wettability was improved to 12.5°, in terms of water contact angle, after PSO. • Adhesion strength of SR coating on the PSO substrates was improved by more than two times comparing to non-PSO ones. • After pull-off test, the fractured area patterns for SR coating were dependent on the type of surface modifications received. - Abstract: Stainless steel 316L is one of the most widely used materials for fabricating of biomedical devices hence, improving its surface properties is still of great interest and challenging in biomaterial sciences. Plasma oxidation, in comparison to the conventional chemical or mechanical methods, is one of the most efficient methods recently used for surface treatment of biomaterials. Here, stainless steel specimens were surface oxidized by radio-frequency plasma irradiation operating at 34 MHz under pure oxygen atmosphere. Surface chemical composition of the samples was significantly changed after plasma oxidation by appearance of the chromium and iron oxides on the plasma-oxidized surface. A wettable surface, possessing high surface energy (83.19 mN m{sup −1}), was observed after plasma oxidation. Upon completion of the surface modification process, silicone rubber was spray coated on the plasma-treated stainless steel surface. Morphology of the silicone rubber coating was investigated by scanning electron microscopy (SEM). A uniform coating was formed on the oxidized surface with no delamination at polymer–metal interface. Pull-off tests showed the lowest adhesion strength of coating to substrate (0.12 MPa) for untreated specimens and the highest (0.89 MPa) for plasma-oxidized ones.

Electrical properties of pressure quenched silicon by thermal spraying

International Nuclear Information System (INIS)

Tan, S.Y.; Gambino, R.J.; Sampath, S.; Herman, H.

2007-01-01

High velocity thermal spray deposition of polycrystalline silicon film onto single crystal substrates, yields metastable high pressure forms of silicon in nanocrystalline form within the deposit. The phases observed in the deposit include hexagonal diamond-Si, R-8, BC-8 and Si-IX. The peculiar attribute of this transformation is that it occurs only on orientation silicon substrate. The silicon deposits containing the high pressure phases display a substantially higher electrical conductivity. The resistivity profile of the silicon deposit containing shock induced metastable silicon phases identified by X-ray diffraction patterns. The density of the pressure induced polymorphic silicon is higher at deposit/substrate interface. A modified two-layer model is presented to explain the resistivity of the deposit impacted by the pressure induced polymorphic silicon generated by the thermal spraying process. The pressure quenched silicon deposits on the p - silicon substrate, with or without metastable phases, display the barrier potential of about 0.72 eV. The measured hall mobility value of pressure quenched silicon deposits is in the range of polycrystalline silicon. The significance of this work lies in the fact that the versatility of thermal spray may enable applications of these high pressure forms of silicon

III/V nano ridge structures for optical applications on patterned 300 mm silicon substrate

Energy Technology Data Exchange (ETDEWEB)

Kunert, B.; Guo, W.; Mols, Y.; Pantouvaki, M.; Van Campenhout, J.; Langer, R.; Barla, K. [imec, Kapeldreef 75, 3001 Heverlee (Belgium); Tian, B.; Wang, Z.; Shi, Y.; Van Thourhout, D. [Photonics Research Group, Ghent University, Technologiepark-Zwijnaarde 15, 9052 Gent (Belgium)

2016-08-29

We report on an integration approach of III/V nano ridges on patterned silicon (Si) wafers by metal organic vapor phase epitaxy (MOVPE). Trenches of different widths (≤500 nm) were processed in a silicon oxide (SiO{sub 2}) layer on top of a 300 mm (001) Si substrate. The MOVPE growth conditions were chosen in a way to guarantee an efficient defect trapping within narrow trenches and to form a box shaped ridge with increased III/V volume when growing out of the trench. Compressively strained InGaAs/GaAs multi-quantum wells with 19% indium were deposited on top of the fully relaxed GaAs ridges as an active material for optical applications. Transmission electron microcopy investigation shows that very flat quantum well (QW) interfaces were realized. A clear defect trapping inside the trenches is observed whereas the ridge material is free of threading dislocations with only a very low density of planar defects. Pronounced QW photoluminescence (PL) is detected from different ridge sizes at room temperature. The potential of these III/V nano ridges for laser integration on Si substrates is emphasized by the achieved ridge volume which could enable wave guidance and by the high crystal quality in line with the distinct PL.

Probiotic E. coli Nissle 1917 biofilms on silicone substrates for bacterial interference against pathogen colonization.

Science.gov (United States)

Chen, Quan; Zhu, Zhiling; Wang, Jun; Lopez, Analette I; Li, Siheng; Kumar, Amit; Yu, Fei; Chen, Haoqing; Cai, Chengzhi; Zhang, Lijuan

2017-03-01

Bacterial interference is an alternative strategy to fight against device-associated bacterial infections. Pursuing this strategy, a non-pathogenic bacterial biofilm is used as a live, protective barrier to fence off pathogen colonization. In this work, biofilms formed by probiotic Escherichia coli strain Nissle 1917 (EcN) are investigated for their potential for long-term bacterial interference against infections associated with silicone-based urinary catheters and indwelling catheters used in the digestive system, such as feeding tubes and voice prostheses. We have shown that EcN can form stable biofilms on silicone substrates, particularly those modified with a biphenyl mannoside derivative. These biofilms greatly reduced the colonization by pathogenic Enterococcus faecalis in Lysogeny broth (LB) for 11days. Bacterial interference is an alternative strategy to fight against device-associated bacterial infections. Pursuing this strategy, we use non-pathogenic bacteria to form a biofilm that serves as a live, protective barrier against pathogen colonization. Herein, we report the first use of preformed probiotic E. coli Nissle 1917 biofilms on the mannoside-presenting silicone substrates to prevent pathogen colonization. The biofilms serve as a live, protective barrier to fence off the pathogens, whereas current antimicrobial/antifouling coatings are subjected to gradual coverage by the biomass from the rapidly growing pathogens in a high-nutrient environment. It should be noted that E. coli Nissle 1917 is commercially available and has been used in many clinical trials. We also demonstrated that this probiotic strain performed significantly better than the non-commercial, genetically modified E. coli strain that we previously reported. Copyright © 2017 Acta Materialia Inc. Published by Elsevier Ltd. All rights reserved.

Band engineering of amorphous silicon ruthenium thin film and its near-infrared absorption enhancement combined with nano-holes pattern on back surface of silicon substrate

Energy Technology Data Exchange (ETDEWEB)

Guo, Anran; Zhong, Hao [State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China, Chengdu 610054 (China); Li, Wei, E-mail: wli@uestc.edu.cn [State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China, Chengdu 610054 (China); Gu, Deen; Jiang, Xiangdong [School of Optoelectronic Information, University of Electronic Science and Technology of China, Chengdu 610054 (China); Jiang, Yadong [State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China, Chengdu 610054 (China)

2016-10-30

Highlights: • The increase of Ru concentration leads to a narrower bandgap of a-Si{sub 1-x}Ru{sub x} thin film. • The absorption coefficient of a-Si{sub 1-x}Ru{sub x} is higher than that of SiGe. • A double-layer absorber comprising of a-Si{sub 1-x}Ru{sub x} film and Si nano-holes layer is achieved. - Abstract: Silicon is widely used in semiconductor industry but has poor performance in near-infrared photoelectronic devices because of its bandgap limit. In this study, a narrow bandgap silicon rich semiconductor is achieved by introducing ruthenium (Ru) into amorphous silicon (a-Si) to form amorphous silicon ruthenium (a-Si{sub 1-x}Ru{sub x}) thin films through co-sputtering. The increase of Ru concentration leads to an enhancement of light absorption and a narrower bandgap. Meanwhile, a specific light trapping technique is employed to realize high absorption of a-Si{sub 1-x}Ru{sub x} thin film in a finite thickness to avoid unnecessary carrier recombination. A double-layer absorber comprising of a-Si{sub 1-x}Ru{sub x} thin film and silicon random nano-holes layer is formed on the back surface of silicon substrates, and significantly improves near-infrared absorption while the leaky light intensity is less than 5%. This novel absorber, combining narrow bandgap thin film with light trapping structure, may have a potential application in near-infrared photoelectronic devices.

Comparison of stress states in GaN films grown on different substrates: Langasite, sapphire and silicon

Science.gov (United States)

Park, Byung-Guon; Saravana Kumar, R.; Moon, Mee-Lim; Kim, Moon-Deock; Kang, Tae-Won; Yang, Woo-Chul; Kim, Song-Gang

2015-09-01

We demonstrate the evolution of GaN films on novel langasite (LGS) substrate by plasma-assisted molecular beam epitaxy, and assessed the quality of grown GaN film by comparing the experimental results obtained using LGS, sapphire and silicon (Si) substrates. To study the substrate effect, X-ray diffraction (XRD), scanning electron microscopy (SEM), Raman spectroscopy and photoluminescence (PL) spectra were used to characterize the microstructure and stress states in GaN films. Wet etching of GaN films in KOH solution revealed that the films deposited on GaN/LGS, AlN/sapphire and AlN/Si substrates possess Ga-polarity, while the film deposited on GaN/sapphire possess N-polarity. XRD, Raman and PL analysis demonstrated that a compressive stress exist in the films grown on GaN/LGS, AlN/sapphire, and GaN/sapphire substrates, while a tensile stress appears on AlN/Si substrate. Comparative analysis showed the growth of nearly stress-free GaN films on LGS substrate due to the very small lattice mismatch ( 3.2%) and thermal expansion coefficient difference ( 7.5%). The results presented here will hopefully provide a new framework for the further development of high performance III-nitride-related devices using GaN/LGS heteroepitaxy.

Surface thiolation of silicon for antifouling application.

Science.gov (United States)

Zhang, Xiaoning; Gao, Pei; Hollimon, Valerie; Brodus, DaShan; Johnson, Arion; Hu, Hongmei

2018-02-07

Thiol groups grafted silicon surface was prepared as previously described. 1H,1H,2H,2H-perfluorodecanethiol (PFDT) molecules were then immobilized on such a surface through disulfide bonds formation. To investigate the contribution of PFDT coating to antifouling, the adhesion behaviors of Botryococcus braunii (B. braunii) and Escherichia coli (E. coli) were studied through biofouling assays in the laboratory. The representative microscope images suggest reduced B. braunii and E. coli accumulation densities on PFDT integrated silicon substrate. However, the antifouling performance of PFDT integrated silicon substrate decreased over time. By incubating the aged substrate in 10 mM TCEP·HCl solution for 1 h, the fouled PFDT coating could be removed as the disulfide bonds were cleaved, resulting in reduced absorption of algal cells and exposure of non-fouled silicon substrate surface. Our results indicate that the thiol-terminated substrate can be potentially useful for restoring the fouled surface, as well as maximizing the effective usage of the substrate.

RF plasma cleaning of silicon substrates with high-density polyethylene contamination

Science.gov (United States)

Cagomoc, Charisse Marie D.; De Leon, Mark Jeffry D.; Ebuen, Anna Sophia M.; Gilos, Marlo Nicole R.; Vasquez, Magdaleno R., Jr.

2018-01-01

Upon contact with a polymeric material, microparticles from the polymer may adhere to a silicon (Si) substrate during device processing. The adhesion contaminates the surface and, in turn, leads to defects in the fabricated Si-based microelectronic devices. In this study, Si substrates with artificially induced high-density polyethylene (HDPE) contamination was exposed to 13.56 MHz radio frequency (RF) plasma utilizing argon and oxygen gas admixtures at a power density of 5.6 W/cm2 and a working pressure of 110 Pa for up to 6 min of treatment. Optical microscopy studies revealed the removal of up to 74% of the polymer contamination upon plasma exposure. Surface free energy (SFE) increased owing to the removal of contaminants as well as the formation of polar groups on the Si surface after plasma treatment. Atomic force microscopy scans showed a decrease in surface roughness from 12.25 nm for contaminated samples to 0.77 nm after plasma cleaning. The smoothening effect can be attributed to the removal of HDPE particles from the surface. In addition, scanning electron microscope images showed that there was a decrease in the amount of HDPE contaminants adhering onto the surface after plasma exposure.

Probing photo-carrier collection efficiencies of individual silicon nanowire diodes on a wafer substrate.

Science.gov (United States)

Schmitt, S W; Brönstrup, G; Shalev, G; Srivastava, S K; Bashouti, M Y; Döhler, G H; Christiansen, S H

2014-07-21

Vertically aligned silicon nanowire (SiNW) diodes are promising candidates for the integration into various opto-electronic device concepts for e.g. sensing or solar energy conversion. Individual SiNW p-n diodes have intensively been studied, but to date an assessment of their device performance once integrated on a silicon substrate has not been made. We show that using a scanning electron microscope (SEM) equipped with a nano-manipulator and an optical fiber feed-through for tunable (wavelength, power using a tunable laser source) sample illumination, the dark and illuminated current-voltage (I-V) curve of individual SiNW diodes on the substrate wafer can be measured. Surprisingly, the I-V-curve of the serially coupled system composed of SiNW/wafers is accurately described by an equivalent circuit model of a single diode and diode parameters like series and shunting resistivity, diode ideality factor and photocurrent can be retrieved from a fit. We show that the photo-carrier collection efficiency (PCE) of the integrated diode illuminated with variable wavelength and intensity light directly gives insight into the quality of the device design at the nanoscale. We find that the PCE decreases for high light intensities and photocurrent densities, due to the fact that considerable amounts of photo-excited carriers generated within the substrate lead to a decrease in shunting resistivity of the SiNW diode and deteriorate its rectification. The PCE decreases systematically for smaller wavelengths of visible light, showing the possibility of monitoring the effectiveness of the SiNW device surface passivation using the shown measurement technique. The integrated device was pre-characterized using secondary ion mass spectrometry (SIMS), TCAD simulations and electron beam induced current (EBIC) measurements to validate the properties of the characterized material at the single SiNW diode level.

Nucleation of microcrystalline silicon: on the effect of the substrate surface nature and nano-imprint topography

International Nuclear Information System (INIS)

Palmans, J; Faraz, T; Verheijen, M A; Kessels, W M M; Creatore, M

2016-01-01

The nucleation of microcrystalline silicon thin-films has been investigated for various substrate natures and topographies. An earlier nucleation onset on aluminium-doped zinc oxide compared to glass substrates has been revealed, associated with a microstructure enhancement and reduced surface energy. Both aspects resulted in a larger crystallite density, following classical nucleation theory. Additionally, the nucleation onset was (plasma deposition) condition-dependent. Therefore, surface chemistry and its interplay with the plasma have been proposed as key factors affecting nucleation and growth. As such, preliminary proof of the substrate nature’s role in microcrystalline silicon growth has been provided. Subsequently, the impact of nano-imprint lithography prepared surfaces on the initial microcrystalline silicon growth has been explored. Strong topographies, with a 5-fold surface area enhancement, led to a reduction in crystalline volume fraction of ∼20%. However, no correlation between topography and microstructure has been found. Instead, the suppressed crystallization has been partially ascribed to a reduced growth flux, limited surface diffusion and increased incubation layer thickness, originating from the surface area enhancement when transiting from flat to nanostructured surfaces. Furthermore, fundamental plasma parameters have been reviewed in relation with surface topography. Strong topographies are not expected to affect the ion-to-growth flux ratio. However, the reduced ion flux (due to increasing surface area) further limited the already weak ion energy transfer to surface processes. Additionally, the atomic hydrogen flux, i.e. the driving force for microcrystalline growth, has been found to decrease by a factor of 10 when transiting from flat to nanostructured topography. This resulted in an almost 6-fold reduction of the hydrogen-to-growth flux ratio, a much stronger effect than the ion-to-growth flux ratio. Since previous studies regarding

Determination of the Wetting Angle of Germanium and Germanium-Silicon Melts on Different Substrate Materials

Science.gov (United States)

Kaiser, Natalie; Croell, Arne; Szofran, F. R.; Cobb. S. D.; Dold, P.; Benz, K. W.

1999-01-01

During Bridgman growth of semiconductors detachment of the crystal and the melt meniscus has occasionally been observed, mainly under microgravity (microg) conditions. An important factor for detached growth is the wetting angle of the melt with the crucible material. High contact angles are more likely to result in detachment of the growing crystal from the ampoule wall. In order to achieve detached growth of germanium (Ge) and germanium-silicon (GeSi) crystals under 1g and microg conditions, sessile drop measurements were performed to determine the most suitable ampoule material as well as temperature dependence of the surface tension for GeSi. Sapphire, fused quartz, glassy carbon, graphite, SiC, pyrolytic Boron Nitride (pBN), AIN, and diamond were used as substrates. Furthermore, different cleaning procedures and surface treatments (etching, sandblasting, etc.) of the same substrate material and their effect on the wetting behavior were studied during these experiments. pBN and AIN substrates exhibited the highest contact angles with values around 170 deg.

Method of forming buried oxide layers in silicon

Science.gov (United States)

Sadana, Devendra Kumar; Holland, Orin Wayne

2000-01-01

A process for forming Silicon-On-Insulator is described incorporating the steps of ion implantation of oxygen into a silicon substrate at elevated temperature, ion implanting oxygen at a temperature below 200.degree. C. at a lower dose to form an amorphous silicon layer, and annealing steps to form a mixture of defective single crystal silicon and polycrystalline silicon or polycrystalline silicon alone and then silicon oxide from the amorphous silicon layer to form a continuous silicon oxide layer below the surface of the silicon substrate to provide an isolated superficial layer of silicon. The invention overcomes the problem of buried isolated islands of silicon oxide forming a discontinuous buried oxide layer.

Hydrogenated amorphous silicon p-i-n solar cells deposited under well controlled ion bombardment using pulse-shaped substrate biasing

NARCIS (Netherlands)

Wank, M. A.; van Swaaij, R.; R. van de Sanden,; Zeman, M.

2012-01-01

We applied pulse-shaped biasing (PSB) to the expanding thermal plasma deposition of intrinsic hydrogenated amorphous silicon layers at substrate temperatures of 200 degrees C and growth rates of about 1?nm/s. Fourier transform infrared spectroscopy of intrinsic films showed a densification with

A novel approach for osteocalcin detection by competitive ELISA using porous silicon as a substrate.

Science.gov (United States)

Rahimi, Fereshteh; Mohammadnejad Arough, Javad; Yaghoobi, Mona; Davoodi, Hadi; Sepehri, Fatemeh; Amirabadizadeh, Masood

2017-11-01

In this study, porous silicon (PSi) was utilized instead of prevalent polystyrene platforms, and its capability in biomolecule screening was examined. Here, two types of porous structure, macroporous silicon (Macro-PSi) and mesoporous silicon (Meso-PSi), were produced on silicon wafers by electrochemical etching using different electrolytes. Moreover, both kinds of fresh and oxidized PSi samples were investigated. Next, osteocalcin as a biomarker of the bone formation process was used as a model biomarker, and the colorimetric detection was performed by competitive enzyme-linked immunosorbent assay (ELISA). Both Macro-PSi and Meso-PSi substrates in the oxidized state, specifically the Meso-porous structure, were reported to have higher surface area to volume ratio, more capacitance of surface-antigen interaction, and more ability to capture antigen in comparison with the prevalent platforms. Moreover, the optical density signal of osteocalcin detected by the ELISA technique was notably higher than the common platforms. Based on the findings of this study, PSi can potentially be used in the ELISA to achieve better results and consequently more sensitivity. A further asset of incorporating such a nanometer structure in the ELISA technique is that the system response to analyte concentration could be maintained by consuming lower monoclonal antibody (or antigen) and consequently reduces the cost of the experiment. © 2016 International Union of Biochemistry and Molecular Biology, Inc.

Back contact to film silicon on metal for photovoltaic cells

Science.gov (United States)

Branz, Howard M.; Teplin, Charles; Stradins, Pauls

2013-06-18

A crystal oriented metal back contact for solar cells is disclosed herein. In one embodiment, a photovoltaic device and methods for making the photovoltaic device are disclosed. The photovoltaic device includes a metal substrate with a crystalline orientation and a heteroepitaxial crystal silicon layer having the same crystal orientation of the metal substrate. A heteroepitaxial buffer layer having the crystal orientation of the metal substrate is positioned between the substrate and the crystal silicon layer to reduce diffusion of metal from the metal foil into the crystal silicon layer and provide chemical compatibility with the heteroepitaxial crystal silicon layer. Additionally, the buffer layer includes one or more electrically conductive pathways to electrically couple the crystal silicon layer and the metal substrate.

Fabrication of Up-Conversion Phosphor Films on Flexible Substrates Using a Nanostructured Organo-Silicon.

Science.gov (United States)

Jeon, Young-Sun; Kim, Tae-Un; Kim, Seon-Hoon; Lee, Young-Hwan; Choi, Pil-Son; Hwang, Kyu-Seog

2018-03-01

Up-conversion phosphors have attracted considerable attention because of their applications in solid-state lasers, optical communications, flat-panel displays, photovoltaic cells, and biological labels. Among them, NaYF4 is reported as one of the most efficient hosts for infrared to visible photon up-conversion of Yb3+ and Er3+ ions. However, a low-temperature method is required for industrial scale fabrication of photonic and optoelectronic devices on flexible organic substrates. In this study, hexagonal β-NaYF4: 3 mol% Yb3+, 3 mol% Er3+ up-conversion phosphor using Ca2+ was prepared by chemical solution method. Then, we synthesized a nanostructured organo-silicon compound from methyl tri-methoxysilane and 3-glycidoxy-propyl-trimethoxy-silane. The transmittance of the organo-silicon compound was found to be over 90% in the wavelength range of 400~1500 nm. Then we prepared a fluoride-based phosphor paste by mixing the organo-silicon compound with Na(Ca)YF4:Yb3+, Er3+. Subsequently, this paste was coated on polyethylene terephthalate, followed by heat-treatment at 120 °C. The visible emission of the infrared detection card was found to be at 655 nm and 661 nm an excitation wavelength of 980 nm.

Hydrogenated amorphous silicon p–i–n solar cells deposited under well controlled ion bombardment using pulse-shaped substrate biasing

NARCIS (Netherlands)

Wank, M.A.; Swaaij, van R.A.C.M.M.; Sanden, van de M.C.M.; Zeman, M.

2012-01-01

We applied pulse-shaped biasing (PSB) to the expanding thermal plasma deposition of intrinsic hydrogenated amorphous silicon layers at substrate temperatures of 200¿°C and growth rates of about 1¿nm/s. Fourier transform infrared spectroscopy of intrinsic films showed a densification with increasing

Gold Nanoparticles on Functionalized Silicon Substrate under Coulomb Blockade Regime: An Experimental and Theoretical Investigation.

Science.gov (United States)

Pluchery, Olivier; Caillard, Louis; Dollfus, Philippe; Chabal, Yves J

2018-01-18

Single charge electronics offer a way for disruptive technology in nanoelectronics. Coulomb blockade is a realistic way for controlling the electric current through a device with the accuracy of one electron. In such devices the current exhibits a step-like increase upon bias which reflects the discrete nature of the fundamental charge. We have assembled a double tunnel junction on an oxide-free silicon substrate that exhibits Coulomb staircase characteristics using gold nanoparticles (AuNPs) as Coulomb islands. The first tunnel junction is an insulating layer made of a grafted organic monolayer (GOM) developed for this purpose. The GOM also serves for attaching AuNPs covalently. The second tunnel junction is made by the tip of an STM. We show that this device exhibits reproducible Coulomb blockade I-V curves at 40 K in vacuum. We also show that depending on the doping of the silicon substrate, the whole Coulomb staircase can be adjusted. We have developed a simulation approach based on the orthodox theory that was completed by calculating the bias dependent tunnel barriers and by including an accurate calculation of the band bending. This model accounts for the experimental data and the doping dependence of Coulomb oscillations. This study opens new perspectives toward designing new kind of single electron transistors (SET) based on this dependence of the Coulomb staircase with the charge carrier concentration.

Electrical characterizations of biomimetic molecular layers on gold and silicon substrates

International Nuclear Information System (INIS)

Chilcott, T C; Wong, E L S; Coster, H G L; Böcking, T

2008-01-01

Electrical impedance technology was used to characterize DNA recognition in a monolayer containing single-stranded DNA probes immobilized on a gold substrate using thiol self-assembly chemistry. Recognition of targeted complementary DNA was principally correlated with an eight-fold increase in the conductance of the monolayer and attributed to electron conduction through double helices formed upon the binding of the DNA targets to the probes. The high recognitive sensitivity was possible without the use of the redox labels or large bias voltages required for recognition using cyclic and Osteryoung square wave voltammetry. The impedance technology also provided atomic resolution of a hybrid bimolecular lipid membrane formed by deposition of a phospholipid:cholesterol monolayer onto a hydrophobic alkyl monolayer covalently attached to a silicon substrate via silicon–carbon bonds. Atomic resolution was achieved through preparation of membranes on surfaces approaching atomic flatness and the performance of impedance measurements over precisely defined areas of the surface in contact with solutions. Principally capacitive properties distinguished between the immobilized (octadecyl) and more fluidic (lipid:cholesterol) leaflets of the hybrid membrane. The lipid:cholesterol leaflets were structurally similar to those leaflets in free-standing bimolecular lipid membranes. The hybrid membrane therefore provides a highly stable and physiologically relevant surface for studying biomolecular interactions with membrane surfaces

Thermally-isolated silicon-based integrated circuits and related methods

Science.gov (United States)

Wojciechowski, Kenneth; Olsson, Roy H.; Clews, Peggy J.; Bauer, Todd

2017-05-09

Thermally isolated devices may be formed by performing a series of etches on a silicon-based substrate. As a result of the series of etches, silicon material may be removed from underneath a region of an integrated circuit (IC). The removal of the silicon material from underneath the IC forms a gap between remaining substrate and the integrated circuit, though the integrated circuit remains connected to the substrate via a support bar arrangement that suspends the integrated circuit over the substrate. The creation of this gap functions to release the device from the substrate and create a thermally-isolated integrated circuit.

Method of making thermally-isolated silicon-based integrated circuits

Science.gov (United States)

Wojciechowski, Kenneth; Olsson, Roy; Clews, Peggy J.; Bauer, Todd

2017-11-21

Thermally isolated devices may be formed by performing a series of etches on a silicon-based substrate. As a result of the series of etches, silicon material may be removed from underneath a region of an integrated circuit (IC). The removal of the silicon material from underneath the IC forms a gap between remaining substrate and the integrated circuit, though the integrated circuit remains connected to the substrate via a support bar arrangement that suspends the integrated circuit over the substrate. The creation of this gap functions to release the device from the substrate and create a thermally-isolated integrated circuit.

Passivation coating for flexible substrate mirrors

Science.gov (United States)

Tracy, C. Edwin; Benson, David K.

1990-01-01

A protective diffusion barrier for metalized mirror structures is provided by a layer or coating of silicon nitride which is a very dense, transparent, dielectric material that is impervious to water, alkali, and other impurities and corrosive substances that typically attack the metal layers of mirrors and cause degradation of the mirrors' reflectivity. The silicon nitride layer can be deposited on the substrate before metal deposition thereon to stabilize the metal/substrate interface, and it can be deposited over the metal to encapsulate it and protect the metal from corrosion or other degradation. Mirrors coated with silicon nitride according to this invention can also be used as front surface mirrors. Also, the silver or other reflective metal layer on mirrors comprising thin, lightweight, flexible substrates of metal or polymer sheets coated with glassy layers can be protected with silicon nitride according to this invention.

Effects of RF plasma treatment on spray-pyrolyzed copper oxide films on silicon substrates

Science.gov (United States)

Madera, Rozen Grace B.; Martinez, Melanie M.; Vasquez, Magdaleno R., Jr.

2018-01-01

The effects of radio-frequency (RF) argon (Ar) plasma treatment on the structural, morphological, electrical and compositional properties of the spray-pyrolyzed p-type copper oxide films on n-type (100) silicon (Si) substrates were investigated. The films were successfully synthesized using 0.3 M copper acetate monohydrate sprayed on precut Si substrates maintained at 350 °C. X-ray diffraction revealed cupric oxide (CuO) with a monoclinic structure. An apparent improvement in crystallinity was realized after Ar plasma treatment, attributed to the removal of residues contaminating the surface. Scanning electron microscope images showed agglomerated monoclinic grains and revealed a reduction in size upon plasma exposure induced by the sputtering effect. The current-voltage characteristics of CuO/Si showed a rectifying behavior after Ar plasma exposure with an increase in turn-on voltage. Four-point probe measurements revealed a decrease in sheet resistance after plasma irradiation. Fourier transform infrared spectral analyses also showed O-H and C-O bands on the films. This work was able to produce CuO thin films via spray pyrolysis on Si substrates and enhancement in their properties by applying postdeposition Ar plasma treatment.

Stretchable and foldable silicon-based electronics

KAUST Repository

Cavazos Sepulveda, Adrian Cesar

2017-03-30

Flexible and stretchable semiconducting substrates provide the foundation for novel electronic applications. Usually, ultra-thin, flexible but often fragile substrates are used in such applications. Here, we describe flexible, stretchable, and foldable 500-μm-thick bulk mono-crystalline silicon (100) “islands” that are interconnected via extremely compliant 30-μm-thick connectors made of silicon. The thick mono-crystalline segments create a stand-alone silicon array that is capable of bending to a radius of 130 μm. The bending radius of the array does not depend on the overall substrate thickness because the ultra-flexible silicon connectors are patterned. We use fracture propagation to release the islands. Because they allow for three-dimensional monolithic stacking of integrated circuits or other electronics without any through-silicon vias, our mono-crystalline islands can be used as a “more-than-Moore” strategy and to develop wearable electronics that are sufficiently robust to be compatible with flip-chip bonding.

Stretchable and foldable silicon-based electronics

KAUST Repository

Cavazos Sepulveda, Adrian Cesar; Diaz Cordero, M. S.; Carreno, Armando Arpys Arevalo; Nassar, Joanna M.; Hussain, Muhammad Mustafa

2017-01-01

Flexible and stretchable semiconducting substrates provide the foundation for novel electronic applications. Usually, ultra-thin, flexible but often fragile substrates are used in such applications. Here, we describe flexible, stretchable, and foldable 500-μm-thick bulk mono-crystalline silicon (100) “islands” that are interconnected via extremely compliant 30-μm-thick connectors made of silicon. The thick mono-crystalline segments create a stand-alone silicon array that is capable of bending to a radius of 130 μm. The bending radius of the array does not depend on the overall substrate thickness because the ultra-flexible silicon connectors are patterned. We use fracture propagation to release the islands. Because they allow for three-dimensional monolithic stacking of integrated circuits or other electronics without any through-silicon vias, our mono-crystalline islands can be used as a “more-than-Moore” strategy and to develop wearable electronics that are sufficiently robust to be compatible with flip-chip bonding.

Silicon-micromachined microchannel plates

CERN Document Server

Beetz, C P; Steinbeck, J; Lemieux, B; Winn, D R

2000-01-01

Microchannel plates (MCP) fabricated from standard silicon wafer substrates using a novel silicon micromachining process, together with standard silicon photolithographic process steps, are described. The resulting SiMCP microchannels have dimensions of approx 0.5 to approx 25 mu m, with aspect ratios up to 300, and have the dimensional precision and absence of interstitial defects characteristic of photolithographic processing, compatible with positional matching to silicon electronics readouts. The open channel areal fraction and detection efficiency may exceed 90% on plates up to 300 mm in diameter. The resulting silicon substrates can be converted entirely to amorphous quartz (qMCP). The strip resistance and secondary emission are developed by controlled depositions of thin films, at temperatures up to 1200 deg. C, also compatible with high-temperature brazing, and can be essentially hydrogen, water and radionuclide-free. Novel secondary emitters and cesiated photocathodes can be high-temperature deposite...

Nanosized graphene sheets enhanced photoelectric behavior of carbon film on p-silicon substrate

Science.gov (United States)

Yang, Lei; Hu, Gaijuan; Zhang, Dongqing; Diao, Dongfeng

2016-07-01

We found that nanosized graphene sheets enhanced the photoelectric behavior of graphene sheets embedded carbon (GSEC) film on p-silicon substrate, which was deposited under low energy electron irradiation in electron cyclotron resonance plasma. The GSEC/p-Si photodiode exhibited good photoelectric performance with photoresponsivity of 206 mA/W, rise and fall time of 2.2, and 4.3 μs for near-infrared (850 nm) light. The origin of the strong photoelectric behavior of GSEC film was ascribed to the appearance of graphene nanosheets, which led to higher barrier height and photoexcited electron-collection efficiency. This finding indicates that GSEC film has the potential for photoelectric applications.

Stable configurations of graphene on silicon

Energy Technology Data Exchange (ETDEWEB)

Javvaji, Brahmanandam; Shenoy, Bhamy Maithry [Department of Aerospace Engineering, Indian Institute of Science, Bangalore 560012 (India); Mahapatra, D. Roy, E-mail: droymahapatra@aero.iisc.ernet.in [Department of Aerospace Engineering, Indian Institute of Science, Bangalore 560012 (India); Ravikumar, Abhilash [Department of Metallurgical and Materials Engineering, National Institute of Technology Karnataka, Surathkal 575025 (India); Hegde, G.M. [Center for Nano Science and Engineering, Indian Institute of Science, Bangalore 560012 (India); Rizwan, M.R. [Department of Metallurgical and Materials Engineering, National Institute of Technology Karnataka, Surathkal 575025 (India)

2017-08-31

Highlights: • Simulations of epitaxial growth process for silicon–graphene system is performed. • Identified the most favourable orientation of graphene sheet on silicon substrate. • Atomic local strain due to the silicon–carbon bond formation is analyzed. - Abstract: Integration of graphene on silicon-based nanostructures is crucial in advancing graphene based nanoelectronic device technologies. The present paper provides a new insight on the combined effect of graphene structure and silicon (001) substrate on their two-dimensional anisotropic interface. Molecular dynamics simulations involving the sub-nanoscale interface reveal a most favourable set of temperature independent orientations of the monolayer graphene sheet with an angle of ∽15° between its armchair direction and [010] axis of the silicon substrate. While computing the favorable stable orientations, both the translation and the rotational vibrations of graphene are included. The possible interactions between the graphene atoms and the silicon atoms are identified from their coordination. Graphene sheet shows maximum bonding density with bond length 0.195 nm and minimum bond energy when interfaced with silicon substrate at 15° orientation. Local deformation analysis reveals probability distribution with maximum strain levels of 0.134, 0.047 and 0.029 for 900 K, 300 K and 100 K, respectively in silicon surface for 15° oriented graphene whereas the maximum probable strain in graphene is about 0.041 irrespective of temperature. Silicon–silicon dimer formation is changed due to silicon–carbon bonding. These results may help further in band structure engineering of silicon–graphene lattice.

Microelectromechanical pump utilizing porous silicon

Science.gov (United States)

Lantz, Jeffrey W [Albuquerque, NM; Stalford, Harold L [Norman, OK

2011-07-19

A microelectromechanical (MEM) pump is disclosed which includes a porous silicon region sandwiched between an inlet chamber and an outlet chamber. The porous silicon region is formed in a silicon substrate and contains a number of pores extending between the inlet and outlet chambers, with each pore having a cross-section dimension about equal to or smaller than a mean free path of a gas being pumped. A thermal gradient is provided along the length of each pore by a heat source which can be an electrical resistance heater or an integrated circuit (IC). A channel can be formed through the silicon substrate so that inlet and outlet ports can be formed on the same side of the substrate, or so that multiple MEM pumps can be connected in series to form a multi-stage MEM pump. The MEM pump has applications for use in gas-phase MEM chemical analysis systems, and can also be used for passive cooling of ICs.

Nonlinear Analysis of Actuation Performance of Shape Memory Alloy Composite Film Based on Silicon Substrate

Directory of Open Access Journals (Sweden)

Shuangshuang Sun

2014-01-01

Full Text Available The mechanical model of the shape memory alloy (SMA composite film with silicon (Si substrate was established by the method of mechanics of composite materials. The coupled action between the SMA film and Si substrate under thermal loads was analyzed by combining static equilibrium equations, geometric equations, and physical equations. The material nonlinearity of SMA and the geometric nonlinearity of bending deformation were both considered. By simulating and analyzing the actuation performance of the SMA composite film during one cooling-heating thermal cycle, it is found that the final cooling temperature, boundary condition, and the thickness of SMA film have significant effects on the actuation performance of the SMA composite film. Besides, the maximum deflection of the SMA composite film is affected obviously by the geometric nonlinearity of bending deformation when the thickness of SMA film is very large.

Vertically aligned ZnO nanorods on porous silicon substrates: Effect of growth time

Directory of Open Access Journals (Sweden)

R. Shabannia

2015-04-01

Full Text Available Vertically aligned ZnO nanorods were successfully grown on porous silicon (PS substrates by chemical bath deposition at a low temperature. X-ray diffraction, field-emission scanning electron microscopy (FESEM, transmission electron microscopy (TEM, and photoluminescence (PL analyses were carried out to investigate the effect of growth duration (2 h to 8 h on the optical and structural properties of the aligned ZnO nanorods. Strong and sharp ZnO (0 0 2 peaks of the ZnO nanorods proved that the aligned ZnO nanorods were preferentially fabricated along the c-axis of the hexagonal wurtzite structure. FESEM images demonstrated that the ZnO nanorod arrays were well aligned along the c-axis and perpendicular to the PS substrates regardless of the growth duration. The TEM image showed that the top surfaces of the ZnO nanorods were round with a smooth curvature. PL spectra demonstrated that the ZnO nanorods grown for 5 h exhibited the sharpest and most intense PL peaks within the ultraviolet range among all samples.

Light extraction from GaN-based LED structures on silicon-on-insulator substrates

Energy Technology Data Exchange (ETDEWEB)

Tripathy, S.; Teo, S.L.; Lin, V.K.X.; Chen, M.F. [Institute of Materials Research and Engineering, A*STAR (Agency for Science, Technology, and Research), 117602 (Singapore); Dadgar, A.; Krost, A. [Institut fuer Exerimentelle Physik, Otto-von Guericke Universitaet Magdeburg, Universitaetsplatz 1, 39016 Magdeburg (Germany); AZZURRO Semiconductors AG, Universitaetsplatz 1, 39016 Magdeburg (Germany); Christen, J. [Institut fuer Exerimentelle Physik, Otto-von Guericke Universitaet Magdeburg, Universitaetsplatz 1, 39016 Magdeburg (Germany)

2010-01-15

Nano-patterning of GaN-based devices is a promising technology in the development of high output power devices. Recent researches have been focused on the realization of two-dimensional (2D) photonic crystal (PhC) structure to improve light extraction efficiency and to control the direction of emission. In this study, we have demonstrated improved light extraction from green light emitting diode (LED) structures on thin silicon-on-insulator (SOI) substrates using surface nanopatterning. Scanning electron microscopy (SEM) is used to probe the size, shape, and etch depth of nano-patterns on the LED surfaces. Different types of nanopatterns were created by e-beam lithography and inductively coupled plasma etching. The LED structures after post processing are studied by photoluminescence (PL) measurements. The GaN nanophotonic structures formed by ICP etching led to more than five-fold increase in the intensity of the green emission. The improved light extraction is due to the combination of SOI substrate reflectivity and photonic structures on top GaN LED surfaces. (copyright 2010 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim) (orig.)

An investigation of excess noise in transition-edge sensors on a solid silicon substrate

International Nuclear Information System (INIS)

Crowder, S.G.; Lindeman, M.A.; Anderson, M.B.; Bandler, S.R.; Bilgri, N.; Bruijn, M.P.; Chervenak, J.; Figueroa-Feliciano, E.; Finkbeiner, F.; Germeau, A.; Hoevers, H.F.C.; Iyomoto, N.; Kelly, R.; Kilbourne, C.A.; Lai, T.; Man, J.; McCammon, D.; Nelms, K.L.; Porter, F.S.; Rocks, L.; Saab, T.; Sadleir, J.; Vidugiris, G.

2006-01-01

Transition-edge sensors (TESs) exhibit two major types of excess noise above the expected and unavoidable thermodynamic fluctuation noise (TFN) to the heat sink and Johnson noise. High-resistance TESs such as those made by the Netherlands Institute for Space Research (SRON) show excess noise consistent with internal TFN (ITFN) caused by random energy transport within the TES itself while low resistance TESs show an excess voltage noise of unknown origin seemingly unrelated to temperature fluctuations. Running a high-resistance TES on a high thermal conductivity substrate should suppress ITFN and allow detection of any excess voltage noise. We tested two TESs on a solid silicon substrate fabricated by SRON of a relatively high normal state resistance of ∼200 mΩ. After determining a linear model of the TES response to noise for the devices, we found little excess TFN and little excess voltage noise for bias currents of up to ∼20 μA

Silicon-micromachined microchannel plates

International Nuclear Information System (INIS)

Beetz, Charles P.; Boerstler, Robert; Steinbeck, John; Lemieux, Bryan; Winn, David R.

2000-01-01

Microchannel plates (MCP) fabricated from standard silicon wafer substrates using a novel silicon micromachining process, together with standard silicon photolithographic process steps, are described. The resulting SiMCP microchannels have dimensions of ∼0.5 to ∼25 μm, with aspect ratios up to 300, and have the dimensional precision and absence of interstitial defects characteristic of photolithographic processing, compatible with positional matching to silicon electronics readouts. The open channel areal fraction and detection efficiency may exceed 90% on plates up to 300 mm in diameter. The resulting silicon substrates can be converted entirely to amorphous quartz (qMCP). The strip resistance and secondary emission are developed by controlled depositions of thin films, at temperatures up to 1200 deg. C, also compatible with high-temperature brazing, and can be essentially hydrogen, water and radionuclide-free. Novel secondary emitters and cesiated photocathodes can be high-temperature deposited or nucleated in the channels or the first strike surface. Results on resistivity, secondary emission and gain are presented

Laser process for extended silicon thin film solar cells

International Nuclear Information System (INIS)

Hessmann, M.T.; Kunz, T.; Burkert, I.; Gawehns, N.; Schaefer, L.; Frick, T.; Schmidt, M.; Meidel, B.; Auer, R.; Brabec, C.J.

2011-01-01

We present a large area thin film base substrate for the epitaxy of crystalline silicon. The concept of epitaxial growth of silicon on large area thin film substrates overcomes the area restrictions of an ingot based monocrystalline silicon process. Further it opens the possibility for a roll to roll process for crystalline silicon production. This concept suggests a technical pathway to overcome the limitations of silicon ingot production in terms of costs, throughput and completely prevents any sawing losses. The core idea behind these thin film substrates is a laser welding process of individual, thin silicon wafers. In this manuscript we investigate the properties of laser welded monocrystalline silicon foils (100) by micro-Raman mapping and spectroscopy. It is shown that the laser beam changes the crystalline structure of float zone grown silicon along the welding seam. This is illustrated by Raman mapping which visualizes compressive stress as well as tensile stress in a range of - 147.5 to 32.5 MPa along the welding area.

Electrochemical Fabrication of Nanostructures on Porous Silicon for Biochemical Sensing Platforms.

Science.gov (United States)

Ko, Euna; Hwang, Joonki; Kim, Ji Hye; Lee, Joo Heon; Lee, Sung Hwan; Tran, Van-Khue; Chung, Woo Sung; Park, Chan Ho; Choo, Jaebum; Seong, Gi Hun

2016-01-01

We present a method for the electrochemical patterning of gold nanoparticles (AuNPs) or silver nanoparticles (AgNPs) on porous silicon, and explore their applications in: (1) the quantitative analysis of hydroxylamine as a chemical sensing electrode and (2) as a highly sensitive surface-enhanced Raman spectroscopy (SERS) substrate for Rhodamine 6G. For hydroxylamine detection, AuNPs-porous silicon can enhance the electrochemical oxidation of hydroxylamine. The current changed linearly for concentrations ranging from 100 μM to 1.32 mM (R(2) = 0.995), and the detection limit was determined to be as low as 55 μM. When used as SERS substrates, these materials also showed that nanoparticles decorated on porous silicon substrates have more SERS hot spots than those decorated on crystalline silicon substrates, resulting in a larger SERS signal. Moreover, AgNPs-porous silicon provided five-times higher signal compared to AuNPs-porous silicon. From these results, we expect that nanoparticles decorated on porous silicon substrates can be used in various types of biochemical sensing platforms.

Emerging heterogeneous integrated photonic platforms on silicon

Directory of Open Access Journals (Sweden)

Fathpour Sasan

2015-05-01

Full Text Available Silicon photonics has been established as a mature and promising technology for optoelectronic integrated circuits, mostly based on the silicon-on-insulator (SOI waveguide platform. However, not all optical functionalities can be satisfactorily achieved merely based on silicon, in general, and on the SOI platform, in particular. Long-known shortcomings of silicon-based integrated photonics are optical absorption (in the telecommunication wavelengths and feasibility of electrically-injected lasers (at least at room temperature. More recently, high two-photon and free-carrier absorptions required at high optical intensities for third-order optical nonlinear effects, inherent lack of second-order optical nonlinearity, low extinction ratio of modulators based on the free-carrier plasma effect, and the loss of the buried oxide layer of the SOI waveguides at mid-infrared wavelengths have been recognized as other shortcomings. Accordingly, several novel waveguide platforms have been developing to address these shortcomings of the SOI platform. Most of these emerging platforms are based on heterogeneous integration of other material systems on silicon substrates, and in some cases silicon is integrated on other substrates. Germanium and its binary alloys with silicon, III–V compound semiconductors, silicon nitride, tantalum pentoxide and other high-index dielectric or glass materials, as well as lithium niobate are some of the materials heterogeneously integrated on silicon substrates. The materials are typically integrated by a variety of epitaxial growth, bonding, ion implantation and slicing, etch back, spin-on-glass or other techniques. These wide range of efforts are reviewed here holistically to stress that there is no pure silicon or even group IV photonics per se. Rather, the future of the field of integrated photonics appears to be one of heterogenization, where a variety of different materials and waveguide platforms will be used for

Fabrication of a Silicon Nanowire on a Bulk Substrate by Use of a Plasma Etching and Total Ionizing Dose Effects on a Gate-All-Around Field-Effect Transistor

Science.gov (United States)

Moon, Dong-Il; Han, Jin-Woo; Meyyappan, Meyya

2016-01-01

The gate all around transistor is investigated through experiment. The suspended silicon nanowire for the next generation is fabricated on bulk substrate by plasma etching method. The scallop pattern generated by Bosch process is utilized to form a floating silicon nanowire. By combining anisotropic and istropic silicon etch process, the shape of nanowire is accurately controlled. From the suspended nanowire, the gate all around transistor is demonstrated. As the silicon nanowire is fully surrounded by the gate, the device shows excellent electrostatic characteristics.

Porous silicon localization for implementation in matrix biosensors

International Nuclear Information System (INIS)

Benilov, A.; Cabrera, M.; Skryshevsky, V.; Martin, J.-R.

2007-01-01

The search of appropriate substrates and methods of surface DNA functionalisation is one of the important tasks of semiconductor biosensors. In this work we develop a method of light-assisted porous silicon etching in order to localize porous silicon spots on silicon substrate for matrix fluorophore-labeled DNA sensors implementation. The principal difference of porous spots localization proposed is considered for n- and p-type Si substrates under the condition of supplementary illumination. The tuning of the porous profile via applying of lateral electric field is proposed and experimentally proved

Nanosized graphene sheets enhanced photoelectric behavior of carbon film on p-silicon substrate

Energy Technology Data Exchange (ETDEWEB)

Yang, Lei; Hu, Gaijuan; Zhang, Dongqing [Key Laboratory of Education Ministry for Modern Design and Rotor-Bearing System, School of Mechanical Engineering, Xi' an Jiaotong University, Xi' an 710049 (China); Diao, Dongfeng, E-mail: dfdiao@szu.edu.cn [Institute of Nanosurface Science and Engineering (INSE), Shenzhen University, Shenzhen 518060 (China)

2016-07-18

We found that nanosized graphene sheets enhanced the photoelectric behavior of graphene sheets embedded carbon (GSEC) film on p-silicon substrate, which was deposited under low energy electron irradiation in electron cyclotron resonance plasma. The GSEC/p-Si photodiode exhibited good photoelectric performance with photoresponsivity of 206 mA/W, rise and fall time of 2.2, and 4.3 μs for near-infrared (850 nm) light. The origin of the strong photoelectric behavior of GSEC film was ascribed to the appearance of graphene nanosheets, which led to higher barrier height and photoexcited electron-collection efficiency. This finding indicates that GSEC film has the potential for photoelectric applications.

Nanosized graphene sheets enhanced photoelectric behavior of carbon film on p-silicon substrate

International Nuclear Information System (INIS)

Yang, Lei; Hu, Gaijuan; Zhang, Dongqing; Diao, Dongfeng

2016-01-01

We found that nanosized graphene sheets enhanced the photoelectric behavior of graphene sheets embedded carbon (GSEC) film on p-silicon substrate, which was deposited under low energy electron irradiation in electron cyclotron resonance plasma. The GSEC/p-Si photodiode exhibited good photoelectric performance with photoresponsivity of 206 mA/W, rise and fall time of 2.2, and 4.3 μs for near-infrared (850 nm) light. The origin of the strong photoelectric behavior of GSEC film was ascribed to the appearance of graphene nanosheets, which led to higher barrier height and photoexcited electron-collection efficiency. This finding indicates that GSEC film has the potential for photoelectric applications.

Silicon nanowires: structure and properties

International Nuclear Information System (INIS)

Nezhdanov, A.V.; Mashin, A.I.; Razuvaev, A.G.; Ershov, A.V.; Ignatov, S.K.

2006-01-01

An attempt to grow silicon nanowires has been made by electron beam evaporation on highly oriented pyrolytic substrate. Needle-like objects are located along the normal to a substrate (density 2 x 10 11 cm -2 ). For modeling quasi-one-dimensional objects calculations of nuclear structure and energy spectra have been accomplished. A fullerene-like structure Si 24 is proposed as a basic atomic configuration of silicon nanowires [ru

Photoconductivity relaxation and electron transport in macroporous silicon structures

Directory of Open Access Journals (Sweden)

L.A. Karachevtseva

2017-12-01

Full Text Available Kinetics and temperature dependence of photoconductivity were measured in macroporous silicon at 80…300 K after light illumination with the wavelength 0.9 μm. The influence of mechanisms of the charge carrier transport through the macropore surface barrier on the kinetics of photoconductivity at various temperatures was investigated. The kinetics of photoconductivity distribution in macroporous silicon and Si substrate has been calculated using the finite-difference time-domain method. The maximum of photoconductivity has been found both in the layer of macroporous silicon and in the monocrystalline substrate. The kinetics of photoconductivity distribution in macroporous silicon showed rapid relaxation of the photoconductivity maximum in the layer of macroporous silicon and slow relaxation of it in the monocrystalline substrate.

Effect of preliminary annealing of silicon substrates on the spectral sensitivity of photodetectors in bipolar integrated circuits

International Nuclear Information System (INIS)

Blynskij, V.I.; Bozhatkin, O.A.; Golub, E.S.; Lemeshevskaya, A.M.; Shvedov, S.V.

2010-01-01

We examine the results of an effect of preliminary annealing on the spectral sensitivity of photodetectors in bipolar integrated circuits, formed in silicon grown by the Czochralski method. We demonstrate the possibility of substantially improving the sensitivity of photodetectors in the infrared region of the spectrum with twostep annealing. The observed effect is explained by participation of oxidation in the gettering process, where oxidation precedes formation of a buried n + layer in the substrate. (authors)

Chiral silicon nanostructures

International Nuclear Information System (INIS)

Schubert, E.; Fahlteich, J.; Hoeche, Th.; Wagner, G.; Rauschenbach, B.

2006-01-01

Glancing angle ion beam assisted deposition is used for the growth of amorphous silicon nanospirals onto [0 0 1] silicon substrates in a temperature range from room temperature to 475 deg. C. The nanostructures are post-growth annealed in an argon atmosphere at various temperatures ranging from 400 deg. C to 800 deg. C. Recrystallization of silicon within the persisting nanospiral configuration is demonstrated for annealing temperatures above 800 deg. C. Transmission electron microscopy and Raman spectroscopy are used to characterize the silicon samples prior and after temperature treatment

Transistors using crystalline silicon devices on glass

Science.gov (United States)

McCarthy, Anthony M.

1995-01-01

A method for fabricating transistors using single-crystal silicon devices on glass. This method overcomes the potential damage that may be caused to the device during high voltage bonding and employs a metal layer which may be incorporated as part of the transistor. This is accomplished such that when the bonding of the silicon wafer or substrate to the glass substrate is performed, the voltage and current pass through areas where transistors will not be fabricated. After removal of the silicon substrate, further metal may be deposited to form electrical contact or add functionality to the devices. By this method both single and gate-all-around devices may be formed.

Self-organized nickel nanoparticles on nanostructured silicon substrate intermediated by a titanium oxynitride (TiNxOy) interface

Science.gov (United States)

Morales, M.; Droppa, R., Jr.; de Mello, S. R. S.; Figueroa, C. A.; Zanatta, A. R.; Alvarez, F.

2018-01-01

In this work we report an experimental approach by combining in situ sequential top-down and bottom-up processes to induce the organization of nanosized nickel particles. The top-down process consists in xenon ion bombardment of a crystalline silicon substrate to generate a pattern, followed by depositing a ˜15 nm titanium oxynitride thin film to act as a metallic diffusion barrier. Then, metallic nanoparticles are deposited by argon ion sputtering a pure nickel target, and the sample is annealed to promote the organization of the nickel nanoparticles (a bottom-up process). According to the experimental results, the surface pattern and the substrate biaxial surface strain are the driving forces behind the alignment and organization of the nickel nanoparticles. Moreover, the ratio between the F of metallic atoms arriving at the substrate relative to its surface diffusion mobility determines the nucleation regime of the nickel nanoparticles. These features are presented and discussed considering the existing technical literature on the subject.

Mechanically flexible optically transparent silicon fabric with high thermal budget devices from bulk silicon (100)

KAUST Repository

Hussain, Muhammad Mustafa

2013-05-30

Today’s information age is driven by silicon based electronics. For nearly four decades semiconductor industry has perfected the fabrication process of continuingly scaled transistor – heart of modern day electronics. In future, silicon industry will be more pervasive, whose application will range from ultra-mobile computation to bio-integrated medical electronics. Emergence of flexible electronics opens up interesting opportunities to expand the horizon of electronics industry. However, silicon – industry’s darling material is rigid and brittle. Therefore, we report a generic batch fabrication process to convert nearly any silicon electronics into a flexible one without compromising its (i) performance; (ii) ultra-large-scale-integration complexity to integrate billions of transistors within small areas; (iii) state-of-the-art process compatibility, (iv) advanced materials used in modern semiconductor technology; (v) the most widely used and well-studied low-cost substrate mono-crystalline bulk silicon (100). In our process, we make trenches using anisotropic reactive ion etching (RIE) in the inactive areas (in between the devices) of a silicon substrate (after the devices have been fabricated following the regular CMOS process), followed by a dielectric based spacer formation to protect the sidewall of the trench and then performing an isotropic etch to create caves in silicon. When these caves meet with each other the top portion of the silicon with the devices is ready to be peeled off from the bottom silicon substrate. Release process does not need to use any external support. Released silicon fabric (25 μm thick) is mechanically flexible (5 mm bending radius) and the trenches make it semi-transparent (transparency of 7%). © (2013) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.

Mechanically flexible optically transparent silicon fabric with high thermal budget devices from bulk silicon (100)

KAUST Repository

Hussain, Muhammad Mustafa; Rojas, Jhonathan Prieto; Sevilla, Galo T.

2013-01-01

Today’s information age is driven by silicon based electronics. For nearly four decades semiconductor industry has perfected the fabrication process of continuingly scaled transistor – heart of modern day electronics. In future, silicon industry will be more pervasive, whose application will range from ultra-mobile computation to bio-integrated medical electronics. Emergence of flexible electronics opens up interesting opportunities to expand the horizon of electronics industry. However, silicon – industry’s darling material is rigid and brittle. Therefore, we report a generic batch fabrication process to convert nearly any silicon electronics into a flexible one without compromising its (i) performance; (ii) ultra-large-scale-integration complexity to integrate billions of transistors within small areas; (iii) state-of-the-art process compatibility, (iv) advanced materials used in modern semiconductor technology; (v) the most widely used and well-studied low-cost substrate mono-crystalline bulk silicon (100). In our process, we make trenches using anisotropic reactive ion etching (RIE) in the inactive areas (in between the devices) of a silicon substrate (after the devices have been fabricated following the regular CMOS process), followed by a dielectric based spacer formation to protect the sidewall of the trench and then performing an isotropic etch to create caves in silicon. When these caves meet with each other the top portion of the silicon with the devices is ready to be peeled off from the bottom silicon substrate. Release process does not need to use any external support. Released silicon fabric (25 μm thick) is mechanically flexible (5 mm bending radius) and the trenches make it semi-transparent (transparency of 7%). © (2013) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.

Effect of Processing Parameters on Thickness of Columnar Structured Silicon Wafers Directly Grown from Silicon Melts

Directory of Open Access Journals (Sweden)

Jin-Seok Lee

2012-01-01

Full Text Available In order to obtain optimum growth conditions for desired thickness and more effective silicon feedstock usage, effects of processing parameters such as preheated substrate temperatures, time intervals, moving velocity of substrates, and Ar gas blowing rates on silicon ribbon thickness were investigated in the horizontal growth process. Most of the parameters strongly affected in the control of ribbon thickness with columnar grain structure depended on the solidification rate. The thickness of the silicon ribbon decreased with an increasing substrate temperature, decreasing time interval, and increasing moving velocity of the substrate. However, the blowing of Ar gas onto a liquid layer existing on the surface of solidified ribbon contributed to achieving smooth surface roughness but did not closely affect the change of ribbon thickness in the case of a blowing rate of ≥0.65 Nm3/h because the thickness of the solidified layer was already determined by the exit height of the reservoir.

Surface treatment effect on Si (111) substrate for carbon deposition using DC unbalanced magnetron sputtering

Energy Technology Data Exchange (ETDEWEB)

Aji, A. S., E-mail: aji.ravazes70@gmail.com; Sahdan, M. F.; Hendra, I. B.; Dinari, P.; Darma, Y. [Quantum Semiconductor and Devices Lab., Physics of Material Electronics Research Division, Department of Physics, Institut Teknologi Bandung (Indonesia)

2015-04-16

In this work, we studied the effect of HF treatment in silicon (111) substrate surface for depositing thin layer carbon. We performed the deposition of carbon by using DC Unbalanced Magnetron Sputtering with carbon pallet (5% Fe) as target. From SEM characterization results it can be concluded that the carbon layer on HF treated substrate is more uniform than on substrate without treated. Carbon deposition rate is higher as confirmed by AFM results if the silicon substrate is treated by HF solution. EDAX characterization results tell that silicon (111) substrate with HF treatment have more carbon fraction than substrate without treatment. These results confirmed that HF treatment on silicon Si (111) substrates could enhance the carbon deposition by using DC sputtering. Afterward, the carbon atomic arrangement on silicon (111) surface is studied by performing thermal annealing process to 900 °C. From Raman spectroscopy results, thin film carbon is not changing until 600 °C thermal budged. But, when temperature increase to 900 °C, thin film carbon is starting to diffuse to silicon (111) substrates.

Internal friction study of microplasticity of aluminum thin films on silicon substrates

Energy Technology Data Exchange (ETDEWEB)

Nishio, Y.; Tanahashi, K.; Asano, S. [Nagoya Institute of Technology, Nagoya (Japan)

1995-12-01

Internal friction in aluminum thin films 0.2 to 2.0 {mu}m thick on silicon substrates has been investigated between 180 and 360 K as a function of strain amplitude by means of a free-decay method of flexural vibration. According to the constitutive equation, the internal friction in the film alone can be evaluated separately from the data on the film/substrate composite. The amplitude-dependent part of internal friction in aluminum films is found in the strain range approximately two orders of magnitude higher than that for bulk aluminum. On the basis of the microplasticity theory, the amplitude-dependent internal friction can be converted into the plastic strain as a function of the effective stress on dislocation motion. The mechanical responses thus obtained for aluminum films show that the plastic strain of the order of 10-9 in creases nonlinearly with increasing stress. These curves tend to shift to a higher stress with decreasing film thickness and also with decreasing temperature, both indicating a suppression of the microplastic deformation. At all temperatures examined, the microflow stress at a constant level of the plastic strain varies inversely with the film thickness, which qualitatively agrees with the variation in macroscopic yield stress. 36 refs., 7 figs.

Quantum efficiency of InAs/InP nanowire heterostructures grown on silicon substrates

International Nuclear Information System (INIS)

Anufriev, Roman; Chauvin, Nicolas; Bru-Chevallier, Catherine; Khmissi, Hammadi; Naji, Khalid; Gendry, Michel; Patriarche, Gilles

2013-01-01

Photoluminescence (PL) quantum efficiency (QE) is experimentally investigated, using an integrating sphere, as a function of excitation power on both InAs/InP quantum rod nanowires (QRod-NWs) and radial quantum well nanowires (QWell-NWs) grown on silicon substrates. The measured values of the QE are compared with those of the planar analogues such as quantum dash and quantum well samples, and found to be comparable for the quantum well structures at relatively low power density. Further studies reveal that the values of QE of the QRod-NWs and QWell-NWs are limited by the low quality of the InP NW structure and the quality of radial quantum well, respectively. (copyright 2013 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim) (orig.)

Epitaxial growth of silicon and germanium on (100-oriented crystalline substrates by RF PECVD at 175 °C

Directory of Open Access Journals (Sweden)

Mauguin O.

2012-11-01

Full Text Available We report on the epitaxial growth of crystalline Si and Ge thin films by standard radio frequency plasma enhanced chemical vapor deposition at 175 °C on (100-oriented silicon substrates. We also demonstrate the epitaxial growth of silicon films on epitaxially grown germanium layers so that multilayer samples sustaining epitaxy could be produced. We used spectroscopic ellipsometry, Raman spectroscopy, transmission electron microscopy and X-ray diffraction to characterize the structure of the films (amorphous, crystalline. These techniques were found to provide consistent results and provided information on the crystallinity and constraints in such lattice-mismatched structures. These results open the way to multiple quantum-well structures, which have been so far limited to few techniques such as Molecular Beam Epitaxy or MetalOrganic Chemical Vapor Deposition.

PVD Silicon Carbide as a Thin Film Packaging Technology for Antennas on LCP Substrates for Harsh Environments

Science.gov (United States)

Scardelletti, Maximilian C.; Stanton, John W.; Ponchak, George E.; Jordan, Jennifer L.; Zorman, Christian A.

2010-01-01

This paper describes an effort to develop a thin film packaging technology for microfabricated planar antennas on polymeric substrates based on silicon carbide (SiC) films deposited by physical vapor deposition (PVD). The antennas are coplanar waveguide fed dual frequency folded slot antennas fabricated on liquid crystal polymer (LCP) substrates. The PVD SiC thin films were deposited directly onto the antennas by RF sputtering at room temperature at a chamber pressure of 30 mTorr and a power level of 300 W. The SiC film thickness is 450 nm. The return loss and radiation patterns were measured before and after the SiC-coated antennas were submerged into perchloric acid for 1 hour. No degradation in RF performance or physical integrity of the antenna was observed.

Monolithic amorphous silicon modules on continuous polymer substrate. Final subcontract report, 9 January 1991--14 April 1991

Energy Technology Data Exchange (ETDEWEB)

Grimmer, D.P. [Iowa Thin Film Technologies, Inc., Ames, IA (US)

1992-03-01

This report examines manufacturing monolithic amorphous silicon modules on a continuous polymer substrate. Module production costs can be reduced by increasing module performance, expanding production, and improving and modifying production processes. Material costs can be reduced by developing processes that use a 1-mil polyimide substrate and multilayers of low-cost material for the front encapsulant. Research to speed up a-Si and ZnO deposition rates is needed to improve throughputs. To keep throughput rates compatible with depositions, multibeam fiber optic delivery systems for laser scribing can be used. However, mechanical scribing systems promise even higher throughputs. Tandem cells and production experience can increase device efficiency and stability. Two alternative manufacturing processes are described: (1) wet etching and sheet handling and (2) wet etching and roll-to-roll fabrication.

Nitride-based Quantum-Confined Structures for Ultraviolet-Visible Optical Devices on Silicon Substrates

KAUST Repository

Janjua, Bilal

2017-04-01

III–V nitride quantum-confined structures embedded in nanowires (NWs), also known as quantum-disks-in-nanowires (Qdisks-in-NWs), have recently emerged as a new class of nanoscale materials exhibiting outstanding properties for optoelectronic devices and systems. It is promising for circumventing the technology limitation of existing planar epitaxy devices, which are bounded by the lattice-, crystal-structure-, and thermal- matching conditions. This work presents significant advances in the growth of good quality GaN, InGaN and AlGaN Qdisks-in-NWs based on careful optimization of the growth parameters, coupled with a meticulous layer structure and active region design. The NWs were grown, catalyst-free, using plasma assisted molecular beam epitaxy (PAMBE) on silicon (Si) substrates. A 2-step growth scheme was developed to achieve high areal density, dislocation free and vertically aligned NWs on Ti/Si substrates. Numerical modeling of the NWs structures, using the nextnano3 software, showed reduced polarization fields, and, in the presence of Qdisks, exhibited improved quantum-confinement; thus contributing to high carrier radiative-recombination rates. As a result, based on the growth and device structure optimization, the technologically challenging orange and yellow NWs light emitting devices (LEDs) targeting the ‘green-yellow’ gap were demonstrated on scalable, foundry compatible, and low-cost Ti coated Si substrates. The NWs work was also extended to LEDs emitting in the ultraviolet (UV) range with niche applications in environmental cleaning, UV-curing, medicine, and lighting. In this work, we used a Ti (100 nm) interlayer and Qdisks to achieve good quality AlGaN based UV-A (320 - 400 nm) device. To address the issue of UV-absorbing polymer, used in the planarization process, we developed a pendeo-epitaxy technique, for achieving an ultra-thin coalescence of the top p-GaN contact layer, for a self-planarized Qdisks-in-NWs UV-B (280 – 320 nm) LED grown

Silicon germanium mask for deep silicon etching

KAUST Repository

Serry, Mohamed

2014-07-29

Polycrystalline silicon germanium (SiGe) can offer excellent etch selectivity to silicon during cryogenic deep reactive ion etching in an SF.sub.6/O.sub.2 plasma. Etch selectivity of over 800:1 (Si:SiGe) may be achieved at etch temperatures from -80 degrees Celsius to -140 degrees Celsius. High aspect ratio structures with high resolution may be patterned into Si substrates using SiGe as a hard mask layer for construction of microelectromechanical systems (MEMS) devices and semiconductor devices.

Silicon germanium mask for deep silicon etching

KAUST Repository

Serry, Mohamed; Rubin, Andrew; Refaat, Mohamed; Sedky, Sherif; Abdo, Mohammad

2014-01-01

Polycrystalline silicon germanium (SiGe) can offer excellent etch selectivity to silicon during cryogenic deep reactive ion etching in an SF.sub.6/O.sub.2 plasma. Etch selectivity of over 800:1 (Si:SiGe) may be achieved at etch temperatures from -80 degrees Celsius to -140 degrees Celsius. High aspect ratio structures with high resolution may be patterned into Si substrates using SiGe as a hard mask layer for construction of microelectromechanical systems (MEMS) devices and semiconductor devices.

Surface evolution and stability transition of silicon wafer subjected to nano-diamond grinding

Directory of Open Access Journals (Sweden)

Shisheng Cai

2017-03-01

Full Text Available In order to obtain excellent physical properties and ultrathin devices, thinning technique plays an important role in semiconductor industry with the rapid development of wearable electronic devices. This study presents a physical nano-diamond grinding technique without any chemistry to obtain ultrathin silicon substrate. The nano-diamond with spherical shape repeats nano-cutting and penetrating surface to physically etch silicon wafer during grinding process. Nano-diamond grinding induces an ultrathin “amorphous layer” on silicon wafer and thus the mismatch strain between the amorphous layer and substrate leads to stability transition from the spherical to non-spherical deformation of the wafer. Theoretical model is proposed to predict and analyze the deformation of amorphous layer/silicon substrate system. Furthermore, the deformation bifurcation behavior of amorphous layer/silicon substrate system is analyzed. As the mismatch strain increases or thickness decreases, the amorphous layer/silicon substrate system may transit to non-spherical deformation, which is consistent to the experimental results. The amorphous layer stresses are also obtained to predict the damage of silicon wafer.

Photonic integration and photonics-electronics convergence on silicon platform

CERN Document Server

Liu, Jifeng; Baba, Toshihiko; Vivien, Laurent; Xu, Dan-Xia

2015-01-01

Silicon photonics technology, which has the DNA of silicon electronics technology, promises to provide a compact photonic integration platform with high integration density, mass-producibility, and excellent cost performance. This technology has been used to develop and to integrate various photonic functions on silicon substrate. Moreover, photonics-electronics convergence based on silicon substrate is now being pursued. Thanks to these features, silicon photonics will have the potential to be a superior technology used in the construction of energy-efficient cost-effective apparatuses for various applications, such as communications, information processing, and sensing. Considering the material characteristics of silicon and difficulties in microfabrication technology, however, silicon by itself is not necessarily an ideal material. For example, silicon is not suitable for light emitting devices because it is an indirect transition material. The resolution and dynamic range of silicon-based interference de...

Electrical characterization of high-pressure reactive sputtered ScOx films on silicon

International Nuclear Information System (INIS)

Castan, H.; Duenas, S.; Gomez, A.; Garcia, H.; Bailon, L.; Feijoo, P.C.; Toledano-Luque, M.; Prado, A. del; San Andres, E.; Lucia, M.L.

2011-01-01

Al/ScO x /SiN x /n-Si and Al/ScO x /SiO x /n-Si metal-insulator-semiconductor capacitors have been electrically characterized. Scandium oxide was grown by high-pressure sputtering on different substrates to study the dielectric/insulator interface quality. The substrates were silicon nitride and native silicon oxide. The use of a silicon nitride interfacial layer between the silicon substrate and the scandium oxide layer improves interface quality, as interfacial state density and defect density inside the insulator are decreased.

Tribology study of reduced graphene oxide sheets on silicon substrate synthesized via covalent assembly.

Science.gov (United States)

Ou, Junfei; Wang, Jinqing; Liu, Sheng; Mu, Bo; Ren, Junfang; Wang, Honggang; Yang, Shengrong

2010-10-19

Reduced graphene oxide (RGO) sheets were covalently assembled onto silicon wafers via a multistep route based on the chemical adsorption and thermal reduction of graphene oxide (GO). The formation and microstructure of RGO were analyzed by X-ray photoelectron spectroscopy (XPS), attenuated total reflectance Fourier transform infrared (ATR-FTIR) spectroscopy, Raman spectroscopy, and water contact angle (WCA) measurements. Characterization by atomic force microscopy (AFM) was performed to evaluate the morphology and microtribological behaviors of the samples. Macrotribological performance was tested on a ball-on-plate tribometer. Results show that the assembled RGO possesses good friction reduction and antiwear ability, properties ascribed to its intrinsic structure, that is, the covalent bonding to the substrate and self-lubricating property of RGO.

Electrical response of electron selective atomic layer deposited TiO2‑x heterocontacts on crystalline silicon substrates

Science.gov (United States)

Ahiboz, Doğuşcan; Nasser, Hisham; Aygün, Ezgi; Bek, Alpan; Turan, Raşit

2018-04-01

Integration of oxygen deficient sub-stoichiometric titanium dioxide (TiO2‑x) thin films as the electron transporting-hole blocking layer in solar cell designs are expected to reduce fabrication costs by eliminating high temperature processes while maintaining high conversion efficiencies. In this paper, we conducted a study to reveal the electrical properties of TiO2‑x thin films grown on crystalline silicon (c-Si) substrates by atomic layer deposition (ALD) technique. Effect of ALD substrate temperature, post deposition annealing, and doping type of the c-Si substrate on the interface states and TiO2‑x bulk properties were extracted by performing admittance (C-V, G-V) and current-voltage (J-V) measurements. Moreover, the asymmetry in C-V and J-V measurements between the p-n type and n-n TiO2‑x-c-Si heterojunction types were examined and the electron transport selectivity of TiO2‑x was revealed.

Surface wettability of silicon substrates enhanced by laser ablation

Energy Technology Data Exchange (ETDEWEB)

Tseng, Shih-Feng [National Applied Research Laboratories, Instrument Technology Research Center, Hsinchu (China); National Chiao Tung University, Department of Mechanical Engineering, Hsinchu (China); Hsiao, Wen-Tse; Huang, Kuo-Cheng; Hsiao, Sheng-Yi [National Applied Research Laboratories, Instrument Technology Research Center, Hsinchu (China); Chen, Ming-Fei [National Changhua University of Education, Department of Mechatronics Engineering, Changhua (China); Lin, Yung-Sheng [Hungkuang University, Department of Applied Cosmetology and Graduate Institute of Cosmetic Science, Taichung (China); Chou, Chang-Pin [National Chiao Tung University, Department of Mechanical Engineering, Hsinchu (China)

2010-11-15

Laser-ablation techniques have been widely applied for removing material from a solid surface using a laser-beam irradiating apparatus. This paper presents a surface-texturing technique to create rough patterns on a silicon substrate using a pulsed Nd:YAG laser system. The different degrees of microstructure and surface roughness were adjusted by the laser fluence and laser pulse duration. A scanning electron microscope (SEM) and a 3D confocal laser-scanning microscope are used to measure the surface micrograph and roughness of the patterns, respectively. The contact angle variations between droplets on the textured surface were measured using an FTA 188 video contact angle analyzer. The results indicate that increasing the values of laser fluence and laser pulse duration pushes more molten slag piled around these patterns to create micro-sized craters and leads to an increase in the crater height and surface roughness. A typical example of a droplet on a laser-textured surface shows that the droplet spreads very quickly and almost disappears within 0.5167 s, compared to a contact angle of 47.9 on an untextured surface. This processing technique can also be applied to fabricating Si solar panels to increase the absorption efficiency of light. (orig.)

Fluorescence and thermoluminescence in silicon oxide films rich in silicon

International Nuclear Information System (INIS)

Berman M, D.; Piters, T. M.; Aceves M, M.; Berriel V, L. R.; Luna L, J. A.

2009-10-01

In this work we determined the fluorescence and thermoluminescence (TL) creation spectra of silicon rich oxide films (SRO) with three different silicon excesses. To study the TL of SRO, 550 nm of SRO film were deposited by Low Pressure Chemical Vapor Deposition technique on N-type silicon substrates with resistivity in the order of 3 to 5 Ω-cm with silicon excess controlled by the ratio of the gases used in the process, SRO films with Ro= 10, 20 and 30 (12-6% silicon excess) were obtained. Then, they were thermally treated in N 2 at high temperatures to diffuse and homogenize the silicon excess. In the fluorescence spectra two main emission regions are observed, one around 400 nm and one around 800 nm. TL creation spectra were determined by plotting the integrated TL intensity as function of the excitation wavelength. (Author)

Effect of substrate bias on deposition behaviour of charged silicon nanoparticles in ICP-CVD process

International Nuclear Information System (INIS)

Yoo, Seung-Wan; Kim, Jung-Hyung; Seong, Dae-Jin; You, Shin-Jae; Seo, Byong-Hoon; Hwang, Nong-Moon

2017-01-01

The effect of a substrate bias on the deposition behaviour of crystalline silicon films during inductively coupled plasma chemical vapour deposition (ICP-CVD) was analysed by consideration of non-classical crystallization, in which the building block is a nanoparticle rather than an individual atom or molecule. The coexistence of positively and negatively charged nanoparticles in the plasma and their role in Si film deposition are confirmed by applying bias voltages to the substrate, which is sufficiently small as not to affect the plasma potential. The sizes of positively and negatively charged nanoparticles captured on a carbon membrane and imaged using TEM are, respectively, 2.7–5.5 nm and 6–13 nm. The film deposited by positively charged nanoparticles has a typical columnar structure. In contrast, the film deposited by negatively charged nanoparticles has a structure like a powdery compact with the deposition rate about three times higher than that for positively charged nanoparticles. All the films exhibit crystallinity even though the substrate is at room temperature, which is attributed to the deposition of crystalline nanoparticles formed in the plasma. The film deposited by negatively charged nanoparticles has the highest crystalline fraction of 0.84. (paper)

Crystalline silicon films sputtered on molybdenum A study of the silicon-molybdenum interface

Energy Technology Data Exchange (ETDEWEB)

Reinig, P.; Fenske, F.; Fuhs, W.; Schoepke, A.; Selle, B

2003-04-15

Polycrystalline silicon films were grown on molybdenum (Mo)-coated substrates at high deposition rate using the pulsed magnetron sputtering technique. Our study investigates the silicon-molybdenum interface of these films to elucidate stimulating mechanisms for an ordered crystalline silicon thin film growth. Both Auger electron spectroscopy and Rutherford backscattering reveal that at a substrate temperature as low as T{sub S}=450 deg. C during the deposition process intermixing of Si and Mo at the Si-Mo interface takes place leading to a compositional ratio Mo:Si of about 1:2. By Raman spectroscopy hexagonal {beta}-MoSi{sub 2} could be identified as the dominant phase in this intermixed region. The dependence of the resulting thickness of the reacted interface layer on the deposition conditions is not fully understood yet.

Crystalline silicon films sputtered on molybdenum A study of the silicon-molybdenum interface

International Nuclear Information System (INIS)

Reinig, P.; Fenske, F.; Fuhs, W.; Schoepke, A.; Selle, B.

2003-01-01

Polycrystalline silicon films were grown on molybdenum (Mo)-coated substrates at high deposition rate using the pulsed magnetron sputtering technique. Our study investigates the silicon-molybdenum interface of these films to elucidate stimulating mechanisms for an ordered crystalline silicon thin film growth. Both Auger electron spectroscopy and Rutherford backscattering reveal that at a substrate temperature as low as T S =450 deg. C during the deposition process intermixing of Si and Mo at the Si-Mo interface takes place leading to a compositional ratio Mo:Si of about 1:2. By Raman spectroscopy hexagonal β-MoSi 2 could be identified as the dominant phase in this intermixed region. The dependence of the resulting thickness of the reacted interface layer on the deposition conditions is not fully understood yet

X-ray characterization of Ge dots epitaxially grown on nanostructured Si islands on silicon-on-insulator substrates.

Science.gov (United States)

Zaumseil, Peter; Kozlowski, Grzegorz; Yamamoto, Yuji; Schubert, Markus Andreas; Schroeder, Thomas

2013-08-01

On the way to integrate lattice mismatched semiconductors on Si(001), the Ge/Si heterosystem was used as a case study for the concept of compliant substrate effects that offer the vision to be able to integrate defect-free alternative semiconductor structures on Si. Ge nanoclusters were selectively grown by chemical vapour deposition on Si nano-islands on silicon-on-insulator (SOI) substrates. The strain states of Ge clusters and Si islands were measured by grazing-incidence diffraction using a laboratory-based X-ray diffraction technique. A tensile strain of up to 0.5% was detected in the Si islands after direct Ge deposition. Using a thin (∼10 nm) SiGe buffer layer between Si and Ge the tensile strain increases to 1.8%. Transmission electron microscopy studies confirm the absence of a regular grid of misfit dislocations in such structures. This clear experimental evidence for the compliance of Si nano-islands on SOI substrates opens a new integration concept that is not only limited to Ge but also extendable to semiconductors like III-V and II-VI materials.

Selective formation of porous silicon

Science.gov (United States)

Fathauer, Robert W. (Inventor); Jones, Eric W. (Inventor)

1993-01-01

A pattern of porous silicon is produced in the surface of a silicon substrate by forming a pattern of crystal defects in said surface, preferably by applying an ion milling beam through openings in a photoresist layer to the surface, and then exposing said surface to a stain etchant, such as HF:HNO3:H2O. The defected crystal will preferentially etch to form a pattern of porous silicon. When the amorphous content of the porous silicon exceeds 70 percent, the porous silicon pattern emits visible light at room temperature.

Plasmonic and silicon spherical nanoparticle antireflective coatings

Science.gov (United States)

Baryshnikova, K. V.; Petrov, M. I.; Babicheva, V. E.; Belov, P. A.

2016-03-01

Over the last decade, plasmonic antireflecting nanostructures have been extensively studied to be utilized in various optical and optoelectronic systems such as lenses, solar cells, photodetectors, and others. The growing interest to all-dielectric photonics as an alternative optical technology along with plasmonics motivates us to compare antireflective properties of plasmonic and all-dielectric nanoparticle coatings based on silver and crystalline silicon respectively. Our simulation results for spherical nanoparticles array on top of amorphous silicon show that both silicon and silver coatings demonstrate strong antireflective properties in the visible spectral range. For the first time, we show that zero reflectance from the structure with silicon coatings originates from the destructive interference of electric- and magnetic-dipole responses of nanoparticle array with the wave reflected from the substrate, and we refer to this reflection suppression as substrate-mediated Kerker effect. We theoretically compare the silicon and silver coating effectiveness for the thin-film photovoltaic applications. Silver nanoparticles can be more efficient, enabling up to 30% increase of the overall absorbance in semiconductor layer. Nevertheless, silicon coatings allow up to 64% absorbance increase in the narrow band spectral range because of the substrate-mediated Kerker effect, and band position can be effectively tuned by varying the nanoparticles sizes.

Comparative study on electrical properties of atomic layer deposited high-permittivity materials on silicon substrates

International Nuclear Information System (INIS)

Duenas, S.; Castan, H.; Garcia, H.; Barbolla, J.; Kukli, K.; Ritala, M.; Leskelae, M.

2005-01-01

Deep level transient spectroscopy, capacitance-voltage and conductance transient measurement techniques have been applied in order to evaluate the electrical quality of thin high-permittivity oxide layers on silicon. The oxides studied included HfO 2 film grown from two different oxygen-free metal precursors and Ta 2 O 5 and Nb 2 O 5 nanolaminates. The interface trap densities correlated to the oxide growth chemistry and semiconductor substrate treatment. No gap state densities induced by structural disorder were measured in the films grown on chemical SiO 2 . Trap densities were also clearly lower in HfO 2 films compared to Ta 2 O 5 -Nb 2 O 5

Research and development of photovoltaic power system. Development of novel technologies for fabrication of high quality silicon thin films for solar cells; Taiyoko hatsuden system no kenkyu kaihatsu. Kohinshitsu silicon usumaku sakusei gijutsu

Energy Technology Data Exchange (ETDEWEB)

Shimizu, T [Kanazawa University, Ishikawa (Japan). Faculty of Engineering

1994-12-01

Described herein are the results of the FY1994 research program for development of novel technologies for fabrication of high quality thin films of silicon for solar cells. The study on the mechanisms and effects of chemical annealing reveals that the film structure greatly varies depending on substrate temperature during the hydrotreatment process, based on the tests with substrate temperature, deposition of superthin film (T1) and hydrotreatment (T2) as the variable parameters. Chemical annealing at low temperature produces a high-quality a-Si:H film of low defect content. The study on fabrication of thin polycrystalline silicon films at low temperature observes on real time the process of deposition of the thin films on polycrystalline silicon substrates, where a natural oxide film is removed beforehand from the substrate. The results indicate that a thin polycrystalline silicon film of 100% crystallinity can be formed even on a polycrystalline silicon substrate by controlling starting gas composition and substrate temperature. The layer-by-layer method is used as the means for forming the seed crystals on a glass substrate, where deposition and hydrotreatment are repeated alternately, to produce the thin crystalline silicon films of high crystallinity. 3 figs.

Porous silicon gettering

Energy Technology Data Exchange (ETDEWEB)

Tsuo, Y.S.; Menna, P.; Pitts, J.R. [National Renewable Energy Lab., Golden, CO (United States)] [and others

1996-05-01

The authors have studied a novel extrinsic gettering method that uses the large surface areas produced by a porous-silicon etch as gettering sites. The annealing step of the gettering used a high-flux solar furnace. They found that a high density of photons during annealing enhanced the impurity diffusion to the gettering sites. The authors used metallurgical-grade Si (MG-Si) prepared by directional solidification casing as the starting material. They propose to use porous-silicon-gettered MG-Si as a low-cost epitaxial substrate for polycrystalline silicon thin-film growth.

Metallization of DNA on silicon surface

International Nuclear Information System (INIS)

Puchkova, Anastasiya Olegovna; Sokolov, Petr; Petrov, Yuri Vladimirovich; Kasyanenko, Nina Anatolievna

2011-01-01

New simple way for silver deoxyribonucleic acid (DNA)-based nanowires preparation on silicon surface was developed. The electrochemical reduction of silver ions fixed on DNA molecule provides the forming of tightly matched zonate silver clusters. Highly homogeneous metallic clusters have a size about 30 nm. So the thickness of nanowires does not exceed 30–50 nm. The surface of n-type silicon monocrystal is the most convenient substrate for this procedure. The comparative analysis of DNA metallization on of n-type silicon with a similar way for nanowires fabrication on p-type silicon, freshly cleaved mica, and glass surface shows the advantage of n-type silicon, which is not only the substrate for DNA fixation but also the source of electrons for silver reduction. Images of bound DNA molecules and fabricated nanowires have been obtained using an atomic force microscope and a scanning ion helium microscope. DNA interaction with silver ions in a solution was examined by the methods of ultraviolet spectroscopy and circular dichroism.

Single and multijunction silicon based thin film solar cells on a flexible substrate with absorber layers made by hot-wire CVD

Science.gov (United States)

Li, Hongbo

2007-09-01

With the worldwide growing concern about reliable energy supply and the environmental problems of fossil and nuclear energy production, the need for clean and sustainable energy sources is evident. Solar energy conversion, such as in photovoltaic systems, can play a major role in the urgently needed energy transition in electricity production. Solar cells based on thin film silicon and its alloys are a promising candidate that is capable of fulfilling the fast increasing demand of a reliable solar cell supply. The conventional method to deposit silicon thin films is based on plasma enhanced chemical vapour deposition (PECVD) techniques, which have the disadvantage of increasing film inhomogeneity at a high deposition rate when scaling up for the industrial production. In this thesis, we study the possibility of making high efficiency single and multijunction thin film silicon solar cells with the so-called hot-wire CVD technique, in which no strong electromagnetic field is involved in the deposition. Therefore, the up-scaling for industrial production is straightforward. We report and discuss our findings on the correlation of substrate surface rms roughness and the main output parameter of a solar cell, the open circuit voltage Voc of c-Si:H n i p cells. By considering all the possible reasons that could influence the Voc of such cells, we conclude that the near linear correlation of Voc and substrate surface rms roughness is the result the two most probable reasons: the unintentional doping through the cracks originated near the valleys of the substrate surface due to the in-diffusion of impurities, and the high density electrical defects formed by the collision of columnar silicon structures. Both of them relate to the morphology of substrate surface. Therefore, to have the best cell performance on a rough substrate surface, a good control on the substrate surface morphology is necessary. Another issue influencing the performance of c-Si:H solar cells is the

Silicone Substrate with Collagen and Carbon Nanotubes Exposed to Pulsed Current for MSC Osteodifferentiation

Directory of Open Access Journals (Sweden)

Daniyal Jamal

2017-01-01

Full Text Available Autologous human adipose tissue-derived mesenchymal stem cells (MSCs have the potential for clinical translation through their induction into osteoblasts for regeneration. Bone healing can be driven by biophysical stimulation using electricity for activating quiescent adult stem cells. It is hypothesized that application of electric current will enhance their osteogenic differentiation, and addition of conductive carbon nanotubes (CNTs to the cell substrate will provide increased efficiency in current transmission. Cultured MSCs were seeded and grown onto fabricated silicone-based composites containing collagen and CNT fibers. Chemical inducers, namely, glycerol phosphate, dexamethasone, and vitamin C, were then added to the medium, and pulsatile submilliampere electrical currents (about half mA for 5 cycles at 4 mHz, twice a week were applied for two weeks. Calcium deposition indicative of MSC differentiation and osteoblastic activity was quantified through Alizarin Red S and spectroscopy. It was found that pulsed current significantly increased osteodifferentiation on silicone-collagen films without CNTs. Under no external current, the presence of 10% (m/m CNTs led to a significant and almost triple upregulation of calcium deposition. Both CNTs and current parameters did not appear to be synergistic. These conditions of enhanced osteoblastic activities may further be explored ultimately towards future therapeutic use of MSCs.

CMOS compatible generic batch process towards flexible memory on bulk monocrystalline silicon (100)

KAUST Repository

Ghoneim, Mohamed T.

2014-12-01

Today\\'s mainstream flexible electronics research is geared towards replacing silicon either totally, by having organic devices on organic substrates, or partially, by transferring inorganic devices onto organic substrates. In this work, we present a pragmatic approach combining the desired flexibility of organic substrates and the ultra-high integration density, inherent in silicon semiconductor industry, to transform bulk/inflexible silicon into an ultra-thin mono-crystalline fabric. We also show the effectiveness of this approach in achieving fully flexible electronic systems. Furthermore, we provide a progress report on fabricating various memory devices on flexible silicon fabric and insights for completely flexible memory modules on silicon fabric.

CMOS compatible generic batch process towards flexible memory on bulk monocrystalline silicon (100)

KAUST Repository

Ghoneim, Mohamed T.; Rojas, Jhonathan Prieto; Kutbee, Arwa T.; Hanna, Amir; Hussain, Muhammad Mustafa

2014-01-01

Today's mainstream flexible electronics research is geared towards replacing silicon either totally, by having organic devices on organic substrates, or partially, by transferring inorganic devices onto organic substrates. In this work, we present a pragmatic approach combining the desired flexibility of organic substrates and the ultra-high integration density, inherent in silicon semiconductor industry, to transform bulk/inflexible silicon into an ultra-thin mono-crystalline fabric. We also show the effectiveness of this approach in achieving fully flexible electronic systems. Furthermore, we provide a progress report on fabricating various memory devices on flexible silicon fabric and insights for completely flexible memory modules on silicon fabric.

Mechanical Characterization of Flexible and Stretchable Electronic Substrates

NARCIS (Netherlands)

Wang, L.

2010-01-01

Conventional IC packages form a rigid shell around silicon IC dies. Their purpose is to provide environmental protection, electrical interconnect and heat dissipation. Despite the fact that majority of current silicon IC?s are realized in a very thin top layer of the silicon substrate (<10µm), the

Formation of nanosize poly(p-phenylene vinylene) in porous silicon substrate

International Nuclear Information System (INIS)

Le Rendu, P.; Nguyen, T.P.; Cheah, K.; Joubert, P.

2003-01-01

We report the results of optical investigations in porous silicon (PS)/poly(p-phenylene vinylene) (PPV) systems obtained by filling the pores of silicon wafers with polymer. By scanning electron microscopy (SEM), IR, and Raman spectroscopy, we observed that the porous silicon layer was thoroughly filled by the polymer with no significant change in the structure of the materials. This suggests that there is no interaction between the components. On the other hand, the photoluminescence (PL) spectra of the devices investigated at different temperatures (from 11 to 290 K) showed that both materials are active at low temperatures. Porous silicon has a band located at 398 nm while PPV has two bands at 528 and 570 nm. As the temperature increases, the PL intensity of porous silicon decreases and that PPV is blue shifted. A new band emerging at 473 nm may indicate an energy transfer from the porous silicon to PPV, involving short segments of the polymer. The band of PPV located at 515 nm becomes more dominant and indicates that the nanosize polymer films are formed in the pores of the silicon layer, in agreement with the results obtained by SEM, IR, and Raman analyses

Silver endotaxy in silicon under various ambient conditions and their use as surface enhanced Raman spectroscopy substrates

International Nuclear Information System (INIS)

Juluri, R.R.; Ghosh, A.; Bhukta, A.; Sathyavathi, R.; Satyam, P.V.

2015-01-01

Search for reliable, robust and efficient substrates for surface enhanced Raman spectroscopy (SERS) leads to the growth of various shapes and nanostructures of noble metals, and in particular, Ag nanostructures for this purpose. Coherently embedded (also known as endotaxial) Ag nanostructures in silicon substrates can be made robust and reusable SERS substrates. In this paper, we show the possibility of the growth of Ag endotaxial structures in Si crystal during Ar and low-vacuum annealing conditions while this is absent in O 2 and ultra high vacuum (UHV) annealing conditions and along with their respective use as SERS substrates. Systems annealed under air-annealing and low-vacuum conditions were found to show larger enhancement factors (typically ≈ 5 × 10 5 in SERS measurement for 0.5 nM Crystal Violet (CV) molecule) while the systems prepared under UHV-annealing conditions (where no endotaxial Ag structures were formed) were found to be not effective as SERS substrates. Extensive electron microscopy, synchrotron X-ray diffraction and Rutherford backscattering spectrometry techniques were used to understand the structural aspects. - Highlights: • Various aspects on the growth of endotaxial Ag nanostructures are presented. • Optimum amount of oxygen is necessary for the growth of endotaxial structures. • Reaction of oxygen with GeOx and SiOx plays a crucial role. • Ag nanostructures prepared under UHV conditions show low SERS activity • SERS enhancement is better for low-vacuum and argon annealing conditions

Evaluation of silicon nitride as a substrate for culture of PC12 cells: an interfacial model for functional studies in neurons.

Directory of Open Access Journals (Sweden)

Johan Jaime Medina Benavente

Full Text Available Silicon nitride is a biocompatible material that is currently used as an interfacial surface between cells and large-scale integration devices incorporating ion-sensitive field-effect transistor technology. Here, we investigated whether a poly-L-lysine coated silicon nitride surface is suitable for the culture of PC12 cells, which are widely used as a model for neural differentiation, and we characterized their interaction based on cell behavior when seeded on the tested material. The coated surface was first examined in terms of wettability and topography using contact angle measurements and atomic force microscopy and then, conditioned silicon nitride surface was used as the substrate for the study of PC12 cell culture properties. We found that coating silicon nitride with poly-L-lysine increased surface hydrophilicity and that exposing this coated surface to an extracellular aqueous environment gradually decreased its roughness. When PC12 cells were cultured on a coated silicon nitride surface, adhesion and spreading were facilitated, and the cells showed enhanced morphological differentiation compared to those cultured on a plastic culture dish. A bromodeoxyuridine assay demonstrated that, on the coated silicon nitride surface, higher proportions of cells left the cell cycle, remained in a quiescent state and had longer survival times. Therefore, our study of the interaction of the silicon nitride surface with PC12 cells provides important information for the production of devices that need to have optimal cell culture-supporting properties in order to be used in the study of neuronal functions.

Silicon nanowire hybrid photovoltaics

KAUST Repository

Garnett, Erik C.

2010-06-01

Silicon nanowire Schottky junction solar cells have been fabricated using n-type silicon nanowire arrays and a spin-coated conductive polymer (PEDOT). The polymer Schottky junction cells show superior surface passivation and open-circuit voltages compared to standard diffused junction cells with native oxide surfaces. External quantum efficiencies up to 88% were measured for these silicon nanowire/PEDOT solar cells further demonstrating excellent surface passivation. This process avoids high temperature processes which allows for low-cost substrates to be used. © 2010 IEEE.

Silicon nanowire hybrid photovoltaics

KAUST Repository

Garnett, Erik C.; Peters, Craig; Brongersma, Mark; Cui, Yi; McGehee, Mike

2010-01-01

Silicon nanowire Schottky junction solar cells have been fabricated using n-type silicon nanowire arrays and a spin-coated conductive polymer (PEDOT). The polymer Schottky junction cells show superior surface passivation and open-circuit voltages compared to standard diffused junction cells with native oxide surfaces. External quantum efficiencies up to 88% were measured for these silicon nanowire/PEDOT solar cells further demonstrating excellent surface passivation. This process avoids high temperature processes which allows for low-cost substrates to be used. © 2010 IEEE.

The performance of Y2O3 as interface layer between La2O3 and p-type silicon substrate

Directory of Open Access Journals (Sweden)

Shulong Wang

2016-11-01

Full Text Available In this study, the performance of Y2O3 as interface layer between La2O3 and p-type silicon substrate is studied with the help of atomic layer deposition (ALD and magnetron sputtering technology. The surface morphology of the bilayer films with different structures are observed after rapid thermal annealing (RTA by atomic force microscopy (AFM. The results show that Y2O3/Al2O3/Si structure has a larger number of small spikes on the surface and its surface roughness is worse than Al2O3/Y2O3/Si structure. The reason is that the density of Si substrate surface is much higher than that of ALD growth Al2O3. With the help of high-frequency capacitance-voltage(C-V measurement and conductivity method, the density of interface traps can be calculated. After a high temperature annealing, the metal silicate will generate at the substrate interface and result in silicon dangling bond and interface trap charge, which has been improved by X-ray photoelectron spectroscopy (XPS and interface trap charge density calculation. The interface trapped charge density of La2O3/Al2O3/Si stacked gate structure is lower than that of La2O3/Y2O3/Si gate structure. If Y2O3 is used to replace Al2O3 as the interfacial layer, the accumulation capacitance will increase obviously, which means lower equivalent oxide thickness (EOT. Our results show that interface layer Y2O3 grown by magnetron sputtering can effectively ensure the interface traps near the substrate at relative small level while maintain a relative higher dielectric constant than Al2O3.

In situ study of the growth and degradation processes in tetragonal lysozyme crystals on a silicon substrate by high-resolution X-ray diffractometry

Science.gov (United States)

Kovalchuk, M. V.; Prosekov, P. A.; Marchenkova, M. A.; Blagov, A. E.; D'yakova, Yu. A.; Tereshchenko, E. Yu.; Pisarevskii, Yu. V.; Kondratev, O. A.

2014-09-01

The results of an in situ study of the growth of tetragonal lysozyme crystals by high-resolution X-ray diffractometry are considered. The crystals are grown by the sitting-drop method on crystalline silicon substrates of different types: both on smooth substrates and substrates with artificial surface-relief structures using graphoepitaxy. The crystals are grown in a special hermetically closed crystallization cell, which enables one to obtain images with an optical microscope and perform in situ X-ray diffraction studies in the course of crystal growth. Measurements for lysozyme crystals were carried out in different stages of the crystallization process, including crystal nucleation and growth, developed crystals, the degradation of the crystal structure, and complete destruction.

Wetting Behavior and Reactivity of Molten Silicon with h-BN Substrate at Ultrahigh Temperatures up to 1750 °C

Science.gov (United States)

Polkowski, Wojciech; Sobczak, Natalia; Nowak, Rafał; Kudyba, Artur; Bruzda, Grzegorz; Polkowska, Adelajda; Homa, Marta; Turalska, Patrycja; Tangstad, Merete; Safarian, Jafar; Moosavi-Khoonsari, Elmira; Datas, Alejandro

2017-12-01

For a successful implementation of newly proposed silicon-based latent heat thermal energy storage systems, proper ceramic materials that could withstand a contact heating with molten silicon at temperatures much higher than its melting point need to be developed. In this regard, a non-wetting behavior and low reactivity are the main criteria determining the applicability of ceramic as a potential crucible material for long-term ultrahigh temperature contact with molten silicon. In this work, the wetting of hexagonal boron nitride (h-BN) by molten silicon was examined for the first time at temperatures up to 1750 °C. For this purpose, the sessile drop technique combined with contact heating procedure under static argon was used. The reactivity in Si/h-BN system under proposed conditions was evaluated by SEM/EDS examinations of the solidified couple. It was demonstrated that increase in temperature improves wetting, and consequently, non-wetting-to-wetting transition takes place at around 1650 °C. The contact angle of 90° ± 5° is maintained at temperatures up to 1750 °C. The results of structural characterization supported by a thermodynamic modeling indicate that the wetting behavior of the Si/h-BN couple during heating to and cooling from ultrahigh temperature of 1750 °C is mainly controlled by the substrate dissolution/reprecipitation mechanism.

Resonant tunnelling from nanometre-scale silicon field emission cathodes

International Nuclear Information System (INIS)

Johnson, S.; Markwitz, A.

2005-01-01

In this paper we report the field emission properties of self-assembled silicon nanostructures formed on an n-type silicon (100) substrate by electron beam annealing. The nanostructures are square based, with an average height of 8 nm and are distributed randomly over the entire substrate surface. Following conditioning, the silicon nanostructure field emission characteristics become stable and reproducible with electron emission occurring for fields as low as 3 Vμm-1. At higher fields, a superimposed on a background current well described by conventional Fowler-Nordheim theory. These current peaks are understood to result from enhanced tunnelling through resonant states formed at the substrate-nanostructure and nanostructure-vacuum interface. (author). 13 refs., 3 figs

Structural modification of silicon during the formation process of porous silicon

International Nuclear Information System (INIS)

Martin-Palma, R.J.; Pascual, L.; Landa-Canovas, A.R.; Herrero, P.; Martinez-Duart, J.M.

2005-01-01

Direct examination of porous silicon (PS) by the use of high resolution transmission electron microscopy (HRTEM) allowed us to perform a deep insight into the formation mechanisms of this material. In particular, the structure of the PS/Si interface and that of the silicon nanocrystals that compose porous silicon were analyzed in detail. Furthermore, image processing was used to study in detail the structure of PS. The mechanism of PS formation and lattice matching between the PS layer and the Si substrate is analyzed and discussed. Finally, a formation mechanism for PS based on the experimental observations is proposed

Optical substrate materials for synchrotron radiation beamlines

International Nuclear Information System (INIS)

Howells, M.R.; Paquin, R.A.

1997-06-01

The authors consider the materials choices available for making optical substrates for synchrotron radiation beam lines. They find that currently the optical surfaces can only be polished to the required finish in fused silica and other glasses, silicon, CVD silicon carbide, electroless nickel and 17-4 PH stainless steel. Substrates must therefore be made of one of these materials or of a metal that can be coated with electroless nickel. In the context of material choices for mirrors they explore the issues of dimensional stability, polishing, bending, cooling, and manufacturing strategy. They conclude that metals are best from an engineering and cost standpoint while the ceramics are best from a polishing standpoint. They then give discussions of specific materials as follows: silicon carbide, silicon, electroless nickel, Glidcop trademark, aluminum, precipitation-hardening stainless steel, mild steel, invar and superinvar. Finally they summarize conclusions and propose ideas for further research

Thin film transistors on plastic substrates with reflective coatings for radiation protection

Science.gov (United States)

Wolfe, Jesse D [Fairfield, CA; Theiss, Steven D [Woodbury, MN; Carey, Paul G [Mountain View, CA; Smith, Patrick M [San Ramon, CA; Wickbold, Paul [Walnut Creek, CA

2006-09-26

Fabrication of silicon thin film transistors (TFT) on low-temperature plastic substrates using a reflective coating so that inexpensive plastic substrates may be used in place of standard glass, quartz, and silicon wafer-based substrates. The TFT can be used in large area low cost electronics, such as flat panel displays and portable electronics such as video cameras, personal digital assistants, and cell phones.

Surface modification of silicon wafer by grafting zwitterionic polymers to improve its antifouling property

Science.gov (United States)

Sun, Yunlong; Chen, Changlin; Xu, Heng; Lei, Kun; Xu, Guanzhe; Zhao, Li; Lang, Meidong

2017-10-01

Silicon (111) wafer was modified by triethoxyvinylsilane containing double bond as an intermedium, and then P4VP (polymer 4-vinyl pyridine) brush was "grafted" onto the surface of silicon wafer containing reactive double bonds by adopting the "grafting from" way and Si-P4VP substrate (silicon wafer grafted by P4VP) was obtained. Finally, P4VP brush of Si-P4VP substrate was modified by 1,3-propanesulfonate fully to obtain P4VP-psl brush (zwitterionic polypyridinium salt) and the functional Si-P4VP-psl substrate (silicon wafer grafted by zwitterionic polypyridinium salt based on polymer 4-vinyl pyridine) was obtained successfully. The antifouling property of the silicon wafer, the Si-P4VP substrate and the Si-P4VP-psl substrate was investigated by using bovine serum albumin, mononuclear macrophages (RAW 264.7) and Escherichia coli (E. coli) ATTC25922 as model bacterium. The results showed that compared with the blank sample-silicon wafer, the Si-P4VP-psl substrate had excellent anti-adhesion ability against bovine serum albumin, cells and bacterium, due to zwitterionic P4VP-psl brush (polymer 4-vinyl pyridine salt) having special functionality like antifouling ability on biomaterial field.

Transformational silicon electronics

KAUST Repository

Rojas, Jhonathan Prieto

2014-02-25

In today\\'s traditional electronics such as in computers or in mobile phones, billions of high-performance, ultra-low-power devices are neatly integrated in extremely compact areas on rigid and brittle but low-cost bulk monocrystalline silicon (100) wafers. Ninety percent of global electronics are made up of silicon. Therefore, we have developed a generic low-cost regenerative batch fabrication process to transform such wafers full of devices into thin (5 μm), mechanically flexible, optically semitransparent silicon fabric with devices, then recycling the remaining wafer to generate multiple silicon fabric with chips and devices, ensuring low-cost and optimal utilization of the whole substrate. We show monocrystalline, amorphous, and polycrystalline silicon and silicon dioxide fabric, all from low-cost bulk silicon (100) wafers with the semiconductor industry\\'s most advanced high-κ/metal gate stack based high-performance, ultra-low-power capacitors, field effect transistors, energy harvesters, and storage to emphasize the effectiveness and versatility of this process to transform traditional electronics into flexible and semitransparent ones for multipurpose applications. © 2014 American Chemical Society.

Structural, Optical, and Vibrational Properties of ZnO Microrods Deposited on Silicon Substrate

Science.gov (United States)

Lahlouh, Bashar I.; Ikhmayies, Shadia J.; Juwhari, Hassan K.

2018-03-01

Zinc oxide (ZnO) microrod films deposited by spray pyrolysis on silicon substrate at 350 ± 5°C have been studied and evaluated, and compared with thin films deposited by electron beam to confirm the identity of the studied samples. The films were characterized using different techniques. The microrod structure was studied and confirmed by scanning electron microscopy. Fourier-transform infrared (FTIR) spectroscopy and x-ray diffraction analysis confirmed successful deposition of ZnO thin films with the expected wurtzite structure. Reflectance data showed a substantial drop across the whole studied wavelength range. The photoluminescence (PL) spectra of the studied samples showed a peak at ˜ 360 nm, representing a signature of ZnO. The shift in the PL peak position is due to defects and other species present in the films, as confirmed by FTIR and energy-dispersive x-ray spectroscopy results.

Flowmeter with silicon flow tube

NARCIS (Netherlands)

Lammerink, Theodorus S.J.; Dijkstra, Marcel; Haneveld, J.; Lötters, Joost Conrad

2009-01-01

A flowmeter comprising a system chip with a silicon substrate provided on a carrier, in an opening whereof at least one silicon flow tube is provided for transporting a medium whose flow rate is to be measured, said tube having two ends that issue via a wall of the opening into channels coated with

Orientationally ordered ridge structures of aluminum films on hydrogen terminated silicon

DEFF Research Database (Denmark)

Quaade, Ulrich; Pantleon, Karen

2006-01-01

Films of aluminum deposited onto Si(100) substrates show a surface structure of parallel ridges. On films deposited on oxidized silicon substrates the direction of the ridges is arbitrary, but on films deposited on hydrogen-terminated Si(100) the ridges are oriented parallel to the < 110 > direct......Films of aluminum deposited onto Si(100) substrates show a surface structure of parallel ridges. On films deposited on oxidized silicon substrates the direction of the ridges is arbitrary, but on films deposited on hydrogen-terminated Si(100) the ridges are oriented parallel to the ... > directions on the silicon substrate. The ridge structure appears when the film thickness is above 500 nm, and increasing the film thickness makes the structure more distinct. Anodic oxidation enhances the structure even further. X-ray diffraction indicates that grains in the film have mostly (110) facets...

Growth of Hexagonal Columnar Nanograin Structured SiC Thin Films on Silicon Substrates with Graphene–Graphitic Carbon Nanoflakes Templates from Solid Carbon Sources

Directory of Open Access Journals (Sweden)

Wanshun Zhao

2013-04-01

Full Text Available We report a new method for growing hexagonal columnar nanograin structured silicon carbide (SiC thin films on silicon substrates by using graphene–graphitic carbon nanoflakes (GGNs templates from solid carbon sources. The growth was carried out in a conventional low pressure chemical vapor deposition system (LPCVD. The GGNs are small plates with lateral sizes of around 100 nm and overlap each other, and are made up of nanosized multilayer graphene and graphitic carbon matrix (GCM. Long and straight SiC nanograins with hexagonal shapes, and with lateral sizes of around 200–400 nm are synthesized on the GGNs, which form compact SiC thin films.

Mechanics of nanowire/nanotube in-surface buckling on elastomeric substrates

Energy Technology Data Exchange (ETDEWEB)

Xiao, J; Huang, Y [Department of Mechanical Engineering, Northwestern University, Evanston, IL 60208 (United States); Ryu, S Y; Paik, U [Division of Materials Science and Engineering, Hanyang University, 17 Hangdang-dong, Sungdong-gu, Seoul 133-791 (Korea, Republic of); Hwang, K-C [Department of Engineering Mechanics, Tsinghua University, Beijing 100084 (China); Rogers, J A, E-mail: y-huang@northwestern.edu, E-mail: jrogers@uiuc.edu [Department of Materials Science and Engineering, Frederick-Seitz Materials Research Laboratory and Beckman Institute, University of Illinois at Urbana-Champaign, Illinois 61801 (United States)

2010-02-26

A continuum mechanics theory is established for the in-surface buckling of one-dimensional nanomaterials on compliant substrates, such as silicon nanowires on elastomeric substrates observed in experiments. Simple analytical expressions are obtained for the buckling wavelength, amplitude and critical buckling strain in terms of the bending and tension stiffness of the nanomaterial and the substrate elastic properties. The analysis is applied to silicon nanowires, single-walled carbon nanotubes, multi-walled carbon nanotubes, and carbon nanotube bundles. For silicon nanowires, the measured buckling wavelength gives Young's modulus to be 140 GPa, which agrees well with the prior experimental studies. It is shown that the energy for in-surface buckling is lower than that for normal (out-of-surface) buckling, and is therefore energetically favorable.

Mechanics of nanowire/nanotube in-surface buckling on elastomeric substrates

International Nuclear Information System (INIS)

Xiao, J; Huang, Y; Ryu, S Y; Paik, U; Hwang, K-C; Rogers, J A

2010-01-01

A continuum mechanics theory is established for the in-surface buckling of one-dimensional nanomaterials on compliant substrates, such as silicon nanowires on elastomeric substrates observed in experiments. Simple analytical expressions are obtained for the buckling wavelength, amplitude and critical buckling strain in terms of the bending and tension stiffness of the nanomaterial and the substrate elastic properties. The analysis is applied to silicon nanowires, single-walled carbon nanotubes, multi-walled carbon nanotubes, and carbon nanotube bundles. For silicon nanowires, the measured buckling wavelength gives Young's modulus to be 140 GPa, which agrees well with the prior experimental studies. It is shown that the energy for in-surface buckling is lower than that for normal (out-of-surface) buckling, and is therefore energetically favorable.

Study on structural properties of epitaxial silicon films on annealed double layer porous silicon

International Nuclear Information System (INIS)

Yue Zhihao; Shen Honglie; Cai Hong; Lv Hongjie; Liu Bin

2012-01-01

In this paper, epitaxial silicon films were grown on annealed double layer porous silicon by LPCVD. The evolvement of the double layer porous silicon before and after thermal annealing was investigated by scanning electron microscope. X-ray diffraction and Raman spectroscopy were used to investigate the structural properties of the epitaxial silicon thin films grown at different temperature and different pressure. The results show that the surface of the low-porosity layer becomes smooth and there are just few silicon-bridges connecting the porous layer and the substrate wafer. The qualities of the epitaxial silicon thin films become better along with increasing deposition temperature. All of the Raman peaks of silicon films with different deposition pressure are situated at 521 cm -1 under the deposition temperature of 1100 °C, and the Raman intensity of the silicon film deposited at 100 Pa is much closer to that of the monocrystalline silicon wafer. The epitaxial silicon films are all (4 0 0)-oriented and (4 0 0) peak of silicon film deposited at 100 Pa is more symmetric.

Hybrid Integrated Platforms for Silicon Photonics

Science.gov (United States)

Liang, Di; Roelkens, Gunther; Baets, Roel; Bowers, John E.

2010-01-01

A review of recent progress in hybrid integrated platforms for silicon photonics is presented. Integration of III-V semiconductors onto silicon-on-insulator substrates based on two different bonding techniques is compared, one comprising only inorganic materials, the other technique using an organic bonding agent. Issues such as bonding process and mechanism, bonding strength, uniformity, wafer surface requirement, and stress distribution are studied in detail. The application in silicon photonics to realize high-performance active and passive photonic devices on low-cost silicon wafers is discussed. Hybrid integration is believed to be a promising technology in a variety of applications of silicon photonics.

Profilometry of thin films on rough substrates by Raman spectroscopy

KAUST Repository

Ledinský, Martin

2016-12-06

Thin, light-absorbing films attenuate the Raman signal of underlying substrates. In this article, we exploit this phenomenon to develop a contactless thickness profiling method for thin films deposited on rough substrates. We demonstrate this technique by probing profiles of thin amorphous silicon stripes deposited on rough crystalline silicon surfaces, which is a structure exploited in high-efficiency silicon heterojunction solar cells. Our spatially-resolved Raman measurements enable the thickness mapping of amorphous silicon over the whole active area of test solar cells with very high precision; the thickness detection limit is well below 1 nm and the spatial resolution is down to 500 nm, limited only by the optical resolution. We also discuss the wider applicability of this technique for the characterization of thin layers prepared on Raman/photoluminescence-active substrates, as well as its use for single-layer counting in multilayer 2D materials such as graphene, MoS2 and WS2.

Profilometry of thin films on rough substrates by Raman spectroscopy

KAUST Repository

Ledinský , Martin; Paviet-Salomon, Bertrand; Vetushka, Aliaksei; Geissbü hler, Jonas; Tomasi, Andrea; Despeisse, Matthieu; De Wolf, Stefaan; Ballif  , Christophe; Fejfar, Antoní n

2016-01-01

Thin, light-absorbing films attenuate the Raman signal of underlying substrates. In this article, we exploit this phenomenon to develop a contactless thickness profiling method for thin films deposited on rough substrates. We demonstrate this technique by probing profiles of thin amorphous silicon stripes deposited on rough crystalline silicon surfaces, which is a structure exploited in high-efficiency silicon heterojunction solar cells. Our spatially-resolved Raman measurements enable the thickness mapping of amorphous silicon over the whole active area of test solar cells with very high precision; the thickness detection limit is well below 1 nm and the spatial resolution is down to 500 nm, limited only by the optical resolution. We also discuss the wider applicability of this technique for the characterization of thin layers prepared on Raman/photoluminescence-active substrates, as well as its use for single-layer counting in multilayer 2D materials such as graphene, MoS2 and WS2.

Effect of Radiation on Silicon and Borosilicate Glass

National Research Council Canada - National Science Library

Allred, Clark

2003-01-01

.... These two glasses are commonly used as substrates for silicon microelectromechanical (MEMS) devices, and radiation-induced compaction in a substrate can have deleterious effects on device performance...

Silicon integrated circuits part A : supplement 2

CERN Document Server

Kahng, Dawon

1981-01-01

Applied Solid State Science, Supplement 2: Silicon Integrated Circuits, Part A focuses on MOS device physics. This book is divided into three chapters-physics of the MOS transistor; nonvolatile memories; and properties of silicon-on-sapphire substrates devices, and integrated circuits. The topics covered include the short channel effects, MOSFET structures, floating gate devices, technology for nonvolatile semiconductor memories, sapphire substrates, and SOS integrated circuits and systems. The MOS capacitor, MIOS devices, and SOS process and device technology are also deliberated. This public

Substrate optimization for integrated circuit antennas

OpenAIRE

Alexopoulos, N. G.; Katehi, P. B.; Rutledge, D. B.

1982-01-01

Imaging systems in microwaves, millimeter and submillimeter wave applications employ printed circuit antenna elements. The effect of substrate properties is analyzed in this paper by both reciprocity theorem as well as integral equation approach for infinitesimally short as well as finite length dipole and slot elements. Radiation efficiency and substrate surface wave guidance is studied for practical substrate materials as GaAs, Silicon, Quartz and Duroid.

Growth, microstructure, and field-emission properties of synthesized diamond film on adamantane-coated silicon substrate by microwave plasma chemical vapor deposition

International Nuclear Information System (INIS)

Tiwari, Rajanish N.; Chang Li

2010-01-01

Diamond nucleation on unscratched Si surface is great importance for its growth, and detailed understanding of this process is therefore desired for many applications. The pretreatment of the substrate surface may influence the initial growth period. In this study, diamond films have been synthesized on adamantane-coated crystalline silicon {100} substrate by microwave plasma chemical vapor deposition from a gaseous mixture of methane and hydrogen gases without the application of a bias voltage to the substrates. Prior to adamantane coating, the Si substrates were not pretreated such as abraded/scratched. The substrate temperature was ∼530 deg. C during diamond deposition. The deposited films are characterized by scanning electron microscopy, Raman spectrometry, x-ray diffraction, and x-ray photoelectron spectroscopy. These measurements provide definitive evidence for high-crystalline quality diamond film, which is synthesized on a SiC rather than clean Si substrate. Characterization through atomic force microscope allows establishing fine quality criteria of the film according to the grain size of nanodiamond along with SiC. The diamond films exhibit a low-threshold (55 V/μm) and high current-density (1.6 mA/cm 2 ) field-emission (FE) display. The possible mechanism of formation of diamond films and their FE properties have been demonstrated.

Movable MEMS Devices on Flexible Silicon

KAUST Repository

Ahmed, Sally

2013-05-05

Flexible electronics have gained great attention recently. Applications such as flexible displays, artificial skin and health monitoring devices are a few examples of this technology. Looking closely at the components of these devices, although MEMS actuators and sensors can play critical role to extend the application areas of flexible electronics, fabricating movable MEMS devices on flexible substrates is highly challenging. Therefore, this thesis reports a process for fabricating free standing and movable MEMS devices on flexible silicon substrates; MEMS flexure thermal actuators have been fabricated to illustrate the viability of the process. Flexure thermal actuators consist of two arms: a thin hot arm and a wide cold arm separated by a small air gap; the arms are anchored to the substrate from one end and connected to each other from the other end. The actuator design has been modified by adding etch holes in the anchors to suit the process of releasing a thin layer of silicon from the bulk silicon substrate. Selecting materials that are compatible with the release process was challenging. Moreover, difficulties were faced in the fabrication process development; for example, the structural layer of the devices was partially etched during silicon release although it was protected by aluminum oxide which is not attacked by the releasing gas . Furthermore, the thin arm of the thermal actuator was thinned during the fabrication process but optimizing the patterning and etching steps of the structural layer successfully solved this problem. Simulation was carried out to compare the performance of the original and the modified designs for the thermal actuators and to study stress and temperature distribution across a device. A fabricated thermal actuator with a 250 μm long hot arm and a 225 μm long cold arm separated by a 3 μm gap produced a deflection of 3 μm before silicon release, however, the fabrication process must be optimized to obtain fully functioning

Graphitized silicon carbide microbeams: wafer-level, self-aligned graphene on silicon wafers

International Nuclear Information System (INIS)

Cunning, Benjamin V; Ahmed, Mohsin; Mishra, Neeraj; Kermany, Atieh Ranjbar; Iacopi, Francesca; Wood, Barry

2014-01-01

Currently proven methods that are used to obtain devices with high-quality graphene on silicon wafers involve the transfer of graphene flakes from a growth substrate, resulting in fundamental limitations for large-scale device fabrication. Moreover, the complex three-dimensional structures of interest for microelectromechanical and nanoelectromechanical systems are hardly compatible with such transfer processes. Here, we introduce a methodology for obtaining thousands of microbeams, made of graphitized silicon carbide on silicon, through a site-selective and wafer-scale approach. A Ni-Cu alloy catalyst mediates a self-aligned graphitization on prepatterned SiC microstructures at a temperature that is compatible with silicon technologies. The graphene nanocoating leads to a dramatically enhanced electrical conductivity, which elevates this approach to an ideal method for the replacement of conductive metal films in silicon carbide-based MEMS and NEMS devices. (paper)

Advancements in n-type base crystalline silicon solar cells and their emergence in the photovoltaic industry.

Science.gov (United States)

ur Rehman, Atteq; Lee, Soo Hong

2013-01-01

The p-type crystalline silicon wafers have occupied most of the solar cell market today. However, modules made with n-type crystalline silicon wafers are actually the most efficient modules up to date. This is because the material properties offered by n-type crystalline silicon substrates are suitable for higher efficiencies. Properties such as the absence of boron-oxygen related defects and a greater tolerance to key metal impurities by n-type crystalline silicon substrates are major factors that underline the efficiency of n-type crystalline silicon wafer modules. The bi-facial design of n-type cells with good rear-side electronic and optical properties on an industrial scale can be shaped as well. Furthermore, the development in the industrialization of solar cell designs based on n-type crystalline silicon substrates also highlights its boost in the contributions to the photovoltaic industry. In this paper, a review of various solar cell structures that can be realized on n-type crystalline silicon substrates will be given. Moreover, the current standing of solar cell technology based on n-type substrates and its contribution in photovoltaic industry will also be discussed.

Direct Growth of Graphene on Silicon by Metal-Free Chemical Vapor Deposition

Science.gov (United States)

Tai, Lixuan; Zhu, Daming; Liu, Xing; Yang, Tieying; Wang, Lei; Wang, Rui; Jiang, Sheng; Chen, Zhenhua; Xu, Zhongmin; Li, Xiaolong

2018-06-01

The metal-free synthesis of graphene on single-crystal silicon substrates, the most common commercial semiconductor, is of paramount significance for many technological applications. In this work, we report the growth of graphene directly on an upside-down placed, single-crystal silicon substrate using metal-free, ambient-pressure chemical vapor deposition. By controlling the growth temperature, in-plane propagation, edge-propagation, and core-propagation, the process of graphene growth on silicon can be identified. This process produces atomically flat monolayer or bilayer graphene domains, concave bilayer graphene domains, and bulging few-layer graphene domains. This work would be a significant step toward the synthesis of large-area and layer-controlled, high-quality graphene on single-crystal silicon substrates. [Figure not available: see fulltext.

Simulation of atomistic processes during silicon oxidation

OpenAIRE

Bongiorno, Angelo

2003-01-01

Silicon dioxide (SiO2) films grown on silicon monocrystal (Si) substrates form the gate oxides in current Si-based microelectronics devices. The understanding at the atomic scale of both the silicon oxidation process and the properties of the Si(100)-SiO2 interface is of significant importance in state-of-the-art silicon microelectronics manufacturing. These two topics are intimately coupled and are both addressed in this theoretical investigation mainly through first-principles calculations....

Dewetting of thin polymer film on rough substrate: II. Experiment

International Nuclear Information System (INIS)

Volodin, Pylyp; Kondyurin, Alexey

2008-01-01

The theory of the dewetting process developed for a model of substrate-film interaction forces was examined by an experimental investigation of the dewetting process of thin polystyrene (PS) films on chemically etched silicon substrates. In the dependence on PS films thickness and silicon roughness, various situations of dewetting were observed as follows: (i) if the wavelength of the substrate roughness is much larger than the critical spinodal wavelength of a film, then spinodal dewetting of the film is observed; (ii) if the wavelength of the substrate roughness is smaller than the critical wavelength of the film and the substrate roughness is larger in comparison with film thickness, then the dewetting due to substrate roughness is observed and the dewetted film patterns repeat the rough substrate structure; (iii) if the wavelength of the substrate roughness is smaller than the critical wavelength of the film and the substrate roughness is small in comparison with the film thickness, then spinodal dewetting proceeds

Superparamagnetic iron oxide nanoparticle attachment on array of micro test tubes and microbeakers formed on p-type silicon substrate for biosensor applications

Directory of Open Access Journals (Sweden)

Raja Sufi

2011-01-01

Full Text Available Abstract A uniformly distributed array of micro test tubes and microbeakers is formed on a p-type silicon substrate with tunable cross-section and distance of separation by anodic etching of the silicon wafer in N, N-dimethylformamide and hydrofluoric acid, which essentially leads to the formation of macroporous silicon templates. A reasonable control over the dimensions of the structures could be achieved by tailoring the formation parameters, primarily the wafer resistivity. For a micro test tube, the cross-section (i.e., the pore size as well as the distance of separation between two adjacent test tubes (i.e., inter-pore distance is typically approximately 1 μm, whereas, for a microbeaker the pore size exceeds 1.5 μm and the inter-pore distance could be less than 100 nm. We successfully synthesized superparamagnetic iron oxide nanoparticles (SPIONs, with average particle size approximately 20 nm and attached them on the porous silicon chip surface as well as on the pore walls. Such SPION-coated arrays of micro test tubes and microbeakers are potential candidates for biosensors because of the biocompatibility of both silicon and SPIONs. As acquisition of data via microarray is an essential attribute of high throughput bio-sensing, the proposed nanostructured array may be a promising step in this direction.

Substrate Effect on Plasma Clean Efficiency in Plasma Enhanced Chemical Vapor Deposition System

Directory of Open Access Journals (Sweden)

Shiu-Ko JangJian

2007-01-01

Full Text Available The plasma clean in a plasma-enhanced chemical vapor deposition (PECVD system plays an important role to ensure the same chamber condition after numerous film depositions. The periodic and applicable plasma clean in deposition chamber also increases wafer yield due to less defect produced during the deposition process. In this study, the plasma clean rate (PCR of silicon oxide is investigated after the silicon nitride deposited on Cu and silicon oxide substrates by remote plasma system (RPS, respectively. The experimental results show that the PCR drastically decreases with Cu substrate compared to that with silicon oxide substrate after numerous silicon nitride depositions. To understand the substrate effect on PCR, the surface element analysis and bonding configuration are executed by X-ray photoelectron spectroscopy (XPS. The high resolution inductively coupled plasma mass spectrometer (HR-ICP-MS is used to analyze microelement of metal ions on the surface of shower head in the PECVD chamber. According to Cu substrate, the results show that micro Cu ion and the CuOx bonding can be detected on the surface of shower head. The Cu ion contamination might grab the fluorine radicals produced by NF3 ddissociation in the RPS and that induces the drastic decrease on PCR.

Investigation of microstructure and morphology for the Ge on porous silicon/Si substrate hetero-structure obtained by molecular beam epitaxy

International Nuclear Information System (INIS)

Gouder, S.; Mahamdi, R.; Aouassa, M.; Escoubas, S.; Favre, L.; Ronda, A.; Berbezier, I.

2014-01-01

Thick porous silicon (PS) buffer layers are used as sacrificial layers to epitaxially grow planar and fully relaxed Ge membranes. The single crystal Ge layers have been deposited by molecular beam epitaxy (MBE) on PS substrate. During deposition, the pore network of PS layers has been filled with Ge. We investigate the structure and morphology of PS as fabricated and after annealing at various temperatures. We show that the PS crystalline lattice is distorted and expanded in the direction perpendicular to the substrate plane due to the presence of chemisorbed –OH. An annealing at high temperature (> 500 °C), greatly changes the PS morphology and structure. This change is marked by an increase of the pore diameter while the lattice parameter becomes tensily strained in the plane (compressed in the direction perpendicular). The morphology and structure of Ge layers are investigated by transmission electron microscopy, high resolution X-ray diffraction and atomic force microscopy as a function of the deposition temperature and deposited thickness. The results show that the surface roughness, level of relaxation and Si-Ge intermixing (Ge content) depend on the growth temperature and deposited thickness. Two sub-layers are distinguished: the layer incorporated inside the PS pores (high level of intermixing) and the layer on top of the PS surface (low level of intermixing). When deposited at temperature > 500 °C, the Ge layers are fully relaxed with a top Si 1−x Ge x layer x = 0.74 and a very flat surface. Such layer can serve as fully relaxed ultra-thin SiGe pseudo-substrate with high Ge content. The epitaxy of Ge on sacrificial soft PS pseudo-substrate in the experimental conditions described here provides an easy way to fabricate fully relaxed SiGe pseudo-substrates. Moreover, Ge thin films epitaxially deposited by MBE on PS could be used as relaxed pseudo-substrate in conventional microelectronic technology. - Highlights: • We have developed a rapid and low

Silicon wafers for integrated circuit process

OpenAIRE

Leroy , B.

1986-01-01

Silicon as a substrate material will continue to dominate the market of integrated circuits for many years. We first review how crystal pulling procedures impact the quality of silicon. We then investigate how thermal treatments affect the behaviour of oxygen and carbon, and how, as a result, the quality of silicon wafers evolves. Gettering techniques are then presented. We conclude by detailing the requirements that wafers must satisfy at the incoming inspection.

Implantation of oxygen ions for the realization of SOS (silicon on insulator) structures: SIMOX

International Nuclear Information System (INIS)

Margail, J.

1987-03-01

Highdose oxygen implantation is becoming a serious candidate for SOI (silicon on insulator) structure realization. The fabrication condition study of these substrates allowed to show up the implantation and annealing parameter importance for microstructure, and particularly for crystal quality of silicon films. It has been shown that the use of high temperature annealings leads to high quality substrates: monocrystal silicon film without any precipitate, at the card scale; Si/Si O 2 interface formation. After annealing at 1340 O C, Hall mobilities have been measured in silicon film, and its residual doping is very low. First characteristics and performance of submicron CMOS circuits prooves the electric quality of these substrates [fr

Doping of silicon by laser-induced diffusion

International Nuclear Information System (INIS)

Pretorius, R.; Allie, M.S.

1986-01-01

This report gives information on the doping of silicon by laser-induced diffusion, modelling and heat-flow calculation, doping from evaporated layers and silicon self-diffusion during pulsed laser irradiation. In order to tailor dopant profiles accurately a knowledge of the heat flow and the melt depths attained as a function of laser energy and material type is crucial. The heat flow calculations described can be used in conjuntion with most diffusion equations in order to predict the redistribution of the deposited dopant which occurs as a result of liquid phase diffusion during the melting period. Doping of Si was carried out by evaporating this films of Sb, In and Bi 10 to 300 A thick, onto the substrates. During pulsed laser irradiation the dopant film and underlying silicon substrate is melted and the dopant incorporated into the crystal lattice during recrystallization. Radioactive 31 Si(T1/2=2,62h) was used as a tracer to measure the self-diffusion of silicon in silicon during pulsed laser (pulsewidth = 30ns, wavelength = 694nm) irradiation

Uniformity and passivation research of Al2O3 film on silicon substrate prepared by plasma-enhanced atom layer deposition.

Science.gov (United States)

Jia, Endong; Zhou, Chunlan; Wang, Wenjing

2015-01-01

Plasma-enhanced atom layer deposition (PEALD) can deposit denser films than those prepared by thermal ALD. But the improvement on thickness uniformity and the decrease of defect density of the films deposited by PEALD need further research. A PEALD process from trimethyl-aluminum (TMA) and oxygen plasma was investigated to study the influence of the conditions with different plasma powers and deposition temperatures on uniformity and growth rate. The thickness and refractive index of films were measured by ellipsometry, and the passivation effect of alumina on n-type silicon before and after annealing was measured by microwave photoconductivity decay method. Also, the effects of deposition temperature and annealing temperature on effective minority carrier lifetime were investigated. Capacitance-voltage and conductance-voltage measurements were used to investigate the interface defect density of state (D it) of Al2O3/Si. Finally, Al diffusion P(+) emitter on n-type silicon was passivated by PEALD Al2O3 films. The conclusion is that the condition of lower substrate temperature accelerates the growth of films and that the condition of lower plasma power controls the films' uniformity. The annealing temperature is higher for samples prepared at lower substrate temperature in order to get the better surface passivation effects. Heavier doping concentration of Al increased passivation quality after annealing by the effective minority carrier lifetime up to 100 μs.

Thin film silicon by a microwave plasma deposition technique: Growth and devices, and, interface effects in amorphous silicon/crystalline silicon solar cells

Science.gov (United States)

Jagannathan, Basanth

Thin film silicon (Si) was deposited by a microwave plasma CVD technique, employing double dilution of silane, for the growth of low hydrogen content Si films with a controllable microstructure on amorphous substrates at low temperatures (prepared by this technique. Such films showed a dark conductivity ˜10sp{-6} S/cm, with a conduction activation energy of 0.49 eV. Film growth and properties have been compared for deposition in Ar and He carrier systems and growth models have been proposed. Low temperature junction formation by undoped thin film silicon was examined through a thin film silicon/p-type crystalline silicon heterojunctions. The thin film silicon layers were deposited by rf glow discharge, dc magnetron sputtering and microwave plasma CVD. The hetero-interface was identified by current transport analysis and high frequency capacitance methods as the key parameter controlling the photovoltaic (PV) response. The effect of the interface on the device properties (PV, junction, and carrier transport) was examined with respect to modifications created by chemical treatment, type of plasma species, their energy and film microstructure interacting with the substrate. Thermally stimulated capacitance was used to determine the interfacial trap parameters. Plasma deposition of thin film silicon on chemically clean c-Si created electron trapping sites while hole traps were seen when a thin oxide was present at the interface. Under optimized conditions, a 10.6% efficient cell (11.5% with SiOsb2 A/R) with an open circuit voltage of 0.55 volts and a short circuit current density of 30 mA/cmsp2 was fabricated.

Direct growth of vertically aligned carbon nanotubes on silicon substrate by spray pyrolysis of Glycine max oil

Directory of Open Access Journals (Sweden)

K. T. Karthikeyan

2017-11-01

Full Text Available Vertically aligned carbon nanotubes have been synthesized by spray pyrolysis from Glycine max oil on silicon substrate using ferrocene as catalyst at 650 °C. Glycine max oil, a plant-based hydrocarbon precursor was used as a source of carbon and argon as a carrier gas. The as-grown vertically aligned carbon nanotubes were characterized by scanning electron microscopy, high-resolution transmission electron microscopy, X-ray diffraction, thermogravimetric analysis, and Raman spectroscopy. Scanning electron microscopic images reveal that the dense bundles of aligned carbon nanotubes. High resolution transmission electron microscopy and Raman spectroscopy observations indicate that as-grown aligned carbon nanotubes are well graphitized.

Hybrid Integrated Platforms for Silicon Photonics

Directory of Open Access Journals (Sweden)

John E. Bowers

2010-03-01

Full Text Available A review of recent progress in hybrid integrated platforms for silicon photonics is presented. Integration of III-V semiconductors onto silicon-on-insulator substrates based on two different bonding techniques is compared, one comprising only inorganic materials, the other technique using an organic bonding agent. Issues such as bonding process and mechanism, bonding strength, uniformity, wafer surface requirement, and stress distribution are studied in detail. The application in silicon photonics to realize high-performance active and passive photonic devices on low-cost silicon wafers is discussed. Hybrid integration is believed to be a promising technology in a variety of applications of silicon photonics.

Enhanced piezoelectric properties of (110)-oriented PbZr1−xTixO3 epitaxial thin films on silicon substrates at shifted morphotropic phase boundary

NARCIS (Netherlands)

Wan, X.; Houwman, Evert Pieter; Steenwelle, Ruud Johannes Antonius; van Schaijk, R.; Nguyen, Duc Minh; Dekkers, Jan M.; Rijnders, Augustinus J.H.M.

2014-01-01

Piezoelectrical, ferroelectrical, and structural properties of epitaxial pseudocubic (110)pc oriented 500 nm thick PbZr1−xTixO3 thin films, prepared by pulsed laser deposition on (001) silicon substrates, were measured as a function of composition. The dependence of the measurement data on the Ti

Fabrication of open-top microchannel plate using deep X-ray exposure mask made with silicon on insulator substrate

CERN Document Server

Fujimura, T; Etoh, S I; Hattori, R; Kuroki, Y; Chang, S S

2003-01-01

We propose a high-aspect-ratio open-top microchannel plate structure. This type of microchannel plate has many advantages in electrophoresis. The plate was fabricated by deep X-ray lithography using synchrotron radiation (SR) light and the chemical wet etching process. A deep X-ray exposure mask was fabricated with a silicon on insulator (SOI) substrate. The patterned Si microstructure was micromachined into a thin Si membrane and a thick Au X-ray absorber was embedded in it by electroplating. A plastic material, polymethylmethacrylate (PMMA) was used for the plate substrate. For reduction of the exposure time and high-aspect-ratio fast wet development, the fabrication condition was optimized with respect to not the exposure dose but to the PMMA mean molecular weight (M.W.) changing after deep X-ray exposure as measured by gel permeation chromatography (GPC). Decrement of the PMMA M.W. and increment of the wet developer temperature accelerated the etching rate. Under optimized fabrication conditions, a microc...

Lateral epitaxial overgrowth of GaN on a patterned GaN-on-silicon substrate by molecular beam epitaxy

International Nuclear Information System (INIS)

Wang, Yongjin; Hu, Fangren; Hane, Kazuhiro

2011-01-01

We report here the lateral epitaxial overgrowth (LEO) of GaN on a patterned GaN-on-silicon substrate by molecular beam epitaxy (MBE) growth with radio frequency nitrogen plasma as a gas source. Two kinds of GaN nanostructures are defined by electron beam lithography and realized on a GaN substrate by fast atom beam etching. The epitaxial growth of GaN by MBE is performed on the prepared GaN template, and the selective growth of GaN takes place with the assistance of GaN nanostructures. The LEO of GaN produces novel GaN epitaxial structures which are dependent on the shape and the size of the processed GaN nanostructures. Periodic GaN hexagonal pyramids are generated inside the air holes, and GaN epitaxial strips with triangular section are formed in the grating region. This work provides a promising way for producing novel GaN-based devices by the LEO of GaN using the MBE technique

Low cost silicon-on-ceramic photovoltaic solar cells

Science.gov (United States)

Koepke, B. G.; Heaps, J. D.; Grung, B. L.; Zook, J. D.; Sibold, J. D.; Leipold, M. H.

1980-01-01

A technique has been developed for coating low-cost mullite-based refractory substrates with thin layers of solar cell quality silicon. The technique involves first carbonizing one surface of the ceramic and then contacting it with molten silicon. The silicon wets the carbonized surface and, under the proper thermal conditions, solidifies as a large-grained sheet. Solar cells produced from this composite silicon-on-ceramic material have exhibited total area conversion efficiencies of ten percent.

Crossflow type silicon microchannel substrate monodispersion oil-in-water emulsion manufacture; Kurosufuro gata shirikon maikuro chaneru kiban wo mochiita tanbunsan suchuyu emarushon no sakusei

Energy Technology Data Exchange (ETDEWEB)

Kawakatsu, Takahiro [Tohoku University, Miyagi (Japan). Graduate School; Komori, Hideai; Najima, Mitsutashi; Kikuchi, Yuji; Yonemoto, Toshikuni

1999-05-05

The new technique, which continuously produced the monodispersion oil-in-water (0/W) emulsion using the crossflow type silicon microchannel substrate, was developed. On the silicon monocrystal substrate, the watercourse as the liquid of the continuous phase flowed was produced, and the column of the equal slit of the size in both walls of the watercourse was precisely processed. By closing the upper part in the slit by the clamp of the flat glass board in the microchannel substrate, the microchannel column was formed. Through the microchannel, the oil droplet in which the size was even was formed by sending out the oil (triolein) in the water (0.3wt% sodium lauryl sulfate aqueous solution) of continuous phase which is flowing in respect of the watercourse. The size of the oil droplet is greatly dependent on the structure of the microchannel regulated by microchannel width, microchannel height and terrace length (the even part of which the microchannel exit was equipped). Monodispersion emulsion of 16,20 and 48 {mu}m at the average droplet diameter was formed by using microchannel substrate of the three types of which the structure differs. Droplet diameter decreased, when the substrate which formed large droplet of 48 {mu}m in which the water current quantity is 1.4x10{sup -2}mLmin{sup -1} was used, when the flow rate increased. However, there was no a flow rate at droplet diameter, even if it was made to change from 1.4x10{sup -2} to 2.4mLmin{sup -1}, 16 {mu}m 20 {mu}m small change. In all cases, the droplet size distribution was narrow, and the geometry standard deviation was under 1.03. (translated by NEDO)

Interfacial Characteristics of TiN Coatings on SUS304 and Silicon Wafer Substrates with Pulsed Laser Thermal Shock

International Nuclear Information System (INIS)

Seo, Nokun; Jeon, Seol; Choi, Youngkue; Shin, Hyun-Gyoo; Lee, Heesoo; Jeon, Min-Seok

2014-01-01

TiN coatings prepared on different substrates that had different coefficients of thermal expansion were subjected to pulsed laser thermal shock and observed by using FIB milling to compare the deterioration behaviors. TiN coating on SUS304, which had a larger CTE (⁓17.3 × 10 - 6 /℃) than the coating was degraded with pores and cracks on the surface and showed significant spalling of the coating layer over a certain laser pulses. TiN coating on silicon wafer with a smaller CTE value, ⁓4.2 × 10‒6 /℃, than the coating exhibited less degradation of the coating layer at the same ablation condition. Cracks propagated at the interface were observed in the coating on the silicon wafer, which induced a compressive stress to the coating. The coating on the SUS304 showed less interface cracks while the tensile stress was applied to the coating. Delamination of the coating layer related to the intercolumnar cracks at the interface was observed in both coatings through bright-field TEM analysis.

Optical modelling of thin-film silicon solar cells deposited on textured substrates

International Nuclear Information System (INIS)

Krc, J.; Zeman, M.; Smole, F.; Topic, M.

2004-01-01

Optical modelling is used to investigate effects of light scattering in amorphous silicon and microcrystalline silicon solar cells. The role of enhanced haze parameter and different angular distribution function of scattered light is analyzed. Results of optical simulation show that enhanced haze parameter compared to that of Asahi U-type SnO 2 :F does not improve external quantum efficiency and short-circuit current density of amorphous silicon solar cell significantly, whereas for microcrystalline silicon solar cell the improvement is larger. Angular distribution function affects the external quantum efficiency and the short-circuit current density significantly

Reprogramming hMSCs morphology with silicon/porous silicon geometric micro-patterns.

Science.gov (United States)

Ynsa, M D; Dang, Z Y; Manso-Silvan, M; Song, J; Azimi, S; Wu, J F; Liang, H D; Torres-Costa, V; Punzon-Quijorna, E; Breese, M B H; Garcia-Ruiz, J P

2014-04-01

Geometric micro-patterned surfaces of silicon combined with porous silicon (Si/PSi) have been manufactured to study the behaviour of human Mesenchymal Stem Cells (hMSCs). These micro-patterns consist of regular silicon hexagons surrounded by spaced columns of silicon equilateral triangles separated by PSi. The results show that, at an early culture stage, the hMSCs resemble quiescent cells on the central hexagons with centered nuclei and actin/β-catenin and a microtubules network denoting cell adhesion. After 2 days, hMSCs adapted their morphology and cytoskeleton proteins from cell-cell dominant interactions at the center of the hexagonal surface. This was followed by an intermediate zone with some external actin fibres/β-catenin interactions and an outer zone where the dominant interactions are cell-silicon. Cells move into silicon columns to divide, migrate and communicate. Furthermore, results show that Runx2 and vitamin D receptors, both specific transcription factors for skeleton-derived cells, are expressed in cells grown on micropatterned silicon under all observed circumstances. On the other hand, non-phenotypic alterations are under cell growth and migration on Si/PSi substrates. The former consideration strongly supports the use of micro-patterned silicon surfaces to address pending questions about the mechanisms of human bone biogenesis/pathogenesis and the study of bone scaffolds.

Thin film silicon on silicon nitride for radiation hardened dielectrically isolated MISFET's

International Nuclear Information System (INIS)

Neamen, D.; Shedd, W.; Buchanan, B.

1975-01-01

The permanent ionizing radiation effects resulting from charge trapping in a silicon nitride isolation dielectric have been determined for a total ionizing dose up to 10 7 rads (Si). Junction FET's, whose active channel region is directly adjacent to the silicon-silicon nitride interface, were used to measure the effects of the radiation induced charge trapping in the Si 3 N 4 isolation dielectric. The JFET saturation current and channel conductance versus junction gate voltage and substrate voltage were characterized as a function of the total ionizing radiation dose. The experimental results on the Si 3 N 4 are compared to results on similar devices with SiO 2 dielectric isolation. The ramifications of using the silicon nitride for fabricating radiation hardened dielectrically isolated MIS devices are discussed

Enhanced electrical and magnetic properties in La0.7Sr0.3MnO3 thin films deposited on CaTiO3-buffered silicon substrates

Directory of Open Access Journals (Sweden)

C. Adamo

2015-06-01

Full Text Available We investigate the suitability of an epitaxial CaTiO3 buffer layer deposited onto (100 Si by reactive molecular-beam epitaxy (MBE for the epitaxial integration of the colossal magnetoresistive material La0.7Sr0.3MnO3 with silicon. The magnetic and electrical properties of La0.7Sr0.3MnO3 films deposited by MBE on CaTiO3-buffered silicon (CaTiO3/Si are compared with those deposited on SrTiO3-buffered silicon (SrTiO3/Si. In addition to possessing a higher Curie temperature and a higher metal-to-insulator transition temperature, the electrical resistivity and 1/f noise level at 300 K are reduced by a factor of two in the heterostructure with the CaTiO3 buffer layer. These results are relevant to device applications of La0.7Sr0.3MnO3 thin films on silicon substrates.

Silicon-integrated thin-film structure for electro-optic applications

Science.gov (United States)

McKee, Rodney A.; Walker, Frederick Joseph

2000-01-01

A crystalline thin-film structure suited for use in any of an number of electro-optic applications, such as a phase modulator or a component of an interferometer, includes a semiconductor substrate of silicon and a ferroelectric, optically-clear thin film of the perovskite BaTiO.sub.3 overlying the surface of the silicon substrate. The BaTiO.sub.3 thin film is characterized in that substantially all of the dipole moments associated with the ferroelectric film are arranged substantially parallel to the surface of the substrate to enhance the electro-optic qualities of the film.

Conformity and structure of titanium oxide films grown by atomic layer deposition on silicon substrates

Energy Technology Data Exchange (ETDEWEB)

Jogi, Indrek [University of Tartu, Institute of Experimental Physics and Technology, Taehe 4, 51010, Tartu (Estonia)], E-mail: indrek.jogi@ut.ee; Paers, Martti; Aarik, Jaan; Aidla, Aleks [University of Tartu, Institute of Physics, Riia 142, 51014, Tartu (Estonia); Laan, Matti [University of Tartu, Institute of Experimental Physics and Technology, Taehe 4, 51010, Tartu (Estonia); Sundqvist, Jonas; Oberbeck, Lars; Heitmann, Johannes [Qimonda Dresden GmbH and Co. OHG, Koenigsbruecker Strasse 180, 01099, Dresden (Germany); Kukli, Kaupo [University of Tartu, Institute of Experimental Physics and Technology, Taehe 4, 51010, Tartu (Estonia)

2008-06-02

Conformity and phase structure of atomic layer deposited TiO{sub 2} thin films grown on silicon substrates were studied. The films were grown using TiCl{sub 4} and Ti(OC{sub 2}H{sub 5}){sub 4} as titanium precursors in the temperature range from 125 to 500 {sup o}C. In all cases perfect conformal growth was achieved on patterned substrates with elliptical holes of 7.5 {mu}m depth and aspect ratio of about 1:40. Conformal growth was achieved with process parameters similar to those optimized for the growth on planar wafers. The dominant crystalline phase in the as-grown films was anatase, with some contribution from rutile at relatively higher temperatures. Annealing in the oxygen ambient resulted in (re)crystallization whereas the effect of annealing depended markedly on the precursors used in the deposition process. Compared to films grown from TiCl{sub 4}, the films grown from Ti(OC{sub 2}H{sub 5}){sub 4} were transformed into rutile in somewhat greater extent, whereas in terms of step coverage the films grown from Ti(OC{sub 2}H{sub 5}){sub 4} remained somewhat inferior compared to the films grown from TiCl{sub 4}.

Silicon transport in sputter-deposited tantalum layers grown under ion bombardment

International Nuclear Information System (INIS)

Gallais, P.; Hantzpergue, J.J.; Remy, J.C.; Roptin, D.

1988-01-01

Tantalum was sputter deposited on (111) Si substrate under low-energy ion bombardment in order to study the effects of the ion energy on the silicon transport into the Ta layer. The Si substrate was heated up to 500 0 C during growth. For ion energies up to 180 eV silicon is not transported into tantalum and the growth temperature has no effect. An ion bombardment energy of 280 eV enhances the transport of silicon throughout the tantalum layer. Growth temperatures up to 300 0 C have no effect on the silicon transport which is mainly enhanced by the ion bombardment. For growth temperatures between 300 and 500 0 C, the silicon transport is also enhanced by the thermal diffusion. The experimental depth distribution of silicon is similar to the theoretical depth distribution calculated for the case of an interdiffusion. The ion-enhanced process of silicon transport is characterized by an activation energy of 0.4 eV. Silicon into the layers as-grown at 500 0 C is in both states, amorphous silicide and microcrystalline cubic silicon

Fiscal 2000 achievement report. Development of energy use rationalization-oriented silicon manufacturing process (Development of silicon substrate manufacturing technology for high-quality solar cell); 2000 nendo shin energy sangyo gijutsu sogo kaihatsu kiko kyodo kenkyu gyomu seika hokokusho. Energy shiyo gorika silicon seizo process kaihatsu (Kohinshitsu taiyodenchiyou silicon kiban seizo gijutsu no kaihatsu)

Energy Technology Data Exchange (ETDEWEB)

NONE

2001-03-01

Research and development was conducted for enhancing productivity and energy conservation by rendering continuous and automatic the electromagnetic casting process for manufacturing polycrystalline silicon substrates for solar cells. In the manufacture of ingots for substrates by continuous electromagnetic casting, the chuck type system for feeding power to the melt plasma was replaced by a roller type system, and the power feeding position was moved to the high temperature region. Also, an on-line ingot slicing technique was established. In the manufacture of substrates at a slicing rate of 300 {mu}m/minute, productivity of 115,000 wafers/month, yield of 98%, and thickness tolerance of 30 {mu}m were achieved. A high-speed cleaning technique was developed using a jet stream, by which the cleaning time was reduced to 5 minutes and the slurry recovery rate was elevated to 95%. Based on these, substrate-related costs in the case of 100 MW/year production was calculated, which resulted in a cost of 98.8 yen/wafer (target: 103.3 yen/wafer) for manufacturing 15 cm square substrates from ingots and in a 15 cm square substrate slicing and cleaning cost of 135.1 yen/wafer (target: 135.4 yen/wafer). (NEDO)

Photonic and Plasmonic Guided Modes in Graphene-Silicon Photonic Crystals

DEFF Research Database (Denmark)

Gu, Tingyi; Andryieuski, Andrei; Hao, Yufeng

2015-01-01

We report the results of systematic studies of plasmonic and photonic guided modes in large-area single-layer graphene integrated into a nanostructured silicon substrate. The interaction of light with graphene and substrate photonic crystals can be classified in distinct regimes depending......, filters, sensors, and photodetectors utilizing silicon photonic platforms....... on the relation of the photonic crystal lattice constant and the relevant modal wavelengths, that is, plasmonic, photonic, and free-space. By optimizing the design of the substrate, these resonant modes can increase the absorption of graphene in the infrared, facilitating enhanced performance of modulators...

Formation of microchannels from low-temperature plasma-deposited silicon oxynitride

Science.gov (United States)

Matzke, Carolyn M.; Ashby, Carol I. H.; Bridges, Monica M.; Manginell, Ronald P.

2000-01-01

A process for forming one or more fluid microchannels on a substrate is disclosed that is compatible with the formation of integrated circuitry on the substrate. The microchannels can be formed below an upper surface of the substrate, above the upper surface, or both. The microchannels are formed by depositing a covering layer of silicon oxynitride over a mold formed of a sacrificial material such as photoresist which can later be removed. The silicon oxynitride is deposited at a low temperature (.ltoreq.100.degree. C.) and preferably near room temperature using a high-density plasma (e.g. an electron-cyclotron resonance plasma or an inductively-coupled plasma). In some embodiments of the present invention, the microchannels can be completely lined with silicon oxynitride to present a uniform material composition to a fluid therein. The present invention has applications for forming microchannels for use in chromatography and electrophoresis. Additionally, the microchannels can be used for electrokinetic pumping, or for localized or global substrate cooling.

Silicon nanostructures produced by laser direct etching

DEFF Research Database (Denmark)

Müllenborn, Matthias; Dirac, Paul Andreas Holger; Petersen, Jon Wulff

1995-01-01

A laser direct-write process has been applied to structure silicon on a nanometer scale. In this process, a silicon substrate, placed in a chlorine ambience, is locally heated above its melting point by a continuous-wave laser and translated by high-resolution direct-current motor stages. Only...

A proposed mechanism for investigating the effect of porous silicon buffer layer on TiO{sub 2} nanorods growth

Energy Technology Data Exchange (ETDEWEB)

Rahmani, N. [Department of Physics, Alzahra University, Tehran, 1993893973 (Iran, Islamic Republic of); Dariani, R.S., E-mail: dariani@alzahra.ac.ir [Department of Physics, Alzahra University, Tehran, 1993893973 (Iran, Islamic Republic of); Rajabi, M. [Deparment of Advanced Materials and Renewable Energies, Iranian Research Organization for Science and Technology (IROST), Tehran 3353136846 (Iran, Islamic Republic of)

2016-03-15

Graphical abstract: - Highlights: • TiO{sub 2} nanorods (NRs) are synthesized on silicon and porous silicon (PS) substrates by hydrothermal method. • TiO{sub 2} NRs grown on PS substrates have a better growth compared to those grown on silicon. • Also increasing substrate porosity leads to an increase in density of the NRs. • We proposed a growth mechanism to explain how can control the local surface chemical potential. - Abstract: In this study, we have synthesized TiO{sub 2} nanorods (NRs) on silicon and porous silicon (PS) substrates by hydrothermal method. The PS substrates with different porosities were fabricated by electrochemical anodization on silicon. According to the field emission electron microscopy images, TiO{sub 2} NRs grown on PS substrates have a better growth compared to those grown on silicon. Also increasing substrate porosity leads to an increase in density of the NRs. Atomic force microscopy observation demonstrates that porous layer formation due to etching of silicon surface leads to an increase of its roughness. Results indicate surface roughness evolution with porosity increasing enhances TiO{sub 2} nucleation on substrate and thus increases TiO{sub 2} NRs density. We propose a growth mechanism to explain how we can control the local surface chemical potential and thus the nucleation and alignment of TiO{sub 2} NRs by surface roughness variation. Also, photoluminescence studies show a red-shift in band gap energy of NRs compared to that of common bulk TiO{sub 2}.

Battery, especially for portable devices, has an anode containing silicon

NARCIS (Netherlands)

Kan, S.Y.

2002-01-01

The anode (2) contains silicon. A battery with a silicon-containing anode is claimed. An Independent claim is also included for a method used to make the battery, comprising the doping of a silicon substrate (1) with charge capacity-increasing material (preferably boron, phosphorous or arsenic),

Investigation of thin oxide layer removal from Si substrates using an SiO2 atomic layer etching approach: the importance of the reactivity of the substrate

International Nuclear Information System (INIS)

Metzler, Dominik; Oehrlein, Gottlieb S; Li, Chen; Lai, C Steven; Hudson, Eric A

2017-01-01

The evaluation of a plasma-based atomic layer etching (ALE) approach for native oxide surface removal from Si substrates is described. Objectives include removal of the native oxide while minimizing substrate damage, surface residues and substrate loss. Oxide thicknesses were measured using in situ ellipsometry and surface chemistry was analyzed by x-ray photoelectron spectroscopy. The cyclic ALE approach when used for removal of native oxide SiO 2 from a Si substrate did not remove native oxide to the extent required. This is due to the high reactivity of the silicon substrate during the low-energy (<40 eV) ion bombardment phase of the cyclic ALE approach which leads to reoxidation of the silicon surface. A modified process, which used continuously biased Ar plasma with periodic CF 4 injection, achieved significant oxygen removal from the Si surface, with some residual carbon and fluorine. A subsequent H 2 /Ar plasma exposure successfully removed residual carbon and fluorine while passivating the silicon surface. The combined treatment reduced oxygen and carbon levels to about half compared to as received silicon surfaces. The downside of this process sequence is a net loss of about 40 Å of Si. A generic insight of this work is the importance of the substrate and final surface chemistry in addition to precise etch control of the target film for ALE processes. By a fluorocarbon-based ALE technique, thin SiO 2 layer removal at the Ångstrom level can be precisely performed from an inert substrate, e.g. a thick SiO 2 layer. However, from a reactive substrate, like Si, complete removal of the thin SiO 2 layer is prevented by the high reactivity of low energy Ar + ion bombarded Si. The Si surfaces are reoxidized during the ALE ion bombardment etch step, even for very clean and ultra-low O 2 process conditions. (paper)

Photo and electroluminescence of porous silicon layers

International Nuclear Information System (INIS)

Keshmini, S.H.; Samadpour, S.; Haji-Ali, E.; Rokn-Abadi, M.R.

1995-01-01

Porous silicon (PSi) layers were prepared by both chemical and electrochemical methods on n- and p-type Si substrates. In the former technique, light emission was obtained from p-type and n-type samples. It was found that intense light illumination during the preparation process was essential for PSi formation on n-type substrates. An efficient electrochemical cell with some useful features was designed for electrochemical etching of silicon. Various preparation parameters were studied and photoluminescence emissions ranging from dark red to light blue were obtained from PSi samples prepared on p-type substrates. N-type samples produced emission ranging from dark red to orange yellow. Electroluminescence of porous silicon samples showed that the color of the emission was the same as the photoluminescence color of the sample, and its intensity and duration depended on the current density passed through the sample. The effects of exposure of samples to air, storage in vacuum and heat treatment in air on luminescence intensity of the samples and preparation of patterned porous layers were also studied. (author)

Porous silicon carbide (SIC) semiconductor device

Science.gov (United States)

Shor, Joseph S. (Inventor); Kurtz, Anthony D. (Inventor)

1996-01-01

Porous silicon carbide is fabricated according to techniques which result in a significant portion of nanocrystallites within the material in a sub 10 nanometer regime. There is described techniques for passivating porous silicon carbide which result in the fabrication of optoelectronic devices which exhibit brighter blue luminescence and exhibit improved qualities. Based on certain of the techniques described porous silicon carbide is used as a sacrificial layer for the patterning of silicon carbide. Porous silicon carbide is then removed from the bulk substrate by oxidation and other methods. The techniques described employ a two-step process which is used to pattern bulk silicon carbide where selected areas of the wafer are then made porous and then the porous layer is subsequently removed. The process to form porous silicon carbide exhibits dopant selectivity and a two-step etching procedure is implemented for silicon carbide multilayers.

Solar cell fabricated on welded thin flexible silicon

Directory of Open Access Journals (Sweden)

Hessmann Maik Thomas

2015-01-01

Full Text Available We present a thin-film crystalline silicon solar cell with an AM1.5 efficiency of 11.5% fabricated on welded 50 μm thin silicon foils. The aperture area of the cell is 1.00 cm2. The cell has an open-circuit voltage of 570 mV, a short-circuit current density of 29.9 mA cm-2 and a fill factor of 67.6%. These are the first results ever presented for solar cells on welded silicon foils. The foils were welded together in order to create the first thin flexible monocrystalline band substrate. A flexible band substrate offers the possibility to overcome the area restriction of ingot-based monocrystalline silicon wafers and the feasibility of a roll-to-roll manufacturing. In combination with an epitaxial and layer transfer process a decrease in production costs can be achieved.

Catastrophic degradation of the interface of epitaxial silicon carbide on silicon at high temperatures

Energy Technology Data Exchange (ETDEWEB)

Pradeepkumar, Aiswarya; Mishra, Neeraj; Kermany, Atieh Ranjbar; Iacopi, Francesca [Queensland Micro and Nanotechnology Centre and Environmental Futures Research Institute, Griffith University, Nathan QLD 4111 (Australia); Boeckl, John J. [Materials and Manufacturing Directorate, Air Force Research Laboratories, Wright-Patterson Air Force Base, Ohio 45433 (United States); Hellerstedt, Jack; Fuhrer, Michael S. [Monash Centre for Atomically Thin Materials, Monash University, Monash, VIC 3800 (Australia)

2016-07-04

Epitaxial cubic silicon carbide on silicon is of high potential technological relevance for the integration of a wide range of applications and materials with silicon technologies, such as micro electro mechanical systems, wide-bandgap electronics, and graphene. The hetero-epitaxial system engenders mechanical stresses at least up to a GPa, pressures making it extremely challenging to maintain the integrity of the silicon carbide/silicon interface. In this work, we investigate the stability of said interface and we find that high temperature annealing leads to a loss of integrity. High–resolution transmission electron microscopy analysis shows a morphologically degraded SiC/Si interface, while mechanical stress measurements indicate considerable relaxation of the interfacial stress. From an electrical point of view, the diode behaviour of the initial p-Si/n-SiC junction is catastrophically lost due to considerable inter-diffusion of atoms and charges across the interface upon annealing. Temperature dependent transport measurements confirm a severe electrical shorting of the epitaxial silicon carbide to the underlying substrate, indicating vast predominance of the silicon carriers in lateral transport above 25 K. This finding has crucial consequences on the integration of epitaxial silicon carbide on silicon and its potential applications.

Printed Barium Strontium Titanate capacitors on silicon

Energy Technology Data Exchange (ETDEWEB)

Sette, Daniele [Univ. Grenoble Alpes, F-38000 Grenoble (France); CEA, LETI, MINATEC Campus, F-38054 Grenoble (France); Luxembourg Institute of Science and Technology LIST, Materials Research and Technology Department, L-4422 Belvaux (Luxembourg); Kovacova, Veronika [Univ. Grenoble Alpes, F-38000 Grenoble (France); CEA, LETI, MINATEC Campus, F-38054 Grenoble (France); Defay, Emmanuel, E-mail: emmanuel.defay@list.lu [Univ. Grenoble Alpes, F-38000 Grenoble (France); CEA, LETI, MINATEC Campus, F-38054 Grenoble (France); Luxembourg Institute of Science and Technology LIST, Materials Research and Technology Department, L-4422 Belvaux (Luxembourg)

2015-08-31

In this paper, we show that Barium Strontium Titanate (BST) films can be prepared by inkjet printing of sol–gel precursors on platinized silicon substrate. Moreover, a functional variable capacitor working in the GHz range has been made without any lithography or etching steps. Finally, this technology requires 40 times less precursors than the standard sol–gel spin-coating technique. - Highlights: • Inkjet printing of Barium Strontium Titanate films • Deposition on silicon substrate • Inkjet printed silver top electrode • First ever BST films thinner than 1 μm RF functional variable capacitor that has required no lithography.

Investigation of the silicon ion density during molecular beam epitaxy growth

CERN Document Server

Eifler, G; Ashurov, K; Morozov, S

2002-01-01

Ions impinging on a surface during molecular beam epitaxy influence the growth and the properties of the growing layer, for example, suppression of dopant segregation and the generation of crystal defects. The silicon electron gun in the molecular beam epitaxy (MBE) equipment is used as a source for silicon ions. To use the effect of ion bombardment the mechanism of generation and distribution of ions was investigated. A monitoring system was developed and attached at the substrate position in the MBE growth chamber to measure the ion and electron densities towards the substrate. A negative voltage was applied to the substrate to modify the ion energy and density. Furthermore the current caused by charge carriers impinging on the substrate was measured and compared with the results of the monitoring system. The electron and ion densities were measured by varying the emission current of the e-gun achieving silicon growth rates between 0.07 and 0.45 nm/s and by changing the voltage applied to the substrate betw...

Development of a platinum resistance thermometer on the silicon substrate for phase change studies

International Nuclear Information System (INIS)

Cai, Qingjun; Chen, Ya-Chi; Tsai, Chialun; DeNatale, Jeffrey F

2012-01-01

Resistance temperature detectors are commonly used measurement sensors in heat transfer studies. In many resistance temperature detectors, the platinum resistance thermometer (PRT) is chemically stable, has a wide temperature measurement range and possesses high measurement accuracy. In phase change studies of carbon nanotubes, bi-porous structures for microelectronic thermal management, 100 nm thick PRTs are developed on silicon substrates with 10 nm titanium adhesive to achieve precise and interface-free temperature measurements. After an annealing at 375 °C, the PRT samples are calibrated at a temperature range from 20 to 180 °C. Measurement hysteresis of temperature appears in thermal cycles. Electrical resistance tends to become low during all heating periods, which establishes the maximum measurement deviation of 10 °C. Experimental results from two different thin-film PRTs indicate that accurate and repeatable temperature measurements can be achieved by either reducing heating speed or using data in the cooling period. (paper)

High-current-density electrodeposition using pulsed and constant currents to produce thick CoPt magnetic films on silicon substrates

Science.gov (United States)

Ewing, Jacob; Wang, Yuzheng; Arnold, David P.

2018-05-01

This paper investigates methods for electroplating thick (>20 μm), high-coercivity CoPt films using high current densities (up to 1 A/cm2) and elevated bath temperatures (70 °C). Correlations are made tying current-density and temperature process parameters with plating rate, elemental ratio and magnetic properties of the deposited CoPt films. It also investigates how pulsed currents can increase the plating rate and film to substrate adhesion. Using 500 mA/cm2 and constant current, high-quality, dense CoPt films were successfully electroplated up to 20 μm thick in 1 hr on silicon substrates (0.35 μm/min plating rate). After standard thermal treatment (675°C, 30 min) to achieve the ordered L10 crystalline phase, strong magnetic properties were measured: coercivities up 850 kA/m, remanences >0.5 T, and maximum energy products up to 46 kJ/m3.

Laser desorption ionization and peptide sequencing on laser induced silicon microcolumn arrays

Science.gov (United States)

Vertes, Akos [Reston, VA; Chen, Yong [San Diego, CA

2011-12-27

The present invention provides a method of producing a laser-patterned silicon surface, especially silicon wafers for use in laser desorption ionization (LDI-MS) (including MALDI-MS and SELDI-MS), devices containing the same, and methods of testing samples employing the same. The surface is prepared by subjecting a silicon substrate to multiple laser shots from a high-power picosecond or femtosecond laser while in a processing environment, e.g., underwater, and generates a remarkable homogenous microcolumn array capable of providing an improved substrate for LDI-MS.

Periodic nanostructures on unpolished substrates and their integration in solar cells

International Nuclear Information System (INIS)

Cornago, I; Dominguez, S; Bravo, J; Ezquer, M; Rodríguez, M J; Lagunas, A R; Pérez-Conde, J; Rodriguez, R

2015-01-01

We present a novel fabrication process based on laser interference lithography, lift-off and reactive ion etching, which allows us to fabricate periodic nanostructures on photovoltaic substrates with an average root mean square (RMS) roughness of 750 nm. We fabricate nanostructures on unpolished crystalline silicon substrates, which reduces their reflectance 30% as fabricated. When an additional passivation layer is deposited, the light trapping grows, achieving a reflectance reduction of 60%. In addition, we have successfully integrated the nanostructured substrates in silicon wafer–based solar cells following standard processes, achieving a final efficiency of 15.56%. (paper)

Single-crystal-like GdNdOx thin films on silicon substrates by magnetron sputtering and high-temperature annealing for crystal seed layer application

Directory of Open Access Journals (Sweden)

Ziwei Wang

2016-06-01

Full Text Available Single-crystal-like rare earth oxide thin films on silicon (Si substrates were fabricated by magnetron sputtering and high-temperature annealing processes. A 30-nm-thick high-quality GdNdOx (GNO film was deposited using a high-temperature sputtering process at 500°C. A Gd2O3 and Nd2O3 mixture was used as the sputtering target, in which the proportions of Gd2O3 and Nd2O3 were controlled to make the GNO’s lattice parameter match that of the Si substrate. To further improve the quality of the GNO film, a post-deposition annealing process was performed at a temperature of 1000°C. The GNO films exhibited a strong preferred orientation on the Si substrate. In addition, an Al/GNO/Si capacitor was fabricated to evaluate the dielectric constant and leakage current of the GNO films. It was determined that the single-crystal-like GNO films on the Si substrates have potential for use as an insulator layer for semiconductor-on-insulator and semiconductor/insulator multilayer applications.

Synthesis and investigation of silicon carbide nanowires by HFCVD

Indian Academy of Sciences (India)

We found that increasing substrate temperature increases silicon and oxygen doping amount. We also found that electrical resistivity and surface roughness increased by increasing substrate temperature. This study showed that SiC nanowires with high density grew on the free catalyst glass substrate, and the alignment of ...

Optoelectrical Properties of a Heterojunction with Amorphous InGaZnO Film on n-Silicon Substrate

Science.gov (United States)

Jiang, D. L.; Ma, X. Z.; Li, L.; Xu, Z. K.

2017-10-01

An a-IGZO/ n-Si heterojunction device has been fabricated at room temperature by depositing amorphous InGaZnO (a-IGZO) film on n-type silicon substrate by plasma-assisted pulsed laser deposition and its optoelectrical properties studied in detail. The heterojunction showed distinct rectifying characteristic with rectification ratio of 1.93 × 103 at ±2 V bias and reverse leakage current density of 1.6 × 10-6 A cm-2 at -2 V bias. More interestingly, the heterojunction not only showed the characteristic of unbiased photoresponse, but could also detect either ultraviolet or ultraviolet-visible light by simply changing the polarity of the bias applied to the heterojunction. The variable photoresponse phenomenon and the charge transport mechanisms in the heterojunction are explained based on the energy band diagram of the heterojunction.

P-type silicon drift detectors

International Nuclear Information System (INIS)

Walton, J.T.; Krieger, B.; Krofcheck, D.; O'Donnell, R.; Odyniec, G.; Partlan, M.D.; Wang, N.W.

1995-06-01

Preliminary results on 16 CM 2 , position-sensitive silicon drift detectors, fabricated for the first time on p-type silicon substrates, are presented. The detectors were designed, fabricated, and tested recently at LBL and show interesting properties which make them attractive for use in future physics experiments. A pulse count rate of approximately 8 x l0 6 s -1 is demonstrated by the p-type silicon drift detectors. This count rate estimate is derived by measuring simultaneous tracks produced by a laser and photolithographic mask collimator that generates double tracks separated by 50 μm to 1200 μm. A new method of using ion-implanted polysilicon to produce precise valued bias resistors on the silicon drift detectors is also discussed

Vacuum-plasma-sprayed silicon coatings

International Nuclear Information System (INIS)

Varacalle, D.J. Jr.; Herman, H.; Bancke, G.A.; Burchell, T.D.; Romanoski, G.R.

1991-01-01

Vacuum plasma spraying produces well-bonded dense stress-free coatings for a variety of materials on a wide range of substrates. The process is used in many industries for the excellent wear, corrosion resistance and high temperature behavior of the fabricated coatings. In this study, silicon metal was deposited on graphite to study the feasibility of preventing corrosion and oxidation of graphite components for nuclear reactors. Operating parameters were varied in a Taguchi design of experiments to display the range of the plasma processing conditions and their effect on the measured coating characteristics. The coating attributes evaluated were thickness, porosity, microhardness and phase content. This paper discusses the influence of the processing parameters on as-sprayed coating qualities. The paper also discusses the effect of thermal cycling on silicon samples in an inert helium atmosphere. The diffraction spectrum for a sample that experienced a 1600degC temperature cycle indicated that more than 99% of the coating transformed to β-SiC. The silicon coatings protected the graphite substrates from oxidation in one experiment. (orig.)

Laser-beam-induced current mapping evaluation of porous silicon-based passivation in polycrystalline silicon solar cells

Energy Technology Data Exchange (ETDEWEB)

Rabha, M. Ben; Bessais, B. [Laboratoire de Nanomateriaux et des Systemes pour l' Energie, Centre de Recherches et des Technologies de l' Energie - Technopole de Borj-Cedria BP 95, 2050 Hammam-Lif (Tunisia); Dimassi, W.; Bouaicha, M.; Ezzaouia, H. [Laboratoire de photovoltaique, des semiconducteurs et des nanostructures, Centre de Recherches et des Technologies de l' Energie - Technopole de Borj-Cedria BP 95, 2050 Hammam-Lif (Tunisia)

2009-05-15

In the present work, we report on the effect of introducing a superficial porous silicon (PS) layer on the performance of polycrystalline silicon (pc-Si) solar cells. Laser-beam-induced current (LBIC) mapping shows that the PS treatment on the emitter of pc-Si solar cells improves their quantum response and reduce the grain boundaries (GBs) activity. After the porous silicon treatment, mapping investigation shows an enhancement of the LBIC and the internal quantum efficiency (IQE), due to an improvement of the minority carrier diffusion length and the passivation of recombination centers at the GBs as compared to the reference substrate. It was quantitatively shown that porous silicon treatment can passivate both the grains and GBs. (author)

All-solid-state supercapacitors on silicon using graphene from silicon carbide

Energy Technology Data Exchange (ETDEWEB)

Wang, Bei; Ahmed, Mohsin; Iacopi, Francesca, E-mail: f.iacopi@griffith.edu.au [Environmental Futures Research Institute, Griffith University, Nathan 4111 (Australia); Wood, Barry [Centre for Microscopy and Microanalysis, The University of Queensland, St. Lucia 4072 (Australia)

2016-05-02

Carbon-based supercapacitors are lightweight devices with high energy storage performance, allowing for faster charge-discharge rates than batteries. Here, we present an example of all-solid-state supercapacitors on silicon for on-chip applications, paving the way towards energy supply systems embedded in miniaturized electronics with fast access and high safety of operation. We present a nickel-assisted graphitization method from epitaxial silicon carbide on a silicon substrate to demonstrate graphene as a binder-free electrode material for all-solid-state supercapacitors. We obtain graphene electrodes with a strongly enhanced surface area, assisted by the irregular intrusion of nickel into the carbide layer, delivering a typical double-layer capacitance behavior with a specific area capacitance of up to 174 μF cm{sup −2} with about 88% capacitance retention over 10 000 cycles. The fabrication technique illustrated in this work provides a strategic approach to fabricate micro-scale energy storage devices compatible with silicon electronics and offering ultimate miniaturization capabilities.

All-solid-state supercapacitors on silicon using graphene from silicon carbide

International Nuclear Information System (INIS)

Wang, Bei; Ahmed, Mohsin; Iacopi, Francesca; Wood, Barry

2016-01-01

Carbon-based supercapacitors are lightweight devices with high energy storage performance, allowing for faster charge-discharge rates than batteries. Here, we present an example of all-solid-state supercapacitors on silicon for on-chip applications, paving the way towards energy supply systems embedded in miniaturized electronics with fast access and high safety of operation. We present a nickel-assisted graphitization method from epitaxial silicon carbide on a silicon substrate to demonstrate graphene as a binder-free electrode material for all-solid-state supercapacitors. We obtain graphene electrodes with a strongly enhanced surface area, assisted by the irregular intrusion of nickel into the carbide layer, delivering a typical double-layer capacitance behavior with a specific area capacitance of up to 174 μF cm"−"2 with about 88% capacitance retention over 10 000 cycles. The fabrication technique illustrated in this work provides a strategic approach to fabricate micro-scale energy storage devices compatible with silicon electronics and offering ultimate miniaturization capabilities.

a-Si:H crystallization from isothermal annealing and its dependence on the substrate used

Energy Technology Data Exchange (ETDEWEB)

Rojas-Lopez, M., E-mail: marlonrl@yahoo.com.mx [CIBA-Tlaxcala, Instituto Politecnico Nacional, Tepetitla, Tlax. 90700 (Mexico); Orduna-Diaz, A.; Delgado-Macuil, R.; Gayou, V.L.; Bibbins-Martinez, M. [CIBA-Tlaxcala, Instituto Politecnico Nacional, Tepetitla, Tlax. 90700 (Mexico); Torres-Jacome, A.; Trevino-Palacios, C.G. [INAOE, Tonantzintla, Puebla, Pue. 72000 (Mexico)

2010-10-25

We present hydrogenated amorphous silicon (a-Si:H) films which were deposited on two different substrates (glass and mono-crystalline silicon) after an isothermal annealing treatment at 250 deg. C for up to 14 h. The annealed amorphous films were analyzed using atomic force microscopy, Raman and FTIR spectroscopy. Films deposited on glass substrate experienced an amorphous-crystalline phase transition after annealing because of the metal-induced crystallization effect, reaching approximately 70% conversion after 14 h of annealing. An absorption frequency of the TO-phonon mode that varies systematically with the substoichiometry of the silicon oxide in the 1046-1170 cm{sup -1} region was observed, revealing the reactivity of the film with the annealing time. For similar annealing time, films deposited on mono-crystalline silicon substrate remained mainly amorphous with minimal Si-crystalline formation. Therefore, the crystalline formations and the shape of the films surfaces depends on the annealing time as well as on the substrate employed during the deposition process of the a-Si:H film.

Self-organized, effective medium black silicon antireflection structures for silicon optics in the mid-infrared

Science.gov (United States)

Steglich, Martin; Käsebier, Thomas; Kley, Ernst-Bernhard; Tünnermann, Andreas

2016-09-01

Thanks to its high quality and low cost, silicon is the material of choice for optical devices operating in the mid-infrared (MIR; 2 μm to 6 μm wavelength). Unfortunately in this spectral region, the refractive index is comparably high (about 3.5) and leads to severe reflection losses of about 30% per interface. In this work, we demonstrate that self-organized, statistical Black Silicon structures, fabricated by Inductively Coupled Plasma Reactive Ion Etching (ICP-RIE), can be used to effectively suppress interface reflection. More importantly, it is shown that antireflection can be achieved in an image-preserving, non-scattering way. This enables Black Silicon antireflection structures (ARS) for imaging applications in the MIR. It is demonstrated that specular transmittances of 97% can be easily achieved on both flat and curved substrates, e.g. lenses. Moreover, by a combined optical and morphological analysis of a multitude of different Black Silicon ARS, an effective medium criterion for the examined structures is derived that can also be used as a design rule for maximizing sample transmittance in a desired wavelength range. In addition, we show that the mechanical durability of the structures can be greatly enhanced by coating with hard dielectric materials like diamond-like carbon (DLC), hence enabling practical applications. Finally, the distinct advantages of statistical Black Silicon ARS over conventional AR layer stacks are discussed: simple applicability to topological substrates, absence of thermal stress and cost-effectiveness.

Fabrication of a novel silicon single electron transistor for Si:P quantum computer devices

International Nuclear Information System (INIS)

Angus, S.J.; Smith, C.E.A.; Gauja, E.; Dzurak, A.S.; Clark, R.G.; Snider, G.L.

2004-01-01

Full text: Quantum computation relies on the successful measurement of quantum states. Single electron transistors (SETs) are known to be able to perform fast and sensitive charge measurements of solid state qubits. However, due to their sensitivity, SETs are also very susceptible to random charge fluctuations in a solid-state materials environment. In previous dc transport measurements, silicon-based SETs have demonstrated greater charge stability than A1/A1 2 O 3 SETs. We have designed and fabricated a novel silicon SET architecture for a comparison of the noise characteristics of silicon and aluminium based devices. The silicon SET described here is designed for controllable and reproducible low temperature operation. It is fabricated using a novel dual gate structure on a silicon-on-insulator substrate. A silicon quantum wire is formed in a 100nm thick high-resistivity superficial silicon layer using reactive ion etching. Carriers are induced in the silicon wire by a back gate in the silicon substrate. The tunnel barriers are created electrostatically, using lithographically defined metallic electrodes (∼40nm width). These tunnel barriers surround the surface of the quantum wire, thus producing excellent electrostatic confinement. This architecture provides independent control of tunnel barrier height and island occupancy, thus promising better control of Coulomb blockade oscillations than in previously investigated silicon SETs. The use of a near intrinsic silicon substrate offers compatibility with Si:P qubits in the longer term

Role of substrate morphology in ion induced dewetting of thin solid films

Energy Technology Data Exchange (ETDEWEB)

Repetto, Luca, E-mail: luca.repetto@unige.it [Physics Department and Nanomed Labs, Università di Genova, Via Dodecaneso 33, 16146 Genova (Italy); Lo Savio, Roberto [Physics Department and Nanomed Labs, Università di Genova, Via Dodecaneso 33, 16146 Genova (Italy); Šetina Batič, Barbara [Inštitut Za Kovinske Materiale in Tehnologije, Lepi pot 11, 1000 Ljubljana (Slovenia); Firpo, Giuseppe; Valbusa, Ugo [Physics Department and Nanomed Labs, Università di Genova, Via Dodecaneso 33, 16146 Genova (Italy)

2014-10-01

Highlights: • We have created by ion bombardment silicon substrates with different topographies. • The substrates have been characterized by ellipsometry, AFM, SEM and EDX. • The substrates have been used for experiments of ion induced Cr films. • We show that different substrate topographies can induce different dewetted patterns. • Substrate topography can favor spinodal dewetting against heterogeneous nucleations. - Abstract: We investigate the role of the substrate morphology in the dewetting of ultrathin chromium films irradiated with 30 keV Ga ions. Silicon surfaces with different roughness were used as substrates for the films. The results of the irradiation experiments and of related simulations indicate that the chromium films can undergo a dewetting-like process through the two standard channels that show up for liquids, namely the spinodal channel, and the dewetting by heterogeneous nucleation. The two processes are competitive, and the prevailing one can be predicted and selected according to the characteristics of the substrate.

Role of substrate morphology in ion induced dewetting of thin solid films

International Nuclear Information System (INIS)

Repetto, Luca; Lo Savio, Roberto; Šetina Batič, Barbara; Firpo, Giuseppe; Valbusa, Ugo

2014-01-01

Highlights: • We have created by ion bombardment silicon substrates with different topographies. • The substrates have been characterized by ellipsometry, AFM, SEM and EDX. • The substrates have been used for experiments of ion induced Cr films. • We show that different substrate topographies can induce different dewetted patterns. • Substrate topography can favor spinodal dewetting against heterogeneous nucleations. - Abstract: We investigate the role of the substrate morphology in the dewetting of ultrathin chromium films irradiated with 30 keV Ga ions. Silicon surfaces with different roughness were used as substrates for the films. The results of the irradiation experiments and of related simulations indicate that the chromium films can undergo a dewetting-like process through the two standard channels that show up for liquids, namely the spinodal channel, and the dewetting by heterogeneous nucleation. The two processes are competitive, and the prevailing one can be predicted and selected according to the characteristics of the substrate

Thermal strain-induced dielectric anisotropy in Ba0.7Sr0.3TiO3 thin films grown on silicon-based substrates

International Nuclear Information System (INIS)

Zhu, X. H.; Defaye, E.; Aied, M.; Guigues, B.; Dubarry, C.

2009-01-01

Dielectric properties of Ba 0.7 Sr 0.3 TiO 3 (BST) thin films, which were prepared on silicon-based substrates by ion beam sputtering and postdeposition annealing method, were systematically investigated in different electrode configurations of metal-insulator-metal and coplanar interdigital capacitors. It was found that a large dielectric anisotropy exists in the films with better in-plane dielectric properties (higher dielectric permittivity and tunability) than those along the out-of-plane direction. The observed anisotropic dielectric responses are explained qualitatively in terms of a thermal strain effect that is related to dissimilar film strains along the in-plane and out-of-plane directions. Another reason for the dielectric anisotropy is due to different influences of the interfacial low-dielectric layer between the BST film and the substrate (metal electrode).

Thermal strain-induced dielectric anisotropy in Ba0.7Sr0.3TiO3 thin films grown on silicon-based substrates

Science.gov (United States)

Zhu, X. H.; Guigues, B.; Defaÿ, E.; Dubarry, C.; Aïd, M.

2009-07-01

Dielectric properties of Ba0.7Sr0.3TiO3 (BST) thin films, which were prepared on silicon-based substrates by ion beam sputtering and postdeposition annealing method, were systematically investigated in different electrode configurations of metal-insulator-metal and coplanar interdigital capacitors. It was found that a large dielectric anisotropy exists in the films with better in-plane dielectric properties (higher dielectric permittivity and tunability) than those along the out-of-plane direction. The observed anisotropic dielectric responses are explained qualitatively in terms of a thermal strain effect that is related to dissimilar film strains along the in-plane and out-of-plane directions. Another reason for the dielectric anisotropy is due to different influences of the interfacial low-dielectric layer between the BST film and the substrate (metal electrode).

SOI MESFETs on high-resistivity, trap-rich substrates

Science.gov (United States)

Mehr, Payam; Zhang, Xiong; Lepkowski, William; Li, Chaojiang; Thornton, Trevor J.

2018-04-01

The DC and RF characteristics of metal-semiconductor field-effect-transistors (MESFETs) on conventional CMOS silicon-on-insulator (SOI) substrates are compared to nominally identical devices on high-resistivity, trap-rich SOI substrates. While the DC transfer characteristics are statistically identical on either substrate, the maximum available gain at GHz frequencies is enhanced by ∼2 dB when using the trap-rich substrates, with maximum operating frequencies, fmax, that are approximately 5-10% higher. The increased fmax is explained by the reduced substrate conduction at GHz frequencies using a lumped-element, small-signal model.

Method of producing an electronic unit having a polydimethylsiloxane substrate and circuit lines

Energy Technology Data Exchange (ETDEWEB)

Davidson, James Courtney [Livermore, CA; Krulevitch, Peter A [Pleasanton, CA; Maghribi, Mariam N [Livermore, CA; Benett, William J [Livermore, CA; Hamilton, Julie K [Tracy, CA; Tovar, Armando R [San Antonio, TX

2012-06-19

A system of metalization in an integrated polymer microsystem. A flexible polymer substrate is provided and conductive ink is applied to the substrate. In one embodiment the flexible polymer substrate is silicone. In another embodiment the flexible polymer substrate comprises poly(dimethylsiloxane).

Fabricating solar cells with silicon nanoparticles

Science.gov (United States)

Loscutoff, Paul; Molesa, Steve; Kim, Taeseok

2014-09-02

A laser contact process is employed to form contact holes to emitters of a solar cell. Doped silicon nanoparticles are formed over a substrate of the solar cell. The surface of individual or clusters of silicon nanoparticles is coated with a nanoparticle passivation film. Contact holes to emitters of the solar cell are formed by impinging a laser beam on the passivated silicon nanoparticles. For example, the laser contact process may be a laser ablation process. In that case, the emitters may be formed by diffusing dopants from the silicon nanoparticles prior to forming the contact holes to the emitters. As another example, the laser contact process may be a laser melting process whereby portions of the silicon nanoparticles are melted to form the emitters and contact holes to the emitters.

Simulations of Proton Implantation in Silicon Carbide (SiC)

Science.gov (United States)

2016-03-31

Simulations of Proton Implantation in Silicon Carbide (SiC) Jonathan P. McCandless, Hailong Chen, Philip X.-L. Feng Electrical Engineering, Case...of implanting protons (hydrogen ions, H+) into SiC thin layers on silicon (Si) substrate, and explore the ion implantation conditions that are...relevant to experimental radiation of SiC layers. Keywords: silicon carbide (SiC); radiation effects; ion implantation ; proton; stopping and range of

High-gain bipolar detector on float-zone silicon

Science.gov (United States)

Han, D. J.; Batignani, G.; Del Guerra, A.; Dalla Betta, G.-F.; Boscardin, M.; Bosisio, L.; Giorgi, M.; Forti, F.

2003-10-01

Since the float-zone (FZ) silicon has lower contaminations and longer minority-carrier lifetime than those in Czochralski silicon and other semiconductor materials, it has potential advantages to fabricate bipolar detectors on the high-purity FZ silicon substrate to achieve a high gain at ultra-low-signal levels. The authors present preliminary experimental results on a bipolar detector fabricated on an unusual high-purity FZ silicon substrate. A backside gettering layer of phosphorus-doped polysilicon was employed to preserve the long carrier lifetime of the high-purity FZ silicon. The device has been investigated in the detection of a continuous flux of X-ray and infrared light. The bipolar detector with a circular emitter of 2 mm diameter has demonstrated high gains up to 3820 for 22 keV X-ray from a 1 mCi Cd radioactive source (the X-ray photon flux, received by the detector is estimated to be ˜7.77×10 4/s). High gain up to 4400 for 0.17 nW light with a wavelength of 0.83 μm has been observed for the same device.

High-gain bipolar detector on float-zone silicon

International Nuclear Information System (INIS)

Han, D.J.; Batignani, G.; Guerra, A.D.A. Del; Dalla Betta, G.-F.; Boscardin, M.; Bosisio, L.; Giorgi, M.; Forti, F.

2003-01-01

Since the float-zone (FZ) silicon has lower contaminations and longer minority-carrier lifetime than those in Czochralski silicon and other semiconductor materials, it has potential advantages to fabricate bipolar detectors on the high-purity FZ silicon substrate to achieve a high gain at ultra-low-signal levels. The authors present preliminary experimental results on a bipolar detector fabricated on an unusual high-purity FZ silicon substrate. A backside gettering layer of phosphorus-doped polysilicon was employed to preserve the long carrier lifetime of the high-purity FZ silicon. The device has been investigated in the detection of a continuous flux of X-ray and infrared light. The bipolar detector with a circular emitter of 2 mm diameter has demonstrated high gains up to 3820 for 22 keV X-ray from a 1 mCi Cd radioactive source (the X-ray photon flux, received by the detector is estimated to be ∼7.77x10 4 /s). High gain up to 4400 for 0.17 nW light with a wavelength of 0.83 μm has been observed for the same device

X-ray and scanning electron microscopic investigation of porous silicon and silicon epitaxial layers grown on porous silicon

International Nuclear Information System (INIS)

Wierzchowski, W.; Pawlowska, M.; Nossarzewska-Orlowska, E.; Brzozowski, A.; Wieteska, K.; Graeff, W.

1998-01-01

The 1 to 5 μm thick layers of porous silicon and epitaxial layers grown on porous silicon were studied by means of X-ray diffraction methods, realised with a wide use of synchrotron source and scanning microscopy. The results of x-ray investigation pointed the difference of lateral periodicity between the porous layer and the substrate. It was also found that the deposition of epitaxial layer considerably reduced the coherence of porous fragments. A number of interface phenomena was also observed in section and plane wave topographs. The scanning electron microscopic investigation of cleavage faces enabled direct evaluation of porous layer thickness and revealed some details of their morphology. The scanning observation of etched surfaces of epitaxial layers deposited on porous silicon revealed dislocations and other defects not reasonable in the X-ray topographs. (author)

Meniscus-force-mediated layer transfer technique using single-crystalline silicon films with midair cavity: Application to fabrication of CMOS transistors on plastic substrates

Science.gov (United States)

Sakaike, Kohei; Akazawa, Muneki; Nakagawa, Akitoshi; Higashi, Seiichiro

2015-04-01

A novel low-temperature technique for transferring a silicon-on-insulator (SOI) layer with a midair cavity (supported by narrow SiO2 columns) by meniscus force has been proposed, and a single-crystalline Si (c-Si) film with a midair cavity formed in dog-bone shape was successfully transferred to a poly(ethylene terephthalate) (PET) substrate at its heatproof temperature or lower. By applying this proposed transfer technique, high-performance c-Si-based complementary metal-oxide-semiconductor (CMOS) transistors were successfully fabricated on the PET substrate. The key processes are the thermal oxidation and subsequent hydrogen annealing of the SOI layer on the midair cavity. These processes ensure a good MOS interface, and the SiO2 layer works as a “blocking” layer that blocks contamination from PET. The fabricated n- and p-channel c-Si thin-film transistors (TFTs) on the PET substrate showed field-effect mobilities of 568 and 103 cm2 V-1 s-1, respectively.

Effects of substrate temperature on structural and electrical properties of SiO2-matrix boron-doped silicon nanocrystal thin films

International Nuclear Information System (INIS)

Huang, Junjun; Zeng, Yuheng; Tan, Ruiqin; Wang, Weiyan; Yang, Ye; Dai, Ning; Song, Weijie

2013-01-01

In this work, silicon-rich SiO 2 (SRSO) thin films were deposited at different substrate temperatures (T s ) and then annealed by rapid thermal annealing to form SiO 2 -matrix boron-doped silicon-nanocrystals (Si-NCs). The effects of T s on the micro-structure and electrical properties of the SiO 2 -matrix boron-doped Si-NC thin films were investigated using Raman spectroscopy and Hall measurements. Results showed that the crystalline fraction and dark conductivity of the SiO 2 -matrix boron-doped Si-NC thin films both increased significantly when the T s was increased from room temperature to 373 K. When the T s was further increased from 373 K to 676 K, the crystalline fraction of 1373 K-annealed thin films decreased from 52.2% to 38.1%, and the dark conductivity reduced from 8 × 10 −3 S/cm to 5.5 × 10 −5 S/cm. The changes in micro-structure and dark conductivity of the SiO 2 -matrix boron-doped Si-NC thin films were most possibly due to the different amount of Si-O 4 bond in the as-deposited SRSO thin films. Our work indicated that there was an optimal T s , which could significantly increase the crystallization and conductivity of Si-NC thin films. Also, it was illumined that the low-resistivity SiO 2 -matrix boron-doped Si-NC thin films can be achieved under the optimal substrate temperatures, T s .

The potential for the fabrication of wires embedded in the crystalline silicon substrate using the solid phase segregation of gold in crystallising amorphous volumes

International Nuclear Information System (INIS)

Liu, A.C.Y.; McCallum, J.C.

2004-01-01

The refinement of gold in crystallising amorphous silicon volumes was tested as a means of creating a conducting element embedded in the crystalline matrix. Amorphous silicon volumes were created by self-ion-implantation through a mask. Five hundred kiloelectronvolt Au + was then implanted into the volumes. The amorphous volumes were crystallised on a hot stage in air, and the crystallisation was characterised using cross sectional transmission electron microscopy. It was found that the amorphous silicon volumes crystallised via solid phase epitaxy at all the lateral and vertical interfaces. The interplay of the effects of the gold and also the hydrogen that infilitrated from the surface oxide resulted in a plug of amorphous material at the surface. Further annealing at this temperature demonstrated that the gold, once it had reached a certain critical concentration nucleated poly-crystalline growth instead of solid phase epitaxy. Time resolved reflectivity and Rutherford backscattering and channeling measurements were performed on large area samples that had been subject to the same implantation regime to investigate this system further. It was discovered that the crystallisation dynamics and zone refinement of the gold were complicated functions of both gold concentration and temperature. These findings do not encourage the use of this method to obtain conducting elements embedded in the crystalline silicon substrate

Metallisation Technology of Silicon Solar Cells Using the Convectional and Laser Technique

Directory of Open Access Journals (Sweden)

Leszek A. Dobrzanski

2013-07-01

Full Text Available The aim of the paper was to optimize the Selective Laser Sintering (SLS and co-firing in the infrared conveyor furnace parameters in front Screen Printed (SP contacts. The co-firing in the infrared conveyor furnace was carried out at various temperature. The SLS was carried out at various a laser beam, scanning speed of the laser beam and front electrode thickness. The investigations were carried out on monocrystalline silicon wafers. During investigations was applied a silver powder with the grain size of 40 μm. The contacts parameters are obtained according to the Transmission Line Model (TLM measurements. Firstly, this paper shows the comparison between the convectional an unconventional method of manufacturing front contacts of monocrystalline silicon solar cells with the different morphology of silicon for comparative purposes. Secondly, the papers shows technological recommendations for both methods in relation to parameters such as: the optimal paste composition, the morphology of the silicon substrate to produce the front electrode of silicon solar cells, which were selected experimentally in order to produce a uniformly melted structure, well adhering to the substrate, with the low resistance of the front electrode-to-substrate joint zone.

Thermal processing of strained silicon-on-insulator for atomically precise silicon device fabrication

International Nuclear Information System (INIS)

Lee, W.C.T.; Bishop, N.; Thompson, D.L.; Xue, K.; Scappucci, G.; Cederberg, J.G.; Gray, J.K.; Han, S.M.; Celler, G.K.; Carroll, M.S.; Simmons, M.Y.

2013-01-01

Highlights: ► Strained silicon-on-insulator (sSOI) samples were flash-annealed at high temperature under ultra-high vacuum conditions. ► The extend of surface strain relaxation depends on the annealing temperature with no strain relaxation observed below 1020 °C. ► A 2 × 1 reconstructed surface with low defect density can be achieved. ► The annealed sSOI surface shows enhanced step undulations due to the unique energetics caused by surface strain. - Abstract: We investigate the ability to reconstruct strained silicon-on-insulator (sSOI) substrates in ultra-high vacuum for use in atomic scale device fabrication. Characterisation of the starting sSOI substrate using μRaman shows an average tensile strain of 0.8%, with clear strain modulation in a crosshatch pattern across the surface. The surfaces were heated in ultra-high vacuum from temperatures of 900 °C to 1100 °C and subsequently imaged using scanning tunnelling microscopy (STM). The initial strain modulation on the surface is observed to promote silicon migration and the formation of crosshatched surface features whose height and pitch increases with increasing annealing temperature. STM images reveal alternating narrow straight S A steps and triangular wavy S B steps attributed to the spontaneous faceting of S B and preferential adatom attachment on S B under biaxial tensile strain. Raman spectroscopy shows that despite these high temperature anneals no strain relaxation of the substrate is observed up to temperatures of 1020 °C. Above 1100 °C, strain relaxation is evident but is confined to the surface.

Directed dewetting of amorphous silicon film by a donut-shaped laser pulse

International Nuclear Information System (INIS)

Yoo, Jae-Hyuck; Zheng, Cheng; Grigoropoulos, Costas P; In, Jung Bin; Sakellari, Ioanna; Raman, Rajesh N; Matthews, Manyalibo J; Elhadj, Selim

2015-01-01

Irradiation of a thin film with a beam-shaped laser is proposed to achieve site-selectively controlled dewetting of the film into nanoscale structures. As a proof of concept, the laser-directed dewetting of an amorphous silicon thin film on a glass substrate is demonstrated using a donut-shaped laser beam. Upon irradiation of a single laser pulse, the silicon film melts and dewets on the substrate surface. The irradiation with the donut beam induces an unconventional lateral temperature profile in the film, leading to thermocapillary-induced transport of the molten silicon to the center of the beam spot. Upon solidification, the ultrathin amorphous silicon film is transformed to a crystalline silicon nanodome of increased height. This morphological change enables further dimensional reduction of the nanodome as well as removal of the surrounding film material by isotropic silicon etching. These results suggest that laser-based dewetting of thin films can be an effective way for scalable manufacturing of patterned nanostructures. (paper)

Directed dewetting of amorphous silicon film by a donut-shaped laser pulse.

Science.gov (United States)

Yoo, Jae-Hyuck; In, Jung Bin; Zheng, Cheng; Sakellari, Ioanna; Raman, Rajesh N; Matthews, Manyalibo J; Elhadj, Selim; Grigoropoulos, Costas P

2015-04-24

Irradiation of a thin film with a beam-shaped laser is proposed to achieve site-selectively controlled dewetting of the film into nanoscale structures. As a proof of concept, the laser-directed dewetting of an amorphous silicon thin film on a glass substrate is demonstrated using a donut-shaped laser beam. Upon irradiation of a single laser pulse, the silicon film melts and dewets on the substrate surface. The irradiation with the donut beam induces an unconventional lateral temperature profile in the film, leading to thermocapillary-induced transport of the molten silicon to the center of the beam spot. Upon solidification, the ultrathin amorphous silicon film is transformed to a crystalline silicon nanodome of increased height. This morphological change enables further dimensional reduction of the nanodome as well as removal of the surrounding film material by isotropic silicon etching. These results suggest that laser-based dewetting of thin films can be an effective way for scalable manufacturing of patterned nanostructures.

Silicon accumulation and distribution in petunia and sunflower

Science.gov (United States)

Silicon (Si) is a beneficial element that has been shown to protect plants during periods of abiotic and biotic stress. Plant-available Si can be supplied through substrate components, substrate amendments, liquid fertilization, or foliar sprays. The objective of this study was to compare Si accum...

Electrical parameters of silicon on sapphire; influence on aluminium gate MOS devices performances

International Nuclear Information System (INIS)

Suat, J.P.; Borel, J.

1976-01-01

The question is the quality level of the substrate obtained with MOS technologies on silicon on an insulating substrate. Experimental results are presented on the main electrical parameters of MOS transistors made on silicon on sapphire, e.g. mean values and spreads of: threhold voltage and surface mobilities of transistors, breakdown voltages, and leakage currents of diodes. These devices have been made in three different technologies: enhancement P. channel technology, depletion-enhancement P. channel technology, and complementary MOS technology. These technologies are all aluminium gate processes with standard design rules and 5μm channel length. Measurements show that presently available silicon on sapphire can be considered as a very suitable substrate for many MOS digital applications (but not for dynamic circuits) [fr

Investigation of graphene based miniaturized terahertz antenna for novel substrate materials

Directory of Open Access Journals (Sweden)

Rajni Bala

2016-03-01

Full Text Available The selection of appropriate substrate material acts as a performance regulator for miniaturized graphene patch antenna. The substrate material not only controls the transport properties of graphene but also influences the resonant properties of the graphene patch antenna. The edge fed microstrip line graphene based rectangular patch antenna is designed here for operating in the frequency range 2.67–2.92 THz for wireless applications. The performance is investigated for silicon nitride, aluminum oxide, boron nitride, silica and quartz substrate materials on the basis of return loss, voltage standing wave ratio (VSWR, absorption cross section, bandwidth and radiation efficiency. The comparison of results shows that silicon nitride exhibits overall excellent performance by the virtue of having higher bandwidth and radiation efficiency as compared to other chosen substrate materials.

Stoichiometry of Silicon Dioxide Films Obtained by Ion-Beam Sputtering

Science.gov (United States)

Telesh, E. V.; Dostanko, A. P.; Gurevich, O. V.

2018-03-01

The composition of SiOx films produced by ion-beam sputtering (IBS) of silicon and quartz targets were studied by infrared spectrometry. Films with thicknesses of 150-390 nm were formed on silicon substrates. It was found that increase in the partial pressure of oxygen in the working gas, increase in the temperature of the substrate, and the presence of a positive potential on the target during reactive IBS of silicon shifted the main absorption band νas into the high-frequency region and increased the composition index from 1.41 to 1.85. During IBS of a quartz target the stoichiometry of the films deteriorates with increase of the energy of the sputtering argon ions. This may be due to increase of the deposition rate. Increase in the current of the thermionic compensator, increase of the substrate temperature, and addition of oxygen led to the formation of SiOx films with improved stoichiometry.

Coated silicon comprising material for protection against environmental corrosion

Science.gov (United States)

Hazel, Brian Thomas (Inventor)

2009-01-01

In accordance with an embodiment of the invention, an article is disclosed. The article comprises a gas turbine engine component substrate comprising a silicon material; and an environmental barrier coating overlying the substrate, wherein the environmental barrier coating comprises cerium oxide, and the cerium oxide reduces formation of silicate glass on the substrate upon exposure to corrodant sulfates.

Silicon Alloying On Aluminium Based Alloy Surface

International Nuclear Information System (INIS)

Suryanto

2002-01-01

Silicon alloying on surface of aluminium based alloy was carried out using electron beam. This is performed in order to enhance tribological properties of the alloy. Silicon is considered most important alloying element in aluminium alloy, particularly for tribological components. Prior to silicon alloying. aluminium substrate were painted with binder and silicon powder and dried in a furnace. Silicon alloying were carried out in a vacuum chamber. The Silicon alloyed materials were assessed using some techniques. The results show that silicon alloying formed a composite metal-non metal system in which silicon particles are dispersed in the alloyed layer. Silicon content in the alloyed layer is about 40% while in other place is only 10.5 %. The hardness of layer changes significantly. The wear properties of the alloying alloys increase. Silicon surface alloying also reduced the coefficient of friction for sliding against a hardened steel counter face, which could otherwise be higher because of the strong adhesion of aluminium to steel. The hardness of the silicon surface alloyed material dropped when it underwent a heating cycle similar to the ion coating process. Hence, silicon alloying is not a suitable choice for use as an intermediate layer for duplex treatment

Silicon hybrid integration

International Nuclear Information System (INIS)

Li Xianyao; Yuan Taonu; Shao Shiqian; Shi Zujun; Wang Yi; Yu Yude; Yu Jinzhong

2011-01-01

Recently,much attention has concentrated on silicon based photonic integrated circuits (PICs), which provide a cost-effective solution for high speed, wide bandwidth optical interconnection and optical communication.To integrate III-V compounds and germanium semiconductors on silicon substrates,at present there are two kinds of manufacturing methods, i.e., heteroepitaxy and bonding. Low-temperature wafer bonding which can overcome the high growth temperature, lattice mismatch,and incompatibility of thermal expansion coefficients during heteroepitaxy, has offered the possibility for large-scale heterogeneous integration. In this paper, several commonly used bonding methods are reviewed, and the future trends of low temperature wafer bonding envisaged. (authors)

Flexible Thermoelectric Generators on Silicon Fabric

KAUST Repository

Sevilla, Galo T.

2012-11-01

In this work, the development of a Thermoelectric Generator on Flexible Silicon Fabric is explored to extend silicon electronics for flexible platforms. Low cost, easily deployable plastic based flexible electronics are of great interest for smart textile, wearable electronics and many other exciting applications. However, low thermal budget processing and fundamentally limited electron mobility hinders its potential to be competitive with well established and highly developed silicon technology. The use of silicon in flexible electronics involve expensive and abrasive materials and processes. In this work, high performance flexible thermoelectric energy harvesters are demonstrated from low cost bulk silicon (100) wafers. The fabrication of the micro- harvesters was done using existing silicon processes on silicon (100) and then peeled them off from the original substrate leaving it for reuse. Peeled off silicon has 3.6% thickness of bulk silicon reducing the thermal loss significantly and generating nearly 30% more output power than unpeeled harvesters. The demonstrated generic batch processing shows a pragmatic way of peeling off a whole silicon circuitry after conventional fabrication on bulk silicon wafers for extremely deformable high performance integrated electronics. In summary, by using a novel, low cost process, this work has successfully integrated existing and highly developed fabrication techniques to introduce a flexible energy harvester for sustainable applications.

Heterogeneously integrated silicon photonics for the mid-infrared and spectroscopic sensing.

Science.gov (United States)

Chen, Yu; Lin, Hongtao; Hu, Juejun; Li, Mo

2014-07-22

Besides being the foundational material for microelectronics, crystalline silicon has long been used for the production of infrared lenses and mirrors. More recently, silicon has become the key material to achieve large-scale integration of photonic devices for on-chip optical interconnect and signal processing. For optics, silicon has significant advantages: it offers a very high refractive index and is highly transparent in the spectral range from 1.2 to 8 μm. To fully exploit silicon’s superior performance in a remarkably broad range and to enable new optoelectronic functionalities, here we describe a general method to integrate silicon photonic devices on arbitrary foreign substrates. In particular, we apply the technique to integrate silicon microring resonators on mid-infrared compatible substrates for operation in the mid-infrared. These high-performance mid-infrared optical resonators are utilized to demonstrate, for the first time, on-chip cavity-enhanced mid-infrared spectroscopic analysis of organic chemicals with a limit of detection of less than 0.1 ng.

Silicon germanium as a novel mask for silicon deep reactive ion etching

KAUST Repository

Serry, Mohamed Y.; Rubin, Andrew; Ibrahem, Mohammed Aziz; Sedky, Sherif M.

2013-01-01

-removed after the process with high etching-rate by controlling the ICP and RF power and the SF6 to O2 ratios, and without affecting the underlying silicon substrate. Using low ICP and RF power, elevated temperatures (i.e., > - 80°C), and an adjusted O2:SF6

New techniques used to realize silicon photocells

International Nuclear Information System (INIS)

Siffert, P.

1978-01-01

The techniques used to realize the terrestrial silicon solar cells being considered the possible improvements of these methods are discussed. The various approaches under development to prepare silicon sheets in a continuous way are considered for both self-supporting or substrate deposited layers. Finally, the various methods used or under investigation to obtain the surface potential barrier are considered; MIS, heterojunction and ion implantation [fr

White-light emission from porous-silicon-aluminium Schottky junctions

International Nuclear Information System (INIS)

Masini, G.; La Monica, S.; Maiello, G.

1996-01-01

Porous-silicon-based white-light-emitting devices are presented. The fabrication process on different substrates is described. The peculiarities of technological steps for device fabrication (porous-silicon formation and aluminium treatment) are underlined. Doping profile of the porous layer, current-voltage characteristics, time response, lifetime tests and electroluminescence emission spectrum of the device are presented. A model for electrical behaviour of Al/porous silicon Schottky junction is presented. Electroluminescence spectrum of the presented devices showed strong similarities with white emission from crystalline silicon junctions in the breakdown region

Drift mechanism of mass transfer on heterogeneous reaction in crystalline silicon substrate

Energy Technology Data Exchange (ETDEWEB)

Kukushkin, S.A. [Institute of Problems of Mechanical Engineering, Russian Academy of Science, St Petersburg, 199178 (Russian Federation); St. Petersburg National Research University of Information Technologies, Mechanics and Optics, 197101 (Russian Federation); Osipov, A.V., E-mail: Andrey.V.Osipov@gmail.com [Institute of Problems of Mechanical Engineering, Russian Academy of Science, St Petersburg, 199178 (Russian Federation); St. Petersburg National Research University of Information Technologies, Mechanics and Optics, 197101 (Russian Federation)

2017-05-01

This work aims to study the pressure dependence of the thickness of the epitaxial silicon carbide film growing from crystalline silicon due to the heterogeneous reaction with gaseous carbon monoxide. It turned out that this dependence exhibits the clear maximum. On further pressure increasing the film thickness decreases. The theoretical model has been developed which explains such a character of the dependence by the fact that the gaseous silicon monoxide reaction product inhibits the drift of the gaseous reagent through the channels of a crystal lattice, thus decreasing their hydraulic diameter. In the proposed hydraulic model, the dependences of the film thickness both on the gas pressure and time have been calculated. It was shown that not only the qualitative but also quantitative correspondence between theoretical and experimental results takes place. As one would expect, due to the Einstein relation, at short growth times the drift model coincides with the diffusion one. Consequences of this drift mechanism of epitaxial film growing are discussed. - Graphical abstract: This work aims to study the pressure dependence of the thickness of the epitaxial silicon carbide film growing from crystalline silicon due to the heterogeneous reaction with gaseous carbon monoxide. It turned out that this dependence exhibits the clear maximum. On further pressure increasing the film thickness decreases. The theoretical model has been developed which explains such a character of the dependence by the fact that the gaseous silicon monoxide reaction product inhibits the drift of the gaseous reagent through the channels of a crystal lattice, thus decreasing their hydraulic diameter. - Highlights: • It is established that the greater pressure, the smaller is the reaction rate. • The reaction product prevents penetration of the reagent into a reaction zone. • For description the hydraulic model of crystal lattice channels is developed. • Theoretical results for polytropic

Synthesis and characterization of silicon-doped polycrystalline GaN ...

Indian Academy of Sciences (India)

Silicon-doped polycrystalline GaN films were successfully deposited at temperatures ranging from 300 to 623 K on fused silica and silicon substrates by radio frequency (r.f.) magnetron sputtering at a system pressure of ~ 5 Pa. The films were characterized by optical as well as microstructural measurements. The optical ...

Hemispherical cavities on silicon substrates: an overview of micro fabrication techniques

Science.gov (United States)

Poncelet, O.; Rasson, J.; Tuyaerts, R.; Coulombier, M.; Kotipalli, R.; Raskin, J.-P.; Francis, L. A.

2018-04-01

Hemispherical photonic crystals found in species like Papilio blumei and Cicendella chinensis have inspired new applications like anti-counterfeiting devices and gas sensors. In this work, we investigate and compare four different ways to micro fabricate such hemispherical cavities: using colloids as template, by wet (HNA) or dry (XeF2) isotropic etching of silicon and by electrochemical etching of silicon. The shape and the roughness of the obtained cavities have been discussed and the pros/cons for each method are highlighted.

Laser shock ignition of porous silicon based nano-energetic films

International Nuclear Information System (INIS)

Plummer, A.; Gascooke, J.; Shapter, J.; Kuznetsov, V. A.; Voelcker, N. H.

2014-01-01

Nanoporous silicon films on a silicon wafer were loaded with sodium perchlorate and initiated using illumination with infrared laser pulses to cause laser thermal ignition and laser-generated shock waves. Using Photon Doppler Velocimetry, it was determined that these waves are weak stress waves with a threshold intensity of 131 MPa in the silicon substrate. Shock generation was achieved through confinement of a plasma, generated upon irradiation of an absorptive paint layer held against the substrate side of the wafer. These stress waves were below the threshold required for sample fracturing. Exploiting either the laser thermal or laser-generated shock mechanisms of ignition may permit use of pSi energetic materials in applications otherwise precluded due to their environmental sensitivity

Laser shock ignition of porous silicon based nano-energetic films

Energy Technology Data Exchange (ETDEWEB)

Plummer, A.; Gascooke, J.; Shapter, J. [School of Chemical and Physical Sciences, Flinders University, 5042, Bedford Park (Australia); Centre of Expertise in Energetic Materials (CEEM), Bedford Park (Australia); Kuznetsov, V. A., E-mail: nico.voelcker@unisa.edu.au, E-mail: Valerian.Kuznetsov@dsto.defence.gov.au [School of Chemical and Physical Sciences, Flinders University, 5042, Bedford Park (Australia); Centre of Expertise in Energetic Materials (CEEM), Bedford Park (Australia); Weapons and Combat Systems Division, Defence Science and Technology Organisation, Edinburgh 5111 (Australia); Voelcker, N. H., E-mail: nico.voelcker@unisa.edu.au, E-mail: Valerian.Kuznetsov@dsto.defence.gov.au [Mawson Institute, University of South Australia, 5095, Mawson Lakes (Australia)

2014-08-07

Nanoporous silicon films on a silicon wafer were loaded with sodium perchlorate and initiated using illumination with infrared laser pulses to cause laser thermal ignition and laser-generated shock waves. Using Photon Doppler Velocimetry, it was determined that these waves are weak stress waves with a threshold intensity of 131 MPa in the silicon substrate. Shock generation was achieved through confinement of a plasma, generated upon irradiation of an absorptive paint layer held against the substrate side of the wafer. These stress waves were below the threshold required for sample fracturing. Exploiting either the laser thermal or laser-generated shock mechanisms of ignition may permit use of pSi energetic materials in applications otherwise precluded due to their environmental sensitivity.

Method of fabricating porous silicon carbide (SiC)

Science.gov (United States)

Shor, Joseph S. (Inventor); Kurtz, Anthony D. (Inventor)

1995-01-01

Porous silicon carbide is fabricated according to techniques which result in a significant portion of nanocrystallites within the material in a sub 10 nanometer regime. There is described techniques for passivating porous silicon carbide which result in the fabrication of optoelectronic devices which exhibit brighter blue luminescence and exhibit improved qualities. Based on certain of the techniques described porous silicon carbide is used as a sacrificial layer for the patterning of silicon carbide. Porous silicon carbide is then removed from the bulk substrate by oxidation and other methods. The techniques described employ a two-step process which is used to pattern bulk silicon carbide where selected areas of the wafer are then made porous and then the porous layer is subsequently removed. The process to form porous silicon carbide exhibits dopant selectivity and a two-step etching procedure is implemented for silicon carbide multilayers.

HRTEM analysis of the nanostructure of porous silicon

International Nuclear Information System (INIS)

Martin-Palma, R.J.; Pascual, L.; Landa-Canovas, A.R.; Herrero, P.; Martinez-Duart, J.M.

2006-01-01

The nanometric structure of porous silicon makes this material to be very suitable for its use in many different fields, including optoelectronics and biological applications. In the present work, the structure of porous silicon was investigated in detail by means of cross-sectional high-resolution transmission electron microscopy and digital image processing, together with electron energy loss spectroscopy. The structure of the Si/porous silicon interface and that of the silicon nanocrystals that compose porous silicon have been analyzed in detail. A strong strain contrast in the Si/porous silicon interface caused by high stresses was observed. Accordingly, dislocation pairs are found to be a possible mechanism of lattice matching between porous silicon and the Si substrate. Finally, high relative concentration of oxygen in the porous silicon layer was observed, together with low relative electron concentration in the conduction band when compared to Si

Formation and properties of porous silicon layers

International Nuclear Information System (INIS)

Vitanov, P.; Kamenova, M.; Dimova-Malinovska, D.

1993-01-01

Preparation, properties and application of porous silicon films are investigated. Porous silicon structures were formed by an electrochemical etching process resulting in selective dissolution of the silicon substrate. The silicon wafers used with a resistivity of 5-10Ω.cm were doped with B to concentrations 6x10 18 -1x10 19 Ω.cm -3 in the temperature region 950 o C-1050 o C. The density of each porous films was determined from the weight loss during the anodization and it depends on the surface resistivity of the Si wafer. The density decreases with decreasing of the surface resistivity. The surface of the porous silicon layers was studied by X-ray photoelectron spectroscopy which indicates the presence of SiF 4 . The kinetic dependence of the anode potential and the porous layer thickness on the time of anodization in a galvanostatic regime for the electrolytes with various HF concentration were studied. In order to compare the properties of the resulting porous layers and to establish the dependence of the porosity on the electrolyte, three types of electrolytes were used: concentrated HF, diluted HF:H 2 O=1:1 and ethanol-hydrofluoric solutions HF:C 2 H 5 OH:H 2 O=2:1:1. High quality uniform and reproducible layers were formed using aqueous-ethanol-hydrofluoric electrolyte. Both Kikuchi's line and ring patterns were observed by TEM. The porous silicon layer was single crystal with the same orientation as the substrate. The surface shows a polycrystalline structure only. The porous silicon layers exhibit visible photoluminescence (PL) at room temperature under 480 nm Ar + laser line excitation. The peak of PL was observed at about 730 nm with FWHM about 90 nm. Photodiodes was made with a W-porous silicon junction. The current voltage and capacity voltage characteristics were similar to those of an isotype heterojunction diode. (orig.)

Processing of n{sup +}/p{sup −}/p{sup +} strip detectors with atomic layer deposition (ALD) grown Al{sub 2}O{sub 3} field insulator on magnetic Czochralski silicon (MCz-si) substrates

Energy Technology Data Exchange (ETDEWEB)

Härkönen, J., E-mail: jaakko.harkonen@helsinki.fi [Helsinki Institute of Physics (Finland); Tuovinen, E. [Helsinki Institute of Physics (Finland); VTT Technical Research Centre of Finland, Microsystems and Nanoelectronics (Finland); Luukka, P.; Gädda, A.; Mäenpää, T.; Tuominen, E.; Arsenovich, T. [Helsinki Institute of Physics (Finland); Junkes, A. [Institute for Experimental Physics, University of Hamburg (Germany); Wu, X. [VTT Technical Research Centre of Finland, Microsystems and Nanoelectronics (Finland); Picosun Oy, Tietotie 3, FI-02150 Espoo Finland (Finland); Li, Z. [School of Materials Science and Engineering, Xiangtan University, Xiangtan, Hunan 411105 (China)

2016-08-21

Detectors manufactured on p-type silicon material are known to have significant advantages in very harsh radiation environment over n-type detectors, traditionally used in High Energy Physics experiments for particle tracking. In p-type (n{sup +} segmentation on p substrate) position-sensitive strip detectors, however, the fixed oxide charge in the silicon dioxide is positive and, thus, causes electron accumulation at the Si/SiO{sub 2} interface. As a result, unless appropriate interstrip isolation is applied, the n-type strips are short-circuited. Widely adopted methods to terminate surface electron accumulation are segmented p-stop or p-spray field implantations. A different approach to overcome the near-surface electron accumulation at the interface of silicon dioxide and p-type silicon is to deposit a thin film field insulator with negative oxide charge. We have processed silicon strip detectors on p-type Magnetic Czochralski silicon (MCz-Si) substrates with aluminum oxide (Al{sub 2}O{sub 3}) thin film insulator, grown with Atomic Layer Deposition (ALD) method. The electrical characterization by current–voltage and capacitance−voltage measurement shows reliable performance of the aluminum oxide. The final proof of concept was obtained at the test beam with 200 GeV/c muons. For the non-irradiated detector the charge collection efficiency (CCE) was nearly 100% with a signal-to-noise ratio (S/N) of about 40, whereas for the 2×10{sup 15} n{sub eq}/cm{sup 2} proton irradiated detector the CCE was 35%, when the sensor was biased at 500 V. These results are comparable with the results from p-type detectors with the p-spray and p-stop interstrip isolation techniques. In addition, interestingly, when the aluminum oxide was irradiated with Co-60 gamma-rays, an accumulation of negative fixed oxide charge in the oxide was observed.

An anisotropic thermal-stress model for through-silicon via

Science.gov (United States)

Liu, Song; Shan, Guangbao

2018-02-01

A two-dimensional thermal-stress model of through-silicon via (TSV) is proposed considering the anisotropic elastic property of the silicon substrate. By using the complex variable approach, the distribution of thermal-stress in the substrate can be characterized more accurately. TCAD 3-D simulations are used to verify the model accuracy and well agree with analytical results (model can be integrated into stress-driven design flow for 3-D IC , leading to the more accurate timing analysis considering the thermal-stress effect. Project supported by the Aerospace Advanced Manufacturing Technology Research Joint Fund (No. U1537208).

"Quelque part {u00E1 un tournant du destin..." ; "Ciel vide, bőte aux lettres vide, chemin vide..." ; "Singe indécis..." ; Ithaque / Tõnu Õnnepalu ; trad. par Antoine Chalvin avec le concours de l'auteur

Index Scriptorium Estoniae

Õnnepalu, Tõnu

1992-01-01

Orig.: "Kusagil saatuse käänakul..." ; "Tühi taevas, tühi postkast, tühi kruusatee..." ; "Otsustusvõimetu ahv..." ; Ithaka. Sisu: "Quelque part {u00E1 un tournant du destin..." ; "Ciel vide, bőte aux lettres vide, chemin vide..." ; "Singe indécis..." ; Ithaque. T. Õnnepalust lk. 93. Kadriann Soosaare illustratsioon lk. 97

Deposition of silicon films in presence of nitrogen plasma— A ...

Indian Academy of Sciences (India)

Unknown

Abstract. A design, development and validation work of plasma based 'activated reactive evaporation (ARE) system' is implemented for the deposition of the silicon films in presence of nitrogen plasma on substrate maintained at room temperature. This plasma based deposition system involves evaporation of pure silicon by.

Selective Growth and SERS Property of Gold Nanoparticles on Amorphized Silicon Surface

International Nuclear Information System (INIS)

Matsuoka, T; Nishi, M; Sakakura, M; Shimotsuma, Y; Miura, K; Hirao, K

2011-01-01

We have fabricated gold patterns on a silicon substrate by a simple three-step method using a focused ion beam (FIB). The obtained gold patterns consisted of a large number of gold nanoparticles which grew selectively on the preprocessed silicon surface from an Au ion-containing solution dropped on the substrate. The solution was prepared by reacting HAuCl 4 aqueous solution with (3-mercaptopropyl)trimethoxysilane (MPTMS). It was found that the size and shape of the precipitating gold nanoparticles is controllable by changing the mixing ratio between HAuCl 4 aqueous solution and MPTMS. Additionally, we confirmed that the fabricated gold structures were surface enhanced Raman scattering (SERS)-active; the enhanced Raman peaks of rhodamin 6G (R6G) were detected on the fabricated gold structures, whereas no peak was detected on the alternative silicon surface. We also demonstrated the gold patterning using a femtosecond laser instead of an FIB. We believe that our method is a favorable candidate for fabricating SERS-active substrates, since the substrates can be prepared very simply and flexibly.

Deep level transient spectroscopic investigation of phosphorus-doped silicon by self-assembled molecular monolayers.

Science.gov (United States)

Gao, Xuejiao; Guan, Bin; Mesli, Abdelmadjid; Chen, Kaixiang; Dan, Yaping

2018-01-09

It is known that self-assembled molecular monolayer doping technique has the advantages of forming ultra-shallow junctions and introducing minimal defects in semiconductors. In this paper, we report however the formation of carbon-related defects in the molecular monolayer-doped silicon as detected by deep-level transient spectroscopy and low-temperature Hall measurements. The molecular monolayer doping process is performed by modifying silicon substrate with phosphorus-containing molecules and annealing at high temperature. The subsequent rapid thermal annealing drives phosphorus dopants along with carbon contaminants into the silicon substrate, resulting in a dramatic decrease of sheet resistance for the intrinsic silicon substrate. Low-temperature Hall measurements and secondary ion mass spectrometry indicate that phosphorus is the only electrically active dopant after the molecular monolayer doping. However, during this process, at least 20% of the phosphorus dopants are electrically deactivated. The deep-level transient spectroscopy shows that carbon-related defects are responsible for such deactivation.

Optimization of plasma parameters for the production of silicon nano-crystals

CERN Document Server

Chaabane, N; Vach, H; Cabarrocas, P R I

2003-01-01

We use silane-hydrogen plasmas to synthesize silicon nano-crystals in the gas phase and thermophoresis to collect them onto a cooled substrate. To distinguish between nano-crystals formed in the plasma and those grown on the substrate, as a result of surface and subsurface reactions, we have simultaneously deposited films on a conventional substrate heated at 250 deg. C and on a second substrate cooled down to 90 deg. C. A series of samples deposited at various discharge pressures, in the range of 400 mTorr to 1.2 Torr, have been characterized by Raman spectroscopy and ellipsometry. At low pressure (400-500 mTorr), the films are amorphous on the cold substrate and micro-crystalline on the hot one. As pressure increases, gas phase reactions lead to the formation of nano-crystalline particles which are attracted by the cold substrate due to thermophoresis. Consequently, we obtain nano-crystalline silicon thin films on the cold substrate and amorphous thin films on the heated one in the pressure range of 600-900...

Nanodiamond resonators fabricated on 8″ Si substrates using adhesive wafer bonding

Science.gov (United States)

Lebedev, V.; Lisec, T.; Yoshikawa, T.; Reusch, M.; Iankov, D.; Giese, C.; Žukauskaitė, A.; Cimalla, V.; Ambacher, O.

2017-06-01

In this work, the adhesive wafer bonding of diamond thin films onto 8″ silicon substrates is reported. In order to characterize bonded nano-crystalline diamond layers, vibrometry and interferometry studies of micro-fabricated flexural beam and disk resonators were carried out. In particular, surface topology along with resonant frequencies, eigenmodes and mechanical quality factors were recorded and analyzed in order to obtain physical parameters of the transferred films. The vibration properties of the bonded resonators were compared to those fabricated directly on 3″ silicon substrates.

Sol-gel bonding of silicon wafers

International Nuclear Information System (INIS)

Barbe, C.J.; Cassidy, D.J.; Triani, G.; Latella, B.A.; Mitchell, D.R.G.; Finnie, K.S.; Short, K.; Bartlett, J.R.; Woolfrey, J.L.; Collins, G.A.

2005-01-01

Sol-gel bonds have been produced between smooth, clean silicon substrates by spin-coating solutions containing partially hydrolysed silicon alkoxides. The two coated substrates were assembled and the resulting sandwich fired at temperatures ranging from 60 to 600 deg. C. The sol-gel coatings were characterised using attenuated total reflectance Fourier transform infrared spectroscopy, ellipsometry, and atomic force microscopy, while the corresponding bonded specimens were investigated using scanning electron microscopy and cross-sectional transmission electron microscopy. Mechanical properties were characterised using both microindentation and tensile testing. Bonding of silicon wafers has been successfully achieved at temperatures as low as 60 deg. C. At 300 deg. C, the interfacial fracture energy was 1.55 J/m 2 . At 600 deg. C, sol-gel bonding provided superior interfacial fracture energy over classical hydrophilic bonding (3.4 J/m 2 vs. 1.5 J/m 2 ). The increase in the interfacial fracture energy is related to the increase in film density due to the sintering of the sol-gel interface with increasing temperature. The superior interfacial fracture energy obtained by sol-gel bonding at low temperature is due to the formation of an interfacial layer, which chemically bonds the two sol-gel coatings on each wafer. Application of a tensile stress on the resulting bond leads to fracture of the samples at the silicon/sol-gel interface

High mechanical Q-factor measurements on silicon bulk samples

Energy Technology Data Exchange (ETDEWEB)

Nawrodt, R; Zimmer, A; Koettig, T; Schwarz, C; Heinert, D; Hudl, M; Neubert, R; Thuerk, M; Nietzsche, S; Vodel, W; Seidel, P [Friedrich-Schiller-Universitaet, Institut fuer Festkoerperphysik, Helmholtzweg 5, D-07743 Jena (Germany); Tuennermann, A [Friedrich-Schiller-Universitaet, Institut fuer Angewandte Physik, Max-Wien-Platz 1, D-07743 Jena (Germany)], E-mail: ronny.nawrodt@uni-jena.de

2008-07-15

Future gravitational wave detectors will be limited by different kinds of noise. Thermal noise from the coatings and the substrate material will be a serious noise contribution within the detection band of these detectors. Cooling and the use of a high mechanical Q-factor material as a substrate material will reduce the thermal noise contribution from the substrates. Silicon is one of the most interesting materials for a third generation cryogenic detector. Due to the fact that the coefficient of thermal expansion vanishes at 18 and 125 K the thermoelastic contribution to the thermal noise will disappear. We present a systematic analysis of the mechanical Q-factor at low temperatures between 5 and 300 K on bulk silicon (100) samples which are boron doped. The thickness of the cylindrical samples is varied between 6, 12, 24, and 75mm with a constant diameter of 3 inches. For the 75mm substrate a comparison between the (100) and the (111) orientation is presented. In order to obtain the mechanical Q-factor a ring-down measurement is performed. Thus, the substrate is excited to resonant vibrations by means of an electrostatic driving plate and the subsequent ring-down is recorded using a Michelson-like interferometer. The substrate itself is suspended as a pendulum by means of a tungsten wire loop. All measurements are carried out in a special cryostat which provides a temperature stability of better than 0.1K between 5 and 300K during the experiment. The influence of the suspension on the measurements is experimentally investigated and discussed. At 5.8K a highest Q-factor of 4.5 x 10{sup 8} was achieved for the 14.9 kHz mode of a silicon (100) substrate with a diameter of 3 inches and a thickness of 12 mm.

Molecular dynamics study of interfacial thermal transport between silicene and substrates.

Science.gov (United States)

Zhang, Jingchao; Hong, Yang; Tong, Zhen; Xiao, Zhihuai; Bao, Hua; Yue, Yanan

2015-10-07

In this work, the interfacial thermal transport across silicene and various substrates, i.e., crystalline silicon (c-Si), amorphous silicon (a-Si), crystalline silica (c-SiO2) and amorphous silica (a-SiO2) are explored by classical molecular dynamics (MD) simulations. A transient pulsed heating technique is applied in this work to characterize the interfacial thermal resistance in all hybrid systems. It is reported that the interfacial thermal resistances between silicene and all substrates decrease nearly 40% with temperature from 100 K to 400 K, which is due to the enhanced phonon couplings from the anharmonicity effect. Analysis of phonon power spectra of all systems is performed to interpret simulation results. Contradictory to the traditional thought that amorphous structures tend to have poor thermal transport capabilities due to the disordered atomic configurations, it is calculated that amorphous silicon and silica substrates facilitate the interfacial thermal transport compared with their crystalline structures. Besides, the coupling effect from substrates can improve the interface thermal transport up to 43.5% for coupling strengths χ from 1.0 to 2.0. Our results provide fundamental knowledge and rational guidelines for the design and development of the next-generation silicene-based nanoelectronics and thermal interface materials.

Photoluminescence studies on porous silicon/polymer heterostructure

International Nuclear Information System (INIS)

Mishra, J.K.; Bhunia, S.; Banerjee, S.; Banerji, P.

2008-01-01

Hybrid devices formed by filling porous silicon with MEH-PPV or poly [2-methoxy-5(2-ethylhexyloxy-p-phenylenevinylene)] have been investigated in this work. Analyses of the structures by scanning electron microscopy (SEM) demonstrated that the porous silicon layer was filled by the polymer with no significant change of the structures except that the polymer was infiltrated in the pores. The photoluminescence (PL) of the structures at 300 K showed that the emission intensity was very high as compared with that of the MEH-PPV films on different substrates such as crystalline silicon (c-Si) and indium tin oxide (ITO). The PL peak in the MEH-PPV/porous silicon composite structure is found to be shifted towards higher energy in comparison with porous silicon PL. A number of possibilities are discussed to explain the observations

Structure and field emission of graphene layers on top of silicon nanowire arrays

International Nuclear Information System (INIS)

Huang, Bohr-Ran; Chan, Hui-Wen; Jou, Shyankay; Chen, Guan-Yu; Kuo, Hsiu-An; Song, Wan-Jhen

2016-01-01

Graphical abstract: - Highlights: • We prepared graphene on top of silicon nanowires by transfer-print technique. • Graphene changed from discrete flakes to a continuous by repeated transfer-print. • The triple-layer graphene had high electron field emission due to large edge ratio. - Abstract: Monolayer graphene was grown on copper foils and then transferred on planar silicon substrates and on top of silicon nanowire (SiNW) arrays to form single- to quadruple-layer graphene films. The morphology, structure, and electron field emission (FE) of these graphene films were investigated. The graphene films on the planar silicon substrates were continuous. The single- to triple-layer graphene films on the SiNW arrays were discontinuous and while the quadruple-layer graphene film featured a mostly continuous area. The Raman spectra of the graphene films on the SiNW arrays showed G and G′ bands with a singular-Lorentzian shape together with a weak D band. The D band intensity decreased as the number of graphene layers increased. The FE efficiency of the graphene films on the planar silicon substrates and the SiNW arrays varied with the number of graphene layers. The turn-on field for the single- to quadruple-layer graphene films on planar silicon substrates were 4.3, 3.7, 3.5 and 3.4 V/μm, respectively. The turn-on field for the single- to quadruple-layer graphene films on SiNW arrays decreased to 3.9, 3.3, 3.0 and 3.3 V/μm, respectively. Correlation of the FE with structure and morphology of the graphene films is discussed.

Structure and field emission of graphene layers on top of silicon nanowire arrays

Energy Technology Data Exchange (ETDEWEB)

Huang, Bohr-Ran; Chan, Hui-Wen [Graduate Institute of Electro-Optical Engineering and Department of Electronic Engineering, National Taiwan University of Science and Technology, Taipei 106, Taiwan (China); Jou, Shyankay, E-mail: sjou@mail.ntust.edu.tw [Department of Materials Science and Engineering, National Taiwan University of Science and Technology, Taipei 106, Taiwan (China); Chen, Guan-Yu [Graduate Institute of Electro-Optical Engineering and Department of Electronic Engineering, National Taiwan University of Science and Technology, Taipei 106, Taiwan (China); Kuo, Hsiu-An; Song, Wan-Jhen [Department of Materials Science and Engineering, National Taiwan University of Science and Technology, Taipei 106, Taiwan (China)

2016-01-30

Graphical abstract: - Highlights: • We prepared graphene on top of silicon nanowires by transfer-print technique. • Graphene changed from discrete flakes to a continuous by repeated transfer-print. • The triple-layer graphene had high electron field emission due to large edge ratio. - Abstract: Monolayer graphene was grown on copper foils and then transferred on planar silicon substrates and on top of silicon nanowire (SiNW) arrays to form single- to quadruple-layer graphene films. The morphology, structure, and electron field emission (FE) of these graphene films were investigated. The graphene films on the planar silicon substrates were continuous. The single- to triple-layer graphene films on the SiNW arrays were discontinuous and while the quadruple-layer graphene film featured a mostly continuous area. The Raman spectra of the graphene films on the SiNW arrays showed G and G′ bands with a singular-Lorentzian shape together with a weak D band. The D band intensity decreased as the number of graphene layers increased. The FE efficiency of the graphene films on the planar silicon substrates and the SiNW arrays varied with the number of graphene layers. The turn-on field for the single- to quadruple-layer graphene films on planar silicon substrates were 4.3, 3.7, 3.5 and 3.4 V/μm, respectively. The turn-on field for the single- to quadruple-layer graphene films on SiNW arrays decreased to 3.9, 3.3, 3.0 and 3.3 V/μm, respectively. Correlation of the FE with structure and morphology of the graphene films is discussed.

Microencapsulation of silicon cavities using a pulsed excimer laser

KAUST Repository

Sedky, Sherif M.

2012-06-07

This work presents a novel low thermal-budget technique for sealing micromachined cavities in silicon. Cavities are sealed without deposition, similar to the silicon surface-migration sealing process. In contrast to the 1100°C furnace anneal required for the migration process, the proposed technique uses short excimer laser pulses (24ns), focused onto an area of 23mm 2, to locally heat the top few microns of the substrate, while the bulk substrate remains near ambient temperature. The treatment can be applied to selected regions of the substrate, without the need for special surface treatments or a controlled environment. This work investigates the effect of varying the laser pulse energy from 400 mJ cm 2to 800 mJ cm 2, the pulse rate from 1Hz to 50Hz and the pulse count from 200 to 3000 pulses on sealing microfabricated cavities in silicon. An analytical model for the effect of holes on the surface temperature distribution is derived, which shows that much higher temperatures can be achieved by increasing the hole density. A mechanism for sealing the cavities is proposed, which indicates how complete sealing is feasible. © 2012 IOP Publishing Ltd.

Investigation of the silicon ion density during molecular beam epitaxy growth

Science.gov (United States)

Eifler, G.; Kasper, E.; Ashurov, Kh.; Morozov, S.

2002-05-01

Ions impinging on a surface during molecular beam epitaxy influence the growth and the properties of the growing layer, for example, suppression of dopant segregation and the generation of crystal defects. The silicon electron gun in the molecular beam epitaxy (MBE) equipment is used as a source for silicon ions. To use the effect of ion bombardment the mechanism of generation and distribution of ions was investigated. A monitoring system was developed and attached at the substrate position in the MBE growth chamber to measure the ion and electron densities towards the substrate. A negative voltage was applied to the substrate to modify the ion energy and density. Furthermore the current caused by charge carriers impinging on the substrate was measured and compared with the results of the monitoring system. The electron and ion densities were measured by varying the emission current of the e-gun achieving silicon growth rates between 0.07 and 0.45 nm/s and by changing the voltage applied to the substrate between 0 to -1000 V. The dependencies of ion and electron densities were shown and discussed within the framework of a simple model. The charged carrier densities measured with the monitoring system enable to separate the ion part of the substrate current and show its correlation to the generation rate. Comparing the ion density on the whole substrate and in the center gives a hint to the ion beam focusing effect. The maximum ion and electron current densities obtained were 0.40 and 0.61 μA/cm2, respectively.

Depth profiling using C60+ SIMS-Deposition and topography development during bombardment of silicon

International Nuclear Information System (INIS)

Gillen, Greg; Batteas, James; Michaels, Chris A.; Chi, Peter; Small, John; Windsor, Eric; Fahey, Albert; Verkouteren, Jennifer; Kim, K.J.

2006-01-01

A C 60 + primary ion source has been coupled to an ion microscope secondary ion mass spectrometry (SIMS) instrument to examine sputtering of silicon with an emphasis on possible application of C 60 + depth profiling for high depth resolution SIMS analysis of silicon semiconductor materials. Unexpectedly, C 60 + SIMS depth profiling of silicon was found to be complicated by the deposition of an amorphous carbon layer which buries the silicon substrate. Sputtering of the silicon was observed only at the highest accessible beam energies (14.5 keV impact) or by using oxygen backfilling. C 60 + SIMS depth profiling of As delta-doped test samples at 14.5 keV demonstrated a substantial (factor of 5) degradation in depth resolution compared to Cs + SIMS depth profiling. This degradation is thought to result from the formation of an unusual platelet-like grain structure on the SIMS crater bottoms. Other unusual topographical features were also observed on silicon substrates after high primary ion dose C 60 + bombardment

Self-diffusion in single crystalline silicon nanowires

Science.gov (United States)

Südkamp, T.; Hamdana, G.; Descoins, M.; Mangelinck, D.; Wasisto, H. S.; Peiner, E.; Bracht, H.

2018-04-01

Self-diffusion experiments in single crystalline isotopically controlled silicon nanowires with diameters of 70 and 400 nm at 850 and 1000 °C are reported. The isotope structures were first epitaxially grown on top of silicon substrate wafers. Nanowires were subsequently fabricated using a nanosphere lithography process in combination with inductively coupled plasma dry reactive ion etching. Three-dimensional profiling of the nanosized structure before and after diffusion annealing was performed by means of atom probe tomography (APT). Self-diffusion profiles obtained from APT analyses are accurately described by Fick's law for self-diffusion. Data obtained for silicon self-diffusion in nanowires are equal to the results reported for bulk silicon crystals, i.e., finite size effects and high surface-to-volume ratios do not significantly affect silicon self-diffusion. This shows that the properties of native point defects determined from self-diffusion in bulk crystals also hold for nanosized silicon structures with diameters down to 70 nm.

University Crystalline Silicon Photovoltaics Research and Development

Energy Technology Data Exchange (ETDEWEB)

Ajeet Rohatgi; Vijay Yelundur; Abasifreke Ebong; Dong Seop Kim

2008-08-18

The overall goal of the program is to advance the current state of crystalline silicon solar cell technology to make photovoltaics more competitive with conventional energy sources. This program emphasizes fundamental and applied research that results in low-cost, high-efficiency cells on commercial silicon substrates with strong involvement of the PV industry, and support a very strong photovoltaics education program in the US based on classroom education and hands-on training in the laboratory.

HNT neurons patterned on a parylene-C/silicon dioxide interface

International Nuclear Information System (INIS)

Unsworth, C.P.; Graham, E.S.; Dragunow, M.; Delivopoulos, E.; Murray, A.F.

2010-01-01

Full text: In this article, we describe how we have successfully patterned lines of human teratocarcinoma cell line-derived (HNT) neurons on silicon chip. The silicon chips used in this study were created by depositing lines of the biomaterial Parylene-C onto a silicon dioxide substrate using photolithographic techniques. The chips were then immersed in a range of serums and the HNT neurons cultured for different periods of time. It was found that chips immersed in Foetal Bovine Serum (FBS) and then plated with 70 cells per square mm for 3 h on a Parylene-C thickness of 100 nm provided excellent patterning on the Parylene-C material with a very sharp contrast to the silicon dioxide substrate. The human HNT neuron was chosen as it provides the closest model to adult human neural tissue. The breakthrough in patterning such cells on silicon chip has widespread implication and value as a platform technology; to enable a detailed study of adult human brain circuits for a range of adult human brain pathologies. This could eventually lead to potential new treatments and lead to the development of new drug assays. (author)

Charge trapping and carrier transport mechanism in silicon-rich silicon oxynitride

International Nuclear Information System (INIS)

Yu Zhenrui; Aceves, Mariano; Carrillo, Jesus; Lopez-Estopier, Rosa

2006-01-01

The charge-trapping and carrier transport properties of silicon-rich silicon oxynitride (SRO:N) were studied. The SRO:N films were deposited by low pressure chemical vapor deposition. Infrared (IR) and transmission electron microscopic (TEM) measurements were performed to characterize their structural properties. Capacitance versus voltage and current versus voltage measurements (I-V) were used to study the charge-trapping and carrier transport mechanism. IR and TEM measurements revealed the existence of Si nanodots in SRO:N films. I-V measurements revealed that there are two conduction regimes divided by a threshold voltage V T . When the applied voltage is smaller than V T , the current is dominated by the charge transfer between the SRO:N and substrate; and in this regime only dynamic charging/discharging of the SRO:N layer is observed. When the voltage is larger than V T , the current increases rapidly and is dominated by the Poole-Frenkel mechanism; and in this regime, large permanent trapped charge density is obtained. Nitrogen incorporation significantly reduced the silicon nanodots or defects near the SRO:N/Si interface. However, a significant increase of the density of silicon nanodot in the bulk of the SRO:N layer is obtained

Seedless electroplating on patterned silicon

NARCIS (Netherlands)

Vargas Llona, Laura Dolores; Jansen, Henricus V.; Elwenspoek, Michael Curt

2006-01-01

Nickel thin films have been electrodeposited without the use of an additional seed layer, on highly doped silicon wafers. These substrates conduct sufficiently well to allow deposition using a peripherical electrical contact on the wafer. Films 2 μm thick have been deposited using a nickel sulfamate

GaN-on-Silicon - Present capabilities and future directions

Science.gov (United States)

Boles, Timothy

2018-02-01

Gallium Nitride, in the form of epitaxial HEMT transistors on various substrate materials, is the newest and most promising semiconductor technology for high performance devices in the RF, microwave, and mmW arenas. This is particularly true for GaN-on-Silicon based devices and MMIC's which enable both state-of-the-art high frequency functionality and the ability to scale production into large wafer diameter CMOS foundries. The design and development of GaN-on-Silicon structures and devices will be presented beginning with the basic material parameters, growth of the required epitaxial construction, and leading to the fundamental operational theory of high frequency, high power HEMTs. In this discussion comparisons will be made with alternative substrate materials with emphasis on contrasting the inherent advantages of a silicon based system. Theory of operation of microwave and mmW high power HEMT devices will be presented with special emphasis on fundamental limitations of device performance including inherent frequency limiting transit time analysis, required impedance transformations, internal and external parasitic reactance, thermal impedance optimization, and challenges improved by full integration into monolithic MMICs. Lastly, future directions for implementing GaN-on-Silicon into mainstream CMOS silicon semiconductor technologies will be discussed.

An electrical characterization of a two-dimensional electron gas in GaN/AlGaN on silicon substrates

International Nuclear Information System (INIS)

Elhamri, S.; Berney, R.; Mitchel, W.C.; Mitchell, W.D.; Roberts, J.C.; Rajagopal, P.; Gehrke, T.; Piner, E.L.; Linthicum, K.J.

2004-01-01

We present results of transport measurements performed on AlGaN/GaN heterostructures grown on silicon substrates. Variable temperature Hall effect measurements revealed that the temperature dependence of the carrier density and mobility were characteristic of a two-dimensional electron gas (2DEG). Carrier densities greater than 1x10 13 cm -2 and Hall mobilities in excess of 1500 cm2/V s were measured at room temperature. Variable field Hall measurements at low temperatures, and in magnetic fields up to 6 T, indicated that conduction is dominated by a single carrier type in these samples. Shubnikov-de Haas (SdH) measurements were also performed, but no oscillations were observed in fields up to 8 T and at temperatures as low as 1.2 K. Illuminating some of the samples with a blue (λ=470 nm) light emitting diode (LED) induced a persistent increase in the carrier density. SdH measurements were repeated and again no oscillations were present following illumination. However, exposing the samples to radiation from an UV (λ=395 nm) LED induced well-defined SdH oscillations in fields as low as 4 T. The observation of SdH oscillations confirmed the presence of a 2DEG in these structures. It is hypothesized that small angle scattering suppressed the oscillations before exposure to UV light. This conclusion is supported by the observed increase in the quantum scattering time, τ q , with the carrier density and the calculated quantum to transport scattering times ratio, τ q /τ c . For instance, in one of the samples the τ q increased by 32% while the τ c changed by only 3% as the carrier density increased; an indication of an increase in the screening of small angle scattering. The absence of SdH oscillations in fields up to 8 T and at temperatures as low as 1.2 K is not unique to AlGaN/GaN on silicon. This behavior was observed in AlGaN/GaN on sapphire and on silicon carbide. SdH oscillations were observed in one AlGaN/GaN on silicon carbide sample following exposure to

Subsurface oxidation for micropatterning silicon (SOMS).

Science.gov (United States)

Zhang, Feng; Sautter, Ken; Davis, Robert C; Linford, Matthew R

2009-02-03

Here we present a straightforward patterning technique for silicon: subsurface oxidation for micropatterning silicon (SOMS). In this method, a stencil mask is placed above a silicon surface. Radio-frequency plasma oxidation of the substrate creates a pattern of thicker oxide in the exposed regions. Etching with HF or KOH produces very shallow or much higher aspect ratio features on silicon, respectively, where patterning is confirmed by atomic force microscopy, scanning electron microscopy, and optical microscopy. The oxidation process itself is studied under a variety of reaction conditions, including higher and lower oxygen pressures (2 and 0.5 Torr), a variety of powers (50-400 W), different times and as a function of reagent purity (99.5 or 99.994% oxygen). SOMS can be easily executed in any normal chemistry laboratory with a plasma generator. Because of its simplicity, it may have industrial viability.

GaN-on-silicon high-electron-mobility transistor technology with ultra-low leakage up to 3000 V using local substrate removal and AlN ultra-wide bandgap

Science.gov (United States)

Dogmus, Ezgi; Zegaoui, Malek; Medjdoub, Farid

2018-03-01

We report on extremely low off-state leakage current in AlGaN/GaN-on-silicon metal–insulator–semiconductor high-electron-mobility transistors (MISHEMTs) up to a high blocking voltage. Remarkably low off-state gate and drain leakage currents below 1 µA/mm up to 3 kV have been achieved owing to the use of a thick in situ SiN gate dielectric under the gate, and a local Si substrate removal technique combined with a cost effective 15-µm-thick AlN dielectric layer followed by a Cu deposition. This result establishes a manufacturable state-of-the-art high-voltage GaN-on-silicon power transistors while maintaining a low specific on-resistance of approximately 10 mΩ·cm2.

Multifunctional porous silicon nanopillar arrays: antireflection, superhydrophobicity, photoluminescence, and surface-enhanced Raman scattering

International Nuclear Information System (INIS)

Kiraly, Brian; Yang, Shikuan; Huang, Tony Jun

2013-01-01

We have fabricated porous silicon nanopillar arrays over large areas with a rapid, simple, and low-cost technique. The porous silicon nanopillars show unique longitudinal features along their entire length and have porosity with dimensions on the single-nanometer scale. Both Raman spectroscopy and photoluminescence data were used to determine the nanocrystallite size to be <3 nm. The porous silicon nanopillar arrays also maintained excellent ensemble properties, reducing reflection nearly fivefold from planar silicon in the visible range without any optimization, and approaching superhydrophobic behavior with increasing aspect ratio, demonstrating contact angles up to 138°. Finally, the porous silicon nanopillar arrays were made into sensitive surface-enhanced Raman scattering (SERS) substrates by depositing metal onto the pillars. The SERS performance of the substrates was demonstrated using a chemical dye Rhodamine 6G. With their multitude of properties (i.e., antireflection, superhydrophobicity, photoluminescence, and sensitive SERS), the porous silicon nanopillar arrays described here can be valuable in applications such as solar harvesting, electrochemical cells, self-cleaning devices, and dynamic biological monitoring. (paper)

Femtosecond laser irradiation-induced infrared absorption on silicon surfaces

Directory of Open Access Journals (Sweden)

Qinghua Zhu

2015-04-01

Full Text Available The near-infrared (NIR absorption below band gap energy of crystalline silicon is significantly increased after the silicon is irradiated with femtosecond laser pulses at a simple experimental condition. The absorption increase in the NIR range primarily depends on the femtosecond laser pulse energy, pulse number, and pulse duration. The Raman spectroscopy analysis shows that after the laser irradiation, the silicon surface consists of silicon nanostructure and amorphous silicon. The femtosecond laser irradiation leads to the formation of a composite of nanocrystalline, amorphous, and the crystal silicon substrate surface with microstructures. The composite has an optical absorption enhancement at visible wavelengths as well as at NIR wavelength. The composite may be useful for an NIR detector, for example, for gas sensing because of its large surface area.

The status of silicon ribbon growth technology for high-efficiency silicon solar cells

Science.gov (United States)

Ciszek, T. F.

1985-01-01

More than a dozen methods have been applied to the growth of silicon ribbons, beginning as early as 1963. The ribbon geometry has been particularly intriguing for photovoltaic applications, because it might provide large area, damage free, nearly continuous substrates without the material loss or cost of ingot wafering. In general, the efficiency of silicon ribbon solar cells has been lower than that of ingot cells. The status of some ribbon growth techniques that have achieved laboratory efficiencies greater than 13.5% are reviewed, i.e., edge-defined, film-fed growth (EFG), edge-supported pulling (ESP), ribbon against a drop (RAD), and dendritic web growth (web).

Interfacial Effects on the Spherulitic Morphology of Isotactic Polystyrene Thin Films on Liquid Substrates

Directory of Open Access Journals (Sweden)

Takashi Sasaki

2016-01-01

Full Text Available The influence of interfaces on the morphology of flat spherulites of isotactic polystyrene (iPS grown in thin films on liquid substrates was investigated. Amorphous iPS thin films spin-cast from a solution were annealed for cold crystallization on glycerol and silicone oil (nonsolvents for iPS. The number density of grown spherulites was revealed to be higher on the glycerol substrate than on the silicone oil substrate. This implies that the primary nucleation rate of crystallization is greater at the iPS/glycerol interface than at the iPS/silicone oil interface. The results may be consistent with the previous findings that concern the molecular interaction between atactic polystyrene and nonsolvents at the interface. In some cases, holes were formed in the thin films during the cold crystallization due to dewetting, which also significantly affect the spherulite morphology via, for example, transcrystallization.

Thermoelectric characteristics of Pt-silicide/silicon multi-layer structured p-type silicon

International Nuclear Information System (INIS)

Choi, Wonchul; Jun, Dongseok; Kim, Soojung; Shin, Mincheol; Jang, Moongyu

2015-01-01

Electric and thermoelectric properties of silicide/silicon multi-layer structured devices were investigated with the variation of silicide/silicon heterojunction numbers from 3 to 12 layers. For the fabrication of silicide/silicon multi-layered structure, platinum and silicon layers are repeatedly sputtered on the (100) silicon bulk substrate and rapid thermal annealing is carried out for the silicidation. The manufactured devices show ohmic current–voltage (I–V) characteristics. The Seebeck coefficient of bulk Si is evaluated as 195.8 ± 15.3 μV/K at 300 K, whereas the 12 layered silicide/silicon multi-layer structured device is evaluated as 201.8 ± 9.1 μV/K. As the temperature increases to 400 K, the Seebeck coefficient increases to 237.2 ± 4.7 μV/K and 277.0 ± 1.1 μV/K for bulk and 12 layered devices, respectively. The increase of Seebeck coefficient in multi-layered structure is mainly attributed to the electron filtering effect due to the Schottky barrier at Pt-silicide/silicon interface. At 400 K, the thermal conductivity is reduced by about half of magnitude compared to bulk in multi-layered device which shows the efficient suppression of phonon propagation by using Pt-silicide/silicon hetero-junctions. - Highlights: • Silicide/silicon multi-layer structured is proposed for thermoelectric devices. • Electric and thermoelectric properties with the number of layer are investigated. • An increase of Seebeck coefficient is mainly attributed the Schottky barrier. • Phonon propagation is suppressed with the existence of Schottky barrier. • Thermal conductivity is reduced due to the suppression of phonon propagation

A capillary pumping device utilizing super-hydrophobic silicon grass

International Nuclear Information System (INIS)

Kung, Chun-Fei; Chang, Chien-Cheng; Chu, Chin-Chou

2011-01-01

In this study, we show that a compact silicon grass surface can be generated by utilizing the induced coupled plasma method with suitably chosen fabrication parameters. This super-hydrophobic structure suspends deionized water on top of the grass and keeps the contact angle at around 153°. The silicon grass is used to improve the driving efficiency of a capillary pumping micro-duct (without sidewalls), which is completely defined by a bottom hydrophilic stripe (adjacent to a Teflon substrate) and a fully top-covered hydrophobic Teflon surface which is coated on a glass substrate. The channel has a height of 3 µm and a width of 100 µm. In this work, the Teflon substrate is replaced with the silicon grass surface. When the fluid is flowing through the micro-duct on the stripe, the interface between the silicon grass and the hydrophilic stripe forms a stable air cushion barrier to the fluid, thus effectively reducing the frictional force. By changing only the interface with this replacement, we demonstrate that the average measured velocities of the new design show improvements of 21% and 17% in the driving efficiency over the original design for transporting deionized water and human blood, respectively. It is also shown that the measured data of the present design are closer to the values predicted by a theoretical analysis which relates the flow velocity to the contact angles, surface tension and fluid viscosity

Photonic and plasmonic guided modes in graphene-silicon photonic crystals

DEFF Research Database (Denmark)

Gu, Tingyi; Andryieuski, Andrei; Hao, Yufeng

2016-01-01

We report the results of systematic studies of plasmonic and photonic guided modes in large-area single-layer graphene integrated into a nanostructured silicon substrate. The interaction of light with graphene and substrate photonic crystals can be classified in distinct regimes of plasmonic...... and photonic modes....

Single-crystal-like GdNdO{sub x} thin films on silicon substrates by magnetron sputtering and high-temperature annealing for crystal seed layer application

Energy Technology Data Exchange (ETDEWEB)

Wang, Ziwei; Xiao, Lei; Liang, Renrong, E-mail: wang-j@tsinghua.edu.cn, E-mail: liangrr@tsinghua.edu.cn; Shen, Shanshan; Xu, Jun; Wang, Jing, E-mail: wang-j@tsinghua.edu.cn, E-mail: liangrr@tsinghua.edu.cn [Tsinghua National Laboratory for Information Science and Technology, Institute of Microelectronics, Tsinghua University, Beijing 100084 (China)

2016-06-15

Single-crystal-like rare earth oxide thin films on silicon (Si) substrates were fabricated by magnetron sputtering and high-temperature annealing processes. A 30-nm-thick high-quality GdNdO{sub x} (GNO) film was deposited using a high-temperature sputtering process at 500°C. A Gd{sub 2}O{sub 3} and Nd{sub 2}O{sub 3} mixture was used as the sputtering target, in which the proportions of Gd{sub 2}O{sub 3} and Nd{sub 2}O{sub 3} were controlled to make the GNO’s lattice parameter match that of the Si substrate. To further improve the quality of the GNO film, a post-deposition annealing process was performed at a temperature of 1000°C. The GNO films exhibited a strong preferred orientation on the Si substrate. In addition, an Al/GNO/Si capacitor was fabricated to evaluate the dielectric constant and leakage current of the GNO films. It was determined that the single-crystal-like GNO films on the Si substrates have potential for use as an insulator layer for semiconductor-on-insulator and semiconductor/insulator multilayer applications.

InGaAs quantum dots grown by molecular beam epitaxy for light emission on Si substrates.

Science.gov (United States)

Bru-Chevallier, C; El Akra, A; Pelloux-Gervais, D; Dumont, H; Canut, B; Chauvin, N; Regreny, P; Gendry, M; Patriarche, G; Jancu, J M; Even, J; Noe, P; Calvo, V; Salem, B

2011-10-01

The aim of this study is to achieve homogeneous, high density and dislocation free InGaAs quantum dots grown by molecular beam epitaxy for light emission on silicon substrates. This work is part of a project which aims at overcoming the severe limitation suffered by silicon regarding its optoelectronic applications, especially efficient light emission device. For this study, one of the key points is to overcome the expected type II InGaAs/Si interface by inserting the InGaAs quantum dots inside a thin silicon quantum well in SiO2 fabricated on a SOI substrate. Confinement effects of the Si/SiO2 quantum well are expected to heighten the indirect silicon bandgap and then give rise to a type I interface with the InGaAs quantum dots. Band structure and optical properties are modeled within the tight binding approximation: direct energy bandgap is demonstrated in SiO2/Si/InAs/Si/SiO2 heterostructures for very thin Si layers and absorption coefficient is calculated. Thinned SOI substrates are successfully prepared using successive etching process resulting in a 2 nm-thick Si layer on top of silica. Another key point to get light emission from InGaAs quantum dots is to avoid any dislocations or defects in the quantum dots. We investigate the quantum dot size distribution, density and structural quality at different V/III beam equivalent pressure ratios, different growth temperatures and as a function of the amount of deposited material. This study was performed for InGaAs quantum dots grown on Si(001) substrates. The capping of InGaAs quantum dots by a silicon epilayer is performed in order to get efficient photoluminescence emission from quantum dots. Scanning transmission electronic microscopy images are used to study the structural quality of the quantum dots. Dislocation free In50Ga50As QDs are successfully obtained on a (001) silicon substrate. The analysis of QDs capped with silicon by Rutherford Backscattering Spectrometry in a channeling geometry is also presented.

Characterization of electrical and optical properties of silicon based materials

Energy Technology Data Exchange (ETDEWEB)

Jia, Guobin

2009-12-04

In this work, the electrical and luminescence properties of a series of silicon based materials used for photovoltaics, microelectronics and nanoelectronics have been investigated by means of electron beam induced current (EBIC), cathodoluminescence (CL), photoluminescence (PL) and electroluminescence (EL) methods. Photovoltaic materials produced by block casting have been investigated by EBIC on wafers sliced from different parts of the ingot. Various solar cell processings have been compared in parallel wafers by means of EBIC collection efficiency measurements and contrast-temperature C(T) behaviors of the extended defects, i. e. dislocations and grain boundaries (GBs). It was found that the solar cell processing with phosphorus diffusion gettering (PDG) followed with a SiN firing greatly reduces the recombination activity of extended defects at room temperature, and improves the bulk property simultaneously. A remaining activity of the dislocations indicates the limitation of the PDG at extended defects. Abnormal behavior of the dislocation activity after certain solar cell processes was also observed in the region with high dislocation density, the dislocations are activated after certain solar cell processings. In order to evaluate the properties of a thin polycrystalline silicon layer prepared by Al-induced layer exchange (Alile) technique, epitaxially layer grown on silicon substrate with different orientations was used as a model system to investigate the impact by the process temperature and the substrates. EBIC energy dependent collection efficiency measurements reveal an improvement of the epilayer quality with increasing substrate temperature during the growth from 450 C to 650 C, and a decrease of epilayer quality at 700 C. PL measurements on the epitaxially grown Si layer on silicon substrates revealed no characteristic dislocation-related luminescence (DRL) lines at room temperature and 77 K, while in the samples prepared by Alile process, intense

Fluorescence and thermoluminescence in silicon oxide films rich in silicon; Fluorescencia y termoluminiscencia en peliculas de oxido de silicio rico en silicio

Energy Technology Data Exchange (ETDEWEB)

Berman M, D.; Piters, T. M. [Centro de Investigacion en Fisica, Universidad de Sonora, Apdo. Postal 5-088, Hermosillo 83190, Sonora (Mexico); Aceves M, M.; Berriel V, L. R. [Instituto Nacional de Astrofisica, Optica y Electronica, Apdo. Postal 51, Puebla 72000, Puebla (Mexico); Luna L, J. A. [CIDS, Benemerita Universidad Autonoma de Puebla, Apdo. Postal 1651, Puebla 72000, Puebla (Mexico)

2009-10-15

In this work we determined the fluorescence and thermoluminescence (TL) creation spectra of silicon rich oxide films (SRO) with three different silicon excesses. To study the TL of SRO, 550 nm of SRO film were deposited by Low Pressure Chemical Vapor Deposition technique on N-type silicon substrates with resistivity in the order of 3 to 5 {omega}-cm with silicon excess controlled by the ratio of the gases used in the process, SRO films with Ro= 10, 20 and 30 (12-6% silicon excess) were obtained. Then, they were thermally treated in N{sub 2} at high temperatures to diffuse and homogenize the silicon excess. In the fluorescence spectra two main emission regions are observed, one around 400 nm and one around 800 nm. TL creation spectra were determined by plotting the integrated TL intensity as function of the excitation wavelength. (Author)

Silicon sensor probing and radiation studies for the LHCb silicon tracker

International Nuclear Information System (INIS)

Lois, Cristina

2006-01-01

The LHCb Silicon Tracker (ST) will be built using silicon micro-strip technology. A total of 1400 sensors, with strip pitches of approximately 200μm and three different substrate thicknesses, will be used to cover the sensitive area with readout strips up to 38cm in length. We present the quality assurance program followed by the ST group together with the results obtained for the first batches of sensors from the main production. In addition, we report on an investigation of the radiation hardness of the sensors. Prototype sensors were irradiated with 24GeV/c protons up to fluences equivalent to 20 years of LHCb operation. The damage coefficient for the leakage current was studied, and full depletion voltages were determined

Manipulation of extinction spectra of P3HT/PMMA medium arrays on silicon substrate containing self-assembled gold nanoparticles

International Nuclear Information System (INIS)

Wu, Ming-Chung; Chen, Shih-Wen; Li, Jia-Han; Chou, Yi; Lin, Jhih-Fong; Chen, Yang-Fang; Su, Wei-Fang

2012-01-01

In this study, we report a simple novel approach to modulate the extinction spectra of P3HT/PMMA by manipulating the medium arrays on a substrate that is coated with self-assembled gold nanoparticles. The 20 nm gold nanoparticles were synthesized and then self-assembled on the APTMS/silicon substrate surface by immersing the substrate into the gold colloid suspension. A high-resolution P3HT/PMMA photoluminescent electron beam resist was used to fabricate various square hole arrays on the substrate containing gold nanoparticles. The P3HT/PMMA medium composition causes the blue shifts in the extinction peaks of up to 40.6 nm by decreasing the period from 500 nm to 200 nm for P3HT/PMMA square hole arrays with a diameter of 100 nm. The magnitude of blue shift is directly proportional to the product of the changes of medium refractive index and the array structure factor. These peak shifts and intensity of extinction spectra for various P3HT/PMMA medium arrays are well described by the finite-difference time-domain (FDTD) simulation results. Since this simple cost-effective technique can tune the extinction spectrum of medium and adding the gold nanoparticles can give more functionalities for sensing applications, such as surface-enhanced Raman scattering (SERS), that provides good opportunities for the design and fabrication of new optoelectronic devices and sensors. Highlights: ► We can tune the extinction spectra of P3HT/PMMA by manipulating the medium arrays. ► These optical behaviors of P3HT/PMMA medium arrays are well described by FDTD simulation results. ► Adding the Au nanoparticles can give more functionalities for sensing applications.

Manipulation of extinction spectra of P3HT/PMMA medium arrays on silicon substrate containing self-assembled gold nanoparticles

Energy Technology Data Exchange (ETDEWEB)

Wu, Ming-Chung [Department of Chemical and Materials Engineering, Chang Gung University, Taoyuan 333-02, Taiwan (China); Chen, Shih-Wen; Li, Jia-Han [Department of Engineering Science and Ocean Engineering, National Taiwan University, Taipei 106-17, Taiwan (China); Chou, Yi; Lin, Jhih-Fong [Department of Materials Science and Engineering, National Taiwan University, Taipei 106-17, Taiwan (China); Chen, Yang-Fang [Department of Physics, National Taiwan University, Taipei 106-17, Taiwan (China); Su, Wei-Fang, E-mail: suwf@ntu.edu.tw [Department of Materials Science and Engineering, National Taiwan University, Taipei 106-17, Taiwan (China)

2012-11-15

In this study, we report a simple novel approach to modulate the extinction spectra of P3HT/PMMA by manipulating the medium arrays on a substrate that is coated with self-assembled gold nanoparticles. The 20 nm gold nanoparticles were synthesized and then self-assembled on the APTMS/silicon substrate surface by immersing the substrate into the gold colloid suspension. A high-resolution P3HT/PMMA photoluminescent electron beam resist was used to fabricate various square hole arrays on the substrate containing gold nanoparticles. The P3HT/PMMA medium composition causes the blue shifts in the extinction peaks of up to 40.6 nm by decreasing the period from 500 nm to 200 nm for P3HT/PMMA square hole arrays with a diameter of 100 nm. The magnitude of blue shift is directly proportional to the product of the changes of medium refractive index and the array structure factor. These peak shifts and intensity of extinction spectra for various P3HT/PMMA medium arrays are well described by the finite-difference time-domain (FDTD) simulation results. Since this simple cost-effective technique can tune the extinction spectrum of medium and adding the gold nanoparticles can give more functionalities for sensing applications, such as surface-enhanced Raman scattering (SERS), that provides good opportunities for the design and fabrication of new optoelectronic devices and sensors. Highlights: Black-Right-Pointing-Pointer We can tune the extinction spectra of P3HT/PMMA by manipulating the medium arrays. Black-Right-Pointing-Pointer These optical behaviors of P3HT/PMMA medium arrays are well described by FDTD simulation results. Black-Right-Pointing-Pointer Adding the Au nanoparticles can give more functionalities for sensing applications.

Hybrid III-V/silicon lasers

Science.gov (United States)

Kaspar, P.; Jany, C.; Le Liepvre, A.; Accard, A.; Lamponi, M.; Make, D.; Levaufre, G.; Girard, N.; Lelarge, F.; Shen, A.; Charbonnier, P.; Mallecot, F.; Duan, G.-H.; Gentner, J.-.; Fedeli, J.-M.; Olivier, S.; Descos, A.; Ben Bakir, B.; Messaoudene, S.; Bordel, D.; Malhouitre, S.; Kopp, C.; Menezo, S.

2014-05-01

The lack of potent integrated light emitters is one of the bottlenecks that have so far hindered the silicon photonics platform from revolutionizing the communication market. Photonic circuits with integrated light sources have the potential to address a wide range of applications from short-distance data communication to long-haul optical transmission. Notably, the integration of lasers would allow saving large assembly costs and reduce the footprint of optoelectronic products by combining photonic and microelectronic functionalities on a single chip. Since silicon and germanium-based sources are still in their infancy, hybrid approaches using III-V semiconductor materials are currently pursued by several research laboratories in academia as well as in industry. In this paper we review recent developments of hybrid III-V/silicon lasers and discuss the advantages and drawbacks of several integration schemes. The integration approach followed in our laboratory makes use of wafer-bonded III-V material on structured silicon-on-insulator substrates and is based on adiabatic mode transfers between silicon and III-V waveguides. We will highlight some of the most interesting results from devices such as wavelength-tunable lasers and AWG lasers. The good performance demonstrates that an efficient mode transfer can be achieved between III-V and silicon waveguides and encourages further research efforts in this direction.

Helium ion beam induced electron emission from insulating silicon nitride films under charging conditions

Science.gov (United States)

Petrov, Yu. V.; Anikeva, A. E.; Vyvenko, O. F.

2018-06-01

Secondary electron emission from thin silicon nitride films of different thicknesses on silicon excited by helium ions with energies from 15 to 35 keV was investigated in the helium ion microscope. Secondary electron yield measured with Everhart-Thornley detector decreased with the irradiation time because of the charging of insulating films tending to zero or reaching a non-zero value for relatively thick or thin films, respectively. The finiteness of secondary electron yield value, which was found to be proportional to electronic energy losses of the helium ion in silicon substrate, can be explained by the electron emission excited from the substrate by the helium ions. The method of measurement of secondary electron energy distribution from insulators was suggested, and secondary electron energy distribution from silicon nitride was obtained.

High Efficiency, Low Cost Solar Cells Manufactured Using 'Silicon Ink' on Thin Crystalline Silicon Wafers

Energy Technology Data Exchange (ETDEWEB)

Antoniadis, H.

2011-03-01

Reported are the development and demonstration of a 17% efficient 25mm x 25mm crystalline Silicon solar cell and a 16% efficient 125mm x 125mm crystalline Silicon solar cell, both produced by Ink-jet printing Silicon Ink on a thin crystalline Silicon wafer. To achieve these objectives, processing approaches were developed to print the Silicon Ink in a predetermined pattern to form a high efficiency selective emitter, remove the solvents in the Silicon Ink and fuse the deposited particle Silicon films. Additionally, standard solar cell manufacturing equipment with slightly modified processes were used to complete the fabrication of the Silicon Ink high efficiency solar cells. Also reported are the development and demonstration of a 18.5% efficient 125mm x 125mm monocrystalline Silicon cell, and a 17% efficient 125mm x 125mm multicrystalline Silicon cell, by utilizing high throughput Ink-jet and screen printing technologies. To achieve these objectives, Innovalight developed new high throughput processing tools to print and fuse both p and n type particle Silicon Inks in a predetermined pat-tern applied either on the front or the back of the cell. Additionally, a customized Ink-jet and screen printing systems, coupled with customized substrate handling solution, customized printing algorithms, and a customized ink drying process, in combination with a purchased turn-key line, were used to complete the high efficiency solar cells. This development work delivered a process capable of high volume producing 18.5% efficient crystalline Silicon solar cells and enabled the Innovalight to commercialize its technology by the summer of 2010.

Observation of time-varying photoconductivity and persistent photoconductivity in porous silicon

DEFF Research Database (Denmark)

Frello, T.; Veje, E.; Leistiko, Otto

1996-01-01

We have observed time-varying photoconductivity and persistent photoconductivity in porous silicon, both with time-evolution scales of the order of several minutes or hours. The time evolutions depend on the wavelength and the intensity of the illuminating light. The data indicate the presence...... of at least two competing mechanisms, one is tentatively related to photoinduced creation of charge carriers in the silicon substrate followed by diffusion into the porous silicon layer, and the other is tentatively related to desorption of hydrogen from the porous silicon. ©1996 American Institute of Physics....

Nickel-induced crystallization of amorphous silicon

Energy Technology Data Exchange (ETDEWEB)

Schmidt, J A; Arce, R D; Buitrago, R H [INTEC (CONICET-UNL), Gueemes 3450, S3000GLN Santa Fe (Argentina); Budini, N; Rinaldi, P, E-mail: jschmidt@intec.unl.edu.a [FIQ - UNL, Santiago del Estero 2829, S3000AOM Santa Fe (Argentina)

2009-05-01

The nickel-induced crystallization of hydrogenated amorphous silicon (a-Si:H) is used to obtain large grained polycrystalline silicon thin films on glass substrates. a-Si:H is deposited by plasma enhanced chemical vapour deposition at 200 deg. C, preparing intrinsic and slightly p-doped samples. Each sample was divided in several pieces, over which increasing Ni concentrations were sputtered. Two crystallization methods are compared, conventional furnace annealing (CFA) and rapid thermal annealing (RTA). The crystallization was followed by optical microscopy and scanning electron microscopy observations, X-ray diffraction, and reflectance measurements in the UV region. The large grain sizes obtained - larger than 100{mu}m for the samples crystallized by CFA - are very encouraging for the preparation of low-cost thin film polycrystalline silicon solar cells.

Structural, optical and electrical properties of quasi-monocrystalline silicon thin films obtained by rapid thermal annealing of porous silicon layers

International Nuclear Information System (INIS)

Hajji, M.; Khardani, M.; Khedher, N.; Rahmouni, H.; Bessais, B.; Ezzaouia, H.; Bouchriha, H.

2006-01-01

Quasi-mono-crystalline silicon (QMS) layers have a top surface like crystalline silicon with small voids in the body. Such layers are reported to have a higher absorption coefficient than crystalline silicon at the interesting range of the solar spectrum for photovoltaic application. In this work we present a study of the structural, optical and electrical properties of quasimonocrystalline silicon thin films. Quasimonocrystalline silicon thin films were obtained from porous silicon, which has been annealed at a temperature ranging from 950 to 1050 deg. C under H 2 atmosphere for different annealing durations. The porous layers were prepared by conventional electrochemical anodization using a double tank cell and a HF / Ethanol electrolyte. Porous silicon is formed on highly doped p + -type silicon substrates that enable us to prevent back contacts for the anodization. Atomic Force Microscope (AFM) was used to study the morphological quality of the prepared layers. Optical properties were extracted from transmission and reflectivity spectra. Dark I-V characteristics were used to determine the electrical conductivity of quasimonocrystalline silicon thin films. Results show an important improvement of the absorption coefficient of the material and electrical conductivity reaches a value of twenty orders higher than that of starting mesoporous silicon

Silicon oxide barrier films deposited on PET foils in pulsed plasmas: influence of substrate bias on deposition process and film properties

International Nuclear Information System (INIS)

Steves, S; Bibinov, N; Awakowicz, P; Ozkaya, B; Liu, C-N; Ozcan, O; Grundmeier, G

2013-01-01

A widely used plastic for packaging, polyethylene terephtalate (PET) offers limited barrier properties against gas permeation. For many applications of PET (from food packaging to micro electronics) improved barrier properties are essential. A silicon oxide barrier coating of PET foils is applied by means of a pulsed microwave driven low-pressure plasma. While the adjustment of the microwave power allows for a control of the ion production during the plasma pulse, a substrate bias controls the energy of ions impinging on the substrate. Detailed analysis of deposited films applying oxygen permeation measurements, x-ray photoelectron spectroscopy and atomic force microscopy are correlated with results from plasma diagnostics describing the deposition process. The influence of a change in process parameters such as gas mixture and substrate bias on the gas temperature, electron density, mean electron energy, ion energy and the atomic oxygen density is studied. An additional substrate bias results in an increase in atomic oxygen density up to a factor of 6, although plasma parameter such as electron density of n e = 3.8 ± 0.8 × 10 17 m −3 and electron temperature of k B T e = 1.7 ± 0.1 eV are unmodified. It is shown that atomic oxygen densities measured during deposition process higher than n O = 1.8 × 10 21 m −3 yield in barrier films with a barrier improvement factor up to 150. Good barrier films are highly cross-linked and show a smooth morphology. (paper)

Impact of substrate on performance of band gap engineered graphene field effect transistor

Science.gov (United States)

Tiwari, Durgesh Laxman; Sivasankaran, K.

2018-01-01

In this paper, we investigate the graphene field effect transistor (G-FET) to enhance the drain current saturation and to minimize the drain conductance (gd) using numerical simulation. This work focus on suppressing the drain conductance using silicon substrate. We studied the impact of different substrate on the performance of band gap engineered G-FET device. We used a non-equilibrium green function with mode space (NEGF_MS) to model the transport behavior of carriers for 10 nm channel length G-FET device. We compared the drain current saturation of G-FET at higher drain voltage regime on silicon, SiC, and the SiO2 substrate. This paper clearly demonstrates the effect of substrate on an electric field near drain region of G-FET device. It is shown that the substrate of G-FET is not only creating a band gap in graphene, which is important for current saturation and gd minimization, but also selection of suitable substrate can suppress generation of carrier concentration near drain region is also important.

Observation of a photoinduced, resonant tunneling effect in a carbon nanotube–silicon heterojunction

Directory of Open Access Journals (Sweden)

Carla Aramo

2015-03-01

Full Text Available A significant resonant tunneling effect has been observed under the 2.4 V junction threshold in a large area, carbon nanotube–silicon (CNT–Si heterojunction obtained by growing a continuous layer of multiwall carbon nanotubes on an n-doped silicon substrate. The multiwall carbon nanostructures were grown by a chemical vapor deposition (CVD technique on a 60 nm thick, silicon nitride layer, deposited on an n-type Si substrate. The heterojunction characteristics were intensively studied on different substrates, resulting in high photoresponsivity with a large reverse photocurrent plateau. In this paper, we report on the photoresponsivity characteristics of the device, the heterojunction threshold and the tunnel-like effect observed as a function of applied voltage and excitation wavelength. The experiments are performed in the near-ultraviolet to near-infrared wavelength range. The high conversion efficiency of light radiation into photoelectrons observed with the presented layout allows the device to be used as a large area photodetector with very low, intrinsic dark current and noise.

Alloyed Aluminum Contacts for Silicon Solar Cells

International Nuclear Information System (INIS)

Tin Tin Aye

2010-12-01

Aluminium is usually deposited and alloyed at the back of p-p silicon solar cell for making a good ohmic contact and establishing a back electric field which avoids carrier recombination of the back surface. It was the deposition of aluminum on multicrystalline silicon (mc-Si) substrate at various annealing temperature. Physical and elemental analysis was carried out by using scanning electron microscopy (SEM) and X-rays diffraction (XRD). The electrical (I-V) characteristic of the photovoltaic cell was also measured.

Copper-assisted, anti-reflection etching of silicon surfaces

Science.gov (United States)

Toor, Fatima; Branz, Howard

2014-08-26

A method (300) for etching a silicon surface (116) to reduce reflectivity. The method (300) includes electroless deposition of copper nanoparticles about 20 nanometers in size on the silicon surface (116), with a particle-to-particle spacing of 3 to 8 nanometers. The method (300) includes positioning (310) the substrate (112) with a silicon surface (116) into a vessel (122). The vessel (122) is filled (340) with a volume of an etching solution (124) so as to cover the silicon surface (116). The etching solution (124) includes an oxidant-etchant solution (146), e.g., an aqueous solution of hydrofluoric acid and hydrogen peroxide. The silicon surface (116) is etched (350) by agitating the etching solution (124) with, for example, ultrasonic agitation, and the etching may include heating (360) the etching solution (124) and directing light (365) onto the silicon surface (116). During the etching, copper nanoparticles enhance or drive the etching process.

Performance Investigations of Quasi-Yagi Loop and Dipole Antennas on Silicon Substrate for 94 GHz Applications

Directory of Open Access Journals (Sweden)

Osama M. Haraz

2014-01-01

Full Text Available This paper introduces the design and implementation of two high gain Quasi-Yagi printed antennas developed on silicon substrate for 94 GHz imaging applications. The proposed antennas are based on either driven loop or dipole antennas fed by a coplanar waveguide (CPW feeding structure. For better matching with the driven antennas, a matching section has been added between the CPW feedline and the driven antenna element. To improve the gain of either loop or dipole antennas, a ground reflector and parasitic director elements have been added. Two Quasi-Yagi antenna prototypes based on loop and dipole antenna elements have been fabricated and experimentally tested using W-band probing station (75–110 GHz. The measured results show good agreement with simulated results and confirm that the proposed antennas are working. In addition, a feed and matching configuration is proposed to enable coupling a microbolometer element to the proposed Quasi-Yagi antenna designs for performing radiation pattern measurements.

Droop-free AlxGa1-xN/AlyGa1-yN quantum-disks-in-nanowires ultraviolet LED emitting at 337 nm on metal/silicon substrates

KAUST Repository

Janjua, Bilal

2017-01-18

Currently the AlGaN-based ultraviolet (UV) solid-state lighting research suffers from numerous challenges. In particular, low internal quantum efficiency, low extraction efficiency, inefficient doping, large polarization fields, and high dislocation density epitaxy constitute bottlenecks in realizing high power devices. Despite the clear advantage of quantum-confinement nanostructure, it has not been widely utilized in AlGaN-based nanowires. Here we utilize the self-assembled nanowires (NWs) with embedding quantum-disks (Qdisks) to mitigate these issues, and achieve UV emission of 337 nm at 32 A/cm (80 mA in 0.5 × 0.5 mm device), a turn-on voltage of ∼5.5 V and droop-free behavior up to 120 A/cm of injection current. The device was grown on a titanium-coated n-type silicon substrate, to improve current injection and heat dissipation. A narrow linewidth of 11.7 nm in the electroluminescence spectrum and a strong wavefunctions overlap factor of 42% confirm strong quantum confinement within uniformly formed AlGaN/AlGaN Qdisks, verified using transmission electron microscopy (TEM). The nitride-based UV nanowires light-emitting diodes (NWs-LEDs) grown on low cost and scalable metal/silicon template substrate, offers a scalable, environment friendly and low cost solution for numerous applications, such as solid-state lighting, spectroscopy, medical science and security.

Droop-free AlxGa1-xN/AlyGa1-yN quantum-disks-in-nanowires ultraviolet LED emitting at 337 nm on metal/silicon substrates