Porous Silicon Nanowires

Science.gov (United States)

Qu, Yongquan; Zhou, Hailong; Duan, Xiangfeng

2011-01-01

In this minreview, we summarize recent progress in the synthesis, properties and applications of a new type of one-dimensional nanostructures — single crystalline porous silicon nanowires. The growth of porous silicon nanowires starting from both p- and n-type Si wafers with a variety of dopant concentrations can be achieved through either one-step or two-step reactions. The mechanistic studies indicate the dopant concentration of Si wafers, oxidizer concentration, etching time and temperature can affect the morphology of the as-etched silicon nanowires. The porous silicon nanowires are both optically and electronically active and have been explored for potential applications in diverse areas including photocatalysis, lithium ion battery, gas sensor and drug delivery. PMID:21869999

Silicon on ferroelectic insulator field effect transistor (SOF-FET) a new device for the next generation ultra low power circuits

Science.gov (United States)

Es-Sakhi, Azzedin D.

Field effect transistors (FETs) are the foundation for all electronic circuits and processors. These devices have progressed massively to touch its final steps in sub-nanometer level. Left and right proposals are coming to rescue this progress. Emerging nano-electronic devices (resonant tunneling devices, single-atom transistors, spin devices, Heterojunction Transistors rapid flux quantum devices, carbon nanotubes, and nanowire devices) took a vast share of current scientific research. Non-Si electronic materials like III-V heterostructure, ferroelectric, carbon nanotubes (CNTs), and other nanowire based designs are in developing stage to become the core technology of non-classical CMOS structures. FinFET present the current feasible commercial nanotechnology. The scalability and low power dissipation of this device allowed for an extension of silicon based devices. High short channel effect (SCE) immunity presents its major advantage. Multi-gate structure comes to light to improve the gate electrostatic over the channel. The new structure shows a higher performance that made it the first candidate to substitute the conventional MOSFET. The device also shows a future scalability to continue Moor's Law. Furthermore, the device is compatible with silicon fabrication process. Moreover, the ultra-low-power (ULP) design required a subthreshold slope lower than the thermionic-emission limit of 60mV/ decade (KT/q). This value was unbreakable by the new structure (SOI-FinFET). On the other hand most of the previews proposals show the ability to go beyond this limit. However, those pre-mentioned schemes have publicized a very complicated physics, design difficulties, and process non-compatibility. The objective of this research is to discuss various emerging nano-devices proposed for ultra-low-power designs and their possibilities to replace the silicon devices as the core technology in the future integrated circuit. This thesis proposes a novel design that exploits the

Fabrication of three-dimensional MIS nano-capacitor based on nano-imprinted single crystal silicon nanowire arrays

KAUST Repository

Zhai, Yujia

2012-11-26

We report fabrication of single crystalline silicon nanowire based-three-dimensional MIS nano-capacitors for potential analog and mixed signal applications. The array of nanowires is patterned by Step and Flash Imprint Lithography (S-FIL). Deep silicon etching (DSE) is used to form the nanowires with high aspect ratio, increase the electrode area and thus significantly enhance the capacitance. High-! dielectric is deposited by highly conformal atomic layer deposition (ALD) Al2O3 over the Si nanowires, and sputtered metal TaN serves as the electrode. Electrical measurements of fabricated capacitors show the expected increase of capacitance with greater nanowire height and decreasing dielectric thickness, consistent with calculations. Leakage current and time-dependent dielectric breakdown (TDDB) are also measured and compared with planar MIS capacitors. In view of greater interest in 3D transistor architectures, such as FinFETs, 3D high density MIS capacitors offer an attractive device technology for analog and mixed signal applications. - See more at: http://www.eurekaselect.com/105099/article#sthash.EzeJxk6j.dpuf

Fabrication of three-dimensional MIS nano-capacitor based on nano-imprinted single crystal silicon nanowire arrays

KAUST Repository

Zhai, Yujia; Palard, Marylene; Mathew, Leo; Hussain, Muhammad Mustafa; Willson, Grant Grant; Tutuc, Emanuel; Banerjee, Sanjay Kumar

2012-01-01

We report fabrication of single crystalline silicon nanowire based-three-dimensional MIS nano-capacitors for potential analog and mixed signal applications. The array of nanowires is patterned by Step and Flash Imprint Lithography (S-FIL). Deep silicon etching (DSE) is used to form the nanowires with high aspect ratio, increase the electrode area and thus significantly enhance the capacitance. High-! dielectric is deposited by highly conformal atomic layer deposition (ALD) Al2O3 over the Si nanowires, and sputtered metal TaN serves as the electrode. Electrical measurements of fabricated capacitors show the expected increase of capacitance with greater nanowire height and decreasing dielectric thickness, consistent with calculations. Leakage current and time-dependent dielectric breakdown (TDDB) are also measured and compared with planar MIS capacitors. In view of greater interest in 3D transistor architectures, such as FinFETs, 3D high density MIS capacitors offer an attractive device technology for analog and mixed signal applications. - See more at: http://www.eurekaselect.com/105099/article#sthash.EzeJxk6j.dpuf

Silicon nanowire hybrid photovoltaics

KAUST Repository

Garnett, Erik C.

2010-06-01

Silicon nanowire Schottky junction solar cells have been fabricated using n-type silicon nanowire arrays and a spin-coated conductive polymer (PEDOT). The polymer Schottky junction cells show superior surface passivation and open-circuit voltages compared to standard diffused junction cells with native oxide surfaces. External quantum efficiencies up to 88% were measured for these silicon nanowire/PEDOT solar cells further demonstrating excellent surface passivation. This process avoids high temperature processes which allows for low-cost substrates to be used. © 2010 IEEE.

Silicon nanowire hybrid photovoltaics

KAUST Repository

Garnett, Erik C.; Peters, Craig; Brongersma, Mark; Cui, Yi; McGehee, Mike

2010-01-01

Silicon nanowire Schottky junction solar cells have been fabricated using n-type silicon nanowire arrays and a spin-coated conductive polymer (PEDOT). The polymer Schottky junction cells show superior surface passivation and open-circuit voltages compared to standard diffused junction cells with native oxide surfaces. External quantum efficiencies up to 88% were measured for these silicon nanowire/PEDOT solar cells further demonstrating excellent surface passivation. This process avoids high temperature processes which allows for low-cost substrates to be used. © 2010 IEEE.

Semiconducting silicon nanowires for biomedical applications

CERN Document Server

Coffer, JL

2014-01-01

Biomedical applications have benefited greatly from the increasing interest and research into semiconducting silicon nanowires. Semiconducting Silicon Nanowires for Biomedical Applications reviews the fabrication, properties, and applications of this emerging material. The book begins by reviewing the basics, as well as the growth, characterization, biocompatibility, and surface modification, of semiconducting silicon nanowires. It goes on to focus on silicon nanowires for tissue engineering and delivery applications, including cellular binding and internalization, orthopedic tissue scaffol

GIDL analysis of the process variation effect in gate-all-around nanowire FET

Science.gov (United States)

Kim, Shinkeun; Seo, Youngsoo; Lee, Jangkyu; Kang, Myounggon; Shin, Hyungcheol

2018-02-01

In this paper, the gate-induced drain leakage (GIDL) is analyzed on gate-all-around (GAA) Nanowire FET (NW FET) with ellipse-shaped channel induced by process variation effect (PVE). The fabrication process of nanowire can lead to change the shape of channel cross section from circle to ellipse. The effect of distorted channel shape is investigated and verified by technology computer-aided design (TCAD) simulation in terms of the GIDL current. The simulation results demonstrate that the components of GIDL current are two mechanisms of longitudinal band-to-band tunneling (L-BTBT) at body/drain junction and transverse band-to-band tunneling (T-BTBT) at gate/drain junction. These two mechanisms are investigated on channel radius (rnw) and aspect ratio of ellipse-shape respectively and together.

Translating silicon nanowire BioFET sensor-technology to embedded point-of-care medical diagnostics

DEFF Research Database (Denmark)

Pfreundt, Andrea; Zulfiqar, Azeem; Patou, François

2013-01-01

Silicon nanowire and nanoribbon biosensors have shown great promise in the detection of biomarkers at very low concentrations. Their high sensitivity makes them ideal candidates for use in early-stage medical diagnostics and further disease monitoring where low amounts of biomarkers need to be de......Silicon nanowire and nanoribbon biosensors have shown great promise in the detection of biomarkers at very low concentrations. Their high sensitivity makes them ideal candidates for use in early-stage medical diagnostics and further disease monitoring where low amounts of biomarkers need...... to be detected. However, in order to translate this technology from the bench to the bedside, a number of key issues need to be taken into consideration: Integrating nanobiosensors-based technology requires to overcome the difficult tradeoff between imperatives for high device reproducibilty and associated...... rising fabrication costs. Also the translation of nano-scale sensor technology into daily-use point-of-care devices requires acknowledgement of the end-user requirements, making device portability and human-interfacing a focus point in device development. Sample handling or purification for instance...

Silicon nanowire-based solar cells

Energy Technology Data Exchange (ETDEWEB)

Stelzner, Th; Pietsch, M; Andrae, G; Falk, F; Ose, E; Christiansen, S [Institute of Photonic Technology, Albert-Einstein-Strasse 9, D-07745 Jena (Germany)], E-mail: thomas.stelzner@ipht-jena.de

2008-07-23

The fabrication of silicon nanowire-based solar cells on silicon wafers and on multicrystalline silicon thin films on glass is described. The nanowires show a strong broadband optical absorption, which makes them an interesting candidate to serve as an absorber in solar cells. The operation of a solar cell is demonstrated with n-doped nanowires grown on a p-doped silicon wafer. From a partially illuminated area of 0.6 cm{sup 2} open-circuit voltages in the range of 230-280 mV and a short-circuit current density of 2 mA cm{sup -2} were obtained.

Silicon nanowire-based solar cells

International Nuclear Information System (INIS)

Stelzner, Th; Pietsch, M; Andrae, G; Falk, F; Ose, E; Christiansen, S

2008-01-01

The fabrication of silicon nanowire-based solar cells on silicon wafers and on multicrystalline silicon thin films on glass is described. The nanowires show a strong broadband optical absorption, which makes them an interesting candidate to serve as an absorber in solar cells. The operation of a solar cell is demonstrated with n-doped nanowires grown on a p-doped silicon wafer. From a partially illuminated area of 0.6 cm 2 open-circuit voltages in the range of 230-280 mV and a short-circuit current density of 2 mA cm -2 were obtained

Silicon nanowires as field-effect transducers for biosensor development: A review

Energy Technology Data Exchange (ETDEWEB)

Noor, M. Omair; Krull, Ulrich J., E-mail: ulrich.krull@utoronto.ca

2014-05-01

Highlights: • Nanoscale field-effect transducers interrogate surface charge by conductivity changes. • The nanometer dimensions of SiNWs facilitate sensitive detection of biomolecules. • SiNWs can be fabricated by bottom–up or top–down approaches. • Device parameters and solution-phase conditions strongly influence analytical performance. - Abstract: The unique electronic properties and miniaturized dimensions of silicon nanowires (SiNWs) are attractive for label-free, real-time and sensitive detection of biomolecules. Sensors based on SiNWs operate as field effect transistors (FETs) and can be fabricated either by top–down or bottom–up approaches. Advances in fabrication methods have allowed for the control of physicochemical and electronic properties of SiNWs, providing opportunity for interfacing of SiNW-FET probes with intracellular environments. The Debye screening length is an important consideration that determines the performance and detection limits of SiNW-FET sensors, especially at physiologically relevant conditions of ionic strength (>100 mM). In this review, we discuss the construction and application of SiNW-FET sensors for detection of ions, nucleic acids and protein markers. Advantages and disadvantages of the top–down and bottom–up approaches for synthesis of SiNWs are discussed. An overview of various methods for surface functionalization of SiNWs for immobilization of selective chemistry is provided in the context of impact on the analytical performance of SiNW-FET sensors. In addition to in vitro examples, an overview of the progress of use of SiNW-FET sensors for ex vivo studies is also presented. This review concludes with a discussion of the future prospects of SiNW-FET sensors.

Silicon nanowires as field-effect transducers for biosensor development: A review

International Nuclear Information System (INIS)

Noor, M. Omair; Krull, Ulrich J.

2014-01-01

Highlights: • Nanoscale field-effect transducers interrogate surface charge by conductivity changes. • The nanometer dimensions of SiNWs facilitate sensitive detection of biomolecules. • SiNWs can be fabricated by bottom–up or top–down approaches. • Device parameters and solution-phase conditions strongly influence analytical performance. - Abstract: The unique electronic properties and miniaturized dimensions of silicon nanowires (SiNWs) are attractive for label-free, real-time and sensitive detection of biomolecules. Sensors based on SiNWs operate as field effect transistors (FETs) and can be fabricated either by top–down or bottom–up approaches. Advances in fabrication methods have allowed for the control of physicochemical and electronic properties of SiNWs, providing opportunity for interfacing of SiNW-FET probes with intracellular environments. The Debye screening length is an important consideration that determines the performance and detection limits of SiNW-FET sensors, especially at physiologically relevant conditions of ionic strength (>100 mM). In this review, we discuss the construction and application of SiNW-FET sensors for detection of ions, nucleic acids and protein markers. Advantages and disadvantages of the top–down and bottom–up approaches for synthesis of SiNWs are discussed. An overview of various methods for surface functionalization of SiNWs for immobilization of selective chemistry is provided in the context of impact on the analytical performance of SiNW-FET sensors. In addition to in vitro examples, an overview of the progress of use of SiNW-FET sensors for ex vivo studies is also presented. This review concludes with a discussion of the future prospects of SiNW-FET sensors

Label-free SnO2 nanowire FET biosensor for protein detection

Science.gov (United States)

Jakob, Markus H.; Dong, Bo; Gutsch, Sebastian; Chatelle, Claire; Krishnaraja, Abinaya; Weber, Wilfried; Zacharias, Margit

2017-06-01

Novel tin oxide field-effect-transistors (SnO2 NW-FET) for pH and protein detection applicable in the healthcare sector are reported. With a SnO2 NW-FET the proof-of-concept of a bio-sensing device is demonstrated using the carrier transport control of the FET channel by a (bio-) liquid modulated gate. Ultra-thin Al2O3 fabricated by a low temperature atomic layer deposition (ALD) process represents a sensitive layer to H+ ions safeguarding the nanowire at the same time. Successful pH sensitivity is demonstrated for pH ranging from 3 to 10. For protein detection, the SnO2 NW-FET is functionalized with a receptor molecule which specifically interacts with the protein of interest to be detected. The feasibility of this approach is demonstrated via the detection of a biotinylated protein using a NW-FET functionalized with streptavidin. An immediate label-free electronic read-out of the signal is shown. The well-established Enzyme-Linked Immunosorbent Assay (ELISA) method is used to determine the optimal experimental procedure which would enable molecular binding events to occur while being compatible with a final label-free electronic read-out on a NW-FET. Integration of the bottom-up fabricated SnO2 NW-FET pH- and biosensor into a microfluidic system (lab-on-a-chip) allows the automated analysis of small volumes in the 400 μl range as would be desired in portable on-site point-of-care (POC) devices for medical diagnosis.

BioFET-SIM

DEFF Research Database (Denmark)

Hediger, M. R.; Martinez, K. L.; Nygård, J.

2013-01-01

Biosensors based on nanowire field effect transistor (FET) have received much attention in recent years as a way to achieve ultra-sensitive and label-free sensing of molecules of biological interest. The BioFET-SIM computer model permits the analysis and interpretation of experimental sensor...... signals through its web-based interface www.biofetsim.org. The model also allows for predictions of the effects of changes in the experimental setup on the sensor signal. After an introduction to nanowire-based FET biosensors, this chapter reviews the theoretical basis of BioFET-SIM models describing both...... single and multiple charges on the analyte. Afterwards the usage of the interface and its relative command line version is briefly shown. Finally, possible applications of the BioFET-SIM model are presented. Among the possible uses of the interface, the effects on the predicted signal of pH, buffer ionic...

In situ nanoscale refinement by highly controllable etching of the (111) silicon crystal plane and its influence on the enhanced electrical property of a silicon nanowire

International Nuclear Information System (INIS)

Gong Yibin; Dai Pengfei; Gao Anran; Li Tie; Zhou Ping; Wang Yuelin

2011-01-01

Nanoscale refinement on a (100) oriented silicon-on-insulator (SOI) wafer was introduced by using tetra-methyl-ammonium hydroxide (TMAH, 25 wt%) anisotropic silicon etchant, with temperature kept at 50 °C to achieve precise etching of the (111) crystal plane. Specifically for a silicon nanowire (SiNW) with oxide sidewall protection, the in situ TMAH process enabled effective size reduction in both lateral (2.3 nm/min) and vertical (1.7 nm/min) dimensions. A sub-50 nm SiNW with a length of microns with uniform triangular cross-section was achieved accordingly, yielding enhanced field effect transistor (FET) characteristics in comparison with its 100 nm-wide pre-refining counterpart, which demonstrated the feasibility of this highly controllable refinement process. Detailed examination revealed that the high surface quality of the (111) plane, as well as the bulk depletion property should be the causes of this electrical enhancement, which implies the great potential of the as-made cost-effective SiNW FET device in many fields. (semiconductor materials)

Flexible integration of free-standing nanowires into silicon photonics.

Science.gov (United States)

Chen, Bigeng; Wu, Hao; Xin, Chenguang; Dai, Daoxin; Tong, Limin

2017-06-14

Silicon photonics has been developed successfully with a top-down fabrication technique to enable large-scale photonic integrated circuits with high reproducibility, but is limited intrinsically by the material capability for active or nonlinear applications. On the other hand, free-standing nanowires synthesized via a bottom-up growth present great material diversity and structural uniformity, but precisely assembling free-standing nanowires for on-demand photonic functionality remains a great challenge. Here we report hybrid integration of free-standing nanowires into silicon photonics with high flexibility by coupling free-standing nanowires onto target silicon waveguides that are simultaneously used for precise positioning. Coupling efficiency between a free-standing nanowire and a silicon waveguide is up to ~97% in the telecommunication band. A hybrid nonlinear-free-standing nanowires-silicon waveguides Mach-Zehnder interferometer and a racetrack resonator for significantly enhanced optical modulation are experimentally demonstrated, as well as hybrid active-free-standing nanowires-silicon waveguides circuits for light generation. These results suggest an alternative approach to flexible multifunctional on-chip nanophotonic devices.Precisely assembling free-standing nanowires for on-demand photonic functionality remains a challenge. Here, Chen et al. integrate free-standing nanowires into silicon waveguides and show all-optical modulation and light generation on silicon photonic chips.

Are Nanotube Architectures More Advantageous Than Nanowire Architectures For Field Effect Transistors?

KAUST Repository

Fahad, Hossain M.

2012-06-27

Decade long research in 1D nanowire field effect transistors (FET) shows although it has ultra-low off-state leakage current and a single device uses a very small area, its drive current generation per device is extremely low. Thus it requires arrays of nanowires to be integrated together to achieve appreciable amount of current necessary for high performance computation causing an area penalty and compromised functionality. Here we show that a FET with a nanotube architecture and core-shell gate stacks is capable of achieving the desirable leakage characteristics of the nanowire FET while generating a much larger drive current with area efficiency. The core-shell gate stacks of silicon nanotube FETs tighten the electrostatic control and enable volume inversion mode operation leading to improved short channel behavior and enhanced performance. Our comparative study is based on semi-classical transport models with quantum confinement effects which offers new opportunity for future generation high performance computation.

A silicon nanowire heater and thermometer

Science.gov (United States)

Zhao, Xingyan; Dan, Yaping

2017-07-01

In the thermal conductivity measurements of thermoelectric materials, heaters and thermometers made of the same semiconducting materials under test, forming a homogeneous system, will significantly simplify fabrication and integration. In this work, we demonstrate a high-performance heater and thermometer made of single silicon nanowires (SiNWs). The SiNWs are patterned out of a silicon-on-insulator wafer by CMOS-compatible fabrication processes. The electronic properties of the nanowires are characterized by four-probe and low temperature Hall effect measurements. The I-V curves of the nanowires are linear at small voltage bias. The temperature dependence of the nanowire resistance allows the nanowire to be used as a highly sensitive thermometer. At high voltage bias, the I-V curves of the nanowire become nonlinear due to the effect of Joule heating. The temperature of the nanowire heater can be accurately monitored by the nanowire itself as a thermometer.

Effect of Silicon Nanowire on Crystalline Silicon Solar Cell Characteristics

OpenAIRE

Zahra Ostadmahmoodi Do; Tahereh Fanaei Sheikholeslami; Hassan Azarkish

2016-01-01

Nanowires (NWs) are recently used in several sensor or actuator devices to improve their ordered characteristics. Silicon nanowire (Si NW) is one of the most attractive one-dimensional nanostructures semiconductors because of its unique electrical and optical properties. In this paper, silicon nanowire (Si NW), is synthesized and characterized for application in photovoltaic device. Si NWs are prepared using wet chemical etching method which is commonly used as a simple and low cost method fo...

Silicon nanowires: structure and properties

International Nuclear Information System (INIS)

Nezhdanov, A.V.; Mashin, A.I.; Razuvaev, A.G.; Ershov, A.V.; Ignatov, S.K.

2006-01-01

An attempt to grow silicon nanowires has been made by electron beam evaporation on highly oriented pyrolytic substrate. Needle-like objects are located along the normal to a substrate (density 2 x 10 11 cm -2 ). For modeling quasi-one-dimensional objects calculations of nuclear structure and energy spectra have been accomplished. A fullerene-like structure Si 24 is proposed as a basic atomic configuration of silicon nanowires [ru

Position-controlled epitaxial III-V nanowires on silicon

Energy Technology Data Exchange (ETDEWEB)

Roest, Aarnoud L; Verheijen, Marcel A; Wunnicke, Olaf; Serafin, Stacey; Wondergem, Harry; Bakkers, Erik P A M [Philips Research Laboratories, Professor Holstlaan 4, 5656 AA Eindhoven (Netherlands); Kavli Institute of NanoScience, Delft University of Technology, PO Box 5046, 2600 GA Delft (Netherlands)

2006-06-14

We show the epitaxial integration of III-V semiconductor nanowires with silicon technology. The wires are grown by the VLS mechanism with laser ablation as well as metal-organic vapour phase epitaxy. The hetero-epitaxial growth of the III-V nanowires on silicon was confirmed with x-ray diffraction pole figures and cross-sectional transmission electron microscopy. We show preliminary results of two-terminal electrical measurements of III-V nanowires grown on silicon. E-beam lithography was used to predefine the position of the nanowires.

Position-controlled epitaxial III-V nanowires on silicon

International Nuclear Information System (INIS)

Roest, Aarnoud L; Verheijen, Marcel A; Wunnicke, Olaf; Serafin, Stacey; Wondergem, Harry; Bakkers, Erik P A M

2006-01-01

We show the epitaxial integration of III-V semiconductor nanowires with silicon technology. The wires are grown by the VLS mechanism with laser ablation as well as metal-organic vapour phase epitaxy. The hetero-epitaxial growth of the III-V nanowires on silicon was confirmed with x-ray diffraction pole figures and cross-sectional transmission electron microscopy. We show preliminary results of two-terminal electrical measurements of III-V nanowires grown on silicon. E-beam lithography was used to predefine the position of the nanowires

Ionic screening effect on low-frequency drain current fluctuations in liquid-gated nanowire FETs

International Nuclear Information System (INIS)

Lu, Ming-Pei; Vire, Eric; Montès, Laurent

2015-01-01

The ionic screening effect plays an important role in determining the fundamental surface properties within liquid–semiconductor interfaces. In this study, we investigated the characteristics of low-frequency drain current noise in liquid-gated nanowire (NW) field effect transistors (FETs) to obtain physical insight into the effect of ionic screening on low-frequency current fluctuation. When the NW FET was operated close to the gate voltage corresponding to the maximum transconductance, the magnitude of the low-frequency noise for the NW exposed to a low-ionic-strength buffer (0.001 M) was approximately 70% greater than that when exposed to a high-ionic-strength buffer (0.1 M). We propose a noise model, considering the charge coupling efficiency associated with the screening competition between the electrolyte buffer and the NW, to describe the ionic screening effect on the low-frequency drain current noise in liquid-gated NW FET systems. This report not only provides a physical understanding of the ionic screening effect behind the low-frequency current noise in liquid-gated FETs but also offers useful information for developing the technology of NW FETs with liquid-gated architectures for application in bioelectronics, nanosensors, and hybrid nanoelectronics. (paper)

Scaling laws for nanoFET sensors

International Nuclear Information System (INIS)

Zhou Fushan; Wei Qihuo

2008-01-01

The sensitive conductance change of semiconductor nanowires and carbon nanotubes in response to the binding of charged molecules provides a novel sensing modality which is generally denoted as nanoFET sensors. In this paper, we study the scaling laws of nanoplate FET sensors by simplifying nanoplates as random resistor networks with molecular receptors sitting on lattice sites. Nanowire/tube FETs are included as the limiting cases where the device width goes small. Computer simulations show that the field effect strength exerted by the binding molecules has significant impact on the scaling behaviors. When the field effect strength is small, nanoFETs have little size and shape dependence. In contrast, when the field effect strength becomes stronger, there exists a lower detection threshold for charge accumulation FETs and an upper detection threshold for charge depletion FET sensors. At these thresholds, the nanoFET devices undergo a transition between low and large sensitivities. These thresholds may set the detection limits of nanoFET sensors, while they could be eliminated by designing devices with very short source-drain distance and large width

High performance ring oscillators from 10-nm wide silicon nanowire field-effect transistors

KAUST Repository

Huang, Ruo-Gu; Tham, Douglas; Wang, Dunwei; Heath, James R.

2011-01-01

We explore 10-nm wide Si nanowire (SiNW) field-effect transistors (FETs) for logic applications, via the fabrication and testing of SiNW-based ring oscillators. We report on SiNW surface treatments and dielectric annealing, for producing SiNW FETs that exhibit high performance in terms of large on/off-state current ratio (~108), low drain-induced barrier lowering (~30 mV) and low subthreshold swing (~80 mV/decade). The performance of inverter and ring-oscillator circuits fabricated from these nanowire FETs are also explored. The inverter demonstrates the highest voltage gain (~148) reported for a SiNW-based NOT gate, and the ring oscillator exhibits near rail-to-rail oscillation centered at 13.4 MHz. The static and dynamic characteristics of these NW devices indicate that these SiNW-based FET circuits are excellent candidates for various high-performance nanoelectronic applications. © 2011 Tsinghua University Press and Springer-Verlag Berlin Heidelberg.

High performance ring oscillators from 10-nm wide silicon nanowire field-effect transistors

KAUST Repository

Huang, Ruo-Gu

2011-06-24

We explore 10-nm wide Si nanowire (SiNW) field-effect transistors (FETs) for logic applications, via the fabrication and testing of SiNW-based ring oscillators. We report on SiNW surface treatments and dielectric annealing, for producing SiNW FETs that exhibit high performance in terms of large on/off-state current ratio (~108), low drain-induced barrier lowering (~30 mV) and low subthreshold swing (~80 mV/decade). The performance of inverter and ring-oscillator circuits fabricated from these nanowire FETs are also explored. The inverter demonstrates the highest voltage gain (~148) reported for a SiNW-based NOT gate, and the ring oscillator exhibits near rail-to-rail oscillation centered at 13.4 MHz. The static and dynamic characteristics of these NW devices indicate that these SiNW-based FET circuits are excellent candidates for various high-performance nanoelectronic applications. © 2011 Tsinghua University Press and Springer-Verlag Berlin Heidelberg.

Self-diffusion in single crystalline silicon nanowires

Science.gov (United States)

Südkamp, T.; Hamdana, G.; Descoins, M.; Mangelinck, D.; Wasisto, H. S.; Peiner, E.; Bracht, H.

2018-04-01

Self-diffusion experiments in single crystalline isotopically controlled silicon nanowires with diameters of 70 and 400 nm at 850 and 1000 °C are reported. The isotope structures were first epitaxially grown on top of silicon substrate wafers. Nanowires were subsequently fabricated using a nanosphere lithography process in combination with inductively coupled plasma dry reactive ion etching. Three-dimensional profiling of the nanosized structure before and after diffusion annealing was performed by means of atom probe tomography (APT). Self-diffusion profiles obtained from APT analyses are accurately described by Fick's law for self-diffusion. Data obtained for silicon self-diffusion in nanowires are equal to the results reported for bulk silicon crystals, i.e., finite size effects and high surface-to-volume ratios do not significantly affect silicon self-diffusion. This shows that the properties of native point defects determined from self-diffusion in bulk crystals also hold for nanosized silicon structures with diameters down to 70 nm.

Silicon Nanowires for All-Optical Signal Processing in Optical Communication

DEFF Research Database (Denmark)

Pu, Minhao; Hu, Hao; Ji, Hua

2012-01-01

Silicon (Si), the second most abundant element on earth, has dominated in microelectronics for many decades. It can also be used for photonic devices due to its transparency in the range of optical telecom wavelengths which will enable a platform for a monolithic integration of optics...... and microelectronics. Silicon photonic nanowire waveguides fabricated on silicon-on-insulator (SOI) substrates are crucial elements in nano-photonic integrated circuits. The strong light confinement in nanowires induced by high index contrast SOI material enhances the nonlinear effects in the silicon nanowire core...... such as four-wave mixing (FWM) which is an imperative process for optical signal processing. Since the current mature silicon fabrication technology enables a precise dimension control on nanowires, dispersion engineering can be performed by tailoring nanowire dimensions to realize an efficient nonlinear...

Piezoresistive effect in top-down fabricated silicon nanowires

DEFF Research Database (Denmark)

Reck, Kasper; Richter, Jacob; Hansen, Ole

2008-01-01

We have designed and fabricated silicon test chips to investigate the piezoresistive properties of both crystalline and polycrystalline nanowires using a top-down approach, in order to comply with conventional fabrication techniques. The test chip consists of 5 silicon nanowires and a reference...

Superconductive silicon nanowires using gallium beam lithography.

Energy Technology Data Exchange (ETDEWEB)

Henry, Michael David; Jarecki, Robert Leo,

2014-01-01

This work was an early career LDRD investigating the idea of using a focused ion beam (FIB) to implant Ga into silicon to create embedded nanowires and/or fully suspended nanowires. The embedded Ga nanowires demonstrated electrical resistivity of 5 m-cm, conductivity down to 4 K, and acts as an Ohmic silicon contact. The suspended nanowires achieved dimensions down to 20 nm x 30 nm x 10 m with large sensitivity to pressure. These structures then performed well as Pirani gauges. Sputtered niobium was also developed in this research for use as a superconductive coating on the nanowire. Oxidation characteristics of Nb were detailed and a technique to place the Nb under tensile stress resulted in the Nb resisting bulk atmospheric oxidation for up to years.

Silicon nanowire transistors

CERN Document Server

Bindal, Ahmet

2016-01-01

This book describes the n and p-channel Silicon Nanowire Transistor (SNT) designs with single and dual-work functions, emphasizing low static and dynamic power consumption. The authors describe a process flow for fabrication and generate SPICE models for building various digital and analog circuits. These include an SRAM, a baseband spread spectrum transmitter, a neuron cell and a Field Programmable Gate Array (FPGA) platform in the digital domain, as well as high bandwidth single-stage and operational amplifiers, RF communication circuits in the analog domain, in order to show this technology’s true potential for the next generation VLSI. Describes Silicon Nanowire (SNW) Transistors, as vertically constructed MOS n and p-channel transistors, with low static and dynamic power consumption and small layout footprint; Targets System-on-Chip (SoC) design, supporting very high transistor count (ULSI), minimal power consumption requiring inexpensive substrates for packaging; Enables fabrication of different types...

A Highly Responsive Silicon Nanowire/Amplifier MOSFET Hybrid Biosensor.

Science.gov (United States)

Lee, Jieun; Jang, Jaeman; Choi, Bongsik; Yoon, Jinsu; Kim, Jee-Yeon; Choi, Yang-Kyu; Kim, Dong Myong; Kim, Dae Hwan; Choi, Sung-Jin

2015-07-21

This study demonstrates a hybrid biosensor comprised of a silicon nanowire (SiNW) integrated with an amplifier MOSFET to improve the current response of field-effect-transistor (FET)-based biosensors. The hybrid biosensor is fabricated using conventional CMOS technology, which has the potential advantage of high density and low noise performance. The biosensor shows a current response of 5.74 decades per pH for pH detection, which is 2.5 × 10(5) times larger than that of a single SiNW sensor. In addition, we demonstrate charged polymer detection using the biosensor, with a high current change of 4.5 × 10(5) with a 500 nM concentration of poly(allylamine hydrochloride). In addition, we demonstrate a wide dynamic range can be obtained by adjusting the liquid gate voltage. We expect that this biosensor will be advantageous and practical for biosensor applications which requires lower noise, high speed, and high density.

Position-controlled epitaxial III-V nanowires on silicon

NARCIS (Netherlands)

Roest, A.L.; Verheijen, M.A.; Wunnicke, O.; Serafin, S.N.; Wondergem, H.J.; Bakkers, E.P.A.M.

2006-01-01

We show the epitaxial integration of III-V semiconductor nanowires with silicon technology. The wires are grown by the VLS mechanism with laser ablation as well as metal-organic vapour phase epitaxy. The hetero-epitaxial growth of the III-V nanowires on silicon was confirmed with x-ray diffraction

Solution-Grown Silicon Nanowires for Lithium-Ion Battery Anodes

KAUST Repository

Chan, Candace K.; Patel, Reken N.; O’ Connell, Michael J.; Korgel, Brian A.; Cui, Yi

2010-01-01

Composite electrodes composed of silicon nanowires synthesized using the supercritical fluid-liquid-solid (SFLS) method mixed with amorphous carbon or carbon nanotubes were evaluated as Li-ion battery anodes. Carbon coating of the silicon nanowires

Isolation and Identification of Post-Transcriptional Gene Silencing-Related Micro-RNAs by Functionalized Silicon Nanowire Field-effect Transistor

Science.gov (United States)

Chen, Kuan-I.; Pan, Chien-Yuan; Li, Keng-Hui; Huang, Ying-Chih; Lu, Chia-Wei; Tang, Chuan-Yi; Su, Ya-Wen; Tseng, Ling-Wei; Tseng, Kun-Chang; Lin, Chi-Yun; Chen, Chii-Dong; Lin, Shih-Shun; Chen, Yit-Tsong

2015-11-01

Many transcribed RNAs are non-coding RNAs, including microRNAs (miRNAs), which bind to complementary sequences on messenger RNAs to regulate the translation efficacy. Therefore, identifying the miRNAs expressed in cells/organisms aids in understanding genetic control in cells/organisms. In this report, we determined the binding of oligonucleotides to a receptor-modified silicon nanowire field-effect transistor (SiNW-FET) by monitoring the changes in conductance of the SiNW-FET. We first modified a SiNW-FET with a DNA probe to directly and selectively detect the complementary miRNA in cell lysates. This SiNW-FET device has 7-fold higher sensitivity than reverse transcription-quantitative polymerase chain reaction in detecting the corresponding miRNA. Next, we anchored viral p19 proteins, which bind the double-strand small RNAs (ds-sRNAs), on the SiNW-FET. By perfusing the device with synthesized ds-sRNAs of different pairing statuses, the dissociation constants revealed that the nucleotides at the 3‧-overhangs and pairings at the terminus are important for the interactions. After perfusing the total RNA mixture extracted from Nicotiana benthamiana across the device, this device could enrich the ds-sRNAs for sequence analysis. Finally, this bionanoelectronic SiNW-FET, which is able to isolate and identify the interacting protein-RNA, adds an additional tool in genomic technology for the future study of direct biomolecular interactions.

Aluminum-catalyzed silicon nanowires: Growth methods, properties, and applications

Energy Technology Data Exchange (ETDEWEB)

Hainey, Mel F.; Redwing, Joan M. [Department of Materials Science and Engineering, Materials Research Institute, The Pennsylvania State University, University Park, Pennsylvania 16802 (United States)

2016-12-15

Metal-mediated vapor-liquid-solid (VLS) growth is a promising approach for the fabrication of silicon nanowires, although residual metal incorporation into the nanowires during growth can adversely impact electronic properties particularly when metals such as gold and copper are utilized. Aluminum, which acts as a shallow acceptor in silicon, is therefore of significant interest for the growth of p-type silicon nanowires but has presented challenges due to its propensity for oxidation. This paper summarizes the key aspects of aluminum-catalyzed nanowire growth along with wire properties and device results. In the first section, aluminum-catalyzed nanowire growth is discussed with a specific emphasis on methods to mitigate aluminum oxide formation. Next, the influence of growth parameters such as growth temperature, precursor partial pressure, and hydrogen partial pressure on nanowire morphology is discussed, followed by a brief review of the growth of templated and patterned arrays of nanowires. Aluminum incorporation into the nanowires is then discussed in detail, including measurements of the aluminum concentration within wires using atom probe tomography and assessment of electrical properties by four point resistance measurements. Finally, the use of aluminum-catalyzed VLS growth for device fabrication is reviewed including results on single-wire radial p-n junction solar cells and planar solar cells fabricated with nanowire/nanopyramid texturing.

A deep etching mechanism for trench-bridging silicon nanowires.

Science.gov (United States)

Tasdemir, Zuhal; Wollschläger, Nicole; Österle, Werner; Leblebici, Yusuf; Alaca, B Erdem

2016-03-04

Introducing a single silicon nanowire with a known orientation and dimensions to a specific layout location constitutes a major challenge. The challenge becomes even more formidable, if one chooses to realize the task in a monolithic fashion with an extreme topography, a characteristic of microsystems. The need for such a monolithic integration is fueled by the recent surge in the use of silicon nanowires as functional building blocks in various electromechanical and optoelectronic applications. This challenge is addressed in this work by introducing a top-down, silicon-on-insulator technology. The technology provides a pathway for obtaining well-controlled silicon nanowires along with the surrounding microscale features up to a three-order-of-magnitude scale difference. A two-step etching process is developed, where the first shallow etch defines a nanoscale protrusion on the wafer surface. After applying a conformal protection on the protrusion, a deep etch step is carried out forming the surrounding microscale features. A minimum nanowire cross-section of 35 nm by 168 nm is demonstrated in the presence of an etch depth of 10 μm. Nanowire cross-sectional features are characterized via transmission electron microscopy and linked to specific process steps. The technology allows control on all dimensional aspects along with the exact location and orientation of the silicon nanowire. The adoption of the technology in the fabrication of micro and nanosystems can potentially lead to a significant reduction in process complexity by facilitating direct access to the nanowire during surface processes such as contact formation and doping.

A deep etching mechanism for trench-bridging silicon nanowires

International Nuclear Information System (INIS)

Tasdemir, Zuhal; Alaca, B Erdem; Wollschläger, Nicole; Österle, Werner; Leblebici, Yusuf

2016-01-01

Introducing a single silicon nanowire with a known orientation and dimensions to a specific layout location constitutes a major challenge. The challenge becomes even more formidable, if one chooses to realize the task in a monolithic fashion with an extreme topography, a characteristic of microsystems. The need for such a monolithic integration is fueled by the recent surge in the use of silicon nanowires as functional building blocks in various electromechanical and optoelectronic applications. This challenge is addressed in this work by introducing a top-down, silicon-on-insulator technology. The technology provides a pathway for obtaining well-controlled silicon nanowires along with the surrounding microscale features up to a three-order-of-magnitude scale difference. A two-step etching process is developed, where the first shallow etch defines a nanoscale protrusion on the wafer surface. After applying a conformal protection on the protrusion, a deep etch step is carried out forming the surrounding microscale features. A minimum nanowire cross-section of 35 nm by 168 nm is demonstrated in the presence of an etch depth of 10 μm. Nanowire cross-sectional features are characterized via transmission electron microscopy and linked to specific process steps. The technology allows control on all dimensional aspects along with the exact location and orientation of the silicon nanowire. The adoption of the technology in the fabrication of micro and nanosystems can potentially lead to a significant reduction in process complexity by facilitating direct access to the nanowire during surface processes such as contact formation and doping. (paper)

A deep etching mechanism for trench-bridging silicon nanowires

Science.gov (United States)

Tasdemir, Zuhal; Wollschläger, Nicole; Österle, Werner; Leblebici, Yusuf; Erdem Alaca, B.

2016-03-01

Introducing a single silicon nanowire with a known orientation and dimensions to a specific layout location constitutes a major challenge. The challenge becomes even more formidable, if one chooses to realize the task in a monolithic fashion with an extreme topography, a characteristic of microsystems. The need for such a monolithic integration is fueled by the recent surge in the use of silicon nanowires as functional building blocks in various electromechanical and optoelectronic applications. This challenge is addressed in this work by introducing a top-down, silicon-on-insulator technology. The technology provides a pathway for obtaining well-controlled silicon nanowires along with the surrounding microscale features up to a three-order-of-magnitude scale difference. A two-step etching process is developed, where the first shallow etch defines a nanoscale protrusion on the wafer surface. After applying a conformal protection on the protrusion, a deep etch step is carried out forming the surrounding microscale features. A minimum nanowire cross-section of 35 nm by 168 nm is demonstrated in the presence of an etch depth of 10 μm. Nanowire cross-sectional features are characterized via transmission electron microscopy and linked to specific process steps. The technology allows control on all dimensional aspects along with the exact location and orientation of the silicon nanowire. The adoption of the technology in the fabrication of micro and nanosystems can potentially lead to a significant reduction in process complexity by facilitating direct access to the nanowire during surface processes such as contact formation and doping.

Ge/Si core/multi shell heterostructure FETs

Energy Technology Data Exchange (ETDEWEB)

Picraux, Samuel T [Los Alamos National Laboratory; Dayeh, Shadi A [Los Alamos National Laboratory

2010-01-01

Concentric heterostructured materials provide numerous design opportunities for engineering strain and interfaces, as well as tailoring energy band-edge combinations for optimal device performance. Key to the realization of such novel device concepts is the complete understanding and full control over their growth, crystal structure, and hetero-epitaxy. We report here on a new route for synthesizing Ge/Si core/multi-shell heterostructure nanowires that eliminate Au seed diffusion on the nanowire sidewalls by engineering the interface energy density difference. We show that such control over core/shell synthesis enable experimental realization of heterostructure FET devices beyond those available in the literature with enhanced transport characteristics. We provide a side-by-side comparison on the transport properties of Ge/Si core/multi-shell nanowires grown with and without Au diffusion and demonstrate heterostructure FETs with drive currents that are {approx} 2X higher than record results for p-type FETs.

Recovery Based Nanowire Field-Effect Transistor Detection of Pathogenic Avian Influenza DNA

Science.gov (United States)

Lin, Chih-Heng; Chu, Chia-Jung; Teng, Kang-Ning; Su, Yi-Jr; Chen, Chii-Dong; Tsai, Li-Chu; Yang, Yuh-Shyong

2012-02-01

Fast and accurate diagnosis is critical in infectious disease surveillance and management. We proposed a DNA recovery system that can easily be adapted to DNA chip or DNA biosensor for fast identification and confirmation of target DNA. This method was based on the re-hybridization of DNA target with a recovery DNA to free the DNA probe. Functionalized silicon nanowire field-effect transistor (SiNW FET) was demonstrated to monitor such specific DNA-DNA interaction using high pathogenic strain virus hemagglutinin 1 (H1) DNA of avian influenza (AI) as target. Specific electric changes were observed in real-time for AI virus DNA sensing and device recovery when nanowire surface of SiNW FET was modified with complementary captured DNA probe. The recovery based SiNW FET biosensor can be further developed for fast identification and further confirmation of a variety of influenza virus strains and other infectious diseases.

Quantitative measurements of C-reactive protein using silicon nanowire arrays

Directory of Open Access Journals (Sweden)

Min-Ho Lee

2008-03-01

Full Text Available Min-Ho Lee, Kuk-Nyung Lee, Suk-Won Jung, Won-Hyo Kim, Kyu-Sik Shin, Woo-Kyeong SeongKorea Electronics Technology Institute, Gyeonggi, KoreaAbstract: A silicon nanowire-based sensor for biological application showed highly desirable electrical responses to either pH changes or receptor-ligand interactions such as protein disease markers, viruses, and DNA hybridization. Furthermore, because the silicon nanowire can display results in real-time, it may possess superior characteristics for biosensing than those demonstrated in previously studied methods. However, despite its promising potential and advantages, certain process-related limitations of the device, due to its size and material characteristics, need to be addressed. In this article, we suggest possible solutions. We fabricated silicon nanowire using a top-down and low cost micromachining method, and evaluate the sensing of molecules after transfer and surface modifications. Our newly designed method can be used to attach highly ordered nanowires to various substrates, to form a nanowire array device, which needs to follow a series of repetitive steps in conventional fabrication technology based on a vapor-liquid-solid (VLS method. For evaluation, we demonstrated that our newly fabricated silicon nanowire arrays could detect pH changes as well as streptavidin-biotin binding events. As well as the initial proof-of-principle studies, C-reactive protein binding was measured: electrical signals were changed in a linear fashion with the concentration (1 fM to 1 nM in PBS containing 1.37 mM of salts. Finally, to address the effects of Debye length, silicon nanowires coupled with antigen proteins underwent electrical signal changes as the salt concentration changed.Keywords: silicon nanowire array, C-reactive protein, vapor-liquid-solid method

Increasing the efficiency of polymer solar cells by silicon nanowires

Energy Technology Data Exchange (ETDEWEB)

Eisenhawer, B; Sivakov, V; Pietsch, M; Andrae, G; Falk, F [Institute of Photonic Technology, Albert-Einstein-Strasse 9, 07743 Jena (Germany); Sensfuss, S, E-mail: bjoern.eisenhawer@ipht-jena.de [Thuringian Institute for Textile and Plastics Research, Breitscheidstrasse 97, 07407 Rudolstadt (Germany)

2011-08-05

Silicon nanowires have been introduced into P3HT:[60]PCBM solar cells, resulting in hybrid organic/inorganic solar cells. A cell efficiency of 4.2% has been achieved, which is a relative improvement of 10% compared to a reference cell produced without nanowires. This increase in cell performance is possibly due to an enhancement of the electron transport properties imposed by the silicon nanowires. In this paper, we present a novel approach for introducing the nanowires by mixing them into the polymer blend and subsequently coating the polymer/nanowire blend onto a substrate. This new onset may represent a viable pathway to producing nanowire-enhanced polymer solar cells in a reel to reel process.

Increasing the efficiency of polymer solar cells by silicon nanowires

International Nuclear Information System (INIS)

Eisenhawer, B; Sivakov, V; Pietsch, M; Andrae, G; Falk, F; Sensfuss, S

2011-01-01

Silicon nanowires have been introduced into P3HT:[60]PCBM solar cells, resulting in hybrid organic/inorganic solar cells. A cell efficiency of 4.2% has been achieved, which is a relative improvement of 10% compared to a reference cell produced without nanowires. This increase in cell performance is possibly due to an enhancement of the electron transport properties imposed by the silicon nanowires. In this paper, we present a novel approach for introducing the nanowires by mixing them into the polymer blend and subsequently coating the polymer/nanowire blend onto a substrate. This new onset may represent a viable pathway to producing nanowire-enhanced polymer solar cells in a reel to reel process.

Microspheres for the Growth of Silicon Nanowires via Vapor-Liquid-Solid Mechanism

Directory of Open Access Journals (Sweden)

Arancha Gómez-Martínez

2014-01-01

Full Text Available Silicon nanowires have been synthesized by a simple process using a suitable support containing silica and carbon microspheres. Nanowires were grown by thermal chemical vapor deposition via a vapor-liquid-solid mechanism with only the substrate as silicon source. The curved surface of the microsized spheres allows arranging the gold catalyst as nanoparticles with appropriate dimensions to catalyze the growth of nanowires. The resulting material is composed of the microspheres with the silicon nanowires attached on their surface.

Silicon nanowires for ultra-fast and ultrabroadband optical signal processing

DEFF Research Database (Denmark)

Ji, Hua; Hu, Hao; Pu, Minhao

2015-01-01

In this paper, we present recent research on silicon nanowires for ultra-fast and ultra-broadband optical signal processing at DTU Fotonik. The advantages and limitations of using silicon nanowires for optical signal processing are revealed through experimental demonstrations of various optical...

Piezoresistive silicon nanowire resonators as embedded building blocks in thick SOI

Science.gov (United States)

Nasr Esfahani, Mohammad; Kilinc, Yasin; Çagatay Karakan, M.; Orhan, Ezgi; Hanay, M. Selim; Leblebici, Yusuf; Erdem Alaca, B.

2018-04-01

The use of silicon nanowire resonators in nanoelectromechanical systems for new-generation sensing and communication devices faces integration challenges with higher-order structures. Monolithic and deterministic integration of such nanowires with the surrounding microscale architecture within the same thick crystal is a critical aspect for the improvement of throughput, reliability and device functionality. A monolithic and IC-compatible technology based on a tuned combination of etching and protection processes was recently introduced yielding silicon nanowires within a 10 μ m-thick device layer. Motivated by its success, the implications of the technology regarding the electromechanical resonance are studied within a particular setting, where the resonator is co-fabricated with all terminals and tuning electrodes. Frequency response is measured via piezoresistive readout with frequency down-mixing. Measurements indicate mechanical resonance with frequencies as high as 100 MHz exhibiting a Lorentzian behavior with proper transition to nonlinearity, while Allan deviation on the order of 3-8 ppm is achieved. Enabling the fabrication of silicon nanowires in thick silicon crystals using conventional semiconductor manufacturing, the present study thus demonstrates an alternative pathway to bottom-up and thin silicon-on-insulator approaches for silicon nanowire resonators.

Effect of Silicon Nanowire on Crystalline Silicon Solar Cell Characteristics

Directory of Open Access Journals (Sweden)

Zahra Ostadmahmoodi Do

2016-06-01

Full Text Available Nanowires (NWs are recently used in several sensor or actuator devices to improve their ordered characteristics. Silicon nanowire (Si NW is one of the most attractive one-dimensional nanostructures semiconductors because of its unique electrical and optical properties. In this paper, silicon nanowire (Si NW, is synthesized and characterized for application in photovoltaic device. Si NWs are prepared using wet chemical etching method which is commonly used as a simple and low cost method for producing nanowires of the same substrate material. The process conditions are adjusted to find the best quality of Si NWs. Morphology of Si NWs is studied using a field emission scanning electron microscopic technique. An energy dispersive X-Ray analyzer is also used to provide elemental identification and quantitative compositional information. Subsequently, Schottky type solar cell samples are fabricated on Si and Si NWs using ITO and Ag contacts. The junction properties are calculated using I-V curves in dark condition and the solar cell I-V characteristics are obtained under incident of the standardized light of AM1.5. The results for the two mentioned Schottky solar cell samples are compared and discussed. An improvement in short circuit current and efficiency of Schottky solar cell is found when Si nanowires are employed.

Synthesis of silicon nanowires and novel nano-dendrite structures

International Nuclear Information System (INIS)

Sinha, Saion; Gao Bo; Zhou, Otto

2004-01-01

We report a study on the effects of various parameters on the synthesis of silicon nanowires (5--50 nm in diameter) by pulsed laser ablation. A novel silicon nanodendrite structure is observed by changing some of the growth parameters abruptly. This growth mechanism is explained by a qualitative model. These nanodendrites show a promise of being used as a template in fabricating nanocircuits. Thermal quantum confinement effects were also observed on the silicon nanowires and have been reported

Electrodeposition at room temperature of amorphous silicon and germanium nanowires in ionic liquid

Energy Technology Data Exchange (ETDEWEB)

Martineau, F; Namur, K; Mallet, J; Delavoie, F; Troyon, M; Molinari, M [Laboratoire de Microscopies et d' Etude de Nanostructures (LMEN EA3799), Universite de Reims Champagne Ardennes (URCA), Reims Cedex 2 (France); Endres, F, E-mail: michael.molinari@univ-reims.fr [Institute of Particle Technology, Chair of Interface Processes, Clausthal University of Technology, D-36678 Clausthal-Zellerfeld (Germany)

2009-11-15

The electrodeposition at room temperature of silicon and germanium nanowires from the air- and water-stable ionic liquid 1-butyl-1-methylpyrrolidinium bis(trifluoromethanesulfonyl)imide (P{sub 1,4}) containing SiCl{sub 4} as Si source or GeCl{sub 4} as Ge source is investigated by cyclic voltammetry. By using nanoporous polycarbonate membranes as templates, it is possible to reproducibly grow pure silicon and germanium nanowires of different diameters. The nanowires are composed of pure amorphous silicon or germanium. The nanowires have homogeneous cylindrical shape with a roughness of a few nanometres on the wire surfaces. The nanowires' diameters and lengths well match with the initial membrane characteristics. Preliminary photoluminescence experiments exhibit strong emission in the near infrared for the amorphous silicon nanowires.

Detection of DNA of genetically modified maize by a silicon nanowire field-effect transistor

International Nuclear Information System (INIS)

Pham, Van Binh; Tung Pham, Xuan Thanh; Duong Dang, Ngoc Thuy; Tuyen Le, Thi Thanh; Tran, Phu Duy; Nguyen, Thanh Chien; Nguyen, Van Quoc; Dang, Mau Chien; Tong, Duy Hien; Van Rijn, Cees J M

2011-01-01

A silicon nanowire field-effect transistor based sensor (SiNW-FET) has been proved to be the most sensitive and powerful device for bio-detection applications. In this paper, SiNWs were first fabricated by using our recently developed deposition and etching under angle technique (DEA), then used to build up the complete SiNW device based biosensor. The fabricated SiNW biosensor was used to detect DNA of genetically modified maize. As the DNA of the genetically modified maize has particular DNA sequences of 35S promoter, we therefore designed 21 mer DNA oligonucleotides, which are used as a receptor to capture the transferred DNA of maize. In our work, the SiNW biosensor could detect DNA of genetically modified maize with concentrations down to about 200 pM

Structural and optical properties of silicon-carbide nanowires produced by the high-temperature carbonization of silicon nanostructures

Energy Technology Data Exchange (ETDEWEB)

Pavlikov, A. V., E-mail: pavlikov@physics.msu.ru [Moscow State University, Faculty of Physics (Russian Federation); Latukhina, N. V.; Chepurnov, V. I. [Samara National Researh University (Russian Federation); Timoshenko, V. Yu. [Moscow State University, Faculty of Physics (Russian Federation)

2017-03-15

Silicon-carbide (SiC) nanowire structures 40–50 nm in diameter are produced by the high-temperature carbonization of porous silicon and silicon nanowires. The SiC nanowires are studied by scanning electron microscopy, X-ray diffraction analysis, Raman spectroscopy, and infrared reflectance spectroscopy. The X-ray structural and Raman data suggest that the cubic 3C-SiC polytype is dominant in the samples under study. The shape of the infrared reflectance spectrum in the region of the reststrahlen band 800–900 cm{sup –1} is indicative of the presence of free charge carriers. The possibility of using SiC nanowires in microelectronic, photonic, and gas-sensing devices is discussed.

Unveiling the Formation Pathway of Single Crystalline Porous Silicon Nanowires

Science.gov (United States)

Zhong, Xing; Qu, Yongquan; Lin, Yung-Chen; Liao, Lei; Duan, Xiangfeng

2011-01-01

Porous silicon nanowire is emerging as an interesting material system due to its unique combination of structural, chemical, electronic, and optical properties. To fully understand their formation mechanism is of great importance for controlling the fundamental physical properties and enabling potential applications. Here we present a systematic study to elucidate the mechanism responsible for the formation of porous silicon nanowires in a two-step silver-assisted electroless chemical etching method. It is shown that silicon nanowire arrays with various porosities can be prepared by varying multiple experimental parameters such as the resistivity of the starting silicon wafer, the concentration of oxidant (H2O2) and the amount of silver catalyst. Our study shows a consistent trend that the porosity increases with the increasing wafer conductivity (dopant concentration) and oxidant (H2O2) concentration. We further demonstrate that silver ions, formed by the oxidation of silver, can diffuse upwards and re-nucleate on the sidewalls of nanowires to initiate new etching pathways to produce porous structure. The elucidation of this fundamental formation mechanism opens a rational pathway to the production of wafer-scale single crystalline porous silicon nanowires with tunable surface areas ranging from 370 m2·g−1 to 30 m2·g−1, and can enable exciting opportunities in catalysis, energy harvesting, conversion, storage, as well as biomedical imaging and therapy. PMID:21244020

Silicon nanowire hot carrier electroluminescence

Energy Technology Data Exchange (ETDEWEB)

Plessis, M. du, E-mail: monuko@up.ac.za; Joubert, T.-H.

2016-08-31

Avalanche electroluminescence from silicon pn junctions has been known for many years. However, the internal quantum efficiencies of these devices are quite low due to the indirect band gap nature of the semiconductor material. In this study we have used reach-through biasing and SOI (silicon-on-insulator) thin film structures to improve the internal power efficiency and the external light extraction efficiency. Both continuous silicon thin film pn junctions and parallel nanowire pn junctions were manufactured using a custom SOI technology. The pn junctions are operated in the reach-through mode of operation, thus increasing the average electric field within the fully depleted region. Experimental results of the emission spectrum indicate that the most dominant photon generating mechanism is due to intraband hot carrier relaxation processes. It was found that the SOI nanowire light source external power efficiency is at least an order of magnitude better than the comparable bulk CMOS (Complementary Metal Oxide Semiconductor) light source. - Highlights: • We investigate effect of electric field on silicon avalanche electroluminescence. • With reach-through pn junctions the current and carrier densities are kept constant. • Higher electric fields increase short wavelength radiation. • Higher electric fields decrease long wavelength radiation. • The effect of the electric field indicates intraband transitions as main mechanism.

Silicon nanowire structures as high-sensitive pH-sensors

International Nuclear Information System (INIS)

Belostotskaya, S O; Chuyko, O V; Kuznetsov, A E; Kuznetsov, E V; Rybachek, E N

2012-01-01

Sensitive elements for pH-sensors created on silicon nanostructures were researched. Silicon nanostructures have been used as ion-sensitive field effect transistor (ISFET) for the measurement of solution pH. Silicon nanostructures have been fabricated by 'top-down' approach and have been studied as pH sensitive elements. Nanowires have the higher sensitivity. It was shown, that sensitive element, which is made of 'one-dimensional' silicon nanostructure have bigger pH-sensitivity as compared with 'two-dimensional' structure. Integrated element formed from two p- and n-type nanowire ISFET ('inverter') can be used as high sensitivity sensor for local relative change [H+] concentration in very small volume.

Ballistic Spin Field Effect Transistor Based on Silicon Nanowires

Science.gov (United States)

Osintsev, Dmitri; Sverdlov, Viktor; Stanojevic, Zlatan; Selberherr, Siegfried

2011-03-01

We investigate the properties of ballistic spin field-effect transistors build on silicon nanowires. An accurate description of the conduction band based on the k . p} model is necessary in thin and narrow silicon nanostructures. The subband effective mass and subband splitting dependence on the nanowire dimensions is analyzed and used in the transport calculations. The spin transistor is formed by sandwiching the nanowire between two ferromagnetic metallic contacts. Delta-function barriers at the interfaces between the contacts and the silicon channel are introduced. The major contribution to the electric field-dependent spin-orbit interaction in confined silicon systems is due to the interface-induced inversion asymmetry which is of the Dresselhaus type. We study the current and conductance through the system for the contacts being in parallel and anti-parallel configurations. Differences between the [100] and [110] orientated structures are investigated in details. This work is supported by the European Research Council through the grant #247056 MOSILSPIN.

Broadband Nonlinear Signal Processing in Silicon Nanowires

DEFF Research Database (Denmark)

Yvind, Kresten; Pu, Minhao; Hvam, Jørn Märcher

The fast non-linearity of silicon allows Tbit/s optical signal processing. By choosing suitable dimensions of silicon nanowires their dispersion can be tailored to ensure a high nonlinearity at power levels low enough to avoid significant two-photon abso We have fabricated low insertion...

Nonlinear Optical Functions in Crystalline and Amorphous Silicon-on-Insulator Nanowires

DEFF Research Database (Denmark)

Baets, R.; Kuyken, B.; Liu, X.

2012-01-01

Silicon-on-Insulator nanowires provide an excellent platform for nonlinear optical functions in spite of the two-photon absorption at telecom wavelengths. Work on both crystalline and amorphous silicon nanowires is reviewed, in the wavelength range of 1.5 to 2.5 µm....

Preparation of highly aligned silicon oxide nanowires with stable intensive photoluminescence

International Nuclear Information System (INIS)

Duraia, El-Shazly M.; Mansurov, Z.A.; Tokmolden, S.; Beall, Gary W.

2010-01-01

In this work we report the successful formation of highly aligned vertical silicon oxide nanowires. The source of silicon was from the substrate itself without any additional source of silicon. X-ray measurement demonstrated that our nanowires are amorphous. Photoluminescence measurements were conducted through 18 months and indicated that there is a very good intensive emission peaks near the violet regions. The FTIR measurements indicated the existence of peaks at 463, 604, 795 and a wide peak at 1111 cm -1 and this can be attributed to Si-O-Si and Si-O stretching vibrations. We also report the formation of the octopus-like silicon oxide nanowires and the growth mechanism of these structures was discussed.

Preparation of highly aligned silicon oxide nanowires with stable intensive photoluminescence

Energy Technology Data Exchange (ETDEWEB)

Duraia, El-Shazly M., E-mail: duraia_physics@yahoo.co [Suez Canal University, Faculty of Science, Physics Department, Ismailia (Egypt); Al-Farabi Kazakh National University, Almaty (Kazakhstan); Institute of Physics and Technology, 11 Ibragimov Street, 050032 Almaty (Kazakhstan); Mansurov, Z.A. [Al-Farabi Kazakh National University, Almaty (Kazakhstan); Tokmolden, S. [Institute of Physics and Technology, 11 Ibragimov Street, 050032 Almaty (Kazakhstan); Beall, Gary W. [Texas State University-San Marcos, Department of Chemistry and Biochemistry, 601 University Dr., San Marcos, TX 78666 (United States)

2010-02-15

In this work we report the successful formation of highly aligned vertical silicon oxide nanowires. The source of silicon was from the substrate itself without any additional source of silicon. X-ray measurement demonstrated that our nanowires are amorphous. Photoluminescence measurements were conducted through 18 months and indicated that there is a very good intensive emission peaks near the violet regions. The FTIR measurements indicated the existence of peaks at 463, 604, 795 and a wide peak at 1111 cm{sup -1} and this can be attributed to Si-O-Si and Si-O stretching vibrations. We also report the formation of the octopus-like silicon oxide nanowires and the growth mechanism of these structures was discussed.

Global optimization of silicon nanowires for efficient parametric processes

DEFF Research Database (Denmark)

Vukovic, Dragana; Xu, Jing; Mørk, Jesper

2013-01-01

We present a global optimization of silicon nanowires for parametric single-pump mixing. For the first time, the effect of surface roughness-induced loss is included in the analysis, significantly influencing the optimum waveguide dimensions.......We present a global optimization of silicon nanowires for parametric single-pump mixing. For the first time, the effect of surface roughness-induced loss is included in the analysis, significantly influencing the optimum waveguide dimensions....

Silicon nanowires nanogenerator based on the piezoelectricity of alpha-quartz.

Science.gov (United States)

Yin, Kui; Lin, Haiyang; Cai, Qian; Zhao, Yi; Lee, Shuit-Tong; Hu, Fei; Shao, Mingwang

2013-12-21

Silicon nanowires are important semiconductor with core/shell structure. In this work, the piezoelectric material alpha-quartz was grown in the interface of silicon nanowires by thermal treatment at 600 °C for 0.5 h. These nanowires were employed as starting materials to fabricate piezoelectric nanogenerators, which could convert kinetic energy into electrical one, exhibiting an output voltage of 36.5 V and a response current of 1.4 μA under a free-falling object of 300 g at a height of 30 cm.

A silicon-nanowire memory driven by optical gradient force induced bistability

Energy Technology Data Exchange (ETDEWEB)

Dong, B. [School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore 639798 (Singapore); Institute of Microelectronics, A*STAR (Agency for Science, Technology and Research), Singapore 117685 (Singapore); Cai, H., E-mail: caih@ime.a-star.edu.sg; Gu, Y. D.; Kwong, D. L. [Institute of Microelectronics, A*STAR (Agency for Science, Technology and Research), Singapore 117685 (Singapore); Chin, L. K.; Ng, G. I.; Ser, W. [School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore 639798 (Singapore); Huang, J. G. [School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore 639798 (Singapore); Institute of Microelectronics, A*STAR (Agency for Science, Technology and Research), Singapore 117685 (Singapore); School of Mechanical Engineering, Xi' an Jiaotong University, Xi' an 710049 (China); Yang, Z. C. [School of Electronics Engineering and Computer Science, Peking University, Beijing 100871 (China); Liu, A. Q., E-mail: eaqliu@ntu.edu.sg [School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore 639798 (Singapore); School of Electronics Engineering and Computer Science, Peking University, Beijing 100871 (China)

2015-12-28

In this paper, a bistable optical-driven silicon-nanowire memory is demonstrated, which employs ring resonator to generate optical gradient force over a doubly clamped silicon-nanowire. Two stable deformation positions of a doubly clamped silicon-nanowire represent two memory states (“0” and “1”) and can be set/reset by modulating the light intensity (<3 mW) based on the optical force induced bistability. The time response of the optical-driven memory is less than 250 ns. It has applications in the fields of all optical communication, quantum computing, and optomechanical circuits.

Coaxial-structured ZnO/silicon nanowires extended-gate field-effect transistor as pH sensor

International Nuclear Information System (INIS)

Li, Hung-Hsien; Yang, Chi-En; Kei, Chi-Chung; Su, Chung-Yi; Dai, Wei-Syuan; Tseng, Jung-Kuei; Yang, Po-Yu; Chou, Jung-Chuan; Cheng, Huang-Chung

2013-01-01

An extended-gate field-effect transistor (EGFET) of coaxial-structured ZnO/silicon nanowires as pH sensor was demonstrated in this paper. The oriented 1-μm-long silicon nanowires with the diameter of about 50 nm were vertically synthesized by the electroless metal deposition method at room temperature and were sequentially capped with the ZnO films using atomic layer deposition at 50 °C. The transfer characteristics (I DS –V REF ) of such ZnO/silicon nanowire EGFET sensor exhibited the sensitivity and linearity of 46.25 mV/pH and 0.9902, respectively for the different pH solutions (pH 1–pH 13). In contrast to the ZnO thin-film ones, the ZnO/silicon nanowire EGFET sensor achieved much better sensitivity and superior linearity. It was attributed to a high surface-to-volume ratio of the nanowire structures, reflecting a larger effective sensing area. The output voltage and time characteristics were also measured to indicate good reliability and durability for the ZnO/silicon nanowires sensor. Furthermore, the hysteresis was 9.74 mV after the solution was changed as pH 7 → pH 3 → pH 7 → pH 11 → pH 7. - Highlights: ► Coaxial-structured ZnO/silicon nanowire EGFET was demonstrated as pH sensor. ► EMD and ALD methods were proposed to fabricate ZnO/silicon nanowires. ► ZnO/silicon nanowire EGFET sensor achieved better sensitivity and linearity. ► ZnO/silicon nanowire EGFET sensor had good reliability and durability

Scaling Laws for NanoFET Sensors

Science.gov (United States)

Wei, Qi-Huo; Zhou, Fu-Shan

2008-03-01

In this paper, we report our numerical studies of the scaling laws for nanoplate field-effect transistor (FET) sensors by simplifying the nanoplates as random resistor networks. Nanowire/tube FETs are included as the limiting cases where the device width goes small. Computer simulations show that the field effect strength exerted by the binding molecules has significant impact on the scaling behaviors. When the field effect strength is small, nanoFETs have little size and shape dependence. In contrast, when the field-effect strength becomes stronger, there exists a lower detection threshold for charge accumulation FETs and an upper detection threshold for charge depletion FET sensors. At these thresholds, the nanoFET devices undergo a transition between low and large sensitivities. These thresholds may set the detection limits of nanoFET sensors. We propose to eliminate these detection thresholds by employing devices with very short source-drain distance and large width.

Simulation of thermo-mechanical effect in bulk-silicon FinFETs

OpenAIRE

Burenkov, Alex; Lorenz, Jürgen

2016-01-01

The thermo-mechanical effect in bulk-silicon FinFETs of the 14 nm CMOS technology node is studied by means of numerical simulation. The electrical performance of such devices is significantly enhanced by the intentional introduction of mechanical stress during the device processing. The thermo-mechanical effect modifies the mechanical stress distribution in active regions of the transistors when they are heated. This can lead to a modification of the electrical performance. Numerical simulati...

Synthesis of porous silicon nano-wires and the emission of red luminescence

International Nuclear Information System (INIS)

Congli, Sun; Hao, Hu; Huanhuan, Feng; Jingjing, Xu; Yu, Chen; Yong, Jin; Zhifeng, Jiao; Xiaosong, Sun

2013-01-01

This very paper is focusing on the characterization of porous silicon nano-wires prepared via a two-step route, the electroless chemical etching and the following post-treatment of HF/HNO 3 solution. Hence, scanning electron microscopy, transmission electron microscopy and confocal fluorescence microscopy are employed for this purpose. From the results of experiments, one can find that the as-prepared silicon nano-wire is of smooth surface and that no visible photo-luminescence emission could be seen. However, the porous structure can be found in the silicon nano-wire treated with HF/HNO 3 solution, and the clear photo-luminescence emission of 630 nm can be recorded with a confocal fluorescence microscope. The transmission electron microscopy test tells that the porous silicon nano-wire is made up of a porous crystalline silicon nano-core and a rough coating of silicon oxide. Besides, based on the post-HF- and -H 2 O 2 - treatments, the emission mechanism of the red luminescence has been discussed and could be attributed to the quantum confinement/luminescence center model which could be simply concluded as that the electron–hole pairs are mainly excited inside the porous silicon nano-core and then tunneling out and recombining at the silicon oxide coating.

Synthesis of porous silicon nano-wires and the emission of red luminescence

Energy Technology Data Exchange (ETDEWEB)

Congli, Sun [School of Materials Science and Engineering, Sichuan University (China); Hao, Hu [National Engineering Research Center for Biomaterials, Sichuan University, Chengdu 610064, Sichuan (China); Huanhuan, Feng; Jingjing, Xu; Yu, Chen; Yong, Jin; Zhifeng, Jiao [School of Materials Science and Engineering, Sichuan University (China); Xiaosong, Sun, E-mail: sunxs@scu.edu.cn [School of Materials Science and Engineering, Sichuan University (China)

2013-10-01

This very paper is focusing on the characterization of porous silicon nano-wires prepared via a two-step route, the electroless chemical etching and the following post-treatment of HF/HNO{sub 3} solution. Hence, scanning electron microscopy, transmission electron microscopy and confocal fluorescence microscopy are employed for this purpose. From the results of experiments, one can find that the as-prepared silicon nano-wire is of smooth surface and that no visible photo-luminescence emission could be seen. However, the porous structure can be found in the silicon nano-wire treated with HF/HNO{sub 3} solution, and the clear photo-luminescence emission of 630 nm can be recorded with a confocal fluorescence microscope. The transmission electron microscopy test tells that the porous silicon nano-wire is made up of a porous crystalline silicon nano-core and a rough coating of silicon oxide. Besides, based on the post-HF- and -H{sub 2}O{sub 2}- treatments, the emission mechanism of the red luminescence has been discussed and could be attributed to the quantum confinement/luminescence center model which could be simply concluded as that the electron–hole pairs are mainly excited inside the porous silicon nano-core and then tunneling out and recombining at the silicon oxide coating.

Silicon-on-Insulator Nanowire Based Optical Waveguide Biosensors

International Nuclear Information System (INIS)

Li, Mingyu; Liu, Yong; Chen, Yangqing; He, Jian-Jun

2016-01-01

Optical waveguide biosensors based on silicon-on-insulator (SOI) nanowire have been developed for label free molecular detection. This paper reviews our work on the design, fabrication and measurement of SOI nanowire based high-sensitivity biosensors employing Vernier effect. Biosensing experiments using cascaded double-ring sensor and Mach-Zehnder- ring sensor integrated with microfluidic channels are demonstrated (paper)

Ion/Ioff ratio enhancement and scalability of gate-all-around nanowire negative-capacitance FET with ferroelectric HfO2

Science.gov (United States)

Jang, Kyungmin; Saraya, Takuya; Kobayashi, Masaharu; Hiramoto, Toshiro

2017-10-01

We have investigated the energy efficiency and scalability of ferroelectric HfO2 (FE:HfO2)-based negative-capacitance field-effect-transistor (NCFET) with gate-all-around (GAA) nanowire (NW) channel structure. Analytic simulation is conducted to characterize NW-NCFET by varying NW diameter and/or thickness of gate insulator as device structural parameters. Due to the negative-capacitance effect and GAA NW channel structure, NW-NCFET is found to have 5× higher Ion/Ioff ratio than classical NW-MOSFET and 2× higher than double-gate (DG) NCFET, which results in wider design window for high Ion/Ioff ratio. To analyze these obtained results from the viewpoint of the device scalability, we have considered constraints regarding very limited device structural spaces to fit by the gate insulator and NW channel for aggresively scaled gate length (Lg) and/or very tight NW pitch. NW-NCFET still has design point with very thinned gate insulator and/or narrowed NW. Therefore, FE:HfO2-based NW-NCFET is applicable to the aggressively scaled technology node of sub-10 nm Lg and to the very tight NW integration of sub-30 nm NW pitch for beyond 7 nm technology. From 2011 to 2014, he engaged in developing high-speed optical transceiver module as an alternative military service in Republic of Korea. His research interest includes the development of steep slope MOSFETs for high energy-efficient operation and ferroelectric HfO2-based semiconductor devices, and fabrication of nanostructured devices. He joined the IBM T.J. Watson Research Center, Yorktown Heights, NY, in 2010, where he worked on advanced CMOS technologies such as FinFET, nanowire FET, SiGe channel and III-V channel. He was also engaged in launching 14 nm SOI FinFET and RMG technology development. Since 2014, he has been an Associate Professor in Institute of Industrial Science, University of Tokyo, Tokyo, Japan, where he has been working on ultralow power transistor and memory technology. Dr. Kobayashi is a member of IEEE

Directed deposition of silicon nanowires using neopentasilane as precursor and gold as catalyst

Directory of Open Access Journals (Sweden)

Britta Kämpken

2012-07-01

Full Text Available In this work the applicability of neopentasilane (Si(SiH34 as a precursor for the formation of silicon nanowires by using gold nanoparticles as a catalyst has been explored. The growth proceeds via the formation of liquid gold/silicon alloy droplets, which excrete the silicon nanowires upon continued decomposition of the precursor. This mechanism determines the diameter of the Si nanowires. Different sources for the gold nanoparticles have been tested: the spontaneous dewetting of gold films, thermally annealed gold films, deposition of preformed gold nanoparticles, and the use of “liquid bright gold”, a material historically used for the gilding of porcelain and glass. The latter does not only form gold nanoparticles when deposited as a thin film and thermally annealed, but can also be patterned by using UV irradiation, providing access to laterally structured layers of silicon nanowires.

Carbon−Silicon Core−Shell Nanowires as High Capacity Electrode for Lithium Ion Batteries

KAUST Repository

Cui, Li-Feng; Yang, Yuan; Hsu, Ching-Mei; Cui, Yi

2009-01-01

We introduce a novel design of carbon-silicon core-shell nanowires for high power and long life lithium battery electrodes. Amorphous silicon was coated onto carbon nanofibers to form a core-shell structure and the resulted core-shell nanowires

Solution-grown silicon nanowires for lithium-ion battery anodes.

Science.gov (United States)

Chan, Candace K; Patel, Reken N; O'Connell, Michael J; Korgel, Brian A; Cui, Yi

2010-03-23

Composite electrodes composed of silicon nanowires synthesized using the supercritical fluid-liquid-solid (SFLS) method mixed with amorphous carbon or carbon nanotubes were evaluated as Li-ion battery anodes. Carbon coating of the silicon nanowires using the pyrolysis of sugar was found to be crucial for making good electronic contact to the material. Using multiwalled carbon nanotubes as the conducting additive was found to be more effective for obtaining good cycling behavior than using amorphous carbon. Reversible capacities of 1500 mAh/g were observed for 30 cycles.

Solution-Grown Silicon Nanowires for Lithium-Ion Battery Anodes

KAUST Repository

Chan, Candace K.

2010-03-23

Composite electrodes composed of silicon nanowires synthesized using the supercritical fluid-liquid-solid (SFLS) method mixed with amorphous carbon or carbon nanotubes were evaluated as Li-ion battery anodes. Carbon coating of the silicon nanowires using the pyrolysis of sugar was found to be crucial for making good electronic contact to the material. Using multiwalled carbon nanotubes as the conducting additive was found to be more effective for obtaining good cycling behavior than using amorphous carbon. Reversible capacities of 1500 mAh/g were observed for 30 cycles. © 2010 American Chemical Society.

Out-of-plane strain effect on silicon-based flexible FinFETs

KAUST Repository

Ghoneim, Mohamed T.; Alfaraj, Nasir; Sevilla, Galo T.; Fahad, Hossain M.; Hussain, Muhammad Mustafa

2015-01-01

Summary form only given. We report out-of-plane strain effect on silicon based flexible FinFET, with sub 20 nm wide fins and hafnium silicate based high-κ gate dielectric. Since ultra-thin inorganic solid state substrates become flexible with reduced thickness, flexing induced strain does not enhance performance. However, detrimental effects arise as the devices are subject to various out-of-plane stresses (compressive and tensile) along the channel length.

Out-of-plane strain effect on silicon-based flexible FinFETs

KAUST Repository

Ghoneim, Mohamed T.

2015-06-21

Summary form only given. We report out-of-plane strain effect on silicon based flexible FinFET, with sub 20 nm wide fins and hafnium silicate based high-κ gate dielectric. Since ultra-thin inorganic solid state substrates become flexible with reduced thickness, flexing induced strain does not enhance performance. However, detrimental effects arise as the devices are subject to various out-of-plane stresses (compressive and tensile) along the channel length.

Carbon−Silicon Core−Shell Nanowires as High Capacity Electrode for Lithium Ion Batteries

KAUST Repository

Cui, Li-Feng

2009-09-09

We introduce a novel design of carbon-silicon core-shell nanowires for high power and long life lithium battery electrodes. Amorphous silicon was coated onto carbon nanofibers to form a core-shell structure and the resulted core-shell nanowires showed great performance as anode material. Since carbon has a much smaller capacity compared to silicon, the carbon core experiences less structural stress or damage during lithium cycling and can function as a mechanical support and an efficient electron conducting pathway. These nanowires have a high charge storage capacity of ∼2000 mAh/g and good cycling life. They also have a high Coulmbic efficiency of 90% for the first cycle and 98-99.6% for the following cycles. A full cell composed of LiCoO2 cathode and carbon-silicon core-shell nanowire anode is also demonstrated. Significantly, using these core-shell nanowires we have obtained high mass loading and an area capacity of ∼4 mAh/cm2, which is comparable to commercial battery values. © 2009 American Chemical Society.

Ultra-low reflection porous silicon nanowires for solar cell applications

OpenAIRE

Najar , Adel; Charrier , Joël; Pirasteh , Parastesh; Sougrat , R.

2012-01-01

International audience; High density vertically aligned Porous Silicon NanoWires (PSiNWs) were fabricated on silicon substrate using metal assisted chemical etching process. A linear dependency of nanowire length to the etching time was obtained and the change in the growth rate of PSiNWs by increasing etching durations was shown. A typical 2D bright-field TEM image used for volume reconstruction of the sample shows the pores size varying from 10 to 50 nm. Furthermore, reflectivity measuremen...

Room temperature NO2 gas sensing of Au-loaded tungsten oxide nanowires/porous silicon hybrid structure

International Nuclear Information System (INIS)

Wang Deng-Feng; Liang Ji-Ran; Li Chang-Qing; Yan Wen-Jun; Hu Ming

2016-01-01

In this work, we report an enhanced nitrogen dioxide (NO 2 ) gas sensor based on tungsten oxide (WO 3 ) nanowires/porous silicon (PS) decorated with gold (Au) nanoparticles. Au-loaded WO 3 nanowires with diameters of 10 nm–25 nm and lengths of 300 nm–500 nm are fabricated by the sputtering method on a porous silicon substrate. The high-resolution transmission electron microscopy (HRTEM) micrographs show that Au nanoparticles are uniformly distributed on the surfaces of WO 3 nanowires. The effect of the Au nanoparticles on the NO 2 -sensing performance of WO 3 nanowires/porous silicon is investigated over a low concentration range of 0.2 ppm–5 ppm of NO 2 at room temperature (25 °C). It is found that the 10-Å Au-loaded WO 3 nanowires/porous silicon-based sensor possesses the highest gas response characteristic. The underlying mechanism of the enhanced sensing properties of the Au-loaded WO 3 nanowires/porous silicon is also discussed. (paper)

Device fabrication and transport measurements of FinFETs built with 28Si SOI wafers towards donor qubits in silicon

Energy Technology Data Exchange (ETDEWEB)

Lo, Cheuk Chi; Persaud, Arun; Dhuey, Scott; Olynick, Deirdre; Borondics, Ferenc; Martin, Michael C.; Bechtel, Hans A.; Bokor, Jeffrey; Schenkel, Thomas

2009-06-10

We report fabrication of transistors in a FinFET geometry using isotopically purified silicon-28 -on-insulator (28-SOI) substrates. Donor electron spin coherence in natural silicon is limited by spectral diffusion due to the residual 29Si nuclear spin bath, making isotopically enriched nuclear spin-free 28Si substrates a promising candidate for forming spin quantum bit devices. The FinFET architecture is fully compatible with single-ion implant detection for donor-based qubits, and the donor spin-state readout through electrical detection of spin resonance. We describe device processing steps and discuss results on electrical transport measurements at 0.3 K.

A III-V nanowire channel on silicon for high-performance vertical transistors.

Science.gov (United States)

Tomioka, Katsuhiro; Yoshimura, Masatoshi; Fukui, Takashi

2012-08-09

Silicon transistors are expected to have new gate architectures, channel materials and switching mechanisms in ten years' time. The trend in transistor scaling has already led to a change in gate structure from two dimensions to three, used in fin field-effect transistors, to avoid problems inherent in miniaturization such as high off-state leakage current and the short-channel effect. At present, planar and fin architectures using III-V materials, specifically InGaAs, are being explored as alternative fast channels on silicon because of their high electron mobility and high-quality interface with gate dielectrics. The idea of surrounding-gate transistors, in which the gate is wrapped around a nanowire channel to provide the best possible electrostatic gate control, using InGaAs channels on silicon, however, has been less well investigated because of difficulties in integrating free-standing InGaAs nanostructures on silicon. Here we report the position-controlled growth of vertical InGaAs nanowires on silicon without any buffering technique and demonstrate surrounding-gate transistors using InGaAs nanowires and InGaAs/InP/InAlAs/InGaAs core-multishell nanowires as channels. Surrounding-gate transistors using core-multishell nanowire channels with a six-sided, high-electron-mobility transistor structure greatly enhance the on-state current and transconductance while keeping good gate controllability. These devices provide a route to making vertically oriented transistors for the next generation of field-effect transistors and may be useful as building blocks for wireless networks on silicon platforms.

Silicon Nanowire Field-effect Chemical Sensor

NARCIS (Netherlands)

Chen, S.

2011-01-01

This thesis describes the work that has been done on the project “Design and optimization of silicon nanowire for chemical sensing‿, including Si-NW fabrication, electrical/electrochemical modeling, the application as ISFET, and the build-up of Si- NW/LOC system for automatic sample delivery. A

Study of optical absorbance in porous silicon nanowires for photovoltaic applications

KAUST Repository

Charrier, Joël

2013-10-01

Porous silicon nanowires (PSiNWs) layers fabrication was reported. Reflectance spectra were measured as a function of the nanowire length and were inferior to 0.1% and a strong photoluminescence (PL) signal was measured from samples. Models based on cone shape of nanowires located in circular and rectangular bases were used to calculate the reflectance using the transfer matrix formalism (TMF) of PSiNWs layer. The modeling of the reflectance permits to explain this value by taking account into the shape of the nanowires and its porosity. Optical absorbance and transmission were also theoretically studied. The absorbance was superior to that obtained with silicon nanowires and the ultimate efficiency was about equal to 25% for normal incidence angle. These results could be applied to the potential application in low-cost and high efficiency PSiNWs based solar cells. © 2013 Elsevier B.V. All rights reserved.

Polarization Insensitive One-to-Six WDM Multicasting in a Silicon Nanowire

DEFF Research Database (Denmark)

Pu, Minhao; Hu, Hao; Peucheret, Christophe

2012-01-01

We present polarization insensitive one-to-six WDM multicasting based on nondegenerate four-wave mixing in a silicon nanowire with angled-pump scheme. Bit-error rate measurements are performed and error-free operation is achieved.......We present polarization insensitive one-to-six WDM multicasting based on nondegenerate four-wave mixing in a silicon nanowire with angled-pump scheme. Bit-error rate measurements are performed and error-free operation is achieved....

Modulation of thermal conductivity in kinked silicon nanowires: phonon interchanging and pinching effects.

Science.gov (United States)

Jiang, Jin-Wu; Yang, Nuo; Wang, Bing-Shen; Rabczuk, Timon

2013-04-10

We perform molecular dynamics simulations to investigate the reduction of the thermal conductivity by kinks in silicon nanowires. The reduction percentage can be as high as 70% at room temperature. The temperature dependence of the reduction is also calculated. By calculating phonon polarization vectors, two mechanisms are found to be responsible for the reduced thermal conductivity: (1) the interchanging effect between the longitudinal and transverse phonon modes and (2) the pinching effect, that is, a new type of localization, for the twisting and transverse phonon modes in the kinked silicon nanowires. Our work demonstrates that the phonon interchanging and pinching effects, induced by kinking, are brand-new and effective ways in modulating heat transfer in nanowires, which enables the kinked silicon nanowires to be a promising candidate for thermoelectric materials.

Growth of Gold-assisted Gallium Arsenide Nanowires on Silicon Substrates via Molecular Beam Epitaxy

Directory of Open Access Journals (Sweden)

Ramon M. delos Santos

2008-06-01

Full Text Available Gallium arsenide nanowires were grown on silicon (100 substrates by what is called the vapor-liquid-solid (VLS growth mechanism using a molecular beam epitaxy (MBE system. Good quality nanowires with surface density of approximately 108 nanowires per square centimeter were produced by utilizing gold nanoparticles, with density of 1011 nanoparticles per square centimeter, as catalysts for nanowire growth. X-ray diffraction measurements, scanning electron microscopy, transmission electron microscopy and Raman spectroscopy revealed that the nanowires are epitaxially grown on the silicon substrates, are oriented along the [111] direction and have cubic zincblende structure.

Structural and electrochemical study of the reaction of lithium with silicon nanowires

KAUST Repository

Chan, Candace K.

2009-04-01

The structural transformations of silicon nanowires when cycled against lithium were evaluated using electrochemical potential spectroscopy and galvanostatic cycling. During the charge, the nanowires alloy with lithium to form an amorphous LixSi compound. At potentials <50 mV, a structural transformation occurs. In studies on micron-sized particles previously reported in the literature, this transformation is a crystallization to a metastable Li15Si4 phase. X-ray diffraction measurements on the Si nanowires, however, show that they are amorphous, suggesting that a different amorphous phase (LiySi) is formed. Lithium is removed from this phase in the discharge to form amorphous silicon. We have found that limiting the voltage in the charge to 70 mV results in improved efficiency and cyclability compared to charging to 10 mV. This improvement is due to the suppression of the transformation at low potentials, which alloys for reversible cycling of amorphous silicon nanowires. © 2008 Elsevier B.V. All rights reserved.

A new approach for two-terminal electronic memory devices - Storing information on silicon nanowires

Science.gov (United States)

Saranti, Konstantina; Alotaibi, Sultan; Paul, Shashi

2016-06-01

The work described in this paper focuses on the utilisation of silicon nanowires as the information storage element in flash-type memory devices. Silicon nanostructures have attracted attention due to interesting electrical and optical properties, and their potential integration into electronic devices. A detailed investigation of the suitability of silicon nanowires as the charge storage medium in two-terminal non-volatile memory devices are presented in this report. The deposition of the silicon nanostructures was carried out at low temperatures (less than 400 °C) using a previously developed a novel method within our research group. Two-terminal non-volatile (2TNV) memory devices and metal-insulator-semiconductor (MIS) structures containing the silicon nanowires were fabricated and an in-depth study of their characteristics was carried out using current-voltage and capacitance techniques.

Study of optical absorbance in porous silicon nanowires for photovoltaic applications

KAUST Repository

Charrier, Joë l; Najar, Adel; Pirasteh, Parastesh

2013-01-01

Porous silicon nanowires (PSiNWs) layers fabrication was reported. Reflectance spectra were measured as a function of the nanowire length and were inferior to 0.1% and a strong photoluminescence (PL) signal was measured from samples. Models based

Scattering cross section of metal catalyst atoms in silicon nanowires

DEFF Research Database (Denmark)

Markussen, Troels; Rurali, R.; Cartoixa, X.

2010-01-01

A common technique to fabricate silicon nanowires is to use metal particles (e.g., Au, Ag, Cu, Al) to catalyze the growth reaction. As a consequence, the fabricated nanowires contain small concentrations of these metals as impurities. In this work we investigate the effect of the metallic impurit...

Investigation of functionalized silicon nanowires by self-assembled monolayer

Energy Technology Data Exchange (ETDEWEB)

Hemed, Nofar Mintz [Dept. of Physical Electronics, Eng. Faculty, and the University Res. Inst. for Nano Science and Nano-Technologies, Tel-Aviv University, Ramat-Aviv 69978 (Israel); Convertino, Annalisa [Istituto per la Microelettronica e i Microsistemi C.N.R.-Area della Ricerca di Roma, via del Fosso del Cavaliere 100, I-00133 Roma (Italy); Shacham-Diamand, Yosi [Dept. of Physical Electronics, Eng. Faculty, and the University Res. Inst. for Nano Science and Nano-Technologies, Tel-Aviv University, Ramat-Aviv 69978 (Israel); The Department of Applied Chemistry, Waseda University, 3-4-1 Okubo, Shinjuku, Tokyo 169-8555 (Japan)

2016-03-30

Graphical abstract: - Highlights: • We characterize and verify the existence of self-assembled monolayer (SAM) on silicon nanowires and α-Si:H. • We define the term “electrical coverage” and find the formula for both cases. • The SAM's electrical coverage on silicon nanowires is found to be ∼63%. • The SAM's electrical coverage on α-Si:H is found to be ∼65 ± 3%. • The amount of SAM on the SiNWs is sufficient and it can serve as a linker to biological molecules. - Abstract: The functionalization using self assembled monolayer (SAM) of silicon nanowires (SiNW) fabricated by plasma enhanced chemical vapor deposition (PECVD) is reported here. The SAM is being utilized as the first building block in the functionalization process. The morphology of the SiNW comprises a polycrystalline core wrapped by an hydrogenated amorphous silicon (α-Si:H) shell. Since most of the available methods for SAM verification and characterization are suitable only for flat substrates; therefore, in addition to the SiNW α-Si:H on flat samples were produced in the same system as the SiNWs. First we confirmed the SAM's presence on the flat α-Si:H samples using the following methods: contact angle measurement to determine the change in surface energy; atomic force microscopy (AFM) to determine uniformity and molecular coverage. Spectroscopic ellipsometry and X-ray reflectivity (XRR) were performed to measure SAM layer thickness and density. X-ray photoelectron spectroscopy (XPS) was applied to study the chemical states of the surface. Next, SiNW/SAM were tested by electrochemical impedance spectroscopy (EIS), and the results were compared to α-Si:H/SAM. The SAM electrical coverage on SiNW and α-Si:H was found to be ∼37% and ∼65 ± 3%, respectively. A model, based on transmission line theory for the nanowires is presented to explain the disparity in results between the nanowires and flat surface of the same materials.

Silicon nanowires for photovoltaic solar energy conversion.

Science.gov (United States)

Peng, Kui-Qing; Lee, Shuit-Tong

2011-01-11

Semiconductor nanowires are attracting intense interest as a promising material for solar energy conversion for the new-generation photovoltaic (PV) technology. In particular, silicon nanowires (SiNWs) are under active investigation for PV applications because they offer novel approaches for solar-to-electric energy conversion leading to high-efficiency devices via simple manufacturing. This article reviews the recent developments in the utilization of SiNWs for PV applications, the relationship between SiNW-based PV device structure and performance, and the challenges to obtaining high-performance cost-effective solar cells.

The physical analysis on electrical junction of junctionless FET

Directory of Open Access Journals (Sweden)

Lun-Chun Chen

2017-02-01

Full Text Available We propose the concept of the electrical junction in a junctionless (JL field-effect-transistor (FET to illustrate the transfer characteristics of the JL FET. In this work, nanowire (NW junctionless poly-Si thin-film transistors are used to demonstrate this conception of the electrical junction. Though the dopant and the dosage of the source, of the drain, and of the channel are exactly the same in the JL FET, the transfer characteristics of the JL FET is similar to these of the conventional inversion-mode FET rather than these of a resistor, which is because of the electrical junction at the boundary of the gate and the drain in the JL FET. The electrical junction helps us to understand the JL FET, and also to explain the superior transfer characteristic of the JL FET with the gated raised S/D (Gout structure which reveals low drain-induced-barrier-lowering (DIBL and low breakdown voltage of ion impact ionization.

Surface functionalization of HF-treated silicon nanowires

Indian Academy of Sciences (India)

Administrator

place when silicon nanowires reacted with 2,2,2-trifluoroethyl acrylate, and reductive deposition reaction occurred in the ... detection of fM level of protein. 14 and DNA. 15 ... surfaces can be easily modified to act as both elec- tron-transfer ...

Structural and electrochemical study of the reaction of lithium with silicon nanowires

KAUST Repository

Chan, Candace K.; Ruffo, Riccardo; Hong, Seung Sae; Huggins, Robert A.; Cui, Yi

2009-01-01

The structural transformations of silicon nanowires when cycled against lithium were evaluated using electrochemical potential spectroscopy and galvanostatic cycling. During the charge, the nanowires alloy with lithium to form an amorphous Lix

Silicon nanowire based high brightness, pulsed relativistic electron source

Directory of Open Access Journals (Sweden)

Deep Sarkar

2017-06-01

Full Text Available We demonstrate that silicon nanowire arrays efficiently emit relativistic electron pulses under irradiation by a high-intensity, femtosecond, and near-infrared laser (∼1018 W/cm2, 25 fs, 800 nm. The nanowire array yields fluxes and charge per bunch that are 40 times higher than those emitted by an optically flat surface, in the energy range of 0.2–0.5 MeV. The flux and charge yields for the nanowires are observed to be directional in nature unlike that for planar silicon. Particle-in-cell simulations establish that such large emission is caused by the enhancement of the local electric fields around a nanowire, which consequently leads to an enhanced absorption of laser energy. We show that the high-intensity contrast (ratio of picosecond pedestal to femtosecond peak of the laser pulse (10−9 is crucial to this large yield. We extend the notion of surface local-field enhancement, normally invoked in low-order nonlinear optical processes like second harmonic generation, optical limiting, etc., to ultrahigh laser intensities. These electron pulses, expectedly femtosecond in duration, have potential application in imaging, material modification, ultrafast dynamics, terahertz generation, and fast ion sources.

Dimensional effects in semiconductor nanowires; Dimensionseffekte in Halbleiternanodraehten

Energy Technology Data Exchange (ETDEWEB)

Stichtenoth, Daniel

2008-06-23

. Furthermore, GaAs nanowires were implanted with zinc ions. Electrical measurements on individual nanowires show a conductivity rise by four orders of magnitude. This points to a successful p-type doping. In a lithographic process ZnO nanowires were fabricated to field effect transistors (FET). Depending on the diameter and processing these FETs show carrier concentrations up to 10{sup 20} cm{sup -3} and mobilities up to 4800 cm{sup 2}/(Vs). Finally, a simple scalable process for the production of ZnO nanowire light emitting diodes (LED) is presented. The electro-luminescence of the nanowire LED is dominated by near band gap transitions, i.e. in the UV. It can be explained by tunnel injection from the p-silicon substrate into the ZnO nanowires. The light is mainly emitted from the end faces of the nanowires. This way the diameter of the light sources is defined by the diameter of the nanowires. (orig.)

Unlocking the Origin of Superior Performance of a Si-Ge Core-Shell Nanowire Quantum Dot Field Effect Transistor.

Science.gov (United States)

Dhungana, Kamal B; Jaishi, Meghnath; Pati, Ranjit

2016-07-13

The sustained advancement in semiconducting core-shell nanowire technology has unlocked a tantalizing route for making next generation field effect transistor (FET). Understanding how to control carrier mobility of these nanowire channels by applying a gate field is the key to developing a high performance FET. Herein, we have identified the switching mechanism responsible for the superior performance of a Si-Ge core-shell nanowire quantum dot FET over its homogeneous Si counterpart. A quantum transport approach is used to investigate the gate-field modulated switching behavior in electronic current for ultranarrow Si and Si-Ge core-shell nanowire quantum dot FETs. Our calculations reveal that for the ON state, the gate-field induced transverse localization of the wave function restricts the carrier transport to the outer (shell) layer with the pz orbitals providing the pathway for tunneling of electrons in the channels. The higher ON state current in the Si-Ge core-shell nanowire FET is attributed to the pz orbitals that are distributed over the entire channel; in the case of Si nanowire, the participating pz orbital is restricted to a few Si atoms in the channel resulting in a smaller tunneling current. Within the gate bias range considered here, the transconductance is found to be substantially higher in the case of a Si-Ge core-shell nanowire FET than in a Si nanowire FET, which suggests a much higher mobility in the Si-Ge nanowire device.

Assessment on thermoelectric power factor in silicon nanowire networks

Energy Technology Data Exchange (ETDEWEB)

Lohn, Andrew J.; Kobayashi, Nobuhiko P. [Baskin School of Engineering, University of California Santa Cruz, CA (United States); Nanostructured Energy Conversion Technology and Research (NECTAR), Advanced Studies Laboratories, University of California Santa Cruz, NASA Ames Research Center, Moffett Field, CA (United States); Coleman, Elane; Tompa, Gary S. [Structured Materials Industries, Inc., Piscataway, NJ (United States)

2012-01-15

Thermoelectric devices based on three-dimensional networks of highly interconnected silicon nanowires were fabricated and the parameters that contribute to the power factor, namely the Seebeck coefficient and electrical conductivity were assessed. The large area (2 cm x 2 cm) devices were fabricated at low cost utilizing a highly scalable process involving silicon nanowires grown on steel substrates. Temperature dependence of the Seebeck coefficient was found to be weak over the range of 20-80 C at approximately -400 {mu}V/K for unintentionally doped devices and {+-}50 {mu}V/K for p-type and n-type devices, respectively. (Copyright copyright 2012 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim)

Metal-Catalyst-Free Synthesis and Characterization of Single-Crystalline Silicon Oxynitride Nanowires

Directory of Open Access Journals (Sweden)

Shuang Xi

2012-01-01

Full Text Available Large quantities of single-crystal silicon oxynitride nanowires with high N concentration have been synthesized directly on silicon substrate at 1200°C without using any metal catalyst. The diameter of these ternary nanowires is ranging from 10 to 180 nm with log-normal distribution, and the length of these nanowires varies from a few hundreds of micrometers to several millimeters. A vapor-solid mechanism was proposed to explain the growth of the nanowires. These nanowires are grown to form a disordered mat with an ultrabright white nonspecular appearance. The mat demonstrates highly diffusive reflectivity with the optical reflectivity of around 80% over the whole visible wavelength, which is comparable to the most brilliant white beetle scales found in nature. The whiteness might be resulted from the strong multiscattering of a large fraction of incident light on the disordered nanowire mat. These ultra-bright white nanowires could form as reflecting surface to meet the stringent requirements of bright-white light-emitting-diode lighting for higher optical efficiency. They can also find applications in diverse fields such as sensors, cosmetics, paints, and tooth whitening.

First-principles study of structural & electronic properties of pyramidal silicon nanowire

Energy Technology Data Exchange (ETDEWEB)

Jariwala, Pinank; Thakor, P. B. [Department of Physics, Veer Narmad South Gujarat University, Surat 395 007, Gujarat (India); Singh, Deobrat; Sonvane, Y. A., E-mail: yasonvane@gmail.com [Department of Applied Physics, S. V. National Institute of Technology, Surat 395 007 (India); Gupta, Sanjeev K. [Department of Physics, St. Xavier’s College, Ahmedabad 38 0009 (India)

2016-05-23

We have investigated the stable structural and electronic properties of Silicon (Si) nanowires having different cross-sections with 5-7 Si atoms per unit cell. These properties of the studied Si nanowires were significantly changed from those of diamond bulk Si structure. The binding energy increases as increasing atoms number per unit cell in different SiNWs structures. All the nanowires structures are behave like metallic rather than semiconductor in bulk systems. In general, the number of conduction channels increases when the nanowire becomes thicker. The density of charge revealed delocalized metallic bonding for all studied Si nanowires.

Room temperature photoluminescence in the visible range from silicon nanowires grown by a solid-state reaction

International Nuclear Information System (INIS)

Anguita, J V; Sharma, P; Henley, S J; Silva, S R P

2009-01-01

The solid-liquid-solid method (also known as the solid-state method) is used to produce silicon nanowires at the core of silica nanowires with a support catalyst layer structure of nickel and titanium layers sputtered on oxide-coated silicon wafers. This silane-free process is low cost and large-area compatible. Using electron microscopy and Raman spectroscopy we deduce that the wires have crystalline silicon cores. The nanowires show photoluminescence in the visible range (orange), and we investigate the origin of this band. We further show that the nanowires form a random mesh that acts as an efficient optical trap, giving rise to an optically absorbing medium.

Room temperature photoluminescence in the visible range from silicon nanowires grown by a solid-state reaction

Science.gov (United States)

Anguita, J. V.; Sharma, P.; Henley, S. J.; Silva, S. R. P.

2009-11-01

The solid-liquid-solid method (also known as the solid-state method) is used to produce silicon nanowires at the core of silica nanowires with a support catalyst layer structure of nickel and titanium layers sputtered on oxide-coated silicon wafers. This silane-free process is low cost and large-area compatible. Using electron microscopy and Raman spectroscopy we deduce that the wires have crystalline silicon cores. The nanowires show photoluminescence in the visible range (orange), and we investigate the origin of this band. We further show that the nanowires form a random mesh that acts as an efficient optical trap, giving rise to an optically absorbing medium.

Silicon nanowire networks for multi-stage thermoelectric modules

International Nuclear Information System (INIS)

Norris, Kate J.; Garrett, Matthew P.; Zhang, Junce; Coleman, Elane; Tompa, Gary S.; Kobayashi, Nobuhiko P.

2015-01-01

Highlights: • Fabricated flexible single, double, and quadruple stacked Si thermoelectric modules. • Measured an enhanced power production of 27%, showing vertical stacking is scalable. • Vertically scalable thermoelectric module design of semiconducting nanowires. • Design can utilize either p or n-type semiconductors, both types are not required. • ΔT increases with thickness therefore power/area can increase as modules are stacked. - Abstract: We present the fabrication and characterization of single, double, and quadruple stacked flexible silicon nanowire network based thermoelectric modules. From double to quadruple stacked modules, power production increased 27%, demonstrating that stacking multiple nanowire thermoelectric devices in series is a scalable method to generate power by supplying larger temperature gradient. We present a vertically scalable multi-stage thermoelectric module design using semiconducting nanowires, eliminating the need for both n-type and p-type semiconductors for modules

Chemically Etched Silicon Nanowires as Anodes for Lithium-Ion Batteries

Energy Technology Data Exchange (ETDEWEB)

West, Hannah Elise [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States)

2015-08-01

This study focused on silicon as a high capacity replacement anode for Lithium-ion batteries. The challenge of silicon is that it expands ~270% upon lithium insertion which causes particles of silicon to fracture, causing the capacity to fade rapidly. To account for this expansion chemically etched silicon nanowires from the University of Maine were studied as anodes. They were built into electrochemical half-cells and cycled continuously to measure the capacity and capacity fade.

Organophosphonate functionalized silicon nanowires for DNA hybridization studies

Energy Technology Data Exchange (ETDEWEB)

Pedone, Daniel; Cattani Scholz, Anna; Birner, Stefan; Abstreiter, Gerhard [WSI, TU Muenchen (Germany); Dubey, Manish; Schwartz, Jeffrey [Princeton University, NJ (United States); Tornow, Marc [IHT, TU Braunschweig (Germany)

2007-07-01

Semiconductor nanowire field effect devices have great appeal for label-free sensing applications due to their sensitivity to surface potential changes that may originate from charged adsorbates. In addition to requiring high sensitivity, suitable passivation and functionalization of the semiconductor surface is obligatory. We have fabricated both freely suspended and oxide-supported silicon nanowires from Silicon-on-Insulator substrates using standard nanopatterning methods (EBL, RIE) and sacrificial oxide layer etching. Subsequent to nanofabrication, the devices were first coated with an hydroxyalkylphosphonate monolayer and then bound via bifunctional linker groups to single stranded DNA or PNA oligonucleotides, respectively. We investigated DNA hybridization on such functionalized nanowires using a difference resistance setup, where subtracting the reference signal from a second wire could be used to exclude most non-specific effects. A net change in surface potential on the order of a few mV could be detected upon addition of the complementary DNA strand. This surface potential change corresponds to the hybridization of about 10{sup 10}cm{sup -2} probe strands according to our model calculations that takes into account the entire hybrid system in electrolyte solution.

Non-Faradaic electrical impedimetric investigation of the interfacial effects of neuronal cell growth and differentiation on silicon nanowire transistors.

Science.gov (United States)

Lin, Shu-Ping; Vinzons, Lester U; Kang, Yu-Shan; Lai, Tung-Yen

2015-05-13

Silicon nanowire field-effect transistor (SiNW FET) devices have been interfaced with cells; however, their application for noninvasive, real-time monitoring of interfacial effects during cell growth and differentiation on SiNW has not been fully explored. Here, we cultured rat adrenal pheochromocytoma (PC12) cells, a type of neural progenitor cell, directly on SiNW FET devices to monitor cell adhesion during growth and morphological changes during neuronal differentiation for a period of 5-7 d. Monitoring was performed by measuring the non-Faradaic electrical impedance of the cell-SiNW FET system using a precision LCR meter. Our SiNW FET devices exhibited changes in impedance parameters during cell growth and differentiation because of the negatively charged cell membrane, seal resistance, and membrane capacitance at the cell/SiNW interface. It was observed that during both PC12 cell growth and neuronal differentiation, the impedance magnitude increased and the phase shifted to more negative values. However, impedance changes during cell growth already plateaued 3 d after seeding, while impedance changes continued until the last observation day during differentiation. Our results also indicate that the frequency shift to above 40 kHz after growth factor induction resulted from a larger coverage of cell membrane on the SiNWs due to distinctive morphological changes according to vinculin staining. Encapsulation of PC12 cells in a hydrogel scaffold resulted in a lack of trend in impedance parameters and confirmed that impedance changes were due to the cells. Moreover, cytolysis of the differentiated PC12 cells led to significant changes in impedance parameters. Equivalent electrical circuits were used to analyze the changes in impedance values during cell growth and differentiation. The technique employed in this study can provide a platform for performing investigations of growth-factor-induced progenitor cell differentiation.

The electronic structure of radial p-n junction silicon nanowires

Science.gov (United States)

Chiou, Shan-Haw; Grossman, Jeffrey

2007-03-01

Silicon nanowires with radial p-n junctions have recently been suggested for photovoltaic applications because incident light can be absorbed along the entire length of the wire, while photogenerated carriers only need to diffuse a maximum of one radius to reach the p-n junction. If the differential of the potential is larger than the binding energy of the electron-hole pair and has a range larger than the Bohr radius of electron-hole pair, then the charge separation mechanism will be similar to traditional silicon solar cells. However, in the small-diameter limit, where quantum confinement effects are prominent, both the exciton binding energy and the potential drop will increase, and the p-n junction itself may have a dramatically different character. We present ab initio calculations based on the generalized gradient approximation (GGA) of silicon nanowires with 2-3 nm diameter in the [111] growth direction. A radial p-n junction was formed by symmetrically doping boron and phosphorous at the same vertical level along the axis of the nanowire. The competition between the slope and character of the radial electronic potential and the exciton binding energy will presented in the context of a charge separation mechanism.

Direct-write fabrication of a nanoscale digital logic element on a single nanowire

International Nuclear Information System (INIS)

Roy, Somenath; Gao Zhiqiang

2010-01-01

In this paper we report on the 'direct-write' fabrication and electrical characteristics of a nanoscale logic inverter, integrating enhancement-mode (E-mode) and depletion-mode (D-mode) field-effect transistors (FETs) on a single zinc oxide (ZnO) nanowire. 'Direct-writing' of platinum metal electrodes and a dielectric layer is executed on individual single-crystalline ZnO nanowires using either a focused electron beam (FEB) or a focused ion beam (FIB). We fabricate a top-gate FET structure, in which the gate electrode wraps around the ZnO nanowire, resulting in a more efficient gate response than the conventional back-gate nanowire transistors. For E-mode device operation, the gate electrode (platinum) is deposited directly onto the ZnO nanowire by a FEB, which creates a Schottky barrier and in turn a fully depleted channel. Conversely, sandwiching an insulating layer between the FIB-deposited gate electrode and the nanowire channel makes D-mode operation possible. Integrated E- and D-mode FETs on a single nanowire exhibit the characteristics of a direct-coupled FET logic (DCFL) inverter with a high gain and noise margin.

Silicon Nanowires for Solar Thermal Energy Harvesting: an Experimental Evaluation on the Trade-off Effects of the Spectral Optical Properties.

Science.gov (United States)

Sekone, Abdoul Karim; Chen, Yu-Bin; Lu, Ming-Chang; Chen, Wen-Kai; Liu, Chia-An; Lee, Ming-Tsang

2016-12-01

Silicon nanowire possesses great potential as the material for renewable energy harvesting and conversion. The significantly reduced spectral reflectivity of silicon nanowire to visible light makes it even more attractive in solar energy applications. However, the benefit of its use for solar thermal energy harvesting remains to be investigated and has so far not been clearly reported. The purpose of this study is to provide practical information and insight into the performance of silicon nanowires in solar thermal energy conversion systems. Spectral hemispherical reflectivity and transmissivity of the black silicon nanowire array on silicon wafer substrate were measured. It was observed that the reflectivity is lower in the visible range but higher in the infrared range compared to the plain silicon wafer. A drying experiment and a theoretical calculation were carried out to directly evaluate the effects of the trade-off between scattering properties at different wavelengths. It is clearly seen that silicon nanowires can improve the solar thermal energy harnessing. The results showed that a 17.8 % increase in the harvest and utilization of solar thermal energy could be achieved using a silicon nanowire array on silicon substrate as compared to that obtained with a plain silicon wafer.

Polarization Insensitive Wavelength Conversion Based on Four-Wave Mixing in a Silicon Nanowire

DEFF Research Database (Denmark)

Pu, Minhao; Hu, Hao; Peucheret, Christophe

2012-01-01

We experimentally demonstrate, for the first time, polarization-insensitive wavelength conversion of a 10 Gb/s NRZ-OOK data signal based on four-wave mixing in a silicon nanowire with bit-error rate measurements.......We experimentally demonstrate, for the first time, polarization-insensitive wavelength conversion of a 10 Gb/s NRZ-OOK data signal based on four-wave mixing in a silicon nanowire with bit-error rate measurements....

Silicon nanowire arrays as learning chemical vapour classifiers

International Nuclear Information System (INIS)

Niskanen, A O; Colli, A; White, R; Li, H W; Spigone, E; Kivioja, J M

2011-01-01

Nanowire field-effect transistors are a promising class of devices for various sensing applications. Apart from detecting individual chemical or biological analytes, it is especially interesting to use multiple selective sensors to look at their collective response in order to perform classification into predetermined categories. We show that non-functionalised silicon nanowire arrays can be used to robustly classify different chemical vapours using simple statistical machine learning methods. We were able to distinguish between acetone, ethanol and water with 100% accuracy while methanol, ethanol and 2-propanol were classified with 96% accuracy in ambient conditions.

Effects of trap-assisted tunneling on gate-induced drain leakage in silicon-germanium channel p-type FET for scaled supply voltages

Science.gov (United States)

Tiwari, Vishal A.; Divakaruni, Rama; Hook, Terence B.; Nair, Deleep R.

2016-04-01

Silicon-germanium is considered as an alternative channel material to silicon p-type FET (pFET) for the development of energy efficient high performance transistors for 28 nm and beyond in a high-k metal gate technology because of its lower threshold voltage and higher mobility. However, gate-induced drain leakage (GIDL) is a concern for high threshold voltage device design because of tunneling at reduced bandgap. In this work, the trap-assisted tunneling and band-to-band tunneling (BTBT) effects on GIDL is analyzed and modeled for SiGe pFETs. Experimental results and Monte Carlo simulation results reveal that the pre-halo germanium pre-amorphization implant used to contain the short channel effects contribute to GIDL at the drain sidewall in addition to GIDL due to BTBT in SiGe devices. The results are validated by comparing the experimental observations with the numerical simulation and a set of calibrated models are used to describe the GIDL mechanisms for various drain and gate bias.

Creating New VLS Silicon Nanowire Contact Geometries by Controlling Catalyst Migration

DEFF Research Database (Denmark)

Alam, Sardar Bilal; Panciera, Federico; Hansen, Ole

2015-01-01

The formation of self-assembled contacts between vapor-liquid-solid grown silicon nanowires and flat silicon surfaces was imaged in situ using electron microscopy. By measuring the structural evolution of the contact formation process, we demonstrate how different contact geometries are created b...

Vertical Silicon Nanowire Platform for Low Power Electronics and Clean Energy Applications

Directory of Open Access Journals (Sweden)

D.-L. Kwong

2012-01-01

Full Text Available This paper reviews the progress of the vertical top-down nanowire technology platform developed to explore novel device architectures and integration schemes for green electronics and clean energy applications. Under electronics domain, besides having ultimate scaling potential, the vertical wire offers (1 CMOS circuits with much smaller foot print as compared to planar transistor at the same technology node, (2 a natural platform for tunneling FETs, and (3 a route to fabricate stacked nonvolatile memory cells. Under clean energy harvesting area, vertical wires could provide (1 cost reduction in photovoltaic energy conversion through enhanced light trapping and (2 a fully CMOS compatible thermoelectric engine converting waste-heat into electricity. In addition to progress review, we discuss the challenges and future prospects with vertical nanowires platform.

Selective etching of n-type silicon in pn junction structure in hydrofluoric acid and its application in silicon nanowire fabrication

International Nuclear Information System (INIS)

Wang Huiquan; Jin Zhonghe; Zheng Yangming; Ma Huilian; Wang Yuelin; Li Tie

2008-01-01

Boron is selectively implanted on the surface of an n-type silicon wafer to form a p-type area surrounded by an n-type area. The wafer is then put into a buffered oxide etch solution. It is found that the n-type area can be selectively etched without illumination, with an etching rate lower than 1 nm min -1 , while the p-type area can be selectively etched under illumination with a much higher etching rate. The possible mechanism of the etching phenomenon is discussed. A simple fabrication process of silicon nanowires is proposed according to the above phenomenon. In this process only traditional micro-electromechanical system technology is used. Dimensions of the fabricated nanowire can be controlled well. A 50 nm wide and 50 nm thick silicon nanowire has been formed using this method

Silicon Nanowire Fabrication Using Edge and Corner Lithography

NARCIS (Netherlands)

Yagubizade, H.; Berenschot, Johan W.; Jansen, Henricus V.; Elwenspoek, Michael Curt; Tas, Niels Roelof

2010-01-01

This paper presents a wafer scale fabrication method of single-crystalline silicon nanowires (SiNWs) bound by <111> planes using a combination of edge and corner lithography. These are methods of unconventional nanolithography for wafer scale nano-patterning which determine the size of nano-features

Ultra-low reflection porous silicon nanowires for solar cell applications

KAUST Repository

Najar, Adel

2012-01-01

High density vertically aligned Porous Silicon NanoWires (PSiNWs) were fabricated on silicon substrate using metal assisted chemical etching process. A linear dependency of nanowire length to the etching time was obtained and the change in the growth rate of PSiNWs by increasing etching durations was shown. A typical 2D bright-field TEM image used for volume reconstruction of the sample shows the pores size varying from 10 to 50 nm. Furthermore, reflectivity measurements show that the 35% reflectivity of the starting silicon wafer drops to 0.1% recorded for more than 10 μm long PSiNWs. Models based on cone shape of nanowires located in a circular and rectangular bases were used to calculate the reflectance employing the Transfert Matrix Formalism (TMF) of the PSiNWs layer. Using TMF, the Bruggeman model was used to calculate the refractive index of PSiNWs layer. The calculated reflectance using circular cone shape fits better the measured reflectance for PSiNWs. The remarkable decrease in optical reflectivity indicates that PSiNWs is a good antireflective layer and have a great potential to be utilized in radial or coaxial p-n heterojunction solar cells that could provide orthogonal photon absorption and enhanced carrier collection. ©2012 Optical Society of America.

Nanofabrication of Arrays of Silicon Field Emitters with Vertical Silicon Nanowire Current Limiters and Self-Aligned Gates

Science.gov (United States)

2016-08-19

limiters, MEMS, NEMS, field emission, cold cathodes (Some figures may appear in colour only in the online journal) 1. Introduction Dense arrays of silicon... attention has been given to densely packed, highly ordered, top-down fabricated, single crystal vertical silicon nanowire devices that are embedded

Effect of hysteretic and non-hysteretic negative capacitance on tunnel FETs DC performance

Science.gov (United States)

Saeidi, Ali; Jazaeri, Farzan; Stolichnov, Igor; Luong, Gia V.; Zhao, Qing-Tai; Mantl, Siegfried; Ionescu, Adrian M.

2018-03-01

This work experimentally demonstrates that the negative capacitance effect can be used to significantly improve the key figures of merit of tunnel field effect transistor (FET) switches. In the proposed approach, a matching condition is fulfilled between a trained-polycrystalline PZT capacitor and the tunnel FET (TFET) gate capacitance fabricated on a strained silicon-nanowire technology. We report a non-hysteretic switch configuration by combining a homojunction TFET and a negative capacitance effect booster, suitable for logic applications, for which the on-current is increased by a factor of 100, the transconductance by 2 orders of magnitude, and the low swing region is extended. The operation of a hysteretic negative capacitance TFET, when the matching condition for the negative capacitance is fulfilled only in a limited region of operation, is also reported and discussed. In this late case, a limited improvement in the device performance is observed. Overall, the paper demonstrates the main beneficial effects of negative capacitance on TFETs are the overdrive and transconductance amplification, which exactly address the most limiting performances of current TFETs.

Novel epoxy-silicone thermolytic transparent packaging adhesives chemical modified by ZnO nanowires for HB LEDs

International Nuclear Information System (INIS)

He Ying; Wang Junan; Pei Changlong; Song Jizhong; Zhu Di; Chen Jie

2010-01-01

A novel high transparent thermolytic epoxy-silicone for high-brightness light-emitting diode (HB-LED) is introduced, which was synthesized by polymerization using silicone matrix via diglycidyl ether bisphenol-A epoxy resin (DGEBA) as reinforcing agent, and filling ZnO nanowires to modify thermal conductivity and control refractive index of the hybrid material. The interactions of ZnO nanowires with polymers are mediated by the ligands attached to the nanoparticles. Thus, the ligands markedly influence the properties of ZnO nanowires/epoxy-silicone composites. The refractive indices of the prepared hybrid adhesives can be tuned by the ZnO nanowires from 1.4711 to 1.5605. Light transmittance can be increased by 20% from 80 to 95%. The thermal conductivity of the transparent packaging adhesives is 0.89-0.90 W/mK.

Specific and selective target detection of supra-genome 21 Mers Salmonella via silicon nanowires biosensor

Science.gov (United States)

Mustafa, Mohammad Razif Bin; Dhahi, Th S.; Ehfaed, Nuri. A. K. H.; Adam, Tijjani; Hashim, U.; Azizah, N.; Mohammed, Mohammed; Noriman, N. Z.

2017-09-01

The nano structure based on silicon can be surface modified to be used as label-free biosensors that allow real-time measurements. The silicon nanowire surface was functionalized using 3-aminopropyltrimethoxysilane (APTES), which functions as a facilitator to immobilize biomolecules on the silicon nanowire surface. The process is simple, economical; this will pave the way for point-of-care applications. However, the surface modification and subsequent detection mechanism still not clear. Thus, study proposed step by step process of silicon nano surface modification and its possible in specific and selective target detection of Supra-genome 21 Mers Salmonella. The device captured the molecule with precisely; the approach took the advantages of strong binding chemistry created between APTES and biomolecule. The results indicated how modifications of the nanowires provide sensing capability with strong surface chemistries that can lead to specific and selective target detection.

Impedance Analysis of Silicon Nanowire Lithium Ion Battery Anodes

KAUST Repository

Ruffo, Riccardo; Hong, Seung Sae; Chan, Candace K.; Huggins, Robert A.; Cui, Yi

2009-01-01

The impedance behavior of silicon nanowire electrodes has been investigated to understand the electrochemical process kinetics that influences the performance when used as a high-capacity anode in a lithium ion battery. The ac response was measured

Importance of the Debye screening length on nanowire field effect transistor sensors.

Science.gov (United States)

Stern, Eric; Wagner, Robin; Sigworth, Fred J; Breaker, Ronald; Fahmy, Tarek M; Reed, Mark A

2007-11-01

Nanowire field effect transistors (NW-FETs) can serve as ultrasensitive detectors for label-free reagents. The NW-FET sensing mechanism assumes a controlled modification in the local channel electric field created by the binding of charged molecules to the nanowire surface. Careful control of the solution Debye length is critical for unambiguous selective detection of macromolecules. Here we show the appropriate conditions under which the selective binding of macromolecules is accurately sensed with NW-FET sensors.

Imaging, structural, and chemical analysis of silicon nanowires

International Nuclear Information System (INIS)

Barsotti, R.J. Jr.; Fischer, J.E.; Lee, C.H.; Mahmood, J.; Adu, C.K.W.; Eklund, P.C.

2002-01-01

Laser ablation has been used to grow silicon nanowires with an average silicon crystal core diameter of 6.7 nm±2.9 nm surrounded by an amorphous SiO x sheath of 1-2 nm, the smallest silicon wires reported in the literature. Imaging, chemical, and structural analysis of these wires are reported. Due to the growth temperature and the presence of calcium impurities and trace oxygen, two distinct types of wires are found. They appear to grow by two different processes. One requires a metal catalyst, the other is catalyzed by oxygen. Suggestions for controlled synthesis based on these growth mechanisms are made

Modeling nanowire and double-gate junctionless field-effect transistors

CERN Document Server

Jazaeri, Farzan

2018-01-01

The first book on the topic, this is a comprehensive introduction to the modeling and design of junctionless field effect transistors (FETs). Beginning with a discussion of the advantages and limitations of the technology, the authors also provide a thorough overview of published analytical models for double-gate and nanowire configurations, before offering a general introduction to the EPFL charge-based model of junctionless FETs. Important features are introduced gradually, including nanowire versus double-gate equivalence, technological design space, junctionless FET performances, short channel effects, transcapacitances, asymmetric operation, thermal noise, interface traps, and the junction FET. Additional features compatible with biosensor applications are also discussed. This is a valuable resource for students and researchers looking to understand more about this new and fast developing field.

Ab initio design of nanostructures for solar energy conversion: a case study on silicon nitride nanowire.

Science.gov (United States)

Pan, Hui

2014-01-01

Design of novel materials for efficient solar energy conversion is critical to the development of green energy technology. In this work, we present a first-principles study on the design of nanostructures for solar energy harvesting on the basis of the density functional theory. We show that the indirect band structure of bulk silicon nitride is transferred to direct bandgap in nanowire. We find that intermediate bands can be created by doping, leading to enhancement of sunlight absorption. We further show that codoping not only reduces the bandgap and introduces intermediate bands but also enhances the solubility of dopants in silicon nitride nanowires due to reduced formation energy of substitution. Importantly, the codoped nanowire is ferromagnetic, leading to the improvement of carrier mobility. The silicon nitride nanowires with direct bandgap, intermediate bands, and ferromagnetism may be applicable to solar energy harvesting.

Broadband infrared photoluminescence in silicon nanowires with high density stacking faults.

Science.gov (United States)

Li, Yang; Liu, Zhihong; Lu, Xiaoxiang; Su, Zhihua; Wang, Yanan; Liu, Rui; Wang, Dunwei; Jian, Jie; Lee, Joon Hwan; Wang, Haiyan; Yu, Qingkai; Bao, Jiming

2015-02-07

Making silicon an efficient light-emitting material is an important goal of silicon photonics. Here we report the observation of broadband sub-bandgap photoluminescence in silicon nanowires with a high density of stacking faults. The photoluminescence becomes stronger and exhibits a blue shift under higher laser powers. The super-linear dependence on excitation intensity indicates a strong competition between radiative and defect-related non-radiative channels, and the spectral blue shift is ascribed to the band filling effect in the heterostructures of wurtzite silicon and cubic silicon created by stacking faults.

Simulations of backgate sandwich nanowire MOSFETs with improved device performance

International Nuclear Information System (INIS)

Zhao Hengliang; Zhu Huilong; Zhong Jian; Ma Xiaolong; Wei Xing; Zhao Chao; Chen Dapeng; Ye Tianchun

2014-01-01

We propose a novel backgate sandwich nanowire MOSFET (SNFET), which offers the advantages of ETSOI (dynamic backgate voltage controllability) and nanowire FETs (good short channel effect). A backgate is used for threshold voltage (V t ) control of the SNFET. Compared with a backgate FinFET with a punch-through stop layer (PTSL), the SNFET possesses improved device performance. 3D device simulations indicate that the SNFET has a three times larger overdrive current, a ∼75% smaller off leakage current, and reduced subthreshold swing (SS) and DIBL than those of a backgate FinFET when the nanowire (NW) and the fin are of equal width. A new process flow to fabricate the backgate SNFET is also proposed in this work. Our analytical model suggests that V t control by the backgate can be attributed to the capacitances formed by the frontgate, NW, and backgate. The SNFET devices are compatible with the latest state-of-the-art high-k/metal gate CMOS technology with the unique capability of independent backgate control for nFETs and pFETs, which is promising for sub-22 nm scaling down. (semiconductor devices)

Design and Simulation of Nano Wire FET

Directory of Open Access Journals (Sweden)

M. Anil Kumar

2017-06-01

Full Text Available As the era of classical planar metal-oxide-semiconductor field-effect transistors (MOSFETs comes to an end, the semiconductor industry is beginning to adopt 3D device architectures, such as FinFETs, starting at the 22 nm technology node. Since physical limits such as short channel effect (SCE and self-heating may dominate, it may be difficult to scale Si FinFET below 10 nm. In this regard, transistors with different materials, geometries, or operating principles may help. For example, gate has excellent electrostatic control over 2D thin film channel with planar geometry and 1D nanowire (NW channel with gate-all-around (GAA geometry to reduce SCE. High carrier mobility of single wall carbon nanotube (SWNT or III-V channels may reduce VDD to reduce power consumption. Therefore, as channel of transistor, 2D thin film of array SWNTs and 1D III-V multi NWs are promising for sub 10 nm technology nodes. To simulate these devices, accurate modelling and design based on gate-material are necessary to assess their performance limits, since cross-sections of the multi-gate NWFETs are expected to be a few nano-meters wide in their ultimate scaling. In this paper we have explored the use of SILVACO with different materials for simulating and studying the short channel behaviour of nanowire FETs.

Vertically aligned nanowires on flexible silicone using a supported alumina template prepared by pulsed anodization

DEFF Research Database (Denmark)

Mátéfi-Tempfli, Stefan; Mátéfi-Tempfli, M.

2009-01-01

Carpets of vertically aligned nanowires on flexible substrates are successfully realized by a template method. Applying special pulsed anodization conditions, defect-free nanoporous alumina structures supported on polydimethylsiloxane (PDMS), a flexible silicone elastomer, are created. By using...... this template with nanopores ending on a conducting underlayer, a high-density nanowire array can be simply grown by direct DCelectrodeposition on the top of the silicone rubber....

Silicon Nanowire Field-effect Chemical Sensor

OpenAIRE

Chen, S.

2011-01-01

This thesis describes the work that has been done on the project “Design and optimization of silicon nanowire for chemical sensing‿, including Si-NW fabrication, electrical/electrochemical modeling, the application as ISFET, and the build-up of Si- NW/LOC system for automatic sample delivery. A novel top-down fabrication technique was presented for single-crystal Si-NW fabrication realized with conventional microfabrication technique. High quality triangular Si-NWs were made with high wafer-s...

Nanoelectronics-biology frontier: From nanoscopic probes for action potential recording in live cells to three-dimensional cyborg tissues

OpenAIRE

Duan, Xiaojie; Fu, Tian-Ming; Liu, Jia; Lieber, Charles M.

2013-01-01

Semiconductor nanowires configured as the active channels of field-effect transistors (FETs) have been used as detectors for high-resolution electrical recording from single live cells, cell networks, tissues and organs. Extracellular measurements with substrate supported silicon nanowire (SiNW) FETs, which have projected active areas orders of magnitude smaller than conventional microfabricated multielectrode arrays (MEAs) and planar FETs, recorded action potential and field potential signa...

Field effect transistors and phototransistors based upon p-type solution-processed PbS nanowires

Science.gov (United States)

Giraud, Paul; Hou, Bo; Pak, Sangyeon; Inn Sohn, Jung; Morris, Stephen; Cha, SeungNam; Kim, Jong Min

2018-02-01

We demonstrate the fabrication of solution processed highly crystalline p-type PbS nanowires via the oriented attachment of nanoparticles. The analysis of single nanowire field effect transistor (FET) devices revealed a hole conduction behaviour with average mobilities greater than 30 cm2 V-1 s-1, which is an order of magnitude higher than that reported to date for p-type PbS colloidal nanowires. We have investigated the response of the FETs to near-infrared light excitation and show herein that the nanowires exhibited gate-dependent photo-conductivities, enabling us to tune the device performances. The responsivity was found to be greater than 104 A W-1 together with a detectivity of 1013 Jones, which benefits from a photogating effect occurring at negative gate voltages. These encouraging detection parameters are accompanied by relatively short switching times of 15 ms at positive gate voltages, resulting from a combination of the standard photoconduction and the high crystallinity of the nanowires. Collectively, these results indicate that solution-processed PbS nanowires are promising nanomaterials for infrared photodetectors as well as p-type nanowire FETs.

Synthesis and investigation of silicon carbide nanowires by HFCVD ...

Indian Academy of Sciences (India)

Silicon carbide (SiC) nanowire has been fabricated by hot filament chemical vapour .... −5. Torr by mechanical and dif- fusion vacuum pumps, then high purity H2 gas was fed into it. ... to standard PDF card numbers of 01-074-2307 and 01-.

Scaling theory put into practice: First-principles modeling of transport in doped silicon nanowires

DEFF Research Database (Denmark)

Markussen, Troels; Rurali, R.; Jauho, Antti-Pekka

2007-01-01

We combine the ideas of scaling theory and universal conductance fluctuations with density-functional theory to analyze the conductance properties of doped silicon nanowires. Specifically, we study the crossover from ballistic to diffusive transport in boron or phosphorus doped Si nanowires...

Epitaxial III-V nanowires on silicon for vertical devices

NARCIS (Netherlands)

Bakkers, E.P.A.M.; Borgström, M.T.; Einden, Van Den W.; Weert, van M.H.M.; Helman, A.; Verheijen, M.A.

2006-01-01

We show the epitaxial integration of III-V semiconductor nanowires with silicon technology. The wires are grown by the Vapor-Liquid-Solid (VLS) mechanism with laser ablation as well as metal organic vapor phase epitaxy. The VLS growth enables the fabrication of complex axial and radial

One-step synthesis of lightly doped porous silicon nanowires in HF/AgNO3/H2O2 solution at room temperature

International Nuclear Information System (INIS)

Bai, Fan; Li, Meicheng; Song, Dandan; Yu, Hang; Jiang, Bing; Li, Yingfeng

2012-01-01

One-step synthesis of lightly doped porous silicon nanowire arrays was achieved by etching the silicon wafer in HF/AgNO 3 /H 2 O 2 solution at room temperature. The lightly doped porous silicon nanowires (pNWs) have circular nanopores on the sidewall, which can emit strong green fluorescence. The surface morphologies of these nanowires could be controlled by simply adjusting the concentration of H 2 O 2 , which influences the distribution of silver nanoparticles (Ag NPs) along the nanowire axis. A mechanism based on Ag NPs-induced lateral etching of nanowires was proposed to explain the formation of pNWs. The controllable and widely applicable synthesis of pNWs will open their potential application to nanoscale photoluminescence devices. - Graphical abstract: The one-step synthesis of porous silicon nanowire arrays is achieved by chemical etching of the lightly doped p-type Si (100) wafer at room temperature. These nanowires exhibit strong green photoluminescence. SEM, TEM, HRTEM and photoluminescence images of pNWs. The scale bars of SEM, TEM HRTEM and photoluminescence are 10 μm, 20 nm, 10 nm, and 1 μm, respectively. Highlights: ► Simple one-step synthesis of lightly doped porous silicon nanowire arrays is achieved at RT. ► Etching process and mechanism are illustrated with etching model from a novel standpoint. ► As-prepared porous silicon nanowire emits strong green fluorescence, proving unique property.

Crystalline-Amorphous Core−Shell Silicon Nanowires for High Capacity and High Current Battery Electrodes

KAUST Repository

Cui, Li-Feng

2009-01-14

Silicon is an attractive alloy-type anode material for lithium ion batteries because of its highest known capacity (4200 mAh/g). However silicon\\'s large volume change upon lithium insertion and extraction, which causes pulverization and capacity fading, has limited its applications. Designing nanoscale hierarchical structures is a novel approach to address the issues associated with the large volume changes. In this letter, we introduce a core-shell design of silicon nanowires for highpower and long-life lithium battery electrodes. Silicon crystalline- amorphous core-shell nanowires were grown directly on stainless steel current collectors by a simple one-step synthesis. Amorphous Si shells instead of crystalline Si cores can be selected to be electrochemically active due to the difference of their lithiation potentials. Therefore, crystalline Si cores function as a stable mechanical support and an efficient electrical conducting pathway while amorphous shells store Li ions. We demonstrate here that these core-shell nanowires have high charge storage capacity (̃1000 mAh/g, 3 times of carbon) with ̃90% capacity retention over 100 cycles. They also show excellent electrochemical performance at high rate charging and discharging (6.8 A/g, ̃20 times of carbon at 1 h rate). © 2009 American Chemical Society.

High-performance lithium battery anodes using silicon nanowires.

Science.gov (United States)

Chan, Candace K; Peng, Hailin; Liu, Gao; McIlwrath, Kevin; Zhang, Xiao Feng; Huggins, Robert A; Cui, Yi

2008-01-01

There is great interest in developing rechargeable lithium batteries with higher energy capacity and longer cycle life for applications in portable electronic devices, electric vehicles and implantable medical devices. Silicon is an attractive anode material for lithium batteries because it has a low discharge potential and the highest known theoretical charge capacity (4,200 mAh g(-1); ref. 2). Although this is more than ten times higher than existing graphite anodes and much larger than various nitride and oxide materials, silicon anodes have limited applications because silicon's volume changes by 400% upon insertion and extraction of lithium which results in pulverization and capacity fading. Here, we show that silicon nanowire battery electrodes circumvent these issues as they can accommodate large strain without pulverization, provide good electronic contact and conduction, and display short lithium insertion distances. We achieved the theoretical charge capacity for silicon anodes and maintained a discharge capacity close to 75% of this maximum, with little fading during cycling.

Monolithic electrically injected nanowire array edge-emitting laser on (001) silicon

KAUST Repository

Frost, Thomas; Jahangir, Shafat; Stark, Ethan; Deshpande, Saniya; Hazari, Arnab Shashi; Zhao, Chao; Ooi, Boon S.; Bhattacharya, Pallab K.

2014-01-01

A silicon-based laser, preferably electrically pumped, has long been a scientific and engineering goal. We demonstrate here, for the first time, an edge-emitting InGaN/GaN disk-in-nanowire array electrically pumped laser emitting in the green (λ = 533 nm) on (001) silicon substrate. The devices display excellent dc and dynamic characteristics with values of threshold current density, differential gain, T0 and small signal modulation bandwidth equal to 1.76 kA/cm2, 3 × 10-17 cm2, 232 K, and 5.8 GHz respectively under continuous wave operation. Preliminary reliability measurements indicate a lifetime of 7000 h. The emission wavelength can be tuned by varying the alloy composition in the quantum disks. The monolithic nanowire laser on (001)Si can therefore address wide-ranging applications such as solid state lighting, displays, plastic fiber communication, medical diagnostics, and silicon photonics. © 2014 American Chemical Society.

Monolithic electrically injected nanowire array edge-emitting laser on (001) silicon

KAUST Repository

Frost, Thomas

2014-08-13

A silicon-based laser, preferably electrically pumped, has long been a scientific and engineering goal. We demonstrate here, for the first time, an edge-emitting InGaN/GaN disk-in-nanowire array electrically pumped laser emitting in the green (λ = 533 nm) on (001) silicon substrate. The devices display excellent dc and dynamic characteristics with values of threshold current density, differential gain, T0 and small signal modulation bandwidth equal to 1.76 kA/cm2, 3 × 10-17 cm2, 232 K, and 5.8 GHz respectively under continuous wave operation. Preliminary reliability measurements indicate a lifetime of 7000 h. The emission wavelength can be tuned by varying the alloy composition in the quantum disks. The monolithic nanowire laser on (001)Si can therefore address wide-ranging applications such as solid state lighting, displays, plastic fiber communication, medical diagnostics, and silicon photonics. © 2014 American Chemical Society.

Strain and thermal conductivity in ultrathin suspended silicon nanowires

Science.gov (United States)

Fan, Daniel; Sigg, Hans; Spolenak, Ralph; Ekinci, Yasin

2017-09-01

We report on the uniaxial strain and thermal conductivity of well-ordered, suspended silicon nanowire arrays between 10 to 20 nm width and 22 nm half-pitch, fabricated by extreme-ultraviolet (UV) interference lithography. Laser-power-dependent Raman spectroscopy showed that nanowires connected monolithically to the bulk had a consistent strain of ˜0.1 % , whereas nanowires clamped by metal exhibited variability and high strain of up to 2.3%, having implications in strain engineering of nanowires. The thermal conductivity at room temperature was measured to be ˜1 W /m K for smooth nanowires and ˜0.1 W /m K for rougher ones, similar to results by other investigators. We found no modification of the bulk properties in terms of intrinsic scattering, and therefore, the decrease in thermal conductivity is mainly due to boundary scattering. Different types of surface roughness, such as constrictions and line-edge roughness, may play roles in the scattering of phonons of different wavelengths. Such low thermal conductivities would allow for very efficient thermal energy harvesting, approaching and passing values achieved by state-of-the-art thermoelectric materials.

Flexible nanoscale high-performance FinFETs

KAUST Repository

Sevilla, Galo T.

2014-10-28

With the emergence of the Internet of Things (IoT), flexible high-performance nanoscale electronics are more desired. At the moment, FinFET is the most advanced transistor architecture used in the state-of-the-art microprocessors. Therefore, we show a soft-etch based substrate thinning process to transform silicon-on-insulator (SOI) based nanoscale FinFET into flexible FinFET and then conduct comprehensive electrical characterization under various bending conditions to understand its electrical performance. Our study shows that back-etch based substrate thinning process is gentler than traditional abrasive back-grinding process; it can attain ultraflexibility and the electrical characteristics of the flexible nanoscale FinFET show no performance degradation compared to its rigid bulk counterpart indicating its readiness to be used for flexible high-performance electronics.

Synthesis and investigation of silicon carbide nanowires by HFCVD

Indian Academy of Sciences (India)

We found that increasing substrate temperature increases silicon and oxygen doping amount. We also found that electrical resistivity and surface roughness increased by increasing substrate temperature. This study showed that SiC nanowires with high density grew on the free catalyst glass substrate, and the alignment of ...

Electronic transport mechanisms in scaled gate-all-around silicon nanowire transistor arrays

Energy Technology Data Exchange (ETDEWEB)

Clément, N., E-mail: nicolas.clement@iemn.univ-lille1.fr, E-mail: guilhem.larrieu@laas.fr; Han, X. L. [Institute of Electronics, Microelectronics and Nanotechnology, CNRS, Avenue Poincaré, 59652 Villeneuve d' Ascq (France); Larrieu, G., E-mail: nicolas.clement@iemn.univ-lille1.fr, E-mail: guilhem.larrieu@laas.fr [Laboratory for Analysis and Architecture of Systems (LAAS), CNRS, Universite de Toulouse, 7 Avenue Colonel Roche, 31077 Toulouse (France)

2013-12-23

Low-frequency noise is used to study the electronic transport in arrays of 14 nm gate length vertical silicon nanowire devices. We demonstrate that, even at such scaling, the electrostatic control of the gate-all-around is sufficient in the sub-threshold voltage region to confine charges in the heart of the wire, and the extremely low noise level is comparable to that of high quality epitaxial layers. Although contact noise can already be a source of poor transistor operation above threshold voltage for few nanowires, nanowire parallelization drastically reduces its impact.

Layered structure in core–shell silicon nanowires

Energy Technology Data Exchange (ETDEWEB)

Van Tuan, Pham [Advanced Institute for Science and Technology (AIST) and International Training Institute for Materials Science Hanoi University of Science and Technology, 01 Dai Co Viet Street,Hanoi 10000,Vietnam (Viet Nam); Anh Tuan, Chu; Thanh Thuy, Tran; Binh Nam, Vu [Institute of Materials Science (IMS), Vietnamese Academy of Science and Technology (VAST), 18 Hoang Quoc Viet Street, Hanoi 10000 (Viet Nam); Toan Thang, Pham [Advanced Institute for Science and Technology (AIST) and International Training Institute for Materials Science Hanoi University of Science and Technology, 01 Dai Co Viet Street,Hanoi 10000,Vietnam (Viet Nam); Hong Duong, Pham, E-mail: duongphamhong@yahoo.com [Institute of Materials Science (IMS), Vietnamese Academy of Science and Technology (VAST), 18 Hoang Quoc Viet Street, Hanoi 10000 (Viet Nam); Thanh Huy, Pham, E-mail: huy.phamthanh@hust.edu.vn [Advanced Institute for Science and Technology (AIST) and International Training Institute for Materials Science Hanoi University of Science and Technology, 01 Dai Co Viet Street,Hanoi 10000,Vietnam (Viet Nam)

2014-10-15

Silicon nanowires (NWs) with core–shell structures were prepared using the Vapor–Liquid–Solid (VLS) method. The wires have lengths of several hundreds of nanometers and diameters in the range of 30–50 nm. Generally, these wires are too large to exhibit the quantum confinement effect of excitons in Si nanocrystals. However, the photoluminescence (PL) and Raman spectra are similar to those of nanocrystalline silicon embedded in a SiO{sub 2} matrix, in which the recombination of quantum-confined excitons plays an important role. This effect occurs only when the average size of the silicon nanocrystals is smaller than 5 nm. To understand this discrepancy, TEM images of nanowires were obtained and analyzed. The results revealed that the cores of wires have a layered Si/SiO{sub 2} structure, in which the thickness of each layer is much smaller than its diameter. The temperature dependence of the PL intensity was recorded from 11 to 300 K; the result is in good agreement with a model that takes into account the energy splitting between the excitonic singlet and triplet levels. - Highlights: • The cores of the Si NWs have a layered Si/SiO{sub 2} structure. • The Si NWs were formed due to the phase separation of Si and SiO{sub 2} and the partial oxidization by residual oxygen. • Two processes, the reaction of Si and oxygen atoms and the combination between Si atoms, occur simultaneously. • The formation of the layered structures is associated with the self-limiting oxidation phenomenon in Si nanostructures.

Influence of surface pre-treatment on the electronic levels in silicon MaWCE nanowires.

Science.gov (United States)

Venturi, Giulia; Castaldini, Antonio; Schleusener, Alexander; Sivakov, Vladimir; Cavallini, Anna

2015-05-15

Deep level transient spectroscopy (DLTS) was performed on n-doped silicon nanowires grown by metal-assisted wet chemical etching (MaWCE) with gold as the catalyst in order to investigate the energetic scheme inside the bandgap. To observe the possible dependence of the level scheme on the processing temperature, DLTS measurements were performed on the nanowires grown on a non-treated Au/Si surface and on a thermally pre-treated Au/Si surface. A noticeable modification of the configuration of the energy levels was observed, induced by the annealing process. Based on our results on these MaWCE nanowires and on literature data about deep levels in bulk silicon, some hypotheses were advanced regarding the identification of the defects responsible of the energy levels revealed.

Effective antireflection properties of porous silicon nanowires for photovoltaic applications

KAUST Repository

Najar, Adel; Al-Jabr, Ahmad; Alsunaidi, Mohammad; Anjum, Dalaver H.; Ng, Tien Khee; Ooi, Boon S.; Ben Slimane, Ahmed; Sougrat, Rachid

2013-01-01

Porous silicon nanowires (PSiNWs) have been prepared by metal-assisted chemical etching method on the n-Si substrate. The presence of nano-pores with pore size ranging between 10-50nm in SiNWs was confirmed by electron tomography (ET

Logic Locking Using Hybrid CMOS and Emerging SiNW FETs

Directory of Open Access Journals (Sweden)

Qutaiba Alasad

2017-09-01

Full Text Available The outsourcing of integrated circuit (IC fabrication services to overseas manufacturing foundry has raised security and privacy concerns with regard to intellectual property (IP protection as well as the integrity maintenance of the fabricated chips. One way to protect ICs from malicious attacks is to encrypt and obfuscate the IP design by incorporating additional key gates, namely logic encryption or logic locking. The state-of-the-art logic encryption techniques certainly incur considerable performance overhead upon the genuine IP design. The focus of this paper is to leverage the unique property of emerging transistor technology on reducing the performance overhead as well as preserving the robustness of logic locking technique. We design the polymorphic logic gate using silicon nanowire field effect transistors (SiNW FETs to replace the conventional Exclusive-OR (XOR-based logic cone. We then evaluate the proposed technique based on security metric and performance overhead.

Potential of silicon nanowires structures as nanoscale piezoresistors in mechanical sensors

International Nuclear Information System (INIS)

Messina, M; Njuguna, J

2012-01-01

This paper presents the design of a single square millimeter 3-axial accelerometer for bio-mechanics measurements that exploit the potential of silicon nanowires structures as nanoscale piezoresistors. The main requirements of this application are miniaturization and high measurement accuracy. Nanowires as nanoscale piezoresistive devices have been chosen as sensing element, due to their high sensitivity and miniaturization achievable. By exploiting the electro-mechanical features of nanowires as nanoscale piezoresistors, the nominal sensor sensitivity is overall boosted by more than 30 times. This approach allows significant higher accuracy and resolution with smaller sensing element in comparison with conventional devices without the need of signal amplification.

Wavelength conversion of 80 Gb/s RZ-DPSK Pol-MUX signals in a silicon nanowire

DEFF Research Database (Denmark)

Vukovic, Dragana; Peucheret, Christophe; Oxenløwe, Leif Katsuo

2014-01-01

All-optical wavelength conversion of 80 Gb/s RZ-DPSK polarization multiplexed signals is demonstrated in a silicon nanowire using an angled-pump scheme. The quality of the converted signal is characterized through BER measurements for the first time.......All-optical wavelength conversion of 80 Gb/s RZ-DPSK polarization multiplexed signals is demonstrated in a silicon nanowire using an angled-pump scheme. The quality of the converted signal is characterized through BER measurements for the first time....

All-Optical Wavelength Conversion of a High-Speed RZ-OOK Signal in a Silicon Nanowire

DEFF Research Database (Denmark)

Hu, Hao; Ji, Hua; Galili, Michael

2011-01-01

All-optical wavelength conversion of a 320 Gb/s line-rate RZ-OOK signal is demonstrated based on four-wave mixing in a 3.6 mm long silicon nanowire. Bit error rate measurements validate the performance within FEC limits.......All-optical wavelength conversion of a 320 Gb/s line-rate RZ-OOK signal is demonstrated based on four-wave mixing in a 3.6 mm long silicon nanowire. Bit error rate measurements validate the performance within FEC limits....

Crosstalk analysis of silicon-on-insulator nanowire-arrayed waveguide grating

International Nuclear Information System (INIS)

Li Kai-Li; An Jun-Ming; Zhang Jia-Shun; Wang Yue; Wang Liang-Liang; Li Jian-Guang; Wu Yuan-Da; Yin Xiao-Jie; Hu Xiong-Wei

2016-01-01

The factors influencing the crosstalk of silicon-on-insulator (SOI) nanowire arrayed waveguide grating (AWG) are analyzed using the transfer function method. The analysis shows that wider and thicker arrayed waveguides, outsider fracture of arrayed waveguide, and larger channel space, could mitigate the deterioration of crosstalk. The SOI nanowire AWGs with different arrayed waveguide widths are fabricated by using deep ultraviolet lithography (DUV) and inductively coupled plasma etching (ICP) technology. The measurement results show that the crosstalk performance is improved by about 7 dB through adopting 800 nm arrayed waveguide width. (paper)

Broadband Polarization-Insensitive Wavelength Conversion Based on Non-Degenerate Four-Wave Mixing in a Silicon Nanowire

DEFF Research Database (Denmark)

Pu, Minhao; Hu, Hao; Ji, Hua

2012-01-01

We experimentally demonstrate broadband polarization-insensitive one-to-two wavelength conversion of a 10-Gb/s DPSK data signal based on non-degenerate four-wave mixing in a silicon nanowire with bit-error rate measurements.......We experimentally demonstrate broadband polarization-insensitive one-to-two wavelength conversion of a 10-Gb/s DPSK data signal based on non-degenerate four-wave mixing in a silicon nanowire with bit-error rate measurements....

Hybrid heterojunction solar cell based on organic-inorganic silicon nanowire array architecture.

Science.gov (United States)

Shen, Xiaojuan; Sun, Baoquan; Liu, Dong; Lee, Shuit-Tong

2011-12-07

Silicon nanowire arrays (SiNWs) on a planar silicon wafer can be fabricated by a simple metal-assisted wet chemical etching method. They can offer an excellent light harvesting capability through light scattering and trapping. In this work, we demonstrated that the organic-inorganic solar cell based on hybrid composites of conjugated molecules and SiNWs on a planar substrate yielded an excellent power conversion efficiency (PCE) of 9.70%. The high efficiency was ascribed to two aspects: one was the improvement of the light absorption by SiNWs structure on the planar components; the other was the enhancement of charge extraction efficiency, resulting from the novel top contact by forming a thin organic layer shell around the individual silicon nanowire. On the contrary, the sole planar junction solar cell only exhibited a PCE of 6.01%, due to the lower light trapping capability and the less hole extraction efficiency. It indicated that both the SiNWs structure and the thin organic layer top contact were critical to achieve a high performance organic/silicon solar cell. © 2011 American Chemical Society

Axial Ge/Si nanowire heterostructure tunnel FETs.

Energy Technology Data Exchange (ETDEWEB)

Dayeh, Shadi A. (Los Alamos National Laboratory); Gin, Aaron V.; Huang, Jian Yu; Picraux, Samuel Thomas (Los Alamos National Laboratory)

2010-03-01

Axial Ge/Si heterostructure nanowires (NWs) allow energy band-edge engineering along the axis of the NW, which is the charge transport direction, and the realization of asymmetric devices for novel device architectures. This work reports on two significant advances in the area of heterostructure NWs and tunnel FETs: (i) the realization of 100% compositionally modulated Si/Ge axial heterostructure NWs with lengths suitable for device fabrication and (ii) the design and implementation of Schottky barrier tunnel FETs on these NWs for high-on currents and suppressed ambipolar behavior. Initial prototype devices with 10 nm PECVD SiN{sub x} gate dielectric resulted in a very high current drive in excess of 100 {micro}A/{micro}m (I/{pi}D) and 10{sup 5} I{sub on}/I{sub off} ratios. Prior work on the synthesis of Ge/Si axial NW heterostructures through the VLS mechanism have resulted in axial Si/Si{sub 1-x}Ge{sub x} NW heterostructures with x{sub max} {approx} 0.3, and more recently 100% composition modulation was achieved with a solid growth catalyst. In this latter case, the thickness of the heterostructure cannot exceed few atomic layers due to the slow axial growth rate and concurrent radial deposition on the NW sidewalls leading to a mixture of axial and radial deposition, which imposes a big challenge for fabricating useful devices form these NWs in the near future. Here, we report the VLS growth of 100% doping and composition modulated axial Ge/Si heterostructure NWs with lengths appropriate for device fabrication by devising a growth procedure that eliminates Au diffusion on the NW sidewalls and minimizes random kinking in the heterostructure NWs as deduced from detailed microscopy analysis. Fig. 1 a shows a cross-sectional SEM image of epitaxial Ge/Si axial NW heterostructures grown on a Ge(111) surface. The interface abruptness in these Ge/Si heterostructure NWs is of the order of the NW diameter. Some of these NWs develop a crystallographic kink that is {approx

Ultra-low reflection porous silicon nanowires for solar cell applications

KAUST Repository

Najar, Adel; Charrier, Joë l; Pirasteh, Parastesh; Sougrat, Rachid

2012-01-01

% reflectivity of the starting silicon wafer drops to 0.1% recorded for more than 10 μm long PSiNWs. Models based on cone shape of nanowires located in a circular and rectangular bases were used to calculate the reflectance employing the Transfert Matrix

Localized synthesis, assembly and integration of silicon nanowires

Science.gov (United States)

Englander, Ongi

Localized synthesis, assembly and integration of one-dimensional silicon nanowires with MEMS structures is demonstrated and characterized in terms of local synthesis processes, electric-field assisted self-assembly, and a proof-of-concept nanoelectromechanical system (HEMS) demonstration. Emphasis is placed on the ease of integration, process control strategies, characterization techniques and the pursuit of integrated devices. A top-down followed by a bottom-up integration approach is utilized. Simple MEMS heater structures are utilized as the microscale platforms for the localized, bottom-up synthesis of one-dimensional nanostructures. Localized heating confines the high temperature region permitting only localized nanostructure synthesis and allowing the surroundings to remain at room temperature thus enabling CMOS compatible post-processing. The vapor-liquid-solid (VLS) process in the presence of a catalytic nanoparticle, a vapor phase reactant, and a specific temperature environment is successfully employed locally. Experimentally, a 5nm thick gold-palladium layer is used as the catalyst while silane is the vapor phase reactant. The current-voltage behavior of the MEMS structures can be correlated to the approximate temperature range required for the VLS reaction to take place. Silicon nanowires averaging 45nm in diameter and up to 29mum in length synthesized at growth rates of up to 1.5mum/min result. By placing two MEMS structures in close proximity, 4--10mum apart, localized silicon nanowire growth can be used to link together MEMS structures to yield a two-terminal, self-assembled micro-to-nano system. Here, one MEMS structure is designated as the hot growth structure while a nearby structure is designated as the cold secondary structure, whose role is to provide a natural stopping point for the VLS reaction. The application of a localized electric-field, 5 to 13V/mum in strength, during the synthesis process, has been shown to improve nanowire

Preparation of silicon carbide nanowires via a rapid heating process

International Nuclear Information System (INIS)

Li Xintong; Chen Xiaohong; Song Huaihe

2011-01-01

Silicon carbide (SiC) nanowires were fabricated in a large quantity by a rapid heating carbothermal reduction of a novel resorcinol-formaldehyde (RF)/SiO 2 hybrid aerogel in this study. SiC nanowires were grown at 1500 deg. C for 2 h in an argon atmosphere without any catalyst via vapor-solid (V-S) process. The β-SiC nanowires were characterized by field-emission scanning electron microscope (FE-SEM), X-ray diffraction (XRD), transmission electron microscope (TEM), high-resolution transmission electron microscope (HRTEM) equipped with energy dispersive X-ray (EDX) facility, Fourier transformed infrared spectroscopy (FTIR), and thermogravimetric analysis (TGA). The analysis results show that the aspect ratio of the SiC nanowires via the rapid heating process is much larger than that of the sample produced via gradual heating process. The SiC nanowires are single crystalline β-SiC phase with diameters of about 20-80 nm and lengths of about several tens of micrometers, growing along the [1 1 1] direction with a fringe spacing of 0.25 nm. The role of the interpenetrating network of RF/SiO 2 hybrid aerogel in the carbothermal reduction was discussed and the possible growth mechanism of the nanowires is analyzed.

Gas Sensors Based on Semiconducting Nanowire Field-Effect Transistors

Directory of Open Access Journals (Sweden)

Ping Feng

2014-09-01

Full Text Available One-dimensional semiconductor nanostructures are unique sensing materials for the fabrication of gas sensors. In this article, gas sensors based on semiconducting nanowire field-effect transistors (FETs are comprehensively reviewed. Individual nanowires or nanowire network films are usually used as the active detecting channels. In these sensors, a third electrode, which serves as the gate, is used to tune the carrier concentration of the nanowires to realize better sensing performance, including sensitivity, selectivity and response time, etc. The FET parameters can be modulated by the presence of the target gases and their change relate closely to the type and concentration of the gas molecules. In addition, extra controls such as metal decoration, local heating and light irradiation can be combined with the gate electrode to tune the nanowire channel and realize more effective gas sensing. With the help of micro-fabrication techniques, these sensors can be integrated into smart systems. Finally, some challenges for the future investigation and application of nanowire field-effect gas sensors are discussed.

Nanowire-integrated microporous silicon membrane for continuous fluid transport in micro cooling device

International Nuclear Information System (INIS)

So, Hongyun; Pisano, Albert P.; Cheng, Jim C.

2013-01-01

We report an efficient passive micro pump system combining the physical properties of nanowires and micropores. This nanowire-integrated microporous silicon membrane was created to feed coolant continuously onto the surface of the wick in a micro cooling device to ensure it remains hydrated and in case of dryout, allow for regeneration of the system. The membrane was fabricated by photoelectrochemical etching to form micropores followed by hydrothermal growth of nanowires. This study shows a promising approach to address thermal management challenges for next generation electronic devices with absence of external power

Structural and photoluminescence investigation on the hot-wire assisted plasma enhanced chemical vapor deposition growth silicon nanowires

International Nuclear Information System (INIS)

Chong, Su Kong; Goh, Boon Tong; Wong, Yuen-Yee; Nguyen, Hong-Quan; Do, Hien; Ahmad, Ishaq; Aspanut, Zarina; Muhamad, Muhamad Rasat; Dee, Chang Fu; Rahman, Saadah Abdul

2012-01-01

High density of silicon nanowires (SiNWs) were synthesized by a hot-wire assisted plasma enhanced chemical vapor deposition technique. The structural and optical properties of the as-grown SiNWs prepared at different rf power of 40 and 80 W were analyzed in this study. The SiNWs prepared at rf power of 40 W exhibited highly crystalline structure with a high crystal volume fraction, X C of ∼82% and are surrounded by a thin layer of SiO x . The NWs show high absorption in the high energy region (E>1.8 eV) and strong photoluminescence at 1.73 to 2.05 eV (red–orange region) with a weak shoulder at 1.65 to 1.73 eV (near IR region). An increase in rf power to 80 W reduced the X C to ∼65% and led to the formation of nanocrystalline Si structures with a crystallite size of <4 nm within the SiNWs. These NWs are covered by a mixture of uncatalyzed amorphous Si layer. The SiNWs prepared at 80 W exhibited a high optical absorption ability above 99% in the broadband range between 220 and ∼1500 nm and red emission between 1.65 and 1.95 eV. The interesting light absorption and photoluminescence properties from both SiNWs are discussed in the text. - Highlights: ► Growth of random oriented silicon nanowires using hot-wire assisted plasma enhanced chemical vapor deposition. ► Increase in rf power reduces the crystallinity of silicon nanowires. ► High density and nanocrystalline structure in silicon nanowires significant enhance the near IR light absorption. ► Oxide defects and silicon nanocrystallites in silicon nanowires reveal photoluminescence in red–orange and red regions.

Fabrication of a Silicon Nanowire on a Bulk Substrate by Use of a Plasma Etching and Total Ionizing Dose Effects on a Gate-All-Around Field-Effect Transistor

Science.gov (United States)

Moon, Dong-Il; Han, Jin-Woo; Meyyappan, Meyya

2016-01-01

The gate all around transistor is investigated through experiment. The suspended silicon nanowire for the next generation is fabricated on bulk substrate by plasma etching method. The scallop pattern generated by Bosch process is utilized to form a floating silicon nanowire. By combining anisotropic and istropic silicon etch process, the shape of nanowire is accurately controlled. From the suspended nanowire, the gate all around transistor is demonstrated. As the silicon nanowire is fully surrounded by the gate, the device shows excellent electrostatic characteristics.

Ion-step method for surface potential sensing of silicon nanowires

NARCIS (Netherlands)

Chen, S.; van Nieuwkasteele, Jan William; van den Berg, Albert; Eijkel, Jan C.T.

2016-01-01

This paper presents a novel stimulus-response method for surface potential sensing of silicon nanowire (Si NW) field-effect transistors. When an "ion-step" from low to high ionic strength is given as a stimulus to the gate oxide surface, an increase of double layer capacitance is therefore expected.

Vertically integrated logic circuits constructed using ZnO-nanowire-based field-effect transistors on plastic substrates.

Science.gov (United States)

Kang, Jeongmin; Moon, Taeho; Jeon, Youngin; Kim, Hoyoung; Kim, Sangsig

2013-05-01

ZnO-nanowire-based logic circuits were constructed by the vertical integration of multilayered field-effect transistors (FETs) on plastic substrates. ZnO nanowires with an average diameter of -100 nm were synthesized by thermal chemical vapor deposition for use as the channel material in FETs. The ZnO-based FETs exhibited a high I(ON)/I(OFF) of > 10(6), with the characteristic of n-type depletion modes. For vertically integrated logic circuits, three multilayer FETs were sequentially prepared. The stacked FETs were connected in series via electrodes, and C-PVPs were used for the layer-isolation material. The NOT and NAND gates exhibited large logic-swing values of -93%. These results demonstrate the feasibility of three dimensional flexible logic circuits.

A comprehensive study of thermoelectric and transport properties of β-silicon carbide nanowires

Energy Technology Data Exchange (ETDEWEB)

Valentín, L. A.; Betancourt, J.; Fonseca, L. F., E-mail: luis.fonseca@upr.edu [Department of Physics University of Puerto Rico, Rio Piedras (Puerto Rico); Pettes, M. T.; Shi, L. [Department of Mechanical Engineering, The University of Texas at Austin, Texas 78712 (United States); Soszyński, M.; Huczko, A. [Department of Chemistry, Warsaw University, Pasteur 1 Str., 02-093 Warsaw (Poland)

2013-11-14

The temperature dependence of the Seebeck coefficient, the electrical and thermal conductivities of individual β-silicon carbide nanowires produced by combustion in a calorimetric bomb were studied using a suspended micro-resistance thermometry device that allows four-point probe measurements to be conducted on each nanowire. Additionally, crystal structure and growth direction for each measured nanowire was directly obtained by transmission electron microscopy analysis. The Fermi level, the carrier concentration, and mobility of each nanostructure were determined using a combination of Seebeck coefficient and electrical conductivity measurements, energy band structure and transport theory calculations. The temperature dependence of the thermal and electrical conductivities of the nanowires was explained in terms of contributions from boundary, impurity, and defect scattering.

Large-size, high-uniformity, random silver nanowire networks as transparent electrodes for crystalline silicon wafer solar cells.

Science.gov (United States)

Xie, Shouyi; Ouyang, Zi; Jia, Baohua; Gu, Min

2013-05-06

Metal nanowire networks are emerging as next generation transparent electrodes for photovoltaic devices. We demonstrate the application of random silver nanowire networks as the top electrode on crystalline silicon wafer solar cells. The dependence of transmittance and sheet resistance on the surface coverage is measured. Superior optical and electrical properties are observed due to the large-size, highly-uniform nature of these networks. When applying the nanowire networks on the solar cells with an optimized two-step annealing process, we achieved as large as 19% enhancement on the energy conversion efficiency. The detailed analysis reveals that the enhancement is mainly caused by the improved electrical properties of the solar cells due to the silver nanowire networks. Our result reveals that this technology is a promising alternative transparent electrode technology for crystalline silicon wafer solar cells.

Fluorinated alkyne-derived monolayers on oxide-free silicon nanowires via one-step hydrosilylation

International Nuclear Information System (INIS)

Nguyen Minh, Quyen; Pujari, Sidharam P.; Wang, Bin; Wang, Zhanhua; Haick, Hossam; Zuilhof, Han; Rijn, Cees J.M. van

2016-01-01

Highlights: • Oxide-free H-terminated silicon nanowires undergo efficient surface modification by reaction with fluorinated 1-alkynes (HC≡C−(CH 2 ) 6 C 8 H 17−x F x ; x = 0–17). • These surface-modified Si NWs are chemically stable under range of conditions (including acid, base). • The surface coating yields efficient electrical passivation as demonstrated by a near-zero electrochemical activity of the surface. - Abstract: Passivation of oxide-free silicon nanowires (Si NWs) by the formation of high-quality fluorinated 1-hexadecyne-derived monolayers with varying fluorine content has been investigated. Alkyl chain monolayers (C 16 H 30−x F x ) with a varying number of fluorine substituents (x = 0, 1, 3, 9, 17) were attached onto hydrogen-terminated silicon (Si−H) surfaces with an effective one-step hydrosilylation. This surface chemistry gives well-defined monolayers on nanowires that have a cylindrical core–shell structure, as characterized by X-ray photoelectron spectroscopy (XPS), Fourier transform infrared spectroscopy (FT-IR) and static contact angle (SCA) analysis. The monolayers were stable under acidic and basic conditions, as well as under extreme conditions (such as UV exposure), and provide excellent surface passivation, which opens up applications in the fields of field effect transistors, optoelectronics and especially for disease diagnosis.

Tunable electronic transport properties of silicon-fullerene-linked nanowires: Semiconductor, conducting wire, and tunnel diode

OpenAIRE

Nishio, Kengo; Ozaki, Taisuke; Morishita, Tetsuya; Mikami, Masuhiro

2010-01-01

We explore the possibility of controllable tuning of the electronic transport properties of silicon-fullerene-linked nanowires by encapsulating guest atoms into their cages. Our first-principles calculations demonstrate that the guest-free nanowires are semiconductors, and do not conduct electricity. The iodine or sodium doping improves the transport properties, and makes the nanowires metallic. In the junctions of I-doped and Na-doped NWs, the current travels through the boundary by quantum ...

Thermal conductivity engineering in width-modulated silicon nanowires and thermoelectric efficiency enhancement

Science.gov (United States)

Zianni, Xanthippi

2018-03-01

Width-modulated nanowires have been proposed as efficient thermoelectric materials. Here, the electron and phonon transport properties and the thermoelectric efficiency are discussed for dimensions above the quantum confinement regime. The thermal conductivity decreases dramatically in the presence of thin constrictions due to their ballistic thermal resistance. It shows a scaling behavior upon the width-modulation rate that allows for thermal conductivity engineering. The electron conductivity also decreases due to enhanced boundary scattering by the constrictions. The effect of boundary scattering is weaker for electrons than for phonons and the overall thermoelectric efficiency is enhanced. A ZT enhancement by a factor of 20-30 is predicted for width-modulated nanowires compared to bulk silicon. Our findings indicate that width-modulated nanostructures are promising for developing silicon nanostructures with high thermoelectric efficiency.

Effect of electroless etching parameters on the growth and reflection properties of silicon nanowires

International Nuclear Information System (INIS)

Ozdemir, Baris; Unalan, Husnu Emrah; Kulakci, Mustafa; Turan, Rasit

2011-01-01

Vertically aligned silicon nanowire (Si NW) arrays have been fabricated over large areas using an electroless etching (EE) method, which involves etching of silicon wafers in a silver nitrate and hydrofluoric acid based solution. A detailed parametric study determining the relationship between nanowire morphology and time, temperature, solution concentration and starting wafer characteristics (doping type, resistivity, crystallographic orientation) is presented. The as-fabricated Si NW arrays were analyzed by field emission scanning electron microscope (FE-SEM) and a linear dependency of nanowire length to both temperature and time was obtained and the change in the growth rate of Si NWs at increased etching durations was shown. Furthermore, the effects of EE parameters on the optical reflectivity of the Si NWs were investigated in this study. Reflectivity measurements show that the 42.8% reflectivity of the starting silicon wafer drops to 1.3%, recorded for 10 μm long Si NW arrays. The remarkable decrease in optical reflectivity indicates that Si NWs have a great potential to be utilized in radial or coaxial p-n heterojunction solar cells that could provide orthogonal photon absorption and enhanced carrier collection.

Effect of electroless etching parameters on the growth and reflection properties of silicon nanowires.

Science.gov (United States)

Ozdemir, Baris; Kulakci, Mustafa; Turan, Rasit; Unalan, Husnu Emrah

2011-04-15

Vertically aligned silicon nanowire (Si NW) arrays have been fabricated over large areas using an electroless etching (EE) method, which involves etching of silicon wafers in a silver nitrate and hydrofluoric acid based solution. A detailed parametric study determining the relationship between nanowire morphology and time, temperature, solution concentration and starting wafer characteristics (doping type, resistivity, crystallographic orientation) is presented. The as-fabricated Si NW arrays were analyzed by field emission scanning electron microscope (FE-SEM) and a linear dependency of nanowire length to both temperature and time was obtained and the change in the growth rate of Si NWs at increased etching durations was shown. Furthermore, the effects of EE parameters on the optical reflectivity of the Si NWs were investigated in this study. Reflectivity measurements show that the 42.8% reflectivity of the starting silicon wafer drops to 1.3%, recorded for 10 µm long Si NW arrays. The remarkable decrease in optical reflectivity indicates that Si NWs have a great potential to be utilized in radial or coaxial p-n heterojunction solar cells that could provide orthogonal photon absorption and enhanced carrier collection.

Effect of electroless etching parameters on the growth and reflection properties of silicon nanowires

Science.gov (United States)

Ozdemir, Baris; Kulakci, Mustafa; Turan, Rasit; Emrah Unalan, Husnu

2011-04-01

Vertically aligned silicon nanowire (Si NW) arrays have been fabricated over large areas using an electroless etching (EE) method, which involves etching of silicon wafers in a silver nitrate and hydrofluoric acid based solution. A detailed parametric study determining the relationship between nanowire morphology and time, temperature, solution concentration and starting wafer characteristics (doping type, resistivity, crystallographic orientation) is presented. The as-fabricated Si NW arrays were analyzed by field emission scanning electron microscope (FE-SEM) and a linear dependency of nanowire length to both temperature and time was obtained and the change in the growth rate of Si NWs at increased etching durations was shown. Furthermore, the effects of EE parameters on the optical reflectivity of the Si NWs were investigated in this study. Reflectivity measurements show that the 42.8% reflectivity of the starting silicon wafer drops to 1.3%, recorded for 10 µm long Si NW arrays. The remarkable decrease in optical reflectivity indicates that Si NWs have a great potential to be utilized in radial or coaxial p-n heterojunction solar cells that could provide orthogonal photon absorption and enhanced carrier collection.

Fabrication of amorphous silica nanowires via oxygen plasma treatment of polymers on silicon

Science.gov (United States)

Chen, Zhuojie; She, Didi; Chen, Qinghua; Li, Yanmei; Wu, Wengang

2018-02-01

We demonstrate a facile non-catalytic method of fabricating silica nanowires at room temperature. Different polymers including photoresists, parylene C and polystyrene are patterned into pedestals on the silicon substrates. The silica nanowires are obtained via the oxygen plasma treatment on those pedestals. Compared to traditional strategies of silica nanowire fabrication, this method is much simpler and low-cost. Through designing the proper initial patterns and plasma process parameters, the method can be used to fabricate various regiment nano-scale silica structure arrays in any laboratory with a regular oxygen-plasma-based cleaner or reactive-ion-etching equipment.

The fabrication of ZnO nanowire field-effect transistors by roll-transfer printing

Science.gov (United States)

Chang, Yi-Kuei; Hong, Franklin Chau-Nan

2009-05-01

A method with the potential to fabricate large-area nanowire field-effect transistors (NW-FETs) was demonstrated in this study. Using a high-speed roller (20-80 cm min-1), transfer printing was successfully employed to transfer vertically aligned zinc oxide (ZnO) nanowires grown on a donor substrate to a polydimethylsiloxane (PDMS) stamp and then print the ordered ZnO nanowire arrays on the received substrate for the fabrication of NW-FETs. ZnO NW-FETs fabricated by this method exhibit high performances with a threshold voltage of around 0.25 V, a current on/off ratio as high as 105, a subthreshold slope of 360 mV/dec, and a field-effect mobility of around 90 cm2 V-1 s-1. The excellent device characteristics suggest that the roll-transfer printing technique, which is compatible with the roll-to-roll (R2R) process and operated in atmosphere, has a good potential for the high-speed fabrication of large-area nanowire transistors for flexible devices and flat panel displays.

The fabrication of ZnO nanowire field-effect transistors by roll-transfer printing

International Nuclear Information System (INIS)

Chang, Y-K; Hong, Franklin Chau-Nan

2009-01-01

A method with the potential to fabricate large-area nanowire field-effect transistors (NW-FETs) was demonstrated in this study. Using a high-speed roller (20-80 cm min -1 ), transfer printing was successfully employed to transfer vertically aligned zinc oxide (ZnO) nanowires grown on a donor substrate to a polydimethylsiloxane (PDMS) stamp and then print the ordered ZnO nanowire arrays on the received substrate for the fabrication of NW-FETs. ZnO NW-FETs fabricated by this method exhibit high performances with a threshold voltage of around 0.25 V, a current on/off ratio as high as 10 5 , a subthreshold slope of 360 mV/dec, and a field-effect mobility of around 90 cm 2 V -1 s -1 . The excellent device characteristics suggest that the roll-transfer printing technique, which is compatible with the roll-to-roll (R2R) process and operated in atmosphere, has a good potential for the high-speed fabrication of large-area nanowire transistors for flexible devices and flat panel displays.

The fabrication of ZnO nanowire field-effect transistors by roll-transfer printing

Energy Technology Data Exchange (ETDEWEB)

Chang, Y-K; Hong, Franklin Chau-Nan [Department of Chemical Engineering, National Cheng Kung University, 1 University Road, Tainan 70101, Taiwan (China)], E-mail: hong@mail.ncku.edu.tw

2009-05-13

A method with the potential to fabricate large-area nanowire field-effect transistors (NW-FETs) was demonstrated in this study. Using a high-speed roller (20-80 cm min{sup -1}), transfer printing was successfully employed to transfer vertically aligned zinc oxide (ZnO) nanowires grown on a donor substrate to a polydimethylsiloxane (PDMS) stamp and then print the ordered ZnO nanowire arrays on the received substrate for the fabrication of NW-FETs. ZnO NW-FETs fabricated by this method exhibit high performances with a threshold voltage of around 0.25 V, a current on/off ratio as high as 10{sup 5}, a subthreshold slope of 360 mV/dec, and a field-effect mobility of around 90 cm{sup 2} V{sup -1} s{sup -1}. The excellent device characteristics suggest that the roll-transfer printing technique, which is compatible with the roll-to-roll (R2R) process and operated in atmosphere, has a good potential for the high-speed fabrication of large-area nanowire transistors for flexible devices and flat panel displays.

Silicon nanowire field-effect transistors for the detection of proteins

Science.gov (United States)

Madler, Carsten

In this dissertation I present results on our efforts to increase the sensitivity and selectivity of silicon nanowire ion-sensitive field-effect transistors for the detection of biomarkers, as well as a novel method for wireless power transfer based on metamaterial rectennas for their potential use as implantable sensors. The sensing scheme is based on changes in the conductance of the semiconducting nanowires upon binding of charged entities to the surface, which induces a field-effect. Monitoring the differential conductance thus provides information of the selective binding of biological molecules of interest to previously covalently linked counterparts on the nanowire surface. In order to improve on the performance of the nanowire sensing, we devised and fabricated a nanowire Wheatstone bridge, which allows canceling out of signal drift due to thermal fluctuations and dynamics of fluid flow. We showed that balancing the bridge significantly improves the signal-to-noise ratio. Further, we demonstrated the sensing of novel melanoma biomarker TROY at clinically relevant concentrations and distinguished it from nonspecific binding by comparing the reaction kinetics. For increased sensitivity, an amplification method was employed using an enzyme which catalyzes a signal-generating reaction by changing the redox potential of a redox pair. In addition, we investigated the electric double layer, which forms around charges in an electrolytic solution. It causes electrostatic screening of the proteins of interest, which puts a fundamental limitation on the biomarker detection in solutions with high salt concentrations, such as blood. We solved the coupled Nernst-Planck and Poisson equations for the electrolyte under influence of an oscillating electric field and discovered oscillations of the counterion concentration at a characteristic frequency. In addition to exploring different methods for improved sensing capabilities, we studied an innovative method to supply power

Vertically integrated, three-dimensional nanowire complementary metal-oxide-semiconductor circuits.

Science.gov (United States)

Nam, SungWoo; Jiang, Xiaocheng; Xiong, Qihua; Ham, Donhee; Lieber, Charles M

2009-12-15

Three-dimensional (3D), multi-transistor-layer, integrated circuits represent an important technological pursuit promising advantages in integration density, operation speed, and power consumption compared with 2D circuits. We report fully functional, 3D integrated complementary metal-oxide-semiconductor (CMOS) circuits based on separate interconnected layers of high-mobility n-type indium arsenide (n-InAs) and p-type germanium/silicon core/shell (p-Ge/Si) nanowire (NW) field-effect transistors (FETs). The DC voltage output (V(out)) versus input (V(in)) response of vertically interconnected CMOS inverters showed sharp switching at close to the ideal value of one-half the supply voltage and, moreover, exhibited substantial DC gain of approximately 45. The gain and the rail-to-rail output switching are consistent with the large noise margin and minimal static power consumption of CMOS. Vertically interconnected, three-stage CMOS ring oscillators were also fabricated by using layer-1 InAs NW n-FETs and layer-2 Ge/Si NW p-FETs. Significantly, measurements of these circuits demonstrated stable, self-sustained oscillations with a maximum frequency of 108 MHz, which represents the highest-frequency integrated circuit based on chemically synthesized nanoscale materials. These results highlight the flexibility of bottom-up assembly of distinct nanoscale materials and suggest substantial promise for 3D integrated circuits.

All-Optical 40 Gbit/s Regenerative Wavelength Conversion Based on Cross-Phase Modulation in a Silicon Nanowire

DEFF Research Database (Denmark)

Jensen, Asger Sellerup; Hu, Hao; Ji, Hua

2013-01-01

We successfully demonstrate all-optical regeneration of a 40 Gbit/s signal based on cross-phase modulation in a silicon nanowire. Bit-error-rate measurements show an average of 1.7dB improvement in receiver sensitivity after the regeneration.......We successfully demonstrate all-optical regeneration of a 40 Gbit/s signal based on cross-phase modulation in a silicon nanowire. Bit-error-rate measurements show an average of 1.7dB improvement in receiver sensitivity after the regeneration....

Critical Role of Diels-Adler Adducts to Realise Stretchable Transparent Electrodes Based on Silver Nanowires and Silicone Elastomer

Science.gov (United States)

Heo, Gaeun; Pyo, Kyoung-Hee; Lee, Da Hee; Kim, Youngmin; Kim, Jong-Woong

2016-05-01

This paper presents the successful fabrication of a transparent electrode comprising a sandwich structure of silicone/Ag nanowires (AgNWs)/silicone equipped with Diels-Alder (DA) adducts as crosslinkers to realise highly stable stretchability. Because of the reversible DA reaction, the crosslinked silicone successfully bonds with the silicone overcoat, which should completely seal the electrode. Thus, any surrounding liquid cannot leak through the interfaces among the constituents. Furthermore, the nanowires are protected by the silicone cover when they are stressed by mechanical loads such as bending, folding, and stretching. After delicate optimisation of the layered silicone/AgNW/silicone sandwich structure, a stretchable transparent electrode which can withstand 1000 cycles of 50% stretching-releasing with an exceptionally high stability and reversibility was fabricated. This structure can be used as a transparent strain sensor; it possesses a strong piezoresistivity with a gauge factor greater than 11.

Fluorinated alkyne-derived monolayers on oxide-free silicon nanowires via one-step hydrosilylation

Energy Technology Data Exchange (ETDEWEB)

Nguyen Minh, Quyen [Laboratory of Organic Chemistry, Wageningen University, Stippeneng 4, 6708 WE Wageningen (Netherlands); Nanosens, IJsselkade 7, 7201 HB Zutphen (Netherlands); Pujari, Sidharam P. [Laboratory of Organic Chemistry, Wageningen University, Stippeneng 4, 6708 WE Wageningen (Netherlands); Wang, Bin [The Department of Chemical Engineering and Russell Berrie Nanotechnology Institute, Technion – Israel Institute of Technology, Haifa 3200003 (Israel); Wang, Zhanhua [Laboratory of Organic Chemistry, Wageningen University, Stippeneng 4, 6708 WE Wageningen (Netherlands); Haick, Hossam [The Department of Chemical Engineering and Russell Berrie Nanotechnology Institute, Technion – Israel Institute of Technology, Haifa 3200003 (Israel); Zuilhof, Han [Laboratory of Organic Chemistry, Wageningen University, Stippeneng 4, 6708 WE Wageningen (Netherlands); Rijn, Cees J.M. van, E-mail: cees.vanrijn@wur.nl [Laboratory of Organic Chemistry, Wageningen University, Stippeneng 4, 6708 WE Wageningen (Netherlands)

2016-11-30

Highlights: • Oxide-free H-terminated silicon nanowires undergo efficient surface modification by reaction with fluorinated 1-alkynes (HC≡C−(CH{sub 2}){sub 6}C{sub 8}H{sub 17−x}F{sub x}; x = 0–17). • These surface-modified Si NWs are chemically stable under range of conditions (including acid, base). • The surface coating yields efficient electrical passivation as demonstrated by a near-zero electrochemical activity of the surface. - Abstract: Passivation of oxide-free silicon nanowires (Si NWs) by the formation of high-quality fluorinated 1-hexadecyne-derived monolayers with varying fluorine content has been investigated. Alkyl chain monolayers (C{sub 16}H{sub 30−x}F{sub x}) with a varying number of fluorine substituents (x = 0, 1, 3, 9, 17) were attached onto hydrogen-terminated silicon (Si−H) surfaces with an effective one-step hydrosilylation. This surface chemistry gives well-defined monolayers on nanowires that have a cylindrical core–shell structure, as characterized by X-ray photoelectron spectroscopy (XPS), Fourier transform infrared spectroscopy (FT-IR) and static contact angle (SCA) analysis. The monolayers were stable under acidic and basic conditions, as well as under extreme conditions (such as UV exposure), and provide excellent surface passivation, which opens up applications in the fields of field effect transistors, optoelectronics and especially for disease diagnosis.

Observation of diameter dependent carrier distribution in nanowire-based transistors

Energy Technology Data Exchange (ETDEWEB)

Schulze, A; Hantschel, T; Eyben, P; Verhulst, A S; Rooyackers, R; Vandooren, A; Mody, J; Nazir, A; Leonelli, D; Vandervorst, W, E-mail: Andreas.Schulze@imec.be [IMEC, Kapeldreef 75, 3001 Leuven (Belgium)

2011-05-06

The successful implementation of nanowire (NW) based field-effect transistors (FET) critically depends on quantitative information about the carrier distribution inside such devices. Therefore, we have developed a method based on high-vacuum scanning spreading resistance microscopy (HV-SSRM) which allows two-dimensional (2D) quantitative carrier profiling of fully integrated silicon NW-based tunnel-FETs (TFETs) with 2 nm spatial resolution. The key elements of our characterization procedure are optimized NW cleaving and polishing steps, the use of in-house fabricated ultra-sharp diamond tips, measurements in high vacuum and a dedicated quantification procedure accounting for the Schottky-like tip-sample contact affected by surface states. In the case of the implanted TFET source regions we find a strong NW diameter dependence of conformality, junction abruptness and gate overlap, quantitatively in agreement with process simulations. In contrast, the arsenic doped drain regions reveal an unexpected NW diameter dependent dopant deactivation. The observed lower drain doping for smaller diameters is reflected in the device characteristics by lower TFET off-currents, as measured experimentally and confirmed by device simulations.

Growth and properties of In(Ga)As nanowires on silicon

International Nuclear Information System (INIS)

Hertenberger, Simon

2012-01-01

In this thesis the integration of III-V semiconductor nanowires on silicon (Si) platform by molecular beam epitaxy (MBE) is investigated. All nanowires are grown without the use of foreign catalysts such as Au to achieve high purity material. First, InAs nanowires are grown in a self-assembled manner on SiO x -masked Si(111) where pinholes in the silicon oxide serve as nucleation spots for the nanowires. This leads to the growth of vertically aligned, (111)-oriented nanowires with hexagonal cross-section. Based on this simple process, the entire growth parameter window is investigated for InAs nanowires, revealing an extremely large growth temperature range from 380 C to 580 C and growth rates as large as 6 μ/h. Complex quantitative in-situ line-of-sight quadrupole mass spectrometry experiments during nanowire growth and post-growth thermal decomposition studies support these findings and indicate a very high thermal stability up to >540 C for InAs nanowires. Furthermore, the influence of the As/In ratio on the nanowire growth is studied revealing two distinct growth regimes, i.e., an In-rich regime for lower As fluxes and an As-rich regime for larger As fluxes, where the latter shows characteristic saturation of the nanowire aspect ratio. For the catalyst-free growth, detailed investigation of the growth mechanism is performed via a combination of in-situ reflection high-energy electron diffraction (RHEED) and ex-situ scanning and transmission electron microscopy (SEM,TEM). An abrupt onset of nanowire growth is observed in RHEED intensity and in-plane lattice parameter evolution. Furthermore, completely droplet-free nanowires, continuous radial growth, constant vertical growth rate and growth interruption experiments suggest a vapor-solid growth mode for all investigated nanowire samples. Moreover, site-selective (positioned) growth of InAs nanowires on pre-patterned SiO 2 masked Si(111) substrates is demonstrated which is needed for ultimate control of nanowire

Growth and properties of In(Ga)As nanowires on silicon

Energy Technology Data Exchange (ETDEWEB)

Hertenberger, Simon

2012-10-15

In this thesis the integration of III-V semiconductor nanowires on silicon (Si) platform by molecular beam epitaxy (MBE) is investigated. All nanowires are grown without the use of foreign catalysts such as Au to achieve high purity material. First, InAs nanowires are grown in a self-assembled manner on SiO{sub x}-masked Si(111) where pinholes in the silicon oxide serve as nucleation spots for the nanowires. This leads to the growth of vertically aligned, (111)-oriented nanowires with hexagonal cross-section. Based on this simple process, the entire growth parameter window is investigated for InAs nanowires, revealing an extremely large growth temperature range from 380 C to 580 C and growth rates as large as 6 μ/h. Complex quantitative in-situ line-of-sight quadrupole mass spectrometry experiments during nanowire growth and post-growth thermal decomposition studies support these findings and indicate a very high thermal stability up to >540 C for InAs nanowires. Furthermore, the influence of the As/In ratio on the nanowire growth is studied revealing two distinct growth regimes, i.e., an In-rich regime for lower As fluxes and an As-rich regime for larger As fluxes, where the latter shows characteristic saturation of the nanowire aspect ratio. For the catalyst-free growth, detailed investigation of the growth mechanism is performed via a combination of in-situ reflection high-energy electron diffraction (RHEED) and ex-situ scanning and transmission electron microscopy (SEM,TEM). An abrupt onset of nanowire growth is observed in RHEED intensity and in-plane lattice parameter evolution. Furthermore, completely droplet-free nanowires, continuous radial growth, constant vertical growth rate and growth interruption experiments suggest a vapor-solid growth mode for all investigated nanowire samples. Moreover, site-selective (positioned) growth of InAs nanowires on pre-patterned SiO{sub 2} masked Si(111) substrates is demonstrated which is needed for ultimate control of

Effective antireflection properties of porous silicon nanowires for photovoltaic applications

KAUST Repository

Najar, Adel

2013-01-01

Porous silicon nanowires (PSiNWs) have been prepared by metal-assisted chemical etching method on the n-Si substrate. The presence of nano-pores with pore size ranging between 10-50nm in SiNWs was confirmed by electron tomography (ET) in the transmission electron microscope (TEM). The PSiNWs give strong photoluminescence peak at red wavelength. Ultra-low reflectance of <5% span over wavelength 250 nm to 1050 nm has been measured. The finite-difference time-domain (FDTD) method has been employed to model the optical reflectance for both Si wafer and PSiNWs. Our calculation results are in agreement with the measured reflectance from nanowires length of 6 µm and 60% porosity. The low reflectance is attributed to the effective graded index of PSiNWs and enhancement of multiple optical scattering from the pores and nanowires. PSiNW structures with low surface reflectance can potentially serve as an antireflection layer for Si-based photovoltaic devices.

Resonant tunnelling features in a suspended silicon nanowire single-hole transistor

Energy Technology Data Exchange (ETDEWEB)

Llobet, Jordi; Pérez-Murano, Francesc, E-mail: francesc.perez@csic.es, E-mail: z.durrani@imperial.ac.uk [Institut de Microelectrònica de Barcelona (IMB-CNM CSIC), Campus UAB, E-08193 Bellaterra, Catalonia (Spain); Krali, Emiljana; Wang, Chen; Jones, Mervyn E.; Durrani, Zahid A. K., E-mail: francesc.perez@csic.es, E-mail: z.durrani@imperial.ac.uk [Department of Electrical and Electronic Engineering, Imperial College London, South Kensington, London SW7 2AZ (United Kingdom); Arbiol, Jordi [Institució Catalana de Recerca i Estudis Avançats (ICREA) and Institut Català de Nanociència i Nanotecnologia (ICN2), Campus UAB, 08193 Bellaterra, Catalonia (Spain); CELLS-ALBA Synchrotron Light Facility, 08290 Cerdanyola, Catalonia (Spain)

2015-11-30

Suspended silicon nanowires have significant potential for a broad spectrum of device applications. A suspended p-type Si nanowire incorporating Si nanocrystal quantum dots has been used to form a single-hole transistor. Transistor fabrication uses a novel and rapid process, based on focused gallium ion beam exposure and anisotropic wet etching, generating <10 nm nanocrystals inside suspended Si nanowires. Electrical characteristics at 10 K show Coulomb diamonds with charging energy ∼27 meV, associated with a single dominant nanocrystal. Resonant tunnelling features with energy spacing ∼10 meV are observed, parallel to both diamond edges. These may be associated either with excited states or hole–acoustic phonon interactions, in the nanocrystal. In the latter case, the energy spacing corresponds well with reported Raman spectroscopy results and phonon spectra calculations.

Resonant tunnelling features in a suspended silicon nanowire single-hole transistor

International Nuclear Information System (INIS)

Llobet, Jordi; Pérez-Murano, Francesc; Krali, Emiljana; Wang, Chen; Jones, Mervyn E.; Durrani, Zahid A. K.; Arbiol, Jordi

2015-01-01

Suspended silicon nanowires have significant potential for a broad spectrum of device applications. A suspended p-type Si nanowire incorporating Si nanocrystal quantum dots has been used to form a single-hole transistor. Transistor fabrication uses a novel and rapid process, based on focused gallium ion beam exposure and anisotropic wet etching, generating <10 nm nanocrystals inside suspended Si nanowires. Electrical characteristics at 10 K show Coulomb diamonds with charging energy ∼27 meV, associated with a single dominant nanocrystal. Resonant tunnelling features with energy spacing ∼10 meV are observed, parallel to both diamond edges. These may be associated either with excited states or hole–acoustic phonon interactions, in the nanocrystal. In the latter case, the energy spacing corresponds well with reported Raman spectroscopy results and phonon spectra calculations

Photo-assisted hysteresis of electronic transport for ZnO nanowire transistors

Science.gov (United States)

Du, Qianqian; Ye, Jiandong; Xu, Zhonghua; Zhu, Shunming; Tang, Kun; Gu, Shulin; Zheng, Youdou

2018-03-01

Recently, ZnO nanowire field effect transistors (FETs) have received renewed interest due to their extraordinary low dimensionality and high sensitivity to external chemical environments and illumination conditions. These prominent properties have promising potential in nanoscale chemical and photo-sensors. In this article, we have fabricated ZnO nanowire FETs and have found hysteresis behavior in their transfer characteristics. The mechanism and dynamics of the hysteresis phenomena have been investigated in detail by varying the sweeping rate and range of the gate bias with and without light irradiation. Significantly, light irradiation is of great importance on charge trapping by regulating adsorption and desorption of oxygen at the interface of ZnO/SiO2. Carriers excited by light irradiation can dramatically promote trapping/detrapping processes. With the assistance of light illumination, we have demonstrated a photon-assisted nonvolatile memory which employs the ZnO nanowire FET. The device exhibits reliable programming/erasing operations and a large on/off ratio. The proposed proto-type memory has thus provided a possible novel path for creating a memory functionality to other low-dimensional material systems.

Silicon tunnel FET with average subthreshold slope of 55 mV/dec at low drain currents

Science.gov (United States)

Narimani, K.; Glass, S.; Bernardy, P.; von den Driesch, N.; Zhao, Q. T.; Mantl, S.

2018-05-01

In this paper we present a silicon tunnel FET based on line-tunneling to achieve better subthreshold performance. The fabricated device shows an on-current of Ion = 2.55 × 10-7 A/μm at Vds = Von = Vgs - Voff = -0.5 V for an Ioff = 1 nA/μm and an average SS of 55 mV/dec over two orders of magnitude of Id. Furthermore, the analog figures of merit have been calculated and show that the transconductance efficiency gm/Id beats the MOSFET performance at low currents.

Fabricating a silicon nanowire by using the proximity effect in electron beam lithography for investigation of the Coulomb blockade effect

International Nuclear Information System (INIS)

Zhang Xiangao; Fang Zhonghui; Chen Kunji; Xu Jun; Huang Xinfan

2011-01-01

We present an approach to fabricate a silicon nanowire relying on the proximity effect in electron beam lithography with a low acceleration voltage system by designing the exposure patterns with a rhombus sandwiched between two symmetric wedges. The reproducibility is investigated by changing the number of rhombuses. A device with a silicon nanowire is constructed on a highly doped silicon-on-insulator wafer to measure the electronic transport characteristics. Significant nonlinear behavior of current-voltage curves is observed at up to 150 K. The dependence of current on the drain voltage and back-gate voltage shows Coulomb blockade oscillations at 5.4 K, revealing a Coulomb island naturally formed in the nanowire. The mechanism of formation of the Coulomb island is discussed.

Influence of the doping level on the porosity of silicon nanowires prepared by metal-assisted chemical etching

International Nuclear Information System (INIS)

Geyer, Nadine; Wollschläger, Nicole; Tonkikh, Alexander; Berger, Andreas; Werner, Peter; Fuhrmann, Bodo; Leipner, Hartmut S; Jungmann, Marco; Krause-Rehberg, Reinhard

2015-01-01

A systematic method to control the porosity of silicon nanowires is presented. This method is based on metal-assisted chemical etching (MACE) and takes advantage of an HF/H_2O_2 etching solution and a silver catalyst in the form of a thin patterned film deposited on a doped silicon wafer. It is found that the porosity of the etched nanowires can be controlled by the doping level of the wafer. For low doping concentrations, the wires are primarily crystalline and surrounded by only a very thin layer of porous silicon (pSi) layer, while for highly doped silicon, they are porous in their entire volume. We performed a series of controlled experiments to conclude that there exists a well-defined critical doping concentration separating the crystalline and porous regimes. Furthermore, transmission electron microscopy investigations showed that the pSi has also a crystalline morphology on a length scale smaller than the pore size, determined from positron annihilation lifetime spectroscopy to be mesoscopic. Based on the experimental evidence, we devise a theoretical model of the pSi formation during MACE and apply it for better control of the nanowire morphology. (paper)

Fabrication and Photovoltaic Characteristics of Coaxial Silicon Nanowire Solar Cells Prepared by Wet Chemical Etching

Directory of Open Access Journals (Sweden)

Chien-Wei Liu

2012-01-01

Full Text Available Nanostructured solar cells with coaxial p-n junction structures have strong potential to enhance the performances of the silicon-based solar cells. This study demonstrates a radial junction silicon nanowire (RJSNW solar cell that was fabricated simply and at low cost using wet chemical etching. Experimental results reveal that the reflectance of the silicon nanowires (SNWs declines as their length increases. The excellent light trapping was mainly associated with high aspect ratio of the SNW arrays. A conversion efficiency of ∼7.1% and an external quantum efficiency of ∼64.6% at 700 nm were demonstrated. Control of etching time and diffusion conditions holds great promise for the development of future RJSNW solar cells. Improving the electrode/RJSNW contact will promote the collection of carries in coaxial core-shell SNW array solar cells.

Crystallinity, Surface Morphology, and Photoelectrochemical Effects in Conical InP and InN Nanowires Grown on Silicon.

Science.gov (United States)

Parameshwaran, Vijay; Xu, Xiaoqing; Clemens, Bruce

2016-08-24

The growth conditions of two types of indium-based III-V nanowires, InP and InN, are tailored such that instead of yielding conventional wire-type morphologies, single-crystal conical structures are formed with an enlarged diameter either near the base or near the tip. By using indium droplets as a growth catalyst, combined with an excess indium supply during growth, "ice cream cone" type structures are formed with a nanowire "cone" and an indium-based "ice cream" droplet on top for both InP and InN. Surface polycrystallinity and annihilation of the catalyst tip of the conical InP nanowires are observed when the indium supply is turned off during the growth process. This growth design technique is extended to create single-crystal InN nanowires with the same morphology. Conical InN nanowires with an enlarged base are obtained through the use of an excess combined Au-In growth catalyst. Electrochemical studies of the InP nanowires on silicon demonstrate a reduction photocurrent as a proof of photovolatic behavior and provide insight as to how the observed surface polycrystallinity and the resulting interface affect these device-level properties. Additionally, a photovoltage is induced in both types of conical InN nanowires on silicon, which is not replicated in epitaxial InN thin films.

Silicon nanowires used as the anode of a lithium-ion battery

International Nuclear Information System (INIS)

Prosini, Pier Paolo; Rufoloni, Alessandro; Rondino, Flaminia; Santoni, Antonino

2014-01-01

In this paper the synthesis and characterization of silicon nanowires to be used as the anode of a lithium-ion battery cell are reported. The nanowires were synthesized by CVD and characterized by SEM. The nanostructured material was used as an electrode in a lithium cell and its electrochemical properties were investigated by galvanostatic charge/discharge cycles at C/10 rate as a function of the cycle number and at various rates as a function of the charge current. The electrode was then coupled with a LiFePO 4 cathode to fabricate a lithium-ion battery cell and the cell performance evaluated by galvanostatic charge/discharge cycles

Photoresponsive properties of ultrathin silicon nanowires

International Nuclear Information System (INIS)

Tran, Duy P.; Macdonald, Thomas J.; Nann, Thomas; Thierry, Benjamin; Wolfrum, Bernhard; Stockmann, Regina; Offenhäusser, Andreas

2014-01-01

Functional silicon nanowires (SiNWs) are promising building blocks in the design of highly sensitive photodetectors and bio-chemical sensors. We systematically investigate the photoresponse properties of ultrathin SiNWs (20 nm) fabricated using a size-reduction method based on e-beam lithography and tetramethylammonium hydroxide wet-etching. The high-quality SiNWs were able to detect light from the UV to the visible range with excellent sensitivity (∼1 pW/array), good time response, and high photoresponsivity (R ∼ 2.5 × 10 4  A/W). Improvement of the ultrathin SiNWs' photoresponse has been observed in comparison to 40 nm counter-part nanowires. These properties are attributable to the predominance surface-effect due to the high surface-to-volume ratio of ultrathin SiNWs. Long-term measurements at different temperatures in both the forward and reverse bias directions demonstrated the stability and reliability of the fabricated device. By sensitizing the fabricated SiNW arrays with cadmium telluride quantum dots (QDs), hybrid QD SiNW devices displayed an improvement in photocurrent response under UV light, while preserving their performance in the visible light range. The fast, stable, and high photoresponse of these hybrid nanostructures is promising towards the development of optoelectronic and photovoltaic devices

Photoresponsive properties of ultrathin silicon nanowires

Energy Technology Data Exchange (ETDEWEB)

Tran, Duy P.; Macdonald, Thomas J.; Nann, Thomas; Thierry, Benjamin, E-mail: a.offenhaeusser@fz-juelich.de, E-mail: benjamin.thierry@unisa.edu.au [Ian Wark Research Institute, University of South Australia, Mawson Lakes Campus, MM Bldg., Mawson Lakes Blvd., Mawson Lakes, South Australia 5095 (Australia); Wolfrum, Bernhard; Stockmann, Regina; Offenhäusser, Andreas, E-mail: a.offenhaeusser@fz-juelich.de, E-mail: benjamin.thierry@unisa.edu.au [Peter Grünberg Institute, Forschungszentrum Jülich GmbH, 2.4v Bldg., Wilhelm-Johnen St., Jülich 52428 (Germany)

2014-12-08

Functional silicon nanowires (SiNWs) are promising building blocks in the design of highly sensitive photodetectors and bio-chemical sensors. We systematically investigate the photoresponse properties of ultrathin SiNWs (20 nm) fabricated using a size-reduction method based on e-beam lithography and tetramethylammonium hydroxide wet-etching. The high-quality SiNWs were able to detect light from the UV to the visible range with excellent sensitivity (∼1 pW/array), good time response, and high photoresponsivity (R ∼ 2.5 × 10{sup 4 }A/W). Improvement of the ultrathin SiNWs' photoresponse has been observed in comparison to 40 nm counter-part nanowires. These properties are attributable to the predominance surface-effect due to the high surface-to-volume ratio of ultrathin SiNWs. Long-term measurements at different temperatures in both the forward and reverse bias directions demonstrated the stability and reliability of the fabricated device. By sensitizing the fabricated SiNW arrays with cadmium telluride quantum dots (QDs), hybrid QD SiNW devices displayed an improvement in photocurrent response under UV light, while preserving their performance in the visible light range. The fast, stable, and high photoresponse of these hybrid nanostructures is promising towards the development of optoelectronic and photovoltaic devices.

Functionalization and microfluidic integration of silicon nanowire biologically gated field effect transistors

DEFF Research Database (Denmark)

Pfreundt, Andrea

This thesis deals with the development of a novel biosensor for the detection of biomolecules based on a silicon nanowire biologically gated field-effect transistor and its integration into a point-of-care device. The sensor and electrical on-chip integration was developed in a different project...

Functionalization and microfluidic integration of silicon nanowire biologically gated field effect transistors

DEFF Research Database (Denmark)

Pfreundt, Andrea; Svendsen, Winnie Edith; Dimaki, Maria

2016-01-01

This thesis deals with the development of a novel biosensor for the detection of biomolecules based on a silicon nanowire biologically gated field-effect transistor and its integration into a point-of-care device. The sensor and electrical on-chip integration was developed in a different project...

High density micro-pyramids with silicon nanowire array for photovoltaic applications

International Nuclear Information System (INIS)

Rahman, Tasmiat; Navarro-Cía, Miguel; Fobelets, Kristel

2014-01-01

We use a metal assisted chemical etch process to fabricate silicon nanowire arrays (SiNWAs) onto a dense periodic array of pyramids that are formed using an alkaline etch masked with an oxide layer. The hybrid micro-nano structure acts as an anti-reflective coating with experimental reflectivity below 1% over the visible and near-infrared spectral regions. This represents an improvement of up to 11 and 14 times compared to the pyramid array and SiNWAs on bulk, respectively. In addition to the experimental work, we optically simulate the hybrid structure using a commercial finite difference time domain package. The results of the optical simulations support our experimental work, illustrating a reduced reflectivity in the hybrid structure. The nanowire array increases the absorbed carrier density within the pyramid by providing a guided transition of the refractive index along the light path from air into the silicon. Furthermore, electrical simulations which take into account surface and Auger recombination show an efficiency increase for the hybrid structure of 56% over bulk, 11% over pyramid array and 8.5% over SiNWAs. (paper)

Design and synthesis of diverse functional kinked nanowire structures for nanoelectronic bioprobes.

Science.gov (United States)

Xu, Lin; Jiang, Zhe; Qing, Quan; Mai, Liqiang; Zhang, Qingjie; Lieber, Charles M

2013-02-13

Functional kinked nanowires (KNWs) represent a new class of nanowire building blocks, in which functional devices, for example, nanoscale field-effect transistors (nanoFETs), are encoded in geometrically controlled nanowire superstructures during synthesis. The bottom-up control of both structure and function of KNWs enables construction of spatially isolated point-like nanoelectronic probes that are especially useful for monitoring biological systems where finely tuned feature size and structure are highly desired. Here we present three new types of functional KNWs including (1) the zero-degree KNW structures with two parallel heavily doped arms of U-shaped structures with a nanoFET at the tip of the "U", (2) series multiplexed functional KNW integrating multi-nanoFETs along the arm and at the tips of V-shaped structures, and (3) parallel multiplexed KNWs integrating nanoFETs at the two tips of W-shaped structures. First, U-shaped KNWs were synthesized with separations as small as 650 nm between the parallel arms and used to fabricate three-dimensional nanoFET probes at least 3 times smaller than previous V-shaped designs. In addition, multiple nanoFETs were encoded during synthesis in one of the arms/tip of V-shaped and distinct arms/tips of W-shaped KNWs. These new multiplexed KNW structures were structurally verified by optical and electron microscopy of dopant-selective etched samples and electrically characterized using scanning gate microscopy and transport measurements. The facile design and bottom-up synthesis of these diverse functional KNWs provides a growing toolbox of building blocks for fabricating highly compact and multiplexed three-dimensional nanoprobes for applications in life sciences, including intracellular and deep tissue/cell recordings.

Fabrication and evaluation of series-triple quantum dots by thermal oxidation of silicon nanowire

International Nuclear Information System (INIS)

Uchida, Takafumi; Jo, Mingyu; Tsurumaki-Fukuchi, Atsushi; Arita, Masashi; Takahashi, Yasuo; Fujiwara, Akira

2015-01-01

Series-connected triple quantum dots were fabricated by a simple two-step oxidation technique using the pattern-dependent oxidation of a silicon nanowire and an additional oxidation of the nanowire through the gap of the fine gates attached to the nanowire. The characteristics of multi-dot single-electron devices are obtained. The formation of each quantum dot beneath an attached gate is confirmed by analyzing the electrical characteristics and by evaluating the gate capacitances between all pairings of gates and quantum dots. Because the gate electrode is automatically attached to each dot, the device structure benefits from scalability. This technique promises integrability of multiple quantum dots with individual control gates

Effects of ultra-thin Si-fin body widths upon SOI PMOS FinFETs

Science.gov (United States)

Liaw, Yue-Gie; Chen, Chii-Wen; Liao, Wen-Shiang; Wang, Mu-Chun; Zou, Xuecheng

2018-05-01

Nano-node tri-gate FinFET devices have been developed after integrating a 14 Å nitrided gate oxide upon the silicon-on-insulator (SOI) wafers established on an advanced CMOS logic platform. These vertical double gate (FinFET) devices with ultra-thin silicon fin (Si-fin) widths ranging from 27 nm to 17 nm and gate length down to 30 nm have been successfully developed with a 193 nm scanner lithography tool. Combining the cobalt fully silicidation and the CESL strain technology beneficial for PMOS FinFETs was incorporated into this work. Detailed analyses of Id-Vg characteristics, threshold voltage (Vt), and drain-induced barrier lowering (DIBL) illustrate that the thinnest 17 nm Si-fin width FinFET exhibits the best gate controllability due to its better suppression of short channel effect (SCE). However, higher source/drain resistance (RSD), channel mobility degradation due to dry etch steps, or “current crowding effect” will slightly limit its transconductance (Gm) and drive current.

Electrical Control of g-Factor in a Few-Hole Silicon Nanowire MOSFET.

Science.gov (United States)

Voisin, B; Maurand, R; Barraud, S; Vinet, M; Jehl, X; Sanquer, M; Renard, J; De Franceschi, S

2016-01-13

Hole spins in silicon represent a promising yet barely explored direction for solid-state quantum computation, possibly combining long spin coherence, resulting from a reduced hyperfine interaction, and fast electrically driven qubit manipulation. Here we show that a silicon-nanowire field-effect transistor based on state-of-the-art silicon-on-insulator technology can be operated as a few-hole quantum dot. A detailed magnetotransport study of the first accessible hole reveals a g-factor with unexpectedly strong anisotropy and gate dependence. We infer that these two characteristics could enable an electrically driven g-tensor-modulation spin resonance with Rabi frequencies exceeding several hundred mega-Hertz.

pH-controlled silicon nanowires fluorescence switch

International Nuclear Information System (INIS)

Mu Lixuan; Shi Wensheng; Zhang Taiping; Zhang Hongyan; She Guangwei

2010-01-01

Covalently immobilizing photoinduced electronic transfer (PET) fluorophore 3-[N, N-bis(9-anthrylmethyl)amino]-propyltriethoxysilane (DiAN) on the surface of silicon nanowires (SiNWs) resulted a SiNWs-based fluorescence switch. This fluorescence switch is operated by adjustment of the acidity of the environment and exhibits sensitive response to pH at the range from 8 to 10. Such response is attributed to the effect of pH on the PET process. The successful combination of logic switch and SiNWs provides a rational approach to assemble different logic molecules on SiNWs for realization of miniaturization and modularization of switches and logic devices.

APPLIED OPTICS. Voltage-tunable circular photogalvanic effect in silicon nanowires.

Science.gov (United States)

Dhara, Sajal; Mele, Eugene J; Agarwal, Ritesh

2015-08-14

Electronic bands in crystals can support nontrivial topological textures arising from spin-orbit interactions, but purely orbital mechanisms can realize closely related dynamics without breaking spin degeneracies, opening up applications in materials containing only light elements. One such application is the circular photogalvanic effect (CPGE), which is the generation of photocurrents whose magnitude and polarity depend on the chirality of optical excitation. We show that the CPGE can arise from interband transitions at the metal contacts to silicon nanowires, where inversion symmetry is locally broken by an electric field. Bias voltage that modulates this field further controls the sign and magnitude of the CPGE. The generation of chirality-dependent photocurrents in silicon with a purely orbital-based mechanism will enable new functionalities in silicon that can be integrated with conventional electronics. Copyright © 2015, American Association for the Advancement of Science.

Vertical Silicon Nanowire Field Effect Transistors with Nanoscale Gate-All-Around

Science.gov (United States)

Guerfi, Youssouf; Larrieu, Guilhem

2016-04-01

Nanowires are considered building blocks for the ultimate scaling of MOS transistors, capable of pushing devices until the most extreme boundaries of miniaturization thanks to their physical and geometrical properties. In particular, nanowires' suitability for forming a gate-all-around (GAA) configuration confers to the device an optimum electrostatic control of the gate over the conduction channel and then a better immunity against the short channel effects (SCE). In this letter, a large-scale process of GAA vertical silicon nanowire (VNW) MOSFETs is presented. A top-down approach is adopted for the realization of VNWs with an optimum reproducibility followed by thin layer engineering at nanoscale. Good overall electrical performances were obtained, with excellent electrostatic behavior (a subthreshold slope (SS) of 95 mV/dec and a drain induced barrier lowering (DIBL) of 25 mV/V) for a 15-nm gate length. Finally, a first demonstration of dual integration of n-type and p-type VNW transistors for the realization of CMOS inverter is proposed.

Dual-Input AND Gate From Single-Channel Thin-Film FET

Science.gov (United States)

Miranda, F. A.; Pinto, N. J.; Perez, R.; Mueller, C. H.

2008-01-01

A regio-regular poly(3-hexylthiophene) (RRP3HT) thin-film transistor having a split-gate architecture has been fabricated on a doped silicon/silicon nitride substrate and characterized. RRP3HT is a semiconducting polymer that has a carrier mobility and on/off ratio when used in a field effect transistor (FET) configuration. This commercially available polymer is very soluble in common organic solvents and is easily processed to form uniform thin films. The most important polymer-based device fabricated and studied is the FET, since it forms the building block in logic circuits and switches for active matrix (light-emitting-diode) (LED) displays, smart cards, and radio frequency identification (RFID) cards.

Self-bridging of vertical silicon nanowires and a universal capacitive force model for spontaneous attraction in nanostructures.

Science.gov (United States)

Sun, Zhelin; Wang, Deli; Xiang, Jie

2014-11-25

Spontaneous attractions between free-standing nanostructures have often caused adhesion or stiction that affects a wide range of nanoscale devices, particularly nano/microelectromechanical systems. Previous understandings of the attraction mechanisms have included capillary force, van der Waals/Casimir forces, and surface polar charges. However, none of these mechanisms universally applies to simple semiconductor structures such as silicon nanowire arrays that often exhibit bunching or adhesions. Here we propose a simple capacitive force model to quantitatively study the universal spontaneous attraction that often causes stiction among semiconductor or metallic nanostructures such as vertical nanowire arrays with inevitably nonuniform size variations due to fabrication. When nanostructures are uniform in size, they share the same substrate potential. The presence of slight size differences will break the symmetry in the capacitive network formed between the nanowires, substrate, and their environment, giving rise to electrostatic attraction forces due to the relative potential difference between neighboring wires. Our model is experimentally verified using arrays of vertical silicon nanowire pairs with varied spacing, diameter, and size differences. Threshold nanowire spacing, diameter, or size difference between the nearest neighbors has been identified beyond which the nanowires start to exhibit spontaneous attraction that leads to bridging when electrostatic forces overcome elastic restoration forces. This work illustrates a universal understanding of spontaneous attraction that will impact the design, fabrication, and reliable operation of nanoscale devices and systems.

A simple ionizing radiation spectrometer/dosimeter based on radiation sensing field effect transistors (RadFETs)

International Nuclear Information System (INIS)

Moreno, D.J.; Hughes, R.C.; Jenkins, M.W.; Drumm, C.R.

1997-01-01

This paper reports on the processing steps in a silicon foundry leading to improved performance of the Radiation Sensing Field Effect Transistor (RadFET) and the use of multiple RadFETs in a handheld, battery operated, combination spectrometer/dosimeter

Crystalline-Amorphous Core−Shell Silicon Nanowires for High Capacity and High Current Battery Electrodes

KAUST Repository

Cui, Li-Feng; Ruffo, Riccardo; Chan, Candace K.; Peng, Hailin; Cui, Yi

2009-01-01

fading, has limited its applications. Designing nanoscale hierarchical structures is a novel approach to address the issues associated with the large volume changes. In this letter, we introduce a core-shell design of silicon nanowires for highpower

Comparison of confinement characters between porous silicon and silicon nanowires

International Nuclear Information System (INIS)

Tit, Nacir; Yamani, Zain H.; Pizzi, Giovanni; Virgilio, Michele

2011-01-01

Confinement character and its effects on photoluminescence (PL) properties are theoretically investigated and compared between porous silicon (p-Si) and silicon nanowires (Si-NWs). The method is based on the application of the tight-binding technique using the minimal sp 3 -basis set, including the second-nearest-neighbor interactions. The results show that the quantum confinement (QC) is not entirely controlled by the porosity, rather it is mainly affected by the average distance between pores (d). The p-Si is found to exhibit weaker confinement character than Si-NWs. The confinement energy of charge carriers decays against d exponentially for p-Si and via a power-law for Si-NWs. This latter type of QC is much stronger and is somewhat similar to the case of a single particle in a quantum box. The excellent fit to the PL data demonstrates that the experimental samples of p-Si do exhibit strong QC character and thus reveals the possibility of silicon clustering into nano-crystals and/or nanowires. Furthermore, the results show that the passivation of the surface dangling bonds by the hydrogen atoms plays an essential role in preventing the appearance of gap states and consequently enhances the optical qualities of the produced structures. The oscillator strength (OS) is found to increase exponentially with energy in Si-NWs confirming the strong confinement character of carriers. Our theoretical findings suggest the existence of Si nanocrystals (Si-NCs) of sizes 1-3 nm and/or Si-NWs of cross-sectional sizes in the 1-3 nm range inside the experimental p-Si samples. The experimentally-observed strong photoluminescence from p-Si should be in favor of an exhibition of 3D-confinement character. The favorable comparison of our theoretical results with the experimental data consolidates our above claims. -- Highlights: → Tight-binding is used to study quantum-confinement (QC) effects in p-Si and Si-NWs. → QC is not entirely controlled by the porosity but also by the d

Dynamic characterization of silicon nanowires using a terahertz optical asymmetric demultiplexer-based pump-probe scheme

DEFF Research Database (Denmark)

Ji, Hua; Cleary, C. S.; Dailey, J. M.

2012-01-01

Dynamic phase and amplitude all-optical responses of silicon nanowires are characterized using a terahertz optical asymmetric demultiplexer (TOAD) based pump-probe scheme. Ultra-fast recovery is observed for moderate pump powers....

High-Temperature Performance of Stacked Silicon Nanowires for Thermoelectric Power Generation

Science.gov (United States)

Stranz, Andrej; Waag, Andreas; Peiner, Erwin

2013-07-01

Deep reactive-ion etching at cryogenic temperatures (cryo-DRIE) has been used to produce arrays of silicon nanowires (NWs) for thermoelectric (TE) power generation devices. Using cryo-DRIE, we were able to fabricate NWs of large aspect ratios (up to 32) using a photoresist mask. Roughening of the NW sidewalls occurred, which has been recognized as beneficial for low thermal conductivity. Generated NWs, which were 7 μm in length and 220 nm to 270 nm in diameter, were robust enough to be stacked with a bulk silicon chip as a common top contact to the NWs. Mechanical support of the NW array, which can be created by filling the free space between the NWs using silicon oxide or polyimide, was not required. The Seebeck voltage, measured across multiple stacks of up to 16 bulk silicon dies, revealed negligible thermal interface resistance. With stacked silicon NWs, we observed Seebeck voltages that were an order of magnitude higher than those observed for bulk silicon. Degradation of the TE performance of silicon NWs was not observed for temperatures up to 470°C and temperature gradients up to 170 K.

Nanowire size dependence on sensitivity of silicon nanowire field-effect transistor-based pH sensor

Science.gov (United States)

Lee, Ryoongbin; Kwon, Dae Woong; Kim, Sihyun; Kim, Sangwan; Mo, Hyun-Sun; Kim, Dae Hwan; Park, Byung-Gook

2017-12-01

In this study, we investigated the effects of nanowire size on the current sensitivity of silicon nanowire (SiNW) ion-sensitive field-effect transistors (ISFETs). The changes in on-current (I on) and resistance according to pH were measured in fabricated SiNW ISFETs of various lengths and widths. As a result, it was revealed that the sensitivity expressed as relative I on change improves as the width decreases. Through technology computer-aided design (TCAD) simulation analysis, the width dependence on the relative I on change can be explained by the observation that the target molecules located at the edge region along the channel width have a stronger effect on the sensitivity as the SiNW width is reduced. Additionally, the length dependence on the sensitivity can be understood in terms of the resistance ratio of the fixed parasitic resistance, including source/drain resistance, to the varying channel resistance as a function of channel length.

Photonic Torque Microscopy of the Nonconservative Force Field for Optically Trapped Silicon Nanowires

Czech Academy of Sciences Publication Activity Database

Irrera, A.; Maggazu, A.; Artoni, P.; Simpson, Stephen Hugh; Hanna, S.; Jones, P.H.; Priolo, F.; Gucciardi, P. G.; Marago, O.M.

2016-01-01

Roč. 16, č. 7 (2016), s. 4181-4188 ISSN 1530-6984 R&D Projects: GA ČR GB14-36681G Institutional support: RVO:68081731 Keywords : optical tweezers * silicon nanowires * nonequilibrium dynamics * Brownian motion Subject RIV: BH - Optics, Masers, Lasers Impact factor: 12.712, year: 2016

Simulation study of a 3-D device integrating FinFET and UTBFET

KAUST Repository

Fahad, Hossain M.

2015-01-01

By integrating 3-D nonplanar fins and 2-D ultrathin bodies, wavy FinFETs merge two formerly competing technologies on a silicon-on-insulator platform to deliver enhanced transistor performance compared with conventional trigate FinFETs with unprecedented levels of chip-area efficiency. This makes it suitable for ultralarge-scale integration high-performance logic at and beyond the 10-nm technology node.

Reducing the porosity and reflection loss of silicon nanowires by a sticky tape

International Nuclear Information System (INIS)

Liu, Junjun; Huang, Zhifeng

2015-01-01

Engineering the porosity of silicon nanowires (SiNWs) is of fundamental importance, and this work introduces a new method for doing so. Metal-assisted chemical etching (MACE) of heavily doped Si(100) creates mesoporous silicon nanowires (mp-SiNWs). mp-SiNWs are transferred from the MACE-treated wafer to a sticky tape, leaving residues composed of broken mp-SiNWs and a mesoporous Si layer on the wafer. Then the taped wafer is re-treated by MACE, without changing the etching conditions. The second MACE treatment generates mp-SiNWs that are less porous and longer than those generated by the first MACE treatment, which can be attributed to the difference in the surface topography at the beginning of the etching process. Less porous mp-SiNWs reduce optical scattering from the porous Si skeletons, and vertically protrude on the wafer without aggregation to facilitate optical trapping. Consequently, less porous mp-SiNWs effectively reduce ultraviolet-visible reflection loss. (paper)

Long term stability of nanowire nanoelectronics in physiological environments.

Science.gov (United States)

Zhou, Wei; Dai, Xiaochuan; Fu, Tian-Ming; Xie, Chong; Liu, Jia; Lieber, Charles M

2014-03-12

Nanowire nanoelectronic devices have been exploited as highly sensitive subcellular resolution detectors for recording extracellular and intracellular signals from cells, as well as from natural and engineered/cyborg tissues, and in this capacity open many opportunities for fundamental biological research and biomedical applications. Here we demonstrate the capability to take full advantage of the attractive capabilities of nanowire nanoelectronic devices for long term physiological studies by passivating the nanowire elements with ultrathin metal oxide shells. Studies of Si and Si/aluminum oxide (Al2O3) core/shell nanowires in physiological solutions at 37 °C demonstrate long-term stability extending for at least 100 days in samples coated with 10 nm thick Al2O3 shells. In addition, investigations of nanowires configured as field-effect transistors (FETs) demonstrate that the Si/Al2O3 core/shell nanowire FETs exhibit good device performance for at least 4 months in physiological model solutions at 37 °C. The generality of this approach was also tested with in studies of Ge/Si and InAs nanowires, where Ge/Si/Al2O3 and InAs/Al2O3 core/shell materials exhibited stability for at least 100 days in physiological model solutions at 37 °C. In addition, investigations of hafnium oxide-Al2O3 nanolaminated shells indicate the potential to extend nanowire stability well beyond 1 year time scale in vivo. These studies demonstrate that straightforward core/shell nanowire nanoelectronic devices can exhibit the long term stability needed for a range of chronic in vivo studies in animals as well as powerful biomedical implants that could improve monitoring and treatment of disease.

Optical characteristics of silicon nanowires grown from tin catalyst layers on silicon coated glass

KAUST Repository

Ball, Jeremy

2012-08-20

The optical characteristics of silicon nanowires grown on Si layers on glass have been modeled using the FDTD (Finite Difference Time Domain) technique and compared with experimental results. The wires were grown by the VLS (vapour-liquid-solid) method using Sn catalyst layers and exhibit a conical shape. The resulting measured and modeled absorption, reflectance and transmittance spectra have been investigated as a function of the thickness of the underlying Si layer and the initial catalyst layer, the latter having a strong influence on wire density. High levels of absorption (>90% in the visible wavelength range) and good agreement between the modeling and experiment have been observed when the nanowires have a relatively high density of ∼4 wires/μ m2. The experimental and modeled results diverge for samples with a lower density of wire growth. The results are discussed along with some implications for solar cell fabrication. © 2012 Optical Society of America.

Optical characteristics of silicon nanowires grown from tin catalyst layers on silicon coated glass

KAUST Repository

Ball, Jeremy; Centeno, Anthony; Mendis, Budhika G.; Reehal, H. S.; Alford, Neil

2012-01-01

The optical characteristics of silicon nanowires grown on Si layers on glass have been modeled using the FDTD (Finite Difference Time Domain) technique and compared with experimental results. The wires were grown by the VLS (vapour-liquid-solid) method using Sn catalyst layers and exhibit a conical shape. The resulting measured and modeled absorption, reflectance and transmittance spectra have been investigated as a function of the thickness of the underlying Si layer and the initial catalyst layer, the latter having a strong influence on wire density. High levels of absorption (>90% in the visible wavelength range) and good agreement between the modeling and experiment have been observed when the nanowires have a relatively high density of ∼4 wires/μ m2. The experimental and modeled results diverge for samples with a lower density of wire growth. The results are discussed along with some implications for solar cell fabrication. © 2012 Optical Society of America.

Structure and field emission of graphene layers on top of silicon nanowire arrays

International Nuclear Information System (INIS)

Huang, Bohr-Ran; Chan, Hui-Wen; Jou, Shyankay; Chen, Guan-Yu; Kuo, Hsiu-An; Song, Wan-Jhen

2016-01-01

Graphical abstract: - Highlights: • We prepared graphene on top of silicon nanowires by transfer-print technique. • Graphene changed from discrete flakes to a continuous by repeated transfer-print. • The triple-layer graphene had high electron field emission due to large edge ratio. - Abstract: Monolayer graphene was grown on copper foils and then transferred on planar silicon substrates and on top of silicon nanowire (SiNW) arrays to form single- to quadruple-layer graphene films. The morphology, structure, and electron field emission (FE) of these graphene films were investigated. The graphene films on the planar silicon substrates were continuous. The single- to triple-layer graphene films on the SiNW arrays were discontinuous and while the quadruple-layer graphene film featured a mostly continuous area. The Raman spectra of the graphene films on the SiNW arrays showed G and G′ bands with a singular-Lorentzian shape together with a weak D band. The D band intensity decreased as the number of graphene layers increased. The FE efficiency of the graphene films on the planar silicon substrates and the SiNW arrays varied with the number of graphene layers. The turn-on field for the single- to quadruple-layer graphene films on planar silicon substrates were 4.3, 3.7, 3.5 and 3.4 V/μm, respectively. The turn-on field for the single- to quadruple-layer graphene films on SiNW arrays decreased to 3.9, 3.3, 3.0 and 3.3 V/μm, respectively. Correlation of the FE with structure and morphology of the graphene films is discussed.

Structure and field emission of graphene layers on top of silicon nanowire arrays

Energy Technology Data Exchange (ETDEWEB)

Huang, Bohr-Ran; Chan, Hui-Wen [Graduate Institute of Electro-Optical Engineering and Department of Electronic Engineering, National Taiwan University of Science and Technology, Taipei 106, Taiwan (China); Jou, Shyankay, E-mail: sjou@mail.ntust.edu.tw [Department of Materials Science and Engineering, National Taiwan University of Science and Technology, Taipei 106, Taiwan (China); Chen, Guan-Yu [Graduate Institute of Electro-Optical Engineering and Department of Electronic Engineering, National Taiwan University of Science and Technology, Taipei 106, Taiwan (China); Kuo, Hsiu-An; Song, Wan-Jhen [Department of Materials Science and Engineering, National Taiwan University of Science and Technology, Taipei 106, Taiwan (China)

2016-01-30

Graphical abstract: - Highlights: • We prepared graphene on top of silicon nanowires by transfer-print technique. • Graphene changed from discrete flakes to a continuous by repeated transfer-print. • The triple-layer graphene had high electron field emission due to large edge ratio. - Abstract: Monolayer graphene was grown on copper foils and then transferred on planar silicon substrates and on top of silicon nanowire (SiNW) arrays to form single- to quadruple-layer graphene films. The morphology, structure, and electron field emission (FE) of these graphene films were investigated. The graphene films on the planar silicon substrates were continuous. The single- to triple-layer graphene films on the SiNW arrays were discontinuous and while the quadruple-layer graphene film featured a mostly continuous area. The Raman spectra of the graphene films on the SiNW arrays showed G and G′ bands with a singular-Lorentzian shape together with a weak D band. The D band intensity decreased as the number of graphene layers increased. The FE efficiency of the graphene films on the planar silicon substrates and the SiNW arrays varied with the number of graphene layers. The turn-on field for the single- to quadruple-layer graphene films on planar silicon substrates were 4.3, 3.7, 3.5 and 3.4 V/μm, respectively. The turn-on field for the single- to quadruple-layer graphene films on SiNW arrays decreased to 3.9, 3.3, 3.0 and 3.3 V/μm, respectively. Correlation of the FE with structure and morphology of the graphene films is discussed.

Nonlinear Dynamics of Silicon Nanowire Resonator Considering Nonlocal Effect.

Science.gov (United States)

Jin, Leisheng; Li, Lijie

2017-12-01

In this work, nonlinear dynamics of silicon nanowire resonator considering nonlocal effect has been investigated. For the first time, dynamical parameters (e.g., resonant frequency, Duffing coefficient, and the damping ratio) that directly influence the nonlinear dynamics of the nanostructure have been derived. Subsequently, by calculating their response with the varied nonlocal coefficient, it is unveiled that the nonlocal effect makes more obvious impacts at the starting range (from zero to a small value), while the impact of nonlocal effect becomes weaker when the nonlocal term reaches to a certain threshold value. Furthermore, to characterize the role played by nonlocal effect in exerting influence on nonlinear behaviors such as bifurcation and chaos (typical phenomena in nonlinear dynamics of nanoscale devices), we have calculated the Lyapunov exponents and bifurcation diagram with and without nonlocal effect, and results shows the nonlocal effect causes the most significant effect as the device is at resonance. This work advances the development of nanowire resonators that are working beyond linear regime.

Optical waveform sampling and error-free demultiplexing of 1.28 Tbit/s serial data in a silicon nanowire

DEFF Research Database (Denmark)

Ji, Hua; Hu, Hao; Galili, Michael

2010-01-01

We experimentally demonstrate 640 Gbit/s and 1.28 Tbit/s serial data optical waveform sampling and 640-to-10 Gbit/s and 1.28 Tbit/s-to-10 Gbit/s error-free demultiplexing using four-wave mixing in a 300nm$$450nm$$5mm silicon nanowire.......We experimentally demonstrate 640 Gbit/s and 1.28 Tbit/s serial data optical waveform sampling and 640-to-10 Gbit/s and 1.28 Tbit/s-to-10 Gbit/s error-free demultiplexing using four-wave mixing in a 300nm$$450nm$$5mm silicon nanowire....

Synthesis of the cactus-like silicon nanowires/tungsten oxide nanowires composite for room-temperature NO{sub 2} gas sensor

Energy Technology Data Exchange (ETDEWEB)

Zhang, Weiyi, E-mail: zhangweiyi@tju.edu.cn [School of Electronic Information Engineering, Tianjin University, Tianjin, 300072 (China); Hu, Ming [School of Electronic Information Engineering, Tianjin University, Tianjin, 300072 (China); Key Laboratory for Advanced Ceramics and Machining Technology, Ministry of Education, School of Materials Science and Engineering, Tianjin University, Tianjin 300072 (China); Liu, Xing; Wei, Yulong; Li, Na [School of Electronic Information Engineering, Tianjin University, Tianjin, 300072 (China); Qin, Yuxiang, E-mail: qinyuxiang@tju.edu.cn [School of Electronic Information Engineering, Tianjin University, Tianjin, 300072 (China); Key Laboratory for Advanced Ceramics and Machining Technology, Ministry of Education, School of Materials Science and Engineering, Tianjin University, Tianjin 300072 (China)

2016-09-15

In the present work, the tungsten oxide (WO{sub 3}) nanowires functionalized silicon nanowires (SiNWs) with cactus-like structure has been successfully synthesized for room-temperature NO{sub 2} detection. The novel nanocomposite was fabricated by metal-assisted chemical etching (MACE) and thermal annealing of tungsten film. The WO{sub 3} nanowires were evenly distributed from the upper to the lower part of the SiNWs, indicating excellent uniformity which is conducive to adsorption and desorption of gas molecules. The gas-sensing properties have been examined by measuring the resistance change towards 0.25–5 ppm NO{sub 2} gas. At room temperature, which is the optimum working temperature, the SiNWs/WO{sub 3} nanowires composite showed two-times higher NO{sub 2} response than that of the bare SiNWs at 2 ppm NO{sub 2}. On the contrary, the responses of composite sensors to high concentrations of other reducing gases were very low, indicating excellent selectivity. Simultaneously, the composite sensors exhibited good sensing repeatability and stability. The enhancement in gas sensing properties may be attributed to the change in width of the space charge region, which is similar to the behavior of p-n junctions under forward bias, in the high-density p-n heterojunction structure formed between SiNWs and WO{sub 3} nanowires. - Highlights: • SiNWs/WO{sub 3} nanowires composite with cactus-like structure is synthesized. • The morphology of WO{sub 3} nanowires depends on the thermal annealing temperature. • The nanocomposite sensor exhibit better gas response than that of bare SiNWs. • The gas sensing mechanism is discussed using p-n heterojunction theory.

Silicide/Silicon Heterointerfaces, Reaction Kinetics and Ultra-short Channel Devices

Science.gov (United States)

Tang, Wei

Nickel silicide is one of the electrical contact materials widely used on very large scale integration (VLSI) of Si devices in microelectronic industry. This is because the silicide/silicon interface can be formed in a highly controlled manner to ensure reproducibility of optimal structural and electrical properties of the metal-Si contacts. These advantages can be inherited to Si nanowire (NW) field-effect transistors (FET) device. Due to the technological importance of nickel silicides, fundamental materials science of nickel silicides formation (Ni-Si reaction), especially in nanoscale, has raised wide interest and stimulate new insights and understandings. In this dissertation, in-situ transmission electron microscopy (TEM) in combination with FET device characterization will be demonstrated as useful tools in nano-device fabrication as well as in gaining insights into the process of nickel silicide formation. The shortest transistor channel length (17 nm) fabricated on a vapor-liquid-solid (VLS) grown silicon nanowire (NW) has been demonstrated by controlled reaction with Ni leads on an in-situ transmission electron microscope (TEM) heating stage at a moderate temperature of 400 ºC. NiSi2 is the leading phase, and the silicide-silicon interface is an atomically sharp type-A interface. At such channel lengths, high maximum on-currents of 890 (microA/microm) and a maximum transconductance of 430 (microS/microm) were obtained, which pushes forward the performance of bottom-up Si NW Schottky barrier field-effect transistors (SB-FETs). Through accurate control over the silicidation reaction, we provide a systematic study of channel length dependent carrier transport in a large number of SB-FETs with channel lengths in the range of (17 nm -- 3.6 microm). Our device results corroborate with our transport simulations and reveal a characteristic type of short channel effects in SB-FETs, both in on- and off-state, which is different from that in conventional MOSFETs

Hybrid nanocomposites based on conducting polymer and silicon nanowires for photovoltaic application

International Nuclear Information System (INIS)

Chehata, Nadia; Ltaief, Adnen; Ilahi, Bouraoui; Salem, Bassem; Bouazizi, Abdelaziz; Maaref, Hassen; Baron, Thierry

2014-01-01

Hybrid nanocomposites based on a nanoscale combination of organic and inorganic semiconductors are a promising way to enhance the performance of solar cells through a higher aspect ratio of the interface and the good processability of polymers. Nanocomposites are based on a heterojunction network between poly (2-methoxy-5-(2-ethyhexyl-oxy)-p-phenylenevinylene) (MEH-PPV) as an organic electron donor and silicon nanowires (SiNWs) as an inorganic electron acceptor. Nanowires (NWs) seem to be a promising material for this purpose, as they provide a large surface area for contact with the polymer and a designated conducting pathway whilst their volume is low. In this paper, silicon nanowires are introduced by mixing them into the polymer matrix. Hybrid nanocomposites films were deposited onto ITO substrate by spin coating method. Optical properties and photocurrent response were investigated. Charge transfer between the polymer and SiNWs has been demonstrated through photoluminescence measurements. The photocurrent density of ITO/MEH-PPV:SiNWs/Al structures have been obtained by J–V characteristics. The J sc value is about 0.39 µA/cm 2 . - Highlights: • SiNWs synthesis by Vapor–Liquid–Solid (VLS) mechanism. • SiNWs contribution to absorption spectra enhancement of MEH-PPV:SiNWs nanocomposites. • Decrease of PL intensity of MEH-PPV by addition of SiNWs. • Charge transfer process was taken place. • ITO/MEH-PPV:SiNWs/Al structure shows a photovoltaic effect, with a FF of 0.32

Optimal design of aperiodic, vertical silicon nanowire structures for photovoltaics.

Science.gov (United States)

Lin, Chenxi; Povinelli, Michelle L

2011-09-12

We design a partially aperiodic, vertically-aligned silicon nanowire array that maximizes photovoltaic absorption. The optimal structure is obtained using a random walk algorithm with transfer matrix method based electromagnetic forward solver. The optimal, aperiodic structure exhibits a 2.35 times enhancement in ultimate efficiency compared to its periodic counterpart. The spectral behavior mimics that of a periodic array with larger lattice constant. For our system, we find that randomly-selected, aperiodic structures invariably outperform the periodic array.

The influence of passivation and photovoltaic properties of α-Si:H coverage on silicon nanowire array solar cells

Science.gov (United States)

2013-01-01

Silicon nanowire (SiNW) arrays for radial p-n junction solar cells offer potential advantages of light trapping effects and quick charge collection. Nevertheless, lower open circuit voltages (Voc) lead to lower energy conversion efficiencies. In such cases, the performance of the solar cells depends critically on the quality of the SiNW interfaces. In this study, SiNW core-shell solar cells have been fabricated by growing crystalline silicon (c-Si) nanowires via the metal-assisted chemical etching method and by depositing hydrogenated amorphous silicon (α-Si:H) via the plasma-enhanced chemical vapor deposition (PECVD) method. The influence of deposition parameters on the coverage and, consequently, the passivation and photovoltaic properties of α-Si:H layers on SiNW solar cells have been analyzed. PMID:24059343

High-performance silicon nanowire bipolar phototransistors

Science.gov (United States)

Tan, Siew Li; Zhao, Xingyan; Chen, Kaixiang; Crozier, Kenneth B.; Dan, Yaping

2016-07-01

Silicon nanowires (SiNWs) have emerged as sensitive absorbing materials for photodetection at wavelengths ranging from ultraviolet (UV) to the near infrared. Most of the reports on SiNW photodetectors are based on photoconductor, photodiode, or field-effect transistor device structures. These SiNW devices each have their own advantages and trade-offs in optical gain, response time, operating voltage, and dark current noise. Here, we report on the experimental realization of single SiNW bipolar phototransistors on silicon-on-insulator substrates. Our SiNW devices are based on bipolar transistor structures with an optically injected base region and are fabricated using CMOS-compatible processes. The experimentally measured optoelectronic characteristics of the SiNW phototransistors are in good agreement with simulation results. The SiNW phototransistors exhibit significantly enhanced response to UV and visible light, compared with typical Si p-i-n photodiodes. The near infrared responsivities of the SiNW phototransistors are comparable to those of Si avalanche photodiodes but are achieved at much lower operating voltages. Compared with other reported SiNW photodetectors as well as conventional bulk Si photodiodes and phototransistors, the SiNW phototransistors in this work demonstrate the combined advantages of high gain, high photoresponse, low dark current, and low operating voltage.

Reduction of Cr(VI) to Cr(III) using silicon nanowire arrays under visible light irradiation

Energy Technology Data Exchange (ETDEWEB)

Fellahi, Ouarda [Institut d' Electronique, de Microélectronique et de Nanotechnologie (IEMN), UMR CNRS 8520, Avenue Poincaré—BP 70478, 59652 Villeneuve d' Ascq Cedex (France); Centre de Recherche en Technologie des Semi-conducteurs pour l' Energétique-CRTSE 02, Bd Frantz Fanon, BP. 140, Alger 7 Merveilles (Algeria); Barras, Alexandre [Institut d' Electronique, de Microélectronique et de Nanotechnologie (IEMN), UMR CNRS 8520, Avenue Poincaré—BP 70478, 59652 Villeneuve d' Ascq Cedex (France); Pan, Guo-Hui [State Key Laboratory of Luminescence and Applications, Changchun Institute of Optics, Fine Mechanics and Physics, Chinese Academy of Sciences, 3888 Dong Nanhu Road, Changchun 130033 (China); Coffinier, Yannick [Institut d' Electronique, de Microélectronique et de Nanotechnologie (IEMN), UMR CNRS 8520, Avenue Poincaré—BP 70478, 59652 Villeneuve d' Ascq Cedex (France); Hadjersi, Toufik [Centre de Recherche en Technologie des Semi-conducteurs pour l' Energétique-CRTSE 02, Bd Frantz Fanon, BP. 140, Alger 7 Merveilles (Algeria); Maamache, Mustapha [Laboratoire de Physique Quantique et Systèmes Dynamiques, Département de Physique, Université de Sétif, Sétif 19000 (Algeria); Szunerits, Sabine [Institut d' Electronique, de Microélectronique et de Nanotechnologie (IEMN), UMR CNRS 8520, Avenue Poincaré—BP 70478, 59652 Villeneuve d' Ascq Cedex (France); and others

2016-03-05

Highlights: • Cr(VI) reduction to Cr(III) using silicon nanowires decorated with Cu nanoparticles. • The reduction takes place at room temperature and neutral pH under visible light. • The photocatalytic reduction was enhanced by addition of adipic or citric acid. - Abstract: We report an efficient visible light-induced reduction of hexavalent chromium Cr(VI) to trivalent Cr(III) by direct illumination of an aqueous solution of potassium dichromate (K{sub 2}Cr{sub 2}O{sub 7}) in the presence of hydrogenated silicon nanowires (H-SiNWs) or silicon nanowires decorated with copper nanoparticles (Cu NPs-SiNWs) as photocatalyst. The SiNW arrays investigated in this study were prepared by chemical etching of crystalline silicon in HF/AgNO{sub 3} aqueous solution. The Cu NPs were deposited on SiNW arrays via electroless deposition technique. Visible light irradiation of an aqueous solution of K{sub 2}Cr{sub 2}O{sub 7} (10{sup −4} M) in presence of H-SiNWs showed that these substrates were not efficient for Cr(VI) reduction. The reduction efficiency achieved was less than 10% after 120 min irradiation at λ > 420 nm. Addition of organic acids such as citric or adipic acid in the solution accelerated Cr(VI) reduction in a concentration-dependent manner. Interestingly, Cu NPs-SiNWs was found to be a very efficient interface for the reduction of Cr(VI) to Cr(III) in absence of organic acids. Almost a full reduction of Cr(VI) was achieved by direct visible light irradiation for 140 min using this photocatalyst.

InGaN/GaN disk-in-nanowire white light emitting diodes on (001) silicon

KAUST Repository

Guo, Wei; Banerjee, Animesh; Bhattacharya, Pallab K.; Ooi, Boon S.

2011-01-01

High density (? 1011 cm-2) GaN nanowires and InGaN/GaN disk-in-nanowire heterostructures have been grown on (001) silicon substrates by plasma-assisted molecular beam epitaxy. The nanowires exhibit excellent uniformity in length and diameter and a broad emission is obtained by incorporating InGaN disks of varying composition along the length of the nanowires. Monolithic lighting emitting diodes were fabricated with appropriate n- and p-doping of contact layers. White light emission with chromaticity coordinates of x=0.29 and y=0.37 and a correlated color temperature of 5500-6500 K at an injection current of 50 A/ cm2 is measured. The measured external quantum efficiency of the devices do not exhibit any rollover (droop) up to an injection current density of 400 A/ cm2. © 2011 American Institute of Physics.

Carrier gas effects on aluminum-catalyzed nanowire growth

International Nuclear Information System (INIS)

Ke, Yue; Hainey, Mel Jr; Won, Dongjin; Weng, Xiaojun; Eichfeld, Sarah M; Redwing, Joan M

2016-01-01

Aluminum-catalyzed silicon nanowire growth under low-pressure chemical vapor deposition conditions requires higher reactor pressures than gold-catalyzed growth, but the reasons for this difference are not well understood. In this study, the effects of reactor pressure and hydrogen partial pressure on silicon nanowire growth using an aluminum catalyst were studied by growing nanowires in hydrogen and hydrogen/nitrogen carrier gas mixtures at different total reactor pressures. Nanowires grown in the nitrogen/hydrogen mixture have faceted catalyst droplet tips, minimal evidence of aluminum diffusion from the tip down the nanowire sidewalls, and significant vapor–solid deposition of silicon on the sidewalls. In comparison, wires grown in pure hydrogen show less well-defined tips, evidence of aluminum diffusion down the nanowire sidewalls at increasing reactor pressures and reduced vapor–solid deposition of silicon on the sidewalls. The results are explained in terms of a model wherein the hydrogen partial pressure plays a critical role in aluminum-catalyzed nanowire growth by controlling hydrogen termination of the silicon nanowire sidewalls. For a given reactor pressure, increased hydrogen partial pressures increase the extent of hydrogen termination of the sidewalls which suppresses SiH_4 adsorption thereby reducing vapor–solid deposition of silicon but increases the surface diffusion length of aluminum. Conversely, lower hydrogen partial pressures reduce the hydrogen termination and also increase the extent of SiH_4 gas phase decomposition, shifting the nanowire growth window to lower growth temperatures and silane partial pressures. (paper)

Catalytic growth of carbon nanowires on composite diamond/silicon substrates

Energy Technology Data Exchange (ETDEWEB)

Sellam, Amine [Université de Lorraine, Institut Jean Lamour, Département CP2S (UMR CNRS 7198), Parc de Saurupt, F-54042 Nancy Cedex (France); Miska, Patrice [Université de Lorraine, Institut Jean Lamour, Département P2M (UMR CNRS 7198), Parc de Saurupt, F-54042 Nancy Cedex (France); Ghanbaja, Jaafar [Université de Lorraine, Institut Jean Lamour, Département CP2S (UMR CNRS 7198), Parc de Saurupt, F-54042 Nancy Cedex (France); Barrat, Silvère, E-mail: Silvere.Barrat@ijl.nancy-universite.fr [Université de Lorraine, Institut Jean Lamour, Département CP2S (UMR CNRS 7198), Parc de Saurupt, F-54042 Nancy Cedex (France)

2014-01-01

Polycrystalline diamond (PCD) films and carbon nanowires (CNWs) provide individually highly attractive properties for science and technology applications. The possibility of carbon composite materials made from a combination of these materials remains a potential approach widely discussed in literature but modestly investigated. We report in this work an early attempt to explore this opportunity in the light of some specific experimental considerations. Carbon nanowires (CNWs) are grown at low temperature without the conventional use of external hydrocarbon vapor source on silicon substrates partially covered by a thin film of coalesced micrometric CVD diamond. Composite substrates constituted by PCD on silicon were first cleaned with H{sub 2} plasma then used for the PVD deposition of 5 nm Ni thin films. Then, samples were heat treated in a CVD reactor at 580 °C in the presence of pure H{sub 2} pressure of 60 hPa at different annealing times. Comparative effect of annealing time on the dewetting of Ni thin films and the subsequent CNWs growth process was considered in this work using systematic observations by SEM. Possible mechanisms underlying CNWs growth in pure H{sub 2} gas were proposed. The nature and structure of these CNWs have been investigated by TEM microscopy and by Raman spectroscopy on the sample showing the highest CNWs density.

The Development of High-Density Vertical Silicon Nanowires and Their Application in a Heterojunction Diode

Directory of Open Access Journals (Sweden)

Wen-Chung Chang

2016-06-01

Full Text Available Vertically aligned p-type silicon nanowire (SiNW arrays were fabricated through metal-assisted chemical etching (MACE of Si wafers. An indium tin oxide/indium zinc oxide/silicon nanowire (ITO/IZO/SiNW heterojunction diode was formed by depositing ITO and IZO thin films on the vertically aligned SiNW arrays. The structural and electrical properties of the resulting ITO/IZO/SiNW heterojunction diode were characterized by field emission scanning electron microscopy (FE-SEM, X-ray diffraction (XRD, and current−voltage (I−V measurements. Nonlinear and rectifying I−V properties confirmed that a heterojunction diode was successfully formed in the ITO/IZO/SiNW structure. The diode had a well-defined rectifying behavior, with a rectification ratio of 550.7 at 3 V and a turn-on voltage of 2.53 V under dark conditions.

A facile fluorescent sensor based on silicon nanowires for dithionite

Science.gov (United States)

Cao, Xingxing; Mu, Lixuan; Chen, Min; She, Guangwei

2018-05-01

A facile and novel fluorescent sensor for dithionite has been constructed by simultaneously immobilizing dansyl group (fluorescence molecule) and dabsyl group (quencher and recognizing group) on the silicon nanowires (SiNWs) and SiNW arrays surface. This sensor for dithionite exhibited high selectivity and a good relationship of linearity between fluorescence intensities and dithionite concentrations from 0.1 to 1 mM. This approach is straightforward and does not require complicated synthesis, which can be extended to develop other sensors with similar rationale.

A ZnO nanowire-based photo-inverter with pulse-induced fast recovery.

Science.gov (United States)

Raza, Syed Raza Ali; Lee, Young Tack; Hosseini Shokouh, Seyed Hossein; Ha, Ryong; Choi, Heon-Jin; Im, Seongil

2013-11-21

We demonstrate a fast response photo-inverter comprised of one transparent gated ZnO nanowire field-effect transistor (FET) and one opaque FET respectively as the driver and load. Under ultraviolet (UV) light the transfer curve of the transparent gate FET shifts to the negative side and so does the voltage transfer curve (VTC) of the inverter. After termination of UV exposure the recovery of photo-induced current takes a long time in general. This persistent photoconductivity (PPC) is due to hole trapping on the surface of ZnO NWs. Here, we used a positive voltage short pulse after UV exposure, for the first time resolving the PPC issue in nanowire-based photo-detectors by accumulating electrons at the ZnO/dielectric interface. We found that a pulse duration as small as 200 ns was sufficient to reach a full recovery to the dark state from the UV induced state, realizing a fast UV detector with a voltage output.

Dynamic Characterization and Impulse Response Modeling of Amplitude and Phase Response of Silicon Nanowires

DEFF Research Database (Denmark)

Cleary, Ciaran S.; Ji, Hua; Dailey, James M.

2013-01-01

Amplitude and phase dynamics of silicon nanowires were measured using time-resolved spectroscopy. Time shifts of the maximum phase change and minimum amplitude as a function of pump power due to saturation of the free-carrier density were observed. A phenomenological impulse response model used t...

Double-gated Si NW FET sensors: Low-frequency noise and photoelectric properties

International Nuclear Information System (INIS)

Gasparyan, F.; Khondkaryan, H.; Arakelyan, A.; Zadorozhnyi, I.; Pud, S.; Vitusevich, S.

2016-01-01

The transport, noise, and photosensitivity properties of an array of silicon nanowire (NW) p"+-p-p"+ field-effect transistors (FETs) are investigated. The peculiarities of photosensitivity and detectivity are analyzed over a wide spectrum range. The absorbance of p-Si NW shifts to the short wavelength region compared with bulk Si. The photocurrent and photosensitivity reach increased values in the UV range of the spectrum at 300 K. It is shown that sensitivity values can be tuned by the drain-source voltage and may reach record values of up to 2–4 A/W at a wavelength of 300 nm at room temperature. Low-frequency noise studies allow calculating the photodetectivity values, which increase with decreasing wavelength down to 300 nm. We show that the drain current of Si NW biochemical sensors substantially depends on pH value and the signal-to-noise ratio reaches the high value of 10"5. Increasing pH sensitivity with gate voltage is revealed for certain source-drain currents of pH-sensors based on Si NW FETs. The noise characteristic index decreases from 1.1 to 0.7 with the growth of the liquid gate voltage. Noise behavior is successfully explained in the framework of the correlated number-mobility unified fluctuation model. pH sensitivity increases as a result of the increase in liquid gate voltage, thus giving the opportunity to measure very low proton concentrations in the electrolyte medium at certain values of the liquid gate voltage.

A p-silicon nanowire/n-ZnO thin film heterojunction diode prepared by thermal evaporation

International Nuclear Information System (INIS)

Hazra, Purnima; Jit, S.

2014-01-01

This paper represents the electrical and optical characteristics of a SiNW/ZnO heterojunction diode and subsequent studies on the photodetection properties of the diode in the ultraviolet (UV) wavelength region. In this work, silicon nanowire arrays were prepared on p-type (100)-oriented Si substrate by an electroless metal deposition and etching method with the help of ultrasonication. After that, catalyst-free deposition of zinc oxide (ZnO) nanowires on a silicon nanowire (SiNW) array substrate was done by utilizing a simple and cost-effective thermal evaporation technique without using a buffer layer. The SEM and XRD techniques are used to show the quality of the as-grown ZnO nanowire film. The junction properties of the diode are evaluated by measuring current—voltage and capacitance—voltage characteristics. The diode has a well-defined rectifying behavior with a rectification ratio of 190 at ±2 V, turn-on voltage of 0.5 V, and barrier height is 0.727 eV at room temperature under dark conditions. The photodetection parameters of the diode are investigated in the bias voltage range of ±2 V. The diode shows responsivity of 0.8 A/W at a bias voltage of 2 V under UV illumination (wavelength = 365 nm). The characteristics of the device indicate that it can be used for UV detection applications in nano-optoelectronic and photonic devices. (semiconductor devices)

Impedance Analysis of Silicon Nanowire Lithium Ion Battery Anodes

KAUST Repository

Ruffo, Riccardo

2009-07-02

The impedance behavior of silicon nanowire electrodes has been investigated to understand the electrochemical process kinetics that influences the performance when used as a high-capacity anode in a lithium ion battery. The ac response was measured by using impedance spectroscopy in equilibrium conditions at different lithium compositions and during several cycles of charge and discharge in a half cell vs. metallic lithium. The impedance analysis shows the contribution of both surface resistance and solid state diffusion through the bulk of the nanowires. The surface process is dominated by a solid electrolyte layer (SEI) consisting of an inner, inorganic insoluble part and several organic compounds at the outer interface, as seen by XPS analysis. The surface resistivity, which seems to be correlated with the Coulombic efficiency of the electrode, grows at very high lithium contents due to an increase in the inorganic SEI thickness. We estimate the diffusion coefficient of about 2 × 10 -10 cm 2/s for lithium diffusion in silicon. A large increase in the electrode impedance was observed at very low lithium compositions, probably due to a different mechanism for lithium diffusion inside the wires. Restricting the discharge voltage to 0.7 V prevents this large impedance and improves the electrode lifetime. Cells cycled between 0.07 and 0.70 V vs. metallic lithium at a current density of 0.84 A/g (C/5) showed good Coulombic efficiency (about 99%) and maintained a capacity of about 2000 mAh/g after 80 cycles. © 2009 American Chemical Society.

A sub k{sub B}T/q semimetal nanowire field effect transistor

Energy Technology Data Exchange (ETDEWEB)

Ansari, L.; Fagas, G.; Gity, F.; Greer, J. C., E-mail: Jim.Greer@Tyndall.ie [Tyndall National Institute, Lee Maltings, Dyke Parade, Cork T12 R5CP (Ireland)

2016-08-08

The key challenge for nanoelectronics technologies is to identify the designs that work on molecular length scales, provide reduced power consumption relative to classical field effect transistors (FETs), and that can be readily integrated at low cost. To this end, a FET is introduced that relies on the quantum effects arising for semimetals patterned with critical dimensions below 5 nm, that intrinsically has lower power requirements due to its better than a “Boltzmann tyranny” limited subthreshold swing (SS) relative to classical field effect devices, eliminates the need to form heterojunctions, and mitigates against the requirement for abrupt doping profiles in the formation of nanowire tunnel FETs. This is achieved through using a nanowire comprised of a single semimetal material while providing the equivalent of a heterojunction structure based on shape engineering to avail of the quantum confinement induced semimetal-to-semiconductor transition. Ab initio calculations combined with a non-equilibrium Green's function formalism for charge transport reveals tunneling behavior in the OFF state and a resonant conduction mechanism for the ON state. A common limitation to tunnel FET (TFET) designs is related to a low current in the ON state. A discussion relating to the semimetal FET design to overcome this limitation while providing less than 60 meV/dec SS at room temperature is provided.

Silicon nanowires in polymer nanocomposites for photovoltaic hybrid thin films

International Nuclear Information System (INIS)

Ben Dkhil, S.; Bourguiga, R.; Davenas, J.; Cornu, D.

2012-01-01

Highlights: ► Hybrid solar cells based on blends of poly(N-vinylcarbazole) and silicon nanowires have been fabricated. ► We have investigated the charge transfer between PVK and SiNWs by the way of the quenching of the PVK photoluminescence. ► The relation between the morphology of the composite thin films and the charge transfer between SiNWs and PVK has been examined. ► We have investigated the effects of SiNWs concentration on the photovoltaic characteristics leading to the optimization of a critical SiNWs concentration. - Abstract: Hybrid thin films combining the high optical absorption of a semiconducting polymer film and the electronic properties of silicon fillers have been investigated in the perspective of the development of low cost solar cells. Bulk heterojunction photovoltaic materials based on blends of a semiconductor polymer poly(N-vinylcarbazole) (PVK) as electron donor and silicon nanowires (SiNWs) as electron acceptor have been studied. Composite PVK/SiNWs films were cast from a common solvent mixture. UV–visible spectrometry and photoluminescence of the composites have been studied as a function of the SiNWs concentration. Photoluminescence spectroscopy (PL) shows the existence of a critical SiNWs concentration of about 10 wt % for PL quenching corresponding to the most efficient charge pair separation. The photovoltaic (PV) effect has been studied under illumination. The optimum open-circuit voltage V oc and short-circuit current density J sc are obtained for 10 wt % SiNWs whereas a degradation of these parameters is observed at higher SiNWs concentrations. These results are correlated to the formation of aggregates in the composite leading to recombination of the photogenerated charge pairs competing with the dissociation mechanism.

Flexible and transparent silicon-on-polymer based sub-20 nm non-planar 3D FinFET for brain-architecture inspired computation

KAUST Repository

Sevilla, Galo T.; Rojas, Jhonathan Prieto; Fahad, Hossain M.; Hussain, Aftab M.; Ghanem, Rawan; Smith, Casey; Hussain, Muhammad Mustafa

2014-01-01

An industry standard 8′′ silicon-on-insulator wafer based ultra-thin (1 μm), ultra-light-weight, fully flexible and remarkably transparent state-of-the-art non-planar three dimensional (3D) FinFET is shown. Introduced by Intel Corporation in 2011 as the most advanced transistor architecture, it reveals sub-20 nm features and the highest performance ever reported for a flexible transistor. © 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Flexible and transparent silicon-on-polymer based sub-20 nm non-planar 3D FinFET for brain-architecture inspired computation

KAUST Repository

Sevilla, Galo T.

2014-02-22

An industry standard 8′′ silicon-on-insulator wafer based ultra-thin (1 μm), ultra-light-weight, fully flexible and remarkably transparent state-of-the-art non-planar three dimensional (3D) FinFET is shown. Introduced by Intel Corporation in 2011 as the most advanced transistor architecture, it reveals sub-20 nm features and the highest performance ever reported for a flexible transistor. © 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Electron transport in silicon nanowires having different cross-sections

Directory of Open Access Journals (Sweden)

Muscato Orazio

2016-06-01

Full Text Available Transport phenomena in silicon nanowires with different cross-section are investigated using an Extended Hydrodynamic model, coupled to the Schrödinger-Poisson system. The model has been formulated by closing the moment system derived from the Boltzmann equation on the basis of the maximum entropy principle of Extended Thermodynamics, obtaining explicit closure relations for the high-order fluxes and the production terms. Scattering of electrons with acoustic and non polar optical phonons have been taken into account. The bulk mobility is evaluated for square and equilateral triangle cross-sections of the wire.

Novel Size and Surface Oxide Effects in Silicon Nanowires as Lithium Battery Anodes

KAUST Repository

McDowell, Matthew T.

2011-09-14

With its high specific capacity, silicon is a promising anode material for high-energy lithium-ion batteries, but volume expansion and fracture during lithium reaction have prevented implementation. Si nanostructures have shown resistance to fracture during cycling, but the critical effects of nanostructure size and native surface oxide on volume expansion and cycling performance are not understood. Here, we use an ex situ transmission electron microscopy technique to observe the same Si nanowires before and after lithiation and have discovered the impacts of size and surface oxide on volume expansion. For nanowires with native SiO2, the surface oxide can suppress the volume expansion during lithiation for nanowires with diameters <∼50 nm. Finite element modeling shows that the oxide layer can induce compressive hydrostatic stress that could act to limit the extent of lithiation. The understanding developed herein of how volume expansion and extent of lithiation can depend on nanomaterial structure is important for the improvement of Si-based anodes. © 2011 American Chemical Society.

Tunable electronic properties of silicon nanowires under strain and electric bias

Directory of Open Access Journals (Sweden)

Alexis Nduwimana

2014-07-01

Full Text Available The electronic structure characteristics of silicon nanowires under strain and electric bias are studied using first-principles density functional theory. The unique wire-like structure leads to distinct spatial distribution of carriers, which can be tailored by applying tensile and compressive strains, as well as by an electric bias. Our results indicate that the combined effect of strain and electric bias leads to tunable electronic structures that can be used for piezo-electric devices.

Surface chemistry and morphology of the solid electrolyte interphase on silicon nanowire lithium-ion battery anodes

KAUST Repository

Chan, Candace K.; Ruffo, Riccardo; Hong, Seung Sae; Cui, Yi

2009-01-01

Silicon nanowires (SiNWs) have the potential to perform as anodes for lithium-ion batteries with a much higher energy density than graphite. However, there has been little work in understanding the surface chemistry of the solid electrolyte

Controlling growth density and patterning of single crystalline silicon nanowires

International Nuclear Information System (INIS)

Chang, Tung-Hao; Chang, Yu-Cheng; Liu, Fu-Ken; Chu, Tieh-Chi

2010-01-01

This study examines the usage of well-patterned Au nanoparticles (NPs) as a catalyst for one-dimensional growth of single crystalline Si nanowires (NWs) through the vapor-liquid-solid (VLS) mechanism. The study reports the fabrication of monolayer Au NPs through the self-assembly of Au NPs on a 3-aminopropyltrimethoxysilane (APTMS)-modified silicon substrate. Results indicate that the spin coating time of Au NPs plays a crucial role in determining the density of Au NPs on the surface of the silicon substrate and the later catalysis growth of Si NWs. The experiments in this study employed optical lithography to pattern Au NPs, treating them as a catalyst for Si NW growth. The patterned Si NW structures easily produced and controlled Si NW density. This approach may be useful for further studies on single crystalline Si NW-based nanodevices and their properties.

Origin of noise in liquid-gated Si nanowire troponin biosensors

Science.gov (United States)

Kutovyi, Y.; Zadorozhnyi, I.; Hlukhova, H.; Handziuk, V.; Petrychuk, M.; Ivanchuk, Andriy; Vitusevich, S.

2018-04-01

Liquid-gated Si nanowire field-effect transistor (FET) biosensors are fabricated using a complementary metal-oxide-semiconductor-compatible top-down approach. The transport and noise properties of the devices reflect the high performance of the FET structures, which allows label-free detection of cardiac troponin I (cTnI) molecules. Moreover, after removing the troponin antigens the structures demonstrate the same characteristics as before cTnI detection, indicating the reusable operation of biosensors. Our results show that the additional noise is related to the troponin molecules and has characteristics which considerably differ from those usually recorded for conventional FETs without target molecules. We describe the origin of the noise and suggest that noise spectroscopy represents a powerful tool for understanding molecular dynamic processes in nanoscale FET-based biosensors.

Blue electroluminescence nanodevice prototype based on vertical ZnO nanowire/polymer film on silicon substrate

International Nuclear Information System (INIS)

He Ying; Wang Junan; Chen Xiaoban; Zhang Wenfei; Zeng Xuyu; Gu Qiuwen

2010-01-01

We present a polymer-complexing soft template technique to construct the ZnO-nanowire/polymer light emitting device prototype that exhibits blue electrically driven emission with a relatively low-threshold voltage at room temperature in ambient atmosphere, and the ZnO-nanowire-based LED's emission wavelength is easily tuned by controlling the applied-excitation voltage. The nearly vertically aligned ZnO-nanowires with polymer film were used as emissive layers in the devices. The method uses polymer as binder in the LED device and dispersion medium in the luminescence layer, which stabilizes the quasi-arrays of ZnO nanowires embedding in a thin polymer film on silicon substrate and passivates the surface of ZnO nanocrystals, to prevent the quenching of luminescence. Additionally, the measurements of electrical properties showed that ZnO-nanowire/polymer film could significantly improve the conductivity of the film, which could be attributed to an increase in both Hall mobility and carrier concentration. The results indicated that the novel technique is a low-cost process for ZnO-based UV or blue light emission and reduces the requirement for achieving robust p-doping of ZnO film. It suggests that such ZnO-nanowire/polymer-based LEDs will be suitable for the electro-optical application.

Quantifying signal changes in nano-wire based biosensors

DEFF Research Database (Denmark)

De Vico, Luca; Sørensen, Martin Hedegård; Iversen, Lars

2011-01-01

In this work, we present a computational methodology for predicting the change in signal (conductance sensitivity) of a nano-BioFET sensor (a sensor based on a biomolecule binding another biomolecule attached to a nano-wire field effect transistor) upon binding its target molecule. The methodolog...

Effect of hydrofluoric acid concentration on the evolution of photoluminescence characteristics in porous silicon nanowires prepared by Ag-assisted electroless etching method

KAUST Repository

Najar, Adel; Anjum, Dalaver H.; Hedhili, Mohamed N.; Ng, Tien Khee; Ooi, Boon S.; Ben Slimane, Ahmed; Sougrat, Rachid

2012-01-01

We report on the structural and optical properties of porous silicon nanowires (PSiNWs) fabricated using silver (Ag) ions assisted electroless etching method. Silicon nanocrystallites with sizes <5 nm embedded in amorphous silica have been

Characteristics of AlN/GaN nanowire Bragg mirror grown on (001) silicon by molecular beam epitaxy

KAUST Repository

Heo, Junseok

2013-10-01

GaN nanowires containing AlN/GaN distributed Bragg reflector (DBR) heterostructures have been grown on (001) silicon substrate by molecular beam epitaxy. A peak reflectance of 70% with normal incidence at 560 nm is derived from angle resolved reflectance measurements on the as-grown nanowire DBR array. The measured peak reflectance wavelength is significantly blue-shifted from the ideal calculated value. The discrepancy is explained by investigating the reflectance of the nanoscale DBRs with a finite difference time domain technique. Ensemble nanowire microcavities with In0.3Ga 0.7N nanowires clad by AlN/GaN DBRs have also been characterized. Room temperature emission from the microcavity exhibits considerable linewidth narrowing compared to that measured for unclad In0.3Ga0.7N nanowires. The resonant emission is characterized by a peak wavelength and linewidth of 575 nm and 39 nm, respectively. © 2013 AIP Publishing LLC.

FinFET centric variability-aware compact model extraction and generation technology supporting DTCO

OpenAIRE

Wang, Xingsheng; Cheng, Binjie; Reid, David; Pender, Andrew; Asenov, Plamen; Millar, Campbell; Asenov, Asen

2015-01-01

In this paper, we present a FinFET-focused variability-aware compact model (CM) extraction and generation technology supporting design-technology co-optimization. The 14-nm CMOS technology generation silicon on insulator FinFETs are used as testbed transistors to illustrate our approach. The TCAD simulations include a long-range process-induced variability using a design of experiment approach and short-range purely statistical variability (mismatch). The CM extraction supports a hierarchical...

The fabrication of ZnO nanowire field-effect transistors combining dielectrophoresis and hot-pressing

International Nuclear Information System (INIS)

Chang, Y-K; Chau-N H, Franklin

2009-01-01

Zinc oxide nanowire field-effect transistors (NW-FETs) were fabricated combining the dielectrophoresis (DEP) and the hot-pressing methods. DEP was used to position both ends of the nanowires on top of the source and the drain electrodes, respectively. Hot-pressing of nanowires on the electrodes was then employed to ensure good contacts between the nanowires and the electrodes. The good device performance achieved with our method of fabrication indicates that DEP combined with hot-pressing has the potential to be applied to the fabrication of flexible electronics on a roll-to-roll basis.

pH measurements of FET-based (bio)chemical sensors using portable measurement system.

Science.gov (United States)

Voitsekhivska, T; Zorgiebel, F; Suthau, E; Wolter, K-J; Bock, K; Cuniberti, G

2015-01-01

In this study we demonstrate the sensing capabilities of a portable multiplex measurement system for FET-based (bio)chemical sensors with an integrated microfluidic interface. We therefore conducted pH measurements with Silicon Nanoribbon FET-based Sensors using different measurement procedures that are suitable for various applications. We have shown multiplexed measurements in aqueous medium for three different modes that are mutually specialized in fast data acquisition (constant drain current), calibration-less sensing (constant gate voltage) and in providing full information content (sweeping mode). Our system therefore allows surface charge sensing for a wide range of applications and is easily adaptable for multiplexed sensing with novel FET-based (bio)chemical sensors.

Quantum efficiency of InAs/InP nanowire heterostructures grown on silicon substrates

International Nuclear Information System (INIS)

Anufriev, Roman; Chauvin, Nicolas; Bru-Chevallier, Catherine; Khmissi, Hammadi; Naji, Khalid; Gendry, Michel; Patriarche, Gilles

2013-01-01

Photoluminescence (PL) quantum efficiency (QE) is experimentally investigated, using an integrating sphere, as a function of excitation power on both InAs/InP quantum rod nanowires (QRod-NWs) and radial quantum well nanowires (QWell-NWs) grown on silicon substrates. The measured values of the QE are compared with those of the planar analogues such as quantum dash and quantum well samples, and found to be comparable for the quantum well structures at relatively low power density. Further studies reveal that the values of QE of the QRod-NWs and QWell-NWs are limited by the low quality of the InP NW structure and the quality of radial quantum well, respectively. (copyright 2013 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim) (orig.)

Synthesis, characterization and application of electroless metal assisted silicon nanowire arrays

Energy Technology Data Exchange (ETDEWEB)

Sahoo, Sumanta Kumar [Centre for Nanoscience & Technology, Department of Mechanical Engineering, Mepco Schlenk Engineering College, Sivakasi 626 005, Tamilnadu (India); Marikani, Arumugam, E-mail: amari@mepcoeng.ac.in [Department of Physics, Mepco Schlenk Engineering College, Sivakasi 626 005, Tamilnadu (India)

2015-12-01

Highlights: • Preparation of Silicon nanowire arrays (SiNWs) by electroless metal deposition technique. • From analysis, it has been found that the as-prepared SiNWs are of 3.5–4.0 μm and 75 nm of length and diameter in average respectively. Further a characteristic Raman peak at 520 cm{sup −1} also has been observed. • It exhibits good electron field-emission properties with turn-on field (E{sub 0}) of about 8.26 V μm{sup −1} at current density (J) of 4.9 μA cm{sup −2}. • Functionalized SiNWs have been used for electrochemical detection bovine serum albumin protein bio-molecules. - Abstract: Vertically aligned silicon nanowire arrays (SiNWs) have been synthesized by electroless metal deposition process. The fabricated SiNWs have an average diameter of 75 nm and 3.5–4.0 μm length, as confirmed from scanning electron microscopy. A characteristic asymmetric peak broadening at 520 cm{sup −1} from Raman spectroscopy was obtained for the SiNWs as compared to the bulk silicon crystal due to phonon confinement. The as-prepared SiNWs exhibit good electron field-emission properties with turn-on field of about 8.26 V μm{sup −1} at a current density of 4.9 μA cm{sup −2}. The SiNWs was functionalized by coating with a thin gold metallic film for 60 s, and then used as bio-probe for the detection of bovine serum albumin (BSA) protein molecules. From the linear sweep voltammetry analysis, the Au coated SiNWs, exhibit linear response to the BSA analyte with increase in concentration. The minimum detection limit of the protein molecule was calculated of about 1.16 μM by the as-synthesized SiNWs probe.

Simulation study of a 3-D device integrating FinFET and UTBFET

KAUST Repository

Fahad, Hossain M.; Hu, Chenming; Hussain, Muhammad Mustafa

2015-01-01

By integrating 3-D nonplanar fins and 2-D ultrathin bodies, wavy FinFETs merge two formerly competing technologies on a silicon-on-insulator platform to deliver enhanced transistor performance compared with conventional trigate Fin

High-performance integrated field-effect transistor-based sensors

Energy Technology Data Exchange (ETDEWEB)

Adzhri, R., E-mail: adzhri@gmail.com [Institute of Nano Electronic Engineering (INEE), Universiti Malaysia Perlis (UniMAP), Kangar, Perlis (Malaysia); Md Arshad, M.K., E-mail: mohd.khairuddin@unimap.edu.my [Institute of Nano Electronic Engineering (INEE), Universiti Malaysia Perlis (UniMAP), Kangar, Perlis (Malaysia); School of Microelectronic Engineering (SoME), Universiti Malaysia Perlis (UniMAP), Kangar, Perlis (Malaysia); Gopinath, Subash C.B., E-mail: subash@unimap.edu.my [Institute of Nano Electronic Engineering (INEE), Universiti Malaysia Perlis (UniMAP), Kangar, Perlis (Malaysia); School of Bioprocess Engineering (SBE), Universiti Malaysia Perlis (UniMAP), Arau, Perlis (Malaysia); Ruslinda, A.R., E-mail: ruslinda@unimap.edu.my [Institute of Nano Electronic Engineering (INEE), Universiti Malaysia Perlis (UniMAP), Kangar, Perlis (Malaysia); Fathil, M.F.M., E-mail: faris.fathil@gmail.com [Institute of Nano Electronic Engineering (INEE), Universiti Malaysia Perlis (UniMAP), Kangar, Perlis (Malaysia); Ayub, R.M., E-mail: ramzan@unimap.edu.my [Institute of Nano Electronic Engineering (INEE), Universiti Malaysia Perlis (UniMAP), Kangar, Perlis (Malaysia); Nor, M. Nuzaihan Mohd, E-mail: m.nuzaihan@unimap.edu.my [Institute of Nano Electronic Engineering (INEE), Universiti Malaysia Perlis (UniMAP), Kangar, Perlis (Malaysia); Voon, C.H., E-mail: chvoon@unimap.edu.my [Institute of Nano Electronic Engineering (INEE), Universiti Malaysia Perlis (UniMAP), Kangar, Perlis (Malaysia)

2016-04-21

Field-effect transistors (FETs) have succeeded in modern electronics in an era of computers and hand-held applications. Currently, considerable attention has been paid to direct electrical measurements, which work by monitoring changes in intrinsic electrical properties. Further, FET-based sensing systems drastically reduce cost, are compatible with CMOS technology, and ease down-stream applications. Current technologies for sensing applications rely on time-consuming strategies and processes and can only be performed under recommended conditions. To overcome these obstacles, an overview is presented here in which we specifically focus on high-performance FET-based sensor integration with nano-sized materials, which requires understanding the interaction of surface materials with the surrounding environment. Therefore, we present strategies, material depositions, device structures and other characteristics involved in FET-based devices. Special attention was given to silicon and polyaniline nanowires and graphene, which have attracted much interest due to their remarkable properties in sensing applications. - Highlights: • Performance of FET-based biosensors for the detection of biomolecules is presented. • Silicon nanowire, polyaniline and graphene are the highlighted nanoscaled materials as sensing transducers. • The importance of surface material interaction with the surrounding environment is discussed. • Different device structure architectures for ease in fabrication and high sensitivity of sensing are presented.

High-performance integrated field-effect transistor-based sensors

International Nuclear Information System (INIS)

Adzhri, R.; Md Arshad, M.K.; Gopinath, Subash C.B.; Ruslinda, A.R.; Fathil, M.F.M.; Ayub, R.M.; Nor, M. Nuzaihan Mohd; Voon, C.H.

2016-01-01

Field-effect transistors (FETs) have succeeded in modern electronics in an era of computers and hand-held applications. Currently, considerable attention has been paid to direct electrical measurements, which work by monitoring changes in intrinsic electrical properties. Further, FET-based sensing systems drastically reduce cost, are compatible with CMOS technology, and ease down-stream applications. Current technologies for sensing applications rely on time-consuming strategies and processes and can only be performed under recommended conditions. To overcome these obstacles, an overview is presented here in which we specifically focus on high-performance FET-based sensor integration with nano-sized materials, which requires understanding the interaction of surface materials with the surrounding environment. Therefore, we present strategies, material depositions, device structures and other characteristics involved in FET-based devices. Special attention was given to silicon and polyaniline nanowires and graphene, which have attracted much interest due to their remarkable properties in sensing applications. - Highlights: • Performance of FET-based biosensors for the detection of biomolecules is presented. • Silicon nanowire, polyaniline and graphene are the highlighted nanoscaled materials as sensing transducers. • The importance of surface material interaction with the surrounding environment is discussed. • Different device structure architectures for ease in fabrication and high sensitivity of sensing are presented.

Fabrication of double-dot single-electron transistor in silicon nanowire

International Nuclear Information System (INIS)

Jo, Mingyu; Kaizawa, Takuya; Arita, Masashi; Fujiwara, Akira; Ono, Yukinori; Inokawa, Hiroshi; Choi, Jung-Bum; Takahashi, Yasuo

2010-01-01

We propose a simple method for fabricating Si single-electron transistors (SET) with coupled dots by means of a pattern-dependent-oxidation (PADOX) method. The PADOX method is known to convert a small one-dimensional Si wire formed on a silicon-on-insulator (SOI) substrate into a SET automatically. We fabricated a double-dot Si SET when we oxidized specially designed Si nanowires formed on SOI substrates. We analyzed the measured electrical characteristics by fitting the measurement and simulation results and confirmed the double-dot formation and the position of the two dots in the Si wire.

Effect of atomic layer deposition temperature on the performance of top-down ZnO nanowire transistors

Science.gov (United States)

2014-01-01

This paper studies the effect of atomic layer deposition (ALD) temperature on the performance of top-down ZnO nanowire transistors. Electrical characteristics are presented for 10-μm ZnO nanowire field-effect transistors (FETs) and for deposition temperatures in the range 120°C to 210°C. Well-behaved transistor output characteristics are obtained for all deposition temperatures. It is shown that the maximum field-effect mobility occurs for an ALD temperature of 190°C. This maximum field-effect mobility corresponds with a maximum Hall effect bulk mobility and with a ZnO film that is stoichiometric. The optimized transistors have a field-effect mobility of 10 cm2/V.s, which is approximately ten times higher than can typically be achieved in thin-film amorphous silicon transistors. Furthermore, simulations indicate that the drain current and field-effect mobility extraction are limited by the contact resistance. When the effects of contact resistance are de-embedded, a field-effect mobility of 129 cm2/V.s is obtained. This excellent result demonstrates the promise of top-down ZnO nanowire technology for a wide variety of applications such as high-performance thin-film electronics, flexible electronics, and biosensing. PMID:25276107

Graded index and randomly oriented core-shell silicon nanowires for broadband and wide angle antireflection

Directory of Open Access Journals (Sweden)

P. Pignalosa

2011-09-01

Full Text Available Antireflection with broadband and wide angle properties is important for a wide range of applications on photovoltaic cells and display. The SiOx shell layer provides a natural antireflection from air to the Si core absorption layer. In this work, we have demonstrated the random core-shell silicon nanowires with both broadband (from 400nm to 900nm and wide angle (from normal incidence to 60º antireflection characteristics within AM1.5 solar spectrum. The graded index structure from the randomly oriented core-shell (Air/SiOx/Si nanowires may provide a potential avenue to realize a broadband and wide angle antireflection layer.

Pattern formation of nanoflowers during the vapor-liquid-solid growth of silicon nanowires

International Nuclear Information System (INIS)

Bae, Joonho; Thompson-Flagg, Rebecca; Ekerdt, John G.; Shih, C.-K.

2008-01-01

Pattern formation of nanoflowers during the vapor-liquid-solid growth of Si nanowires is reported. Using transmission electron microscopy, scanning electron microscopy, and energy dispersive spectrometer analysis, we show that the flower consists of an Au/SiO x core-shell structure. Moreover, the growth of flower starts at the interface between the gold catalyst and the silicon nanowire, presumably by enhanced oxidation at this interface. The pattern formation can be classified as dense branching morphology (DBM). It is the first observation of DBM in a spherical geometry and at the nanoscale. The analysis of the average branching distance of this pattern shows that the pattern is most likely formed during the growth process, not the cooling process, and that the curvature of the gold droplet plays a crucial role in the frequency of branching

Prelithiated Silicon Nanowires as an Anode for Lithium Ion Batteries

KAUST Repository

Liu, Nian

2011-08-23

Silicon is one of the most promising anode materials for the next-generation high-energy lithium ion battery (LIB), while sulfur and some other lithium-free materials have recently shown high promise as cathode materials. To make a full battery out of them, either the cathode or the anode needs to be prelithiated. Here, we present a method for prelithiating a silicon nanowire (SiNW) anode by a facile self-discharge mechanism. Through a time dependence study, we found that 20 min of prelithiation loads ∼50% of the full capacity into the SiNWs. Scanning electron microscopy (SEM) and transmission electron microscopy (TEM) studies show that the nanostructure of SiNWs is maintained after prelithiation. We constructed a full battery using our prelithiated SiNW anode with a sulfur cathode. Our work provides a protocol for pairing lithium-free electrodes to make the next-generation high-energy LIB. © 2011 American Chemical Society.

Vertical group III-V nanowires on si, heterostructures, flexible arrays and fabrication

Science.gov (United States)

Wang, Deli; Soci, Cesare; Bao, Xinyu; Wei, Wei; Jing, Yi; Sun, Ke

2015-01-13

Embodiments of the invention provide a method for direct heteroepitaxial growth of vertical III-V semiconductor nanowires on a silicon substrate. The silicon substrate is etched to substantially completely remove native oxide. It is promptly placed in a reaction chamber. The substrate is heated and maintained at a growth temperature. Group III-V precursors are flowed for a growth time. Preferred embodiment vertical Group III-V nanowires on silicon have a core-shell structure, which provides a radial homojunction or heterojunction. A doped nanowire core is surrounded by a shell with complementary doping. Such can provide high optical absorption due to the long optical path in the axial direction of the vertical nanowires, while reducing considerably the distance over which carriers must diffuse before being collected in the radial direction. Alloy composition can also be varied. Radial and axial homojunctions and heterojunctions can be realized. Embodiments provide for flexible Group III-V nanowire structures. An array of Group III-V nanowire structures is embedded in polymer. A fabrication method forms the vertical nanowires on a substrate, e.g., a silicon substrate. Preferably, the nanowires are formed by the preferred methods for fabrication of Group III-V nanowires on silicon. Devices can be formed with core/shell and core/multi-shell nanowires and the devices are released from the substrate upon which the nanowires were formed to create a flexible structure that includes an array of vertical nanowires embedded in polymer.

Excitation of nanowire surface plasmons by silicon vacancy centers in nanodiamonds

DEFF Research Database (Denmark)

Kumar, Shailesh; Davydov, Valery A.; Agafonov, Viatcheslav N.

2017-01-01

Silicon vacancy (SiV) centers in diamonds have emerged as a very promising candidate for quantum emitters due to their narrow emission line resulting in their indistinguishability. While many different quantum emitters have already been used for the excitation of various propagating plasmonic modes......, the corresponding exploitation of SiV centers has remained so far uncharted territory. Here, we report on the excitation of surface plasmon modes supported by silver nanowires using SiV centers in nanodiamonds. The coupling of SiV center fluorescence to surface plasmons is observed, when a nanodiamond situated...

Architecture design of resistor/FET-logic demultiplexer for hybrid CMOS/nanodevice circuit interconnect

Energy Technology Data Exchange (ETDEWEB)

Li Shu; Zhang Tong [Department of Electrical, Computer and Systems Engineering, Rensselaer Polytechnic Institute, Troy, NY 12180 (United States)], E-mail: lis4@rpi.edu, E-mail: tzhang@ecse.rpi.edu

2008-05-07

Hybrid nanoelectronics consisting of nanodevice crossbars on top of CMOS backplane circuits is emerging as one viable option to sustain Moore's law after the CMOS scaling limit is reached. One main design challenge in such hybrid nanoelectronics is the interface between the highly dense nanowires in nanodevice crossbars and relatively coarse microwires in the CMOS domain. Such an interface can be realized through a logic circuit called a demultiplexer (demux). In this context, all the prior work on demux design uses a single type of device, such as resistor, diode or field effect transistor (FET), to realize the demultiplexing function. However, different types of devices have their own advantages and disadvantages in terms of functionality, manufacturability, speed and power consumption. This makes none of them provide a satisfactory solution. To tackle this challenge, this work proposes to combine resistor with FET to implement the demux, leading to the hybrid resistor/FET-logic demux. Such hybrid demux architecture can make these two types of devices complement each other well to improve the overall demux design effectiveness. Furthermore, due to the inevitable fabrication process variations at the nanoscale, the effects of resistor conductance and FET threshold voltage variability are analyzed and evaluated based on computer simulations. The simulation results provide the requirement on the fabrication process to ensure a high demux reliability, and promise the hybrid resistor/FET-logic demux an improved addressability and process variance tolerance.

Architecture design of resistor/FET-logic demultiplexer for hybrid CMOS/nanodevice circuit interconnect.

Science.gov (United States)

Li, Shu; Zhang, Tong

2008-05-07

Hybrid nanoelectronics consisting of nanodevice crossbars on top of CMOS backplane circuits is emerging as one viable option to sustain Moore's law after the CMOS scaling limit is reached. One main design challenge in such hybrid nanoelectronics is the interface between the highly dense nanowires in nanodevice crossbars and relatively coarse microwires in the CMOS domain. Such an interface can be realized through a logic circuit called a demultiplexer (demux). In this context, all the prior work on demux design uses a single type of device, such as resistor, diode or field effect transistor (FET), to realize the demultiplexing function. However, different types of devices have their own advantages and disadvantages in terms of functionality, manufacturability, speed and power consumption. This makes none of them provide a satisfactory solution. To tackle this challenge, this work proposes to combine resistor with FET to implement the demux, leading to the hybrid resistor/FET-logic demux. Such hybrid demux architecture can make these two types of devices complement each other well to improve the overall demux design effectiveness. Furthermore, due to the inevitable fabrication process variations at the nanoscale, the effects of resistor conductance and FET threshold voltage variability are analyzed and evaluated based on computer simulations. The simulation results provide the requirement on the fabrication process to ensure a high demux reliability, and promise the hybrid resistor/FET-logic demux an improved addressability and process variance tolerance.

Architecture design of resistor/FET-logic demultiplexer for hybrid CMOS/nanodevice circuit interconnect

International Nuclear Information System (INIS)

Li Shu; Zhang Tong

2008-01-01

Hybrid nanoelectronics consisting of nanodevice crossbars on top of CMOS backplane circuits is emerging as one viable option to sustain Moore's law after the CMOS scaling limit is reached. One main design challenge in such hybrid nanoelectronics is the interface between the highly dense nanowires in nanodevice crossbars and relatively coarse microwires in the CMOS domain. Such an interface can be realized through a logic circuit called a demultiplexer (demux). In this context, all the prior work on demux design uses a single type of device, such as resistor, diode or field effect transistor (FET), to realize the demultiplexing function. However, different types of devices have their own advantages and disadvantages in terms of functionality, manufacturability, speed and power consumption. This makes none of them provide a satisfactory solution. To tackle this challenge, this work proposes to combine resistor with FET to implement the demux, leading to the hybrid resistor/FET-logic demux. Such hybrid demux architecture can make these two types of devices complement each other well to improve the overall demux design effectiveness. Furthermore, due to the inevitable fabrication process variations at the nanoscale, the effects of resistor conductance and FET threshold voltage variability are analyzed and evaluated based on computer simulations. The simulation results provide the requirement on the fabrication process to ensure a high demux reliability, and promise the hybrid resistor/FET-logic demux an improved addressability and process variance tolerance

An eight channel low-noise CMOS readout circuit for silicon detectors with on-chip front-end FET

International Nuclear Information System (INIS)

Fiorini, C.; Porro, M.

2006-01-01

We propose a CMOS readout circuit for the processing of signals from multi-channel silicon detectors to be used in X-ray spectroscopy and γ-ray imaging applications. The circuit is composed by eight channels, each one featuring a low-noise preamplifier, a 6th-order semigaussian shaping amplifier with four selectable peaking times, from 1.8 up to 6 μs, a peak stretcher and a discriminator. The circuit is conceived to be used with silicon detectors with a front-end FET integrated on the detector chips itself, like silicon drift detectors with JFET and pixel detectors with DEPMOS. The integrated time constants used for the shaping are implemented by means of an RC-cell, based on the technique of demagnification of the current flowing in a resistor R by means of the use of current mirrors. The eight analog channels of the chip are multiplexed to a single analog output. A suitable digital section provides self-resetting of each channel and trigger output and is able to set independent thresholds on the analog channels by means of a programmable serial register and 3-bit DACs. The circuit has been realized in the 0.35 μm CMOS AMS technology. In this work, the main features of the circuit are presented along with the experimental results of its characterization

Relaxing the electrostatic screening effect by patterning vertically-aligned silicon nanowire arrays into bundles for field emission application

Energy Technology Data Exchange (ETDEWEB)

Hung, Yung-Jr, E-mail: yungjrhung@gmail.com [Department of Electronic Engineering, National Taiwan University of Science and Technology, No. 43, Sec. 4, Keelung Rd., Taipei 106, Taiwan, ROC (China); Department of Photonics, National Sun Yat-sen University, No. 70, Lienhai Rd., Kaohsiung 80424, Taiwan, ROC (China); Graduate Institute of Electro-Optical Engineering, National Taiwan University of Science and Technology, No. 43, Sec. 4, Keelung Rd., Taipei 106, Taiwan, ROC (China); Lee, San-Liang [Department of Electronic Engineering, National Taiwan University of Science and Technology, No. 43, Sec. 4, Keelung Rd., Taipei 106, Taiwan, ROC (China); Graduate Institute of Electro-Optical Engineering, National Taiwan University of Science and Technology, No. 43, Sec. 4, Keelung Rd., Taipei 106, Taiwan, ROC (China); Beng, Looi Choon [Faculty of Engineering, Multimedia University, Jalan Multimedia, 63100 Cyberjaya, Selangor (Malaysia); Chang, Hsuan-Chen [Department of Electronic Engineering, National Taiwan University of Science and Technology, No. 43, Sec. 4, Keelung Rd., Taipei 106, Taiwan, ROC (China); Graduate Institute of Electro-Optical Engineering, National Taiwan University of Science and Technology, No. 43, Sec. 4, Keelung Rd., Taipei 106, Taiwan, ROC (China); Huang, Yung-Jui [Graduate Institute of Electro-Optical Engineering, National Taiwan University of Science and Technology, No. 43, Sec. 4, Keelung Rd., Taipei 106, Taiwan, ROC (China); Lee, Kuei-Yi; Huang, Ying-Sheng [Department of Electronic Engineering, National Taiwan University of Science and Technology, No. 43, Sec. 4, Keelung Rd., Taipei 106, Taiwan, ROC (China); Graduate Institute of Electro-Optical Engineering, National Taiwan University of Science and Technology, No. 43, Sec. 4, Keelung Rd., Taipei 106, Taiwan, ROC (China)

2014-04-01

Top-down fabrication strategies are proposed and demonstrated to realize arrays of vertically-aligned silicon nanowire bundles and bundle arrays of carbon nanotube–silicon nanowire (CNT–SiNW) heterojunctions, aiming for releasing the electrostatic screening effect and improving the field emission characteristics. The trade-off between the reduction in the electrostatic screening effect and the decrease of emission sites leads to an optimal SiNW bundle arrangement which enables the lowest turn-on electric field of 1.4 V/μm and highest emission current density of 191 μA/cm{sup 2} among all testing SiNW samples. Benefiting from the superior thermal and electrical properties of CNTs and the flexible patterning technologies available for SiNWs, bundle arrays of CNT–SiNW heterojunctions show improved and highly-uniform field emission with a lower turn-on electric field of 0.9 V/μm and higher emission current density of 5.86 mA/cm{sup 2}. The application of these materials and their corresponding fabrication approaches is not limited to the field emission but can be used for a variety of emerging fields like nanoelectronics, lithium-ion batteries, and solar cells. - Highlights: • Aligned silicon nanowire (SiNW) bundle arrays are realized with top-down methods. • Growing carbon nanotubes atop SiNW bundle arrays enable uniform field emission. • A turn-on field of 0.9 V/μm and an emission current of > 5 mA/cm{sup 2} are achieved.

Optical biosensor based on a silicon nanowire ridge waveguide for lab on chip applications

International Nuclear Information System (INIS)

Gamal, Rania; Ismail, Yehea; Swillam, Mohamed A

2015-01-01

We propose a novel sensor using a silicon nanowire ridge waveguide (SNRW). This waveguide is comprised of an array of silicon nanowires on an insulator substrate that has the envelope of a ridge waveguide. The SNRW inherently maximizes the overlap between the material-under-test and the incident light wave by introducing voids to the otherwise bulk structure. When a sensing sample is injected, the voids within the SNRW adopt the refractive index of the material-under-test. Hence, the strong contribution of the material-under-test to the overall modal effective index will greatly augment the sensitivity. Additionally, the ridge structure provides a fabrication convenience as it covers the entire substrate, ensuring that the etching process would not damage the substrate. Finite-difference time-domain simulations are conducted and showed that the percentage change in the effective index due to a 1% change in the surrounding environment is more than 170 times the change perceived in an evanescent-detection based bulk silicon ridge waveguide. Moreover, the SNRW proves to be more sensitive than recent other, non-evanescent sensors. In addition, the detection limit for this structure was revealed to be as small as 10 −8 . A compact bimodal waveguide based on SNRW is designed and tested. It delivers high sensitivity values that offer comparable performance to similar low-index light-guiding sensing configurations; however, our proposed structure has much smaller footprints and allows high dense integration for lab-on-chip applications. (paper)

Comparison of Light Trapping in Silicon Nanowire and Surface Textured Thin-Film Solar Cells

Directory of Open Access Journals (Sweden)

Rion Parsons

2017-04-01

Full Text Available The optics of axial silicon nanowire solar cells is investigated and compared to silicon thin-film solar cells with textured contact layers. The quantum efficiency and short circuit current density are calculated taking a device geometry into account, which can be fabricated by using standard semiconductor processing. The solar cells with textured absorber and textured contact layers provide a gain of short circuit current density of 4.4 mA/cm2 and 6.1 mA/cm2 compared to a solar cell on a flat substrate, respectively. The influence of the device dimensions on the quantum efficiency and short circuit current density will be discussed.

FinFET memory cell improvements for higher immunity against single event upsets

Science.gov (United States)

Sajit, Ahmed Sattar

The 21st century is witnessing a tremendous demand for transistors. Life amenities have incorporated the transistor in every aspect of daily life, ranging from toys to rocket science. Day by day, scaling down the transistor is becoming an imperious necessity. However, it is not a straightforward process; instead, it faces overwhelming challenges. Due to these scaling changes, new technologies, such as FinFETs for example, have emerged as alternatives to the conventional bulk-CMOS technology. FinFET has more control over the channel, therefore, leakage current is reduced. FinFET could bridge the gap between silicon devices and non-silicon devices. The semiconductor industry is now incorporating FinFETs in systems and subsystems. For example, Intel has been using them in their newest processors, delivering potential saving powers and increased speeds to memory circuits. Memory sub-systems are considered a vital component in the digital era. In memory, few rows are read or written at a time, while the most rows are static; hence, reducing leakage current increases the performance. However, as a transistor shrinks, it becomes more vulnerable to the effects from radioactive particle strikes. If a particle hits a node in a memory cell, the content might flip; consequently, leading to corrupting stored data. Critical fields, such as medical and aerospace, where there are no second chances and cannot even afford to operate at 99.99% accuracy, has induced me to find a rigid circuit in a radiated working environment. This research focuses on a wide spectrum of memories such as 6T SRAM, 8T SRAM, and DICE memory cells using FinFET technology and finding the best platform in terms of Read and Write delay, susceptibility level of SNM, RSNM, leakage current, energy consumption, and Single Event Upsets (SEUs). This research has shown that the SEU tolerance that 6T and 8T FinFET SRAMs provide may not be acceptable in medical and aerospace applications where there is a very high

Nanoelectronics-biology frontier: From nanoscopic probes for action potential recording in live cells to three-dimensional cyborg tissues.

Science.gov (United States)

Duan, Xiaojie; Fu, Tian-Ming; Liu, Jia; Lieber, Charles M

2013-08-01

Semiconductor nanowires configured as the active channels of field-effect transistors (FETs) have been used as detectors for high-resolution electrical recording from single live cells, cell networks, tissues and organs. Extracellular measurements with substrate supported silicon nanowire (SiNW) FETs, which have projected active areas orders of magnitude smaller than conventional microfabricated multielectrode arrays (MEAs) and planar FETs, recorded action potential and field potential signals with high signal-to-noise ratio and temporal resolution from cultured neurons, cultured cardiomyocytes, acute brain slices and whole animal hearts. Measurements made with modulation-doped nanoscale active channel SiNW FETs demonstrate that signals recorded from cardiomyocytes are highly localized and have improved time resolution compared to larger planar detectors. In addition, several novel three-dimensional (3D) transistor probes, which were realized using advanced nanowire synthesis methods, have been implemented for intracellular recording. These novel probes include (i) flexible 3D kinked nanowire FETs, (ii) branched intracellular nanotube SiNW FETs, and (iii) active silicon nanotube FETs. Following phospholipid modification of the probes to mimic the cell membrane, the kinked nanowire, branched intracellular nanotube and active silicon nanotube FET probes recorded full-amplitude intracellular action potentials from spontaneously firing cardiomyocytes. Moreover, these probes demonstrated the capability of reversible, stable, and long-term intracellular recording, thus indicating the minimal invasiveness of the new nanoscale structures and suggesting biomimetic internalization via the phospholipid modification. Simultaneous, multi-site intracellular recording from both single cells and cell networks were also readily achieved by interfacing independently addressable nanoprobe devices with cells. Finally, electronic and biological systems have been seamlessly merged in 3D

Influence of surface charge on the transport characteristics of nanowire-field effect transistors in liquid environments

Energy Technology Data Exchange (ETDEWEB)

Nozaki, Daijiro, E-mail: daijiro.nozaki@gmail.com, E-mail: research@nano.tu-dresden.de [Institute for Materials Science and Max Bergmann Center of Biomaterials, TU Dresden, 01062 Dresden (Germany); Kunstmann, Jens [Institute for Materials Science and Max Bergmann Center of Biomaterials, TU Dresden, 01062 Dresden (Germany); Theoretical Chemistry, Department of Chemistry and Food Chemistry, TU Dresden, 01062 Dresden (Germany); Zörgiebel, Felix [Institute for Materials Science and Max Bergmann Center of Biomaterials, TU Dresden, 01062 Dresden (Germany); Center for Advancing Electronics Dresden (cfAED), TU Dresden, 01062 Dresden (Germany); Cuniberti, Gianaurelio [Institute for Materials Science and Max Bergmann Center of Biomaterials, TU Dresden, 01062 Dresden (Germany); Center for Advancing Electronics Dresden (cfAED), TU Dresden, 01062 Dresden (Germany); Dresden Center for Computational Materials Science (DCCMS), TU Dresden, 01062 Dresden (Germany)

2015-05-18

One dimensional nanowire field effect transistors (NW-FETs) are a promising platform for sensor applications. The transport characteristics of NW-FETs are strongly modified in liquid environment due to the charging of surface functional groups accompanied with protonation or deprotonation. In order to investigate the influence of surface charges and ionic concentrations on the transport characteristics of Schottky-barrier NW-FETs, we have combined the modified Poisson-Boltzmann theory with the Landauer-Büttiker transport formalism. For a typical device, the model is able to capture the reduction of the sensitivity of NW-FETs in ionic solutions due to the screening from counter ions as well as a local gating from surface functional groups. Our approach allows to model, to investigate, and to optimize realistic Schottky-barrier NW-FET devices in liquid environment.

Analytical Model of Subthreshold Drain Current Characteristics of Ballistic Silicon Nanowire Transistors

Directory of Open Access Journals (Sweden)

Wanjie Xu

2015-01-01

Full Text Available A physically based subthreshold current model for silicon nanowire transistors working in the ballistic regime is developed. Based on the electric potential distribution obtained from a 2D Poisson equation and by performing some perturbation approximations for subband energy levels, an analytical model for the subthreshold drain current is obtained. The model is further used for predicting the subthreshold slopes and threshold voltages of the transistors. Our results agree well with TCAD simulation with different geometries and under different biasing conditions.

Carrier dynamics in silicon nanowires studied using optical-pump terahertz-probe spectroscopy

Science.gov (United States)

Beaudoin, Alexandre; Salem, Bassem; Baron, Thierry; Gentile, Pascal; Morris, Denis

2014-03-01

The advance of non-contact measurements involving pulsed terahertz radiation presents great interests for characterizing electrical properties of a large ensemble of nanowires. In this work, N-doped and undoped silicon nanowires (SiNWs) grown by chemical vapour deposition (CVD) on quartz substrate were characterized using optical-pump terahertz probe (OPTP) transmission experiments. Our results show that defects and ionized impurities introduced by N-doping the CVD-grown SiNWs tend to reduce the photoexcited carrier lifetime and degrade their conductivity properties. Capture mechanisms by the surface trap states play a key role on the photocarrier dynamics in theses small diameters' (~100 nm) SiNWs and the doping level is found to alter this dynamics. We propose convincing capture and recombination scenarios that explain our OPTP measurements. Fits of our photoconductivity data curves, from 0.5 to 2 THz, using a Drude-plasmon conductivity model allow determining photocarrier mobility values of 190 and 70 cm2/V .s, for the undoped and N-doped NWs samples, respectively.

Horizontal silicon nanowires for surface-enhanced Raman spectroscopy

Science.gov (United States)

Gebavi, Hrvoje; Ristić, Davor; Baran, Nikola; Mikac, Lara; Mohaček-Grošev, Vlasta; Gotić, Marijan; Šikić, Mile; Ivanda, Mile

2018-01-01

The main purpose of this paper is to focus on details of the fabrication process of horizontally and vertically oriented silicon nanowires (SiNWs) substrates for the application of surface-enhanced Raman spectroscopy (SERS). The fabrication process is based on the vapor-liquid-solid method and electroless-assisted chemical etching, which, as the major benefit, resulting in the development of economical, easy-to-prepare SERS substrates. Furthermore, we examined the fabrication of Au coated Ag nanoparticles (NPs) on the SiNWs substrates in such a way as to diminish the influence of silver NPs corrosion, which, in turn, enhanced the SERS time stability, thus allowing for wider commercial applications. The substances on which high SERS sensitivity was proved are rhodamine (R6G) and 4-mercaptobenzoic acid (MBA), with the detection limits of 10-8 M and 10-6 M, respectively.

G(sup 4)FET Implementations of Some Logic Circuits

Science.gov (United States)

Mojarradi, Mohammad; Akarvardar, Kerem; Cristoleveanu, Sorin; Gentil, Paul; Blalock, Benjamin; Chen, Suhan

2009-01-01

Some logic circuits have been built and demonstrated to work substantially as intended, all as part of a continuing effort to exploit the high degrees of design flexibility and functionality of the electronic devices known as G(sup 4)FETs and described below. These logic circuits are intended to serve as prototypes of more complex advanced programmable-logicdevice-type integrated circuits, including field-programmable gate arrays (FPGAs). In comparison with prior FPGAs, these advanced FPGAs could be much more efficient because the functionality of G(sup 4)FETs is such that fewer discrete components are needed to perform a given logic function in G(sup 4)FET circuitry than are needed perform the same logic function in conventional transistor-based circuitry. The underlying concept of using G(sup 4)FETs as building blocks of programmable logic circuitry was also described, from a different perspective, in G(sup 4)FETs as Universal and Programmable Logic Gates (NPO-41698), NASA Tech Briefs, Vol. 31, No. 7 (July 2007), page 44. A G(sup 4)FET can be characterized as an accumulation-mode silicon-on-insulator (SOI) metal oxide/semiconductor field-effect transistor (MOSFET) featuring two junction field-effect transistor (JFET) gates. The structure of a G(sup 4)FET (see Figure 1) is the same as that of a p-channel inversion-mode SOI MOSFET with two body contacts on each side of the channel. The top gate (G1), the substrate emulating a back gate (G2), and the junction gates (JG1 and JG2) can be biased independently of each other and, hence, each can be used to independently control some aspects of the conduction characteristics of the transistor. The independence of the actions of the four gates is what affords the enhanced functionality and design flexibility of G(sup 4)FETs. The present G(sup 4)FET logic circuits include an adjustable-threshold inverter, a real-time-reconfigurable logic gate, and a dynamic random-access memory (DRAM) cell (see Figure 2). The configuration

Effective mass approximation versus full atomistic model to calculate the output characteristics of a gate-all-around germanium nanowire field effect transistor (GAA-GeNW-FET)

Science.gov (United States)

Bayani, Amir Hossein; Voves, Jan; Dideban, Daryoosh

2018-01-01

Here, we compare the output characteristics of a gate-all-around germanium nanowire field effect transistor (GAA-GeNW-FET) with 2.36 nm2 square cross-section area using tight-binding (TB) sp3d5s∗ model (full atomistic model (FAM)) and effective mass approximation (EMA). Synopsys/QuantumWise Atomistix ToolKit (ATK) and Silvaco Atlas3D are used to consider the TB model and EMA, respectively. Results show that EMA predicted only one quantum state (QS) for quantum transport, whereas FAM predicted three QSs. A cosine function behavior is obtained by both methods for the first quantum state. The calculated bandgap value by EMA is almost twice smaller than that of the FAM. Also, a fluctuating current is predicted by both methods but in different oscillation values.

Rare earth silicide nanowires on silicon surfaces

International Nuclear Information System (INIS)

Wanke, Martina

2008-01-01

The growth, structure and electronic properties of rare earth silicide nanowires are investigated on planar and vicinal Si(001) und Si(111) surfaces with scanning tunneling microscopy (STM), low energy electron diffraction (LEED) and angle-resolved photoelectron spectroscopy (ARPES). On all surfaces investigated within this work hexagonal disilicides are grown epitaxially with a lattice mismatch of -2.55% up to +0.83% along the hexagonal a-axis. Along the hexagonal c-axis the lattice mismatch is essentially larger with 6.5%. On the Si(001)2 x 1 surface two types of nanowires are grown epitaxially. The socalled broad wires show a one-dimensional metallic valence band structure with states crossing the Fermi level. Along the nanowires two strongly dispersing states at the anti J point and a strongly dispersing state at the anti Γ point can be observed. Along the thin nanowires dispersing states could not be observed. Merely in the direction perpendicular to the wires an intensity variation could be observed, which corresponds to the observed spacial structure of the thin nanowires. The electronic properties of the broad erbium silicide nanowires are very similar to the broad dysprosium silicide nanowires. The electronic properties of the DySi 2 -monolayer and the Dy 3 Si 5 -multilayer on the Si(111) surface are investigated in comparison to the known ErSi 2 /Si(111) and Er 3 Si 5 /Si(111) system. The positions and the energetic locations of the observed band in the surface Brillouin zone will be confirmed for dysprosium. The shape of the electron pockets in the vector k parallel space is elliptical at the anti M points, while the hole pocket at the anti Γ point is showing a hexagonal symmetry. On the Si(557) surface the structural and electronic properties depend strongly on the different preparation conditions likewise, in particular on the rare earth coverage. At submonolayer coverage the thin nanowires grow in wide areas of the sample surface, which are oriented

Energy transfer in nanowire solar cells with photon-harvesting shells

KAUST Repository

Peters, C. H.; Guichard, A. R.; Hryciw, A. C.; Brongersma, M. L.; McGehee, M. D.

2009-01-01

The concept of a nanowire solar cell with photon-harvesting shells is presented. In this architecture, organic molecules which absorb strongly in the near infrared where silicon absorbs weakly are coupled to silicon nanowires (SiNWs). This enables

Optical absorption enhancement in silicon nanowire arrays with a large lattice constant for photovoltaic applications.

Science.gov (United States)

Lin, Chenxi; Povinelli, Michelle L

2009-10-26

In this paper, we use the transfer matrix method to calculate the optical absorptance of vertically-aligned silicon nanowire (SiNW) arrays. For fixed filling ratio, significant optical absorption enhancement occurs when the lattice constant is increased from 100 nm to 600 nm. The enhancement arises from an increase in field concentration within the nanowire as well as excitation of guided resonance modes. We quantify the absorption enhancement in terms of ultimate efficiency. Results show that an optimized SiNW array with lattice constant of 600 nm and wire diameter of 540 nm has a 72.4% higher ultimate efficiency than a Si thin film of equal thickness. The enhancement effect can be maintained over a large range of incidence angles.

Silicon based ultrafast optical waveform sampling

DEFF Research Database (Denmark)

Ji, Hua; Galili, Michael; Pu, Minhao

2010-01-01

A 300 nmx450 nmx5 mm silicon nanowire is designed and fabricated for a four wave mixing based non-linear optical gate. Based on this silicon nanowire, an ultra-fast optical sampling system is successfully demonstrated using a free-running fiber laser with a carbon nanotube-based mode-locker as th......A 300 nmx450 nmx5 mm silicon nanowire is designed and fabricated for a four wave mixing based non-linear optical gate. Based on this silicon nanowire, an ultra-fast optical sampling system is successfully demonstrated using a free-running fiber laser with a carbon nanotube-based mode......-locker as the sampling source. A clear eye-diagram of a 320 Gbit/s data signal is obtained. The temporal resolution of the sampling system is estimated to 360 fs....

Rare earth silicide nanowires on silicon surfaces

Energy Technology Data Exchange (ETDEWEB)

Wanke, Martina

2008-11-10

The growth, structure and electronic properties of rare earth silicide nanowires are investigated on planar and vicinal Si(001) und Si(111) surfaces with scanning tunneling microscopy (STM), low energy electron diffraction (LEED) and angle-resolved photoelectron spectroscopy (ARPES). On all surfaces investigated within this work hexagonal disilicides are grown epitaxially with a lattice mismatch of -2.55% up to +0.83% along the hexagonal a-axis. Along the hexagonal c-axis the lattice mismatch is essentially larger with 6.5%. On the Si(001)2 x 1 surface two types of nanowires are grown epitaxially. The socalled broad wires show a one-dimensional metallic valence band structure with states crossing the Fermi level. Along the nanowires two strongly dispersing states at the anti J point and a strongly dispersing state at the anti {gamma} point can be observed. Along the thin nanowires dispersing states could not be observed. Merely in the direction perpendicular to the wires an intensity variation could be observed, which corresponds to the observed spacial structure of the thin nanowires. The electronic properties of the broad erbium silicide nanowires are very similar to the broad dysprosium silicide nanowires. The electronic properties of the DySi{sub 2}-monolayer and the Dy{sub 3}Si{sub 5}-multilayer on the Si(111) surface are investigated in comparison to the known ErSi{sub 2}/Si(111) and Er{sub 3}Si{sub 5}/Si(111) system. The positions and the energetic locations of the observed band in the surface Brillouin zone will be confirmed for dysprosium. The shape of the electron pockets in the (vector)k {sub parallel} space is elliptical at the anti M points, while the hole pocket at the anti {gamma} point is showing a hexagonal symmetry. On the Si(557) surface the structural and electronic properties depend strongly on the different preparation conditions likewise, in particular on the rare earth coverage. At submonolayer coverage the thin nanowires grow in wide areas

Nanowire field-effect transistors for gas sensor applications

Science.gov (United States)

Constantinou, Marios

Sensing BTEX (Benzene, Ethylbenzene, Toluene, Xylene) pollutants is of utmost importance to reduce health risk and ensure public safety. The lack of sensitivity and selectivity of the current gas sensors and the limited number of available technologies in the field of BTEX-sensing raises the demand for the development of high-performance gas sensors for BTEX applications. The scope of this thesis is the fabrication and characterisation of high-quality field-effect transistors (FETs), with functionalised silicon nanowires (SiNWs), for the selective sensing of benzene vs. other BTEX gases. This research addresses three main challenges in SiNW FET-sensor device development: i) controllable and reproducible assembly of high-quality SiNWs for FET sensor devices using the method of dielectrophoresis (DEP), ii) almost complete elimination of harmful hysteresis effect in the SiNW FET current-voltage characteristics induced by surface states using DMF solvent, iii) selective sensing of benzene with up to ppb range of sensitivity using calix[4]arene-derivatives. It is experimentally demonstrated that frequency-controlled DEP is a powerful tool for the selection and collection of semiconducting SiNWs with advanced electrical and morphological properties, from a poly-disperse as-synthesised NWs. The DEP assembly method also leads to a controllable and reproducible fabrication of high-quality NW-based FETs. The results highlight the superiority of DEP, performed at high signal frequencies (5-20 MHz) to selectively assemble only high-quality NWs which can respond to such high DEP frequencies. The SiNW FETs, with NWs collected at high DEP frequencies, have high mobility (≈50 cm2 V-1 s-1), low sub-threshold-swing (≈1.26 V/decade), high on-current (up to 3 mA) and high on/off ratio (106-107). The DEP NW selection is also demonstrated using an industrially scalable method, to allow establishing of NW response characteristics to different DEP frequencies in a very short time

Surface effects on the thermal conductivity of silicon nanowires

Science.gov (United States)

Li, Hai-Peng; Zhang, Rui-Qin

2018-03-01

Thermal transport in silicon nanowires (SiNWs) has recently attracted considerable attention due to their potential applications in energy harvesting and generation and thermal management. The adjustment of the thermal conductivity of SiNWs through surface effects is a topic worthy of focus. In this paper, we briefly review the recent progress made in this field through theoretical calculations and experiments. We come to the conclusion that surface engineering methods are feasible and effective methods for adjusting nanoscale thermal transport and may foster further advancements in this field. Project supported by the National Natural Science Foundation ofChina (Grant No. 11504418), China Scholarship Council (Grant No. 201706425053), Basic Research Program in Shenzhen, China (Grant No. JCYJ20160229165210666), and the Fundamental Research Funds for the Central Universities of China (Grant No. 2015XKMS075).

Fabrication of porous silicon nanowires by MACE method in HF/H2O2/AgNO3 system at room temperature

Science.gov (United States)

2014-01-01

In this paper, the moderately and lightly doped porous silicon nanowires (PSiNWs) were fabricated by the ‘one-pot procedure’ metal-assisted chemical etching (MACE) method in the HF/H2O2/AgNO3 system at room temperature. The effects of H2O2 concentration on the nanostructure of silicon nanowires (SiNWs) were investigated. The experimental results indicate that porous structure can be introduced by the addition of H2O2 and the pore structure could be controlled by adjusting the concentration of H2O2. The H2O2 species replaces Ag+ as the oxidant and the Ag nanoparticles work as catalyst during the etching. And the concentration of H2O2 influences the nucleation and motility of Ag particles, which leads to formation of different porous structure within the nanowires. A mechanism based on the lateral etching which is catalyzed by Ag particles under the motivation by H2O2 reduction is proposed to explain the PSiNWs formation. PMID:24910568

Simultaneous Detection of α-Fetoprotein and Carcinoembryonic Antigen Based on Si Nanowire Field-Effect Transistors

Directory of Open Access Journals (Sweden)

Kuiyu Zhu

2015-08-01

Full Text Available Primary hepatic carcinoma (PHC is one of the most common malignancies worldwide, resulting in death within six to 20 months. The survival rate can be improved by effective treatments when diagnosed at an early stage. The α-fetoprotein (AFP and carcinoembryonic antigen (CEA have been identified as markers that are expressed at higher levels in PHC patients. In this study, we employed silicon nanowire field-effect transistors (SiNW-FETs with polydimethylsiloxane (PDMS microfluidic channels to simultaneously detect AFP and CEA in desalted human serum. Dual-channel PDMS was first utilized for the selective modification of AFP and CEA antibodies on SiNWs, while single-channel PDMS offers faster and more sensitive detection of AFP and CEA in serum. During the SiNW modification process, 0.1% BSA was utilized to minimize nonspecific protein binding from serum. The linear dynamic ranges for the AFP and CEA detection were measured to be 500 fg/mL to 50 ng/mL and 50 fg/mL to 10 ng/mL, respectively. Our work demonstrates the promising potential of fabricated SiNW-FETs as a direct detection kit for multiple tumor markers in serum; therefore, it provides a chance for early stage diagnose and, hence, more effective treatments for PHC patients.

Metallization of DNA on silicon surface

International Nuclear Information System (INIS)

Puchkova, Anastasiya Olegovna; Sokolov, Petr; Petrov, Yuri Vladimirovich; Kasyanenko, Nina Anatolievna

2011-01-01

New simple way for silver deoxyribonucleic acid (DNA)-based nanowires preparation on silicon surface was developed. The electrochemical reduction of silver ions fixed on DNA molecule provides the forming of tightly matched zonate silver clusters. Highly homogeneous metallic clusters have a size about 30 nm. So the thickness of nanowires does not exceed 30–50 nm. The surface of n-type silicon monocrystal is the most convenient substrate for this procedure. The comparative analysis of DNA metallization on of n-type silicon with a similar way for nanowires fabrication on p-type silicon, freshly cleaved mica, and glass surface shows the advantage of n-type silicon, which is not only the substrate for DNA fixation but also the source of electrons for silver reduction. Images of bound DNA molecules and fabricated nanowires have been obtained using an atomic force microscope and a scanning ion helium microscope. DNA interaction with silver ions in a solution was examined by the methods of ultraviolet spectroscopy and circular dichroism.

Microcantilever equipped with nanowire template electrodes for multiprobe measurement on fragile nanostructures

DEFF Research Database (Denmark)

Lin, Rong; Bøggild, Peter; Hansen, Ole

2004-01-01

cantilevers. By subsequently covering these nanowires with a metallic coating, they are made conducting and at the same time fixed to the cantilevers. These silicon nanowire four-point probes were tested on 7 and 35 nm thick Au films as well as poorly adhering 16 nm thin Au nanowires deposited on a silicon...

Tunneling magnetoresistance in Si nanowires

KAUST Repository

Montes Muñoz, Enrique

2016-11-09

We investigate the tunneling magnetoresistance of small diameter semiconducting Si nanowires attached to ferromagnetic Fe electrodes, using first principles density functional theory combined with the non-equilibrium Green\\'s functions method for quantum transport. Silicon nanowires represent an interesting platform for spin devices. They are compatible with mature silicon technology and their intrinsic electronic properties can be controlled by modifying the diameter and length. Here we systematically study the spin transport properties for neutral nanowires and both n and p doping conditions. We find a substantial low bias magnetoresistance for the neutral case, which halves for an applied voltage of about 0.35 V and persists up to 1 V. Doping in general decreases the magnetoresistance, as soon as the conductance is no longer dominated by tunneling.

Tunneling magnetoresistance in Si nanowires

KAUST Repository

Montes Muñ oz, Enrique; Rungger, I.; Sanvito, S.; Schwingenschlö gl, Udo

2016-01-01

for quantum transport. Silicon nanowires represent an interesting platform for spin devices. They are compatible with mature silicon technology and their intrinsic electronic properties can be controlled by modifying the diameter and length. Here we

Extended vapor-liquid-solid growth of silicon carbide nanowires.

Science.gov (United States)

Rajesh, John Anthuvan; Pandurangan, Arumugam

2014-04-01

We developed an alloy catalytic method to explain extended vapor-liquid-solid (VLS) growth of silicon carbide nanowires (SiC NWs) by a simple thermal evaporation of silicon and activated carbon mixture using lanthanum nickel (LaNi5) alloy as catalyst in a chemical vapor deposition process. The LaNi5 alloy binary phase diagram and the phase relationships in the La-Ni-Si ternary system were play a key role to determine the growth parameters in this VLS mechanism. Different reaction temperatures (1300, 1350 and 1400 degrees C) were applied to prove the established growth process by experimentally. Scanning electron microscopy and transmission electron microscopy studies show that the crystalline quality of the SiC NWs increases with the temperature at which they have been synthesized. La-Ni alloyed catalyst particles observed on the top of the SiC NWs confirms that the growth process follows this extended VLS mechanism. The X-ray diffraction and confocal Raman spectroscopy analyses demonstrate that the crystalline structure of the SiC NWs was zinc blende 3C-SiC. Optical property of the SiC NWs was investigated by photoluminescence technique at room temperature. Such a new alloy catalytic method may be extended to synthesis other one-dimensional nanostructures.

The SERS and TERS effects obtained by gold droplets on top of Si nanowires.

Science.gov (United States)

Becker, M; Sivakov, V; Andrä, G; Geiger, R; Schreiber, J; Hoffmann, S; Michler, J; Milenin, A P; Werner, P; Christiansen, S H

2007-01-01

We show that hemispherical gold droplets on top of silicon nanowires when grown by the vapor-liquid-solid (VLS) mechanism, can produce a significant enhancement of Raman scattered signals. Signal enhancement for a few or even just single gold droplets is demonstrated by analyzing the enhanced Raman signature of malachite green molecules. For this experiment, trenches (approximately 800 nm wide) were etched in a silicon-on-insulator (SOI) wafer along crystallographic directions that constitute sidewalls ({110} surfaces) suitable for the growth of silicon nanowires in directions with the intention that the gold droplets on the silicon nanowires can meet somewhere in the trench when growth time is carefully selected. Another way to realize gold nanostructures in close vicinity is to attach a silicon nanowire with a gold droplet onto an atomic force microscopy (AFM) tip and to bring this tip toward another gold-coated AFM tip where malachite green molecules were deposited prior to the measurements. In both experiments, signal enhancement of characteristic Raman bands of malachite green molecules was observed. This indicates that silicon nanowires with gold droplets atop can act as efficient probes for tip-enhanced Raman spectroscopy (TERS). In our article, we show that a nanowire TERS probe can be fabricated by welding nanowires with gold droplets to AFM tips in a scanning electron microscope (SEM). TERS tips made from nanowires could improve the spatial resolution of Raman spectroscopy so that measurements on the nanometer scale are possible.

Shear-driven phase transformation in silicon nanowires.

Science.gov (United States)

Vincent, L; Djomani, D; Fakfakh, M; Renard, C; Belier, B; Bouchier, D; Patriarche, G

2018-03-23

We report on an unprecedented formation of allotrope heterostructured Si nanowires by plastic deformation based on applied radial compressive stresses inside a surrounding matrix. Si nanowires with a standard diamond structure (3C) undergo a phase transformation toward the hexagonal 2H-allotrope. The transformation is thermally activated above 500 °C and is clearly driven by a shear-stress relief occurring in parallel shear bands lying on {115} planes. We have studied the influence of temperature and axial orientation of nanowires. The observations are consistent with a martensitic phase transformation, but the finding leads to clear evidence of a different mechanism of deformation-induced phase transformation in Si nanowires with respect to their bulk counterpart. Our process provides a route to study shear-driven phase transformation at the nanoscale in Si.

Large-Scale Fabrication of Silicon Nanowires for Solar Energy Applications.

Science.gov (United States)

Zhang, Bingchang; Jie, Jiansheng; Zhang, Xiujuan; Ou, Xuemei; Zhang, Xiaohong

2017-10-11

The development of silicon (Si) materials during past decades has boosted up the prosperity of the modern semiconductor industry. In comparison with the bulk-Si materials, Si nanowires (SiNWs) possess superior structural, optical, and electrical properties and have attracted increasing attention in solar energy applications. To achieve the practical applications of SiNWs, both large-scale synthesis of SiNWs at low cost and rational design of energy conversion devices with high efficiency are the prerequisite. This review focuses on the recent progresses in large-scale production of SiNWs, as well as the construction of high-efficiency SiNW-based solar energy conversion devices, including photovoltaic devices and photo-electrochemical cells. Finally, the outlook and challenges in this emerging field are presented.

Fully transparent thin-film transistor devices based on SnO2 nanowires.

Science.gov (United States)

Dattoli, Eric N; Wan, Qing; Guo, Wei; Chen, Yanbin; Pan, Xiaoqing; Lu, Wei

2007-08-01

We report on studies of field-effect transistor (FET) and transparent thin-film transistor (TFT) devices based on lightly Ta-doped SnO2 nano-wires. The nanowire-based devices exhibit uniform characteristics with average field-effect mobilities exceeding 100 cm2/V x s. Prototype nano-wire-based TFT (NW-TFT) devices on glass substrates showed excellent optical transparency and transistor performance in terms of transconductance, bias voltage range, and on/off ratio. High on-currents and field-effect mobilities were obtained from the NW-TFT devices even at low nanowire coverage. The SnO2 nanowire-based TFT approach offers a number of desirable properties such as low growth cost, high electron mobility, and optical transparency and low operation voltage, and may lead to large-scale applications of transparent electronics on diverse substrates.

Collective behaviors of mammalian cells on amine-coated silicon nanowires

International Nuclear Information System (INIS)

Kim, So Yeon; Yang, Eun Gyeong

2013-01-01

Intensive studies with vertical nanowire (NW) arrays have illustrated broad implications for manipulating mammalian cells in vitro, but how cellular responses are influenced by the presence of NWs has not been thoroughly investigated. Here, we address collective cellular behaviors, including surface area of cells, membrane trafficking, focal adhesion distribution and dynamics, and cytoskeletal protein distribution on amine-coated silicon (Si) NWs with different physical properties. The degree of HeLa cell spreading was inversely proportional to the surface area occupied by the NWs, which was not affected by manipulation of membrane trafficking dynamics. In the presence of a diffusive focal complex around the NWs, strong, well organized focal adhesion was hardly visible on the NWs, implying that the cells were interacting weakly with the NW-embedded surface. Furthermore, we found that actin filament formation of the cells on long NWs was not favorable, and this could explain our observation of reduced cell spreading, as well as the decreased number of focal adhesion complexes. Taken together, our results suggest that cells can survive on silicon NWs by adjusting their morphology and adhesion behavior through actively organizing these molecules. (paper)

Organophosphonate-based PNA-functionalization of silicon nanowires for label-free DNA detection.

Science.gov (United States)

Cattani-Scholz, Anna; Pedone, Daniel; Dubey, Manish; Neppl, Stefan; Nickel, Bert; Feulner, Peter; Schwartz, Jeffrey; Abstreiter, Gerhard; Tornow, Marc

2008-08-01

We investigated hydroxyalkylphosphonate monolayers as a novel platform for the biofunctionalization of silicon-based field effect sensor devices. This included a detailed study of the thin film properties of organophosphonate films on Si substrates using several surface analysis techniques, including AFM, ellipsometry, contact angle, X-ray photoelectron spectroscopy (XPS), X-ray reflectivity, and current-voltage characteristics in electrolyte solution. Our results indicate the formation of a dense monolayer on the native silicon oxide that has excellent passivation properties. The monolayer was biofunctionalized with 12 mer peptide nucleic acid (PNA) receptor molecules in a two-step procedure using the heterobifunctional linker, 3-maleimidopropionic-acid-N-hydroxysuccinimidester. Successful surface modification with the probe PNA was verified by XPS and contact angle measurements, and hybridization with DNA was determined by fluorescence measurements. Finally, the PNA functionalization protocol was translated to 2 microm long, 100 nm wide Si nanowire field effect devices, which were successfully used for label-free DNA/PNA hybridization detection.

The antimicrobial effect of silicon nanowires decorated with silver and copper nanoparticles

International Nuclear Information System (INIS)

Fellahi, Ouarda; Marcon, Lionel; Coffinier, Yannick; Boukherroub, Rabah; Sarma, Rupak K; Saikia, Ratul; Das, Manash R; Hadjersi, Toufik; Maamache, Mustapha

2013-01-01

The paper reports on the preparation and antibacterial activity of silicon nanowire (SiNW) substrates coated with Ag or Cu nanoparticles (NPs) against Escherichia coli (E. coli) bacteria. The substrates are easily prepared using the metal-assisted chemical etching of crystalline silicon in hydrofluoric acid/silver nitrate (HF/AgNO 3 ) aqueous solution. Decoration of the SiNWs with metal NPs is achieved by simple immersion in HF aqueous solutions containing silver or copper salts. The SiNWs coated with Ag NPs are biocompatible with human lung adenocarcinoma epithelial cell line A549 while possessing strong antibacterial properties to E. coli. In contrast, the SiNWs decorated with Cu NPs showed higher cytotoxicity and slightly lower antibacterial activity. Moreover, it was also observed that leakage of sugars and proteins from the cell wall of E. coli in interaction with SiNWs decorated with Ag NPs is higher compared to SiNWs modified with Cu NPs. (paper)

Fluorinion transfer in silver-assisted chemical etching for silicon nanowires arrays

Science.gov (United States)

Feng, Tianyu; Xu, Youlong; Zhang, Zhengwei; Mao, Shengchun

2015-08-01

Uniform silicon nanowires arrays (SiNWAs) were fabricated on unpolished rough silicon wafers through KOH pretreatment followed by silver-assisted chemical etching (SACE). Density functional theory (DFT) calculations were used to investigate the function of silver (Ag) at atomic scale in the etching process. Among three adsorption sites of Ag atom on Si(1 0 0) surface, Ag(T4) above the fourth-layer surface Si atoms could transfer fluorinion (F-) to adjacent Si successfully due to its stronger electrostatic attraction force between Ag(T4) and F-, smaller azimuth angle of Fsbnd Ag(T4)sbnd Si, shorter bond length of Fsbnd Si compared with Fsbnd Ag. As F- was transferred to adjacent Si by Ag(T4) one by one, the Si got away from the wafer in the form of SiF4 when it bonded with enough F- while Ag(T4) was still attached onto the Si wafer ready for next transfer. Cyclic voltammetry tests confirmed that Ag can improve the etching rate by transferring F- to Si.

Si nanoparticle-decorated Si nanowire networks for Li-ion battery anodes

KAUST Repository

Hu, Liangbing

2011-01-01

We designed and fabricated binder-free, 3D porous silicon nanostructures for Li-ion battery anodes, where Si nanoparticles electrically contact current collectors via vertically grown silicon nanowires. When compared with a Si nanowire anode, the areal capacity was increased by a factor of 4 without having to use long, high temperature steps under vacuum that vapour-liquid-solid Si nanowire growth entails. © 2011 The Royal Society of Chemistry.

Small signal modulation characteristics of red-emitting (λ = 610 nm) III-nitride nanowire array lasers on (001) silicon

KAUST Repository

Jahangir, Shafat; Frost, Thomas; Hazari, Arnab; Yan, Lifan; Stark, Ethan; LaMountain, Trevor; Millunchick, Joanna M.; Ooi, Boon S.; Bhattacharya, Pallab

2015-01-01

The small signal modulation characteristics of an InGaN/GaN nanowire array edge- emitting laser on (001) silicon are reported. The emission wavelength is 610 nm. Lattice matched InAlN cladding layers were incorporated in the laser heterostructure for better mode confinement. The suitability of the nanowire lasers for use in plastic fiber communication systems with direct modulation is demonstrated through their modulation bandwidth of f-3dB,max = 3.1 GHz, very low values of chirp (0.8 Å) and α-parameter, and large differential gain (3.1 × 10-17 cm2).

Small signal modulation characteristics of red-emitting (λ = 610 nm) III-nitride nanowire array lasers on (001) silicon

KAUST Repository

Jahangir, Shafat

2015-02-16

The small signal modulation characteristics of an InGaN/GaN nanowire array edge- emitting laser on (001) silicon are reported. The emission wavelength is 610 nm. Lattice matched InAlN cladding layers were incorporated in the laser heterostructure for better mode confinement. The suitability of the nanowire lasers for use in plastic fiber communication systems with direct modulation is demonstrated through their modulation bandwidth of f-3dB,max = 3.1 GHz, very low values of chirp (0.8 Å) and α-parameter, and large differential gain (3.1 × 10-17 cm2).

Generation of Reactive Oxygen Species from Silicon Nanowires

Directory of Open Access Journals (Sweden)

Stephen S. Leonard

2014-01-01

Full Text Available Processing and synthesis of purified nanomaterials of diverse composition, size, and properties is an evolving process. Studies have demonstrated that some nanomaterials have potential toxic effects and have led to toxicity research focusing on nanotoxicology. About two million workers will be employed in the field of nanotechnology over the next 10 years. The unknown effects of nanomaterials create a need for research and development of techniques to identify possible toxicity. Through a cooperative effort between National Institute for Occupational Safety and Health and IBM to address possible occupational exposures, silicon-based nanowires (SiNWs were obtained for our study. These SiNWs are anisotropic filamentary crystals of silicon, synthesized by the vapor-liquid-solid method and used in bio-sensors, gas sensors, and field effect transistors. Reactive oxygen species (ROS can be generated when organisms are exposed to a material causing cellular responses, such as lipid peroxidation, H 2 O 2 production, and DNA damage. SiNWs were assessed using three different in vitro environments (H 2 O 2 , RAW 264.7 cells, and rat alveolar macrophages for ROS generation and possible toxicity identification. We used electron spin resonance, analysis of lipid peroxidation, measurement of H 2 O 2 production, and the comet assay to assess generation of ROS from SiNW and define possible mechanisms. Our results demonstrate that SiNWs do not appear to be significant generators of free radicals.

Focused ion beam patterning to dielectrophoretically assemble single nanowire based devices

International Nuclear Information System (INIS)

La Ferrara, V; Massera, E; Francia, G Di; Alfano, B

2010-01-01

Direct-write processing is increasingly taking place in nanodevice fabrication. In this work, Focused Ion Beam (FIB), a powerful tool in maskless micromachining, is used for electrode patterning onto a silicon/silicon nitride substrate. Then a single palladium nanowire is assembled between electrodes by means of dielectrophoresis (DEP). The nanowire morphology depends on the electrode pattern when DEP conditions are fixed. FIB/DEP combination overcomes the problem of nanowire electrical contamination due to gallium ion bombardment and the as-grown nanowire retains its basic electrical properties. Single nanowire based devices have been fabricated with this novel approach and have been tested as hydrogen sensors, confirming the reliability of this technology.

In Situ X-ray Diffraction Studies of (De)lithiation Mechanism in Silicon Nanowire Anodes

KAUST Repository

Misra, Sumohan

2012-06-26

Figure Persented: Silicon is a promising anode material for Li-ion batteries due to its high theoretical specific capacity. From previous work, silicon nanowires (SiNWs) are known to undergo amorphorization during lithiation, and no crystalline Li-Si product has been observed. In this work, we use an X-ray transparent battery cell to perform in situ synchrotron X-ray diffraction on SiNWs in real time during electrochemical cycling. At deep lithiation voltages the known metastable Li 15Si 4 phase forms, and we show that avoiding the formation of this phase, by modifying the SiNW growth temperature, improves the cycling performance of SiNW anodes. Our results provide insight on the (de)lithiation mechanism and a correlation between phase evolution and electrochemical performance for SiNW anodes. © 2012 American Chemical Society.

Twins and strain relaxation in zinc-blende GaAs nanowires grown on silicon

Energy Technology Data Exchange (ETDEWEB)

Piñero, J.C., E-mail: josecarlos.pinero@uca.es [Dpto. Ciencias de los Materiales, Universidad de Cádiz, 11510, Puerto Real, Cádiz (Spain); Araújo, D.; Pastore, C.E.; Gutierrez, M. [Dpto. Ciencias de los Materiales, Universidad de Cádiz, 11510, Puerto Real, Cádiz (Spain); Frigeri, C. [Istituto CNR-IMEM Parco Area delle Scienze 37/A, Fontanini, 43010, Parma (Italy); Benali, A.; Lelièvre, J.F.; Gendry, M. [INL-Institut des Nanotechnologies de Lyon, UMR 5270 Ecole Centrale de Lyon 36, Avenue Guy de Collongue, 69134, Ecully Cedex (France)

2017-02-15

Highlights: • A TEM-HREM study of GaAs nanowires, growth over Si, is presented. • Misfit dislocations are detected in the Si/GaAs magma interface. • The study demonstrates strain relaxation through twin formation in some nanowires. - Abstract: To integrate materials with large lattice mismatch as GaAs on silicon (Si) substrate, one possible approach, to improve the GaAs crystalline quality, is to use nanowires (NWs) technology. In the present contribution, NWs are grown on <111> oriented Si substrates by molecular beam epitaxy (MBE) using vapor-liquid-solid (VLS) method. Transmission electron microscopy (TEM) analyses show that NWs are mainly grown alternating wurtzite and zinc blend (ZB) phases, and only few are purely ZB. On the latter, High Resolution Electron Microscopy (HREM) evidences the presence of twins near the surface of the NW showing limited concordance with the calculations of Yuan (2013) [1], where {111} twin planes in a <111>-oriented GaAs NW attain attractive interactions mediated by surface strain. In addition, such twins allow slight strain relaxation and are probably induced by the local huge elastic strain observed by HREM in the lattice between the twin and the surface. The latter is attributed to some slight bending of the NW as shown by the inversion of the strain from one side to the other side of the NW.

Energy transfer in nanowire solar cells with photon-harvesting shells

KAUST Repository

Peters, C. H.

2009-01-01

The concept of a nanowire solar cell with photon-harvesting shells is presented. In this architecture, organic molecules which absorb strongly in the near infrared where silicon absorbs weakly are coupled to silicon nanowires (SiNWs). This enables an array of 7-μm -long nanowires with a diameter of 50 nm to absorb over 85% of the photons above the bandgap of silicon. The organic molecules are bonded to the surface of the SiNWs forming a thin shell. They absorb the low-energy photons and subsequently transfer the energy to the SiNWs via Förster resonant energy transfer, creating free electrons and holes within the SiNWs. The carriers are then separated at a radial p-n junction in a nanowire and extracted at the respective electrodes. The shortness of the nanowires is expected to lower the dark current due to the decrease in p-n junction surface area, which scales linearly with wire length. The theoretical power conversion efficiency is 15%. To demonstrate this concept, we measure a 60% increase in photocurrent from a planar silicon-on-insulator diode when a 5 nm layer of poly[2-methoxy-5-(2′ -ethyl-hexyloxy)-1,4-phenylene vinylene is applied to the surface of the silicon. This increase is in excellent agreement with theoretical predictions. © 2009 American Institute of Physics.

Fluorinion transfer in silver-assisted chemical etching for silicon nanowires arrays

International Nuclear Information System (INIS)

Feng, Tianyu; Xu, Youlong; Zhang, Zhengwei; Mao, Shengchun

2015-01-01

Graphical abstract: - Highlights: • How Ag transfers F − to the adjacent Si atom was investigated and deduced by DFT at atomic scale. • Three-electrode CV tests proved the transferring function of Ag in the etching reaction. • Uniform SiNWAs were fabricated on unpolished silicon wafers with KOH pretreatment. - Abstract: Uniform silicon nanowires arrays (SiNWAs) were fabricated on unpolished rough silicon wafers through KOH pretreatment followed by silver-assisted chemical etching (SACE). Density functional theory (DFT) calculations were used to investigate the function of silver (Ag) at atomic scale in the etching process. Among three adsorption sites of Ag atom on Si(1 0 0) surface, Ag(T4) above the fourth-layer surface Si atoms could transfer fluorinion (F − ) to adjacent Si successfully due to its stronger electrostatic attraction force between Ag(T4) and F − , smaller azimuth angle of F−Ag(T4)−Si, shorter bond length of F−Si compared with F−Ag. As F − was transferred to adjacent Si by Ag(T4) one by one, the Si got away from the wafer in the form of SiF 4 when it bonded with enough F − while Ag(T4) was still attached onto the Si wafer ready for next transfer. Cyclic voltammetry tests confirmed that Ag can improve the etching rate by transferring F − to Si

Sensing Responses Based on Transfer Characteristics of InAs Nanowire Field-Effect Transistors

Science.gov (United States)

Savelyev, Igor; Blumin, Marina; Wang, Shiliang; Ruda, Harry E.

2017-01-01

Nanowire-based field-effect transistors (FETs) have demonstrated considerable promise for a new generation of chemical and biological sensors. Indium arsenide (InAs), by virtue of its high electron mobility and intrinsic surface accumulation layer of electrons, holds properties beneficial for creating high performance sensors that can be used in applications such as point-of-care testing for patients diagnosed with chronic diseases. Here, we propose devices based on a parallel configuration of InAs nanowires and investigate sensor responses from measurements of conductance over time and FET characteristics. The devices were tested in controlled concentrations of vapour containing acetic acid, 2-butanone and methanol. After adsorption of analyte molecules, trends in the transient current and transfer curves are correlated with the nature of the surface interaction. Specifically, we observed proportionality between acetic acid concentration and relative conductance change, off current and surface charge density extracted from subthreshold behaviour. We suggest the origin of the sensing response to acetic acid as a two-part, reversible acid-base and redox reaction between acetic acid, InAs and its native oxide that forms slow, donor-like states at the nanowire surface. We further describe a simple model that is able to distinguish the occurrence of physical versus chemical adsorption by comparing the values of the extracted surface charge density. These studies demonstrate that InAs nanowires can produce a multitude of sensor responses for the purpose of developing next generation, multi-dimensional sensor applications. PMID:28714903

Recovery of hexagonal Si-IV nanowires from extreme GPa pressure

Energy Technology Data Exchange (ETDEWEB)

Smith, Bennett E. [Department of Chemistry, University of Washington, Seattle, Washington 98195 (United States); Zhou, Xuezhe; Roder, Paden B. [Department of Materials Science and Engineering, University of Washington, Seattle, Washington 98195 (United States); Abramson, Evan H. [Department of Earth and Space Sciences, University of Washington, Seattle, Washington 98195 (United States); Pauzauskie, Peter J., E-mail: peterpz@uw.edu [Department of Materials Science and Engineering, University of Washington, Seattle, Washington 98195 (United States); Fundamental and Computational Sciences Directorate, Pacific Northwest National Laboratory, Richland, Washington 99352 (United States)

2016-05-14

We use Raman spectroscopy in tandem with transmission electron microscopy and density functional theory simulations to show that extreme (GPa) pressure converts the phase of silicon nanowires from cubic (Si-I) to hexagonal (Si-IV) while preserving the nanowire's cylindrical morphology. In situ Raman scattering of the longitudinal transverse optical (LTO) mode demonstrates the high-pressure Si-I to Si-II phase transition near 9 GPa. Raman signal of the LTO phonon shows a decrease in intensity in the range of 9–14 GPa. Then, at 17 GPa, it is no longer detectable, indicating a second phase change (Si-II to Si-V) in the 14–17 GPa range. Recovery of exotic phases in individual silicon nanowires from diamond anvil cell experiments reaching 17 GPa is also shown. Raman measurements indicate Si-IV as the dominant phase in pressurized nanowires after decompression. Transmission electron microscopy and electron diffraction confirm crystalline Si-IV domains in individual nanowires. Computational electromagnetic simulations suggest that heating from the Raman laser probe is negligible and that near-hydrostatic pressure is the primary driving force for the formation of hexagonal silicon nanowires.

Origin of photoluminescence from silicon nanowires prepared by metal induced etching (MIE)

International Nuclear Information System (INIS)

Saxena, Shailendra K.; Rai, Hari. M.; Late, Ravikiran; Sagdeo, Pankaj R.; Kumar, Rajesh

2015-01-01

In this present study the origin of luminescence from silicon nanowires (SiNws) has been studied. SiNWs are fabricated on Si substrate by metal induced chemical etching (MIE). Here it is found that the band gap of SiNWs is higher than the gap of luminescent states in SiNWs which leads to the effect of Si=O bond. The band gap is estimated from diffuse reflectance analysis. Here we observe that band gap can be tailored depending on size (quantum confinement) but photoluminescence (PL) from all the sample is found to be fixed at 1.91 eV. This study is important for the understanding of origin of photoluminescence

Improving the cycling stability of silicon nanowire anodes with conducting polymer coatings

KAUST Repository

Yao, Yan; Liu, Nian; McDowell, Matthew T.; Pasta, Mauro; Cui, Yi

2012-01-01

For silicon nanowires (Si NWs) to be used as a successful high capacity lithium-ion battery anode material, improvements in cycling stability are required. Here we show that a conductive polymer surface coating on the Si NWs improves cycling stability; coating with PEDOT causes the capacity retention after 100 charge-discharge cycles to increase from 30% to 80% over bare NWs. The improvement in cycling stability is attributed to the conductive coating maintaining the mechanical integrity of the cycled Si material, along with preserving electrical connections between NWs that would otherwise have become electrically isolated during volume changes. © 2012 The Royal Society of Chemistry.

Axial Ge/Si nanowire heterostructure tunnel FETs

Energy Technology Data Exchange (ETDEWEB)

Picraux, Sanuel T [Los Alamos National Laboratory; Daych, Shadi A [Los Alamos National Laboratory

2010-01-01

The vapor-liquid-solid (VLS) growth of semiconductor nanowires allows doping and composition modulation along their axis and the realization of axial 1 D heterostructures. This provides additional flexibility in energy band-edge engineering along the transport direction which is difficult to attain by planar materials growth and processing techniques. We report here on the design, growth, fabrication, and characterization of asymmetric heterostructure tunnel field-effect transistors (HTFETs) based on 100% compositionally modulated Si/Ge axial NWs for high on-current operation and low ambipolar transport behavior. We discuss the optimization of band-offsets and Schottky barrier heights for high performance HTFETs and issues surrounding their experimental realization. Our HTFET devices with 10 nm PECVD SiN{sub x} gate dielectric resulted in a measured current drive exceeding 100 {mu}A/{mu}m (I/{pi}D) and 10{sup 5} I{sub on}/I{sub off} ratios.

Intermediate Bandgap Solar Cells From Nanostructured Silicon

Energy Technology Data Exchange (ETDEWEB)

Black, Marcie [Bandgap Engineering, Lincoln, MA (United States)

2014-10-30

This project aimed to demonstrate increased electronic coupling in silicon nanostructures relative to bulk silicon for the purpose of making high efficiency intermediate bandgap solar cells using silicon. To this end, we formed nanowires with controlled crystallographic orientation, small diameter, <111> sidewall faceting, and passivated surfaces to modify the electronic band structure in silicon by breaking down the symmetry of the crystal lattice. We grew and tested these silicon nanowires with <110>-growth axes, which is an orientation that should produce the coupling enhancement.

Control growth of silicon nanocolumns' epitaxy on silicon nanowires

Energy Technology Data Exchange (ETDEWEB)

Chong, Su Kong, E-mail: sukong1985@yahoo.com.my [University of Malaya, Low Dimensional Materials Research Centre, Department of Physics (Malaysia); Dee, Chang Fu [Universiti Kebangsaan Malaysia (UKM), Institute of Microengineering and Nanoelectronics (IMEN) (Malaysia); Yahya, Noorhana [Universiti Teknologi PETRONAS, Faculty of Science and Information Technology (Malaysia); Rahman, Saadah Abdul [University of Malaya, Low Dimensional Materials Research Centre, Department of Physics (Malaysia)

2013-04-15

The epitaxial growth of Si nanocolumns on Si nanowires was studied using hot-wire chemical vapor deposition. A single-crystalline and surface oxide-free Si nanowire core (core radius {approx}21 {+-} 5 nm) induced by indium crystal seed was used as a substance for the vapor phase epitaxial growth. The growth process is initiated by sidewall facets, which then nucleate upon certain thickness to form Si islands and further grow to form nanocolumns. The Si nanocolumns with diameter of 10-20 nm and aspect ratio up to 10 can be epitaxially grown on the surface of nanowires. The results showed that the radial growth rate of the Si nanocolumns remains constant with the increase of deposition time. Meanwhile, the radial growth rates are controllable by manipulating the hydrogen to silane gas flow rate ratio. The optical antireflection properties of the Si nanocolumns' decorated SiNW arrays are discussed in the text.

VLS-grown diffusion doped ZnO nanowires and their luminescence properties

International Nuclear Information System (INIS)

Roy, Pushan Guha; Dutta, Amartya; Das, Arpita; Bhattacharyya, Anirban; Sen, Sayantani; Pramanik, Pallabi

2015-01-01

Zinc Oxide (ZnO) nanowires were deposited by vapor–liquid–solid (VLS) method on to aluminum doped ZnO (AZO) thin films grown by sol-gel technique. For various device applications, current injection into such nanowires is critical. This is expected to be more efficient for ZnO nanowires deposited on to AZO compared to those deposited on to a foreign substrate such as silicon. In this work we compare the morphological and optical properties of nanowires grown on AZO with those grown under similar conditions on silicon (Si) wafers. For nanowires grown on silicon, diameters around 44 nm with heights around 2.2 μm were obtained. For the growth on to AZO, the diameters were around 90 nm while the heights were around 520 nm. Room temperature photoluminescence (RT-PL) measurements show improved near band-edge emission for nanowires grown on to AZO, indicating higher material quality. This is further established by low temperature photoluminescence (LT-PL) measurements where excitonic transitions with width as small as 14 meV have been obtained at 4 K for such structures. Electron energy loss spectroscopy (EELS) studies indicate the presence of Al in the nanowires, indicating a new technique for introduction of dopants into these structures. These results indicate that ZnO nanowires on sol-gel grown AZO thin films show promise in the development of various optoelectronic devices. (paper)

Mechanics of nanowire/nanotube in-surface buckling on elastomeric substrates

Energy Technology Data Exchange (ETDEWEB)

Xiao, J; Huang, Y [Department of Mechanical Engineering, Northwestern University, Evanston, IL 60208 (United States); Ryu, S Y; Paik, U [Division of Materials Science and Engineering, Hanyang University, 17 Hangdang-dong, Sungdong-gu, Seoul 133-791 (Korea, Republic of); Hwang, K-C [Department of Engineering Mechanics, Tsinghua University, Beijing 100084 (China); Rogers, J A, E-mail: y-huang@northwestern.edu, E-mail: jrogers@uiuc.edu [Department of Materials Science and Engineering, Frederick-Seitz Materials Research Laboratory and Beckman Institute, University of Illinois at Urbana-Champaign, Illinois 61801 (United States)

2010-02-26

A continuum mechanics theory is established for the in-surface buckling of one-dimensional nanomaterials on compliant substrates, such as silicon nanowires on elastomeric substrates observed in experiments. Simple analytical expressions are obtained for the buckling wavelength, amplitude and critical buckling strain in terms of the bending and tension stiffness of the nanomaterial and the substrate elastic properties. The analysis is applied to silicon nanowires, single-walled carbon nanotubes, multi-walled carbon nanotubes, and carbon nanotube bundles. For silicon nanowires, the measured buckling wavelength gives Young's modulus to be 140 GPa, which agrees well with the prior experimental studies. It is shown that the energy for in-surface buckling is lower than that for normal (out-of-surface) buckling, and is therefore energetically favorable.

Mechanics of nanowire/nanotube in-surface buckling on elastomeric substrates

International Nuclear Information System (INIS)

Xiao, J; Huang, Y; Ryu, S Y; Paik, U; Hwang, K-C; Rogers, J A

2010-01-01

A continuum mechanics theory is established for the in-surface buckling of one-dimensional nanomaterials on compliant substrates, such as silicon nanowires on elastomeric substrates observed in experiments. Simple analytical expressions are obtained for the buckling wavelength, amplitude and critical buckling strain in terms of the bending and tension stiffness of the nanomaterial and the substrate elastic properties. The analysis is applied to silicon nanowires, single-walled carbon nanotubes, multi-walled carbon nanotubes, and carbon nanotube bundles. For silicon nanowires, the measured buckling wavelength gives Young's modulus to be 140 GPa, which agrees well with the prior experimental studies. It is shown that the energy for in-surface buckling is lower than that for normal (out-of-surface) buckling, and is therefore energetically favorable.

Optical analysis of a III-V-nanowire-array-on-Si dual junction solar cell.

Science.gov (United States)

Chen, Yang; Höhn, Oliver; Tucher, Nico; Pistol, Mats-Erik; Anttu, Nicklas

2017-08-07

A tandem solar cell consisting of a III-V nanowire subcell on top of a planar Si subcell is a promising candidate for next generation photovoltaics due to the potential for high efficiency. However, for success with such applications, the geometry of the system must be optimized for absorption of sunlight. Here, we consider this absorption through optics modeling. Similarly, as for a bulk dual-junction tandem system on a silicon bottom cell, a bandgap of approximately 1.7 eV is optimum for the nanowire top cell. First, we consider a simplified system of bare, uncoated III-V nanowires on the silicon substrate and optimize the absorption in the nanowires. We find that an optimum absorption in 2000 nm long nanowires is reached for a dense array of approximately 15 nanowires per square micrometer. However, when we coat such an array with a conformal indium tin oxide (ITO) top contact layer, a substantial absorption loss occurs in the ITO. This ITO could absorb 37% of the low energy photons intended for the silicon subcell. By moving to a design with a 50 nm thick, planarized ITO top layer, we can reduce this ITO absorption to 5%. However, such a planarized design introduces additional reflection losses. We show that these reflection losses can be reduced with a 100 nm thick SiO 2 anti-reflection coating on top of the ITO layer. When we at the same time include a Si 3 N 4 layer with a thickness of 90 nm on the silicon surface between the nanowires, we can reduce the average reflection loss of the silicon cell from 17% to 4%. Finally, we show that different approximate models for the absorption in the silicon substrate can lead to a 15% variation in the estimated photocurrent density in the silicon subcell.

Transient hardened power FETs

International Nuclear Information System (INIS)

Dawes, W.R. Jr.; Fischer, T.A.; Huang, C.C.C.; Meyer, W.J.; Smith, C.S.; Blanchard, R.A.; Fortier, T.J.

1986-01-01

N-channel power FETs offer significant advantages in power conditioning circuits. Similiarily to all MOS technologies, power FET devices are vulnerable to ionizing radiation, and are particularily susceptible to burn-out in high dose rate irradiations (>1E10 rads(Si)/sec.), which precludes their use in many military environments. This paper will summarize the physical mechanisms responsible for burn-out, and discuss various fabrication techniques designed to improve the transient hardness of power FETs. Power FET devices were fabricated with several of these techniques, and data will be presented which demonstrates that transient hardness levels in excess of 1E12 rads(Si)/sec. are easily achievable

Controlled growth of single nanowires within a supported alumina template

DEFF Research Database (Denmark)

Vlad, A.; Mátéfi-Tempfli, M.; Faniel, S.

2006-01-01

A simple technique for fabricating single nanowires with well-defined position is presented. The process implies the use of a silicon nitride mask for selective electrochemical growth of the nanowires in a porous alumina template. We show that this method allows the realization of complex nanowire...

Tailoring Thermal Radiative Properties with Doped-Silicon Nanowires

Energy Technology Data Exchange (ETDEWEB)

Zhang, Zhuomin [Georgia Inst. of Technology, Atlanta, GA (United States)

2017-08-28

Aligned doped-silicon nanowire (D-SiNW) arrays form a hyperbolic metamaterial in the mid-infrared and have unique thermal radiative properties, such as broadband omnidirectional absorption, low-loss negative refraction, etc. A combined theoretical and experimental investigation will be performed to characterize D-SiNW arrays and other metamaterials for tailoring thermal radiative properties. Near-field thermal radiation between anisotropic materials with hyperbolic dispersions will also be predicted for potential application in energy harvesting. A new kind of anisotropic metamaterial with a hyperbolic dispersion in a broad infrared region has been proposed and demonstrated based on aligned doped-silicon nanowire (D-SiNW) arrays. D-SiNW-based metamaterials have unique thermal radiative properties, such as broadband omnidirectional absorption whose width and location can be tuned by varying the filling ratio and/or doping level. Furthermore, high figure of merit (FOM) can be achieved in a wide spectral region, suggesting that D-SiNW arrays may be used as a negative refraction material with much less loss than other structured materials, such as layered semiconductor materials. We have also shown that D-SiNWs and other nanostructures can significantly enhance near-field thermal radiation. The study of near-field radiative heat transfer between closely spaced objects and the electromagnetic wave interactions with micro/nanostructured materials has become an emerging multidisciplinary field due to its importance in advanced energy systems, manufacturing, local thermal management, and high spatial resolution thermal sensing and mapping. We have performed extensive study on the energy streamlines involving anisotropic metamaterials and the applicability of the effective medium theory for near-field thermal radiation. Graphene as a 2D material has attracted great attention in nanoelectronics, plasmonics, and energy harvesting. We have shown that graphene can be used to

Out-of-Plane Strain Effects on Physically Flexible FinFET CMOS

KAUST Repository

Ghoneim, Mohamed T.

2016-05-18

We present a comprehensive electrical performance assessment of hafnium silicate (HfSiOₓ) high-κ dielectric and titanium-nitride (TiN) metal-gate-integrated FinFET-based complementary-metal-oxide-semiconductor (CMOS) on flexible silicon on insulator. The devices were fabricated using the state-of-the-art CMOS technology and then transformed into flexible form by using a CMOS-compatible maskless deep reactive-ion etching technique. Mechanical out-of-plane stresses (compressive and tensile) were applied along and across the transistor channel lengths through a bending range of 0.5-5 cm radii for n-type and p-type FinFETs. Electrical measurements were carried out before and after bending, and all the bending measurements were taken in the actual flexed (bent) state to avoid relaxation and stress recovery. Global stress from substrate bending affects the devices in different ways compared with the well-studied uniaxial/biaxial localized strain. The global stress is dependent on the type of channel charge carriers, the orientation of the bending axis, and the physical gate length of the device. We, therefore, outline useful insights on the design strategies of flexible FinFETs in future free-form electronic applications.

An analytic model for gate-all-around silicon nanowire tunneling field effect transistors

International Nuclear Information System (INIS)

Liu Ying; He Jin; Chan Mansun; Ye Yun; Zhao Wei; Wu Wen; Deng Wan-Ling; Wang Wen-Ping; Du Cai-Xia

2014-01-01

An analytical model of gate-all-around (GAA) silicon nanowire tunneling field effect transistors (NW-TFETs) is developted based on the surface potential solutions in the channel direction and considering the band to band tunneling (BTBT) efficiency. The three-dimensional Poisson equation is solved to obtain the surface potential distributions in the partition regions along the channel direction for the NW-TFET, and a tunneling current model using Kane's expression is developed. The validity of the developed model is shown by the good agreement between the model predictions and the TCAD simulation results. (condensed matter: electronic structure, electrical, magnetic, and optical properties)

Interfering Heralded Single Photons from Two Separate Silicon Nanowires Pumped at Different Wavelengths

Directory of Open Access Journals (Sweden)

Xiang Zhang

2016-08-01

Full Text Available Practical quantum photonic applications require on-demand single photon sources. As one possible solution, active temporal and wavelength multiplexing has been proposed to build an on-demand single photon source. In this scheme, heralded single photons are generated from different pump wavelengths in many temporal modes. However, the indistinguishability of these heralded single photons has not yet been experimentally confirmed. In this work, we achieve 88% ± 8% Hong–Ou–Mandel quantum interference visibility from heralded single photons generated from two separate silicon nanowires pumped at different wavelengths. This demonstrates that active temporal and wavelength multiplexing could generate indistinguishable heralded single photons.

Non-classical logic inverter coupling a ZnO nanowire-based Schottky barrier transistor and adjacent Schottky diode.

Science.gov (United States)

Hosseini Shokouh, Seyed Hossein; Raza, Syed Raza Ali; Lee, Hee Sung; Im, Seongil

2014-08-21

On a single ZnO nanowire (NW), we fabricated an inverter-type device comprising a Schottky diode (SD) and field-effect transistor (FET), aiming at 1-dimensional (1D) electronic circuits with low power consumption. The SD and adjacent FET worked respectively as the load and driver, so that voltage signals could be easily extracted as the output. In addition, NW FET with a transparent conducting oxide as top gate turned out to be very photosensitive, although ZnO NW SD was blind to visible light. Based on this, we could achieve an array of photo-inverter cells on one NW. Our non-classical inverter is regarded as quite practical for both logic and photo-sensing due to its performance as well as simple device configuration.

Si nanowires/Cu nanowires bilayer fabric as a lithium ion capacitor anode with excellent performance

Science.gov (United States)

Lai, Chien-Ming; Kao, Tzu-Lun; Tuan, Hsing-Yu

2018-03-01

A light and binder-free bilayer fabric electrode composed of silicon nanowires and copper nanowires for lithium-ion capacitors (LICs) is reported. A lithium ion capacitor is proposed employing pre-lithiated silicon/copper nanowire fabric and activated carbon as the anode and the cathode, respectively. These LICs show remarkable performance with a specific capacitance of 156 F g-1 at 0.1 A g-1, which is approximately twice of that of activated carbon in electric double-layer capacitors (EDLCs), and still exhibit a fine specific capacitance of 68 F g-1 even at a high current density of 20 A g-1. At a low power density of 193 W kg-1, the Si/Cu fabric//AC LIC can achieve high energy density of 210 W h kg-1. As the power density is increased to 99 kW kg-1, the energy density still remains at 43 W h kg-1, showing the prominent rate performance.

Quantifying the Traction Force of a Single Cell by Aligned Silicon Nanowire Array

KAUST Repository

Li, Zhou

2009-10-14

The physical behaviors of stationary cells, such as the morphology, motility, adhesion, anchorage, invasion and metastasis, are likely to be important for governing their biological characteristics. A change in the physical properties of mammalian cells could be an indication of disease. In this paper, we present a silicon-nanowire-array based technique for quantifying the mechanical behavior of single cells representing three distinct groups: normal mammalian cells, benign cells (L929), and malignant cells (HeLa). By culturing the cells on top of NW arrays, the maximum traction forces of two different tumor cells (HeLa, L929) have been measured by quantitatively analyzing the bending of the nanowires. The cancer cell exhibits a larger traction force than the normal cell by ∼20% for a HeLa cell and ∼50% for a L929 cell. The traction forces have been measured for the L929 cells and mechanocytes as a function of culture time. The relationship between cells extending area and their traction force has been investigated. Our study is likely important for studying the mechanical properties of single cells and their migration characteristics, possibly providing a new cellular level diagnostic technique. © 2009 American Chemical Society.

Patterned growth of carbon nanotubes over vertically aligned silicon nanowire bundles for achieving uniform field emission.

Science.gov (United States)

Hung, Yung-Jr; Huang, Yung-Jui; Chang, Hsuan-Chen; Lee, Kuei-Yi; Lee, San-Liang

2014-01-01

A fabrication strategy is proposed to enable precise coverage of as-grown carbon nanotube (CNT) mats atop vertically aligned silicon nanowire (VA-SiNW) bundles in order to realize a uniform bundle array of CNT-SiNW heterojunctions over a large sample area. No obvious electrical degradation of as-fabricated SiNWs is observed according to the measured current-voltage characteristic of a two-terminal single-nanowire device. Bundle arrangement of CNT-SiNW heterojunctions is optimized to relax the electrostatic screening effect and to maximize the field enhancement factor. As a result, superior field emission performance and relatively stable emission current over 12 h is obtained. A bright and uniform fluorescent radiation is observed from CNT-SiNW-based field emitters regardless of its bundle periodicity, verifying the existence of high-density and efficient field emitters on the proposed CNT-SiNW bundle arrays.

High-quality GaN nanowires grown on Si and porous silicon by thermal evaporation

Energy Technology Data Exchange (ETDEWEB)

Shekari, L., E-mail: lsg09_phy089@student.usm.my [Nano-Optoelectronics Research and Technology Laboratory, School of Physics, Universiti Sains Malaysia, 11800 USM, Penang (Malaysia); Ramizy, A.; Omar, K.; Hassan, H. Abu; Hassan, Z. [Nano-Optoelectronics Research and Technology Laboratory, School of Physics, Universiti Sains Malaysia, 11800 USM, Penang (Malaysia)

2012-12-15

Highlights: Black-Right-Pointing-Pointer A new kind of substrate (porous silicon) was used. Black-Right-Pointing-Pointer Also this research introduces an easy and safe method to grow high quality GaN NWs. Black-Right-Pointing-Pointer This is a new growth process to decrease the cost, complexity of growth of GaN NWs. Black-Right-Pointing-Pointer It is a controllable method to synthesize GaN NWs by thermal evaporation. - Abstract: Nanowires (NWs) of GaN thin films were prepared on as-grown Si (1 1 1) and porous silicon (PS) substrates using thermal evaporation method. The film growth produced high-quality wurtzite GaN NWs. The size, morphology, and nanostructures of the crystals were investigated through scanning electron microscopy, high-resolution X-ray diffraction and photoluminescence spectroscopy. The NWs grown on porous silicon were thinner, longer and denser compared with those on as-grown Si. The energy band gap of the NWs grown on PS was larger than that of NWs on as-grown Si. This is due to the greater quantum confinement effects of the crystalline structure of the NWs grown on PS.

Flexible FETs using ultrathin Si microwires embedded in solution processed dielectric and metal layers

Science.gov (United States)

Khan, S.; Yogeswaran, N.; Taube, W.; Lorenzelli, L.; Dahiya, R.

2015-12-01

This work presents a novel manufacturing route for obtaining high performance bendable field effect transistors (FET) by embedding silicon (Si) microwires (2.5 μm thick) in layers of solution-processed dielectric and metallic layers. The objective of this study is to explore heterogeneous integration of Si with polymers and to exploit the benefits of both microelectronics and printing technologies. Arrays of Si microwires are developed on silicon on insulator (SOI) wafers and transfer printed to polyimide (PI) substrate through a polydimethylsiloxane (PDMS) carrier stamp. Following the transfer printing of Si microwires, two different processing steps were developed to obtain top gate top contact and back gate top contact FETs. Electrical characterizations indicate devices having mobility as high as 117.5 cm2 V-1 s-1. The fabricated devices were also modeled using SILVACO Atlas. Simulation results show a trend in the electrical response similar to that of experimental results. In addition, a cyclic test was performed to demonstrate the reliability and mechanical robustness of the Si μ-wires on flexible substrates.

Flexible FETs using ultrathin Si microwires embedded in solution processed dielectric and metal layers

International Nuclear Information System (INIS)

Khan, S; Yogeswaran, N; Lorenzelli, L; Taube, W; Dahiya, R

2015-01-01

This work presents a novel manufacturing route for obtaining high performance bendable field effect transistors (FET) by embedding silicon (Si) microwires (2.5 μm thick) in layers of solution-processed dielectric and metallic layers. The objective of this study is to explore heterogeneous integration of Si with polymers and to exploit the benefits of both microelectronics and printing technologies. Arrays of Si microwires are developed on silicon on insulator (SOI) wafers and transfer printed to polyimide (PI) substrate through a polydimethylsiloxane (PDMS) carrier stamp. Following the transfer printing of Si microwires, two different processing steps were developed to obtain top gate top contact and back gate top contact FETs. Electrical characterizations indicate devices having mobility as high as 117.5 cm 2 V −1 s −1 . The fabricated devices were also modeled using SILVACO Atlas. Simulation results show a trend in the electrical response similar to that of experimental results. In addition, a cyclic test was performed to demonstrate the reliability and mechanical robustness of the Si μ-wires on flexible substrates. (paper)

Solid-state diffusion as an efficient doping method for silicon nanowires and nanowire field effect transistors

International Nuclear Information System (INIS)

Moselund, K E; Ghoneim, H; Schmid, H; Bjoerk, M T; Loertscher, E; Karg, S; Signorello, G; Webb, D; Tschudy, M; Beyeler, R; Riel, H

2010-01-01

In this work we investigate doping by solid-state diffusion from a doped oxide layer, obtained by plasma-enhanced chemical vapor deposition (PECVD), as a means for selectively doping silicon nanowires (NWs). We demonstrate both n-type (phosphorous) and p-type (boron) doping up to concentrations of 10 20 cm -3 , and find that this doping mechanism is more efficient for NWs as opposed to planar substrates. We observe no diameter dependence in the range of 25 to 80 nm, which signifies that the NWs are uniformly doped. The drive-in temperature (800-950 deg. C) can be used to adjust the actual doping concentration in the range 2 x 10 18 to 10 20 cm -3 . Furthermore, we have fabricated NMOS and PMOS devices to show the versatility of this approach and the possibility of achieving segmented doping of NWs. The devices show high I on /I off ratios of around 10 7 and, especially for the PMOS, good saturation behavior and low hysteresis.

Functionalization of silicon nanowires by conductive and non-conductive polymers

Science.gov (United States)

Belhousse, S.; Tighilt, F.-Z.; Sam, S.; Lasmi, K.; Hamdani, K.; Tahanout, L.; Megherbi, F.; Gabouze, N.

2017-11-01

The work reports on the development of hybrid devices based on silicon nanowires (SiNW) with polymers and the difference obtained when using conductive and non-conductive polymers. SiNW have attracted much attention due to their importance in understanding the fundamental properties at low dimensionality as well as their potential application in nanoscale devices as in field effect transistors, chemical or biological sensors, battery electrodes and photovoltaics. SiNW arrays were formed using metal assisted chemical etching method. This process is simple, fast and allows obtaining a wide range of silicon nanostructures. Hydrogen-passivated SiNW surfaces show relatively poor stability. Surface modification with organic species confers the desired stability and enhances the surface properties. For this reason, this work proposes a covalent grafting of organic material onto SiNW surface. We have chosen a non-conductive polymer polyvinylpyrrolidone (PVP) and conductive polymers polythiophene (PTh) and polypyrrole (PPy), in order to evaluate the electric effect of the polymers on the obtained materials. The hybrid structures were elaborated by the polymerization of the corresponding conjugated monomers by electrochemical route; this electropolymerization offers several advantages such as simplicity and rapidity. SiNW functionalization by conductive polymers has shown to have a huge effect on the electrical mobility. Hybrid surface morphologies were characterized by scanning electron microscopy (SEM), infrared spectroscopy (FTIR-ATR) and contact angle measurements.

Enhanced ionized impurity scattering in nanowires

Science.gov (United States)

Oh, Jung Hyun; Lee, Seok-Hee; Shin, Mincheol

2013-06-01

The electronic resistivity in silicon nanowires is investigated by taking into account scattering as well as the donor deactivation from the dielectric mismatch. The effects of poorly screened dopant atoms from the dielectric mismatch and variable carrier density in nanowires are found to play a crucial role in determining the nanowire resistivity. Using Green's function method within the self-consistent Born approximation, it is shown that donor deactivation and ionized impurity scattering combined with the charged interface traps successfully to explain the increase in the resistivity of Si nanowires while reducing the radius, measured by Björk et al. [Nature Nanotech. 4, 103 (2009)].

Nanotubes, nanobelts, nanowires, and nanorods of silicon carbide from the wheat husks

Energy Technology Data Exchange (ETDEWEB)

Qadri, S. B.; Rath, B. B.; Gorzkowski, E. P.; Feng, J.; Qadri, S. N.; Caldwell, J. D. [Materials Science and Component Technology Directorate, Naval Research Laboratory, Washington, District of Columbia 20375 (United States)

2015-09-14

Nanotubes, nanowires, nanobelts, and nanorods of SiC were synthesized from the thermal treatment of wheat husks at temperatures in excess of 1450 °C. From the analysis based on x-ray diffraction, Raman spectroscopy, scanning electron microscopy, and transmission electron microscopy, it has been found that the processed samples of wheat husk consisted of 2H and 3C polytypes of SiC exhibiting the nanostructure shapes. These nanostructures of silicon carbide formed from wheat husks are of technological importance for designing advance composites, applications in biotechnology, and electro-optics. The thermodynamics of the formation of SiC is discussed in terms of the rapid solid state reaction between hydrocarbons and silica on the molecular scale, which is inherently present in the wheat husks.

Static friction between silicon nanowires and elastomeric substrates.

Science.gov (United States)

Qin, Qingquan; Zhu, Yong

2011-09-27

This paper reports the first direct measurements of static friction force and interfacial shear strength between silicon (Si) nanowires (NWs) and poly(dimethylsiloxane) (PDMS). A micromanipulator is used to manipulate and deform the NWs under a high-magnification optical microscope in real time. The static friction force is measured based on "the most-bent state" of the NWs. The static friction and interface shear strength are found to depend on the ultraviolet/ozone (UVO) treatment of PDMS. The shear strength starts at 0.30 MPa without UVO treatment, increases rapidly up to 10.57 MPa at 60 min of treatment and decreases for longer treatment. Water contact angle measurements suggest that the UVO-induced hydrophobic-to-hydrophilic conversion of PDMS surface is responsible for the increase in the static friction, while the hydrophobic recovery effect contributes to the decrease. The static friction between NWs and PDMS is of critical relevance to many device applications of NWs including NW-based flexible/stretchable electronics, NW assembly and nanocomposites (e.g., supercapacitors). Our results will enable quantitative interface design and control for such applications. © 2011 American Chemical Society

Laser desorption/ionization from nanostructured surfaces: nanowires, nanoparticle films and silicon microcolumn arrays

International Nuclear Information System (INIS)

Chen Yong; Luo Guanghong; Diao Jiajie; Chornoguz, Olesya; Reeves, Mark; Vertes, Akos

2007-01-01

Due to their optical properties and morphology, thin films formed of nanoparticles are potentially new platforms for soft laser desorption/ionization (SLDI) mass spectrometry. Thin films of gold nanoparticles (with 12±1 nm particle size) were prepared by evaporation-driven vertical colloidal deposition and used to analyze a series of directly deposited polypeptide samples. In this new SLDI method, the required laser fluence for ion detection was equal or less than what was needed for matrix-assisted laser desorption/ionization (MALDI) but the resulting spectra were free of matrix interferences. A silicon microcolumn array-based substrate (a.k.a. black silicon) was developed as a new matrix-free laser desorption ionization surface. When low-resistivity silicon wafers were processed with a 22 ps pulse length 3xω Nd:YAG laser in air, SF 6 or water environment, regularly arranged conical spikes emerged. The radii of the spike tips varied with the processing environment, ranging from approximately 500 nm in water, to ∼2 μm in SF 6 gas and to ∼5 μm in air. Peptide mass spectra directly induced by a nitrogen laser showed the formation of protonated ions of angiotensin I and II, substance P, bradykinin fragment 1-7, synthetic peptide, pro14-arg, and insulin from the processed silicon surfaces but not from the unprocessed areas. Threshold fluences for desorption/ionization were similar to those used in MALDI. Although compared to silicon nanowires the threshold laser pulse energy for ionization is significantly (∼10x) higher, the ease of production and robustness of microcolumn arrays offer complementary benefits

Impact of Channel, Stress-Relaxed Buffer, and S/D Si1- x Ge x Stressor on the Performance of 7-nm FinFET CMOS Design with the Implementation of Stress Engineering

Science.gov (United States)

Othman, Nurul Aida Farhana; Hatta, Sharifah Fatmadiana Wan Muhamad; Soin, Norhayati

2018-04-01

Stress-engineered fin-shaped field effect transistors (FinFET) using germanium (Ge) is a promising performance booster to replace silicon (Si) due to its high holes mobility. This paper presents a three-dimensional simulation by the Sentaurus technology computer-aided design to study the effects of stressors—channel stress, stress-relaxed buffer (SRB), and source/drain (S/D) epitaxial stress—on different bases of FinFET, specifically silicon germanium (SiGe) and Ge-based, whereby the latter is achieved by manipulating the Ge mole fraction inside the three layers; their effects on the devices' figures-of-merits were recorded. The simulation generates an advanced calibration process, by which the drift diffusion simulation was adopted for ballistic transport effects. The results show that current enhancement in p-type FinFET (p-FinFET) with 110% is almost twice that in n-type FinFET (n-FinFET) with 57%, with increasing strain inside the channel suggesting that the use of strain is more effective for holes. In SiGe-based n-FinFET, the use of a high-strained SRB layer can improve the drive current up to 112%, while the high-strain S/D epitaxial for Ge-based p-FinFET can enhance the on-state current to 262%. Further investigations show that the channel and S/D doping are affecting the performances of SiGe-based FinFET with similar importance. It is observed that doping concentrations play an important role in threshold voltage adjustment as well as in drive current and subthreshold leakage improvements.

Growth and applicability of radiation-responsive silica nanowires

Science.gov (United States)

Bettge, Martin

Surface energetics play an important role in processes on the nanoscale. Nanowire growth via vapor-liquid-solid (VLS) mechanism is no exception in this regard. Interfacial and line energies are found to impose some fundamental limits during three-phase nanowire growth and lead to formation of stranded nanowires with fascinating characteristics such as high responsiveness towards ion irradiation. By using two materials with a relatively low surface energy (indium and silicon oxide) this is experimentally and theoretically demonstrated in this doctoral thesis. The augmentation of VLS nanowire growth with ion bombardment enables fabrication of vertically aligned silica nanowires over large areas. Synthesis of their arrays begins with a thin indium film deposited on a Si or SiO 2 surface. At temperatures below 200ºC, the indium film becomes a self-organized seed layer of molten droplets, receiving a flux of atomic silicon by DC magnetron sputtering. Simultaneous vigorous ion bombardment through substrate biasing aligns the growing nanowires vertically and expedites mixing of oxygen and silicon into the indium. The vertical growth rate can reach up to 1000 nm-min-1 in an environment containing only argon and traces of water vapor. Silicon oxide precipitates from each indium seed in the form of multiple thin strands having diameters less than 9 nm and practically independent of droplet size. The strands form a single loose bundle, eventually consolidating to form one vertically aligned nanowire. These observations are in stark contrast to conventional VLS growth in which one liquid droplet precipitates a single solid nanowire and in which the precipitated wire diameter is directly proportional to the droplet diameter. The origin of these differences is revealed through a detailed force balance analysis, analogous to Young's relation, at the three-phase line. The liquid-solid interfacial energy of indium/silica is found to be the largest energy contribution at the three

In situ-growth of silica nanowires in ceramic carbon composites

Directory of Open Access Journals (Sweden)

Rahul Kumar

2017-09-01

Full Text Available An understanding of the processing and microstructure of ceramic–carbon composites is critical to development of these composites for applications needing electrically conducting, thermal shock resistant ceramic materials. In the present study green compacts of carbon ceramic composites were prepared either by slurry processing or dry powder blending of one or more of the three — clay, glass, alumina and carbon black or graphite. The dried green compacts were sintered at 1400 °C in flowing argon. The ceramic carbon composites except the ones without clay addition showed formation of silica nanowires. The silica nanowire formation was observed in both samples prepared by slip casting and dry powder compaction containing either carbon black or graphite. TEM micrographs showed presence of carbon at the core of the silica nanowires indicating that carbon served the role of a catalyst. Selected area electron diffraction (SAED suggested that the silica nanowires are amorphous. Prior studies have reported formation of silica nanowires from silicon, silica, silicon carbide but this is the first report ever on formation of silica nanowires from clay.

Solar cell array for driving MOS type FET gate. MOS gata EFT gate kudoyo taiyo denchi array

Energy Technology Data Exchange (ETDEWEB)

Murakami, S; Yoshida, K; Yoshiki, T; Yamaguchi, Y; Nakayama, T; Owada, Y

1990-03-12

There has been a semiconductor relay utilizing MOS type FET (field effect transistor). Concerning the solar cells used for a semiconductor relay, it is required to separate the cells by forming insulating oxide films first and to form semiconductor layers by using many mask patterns, since a crystal semiconductor is used. Thereby its manufacturing process becomes complicated and laminification as well as thin film formation are difficult, In view of the above, this invention proposes a solar cell array for driving a MOS type FET gate consisting of amorphous silicon semiconductor cells, which are used for a semiconductor relay with solar cells generating electromotive power by the light of a light emitting diode and a MOS type FET that the power output of the above solar cells is supplied to its gate, and which are connected in series with many steps. 9 figs.

Thermally responsive silicon nanowire arrays for native/denatured-protein separation

International Nuclear Information System (INIS)

Wang Hongwei; Wang Yanwei; Yuan Lin; Wang Lei; Yang Weikang; Wu Zhaoqiang; Li Dan; Chen Hong

2013-01-01

We present our findings of the selective adsorption of native and denatured proteins onto thermally responsive, native-protein resistant poly(N-isopropylacrylamide) (PNIPAAm) decorated silicon nanowire arrays (SiNWAs). The PNIPAAm–SiNWAs surface, which shows very low levels of native-protein adsorption, favors the adsorption of denatured proteins. The amount of denatured-protein adsorption is higher at temperatures above the lower critical solution temperature (LCST) of PNIPAAm. Temperature cycling surrounding the LCST, which ensures against thermal denaturation of native proteins, further increases the amount of denatured-protein adsorption. Moreover, the PNIPAAm–SiNWAs surface is able to selectively adsorb denatured protein even from mixtures of different protein species; meanwhile, the amount of native proteins in solution is kept nearly at its original level. It is believed that these results will not only enrich current understanding of protein interactions with PNIPAAm-modified SiNWAs surfaces, but may also stimulate applications of PNIPAAm–SiNWAs surfaces for native/denatured protein separation. (paper)

Quantum-confined nanowires as vehicles for enhanced electrical transport

International Nuclear Information System (INIS)

Mohammad, S Noor

2012-01-01

Electrical transport in semiconductor nanowires taking quantum confinement and dielectric confinement into account has been studied. A distinctly new route has been employed for the study. The fundamental science underlying the model is based on a relationship between the quantum confinement and the structural disorder of the nanowire surface. The role of surface energy and thermodynamic imbalance in nanowire structural disorder has been described. A model for the diameter dependence of energy bandgap of nanowires has been developed. Ionized impurity scattering, dislocation scattering and acoustic phonon scattering have been taken into account to study carrier mobility. A series of calculations on silicon nanowires show that carrier mobility in nanowires can be greatly enhanced by quantum confinement and dielectric confinement. The electron mobility can, for example, be a factor of 2–10 higher at room temperature than the mobility in a free-standing silicon nanowire. The calculated results agree well with almost all experimental and theoretical results available in the literature. They successfully explain experimental observations not understood before. The model is general and applicable to nanowires from all possible semiconductors. It is perhaps the first physical model highlighting the impact of both quantum confinement and dielectric confinement on carrier transport. It underscores the basic causes of thin, lowly doped nanowires in the temperature range 200 K ≤ T ≤ 500 K yielding very high carrier mobility. It suggests that the scattering by dislocations (stacking faults) can be very detrimental for carrier mobility. (paper)

The ZnO-FET Biosensor for Cardiac Troponin I

Science.gov (United States)

Fathil, M. F. M.; Arshad, M. K. Md; Nuzaihan, M. N. M.; Gopinath, Subash C. B.; Ruslinda, A. R.; Hashim, U.

2018-03-01

This paper investigates the influence of substrate-gate coupling on the ZnO-FET biosensor’s sensitivity for detection of cardiac troponin I (cTnI), a ‘gold standard’ biomarker for acute myocardial infarction (AMI). The FET-based device with introduction of substrate-gate coupling on p-type silicon-on-insulator (SOI) substrate is fabricated using conventional lithography processes. An n-type zinc oxide (ZnO) thin film deposited via electron-beam evaporator is used as transducer for bridging the source and drain regions. Surface modifications via functionalization with 3-aminopropyltriethoxysilane (APTES) and glutaraldehyde (GA) as chemical linkers, followed by immobilization of cTnI monoclonal antibody (MAb-cTnI) as bio-receptor on the ZnO thin film allow different concentration of cTnI detection with high selectivity. The device’s sensitivity increases up to 9 %·(g/ml)-1 with the increase of the substrate-gate voltage (VSG) up to -10 V at very low limit of detection (LOD) down to 1.6 fg/ml.

FinFET and UTBB for RF SOI communication systems

Science.gov (United States)

Raskin, Jean-Pierre

2016-11-01

Performance of RF integrated circuit (IC) is directly linked to the analog and high frequency characteristics of the transistors, the quality of the back-end of line process as well as the electromagnetic properties of the substrate. Thanks to the introduction of the trap-rich high-resistivity Silicon-on-Insulator (SOI) substrate on the market, the ICs requirements in term of linearity are fulfilled. Today partially depleted SOI MOSFET is the mainstream technology for RF SOI systems. Future generations of mobile communication systems will require transistors with better high frequency performance at lower power consumption. The advanced MOS transistors in competition are FinFET and Ultra Thin Body and Buried oxide (UTBB) SOI MOSFETs. Both devices have been intensively studied these last years. Most of the reported data concern their digital performance. In this paper, their analog/RF behavior is described and compared. Both show similar characteristics in terms of transconductance, Early voltage, voltage gain, self-heating issue but UTBB outperforms FinFET in terms of cutoff frequencies thanks to their relatively lower fringing parasitic capacitances.

Stretchable Conductive Composites from Cu-Ag Nanowire Felt.

Science.gov (United States)

Catenacci, Matthew J; Reyes, Christopher; Cruz, Mutya A; Wiley, Benjamin J

2018-04-24

Materials that retain a high conductivity under strain are essential for wearable electronics. This article describes a conductive, stretchable composite consisting of a Cu-Ag core-shell nanowire felt infiltrated with a silicone elastomer. This composite exhibits a retention of conductivity under strain that is superior to any composite with a conductivity greater than 1000 S cm -1 . This work also shows how the mechanical properties, conductivity, and deformation mechanism of the composite changes as a function of the stiffness of the silicone matrix. The retention of conductivity under strain was found to decrease as the Young's modulus of the matrix increased. This was attributed to void formation as a result of debonding between the nanowire felt and the elastomer. The nanowire composite was also patterned to create serpentine circuits with a stretchability of 300%.

Self-assisted GaAs nanowires with selectable number density on Silicon without oxide layer

International Nuclear Information System (INIS)

Bietti, S; Somaschini, C; Esposito, L; Sanguinetti, S; Frigeri, C; Fedorov, A; Geelhaar, L

2014-01-01

We present the growth of self-assisted GaAs nanowires (NWs) with selectable number density on bare Si(1 1 1), not covered by the silicon oxide. We determine the number density of the NWs by initially self-assembling GaAs islands on whose top a single NW is nucleated. The number density of the initial GaAs base islands can be tuned by droplet epitaxy and the same degree of control is then transferred to the NWs. This procedure is completely performed during a single growth in an ultra-high vacuum environment and requires neither an oxide layer covering the substrate, nor any pre-patterning technique. (paper)

An in-plane solid-liquid-solid growth mode for self-avoiding lateral silicon nanowires.

Science.gov (United States)

Yu, Linwei; Alet, Pierre-Jean; Picardi, Gennaro; Roca i Cabarrocas, Pere

2009-03-27

We report an in-plane solid-liquid-solid (IPSLS) mode for obtaining self-avoiding lateral silicon nanowires (SiNW) in a reacting-gas-free annealing process, where the growth of SiNWs is guided by liquid indium drops that transform the surrounding a-SiratioH matrix into crystalline SiNWs. The SiNWs can be approximately mm long, with the smallest diameter down to approximately 22 nm. A high growth rate of >10(2) nm/s and rich evolution dynamics are revealed in a real-time in situ scanning electron microscopy observation. A qualitative growth model is proposed to account for the major features of this IPSLS SiNW growth mode.

Molecular dynamics study of the thermal expansion coefficient of silicon

Energy Technology Data Exchange (ETDEWEB)

Nejat Pishkenari, Hossein, E-mail: nejat@sharif.edu; Mohagheghian, Erfan; Rasouli, Ali

2016-12-16

Due to the growing applications of silicon in nano-scale systems, a molecular dynamics approach is employed to investigate thermal properties of silicon. Since simulation results rely upon interatomic potentials, thermal expansion coefficient (TEC) and lattice constant of bulk silicon have been obtained using different potentials (SW, Tersoff, MEAM, and EDIP) and results indicate that SW has a better agreement with the experimental observations. To investigate effect of size on TEC of silicon nanowires, further simulations are performed using SW potential. To this end, silicon nanowires of different sizes are examined and their TEC is calculated by averaging in different directions ([100], [110], [111], and [112]) and various temperatures. Results show that as the size increases, due to the decrease of the surface effects, TEC approaches its bulk value. - Highlights: • MD simulations of TEC and lattice constant of bulk silicon. • Effects of four potentials on the results. • Comparison to experimental data. • Investigating size effect on TEC of silicon nanowires.

Fabrication of GaAs nanowire devices with self-aligning W-gate electrodes using selective-area MOVPE

International Nuclear Information System (INIS)

Ooike, N.; Motohisa, J.; Fukui, T.

2004-01-01

We propose and demonstrate a novel self-aligning process for fabricating the tungsten (W) gate electrode of GaAs nanowire FETs by using selective-area metalorganic vapor phase epitaxy (SA-MOVPE) where SiO 2 /W composite films are used to mask the substrates. First, to study the growth process and its dependence on mask materials, GaAs wire structures were grown on masked substrates partially covered with a single W layer or SiO 2 /W composite films. We found that lateral growth over the masked regions could be suppressed when a wire along the [110] direction and a SiO 2 /W composite mask were used. Using this composite mask, we fabricated GaAs narrow channel FETs using W as a Schottky gate electrode, and we were able to observe FET characteristics at room temperature

Nanowire field effect transistors principles and applications

CERN Document Server

Jeong, Yoon-Ha

2014-01-01

“Nanowire Field Effect Transistor: Basic Principles and Applications” places an emphasis on the application aspects of nanowire field effect transistors (NWFET). Device physics and electronics are discussed in a compact manner, together with the p-n junction diode and MOSFET, the former as an essential element in NWFET and the latter as a general background of the FET. During this discussion, the photo-diode, solar cell, LED, LD, DRAM, flash EEPROM and sensors are highlighted to pave the way for similar applications of NWFET. Modeling is discussed in close analogy and comparison with MOSFETs. Contributors focus on processing, electrostatic discharge (ESD) and application of NWFET. This includes coverage of solar and memory cells, biological and chemical sensors, displays and atomic scale light emitting diodes. Appropriate for scientists and engineers interested in acquiring a working knowledge of NWFET as well as graduate students specializing in this subject.

Tuning Light Emission of a Pressure-Sensitive Silicon/ZnO Nanowires Heterostructure Matrix through Piezo-phototronic Effects.

Science.gov (United States)

Chen, Mengxiao; Pan, Caofeng; Zhang, Taiping; Li, Xiaoyi; Liang, Renrong; Wang, Zhong Lin

2016-06-28

Based on white light emission at silicon (Si)/ZnO hetrerojunction, a pressure-sensitive Si/ZnO nanowires heterostructure matrix light emitting diode (LED) array is developed. The light emission intensity of a single heterostructure LED is tuned by external strain: when the applied stress keeps increasing, the emission intensity first increases and then decreases with a maximum value at a compressive strain of 0.15-0.2%. This result is attributed to the piezo-phototronic effect, which can efficiently modulate the LED emission intensity by utilizing the strain-induced piezo-polarization charges. It could tune the energy band diagrams at the junction area and regulate the optoelectronic processes such as charge carriers generation, separation, recombination, and transport. This study achieves tuning silicon based devices through piezo-phototronic effect.

Synthesis, structure and photoelectrochemical properties of single crystalline silicon nanowire arrays

International Nuclear Information System (INIS)

Dalchiele, E.A.; Martin, F.; Leinen, D.; Marotti, R.E.; Ramos-Barrado, J.R.

2010-01-01

In the present work, n-type silicon nanowire (n-SiNW) arrays have been synthesized by self-assembly electroless metal deposition (EMD) nanoelectrochemistry. The synthesized n-SiNW arrays have been submitted to scanning electron microscopy (SEM), transmission electron microscopy (TEM), high-resolution transmission electron microscopy (HRTEM), X-ray photoelectron spectroscopy (XPS), and optical studies. Initial probes of the solar device conversion properties and the photovoltaic parameters such as short-circuit current, open-circuit potential, and fill factor of the n-SiNW arrays have been explored using a liquid-junction in a photoelectrochemical (PEC) system under white light. Moreover, a direct comparison between the PEC performance of a polished n-Si(100) and the synthesized n-SiNW array photoelectrodes has been done. The PEC performance was significantly enhanced on the n-SiNWs photoelectrodes compared with that on polished n-Si(100).

Silicon nanowires enhanced proliferation and neuronal differentiation of neural stem cell with vertically surface microenvironment.

Science.gov (United States)

Yan, Qiuting; Fang, Lipao; Wei, Jiyu; Xiao, Guipeng; Lv, Meihong; Ma, Quanhong; Liu, Chunfeng; Wang, Wang

2017-09-01

Owing to its biocompatibility, noncytotoxicity, biodegradability and three-dimensional structure, vertically silicon nanowires (SiNWs) arrays are a promising scaffold material for tissue engineering, regenerative medicine and relevant medical applications. Recently, its osteogenic differentiation effects, reorganization of cytoskeleton and regulation of the fate on stem cells have been demonstrated. However, it still remains unknown whether SiNWs arrays could affect the proliferation and neuronal differentiation of neural stem cells (NSCs) or not. In the present study, we have employed vertically aligned SiNWs arrays as culture systems for NSCs and proved that the scaffold material could promote the proliferation and neuronal differentiation of NSCs while maintaining excellent cell viability and stemness. Immunofluorescence imaging analysis, Western blot and RT-PCR results reveal that NSCs proliferation and neuronal differentiation efficiency on SiNWs arrays are significant greater than that on silicon wafers. These results implicate SiNWs arrays could offer a powerful platform for NSCs research and NSCs-based therapy in the field of neural tissue engineering.

Optimization of pH sensing using silicon nanowire field effect transistors with HfO2 as the sensing surface

International Nuclear Information System (INIS)

Zafar, Sufi; D'Emic, Christopher; Afzali, Ali; Fletcher, Benjamin; Zhu, Y; Ning, Tak

2011-01-01

Silicon nanowire field effect transistor sensors with SiO 2 /HfO 2 as the gate dielectric sensing surface are fabricated using a top down approach. These sensors are optimized for pH sensing with two key characteristics. First, the pH sensitivity is shown to be independent of buffer concentration. Second, the observed pH sensitivity is enhanced and is equal to the Nernst maximum sensitivity limit of 59 mV/pH with a corresponding subthreshold drain current change of ∼ 650%/pH. These two enhanced pH sensing characteristics are attributed to the use of HfO 2 as the sensing surface and an optimized fabrication process compatible with silicon processing technology.

Optimization of pH sensing using silicon nanowire field effect transistors with HfO2 as the sensing surface.

Science.gov (United States)

Zafar, Sufi; D'Emic, Christopher; Afzali, Ali; Fletcher, Benjamin; Zhu, Y; Ning, Tak

2011-10-07

Silicon nanowire field effect transistor sensors with SiO(2)/HfO(2) as the gate dielectric sensing surface are fabricated using a top down approach. These sensors are optimized for pH sensing with two key characteristics. First, the pH sensitivity is shown to be independent of buffer concentration. Second, the observed pH sensitivity is enhanced and is equal to the Nernst maximum sensitivity limit of 59 mV/pH with a corresponding subthreshold drain current change of ∼ 650%/pH. These two enhanced pH sensing characteristics are attributed to the use of HfO(2) as the sensing surface and an optimized fabrication process compatible with silicon processing technology.

Rhodium Nanoparticle-mesoporous Silicon Nanowire Nanohybrids for Hydrogen Peroxide Detection with High Selectivity

Science.gov (United States)

Song, Zhiqian; Chang, Hucheng; Zhu, Weiqin; Xu, Chenlong; Feng, Xinjian

2015-01-01

Developing nanostructured electrocatalysts, with low overpotential, high selectivity and activity has fundamental and technical importance in many fields. We report here rhodium nanoparticle and mesoporous silicon nanowire (RhNP@mSiNW) hybrids for hydrogen peroxide (H2O2) detection with high electrocatalytic activity and selectivity. By employing electrodes that loaded with RhNP@mSiNW nanohybrids, interference caused from both many electroactive substances and dissolved oxygen were eliminated by electrochemical assaying at an optimal potential of +75 mV. Furthermore, the electrodes exhibited a high detection sensitivity of 0.53 μA/mM and fast response (< 5 s). This high-performance nanohybrid electrocatalyst has great potential for future practical application in various oxidase-base biosensors. PMID:25588953

ZrTiO4 nanowire growth using membrane-assisted Pechini route

Directory of Open Access Journals (Sweden)

P. R. de Lucena

2014-11-01

Full Text Available The high surface-to-volume ratio of nanowires makes them natural competitors as new device components. In this regard, a current major challenge is to produce quasi-one-dimensional nanostructures composed of well established oxide-based materials. This article reports the synthesis of ZrTiO4 nanowires on a silicon (100 wafer in a single-step deposition/thermal treatment. The template-directed membrane synthesis strategy was associated with the Pechini route and spin-coating deposition technique. ZrTiO4 nanowires were obtained at 700 ˚C with diameters in the range of 80-100 nm. FEG- SEM images were obtained to investigate ZrTiO4 nanowire formation on the silicon surface and energy dispersive x-ray detection (EDS and x-ray diffraction (XRD analyses were performed to confirm the oxide composition and structure.

ZrTiO4 Nanowire Growth Using Membrane-assisted Pechini Route

Directory of Open Access Journals (Sweden)

Poty Rodrigues de Lucena

2016-02-01

Full Text Available The high surface-to-volume ratio of nanowires makes them natural competitors as newer device components. In this regard, a current major challenge is to produce quasi-one-dimensional nanostructures composed of well-established oxide-based materials. This article reports the synthesis of ZrTiO4 nanowires on a silicon (100 wafer in a single-step deposition/thermal treatment. The template-directed membrane synthesis strategy was associated with the Pechini route and spin-coating deposition technique. ZrTiO4 nanowires were obtained at 700 °C with diameters in the range of 80-100 nm. FEGSEM images were obtained to investigate ZrTiO4 nanowire formation on the silicon surface and energy dispersive X-ray detection (EDS and X-ray diffraction (XRD analyses were performed to confirm the oxide composition and structure. 

Functionalization of silicon nanowire surfaces with metal-organic frameworks

KAUST Repository

Liu, Nian

2011-12-28

Metal-organic frameworks (MOFs) and silicon nanowires (SiNWs) have been extensively studied due to their unique properties; MOFs have high porosity and specific surface area with well-defined nanoporous structure, while SiNWs have valuable one-dimensional electronic properties. Integration of the two materials into one composite could synergistically combine the advantages of both materials and lead to new applications. We report the first example of a MOF synthesized on surface-modified SiNWs. The synthesis of polycrystalline MOF-199 (also known as HKUST-1) on SiNWs was performed at room temperature using a step-by-step (SBS) approach, and X-ray photoelectron spectroscopy, X-ray diffraction, scanning electron microscopy, transmission electron microscopy, and energy dispersive spectroscopy elemental mapping were used to characterize the material. Matching of the SiNW surface functional groups with the MOF organic linker coordinating groups was found to be critical for the growth. Additionally, the MOF morphology can by tuned by changing the soaking time, synthesis temperature and precursor solution concentration. This SiNW/MOF hybrid structure opens new avenues for rational design of materials with novel functionalities. © 2011 Tsinghua University Press and Springer-Verlag Berlin Heidelberg.

Ultradense, Deep Subwavelength Nanowire Array Photovoltaics As Engineered Optical Thin Films

KAUST Repository

Tham, Douglas; Heath, James R.

2010-01-01

A photovoltaic device comprised of an array of 20 nm wide, 32 nm pitch array of silicon nanowires is modeled as an optical material. The nanowire array (NWA) has characteristic device features that are deep in the subwavelength regime for light

Effect of rapid oxidation on optical and electrical properties of silicon nanowires obtained by chemical etching

Science.gov (United States)

Karyaoui, M.; Bardaoui, A.; Ben Rabha, M.; Harmand, J. C.; Amlouk, M.

2012-05-01

In the present work, we report the investigation of passivated silicon nanowires (SiNWs) having an average radius of 3.7 μm, obtained by chemical etching of p-type silicon (p-Si). The surface passivation of the SiNWs was performed through a rapid oxidation conducted under a controlled atmosphere at different temperatures and durations. The morphology of the SiNWs was examined using a scanning electron microscope (SEM) that revealed a wave-like structure of dense and vertically aligned one-dimensional silicon nanostructures. On the other hand, optical and electrical characterizations of the SiNWs were studied using a UV-Vis-NIR spectrometer, the Fourier transform infrared spectroscopy (FTIR) and I-V measurements. The reflectance of SiNWs has been dropped to approximately 2% in comparison to that of bare p-Si. This low reflectance slightly increased after carrying out the rapid thermal annealing. The observed behavior was attributed to the formation of a SiO2 layer, as confirmed by FTIR measurements. Finally, the electrical measurements have shown that the rapid oxidation, at certain conditions, contributes to the improvement of the electrical responses of the SiNWs, which can be of great interest for photovoltaic applications.

Nanowire decorated, ultra-thin, single crystalline silicon for photovoltaic devices.

Science.gov (United States)

Aurang, Pantea; Turan, Rasit; Unalan, Husnu Emrah

2017-10-06

Reducing silicon (Si) wafer thickness in the photovoltaic industry has always been demanded for lowering the overall cost. Further benefits such as short collection lengths and improved open circuit voltages can also be achieved by Si thickness reduction. However, the problem with thin films is poor light absorption. One way to decrease optical losses in photovoltaic devices is to minimize the front side reflection. This approach can be applied to front contacted ultra-thin crystalline Si solar cells to increase the light absorption. In this work, homojunction solar cells were fabricated using ultra-thin and flexible single crystal Si wafers. A metal assisted chemical etching method was used for the nanowire (NW) texturization of ultra-thin Si wafers to compensate weak light absorption. A relative improvement of 56% in the reflectivity was observed for ultra-thin Si wafers with the thickness of 20 ± 0.2 μm upon NW texturization. NW length and top contact optimization resulted in a relative enhancement of 23% ± 5% in photovoltaic conversion efficiency.

Electron transport characteristics of silicon nanowires by metal-assisted chemical etching

Energy Technology Data Exchange (ETDEWEB)

Qi, Yangyang; Wang, Zhen; Zhang, Mingliang; Wang, Xiaodong, E-mail: xdwang@semi.ac.cn; Ji, An; Yang, Fuhua [Engineering Research Center for Semiconductor Integrated Technology, Institute of Semiconductors, Chinese Academy of Sciences, Beijing, 100083 (China)

2014-03-15

The electron transport characteristics of silicon nanowires (SiNWs) fabricated by metal-assisted chemical etching with different doping concentrations were studied. By increasing the doping concentration of the starting Si wafer, the resulting SiNWs were prone to have a rough surface, which had important effects on the contact and the electron transport. A metal-semiconductor-metal model and a thermionic field emission theory were used to analyse the current-voltage (I-V) characteristics. Asymmetric, rectifying and symmetric I-V curves were obtained. The diversity of the I-V curves originated from the different barrier heights at the two sides of the SiNWs. For heavily doped SiNWs, the critical voltage was one order of magnitude larger than that of the lightly doped, and the resistance obtained by differentiating the I-V curves at large bias was also higher. These were attributed to the lower electron tunnelling possibility and higher contact barrier, due to the rough surface and the reduced doping concentration during the etching process.

Electron transport characteristics of silicon nanowires by metal-assisted chemical etching

Science.gov (United States)

Qi, Yangyang; Wang, Zhen; Zhang, Mingliang; Wang, Xiaodong; Ji, An; Yang, Fuhua

2014-03-01

The electron transport characteristics of silicon nanowires (SiNWs) fabricated by metal-assisted chemical etching with different doping concentrations were studied. By increasing the doping concentration of the starting Si wafer, the resulting SiNWs were prone to have a rough surface, which had important effects on the contact and the electron transport. A metal-semiconductor-metal model and a thermionic field emission theory were used to analyse the current-voltage (I-V) characteristics. Asymmetric, rectifying and symmetric I-V curves were obtained. The diversity of the I-V curves originated from the different barrier heights at the two sides of the SiNWs. For heavily doped SiNWs, the critical voltage was one order of magnitude larger than that of the lightly doped, and the resistance obtained by differentiating the I-V curves at large bias was also higher. These were attributed to the lower electron tunnelling possibility and higher contact barrier, due to the rough surface and the reduced doping concentration during the etching process.

Silicon nanowire-based tunneling field-effect transistors on flexible plastic substrates.

Science.gov (United States)

Lee, Myeongwon; Koo, Jamin; Chung, Eun-Ae; Jeong, Dong-Young; Koo, Yong-Seo; Kim, Sangsig

2009-11-11

A technique to implement silicon nanowire (SiNW)-based tunneling field-effect transistors (TFETs) on flexible plastic substrates is developed for the first time. The p-i-n configured Si NWs are obtained from an Si wafer using a conventional top-down CMOS-compatible technology, and they are then transferred onto the plastic substrate. Based on gate-controlled band-to-band tunneling (BTBT) as their working principle, the SiNW-based TFETs show normal p-channel switching behavior with a threshold voltage of -1.86 V and a subthreshold swing of 827 mV/dec. In addition, ambipolar conduction is observed due to the presence of the BTBT between the heavily doped p+ drain and n+ channel regions, indicating that our TFETs can operate in the n-channel mode as well. Furthermore, the BTBT generation rates for both the p-channel and n-channel operating modes are nearly independent of the bending state (strain = 0.8%) of the plastic substrate.

Silicon nanowire-based tunneling field-effect transistors on flexible plastic substrates

International Nuclear Information System (INIS)

Lee, Myeongwon; Koo, Jamin; Chung, Eun-Ae; Jeong, Dong-Young; Kim, Sangsig; Koo, Yong-Seo

2009-01-01

A technique to implement silicon nanowire (SiNW)-based tunneling field-effect transistors (TFETs) on flexible plastic substrates is developed for the first time. The p-i-n configured Si NWs are obtained from an Si wafer using a conventional top-down CMOS-compatible technology, and they are then transferred onto the plastic substrate. Based on gate-controlled band-to-band tunneling (BTBT) as their working principle, the SiNW-based TFETs show normal p-channel switching behavior with a threshold voltage of -1.86 V and a subthreshold swing of 827 mV/dec. In addition, ambipolar conduction is observed due to the presence of the BTBT between the heavily doped p + drain and n + channel regions, indicating that our TFETs can operate in the n-channel mode as well. Furthermore, the BTBT generation rates for both the p-channel and n-channel operating modes are nearly independent of the bending state (strain = 0.8%) of the plastic substrate.

Silicon nanowire-based tunneling field-effect transistors on flexible plastic substrates

Energy Technology Data Exchange (ETDEWEB)

Lee, Myeongwon; Koo, Jamin; Chung, Eun-Ae; Jeong, Dong-Young; Kim, Sangsig [Department of Electrical Engineering and Institute for Nano Science, Korea University, 5-1, Anam-Dong, Seongbuk-Gu, Seoul 136-701 (Korea, Republic of); Koo, Yong-Seo, E-mail: sangsig@korea.ac.k [Department of Electrical Engineering, Seokyeong University, 16-1, Jungneung-dong, Seongbuk-gu, Seoul 136-704 (Korea, Republic of)

2009-11-11

A technique to implement silicon nanowire (SiNW)-based tunneling field-effect transistors (TFETs) on flexible plastic substrates is developed for the first time. The p-i-n configured Si NWs are obtained from an Si wafer using a conventional top-down CMOS-compatible technology, and they are then transferred onto the plastic substrate. Based on gate-controlled band-to-band tunneling (BTBT) as their working principle, the SiNW-based TFETs show normal p-channel switching behavior with a threshold voltage of -1.86 V and a subthreshold swing of 827 mV/dec. In addition, ambipolar conduction is observed due to the presence of the BTBT between the heavily doped p{sup +} drain and n{sup +} channel regions, indicating that our TFETs can operate in the n-channel mode as well. Furthermore, the BTBT generation rates for both the p-channel and n-channel operating modes are nearly independent of the bending state (strain = 0.8%) of the plastic substrate.

Modulation Doping of Silicon using Aluminium-induced Acceptor States in Silicon Dioxide

OpenAIRE

K?nig, Dirk; Hiller, Daniel; Gutsch, Sebastian; Zacharias, Margit; Smith, Sean

2017-01-01

All electronic, optoelectronic or photovoltaic applications of silicon depend on controlling majority charge carriers via doping with impurity atoms. Nanoscale silicon is omnipresent in fundamental research (quantum dots, nanowires) but also approached in future technology nodes of the microelectronics industry. In general, silicon nanovolumes, irrespective of their intended purpose, suffer from effects that impede conventional doping due to fundamental physical principles such as out-diffusi...

The design of a new spiking neuron using dual work function silicon nanowire transistors

International Nuclear Information System (INIS)

Bindal, Ahmet; Hamedi-Hagh, Sotoudeh

2007-01-01

A new spike neuron cell is designed using vertically grown, undoped silicon nanowire transistors. This study presents an entire design cycle from designing and optimizing vertical nanowire transistors for minimal power dissipation to realizing a neuron cell and measuring its dynamic power consumption, performance and layout area. The design cycle starts with determining individual metal gate work functions for NMOS and PMOS transistors as a function of wire radius to produce a 300 mV threshold voltage. The wire radius and effective channel length are subsequently varied to find a common body geometry for both transistors that yields smaller than 1 pA OFF current while producing maximum drive currents. A spike neuron cell is subsequently built using these transistors to measure its transient performance, power dissipation and layout area. Post-layout simulation results indicate that the neuron consumes 0.397 μW to generate a +1 V and 1.12 μW to generate a -1 V output pulse for a fan-out of five synapses at 500 MHz; the power dissipation increases by approximately 3 nW for each additional synapse at the output for generating either pulse. The neuron circuit occupies approximately 0.27 μm 2

Arrays of suspended silicon nanowires defined by ion beam implantation: mechanical coupling and combination with CMOS technology

Science.gov (United States)

Llobet, J.; Rius, G.; Chuquitarqui, A.; Borrisé, X.; Koops, R.; van Veghel, M.; Perez-Murano, F.

2018-04-01

We present the fabrication, operation, and CMOS integration of arrays of suspended silicon nanowires (SiNWs). The functional structures are obtained by a top-down fabrication approach consisting in a resistless process based on focused ion beam irradiation, causing local gallium implantation and silicon amorphization, plus selective silicon etching by tetramethylammonium hydroxide, and a thermal annealing process in a boron rich atmosphere. The last step enables the electrical functionality of the irradiated material. Doubly clamped silicon beams are fabricated by this method. The electrical readout of their mechanical response can be addressed by a frequency down-mixing detection technique thanks to an enhanced piezoresistive transduction mechanism. Three specific aspects are discussed: (i) the engineering of mechanically coupled SiNWs, by making use of the nanometer scale overhang that it is inherently-generated with this fabrication process, (ii) the statistical distribution of patterned lateral dimensions when fabricating large arrays of identical devices, and (iii) the compatibility of the patterning methodology with CMOS circuits. Our results suggest that the application of this method to the integration of large arrays of suspended SiNWs with CMOS circuitry is interesting in view of applications such as advanced radio frequency band pass filters and ultra-high-sensitivity mass sensors.

Growth and Raman spectroscopy studies of gold-free catalyzed semiconductor nanowires

Energy Technology Data Exchange (ETDEWEB)

Zardo, Ilaria

2010-12-15

The present Ph.D. thesis proposes two aims: the search for catalysts alternative to gold for the growth of silicon nanowires and the investigation of the structural properties of the gold-free catalyzed Si, Ge, and GaAs nanowires. The successful growth of gold free catalyzed silicon nanowires was obtained using Ga and In as catalyst. Hydrogen plasma conditions were needed during the growth process. We proposed a growth mechanism where the role of the hydrogen plasma is taken into account. The influence of the growth conditions on nanowire growth morphology and structural properties was investigated in detail. The TEM studies showed the occurrence of different kind of twin defects depending on the nanowire growth direction. The intersection of twins in different spatial directions in <111>-oriented nanowires or the periodicity of highly dense twins in <112>-oriented nanowires leads to the formation of hexagonal domains embedded in the diamond silicon structure. A simple crystallographic model which illustrates the formation of the hexagonal phase was proposed. The presence of the hexagonal domains embedded in the diamond silicon structure was investigated also by means of Raman spectroscopy. The measured frequencies of the E2g and A1g modes were found to be in agreement with frequencies expected from phonon dispersion folding. An estimation of the percentage of hexagonal structure with respect to the cubic structure was given. The relative percentage of the two structures was found to change with growth temperature. Spatially resolved Raman scattering experiments were also realized on single Si nanowires. The lattice dynamics of gold-free catalyzed Ge and GaAs nanowires was studied by means of Raman spectroscopy. We performed spatially resolved Raman spectroscopy experiments on single crystalline- amorphous core-shell Ge nanowires. The correlation with TEM studies on nanowires grown under the same conditions and with AFM measurements realized of the same nanowires

FinFET modeling for IC simulation and design

CERN Document Server

Hu, Chenming; Lu, Darsen D

2015-01-01

This book is the first to explain FinFET modeling for IC simulation and the industry standard - BSIM-CMG - describing the rush in demand for advancing the technology from planar to 3D architecture, as now enabled by the approved industry standard. The book gives a strong foundation on the physics and operation of FinFET, details aspects of the BSIM-CMG model such as surface potential, charge and current calculations, and includes a dedicated chapter on parameter extraction procedures, providing a step-by-step approach for the efficient extraction of model parameters. With this book you will learn: * Why you should use FinFET* The physics and operation of FinFET* Details of the FinFET standard model (BSIM-CMG)* Parameter extraction in BSIM-CMG* FinFET circuit design and simulation * Authored by the lead inventor and developer of FinFET, and developers of the BSIM-CM standard model, providing an experts' insight into the specifications of the standard* The first book on the industry-standard FinFET model - BSIM...

Facile fabrication of a silicon nanowire sensor by two size reduction steps for detection of alpha-fetoprotein biomarker of liver cancer

International Nuclear Information System (INIS)

Pham, Van Binh; Pham, Xuan ThanhTung; Phan, Thanh Nhat Khoa; Le, Thi Thanh Tuyen; Dang, Mau Chien

2015-01-01

We present a facile technique that only uses conventional micro-techniques and two size-reduction steps to fabricate wafer-scale silicon nanowire (SiNW) with widths of 200 nm. Initially, conventional lithography was used to pattern SiNW with 2 μm width. Then the nanowire width was decreased to 200 nm by two size-reduction steps with isotropic wet etching. The fabricated SiNW was further investigated when used with nanowire field-effect sensors. The electrical characteristics of the fabricated SiNW devices were characterized and pH sensitivity was investigated. Then a simple and effective surface modification process was carried out to modify SiNW for subsequent binding of a desired receptor. The complete SiNW-based biosensor was then used to detect alpha-fetoprotein (AFP), one of the medically approved biomarkers for liver cancer diagnosis. Electrical measurements showed that the developed SiNW biosensor could detect AFP with concentrations of about 100 ng mL"−"1. This concentration is lower than the necessary AFP concentration for liver cancer diagnosis. (paper)

Facile fabrication of a silicon nanowire sensor by two size reduction steps for detection of alpha-fetoprotein biomarker of liver cancer

Science.gov (United States)

Binh Pham, Van; ThanhTung Pham, Xuan; Nhat Khoa Phan, Thanh; Thanh Tuyen Le, Thi; Chien Dang, Mau

2015-12-01

We present a facile technique that only uses conventional micro-techniques and two size-reduction steps to fabricate wafer-scale silicon nanowire (SiNW) with widths of 200 nm. Initially, conventional lithography was used to pattern SiNW with 2 μm width. Then the nanowire width was decreased to 200 nm by two size-reduction steps with isotropic wet etching. The fabricated SiNW was further investigated when used with nanowire field-effect sensors. The electrical characteristics of the fabricated SiNW devices were characterized and pH sensitivity was investigated. Then a simple and effective surface modification process was carried out to modify SiNW for subsequent binding of a desired receptor. The complete SiNW-based biosensor was then used to detect alpha-fetoprotein (AFP), one of the medically approved biomarkers for liver cancer diagnosis. Electrical measurements showed that the developed SiNW biosensor could detect AFP with concentrations of about 100 ng mL-1. This concentration is lower than the necessary AFP concentration for liver cancer diagnosis.

Probing Stress States in Silicon Nanowires During Electrochemical Lithiation Using In Situ Synchrotron X-Ray Microdiffraction

Directory of Open Access Journals (Sweden)

Imran Ali

2018-04-01

Full Text Available Silicon is considered as a promising anode material for the next-generation lithium-ion battery (LIB due to its high capacity at nanoscale. However, silicon expands up to 300% during lithiation, which induces high stresses and leads to fractures. To design silicon nanostructures that could minimize fracture, it is important to understand and characterize stress states in the silicon nanostructures during lithiation. Synchrotron X-ray microdiffraction has proven to be effective in revealing insights of mechanical stress and other mechanics considerations in small-scale crystalline structures used in many important technological applications, such as microelectronics, nanotechnology, and energy systems. In the present study, an in situ synchrotron X-ray microdiffraction experiment was conducted to elucidate the mechanical stress states during the first electrochemical cycle of lithiation in single-crystalline silicon nanowires (SiNWs in an LIB test cell. Morphological changes in the SiNWs at different levels of lithiation were also studied using scanning electron microscope (SEM. It was found from SEM observation that lithiation commenced predominantly at the top surface of SiNWs followed by further progression toward the bottom of the SiNWs gradually. The hydrostatic stress of the crystalline core of the SiNWs at different levels of electrochemical lithiation was determined using the in situ synchrotron X-ray microdiffraction technique. We found that the crystalline core of the SiNWs became highly compressive (up to -325.5 MPa once lithiation started. This finding helps unravel insights about mechanical stress states in the SiNWs during the electrochemical lithiation, which could potentially pave the path toward the fracture-free design of silicon nanostructure anode materials in the next-generation LIB.

Nanowire FET Based Neural Element for Robotic Tactile Sensing Skin

Directory of Open Access Journals (Sweden)

William Taube Navaraj

2017-09-01

Full Text Available This paper presents novel Neural Nanowire Field Effect Transistors (υ-NWFETs based hardware-implementable neural network (HNN approach for tactile data processing in electronic skin (e-skin. The viability of Si nanowires (NWs as the active material for υ-NWFETs in HNN is explored through modeling and demonstrated by fabricating the first device. Using υ-NWFETs to realize HNNs is an interesting approach as by printing NWs on large area flexible substrates it will be possible to develop a bendable tactile skin with distributed neural elements (for local data processing, as in biological skin in the backplane. The modeling and simulation of υ-NWFET based devices show that the overlapping areas between individual gates and the floating gate determines the initial synaptic weights of the neural network - thus validating the working of υ-NWFETs as the building block for HNN. The simulation has been further extended to υ-NWFET based circuits and neuronal computation system and this has been validated by interfacing it with a transparent tactile skin prototype (comprising of 6 × 6 ITO based capacitive tactile sensors array integrated on the palm of a 3D printed robotic hand. In this regard, a tactile data coding system is presented to detect touch gesture and the direction of touch. Following these simulation studies, a four-gated υ-NWFET is fabricated with Pt/Ti metal stack for gates, source and drain, Ni floating gate, and Al2O3 high-k dielectric layer. The current-voltage characteristics of fabricated υ-NWFET devices confirm the dependence of turn-off voltages on the (synaptic weight of each gate. The presented υ-NWFET approach is promising for a neuro-robotic tactile sensory system with distributed computing as well as numerous futuristic applications such as prosthetics, and electroceuticals.

Two-Copy Wavelength Conversion of an 80 Gbit/s Serial Data Signal Using Cross-Phase Modulation in a Silicon Nanowire and Detailed Pump-Probe Characterisation

DEFF Research Database (Denmark)

Ji, Hua; Cleary, C. S.; Dailey, J. M.

2012-01-01

We experimentally demonstrate 80 Gbit/s wavelength conversion to two copies by simultaneously extracting the blue- and red-shifted sidebands from XPM in a silicon nanowire. Bit error rates of 10-9 with only ~2 dB power penalty is achieved for both sidebands. Detailed pump-probe characterisation r...

Silicon Nanowire/Polymer Hybrid Solar Cell-Supercapacitor: A Self-Charging Power Unit with a Total Efficiency of 10.5.

Science.gov (United States)

Liu, Ruiyuan; Wang, Jie; Sun, Teng; Wang, Mingjun; Wu, Changsheng; Zou, Haiyang; Song, Tao; Zhang, Xiaohong; Lee, Shuit-Tong; Wang, Zhong Lin; Sun, Baoquan

2017-07-12

An integrated self-charging power unit, combining a hybrid silicon nanowire/polymer heterojunction solar cell with a polypyrrole-based supercapacitor, has been demonstrated to simultaneously harvest solar energy and store it. By efficiency enhancement of the hybrid nanowire solar cells and a dual-functional titanium film serving as conjunct electrode of the solar cell and supercapacitor, the integrated system is able to yield a total photoelectric conversion to storage efficiency of 10.5%, which is the record value in all the integrated solar energy conversion and storage system. This system may not only serve as a buffer that diminishes the solar power fluctuations from light intensity, but also pave its way toward cost-effective high efficiency self-charging power unit. Finally, an integrated device based on ultrathin Si substrate is demonstrated to expand its feasibility and potential application in flexible energy conversion and storage devices.

Structural and photoluminescence properties of silicon nanowires extracted by means of a centrifugation process from plasma torch synthesized silicon nanopowder

Science.gov (United States)

Le Borgne, Vincent; Agati, Marta; Boninelli, Simona; Castrucci, Paola; De Crescenzi, Maurizio; Dolbec, Richard; El Khakani, My Ali

2017-07-01

We report on a method for the extraction of silicon nanowires (SiNWs) from the by-product of a plasma torch based spheroidization process of silicon. This by-product is a nanopowder which consists of a mixture of SiNWs and silicon particles. By optimizing a centrifugation based process, we were able to extract substantial amounts of highly pure Si nanomaterials (mainly SiNWs and Si nanospheres (SiNSs)). While the purified SiNWs were found to have typical outer diameters in the 10-15 nm range and lengths of up to several μm, the SiNSs have external diameters in the 10-100 nm range. Interestingly, the SiNWs are found to have a thinner Si core (2-5 nm diam.) and an outer silicon oxide shell (with a typical thickness of ˜5-10 nm). High resolution transmission electron microscopy (HRTEM) observations revealed that many SiNWs have a continuous cylindrical core, whereas others feature a discontinuous core consisting of a chain of Si nanocrystals forming a sort of ‘chaplet-like’ structures. These plasma-torch-produced SiNWs are highly pure with no trace of any metal catalyst, suggesting that they mostly form through SiO-catalyzed growth scheme rather than from metal-catalyzed path. The extracted Si nanostructures are shown to exhibit a strong photoluminescence (PL) which is found to blue-shift from 950 to 680 nm as the core size of the Si nanostructures decreases from ˜5 to ˜3 nm. This near IR-visible PL is shown to originate from quantum confinement (QC) in Si nanostructures. Consistently, the sizes of the Si nanocrystals directly determined from HRTEM images corroborate well with those expected by QC theory.

Atomic Layer Deposition Alumina-Passivated Silicon Nanowires: Probing the Transition from Electrochemical Double-Layer Capacitor to Electrolytic Capacitor.

Science.gov (United States)

Gaboriau, Dorian; Boniface, Maxime; Valero, Anthony; Aldakov, Dmitry; Brousse, Thierry; Gentile, Pascal; Sadki, Said

2017-04-19

Silicon nanowires were coated by a 1-5 nm thin alumina layer by atomic layer deposition (ALD) in order to replace poorly reproducible and unstable native silicon oxide by a highly conformal passivating alumina layer. The surface coating enabled probing the behavior of symmetric devices using such electrodes in the EMI-TFSI electrolyte, allowing us to attain a large cell voltage up to 6 V in ionic liquid, together with very high cyclability with less than 4% capacitance fade after 10 6 charge/discharge cycles. These results yielded fruitful insights into the transition between an electrochemical double-layer capacitor behavior and an electrolytic capacitor behavior. Ultimately, thin ALD dielectric coatings can be used to obtain hybrid devices exhibiting large cell voltage and excellent cycle life of dielectric capacitors, while retaining energy and power densities close to the ones displayed by supercapacitors.

Hierarchical silicon nanowires-carbon textiles matrix as a binder-free anode for high-performance advanced lithium-ion batteries

Science.gov (United States)

Liu, Bin; Wang, Xianfu; Chen, Haitian; Wang, Zhuoran; Chen, Di; Cheng, Yi-Bing; Zhou, Chongwu; Shen, Guozhen

2013-01-01

Toward the increasing demands of portable energy storage and electric vehicle applications, the widely used graphite anodes with significant drawbacks become more and more unsuitable. Herein, we report a novel scaffold of hierarchical silicon nanowires-carbon textiles anodes fabricated via a facile method. Further, complete lithium-ion batteries based on Si and commercial LiCoO2 materials were assembled to investigate their corresponding across-the-aboard performances, demonstrating their enhanced specific capacity (2950 mAh g−1 at 0.2 C), good repeatability/rate capability (even >900 mAh g−1 at high rate of 5 C), long cycling life, and excellent stability in various external conditions (curvature, temperature, and humidity). Above results light the way to principally replacing graphite anodes with silicon-based electrodes which was confirmed to have better comprehensive performances. PMID:23572030

Low-temperature grown indium oxide nanowire-based antireflection coatings for multi-crystalline silicon solar cells

Energy Technology Data Exchange (ETDEWEB)

Wang, Yu-Cian; Chen, Chih-Yao; Chen, I Chen [Institute of Materials Science and Engineering, National Central University, Taoyuan (China); Kuo, Cheng-Wen; Kuan, Ta-Ming; Yu, Cheng-Yeh [TSEC Corporation, Hsinchu (China)

2016-08-15

Light harvesting by indium oxide nanowires (InO NWs) as an antireflection layer on multi-crystalline silicon (mc-Si) solar cells has been investigated. The low-temperature growth of InO NWs was performed in electron cyclotron resonance (ECR) plasma with an O{sub 2}-Ar system using indium nanocrystals as seed particles via the self-catalyzed growth mechanism. The size-dependence of antireflection properties of InO NWs was studied. A considerable enhancement in short-circuit current (from 35.39 to 38.33 mA cm{sup -2}) without deterioration of other performance parameters is observed for mc-Si solar cells coated with InO NWs. (copyright 2016 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim)

Simulation of nucleation and growth of atomic layer deposition phosphorus for doping of advanced FinFETs

International Nuclear Information System (INIS)

Seidel, Thomas E.; Goldberg, Alexander; Halls, Mat D.; Current, Michael I.

2016-01-01

Simulations for the nucleation and growth of phosphorus films were carried out using density functional theory. The surface was represented by a Si 9 H 12 truncated cluster surface model with 2 × 1-reconstructured (100) Si-OH terminations for the initial reaction sites. Chemistries included phosphorous halides (PF 3 , PCl 3 , and PBr 3 ) and disilane (Si 2 H 6 ). Atomic layer deposition (ALD) reaction sequences were illustrated with three-dimensional molecular models using sequential PF 3 and Si 2 H 6 reactions and featuring SiFH 3 as a byproduct. Exothermic reaction pathways were developed for both nucleation and growth for a Si-OH surface. Energetically favorable reactions for the deposition of four phosphorus atoms including lateral P–P bonding were simulated. This paper suggests energetically favorable thermodynamic reactions for the growth of elemental phosphorus on (100) silicon. Phosphorus layers made by ALD are an option for doping advanced fin field-effect transistors (FinFETs). Phosphorus may be thermally diffused into the silicon or recoil knocked in; simulations of the recoil profile of phosphorus into a FinFET surface are illustrated

Quantum Coherent States and Path Integral Method to Stochastically Determine the Anisotropic Volume Expansion in Lithiated Silicon Nanowires

Directory of Open Access Journals (Sweden)

Donald C. Boone

2017-10-01

Full Text Available This computational research study will analyze the multi-physics of lithium ion insertion into a silicon nanowire in an attempt to explain the electrochemical kinetics at the nanoscale and quantum level. The electron coherent states and a quantum field version of photon density waves will be the joining theories that will explain the electron-photon interaction within the lithium-silicon lattice structure. These two quantum particles will be responsible for the photon absorption rate of silicon atoms that are hypothesized to be the leading cause of breaking diatomic silicon covalent bonds that ultimately leads to volume expansion. It will be demonstrated through the combination of Maxwell stress tensor, optical amplification and path integrals that a stochastic analyze using a variety of Poisson distributions that the anisotropic expansion rates in the <110>, <111> and <112> orthogonal directions confirms the findings ascertained in previous works made by other research groups. The computational findings presented in this work are similar to those which were discovered experimentally using transmission electron microscopy (TEM and simulation models that used density functional theory (DFT and molecular dynamics (MD. The refractive index and electric susceptibility parameters of lithiated silicon are interwoven in the first principle theoretical equations and appears frequently throughout this research presentation, which should serve to demonstrate the importance of these parameters in the understanding of this component in lithium ion batteries.

Piezoresistance of top-down suspended Si nanowires

International Nuclear Information System (INIS)

Koumela, A; Mercier, D; Dupre, C; Jourdan, G; Marcoux, C; Ollier, E; Duraffourg, L; Purcell, S T

2011-01-01

Measurements of the gauge factor of suspended, top-down silicon nanowires are presented. The nanowires are fabricated with a CMOS compatible process and with doping concentrations ranging from 2 x 10 20 down to 5 x 10 17 cm -3 . The extracted gauge factors are compared with results on identical non-suspended nanowires and with state-of-the-art results. An increase of the gauge factor after suspension is demonstrated. For the low doped nanowires a value of 235 is measured. Particular attention was paid throughout the experiments to distinguishing real resistance change due to strain modulation from resistance fluctuations due to charge trapping. Furthermore, a numerical model correlating surface charge density with the gauge factor is presented. Comparison of the simulations with experimental measurements shows the validity of this approach. These results contribute to a deeper understanding of the piezoresistive effect in Si nanowires.

InGaN/GaN Nanowire LEDs and Lasers

KAUST Repository

Zhao, Chao

2016-01-01

The large specific surface, and the associated high density of surface states was found to limit the light output power and quantum efficiency of nanowire-array devices, despite their potential for addressing the “green-gap” and efficiency-droop issues. The phonon and carrier confinement in nanowires also led to junction heating, and reduced heat dissipation. In this paper, we will present our studies on effective surface states passivation in InGaN/GaN quantum-disks (Qdisks)-in-nanowire light-emitting diodes (LEDs) and lasers grown on silicon (Si), as well as our recent work on nanowires LEDs grown on bulk-metal, a non-conventional substrate.

Silicon nanotube field effect transistor with core-shell gate stacks for enhanced high-performance operation and area scaling benefits

KAUST Repository

Fahad, Hossain M.; Smith, Casey; Rojas, Jhonathan Prieto; Hussain, Muhammad Mustafa

2011-01-01

We introduce the concept of a silicon nanotube field effect transistor whose unique core-shell gate stacks help achieve full volume inversion by giving a surge in minority carrier concentration in the near vicinity of the ultrathin channel and at the same time rapid roll-off at the source and drain junctions constituting velocity saturation-induced higher drive current-enhanced high performance per device with efficient real estate consumption. The core-shell gate stacks also provide superior short channel effects control than classical planar metal oxide semiconductor field effect transistor (MOSFET) and gate-all-around nanowire FET. The proposed device offers the true potential to be an ideal blend for quantum ballistic transport study of device property control by bottom-up approach and high-density integration compatibility using top-down state-of-the-art complementary metal oxide semiconductor flow. © 2011 American Chemical Society.

Silicon nanotube field effect transistor with core-shell gate stacks for enhanced high-performance operation and area scaling benefits

KAUST Repository

Fahad, Hossain M.

2011-10-12

We introduce the concept of a silicon nanotube field effect transistor whose unique core-shell gate stacks help achieve full volume inversion by giving a surge in minority carrier concentration in the near vicinity of the ultrathin channel and at the same time rapid roll-off at the source and drain junctions constituting velocity saturation-induced higher drive current-enhanced high performance per device with efficient real estate consumption. The core-shell gate stacks also provide superior short channel effects control than classical planar metal oxide semiconductor field effect transistor (MOSFET) and gate-all-around nanowire FET. The proposed device offers the true potential to be an ideal blend for quantum ballistic transport study of device property control by bottom-up approach and high-density integration compatibility using top-down state-of-the-art complementary metal oxide semiconductor flow. © 2011 American Chemical Society.

Lateral nanowire/nanobelt based nanogenerators, piezotronics and piezo-phototronics

KAUST Repository

Wang, Zhong Lin

2010-11-01

Relying on the piezopotential created in ZnO under straining, nanogenerators, piezotronics and piezo-phototronics developed based on laterally bonded nanowires on a polymer substrate have been reviewed. The principle of the nanogenerator is a transient flow of electrons in external load as driven by the piezopotential created by dynamic straining. By integrating the contribution made by millions of nanowires, the output voltage has been raised to 1.2 V. Consequently, self-powered nanodevices have been demonstrated. This is an important platform technology for the future sensor network and the internet of things. Alternatively, the piezopotential can act as a gate voltage that can tune/gate the transport process of the charge carriers in the nanowire, which is a gate-electrode free field effect transistor (FET). The device fabricated based on this principle is called the piezotronic device. Piezo-phototronic effect is about the tuning and controlling of electro-optical processes by strain induced piezopotential. The piezotronic, piezophotonic and pieozo-phototronic devices are focused on low frequency applications in areas involving mechanical actions, such as MEMS/NEMS, nanorobotics, sensors, actuators and triggers. © 2010 Elsevier B.V. All rights reserved.

Effects of buffer composition and dilution on nanowire field-effect biosensors

International Nuclear Information System (INIS)

Lloret, Noémie; Frederiksen, Rune S; Møller, Thor C; Rieben, Nathalie I; Martinez, Karen L; Upadhyay, Shivendra; Nygård, Jesper; De Vico, Luca; Jensen, Jan H

2013-01-01

Nanowire-based field-effect transistors (FETs) can be used as ultra-sensitive and label-free biosensors for detecting protein–protein interactions. A way to increase the performance of such sensors is to dilute the sensing buffer drastically. However, we show here that this can have an important effect on the function of the proteins. Moreover, it is demonstrated that this dilution significantly affects the pH stability of the sensing buffer, which consequently impacts the charge of the protein and thus the response and signal-to-noise ratio in the sensing experiments. Three model systems are investigated experimentally to illustrate the impact on ligand–protein and protein–protein interactions. Simulations are performed to illustrate the effect on the performance of the sensors. Combining various parameters, the current study provides a means for evaluating and selecting the most appropriate buffer composition for bioFET measurements. (paper)

Synthesis and analysis of silicon nanowire below Si-Au eutectic temperatures using very high frequency plasma enhanced chemical vapor deposition

International Nuclear Information System (INIS)

Hamidinezhad, Habib; Wahab, Yussof; Othaman, Zulkafli; Ismail, Abd Khamim

2011-01-01

Silicon nanowires (SiNWs) were synthesized from pure silane precursor gas and Au nanoparticles catalyst at below Au-Si eutectic temperature. The SiNWs were grown onto Si (1 1 1) substrates using very high frequency plasma enhanced chemical vapor deposition via a vapor-solid-solid mechanism at temperatures ranging from 363 to 230 deg. C. The morphology of the synthesized SiNWs was characterized by means of field emission scanning electron microscope equipped with energy dispersive X-ray, high resolution transmission electron microscopy, X-ray diffraction technique and Raman spectroscope. Results demonstrated that the SiNWs can be grown at the temperature as low as 250 deg. C. In addition, it was revealed that the grown wires were silicon-crystallized.

Diagnosis of phosphorus monolayer doping in silicon based on nanowire electrical characterisation

Science.gov (United States)

Duffy, Ray; Ricchio, Alessio; Murphy, Ruaidhrí; Maxwell, Graeme; Murphy, Richard; Piaszenski, Guido; Petkov, Nikolay; Hydes, Alan; O'Connell, Dan; Lyons, Colin; Kennedy, Noel; Sheehan, Brendan; Schmidt, Michael; Crupi, Felice; Holmes, Justin D.; Hurley, Paul K.; Connolly, James; Hatem, Chris; Long, Brenda

2018-03-01

The advent of high surface-to-volume ratio devices has necessitated a revised approach to parameter extraction and process evaluation in field-effect transistor technologies. In this work, active doping concentrations are extracted from the electrical analysis of Si nanowire devices with high surface-to-volume ratios. Nanowire resistance and Si resistivity are extracted, by first extracting and subtracting out the contact resistance. Resistivity (ρ) is selected as the benchmark parameter to compare different doping processes with each other. The impacts of nanowire diameter scaling to 10 nm and of nanowire spacing scaling to resistivity and higher dopant activation, with dependencies on the nanowire width greater than on nanowire spacing. Limitations in ADP P monolayer doping with a SiO2 cap are due to the difficulties in dopant incorporation, as it is based on in-diffusion, and P atoms must overcome a potential barrier on the Si surface.

Thin film silicon on silicon nitride for radiation hardened dielectrically isolated MISFET's

International Nuclear Information System (INIS)

Neamen, D.; Shedd, W.; Buchanan, B.

1975-01-01

The permanent ionizing radiation effects resulting from charge trapping in a silicon nitride isolation dielectric have been determined for a total ionizing dose up to 10 7 rads (Si). Junction FET's, whose active channel region is directly adjacent to the silicon-silicon nitride interface, were used to measure the effects of the radiation induced charge trapping in the Si 3 N 4 isolation dielectric. The JFET saturation current and channel conductance versus junction gate voltage and substrate voltage were characterized as a function of the total ionizing radiation dose. The experimental results on the Si 3 N 4 are compared to results on similar devices with SiO 2 dielectric isolation. The ramifications of using the silicon nitride for fabricating radiation hardened dielectrically isolated MIS devices are discussed

Ultralow power complementary inverter circuits using axially doped p- and n-channel Si nanowire field effect transistors.

Science.gov (United States)

Van, Ngoc Huynh; Lee, Jae-Hyun; Whang, Dongmok; Kang, Dae Joon

2016-06-09

We have successfully synthesized axially doped p- and n-type regions on a single Si nanowire (NW). Diodes and complementary metal-oxide-semiconductor (CMOS) inverter devices using single axial p- and n-channel Si NW field-effect transistors (FETs) were fabricated. We show that the threshold voltages of both p- and n-channel Si NW FETs can be lowered to nearly zero by effectively controlling the doping concentration. Because of the high performance of the p- and n-type Si NW channel FETs, especially with regard to the low threshold voltage, the fabricated NW CMOS inverters have a low operating voltage (<3 V) while maintaining a high voltage gain (∼6) and ultralow static power dissipation (≤0.3 pW) at an input voltage of ±3 V. This result offers a viable way for the fabrication of a high-performance high-density logic circuit using a low-temperature fabrication process, which makes it suitable for flexible electronics.

Optical properties of nanowire metamaterials with gain

DEFF Research Database (Denmark)

Isidio de Lima, Joaquim Junior; Adam, Jost; Rego, Davi

2016-01-01

The transmittance, reflectance and absorption of a nanowire metamaterial with optical gain are numerically simulated and investigated. It is assumed that the metamaterial is represented by aligned silver nanowires embedded into a semiconductor matrix, made of either silicon or gallium phosphide....... The gain in the matrix is modeled by adding a negative imaginary part to the dielectric function of the semiconductor. It is found that the optical coefficients of the metamaterial depend on the gain magnitude in a non-trivial way: they can both increase and decrease with gain depending on the lattice...... constant of the metamaterial. This peculiar behavior is explained by the field redistribution between the lossy metal nanowires and the amplifying matrix material. These findings are significant for a proper design of nanowire metamaterials with low optical losses for diverse applications....

Room to high temperature measurements of flexible SOI FinFETs with sub-20-nm fins

KAUST Repository

Diab, Amer El Hajj

2014-12-01

We report the temperature dependence of the core electrical parameters and transport characteristics of a flexible version of fin field-effect transistor (FinFET) on silicon-on-insulator (SOI) with sub-20-nm wide fins and high-k/metal gate-stacks. For the first time, we characterize them from room to high temperature (150 °C) to show the impact of temperature variation on drain current, gate leakage current, and transconductance. Variation of extracted parameters, such as low-field mobility, subthreshold swing, threshold voltage, and ON-OFF current characteristics, is reported too. Direct comparison is made to a rigid version of the SOI FinFETs. The mobility degradation with temperature is mainly caused by phonon scattering mechanism. The overall excellent devices performance at high temperature after release is outlined proving the suitability of truly high-performance flexible inorganic electronics with such advanced architecture.

Effects of lithium insertion on thermal conductivity of silicon nanowires

International Nuclear Information System (INIS)

Xu, Wen; Zhang, Gang; Li, Baowen

2015-01-01

Recently, silicon nanowires (SiNWs) have been applied as high-performance Li battery anodes, since they can overcome the pulverization and mechanical fracture during lithiation. Although thermal stability is one of the most important parameters that determine safety of Li batteries, thermal conductivity of SiNWs with Li insertion remains unclear. In this letter, using molecular dynamics simulations, we study room temperature thermal conductivity of SiNWs with Li insertion. It is found that compared with the pristine SiNW, there is as much as 60% reduction in thermal conductivity with 10% concentration of inserted Li atoms, while under the same impurity concentration the reduction in thermal conductivity of the mass-disordered SiNW is only 30%. With lattice dynamics calculations and normal mode decomposition, it is revealed that the phonon lifetimes in SiNWs decrease greatly due to strong scattering of phonons by vibrational modes of Li atoms, especially for those high frequency phonons. The observed strong phonon scattering phenomenon in Li-inserted SiNWs is similar to the phonon rattling effect. Our study serves as an exploration of thermal properties of SiNWs as Li battery anodes or weakly coupled with impurity atoms

Ultra-Low-Power Design and Hardware Security Using Emerging Technologies for Internet of Things

Directory of Open Access Journals (Sweden)

Jiann-Shiun Yuan

2017-09-01

Full Text Available In this review article for Internet of Things (IoT applications, important low-power design techniques for digital and mixed-signal analog–digital converter (ADC circuits are presented. Emerging low voltage logic devices and non-volatile memories (NVMs beyond CMOS are illustrated. In addition, energy-constrained hardware security issues are reviewed. Specifically, light-weight encryption-based correlational power analysis, successive approximation register (SAR ADC security using tunnel field effect transistors (FETs, logic obfuscation using silicon nanowire FETs, and all-spin logic devices are highlighted. Furthermore, a novel ultra-low power design using bio-inspired neuromorphic computing and spiking neural network security are discussed.

Electron transport characteristics of silicon nanowires by metal-assisted chemical etching

Directory of Open Access Journals (Sweden)

Yangyang Qi

2014-02-01

Full Text Available The electron transport characteristics of silicon nanowires (SiNWs fabricated by metal-assisted chemical etching with different doping concentrations were studied. By increasing the doping concentration of the starting Si wafer, the resulting SiNWs were prone to have a rough surface, which had important effects on the contact and the electron transport. A metal-semiconductor-metal model and a thermionic field emission theory were used to analyse the current-voltage (I-V characteristics. Asymmetric, rectifying and symmetric I-V curves were obtained. The diversity of the I-V curves originated from the different barrier heights at the two sides of the SiNWs. For heavily doped SiNWs, the critical voltage was one order of magnitude larger than that of the lightly doped, and the resistance obtained by differentiating the I-V curves at large bias was also higher. These were attributed to the lower electron tunnelling possibility and higher contact barrier, due to the rough surface and the reduced doping concentration during the etching process.

Self-assembly of silicon nanowires studied by advanced transmission electron microscopy

Directory of Open Access Journals (Sweden)

Marta Agati

2017-02-01

Full Text Available Scanning transmission electron microscopy (STEM was successfully applied to the analysis of silicon nanowires (SiNWs that were self-assembled during an inductively coupled plasma (ICP process. The ICP-synthesized SiNWs were found to present a Si–SiO2 core–shell structure and length varying from ≈100 nm to 2–3 μm. The shorter SiNWs (maximum length ≈300 nm were generally found to possess a nanoparticle at their tip. STEM energy dispersive X-ray (EDX spectroscopy combined with electron tomography performed on these nanostructures revealed that they contain iron, clearly demonstrating that the short ICP-synthesized SiNWs grew via an iron-catalyzed vapor–liquid–solid (VLS mechanism within the plasma reactor. Both the STEM tomography and STEM-EDX analysis contributed to gain further insight into the self-assembly process. In the long-term, this approach might be used to optimize the synthesis of VLS-grown SiNWs via ICP as a competitive technique to the well-established bottom-up approaches used for the production of thin SiNWs.

Defect level characterization of silicon nanowire arrays: Towards novel experimental paradigms

Energy Technology Data Exchange (ETDEWEB)

Carapezzi, Stefania; Castaldini, Antonio; Cavallini, Anna [Department of Physics and Astronomy, University of Bologna, V.le Berti Pichat 6/2, Bologna (Italy); Irrera, Alessia [IPCF CNR, Viale Stagno D' Alcontres n. 37-98158, Messina, Italy and MATIS IMM CNR, Viale Santa Sofia n. 64, 95123 Catania (Italy)

2014-02-21

The huge amount of knowledge, and infrastructures, brought by silicon (Si) technology, make Si Nanowires (NWs) an ideal choice for nano-electronic Si-based devices. This, in turn, challenges the scientific research to adapt the technical and theoretical paradigms, at the base of established experimental techniques, in order to probe the properties of these systems. Metal-assisted wet-Chemical Etching (MaCE) [1, 2] is a promising fast, easy and cheap method to grow high aspect-ratio aligned Si NWs. Further, contrary to other fabrication methods, this method avoids the possible detrimental effects related to Au diffusion into NWs. We investigated the bandgap level diagram of MaCE Si NW arrays, phosphorous-doped, by means of Deep Level Transient Spectroscopy. The presence of both shallow and deep levels has been detected. The results have been examined in the light of the specificity of the MaCE growth. The study of the electronic levels in Si NWs is, of course, of capital importance in view of the integration of Si NW arrays as active layers in actual devices.

Temperature and directional dependences of the infrared dielectric function of free standing silicon nanowire

Energy Technology Data Exchange (ETDEWEB)

Kazan, M.; Bruyant, A.; Sedaghat, Z.; Arnaud, L.; Blaize, S.; Royer, P. [Laboratoire de Nanotechnologie et d' Instrumentation Optique, Institut Charles Delaunay, Universite de Technologie de Troyes, CNRS FRE 2848, 12 Rue Marie Curie, 10010 Troyes, Cedex (France)

2011-03-15

An approach to calculate the infrared dielectric function of semiconductor nanostructures is presented and applied to silicon (Si) nanowires (NW's). The phonon modes symmetries and frequencies are calculated by means of the elastic continuum medium theory. The modes strengths and damping are calculated from a model for lattice dynamics and perturbation theory. The data are used in anisotropic Lorentz oscillator model to generate the temperature and directional dependences of the infrared dielectric function of free standing Si NW's. Our results showed that in the direction perpendicular to the NW axis, the complex dielectric function is identical to that of bulk Si. However, along the NW axis, the infrared dielectric function is a strong function of the wavelength. (copyright 2011 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim) (orig.)

Improved surface-roughness scattering and mobility models for multi-gate FETs with arbitrary cross-section and biasing scheme

Science.gov (United States)

Lizzit, D.; Badami, O.; Specogna, R.; Esseni, D.

2017-06-01

We present a new model for surface roughness (SR) scattering in n-type multi-gate FETs (MuGFETs) and gate-all-around nanowire FETs with fairly arbitrary cross-sections, its implementation in a complete device simulator, and the validation against experimental electron mobility data. The model describes the SR scattering matrix elements as non-linear transformations of interface fluctuations, which strongly influences the root mean square value of the roughness required to reproduce experimental mobility data. Mobility simulations are performed via the deterministic solution of the Boltzmann transport equation for a 1D-electron gas and including the most relevant scattering mechanisms for electronic transport, such as acoustic, polar, and non-polar optical phonon scattering, Coulomb scattering, and SR scattering. Simulation results show the importance of accounting for arbitrary cross-sections and biasing conditions when compared to experimental data. We also discuss how mobility is affected by the shape of the cross-section as well as by its area in gate-all-around and tri-gate MuGFETs.

Droop-free AlxGa1-xN/AlyGa1-yN quantum-disks-in-nanowires ultraviolet LED emitting at 337 nm on metal/silicon substrates

KAUST Repository

Janjua, Bilal

2017-01-18

Currently the AlGaN-based ultraviolet (UV) solid-state lighting research suffers from numerous challenges. In particular, low internal quantum efficiency, low extraction efficiency, inefficient doping, large polarization fields, and high dislocation density epitaxy constitute bottlenecks in realizing high power devices. Despite the clear advantage of quantum-confinement nanostructure, it has not been widely utilized in AlGaN-based nanowires. Here we utilize the self-assembled nanowires (NWs) with embedding quantum-disks (Qdisks) to mitigate these issues, and achieve UV emission of 337 nm at 32 A/cm (80 mA in 0.5 × 0.5 mm device), a turn-on voltage of ∼5.5 V and droop-free behavior up to 120 A/cm of injection current. The device was grown on a titanium-coated n-type silicon substrate, to improve current injection and heat dissipation. A narrow linewidth of 11.7 nm in the electroluminescence spectrum and a strong wavefunctions overlap factor of 42% confirm strong quantum confinement within uniformly formed AlGaN/AlGaN Qdisks, verified using transmission electron microscopy (TEM). The nitride-based UV nanowires light-emitting diodes (NWs-LEDs) grown on low cost and scalable metal/silicon template substrate, offers a scalable, environment friendly and low cost solution for numerous applications, such as solid-state lighting, spectroscopy, medical science and security.

Droop-free AlxGa1-xN/AlyGa1-yN quantum-disks-in-nanowires ultraviolet LED emitting at 337 nm on metal/silicon substrates

KAUST Repository

Janjua, Bilal; Sun, Haiding; Zhao, Chao; Anjum, Dalaver H.; Priante, Davide; Alhamoud, Abdullah A.; Wu, Feng-Yu; Li, Xiaohang; Albadri, Abdulrahman M.; Alyamani, Ahmed Y.; El-Desouki, Munir M.; Ng, Tien Khee; Ooi, Boon S.

2017-01-01

Currently the AlGaN-based ultraviolet (UV) solid-state lighting research suffers from numerous challenges. In particular, low internal quantum efficiency, low extraction efficiency, inefficient doping, large polarization fields, and high dislocation density epitaxy constitute bottlenecks in realizing high power devices. Despite the clear advantage of quantum-confinement nanostructure, it has not been widely utilized in AlGaN-based nanowires. Here we utilize the self-assembled nanowires (NWs) with embedding quantum-disks (Qdisks) to mitigate these issues, and achieve UV emission of 337 nm at 32 A/cm (80 mA in 0.5 × 0.5 mm device), a turn-on voltage of ∼5.5 V and droop-free behavior up to 120 A/cm of injection current. The device was grown on a titanium-coated n-type silicon substrate, to improve current injection and heat dissipation. A narrow linewidth of 11.7 nm in the electroluminescence spectrum and a strong wavefunctions overlap factor of 42% confirm strong quantum confinement within uniformly formed AlGaN/AlGaN Qdisks, verified using transmission electron microscopy (TEM). The nitride-based UV nanowires light-emitting diodes (NWs-LEDs) grown on low cost and scalable metal/silicon template substrate, offers a scalable, environment friendly and low cost solution for numerous applications, such as solid-state lighting, spectroscopy, medical science and security.

Surface chemistry and morphology of the solid electrolyte interphase on silicon nanowire lithium-ion battery anodes

KAUST Repository

Chan, Candace K.

2009-04-01

Silicon nanowires (SiNWs) have the potential to perform as anodes for lithium-ion batteries with a much higher energy density than graphite. However, there has been little work in understanding the surface chemistry of the solid electrolyte interphase (SEI) formed on silicon due to the reduction of the electrolyte. Given that a good, passivating SEI layer plays such a crucial role in graphite anodes, we have characterized the surface composition and morphology of the SEI formed on the SiNWs using X-ray photoelectron spectroscopy (XPS) and scanning electron microscopy (SEM). We have found that the SEI is composed of reduction products similar to that found on graphite electrodes, with Li2CO3 as an important component. Combined with electrochemical impedance spectroscopy, the results were used to determine the optimal cycling parameters for good cycling. The role of the native SiO2 as well as the effect of the surface area of the SiNWs on reactivity with the electrolyte were also addressed. © 2009 Elsevier B.V. All rights reserved.

Improved sensitivity of a graphene FET biosensor using porphyrin linkers

Science.gov (United States)

Kawata, Takuya; Ono, Takao; Kanai, Yasushi; Ohno, Yasuhide; Maehashi, Kenzo; Inoue, Koichi; Matsumoto, Kazuhiko

2018-06-01

Graphene FET (G-FET) biosensors have considerable potential due to the superior characteristics of graphene. Realizing this potential requires judicious choice of the linker molecule connecting the target-specific receptor molecule to the graphene surface, yet there are few reports comparing linker molecules for G-FET biosensors. In this study, tetrakis(4-carboxyphenyl)porphyrin (TCPP) was used as a linker for surface modification of a G-FET and the properties of the device were compared to those of a G-FET device modified with the conventional linker 1-pyrenebutanoic acid succinimidyl ester (PBASE). TCPP modification resulted in a higher density of receptor immunoglobulin E (IgE) aptamer molecules on the G-FET. The detection limit of the target IgE was enhanced from 13 nM for the PBASE-modified G-FET to 2.2 nM for the TCPP-modified G-FET, suggesting that the TCPP linker is a powerful candidate for G-FET modification.