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Sample records for programmable delay circuit

  1. Programmable delay circuit for sparker signal analysis

    Digital Repository Service at National Institute of Oceanography (India)

    Pathak, D.

    on it to classify the seafloor sediment properties. A specific purpose oriented programmable delay circuit was developed to generate the necessary delay so that the A/D conversion could start just before the arrival of the echo from the water bottom interface...

  2. Universal Programmable Quantum Circuit Schemes to Emulate an Operator

    OpenAIRE

    Daskin, Anmer; Grama, Ananth; Kollias, Giorgos; Kais, Sabre

    2012-01-01

    Unlike fixed designs, programmable circuit designs support an infinite number of operators. The functionality of a programmable circuit can be altered by simply changing the angle values of the rotation gates in the circuit. Here, we present a new quantum circuit design technique resulting in two general programmable circuit schemes. The circuit schemes can be used to simulate any given operator by setting the angle values in the circuit. This provides a fixed circuit design whose angles are ...

  3. Universal programmable quantum circuit schemes to emulate an operator.

    Science.gov (United States)

    Daskin, Anmer; Grama, Ananth; Kollias, Giorgos; Kais, Sabre

    2012-12-21

    Unlike fixed designs, programmable circuit designs support an infinite number of operators. The functionality of a programmable circuit can be altered by simply changing the angle values of the rotation gates in the circuit. Here, we present a new quantum circuit design technique resulting in two general programmable circuit schemes. The circuit schemes can be used to simulate any given operator by setting the angle values in the circuit. This provides a fixed circuit design whose angles are determined from the elements of the given matrix-which can be non-unitary-in an efficient way. We also give both the classical and quantum complexity analysis for these circuits and show that the circuits require a few classical computations. For the electronic structure simulation on a quantum computer, one has to perform the following steps: prepare the initial wave function of the system; present the evolution operator U = e(-iHt) for a given atomic and molecular Hamiltonian H in terms of quantum gates array and apply the phase estimation algorithm to find the energy eigenvalues. Thus, in the circuit model of quantum computing for quantum chemistry, a crucial step is presenting the evolution operator for the atomic and molecular Hamiltonians in terms of quantum gate arrays. Since the presented circuit designs are independent from the matrix decomposition techniques and the global optimization processes used to find quantum circuits for a given operator, high accuracy simulations can be done for the unitary propagators of molecular Hamiltonians on quantum computers. As an example, we show how to build the circuit design for the hydrogen molecule.

  4. Equalization of Interconnect Propagation Delay with Negative Group Delay Active Circuits

    OpenAIRE

    Ravelo, Blaise; Pérennec, André; Le Roy, Marc

    2007-01-01

    International audience; In this paper, we propose a technique to compensate the propagation delay and losses in VLSI interconnects by using negative group delay (NGD) active circuits. This study uses the RLC models of interconnect lines currently considered in VLSI circuits. The circuit proposed here is based on a cell consisting of a Field Effect Transistor (FET) in parallel with a series RL passive network. We also describe the synthesis method to achieve simultaneousely a significant negat...

  5. Negative Group Delay Circuit Based on Microwave Recursive Filters

    Directory of Open Access Journals (Sweden)

    Mohammad Ashraf Ali

    2015-01-01

    Full Text Available This work presents a novel approach to design a maximally flat negative group delay (NGD circuit based on microwave recursive filters. The proposed NGD circuit is realized by cascading N stages of quarter-wavelength stepped-impedance transformer. It is shown that the given circuit can be designed to have any prescribed group delay by changing the characteristic impedance of the quarter-wave transformers (QWTs cascaded with each other. The proposed approach provides a systematic method to synthesize NGD of arbitrary amount without including any discrete lumped component. For various prescribed NGD, the characteristic impedance of QWT has been tabulated for two and three stages of the circuit. The widths and lengths of microstrip transmission lines can be obtained from characteristic impedance and the frequency of operation of the transmission line. The results are verified in both simulation and measurement, showing a good agreement.

  6. Programmable Low-Voltage Circuit Breaker and Tester

    Science.gov (United States)

    Greenfield, Terry

    2008-01-01

    An instrumentation system that would comprise a remotely controllable and programmable low-voltage circuit breaker plus several electric-circuit-testing subsystems has been conceived, originally for use aboard a spacecraft during all phases of operation from pre-launch testing through launch, ascent, orbit, descent, and landing. The system could also be adapted to similar use aboard aircraft. In comparison with remotely controllable circuit breakers heretofore commercially available, this system would be smaller, less massive, and capable of performing more functions, as needed for aerospace applications.

  7. Comparative Effects of Circuit Training Programme on Speed and ...

    African Journals Online (AJOL)

    This study examined the Comparative Effects of Circuit Training Programme on Speed and Power of Pre- and Post-Menarcheal girls. A pre-test- posttest control group experimental design was used to carry out the study. A total of 80 Secondary School girls from St. Peter's College, Olomore, Abeokuta, in Ogun State of ...

  8. Comparative Effects of Circuit Training Programme on Speed and ...

    African Journals Online (AJOL)

    This study examined the Comparative Effects of Circuit Training Programme on Speed and Power of Pre- and Post-Menarcheal girls. ... took part in the study. The subjects were not involved in competitive school sports. Stratified random sampling technique was used to select 40 pre-menarceal and 40 postmenarcheal girls ...

  9. IMPLEMENTING A STACK AS A DELAY-INSENSITIVE CIRCUIT

    NARCIS (Netherlands)

    JOSEPHS, MB; UDDING, JT; Furber, S; Edwards, M

    1993-01-01

    A case study in delay-insensitive circuit design is presented. A one bit wide stack is decomposed into an array of elements in a way that minimizes the response time of the stack to pushes and pops. The stack and element are specified in D-I Algebra and the correctness of the decomposition is proved

  10. Photonic Circuits with Time Delays and Quantum Feedback.

    Science.gov (United States)

    Pichler, Hannes; Zoller, Peter

    2016-03-04

    We study the dynamics of photonic quantum circuits consisting of nodes coupled by quantum channels. We are interested in the regime where the time delay in communication between the nodes is significant. This includes the problem of quantum feedback, where a quantum signal is fed back on a system with a time delay. We develop a matrix product state approach to solve the quantum stochastic Schrödinger equation with time delays, which accounts in an efficient way for the entanglement of nodes with the stream of emitted photons in the waveguide, and thus the non-Markovian character of the dynamics. We illustrate this approach with two paradigmatic quantum optical examples: two coherently driven distant atoms coupled to a photonic waveguide with a time delay, and a driven atom coupled to its own output field with a time delay as an instance of a quantum feedback problem.

  11. The ATPG Attack for Reverse Engineering of Combinational Hybrid Custom-Programmable Circuits

    Science.gov (United States)

    2017-03-23

    The ATPG Attack for Reverse Engineering of Combinational Hybrid Custom- Programmable Circuits Raza Shafiq Hamid Mahmoodi Houman Homayoun Hassan... programmable circuits. While functionality of programmable cells are only known to trusted parties, effective techniques for activation and propagation...of the cells are introduced. The ATPG attack carefully studies dependency of programmable cells to develop their (partial) truth tables. Results

  12. Synthesis for Negative Group Delay Circuits Using Distributed and Second-Order RC Circuit Configurations

    Science.gov (United States)

    Ahn, Kyoung-Pyo; Ishikawa, Ryo; Saitou, Akira; Honjo, Kazuhiko

    This paper describes the characteristic of negative group delay (NGD) circuits for various configurations including first-order, distributed, and second-order RC circuit configurations. This study includes locus, magnitude, and phase characteristics of the NGD circuits. The simplest NGD circuit is available using first-order RC or RL configuration. As an example of distributed circuit configuration, it is verified that losses in a distributed line causes NGD characteristic at higher cut-off band of a coupled four-line bandpass filter. Also, novel wideband NGD circuits using second-order RC configuration, instead of conventional RLC configuration, are proposed. Adding a parallel resistor to a parallel-T filter enables NGD characteristic to it. Also, a Wien-Robinson bridge is modified to have NGD characteristic by controlling the voltage division ratio. They are fabricated on MMIC substrate, and their NGD characteristics are verified with measured results. They have larger insertion loss than multi-stage RLC NGD circuits, however they can realize second-order NGD characteristic without practical implementation of inductors.

  13. Design of programmable logic controller auto power reset circuit for FM transmitter

    Directory of Open Access Journals (Sweden)

    Adisak Pattanajakr

    2016-06-01

    Full Text Available The mono-stereo controller using audio mute clock is used at the International Broadcasting Bureau (IBB FM 106.6 MHz transmitter in Ulaan Baatar, Mongolia since 2010. The major problem of the FM broadcast station was from the frozen Programmable Logic Controller, PLC, which must be manually reset and the report by the VOA listeners. Then, the PLC auto power reset circuit is proposed and built in mono-stereo controller to monitor the operation of the PLC. The circuit is also used to restart the PLC whenever, it is frozen. The cloud router and Transmission Control Protocol/Internet Protocol (TCP/IP to Recommended Standard number 232 (RS-232 converter are used to synchronize the PLC time. From the results, this circuit can improve the transmitter availability and quality of the 24 hours/day broadcast program without affection to the listeners. The reliability of the cloud router is acceptable with low delay of data transfer via the internet connection between Thailand to Mongolia. The cloud router which the IBB leases cloud service from the provider that offers high speed internet up to 1000 Mb/s, via the remote terminal is used for the schedule program and the time synchronization of the PLC correctly. The proposed system is very stable and there is no problem of the frozen PLC whether it connects to the internet or not. Hence, the designed PLC auto power reset circuit can be used to eliminate the frozen PLC problem.

  14. LHCb: Radiation hard programmable delay line for LHCb Calorimeter Upgrade

    CERN Multimedia

    Mauricio Ferre, J; Vilasís Cardona, X; Picatoste Olloqui, E; Machefert, F; Lefrançois, J; Duarte, O

    2013-01-01

    This poster describes the implementation of a SPI-programmable clock delay chip based on a Delay Locked Loop (DLL) in order to shift the phase of the LHC clock (25 ns) in steps of 1ns, with a 4ps jitter and 18ps of DNL. The delay lines will be integrated into ICECAL, the LHCb calorimeter front-end ASIC in the near future. The stringent noise requirements on the ASIC imply minimizing the noise contribution of digital components. This is accomplished by implementing the DLL in differential mode. To achieve the required radiation tolerance several techniques are applied: double guard rings between PMOS and NMOS transistors as well as glitch suppressors and TMR Registers. This 5.7 mm2 chip has been implemented in CMOS 0.35um technology.

  15. Design-for-Delay Testability Techniques for High-Speed Digital Circuits

    NARCIS (Netherlands)

    Vermaak, H.J.

    2005-01-01

    The importance of delay faults is enhanced by the ever increasing clock rates and decreasing geometry sizes of nowadays’ circuits. This thesis focuses on the development of Design-for-Delay-Testability (DfDT) techniques for high-speed circuits and embedded cores. The rising costs of IC testing and

  16. Accurate dynamic power estimation for CMOS combinational logic circuits with real gate delay model

    Directory of Open Access Journals (Sweden)

    Omnia S. Fadl

    2016-01-01

    Full Text Available Dynamic power estimation is essential in designing VLSI circuits where many parameters are involved but the only circuit parameter that is related to the circuit operation is the nodes’ toggle rate. This paper discusses a deterministic and fast method to estimate the dynamic power consumption for CMOS combinational logic circuits using gate-level descriptions based on the Logic Pictures concept to obtain the circuit nodes’ toggle rate. The delay model for the logic gates is the real-delay model. To validate the results, the method is applied to several circuits and compared against exhaustive, as well as Monte Carlo, simulations. The proposed technique was shown to save up to 96% processing time compared to exhaustive simulation.

  17. Accurate dynamic power estimation for CMOS combinational logic circuits with real gate delay model.

    Science.gov (United States)

    Fadl, Omnia S; Abu-Elyazeed, Mohamed F; Abdelhalim, Mohamed B; Amer, Hassanein H; Madian, Ahmed H

    2016-01-01

    Dynamic power estimation is essential in designing VLSI circuits where many parameters are involved but the only circuit parameter that is related to the circuit operation is the nodes' toggle rate. This paper discusses a deterministic and fast method to estimate the dynamic power consumption for CMOS combinational logic circuits using gate-level descriptions based on the Logic Pictures concept to obtain the circuit nodes' toggle rate. The delay model for the logic gates is the real-delay model. To validate the results, the method is applied to several circuits and compared against exhaustive, as well as Monte Carlo, simulations. The proposed technique was shown to save up to 96% processing time compared to exhaustive simulation.

  18. An FPGA-Integrated Time-to-Digital Converter Based on a Ring Oscillator for Programmable Delay Line Resolution Measurement

    Directory of Open Access Journals (Sweden)

    Chao Chen

    2014-01-01

    Full Text Available We describe the architecture of a time-to-digital converter (TDC, specially intended to measure the delay resolution of a programmable delay line (PDL. The configuration, which consists of a ring oscillator, a frequency divider (FD, and a period measurement circuit (PMC, is implemented in a field programmable gate array (FPGA device. The ring oscillator realized in loop containing a PDL and a look-up table (LUT generates periodic oscillatory pulses. The FD amplifies the oscillatory period from nanosecond range to microsecond range. The time-to-digital conversion is based on counting the number of clock cycles between two consecutive pulses of the FD by the PMC. Experiments have been conducted to verify the performance of the TDC. The achieved relative errors for four PDLs are within 0.50%–1.21% and the TDC has an equivalent resolution of about 0.4 ps.

  19. Delay-area trade-off for MPRM circuits based on hybrid discrete particle swarm optimization

    Science.gov (United States)

    Zhidi, Jiang; Zhenhai, Wang; Pengjun, Wang

    2013-06-01

    Polarity optimization for mixed polarity Reed—Muller (MPRM) circuits is a combinatorial issue. Based on the study on discrete particle swarm optimization (DPSO) and mixed polarity, the corresponding relation between particle and mixed polarity is established, and the delay-area trade-off of large-scale MPRM circuits is proposed. Firstly, mutation operation and elitist strategy in genetic algorithm are incorporated into DPSO to further develop a hybrid DPSO (HDPSO). Then the best polarity for delay and area trade-off is searched for large-scale MPRM circuits by combining the HDPSO and a delay estimation model. Finally, the proposed algorithm is testified by MCNC Benchmarks. Experimental results show that HDPSO achieves a better convergence than DPSO in terms of search capability for large-scale MPRM circuits.

  20. A systematic molecular circuit design method for gene networks under biochemical time delays and molecular noises

    Directory of Open Access Journals (Sweden)

    Chang Yu-Te

    2008-11-01

    Full Text Available Abstract Background Gene networks in nanoscale are of nonlinear stochastic process. Time delays are common and substantial in these biochemical processes due to gene transcription, translation, posttranslation protein modification and diffusion. Molecular noises in gene networks come from intrinsic fluctuations, transmitted noise from upstream genes, and the global noise affecting all genes. Knowledge of molecular noise filtering and biochemical process delay compensation in gene networks is crucial to understand the signal processing in gene networks and the design of noise-tolerant and delay-robust gene circuits for synthetic biology. Results A nonlinear stochastic dynamic model with multiple time delays is proposed for describing a gene network under process delays, intrinsic molecular fluctuations, and extrinsic molecular noises. Then, the stochastic biochemical processing scheme of gene regulatory networks for attenuating these molecular noises and compensating process delays is investigated from the nonlinear signal processing perspective. In order to improve the robust stability for delay toleration and noise filtering, a robust gene circuit for nonlinear stochastic time-delay gene networks is engineered based on the nonlinear robust H∞ stochastic filtering scheme. Further, in order to avoid solving these complicated noise-tolerant and delay-robust design problems, based on Takagi-Sugeno (T-S fuzzy time-delay model and linear matrix inequalities (LMIs technique, a systematic gene circuit design method is proposed to simplify the design procedure. Conclusion The proposed gene circuit design method has much potential for application to systems biology, synthetic biology and drug design when a gene regulatory network has to be designed for improving its robust stability and filtering ability of disease-perturbed gene network or when a synthetic gene network needs to perform robustly under process delays and molecular noises.

  1. Test Generation for Crosstalk-Induced Delay Faults in VLSI Circuits Using Modified FAN Algorithm

    Directory of Open Access Journals (Sweden)

    S. Jayanthy

    2012-01-01

    Full Text Available As design trends move toward nanometer technology, new problems due to noise effects lead to a decrease in reliability and performance of VLSI circuits. Crosstalk is one such noise effect which affects the timing behaviour of circuits. In this paper, an efficient Automatic Test Pattern Generation (ATPG method based on a modified Fanout Oriented (FAN to detect crosstalk-induced delay faults in VLSI circuits is presented. Tests are generated for ISCAS_85 and enhanced scan version of ISCAS_89 benchmark circuits. Experimental results demonstrate that the test program gives better fault coverage, less number of backtracks, and hence reduced test generation time for most of the benchmark circuits when compared to modified Path-Oriented Decision Making (PODEM based ATPG. The number of transitions is also reduced thus reducing the power dissipation of the circuit.

  2. Practical programmable circuits a guide to PLDs, state machines, and microcontrollers

    CERN Document Server

    Broesch, James D

    1991-01-01

    This is a practical guide to programmable logic devices. It covers all devices related to PLD: PALs, PGAs, state machines, and microcontrollers. Usefulness is evaluated; support needed in order to effectively use the devices is discussed. All examples are based on real-world circuits.

  3. Digital switching in a biosensor circuit via programmable timing of gene availability.

    Science.gov (United States)

    Lapique, Nicolas; Benenson, Yaakov

    2014-12-01

    Transient delivery of gene circuits is required in many potential applications of synthetic biology, yet the pre-steady-state processes that dominate this delivery route pose major challenges for robust circuit deployment. Here we show that site-specific recombinases can rectify undesired effects by programmable timing of gene availability in multigene circuits. We exemplify the concept with a proportional sensor for endogenous microRNA (miRNA) and show a marked reduction in its ground state leakage due to desynchronization of the circuit's repressor components and their repression target. The new sensors display a dynamic range of up to 1,000-fold compared to 20-fold in the standard configuration. We applied the approach to classify cell types on the basis of miRNA expression profile and measured >200-fold output differential between positively and negatively identified cells. We also showed major improvements in specificity with cytotoxic output. Our study opens new venues in gene circuit design via judicious temporal control of circuits' genetic makeup.

  4. Estimation of leakage power and delay in CMOS circuits using parametric variation

    Directory of Open Access Journals (Sweden)

    Preeti Verma

    2016-09-01

    Full Text Available With the advent of deep-submicron technologies, leakage power dissipation is a major concern for scaling down portable devices that have burst-mode type integrated circuits. In this paper leakage reduction technique HTLCT (High Threshold Leakage Control Transistor is discussed. Using high threshold transistors at the place of low threshold leakage control transistors, result in more leakage power reduction as compared to LCT (leakage control transistor technique but at the scarifies of area and delay. Further, analysis of effect of parametric variation on leakage current and propagation delay in CMOS circuits is performed. It is found that the leakage power dissipation increases with increasing temperature, supply voltage and aspect ratio. However, opposite pattern is noticed for the propagation delay. Leakage power dissipation for LCT NAND gate increases up to 14.32%, 6.43% and 36.21% and delay decreases by 22.5%, 42% and 9% for variation of temperature, supply voltage and aspect ratio. Maximum peak of equivalent output noise is obtained as 127.531 nV/Sqrt(Hz at 400 mHz.

  5. A twofold quantum delayed-choice experiment in a superconducting circuit.

    Science.gov (United States)

    Liu, Ke; Xu, Yuan; Wang, Weiting; Zheng, Shi-Biao; Roy, Tanay; Kundu, Suman; Chand, Madhavi; Ranadive, Arpit; Vijay, Rajamani; Song, Yipu; Duan, Luming; Sun, Luyan

    2017-05-01

    Wave-particle complementarity lies at the heart of quantum mechanics. To illustrate this mysterious feature, Wheeler proposed the delayed-choice experiment, where a quantum system manifests the wave- or particle-like attribute, depending on the experimental arrangement, which is made after the system has entered the interferometer. In recent quantum delayed-choice experiments, these two complementary behaviors were simultaneously observed with a quantum interferometer in a superposition of being closed and open. We suggest and implement a conceptually different quantum delayed-choice experiment by introducing a which-path detector (WPD) that can simultaneously record and neglect the system's path information, but where the interferometer itself is classical. Our experiment is realized with a superconducting circuit, where a cavity acts as the WPD for an interfering qubit. Using this setup, we implement the first twofold delayed-choice experiment, which demonstrates that the system's behavior depends not only on the measuring device's configuration that can be chosen even after the system has been detected but also on whether we a posteriori erase or mark the which-path information, the latter of which cannot be revealed by previous quantum delayed-choice experiments. Our results represent the first demonstration of both counterintuitive features with the same experimental setup, significantly extending the concept of quantum delayed-choice experiment.

  6. Time delay along a chained lumped-circuits: for the physical analogy of half-wavelength power transmission lines

    Science.gov (United States)

    Zhan, Rongrong; Li, Yurong; Jiao, Chongqing; Yu, Yue; Meng, Jiangwen; Wang, Bei

    2017-09-01

    Half-wavelength AC power transmission (HWACT) technology is a kind of three-phase AC transmission technology, which can transmit electric power over a distance close to half power-frequency wavelength, i.e. 3000 km (50Hz) or 2500 km (60 Hz). In order to implement physical analogy of HWACT lines, in general, the equivalent lumped-circuits consisting of some chained π-type circuits or T-type circuits are used in laboratory. The number of the chained circuits is the most key parameter to establish good equivalence between the lumped-circuits and the transmission line. In this paper, the time delay of the chained circuits, which is defined as the time of a sine wave propagating from the sending end to the receiving end of the chained circuits, is calculated for different number of the chained circuits and different wave frequencies. Good equivalence requires the time delay equal to 10ms (the time of electromagnetic waves propagating along 3000km). It is shown that the time delay is dependent on the number of the chained circuits, as well as the wave frequency. For 50Hz, 4 chained π-type circuits can ensure that the relative error of the time delay is less than 2.6% and the sending-to-receiving voltage ratio is approximately 1. For frequencies below 400Hz, 30 chained π-type or T-type circuits can ensure that the relative error of the time delay is less than 3.2% and the sending-to-receiving voltage ratio is approximately 1. These works are instructive for the physical analogy of HWACT lines.

  7. Energy and delay trade-offs in arithmetic circuits: Methodologies and optimizations

    Science.gov (United States)

    Baran, Dursun

    Technology scaling cannot provide sufficient amount of energy reduction to keep control of the energy consumption of the current VLSI systems. In order to solve the problem of the high power dissipation of current processors, a complete optimization framework is developed. The system architecture, circuit topology, gate sizes and the technology related parameters are optimized jointly. For this purpose, circuit design methodologies are developed for demanded applications. The developed circuit design techniques target two objectives namely critical path complexity reduction of the circuit and the equalization of the signal path complexities. The generated circuit topologies are candidates for the energy efficient design. The final determination of the best circuit topology is made after optimizing the gate sizes and the voltage supply of the design. For this purpose, a quick circuit sizing algorithm (Constant Stage Effort Ratio) is developed. The algorithm redistributes the effort delay through the circuit to reduce the energy consumption at the same performance. The run-time of the developed algorithm linearly depends on the number of the logic gates in the circuit. By using the developed algorithm, a considerable amount of the run-time improvement is obtained. The developed optimization framework is applied to the parallel prefix adders and parallel multipliers. Up to 4.5X energy saving is obtained by the use of the design methodologies in 64-bit parallel adders over existing designs. Energy-efficient parallel adder structures are developed for static, domino and compound domino logic families. The suitability of the developed design techniques are explored in future technology nodes as well. Similar analysis is performed to the parallel multipliers. 16x16-bit serial, single-cycle parallel and two-cycle parallel multiplier structures are optimized using the developed optimization flow. Up to 20% energy reduction is obtained in static single-cycle 16x16-bit

  8. Silicon photonic integrated circuits with electrically programmable non-volatile memory functions.

    Science.gov (United States)

    Song, J-F; Lim, A E-J; Luo, X-S; Fang, Q; Li, C; Jia, L X; Tu, X-G; Huang, Y; Zhou, H-F; Liow, T-Y; Lo, G-Q

    2016-09-19

    Conventional silicon photonic integrated circuits do not normally possess memory functions, which require on-chip power in order to maintain circuit states in tuned or field-configured switching routes. In this context, we present an electrically programmable add/drop microring resonator with a wavelength shift of 426 pm between the ON/OFF states. Electrical pulses are used to control the choice of the state. Our experimental results show a wavelength shift of 2.8 pm/ms and a light intensity variation of ~0.12 dB/ms for a fixed wavelength in the OFF state. Theoretically, our device can accommodate up to 65 states of multi-level memory functions. Such memory functions can be integrated into wavelength division mutiplexing (WDM) filters and applied to optical routers and computing architectures fulfilling large data downloading demands.

  9. Programmable dispersion on a photonic integrated circuit for classical and quantum applications.

    Science.gov (United States)

    Notaros, Jelena; Mower, Jacob; Heuck, Mikkel; Lupo, Cosmo; Harris, Nicholas C; Steinbrecher, Gregory R; Bunandar, Darius; Baehr-Jones, Tom; Hochberg, Michael; Lloyd, Seth; Englund, Dirk

    2017-09-04

    We demonstrate a large-scale tunable-coupling ring resonator array, suitable for high-dimensional classical and quantum transforms, in a CMOS-compatible silicon photonics platform. The device consists of a waveguide coupled to 15 ring-based dispersive elements with programmable linewidths and resonance frequencies. The ability to control both quality factor and frequency of each ring provides an unprecedented 30 degrees of freedom in dispersion control on a single spatial channel. This programmable dispersion control system has a range of applications, including mode-locked lasers, quantum key distribution, and photon-pair generation. We also propose a novel application enabled by this circuit - high-speed quantum communications using temporal-mode-based quantum data locking - and discuss the utility of the system for performing the high-dimensional unitary optical transformations necessary for a quantum data locking demonstration.

  10. Synthesis of RF Circuits with Negative Time Delay by Using LNA

    Directory of Open Access Journals (Sweden)

    B. Ravelo

    2013-07-01

    Full Text Available A demonstration of the negative time-delay by using active circuit topologies with negative group delay (NGD is described in this paper. This negative time delay is realized with two different topologies operating in base band and modulated frequencies. The first NGD topology is composed of an RL-network in feedback with an RF/microwave amplifier. Knowing the characteristics of the amplifier, a synthesis method of this circuit in function of the desired NGD values and the expected time advance is established. The feasibility of this extraordinary physical effect is illustrated with frequency- and time-domain analyses. It is shown in this paper that by considering an arbitrary waveform signal, output in advance of about 7 ns is observed compared to the corresponding input. It is stated that such an effect is not in contradiction with the causality. The other NGD topology is comprised of a microwave amplifier associated with an RLC-series resonant. The theoretical approach illustrating the functioning of this NGD circuit is established by considering the amplifier S-parameters. Then, synthesis relations enabling to choose the NGD device parameters according to the desired NGD and gain values are also established. To demonstrate the relevance of the theoretic concept, a microwave device exhibiting NGD function of about -1.5 ns at around 1.19 GHz was designed and analyzed. The NGD device investigated in this paper presents advantages on its faculty to exhibit positive transmission gain, the implementation of the bias network and matching in the considered NGD frequency band.

  11. Voltage-tolerant circuit design for fully CMOS-compatible differential multiple-time programmable nonvolatile memories

    Science.gov (United States)

    Wu, Chia-You; Lin, Hongchin; Chiu, Hou-Jen

    2017-04-01

    In this paper, a fully CMOS-compatible differential multiple-time programmable (DFMTP) nonvolatile memory (NVM) circuit, fabricated by the standard TSMC 0.18 µm CMOS process without violating the design and electrical rules, is proposed. Novel voltage-tolerant circuits were designed using the standard 3.3 and 1.8 V devices for the bit line (BL) and control gate (CG) drivers for -3 and 6 V program/erase operations, as well as the negative voltage isolation circuits for sense amplifiers. The DFMTP array with these voltage-tolerant control circuits was used and measured to confirm the correct program/erase/read operations.

  12. A high-resolution programmable Vernier delay generator based on carry chains in FPGA

    Science.gov (United States)

    Cui, Ke; Li, Xiangyu; Zhu, Rihong

    2017-06-01

    This paper presents an architecture of a high-resolution delay generator implemented in a single field programmable gate array chip by exploiting the method of utilizing dedicated carry chains. It serves as the core component in various physical instruments. The proposed delay generator contains the coarse delay step and the fine delay step to guarantee both large dynamic range and high resolution. The carry chains are organized in the Vernier delay loop style to fulfill the fine delay step with high precision and high linearity. The delay generator was implemented in the EP3SE110F1152I3 Stratix III device from Altera on a self-designed test board. Test results show that the obtained resolution is 38.6 ps, and the differential nonlinearity/integral nonlinearity is in the range of [-0.18 least significant bit (LSB), 0.24 LSB]/(-0.02 LSB, 0.01 LSB) under the nominal supply voltage of 1100 mV and environmental temperature of 2 0°C. The delay generator is rather efficient concerning resource cost, which uses only 668 look-up tables and 146 registers in total.

  13. Emergent bimodality and switch induced by time delays and noises in a synthetic gene circuit

    Science.gov (United States)

    Zhang, Chun; Du, Liping; Xie, Qingshuang; Wang, Tonghuan; Zeng, Chunhua; Nie, Linru; Duan, Weilong; Jia, Zhenglin; Wang, Canjun

    2017-10-01

    Based on the kinetic model for obtaining emergent bistability proposed by Tan et al. (2009), the effects of the fluctuations of protein synthesis rate and maximum dilution rate, the cross-correlation between two noises, and the time delay and the strength of the feedback loop in the synthetic gene circuit have been investigated through theoretical analysis and numerical simulation. Our results show that: (i) the fluctuations of protein synthesis rate and maximum dilution rate enhance the emergent bimodality of the probability distribution phenomenon, while the cross-correlation between two noises(λ), the time delay(τ) and the strength of the feedback loop(K) cause it to disappear; and (ii) the mean first passage time(MFPT) as functions of the noise strengths exhibits a maximum, this maximum is called noise-delayed switching (NDS) of the high concentration state. The NDS phenomenon shows that the noise can modify the stability of a metastable system in a counterintuitive way, the system remains in the metastable state for a longer time compared to the deterministic case. And the τ and the K enhances the stability of the ON state. The physical mechanisms for the switch between the ON and OFF states can be explained from the point of view of the effective potential.

  14. An amplitude-channel hodoscope based on programmable logic integral circuits for the Baksan Underground Scintillation Telescope

    NARCIS (Netherlands)

    Yanin, AF; Kompaniets, KG; Amel'chakov, MB; Gorbacheva, EA; Dzaparova, IM; Kindin, VV; Novosel'tsev, YF; Striganov, PS

    2004-01-01

    A schematic diagram of a hodoscope with 3200 amplitude channels is described. The hodoscope is based on state-of-the-art programmable logic integral circuits (PLICs). Thanks to the use of PLICs, it is capable of measuring the lengths of input signals in each channel and monitoring their shape. In

  15. Digital Signal Processing Applications and Implementation for Accelerators Digital Notch Filter with Programmable Delay and Betatron Phase Adjustment for the PS, SPS and LHC Transverse Dampers

    CERN Document Server

    Rossi, V

    2002-01-01

    In the framework of the LHC project and the modifications of the SPS as its injector, I present the concept of global digital signal processing applied to a particle accelerator, using Field Programmable Gate Array (FPGA) technology. The approach of global digital synthesis implements in numerical form the architecture of a system, from the start up of a project and the very beginning of the signal flow. It takes into account both the known parameters and the future evolution, whenever possible. Due to the increased performance requirements of today's projects, the CAE design methodology becomes more and more necessary to handle successfully the added complexity and speed of modern electronic circuits. Simulation is performed both for behavioural analysis, to ensure conformity to functional requirements, and for time signal analysis (speed requirements). The digital notch filter with programmable delay for the SPS Transverse Damper is now fully operational with fixed target and LHC-type beams circulating in t...

  16. Anticipating, complete and lag synchronizations in RC phase-shift network based coupled Chua's circuits without delay.

    Science.gov (United States)

    Srinivasan, K; Senthilkumar, D V; Raja Mohamed, I; Murali, K; Lakshmanan, M; Kurths, J

    2012-06-01

    We construct a new RC phase shift network based Chua's circuit, which exhibits a period-doubling bifurcation route to chaos. Using coupled versions of such a phase-shift network based Chua's oscillators, we describe a new method for achieving complete synchronization (CS), approximate lag synchronization (LS), and approximate anticipating synchronization (AS) without delay or parameter mismatch. Employing the Pecora and Carroll approach, chaos synchronization is achieved in coupled chaotic oscillators, where the drive system variables control the response system. As a result, AS or LS or CS is demonstrated without using a variable delay line both experimentally and numerically.

  17. New Programmable CMOS Fuzzifier and C2V Circuits Applicable in FLC Chip for Signal Processing of MEMS Glucose Sensors

    Directory of Open Access Journals (Sweden)

    Ghader Yosefi

    2015-08-01

    Full Text Available This paper presents the design and simulation of improved circuits of Fuzzifier and capacitance to voltage (C2V converter. The Fuzzifier circuit is designed based on analog advantages such as low die area, high accuracy, and simplicity which are added to the fuzzy system advantages. For implementing this idea, a programmable Membership Function Generator (MFG including differential pair circuit as a Fuzzifier is proposed. The MFG generates arbitrary forms of Gaussian, Trapezoidal, and Triangular shapes. The shape types are achieved using control switches and different reference voltages. This structure is also general purpose in tuning the slope of Membership Functions (MFs using scaled transistors with different W/L ratios. With a specific purpose in mind, we used it here to generate fuzzy language terms from sensed classic data of a blood glucose microsensor. Thus we proposed a C2V circuit to convert capacitance variations (from MEMS glucose microsensor to voltage values as classic data. The proposed mentioned circuits can be applicable in design of Fuzzy Logic Controller (FLC chips to detect blood glucose, process its data in Fuzzy environment, and control insulin injection of diabetic patients by MEMS micropumps. The simulation results are achieved by MATLAB and Hspice software in 0.35 μm CMOS standard technology.

  18. TIMEDELN: A programme for the detection and parametrization of overlapping resonances using the time-delay method

    Science.gov (United States)

    Little, Duncan A.; Tennyson, Jonathan; Plummer, Martin; Noble, Clifford J.; Sunderland, Andrew G.

    2017-06-01

    TIMEDELN implements the time-delay method of determining resonance parameters from the characteristic Lorentzian form displayed by the largest eigenvalues of the time-delay matrix. TIMEDELN constructs the time-delay matrix from input K-matrices and analyses its eigenvalues. This new version implements multi-resonance fitting and may be run serially or as a high performance parallel code with three levels of parallelism. TIMEDELN takes K-matrices from a scattering calculation, either read from a file or calculated on a dynamically adjusted grid, and calculates the time-delay matrix. This is then diagonalized, with the largest eigenvalue representing the longest time-delay experienced by the scattering particle. A resonance shows up as a characteristic Lorentzian form in the time-delay: the programme searches the time-delay eigenvalues for maxima and traces resonances when they pass through different eigenvalues, separating overlapping resonances. It also performs the fitting of the calculated data to the Lorentzian form and outputs resonance positions and widths. Any remaining overlapping resonances can be fitted jointly. The branching ratios of decay into the open channels can also be found. The programme may be run serially or in parallel with three levels of parallelism. The parallel code modules are abstracted from the main physics code and can be used independently.

  19. Development of Single-Event Upset hardened programmable logic devices in deep submicron CMOS; Developpement de circuits logiques programmables resistants aux aleas logiques en technologie CMOS submicrometrique

    Energy Technology Data Exchange (ETDEWEB)

    Bonacini, S

    2007-11-15

    The electronics associated to the particle detectors of the Large Hadron Collider (LHC), under construction at CERN, will operate in a very harsh radiation environment. Commercial Off-The-Shelf (COTS) components cannot be used in the vicinity of particle collision due to their poor radiation tolerance. This thesis is a contribution to the effort to cover the need for radiation-tolerant SEU-robust (Single Event Upset) programmable components for application in high energy physics experiments. Two components are under development: a Programmable Logic Device (PLD) and a Field-Programmable Gate Array (FPGA). The PLD is a fuse-based, 10-input, 8-I/O general architecture device in 0.25 {mu}m CMOS technology. The FPGA under development is a 32*32 logic block array, equivalent to {approx} 25 k gates, in 0.13 {mu}m CMOS. The irradiation test results obtained in the CMOS 0.25 {mu}m technology demonstrate good robustness of the circuit up to an LET (Linear Energy Transfer) of 79.6 cm{sup 2}*MeV/mg, which make it suitable for the target environment. The CMOS 0.13 {mu}m circuit has showed robustness to an LET of 37.4 cm{sup 2}*MeV/mg in the static test mode and has increased sensitivity in the dynamic test mode. This work focused also on the research for an SEU-robust register in both the mentioned technologies. The SEU-robust register is employed as a user data flip-flop in the FPGA and PLD designs and as a configuration cell as well in the FPGA design.

  20. Anti-Tamper Method for Field Programmable Gate Arrays Through Dynamic Reconfiguration and Decoy Circuits

    Science.gov (United States)

    2008-03-27

    implemented. Lala and Walker present a very different form of the DRFPGA [29]. This design is well suited to reliability as opposed to efficiency or security...each reconfiguration operation, the reconfigured portion of the circuit returns to normal operation within the reconfiguration time overhead (dependant...value (enable = 1) or hold the current value (enable = 0) and a reset signal that instructs the counter to return to an all 0 state. Similar to the

  1. Electro pneumatic trainer embedded with programmable integrated circuit (PIC) microcontroller and graphical user interface platform for aviation industries training purposes

    Science.gov (United States)

    Burhan, I.; Azman, A. A.; Othman, R.

    2016-10-01

    An electro pneumatic trainer embedded with programmable integrated circuit (PIC) microcontroller and Visual Basic (VB) platform is fabricated as a supporting tool to existing teaching and learning process, and to achieve the objectives and learning outcomes towards enhancing the student's knowledge and hands-on skill, especially in electro pneumatic devices. The existing learning process for electro pneumatic courses conducted in the classroom does not emphasize on simulation and complex practical aspects. VB is used as the platform for graphical user interface (GUI) while PIC as the interface circuit between the GUI and hardware of electro pneumatic apparatus. Fabrication of electro pneumatic trainer interfacing between PIC and VB has been designed and improved by involving multiple types of electro pneumatic apparatus such as linear drive, air motor, semi rotary motor, double acting cylinder and single acting cylinder. Newly fabricated electro pneumatic trainer microcontroller interface can be programmed and re-programmed for numerous combination of tasks. Based on the survey to 175 student participants, 97% of the respondents agreed that the newly fabricated trainer is user friendly, safe and attractive, and 96.8% of the respondents strongly agreed that there is improvement in knowledge development and also hands-on skill in their learning process. Furthermore, the Lab Practical Evaluation record has indicated that the respondents have improved their academic performance (hands-on skills) by an average of 23.5%.

  2. Integrated Circuit Conception: A Wire Optimization Technic Reducing Interconnection Delay in Advanced Technology Nodes

    Directory of Open Access Journals (Sweden)

    Mohammed Darmi

    2017-10-01

    Full Text Available As we increasingly use advanced technology nodes to design integrated circuits (ICs, physical designers and electronic design automation (EDA providers are facing multiple challenges, firstly, to honor all physical constraints coming with cutting-edge technologies and, secondly, to achieve expected quality of results (QoR. An advanced technology should be able to bring better performances with minimum cost whatever the complexity. A high effort to develop out-of-the-box optimization techniques is more than needed. In this paper, we will introduce a new routing technique, with the objective to optimize timing, by only acting on routing topology, and without impacting the IC Area. In fact, the self-aligned double patterning (SADP technology offers an important difference on layer resistance between SADP and No-SADP layers; this property will be taken as an advantage to drive the global router to use No-SADP less resistive layers for critical nets. To prove the benefit on real test cases, we will use Mentor Graphics’ physical design EDA tool Nitro-SoC™ and several 7 nm technology node designs. The experiments show that worst negative slack (WNS and total negative slack (TNS improved up to 13% and 56%, respectively, compared to the baseline flow.

  3. A multichannel integrated circuit for electrical recording of neural activity, with independent channel programmability.

    Science.gov (United States)

    Mora Lopez, Carolina; Prodanov, Dimiter; Braeken, Dries; Gligorijevic, Ivan; Eberle, Wolfgang; Bartic, Carmen; Puers, Robert; Gielen, Georges

    2012-04-01

    Since a few decades, micro-fabricated neural probes are being used, together with microelectronic interfaces, to get more insight in the activity of neuronal networks. The need for higher temporal and spatial recording resolutions imposes new challenges on the design of integrated neural interfaces with respect to power consumption, data handling and versatility. In this paper, we present an integrated acquisition system for in vitro and in vivo recording of neural activity. The ASIC consists of 16 low-noise, fully-differential input channels with independent programmability of its amplification (from 100 to 6000 V/V) and filtering (1-6000 Hz range) capabilities. Each channel is AC-coupled and implements a fourth-order band-pass filter in order to steeply attenuate out-of-band noise and DC input offsets. The system achieves an input-referred noise density of 37 nV/√Hz, a NEF of 5.1, a CMRR > 60 dB, a THD noise ratios.

  4. programme

    African Journals Online (AJOL)

    Aid for AIDS (AfA) is a disease management programme (DIVIPI available to beneficiaries and employees of contracted medical funds and ... the challenges alluded to in the first article, including late enrolment and the measurement of survival, especially in patients with ... I the HIV prevalence and incidence (new infections].

  5. Delayed hydride cracking in zircaloy fuel cladding-an IAEA coordinated research programme

    Energy Technology Data Exchange (ETDEWEB)

    Coleman, C. [AECL, Chalk River (Canada); Grigoriev, V. [Studsvik, Nykoeping (Sweden); Inozemtsev, V. [IAEA, Vienna (Austria); Markelov, V. [VNIINM, Moscow (Russian Federation); Roth, M. [INR, Saclay (France); Makarevicius, V. [LEI, Kaunas (Lithuania); Kim, Y. S. [KAERI, Daejeon (Korea, Republic of); Ali, Kanwar Liagat [PINS, TU Wien (Austria); Chakravartty, J. K. [BARC, Mumbai (India); Mizrahi, R. [CNEA, Buenos Aires (Argentina); Lalgudi, R. [IPEN, Rio de Janeiro (Brazil)

    2008-10-15

    The rate of delayed hydride cracking (DHC), V, has been measured in cold worked and stress relieved Zircaloy 4 fuel cladding using the Pin Loading Tension technique. At 250 .deg. C the mean value of V from 69 specimens was 3.3({+-}0.8)x10-8 m/s while the temperature dependence up to 275 .deg. C was described by Aexp(-Q/RT), where Q is 48.3 kJ/mol. No cracking or cracking at very low rates was observed at higher temperatures. The fracture surface consisted of flat fracture with no striations. The results are compared with previous results on fuel cladding and pressure tubes.

  6. Analysis of the effects of time delay in clock recovery circuits based on Phase-locked loops

    DEFF Research Database (Denmark)

    Zibar, Darko; Oxenløwe, Leif Katsuo; Clausen, Anders

    2004-01-01

    Influence of time delay in a balanced optical phase-locked loops (OPLL) with a proportional integrator (Pl) filter is investigated using a delayed differential equation (DDE) is investigated. The limitations, which a time delay imposes on the Pl filter bandwidth, at increasing values of loop gain...

  7. Mitigating the Effects of Poverty and Crime: The Long-Term Effects of an Early Intervention Programme for Children Who Were Developmentally Delayed and Prenatally Exposed to Cocaine

    Science.gov (United States)

    Ullery, Mary Anne; Gonzalez, Antonio; Katz, Lynne

    2016-01-01

    This study explores the long-term impact on participation in the Linda Ray Intervention Program (LRIP) for children (n = 54) who were developmentally delayed and prenatally exposed to cocaine. By identifying a group of programme graduates from a high crime/high poverty neighbourhood in Miami-Dade County using ArcGIS 10.2 software, a…

  8. Classical circuit theory

    CERN Document Server

    Wing, Omar

    2008-01-01

    Starting with the basic principles of circuits, this book derives their analytic properties in both the time and frequency domains. It develops an algorithmic method to design common and uncommon types of circuits, such as prototype filters, lumped delay lines, constant phase difference circuits, and delay equalizers.

  9. Focused preoperative patient stoma education, prior to ileostomy formation after anterior resection, contributes to a reduction in delayed discharge within the enhanced recovery programme.

    Science.gov (United States)

    Younis, Jenan; Salerno, Gisella; Fanto, Daniela; Hadjipavlou, Marios; Chellar, Daniel; Trickett, Jonathan P

    2012-01-01

    Stoma formation is a well-known cause for delayed discharge following colorectal surgery. This has been addressed by the enhanced recovery programme (ERP) preoperatively through stoma counselling sessions. These aim to promote independent stoma management post-operatively, thus expediting hospital discharge. We compared the numbers of patients with prolonged hospital stay secondary to delayed independent stoma management prior to and following the introduction of an enhanced recovery programme with preoperative stoma education. Data collection on patients undergoing anterior resection with the formation of a loop ileostomy was carried out retrospectively prior to ERP (January 2006 to August 2008) and prospectively following the introduction of ERP (September 2008 to October 2010). Comparisons were made in patients with prolonged hospital stay (defined as hospital stay of more than 5 days) secondary to stoma management. Two hundred forty patients underwent elective anterior resection with the formation of a loop ileostomy, 120 prior ERP and 120 post-ERP. Average length of hospital stay was 14 days before ERP introduction, with a range of 7-25 days. The mean length of stay amongst the ERP patients was 8 days (p = 0.17), ranging from 3 to 17 days. Twenty-one patients in the pre-ERP group (17.5%) experienced postponed hospital discharge due to a delay in independent stoma management, compared to one patient experiencing such a delay after the introduction of ERP (0.8%, p stoma management can be significantly reduced with preoperative stoma management teaching as part of an enhanced recovery programme.

  10. Waiting for the Sun: the circannual programme of reindeer is delayed by the recurrence of rhythmical melatonin secretion after the arctic night.

    Science.gov (United States)

    Hazlerigg, David; Blix, Arnoldus Schytte; Stokkan, Karl-Arne

    2017-11-01

    At temperate latitudes, the annual cycle of day length synchronizes circannual rhythms, and, in mammals, this is mediated via nocturnal production of the pineal hormone melatonin, proportional to the length of the night. Here, we studied circannual synchronization in an arctic species, the reindeer (Rangifer tarandus tarandus), which ceases to produce a rhythmic melatonin signal when it is exposed to extended periods of continuous midwinter darkness and continuous midsummer light. Using food intake, antler growth and moult as endpoints, we demonstrate that when animals living at 70°N are transferred from natural photoperiods in late autumn to either continuous light or continuous darkness, they undergo a conspicuous acceleration of the circannual programme. We conclude that rhythmical melatonin secretion, recommencing when the Sun reappears late in January, is required for proper timing of spring physiological responses, through a delaying effect on the circannual programme set in motion during the preceding autumn. © 2017. Published by The Company of Biologists Ltd.

  11. arXiv A Programmable Delay Design for the sTGC Detector at the Upgraded New Small Wheel of the ATLAS Muon Spectrometer

    CERN Document Server

    INSPIRE-00225390; Guan, Liang; Chapman, John W; Zhou, Bing; Zhu, Junjie

    2017-11-01

    We present a programmable time alignment scheme used in an ASIC for the ATLAS forward muon trigger development. The scheme utilizes regenerated clocks with programmable phases to compensate for the timing offsets introduced by different detector trace lengths. Each ASIC used in the design has 104 input channels with delay compensation circuitry providing steps of ∼ 3 ns and a full range of 25 ns for each channel. Detailed implementation of the scheme including majority logic to suppress single-event effects is presented. The scheme is flexible and fully synthesizable. The approach is adaptable to other applications with similar phase shifting requirements. In addition, the design is resource efficient and is suitable for cost-effective digital implementation with a large number of channels.

  12. A Spaceborne Synthetic Aperture Radar Partial Fixed-Point Imaging System Using a Field- Programmable Gate Array−Application-Specific Integrated Circuit Hybrid Heterogeneous Parallel Acceleration Technique

    Directory of Open Access Journals (Sweden)

    Chen Yang

    2017-06-01

    Full Text Available With the development of satellite load technology and very large scale integrated (VLSI circuit technology, onboard real-time synthetic aperture radar (SAR imaging systems have become a solution for allowing rapid response to disasters. A key goal of the onboard SAR imaging system design is to achieve high real-time processing performance with severe size, weight, and power consumption constraints. In this paper, we analyse the computational burden of the commonly used chirp scaling (CS SAR imaging algorithm. To reduce the system hardware cost, we propose a partial fixed-point processing scheme. The fast Fourier transform (FFT, which is the most computation-sensitive operation in the CS algorithm, is processed with fixed-point, while other operations are processed with single precision floating-point. With the proposed fixed-point processing error propagation model, the fixed-point processing word length is determined. The fidelity and accuracy relative to conventional ground-based software processors is verified by evaluating both the point target imaging quality and the actual scene imaging quality. As a proof of concept, a field- programmable gate array−application-specific integrated circuit (FPGA-ASIC hybrid heterogeneous parallel accelerating architecture is designed and realized. The customized fixed-point FFT is implemented using the 130 nm complementary metal oxide semiconductor (CMOS technology as a co-processor of the Xilinx xc6vlx760t FPGA. A single processing board requires 12 s and consumes 21 W to focus a 50-km swath width, 5-m resolution stripmap SAR raw data with a granularity of 16,384 × 16,384.

  13. A Spaceborne Synthetic Aperture Radar Partial Fixed-Point Imaging System Using a Field- Programmable Gate Array-Application-Specific Integrated Circuit Hybrid Heterogeneous Parallel Acceleration Technique.

    Science.gov (United States)

    Yang, Chen; Li, Bingyi; Chen, Liang; Wei, Chunpeng; Xie, Yizhuang; Chen, He; Yu, Wenyue

    2017-06-24

    With the development of satellite load technology and very large scale integrated (VLSI) circuit technology, onboard real-time synthetic aperture radar (SAR) imaging systems have become a solution for allowing rapid response to disasters. A key goal of the onboard SAR imaging system design is to achieve high real-time processing performance with severe size, weight, and power consumption constraints. In this paper, we analyse the computational burden of the commonly used chirp scaling (CS) SAR imaging algorithm. To reduce the system hardware cost, we propose a partial fixed-point processing scheme. The fast Fourier transform (FFT), which is the most computation-sensitive operation in the CS algorithm, is processed with fixed-point, while other operations are processed with single precision floating-point. With the proposed fixed-point processing error propagation model, the fixed-point processing word length is determined. The fidelity and accuracy relative to conventional ground-based software processors is verified by evaluating both the point target imaging quality and the actual scene imaging quality. As a proof of concept, a field- programmable gate array-application-specific integrated circuit (FPGA-ASIC) hybrid heterogeneous parallel accelerating architecture is designed and realized. The customized fixed-point FFT is implemented using the 130 nm complementary metal oxide semiconductor (CMOS) technology as a co-processor of the Xilinx xc6vlx760t FPGA. A single processing board requires 12 s and consumes 21 W to focus a 50-km swath width, 5-m resolution stripmap SAR raw data with a granularity of 16,384 × 16,384.

  14. Tuberculosis patients' pre-hospital delay and non-compliance with a longstanding DOT programme: a mixed methods study in urban Zambia.

    Science.gov (United States)

    Cremers, Anne Lia; Gerrets, René; Kapata, Nathan; Kabika, Austin; Birnie, Emma; Klipstein-Grobusch, Kerstin; Grobusch, Martin P

    2016-10-28

    Tuberculosis (TB) remains a major health problem in Zambia, despite considerable efforts to control and prevent it. With this study, we aim to understand how perceptions and cultural, social, economic, and organisational factors influence TB patients' pre-hospital delay and non-compliance with care provided by the National Tuberculosis Programme (NTP). A mixed methods study was conducted with 300 TB patients recruited at Kanyama clinic for structured interviews. Thirty were followed-up for multiple in-depth interviews. Six focus group discussions were organised and participant observation was conducted. Ten biomedical care providers, 10 traditional healers, and 10 faith healers were interviewed. Factors associated with non-compliance (disruption of treatment > one week) were assessed by applying logistic regression analyses; qualitative analysis was used to additionally assess factors influencing pre-hospital delay and for triangulation of study findings. TB treatment non-compliance was low (10 %), no association of outcome with cultural or socio-economic factors was found. Only patients' time constraints and long distance to the clinic indicated a possible association with a higher risk of non-compliance (OR 0.52; 95 % CI 0.25, 1.10, p = 0.086). Qualitative data showed that most TB patients combined understandings of biomedical and traditional TB knowledge, used herbal, traditional and/or faith healing, suffered from stigmatizing attitudes, experienced poverty and food shortages, and faced several organisational obstacles while being on treatment. This led in some cases to pre-hospital delay or treatment non-compliance. Mixed methods analysis demonstrated the importance of in-depth information ascertained by qualitative approaches to understand how cultural, socio-economic and organisational factors are influencing patients' pre-hospital delay and treatment compliance. To strengthen the Zambian NTP, combating stigma is of utmost priority coupled with

  15. Cost-effectiveness of a structured progressive task-oriented circuit class training programme to enhance walking competency after stroke: The protocol of the FIT-Stroke trial

    Directory of Open Access Journals (Sweden)

    Roelse Hanneke

    2009-08-01

    Full Text Available Abstract Background Most patients who suffer a stroke experience reduced walking competency and health-related quality of life (HRQoL. A key factor in effective stroke rehabilitation is intensive, task-specific training. Recent studies suggest that intensive, patient-tailored training can be organized as a circuit with a series of task-oriented workstations. Primary aim of the FIT-Stroke trial is to evaluate the effects and cost-effectiveness of a structured, progressive task-oriented circuit class training (CCT programme, compared to usual physiotherapeutic care during outpatient rehabilitation in a rehabilitation centre. The task-oriented CCT will be applied in groups of 4 to 6 patients. Outcome will be defined in terms of gait and gait-related ADLs after stroke. The trial will also investigate the generalizability of treatment effects of task-oriented CCT in terms of perceived fatigue, anxiety, depression and perceived HRQoL. Methods/design The multicentre single-blinded randomized trial will include 220 stroke patients discharged to the community from inpatient rehabilitation, who are able to communicate and walk at least 10 m without physical, hands-on assistance. After discharge from inpatient rehabilitation, patients in the experimental group will receive task-oriented CCT two times a week for 12 weeks at the physiotherapy department of the rehabilitation centre. Control group patients will receive usual individual, face-to-face, physiotherapy. Costs will be evaluated by having each patient keep a cost diary for the first 24 weeks after randomisation. Primary outcomes are the mobility part of the Stroke Impact Scale (SIS-3.0 and the EuroQol. Secondary outcomes are the other domains of SIS-3.0, lower limb muscle strength, walking endurance, gait speed, balance, confidence not to fall, instrumental ADL, fatigue, anxiety, depression and HRQoL. Discussion Based on assumptions about the effect of intensity of practice and specificity of

  16. Synchronizing Hyperchaotic Circuits

    DEFF Research Database (Denmark)

    Tamasevicius, Arunas; Cenys, Antanas; Namajunas, Audrius

    1997-01-01

    Regarding possible applications to secure communications the technique of synchronizing hyperchaotic circuits with a single dynamical variable is discussed. Several specific examples including the fourth-order circuits with two positive Lyapunov exponents as well as the oscillator with a delay line...

  17. Injecting and HIV prevalence among young heroin users in three Spanish cities and their association with the delayed implementation of harm reduction programmes

    Science.gov (United States)

    de la Fuente, Luis; Bravo, María José; Toro, Carlos; Brugal, M Teresa; Barrio, Gregorio; Soriano, Vicente; Vallejo, Fernando

    2006-01-01

    Objectives To evaluate changes in the prevalence of HIV infection among young heroin users in three Spanish cities, and their association with harm reduction programmes (HRPs). Methods Two cross sectional studies. The 1995 study included 596 users; half were street recruited and half were recruited at drug treatment centres. The 2001–03 study included 981 street recruited users. Face to face interviews were conducted using a structured questionnaire. Samples for HIV testing (saliva in 1995 and dried blood spot in 2001–03) were collected. Results The proportion who had ever injected (IDUs) decreased in all three cities. HIV prevalence in IDUs decreased by half in Barcelona (44.1% to 20.8%) and Seville (44.2% to 22.2%), but remained constant in Madrid (36.8% and 34.9%). This difference was attributable to a decrease in HIV prevalence in long term IDUs in Barcelona and Seville, but not in Madrid. The crude odds ratio for HIV prevalence in Madrid compared with Barcelona in long term IDUs was 2.3 (95%CI 1.4 to 3.7), increasing to 3.1 (95%CI 1.5 to 6.2) after adjusting for sociodemographic and risk factors. HIV prevalence in short term IDUs was similar in all cities. In 1992 Barcelona already had 20 heroin users in methadone maintenance programmes (MMPs) per 10 000 population aged 15–49 years; Seville reached this rate in 1994, and Madrid, not until 1998. Conclusions The prevalence of HIV infection did not decrease in long term injectors in Madrid. The delayed implementation of HRPs, especially MMPs, may be the most plausible hypothesis. This finding should shed light on decision making in countries in a similar epidemiological and sociological situation. PMID:16698987

  18. Measuring circuits

    CERN Document Server

    Graf, Rudolf F

    1996-01-01

    This series of circuits provides designers with a quick source for measuring circuits. Why waste time paging through huge encyclopedias when you can choose the topic you need and select any of the specialized circuits sorted by application?This book in the series has 250-300 practical, ready-to-use circuit designs, with schematics and brief explanations of circuit operation. The original source for each circuit is listed in an appendix, making it easy to obtain additional information.Ready-to-use circuits.Grouped by application for easy look-up.Circuit source listings

  19. Oscillator circuits

    CERN Document Server

    Graf, Rudolf F

    1996-01-01

    This series of circuits provides designers with a quick source for oscillator circuits. Why waste time paging through huge encyclopedias when you can choose the topic you need and select any of the specialized circuits sorted by application?This book in the series has 250-300 practical, ready-to-use circuit designs, with schematics and brief explanations of circuit operation. The original source for each circuit is listed in an appendix, making it easy to obtain additional information.Ready-to-use circuits.Grouped by application for easy look-up.Circuit source listing

  20. Développement de circuits logiques programmables résistants aux alas logiques en technologie CMOS submicrométrique

    CERN Document Server

    Bonacini, Sandro; Kloukinas, Kostas

    2007-01-01

    The electronics associated to the particle detectors of the Large Hadron Collider (LHC), under construction at CERN, will operate in a very harsh radiation environment. Most of the microelectronics components developed for the first generation of LHC experiments have been designed with very precise experiment-specific goals and are hardly adaptable to other applications. Commercial Off-The-Shelf (COTS) components cannot be used in the vicinity of particle collision due to their poor radiation tolerance. This thesis is a contribution to the effort to cover the need for radiation-tolerant SEU-robust programmable components for application in High Energy Physics (HEP) experiments. Two components are under development: a Programmable Logic Device (PLD) and a Field-Programmable Gate Array (FPGA). The PLD is a fuse-based, 10-input, 8-I/O general architecture device in 0.25 micron CMOS technology. The FPGA under development is instead a 32x32 logic block array, equivalent to ~25k gates, in 0.13 micron CMOS. This wor...

  1. Driver circuit

    Science.gov (United States)

    Matsumoto, Raymond T. (Inventor); Higashi, Stanley T. (Inventor)

    1976-01-01

    A driver circuit which has low power requirements, a relatively small number of components and provides flexibility in output voltage setting. The driver circuit comprises, essentially, two portions which are selectively activated by the application of input signals. The output signal is determined by which of the two circuit portions is activated. While each of the two circuit portions operates in a manner similar to silicon controlled rectifiers (SCR), the circuit portions are on only when an input signal is supplied thereto.

  2. A comparative study of ripening among berries of the grape cluster reveals an altered transcriptional programme and enhanced ripening rate in delayed berries.

    Science.gov (United States)

    Gouthu, Satyanarayana; O'Neil, Shawn T; Di, Yanming; Ansarolia, Mitra; Megraw, Molly; Deluc, Laurent G

    2014-11-01

    Transcriptional studies in relation to fruit ripening generally aim to identify the transcriptional states associated with physiological ripening stages and the transcriptional changes between stages within the ripening programme. In non-climacteric fruits such as grape, all ripening-related genes involved in this programme have not been identified, mainly due to the lack of mutants for comparative transcriptomic studies. A feature in grape cluster ripening (Vitis vinifera cv. Pinot noir), where all berries do not initiate the ripening at the same time, was exploited to study their shifted ripening programmes in parallel. Berries that showed marked ripening state differences in a véraison-stage cluster (ripening onset) ultimately reached similar ripeness states toward maturity, indicating the flexibility of the ripening programme. The expression variance between these véraison-stage berry classes, where 11% of the genes were found to be differentially expressed, was reduced significantly toward maturity, resulting in the synchronization of their transcriptional states. Defined quantitative expression changes (transcriptional distances) not only existed between the véraison transitional stages, but also between the véraison to maturity stages, regardless of the berry class. It was observed that lagging berries complete their transcriptional programme in a shorter time through altered gene expressions and ripening-related hormone dynamics, and enhance the rate of physiological ripening progression. Finally, the reduction in expression variance of genes can identify new genes directly associated with ripening and also assess the relevance of gene activity to the phase of the ripening programme. © The Author 2014. Published by Oxford University Press on behalf of the Society for Experimental Biology.

  3. Apparatus and Method for Compensating for Process, Voltage, and Temperature Variation of the Time Delay of a Digital Delay Line

    Science.gov (United States)

    Seefeldt, James (Inventor); Feng, Xiaoxin (Inventor); Roper, Weston (Inventor)

    2013-01-01

    A process, voltage, and temperature (PVT) compensation circuit and a method of continuously generating a delay measure are provided. The compensation circuit includes two delay lines, each delay line providing a delay output. The two delay lines may each include a number of delay elements, which in turn may include one or more current-starved inverters. The number of delay lines may differ between the two delay lines. The delay outputs are provided to a combining circuit that determines an offset pulse based on the two delay outputs and then averages the voltage of the offset pulse to determine a delay measure. The delay measure may be one or more currents or voltages indicating an amount of PVT compensation to apply to input or output signals of an application circuit, such as a memory-bus driver, dynamic random access memory (DRAM), a synchronous DRAM, a processor or other clocked circuit.

  4. Tuberculosis patients' pre-hospital delay and non-compliance with a longstanding DOT programme : a mixed methods study in urban Zambia

    NARCIS (Netherlands)

    Cremers, Anne Lia; Gerrets, René; Kapata, Nathan; Kabika, Austin; Birnie, Emma; Klipstein-Grobusch, Kerstin|info:eu-repo/dai/nl/182904156; Grobusch, Martin P

    2016-01-01

    BACKGROUND: Tuberculosis (TB) remains a major health problem in Zambia, despite considerable efforts to control and prevent it. With this study, we aim to understand how perceptions and cultural, social, economic, and organisational factors influence TB patients' pre-hospital delay and

  5. Tuberculosis patients' pre-hospital delay and non-compliance with a longstanding DOT programme: a mixed methods study in urban Zambia

    NARCIS (Netherlands)

    Cremers, A.L.; Gerrets, R.; Kapata, N.; Kabika, A.; Birnie, E.; Klipstein-Grobusch, K.; Grobusch, M.P.

    2016-01-01

    Background Tuberculosis (TB) remains a major health problem in Zambia, despite considerable efforts to control and prevent it. With this study, we aim to understand how perceptions and cultural, social, economic, and organisational factors influence TB patients’ pre-hospital delay and non-compliance

  6. Tuberculosis patients' pre-hospital delay and non-compliance with a longstanding DOT programme: a mixed methods study in urban Zambia

    NARCIS (Netherlands)

    Cremers, Anne Lia; Gerrets, René; Kapata, Nathan; Kabika, Austin; Birnie, Emma; Klipstein-Grobusch, Kerstin; Grobusch, Martin P.

    2016-01-01

    Tuberculosis (TB) remains a major health problem in Zambia, despite considerable efforts to control and prevent it. With this study, we aim to understand how perceptions and cultural, social, economic, and organisational factors influence TB patients' pre-hospital delay and non-compliance with care

  7. Optically controllable molecular logic circuits

    Energy Technology Data Exchange (ETDEWEB)

    Nishimura, Takahiro, E-mail: t-nishimura@ist.osaka-u.ac.jp; Fujii, Ryo; Ogura, Yusuke; Tanida, Jun [Graduate School of Information Science and Technology, Osaka University, 1-5 Yamadaoka, Suita, Osaka 565-0871 (Japan)

    2015-07-06

    Molecular logic circuits represent a promising technology for observation and manipulation of biological systems at the molecular level. However, the implementation of molecular logic circuits for temporal and programmable operation remains challenging. In this paper, we demonstrate an optically controllable logic circuit that uses fluorescence resonance energy transfer (FRET) for signaling. The FRET-based signaling process is modulated by both molecular and optical inputs. Based on the distance dependence of FRET, the FRET pathways required to execute molecular logic operations are formed on a DNA nanostructure as a circuit based on its molecular inputs. In addition, the FRET pathways on the DNA nanostructure are controlled optically, using photoswitching fluorescent molecules to instruct the execution of the desired operation and the related timings. The behavior of the circuit can thus be controlled using external optical signals. As an example, a molecular logic circuit capable of executing two different logic operations was studied. The circuit contains functional DNAs and a DNA scaffold to construct two FRET routes for executing Input 1 AND Input 2 and Input 1 AND NOT Input 3 operations on molecular inputs. The circuit produced the correct outputs with all possible combinations of the inputs by following the light signals. Moreover, the operation execution timings were controlled based on light irradiation and the circuit responded to time-dependent inputs. The experimental results demonstrate that the circuit changes the output for the required operations following the input of temporal light signals.

  8. Reversible and quantum circuits optimization and complexity analysis

    CERN Document Server

    Abdessaied, Nabila

    2016-01-01

    This book presents a new optimization flow for quantum circuits realization. At the reversible level, optimization algorithms are presented to reduce the quantum cost. Then, new mapping approaches to decompose reversible circuits to quantum circuits using different quantum libraries are described. Finally, optimization techniques to reduce the quantum cost or the delay are applied to the resulting quantum circuits. Furthermore, this book studies the complexity of reversible circuits and quantum circuits from a theoretical perspective.

  9. Fast contactless vibrating structure characterization using real time field programmable gate array-based digital signal processing: demonstrations with a passive wireless acoustic delay line probe and vision.

    Science.gov (United States)

    Goavec-Mérou, G; Chrétien, N; Friedt, J-M; Sandoz, P; Martin, G; Lenczner, M; Ballandras, S

    2014-01-01

    Vibrating mechanical structure characterization is demonstrated using contactless techniques best suited for mobile and rotating equipments. Fast measurement rates are achieved using Field Programmable Gate Array (FPGA) devices as real-time digital signal processors. Two kinds of algorithms are implemented on FPGA and experimentally validated in the case of the vibrating tuning fork. A first application concerns in-plane displacement detection by vision with sampling rates above 10 kHz, thus reaching frequency ranges above the audio range. A second demonstration concerns pulsed-RADAR cooperative target phase detection and is applied to radiofrequency acoustic transducers used as passive wireless strain gauges. In this case, the 250 ksamples/s refresh rate achieved is only limited by the acoustic sensor design but not by the detection bandwidth. These realizations illustrate the efficiency, interest, and potentialities of FPGA-based real-time digital signal processing for the contactless interrogation of passive embedded probes with high refresh rates.

  10. Research on and development of materials used in components of the main circuit: experimental programmes and simulation to understand, model and plan for ageing; La R and D sur les materiaux des composants du circuit primaire principal: programmes experimentaux et simulation pour comprendre, modeliser et prevoir le vieillissement

    Energy Technology Data Exchange (ETDEWEB)

    Massoud, J.P. [Electricite de France (EDF/MMC/RD), Dept. MMC, Groupe Metallurgie, Site des Renardieres, 77 - Moret sur loing (France); Noe, H. [Electricite de France (EDF/SEPTEN), Service d' Etudes et Projets Thermiques et Nucleaires 69 - Villeurbanne (France); Pages, C. [Electricite de France (EDF), Unite d' Ingenierie en Exploitation - UNIE, 93 - Saint-Denis (France)

    2010-02-15

    The understanding of the in service behaviour of materials used in nuclear power plants, in aggressive conditions especially because of the neutron irradiation, is a major concern for the nuclear industry, and the prediction of their long term behaviour is necessary. Extensive R and D programmes were launched by EDF, often in collaboration with CEA and AREVA, even in the framework of international projects, for a better understanding and prediction of the ageing phenomena of these material under irradiation or not. One of the main result of this R and D effort is a continuous improvement in the prediction models whatever empirical, semi-empirical or physically based. (authors)

  11. Fuzzy delay model based fault simulator for crosstalk delay fault test ...

    Indian Academy of Sciences (India)

    The delays of a logic gates or interconnect are affected by various fabrication process parameters and however accurate the delay models are, it is very difficult to model the process uncertainties. In this paper, the fuzzy delay model is employed for test generation of crosstalk delay faults in asynchronous sequential circuits.

  12. Embedded systems circuits and programming

    CERN Document Server

    Sanchez, Julio

    2012-01-01

    During the development of an engineered product, developers often need to create an embedded system--a prototype--that demonstrates the operation/function of the device and proves its viability. Offering practical tools for the development and prototyping phases, Embedded Systems Circuits and Programming provides a tutorial on microcontroller programming and the basics of embedded design. The book focuses on several development tools and resources: Standard and off-the-shelf components, such as input/output devices, integrated circuits, motors, and programmable microcontrollers The implementat

  13. Affective Circuits

    DEFF Research Database (Denmark)

    to the intersecting streams of goods, people, ideas, and money as they circulate between African migrants and their kin who remain back home. They also show the complex ways that emotions become entangled in these exchanges. Examining how these circuits operate in domains of social life ranging from child fosterage...... to binational marriages, from coming-of-age to healing and religious rituals, the book also registers the tremendous impact of state officials, laws, and policies on migrant experience. Together these essays paint an especially vivid portrait of new forms of kinship at a time of both intense mobility and ever...

  14. System Measures Logic-Gate Delays

    Science.gov (United States)

    Blaes, Brent R.

    1988-01-01

    Many gates on chip tested automatically. Automatic testing system measures signal-propagation delays of experimental integrated-circuit array of logic gates. Includes controlling computer, counter/time, and feedback-controlled timing-waveform generator. Multiplexer included on integrated-circuit chip with logic-gate array to be tested. Delays measured by system serve as valuable data for design of fast logic and memory chips.

  15. LOGIC CIRCUIT

    Science.gov (United States)

    Strong, G.H.; Faught, M.L.

    1963-12-24

    A device for safety rod counting in a nuclear reactor is described. A Wheatstone bridge circuit is adapted to prevent de-energizing the hopper coils of a ball backup system if safety rods, sufficient in total control effect, properly enter the reactor core to effect shut down. A plurality of resistances form one arm of the bridge, each resistance being associated with a particular safety rod and weighted in value according to the control effect of the particular safety rod. Switching means are used to switch each of the resistances in and out of the bridge circuit responsive to the presence of a particular safety rod in its effective position in the reactor core and responsive to the attainment of a predetermined velocity by a particular safety rod enroute to its effective position. The bridge is unbalanced in one direction during normal reactor operation prior to the generation of a scram signal and the switching means and resistances are adapted to unbalance the bridge in the opposite direction if the safety rods produce a predetermined amount of control effect in response to the scram signal. The bridge unbalance reversal is then utilized to prevent the actuation of the ball backup system, or, conversely, a failure of the safety rods to produce the predetermined effect produces no unbalance reversal and the ball backup system is actuated. (AEC)

  16. Controllable circuit

    DEFF Research Database (Denmark)

    2010-01-01

    signal. The control unit comprises a first signal processing unit, a second signal processing unit, and a combiner unit. The first signal processing unit has an output and is supplied with a first carrier signal and an input signal. The second signal processing unit has an output and is supplied...... with a second carrier signal and the input signal. The combiner unit is connected to the first and second signal processing units combining the outputs of the first and the second signal processing units to form a signal representative of the control signal......A switch-mode power circuit comprises a controllable element and a control unit. The controllable element is configured to control a current in response to a control signal supplied to the controllable element. The control unit is connected to the controllable element and provides the control...

  17. Digital Pulse-Width-Modulation Circuit

    Science.gov (United States)

    Wenzler, Carl J.; Eichenberg, Dennis J.

    1995-01-01

    Digital pulse-width-modulation circuit provides programmable duration from 1 microsecond to full on, at repetition rate of 1 kHz. Designed for use in controlling CO2 laser, also used in applications in which precision and flexibility of digital control of pulse durations needed. Circuit incorporates low-power Schottky transistor/transistor-logic (TTL) devices in critical high-speed parts. Designed in TTL to make it compatible with Pro-Log 7914 (or equivalent) decoder input/output (I/O) utility printed-circuit card.

  18. PROGRAMMABLE AUTONOMOUS ROBOTS

    Directory of Open Access Journals (Sweden)

    Lucian PESTRITU

    2012-05-01

    Full Text Available This paper aims to present how technology has advanced in terms of programmable microcontrollers and how circuits can be equipped with complex software so they can to act on their own, becoming a so-called autonomous robot or agent. To illustrate this, the 3PI robot is used, which is faced with solving a problem by itself, namely: solving a maze on its own. To make this possible so we had to implement this robot with a computer algorithm that helps it to remember the route that it had just travelled and then find the shortest and fastest way to the destination point.

  19. Modeling delay in genetic networks: from delay birth-death processes to delay stochastic differential equations.

    Science.gov (United States)

    Gupta, Chinmaya; López, José Manuel; Azencott, Robert; Bennett, Matthew R; Josić, Krešimir; Ott, William

    2014-05-28

    Delay is an important and ubiquitous aspect of many biochemical processes. For example, delay plays a central role in the dynamics of genetic regulatory networks as it stems from the sequential assembly of first mRNA and then protein. Genetic regulatory networks are therefore frequently modeled as stochastic birth-death processes with delay. Here, we examine the relationship between delay birth-death processes and their appropriate approximating delay chemical Langevin equations. We prove a quantitative bound on the error between the pathwise realizations of these two processes. Our results hold for both fixed delay and distributed delay. Simulations demonstrate that the delay chemical Langevin approximation is accurate even at moderate system sizes. It captures dynamical features such as the oscillatory behavior in negative feedback circuits, cross-correlations between nodes in a network, and spatial and temporal information in two commonly studied motifs of metastability in biochemical systems. Overall, these results provide a foundation for using delay stochastic differential equations to approximate the dynamics of birth-death processes with delay.

  20. Analog circuit design designing dynamic circuit response

    CERN Document Server

    Feucht, Dennis

    2010-01-01

    This second volume, Designing Dynamic Circuit Response builds upon the first volume Designing Amplifier Circuits by extending coverage to include reactances and their time- and frequency-related behavioral consequences.

  1. Dynamics of Nonlinear Time-Delay Systems

    CERN Document Server

    Lakshmanan, Muthusamy

    2010-01-01

    Synchronization of chaotic systems, a patently nonlinear phenomenon, has emerged as a highly active interdisciplinary research topic at the interface of physics, biology, applied mathematics and engineering sciences. In this connection, time-delay systems described by delay differential equations have developed as particularly suitable tools for modeling specific dynamical systems. Indeed, time-delay is ubiquitous in many physical systems, for example due to finite switching speeds of amplifiers in electronic circuits, finite lengths of vehicles in traffic flows, finite signal propagation times in biological networks and circuits, and quite generally whenever memory effects are relevant. This monograph presents the basics of chaotic time-delay systems and their synchronization with an emphasis on the effects of time-delay feedback which give rise to new collective dynamics. Special attention is devoted to scalar chaotic/hyperchaotic time-delay systems, and some higher order models, occurring in different bran...

  2. Analog circuit design designing waveform processing circuits

    CERN Document Server

    Feucht, Dennis

    2010-01-01

    The fourth volume in the set Designing Waveform-Processing Circuits builds on the previous 3 volumes and presents a variety of analog non-amplifier circuits, including voltage references, current sources, filters, hysteresis switches and oscilloscope trigger and sweep circuitry, function generation, absolute-value circuits, and peak detectors.

  3. Delayed Puberty

    DEFF Research Database (Denmark)

    Kolby, Nanna; Busch, Alexander Siegfried; Juul, Anders

    2017-01-01

    Delayed puberty can be a source of great concern and anxiety, although it usually is caused by a self-limiting variant of the normal physiological timing named constitutional delay of growth and puberty (CDGP). Delayed puberty can, however, also be the first presentation of a permanent condition...... of diagnostic evaluation today remain in distinguishing the benign CDGP from underlying pathological causes such as hypogonadotropic hypogonadism (HH) and hypergonadotropic hypogonadism. Several techniques have been investigated for this purpose and are reviewed in this chapter; however, no single test is yet...

  4. Acute evaluation of programmer-guided AV/PV and VV delay optimization comparing an IEGM method and echocardiogram for cardiac resynchronization therapy in heart failure patients and dual-chamber ICD implants.

    Science.gov (United States)

    Baker, James H; McKenzie, John; Beau, Scott; Greer, G Stephen; Porterfield, James; Fedor, Matthew; Greenberg, Steven; Daoud, Emile G; Corbisiero, Raffaele; Bailey, J Russell; Porterfield, Linda

    2007-02-01

    Intracardiac delay optimization of biventricular and dual-chamber pacing devices currently relies on time-consuming echocardiographic measurements. A novel intracardiac electrogram (IEGM) method for atrioventricular (AV/PV) and interventricular (VV) delay optimization was developed, which can be performed during routine device follow-up. In this prospective, nonrandomized, multi-center trial, patients previously implanted with St. Jude Medical cardiac resynchronization therapy defibrillator (CRT-D) devices or dual-chamber implantable cardioverter defibrillators (ICDs) underwent standard AV/PV and/or VV delay optimization guided by Doppler echocardiogram measurements of the maximum aortic velocity time integral (aortic VTI). Aortic VTI measurements applying the IEGM method recommended delays were then obtained in all patients. Fifty-eight patients (age: 68 +/- 11 years; 81% male; 74% ischemic) and 57 patients (age: 71 +/- 10 years; 74% male; 71% ischemic) were enrolled for AV/PV and VV delay evaluation, respectively. An independent core lab determined the maximum aortic VTIs. Data analysis of the AV, PV, and VV delays demonstrated the concordance correlation coefficient (CCC) between the standard method aortic VTI values and the IEGM method aortic VTI values was 97.5%, 96.1%, and 96.6%, respectively. All analyses demonstrated that the CCC > 90% (P method provides a reliable and simpler alternative to standard techniques for the optimization of AV/PV and VV delay settings in patients with CRT-D devices and dual-chamber ICDs.

  5. Delayed growth

    Science.gov (United States)

    ... 4 years Developmental milestones record - 5 years Causes Constitutional growth delay refers to children who are small ... nutrition expert who can help you choose the right foods to offer your child. What to Expect ...

  6. Delayed Ejaculation

    Science.gov (United States)

    ... bladder rather than out of the penis Psychological causes of delayed ejaculation include: Depression, anxiety or other mental health conditions Relationship problems due to stress, poor communication or other concerns ...

  7. Delayed Ejaculation

    Science.gov (United States)

    ... of stress Delayed ejaculation Symptoms & causes Diagnosis & treatment Advertisement Mayo Clinic does not endorse companies or products. ... a Job Site Map About This Site Twitter Facebook Google YouTube Pinterest Mayo Clinic is a not- ...

  8. A Computer Controlled Pulse Programmer for Pulsed NQR Experiments

    OpenAIRE

    Horiuchi, Keizo; 堀内, 敬三

    1987-01-01

    We constructed a computer controlled pulse programmer for the measurement of nuclear quadrupole resonance relaxation times. Programmable interval timer 8253 was used as device for pulse programming. The circuit is very simple and construction is also easy in comparison with the usual pulse programmer. This programmer is sufficiently useful concerning the pulse programming of slimple pulse sequences such as π-τ-π/2 and π/2-τ-π, which are usually used in the measurement of relaxation times. We ...

  9. Equivalent Quantum Circuits

    OpenAIRE

    Garcia-Escartin, Juan Carlos; Chamorro-Posada, Pedro

    2011-01-01

    Quantum algorithms and protocols are often presented as quantum circuits for a better understanding. We give a list of equivalence rules which can help in the analysis and design of quantum circuits. As example applications we study quantum teleportation and dense coding protocols in terms of a simple XOR swapping circuit and give an intuitive picture of a basic gate teleportation circuit.

  10. Timing Analysis of Genetic Logic Circuits using D-VASim

    DEFF Research Database (Denmark)

    Baig, Hasan; Madsen, Jan

    delay analysis may play a very significant role in the designing of genetic logic circuits. In thisdemonstration, we present the capability of D-VASim (Dynamic Virtual Analyzer and Simulator) to perform the timing and propagationdelay analysis of genetic logic circuits. Using D-VASim, the timing......A genetic logic circuit is a gene regulator network implemented by re-engineering the DNA of a cell, in order to controlgene expression or metabolic pathways, through a logic combination of external signals, such as chemicals or proteins. As for electroniclogic circuits, timing and propagation...... and propagation delay analysis of single as well as cascaded geneticlogic circuits can be performed. D-VASim allows user to change the circuit parameters during runtime simulation to observe its effectson circuit’s timing behavior. The results obtained from D-VASim can be used not only to characterize the timing...

  11. Universal Quantum Circuits

    OpenAIRE

    Bera, Debajyoti; Fenner, Stephen; Green, Frederic; Homer, Steve

    2008-01-01

    We define and construct efficient depth-universal and almost-size-universal quantum circuits. Such circuits can be viewed as general-purpose simulators for central classes of quantum circuits and can be used to capture the computational power of the circuit class being simulated. For depth we construct universal circuits whose depth is the same order as the circuits being simulated. For size, there is a log factor blow-up in the universal circuits constructed here. We prove that this construc...

  12. Circuit analysis for dummies

    CERN Document Server

    Santiago, John

    2013-01-01

    Circuits overloaded from electric circuit analysis? Many universities require that students pursuing a degree in electrical or computer engineering take an Electric Circuit Analysis course to determine who will ""make the cut"" and continue in the degree program. Circuit Analysis For Dummies will help these students to better understand electric circuit analysis by presenting the information in an effective and straightforward manner. Circuit Analysis For Dummies gives you clear-cut information about the topics covered in an electric circuit analysis courses to help

  13. Solid-state circuits

    CERN Document Server

    Pridham, G J

    2013-01-01

    Solid-State Circuits provides an introduction to the theory and practice underlying solid-state circuits, laying particular emphasis on field effect transistors and integrated circuits. Topics range from construction and characteristics of semiconductor devices to rectification and power supplies, low-frequency amplifiers, sine- and square-wave oscillators, and high-frequency effects and circuits. Black-box equivalent circuits of bipolar transistors, physical equivalent circuits of bipolar transistors, and equivalent circuits of field effect transistors are also covered. This volume is divided

  14. The evolvability of programmable hardware

    Science.gov (United States)

    Raman, Karthik; Wagner, Andreas

    2011-01-01

    In biological systems, individual phenotypes are typically adopted by multiple genotypes. Examples include protein structure phenotypes, where each structure can be adopted by a myriad individual amino acid sequence genotypes. These genotypes form vast connected ‘neutral networks’ in genotype space. The size of such neutral networks endows biological systems not only with robustness to genetic change, but also with the ability to evolve a vast number of novel phenotypes that occur near any one neutral network. Whether technological systems can be designed to have similar properties is poorly understood. Here we ask this question for a class of programmable electronic circuits that compute digital logic functions. The functional flexibility of such circuits is important in many applications, including applications of evolutionary principles to circuit design. The functions they compute are at the heart of all digital computation. We explore a vast space of 1045 logic circuits (‘genotypes’) and 1019 logic functions (‘phenotypes’). We demonstrate that circuits that compute the same logic function are connected in large neutral networks that span circuit space. Their robustness or fault-tolerance varies very widely. The vicinity of each neutral network contains circuits with a broad range of novel functions. Two circuits computing different functions can usually be converted into one another via few changes in their architecture. These observations show that properties important for the evolvability of biological systems exist in a commercially important class of electronic circuitry. They also point to generic ways to generate fault-tolerant, adaptable and evolvable electronic circuitry. PMID:20534598

  15. Large Deviations for Gaussian Diffusions with Delay

    Science.gov (United States)

    Azencott, Robert; Geiger, Brett; Ott, William

    2018-01-01

    Dynamical systems driven by nonlinear delay SDEs with small noise can exhibit important rare events on long timescales. When there is no delay, classical large deviations theory quantifies rare events such as escapes from metastable fixed points. Near such fixed points, one can approximate nonlinear delay SDEs by linear delay SDEs. Here, we develop a fully explicit large deviations framework for (necessarily Gaussian) processes X_t driven by linear delay SDEs with small diffusion coefficients. Our approach enables fast numerical computation of the action functional controlling rare events for X_t and of the most likely paths transiting from X_0 = p to X_T=q. Via linear noise local approximations, we can then compute most likely routes of escape from metastable states for nonlinear delay SDEs. We apply our methodology to the detailed dynamics of a genetic regulatory circuit, namely the co-repressive toggle switch, which may be described by a nonlinear chemical Langevin SDE with delay.

  16. The circuit designer's companion

    CERN Document Server

    Williams, Tim

    1991-01-01

    The Circuit Designer's Companion covers the theoretical aspects and practices in analogue and digital circuit design. Electronic circuit design involves designing a circuit that will fulfill its specified function and designing the same circuit so that every production model of it will fulfill its specified function, and no other undesired and unspecified function.This book is composed of nine chapters and starts with a review of the concept of grounding, wiring, and printed circuits. The subsequent chapters deal with the passive and active components of circuitry design. These topics are foll

  17. Electronic devices and circuits

    CERN Document Server

    Pridham, Gordon John

    1972-01-01

    Electronic Devices and Circuits, Volume 3 provides a comprehensive account on electronic devices and circuits and includes introductory network theory and physics. The physics of semiconductor devices is described, along with field effect transistors, small-signal equivalent circuits of bipolar transistors, and integrated circuits. Linear and non-linear circuits as well as logic circuits are also considered. This volume is comprised of 12 chapters and begins with an analysis of the use of Laplace transforms for analysis of filter networks, followed by a discussion on the physical properties of

  18. Intuitive analog circuit design

    CERN Document Server

    Thompson, Marc

    2013-01-01

    Intuitive Analog Circuit Design outlines ways of thinking about analog circuits and systems that let you develop a feel for what a good, working analog circuit design should be. This book reflects author Marc Thompson's 30 years of experience designing analog and power electronics circuits and teaching graduate-level analog circuit design, and is the ideal reference for anyone who needs a straightforward introduction to the subject. In this book, Dr. Thompson describes intuitive and ""back-of-the-envelope"" techniques for designing and analyzing analog circuits, including transistor amplifi

  19. Design and implementation of a simple acousto optic dual control circuit

    Science.gov (United States)

    Li, Biqing; Li, Zhao

    2017-04-01

    This page proposed a simple light control circuit which designed by using power supply circuit, sonic circuits, electric circuit and delay circuit four parts. The main chip for CD4011, have inside of the four and to complete the sonic or circuit, electric, delay logic circuit. During the day, no matter how much a pedestrian voice, is ever shine light bulb. Dark night, circuit in a body to make the microphone as long as testing noise, and will automatically be bright for pedestrians lighting, several minutes after the automatic and put out, effective energy saving. Applicable scope and the working principle of the circuit principle diagram and given device parameters selection, power saving effect is obvious, at the same time greatly reduce the maintenance quantity, saving money, use effect is good.

  20. A high-resolution time interpolator based on a delay locked loop and an RC delay line

    CERN Document Server

    Mota, M

    1999-01-01

    An architecture for a time interpolation circuit with an rms error of ~25 ps has been developed in a 0.7- mu m CMOS technology. It is based on a delay locked loop (DLL) driven by a 160-MHz reference clock and a passive RC delay line controlled by an autocalibration circuit. Start-up calibration of the RC delay line is performed using code density tests (CDT). The very small temperature/voltage dependence of R and C parameters and the self calibrating DLL results in a low- power, high-resolution time interpolation circuit in a standard digital CMOS technology. (11 refs).

  1. Managing contamination delay to improve Timing Speculation architectures

    Directory of Open Access Journals (Sweden)

    Naga Durga Prasad Avirneni

    2016-08-01

    Full Text Available Timing Speculation (TS is a widely known method for realizing better-than-worst-case systems. Aggressive clocking, realizable by TS, enable systems to operate beyond specified safe frequency limits to effectively exploit the data dependent circuit delay. However, the range of aggressive clocking for performance enhancement under TS is restricted by short paths. In this paper, we show that increasing the lengths of short paths of the circuit increases the effectiveness of TS, leading to performance improvement. Also, we propose an algorithm to efficiently add delay buffers to selected short paths while keeping down the area penalty. We present our algorithm results for ISCAS-85 suite and show that it is possible to increase the circuit contamination delay by up to 30% without affecting the propagation delay. We also explore the possibility of increasing short path delays further by relaxing the constraint on propagation delay and analyze the performance impact.

  2. Delay 25 an ASIC for timing adjustment in LHC

    NARCIS (Netherlands)

    Furtado, H.; Schrader, J.H.R.; Marchioro, A.; Moreira, P.

    A five channel programmable delay line ASIC was designed featuring 4 channels that allow to phase delay periodic or non-periodic digital signals and a master channel that can be used to phase delay a clock signal. The master channel serves as a calibration reference guaranteeing independence from

  3. A protocol for a cluster-randomized controlled trial of a self-help psycho-education programme to reduce diagnosis delay in women with breast cancer symptoms in Indonesia

    NARCIS (Netherlands)

    H. Setyowibowo (Hari); M. Sijbrandij (Marit); A. Iskandarsyah (Aulia); J.A.M. Hunfeld (Joke); S.S. Sadarjoen (Sawitri); D.F. Badudu (Dharmayanti F.); D.R. Suardi (Dradjat); J. Passchier (Jan)

    2017-01-01

    markdownabstractBackground: Breast cancer (BC) is the most frequent cancer occurring in women across the world. Its mortality rate in low-middle income countries (LMICs) is higher than in high-income countries (HICs), and in Indonesia BC is the leading cause of cancer deaths among women. Delay in

  4. A protocol for a cluster-randomized controlled trial of a self-help psycho-education programme to reduce diagnosis delay in women with breast cancer symptoms in Indonesia

    NARCIS (Netherlands)

    Setyowibowo, H. (Hari); M. Sijbrandij (Marit); A. Iskandarsyah (Aulia); J.A.M. Hunfeld (Joke); S.S. Sadarjoen (Sawitri); Badudu, D.F. (Dharmayanti F.); D.R. Suardi (Dradjat); J. Passchier (Jan)

    2017-01-01

    textabstractBackground: Breast cancer (BC) is the most frequent cancer occurring in women across the world. Its mortality rate in low-middle income countries (LMICs) is higher than in high-income countries (HICs), and in Indonesia BC is the leading cause of cancer deaths among women. Delay in breast

  5. Electric circuits essentials

    CERN Document Server

    REA, Editors of

    2012-01-01

    REA's Essentials provide quick and easy access to critical information in a variety of different fields, ranging from the most basic to the most advanced. As its name implies, these concise, comprehensive study guides summarize the essentials of the field covered. Essentials are helpful when preparing for exams, doing homework and will remain a lasting reference source for students, teachers, and professionals. Electric Circuits I includes units, notation, resistive circuits, experimental laws, transient circuits, network theorems, techniques of circuit analysis, sinusoidal analysis, polyph

  6. Signal sampling circuit

    NARCIS (Netherlands)

    Louwsma, S.M.; Vertregt, Maarten

    2011-01-01

    A sampling circuit for sampling a signal is disclosed. The sampling circuit comprises a plurality of sampling channels adapted to sample the signal in time-multiplexed fashion, each sampling channel comprising a respective track-and-hold circuit connected to a respective analogue to digital

  7. Signal sampling circuit

    NARCIS (Netherlands)

    Louwsma, S.M.; Vertregt, Maarten

    2010-01-01

    A sampling circuit for sampling a signal is disclosed. The sampling circuit comprises a plurality of sampling channels adapted to sample the signal in time-multiplexed fashion, each sampling channel comprising a respective track-and-hold circuit connected to a respective analogue to digital

  8. Piezoelectric drive circuit

    Science.gov (United States)

    Treu, Jr., Charles A.

    1999-08-31

    A piezoelectric motor drive circuit is provided which utilizes the piezoelectric elements as oscillators and a Meacham half-bridge approach to develop feedback from the motor ground circuit to produce a signal to drive amplifiers to power the motor. The circuit automatically compensates for shifts in harmonic frequency of the piezoelectric elements due to pressure and temperature changes.

  9. Exact Threshold Circuits

    DEFF Research Database (Denmark)

    Hansen, Kristoffer Arnsfelt; Podolskii, Vladimir V.

    2010-01-01

    with the well-studied corresponding hierarchies defined using ordinary threshold gates. A major open problem in Boolean circuit complexity is to provide an explicit super-polynomial lower bound for depth two threshold circuits. We identify the class of depth two exact threshold circuits as a natural subclass...

  10. Load testing circuit

    DEFF Research Database (Denmark)

    2009-01-01

    A load testing circuit a circuit tests the load impedance of a load connected to an amplifier. The load impedance includes a first terminal and a second terminal, the load testing circuit comprising a signal generator providing a test signal of a defined bandwidth to the first terminal of the load...

  11. Short-circuit logic

    NARCIS (Netherlands)

    Bergstra, J.A.; Ponse, A.

    2010-01-01

    Short-circuit evaluation denotes the semantics of propositional connectives in which the second argument is only evaluated if the first argument does not suffice to determine the value of the expression. In programming, short-circuit evaluation is widely used. A short-circuit logic is a variant of

  12. Delayed Puberty

    DEFF Research Database (Denmark)

    Kolby, Nanna; Busch, Alexander Siegfried; Juul, Anders

    2017-01-01

    or a symptom of an underlying disease. The diagnosis delayed puberty is made if there are no signs of puberty at an age corresponding to 2 SD above the population mean age at pubertal onset, often translated into 14 years in boys. Delayed puberty among boys is a frequent presentation in pediatrics....... The underlying reasons for the large variation in the age at pubertal onset are not fully established; however, nutritional status and socioeconomic and environmental factors are known to be influencing, and a significant amount of influencing genetic factors have also been identified. The challenges...... of diagnostic evaluation today remain in distinguishing the benign CDGP from underlying pathological causes such as hypogonadotropic hypogonadism (HH) and hypergonadotropic hypogonadism. Several techniques have been investigated for this purpose and are reviewed in this chapter; however, no single test is yet...

  13. Broadband hyperchaotic oscillator with delay line

    DEFF Research Database (Denmark)

    Cenys, Antanas; Lindberg, Erik; Anagnostopoulos, A. N.

    2002-01-01

    Dynamical systems with time delay can be employed as high dimensional hyperchaotic oscillators with multiple positive Lyapunov exponents. We describe an electronic circuit composed of a 3-stage amplifier and a delay line in the feedback loop. The 1st stage of the amplifier is a nonlinear one whil...... 20 dB. Mathematical models are presented. The oscillators are described either by a scalar nonlinear DDE or by a set combined of one nonlinear DDE and two linear ODEs....

  14. Data readout system utilizing photonic integrated circuit

    Energy Technology Data Exchange (ETDEWEB)

    Stopiński, S., E-mail: S.Stopinski@tue.nl [COBRA Research Institute, Eindhoven University of Technology (Netherlands); Institute of Microelectronics and Optoelectronics, Warsaw University of Technology (Poland); Malinowski, M.; Piramidowicz, R. [Institute of Microelectronics and Optoelectronics, Warsaw University of Technology (Poland); Smit, M.K.; Leijtens, X.J.M. [COBRA Research Institute, Eindhoven University of Technology (Netherlands)

    2013-10-11

    We describe a novel optical solution for data readout systems. The core of the system is an Indium-Phosphide photonic integrated circuit performing as a front-end readout unit. It functions as an optical serializer in which the serialization of the input signal is provided by means of on-chip optical delay lines. The circuit employs electro-optic phase shifters to build amplitude modulators, power splitters for signal distribution, semiconductor optical amplifiers for signal amplification as well as on-chip reflectors. We present the concept of the system, the design and first characterization results of the devices that were fabricated in a multi-project wafer run.

  15. Artwork Analysis Tools for VLSI Circuits.

    Science.gov (United States)

    1980-06-01

    derived frcm the art- work.i~nFo :.- Is zr Code DI t pecal Sculnfv CLA a uPICAT OP T0416 PA*6WM Dine Bftee AMA& -’M Artwork Analysis Tools for VLSI Circuits... code of the program and in pre-generated bit tables. The design rules thcmselves are not input directly into the checker. The rules were interpreted...circuit simulation is swich -level sintulation. In this type, transistors are modeled as switches that are either on or off. Fixed delays are a%.ociated

  16. Integrated Circuit For Simulation Of Neural Network

    Science.gov (United States)

    Thakoor, Anilkumar P.; Moopenn, Alexander W.; Khanna, Satish K.

    1988-01-01

    Ballast resistors deposited on top of circuit structure. Cascadable, programmable binary connection matrix fabricated in VLSI form as basic building block for assembly of like units into content-addressable electronic memory matrices operating somewhat like networks of neurons. Connections formed during storage of data, and data recalled from memory by prompting matrix with approximate or partly erroneous signals. Redundancy in pattern of connections causes matrix to respond with correct stored data.

  17. Temperature Dependent Wire Delay Estimation in Floorplanning

    DEFF Research Database (Denmark)

    Winther, Andreas Thor; Liu, Wei; Nannarelli, Alberto

    2011-01-01

    Due to large variations in temperature in VLSI circuits and the linear relationship between metal resistance and temperature, the delay through wires of the same length can be different. Traditional thermal aware floorplanning algorithms use wirelength to estimate delay and routability....... In this work, we show that using wirelength as the evaluation metric does not always produce a floorplan with the shortest delay. We propose a temperature dependent wire delay estimation method for thermal aware floorplanning algorithms, which takes into account the thermal effect on wire delay. The experiment...... results show that a shorter delay can be achieved using the proposed method. In addition, we also discuss the congestion and reliability issues as they are closely related to routing and temperature....

  18. Feedback in analog circuits

    CERN Document Server

    Ochoa, Agustin

    2016-01-01

    This book describes a consistent and direct methodology to the analysis and design of analog circuits with particular application to circuits containing feedback. The analysis and design of circuits containing feedback is generally presented by either following a series of examples where each circuit is simplified through the use of insight or experience (someone else’s), or a complete nodal-matrix analysis generating lots of algebra. Neither of these approaches leads to gaining insight into the design process easily. The author develops a systematic approach to circuit analysis, the Driving Point Impedance and Signal Flow Graphs (DPI/SFG) method that does not require a-priori insight to the circuit being considered and results in factored analysis supporting the design function. This approach enables designers to account fully for loading and the bi-directional nature of elements both in the feedback path and in the amplifier itself, properties many times assumed negligible and ignored. Feedback circuits a...

  19. Technology Programme

    Energy Technology Data Exchange (ETDEWEB)

    Batistoni, Paola; De Marco, Francesco; Pieroni, Leonardo (ed.)

    2005-07-01

    The technology activities carried out by the Euratom-ENEA Association in the framework of the European Fusion Development Agreement concern the Next Step (International Thermonuclear Experimental Reactor - ITER), the Long-Term Programme (breeder blanket, materials, International Fusion Materials Irradiation Facility - IFMIF), Power Plant Conceptual Studies and Socio-Economic Studies. The Underlying Technology Programme was set up to complement the fusion activities as well to develop technologies with a wider range of interest. The Technology Programme mainly involves staff from the Frascati laboratories of the Fusion Technical and Scientific Unit and from the Brasimone laboratories of the Advanced Physics Technologies Unit. Other ENEA units also provide valuable contributions to the programme. ENEA is heavily engaged in component development/testing and in design and safety activities for the European Fusion Technology Programme. Although the work documented in the following covers a large range of topics that differ considerably because they concern the development of extremely complex systems, the high level of integration and coordination ensures the capability to cover the fusion system as a whole. In 2004 the most significant testing activities concerned the ITER primary beryllium-coated first wall. In the field of high-heat-flux components, an important achievement was the qualification of the process for depositing a copper liner on carbon fibre composite (CFC) hollow tiles. This new process, pre-brazed casting (PBC), allows the hot radial pressing (HRP) joining procedure to be used also for CFC-based armour monoblock divertor components. The PBC and HRP processes are candidates for the construction of the ITER divertor. In the materials field an important milestone was the commissioning of a new facility for chemical vapour infiltration/deposition, used for optimising silicon carbide composite (SiCf/SiC) components. Eight patents were deposited during 2004

  20. Measuring information-transfer delays.

    Directory of Open Access Journals (Sweden)

    Michael Wibral

    Full Text Available In complex networks such as gene networks, traffic systems or brain circuits it is important to understand how long it takes for the different parts of the network to effectively influence one another. In the brain, for example, axonal delays between brain areas can amount to several tens of milliseconds, adding an intrinsic component to any timing-based processing of information. Inferring neural interaction delays is thus needed to interpret the information transfer revealed by any analysis of directed interactions across brain structures. However, a robust estimation of interaction delays from neural activity faces several challenges if modeling assumptions on interaction mechanisms are wrong or cannot be made. Here, we propose a robust estimator for neuronal interaction delays rooted in an information-theoretic framework, which allows a model-free exploration of interactions. In particular, we extend transfer entropy to account for delayed source-target interactions, while crucially retaining the conditioning on the embedded target state at the immediately previous time step. We prove that this particular extension is indeed guaranteed to identify interaction delays between two coupled systems and is the only relevant option in keeping with Wiener's principle of causality. We demonstrate the performance of our approach in detecting interaction delays on finite data by numerical simulations of stochastic and deterministic processes, as well as on local field potential recordings. We also show the ability of the extended transfer entropy to detect the presence of multiple delays, as well as feedback loops. While evaluated on neuroscience data, we expect the estimator to be useful in other fields dealing with network dynamics.

  1. Delay grid multiplexing: simple time-based multiplexing and readout method for silicon photomultipliers

    Science.gov (United States)

    Won, Jun Yeon; Ko, Guen Bae; Lee, Jae Sung

    2016-10-01

    In this paper, we propose a fully time-based multiplexing and readout method that uses the principle of the global positioning system. Time-based multiplexing allows simplifying the multiplexing circuits where the only innate traces that connect the signal pins of the silicon photomultiplier (SiPM) channels to the readout channels are used as the multiplexing circuit. Every SiPM channel is connected to the delay grid that consists of the traces on a printed circuit board, and the inherent transit times from each SiPM channel to the readout channels encode the position information uniquely. Thus, the position of each SiPM can be identified using the time difference of arrival (TDOA) measurements. The proposed multiplexing can also allow simplification of the readout circuit using the time-to-digital converter (TDC) implemented in a field-programmable gate array (FPGA), where the time-over-threshold (ToT) is used to extract the energy information after multiplexing. In order to verify the proposed multiplexing method, we built a positron emission tomography (PET) detector that consisted of an array of 4  ×  4 LGSO crystals, each with a dimension of 3  ×  3  ×  20 mm3, and one- to-one coupled SiPM channels. We first employed the waveform sampler as an initial study, and then replaced the waveform sampler with an FPGA-TDC to further simplify the readout circuits. The 16 crystals were clearly resolved using only the time information obtained from the four readout channels. The coincidence resolving times (CRTs) were 382 and 406 ps FWHM when using the waveform sampler and the FPGA-TDC, respectively. The proposed simple multiplexing and readout methods can be useful for time-of-flight (TOF) PET scanners.

  2. Nanoelectronic circuit design and test

    Science.gov (United States)

    Simsir, Muzaffer Orkun

    Controlling power consumption in CMOS integrated circuits (ICs) during normal mode of operation is becoming one of the limiting factors to further scaling. In addition, it is a well known fact that during testing of a complex IC, power consumption can far exceed the values reached during its normal operation. High power consumption, combined with limited cooling support, leads to overheating of ICs. This can cause permanent damage to the chip or can invalidate test results due to the fact that extreme temperature variations lead to changes in path delays. Therefore, even good chips can fail the test. For these reasons, thermal problems during test need to be identified to prevent the loss of yield in CMOS ICs. In this thesis, we propose a methodology for thermally characterizing circuits under test. Using this methodology, it is possible to simulate the thermal profiles of the chips during test and prevent possible yield loss because of thermal problems. In addition to the problems associated with power and temperature, a more important barrier is the scaling limitations of the CMOS technology. It has been predicted that in next decade, it will not be possible to scale it further. In the near future, rather than a transition to a completely new technology, extensions to CMOS seem to be more realistic. Double-gate CMOS technology is one of the most promising alternatives that offers a simple extension to CMOS. The transistors of this technology are formed by adding a second gate across the conventional CMOS transistor gate. Designing circuits using this technology has attracted a lot of attention. However, as circuit design methods mature, there is a need to identify how these circuits can be tested. From a circuit testing viewpoint, it is unclear if CMOS fault models are comprehensive enough to model all defects in double-gate CMOS circuits. Therefore, fault models of this technology need to be defined to enable manufacturing-time testing. In this thesis, we

  3. Electric circuits and signals

    CERN Document Server

    Sabah, Nassir H

    2007-01-01

    Circuit Variables and Elements Overview Learning Objectives Electric Current Voltage Electric Power and Energy Assigned Positive Directions Active and Passive Circuit Elements Voltage and Current Sources The Resistor The Capacitor The Inductor Concluding Remarks Summary of Main Concepts and Results Learning Outcomes Supplementary Topics on CD Problems and Exercises Basic Circuit Connections and Laws Overview Learning Objectives Circuit Terminology Kirchhoff's Laws Voltage Division and Series Connection of Resistors Current Division and Parallel Connection of Resistors D-Y Transformation Source Equivalence and Transformation Reduced-Voltage Supply Summary of Main Concepts and Results Learning Outcomes Supplementary Topics and Examples on CD Problems and Exercises Basic Analysis of Resistive Circuits Overview Learning Objectives Number of Independent Circuit Equations Node-Voltage Analysis Special Considerations in Node-Voltage Analysis Mesh-Current Analysis Special Conside...

  4. Analog circuits cookbook

    CERN Document Server

    Hickman, Ian

    2013-01-01

    Analog Circuits Cookbook presents articles about advanced circuit techniques, components and concepts, useful IC for analog signal processing in the audio range, direct digital synthesis, and ingenious video op-amp. The book also includes articles about amplitude measurements on RF signals, linear optical imager, power supplies and devices, and RF circuits and techniques. Professionals and students of electrical engineering will find the book informative and useful.

  5. Analog circuit design

    CERN Document Server

    Dobkin, Bob

    2012-01-01

    Analog circuit and system design today is more essential than ever before. With the growth of digital systems, wireless communications, complex industrial and automotive systems, designers are being challenged to develop sophisticated analog solutions. This comprehensive source book of circuit design solutions aids engineers with elegant and practical design techniques that focus on common analog challenges. The book's in-depth application examples provide insight into circuit design and application solutions that you can apply in today's demanding designs. <

  6. Regenerative feedback resonant circuit

    Science.gov (United States)

    Jones, A. Mark; Kelly, James F.; McCloy, John S.; McMakin, Douglas L.

    2014-09-02

    A regenerative feedback resonant circuit for measuring a transient response in a loop is disclosed. The circuit includes an amplifier for generating a signal in the loop. The circuit further includes a resonator having a resonant cavity and a material located within the cavity. The signal sent into the resonator produces a resonant frequency. A variation of the resonant frequency due to perturbations in electromagnetic properties of the material is measured.

  7. CMOS circuits manual

    CERN Document Server

    Marston, R M

    1995-01-01

    CMOS Circuits Manual is a user's guide for CMOS. The book emphasizes the practical aspects of CMOS and provides circuits, tables, and graphs to further relate the fundamentals with the applications. The text first discusses the basic principles and characteristics of the CMOS devices. The succeeding chapters detail the types of CMOS IC, including simple inverter, gate and logic ICs and circuits, and complex counters and decoders. The last chapter presents a miscellaneous collection of two dozen useful CMOS circuits. The book will be useful to researchers and professionals who employ CMOS circu

  8. Circuits and filters handbook

    CERN Document Server

    Chen, Wai-Kai

    2003-01-01

    A bestseller in its first edition, The Circuits and Filters Handbook has been thoroughly updated to provide the most current, most comprehensive information available in both the classical and emerging fields of circuits and filters, both analog and digital. This edition contains 29 new chapters, with significant additions in the areas of computer-aided design, circuit simulation, VLSI circuits, design automation, and active and digital filters. It will undoubtedly take its place as the engineer's first choice in looking for solutions to problems encountered in the design, analysis, and behavi

  9. Nanoscale Microelectronic Circuit Development

    Science.gov (United States)

    2011-06-17

    Project 3: Low-Power All-Digital Chip-to-Chip Interface Circuits by Pavan Kumar Hanumolu (OSU) CDADIC Project 4: Nanoscale Clock and Data Recovery...CDADIC Project 3: Low-Power All-Digital Chip-to-Chip Interface Circuits by Pavan Kumar Hanumolu (OSU) CDADIC Project 6: Stochastic and Passive A/D...Area 3: Reconfigurable Mixed-Signal Circuits CDADIC Project 3: Low-Power All-Digital Chip-to-Chip Interface Circuits by Pavan Kumar Hanumolu (OSU

  10. Timergenerator circuits manual

    CERN Document Server

    Marston, R M

    2013-01-01

    Timer/Generator Circuits Manual is an 11-chapter text that deals mainly with waveform generator techniques and circuits. Each chapter starts with an explanation of the basic principles of its subject followed by a wide range of practical circuit designs. This work presents a total of over 300 practical circuits, diagrams, and tables.Chapter 1 outlines the basic principles and the different types of generator. Chapters 2 to 9 deal with a specific type of waveform generator, including sine, square, triangular, sawtooth, and special waveform generators pulse. These chapters also include pulse gen

  11. Electronic devices and circuits

    CERN Document Server

    Pridham, Gordon John

    1968-01-01

    Electronic Devices and Circuits, Volume 1 deals with the design and applications of electronic devices and circuits such as passive components, diodes, triodes and transistors, rectification and power supplies, amplifying circuits, electronic instruments, and oscillators. These topics are supported with introductory network theory and physics. This volume is comprised of nine chapters and begins by explaining the operation of resistive, inductive, and capacitive elements in direct and alternating current circuits. The theory for some of the expressions quoted in later chapters is presented. Th

  12. Security electronics circuits manual

    CERN Document Server

    MARSTON, R M

    1998-01-01

    Security Electronics Circuits Manual is an invaluable guide for engineers and technicians in the security industry. It will also prove to be a useful guide for students and experimenters, as well as providing experienced amateurs and DIY enthusiasts with numerous ideas to protect their homes, businesses and properties.As with all Ray Marston's Circuits Manuals, the style is easy-to-read and non-mathematical, with the emphasis firmly on practical applications, circuits and design ideas. The ICs and other devices used in the practical circuits are modestly priced and readily available ty

  13. MOS integrated circuit design

    CERN Document Server

    Wolfendale, E

    2013-01-01

    MOS Integral Circuit Design aims to help in the design of integrated circuits, especially large-scale ones, using MOS Technology through teaching of techniques, practical applications, and examples. The book covers topics such as design equation and process parameters; MOS static and dynamic circuits; logic design techniques, system partitioning, and layout techniques. Also featured are computer aids such as logic simulation and mask layout, as well as examples on simple MOS design. The text is recommended for electrical engineers who would like to know how to use MOS for integral circuit desi

  14. Basic Guidelines for Application of Performance Standards to Commissioning of DCS Digital Circuits

    Science.gov (United States)

    1992-06-01

    buffering, and and filter delay (for a voice circuit). Propagation delay is independent of data rate, while buffering delay is inversely proportional to...V6Z2J7 Canada Gustavo A. Cubas E. 1 Engineered Systems, Inc 2 Seccion De Transmission ATTN: Mr. David Gilfillan Direccion De Ingenieria Y Proyectos 14775

  15. ISOLDE PROGRAMME

    CERN Document Server

    Fedosseev, V; Herfurth, F; Scheidenberger, C; Geppert, C; Gorges, C; Ratajczyk, T; Wiederhold, J C; Vogel, S; Munch, M K; Nieminen, P; Pakarinen, J J A; Lecesne, N; Bouzomita, H; Grinyer, J; Marques moreno, F M; Parlog, M; Blank, B A; Pedroza, J; Ghetta, V; Lozeva, R; Guillemaud mueller, D S; Cottereau, E; Cheikh mhamed, M; Tusseau nenez, S; Tungate, G; Walker, P M; Smith, A G; Fitzpatrick, C; Dominik, W M; Karny, M; Ciemny, A A; Nyman, G H; Thies, R M A; Lindberg, S K G; Langouche, G F; Mayet, P; Ory, G T; Kesteloot, N J K; Papuga, J; Dehairs, M H R; Callens, M; Araujo escalona, V I; Stamati, M; Boudreau, M; Domnanich, K A; Richter, D; Lutter, R J; Javaji, A; Engel, R Y; Wiehr, S; Martinez perez, T; Nacher gonzalez, E; Jungclaus, A; Ribeiro jimenez, G; Marroquin alonso, I; Cal gonzalez, J; Paziy, V; Salsac, M; Murphy, C; Podolyak, Z F; Bajoga, A D; Butler, P; Pritchard, A; Colosimo, S J; Steer, A N; Fox, S P; Wadsworth, B A; Truesdale, V L; Al monthery, M; Bracco, A; Guttormsen, M S; Badea, M N; Calinescu, S; Ujeniuc, S; Cederkall, J A; Zemlyanoy, S; Donets, E D; Golovkov, M; Vranicar, A; Harrichunder, S; Ncube, M; Strisovska, J; Wolf, E; Gerten, R F; Lehnert, J; Gladnishki, K A; Rainovski, G I; Pospisil, S; Datta pramanik, U; Benzoni, G; Fedorov, D; Molkanov, P; Maier, F M; Bonanni, A; Pfeiffer, B; Griesel, T; Wehner, L W; Mikkelsen, M; Lenzi, S M; Smith, J F; Kelly, C M; Acosta sanchez, L A; Chavez lomeli, E R; De melo bandeira tavares, P M; Vieira, J M; Martins da silva, M A; Lima lopes, A M; Mader, J; Kessler, P; Laurent, B G; Schweikhard, L C; Marx, G H; Kulczycka, E; Komorowska, M; Da silva, M F; Goncalves marques, C P; Baptista peres, M A; Welander, J E; Reiter, P; Miller, C; Martin sanchez-cano, D; Wiens, A; Blazhev, A A; Braun, N; Cappellazzo, M V; Birkenbach, B; Gerst, R; Dannhoff, M F; Sithole, M J; Bilgier, B; Nardelli, S; Araujo mendes, C M; Agramunt ros, J; Valencia marin, E; Pantea, E; Hessberger, F P; Leduc, A J; Mitsuoka, S; Carbonari, A W; Buchegger, F J; Garzon camacho, A; Dapo, H; Papka, P; Stachura, M K; Stora, T; Marsh, B A; Thiboud, J A; Heylen, H; Antalic, S; Stahl, C; Bauer, C; Thurauf, M; Maass, B; Sturm, S; Boehm, C; Wolf, N R; Ways, M; Steinsberger, T P; Riisager, K; Ruotsalainen, P A; Bastin, B; Duval, F T; Penessot, G; Flechard, X D; Desrues, P; Giovinazzo, J; Kurtukian nieto, T; Ascher, P E L; Roccia, S; Matea, I; Croizet, H A G; Bonnin, C M; Morfouace, P; Smith, A J; Guin, R; Banerjee, D; Gunnlaugsson, H P; Ohtsubo, T; Zhukov, M V; Tengborn, E A; Welker, A; Giannopoulos, E; Dessagne, P; Juscamaita vivanco, Y; De rydt, M A E; Da costa pereira, L M; Vermaelen, P; Monten, R; Wursten, E J; De coster, A; Jin, H; Hustings, J; Yu, H; Kruecken, R; Nowak, A K; Jankowski, M; Cano ott, D; Murphy, A S J; Shand, C M; Jones, G D; Herzberg, R; Ikin, P; Revill, J P; Everett, C; Napoli, D R; Scarel, G; Larsen, A; Tornyi, T G; Pascu, S G; Stroe, L; Toma, S; Jansson, K; Dronjak fahlander, M; Krupko, S; Hurst, A M; Veskovic, M; Nikolov, J; Masenda, H; Sibanda, W N; Rocchini, M; Klimo, J; Deicher, M; Wichert, T; Kronenberg, J; Helmke, A; Meliani, Z; Ivanov, V S; Keatings, J M; Kuti, I; Halasz, Z; Henry, M O; Bras de sequeira amaral, V; Espirito santo, F; Da silva, D J; Rosendahl, S; Vianden, R J; Speidel, K; Agarwal, I; Faul, T; Kownacki, J M; Martins correia, J G; Lorenz, K; Costa miranda, S M; Granadeiro costa, A R; Zyabkin, D; Kotthaus, T; Pfeiffer, M; Gironi, L; Cakirli, R B; Jensen, A; Romstedt, F; Constantino silva furtado, I; Heredia cardona, J A; Jordan martin, M D; Montaner piza, A; Zacate, M O; Plewinski, F; Mesli, A; Akakpo, E H; Pichard, A; Hergemoller, F; Neu, W; Fallis starhunter, J P; Voulot, D; Mrazek, J; Ugryumov, V; Savreux, R P; Kojouharov, I M; Stegmann, R; Kern, R O; Papst, O; Fitting, J; Lauer, M; Kirsebom, O S; Jensen, K L; Jokinen, A; Rahkila, P J; Hager, U D K; Konki, J P; Dubois, M; Orr, N A; Fabian, X; Huikari, J E; Goigoux, T; Magron, C; Zakari, A A; Maietta, M; Bachelet, C E M; Roussiere, B; Li, R; Canavan, R L; Lorfing, C; Foster, R M; Gislason, H P; Shayestehaminzadeh, S; Qi, B; Mukai, M; Watanabe, Y; Willmann, L; Kurcewicz, W; Wimmer, K; Meisel, Z P; Dorvaux, O; Nowacki, F; Koudriavtsev, I; Lievens, P; Delaure, B J P; Neyens, G; Darby, I G; Descamps, B O; Velten, P; Ceruti, S; Bunka, M; Vermeulen, C; Umbricht, C A; De boer, J; Podadera aliseda, I; Alcorta moreno, M; Pesudo fortes, V; Zielinska, M; Korten, W; Wang, C H; Lotay, G J; Mason, P; Rice, S J; Regan, P H; Willenegger, L M; Andreev, A; Yavuzkanat, N; Hass, M; Kumar, V; Valiente dobon, J J; Crespo campo, L; Zamfir, N - V; Deleanu, D; Jeppesen, H B; Wu, C; Pain, S D; Stracener, D W; Szilner, S; Colovic, P; Matousek, V; Venhart, M; Birova, M; Li, X; Stuchbery, A E; Lellep, G M; Chakraborty, S; Leoni, S; Chupp, T; Yilmaz, C; Severin, G; Garcia ramos, J E; Hadinia, B; Mc glynn, E; Monteiro de sena silvares de carvalho, I; Friedag, P; Figuera, P; Koos, V; Meot, V H; Pauwels, D B; Jancso, A; Srebrny, J; Alves, E J; David bosne, E; Bengtsson, L; Kalkuehler, M; Albers, M; Bharuth-ram, K; Akkus, B; Hemmingsen, L B S; Pedersen, J T; Dos santos redondo, L M; Rubio barroso, B; Algora, A; Kozlov, V; Mavela, D L; Mokhles gerami, A; Keeley, N; Bernardo da silva, E; Unzueta solozabal, I; Schell, J; Szybowicz, M; Yang, X; Plavec, J; Lassen, J; Johnston, K; Coquard, L; Bloch, T P; Bonig, E S; Ignatov, A; Paschalis, S; Fernandez martinez, G; Schilling, M; Habermann, T; Von hahn, R; Minaya ramirez, E E; Manea, V; Moore, I D; Wang, Y; Saastamoinen, A J; Grahn, T; Herzan, A; Stolze, S M; Clement, E; Dijon, A; Shornikov, A; Lienard, E; Gibelin, J D; Pain, C; Canchel, G; Simpson, G S; Latrasse, L P; Huang, W; Forest, D H; Billowes, J; Flanagan, K; Strashnov, I; Binnersley, C L; Sanchez poncela, M; Simpson, J; Morrall, P S; Grant, A F; Charisopoulos, S; Lagogiannis, A; Bhattacharya, C; Olafsson, S; Stepaniuk, M; Tornqvist, H T; Heinz, A M; White iv, E R; Vermote, S L; Courtin, S; Marechal, F; Randisi, G; Kana, T; Rajabali, M M; Lannoo, B J M; Frederickx, R; De coster, T J C; Roovers, N; De lemos lima, T A; Stryjczyk, M; Dockx, K; Haller, S; Rizzi, M; Reichert, S B; Bonn, J; Thirolf, P G; Garcia rios, A R; Gugliermina, V M; Cubero campos, M A; Sanchez tembleque, V; Benito garcia, J; Senoville, M; Mountford, D J; Gelletly, W; Alharbi, T S T; Wilson, E; Rigby, S V; Andreoiu, C; Paul, E S; Harkness, L J; Judson, D S; Wraith, C; Van esbroeck, K; Wadsworth, R; Cubiss, J G; Harding, R D; Vaintraub, S; Mandal, S K; Scarpa, D; Hoff, P; Syed naeemul, H; Borcea, R; Balabanski, D L; Marginean, R; Rotaru, F; Rudolph, D; Fahlander, C H; Chudoba, V; Soic, N; Naidoo, D; Veselsky, M; Kliman, J; Raisanen, J A; Dietrich, M; Maung maung than, M M T; Reed, M W; Danchev, M T; Ray, J; Roy, M; Hammen, M; Recchia, F; Capponi, L; Veghne csatlos, M M; Fryar, J; Mirzadeh vaghefi, S P; Trindade pereira, A M; De pinho oliveira, G N; Bakenecker, A; Tramm, C; Germic, V; Morel, P A; Kowalczyk, M; Matejska-minda, M; Wolinska-cichocka, M; Ringvall moberg, A; Mantovan, R; Fransen, C H; Radeck, F; Schneiders, D W; Steinbach, T; Vibenholt, J E; Magnussen, M J; Stevnhoved, H M; Comas lijachev, V; Dasenbrock-gammon, N M; Perkowski, J; O'neill, G G; Matveev, Y; Wegner, M; Liu, Z; Perez alvarez, T; Cerato, L; Radchenko, V; Molholt, T E; Tabares giraldo, J A; Srnka, D; Dlouhy, Z; Beck, D; Werner, V R; Homm, I; Eliseev, S; Blaum, K; Probst, M B; Kaiser, C J; Martin, J A; Refsgaard, J; Peura, P J; Greenlees, P T; Auranen, K; Delahaye, P; Traykov, E K; Perez loureiro, D; Mery, A A; Couratin, C; Tsekhanovich, I; Lunney, D; Gaulard, C V; Althubiti, N A S; Mottram, A D; Cullen, D M; Das, S K; Van de walle, J; Mazzocchi, C; Jonson, B N G; Woehr, A; Lesher, S R; Zuber, K T; Filippin, L; De witte, H J; Van den bergh, P A M; Raabe, R; Depuydt, M J F; Radulov, D P; Elseviers, J; Dirkx, D; Da silva fenta, A E; Reynders, K L T; Atanasov, D; Delombaerde, L; De maesschalck, D; Parnefjord gustafsson, F O A; Dunlop, R A; Tarasava, K; Gernhaeuser, R A; Weinzierl, W; Berger, C; Wendt, K; Achtzehn, T; Gottwald, T; Schug, M; Rossel, R E; Dominguez reyes, R R; Briz monago, J A; Koester, U H; Bunce, M R; Bowry, M D; Nakhostin, M; Shearman, R; Cresswell, J R; Joss, D T; Gredley, A; Groombridge, D; Laird, A M; Aslanoglou, X; Siem, S; Weterings, J A; Renstrom, T; Szpak, B T; Luczkowski, M J; Ghita, D; Bezbakh, A; Soltz, R A; Bollmann, J; Bhattacharya, P; Roy, S; Rahaman, M A; Wlodarski, T; Carvalho soares, J; Barzakh, A; Schertz, F; Froemmgen, N E; Liberati, V; Foy, B E; Weinheimer, C P; Zboril, M; Simon, R E; Popescu, L A; Czosnyka, T; Miranda jana, P A; Leimbach, D; Naskrecki, R; Plociennik, W A; Ruchowska, E E; Chiara, C J; Eberth, J H; Thomas, T; Thole, P; Queiser, M T; Lo bianco, G; D'amico, F; Muller, S; Sanchez alarcon, R M; Tain enriquez, J L; Orrigo, S E A; Orlandi, R; Masango, S; Plazaola muguruza, F C; Lepareur, N G; Fiebig, J M; Ceylan, N; Wildner, E; Kowalska, M; Malbrunot, S; Garcia ruiz, R F; Pallada, S; Slezak, M; Roeckl, E; Schrieder, G H; Ilieva, S K; Koenig, K L; Amoretti, M A; Lommen, J M; Fynbo, H O U; Weyer, G O P; Koldste, G T; Madsboll, K; Jensen, J H; Nieminen, A M; Reponen, M; Villari, A; Thomas, J; Saint-laurent, M; Sorlin, O H; Carniol, B; Pereira lopez, J; Grevy, S; Plaisir, C; Marie-jeanne, M J; Georgiev, G P; Etile, A M; Le blanc, F M; Verney, D; Stefan, G I; Assie, M; Suzuki, D; Guillot, J; Vazquez rodriguez, L; Campbell, P; Deacon, A N; Ware, T; Flueras, A; Xie, L; Banerjee, K; Piersa, M; Galaviz redondo, D; Johansson, H T; Schwarz, S; Toysa, A S; Aumont, J; Sferrazza, M; Van duppen, P L E; Versyck, S; Dehaes, J; Bree, N C F; Neyskens, P; Carlier, L M F; De schepper, S; Dewolf, K W A; Kabir, L R; Khodery ahmad, M A; Zadvornaya, A; Renaud, M A; Xu, Z; Smolders, P; Krastev, P; Garrett, P E; Rapisarda, E; Reber, J A; Mattolat, C F; Raeder, S; Habs, D; Fraile prieto, L M; Vidal, M; Perez liva, M; Calvo portela, P; Ulla pedrera, F J; Wood, R T; Lalkovski, S; Page, R; Petri, M; Barton, C J; Nichols, A J; Vermeulen, M J; Bloor, D M; Henderson, J; Wilson, G L; De angelis, G; Buerger, A; Modamio hoybjor, V; Klintefjord, M L; Ingeberg, V W; Fornal, B A; Marginean, R; Sava, T; Kusoglu, A; Suvaila, R; Lica, R; Costache, C; Mihai, R; Ionescu, A; Baeck, T M; Fijalkowska, A G; Sedlak, M; Koskelo, O K; Kyaw myat, K M; Ganguly, B; Goncalves marques, J; Cardoso, S; Seliverstov, M; Niessen, B D; Gutt, L E; Chapman, R; Spagnoletti, P N; Lopes, C; De oliveira amorim, C; Batista lopes, C M; Araujo, J; Schielke, S J; Daugas, J R; Gaudefroy, L; Chevrier, R; Szunyogh, D M; Napiorkowski, P J; Wrzosek-lipska, K; Wahl, U; Catarino, N; Pereira carvalho alves de sequeira, M; Walters, W; Hess, H E; Holler, A; Bettermann, L; Geibel, K; Taprogge, J; Lewandowski, L T N; Manchado de sola, F; Das gupta, S; Thulstrup, P W; Heinz, U; Nogwanya, T; Neidherr, D M; Morales lopez, A I; Gumenyuk, O; Peaker, A R; Wakabayashi, Y; Abrahams, K J; Martin montes, E J; Mach, H A; Souza ribeiro junior, I; He, J; Chalil, A; Xing, R; Giles, T J; Dorsival, A; Trujillo hernandez, J S; Kalaninova, Z; Andel, B; Venos, D; Kraemer, J; Saha, S; Neugart, R; Eronen, T O; Kreim, K D; Heck, M K; Goncharov, M; Karthein, J; Julin, R J; Jakobsson, E H U; Eleon, C; Achouri, N L; Grinyer, G F; Fontbonne, C M; Alfaurt, P; Lynch, K M; Wilkins, S G; Brown, A R; Imai, N; Pomorski, M J; Janiak, L; Nilsson, T; Stroke, H H; Stanja, J; Dangelser, E; Heenen, P; Godefroid, M; Mallion, S N; Diriken, J V J; Ghys, L H L; Khamehchi, M A; Van beveren, C; Gins, W A M; Finlay, P E J; Bouma, J T; Augustyns, V; Stegemann, S T; Koszorus, A; Mcnulty, J F; Lin, P; Ohlert, C M; Schwerdtfeger, W; Tengblad, O; Becerril reyes, A D; Perea martinez, A; Martinez perez, M C; Margerin, V; Rudigier, M; Alexander, T D; Patel, Z V; Hammond, N; Wearing, F; Patel, A; Jenkins, D G; Corradi, L; Galtarossa, F; Debernardi, A; Giacoppo, F; Tveten, G M; Malatji, K L; Krolas, W A; Stanoiu, M A; Rickert, E U; Ter-akopian, G; Cline, D; Riihimaeki, I A; Simon, K D; Wagner, F E; Turker, M; Neef, M H; Coombes, B J; Jakubek, J; Vagena, E; Bottoni, S; Nishimura, K; Correia, J; Rodrigues valdrez, C J; Adhikari, R; Ostrowski, A N; Hallmann, O; Scheck, M; Wady, P T; Lane, J; Krasznahorkay, A J; Kunne sohler, D; Meaney, A J; Baptista barbosa, M; Hochschulz, F; Roig, O; Behan, C C; Kargoll, S; Kemnitz, S; Carvalho teixeira, R C; Redondo cubero, A; Tallarida, G; Kaczarowski, R; Finke, F; Linnemann, A; Altenkirch, R; Saed-samii, N; Ansari, S H; Dlamini, W B; Adoons, V N; Ronning, C R; Wiedeking, M; Herlert, A J; Mehl, C V; Judge, S M; Gaertner, D; Divinskyi, S; Zagoraios, G; Boztosun, I; Van zyl, J J; Catherall, R; Lettry, J; Wenander, F J C; Zakoucky, D; Catchen, G L; Noertershaeuser, W; Kroell, T; Leske, J; Shubina, D; Murray, I M; Pancin, J; Delaunay, F; Poincheval, J J L; Audirac, L L; Gerbaux, M T; Aouadi, M; Sole, P G P; Fallot, M P; Onillon, A; Duchemin, C; Formento cavaier, R; Audi, G; Boukhari, A; Lau, C; Martin, J A; Barre, N H; Berry, T A; Procter, T J; Bladen, L K; Axiotis, M; Muto, S; Jeong, S C; Hirayama, Y; Korgul, A B; Minamisono, K; Bingham, C R; Aprahamian, A; Bucher, B M; Severijns, N; Huyse, M L; Himpe, P; Ferrer garcia, R; Marchi, T; Sambi, S; Budincevic, I; Neven, M; Verlinde, M N S; Bomans, P; Romano, N; Maugeri, E A; Klupp, S C; Dehn, M H; Heinke, R M; Naubereit, P; Maira vidal, A; Vedia fernandez, M V; Ibanez garcia, P B; Bruyneel, B J E; Materna, T; Hadynska-klek, K; Al-dahan, N; Alazemi, N; Carroll, R J; Babcock, C; Patronis, N; Eleme, Z; Dhal, A; Sahin, E; Goergen, A; Maj, A; Bednarczyk, P A; Borcea, C; Negoita, F; Suliman, G; Marginean, N M; Sotty, C O; Negret, A L; Nae, S A; Nita, C; Golubev, P I; Knyazev, A; Jost, C U; Petrik, K; Vaeyrynen, S A; Dracoulis, G D; Uher, J; Fernandez dominguez, B; Chakraborty, P; Avigo, R; Falahat, S; Lekovic, F; Dorrer, H J; Mengoni, D; Derkx, X; Angus, L J; Sandhu, K S; Gregor, E; Kelly, N A; Byrne, D J; Haas, H; Lourenco, A A; Sousa pereira, S M; Sousa, J B; De melo mendonca, T M; Tavares de sousa, C; Guerreiro dos santos oliveira custodio, L M; Da rocha rodrigues, P M; Yamaguchi, T; Thompson, P C; Rosenbusch, M; Wienholtz, F; Fischer, P; Iwanicki, J S; Rusek, K M; Hanstorp, D; Vetter, U; Wolak, J M; Park, S H; Warr, N V; Doornenbal, P C; Imig, A; Seidlitz, M; Moschner, K; Vogt, A; Kaya, L; Martel bravo, I; Orduz, A K; Serot, O; Majola, S N; Litvinov, Y; Bommert, M; Hensel, S; Markevich, V; Nishio, K; Ota, S; Matos, I; Zenkevich, A; Picado sandi, E; Forstner, O; Hu, B; Ntshangase, S S; Sanchez-segovia, J

    2002-01-01

    The experiments aim at a broad exploration of the properties of atomic nuclei far away from the region of beta stability. Furthermore, the unique radioactive beams of over 60~elements produced at the on-line isotope separators ISOLDE-2 and ISOLDE-3 are used in a wide programme of atomic, solid state and surface physics. Around 300 scientists are involved in the project, coming from about 70 laboratories. \\\\ \\\\ The electromagnetic isotope separators are connected on-line with their production targets in the extracted 600 MeV proton or 910~MeV Helium-3 beam of the Synchro-Cyclotron. Secondary beams of radioactive isotopes are available at the facility in intensities of 10$^1

  16. Scaling of graphene integrated circuits.

    Science.gov (United States)

    Bianchi, Massimiliano; Guerriero, Erica; Fiocco, Marco; Alberti, Ruggero; Polloni, Laura; Behnam, Ashkan; Carrion, Enrique A; Pop, Eric; Sordan, Roman

    2015-05-07

    The influence of transistor size reduction (scaling) on the speed of realistic multi-stage integrated circuits (ICs) represents the main performance metric of a given transistor technology. Despite extensive interest in graphene electronics, scaling efforts have so far focused on individual transistors rather than multi-stage ICs. Here we study the scaling of graphene ICs based on transistors from 3.3 to 0.5 μm gate lengths and with different channel widths, access lengths, and lead thicknesses. The shortest gate delay of 31 ps per stage was obtained in sub-micron graphene ROs oscillating at 4.3 GHz, which is the highest oscillation frequency obtained in any strictly low-dimensional material to date. We also derived the fundamental Johnson limit, showing that scaled graphene ICs could be used at high frequencies in applications with small voltage swing.

  17. Offset cancelling circuit

    NARCIS (Netherlands)

    Wiegerink, Remco J.; Seevinck, Evert; de Jager, Wim

    1989-01-01

    A monolithic offset cancelling circuit to reduce the offset voltage at an integrated audio-amplifier output is described. This offset voltage is detected using a low-pass filter with a very large time constant for which only one small on-chip capacitor is needed. The circuit was realized with a

  18. A Virtual Circuits Lab

    Science.gov (United States)

    Vick, Matthew E.

    2010-01-01

    The University of Colorado's Physics Education Technology (PhET) website offers free, high-quality simulations of many physics experiments that can be used in the classroom. The Circuit Construction Kit, for example, allows students to safely and constructively play with circuit components while learning the mathematics behind many circuit…

  19. CMOS analog circuit design

    CERN Document Server

    Allen, Phillip E

    1987-01-01

    This text presents the principles and techniques for designing analog circuits to be implemented in a CMOS technology. The level is appropriate for seniors and graduate students familiar with basic electronics, including biasing, modeling, circuit analysis, and some familiarity with frequency response. Students learn the methodology of analog integrated circuit design through a hierarchically-oriented approach to the subject that provides thorough background and practical guidance for designing CMOS analog circuits, including modeling, simulation, and testing. The authors' vast industrial experience and knowledge is reflected in the circuits, techniques, and principles presented. They even identify the many common pitfalls that lie in the path of the beginning designer--expert advice from veteran designers. The text mixes the academic and practical viewpoints in a treatment that is neither superficial nor overly detailed, providing the perfect balance.

  20. Genetic Spot Optimization for Peak Power Estimation in Large VLSI Circuits

    Directory of Open Access Journals (Sweden)

    Michael S. Hsiao

    2002-01-01

    Full Text Available Estimating peak power involves optimization of the circuit's switching function. The switching of a given gate is not only dependent on the output capacitance of the node, but also heavily dependent on the gate delays in the circuit, since multiple switching events can result from uneven circuit delay paths in the circuit. Genetic spot expansion and optimization are proposed in this paper to estimate tight peak power bounds for large sequential circuits. The optimization spot shifts and expands dynamically based on the maximum power potential (MPP of the nodes under optimization. Four genetic spot optimization heuristics are studied for sequential circuits. Experimental results showed an average of 70.7% tighter peak power bounds for large sequential benchmark circuits was achieved in short execution times.

  1. Design and implementation of an FPGA-based timing pulse programmer for pulsed-electron paramagnetic resonance applications.

    Science.gov (United States)

    Sun, Li; Savory, Joshua J; Warncke, Kurt

    2013-08-01

    The design, construction and implementation of a field-programmable gate array (FPGA) -based pulse programmer for pulsed-electron paramagnetic resonance (EPR) experiments is described. The FPGA pulse programmer offers advantages in design flexibility and cost over previous pulse programmers, that are based on commercial digital delay generators, logic pattern generators, and application-specific integrated circuit (ASIC) designs. The FPGA pulse progammer features a novel transition-based algorithm and command protocol, that is optimized for the timing structure required for most pulsed magnetic resonance experiments. The algorithm was implemented by using a Spartan-6 FPGA (Xilinx), which provides an easily accessible and cost effective solution for FPGA interfacing. An auxiliary board was designed for the FPGA-instrument interface, which buffers the FPGA outputs for increased power consumption and capacitive load requirements. Device specifications include: Nanosecond pulse formation (transition edge rise/fall times, ≤3 ns), low jitter (≤150 ps), large number of channels (16 implemented; 48 available), and long pulse duration (no limit). The hardware and software for the device were designed for facile reconfiguration to match user experimental requirements and constraints. Operation of the device is demonstrated and benchmarked by applications to 1-D electron spin echo envelope modulation (ESEEM) and 2-D hyperfine sublevel correlation (HYSCORE) experiments. The FPGA approach is transferrable to applications in nuclear magnetic resonance (NMR; magnetic resonance imaging, MRI), and to pulse perturbation and detection bandwidths in spectroscopies up through the optical range.

  2. Analysis and Implementation of Cryptographic Hash Functions in Programmable Logic Devices

    Directory of Open Access Journals (Sweden)

    Tautvydas Brukštus

    2016-06-01

    Full Text Available In this day’s world, more and more focused on data pro-tection. For data protection using cryptographic science. It is also important for the safe storage of passwords for this uses a cryp-tographic hash function. In this article has been selected the SHA-256 cryptographic hash function to implement and explore, based on fact that it is now a popular and safe. SHA-256 cryp-tographic function did not find any theoretical gaps or conflict situations. Also SHA-256 cryptographic hash function used cryptographic currencies. Currently cryptographic currency is popular and their value is high. For the measurements have been chosen programmable logic integrated circuits as they less effi-ciency then ASIC. We chose Altera Corporation produced prog-rammable logic integrated circuits. Counting speed will be inves-tigated by three programmable logic integrated circuit. We will use programmable logic integrated circuits belong to the same family, but different generations. Each programmable logic integ-rated circuit made using different dimension technology. Choo-sing these programmable logic integrated circuits: EP3C16, EP4CE115 and 5CSEMA5F31. To compare calculations perfor-mances parameters are provided in the tables and graphs. Re-search show the calculation speed and stability of different prog-rammable logic circuits.

  3. Coupling Two Different Nucleic Acid Circuits in an Enzyme-Free Amplifier

    Directory of Open Access Journals (Sweden)

    Andrew D. Ellington

    2012-11-01

    Full Text Available DNA circuits have proven to be useful amplifiers for diagnostic applications, in part because of their modularity and programmability. In order to determine whether different circuits could be modularly stacked, we used a catalytic hairpin assembly (CHA circuit to initiate a hybridization chain reaction (HCR circuit. In response to an input nucleic acid sequence, the CHA reaction accumulates immobilized duplexes and HCR elongates these duplexes. With fluorescein as a reporter each of these processes yielded 10-fold signal amplification in a convenient 96-well format. The modular circuit connections also allowed the output reporter to be readily modified to a G-quadruplex-DNAzyme that yielded a fluorescent signal.

  4. A cluster-randomized controlled trial evaluating the effects of delaying onset of adolescent substance abuse on cognitive development and addiction following a selective, personality-targeted intervention programme: the Co-Venture trial.

    Science.gov (United States)

    O'Leary-Barrett, Maeve; Mâsse, Benoit; Pihl, Robert O; Stewart, Sherry H; Séguin, Jean R; Conrod, Patricia J

    2017-10-01

    Substance use and binge drinking during early adolescence are associated with neurocognitive abnormalities, mental health problems and an increased risk for future addiction. The trial aims to evaluate the protective effects of an evidence-based substance use prevention programme on the onset of alcohol and drug use in adolescence, as well as on cognitive, mental health and addiction outcomes over 5 years. Thirty-eight high schools will be recruited, with a final sample of 31 schools assigned to intervention or control conditions (3826 youth). Brief personality-targeted interventions will be delivered to high-risk youth attending intervention schools during the first year of the trial. Control school participants will receive no intervention above what is offered to them in the regular curriculum by their respective schools. Public/private French and English high schools in Montreal (Canada). All grade 7 students (12-13 years old) will be invited to participate. High-risk youth will be identified as those scoring one standard deviation or more above the school mean on one of the four personality subscales of the Substance Use Risk Profile Scale (40-45% youth). Self-reported substance use and mental health symptoms and cognitive functioning measured annually throughout 5 years. Primary outcomes are the onset of substance use disorders at 4 years post-intervention (year 5). Secondary intermediate outcomes are the onset of alcohol and substance use 2 years post-intervention and neuropsychological functions; namely, the protective effects of substance use prevention on cognitive functions generally, and executive functions and reward sensitivity specifically. This longitudinal, cluster-randomized controlled trial will investigate the impact of a brief personality-targeted intervention program on reducing the onset of addiction 4 years-post intervention. Results will tease apart the developmental sequences of uptake and growth in substance use and cognitive

  5. Approximate circuits for increased reliability

    Science.gov (United States)

    Hamlet, Jason R.; Mayo, Jackson R.

    2015-08-18

    Embodiments of the invention describe a Boolean circuit having a voter circuit and a plurality of approximate circuits each based, at least in part, on a reference circuit. The approximate circuits are each to generate one or more output signals based on values of received input signals. The voter circuit is to receive the one or more output signals generated by each of the approximate circuits, and is to output one or more signals corresponding to a majority value of the received signals. At least some of the approximate circuits are to generate an output value different than the reference circuit for one or more input signal values; however, for each possible input signal value, the majority values of the one or more output signals generated by the approximate circuits and received by the voter circuit correspond to output signal result values of the reference circuit.

  6. Approximate circuits for increased reliability

    Energy Technology Data Exchange (ETDEWEB)

    Hamlet, Jason R.; Mayo, Jackson R.

    2015-12-22

    Embodiments of the invention describe a Boolean circuit having a voter circuit and a plurality of approximate circuits each based, at least in part, on a reference circuit. The approximate circuits are each to generate one or more output signals based on values of received input signals. The voter circuit is to receive the one or more output signals generated by each of the approximate circuits, and is to output one or more signals corresponding to a majority value of the received signals. At least some of the approximate circuits are to generate an output value different than the reference circuit for one or more input signal values; however, for each possible input signal value, the majority values of the one or more output signals generated by the approximate circuits and received by the voter circuit correspond to output signal result values of the reference circuit.

  7. Astable multivibrator circuits made with low capacity PLC

    Science.gov (United States)

    Popa, I.; Popa, G. N.; Diniş, C. M.; Deaconu, S. I.

    2016-02-01

    The paper presents three versions of astable multivibrator structures that can be made with PS-3 (Klöckner-Moeller) PLCs. They have, in their composition, two time-on delay timers (TR type) that can be found in PS-3 PLC. For each astable multivibrator circuits present the principle accompanied by graphic representations of the main signals of the astable multivibrator circuits and the mode of operation of these circuits using time diagrams. These astable multivibrator strucures can be used, special, for teaching PLCs.

  8. Study on the new structure and its influencing factors of miniature circuit breaker for short circuit protection

    Science.gov (United States)

    He, Gong; Ming, Zong

    2017-01-01

    Miniature Circuit Breaker (MCB) is widely used in terminal power distributions and civil buildings, its annual production has more than 500 million poles. However, in terms of the short circuit protection of MCB, and there's no short circuit delay function, so it can not reach the full selective protection, even through the cooperation between the time selection and the current selection. In paper, a new structure of MCB's electromagnetic tripping device is proposed, which is able to realize short-circuit delay protection. The new is on the traditional structure added a secondary winding, then controlling the on or off of the secondary winding, using its demagnetization effect to realize the short time delay function when the secondary winding is closed. This is a new idea in the field of low-voltage circuit breakers. In addition, take the U type electromagnet as an example, through the analysis of the magnetic circuit, the main factors that affect the magnetic effect of the secondary winding are studied by using MATLAB.

  9. Troubleshooting analog circuits

    CERN Document Server

    Pease, Robert A

    1991-01-01

    Troubleshooting Analog Circuits is a guidebook for solving product or process related problems in analog circuits. The book also provides advice in selecting equipment, preventing problems, and general tips. The coverage of the book includes the philosophy of troubleshooting; the modes of failure of various components; and preventive measures. The text also deals with the active components of analog circuits, including diodes and rectifiers, optically coupled devices, solar cells, and batteries. The book will be of great use to both students and practitioners of electronics engineering. Other

  10. Circuit analysis with Multisim

    CERN Document Server

    Baez-Lopez, David

    2011-01-01

    This book is concerned with circuit simulation using National Instruments Multisim. It focuses on the use and comprehension of the working techniques for electrical and electronic circuit simulation. The first chapters are devoted to basic circuit analysis.It starts by describing in detail how to perform a DC analysis using only resistors and independent and controlled sources. Then, it introduces capacitors and inductors to make a transient analysis. In the case of transient analysis, it is possible to have an initial condition either in the capacitor voltage or in the inductor current, or bo

  11. Optoelectronics circuits manual

    CERN Document Server

    Marston, R M

    2013-01-01

    Optoelectronics Circuits Manual covers the basic principles and characteristics of the best known types of optoelectronic devices, as well as the practical applications of many of these optoelectronic devices. The book describes LED display circuits and LED dot- and bar-graph circuits and discusses the applications of seven-segment displays, light-sensitive devices, optocouplers, and a variety of brightness control techniques. The text also tackles infrared light-beam alarms and multichannel remote control systems. The book provides practical user information and circuitry and illustrations.

  12. Plasmonic Nanoguides and Circuits

    CERN Document Server

    Bozhevolnyi, Sergey

    2008-01-01

    Modern communication systems dealing with huge amounts of data at ever increasing speed try to utilize the best aspects of electronic and optical circuits. Electronic circuits are tiny but their operation speed is limited, whereas optical circuits are extremely fast but their sizes are limited by diffraction. Waveguide components utilizing surface plasmon (SP) modes were found to combine the huge optical bandwidth and compactness of electronics, and plasmonics thereby began to be considered as the next chip-scale technology. In this book, the authors concentrate on the SP waveguide configurati

  13. Modern TTL circuits manual

    CERN Document Server

    Marston, R M

    2013-01-01

    Modern TTL Circuits Manual provides an introduction to the basic principles of Transistor-Transistor Logic (TTL). This book outlines the major features of the 74 series of integrated circuits (ICs) and introduces the various sub-groups of the TTL family.Organized into seven chapters, this book begins with an overview of the basics of digital ICs. This text then examines the symbology and mathematics of digital logic. Other chapters consider a variety of topics, including waveform generator circuitry, clocked flip-flop and counter circuits, special counter/dividers, registers, data latches, com

  14. Automated design of programmable enzyme-driven DNA circuits

    NARCIS (Netherlands)

    van Roekel, Hendrik W.H.; Meijer, Lenny H.H.; Masroor, Saeed; Félix Garza, Zandra C.; Estévez-Torres, André; Rondelez, Yannick; Zagaris, Antonios; Peletier, Mark A.; Hilbers, Peter A.J.; de Greef, Tom F.A.

    2015-01-01

    Molecular programming allows for the bottom-up engineering of biochemical reaction networks in a controlled in vitro setting. These engineered biochemical reaction networks yield important insight in the design principles of biological systems and can potentially enrich molecular diagnostic systems.

  15. Comparative Effects of Circuit Training Programme on Speed and ...

    African Journals Online (AJOL)

    cce

    not become sufficiently stabilized (Stuart and Prugh, 1974). They also reported that the average ... illness, and other environmental factors (Stuart and Prugh, 1974). Bailey, Malina and Rasmussen (1978) stated that physical ..... and Exercise Science 5th Edition. Madison, Wisconsin: WCB Brown And Benchmark. Publishers.

  16. Engineering Synthetic Gene Circuits in Living Cells with CRISPR Technology.

    Science.gov (United States)

    Jusiak, Barbara; Cleto, Sara; Perez-Piñera, Pablo; Lu, Timothy K

    2016-07-01

    One of the goals of synthetic biology is to build regulatory circuits that control cell behavior, for both basic research purposes and biomedical applications. The ability to build transcriptional regulatory devices depends on the availability of programmable, sequence-specific, and effective synthetic transcription factors (TFs). The prokaryotic clustered regularly interspaced short palindromic repeat (CRISPR) system, recently harnessed for transcriptional regulation in various heterologous host cells, offers unprecedented ease in designing synthetic TFs. We review how CRISPR can be used to build synthetic gene circuits and discuss recent advances in CRISPR-mediated gene regulation that offer the potential to build increasingly complex, programmable, and efficient gene circuits in the future. Copyright © 2016. Published by Elsevier Ltd.

  17. PRECISION TIME-DELAY GENERATOR

    Science.gov (United States)

    Carr, B.J.; Peckham, V.D.

    1959-06-16

    A precision time-delay generator circuit with low jitter is described. The first thyratron has a series resonant circuit and a diode which is connected to the second thyratron. The first thyratron is triggered at the begin-ning of a time delay and a capacitor is discharged through the first thyratron and the diode, thereby, triggering the second thyratron. (T.R.H.) l6l9O The instrument described can measure pressures between sea level and 300,000 ft. The pressure- sensing transducer of the instrument is a small cylindrical tube with a thin foil of titanium-tritium fastened around the inside of the tube. Output is a digital signal which can be used for storage or telemetering more conveniently than an analog signal. (W.D.M.) l6l9l An experimental study was made on rolling contacts in the temperature range of 550 to 1000 deg F. Variables such as material composition, hardness, and operating conditions were investigated in a rolling test stand. Ball bearing tests were run to determine the effect of design parameters, bearing materials, lubricants, and operating conditions. (auth)

  18. Quantum circuits for cryptanalysis

    Science.gov (United States)

    Amento, Brittanney Jaclyn

    Finite fields of the form F2 m play an important role in coding theory and cryptography. We show that the choice of how to represent the elements of these fields can have a significant impact on the resource requirements for quantum arithmetic. In particular, we show how the Gaussian normal basis representations and "ghost-bit basis" representations can be used to implement inverters with a quantum circuit of depth O(mlog(m)). To the best of our knowledge, this is the first construction with subquadratic depth reported in the literature. Our quantum circuit for the computation of multiplicative inverses is based on the Itoh-Tsujii algorithm which exploits the property that, in a normal basis representation, squaring corresponds to a permutation of the coefficients. We give resource estimates for the resulting quantum circuit for inversion over binary fields F2 m based on an elementary gate set that is useful for fault-tolerant implementation. Elliptic curves over finite fields F2 m play a prominent role in modern cryptography. Published quantum algorithms dealing with such curves build on a short Weierstrass form in combination with affine or projective coordinates. In this thesis we show that changing the curve representation allows a substantial reduction in the number of T-gates needed to implement the curve arithmetic. As a tool, we present a quantum circuit for computing multiplicative inverses in F2m in depth O(m log m) using a polynomial basis representation, which may be of independent interest. Finally, we change our focus from the design of circuits which aim at attacking computational assumptions on asymmetric cryptographic algorithms to the design of a circuit attacking a symmetric cryptographic algorithm. We consider a block cipher, SERPENT, and our design of a quantum circuit implementing this cipher to be used for a key attack using Grover's algorithm as in [18]. This quantum circuit is essential for understanding the complexity of Grover's algorithm.

  19. Break-before-Make CMOS Inverter for Power-Efficient Delay Implementation

    Directory of Open Access Journals (Sweden)

    Janez Puhan

    2014-01-01

    Full Text Available A modified static CMOS inverter with two inputs and two outputs is proposed to reduce short-circuit current in order to increment delay and reduce power overhead where slow operation is required. The circuit is based on bidirectional delay element connected in series with the PMOS and NMOS switching transistors. It provides differences in the dynamic response so that the direct-path current in the next stage is reduced. The switching transistors are never ON at the same time. Characteristics of various delay element implementations are presented and verified by circuit simulations. Global optimization procedure is used to obtain the most power-efficient transistor sizing. The performance of the modified CMOS inverter chain is compared to standard implementation for various delays. The energy (charge per delay is reduced up to 40%. The use of the proposed delay element is demonstrated by implementing a low-power delay line and a leading-edge detector cell.

  20. Maintaining the CRRT circuit: non-anticoagulant alternatives.

    Science.gov (United States)

    Davies, Hugh; Leslie, Gavin

    2006-11-01

    Prevention of clotting is an important factor in continuous renal replacement therapy (CRRT) to ensure that solute clearance, electrolytes and acid base and fluid balance are controlled. This article will focus attention on the components and design of the CRRT circuit, identifying strategies in the literature which may promote circuit life. It is important that the CRRT circuit incorporates biocompatible materials and is designed in a way which limits turbulent blood flow. Premature clotting is also more likely to occur when blood flow through the circuit is interrupted or sluggish as a result of poor vascular access, or when there is increased resistance or obstruction in the circuit. The pre-dilution method of fluid replacement reduces blood viscosity inside the haemofilter and assists in delaying the onset of blood clots by limiting the potential for haemoconcentration. The monitoring and adjustment of the blood level inside the venous bubble or air trap can lessen the effect of blood-air contact and protect the site from excessive clotting. A number of other factors are also considered important as predictors of circuit life in the operation and management of the circuit. They include the choice of access site and design configuration of the catheter device, and the level of competency of nursing staff preparing and monitoring circuit function. Whilst the value of intermittent saline flushing has not been proven to be of benefit in promoting circuit life, it remains to be determined whether the choice in the CRRT mode affects circuit life differently. In conclusion, specific measures in the application of CRRT besides anticoagulation therapy can influence the development of blood clots and the duration of circuit life. This requires the development of evidence-based practice guidelines which include strategies that are known to promote circuit life.

  1. Engineering embedded systems physics, programs, circuits

    CERN Document Server

    Hintenaus, Peter

    2015-01-01

    This is a textbook for graduate and final-year-undergraduate computer-science and electrical-engineering students interested in the hardware and software aspects of embedded and cyberphysical systems design. It is comprehensive and self-contained, covering everything from the basics to case-study implementation. Emphasis is placed on the physical nature of the problem domain and of the devices used. The reader is assumed to be familiar on a theoretical level with mathematical tools like ordinary differential equation and Fourier transforms. In this book these tools will be put to practical use. Engineering Embedded Systems begins by addressing basic material on signals and systems, before introducing to electronics. Treatment of digital electronics accentuating synchronous circuits and including high-speed effects proceeds to micro-controllers, digital signal processors and programmable logic. Peripheral units and decentralized networks are given due weight. The properties of analog circuits and devices like ...

  2. Nanoeletromechanical switch and logic circuits formed therefrom

    Science.gov (United States)

    Nordquist, Christopher D [Albuquerque, NM; Czaplewski, David A [Albuquerque, NM

    2010-05-18

    A nanoelectromechanical (NEM) switch is formed on a substrate with a source electrode containing a suspended electrically-conductive beam which is anchored to the substrate at each end. This beam, which can be formed of ruthenium, bows laterally in response to a voltage applied between a pair of gate electrodes and the source electrode to form an electrical connection between the source electrode and a drain electrode located near a midpoint of the beam. Another pair of gate electrodes and another drain electrode can be located on an opposite side of the beam to allow for switching in an opposite direction. The NEM switch can be used to form digital logic circuits including NAND gates, NOR gates, programmable logic gates, and SRAM and DRAM memory cells which can be used in place of conventional CMOS circuits, or in combination therewith.

  3. Color Coding of Circuit Quantities in Introductory Circuit Analysis Instruction

    Science.gov (United States)

    Reisslein, Jana; Johnson, Amy M.; Reisslein, Martin

    2015-01-01

    Learning the analysis of electrical circuits represented by circuit diagrams is often challenging for novice students. An open research question in electrical circuit analysis instruction is whether color coding of the mathematical symbols (variables) that denote electrical quantities can improve circuit analysis learning. The present study…

  4. On Polymorphic Circuits and Their Design Using Evolutionary Algorithms

    Science.gov (United States)

    Stoica, Adrian; Zebulum, Ricardo; Keymeulen, Didier; Lohn, Jason; Clancy, Daniel (Technical Monitor)

    2002-01-01

    This paper introduces the concept of polymorphic electronics (polytronics) - referring to electronics with superimposed built-in functionality. A function change does not require switches/reconfiguration as in traditional approaches. Instead the change comes from modifications in the characteristics of devices involved in the circuit, in response to controls such as temperature, power supply voltage (VDD), control signals, light, etc. The paper illustrates polytronic circuits in which the control is done by temperature, morphing signals, and VDD respectively. Polytronic circuits are obtained by evolutionary design/evolvable hardware techniques. These techniques are ideal for the polytronics design, a new area that lacks design guidelines, know-how,- yet the requirements/objectives are easy to specify and test. The circuits are evolved/synthesized in two different modes. The first mode explores an unstructured space, in which transistors can be interconnected freely in any arrangement (in simulations only). The second mode uses a Field Programmable Transistor Array (FPTA) model, and the circuit topology is sought as a mapping onto a programmable architecture (these experiments are performed both in simulations and on FPTA chips). The experiments demonstrated the synthesis. of polytronic circuits by evolution. The capacity of storing/hiding "extra" functions provides for watermark/invisible functionality, thus polytronics may find uses in intelligence/security applications.

  5. Deep learning with coherent nanophotonic circuits

    Science.gov (United States)

    Shen, Yichen; Harris, Nicholas C.; Skirlo, Scott; Prabhu, Mihika; Baehr-Jones, Tom; Hochberg, Michael; Sun, Xin; Zhao, Shijie; Larochelle, Hugo; Englund, Dirk; Soljačić, Marin

    2017-07-01

    Artificial neural networks are computational network models inspired by signal processing in the brain. These models have dramatically improved performance for many machine-learning tasks, including speech and image recognition. However, today's computing hardware is inefficient at implementing neural networks, in large part because much of it was designed for von Neumann computing schemes. Significant effort has been made towards developing electronic architectures tuned to implement artificial neural networks that exhibit improved computational speed and accuracy. Here, we propose a new architecture for a fully optical neural network that, in principle, could offer an enhancement in computational speed and power efficiency over state-of-the-art electronics for conventional inference tasks. We experimentally demonstrate the essential part of the concept using a programmable nanophotonic processor featuring a cascaded array of 56 programmable Mach-Zehnder interferometers in a silicon photonic integrated circuit and show its utility for vowel recognition.

  6. Vibration Damping Circuit Card Assembly

    Science.gov (United States)

    Hunt, Ronald Allen (Inventor)

    2016-01-01

    A vibration damping circuit card assembly includes a populated circuit card having a mass M. A closed metal container is coupled to a surface of the populated circuit card at approximately a geometric center of the populated circuit card. Tungsten balls fill approximately 90% of the metal container with a collective mass of the tungsten balls being approximately (0.07) M.

  7. Impact of Temporal Masking of Flip-Flop Upsets on Soft Error Rates of Sequential Circuits

    Science.gov (United States)

    Chen, R. M.; Mahatme, N. N.; Diggins, Z. J.; Wang, L.; Zhang, E. X.; Chen, Y. P.; Liu, Y. N.; Narasimham, B.; Witulski, A. F.; Bhuva, B. L.; Fleetwood, D. M.

    2017-08-01

    Reductions in single-event (SE) upset (SEU) rates for sequential circuits due to temporal masking effects are evaluated. The impacts of supply voltage, combinational-logic delay, flip-flop (FF) SEU performance, and particle linear energy transfer (LET) values are analyzed for SE cross sections of sequential circuits. Alpha particles and heavy ions with different LET values are used to characterize the circuits fabricated at the 40-nm bulk CMOS technology node. Experimental results show that increasing the delay of the logic circuit present between FFs and decreasing the supply voltage are two effective ways of reducing SE error rates for sequential circuits for particles with low LET values due to temporal masking. SEU-hardened FFs benefit less from temporal masking than conventional FFs. Circuit hardening implications for SEU-hardened and unhardened FFs are discussed.

  8. Verification of Building Blocks for Asynchronous Circuits

    Directory of Open Access Journals (Sweden)

    Freek Verbeek

    2013-04-01

    Full Text Available Scalable formal verification constitutes an important challenge for the design of asynchronous circuits. Deadlock freedom is a property that is desired but hard to verify. It is an emergent property that has to be verified monolithically. We present our approach to using ACL2 to verify necessary and sufficient conditions over asynchronous delay-insensitive primitives. These conditions are used to derive SAT/SMT instances from circuits built out of these primitives. These SAT/SMT instances help in establishing absence of deadlocks. Our verification effort consists of building an executable checker in the ACL2 logic tailored for our purpose. We prove that this checker is correct. This approach enables us to prove ACL2 theorems involving defun-sk constructs and free variables fully automatically.

  9. Technology CAD for germanium CMOS circuit

    Energy Technology Data Exchange (ETDEWEB)

    Saha, A.R. [Department of Electronics and ECE, IIT Kharagpur, Kharagpur-721302 (India)]. E-mail: ars.iitkgp@gmail.com; Maiti, C.K. [Department of Electronics and ECE, IIT Kharagpur, Kharagpur-721302 (India)

    2006-12-15

    Process simulation for germanium MOSFETs (Ge-MOSFETs) has been performed in 2D SILVACO virtual wafer fabrication (VWF) suite towards the technology CAD for Ge-CMOS process development. Material parameters and mobility models for Germanium were incorporated in simulation via C-interpreter function. We also report on the device design issues along with the DC and RF characterization of the bulk Ge-MOSFETs, AC parameter extraction and circuit simulation of Ge-CMOS. Simulation results are compared with bulk-Si devices. Simulations predict a cut-off frequency, f {sub T} of about 175 GHz for Ge-MOSFETs compared to 70 GHz for a similar gate-length Si MOSFET. For a single stage Ge-CMOS inverter circuit, a GATE delay of 0.6 ns is predicted.

  10. Circuit for echo and noise suppression of accoustic signals transmitted through a drill string

    Science.gov (United States)

    Drumheller, Douglas S.; Scott, Douglas D.

    1993-01-01

    An electronic circuit for digitally processing analog electrical signals produced by at least one acoustic transducer is presented. In a preferred embodiment of the present invention, a novel digital time delay circuit is utilized which employs an array of First-in-First-out (FiFo) microchips. Also, a bandpass filter is used at the input to this circuit for isolating drill string noise and eliminating high frequency output.

  11. Circuit for echo and noise suppression of acoustic signals transmitted through a drill string

    Science.gov (United States)

    Drumheller, D.S.; Scott, D.D.

    1993-12-28

    An electronic circuit for digitally processing analog electrical signals produced by at least one acoustic transducer is presented. In a preferred embodiment of the present invention, a novel digital time delay circuit is utilized which employs an array of First-in-First-out (FiFo) microchips. Also, a bandpass filter is used at the input to this circuit for isolating drill string noise and eliminating high frequency output. 20 figures.

  12. Offset cancelling circuit

    OpenAIRE

    Wiegerink, Remco J.; Seevinck, Evert; de Jager, Wim

    1989-01-01

    A monolithic offset cancelling circuit to reduce the offset voltage at an integrated audio-amplifier output is described. This offset voltage is detected using a low-pass filter with a very large time constant for which only one small on-chip capacitor is needed. The circuit was realized with a bipolar cell-based semicustom array. Measurements have shown that a -3-dB bandwidth below 5 Hz can be realized with a capacitor value of 50 pF. The resulting offset voltage at the audio-amplifier outpu...

  13. Primer printed circuit boards

    CERN Document Server

    Argyle, Andrew

    2009-01-01

    Step-by-step instructions for making your own PCBs at home. Making your own printed circuit board (PCB) might seem a daunting task, but once you master the steps, it's easy to attain professional-looking results. Printed circuit boards, which connect chips and other components, are what make almost all modern electronic devices possible. PCBs are made from sheets of fiberglass clad with copper, usually in multiplelayers. Cut a computer motherboard in two, for instance, and you'll often see five or more differently patterned layers. Making boards at home is relatively easy

  14. Electronic circuits fundamentals & applications

    CERN Document Server

    Tooley, Mike

    2015-01-01

    Electronics explained in one volume, using both theoretical and practical applications.New chapter on Raspberry PiCompanion website contains free electronic tools to aid learning for students and a question bank for lecturersPractical investigations and questions within each chapter help reinforce learning Mike Tooley provides all the information required to get to grips with the fundamentals of electronics, detailing the underpinning knowledge necessary to appreciate the operation of a wide range of electronic circuits, including amplifiers, logic circuits, power supplies and oscillators. The

  15. Electrical Circuit Tester

    Science.gov (United States)

    Love, Frank

    2006-04-18

    An electrical circuit testing device is provided, comprising a case, a digital voltage level testing circuit with a display means, a switch to initiate measurement using the device, a non-shorting switching means for selecting pre-determined electrical wiring configurations to be tested in an outlet, a terminal block, a five-pole electrical plug mounted on the case surface and a set of adapters that can be used for various multiple-pronged electrical outlet configurations for voltages from 100 600 VAC from 50 100 Hz.

  16. Circuit design for reliability

    CERN Document Server

    Cao, Yu; Wirth, Gilson

    2015-01-01

    This book presents physical understanding, modeling and simulation, on-chip characterization, layout solutions, and design techniques that are effective to enhance the reliability of various circuit units.  The authors provide readers with techniques for state of the art and future technologies, ranging from technology modeling, fault detection and analysis, circuit hardening, and reliability management. Provides comprehensive review on various reliability mechanisms at sub-45nm nodes; Describes practical modeling and characterization techniques for reliability; Includes thorough presentation of robust design techniques for major VLSI design units; Promotes physical understanding with first-principle simulations.

  17. VERNIER CHRONOTRON UTILIZING AT LEAST TWO SHORTED DELAY LINES

    Science.gov (United States)

    Rufer, R.P.

    1964-02-25

    An improved vernier chronotron featuring pulse-forming circuits of a ringing'' or back and forth'' oscillatory type is described. A delay line shorted at both ends together with transistor circuitry to introduce a pulse into that line and also to provide reinforcement of the pulse as it oscillates between the pulse-reflective extremities is provided. A transistorized coincidence circuit is also provided. Enhanced measurement of time intervals in the nanosecond range is afforded. (AEC)

  18. Automates programmables Partie 3 : Langages de programmation

    CERN Document Server

    International Electrotechnical Commission. Geneva

    1993-01-01

    S'applique à la représentation imprimée et affichée, à l'aide des caractères ISO/CEI 646, des langages de programmation devant être utilisés pour les automates programmables. Spécifie la syntaxe et la sémantique.

  19. Power amplifier circuit

    NARCIS (Netherlands)

    Takeya, Hideaki; Nauta, Bram

    2015-01-01

    PROBLEM TO BE SOLVED: To provide a power amplifier circuit which has high power efficiency while suppressing a fluctuation of output power relatively to a fluctuation of a power supply voltage in a high-efficiency switching amplifier which operates in a radio frequency band.SOLUTION: A duty ratio

  20. "Printed-circuit" rectenna

    Science.gov (United States)

    Dickinson, R. M.

    1977-01-01

    Rectifying antenna is less bulky structure for absorbing transmitted microwave power and converting it into electrical current. Printed-circuit approach, using microstrip technology and circularly polarized antenna, makes polarization orientation unimportant and allows much smaller arrays for given performance. Innovation is particularly useful with proposed electric vehicles powered by beam microwaves.

  1. Superconducting Quantum Circuits

    NARCIS (Netherlands)

    Majer, J.B.

    2002-01-01

    This thesis describes a number of experiments with superconducting cir- cuits containing small Josephson junctions. The circuits are made out of aluminum islands which are interconnected with a very thin insulating alu- minum oxide layer. The connections form a Josephson junction. The current trough

  2. ESD analog circuits and design

    CERN Document Server

    Voldman, Steven H

    2014-01-01

    A comprehensive and in-depth review of analog circuit layout, schematic architecture, device, power network and ESD design This book will provide a balanced overview of analog circuit design layout, analog circuit schematic development, architecture of chips, and ESD design.  It will start at an introductory level and will bring the reader right up to the state-of-the-art. Two critical design aspects for analog and power integrated circuits are combined. The first design aspect covers analog circuit design techniques to achieve the desired circuit performance. The second and main aspect pres

  3. Learning Media Programme

    NARCIS (Netherlands)

    Westera, Wim

    2009-01-01

    Westera, W. (2009). Learning Media Programme. Introductory presentation of Learning Media Programme for visitors of Kavala University of Technology, Kavala, Greece and National Institute of Multimedia Education, Chiba, Japan. March, 2, 2009, Heerlen, The Netherlands.

  4. River research programme

    CSIR Research Space (South Africa)

    Ferrar, AA

    1988-01-01

    Full Text Available The need for a comprehensive, multidisciplinary research programme for river ecosystems is described. The scope of the programme needs to include basic descriptions of a systems and biota, the testing and development of functional theory...

  5. Laser patterning of highly conductive flexible circuits

    Science.gov (United States)

    Ji, Seok Young; Muhammed Ajmal, C.; Kim, Taehun; Chang, Won Seok; Baik, Seunghyun

    2017-04-01

    There has been considerable attention paid to highly conductive flexible adhesive (CFA) materials as electrodes and interconnectors for future flexible electronic devices. However, the patterning technology still needs to be developed to construct micro-scale electrodes and circuits. Here we developed the selective laser sintering technology where the pattering and curing were accomplished simultaneously without making additional masks. The CFA was composed of micro-scale Ag flakes, multiwalled carbon nanotubes decorated with Ag nanoparticles, and a nitrile-butadiene-rubber matrix. The Teflon-coated polyethylene terephthalate film was used as a flexible substrate. The width of lines (50-500 μm) and circuit patterns were controlled by the programmable scanning of a focused laser beam (power = 50 mW, scanning speed = 1 mm s-1). The laser irradiation removed solvent and induced effective coalescence among fillers providing a conductivity as high as 25 012 S cm-1. The conductivity stability was excellent under the ambient air and humid environments. The normalized resistance change of the pattern was smaller than 1.2 at the bending radius of 5 mm. The cyclability and adhesion of the laser-sintered line pattern on the substrate was excellent. A flexible circuit was fabricated sequentially for operating light emitting diodes during the bending motion, demonstrating excellent feasibility for practical applications in flexible electronics.

  6. Magnetomicrofluidics Circuits for Organizing Bioparticle Arrays

    Science.gov (United States)

    Abedini-Nassab, Roozbeh

    Single-cell analysis (SCA) tools have important applications in the analysis of phenotypic heterogeneity, which is difficult or impossible to analyze in bulk cell culture or patient samples. SCA tools thus have a myriad of applications ranging from better credentialing of drug therapies to the analysis of rare latent cells harboring HIV infection or in Cancer. However, existing SCA systems usually lack the required combination of programmability, flexibility, and scalability necessary to enable the study of cell behaviors and cell-cell interactions at the scales sufficient to analyze extremely rare events. To advance the field, I have developed a novel, programmable, and massively-parallel SCA tool which is based on the principles of computer circuits. By integrating these magnetic circuits with microfluidics channels, I developed a platform that can organize a large number of single particles into an array in a controlled manner. My magnetophoretic circuits use passive elements constructed in patterned magnetic thin films to move cells along programmed tracks with an external rotating magnetic field. Cell motion along these tracks is analogous to the motion of charges in an electrical conductor, following a rule similar to Ohm's law. I have also developed asymmetric conductors, similar to electrical diodes, and storage sites for cells that behave similarly to electrical capacitors. I have also developed magnetophoretic circuits which use an overlaid pattern of microwires to switch single cells between different tracks. This switching mechanism, analogous to the operation of electronic transistors, is achieved by establishing a semiconducting gap in the magnetic pattern which can be changed from an insulating state to a conducting state by application of electrical current to an overlaid electrode. I performed an extensive study on the operation of transistors to optimize their geometry and minimize the required gate currents. By combining these elements into

  7. Reconfigurable CPLAG and Modified PFAL Adiabatic Logic Circuits

    Directory of Open Access Journals (Sweden)

    Manoj Sharma

    2015-01-01

    Full Text Available Previously, authors have proposed CPLAG and MCPLAG circuits extracting benefits of CPL family implemented based upon semiadiabatic logic for low power VLSI circuit design along with gating concept. Also authors have communicated RCPLAG circuits adding another dimension of reconfigurability into CPLAG/MCPLAG circuits. Moving ahead, in this paper, authors have implemented/reconfigured RCPLAG universal Nand/And gate and universal Nor/Or gate for extracting behavior of dynamic positive edge triggered DFF. Authors have also implemented Adder/Subtractor circuit using different techniques. Authors have also reported modification in PFAL semiadiabatic circuit family to further reduce the power dissipation. Functionality of these is verified and found to be satisfactory. Further these are examined rigorously with voltage, Cload, temperature, and transistor size variation. Performance of these is examined with these variations with power dissipation, delays, rise, and fall times associated. From the analysis it is found that best operating condition for DFF based upon RCPLAG universal gate can be achieved at supply voltage lower than 3 V which can be used for different transistor size up to 36 μm. Average power dissipation is 0.2 μW at 1 V and 30 μW at 2 V at 100 ff Cload 25°C approximately. Average power dissipated by CPLAG Adder/Subtractot is 58 μW. Modified PFAL circuit reduces average power by 9% approximately.

  8. Reducing energy with asynchronous circuits

    OpenAIRE

    Rivas Barragan, Daniel

    2012-01-01

    Reducing energy consumption using asynchronous circuits. The elastic clocks approach has been implemented along with a closed-feedback loop in order to achieve a lower energy consumption along with more reliability in integrated circuits.

  9. Diode, transistor & fet circuits manual

    CERN Document Server

    Marston, R M

    2013-01-01

    Diode, Transistor and FET Circuits Manual is a handbook of circuits based on discrete semiconductor components such as diodes, transistors, and FETS. The book also includes diagrams and practical circuits. The book describes basic and special diode characteristics, heat wave-rectifier circuits, transformers, filter capacitors, and rectifier ratings. The text also presents practical applications of associated devices, for example, zeners, varicaps, photodiodes, or LEDs, as well as it describes bipolar transistor characteristics. The transistor can be used in three basic amplifier configuration

  10. A Novel 3-Input AND/XOR Gate Circuit for Reed-Muller Logic Applications

    Directory of Open Access Journals (Sweden)

    Yang Yuan

    2016-01-01

    Full Text Available 3-input AND/XOR is the basic complex gate of Reed-Muller logic. Low energy consumption is important for Reed-Muller logic circuit implementation. Against the drawbacks of the published gate-level and transistor-level 3-input AND/XOR gate design in power and power delay product (PDP, a low energy consumption 3-input AND/XOR gate is proposed by employing multi-rails and hybrid-CMOS techniques to improve its speed and short the signal transimission path. Under 55nm CMOS process, post-simulations in different process corners are carried out by using HSPICE and compared with the published circuits. Simulation results show that the proposed circuit has advantages over published designs. For typical process corners, the improvement of the proposed circuit can be up to 27.21%, 19.23% and 35.39%, respectively, in terms of power, delay and power delay product.

  11. Stochastic delay accelerates signaling in gene networks.

    Science.gov (United States)

    Josić, Krešimir; López, José Manuel; Ott, William; Shiau, LieJune; Bennett, Matthew R

    2011-11-01

    The creation of protein from DNA is a dynamic process consisting of numerous reactions, such as transcription, translation and protein folding. Each of these reactions is further comprised of hundreds or thousands of sub-steps that must be completed before a protein is fully mature. Consequently, the time it takes to create a single protein depends on the number of steps in the reaction chain and the nature of each step. One way to account for these reactions in models of gene regulatory networks is to incorporate dynamical delay. However, the stochastic nature of the reactions necessary to produce protein leads to a waiting time that is randomly distributed. Here, we use queueing theory to examine the effects of such distributed delay on the propagation of information through transcriptionally regulated genetic networks. In an analytically tractable model we find that increasing the randomness in protein production delay can increase signaling speed in transcriptional networks. The effect is confirmed in stochastic simulations, and we demonstrate its impact in several common transcriptional motifs. In particular, we show that in feedforward loops signaling time and magnitude are significantly affected by distributed delay. In addition, delay has previously been shown to cause stable oscillations in circuits with negative feedback. We show that the period and the amplitude of the oscillations monotonically decrease as the variability of the delay time increases.

  12. DESIGN AND REALIZATION OF A MULTI-EPROM PROGRAMMER

    African Journals Online (AJOL)

    The amount of hardware components used in the design have been minimized by taking advantage of the compatibility of pin positions in different. EPROMs and the use of simple circuits and software. The programmer. can be connected directly to any. IBM parallel printer port without requiring any additional interface card.

  13. Circuit Bodging : Atari Punk Console

    NARCIS (Netherlands)

    Allen, B.

    2009-01-01

    Circuit bodging is back! Maxwell is proud to present small, simple, but ultimately lovable little circuits to build for your own, personal pleasure. In this edition we are featuring: The Atari Punk Console. The Atari Punk Console (or APC) is a 555 timer IC based noise maker circuit. The original was

  14. Synthetic in vitro transcription circuits.

    Science.gov (United States)

    Weitz, Maximilian; Simmel, Friedrich C

    2012-01-01

    With the help of only two enzymes--an RNA polymerase and a ribonuclease--reduced versions of transcriptional regulatory circuits can be implemented in vitro. These circuits enable the emulation of naturally occurring biochemical networks, the exploration of biological circuit design principles and the biochemical implementation of powerful computational models.

  15. High voltage MOSFET switching circuit

    Science.gov (United States)

    McEwan, Thomas E.

    1994-01-01

    The problem of source lead inductance in a MOSFET switching circuit is compensated for by adding an inductor to the gate circuit. The gate circuit inductor produces an inductive spike which counters the source lead inductive drop to produce a rectangular drive voltage waveform at the internal gate-source terminals of the MOSFET.

  16. Quantum-circuit refrigerator

    Science.gov (United States)

    Tan, Kuan Yen; Partanen, Matti; Lake, Russell E.; Govenius, Joonas; Masuda, Shumpei; Möttönen, Mikko

    2017-05-01

    Quantum technology promises revolutionizing applications in information processing, communications, sensing and modelling. However, efficient on-demand cooling of the functional quantum degrees of freedom remains challenging in many solid-state implementations, such as superconducting circuits. Here we demonstrate direct cooling of a superconducting resonator mode using voltage-controllable electron tunnelling in a nanoscale refrigerator. This result is revealed by a decreased electron temperature at a resonator-coupled probe resistor, even for an elevated electron temperature at the refrigerator. Our conclusions are verified by control experiments and by a good quantitative agreement between theory and experimental observations at various operation voltages and bath temperatures. In the future, we aim to remove spurious dissipation introduced by our refrigerator and to decrease the operational temperature. Such an ideal quantum-circuit refrigerator has potential applications in the initialization of quantum electric devices. In the superconducting quantum computer, for example, fast and accurate reset of the quantum memory is needed.

  17. Neuromorphic Silicon Neuron Circuits

    Science.gov (United States)

    Indiveri, Giacomo; Linares-Barranco, Bernabé; Hamilton, Tara Julia; van Schaik, André; Etienne-Cummings, Ralph; Delbruck, Tobi; Liu, Shih-Chii; Dudek, Piotr; Häfliger, Philipp; Renaud, Sylvie; Schemmel, Johannes; Cauwenberghs, Gert; Arthur, John; Hynna, Kai; Folowosele, Fopefolu; Saighi, Sylvain; Serrano-Gotarredona, Teresa; Wijekoon, Jayawan; Wang, Yingxue; Boahen, Kwabena

    2011-01-01

    Hardware implementations of spiking neurons can be extremely useful for a large variety of applications, ranging from high-speed modeling of large-scale neural systems to real-time behaving systems, to bidirectional brain–machine interfaces. The specific circuit solutions used to implement silicon neurons depend on the application requirements. In this paper we describe the most common building blocks and techniques used to implement these circuits, and present an overview of a wide range of neuromorphic silicon neurons, which implement different computational models, ranging from biophysically realistic and conductance-based Hodgkin–Huxley models to bi-dimensional generalized adaptive integrate and fire models. We compare the different design methodologies used for each silicon neuron design described, and demonstrate their features with experimental results, measured from a wide range of fabricated VLSI chips. PMID:21747754

  18. Neuromorphic silicon neuron circuits

    Directory of Open Access Journals (Sweden)

    Giacomo eIndiveri

    2011-05-01

    Full Text Available Hardware implementations of spiking neurons can be extremely useful for a large variety of applications, ranging from high-speed modeling of large-scale neural systems to real-time behaving systems, to bidirectional brain-machine interfaces. The specific circuit solutions used to implement silicon neurons depend on the application requirements. In this paper we describe the most common building blocks and techniques used to implement these circuits, and present an overview of a wide range of neuromorphic silicon neurons, which implement different computational models, ranging from biophysically realistic and conductance based Hodgkin-Huxley models to bi-dimensional generalized adaptive Integrate and Fire models. We compare the different design methodologies used for each silicon neuron design described, and demonstrate their features with experimental results, measured from a wide range of fabricated VLSI chips.

  19. Quantum-circuit refrigerator

    Science.gov (United States)

    Tan, Kuan Yen; Partanen, Matti; Lake, Russell E.; Govenius, Joonas; Masuda, Shumpei; Möttönen, Mikko

    2017-01-01

    Quantum technology promises revolutionizing applications in information processing, communications, sensing and modelling. However, efficient on-demand cooling of the functional quantum degrees of freedom remains challenging in many solid-state implementations, such as superconducting circuits. Here we demonstrate direct cooling of a superconducting resonator mode using voltage-controllable electron tunnelling in a nanoscale refrigerator. This result is revealed by a decreased electron temperature at a resonator-coupled probe resistor, even for an elevated electron temperature at the refrigerator. Our conclusions are verified by control experiments and by a good quantitative agreement between theory and experimental observations at various operation voltages and bath temperatures. In the future, we aim to remove spurious dissipation introduced by our refrigerator and to decrease the operational temperature. Such an ideal quantum-circuit refrigerator has potential applications in the initialization of quantum electric devices. In the superconducting quantum computer, for example, fast and accurate reset of the quantum memory is needed. PMID:28480900

  20. Integrated Circuit Immunity

    Science.gov (United States)

    Sketoe, J. G.; Clark, Anthony

    2000-01-01

    This paper presents a DOD E3 program overview on integrated circuit immunity. The topics include: 1) EMI Immunity Testing; 2) Threshold Definition; 3) Bias Tee Function; 4) Bias Tee Calibration Set-Up; 5) EDM Test Figure; 6) EMI Immunity Levels; 7) NAND vs. and Gate Immunity; 8) TTL vs. LS Immunity Levels; 9) TP vs. OC Immunity Levels; 10) 7805 Volt Reg Immunity; and 11) Seventies Chip Set. This paper is presented in viewgraph form.

  1. Cartography of serotonergic circuits.

    Science.gov (United States)

    Sparta, Dennis R; Stuber, Garret D

    2014-08-06

    Serotonin is an essential neuromodulator, but the precise circuit connectivity that regulates serotonergic neurons has not been well defined. Using rabies virus tracing strategies Weissbourd et al. (2014) and Pollak Dorocic et al. (2014) in this issue of Neuron and Ogawa et al. (2014) in Cell Reports provide a comprehensive map of the inputs to serotonergic neurons, highlighting the complexity and diversity of potential upstream cellular regulators. Copyright © 2014 Elsevier Inc. All rights reserved.

  2. Delayed Orgasm and Anorgasmia

    OpenAIRE

    JENKINS, Lawrence C.; Mulhall, John P.

    2015-01-01

    Delayed orgasm/anorgasmia defined as the persistent or recurrent difficulty, delay in, or absence of attaining orgasm after sufficient sexual stimulation, which causes personal distress. Delayed orgasm and anorgasmia are associated with significant sexual dissatisfaction. A focused medical history can shed light on the potential etiologies; which include: medications, penile sensation loss, endocrinopathies, penile hyperstimulation and psychological etiologies, amongst others. Unfortunately, ...

  3. Hippocampal and Cerebellar Single-Unit Activity During Delay and Trace Eyeblink Conditioning in the Rat

    OpenAIRE

    Green, John T.; Arenos, Jeremy D.

    2006-01-01

    In delay eyeblink conditioning, the CS overlaps with the US and only a brainstem-cerebellar circuit is necessary for learning. In trace eyeblink conditioning, the CS ends before the US is delivered and several forebrain structures, including the hippocampus, are required for learning, in addition to a brainstem-cerebellar circuit. The interstimulus interval (ISI) between CS onset and US onset is perhaps the most important factor in classical conditioning, but studies comparing delay and trace...

  4. Changes to the shuttle circuits

    CERN Multimedia

    GS Department

    2011-01-01

    To fit with passengers expectation, there will be some changes to the shuttle circuits as from Monday 10 October. See details on http://cern.ch/ShuttleService (on line on 7 October). Circuit No. 5 is cancelled as circuit No. 1 also stops at Bldg. 33. In order to guarantee shorter travel times, circuit No. 1 will circulate on Meyrin site only and circuit No. 2, with departures from Bldg. 33 and 500, on Prévessin site only. Site Services Section

  5. Flexible, High-Speed CdSe Nanocrystal Integrated Circuits.

    Science.gov (United States)

    Stinner, F Scott; Lai, Yuming; Straus, Daniel B; Diroll, Benjamin T; Kim, David K; Murray, Christopher B; Kagan, Cherie R

    2015-10-14

    We report large-area, flexible, high-speed analog and digital colloidal CdSe nanocrystal integrated circuits operating at low voltages. Using photolithography and a newly developed process to fabricate vertical interconnect access holes, we scale down device dimensions, reducing parasitic capacitances and increasing the frequency of circuit operation, and scale up device fabrication over 4 in. flexible substrates. We demonstrate amplifiers with ∼7 kHz bandwidth, ring oscillators with <10 μs stage delays, and NAND and NOR logic gates.

  6. Effects of cell cycle noise on excitable gene circuits

    CERN Document Server

    Veliz-Cuba, Alan; Bennett, Matthew R; Josić, Krešimir; Ott, William

    2016-01-01

    We assess the impact of cell cycle noise on gene circuit dynamics. For bistable genetic switches and excitable circuits, we find that transitions between metastable states most likely occur just after cell division and that this concentration effect intensifies in the presence of transcriptional delay. We explain this concentration effect with a 3-states stochastic model. For genetic oscillators, we quantify the temporal correlations between daughter cells induced by cell division. Temporal correlations must be captured properly in order to accurately quantify noise sources within gene networks.

  7. Power system with an integrated lubrication circuit

    Science.gov (United States)

    Hoff, Brian D [East Peoria, IL; Akasam, Sivaprasad [Peoria, IL; Algrain, Marcelo C [Peoria, IL; Johnson, Kris W [Washington, IL; Lane, William H [Chillicothe, IL

    2009-11-10

    A power system includes an engine having a first lubrication circuit and at least one auxiliary power unit having a second lubrication circuit. The first lubrication circuit is in fluid communication with the second lubrication circuit.

  8. Reversible gates and circuits descriptions

    Science.gov (United States)

    Gracki, Krzystof

    2017-08-01

    This paper presents basic methods of reversible circuit description. To design reversible circuit a set of gates has to be chosen. Most popular libraries are composed of three types of gates so called CNT gates (Control, NOT and Toffoli). The gate indexing method presented in this paper is based on the CNT gates set. It introduces a uniform indexing of the gates used during synthesis process of reversible circuits. The paper is organized as follows. Section 1 recalls basic concepts of reversible logic. In Section 2 and 3 a graphical representation of the reversible gates and circuits is described. Section 4 describes proposed uniform NCT gates indexing. The presented gate indexing method provides gate numbering scheme independent of lines number of the designed circuit. The solution for a circuit consisting of smaller number of lines is a subset of solution for a larger circuit.

  9. Engineering genetic circuit interactions within and between synthetic minimal cells

    Science.gov (United States)

    Adamala, Katarzyna P.; Martin-Alarcon, Daniel A.; Guthrie-Honea, Katriona R.; Boyden, Edward S.

    2017-05-01

    Genetic circuits and reaction cascades are of great importance for synthetic biology, biochemistry and bioengineering. An open question is how to maximize the modularity of their design to enable the integration of different reaction networks and to optimize their scalability and flexibility. One option is encapsulation within liposomes, which enables chemical reactions to proceed in well-isolated environments. Here we adapt liposome encapsulation to enable the modular, controlled compartmentalization of genetic circuits and cascades. We demonstrate that it is possible to engineer genetic circuit-containing synthetic minimal cells (synells) to contain multiple-part genetic cascades, and that these cascades can be controlled by external signals as well as inter-liposomal communication without crosstalk. We also show that liposomes that contain different cascades can be fused in a controlled way so that the products of incompatible reactions can be brought together. Synells thus enable a more modular creation of synthetic biology cascades, an essential step towards their ultimate programmability.

  10. Synthesis of energy-efficient FSMs implemented in PLD circuits

    Science.gov (United States)

    Nawrot, Radosław; Kulisz, Józef; Kania, Dariusz

    2017-11-01

    The paper presents an outline of a simple synthesis method of energy-efficient FSMs. The idea consists in using local clock gating to selectively block the clock signal, if no transition of a state of a memory element is required. The research was dedicated to logic circuits using Programmable Logic Devices as the implementation platform, but the conclusions can be applied to any synchronous circuit. The experimental section reports a comparison of three methods of implementing sequential circuits in PLDs with respect to clock distribution: the classical fully synchronous structure, the structure exploiting the Enable Clock inputs of memory elements, and the structure using clock gating. The results show that the approach based on clock gating is the most efficient one, and it leads to significant reduction of dynamic power consumed by the FSM.

  11. Thermal Aware Floorplanning Incorporating Temperature Dependent Wire Delay Estimation

    DEFF Research Database (Denmark)

    Winther, AndreasThor; Liu, Wei; Nannarelli, Alberto

    2015-01-01

    Temperature has a negative impact on metal resistance and thus wire delay. In state-of-the-art VLSI circuits, large thermal gradients usually exist due to the uneven distribution of heat sources. The difference in wire temperature can lead to performance mismatch because wires of the same length ...

  12. Optoelectronics circuits manual

    CERN Document Server

    Marston, R M

    1999-01-01

    This manual is a useful single-volume guide specifically aimed at the practical design engineer, technician, and experimenter, as well as the electronics student and amateur. It deals with the subject in an easy to read, down to earth, and non-mathematical yet comprehensive manner, explaining the basic principles and characteristics of the best known devices, and presenting the reader with many practical applications and over 200 circuits. Most of the ICs and other devices used are inexpensive and readily available types, with universally recognised type numbers.The second edition

  13. Photonic Integrated Circuits

    Science.gov (United States)

    Krainak, Michael; Merritt, Scott

    2016-01-01

    Integrated photonics generally is the integration of multiple lithographically defined photonic and electronic components and devices (e.g. lasers, detectors, waveguides passive structures, modulators, electronic control and optical interconnects) on a single platform with nanometer-scale feature sizes. The development of photonic integrated circuits permits size, weight, power and cost reductions for spacecraft microprocessors, optical communication, processor buses, advanced data processing, and integrated optic science instrument optical systems, subsystems and components. This is particularly critical for small spacecraft platforms. We will give an overview of some NASA applications for integrated photonics.

  14. Integrated circuit cell library

    Science.gov (United States)

    Whitaker, Sterling R. (Inventor); Miles, Lowell H. (Inventor)

    2005-01-01

    According to the invention, an ASIC cell library for use in creation of custom integrated circuits is disclosed. The ASIC cell library includes some first cells and some second cells. Each of the second cells includes two or more kernel cells. The ASIC cell library is at least 5% comprised of second cells. In various embodiments, the ASIC cell library could be 10% or more, 20% or more, 30% or more, 40% or more, 50% or more, 60% or more, 70% or more, 80% or more, 90% or more, or 95% or more comprised of second cells.

  15. Electronics circuits and systems

    CERN Document Server

    Bishop, Owen

    2007-01-01

    The material in Electronics - Circuits and Systems is a truly up-to-date textbook, with coverage carefully matched to the electronics units of the 2007 BTEC National Engineering and the latest AS and A Level specifications in Electronics from AQA, OCR and WJEC. The material has been organized with a logical learning progression, making it ideal for a wide range of pre-degree courses in electronics. The approach is student-centred and includes: numerous examples and activities; web research topics; Self Test features, highlighted key facts, formulae and definitions. Each chapter ends with a set

  16. Electronics circuits and systems

    CERN Document Server

    Bishop, Owen

    2011-01-01

    The material in Electronics - Circuits and Systems is a truly up-to-date textbook, with coverage carefully matched to the electronics units of the 2007 BTEC National Engineering and the latest AS and A Level specifications in Electronics from AQA, OCR and WJEC. The material has been organized with a logical learning progression, making it ideal for a wide range of pre-degree courses in electronics. The approach is student-centred and includes: numerous examples and activities; web research topics; Self Test features, highlighted key facts, formulae and definitions. Ea

  17. Linear integrated circuits

    CERN Document Server

    Carr, Joseph

    1996-01-01

    The linear IC market is large and growing, as is the demand for well trained technicians and engineers who understand how these devices work and how to apply them. Linear Integrated Circuits provides in-depth coverage of the devices and their operation, but not at the expense of practical applications in which linear devices figure prominently. This book is written for a wide readership from FE and first degree students, to hobbyists and professionals.Chapter 1 offers a general introduction that will provide students with the foundations of linear IC technology. From chapter 2 onwa

  18. Electric circuits problem solver

    CERN Document Server

    REA, Editors of

    2012-01-01

    Each Problem Solver is an insightful and essential study and solution guide chock-full of clear, concise problem-solving gems. All your questions can be found in one convenient source from one of the most trusted names in reference solution guides. More useful, more practical, and more informative, these study aids are the best review books and textbook companions available. Nothing remotely as comprehensive or as helpful exists in their subject anywhere. Perfect for undergraduate and graduate studies.Here in this highly useful reference is the finest overview of electric circuits currently av

  19. Digital Optical Circuit Technology.

    Science.gov (United States)

    1985-03-01

    avait donc pour but de dresser un bilan des recherches; et des raisations intiEressant la technologie des circuits optiques et d󈨁udier leurs...experiment. 3. EXPERIMENTAL WAVEGUIDE DEVICE Experiments were performed using carbon disulphide, CS2 , as the nonlinear medium. CS2 has a high non- linear...x 1.60- 1.595- S1.590 15514 16 18 20 22 24 26 28 Temperature (I C) FIGURE 5 REFRACTIVE INDEX OF CARBON DISULPHIDE AT 1 .O6um AS A FUNCTION OF

  20. Digital Optical Circuit Technology

    Science.gov (United States)

    Dove, B. L. (Editor)

    1985-01-01

    The Proceedings for the 48th Meeting of the AGARD Avionics Panel contain the 18 papers presented a Technical Evaluation Report, and discussions that followed the presentations of papers. Seven papers were presented in the session devoted to optical bistability. Optical logic was addressed by three papers. The session on sources, modulators and demodulators presented three papers. Five papers were given in the final session on all optical systems. The purpose of this Specialists' Meeting was to present the research and development status of digital optical circuit technology and to examine its relevance in the broad context of digital processing, communication, radar, avionics and flight control systems implementation.

  1. Delay in the diagnosis of tuberculosis in Nepal

    Directory of Open Access Journals (Sweden)

    Enarson Don

    2009-07-01

    Full Text Available Abstract Background Identifying reasons for delay in diagnosis and treatment of tuberculosis is important for the health system to find ways to treat patients as early as possible, and hence reduce the suffering of patients and transmission of the disease. The objectives of this study was to assess the duration of delay in the diagnosis of tuberculosis and to investigate its determinants. Methods A cross-sectional survey was conducted using a structured questionnaire in 307 new tuberculosis patients registered by the National Tuberculosis Programme (NTP in all DOTS centres in Banke district of Nepal. Results The median patient delay was 50 days, the median health system delay was 18 days, and the median total delay was 60 days. Sputum smear negative participants had significantly lower risk of patient delay. Smokers using >5 cigarettes per day had higher risk of patient delay and health system delay. Conclusion Total delay in the diagnosis of tuberculosis in Banke district is shorter compared to other places in Nepal and neighbouring countries. The shorter delay for smear negative pulmonary tuberculosis raises suspicion that many of these patients are not examined according to the NTP manual before being diagnosed. Increasing public awareness of the disease and expansion of the facilities with assured quality could be helpful to reduce the delay in the diagnosis of tuberculosis.

  2. High-explosive-driven delay line pulse generator

    Energy Technology Data Exchange (ETDEWEB)

    Shearer, J.W.

    1982-11-15

    The inclusion of a delay line circuit into the design of a high-explosive-driven generator shortens the time constant of the output pulse. After a brief review of generator concepts and previously described pulse-shortening methods, a geometry is presented which incorporates delay line circuit techcniques into a coil generator. The circuit constants are adjusted to match the velocity of the generated electromagnetic wave to the detonation velocity of the high explosive. The proposed generator can be modeled by adding a variable inductance term to the telegrapher's equation. A particular solution of this equation is useful for exploring the operational parameters of the generator. The duration of the electromagnetic pulse equals the radial expansion time of the high-explosive-driven armature until it strikes the coil. Because the impedance of the generator is a constant, the current multiplication factor is limited only by nonlinear effects such as voltage breakdown, diffusion, and compression at high energies.

  3. Programmable Baseband Filter for Multistandard Mobile Phones

    DEFF Research Database (Denmark)

    Jensen, Rasmus Glarborg; Christensen, Kåre Tais; Bruun, Erik

    2003-01-01

    of the input transconductor. The entire filter consumes between 2.5 mW and 7.5 mW, depending on the desired noise performance. It is implemented in a standard 0.25 mum CMOS process. A test circuit has been developed and fabricated and measurements show that both the required programmability and the required......This paper describes a channel selection filter for mobile communication systems using a direct down conversion architecture. The filter can be programmed to meet the requirements of different communication standards, including GSM (Global System for Mobile communication), WCDMA (Wideband Code...... Division Multiple Access), and Bluetooth. The filter includes a novel DC offset compensation circuit that combines offset sampling in GSM mode with high pass filtering in WCDMA mode. The filter can be programmed to different noise performance levels by programming the impedance level and power consumption...

  4. En Note om Programmering

    DEFF Research Database (Denmark)

    Nørmark, Kurt

    2012-01-01

    Denne note er en introduktion til programmering. Formålet er at give dig et indblik i hvad programmering egentlig er for noget. Jeg vil vise at programmering kan foregå på forskellige måder, og at der er mange forskellige udfordringer forbundet med at programmere. Noten vil ikke knytte sig til et...... bestemt programmeringssprog. Noten vil kunne supplere et egentlig undervisningsmateriale, der støtter dig i en bestemt form for programmering i et udvalgt programmeringssprog....

  5. Finnish bioenergy research programme

    Energy Technology Data Exchange (ETDEWEB)

    Asplund, D. [VTT Energy, Jyvaeskylae (Finland)

    1996-12-31

    Finland is a leading country in the use of biofuels and has excellent opportunities to increase the use of biofuels by up to 25-30 %. The Finnish Government has set an objective for the promotion of bioenergy. The aim is to increase the use of bioenergy by about 25 % from the present level by 2005, and the increment corresponds to 1.5 million tonnes of oil equivalent (toe) per year. The R and D work has been considered as an important factor to achieve this ambitious goal. Energy research was organised into a series of research programmes in 1988 in accordance with the proposal of Finnish Energy Research Committee. The object of the research programmes is to enhance research activities and to bundle individual projects together into larger research packages. The common target of the Finnish energy research programmes is to proceed from basic and applied research to product development and pilot operation, and after that to the first commercial applications, e.g. demonstrations. As the organisation of energy research to programmes has led to good results, the Finnish Ministry of Trade and Industry decided to go on with this practice by launching new six-year programmes in 1993-1998. One of these programmes is the Bioenergy Research Programme and the co-ordination of this programme is carried out by VTT Energy. Besides VTT Energy the Finnish Forest Research Institute, Work Efficiency Institute, Metsaeteho and University of Joensuu are participating in the programme 7 refs.

  6. Noise in biological circuits.

    Science.gov (United States)

    Simpson, Michael L; Cox, Chris D; Allen, Michael S; McCollum, James M; Dar, Roy D; Karig, David K; Cooke, John F

    2009-01-01

    Noise biology focuses on the sources, processing, and biological consequences of the inherent stochastic fluctuations in molecular transitions or interactions that control cellular behavior. These fluctuations are especially pronounced in small systems where the magnitudes of the fluctuations approach or exceed the mean value of the molecular population. Noise biology is an essential component of nanomedicine where the communication of information is across a boundary that separates small synthetic and biological systems that are bound by their size to reside in environments of large fluctuations. Here we review the fundamentals of the computational, analytical, and experimental approaches to noise biology. We review results that show that the competition between the benefits of low noise and those of low population has resulted in the evolution of genetic system architectures that produce an uneven distribution of stochasticity across the molecular components of cells and, in some cases, use noise to drive biological function. We review the exact and approximate approaches to gene circuit noise analysis and simulation, and review many of the key experimental results obtained using flow cytometry and time-lapse fluorescent microscopy. In addition, we consider the probative value of noise with a discussion of using measured noise properties to elucidate the structure and function of the underlying gene circuit. We conclude with a discussion of the frontiers of and significant future challenges for noise biology. (c) 2009 John Wiley & Sons, Inc.

  7. Universal programmable logic gate and routing method

    Science.gov (United States)

    Fijany, Amir (Inventor); Vatan, Farrokh (Inventor); Akarvardar, Kerem (Inventor); Blalock, Benjamin (Inventor); Chen, Suheng (Inventor); Cristoloveanu, Sorin (Inventor); Kolawa, Elzbieta (Inventor); Mojarradi, Mohammad M. (Inventor); Toomarian, Nikzad (Inventor)

    2009-01-01

    An universal and programmable logic gate based on G.sup.4-FET technology is disclosed, leading to the design of more efficient logic circuits. A new full adder design based on the G.sup.4-FET is also presented. The G.sup.4-FET can also function as a unique router device offering coplanar crossing of signal paths that are isolated and perpendicular to one another. This has the potential of overcoming major limitations in VLSI design where complex interconnection schemes have become increasingly problematic.

  8. A Chaotic Attractor in Delayed Memristive System

    Directory of Open Access Journals (Sweden)

    Lidan Wang

    2012-01-01

    Full Text Available Over the last three decades, theoretical design and circuitry implementation of various chaotic generators by simple electronic circuits have been a key subject of nonlinear science. In 2008, the successful development of memristor brings new activity for this research. Memristor is a new nanometre-scale passive circuit element, which possesses memory and nonlinear characteristics. This makes it have a unique charm to attract many researchers’ interests. In this paper, memristor, for the first time, is introduced in a delayed system to design a signal generator to produce chaotic behaviour. By replacing the nonlinear function with memristors in parallel, the memristor oscillator exhibits a chaotic attractor. The simulated results demonstrate that the performance is well predicted by the mathematical analysis and supports the viability of the design.

  9. A new time discrimination circuit for the 3D imaging Lidar

    Science.gov (United States)

    Hu, Chunsheng; Huang, Zongsheng; Qin, Shiqiao; Wang, Xingshu

    2012-10-01

    In order to enhance the time discrimination precision in the 3D imaging lidar, we propose a new time discrimination circuit, which improves both the delayer and the attenuator in the previous CFD (Constant Fraction Discriminator) circuit. The proposed circuit mainly includes a delayer, a low-pass filter, and a comparator. The delayer is implemented with a series of inductors and capacitors, which has some advantages: low signal distortion, small volume, easy adjustment, etc. The low-pass filter attenuates the signal amplitude and broadens the signal width, as well as reduces the noise by decreasing the equivalent noise bandwidth, and increases the signal slope at the discrimination time. Therefore, the time discrimination error is reduced significantly. This paper introduces the proposed circuit in detail, carries out a theoretical analysis for the noise and time discrimination error in the proposed circuit and compares them with the previous CFD circuit. The comparison results show that the proposed circuit can reduce the time discrimination error by about 50% under the same noise level. In addition, some experiments have been carried out to test the performances of the circuit. The experiments show that the time delay of the circuit is about 14ns, the time discrimination error is less than 150 ps when the voltage SNR ranges from 18.2 to 81.8, and the time discrimination error is less than 100 ps when the signal amplitude ranges from 0.2 V to 1.86 V. The tested time discrimination error is well in accordance with the theoretical calculation.

  10. Arithmetic circuits for DSP applications

    CERN Document Server

    Stouraitis, Thanos

    2017-01-01

    Arithmetic Circuits for DSP Applications is a complete resource on arithmetic circuits for digital signal processing (DSP). It covers the key concepts, designs and developments of different types of arithmetic circuits, which can be used for improving the efficiency of implementation of a multitude of DSP applications. Each chapter includes various applications of the respective class of arithmetic circuits along with information on the future scope of research. Written for students, engineers, and researchers in electrical and computer engineering, this comprehensive text offers a clear understanding of different types of arithmetic circuits used for digital signal processing applications. The text includes contributions from noted researchers on a wide range of topics, including a review o circuits used in implementing basic operations like additions and multiplications; distributed arithmetic as a technique for the multiplier-less implementation of inner products for DSP applications; discussions on look ...

  11. Integrated circuit cooled turbine blade

    Energy Technology Data Exchange (ETDEWEB)

    Lee, Ching-Pang; Jiang, Nan; Um, Jae Y.; Holloman, Harry; Koester, Steven

    2017-08-29

    A turbine rotor blade includes at least two integrated cooling circuits that are formed within the blade that include a leading edge circuit having a first cavity and a second cavity and a trailing edge circuit that includes at least a third cavity located aft of the second cavity. The trailing edge circuit flows aft with at least two substantially 180-degree turns at the tip end and the root end of the blade providing at least a penultimate cavity and a last cavity. The last cavity is located along a trailing edge of the blade. A tip axial cooling channel connects to the first cavity of the leading edge circuit and the penultimate cavity of the trailing edge circuit. At least one crossover hole connects the penultimate cavity to the last cavity substantially near the tip end of the blade.

  12. Automated Design of Quantum Circuits

    Science.gov (United States)

    Williams, Colin P.; Gray, Alexander G.

    2000-01-01

    In order to design a quantum circuit that performs a desired quantum computation, it is necessary to find a decomposition of the unitary matrix that represents that computation in terms of a sequence of quantum gate operations. To date, such designs have either been found by hand or by exhaustive enumeration of all possible circuit topologies. In this paper we propose an automated approach to quantum circuit design using search heuristics based on principles abstracted from evolutionary genetics, i.e. using a genetic programming algorithm adapted specially for this problem. We demonstrate the method on the task of discovering quantum circuit designs for quantum teleportation. We show that to find a given known circuit design (one which was hand-crafted by a human), the method considers roughly an order of magnitude fewer designs than naive enumeration. In addition, the method finds novel circuit designs superior to those previously known.

  13. Delays in thick targets

    CERN Document Server

    Bennett, J R J

    2002-01-01

    The delays in the emission of radioactive particles from a thick target bombarded by high-energy protons is discussed in relation to the basic physical processes of diffusion and effusion through the target and ioniser. The delay time, relative to the decay time, is crucial to the efficiency of particle release at the exit of the ioniser. The principles of minimizing the delay times are discussed with reference to a mathematical model of the process, and some experimental examples are given.

  14. Delayed orgasm and anorgasmia.

    Science.gov (United States)

    Jenkins, Lawrence C; Mulhall, John P

    2015-11-01

    Delayed orgasm/anorgasmia defined as the persistent or recurrent difficulty, delay in, or absence of attaining orgasm after sufficient sexual stimulation, which causes personal distress. Delayed orgasm and anorgasmia are associated with significant sexual dissatisfaction. A focused medical history can shed light on the potential etiologies, which include medications, penile sensation loss, endocrinopathies, penile hyperstimulation, and psychological etiologies. Unfortunately, there are no excellent pharmacotherapies for delayed orgasm/anorgasmia, and treatment revolves largely around addressing potential causative factors and psychotherapy. Copyright © 2015 American Society for Reproductive Medicine. Published by Elsevier Inc. All rights reserved.

  15. On modeling the digital gate delay under process variation

    Science.gov (United States)

    Mingzhi, Gao; Zuochang, Ye; Yan, Wang; Zhiping, Yu

    2011-07-01

    To achieve a characterization method for the gate delay library used in block based statistical static timing analysis with neither unacceptably poor accuracy nor forbiddingly high cost, we found that general-purpose gate delay models are useful as intermediaries between the circuit simulation data and the gate delay models in required forms. In this work, two gate delay models for process variation considering different driving and loading conditions are proposed. From the testing results, these two models, especially the one that combines effective dimension reduction (EDR) from statistics society with comprehensive gate delay models, offer good accuracy with low characterization cost, and they are thus competent for use in statistical timing analysis (SSTA). In addition, these two models have their own value in other SSTA techniques.

  16. Reversible Squaring Circuit for Low Power Digital Signal Processing

    Directory of Open Access Journals (Sweden)

    Pradeep Singla

    2014-06-01

    Full Text Available With the high demand of low power digital systems, energy dissipation in the digital system is one of the limiting factors. Reversible logic is one of the alternate to reduce heat/energy dissipation in the digital circuits and have a very significant importance in bioinformatics, optical information processing, CMOS design etc. In this paper the authors propose the design of new 2- bit binary Squaring circuit used in most of the digital signal processing hardware using Feynman & MUX gate. The proposed squaring circuit having less garbage outputs, constant inputs, Quantum cost and Total logical calculation i.e. less delay as compared to the traditional method of squaring operation by reversible multiplier. The simulating results and quantized results are also shown in the paper which shows the greatest improvement in the design against the previous methodology.

  17. Synthetic biology: integrated gene circuits.

    Science.gov (United States)

    Nandagopal, Nagarajan; Elowitz, Michael B

    2011-09-02

    A major goal of synthetic biology is to develop a deeper understanding of biological design principles from the bottom up, by building circuits and studying their behavior in cells. Investigators initially sought to design circuits "from scratch" that functioned as independently as possible from the underlying cellular system. More recently, researchers have begun to develop a new generation of synthetic circuits that integrate more closely with endogenous cellular processes. These approaches are providing fundamental insights into the regulatory architecture, dynamics, and evolution of genetic circuits and enabling new levels of control across diverse biological systems.

  18. Unstable oscillators based hyperchaotic circuit

    DEFF Research Database (Denmark)

    Murali, K.; Tamasevicius, A.; G. Mykolaitis, A.

    1999-01-01

    A simple 4th order hyperchaotic circuit with unstable oscillators is described. The circuit contains two negative impedance converters, two inductors, two capacitors, a linear resistor and a diode. The Lyapunov exponents are presented to confirm hyperchaotic nature of the oscillations in the circ......A simple 4th order hyperchaotic circuit with unstable oscillators is described. The circuit contains two negative impedance converters, two inductors, two capacitors, a linear resistor and a diode. The Lyapunov exponents are presented to confirm hyperchaotic nature of the oscillations...

  19. Revaporisation of fission product deposits in the primary circuit and its impact on accident source term

    OpenAIRE

    Bottomley, P.D.W.; Knebel, K.; Van Winckel, S.; Haste, T.; Souvi, S.M.O.; Auvinen, A; Kalilainen, J.; Kärkelä, T.

    2014-01-01

    Chemical revaporisation or physical resuspension of fission product deposits from the primary circuit is now recognised to be a major source term in the late phase of severe fuel degradation in a severe nuclear accident. These results come from tests carried out under different experimental projects in the European Commission (EC) Framework Programmes. These include the revaporisation tests carried out at the Transuranium Institute (ITU), Karlsruhe under the Fourth Framework Programme, the Ph...

  20. Delay-insensitive Multi-ring Structures

    DEFF Research Database (Denmark)

    Sparsø, Jens; Staunstrup, Jørgen

    1993-01-01

    This paper describes a set of simple design and performance analysis techniques that have been successfully used to design a number of non-trivial delay-insensitive circuits. Examples are building blocks for digital filters and a vector multiplier using a serial-parallel multiply and accumulate...... algorithm. The vector multiplier has been laid out, submitted for fabrication, and successfully tested. This design is described in detail to illustrate the design and the performance analysis techniques. The design technique is based on a data flow approach using pipelines and rings that are composed...

  1. Memristor Circuits and Systems

    KAUST Repository

    Zidan, Mohammed A.

    2015-05-01

    Current CMOS-based technologies are facing design challenges related to the continuous scaling down of the minimum feature size, according to Moore’s law. Moreover, conventional computing architecture is no longer an effective way of fulfilling modern applications demands, such as big data analysis, pattern recognition, and vector processing. Therefore, there is an exigent need to shift to new technologies, at both the architecture and the device levels. Recently, memristor devices and structures attracted attention for being promising candidates for this job. Memristor device adds a new dimension for designing novel circuits and systems. In addition, high-density memristor-based crossbar is widely considered to be the essential element for future memory and bio-inspired computing systems. However, numerous challenges need to be addressed before the memristor genuinely replaces current memory and computing technologies, which is the motivation behind this research effort. In order to address the technology challenges, we begin by fabricating and modeling the memristor device. The devices fabricated at our local clean room enriched our understanding of the memristive phenomenon and enabled the experimental testing for our memristor-based circuits. Moreover, our proposed mathematical modeling for memristor behavior is an essential element for the theoretical circuit design stage. Designing and addressing the challenges of memristor systems with practical complexity, however, requires an extra step, which takes the form of a reliable and modular simulation platform. We, therefore, built a new simulation platform for the resistive crossbar, which can simulate realistic size arrays filled with real memory data. In addition, this simulation platform includes various crossbar nonidealities in order to obtain accurate simulation results. Consequently, we were able to address the significant challenges facing the high density memristor crossbar, as the building block for

  2. A dishwasher for circuits

    CERN Multimedia

    Rosaria Marraffino

    2014-01-01

    You have always been told that electronic devices fear water. However, at the Surface Mount Devices (SMD) Workshop here at CERN all the electronic assemblies are cleaned with a machine that looks like a… dishwasher.   The circuit dishwasher. Credit: Clara Nellist.  If you think the image above shows a dishwasher, you wouldn’t be completely wrong. Apart from the fact that the whole pumping system and the case itself are made entirely from stainless steel and chemical resistant materials, and the fact that it washes electrical boards instead of dishes… it works exactly like a dishwasher. It’s a professional machine (mainly used in the pharmaceutical industry) designed to clean everything that can be washed with a water-based chemical soap. This type of treatment increases the lifetime of the electronic boards and therefore the LHC's reliability by preventing corrosion problems in the severe radiation and ozone environment of the LHC tunn...

  3. Modeling cortical circuits.

    Energy Technology Data Exchange (ETDEWEB)

    Rohrer, Brandon Robinson; Rothganger, Fredrick H.; Verzi, Stephen J.; Xavier, Patrick Gordon

    2010-09-01

    The neocortex is perhaps the highest region of the human brain, where audio and visual perception takes place along with many important cognitive functions. An important research goal is to describe the mechanisms implemented by the neocortex. There is an apparent regularity in the structure of the neocortex [Brodmann 1909, Mountcastle 1957] which may help simplify this task. The work reported here addresses the problem of how to describe the putative repeated units ('cortical circuits') in a manner that is easily understood and manipulated, with the long-term goal of developing a mathematical and algorithmic description of their function. The approach is to reduce each algorithm to an enhanced perceptron-like structure and describe its computation using difference equations. We organize this algorithmic processing into larger structures based on physiological observations, and implement key modeling concepts in software which runs on parallel computing hardware.

  4. Basic electronic circuits

    CERN Document Server

    Buckley, P M

    1980-01-01

    In the past, the teaching of electricity and electronics has more often than not been carried out from a theoretical and often highly academic standpoint. Fundamentals and basic concepts have often been presented with no indication of their practical appli­ cations, and all too frequently they have been illustrated by artificially contrived laboratory experiments bearing little relationship to the outside world. The course comes in the form of fourteen fairly open-ended constructional experiments or projects. Each experiment has associated with it a construction exercise and an explanation. The basic idea behind this dual presentation is that the student can embark on each circuit following only the briefest possible instructions and that an open-ended approach is thereby not prejudiced by an initial lengthy encounter with the theory behind the project; this being a sure way to dampen enthusiasm at the outset. As the investigation progresses, questions inevitably arise. Descriptions of the phenomena encounte...

  5. Noise distribution of a peak track and hold circuit

    Science.gov (United States)

    Seller, Paul; Hardie, Alec L.; Morrissey, Quentin

    2012-12-01

    Noise in linear electronic circuits is well characterised in terms of power spectral density in the frequency domain and the Normal probability density function in the time domain. For instance a charge preamplifier followed by a simple time independent pulse shaping circuit produces an output with a predictable, easily calculated Normal density function. By the Ergodic Principle this is true if the signal is sampled randomly in time or the experiment is run many times and measured at a fixed time after the circuit is released from reset. Apart from well defined cases, the time of the sample after release of reset does not affect the density function. If this signal is then passed through a peak track-and-hold circuit the situation is very different. The probability density function of the sampled signal is no longer Normal and the function changes with the time of the sample after release of reset. This density function can be classified by the Gumbel probability density function which characterises the Extreme Value Distribution of a defined number of Normally distributed values. The number of peaks in the signal is an important factor in the analysis. This issue is analysed theoretically and compared with a time domain noise simulation programme. This is then related to a real electronic circuit used for low-noise X-ray measurements and shows how the low-energy resolution of this system is significantly degraded when using a peak track-and-hold.

  6. American Dream Delayed

    DEFF Research Database (Denmark)

    Khorunzhina, Natalia; Miller, Robert A.

    This paper investigates the delay in homeownership and a subsequent reduction in homeownership rate observed over the past decades. We focus on the delay in giving birth to children and increased labor market participation as contributing factors to homeownership dynamics for prime-age female hou...

  7. SOTB Implementation of a Field Programmable Gate Array with Fine-Grained Vt Programmability

    Directory of Open Access Journals (Sweden)

    Masakazu Hioki

    2014-07-01

    Full Text Available Field programmable gate arrays (FPGAs are one of the most widespread reconfigurable devices in which various functions can be implemented by storing circuit connection information and logic values into configuration memories. One of the most important issues in the modern FPGA is the reduction of its static leakage power consumption. Flex Power FPGA, which has been proposed to overcome this problem, uses a body biasing technique to implement the fine-grained threshold voltage (Vt programmability in the FPGA. A low-Vt state can be assigned only to the component circuits along the critical path of the application design mapped on the FPGA, so that the static leakage power consumption can be reduced drastically. Flex Power FPGA is an important application target for the SOTB (silicon on thin buried oxide device, which features a wide-range body biasing ability and the high sensitivity of Vt variation by body biasing, resulting in a drastic subthreshold leakage current reduction caused by static leakage power. In this paper, the Flex Power FPGA test chip is fabricated in SOTB technology, and the functional test and performance evaluation of a mapped 32-bit binary counter circuit are performed successfully. As a result, a three orders of magnitude static leakage reduction with a bias range of 2.1 V demonstrates the excellent Vt controllability of the SOTB transistors, and the 1.2 V bias difference achieves a 50× leakage reduction without degrading speed.

  8. Performance Analysis of Modified Drain Gating Techniques for Low Power and High Speed Arithmetic Circuits

    Directory of Open Access Journals (Sweden)

    Shikha Panwar

    2014-01-01

    Full Text Available This paper presents several high performance and low power techniques for CMOS circuits. In these design methodologies, drain gating technique and its variations are modified by adding an additional NMOS sleep transistor at the output node which helps in faster discharge and thereby providing higher speed. In order to achieve high performance, the proposed design techniques trade power for performance in the delay critical sections of the circuit. Intensive simulations are performed using Cadence Virtuoso in a 45 nm standard CMOS technology at room temperature with supply voltage of 1.2 V. Comparative analysis of the present circuits with standard CMOS circuits shows smaller propagation delay and lesser power consumption.

  9. Analog Module Architecture for Space-Qualified Field-Programmable Mixed-Signal Arrays

    Science.gov (United States)

    Edwards, R. Timothy; Strohbehn, Kim; Jaskulek, Steven E.; Katz, Richard

    1999-01-01

    Spacecraft require all manner of both digital and analog circuits. Onboard digital systems are constructed almost exclusively from field-programmable gate array (FPGA) circuits providing numerous advantages over discrete design including high integration density, high reliability, fast turn-around design cycle time, lower mass, volume, and power consumption, and lower parts acquisition and flight qualification costs. Analog and mixed-signal circuits perform tasks ranging from housekeeping to signal conditioning and processing. These circuits are painstakingly designed and built using discrete components due to a lack of options for field-programmability. FPAA (Field-Programmable Analog Array) and FPMA (Field-Programmable Mixed-signal Array) parts exist but not in radiation-tolerant technology and not necessarily in an architecture optimal for the design of analog circuits for spaceflight applications. This paper outlines an architecture proposed for an FPAA fabricated in an existing commercial digital CMOS process used to make radiation-tolerant antifuse-based FPGA devices. The primary concerns are the impact of the technology and the overall array architecture on the flexibility of programming, the bandwidth available for high-speed analog circuits, and the accuracy of the components for high-performance applications.

  10. Digital circuits using universal logic gates

    Science.gov (United States)

    Whitaker, Sterling R. (Inventor); Miles, Lowell H. (Inventor); Cameron, Eric G. (Inventor); Donohoe, Gregory W. (Inventor); Gambles, Jody W. (Inventor)

    2004-01-01

    According to the invention, a digital circuit design embodied in at least one of a structural netlist, a behavioral netlist, a hardware description language netlist, a full-custom ASIC, a semi-custom ASIC, an IP core, an integrated circuit, a hybrid of chips, one or more masks, a FPGA, and a circuit card assembly is disclosed. The digital circuit design includes first and second sub-circuits. The first sub-circuits comprise a first percentage of the digital circuit design and the second sub-circuits comprise a second percentage of the digital circuit design. Each of the second sub-circuits is substantially comprised of one or more kernel circuits. The kernel circuits are comprised of selection circuits. The second percentage is at least 5%. In various embodiments, the second percentage could be at least 10%, 20%, 30%, 40%, 50%, 60%, 70%, 80%, 90%, or 95%.

  11. Enhancement of Linear Circuit Program

    DEFF Research Database (Denmark)

    Gaunholt, Hans; Dabu, Mihaela; Beldiman, Octavian

    1996-01-01

    In this report a preliminary user friendly interface has been added to the LCP2 program making it possible to describe an electronic circuit by actually drawing the circuit on the screen. Component values and other options and parameters can easily be set by the aid of the interface. The interface...

  12. Compact Circuit Preprocesses Accelerometer Output

    Science.gov (United States)

    Bozeman, Richard J., Jr.

    1993-01-01

    Compact electronic circuit transfers dc power to, and preprocesses ac output of, accelerometer and associated preamplifier. Incorporated into accelerometer case during initial fabrication or retrofit onto commercial accelerometer. Made of commercial integrated circuits and other conventional components; made smaller by use of micrologic and surface-mount technology.

  13. Comminution circuits for compact itabirites

    Directory of Open Access Journals (Sweden)

    Pedro Ferreira Pinto

    Full Text Available Abstract In the beneficiation of compact Itabirites, crushing and grinding account for major operational and capital costs. As such, the study and development of comminution circuits have a fundamental importance for feasibility and optimization of compact Itabirite beneficiation. This work makes a comparison between comminution circuits for compact Itabirites from the Iron Quadrangle. The circuits developed are: a crushing and ball mill circuit (CB, a SAG mill and ball mill circuit (SAB and a single stage SAG mill circuit (SSSAG. For the SAB circuit, the use of pebble crushing is analyzed (SABC. An industrial circuit for 25 million tons of run of mine was developed for each route from tests on a pilot scale (grinding and industrial scale. The energy consumption obtained for grinding in the pilot tests was compared with that reported by Donda and Bond. The SSSAG route had the lowest energy consumption, 11.8kWh/t and the SAB route had the highest energy consumption, 15.8kWh/t. The CB and SABC routes had a similar energy consumption of 14.4 kWh/t and 14.5 kWh/t respectively.

  14. High performance integer arithmetic circuit design on FPGA architecture, implementation and design automation

    CERN Document Server

    Palchaudhuri, Ayan

    2016-01-01

    This book describes the optimized implementations of several arithmetic datapath, controlpath and pseudorandom sequence generator circuits for realization of high performance arithmetic circuits targeted towards a specific family of the high-end Field Programmable Gate Arrays (FPGAs). It explores regular, modular, cascadable, and bit-sliced architectures of these circuits, by directly instantiating the target FPGA-specific primitives in the HDL. Every proposed architecture is justified with detailed mathematical analyses. Simultaneously, constrained placement of the circuit building blocks is performed, by placing the logically related hardware primitives in close proximity to one another by supplying relevant placement constraints in the Xilinx proprietary “User Constraints File”. The book covers the implementation of a GUI-based CAD tool named FlexiCore integrated with the Xilinx Integrated Software Environment (ISE) for design automation of platform-specific high-performance arithmetic circuits from us...

  15. REHABILITATION PRACTICAL PROGRAMME

    Directory of Open Access Journals (Sweden)

    Suzana KRANJC JOLDIKJ

    Full Text Available Centre for Education and Rehabilitation of Physi­cally Handicapped Children and Adolescents Kamnik (Zavod za usposabljanje invalidne mlad­ine Kamnik; hereinafter: ZUIM perform verified or state-ap­proved programme the Rehabilitation practical pro­gramme. The programme is intended for all those young people, who have completed primary school education, but cannot continue regular schooling in secondary school pro­grammes. The programme con­sists of several equivalent parts: education, practical work, train­ing work, health, therapeutic, psychologi­cal, and other activities. For every beginner in the first month of education members of the operative team create an individualized programme, which in­cludes individualized school work, individualized training programme, and other expert activities. The programme can last for 6 years maximum, it can however be completed earlier, when the op­erative team feels the training is no longer neces­sary. Pro­gress of a young person is what matters the most, and if there is no progress, the training is brought to an end. Training of young people in the Rehabilitation practical programme is only the be­ginning. The country will have to start considering social enter­prises, which are found elsewhere in the world, for example in Scandinavian countries and in the USA.

  16. MOS Current Mode Logic Near Threshold Circuits

    Directory of Open Access Journals (Sweden)

    Alexander Shapiro

    2014-06-01

    Full Text Available Near threshold circuits (NTC are an attractive and promising technology that provides significant power savings with some delay penalty. The combination of NTC technology with MOS current mode logic (MCML is examined in this work. By combining MCML with NTC, the constant power consumption of MCML is reduced to leakage power levels that can be tolerated in certain modern applications. Additionally, the speed of NTC is improved due to the high speed nature of MCML technology. A 14 nm Fin field effect transistor (FinFET technology is used to evaluate these combined circuit techniques. A 32-bit Kogge Stone adder is chosen as a demonstration vehicle for feasibility analysis. MCML with NTC is shown to yield enhanced power efficiency when operated above 1 GHz with a 100% activity factor as compared to standard CMOS. MCML with NTC is more power efficient than standard CMOS beyond 9 GHz over a wide range of activity factors. MCML with NTC also exhibits significantly lower noise levels as compared to standard CMOS. The results of the analysis demonstrate that pairing NTC and MCML is efficient when operating at high frequencies and activity factors.

  17. Wavy Channel TFT-Based Digital Circuits

    KAUST Repository

    Hanna, Amir

    2016-02-23

    We report a wavy channel (WC) architecture thin-film transistor-based digital circuitry using ZnO as a channel material. The novel architecture allows for extending device width by integrating vertical finlike substrate corrugations giving rise to 50% larger device width, without occupying extra chip area. The enhancement in the output drive current is 100%, when compared with conventional planar architecture for devices occupying the same chip area. The current increase is attributed to both the extra device width and 50% enhancement in field-effect mobility due to electrostatic gating effects. Fabricated inverters show that WC inverters can achieve two times the peak-to-peak output voltage for the same input when compared with planar devices. In addition, WC inverters show 30% faster rise and fall times, and can operate up to around two times frequency of the planar inverters for the same peak-to-peak output voltage. WC NOR circuits have shown 70% higher peak-to-peak output voltage, over their planar counterparts, and WC pass transistor logic multiplexer circuit has shown more than five times faster high-to-low propagation delay compared with its planar counterpart at a similar peak-to-peak output voltage.

  18. Design Failures in Aerospace Electrical Systems(The Identification of Sneak Circuits

    Directory of Open Access Journals (Sweden)

    C. Goodchild

    2000-01-01

    Full Text Available The malfunction or failure of an aircraft electrical system because signal or power flow paths were unintentionally designed into the electrical circuit, is known to be the cause of several major failures of engineering systems. These unintentional signal or power paths are called sneak circuits. The nature of Sneak Circuits was first considered after they had been identified as the cause of some spectacular and expensive rocket failures in the United States space programme. This paper reviews the status of Sneak Circuit Analysis (SCA and presents a general systematic approach the author has devised to identify sneak circuits during the circuits design phase. The application of the method of SCA is illustrated with a case study. The paper makes a case to take the investigation of an electrical failure or malfunction beyond the identification of a failed component to include a search for possible sneak circuits. The obvious fact that could result from the discovery of a sneak circuit is the shift in legal responsibility from the component manufacturer to the circuit designer.

  19. 1000-V, 300-ps pulse-generation circuit using silicon avalanche devices

    Science.gov (United States)

    Benzel, D. M.; Pocha, M. D.

    1985-07-01

    A Marx configured avalanche transistor string and a pulse rise-time peaking diode are used to generate pulses of >1000 V into a 50-Ω load with rise times of less than 300 ps. The trigger delay of this circuit is about 7-10 ns, with jitter <100 ps. This circuit has been used to generate pulses at a repetition rate up to 5 kHz.

  20. Photodiode circuits for retinal prostheses.

    Science.gov (United States)

    Loudin, J D; Cogan, S F; Mathieson, K; Sher, A; Palanker, D V

    2011-10-01

    Photodiode circuits show promise for the development of high-resolution retinal prostheses. While several of these systems have been constructed and some even implanted in humans, existing descriptions of the complex optoelectronic interaction between light, photodiode, and the electrode/electrolyte load are limited. This study examines this interaction in depth with theoretical calculations and experimental measurements. Actively biased photoconductive and passive photovoltaic circuits are investigated, with the photovoltaic circuits consisting of one or more diodes connected in series, and the photoconductive circuits consisting of a single diode in series with a pulsed bias voltage. Circuit behavior and charge injection levels were markedly different for platinum and sputtered iridium-oxide film (SIROF) electrodes. Photovoltaic circuits were able to deliver 0.038 mC/cm(2) (0.75 nC/phase) per photodiode with 50- μm platinum electrodes, and 0.54-mC/cm(2) (11 nC/phase) per photodiode with 50-μ m SIROF electrodes driven with 0.5-ms pulses of light at 25 Hz. The same pulses applied to photoconductive circuits with the same electrodes were able to deliver charge injections as high as 0.38 and 7.6 mC/cm(2) (7.5 and 150 nC/phase), respectively. We demonstrate photovoltaic stimulation of rabbit retina in-vitro, with 0.5-ms pulses of 905-nm light using peak irradiance of 1 mW/mm(2). Based on the experimental data, we derive electrochemical and optical safety limits for pixel density and charge injection in various circuits. While photoconductive circuits offer smaller pixels, photovoltaic systems do not require an external bias voltage. Both classes of circuits show promise for the development of high-resolution optoelectronic retinal prostheses.

  1. Why do medical trainees take time out of their specialty training programmes?

    Science.gov (United States)

    Agius, Steven J; Tack, Gurinder; Murphy, Philip; Holmes, Stuart; Hayden, Jacky

    2014-10-01

    Postgraduate medical trainees may take time out of programme for personal or professional reasons which can delay completion of training. This survey of out of programme trainees in England explores a phenomenon that impacts significantly upon medical careers and workforce planning.

  2. Delay Choice vs. Delay Maintenance: Different Measures of Delayed Gratification in Capuchin Monkeys (Cebus apella)

    OpenAIRE

    Addessi, Elsa; Paglieri, Fabio; Beran, Michael J.; Evans, Theodore A.; Macchitella, Luigi; De Petrillo, Francesca; Focaroli, Valentina

    2013-01-01

    Delaying gratification involves two components: (i) delay choice (selecting a delayed reward over an immediate one), and (ii) delay maintenance (sustaining the decision to delay gratification even if the immediate reward is available during the delay). In primates, two tasks most commonly have explored these components, the Intertemporal choice task and the Accumulation task. It is unclear whether these tasks provide equivalent measures of delay of gratification. Here, we compared the perform...

  3. Greek Teachers Programme 2015

    CERN Multimedia

    Hoch, Michael

    2015-01-01

    The 3rd edition of this year's Greek Teachers Programme was co-organized by CERN Education Group and the Hellenic Physical Society and took place from 8 to 12 November 2015. The programme targets physics high-school teachers from all over Greece. It aims to help teachers inspire the next generation of scientists and engineers by motivating their students to understand and appreciate how science works at the world's largest physics laboratory, whereby increasing their interest in pursuing studies in STEM fields in secondary and post-secondary education. 33 teachers took part in this programme which comprised lectures by Greek members of the CERN scientific community, with visits to experimental facilities, hands-on activities and dedicated sessions on effective and creative ways through which participants may bring physics, particle physics and CERN closer to their school classroom. In 2015, more than 100 teachers took part in the three editions of the Greek Teachers Programme.

  4. The VIDA programme

    DEFF Research Database (Denmark)

    Jensen, Bente; Iannone, Rosa Lisa

    This case study describes the VIDA programme (knowledge-based efforts for socially disadvantaged children in daycare), an innovative professional development programme for those working with 3-6-year-old children in Denmark. The case study is part of WP3’s work on ‘Professional Development: Impact...... and Innovation’ within the project ‘Curriculum Quality Analysis and Impact Review of European Education and Care’ (CARE). The programme at the centre of this case builds on theory drawn from research on child development, social disadvantage related to issues of social inequality, and research on organisational...... programme period (2010-2013) and beyond?; 2) What is the impact of the VIDA approach to professional development on i) educators’ practices regarding high quality ECEC (output), ii) child outcomes (outcome), and iii) improved practice at the municipal level (impact in a broader sense)?; and 3) Which factors...

  5. Elukestva õppe programm : Erasmus+

    Index Scriptorium Estoniae

    2014-01-01

    Erasmus+ programm liidab senised koostööprogrammid „Euroopa elukestva õppe programm“, „Euroopa Noored“ ning Euroopa komisjoni rahvusvahelised kõrgharidusprogrammid. Elukestva õppe programmi 2013 kokkuvõte

  6. SPIC Undergraduate Programme

    Indian Academy of Sciences (India)

    Home; Journals; Resonance – Journal of Science Education; Volume 3; Issue 12. SPIC Undergraduate Programme. P K Subrahmanyam. Information and Announcements Volume 3 Issue 12 December 1998 pp 108-110. Fulltext. Click here to view fulltext PDF. Permanent link:

  7. Variational integrators for electric circuits

    Energy Technology Data Exchange (ETDEWEB)

    Ober-Blöbaum, Sina, E-mail: sinaob@math.upb.de [Computational Dynamics and Optimal Control, University of Paderborn (Germany); Tao, Molei [Courant Institute of Mathematical Sciences, New York University (United States); Cheng, Mulin [Applied and Computational Mathematics, California Institute of Technology (United States); Owhadi, Houman; Marsden, Jerrold E. [Control and Dynamical Systems, California Institute of Technology (United States); Applied and Computational Mathematics, California Institute of Technology (United States)

    2013-06-01

    In this contribution, we develop a variational integrator for the simulation of (stochastic and multiscale) electric circuits. When considering the dynamics of an electric circuit, one is faced with three special situations: 1. The system involves external (control) forcing through external (controlled) voltage sources and resistors. 2. The system is constrained via the Kirchhoff current (KCL) and voltage laws (KVL). 3. The Lagrangian is degenerate. Based on a geometric setting, an appropriate variational formulation is presented to model the circuit from which the equations of motion are derived. A time-discrete variational formulation provides an iteration scheme for the simulation of the electric circuit. Dependent on the discretization, the intrinsic degeneracy of the system can be canceled for the discrete variational scheme. In this way, a variational integrator is constructed that gains several advantages compared to standard integration tools for circuits; in particular, a comparison to BDF methods (which are usually the method of choice for the simulation of electric circuits) shows that even for simple LCR circuits, a better energy behavior and frequency spectrum preservation can be observed using the developed variational integrator.

  8. Experimental Device for Learning of Logical Circuit Design using Integrated Circuits

    OpenAIRE

    石橋, 孝昭

    2012-01-01

    This paper presents an experimental device for learning of logical circuit design using integrated circuits and breadboards. The experimental device can be made at a low cost and can be used for many subjects such as logical circuits, computer engineering, basic electricity, electrical circuits and electronic circuits. The proposed device is effective to learn the logical circuits than the usual lecture.

  9. 30 CFR 77.800 - High-voltage circuits; circuit breakers.

    Science.gov (United States)

    2010-07-01

    ... 30 Mineral Resources 1 2010-07-01 2010-07-01 false High-voltage circuits; circuit breakers. 77.800... COAL MINES Surface High-Voltage Distribution § 77.800 High-voltage circuits; circuit breakers. High-voltage circuits supplying power to portable or mobile equipment shall be protected by suitable circuit...

  10. Motivation programmes of organizations

    OpenAIRE

    Pízová, Tereza

    2008-01-01

    The Bachelor Thesis "'Motivation Programmes of Organizations" focuses on an extremely important area within personnel management. Employee motivation is crucial to the effective operation of businesses. Motivation programmes assist in increasing and maintaining employee motivation and demonstrate an organization's interest in its employees. This piece is on one hand concerned with theoretical foundations of motivation, describing theories and concepts important to the area of human behaviour ...

  11. The Gold Standard Programme

    DEFF Research Database (Denmark)

    Neumann, Tim; Rasmussen, Mette; Ghith, Nermin

    2013-01-01

    To evaluate the real-life effect of an evidence-based Gold Standard Programme (GSP) for smoking cessation interventions in disadvantaged patients and to identify modifiable factors that consistently produce the highest abstinence rates.......To evaluate the real-life effect of an evidence-based Gold Standard Programme (GSP) for smoking cessation interventions in disadvantaged patients and to identify modifiable factors that consistently produce the highest abstinence rates....

  12. Delayed Puberty (For Teens)

    Science.gov (United States)

    ... developed later than usual, too. This is called constitutional delay (or being a late bloomer), and it ... eventually — and even when you believe they're right — it's difficult to wait for something that can ...

  13. Delayed Sequence Intubation

    DEFF Research Database (Denmark)

    Weingart, Scott D; Trueger, N Seth; Wong, Nelson

    2015-01-01

    , patients were paralyzed and intubated. The primary outcome of this study was the difference in oxygen saturations after maximal attempts at preoxygenation before delayed sequence intubation compared with saturations just before intubation. Predetermined secondary outcomes and complications were also...... assessed. RESULTS: A total of 62 patients were enrolled: 19 patients required delayed sequence intubation to allow nonrebreather mask, 39 patients required it to allow NIPPV, and 4 patients required it for nasogastric tube placement. Saturations increased from a mean of 89.9% before delayed sequence...... intubation to 98.8% afterward, with an increase of 8.9% (95% confidence interval 6.4% to 10.9%). Thirty-two patients were in a predetermined group with high potential for critical desaturation (pre-delayed sequence intubation saturations ≤93%). All of these patients increased their saturations post...

  14. Delayed puberty in boys

    Science.gov (United States)

    ... Allan CA, McLachlan RI. Androgen deficiency disorders. In: Jameson JL, De Groot LJ, de Kretser DM, et ... 350. Haddad NG, Eugster EA. Delayed puberty. In: Jameson JL, De Groot LJ, de Kretser DM, et ...

  15. Calm child programme.

    Science.gov (United States)

    Gobrial, Ereny; Raghavan, Raghu

    2017-01-01

    Children with autism spectrum disorder (ASD) and intellectual disabilities (IDs) are more vulnerable to experiencing anxiety disorders. Parental involvement in intervention is crucial for successful management of the interventions in the population of people with ASDs. This article describes the design and evaluation of parenting programme for anxiety disorders in children and young people with ASD and ID. In phase 1 semi-structured interviews were conducted to explore management strategies for anxiety at home and in school settings. A total of 34 participants (14 parents, 20 teachers) participated in the interviews. A Delphi process was conducted with health professionals to develop consensus on appropriate anxiety interventions. In phase 2 the intervention programme was implemented by seven parents who also participated in focus group to evaluate the developed programme. A parental programme, calm child programme (CCP), was developed, implemented and evaluated. The evaluations show significant decrease in children's anxiety as a result of implementing the programme. This study contributes further evidence to parental involvement in interventions for children and young people with ASD and IDs. The CCP is a useful and cost-effective approach in enabling parents to provide anxiety interventions in a home setting.

  16. The Maplin electronic circuits handbook

    CERN Document Server

    Tooley, Michael

    1990-01-01

    The Maplin Electronic Circuits Handbook provides pertinent data, formula, explanation, practical guidance, theory and practical guidance in the design, testing, and construction of electronic circuits. This book discusses the developments in electronics technology techniques.Organized into 11 chapters, this book begins with an overview of the common types of passive component. This text then provides the reader with sufficient information to make a correct selection of passive components for use in the circuits. Other chapters consider the various types of the most commonly used semiconductor

  17. Differentiation in the Amsterdam methadone dispensing circuit: determinants of methadone dosage and site of methadone prescription

    NARCIS (Netherlands)

    Langendam, M. W.; van Haastrecht, H. J.; van Brussel, G. H.; Reurs, H.; van den Hoek, A. A.; Coutinho, R. A.; van Ameijden, E. J.

    1998-01-01

    To evaluate the Methadone Dispensing Circuit in Amsterdam by identifying determinants of methadone dosage and client characteristics in the different types of methadone programmes. Four hundred and forty-four participants of a cohort study of drug users in Amsterdam who had consented to link data of

  18. Delay analysis of combinations of pass transistors and classical logic gates

    Science.gov (United States)

    Gibson, Jonathan S.

    1993-01-01

    Combinations of pass transistors and logic gates driving nonlinear capacitive loads are analyzed for the presence of characteristics that will permit easier and more accurate digital logic simulation. Accurate time delay models are developed by studying the nature of the response of simplified circuit models to variations of input waveform rise and fall times and output loading. The nonlinear effects of the CMOS logic devices are minimized to permit easier interpretation of the influence of nonlinear capacitive loads. The performance of a CMOS inverter with a complex nonlinear load consisting of a pass transistor that separates a range of capacitances is compared to the same inverter circuit with a linear capacitive load to develop an understanding of the unique requirements of modeling a nonlinear system. Several methods of modeling the delay of CMOS circuits are reviewed, and a multi-parameter linear model is described. General guidelines for designing CMOS circuits with complex load circuits are developed, emphasizing that the circuit output rise delays and fall delays must be separately analyzed.

  19. Carbon Nanotubes-Based Digitally Programmable Current Follower

    Directory of Open Access Journals (Sweden)

    S. K. Tripathi

    2018-01-01

    Full Text Available The physical constraints of ever-shrinking CMOS transistors are rapidly approaching atomistic and quantum mechanical limits. Therefore, research is now directed towards the development of nanoscale devices that could work efficiently in the sub-10 nm regime. This coupled with the fact that recent design trend for analog signal processing applications is moving towards current-mode circuits which offer lower voltage swings, higher bandwidth, and better signal linearity is the motivation for this work. A digitally controlled DVCC has been realized using CNFETs. This work exploited the CNFET’s parameters like chirality, pitch, and numbers of CNTs to perform the digital control operation. The circuit has minimum number of transistors and can control the output current digitally. A similar CMOS circuit with 32 nm CMOS parameters was also simulated and compared. The result shows that CMOS-based circuit requires 418.6 μW while CNFET-based circuit consumes 352.1 μW only. Further, the proposed circuit is used to realize a CNFET-based instrumentation amplifier with digitally programmable gain. The amplifier has a CMRR of 100 dB and ICMR equal to 0.806 V. The 3 dB bandwidth of the amplifier is 11.78 GHz which is suitable for the applications like navigation, radar instrumentation, and high-frequency signal amplification and conditioning.

  20. Evaluating a novel resident role-modelling programme.

    Science.gov (United States)

    Sternszus, Robert; Steinert, Yvonne; Bhanji, Farhan; Andonian, Sero; Snell, Linda S

    2017-05-09

    Role modelling is a fundamental method by which students learn from residents. To our knowledge, however, resident-as-teacher curricula have not explicitly addressed resident role modelling. The purpose of this project was to design, implement and evaluate an innovative programme to teach residents about role modelling. The authors designed a resident role-modelling programme and incorporated it into the 2015 and 2016 McGill University resident-as-teacher curriculum. Influenced by experiential and social learning theories, the programme incorporated flipped-classroom and simulation approaches to teach residents to be aware and deliberate role models. Outcomes were assessed through a pre- and immediate post-programme questionnaire evaluating reaction and learning, a delayed post-programme questionnaire evaluating learning, and a retrospective pre-post questionnaire (1 month following the programme) evaluating self-reported behaviour changes. Thirty-three of 38 (87%) residents who participated in the programme completed the evaluation, with 25 residents (66%) completing all questionnaires. Participants rated the programme highly on a five-point Likert scale (where 1 = not helpful and 5 = very helpful; mean score, M = 4.57; standard deviation, SD = 0.50), and showed significant improvement in their perceptions of their importance as role models and their knowledge of deliberate role modelling. Residents also reported an increased use of deliberate role-modelling strategies 1 month after completing the programme. Resident-as-teacher curricula have not explicitly addressed resident role modelling DISCUSSION: The incorporation of resident role modelling into our resident-as-teacher curriculum positively influenced the participants' perceptions of their role-modelling abilities. This programme responds to a gap in resident training and has the potential to guide further programme development in this important and often overlooked area. © 2017 John Wiley & Sons

  1. Superluminal effects and negative group delays in electronics, and their applications.

    Science.gov (United States)

    Solli, Daniel; Chiao, R Y; Hickmann, J M

    2002-11-01

    The causality principle does not forbid negative group delays of analytic signals in electronic circuits; in particular, the peak of a pulse can leave the exit port of a circuit before it enters the input port. Furthermore, pulse distortion for these "superluminal" analytic signals can be negligible in both the optical and electronic domains. Here we suggest a possible extension of these ideas to microelectronics. The underlying principle is that negative feedback can be used to produce negative group delays. Such negative group delays can be used to cancel out the positive group delays introduced by transistor latency, as well as the propagation delays due to the interconnections between transistors. Using this principle, it may be possible to speed up computer systems.

  2. The INTEGRAL Core Observing Programme

    DEFF Research Database (Denmark)

    Winkler, C.; Gehrels, N.; Lund, Niels

    1999-01-01

    The Core Programme of the INTEGRAL mission is defined as the portion of the scientific programme covering the guaranteed time observations for the INTEGRAL Science Working Team. This paper describes the current status of the Core Programme preparations and summarizes the key elements...... of the observing programme....

  3. Circuit design on plastic foils

    CERN Document Server

    Raiteri, Daniele; Roermund, Arthur H M

    2015-01-01

    This book illustrates a variety of circuit designs on plastic foils and provides all the information needed to undertake successful designs in large-area electronics.  The authors demonstrate architectural, circuit, layout, and device solutions and explain the reasons and the creative process behind each. Readers will learn how to keep under control large-area technologies and achieve robust, reliable circuit designs that can face the challenges imposed by low-cost low-temperature high-throughput manufacturing.   • Discusses implications of problems associated with large-area electronics and compares them to standard silicon; • Provides the basis for understanding physics and modeling of disordered material; • Includes guidelines to quickly setup the basic CAD tools enabling efficient and reliable designs; • Illustrates practical solutions to cope with hard/soft faults, variability, mismatch, aging and bias stress at architecture, circuit, layout, and device levels.

  4. Behavioral synthesis of asynchronous circuits

    DEFF Research Database (Denmark)

    Nielsen, Sune Fallgaard

    2005-01-01

    is idle. This reduces unnecessary switching activity in the individual functional units and therefore the energy consumption of the entire circuit. A collection of behavioral synthesis algorithms have been developed allowing the designer to perform time and power constrained design space exploration....... The datapath and control architecture is then expressed in the Balsa-language, and using syntax directed compilation a corresponding handshake circuit implementation (and eventually a layout) is produced....

  5. Receiver Gain Modulation Circuit

    Science.gov (United States)

    Jones, Hollis; Racette, Paul; Walker, David; Gu, Dazhen

    2011-01-01

    A receiver gain modulation circuit (RGMC) was developed that modulates the power gain of the output of a radiometer receiver with a test signal. As the radiometer receiver switches between calibration noise references, the test signal is mixed with the calibrated noise and thus produces an ensemble set of measurements from which ensemble statistical analysis can be used to extract statistical information about the test signal. The RGMC is an enabling technology of the ensemble detector. As a key component for achieving ensemble detection and analysis, the RGMC has broad aeronautical and space applications. The RGMC can be used to test and develop new calibration algorithms, for example, to detect gain anomalies, and/or correct for slow drifts that affect climate-quality measurements over an accelerated time scale. A generalized approach to analyzing radiometer system designs yields a mathematical treatment of noise reference measurements in calibration algorithms. By treating the measurements from the different noise references as ensemble samples of the receiver state, i.e. receiver gain, a quantitative description of the non-stationary properties of the underlying receiver fluctuations can be derived. Excellent agreement has been obtained between model calculations and radiometric measurements. The mathematical formulation is equivalent to modulating the gain of a stable receiver with an externally generated signal and is the basis for ensemble detection and analysis (EDA). The concept of generating ensemble data sets using an ensemble detector is similar to the ensemble data sets generated as part of ensemble empirical mode decomposition (EEMD) with exception of a key distinguishing factor. EEMD adds noise to the signal under study whereas EDA mixes the signal with calibrated noise. It is mixing with calibrated noise that permits the measurement of temporal-functional variability of uncertainty in the underlying process. The RGMC permits the evaluation of EDA by

  6. Variation-aware adaptive voltage scaling for digital CMOS circuits

    CERN Document Server

    Wirnshofer, Martin

    2013-01-01

    Increasing performance demands in integrated circuits, together with limited energy budgets, force IC designers to find new ways of saving power. One innovative way is the presented adaptive voltage scaling scheme, which tunes the supply voltage according to the present process, voltage and temperature variations as well as aging. The voltage is adapted “on the fly” by means of in-situ delay monitors to exploit unused timing margin, produced by state-of-the-art worst-case designs. This book discusses the design of the enhanced in-situ delay monitors and the implementation of the complete control-loop comprising the monitors, a control-logic and an on-chip voltage regulator. An analytical Markov-based model of the control-loop is derived to analyze its robustness and stability. Variation-Aware Adaptive Voltage Scaling for Digital CMOS Circuits provides an in-depth assessment of the proposed voltage scaling scheme when applied to an arithmetic and an image processing circuit. This book is written for engine...

  7. Test and Diagnosis for Small-Delay Defects

    CERN Document Server

    Tehranipoor, Mohammad; Chakrabarty, Krishnendu

    2012-01-01

    This book introduces new techniques for detecting and diagnosing small-delay defects (SDD) in integrated circuits. Although this sort of timing defect is commonly found in integrated circuits manufactured with nanometer technology, this will be the first book to introduce effective and scalable methodologies for screening and diagnosing small-delay defects, including important parameters such as process variations, crosstalk, and power supply noise. This book presents new techniques and methodologies to improve overall SDD detection with very small pattern sets. These methods can result in pattern counts as low as a traditional 1-detect pattern set and long path sensitization and SDD detection similar to or even better than n-detect or timing-aware pattern sets. The important design parameters and pattern-induced noises such as process variations,power supply noise (PSN) and crosstalk are taken into account in the methodologies presented. A diagnostic flow is also presented to identify whether the failure is ...

  8. Single-bit error-correction circuit for ATM interfaces

    Science.gov (United States)

    Maniatopoulos, A.; Antonakopoulos, T.; Makios, V.

    1995-04-01

    Cell switching systems use cyclic codes for protecting cell headers from transmission errors either by detecting multiple errors or by correcting single-bit errors. The Letter presents a new method for implementing single-bit forward error-correction functions by minimising the complexity of parallel CRC circuits, resulting in low hardware complexity and high operational speed. The method does not use a look-up table for determining the corrupted bit position, but implements a repetitive algorithm for matching the generated syndrome. The implementation of the proposed method to an ATM interface using field programmable gate arrays is also described.

  9. External Mobility Programme

    CERN Multimedia

    HR Department

    2007-01-01

    Every year, a significant number of highly-skilled staff members leave the Organization and offer their talents on the European job market. CERN is launching a programme aiming to help staff members to whom the Organization cannot offer an indefinite contract in the transition towards their next employment. The programme, which is based on the establishment of a number of partnerships with potential employers in the private sector, will run on a voluntary basis. Staff members who have received confirmation that they will not be offered an indefinite contract and who are interested in availing themselves of the opportunities offered by the programme, are invited to enrol by following the procedure described at: https://ert.cern.ch/browse_intranet/wd_pds?p_web_page_id=5841 Applications will be processed in the strictest confidence by the Human Resources Department and eligible profiles will then be made available to partner companies for recruitment purposes. Any subsequent ...

  10. Conception and test of an integrated circuit (ASIC): application to multiwire chambers and photomultipliers of the GRAAL experience; Conception et test d`un circuit integre (ASIC): application aux chambres multifils et aux photomultiplicateurs de l`experience GRAAL

    Energy Technology Data Exchange (ETDEWEB)

    Bugnet, H.

    1995-11-21

    The nuclear physics project GRAAL (GRenoble Anneau Accelerateur Laser) located at the European Synchrotron Radiation Facility (ESRF) in Grenoble produces a high energy photon beam with a maximum energy of 1.5 GeV. This gamma beam is obtained by Compton backscattering and can be polarized easily. It permits to probe, in an original way, the structure of the nucleon. The associated detector system includes multiwire proportional chambers and scintillator hodoscopes. A kit of six ASICs (Application Specific Integrated Circuit) has been developed and used for the signal processing and data conditioning up to the level of the data acquisition. This integrated electronics can be mounted right on the detectors. Obvious advantages, due to the reduction of the length of the wires and the number of connections, are an improvement of the signal quality and an increase of the reliability. The Wire Processor (WP), ASIC designed and tested during this thesis, treats the signals from the chamber wires and the photomultipliers. In one chip, there are two identical channels permitting the amplification, the amplitude discrimination, the generation of a programmable delay and the writing in a two state memory in case of coincidence with an external strobe signal. The measurement of the multiwire chamber efficiency demonstrates the functioning of the WP, the data conditioning electronics, the data acquisition and the chamber itself. (author). 62 refs., 111 figs., 13 tabs.

  11. Noise-Reduction Circuit For Imaging Photodetectors

    Science.gov (United States)

    Ramirez, Luis J.; Pain, Bedabrata; Staller, Craig; Hickok, Roger W.

    1995-01-01

    Developmental correlated-triple-sampling circuit suppresses capacitor reset noise and attenuates low frequency noise in integrated-and-sampled circuits of multiplexed photodiode arrays. Noise reduction circuit part of Visible and Infrared Mapping Spectrometer (VIMS) instrument to fly aboard Cassini spacecraft to explore Saturn and its moons. Modified versions of circuit also useful for reducing noise in terrestrial photosensor instruments.

  12. Multi-Layer E-Textile Circuits

    Science.gov (United States)

    Dunne, Lucy E.; Bibeau, Kaila; Mulligan, Lucie; Frith, Ashton; Simon, Cory

    2012-01-01

    Stitched e-textile circuits facilitate wearable, flexible, comfortable wearable technology. However, while stitched methods of e-textile circuits are common, multi-layer circuit creation remains a challenge. Here, we present methods of stitched multi-layer circuit creation using accessible tools and techniques.

  13. Computer mathematics for programmers

    CERN Document Server

    Abney, Darrell H; Sibrel, Donald W

    1985-01-01

    Computer Mathematics for Programmers presents the Mathematics that is essential to the computer programmer.The book is comprised of 10 chapters. The first chapter introduces several computer number systems. Chapter 2 shows how to perform arithmetic operations using the number systems introduced in Chapter 1. The third chapter covers the way numbers are stored in computers, how the computer performs arithmetic on real numbers and integers, and how round-off errors are generated in computer programs. Chapter 4 details the use of algorithms and flowcharting as problem-solving tools for computer p

  14. Air Quality Monitoring Programme

    DEFF Research Database (Denmark)

    Kemp, K.; Palmgren, F.

    The Danish Air Quality Monitoring Programme (LMP IV) has been revised in accordance with the Framework Directive and the first three daughter directives of SO2, NOx/NO2, PM10, lead, benzene, CO and ozone. PM10 samplers are under installation and the installation will be completed during 2002....... The PM10 results from 2000 are spares, only TSP are thus included in this report. The data sets for year 2000 is complete for many stations. The monitoring programme consists of 10 stations plus 2 extra stations under the Municipality of Copenhagen. The SO2 and lead levels are still decreasing and far...

  15. Stripe delay filters

    OpenAIRE

    Zakharov, Alexander V.; Ilchenko, Mykhailo Ye.; Trubarov, Igor V.; Pinchuk, Ludmila S.

    2016-01-01

    There are considered constructions of microsized stripe delay filters, which are realized on a basis of ceramic materials with high dielectric permittivity. Delay time of non-minimal phase filters is 7–12 ns at frequencies of 1900 MHz with relative bandwidth of 3.6–3.85%. Filters dimensions are comparable with ones used in portable communication devices. Dimensions of researched three-resonator filter at frequency of 1900 MHz are 8.4×5×2 mm with material dielectric permittivity εr = 92, and 5...

  16. Eliminating common PACU delays.

    Science.gov (United States)

    Jenkins, Jamie

    2007-01-01

    This article discusses how one hospital identified patient flow delays in its PACU By using lean methods focused on eliminating waste, the team was able to improve patient flow. Lean thinking required the team to keep issues that were important to patients at top of mind. The improvements not only saved staff time, but they also helped the department prepare for the addition of six beds by focusing on methods to eliminate delays. The team, assigned by the vice president of surgical services, included a process engineer two decision support analysts, the PACU charge nurse, the nursing manager and ad hoc department nurses. The team recommended and implemented changes to improve operational effectiveness.

  17. Logic Synthesis of Recombinase-Based Genetic Circuits.

    Science.gov (United States)

    Chiu, Tai-Yin; Jiang, Jie-Hong R

    2017-10-09

    A synthetic approach to biology is a promising technique for various applications. Recent advancements have demonstrated the feasibility of constructing synthetic two-input logic gates in Escherichia coli cells with long-term memory based on DNA inversion induced by recombinases. Moreover, recent evidences indicate that DNA inversion mediated by genome editing tools is possible. Powerful genome editing technologies, such as CRISPR-Cas9 systems, have great potential to be exploited to implement large-scale recombinase-based circuits. What remains unclear is how to construct arbitrary Boolean functions based on these emerging technologies. In this paper, we lay the theoretical foundation formalizing the connection between recombinase-based genetic circuits and Boolean functions. It enables systematic construction of any given Boolean function using recombinase-based logic gates. We further develop a methodology leveraging existing electronic design automation (EDA) tools to automate the synthesis of complex recombinase-based genetic circuits with respect to area and delay optimization. In silico experimental results demonstrate the applicability of our proposed methods as a useful tool for recombinase-based genetic circuit synthesis and optimization.

  18. Bioluminescent bioreporter integrated circuits (BBICs)

    Science.gov (United States)

    Simpson, Michael L.; Sayler, Gary S.; Nivens, David; Ripp, Steve; Paulus, Michael J.; Jellison, Gerald E.

    1998-07-01

    As the workhorse of the integrated circuit (IC) industry, the capabilities of CMOS have been expanded well beyond the original applications. The full spectrum of analog circuits from switched-capacitor filters to microwave circuit blocks, and from general-purpose operational amplifiers to sub- nanosecond analog timing circuits for nuclear physics experiments have been implemented in CMOS. This technology has also made in-roads into the growing area of monolithic sensors with devices such as active-pixel sensors and other electro-optical detection devices. While many of the processes used for MEMS fabrication are not compatible with the CMOS IC process, depositing a sensor material onto a previously fabricated CMOS circuit can create a very useful category of sensors. In this work we report a chemical sensor composed of bioluminescent bioreporters (genetically engineered bacteria) deposited onto a micro-luminometer fabricated in a standard CMOS IC process. The bioreporter used for this work emitted 490-nm light when exposed to toluene. This luminescence was detected by the micro- luminometer giving an indication of the concentration of toluene. Other bioluminescent bioreporters sensitive to explosives, mercury, and other organic chemicals and heavy metals have been reported. These could be incorporated (individually or in combination) with the micro-luminometer reported here to form a variety of chemical sensors.

  19. Instrumentation and test gear circuits manual

    CERN Document Server

    Marston, R M

    2013-01-01

    Instrumentation and Test Gear Circuits Manual provides diagrams, graphs, tables, and discussions of several types of practical circuits. The practical circuits covered in this book include attenuators, bridges, scope trace doublers, timebases, and digital frequency meters. Chapter 1 discusses the basic instrumentation and test gear principles. Chapter 2 deals with the design of passive attenuators, and Chapter 3 with passive and active filter circuits. The subsequent chapters tackle 'bridge' circuits, analogue and digital metering techniques and circuitry, signal and waveform generation, and p

  20. Compiler-aided systematic construction of large-scale DNA strand displacement circuits using unpurified components.

    Science.gov (United States)

    Thubagere, Anupama J; Thachuk, Chris; Berleant, Joseph; Johnson, Robert F; Ardelean, Diana A; Cherry, Kevin M; Qian, Lulu

    2017-02-23

    Biochemical circuits made of rationally designed DNA molecules are proofs of concept for embedding control within complex molecular environments. They hold promise for transforming the current technologies in chemistry, biology, medicine and material science by introducing programmable and responsive behaviour to diverse molecular systems. As the transformative power of a technology depends on its accessibility, two main challenges are an automated design process and simple experimental procedures. Here we demonstrate the use of circuit design software, combined with the use of unpurified strands and simplified experimental procedures, for creating a complex DNA strand displacement circuit that consists of 78 distinct species. We develop a systematic procedure for overcoming the challenges involved in using unpurified DNA strands. We also develop a model that takes synthesis errors into consideration and semi-quantitatively reproduces the experimental data. Our methods now enable even novice researchers to successfully design and construct complex DNA strand displacement circuits.

  1. Performance analysis of an ultralow power circuit using single halo CNTFETs

    Science.gov (United States)

    Wang, Wei; Wang, Huan; Liu, Jichao; Li, Na; Zhang, Ting; Jiang, Sitao; Zhang, Lu; Xu, Min; Gao, Jian

    2015-05-01

    This work presents a comprehensive study of the influence of channel engineering on the switching, high frequency characteristics, and circuit-level performance of carbon nanotube field-effect transistors (CNTFETs). At the device level, new CNTFETs with single halo doping (SH-CNTFETs) have been proposed. The impact of SH implantation on the cutoff frequency (fT), switching delay (τ), and on/off current ratio (Ion/Ioff) has been explored and it is revealed that SH-CNTFETs have improved radio frequency (RF) and switching characteristics. At the circuit level, using the Hailey Simulation Program with IC Emphasis (HSPICE) with lookup table (LUT)-based Verilog-A models, the performance parameters of the circuit have been calculated. Results show that compared to a conventional CNTFET (C-CNTFET)-based inverter, the SH-CNTFET-based inverter exhibits better performance. In addition, we evaluate the stability and performance of six-transistor (6T) CNTFET static random access memory (SRAM) cells with SH-CNTFETs. The performance parameters such as static noise margin (SNM) and write delay as well as power-delay product (PDP) and SNM/write delay (SWD) have been calculated and optimized. It is shown that SH-CNTFET SRAMs have an improved performance in SNM, PDP, and write power compared to C-CNTFET SRAMs and the optimum halo doping level has been concluded. Our results may be useful for designing and optimizing CNTFET devices and circuits.

  2. Transistorized Marx bank pulse circuit provides voltage multiplication with nanosecond rise-time

    Science.gov (United States)

    Jung, E. A.; Lewis, R. N.

    1968-01-01

    Base-triggered avalanche transistor circuit used in a Marx bank pulser configuration provides voltage multiplication with nanosecond rise-time. The avalanche-mode transistors replace conventional spark gaps in the Marx bank. The delay time from an input signal to the output signal to the output is typically 6 nanoseconds.

  3. 30 CFR 75.800 - High-voltage circuits; circuit breakers.

    Science.gov (United States)

    2010-07-01

    ... 30 Mineral Resources 1 2010-07-01 2010-07-01 false High-voltage circuits; circuit breakers. 75.800... SAFETY AND HEALTH MANDATORY SAFETY STANDARDS-UNDERGROUND COAL MINES Underground High-Voltage Distribution § 75.800 High-voltage circuits; circuit breakers. High-voltage circuits entering the underground area...

  4. A tool for errors detection in printed circuit boards production

    Directory of Open Access Journals (Sweden)

    A. de Luca Pennacchia

    2009-04-01

    Full Text Available The progressive implementation of software functions in Integrated Circuits (ICs has considerably increased the number oftransistors and pin connections of ICs. For that reason, Printed Circuit Boards (PCBs are fabricated with the Surface MountTechnology (SMT nowadays and IC mounting on PCB is a crucial process that requires high precision. An Automatic MechanicalMontage (AMM system is used to mount ICs on the sockets using a couple of reference points for every IC in order to find thecorrect positions for mounting the IC. Due to some factors in the process of PCB development, there are differences betweendesigned and manufactured PCBs, which could generate delays in their production. In this work, a software tool which allows towork with digital images of PCBs is described. This tool finds the differences generated in PCB development, especially thedifferences in IC reference points using Digital Image Processing (DIP techniques.

  5. Delayed breast implant reconstruction

    DEFF Research Database (Denmark)

    Hvilsom, Gitte B.; Hölmich, Lisbet R.; Steding-Jessen, Marianne

    2012-01-01

    We evaluated the association between radiation therapy and severe capsular contracture or reoperation after 717 delayed breast implant reconstruction procedures (288 1- and 429 2-stage procedures) identified in the prospective database of the Danish Registry for Plastic Surgery of the Breast during...... reconstruction approaches other than implants should be seriously considered among women who have received radiation therapy....

  6. Permissible Delay in Payments

    Directory of Open Access Journals (Sweden)

    Yung-Fu Huang

    2007-01-01

    Full Text Available The main purpose of this paper wants to investigate the optimal retailer's lot-sizing policy with two warehouses under partially permissible delay in payments within the economic order quantity (EOQ framework. In this paper, we want to extend that fully permissible delay in payments to the supplier would offer the retailer partially permissible delay in payments. That is, the retailer must make a partial payment to the supplier when the order is received. Then the retailer must pay off the remaining balance at the end of the permissible delay period. In addition, we want to add the assumption that the retailer's storage space is limited. That is, the retailer will rent the warehouse to store these exceeding items when the order quantity is larger than retailer's storage space. Under these conditions, we model the retailer's inventory system as a cost minimization problem to determine the retailer's optimal cycle time and optimal order quantity. Three theorems are developed to efficiently determine the optimal replenishment policy for the retailer. Finally, numerical examples are given to illustrate these theorems and obtained a lot of managerial insights.

  7. Delayed visual maturation.

    OpenAIRE

    Harel, S; Holtzman, M; Feinsod, M

    1983-01-01

    Three infants, recognised as blind during the first 4 months of life, were found to be normal on neurological and ophthalmological examinations. Visual electro-diagnostic studies showed normal retinal responses, but delayed conduction velocities and impaired visually-evoked responses over the occipital cortex. After age 6 months, normal vision developed gradually and all abnormalities disappeared.

  8. Delayed visual maturation.

    Science.gov (United States)

    Harel, S; Holtzman, M; Feinsod, M

    1983-01-01

    Three infants, recognised as blind during the first 4 months of life, were found to be normal on neurological and ophthalmological examinations. Visual electro-diagnostic studies showed normal retinal responses, but delayed conduction velocities and impaired visually-evoked responses over the occipital cortex. After age 6 months, normal vision developed gradually and all abnormalities disappeared. PMID:6189454

  9. Computer Programmer/Analyst.

    Science.gov (United States)

    Ohio State Univ., Columbus. Center on Education and Training for Employment.

    This publication contains 25 subjects appropriate for use in a competency list for the occupation of computer programmer/analyst, 1 of 12 occupations within the business/computer technologies cluster. Each unit consists of a number of competencies; a list of competency builders is provided for each competency. Titles of the 25 units are as…

  10. En model for programmer

    DEFF Research Database (Denmark)

    Christensen, Henrik Bærbak

    Dette undervisningsmateriale beskriver en model for, hvordan programmer er opbygget. Materialet er skrevet til brug i det gymnasiale forsøgsfag Informationsteknologi. Seneste version af dette undervisningsmateriale kan findes på http:// www.imhotep.dk. Tak til Elisabeth Husum for en kritisk...

  11. (ARV) treatment training programme

    African Journals Online (AJOL)

    Winnie

    successful ARV programme requires that all components of a functional management system be put in place for effective and efficient functioning.This would include logistics, human resources, financial planning, and monitoring and ..... which service recipients were surveyed on the quality of service delivery noted above.

  12. Progressive Retirement Programme

    CERN Multimedia

    HR Department

    2007-01-01

    Following discussion at the Standing Concertation Committee at its meeting on 30 January 2007, the Director-General has approved the extension of the Progressive Retirement Programme with effect from 1 April 2007 until 31 March 2008. Human Resources Department Tel. 74484/74128

  13. The European Programme Manager

    DEFF Research Database (Denmark)

    Larson, Anne; Bergman, E.; Ehlers, S.

    The publication is a result of a cooperation between organisations in six European countries with the aim to develop a common European education for programme managers. It contains of a description of the different elements of the education together with a number of case-studies from the counties...

  14. The ONTARGET trial programme

    DEFF Research Database (Denmark)

    Unger, Thomas; Kintscher, Ulrich; Kappert, Kai

    2009-01-01

    The ONTARGET trial programme tested the effects of the angiotensin AT1 receptor blocker (ARB), telmisartan, alone or in combination with the angiotensin converting enzyme (ACE) inhibitor, ramipril, in more than 25.000 patients at high cardiovascular risk including diabetes on a combined endpoint...

  15. The Productive Programmer

    CERN Document Server

    Ford, Neal

    2009-01-01

    Anyone who develops software for a living needs a proven way to produce it better, faster, and cheaper. The Productive Programmer offers critical timesaving and productivity tools that you can adopt right away, no matter what platform you use. Master developer Neal Ford details ten valuable practices that will help you elude common traps, improve your code, and become more valuable to your team.

  16. SET-Routes programme

    CERN Multimedia

    Marietta Schupp, EMBL Photolab

    2008-01-01

    Dr Sabine Hentze, specialist in human genetics, giving an Insight Lecture entitled "Human Genetics – Diagnostics, Indications and Ethical Issues" on 23 September 2008 at EMBL Heidelberg. Activities in a achool in Budapest during a visit of Angela Bekesi, Ambassadors for the SET-Routes programme.

  17. cardiovascular disease intervention programme

    African Journals Online (AJOL)

    Changes in smoking during a community-based cardiovascular disease intervention programme. The Coronary Risk Factor Study. H. J. STEENKAMP, P. L. JOOSTE, P. C. J. JORDAAN,. A. S. P. SWANEPOEL, J. E. ROSSOUW. Summary. A prospective anti-smoking clinical trial was conducted as part of a coronary risk factor ...

  18. Delayed fluorescence in photosynthesis.

    Science.gov (United States)

    Goltsev, Vasilij; Zaharieva, Ivelina; Chernev, Petko; Strasser, Reto J

    2009-01-01

    Photosynthesis is a very efficient photochemical process. Nevertheless, plants emit some of the absorbed energy as light quanta. This luminescence is emitted, predominantly, by excited chlorophyll a molecules in the light-harvesting antenna, associated with Photosystem II (PS II) reaction centers. The emission that occurs before the utilization of the excitation energy in the primary photochemical reaction is called prompt fluorescence. Light emission can also be observed from repopulated excited chlorophylls as a result of recombination of the charge pairs. In this case, some time-dependent redox reactions occur before the excitation of the chlorophyll. This delays the light emission and provides the name for this phenomenon-delayed fluorescence (DF), or delayed light emission (DLE). The DF intensity is a decreasing polyphasic function of the time after illumination, which reflects the kinetics of electron transport reactions both on the (electron) donor and the (electron) acceptor sides of PS II. Two main experimental approaches are used for DF measurements: (a) recording of the DF decay in the dark after a single turnover flash or after continuous light excitation and (b) recording of the DF intensity during light adaptation of the photosynthesizing samples (induction curves), following a period of darkness. In this paper we review historical data on DF research and recent advances in the understanding of the relation between the delayed fluorescence and specific reactions in PS II. An experimental method for simultaneous recording of the induction transients of prompt and delayed chlorophyll fluorescence and decay curves of DF in the millisecond time domain is discussed.

  19. Response characteristic of high-speed on/off valve with double voltage driving circuit

    Science.gov (United States)

    Li, P. X.; Su, M.; Zhang, D. B.

    2017-07-01

    High-speed on/off valve, an important part of turbocharging system, its quick response has a direct impact on the turbocharger pressure cycle. The methods of improving the response characteristic of high speed on/off valve include increasing the magnetic force of armature and the voltage, decreasing the mass and current of coil. The less coil number of turns, the solenoid force is smaller. The special armature structure and the magnetic material will raise cost. In this paper a new scheme of double voltage driving circuit is investigated, in which the original driving circuit of high-speed on/off valve is replaced by double voltage driving circuit. The detailed theoretical analysis and simulations were carried out on the double voltage driving circuit, it showed that the switching time and delay time of the valve respectively are 3.3ms, 5.3ms, 1.9ms and 1.8ms. When it is driven by the double voltage driving circuit, the switching time and delay time of this valve are reduced, optimizing its response characteristic. By the comparison related factors (such as duty cycle or working frequency) about influences on response characteristic, the superior of double voltage driving circuit has been further confirmed.

  20. Approaching the Processes in the Generator Circuit Breaker at Disconnection through Sustainability Concepts

    Directory of Open Access Journals (Sweden)

    Carmen A. Bulucea

    2013-03-01

    Full Text Available Nowadays, the electric connection circuits of power plants (based on fossil fuels as well as renewable sources entail generator circuit-breakers (GCBs at the generator terminals, since the presence of that electric equipment offers many advantages related to the sustainability of a power plant. In an alternating current (a.c. circuit the interruption of a short circuit is performed by the circuit-breaker at the natural passing through zero of the short-circuit current. During the current interruption, an electric arc is generated between the opened contacts of the circuit-breaker. This arc must be cooled and extinguished in a controlled way. Since the synchronous generator stator can flow via highly asymmetrical short-circuit currents, the phenomena which occur in the case of short-circuit currents interruption determine the main stresses of the generator circuit-breaker; the current interruption requirements of a GCB are significantly higher than for the distribution network circuit breakers. For shedding light on the proper moment when the generator circuit-breaker must operate, using the space phasor of the short-circuit currents, the time expression to the first zero passing of the short-circuit current is determined. Here, the manner is investigated in which various factors influence the delay of the zero passing of the short-circuit current. It is shown that the delay time is influenced by the synchronous machine parameters and by the load conditions which precede the short-circuit. Numerical simulations were conducted of the asymmetrical currents in the case of the sudden three-phase short circuit at the terminals of synchronous generators. Further in this study it is emphasized that although the phenomena produced in the electric arc at the terminals of the circuit-breaker are complicated and not completely explained, the concept of exergy is useful in understanding the physical phenomena. The article points out that just after the short-circuit

  1. RECRUITMENT FINANCED BY SAVED LEAVE (RSL PROGRAMME)

    CERN Multimedia

    Division du Personnel; Tel. 73903

    1999-01-01

    Transfer to the saved leave account and saved leave bonusStaff members participating in the RSL programme may opt to transfer up to 10 days of unused annual leave or unused compensatory leave into their saved leave account, at the end of the leave year, i.e. 30 September (as set out in the implementation procedure dated 27 August 1997).A leave transfer request form, which you should complete, sign and return, if you wish to use this possibility, has been addressed you. To allow the necessary time for the processing of your request, you should return it without delay.As foreseen in the implementation procedure, an additional day of saved leave will be granted for each full period of 20 days remaining in the saved leave account on 31 December 1999, for any staff member participating in the RSL programme until that date.For part-time staff members participating in the RSL programme, the above-mentioned days of leave (annual, compensatory and saved) are adjusted proportionally to their contractual working week as...

  2. Dynamically programmable electronic pill dispenser system.

    Science.gov (United States)

    Boquete, Luciano; Rodriguez-Ascariz, Jose Manuel; Artacho, Irene; Cantos-Frontela, Joaquin; Peixoto, Nathalia

    2010-06-01

    Compliance in medicine dispensation has proven critical for dosage control, diagnosis, and treatment. We have designed, manufactured, and characterized a novel dynamically programmable e-pill dispensing system. Our system is initially programmed remotely through a cell phone. After programming, the system may be reconfigured in order to adapt pill dispensation to new conditions. In this paper we describe the mechanics, electronics, control, and communication protocols implemented. Our dyn-e-pill devices can be actuated for over 350 h with two pill retrievals per hour. We challenged the charging circuit and demonstrated that the system has a lifetime longer than 6 h with a 30 min charging cycle, while it lasts for 14 h of uninterrupted use with a full charge.

  3. Circuit modeling for electromagnetic compatibility

    CERN Document Server

    Darney, Ian B

    2013-01-01

    Very simply, electromagnetic interference (EMI) costs money, reduces profits, and generally wreaks havoc for circuit designers in all industries. This book shows how the analytic tools of circuit theory can be used to simulate the coupling of interference into, and out of, any signal link in the system being reviewed. The technique is simple, systematic and accurate. It enables the design of any equipment to be tailored to meet EMC requirements. Every electronic system consists of a number of functional modules interconnected by signal links and power supply lines. Electromagnetic interference

  4. Simplified design of filter circuits

    CERN Document Server

    Lenk, John

    1999-01-01

    Simplified Design of Filter Circuits, the eighth book in this popular series, is a step-by-step guide to designing filters using off-the-shelf ICs. The book starts with the basic operating principles of filters and common applications, then moves on to describe how to design circuits by using and modifying chips available on the market today. Lenk's emphasis is on practical, simplified approaches to solving design problems.Contains practical designs using off-the-shelf ICsStraightforward, no-nonsense approachHighly illustrated with manufacturer's data sheets

  5. Programming languages for circuit design.

    Science.gov (United States)

    Pedersen, Michael; Yordanov, Boyan

    2015-01-01

    This chapter provides an overview of a programming language for Genetic Engineering of Cells (GEC). A GEC program specifies a genetic circuit at a high level of abstraction through constraints on otherwise unspecified DNA parts. The GEC compiler then selects parts which satisfy the constraints from a given parts database. GEC further provides more conventional programming language constructs for abstraction, e.g., through modularity. The GEC language and compiler is available through a Web tool which also provides functionality, e.g., for simulation of designed circuits.

  6. Modeling of Nonlinear Marine Cooling Systems with Closed Circuit Flow

    DEFF Research Database (Denmark)

    Hansen, Michael; Stoustrup, Jakob; Bendtsen, Jan Dimon

    2011-01-01

    We consider the problem of constructing a mathematical model for a specific type of marine cooling system. The system in question is used for cooling the main engine and main engine auxiliary components, such as diesel generators, turbo chargers and main engine air coolers for certain classes...... of container ships. The purpose of the model is to describe the important dynamics of the system, such as nonlinearities, transport delays and closed circuit flow dynamics to enable the model to be used for control design and simulation. The control challenge is related to the highly non-standard type of step...

  7. Mammographic screening programmes in Europe

    DEFF Research Database (Denmark)

    Giordano, Livia; von Karsa, Lawrence; Tomatis, Mariano

    2012-01-01

    To summarize participation and coverage rates in population mammographic screening programmes for breast cancer in Europe.......To summarize participation and coverage rates in population mammographic screening programmes for breast cancer in Europe....

  8. Impact of Compensatory Intervention in 6- to 18-Month-Old Babies at Risk of Motor Development Delays

    Science.gov (United States)

    Müller, Alessandra Bombarda; Saccani, Raquel; Valentini, Nadia Cristina

    2017-01-01

    Purpose: Research indicates that delayed motor development observed in the first years of life can be prevented through compensatory intervention programmes that provide proper care during this critical period of child development. Method: This study analysed the impact of a 12-week compensatory motor intervention programme on 32 babies with…

  9. Photonic integrated circuits unveil crisis-induced intermittency.

    Science.gov (United States)

    Karsaklian Dal Bosco, Andreas; Akizawa, Yasuhiro; Kanno, Kazutaka; Uchida, Atsushi; Harayama, Takahisa; Yoshimura, Kazuyuki

    2016-09-19

    We experimentally investigate an intermittent route to chaos in a photonic integrated circuit consisting of a semiconductor laser with time-delayed optical feedback from a short external cavity. The transition from a period-doubling dynamics to a fully-developed chaos reveals a stage intermittently exhibiting these two dynamics. We unveil the bifurcation mechanism underlying this route to chaos by using the Lang-Kobayashi model and demonstrate that the process is based on a phenomenon of attractor expansion initiated by a particular distribution of the local Lyapunov exponents. We emphasize on the crucial importance of the distribution of the steady-state solutions introduced by the time-delayed feedback on the existence of this intermittent dynamics.

  10. Companies' requirements on graduates - programmers

    OpenAIRE

    Urx, Martin

    2009-01-01

    The thesis maps different types of programmers and what are demands on programmers from employees. It analysis both technical skills and also soft-skills and their importance when evaluating a programmer. The thesis also contains an analysis of IT education offered by selected universities and high schools. The data are gathered through questionnaires and their results are confronted with the study options.

  11. Delayed crosslinker composition

    Energy Technology Data Exchange (ETDEWEB)

    Hodge, R.M.

    1989-01-10

    A crosslinker composition is described that can produce delayed crosslinking of an aqueous solution of a crosslinkable organic polymer. It consists of about 1% to about 10% by weight of an organic zirconium complex and about 2% to about 37% by weight organic hydroxycarboxylic acid selected from the group consisting of lactic, mandelic and hydroxyacetic acids the pH of the composition being no greater than 4.8.

  12. Delayed visual maturation.

    OpenAIRE

    Cole, G F; Hungerford, J.; Jones, R B

    1984-01-01

    Sixteen blind babies who were considered to be showing the characteristics of delayed visual maturation were studied prospectively. The diagnosis was made on clinical grounds, and the criteria for this are discussed. All of these infants developed visual responses between 4 and 6 months of age and had normal or near normal visual acuities by 1 year of age. Long term follow up, however, has shown neurological abnormalities in some of these children.

  13. Delayed visual maturation.

    Science.gov (United States)

    Fielder, A R; Russell-Eggitt, I R; Dodd, K L; Mellor, D H

    1985-01-01

    Fifty-three infants with delayed visual maturation (DVM) are presented. These have been classified according to their ocular and systemic features into three groups: DVM as an isolated anomaly, in association with mental retardation, and ocular abnormalities accompanied by DVM. The clinical features are discussed, particularly regarding the time and speed of visual improvement in the three groups. Infants with DVM who experienced difficulties in the perinatal period have an increased risk of developing permanent neurological sequelae.

  14. A Digital Auto-Zeroing Circuit to Reduce Offset in Sub-Threshold Sense Amplifiers

    Directory of Open Access Journals (Sweden)

    Benton H. Calhoun

    2013-05-01

    Full Text Available Device variability in modern processes has become a major concern in SRAM design leading to degradation of both performance and yield. Variation induced offset in the sense amplifiers requires a larger bitline differential, which slows down SRAM access times and causes increased power consumption. The effect aggravated in the sub-threshold region. In this paper, we propose a circuit that reduces the sense amp offset using an auto-zeroing scheme with automatic temperature, voltage, and aging tracking. The circuit enables flexible tuning of the offset voltage. Measurements taken from a 45 nm test chip show the circuit is able to limit the offset to 20 mV. A 16kB SRAM is designed using the auto-zeroing circuit for the sense amps. The reduction in the total read energy and delay is reported for various configurations of the memory.

  15. Integrated Circuit Stellar Magnitude Simulator

    Science.gov (United States)

    Blackburn, James A.

    1978-01-01

    Describes an electronic circuit which can be used to demonstrate the stellar magnitude scale. Six rectangular light-emitting diodes with independently adjustable duty cycles represent stars of magnitudes 1 through 6. Experimentally verifies the logarithmic response of the eye. (Author/GA)

  16. A Low Noise Electronic Circuit

    NARCIS (Netherlands)

    Annema, Anne J.; Leenaerts, Dominicus M.W.; de Vreede, Petrus W.H.

    2002-01-01

    An electronic circuit, which can be used as a Low Noise Amplifier (LNA), comprises two complementary Field Effect Transistors (M1, M2; M5, M6), each having a gate, a source and a drain. The gates are connected together as a common input terminal, and the drains are connected together as a

  17. Invention of the Integrated Circuit

    Indian Academy of Sciences (India)

    Home; Journals; Resonance – Journal of Science Education; Volume 17; Issue 11. Invention of the Integrated Circuit. Jack S Kilby. Classics Volume 17 Issue 11 November 2012 pp 1100-1115. Fulltext. Click here to view fulltext PDF. Permanent link: http://www.ias.ac.in/article/fulltext/reso/017/11/1100-1115 ...

  18. Development of CMOS integrated circuits

    Science.gov (United States)

    Bertino, F.; Feller, A.; Greenhouse, J.; Lombardi, T.; Merriam, A.; Noto, R.; Ozga, S.; Pryor, R.; Ramondetta, P.; Smith, A.

    1979-01-01

    Report documents life cycles of two custom CMOS integrated circuits: (1) 4-bit multiplexed register with shift left and shift right capabilities, and (2) dual 4-bit registers. Cycles described include conception as logic diagrams through design, fabrication, testing, and delivery.

  19. Data assimilation with Chua's circuit

    Indian Academy of Sciences (India)

    noise and observational frequency, using both simulated observations and data obtained from an experimental realization of a commonly used low-dimensional dynamical system, namely, Chua circuit, in both the periodic as well as the chaotic regime. Keywords. Synchronization; ensemble Kalman filter; data assimilation.

  20. Circuit design for RF transceivers

    CERN Document Server

    Leenaerts, Domine; Vaucher, Cicero S

    2007-01-01

    Second edition of this successful 2001 RF Circuit Design book, has been updated, latest technology reviews have been added as well as several actual case studies. Due to the authors being active in industry as well as academia, this should prove to be an essential guide on RF Transceiver Design for students and engineers.

  1. Parallel circuit simulation on supercomputers

    Energy Technology Data Exchange (ETDEWEB)

    Saleh, R.A.; Gallivan, K.A. (Illinois Univ., Urbana, IL (USA). Center for Supercomputing Research and Development); Chang, M.C. (Texas Instruments, Inc., Dallas, TX (USA)); Hajj, I.N.; Trick, T.N. (Illinois Univ., Urbana, IL (USA). Coordinated Science Lab.); Smart, D. (Semiconductor Div., Analog Devices, Wilmington, MA (US))

    1989-12-01

    Circuit simulation is a very time-consuming and numerically intensive application, especially when the problem size is large as in the case of VLSI circuits. To improve the performance of circuit simulators without sacrificing accuracy, a variety of parallel processing algorithms have been investigated due to the recent availability of a number of commercial multiprocessor machines. In this paper, research in the field of parallel circuit simulation is surveyed and the ongoing research in this area at the University of Illinois is described. Both standard and relaxation-based approaches are considered. In particular, the forms of parallelism available within the direct method approach, used in programs such as SPICE2 and SLATE, and within the relaxation-based approaches, such as waveform relaxation, iterated timing analysis, and waveform-relaxation-Newton, are described. The specific implementation issues addressed here are primarily related to general-purpose multiprocessors with a shared-memory architecture having a limited number of processors, although many of the comments also apply to a number of other architectures.

  2. Designing analog circuits in CMOS

    NARCIS (Netherlands)

    Annema, Anne J.; Nauta, Bram; van Langevelde, Ronald; Tuinhout, Hans

    2004-01-01

    The evolution in CMOS technology dictated by Moore's Law is clearly beneficial for designers of digital circuits, but it presents difficult challenges, such as lowered nominal supply voltages, for their peers in the analog world who want to keep pace with this rapid progression. This article

  3. Pharmacovigilance programme of India

    Directory of Open Access Journals (Sweden)

    Kalaiselvan Vivekanandan

    2012-01-01

    Full Text Available The monitoring and reporting of adverse drug reactions (ADRs through pharmacovigilance is vital to patient safety and rational prescribing. In India, Central Drugs Standard Control Organization (CDSCO initiated Pharmacovigilance Programme of India (PvPI to report ADRs through ADRs monitoring centres in India. Indian Pharmacopoeia Commission (IPC is functioning as National Coordination Centre (NCC for PvPI. The ADRs are reported to NCC through VigiFlow by various centres are evaluated and committed to Uppsala Monitoring Centre, Sweden. The potential benefit of the PvPI is aimed to reducing or eliminating a harm of medicine. Continuous efforts of the healthcare professionals and the patients are expected to make this as one of the most successful and effective programmes. The present article updates the status and future plan of PvPI.

  4. Clocking Scheme for Switched-Capacitor Circuits

    DEFF Research Database (Denmark)

    Steensgaard-Madsen, Jesper

    1998-01-01

    A novel clocking scheme for switched-capacitor (SC) circuits is presented. It can enhance the understanding of SC circuits and the errors caused by MOSFET (MOS) switches. Charge errors, and techniques to make SC circuits less sensitive to them are discussed.......A novel clocking scheme for switched-capacitor (SC) circuits is presented. It can enhance the understanding of SC circuits and the errors caused by MOSFET (MOS) switches. Charge errors, and techniques to make SC circuits less sensitive to them are discussed....

  5. Advanced circuit simulation using Multisim workbench

    CERN Document Server

    Báez-López, David; Cervantes-Villagómez, Ofelia Delfina

    2012-01-01

    Multisim is now the de facto standard for circuit simulation. It is a SPICE-based circuit simulator which combines analog, discrete-time, and mixed-mode circuits. In addition, it is the only simulator which incorporates microcontroller simulation in the same environment. It also includes a tool for printed circuit board design.Advanced Circuit Simulation Using Multisim Workbench is a companion book to Circuit Analysis Using Multisim, published by Morgan & Claypool in 2011. This new book covers advanced analyses and the creation of models and subcircuits. It also includes coverage of transmissi

  6. Digital circuit boards mach 1 GHz

    CERN Document Server

    Morrison, Ralph

    2012-01-01

    A unique, practical approach to the design of high-speed digital circuit boards The demand for ever-faster digital circuit designs is beginning to render the circuit theory used by engineers ineffective. Digital Circuit Boards presents an alternative to the circuit theory approach, emphasizing energy flow rather than just signal interconnection to explain logic circuit behavior. The book shows how treating design in terms of transmission lines will ensure that the logic will function, addressing both storage and movement of electrical energy on these lines. It cove

  7. Delayed breast implant reconstruction

    DEFF Research Database (Denmark)

    Hvilsom, Gitte B.; Hölmich, Lisbet R.; Steding-Jessen, Marianne

    2011-01-01

    Studies of complications following reconstructive surgery with implants among women with breast cancer are needed. As the, to our knowledge, first prospective long-term study we evaluated the occurrence of complications following delayed breast reconstruction separately for one- and two-stage pro......Studies of complications following reconstructive surgery with implants among women with breast cancer are needed. As the, to our knowledge, first prospective long-term study we evaluated the occurrence of complications following delayed breast reconstruction separately for one- and two......-stage procedures. From the Danish Registry for Plastic Surgery of the Breast, which has prospectively registered data for women undergoing breast implantations since 1999, we identified 559 women without a history of radiation therapy undergoing 592 delayed breast reconstructions following breast cancer during...... the period 1999 to 2006; 239 one-stage procedures and 353 two-stage procedures. The postoperative course through November 2009 was evaluated by cumulative incidence adjusting for competing risks for the selected outcomes; hematoma, infection, seroma, implant rupture, severe capsular contracture (modified...

  8. Delay in atomic photoionization

    CERN Document Server

    Kheifets, A S

    2010-01-01

    We analyze the time delay between emission of photoelectrons from the outer valence $ns$ and $np$ sub-shells in noble gas atoms following absorption of an attosecond XUV pulse. By solving the time dependent Schr\\"odinger equation and carefully examining the time evolution of the photoelectron wave packet, we establish the apparent "time zero" when the photoelectron leaves the atom. Various processes such as elastic scattering of the photoelectron on the parent ion and many-electron correlation affect the quantum phase of the dipole transition matrix element, the energy dependence of which defines the emission timing. This qualitatively explains the time delay between photoemission from the $2s$ and $2p$ sub-shells of Ne as determined experimentally by attosecond streaking [{\\em Science} {\\bf 328}, 1658 (2010)]. However, with our extensive numerical modeling, we were only able to account for less than a half of the measured time delay of $21\\pm5$~as. We argue that the XUV pulse alone cannot produce such a larg...

  9. Time-Delay Interferometry

    Directory of Open Access Journals (Sweden)

    Massimo Tinto

    2014-08-01

    Full Text Available Equal-arm detectors of gravitational radiation allow phase measurements many orders of magnitude below the intrinsic phase stability of the laser injecting light into their arms. This is because the noise in the laser light is common to both arms, experiencing exactly the same delay, and thus cancels when it is differenced at the photo detector. In this situation, much lower level secondary noises then set the overall performance. If, however, the two arms have different lengths (as will necessarily be the case with space-borne interferometers, the laser noise experiences different delays in the two arms and will hence not directly cancel at the detector. In order to solve this problem, a technique involving heterodyne interferometry with unequal arm lengths and independent phase-difference readouts has been proposed. It relies on properly time-shifting and linearly combining independent Doppler measurements, and for this reason it has been called time-delay interferometry (TDI. This article provides an overview of the theory, mathematical foundations, and experimental aspects associated with the implementation of TDI. Although emphasis on the application of TDI to the Laser Interferometer Space Antenna (LISA mission appears throughout this article, TDI can be incorporated into the design of any future space-based mission aiming to search for gravitational waves via interferometric measurements. We have purposely left out all theoretical aspects that data analysts will need to account for when analyzing the TDI data combinations.

  10. Practice Utilization of Algorithms for Analog Filter Group Delay Optimization

    Directory of Open Access Journals (Sweden)

    K. Hajek

    2007-04-01

    Full Text Available This contribution deals with an application of three different algorithms which optimize a group delay of analog filters. One of them is a part of the professional circuit simulator Micro Cap 7 and the others two original algorithms are developed in the MATLAB environment. An all-pass network is used to optimize the group delay of an arbitrary analog filter. Introduced algorithms look for an optimal order and optimal coefficients of an all-pass network transfer function. Theoretical foundations are introduced and all algorithms are tested using the optimization of testing analog filter. The optimization is always run three times because the second, third and fourth-order all-pass network is used. An equalization of the original group delay is a main objective of these optimizations. All outputs of all algorithms are critically evaluated and also described.

  11. The Mathematica programmer

    CERN Document Server

    Maeder, Roman E

    1994-01-01

    The Mathematica Programmer covers the fundamental programming paradigms and applications of programming languages. This book is organized into two parts encompassing 10 chapters. Part 1 begins with an overview of the programming paradigms. This part also treats abstract data types, polymorphism and message passing, object-oriented programming, and relational databases. Part 2 looks into the practical aspects of programming languages, including in lists and power series, fractal curves, and minimal surfaces.This book will prove useful to mathematicians and computer scientists.

  12. Punch card programmable microfluidics.

    Directory of Open Access Journals (Sweden)

    George Korir

    Full Text Available Small volume fluid handling in single and multiphase microfluidics provides a promising strategy for efficient bio-chemical assays, low-cost point-of-care diagnostics and new approaches to scientific discoveries. However multiple barriers exist towards low-cost field deployment of programmable microfluidics. Incorporating multiple pumps, mixers and discrete valve based control of nanoliter fluids and droplets in an integrated, programmable manner without additional required external components has remained elusive. Combining the idea of punch card programming with arbitrary fluid control, here we describe a self-contained, hand-crank powered, multiplex and robust programmable microfluidic platform. A paper tape encodes information as a series of punched holes. A mechanical reader/actuator reads these paper tapes and correspondingly executes operations onto a microfluidic chip coupled to the platform in a plug-and-play fashion. Enabled by the complexity of codes that can be represented by a series of holes in punched paper tapes, we demonstrate independent control of 15 on-chip pumps with enhanced mixing, normally-closed valves and a novel on-demand impact-based droplet generator. We demonstrate robustness of operation by encoding a string of characters representing the word "PUNCHCARD MICROFLUIDICS" using the droplet generator. Multiplexing is demonstrated by implementing an example colorimetric water quality assays for pH, ammonia, nitrite and nitrate content in different water samples. With its portable and robust design, low cost and ease-of-use, we envision punch card programmable microfluidics will bring complex control of microfluidic chips into field-based applications in low-resource settings and in the hands of children around the world.

  13. Programme driven music radio

    OpenAIRE

    Hayes, Conor; Cunningham, Padraig; Clerkin, Patrick; Grimaldi, Marco

    2002-01-01

    This paper describes the operation of and research behind a networked application for the delivery of personalised streams of music at Trinity College Dublin. Smart Radio is a web based client-server application that uses streaming audio technology and recommendation techniques to allow users build, manage and share music programmes. While it is generally acknowledged that music distribution over the web will dramatically change how the music industry operates, there are ...

  14. A new video programme

    CERN Multimedia

    CERN video productions

    2011-01-01

    "What's new @ CERN?", a new monthly video programme, will be broadcast on the Monday of every month on webcast.cern.ch. Aimed at the general public, the programme will cover the latest CERN news, with guests and explanatory features. Tune in on Monday 3 October at 4 pm (CET) to see the programme in English, and then at 4:20 pm (CET) for the French version.   var flash_video_player=get_video_player_path(); insert_player_for_external('Video/Public/Movies/2011/CERN-MOVIE-2011-129/CERN-MOVIE-2011-129-0753-kbps-640x360-25-fps-audio-64-kbps-44-kHz-stereo', 'mms://mediastream.cern.ch/MediaArchive/Video/Public/Movies/2011/CERN-MOVIE-2011-129/CERN-MOVIE-2011-129-Multirate-200-to-753-kbps-640x360-25-fps.wmv', 'false', 480, 360, 'https://mediastream.cern.ch/MediaArchive/Video/Public/Movies/2011/CERN-MOVIE-2011-129/CERN-MOVIE-2011-129-posterframe-640x360-at-10-percent.jpg', '1383406', true, 'Video/Public/Movies/2011/CERN-MOVIE-2011-129/CERN-MOVIE-2011-129-0600-kbps-maxH-360-25-fps-...

  15. Current Vaccine Shortages and Delays

    Science.gov (United States)

    ... value="Submit" /> Related Links Vaccines & Immunizations Current Vaccine Shortages & Delays Recommend on Facebook Tweet Share Compartir ... vaccination are included in this update. Chart of Vaccines* in Delay or Shortage National Vaccine Supply Shortages ...

  16. VHDL simulation of the implementation of a costfunction circuit

    Science.gov (United States)

    Ming, Imvidhaya

    1990-09-01

    Since VHDL is a DoD standard hardware description language, it is widely used in the design of logic circuits at different levels. VHDL can be used to do behavioral modeling which is desirable in top-down system design. A cost function calculation in a graph partition algorithm is used here as an example to test the VHDL design methodology. Subroutines or statements in the software can be implemented into hardware if the subroutines or the statements in that software are suitably grouped. While the design of hardware is considered, high density integration of circuit is also the primary goal. Parts of an old design were condensed using programmable EPLDs which were programmed by commercial software development tools. The methodology of implementation goes from a register transfer language description to data flow design and control flow design. The costfunction calculation was successfully put into 4 EP1800 chips and the design was simulated in VHDL. The primary goal of integration was achieved at the expense of speed. To support the total simulation several behavior models were created. Results of simulation revealed that the adder circuit in the EP1800 can be further improved. Experiences of using VHDL are discussed in this thesis.

  17. Effect of a Diagram on Primary Students' Understanding About Electric Circuits

    Science.gov (United States)

    Preston, Christine Margaret

    2017-09-01

    This article reports on the effect of using a diagram to develop primary students' conceptual understanding about electric circuits. Diagrammatic representations of electric circuits are used for teaching and assessment despite the absence of research on their pedagogical effectiveness with young learners. Individual interviews were used to closely analyse Years 3 and 5 (8-11-year-old) students' explanations about electric circuits. Data was collected from 20 students in the same school providing pre-, post- and delayed post-test dialogue. Students' thinking about electric circuits and changes in their explanations provide insights into the role of diagrams in understanding science concepts. Findings indicate that diagram interaction positively enhanced understanding, challenged non-scientific views and promoted scientific models of electric circuits. Differences in students' understanding about electric circuits were influenced by prior knowledge, meta-conceptual awareness and diagram conventions including a stylistic feature of the diagram used. A significant finding that students' conceptual models of electric circuits were energy rather than current based has implications for electricity instruction at the primary level.

  18. Fabric circuits and method of manufacturing fabric circuits

    Science.gov (United States)

    Chu, Andrew W. (Inventor); Dobbins, Justin A. (Inventor); Scully, Robert C. (Inventor); Trevino, Robert C. (Inventor); Lin, Greg Y. (Inventor); Fink, Patrick W. (Inventor)

    2011-01-01

    A flexible, fabric-based circuit comprises a non-conductive flexible layer of fabric and a conductive flexible layer of fabric adjacent thereto. A non-conductive thread, an adhesive, and/or other means may be used for attaching the conductive layer to the non-conductive layer. In some embodiments, the layers are attached by a computer-driven embroidery machine at pre-determined portions or locations in accordance with a pre-determined attachment layout before automated cutting. In some other embodiments, an automated milling machine or a computer-driven laser using a pre-designed circuit trace as a template cuts the conductive layer so as to separate an undesired portion of the conductive layer from a desired portion of the conductive layer. Additional layers of conductive fabric may be attached in some embodiments to form a multi-layer construct.

  19. Analog Nonvolatile Computer Memory Circuits

    Science.gov (United States)

    MacLeod, Todd

    2007-01-01

    In nonvolatile random-access memory (RAM) circuits of a proposed type, digital data would be stored in analog form in ferroelectric field-effect transistors (FFETs). This type of memory circuit would offer advantages over prior volatile and nonvolatile types: In a conventional complementary metal oxide/semiconductor static RAM, six transistors must be used to store one bit, and storage is volatile in that data are lost when power is turned off. In a conventional dynamic RAM, three transistors must be used to store one bit, and the stored bit must be refreshed every few milliseconds. In contrast, in a RAM according to the proposal, data would be retained when power was turned off, each memory cell would contain only two FFETs, and the cell could store multiple bits (the exact number of bits depending on the specific design). Conventional flash memory circuits afford nonvolatile storage, but they operate at reading and writing times of the order of thousands of conventional computer memory reading and writing times and, hence, are suitable for use only as off-line storage devices. In addition, flash memories cease to function after limited numbers of writing cycles. The proposed memory circuits would not be subject to either of these limitations. Prior developmental nonvolatile ferroelectric memories are limited to one bit per cell, whereas, as stated above, the proposed memories would not be so limited. The design of a memory circuit according to the proposal must reflect the fact that FFET storage is only partly nonvolatile, in that the signal stored in an FFET decays gradually over time. (Retention times of some advanced FFETs exceed ten years.) Instead of storing a single bit of data as either a positively or negatively saturated state in a ferroelectric device, each memory cell according to the proposal would store two values. The two FFETs in each cell would be denoted the storage FFET and the control FFET. The storage FFET would store an analog signal value

  20. A Low-Cost CMOS Programmable Temperature Switch

    Directory of Open Access Journals (Sweden)

    Nanjian Wu

    2008-05-01

    Full Text Available A novel uncalibrated CMOS programmable temperature switch with high temperature accuracy is presented. Its threshold temperature Tth can be programmed by adjusting the ratios of width and length of the transistors. The operating principles of the temperature switch circuit is theoretically explained. A floating gate neural MOS circuit is designed to compensate automatically the threshold temperature Tth variation that results form the process tolerance. The switch circuit is implemented in a standard 0.35 μm CMOS process. The temperature switch can be programmed to perform the switch operation at 16 different threshold temperature Tths from 45-120°C with a 5°C increment. The measurement shows a good consistency in the threshold temperatures. The chip core area is 0.04 mm2 and power consumption is 3.1 μA at 3.3V power supply. The advantages of the temperature switch are low power consumption, the programmable threshold temperature and the controllable hysteresis.

  1. Driver circuit for solid state light sources

    Science.gov (United States)

    Palmer, Fred; Denvir, Kerry; Allen, Steven

    2016-02-16

    A driver circuit for a light source including one or more solid state light sources, a luminaire including the same, and a method of so driving the solid state light sources are provided. The driver circuit includes a rectifier circuit that receives an alternating current (AC) input voltage and provides a rectified AC voltage. The driver circuit also includes a switching converter circuit coupled to the light source. The switching converter circuit provides a direct current (DC) output to the light source in response to the rectified AC voltage. The driver circuit also includes a mixing circuit, coupled to the light source, to switch current through at least one solid state light source of the light source in response to each of a plurality of consecutive half-waves of the rectified AC voltage.

  2. Developing a Domain Model for Relay Circuits

    DEFF Research Database (Denmark)

    Haxthausen, Anne Elisabeth

    2009-01-01

    In this paper we stepwise develop a domain model for relay circuits as used in railway control systems. First we provide an abstract, property-oriented model of networks consisting of components that can be glued together with connectors. This model is strongly inspired by a network model...... for railways madeby Bjørner et.al., however our model is more general: the components can be of any kind and can later be refined to e.g. railway components or circuit components. Then we show how the abstract network model can be refined into an explicit model for relay circuits. The circuit model describes...... the statics as well as the dynamics of relay circuits, i.e. how a relay circuit can be composed legally from electrical components as well as how the components may change state over time. Finally the circuit model is transformed into an executable model, and we show how a concrete circuit can be defined...

  3. Model Order Reduction for Electronic Circuits:

    DEFF Research Database (Denmark)

    Hjorth, Poul G.; Shontz, Suzanne

    Electronic circuits are ubiquitous; they are used in numerous industries including: the semiconductor, communication, robotics, auto, and music industries (among many others). As products become more and more complicated, their electronic circuits also grow in size and complexity. This increased...

  4. Integrity modelling of tropospheric delay models

    Science.gov (United States)

    Rózsa, Szabolcs; Bastiaan Ober, Pieter; Mile, Máté; Ambrus, Bence; Juni, Ildikó

    2017-04-01

    The effect of the neutral atmosphere on signal propagation is routinely estimated by various tropospheric delay models in satellite navigation. Although numerous studies can be found in the literature investigating the accuracy of these models, for safety-of-life applications it is crucial to study and model the worst case performance of these models using very low recurrence frequencies. The main objective of the INTegrity of TROpospheric models (INTRO) project funded by the ESA PECS programme is to establish a model (or models) of the residual error of existing tropospheric delay models for safety-of-life applications. Such models are required to overbound rare tropospheric delays and should thus include the tails of the error distributions. Their use should lead to safe error bounds on the user position and should allow computation of protection levels for the horizontal and vertical position errors. The current tropospheric model from the RTCA SBAS Minimal Operational Standards has an associated residual error that equals 0.12 meters in the vertical direction. This value is derived by simply extrapolating the observed distribution of the residuals into the tail (where no data is present) and then taking the point where the cumulative distribution has an exceedance level would be 10-7.While the resulting standard deviation is much higher than the estimated standard variance that best fits the data (0.05 meters), it surely is conservative for most applications. In the context of the INTRO project some widely used and newly developed tropospheric delay models (e.g. RTCA MOPS, ESA GALTROPO and GPT2W) were tested using 16 years of daily ERA-INTERIM Reanalysis numerical weather model data and the raytracing technique. The results showed that the performance of some of the widely applied models have a clear seasonal dependency and it is also affected by a geographical position. In order to provide a more realistic, but still conservative estimation of the residual

  5. Brain-machine interface circuits and systems

    CERN Document Server

    Zjajo, Amir

    2016-01-01

    This book provides a complete overview of significant design challenges in respect to circuit miniaturization and power reduction of the neural recording system, along with circuit topologies, architecture trends, and (post-silicon) circuit optimization algorithms. The introduced novel circuits for signal conditioning, quantization, and classification, as well as system configurations focus on optimized power-per-area performance, from the spatial resolution (i.e. number of channels), feasible wireless data bandwidth and information quality to the delivered power of implantable system.

  6. Circuit Tolerance Design Using Belief Rule Base

    OpenAIRE

    Xiao-Bin Xu; Zheng Liu; Yu-Wang Chen; Dong-Ling Xu; Cheng-Lin Wen

    2015-01-01

    A belief rule-based (BRB) system provides a generic nonlinear modeling and inference mechanism. It is capable of modeling complex causal relationships by utilizing both quantitative information and qualitative knowledge. In this paper, a BRB system is firstly developed to model the highly nonlinear relationship between circuit component parameters and the performance of the circuit by utilizing available knowledge from circuit simulations and circuit designers. By using rule inference in the ...

  7. Delay Choice vs. Delay Maintenance: Different Measures of Delayed Gratification in Capuchin Monkeys (Cebus apella)

    Science.gov (United States)

    Addessi, Elsa; Paglieri, Fabio; Beran, Michael J.; Evans, Theodore A.; Macchitella, Luigi; De Petrillo, Francesca; Focaroli, Valentina

    2013-01-01

    Delaying gratification involves two components: (i) delay choice (selecting a delayed reward over an immediate one), and (ii) delay maintenance (sustaining the decision to delay gratification even if the immediate reward is available during the delay). In primates, two tasks most commonly have explored these components, the Intertemporal choice task and the Accumulation task. It is unclear whether these tasks provide equivalent measures of delay of gratification. Here, we compared the performance of the same capuchin monkeys, belonging to two study populations, between these tasks. We found only limited evidence of a significant correlation in performance. Consequently, in contrast to what is often assumed, our data provide only partial support to the hypothesis that these tasks provide equivalent measures of delay of gratification. PMID:23544770

  8. Delay choice versus delay maintenance: different measures of delayed gratification in capuchin monkeys (Cebus apella).

    Science.gov (United States)

    Addessi, Elsa; Paglieri, Fabio; Beran, Michael J; Evans, Theodore A; Macchitella, Luigi; De Petrillo, Francesca; Focaroli, Valentina

    2013-11-01

    Delaying gratification involves 2 components: (1) delay choice (selecting a delayed reward over an immediate one) and (2) delay maintenance (sustaining the decision to delay gratification even if the immediate reward is available during the delay). Two tasks most commonly have explored these components in primates: the intertemporal choice task and the accumulation task. It is unclear whether these tasks provide equivalent measures of delay of gratification. Here, we compared the performance on the intertemporal choice task and the accumulation task of capuchin monkeys (Cebus apella) belonging to 2 study populations. We found only limited evidence of a significant correlation in performance. Consequently, in contrast to what is often assumed, our data provide only partial support for the hypothesis that these tasks provide equivalent measures of delay of gratification.

  9. Delaying information search

    Directory of Open Access Journals (Sweden)

    Yaniv Shani

    2012-11-01

    Full Text Available In three studies, we examined factors that may temporarily attenuate information search. People are generally curious and dislike uncertainty, which typically encourages them to look for relevant information. Despite these strong forces that promote information search, people sometimes deliberately delay obtaining valuable information. We find they may do so when they are concerned that the information might interfere with future pleasurable activities. Interestingly, the decision to search or to postpone searching for information is influenced not only by the value and importance of the information itself but also by well-being maintenance goals related to possible detrimental effects that negative knowledge may have on unrelated future plans.

  10. CMOS digital integrated circuits a first course

    CERN Document Server

    Hawkins, Charles; Zarkesh-Ha, Payman

    2016-01-01

    This book teaches the fundamentals of modern CMOS technology and covers equal treatment to both types of MOSFET transistors that make up computer circuits; power properties of logic circuits; physical and electrical properties of metals; introduction of timing circuit electronics and introduction of layout; real-world examples and problem sets.

  11. On dominating and spanning circuits in graphs

    NARCIS (Netherlands)

    Veldman, H.J.

    1994-01-01

    An eulerian subgraph of a graph is called a circuit. As shown by Harary and Nash-Williams, the existence of a Hamilton cycle in the line graph L(G) of a graph G is equivalent to the existence of a dominating circuit in G, i.e., a circuit such that every edge of G is incident with a vertex of the

  12. An Equivalent Circuit for Landau Damping

    DEFF Research Database (Denmark)

    Pécseli, Hans

    1976-01-01

    An equivalent circuit simulating the effect of Landau damping in a stable plasma‐loaded parallel‐plate capacitor is presented. The circuit contains a double infinity of LC components. The transition from stable to unstable plasmas is simulated by the introduction of active elements into the circuit....

  13. 49 CFR 236.721 - Circuit, control.

    Science.gov (United States)

    2010-10-01

    ... 49 Transportation 4 2010-10-01 2010-10-01 false Circuit, control. 236.721 Section 236.721..., MAINTENANCE, AND REPAIR OF SIGNAL AND TRAIN CONTROL SYSTEMS, DEVICES, AND APPLIANCES Definitions § 236.721 Circuit, control. An electrical circuit between a source of electric energy and a device which it operates. ...

  14. Piezo pump and pressurized circuit provided therewith

    NARCIS (Netherlands)

    Van Es, Johannes; Wits, Wessel Willems

    2015-01-01

    A piezo pump for use in a pressurized circuit includes a pump chamber with an inlet provided with a one way inlet valve, for connection to a feeding line of the pressurized circuit and an outlet provided with a one way outlet valve, for connection to a discharge line of the pressurized circuit and a

  15. Finding All Elementary Circuits Exploiting Transconductance

    NARCIS (Netherlands)

    Klumperink, Eric A.M.; Bruccoleri, F.; Nauta, Bram

    Commonly used elementary circuits like single transistor amplifier stages, the differential pair and current mirror basically exploit the transconductance of transistors. This paper aims at finding ALL elementary transconductance based circuits. For this purpose, all graphs of two-port circuits with

  16. New Logic Circuit with DC Parametric Excitation

    Science.gov (United States)

    Sugahara, Masanori; Kaneda, Hisayoshi

    1982-12-01

    It is shown that dc parametric excitation is possible in a circuit named JUDO, which is composed of two resistively-connected Josephson junctions. Simulation study proves that the circuit has large gain and properties suitable for the construction of small, high-speed logic circuits.

  17. Advanced Microwave Circuits and Systems

    DEFF Research Database (Denmark)

    as sufficient gain in a wide frequency range of operation, which is very difficult to achieve. Most circuits demonstrated are not stable across the frequency band, which makes these amplifiers prone to self-oscillations and therefore limit their applicability. The trade-off between noise figure, gain, linearity......This book is based on recent research work conducted by the authors dealing with the design and development of active and passive microwave components, integrated circuits and systems. It is divided into seven parts. In the first part comprising the first two chapters, alternative concepts...... and equations for multiport network analysis and characterization are provided. A thru-only de-embedding technique for accurate on-wafer characterization is introduced. The second part of the book corresponds to the analysis and design of ultra-wideband low-noise amplifiers (LNA). The LNA is the most critical...

  18. Integrated circuits for multimedia applications

    DEFF Research Database (Denmark)

    Vandi, Luca

    2007-01-01

    , and it is applied to a broad-band dual-loop receiver architecture in order to boost the linearity performances of the stage. A simplified noise- and linearity analysis of the circuit is derived, and a comparison is provided with a more traditional dual-loop topology (a broad-band stage based on shunt......This work presents several key aspects in the design of RF integrated circuits for portable multimedia devices. One chapter is dedicated to the application of negative-feedback topologies to receiver frontends. A novel feedback technique suitable for common multiplier-based mixers is described......-series feedback), showing a difference in compression point in the order of 10dBm for the same power consumption. The same principle is also applied to a more conventional narrow-band stage in which a single loop is employed in order to enhance noise performances. Noise analysis shows sensible improvements...

  19. Foundations for microstrip circuit design

    CERN Document Server

    Edwards, Terry

    2016-01-01

    Building on the success of the previous three editions, Foundations for Microstrip Circuit Design offers extensive new, updated and revised material based upon the latest research. Strongly design-oriented, this fourth edition provides the reader with a fundamental understanding of this fast expanding field making it a definitive source for professional engineers and researchers and an indispensable reference for senior students in electronic engineering. Topics new to this edition: microwave substrates, multilayer transmission line structures, modern EM tools and techniques, microstrip and planar transmision line design, transmission line theory, substrates for planar transmission lines, Vias, wirebonds, 3D integrated interposer structures, computer-aided design, microstrip and power-dependent effects, circuit models, microwave network analysis, microstrip passive elements, and slotline design fundamentals.

  20. Quantum information with superconducting circuits

    OpenAIRE

    Huard, Benjamin

    2014-01-01

    Ce mémoire présente ma contribution à l'avènement des circuits supraconducteurs comme composant de base des systèmes d'information quantique. Les variables macroscopiques des circuits électriques, telles que la tension et le courant, obéissent aux lois de la mécanique quantique tant qu'elles sont suffisamment découplées de leur environnement. Depuis que les premiers qubits supraconducteurs ont été réalisés il y a 15 ans, leurs temps de cohérence ont augmenté de 5 ordres de gra...

  1. Delta connected resonant snubber circuit

    Science.gov (United States)

    Lai, J.S.; Peng, F.Z.; Young, R.W. Sr.; Ott, G.W. Jr.

    1998-01-20

    A delta connected, resonant snubber-based, soft switching, inverter circuit achieves lossless switching during dc-to-ac power conversion and power conditioning with minimum component count and size. Current is supplied to the resonant snubber branches solely by the dc supply voltage through the main inverter switches and the auxiliary switches. Component count and size are reduced by use of a single semiconductor switch in the resonant snubber branches. Component count is also reduced by maximizing the use of stray capacitances of the main switches as parallel resonant capacitors. Resonance charging and discharging of the parallel capacitances allows lossless, zero voltage switching. In one embodiment, circuit component size and count are minimized while achieving lossless, zero voltage switching within a three-phase inverter. 36 figs.

  2. Smart Circuit Breaker Communication Infrastructure

    Directory of Open Access Journals (Sweden)

    Octavian Mihai MACHIDON

    2017-11-01

    Full Text Available The expansion of the Internet of Things has fostered the development of smart technologies in fields such as power transmission and distribution systems (as is the Smart Grid and also in regard to home automation (the Smart Home concept. This paper addresses the network communication infrastructure for a Smart Circuit Breaker system, a novel application at the edge of the two afore-mentioned systems (Smart Grid and Smart Home. Such a communication interface has high requirements from functionality, performance and security point of views, given the large amount of distributed connected elements and the real-time information transmission and system management. The paper describes the design and implementation of the data server, Web interface and the embedded networking capabilities of the smart circuit breakers, underlining the protocols and communication technologies used.

  3. Prototype high speed optical delay line for stellar interferometry

    Science.gov (United States)

    Colavita, M. M.; Hines, B. E.; Shao, M.; Klose, G. J.; Gibson, B. V.

    1991-01-01

    The long baselines of the next-generation ground-based optical stellar interferometers require optical delay lines which can maintain nm-level path-length accuracy while moving at high speeds. NASA-JPL is currently designing delay lines to meet these requirements. The design is an enhanced version of the Mark III delay line, with the following key features: hardened, large diameter wheels, rather than recirculating ball bearings, to reduce mechanical noise; a friction-drive cart which bears the cable-dragging forces, and drives the optics cart through a force connection only; a balanced PZT assembly to enable high-bandwidth path-length control; and a precision aligned flexural suspension for the optics assembly to minimize bearing noise feedthrough. The delay line is fully programmable in position and velocity, and the system is controlled with four cascaded software feedback loops. Preliminary performance is a jitter in any 5 ms window of less than 10 nm rms for delay rates of up to 28 mm/s; total jitter is less than 10 nm rms for delay rates up to 20 mm/s.

  4. CASINDO Programme Summary Report

    Energy Technology Data Exchange (ETDEWEB)

    Van der Linden, N.; Smekens, K.; Bole-Rentel, T.; Saidi, R. [Unit ECN Policy Studies, Energy research Centre of the Netherlands ECN, Petten (Netherlands); Wijnker, M. [Eindhoven University of Technology TUE, Eindhoven (Netherlands); Kamphuis, E. [ETC Netherlands, Leusden (Netherlands); Winarno, Oetomo Tri [Institute of Technology, Bandung (Indonesia); Permana, Iman [Technical Education Development Centre, Bandung (Indonesia)

    2012-06-15

    The overall objective of the CASINDO programme is to establish a self-sustaining and self-developing structure at both the national and regional level to build and strengthen human capacity to enable the provinces of North Sumatra, Yogyakarta, Central Java, West Nusa Tenggara and Papua to formulate sound policies for renewable energy and energy efficiency and to develop and implement sustainable energy projects. CASINDO stands for Capacity development and strenghtening for energy policy formulation adn implementation of sustainable energy projects in Indonesia.

  5. Multilateral Interoperability Programme

    Directory of Open Access Journals (Sweden)

    L. Burita

    2009-12-01

    Full Text Available The Multilateral Interoperability Programme (MIP is a voluntary and independent activity in NATO environment by the participating nations and organizations. The MIP concept is based on data exchange in form of common exchange data model to achieve the international interoperability in command and control information systems (C2IS of the tactical units. The article describes the basis of the MIP organizations, structure, planning and testing processes. The core of the MIP solution is the Information Exchange Data Model (IEDM. The Czech Armed Forces (CAF MIP process implementation is mentioned. The MIP example is a part of university education process.

  6. Monolithic readout circuits for RHIC

    Energy Technology Data Exchange (ETDEWEB)

    O`Connor, P.; Harder, J. [Brookhaven National Laboratory, Upton, NY (United States)

    1991-12-31

    Several CMOS ASICs have been developed for a proposed RHIC experiment. This paper discusses why ASIC implementation was chosen for certain functions, circuit specifications and the design techniques used to meet them, and results of simulations and early prototypes. By working closely together from an early stage in the planning process, in-house ASIC designers and detector and data acquisition experimenters can achieve optimal use of this important technology.

  7. Three-Dimensional Circuit Layouts.

    Science.gov (United States)

    1984-06-01

    the models of VLSI layout theory renders the vertices of our circuits as unit-side squares or cubes . 4. Our method of extending the two-dimensional...model assumes isometry in all 4$ dimensions: a unit of height is eqivalent to a unit of width. It is worthwhile placing these assumptions in perspective...2,13]. 4. Aside from clerical simplification, the isometry assumption acknowledges the potential problem of cross-talk between parallel runs of wire

  8. 49 CFR 236.5 - Design of control circuits on closed circuit principle.

    Science.gov (United States)

    2010-10-01

    ... shall be designed on the closed circuit principle, except circuits for roadway equipment of intermittent... 49 Transportation 4 2010-10-01 2010-10-01 false Design of control circuits on closed circuit principle. 236.5 Section 236.5 Transportation Other Regulations Relating to Transportation (Continued...

  9. Introduction to Focus Issue: Time-delay dynamics

    Science.gov (United States)

    Erneux, Thomas; Javaloyes, Julien; Wolfrum, Matthias; Yanchuk, Serhiy

    2017-11-01

    The field of dynamical systems with time delay is an active research area that connects practically all scientific disciplines including mathematics, physics, engineering, biology, neuroscience, physiology, economics, and many others. This Focus Issue brings together contributions from both experimental and theoretical groups and emphasizes a large variety of applications. In particular, lasers and optoelectronic oscillators subject to time-delayed feedbacks have been explored by several authors for their specific dynamical output, but also because they are ideal test-beds for experimental studies of delay induced phenomena. Topics include the control of cavity solitons, as light spots in spatially extended systems, new devices for chaos communication or random number generation, higher order locking phenomena between delay and laser oscillation period, and systematic bifurcation studies of mode-locked laser systems. Moreover, two original theoretical approaches are explored for the so-called Low Frequency Fluctuations, a particular chaotical regime in laser output which has attracted a lot of interest for more than 30 years. Current hot problems such as the synchronization properties of networks of delay-coupled units, novel stabilization techniques, and the large delay limit of a delay differential equation are also addressed in this special issue. In addition, analytical and numerical tools for bifurcation problems with or without noise and two reviews on concrete questions are proposed. The first review deals with the rich dynamics of simple delay climate models for El Nino Southern Oscillations, and the second review concentrates on neuromorphic photonic circuits where optical elements are used to emulate spiking neurons. Finally, two interesting biological problems are considered in this Focus Issue, namely, multi-strain epidemic models and the interaction of glucose and insulin for more effective treatment.

  10. Extremely flexible nanoscale ultrathin body silicon integrated circuits on plastic.

    Science.gov (United States)

    Shahrjerdi, Davood; Bedell, Stephen W

    2013-01-09

    In recent years, flexible devices based on nanoscale materials and structures have begun to emerge, exploiting semiconductor nanowires, graphene, and carbon nanotubes. This is primarily to circumvent the existing shortcomings of the conventional flexible electronics based on organic and amorphous semiconductors. The aim of this new class of flexible nanoelectronics is to attain high-performance devices with increased packing density. However, highly integrated flexible circuits with nanoscale transistors have not yet been demonstrated. Here, we show nanoscale flexible circuits on 60 Å thick silicon, including functional ring oscillators and memory cells. The 100-stage ring oscillators exhibit the stage delay of ~16 ps at a power supply voltage of 0.9 V, the best reported for any flexible circuits to date. The mechanical flexibility is achieved by employing the controlled spalling technology, enabling the large-area transfer of the ultrathin body silicon devices to a plastic substrate at room temperature. These results provide a simple and cost-effective pathway to enable ultralight flexible nanoelectronics with unprecedented level of system complexity based on mainstream silicon technology.

  11. Generation of optical vortices in an integrated optical circuit

    Science.gov (United States)

    Tudor, Rebeca; Kusko, Mihai; Kusko, Cristian

    2017-09-01

    In this work, the generation of optical vortices in an optical integrated circuit is numerically demonstrated. The optical vortices with topological charge m = ±1 are obtained by the coherent superposition of the first order modes present in a waveguide with a rectangular cross section, where the phase delay between these two propagating modes is Δφ = ±π/2. The optical integrated circuit consists of an input waveguide continued with a y-splitter. The left and the right arms of the splitter form two coupling regions K1 and K2 with a multimode output waveguide. In each coupling region, the fundamental modes present in the arms of the splitter are selectively coupled into the output waveguide horizontal and vertical first order modes, respectively. We showed by employing the beam propagation method simulations that the fine tuning of the geometrical parameters of the optical circuit makes possible the generation of optical vortices in both transverse electric (TE) and transverse magnetic (TM) modes. Also, we demonstrated that by placing a thermo-optical element on one of the y-splitter arms, it is possible to switch the topological charge of the generated vortex from m = 1 to m = ‑1.

  12. Epidemiology of delayed ejaculation

    Science.gov (United States)

    Di Sante, Stefania; Mollaioli, Daniele; Gravina, Giovanni Luca; Ciocca, Giacomo; Limoncin, Erika; Carosa, Eleonora; Lenzi, Andrea

    2016-01-01

    A large body of literature on diminished ejaculatory disorders has been generated without the use of a clear diagnostic definition. Many studies have not distinguished between the orgasm and ejaculation disorders leading to doubtful results. Delayed ejaculation (DE) is one of the diminished ejaculatory disorders, which range from varying delays in ejaculatory latency to a complete inability to ejaculate. The present review is aimed at providing a comprehensive overview of the current knowledge on the definition and epidemiology of diminished ejaculatory disorders. We focus on the acquired diseases, such as benign prostatic hyperplasia (BPH) and specific drug regimens that may cause an iatrogenic form of ejaculatory disorder. In addition, the impact of aging is discussed since the prevalence of DE appears to be moderately but positively related to age. Finally, we also focus on the importance of the hormonal milieu on male ejaculation. To date, evidence on the endocrine control of ejaculation is derived from small clinical trials, but the evidence suggests that hormones modulate the ejaculatory process by altering its overall latency. PMID:27652226

  13. Epidemiology of delayed ejaculation.

    Science.gov (United States)

    Di Sante, Stefania; Mollaioli, Daniele; Gravina, Giovanni Luca; Ciocca, Giacomo; Limoncin, Erika; Carosa, Eleonora; Lenzi, Andrea; Jannini, Emmanuele A

    2016-08-01

    A large body of literature on diminished ejaculatory disorders has been generated without the use of a clear diagnostic definition. Many studies have not distinguished between the orgasm and ejaculation disorders leading to doubtful results. Delayed ejaculation (DE) is one of the diminished ejaculatory disorders, which range from varying delays in ejaculatory latency to a complete inability to ejaculate. The present review is aimed at providing a comprehensive overview of the current knowledge on the definition and epidemiology of diminished ejaculatory disorders. We focus on the acquired diseases, such as benign prostatic hyperplasia (BPH) and specific drug regimens that may cause an iatrogenic form of ejaculatory disorder. In addition, the impact of aging is discussed since the prevalence of DE appears to be moderately but positively related to age. Finally, we also focus on the importance of the hormonal milieu on male ejaculation. To date, evidence on the endocrine control of ejaculation is derived from small clinical trials, but the evidence suggests that hormones modulate the ejaculatory process by altering its overall latency.

  14. Delayed Choice Quantum Cryptography

    Science.gov (United States)

    Jeffrey, Evan; Kwiat, Paul

    2002-05-01

    Quantum Cryptography has recently gained attention as a method of communication with security guaranteed by the laws of physics. In particular, according to quantum mechanics, any measurement of an unknown quantum state perturbs the state in an easily detectable manner. One practical difficulty in implementing quantum cryptography is that Alice must encode each bit in a random basis, and Bob must choose the correct basis to get a shared bit of the final key. This necessarily introduces at least a 50% loss of data rate, and higher in protocols that use more than two bases in order to be more sensitive to eavesdroppers. We show that Bob can solve this by storing his photon until Alice has send the basis to use, allowing him to measure in the correct basis 100% of the time, while preventing Eve from having that information in time to use it maliciously. Bob accomplishes this storage by means of an optical delay line -- a pair of mirrors arranged so that his photon makes many round trips through the cavity before emerging and entering the detector. By using mirrors with a slight astigmatism, hope to achieve hundreds of round trips and a few microseconds of delay time.

  15. Pseudotumoral delayed cerebral radionecrosis

    Energy Technology Data Exchange (ETDEWEB)

    Ciaudo-Lacroix, C.; Lapresle, J. (Centre Hospitalier de Bicetre, 94 - Le Kremlin-Bicetre (France))

    1985-01-01

    A 60 year-old woman with a scalp epithelioma underwent radiotherapy, the dose being 57 Gray. A first epileptic seizure occurred twenty months later. Neurological examination revealed signs of left hemisphere involvement. ..gamma..EG, angiography, CT scans, demonstrated a pseudotumoral avascular process. On account of the localisation, the patient being right-handed, no surgical procedure was performed. In spite of corticotherapy and anticonvulsive treatment, seizures recurred and neurological signs slowly progressed. The patient died, 22 months after the first seizure, of an associated disseminated carcinoma with cachexia. Neuropathological examination showed a massive lesion presenting all the features of delayed radionecrosis in the left hemisphere: situated mainly in the white matter; numerous vascular abnormalities; wide-spread demyelination; disappearance of oligoglial cells. The Authors recall the clinical and anatomical aspects of this condition for which the only successful treatment is surgical removal when location and size of the lesion permit. Finally, the mechanisms which have been proposed to explain this delayed cerebral radionecrosis are discussed.

  16. Delay Insensitive Ternary CMOS Logic for Secure Hardware

    Directory of Open Access Journals (Sweden)

    Ravi S. P. Nair

    2015-09-01

    Full Text Available As digital circuit design continues to evolve due to progress of semiconductor processes well into the sub 100 nm range, clocked architectures face limitations in a number of cases where clockless asynchronous architectures generate less noise and produce less electro-magnetic interference (EMI. This paper develops the Delay-Insensitive Ternary Logic (DITL asynchronous design paradigm that combines design aspects of similar dual-rail asynchronous paradigms and Boolean logic to create a single wire per bit, three voltage signaling and logic scheme. DITL is compared with other delay insensitive paradigms, such as Pre-Charge Half-Buffers (PCHB and NULL Convention Logic (NCL on which it is based. An application of DITL is discussed in designing secure digital circuits resistant to side channel attacks based on measurement of timing, power, and EMI signatures. A Secure DITL Adder circuit is designed at the transistor level, and several variance parameters are measured to validate the efficiency of DITL in resisting side channel attacks. The DITL design methodology is then applied to design a secure 8051 ALU.

  17. Pastoralism and delay in diagnosis of TB in Ethiopia.

    Science.gov (United States)

    Gele, Abdi A; Bjune, Gunnar; Abebe, Fekadu

    2009-01-07

    health care providers' delay (aOR. 3.39, CI 1.68-6.83). Patient delay observed among pastoralist TB patients in SRS is one of the highest reported so far from developing countries, exceeding two years in some patients. This long patient delay appears to be associated with patient's inadequate knowledge of the disease and distance to health care facility with nomadic pastoralists being the most affected. Regional TB control programmes need to consider the exceptional circumstances of pastoralists, to maximise their access to TB services.

  18. Ultra-low power integrated circuit design circuits, systems, and applications

    CERN Document Server

    Li, Dongmei; Wang, Zhihua

    2014-01-01

    This book describes the design of CMOS circuits for ultra-low power consumption including analog, radio frequency (RF), and digital signal processing circuits (DSP). The book addresses issues from circuit and system design to production design, and applies the ultra-low power circuits described to systems for digital hearing aids and capsule endoscope devices. Provides a valuable introduction to ultra-low power circuit design, aimed at practicing design engineers; Describes all key building blocks of ultra-low power circuits, from a systems perspective; Applies circuits and systems described to real product examples such as hearing aids and capsule endoscopes.

  19. Finding the Energy Efficient Curve: Gate Sizing for Minimum Power under Delay Constraints

    Directory of Open Access Journals (Sweden)

    Yoni Aizik

    2011-01-01

    Full Text Available A design scenario examined in this paper assumes that a circuit has been designed initially for high speed, and it is redesigned for low power by downsizing of the gates. In recent years, as power consumption has become a dominant issue, new optimizations of circuits are required for saving energy. This is done by trading off some speed in exchange for reduced power. For each feasible speed, an optimization problem is solved in this paper, finding new sizes for the gates such that the circuit satisfies the speed goal while dissipating minimal power. Energy/delay gain (EDG is defined as a metric to quantify the most efficient tradeoff. The EDG of the circuit is evaluated for a range of reduced circuit speeds, and the power-optimal gate sizes are compared with the initial sizes. Most of the energy savings occur at the final stages of the circuits, while the largest relative downsizing occurs in middle stages. Typical tapering factors for power efficient circuits are larger than those for speed-optimal circuits. Signal activity and signal probability affect the optimal gate sizes in the combined optimization of speed and power.

  20. Sensorimotor control: computing the immediate future from the delayed present.

    Science.gov (United States)

    Sargolzaei, Arman; Abdelghani, Mohamed; Yen, Kang K; Sargolzaei, Saman

    2016-07-25

    The predictive nature of the primate sensorimotor systems, for example the smooth pursuit system and their ability to compensate for long delays have been proven by many physiological experiments. However, few theoretical models have tried to explain these facts comprehensively. Here, we propose a sensorimotor learning and control model that can be used to (1) predict the dynamics of variable time delays and current and future sensory states from delayed sensory information; (2) learn new sensorimotor realities; and (3) control a motor system in real time. This paper proposed a new time-delay estimation method and developed a computational model for a predictive control solution of a sensorimotor control system under time delay. Simulation experiments are used to demonstrate how the proposed model can explain a sensorimotor system's ability to compensate for delays during online learning and control. To further illustrate the benefits of the proposed time-delay estimation method and predictive control in sensorimotor systems a simulation of the horizontal Vestibulo-Ocular Reflex (hVOR) system is presented. Without the proposed time-delay estimation and prediction, the hVOR can be unstable and could be affected by high frequency oscillations. These oscillations are reminiscent of a fast correction mechanism, e.g., a saccade to compensate for the hVOR delays. Comparing results of the proposed model with those in literature, it is clear that the hVOR system with impaired time-delay estimation or impaired sensory state predictor can mimic certain outcomes of sensorimotor diseases. Even more, if the control of hVOR is augmented with the proposed time-delay estimator and the predictor for eye position relative to the head, then hVOR control system can be stabilized. Three claims with varying degrees of experimental support are proposed in this paper. Firstly, the brain or any sensorimotor system has time-delay estimation circuits for the various sensorimotor control

  1. PREPARATION FOR RETIREMENT PROGRAMME

    CERN Multimedia

    Human Resources Division

    2001-01-01

    27 March 2001 from 2.00 p.m. to 5.30 p.m. 28 March 2001 from 2.00 p.m. to 5.30 p.m. 29 March 2001 from 2.00 p.m. to 5.30 p.m. 30 March 2001 from 2.00 p.m. to 4.45 p.m. Auditorium (Main Building) After the success of the preparation seminars held in recent years, it has been decided that the programme should continue. The forthcoming seminar has been prepared in close collaboration with the CERN Pensioners' Association. The programme will be organised over several half-day sessions. Once again this year, a special session will be devoted to the 10th revision of the Swiss state pension scheme, the 'AVS' (Assurance-Vieillesse et Survivants), and the consequences for international civil servants. A talk will be given by Mrs Danièle Siebold, Director of the Caisse Cantonale Genevoise de Compensation, aimed mainly at those residing in or intending to move to Switzerland, or who worked in Switzerland before joining CERN. To enable Mrs Siebold to respond to your concerns as effectively as possible, please ...

  2. Design of a high linearity and high gain accuracy analog baseband circuit for DAB receiver

    Science.gov (United States)

    Li, Ma; Zhigong, Wang; Jian, Xu; Yiqiang, Wu; Junliang, Wang; Mi, Tian; Jianping, Chen

    2015-02-01

    An analog baseband circuit of high linearity and high gain accuracy for a digital audio broadcasting receiver is implemented in a 0.18-μm RFCMOS process. The circuit comprises a 3rd-order active-RC complex filter (CF) and a programmable gain amplifier (PGA). An automatic tuning circuit is also designed to tune the CF's pass band. Instead of the class-A fully differential operational amplifier (FDOPA) adopted in the conventional CF and PGA design, a class-AB FDOPA is specially employed in this circuit to achieve a higher linearity and gain accuracy for its large current swing capability with lower static current consumption. In the PGA circuit, a novel DC offset cancellation technique based on the MOS resistor is introduced to reduce the settling time significantly. A reformative switching network is proposed, which can eliminate the switch resistor's influence on the gain accuracy of the PGA. The measurement result shows the gain range of the circuit is 10-50 dB with a 1-dB step size, and the gain accuracy is less than ±0.3 dB. The OIP3 is 23.3 dBm at the gain of 10 dB. Simulation results show that the settling time is reduced from 100 to 1 ms. The image band rejection is about 40 dB. It only draws 4.5 mA current from a 1.8 V supply voltage.

  3. Design of analog integrated circuits and systems

    CERN Document Server

    Laker, Kenneth R

    1994-01-01

    This text is designed for senior or graduate level courses in analog integrated circuits or design of analog integrated circuits. This book combines consideration of CMOS and bipolar circuits into a unified treatment. Also included are CMOS-bipolar circuits made possible by BiCMOS technology. The text progresses from MOS and bipolar device modelling to simple one and two transistor building block circuits. The final two chapters present a unified coverage of sample-data and continuous-time signal processing systems.

  4. CMOS circuit design, layout and simulation

    CERN Document Server

    Baker, R Jacob

    2010-01-01

    The Third Edition of CMOS Circuit Design, Layout, and Simulation continues to cover the practical design of both analog and digital integrated circuits, offering a vital, contemporary view of a wide range of analog/digital circuit blocks including: phase-locked-loops, delta-sigma sensing circuits, voltage/current references, op-amps, the design of data converters, and much more. Regardless of one's integrated circuit (IC) design skill level, this book allows readers to experience both the theory behind, and the hands-on implementation of, complementary metal oxide semiconductor (CMOS) IC design via detailed derivations, discussions, and hundreds of design, layout, and simulation examples.

  5. Predictive Direct Torque Control Application-Specific Integrated Circuit of an Induction Motor Drive with a Fuzzy Controller

    OpenAIRE

    Guo-Ming Sung; Wei-Yu Wang; Wen-Sheng Lin; Chih-Ping Yu

    2017-01-01

    This paper proposes a modified predictive direct torque control (PDTC) application-specific integrated circuit (ASIC) of a motor drive with a fuzzy controller for eliminating sampling and calculating delay times in hysteresis controllers. These delay times degrade the control quality and increase both torque and flux ripples in a motor drive. The proposed fuzzy PDTC ASIC calculates the stator’s magnetic flux and torque by detecting the three-phase current, three-phase voltage, and rotor speed...

  6. Assessment of satellite communications quality study. Addendum 1: Impact of propagation delay on data transmission

    Science.gov (United States)

    Campanella, S. J.; Chitre, D. M.

    1988-01-01

    The single factor that irrevocably distinguishes geostationary satellite telephony transmission from terrestrial transmission is the greater propagation delay over satellite links. This difference has always provoked vigorous debate over the impact of delay on the subscribers using services incorporating satellite links. The issue is addressed from a variety of directions including human factors studies, laboratory subjective tests that evaluate delay with and without echo, and field tests that obtain data on the opinion of subscribers regarding the quality of service of operational circuits in both national U.S. domestic and international trans-Atlantic network. The tests involved the use of both echo suppressors and echo cancellers.

  7. Programmable Image Processing Element.

    Science.gov (United States)

    1980-11-01

    re’JAIiWnciiieiit Of ICrutS ill I (Jilitiwi 4~ 1 li, td / I(Hit: ROM relilired Ill 1il 3i 1, ds sil- her NIiS the lunilin.1,11 numIIber- oh input S , ahIeS as’i Cise...S -o TD A. B LOC K fjEQS DIAGRAM *FOR LATCH DLO ONLY CLR B. CIRCUIT SCHEMATIC Figure 39. C’ontroller 1)-Latch Diagram V DD MASTER I K IM3M6 CLOCKIIF...11111 rt’c-isttr. Ilit: outpuits 0t Citacl C Mei iISO C0iso ton t d 10 ile n parlliti-to->criai l it’c rsion wh~~tr \\iichil orili tlc tdata hbr RUM

  8. Stability and delay sensitivity of neutral fractional-delay systems

    Science.gov (United States)

    Xu, Qi; Shi, Min; Wang, Zaihua

    2016-08-01

    This paper generalizes the stability test method via integral estimation for integer-order neutral time-delay systems to neutral fractional-delay systems. The key step in stability test is the calculation of the number of unstable characteristic roots that is described by a definite integral over an interval from zero to a sufficient large upper limit. Algorithms for correctly estimating the upper limits of the integral are given in two concise ways, parameter dependent or independent. A special feature of the proposed method is that it judges the stability of fractional-delay systems simply by using rough integral estimation. Meanwhile, the paper shows that for some neutral fractional-delay systems, the stability is extremely sensitive to the change of time delays. Examples are given for demonstrating the proposed method as well as the delay sensitivity.

  9. Integrated devices in digital circuit design

    Science.gov (United States)

    Hope, G. S.

    Aspects of combinational design are examined, taking into account logical operations, truth tables, Karnaugh maps as input output expressions, minimum forms, maximum forms, minterm forms, symbols, fundamental relationships, Karnaugh maps as design tools, the implementation of logic functions, logic and implementation, logic nor implementation, implementation examples, the exclusive or function, symmetrical forms, reduction, and practical circuits. Multiplexers and demultiplexers in combinational circuits are considered along with fundamental mode circuits, event-driven sequential circuits, event-driven circuit implementation using multiplexers, clock-driven sequential circuits, counters and multiplexers in clock-driven sequential circuits, state diagram construction, registers in logic design, a digital system, programming and programming aids, input and output techniques, operation and configuration of independent systems, and a definition of a Boolean algebra. Attention is also given to Intel's and Motorola's executable instructions.

  10. Programmable pH buffers

    Science.gov (United States)

    Gough, Dara Van; Huber, Dale L.; Bunker, Bruce C.; Roberts, Mark E.

    2017-01-24

    A programmable pH buffer comprises a copolymer that changes pK.sub.a at a lower critical solution temperature (LCST) in water. The copolymer comprises a thermally programmable polymer that undergoes a hydrophobic-to-hydrophilic phase change at the LCST and an electrolytic polymer that exhibits acid-base properties that are responsive to the phase change. The programmable pH buffer can be used to sequester CO.sub.2 into water.

  11. High mortality during tuberculosis treatment does not indicate long diagnostic delays in Vietnam: a cohort study

    Directory of Open Access Journals (Sweden)

    Sy Dinh N

    2007-08-01

    Full Text Available Abstract Background Delay in tuberculosis diagnosis and treatment initiation may increase disease severity and mortality. In evaluations of tuberculosis control programmes high fatality rates during tuberculosis treatment, are used as an indicator of long delays in low HIV-prevalence settings. However, data for this presumed association between delay and fatality are lacking. We assessed the association between diagnostic delay and mortality of new smear-positive pulmonary tuberculosis patients in Vietnam. Methods Follow-up of a patient cohort included in a survey of diagnostic delay in 70 randomly selected districts. Data on diagnosis and treatment were extracted from routine registers. Patients who had died during the course of treatment were compared to those with reported cure, completed treatment or failure (survivors. Results Complete data were available for 1881/2093 (89.9% patients, of whom 82 (4.4% had died. Fatality was 4.5% for patients with ≤ 4 weeks delay, 5.0% for 5- ≤ 8 weeks delay (aOR 1.11, 95%CI 0.67–1.84 and 3.2% for > 9 weeks delay (aOR 0.69, 95%CI 0.37–1.30. Fatality tended to decline with increasing delay but this was not significant. Fatality was not associated with median diagnostic delay at district level (Spearman's rho = -0.08, P = 0.5. Conclusion Diagnostic delay is not associated with treatment mortality in Vietnam at individual nor district level, suggesting that high case fatality should not be used as an indicator of long diagnostic delay in national tuberculosis programmes.

  12. Delayed cure bismaleimide resins

    Science.gov (United States)

    Adams, Johnnie E.; Jamieson, Donald R.

    1984-08-07

    Polybismaleimides prepared by delayed curing of bis-imides having the formula ##STR1## wherein R.sub.1 and R.sub.2 each independently is H, C.sub.1-4 -alkyl, C.sub.1-4 -alkoxy, Cl or Br, or R.sub.1 and R.sub.2 together form a fused 6-membered hydrocarbon aromatic ring, with the proviso that R.sub.1 and R.sub.2 are not t-butyl or t-butoxy; X is O, S or Se; n is 1-3; and the --(CH.sub.2).sub.n -- group, optionally, is substituted by 1-3 methyl groups or by fluorine.

  13. Delay tolerant networks

    CERN Document Server

    Gao, Longxiang; Luan, Tom H

    2015-01-01

    This brief presents emerging and promising communication methods for network reliability via delay tolerant networks (DTNs). Different from traditional networks, DTNs possess unique features, such as long latency and unstable network topology. As a result, DTNs can be widely applied to critical applications, such as space communications, disaster rescue, and battlefield communications. The brief provides a complete investigation of DTNs and their current applications, from an overview to the latest development in the area. The core issue of data forward in DTNs is tackled, including the importance of social characteristics, which is an essential feature if the mobile devices are used for human communication. Security and privacy issues in DTNs are discussed, and future work is also discussed.

  14. Cigotica programme: pediatric experiences

    Directory of Open Access Journals (Sweden)

    Lešović Snežana

    2011-01-01

    Full Text Available Introduction The alarming spread of obesity epidemic in children and adolsecents, as well as the absence of tested and efficient measures and programmes on obesity preven­tion indicate the necessity for the establishment of the Centre for the prevention, treatment and rehabilitation of obesity in children and adolescents and the 'Cigotica Programme' at the Special Hospital 'Zlatibor'. The advantage of the 'Cigotica' Programme is the multidisciplinary approach to treating obese children, which implies specific education, dietetic interventions with the reduction in the total daily calorie intake, physical activity, medical, educational and psychological support, change of behavior and lifestyle. Objective To define obesity complications, metabolic risk factors and treatment effects on body composition and metabolic parameters in adolescents participating in the 'Cigotica' Programme. Method 1,030 adolescents were examined (498 girls and 532 boys, aged 12 to 18, average age 15.45, diagnosed with primary obesity, hospitalized at the Centre for the prevention, treatment and rehabilitation of obesity in children and adolescents at the Special Hospital 'Zlatibor', in the period from 27/07/2008 to 03/10/2010. Hospitalization lasted 21 days. Obesity criterion was body mass index (BMI > +2 SD . Body The Special Hospital for the Thyroid Gland and Metabolism Zlatibor mass, BMI, % of fat were obtained by means of Tanita scales for determining body composition using the impendence method. Apart from medical examination, blood pressure was also taken. The levels of triglycerides, total HDL and LDL cholesterols, uric acids and glycemia were determined on the second and twenty-first day of hospitalization after a 12-day fasting period. Results After the multidisciplinary treatment, the average reduction in body mass (p< 0.05 in all adolescents was 5.92 ± 2.71 kg, in boys - 6.24 ±3.24 kg, and in girls -5.86±2.4. During the 21-day hospitalization, the average

  15. Synchronizing time delay systems using variable delay in coupling

    Energy Technology Data Exchange (ETDEWEB)

    Ambika, G., E-mail: g.ambika@iiserpune.ac.in [Indian Institute of Science Education and Research, Pune 411 021 (India); Amritkar, R.E., E-mail: amritkar@prl.res.in [Physical Research Laboratory, Ahmedabad 380 009 (India)

    2011-11-15

    Highlights: > Delay and anticipation in coupling function varies with system dynamics. > Delay or anticipation of the synchronized state is independent of system delay. > Stability analysis developed is quite general. > We demonstrate enhanced security in communication. > Generalized synchronization possible over a wide range of parameter mismatch. - Abstract: We present a mechanism for synchronizing time delay systems using one way coupling with a variable delay in coupling that is reset at finite intervals. We present the analysis of the error dynamics that helps to isolate regions of stability of the synchronized state in the parameter space of interest for single and multiple delays. We supplement this by numerical simulations in a standard time delay system like Mackey Glass system. This method has the advantage that it can be adjusted to be delay or anticipatory in synchronization with a time which is independent of the system delay. We demonstrate the use of this method in communication using the bi channel scheme. We show that since the synchronizing channel carries information from transmitter only at intervals of reset time, it is not susceptible to an easy reconstruction.

  16. Digitally Programmable High-Q Voltage Mode Universal Filter

    Directory of Open Access Journals (Sweden)

    D. Singh

    2013-12-01

    Full Text Available A new low-voltage low-power CMOS current feedback amplifier (CFA is presented in this paper. This is used to realize a novel digitally programmable CFA (DPCFA using transistor arrays and MOS switches. The proposed realizations nearly allow rail-to-rail swing capability at all the ports. Class-AB output stage ensures low power dissipation and high current drive capability. The proposed CFA/ DPCFA operates at supply voltage of ±0.75 V and exhibits bandwidth better than 95 MHz. An application of the DPCFA to realize a novel voltage mode high-Q digitally programmable universal filter (UF is given. Performances of all the proposed circuits are verified by PSPICE simulation using TSMC 0.25μm technology parameters.

  17. Programmable ferroelectric tunnel memristor

    Directory of Open Access Journals (Sweden)

    Andy eQuindeau

    2014-02-01

    Full Text Available We report an analogously programmable memristor based on genuine electronic resistive switching combining ferroelectric switching and electron tunneling. The tunnel current through an 8 unit cell thick epitaxial Pb(Zr[0.2]Ti[0.8]O[3] film sandwiched between La[0.7]Sr[0.3]MnO[3] and cobalt electrodes obeys the Kolmogorov-Avrami-Ishibashi model for bidimensional growth with a characteristic switching time in the order of 10^-7 seconds. The analytical description of switching kinetics allows us to develop a characteristic transfer function that has only one parameter viz. the characteristic switching time and fully predicts the resistive states of this type of memristor.

  18. Programmable Cadence Timer

    Science.gov (United States)

    Hall, William A.; Gilbert, John

    1990-01-01

    Electronic metronome paces users through wide range of exercise routines. Conceptual programmable cadence timer provides rhythmic aural and visual cues. Timer automatically changes cadence according to program entered by the user. It also functions as clock, stopwatch, or alarm. Modular pacer operated as single unit or as two units. With audiovisual module moved away from base module, user concentrates on exercise cues without distraction from information appearing on the liquid-crystal display. Variety of uses in rehabilitative medicine, experimental medicine, sports, and gymnastics. Used in intermittent positive-pressure breathing treatment, in which patient must rhythmically inhale and retain medication delivered under positive pressure; and in incentive spirometer treatment, in which patient must inhale maximally at regular intervals.

  19. Programmable multimode quantum networks

    Science.gov (United States)

    Armstrong, Seiji; Morizur, Jean-François; Janousek, Jiri; Hage, Boris; Treps, Nicolas; Lam, Ping Koy; Bachor, Hans-A.

    2012-08-01

    Entanglement between large numbers of quantum modes is the quintessential resource for future technologies such as the quantum internet. Conventionally, the generation of multimode entanglement in optics requires complex layouts of beamsplitters and phase shifters in order to transform the input modes into entangled modes. Here we report the highly versatile and efficient generation of various multimode entangled states with the ability to switch between different linear optics networks in real time. By defining our modes to be combinations of different spatial regions of one beam, we may use just one pair of multi-pixel detectors in order to measure multiple entangled modes. We programme virtual networks that are fully equivalent to the physical linear optics networks they are emulating. We present results for N=2 up to N=8 entangled modes here, including N=2, 3, 4 cluster states. Our approach introduces the highly sought after attributes of flexibility and scalability to multimode entanglement.

  20. Photovoltaic programme - edition 2003

    Energy Technology Data Exchange (ETDEWEB)

    NONE

    2003-07-01

    This publication issued by the Swiss Federal Office of Energy's Photovoltaics (PV) Programme presents an overview (in English) of activities and projects in the photovoltaics research and pilot and demonstration area in Switzerland. Progress in the area of future solar cell technologies, modules and building integration, system technologies, planning and operating aids is summarised. Also, PV for applications in developing countries, thermo-photovoltaics and international co-operation are commented on. In the area of pilot and demonstration projects, component development, PV integration in sloping roofs, on flat roofs and noise barriers as well as further PV plant are looked at. Also, measurement campaigns, studies, statistics and further PV-related topics are summarised. This volume also presents the abstracts of reports made by the project managers of 73 research and pilot and demonstration projects in these areas for 2002.

  1. Concurrent Delay in Construction Disputes

    DEFF Research Database (Denmark)

    Cavaleri, Sylvie Cécile

    Delay is one of the issues most frequently encountered in today’s construction industry; it causes significant economic damage to all parties involved. Construction contracts, standard and bespoke, almost invariably consider delay from a perspective of single liability. If the event causing...... solutions to the issue of concurrent delay in a comparative perspective between common and civil law systems, with an emphasis on Danish and English law....

  2. Location Estimation using Delayed Measurements

    DEFF Research Database (Denmark)

    Bak, Martin; Larsen, Thomas Dall; Nørgård, Peter Magnus

    1998-01-01

    When combining data from various sensors it is vital to acknowledge possible measurement delays. Furthermore, the sensor fusion algorithm, often a Kalman filter, should be modified in order to handle the delay. The paper examines different possibilities for handling delays and applies a new...... technique to a sensor fusion system for estimating the location of an autonomous guided vehicle. The system fuses encoder and vision measurements in an extended Kalman filter. Results from experiments in a real environment are reported...

  3. Circuit QED with transmon qubits

    Energy Technology Data Exchange (ETDEWEB)

    Wulschner, Karl Friedrich; Puertas, Javier; Baust, Alexander; Eder, Peter; Fischer, Michael; Goetz, Jan; Haeberlein, Max; Schwarz, Manuel; Xie, Edwar; Zhong, Ling; Deppe, Frank; Fedorov, Kirill; Marx, Achim; Menzel, Edwin; Gross, Rudolf [Walther-Meissner-Institut, Bayerische Akademie der Wissenschaften, Garching (Germany); Physik-Department, TU Muenchen, Garching (Germany); Nanosystems Initiative Munich (NIM), Muenchen (Germany); Huebl, Hans [Walther-Meissner-Institut, Bayerische Akademie der Wissenschaften, Garching (Germany); Nanosystems Initiative Munich (NIM), Muenchen (Germany); Weides, Martin [Karlsruhe Institute of Technology (KIT), Karlsruhe (Germany)

    2015-07-01

    Superconducting quantum bits are basic building blocks for circuit QED systems. Applications in the fields of quantum computation and quantum simulation require long coherence times. We have fabricated and characterized superconducting transmon qubits which are designed to operate at a high ratio of Josephson energy and charging energy. Due to their low sensitivity to charge noise transmon qubits show good coherence properties. We couple transmon qubits to coplanar waveguide resonators and coplanar slotline resonators and characterize the devices at mK-temperatures. From the experimental data we derive the qubit-resonator coupling strength, the qubit relaxation time and calibrate the photon number in the resonator via Stark shifts.

  4. Pragmatic circuits signals and filters

    CERN Document Server

    Eccles, William

    2006-01-01

    Pragmatic Circuits: Signals and Filters is built around the processing of signals. Topics include spectra, a short introduction to the Fourier series, design of filters, and the properties of the Fourier transform. The focus is on signals rather than power. But the treatment is still pragmatic. For example, the author accepts the work of Butterworth and uses his results to design filters in a fairly methodical fashion. This third of three volumes finishes with a look at spectra by showing how to get a spectrum even if a signal is not periodic. The Fourier transform provides a way of dealing wi

  5. Quantum Memristors with Superconducting Circuits.

    Science.gov (United States)

    Salmilehto, J; Deppe, F; Di Ventra, M; Sanz, M; Solano, E

    2017-02-14

    Memristors are resistive elements retaining information of their past dynamics. They have garnered substantial interest due to their potential for representing a paradigm change in electronics, information processing and unconventional computing. Given the advent of quantum technologies, a design for a quantum memristor with superconducting circuits may be envisaged. Along these lines, we introduce such a quantum device whose memristive behavior arises from quasiparticle-induced tunneling when supercurrents are cancelled. For realistic parameters, we find that the relevant hysteretic behavior may be observed using current state-of-the-art measurements of the phase-driven tunneling current. Finally, we develop suitable methods to quantify memory retention in the system.

  6. Printed circuit dispersive transmission line

    Science.gov (United States)

    Ikezi, Hiroyuki; Lin-Liu, Yuh-Ren; DeGrassie, John S.

    1991-01-01

    A printed circuit dispersive transmission line structure is disclosed comprising an insulator, a ground plane formed on one surface of the insulator, a first transmission line formed on a second surface of the insulator, and a second transmission line also formed on the second surface of the insulator and of longer length than the first transmission line and periodically intersecting the first transmission line. In a preferred embodiment, the transmission line structure exhibits highly dispersive characteristics by designing the length of one of the transmission line between two adjacent periodic intersections to be longer than the other.

  7. HF radio systems and circuits

    CERN Document Server

    Sabin, William

    1998-01-01

    A comprehensive reference for the design of high frequency communications systems and equipment. This revised edition is loaded with practical data, much of which cannot be found in other reference books. Its approach to the subject follows the needs of an engineer from system definition and performance requirements down to the individual circuit elements that make up radio transmitters and receivers. The accompanying disk contains updated software on filters, matching networks and receiver analysis. SciTech Publishing also provides many other products related to Communication Systems Design.

  8. Circuit for Driving Piezoelectric Transducers

    Science.gov (United States)

    Randall, David P.; Chapsky, Jacob

    2009-01-01

    The figure schematically depicts an oscillator circuit for driving a piezoelectric transducer to excite vibrations in a mechanical structure. The circuit was designed and built to satisfy application-specific requirements to drive a selected one of 16 such transducers at a regulated amplitude and frequency chosen to optimize the amount of work performed by the transducer and to compensate for both (1) temporal variations of the resonance frequency and damping time of each transducer and (2) initially unknown differences among the resonance frequencies and damping times of different transducers. In other words, the circuit is designed to adjust itself to optimize the performance of whichever transducer is selected at any given time. The basic design concept may be adaptable to other applications that involve the use of piezoelectric transducers in ultrasonic cleaners and other apparatuses in which high-frequency mechanical drives are utilized. This circuit includes three resistor-capacitor networks that, together with the selected piezoelectric transducer, constitute a band-pass filter having a peak response at a frequency of about 2 kHz, which is approximately the resonance frequency of the piezoelectric transducers. Gain for generating oscillations is provided by a power hybrid operational amplifier (U1). A junction field-effect transistor (Q1) in combination with a resistor (R4) is used as a voltage-variable resistor to control the magnitude of the oscillation. The voltage-variable resistor is part of a feedback control loop: Part of the output of the oscillator is rectified and filtered for use as a slow negative feedback to the gate of Q1 to keep the output amplitude constant. The response of this control loop is much slower than 2 kHz and, therefore, does not introduce significant distortion of the oscillator output, which is a fairly clean sine wave. The positive AC feedback needed to sustain oscillations is derived from sampling the current through the

  9. Time Delay of CGM Sensors

    Science.gov (United States)

    Schmelzeisen-Redeker, Günther; Schoemaker, Michael; Kirchsteiger, Harald; Freckmann, Guido; Heinemann, Lutz; del Re, Luigi

    2015-01-01

    Background: Continuous glucose monitoring (CGM) is a powerful tool to support the optimization of glucose control of patients with diabetes. However, CGM systems measure glucose in interstitial fluid but not in blood. Rapid changes in one compartment are not accompanied by similar changes in the other, but follow with some delay. Such time delays hamper detection of, for example, hypoglycemic events. Our aim is to discuss the causes and extent of time delays and approaches to compensate for these. Methods: CGM data were obtained in a clinical study with 37 patients with a prototype glucose sensor. The study was divided into 5 phases over 2 years. In all, 8 patients participated in 2 phases separated by 8 months. A total number of 108 CGM data sets including raw signals were used for data analysis and were processed by statistical methods to obtain estimates of the time delay. Results: Overall mean (SD) time delay of the raw signals with respect to blood glucose was 9.5 (3.7) min, median was 9 min (interquartile range 4 min). Analysis of time delays observed in the same patients separated by 8 months suggests a patient dependent delay. No significant correlation was observed between delay and anamnestic or anthropometric data. The use of a prediction algorithm reduced the delay by 4 minutes on average. Conclusions: Prediction algorithms should be used to provide real-time CGM readings more consistent with simultaneous measurements by SMBG. Patient specificity may play an important role in improving prediction quality. PMID:26243773

  10. Delayed visual maturation and autism.

    Science.gov (United States)

    Goodman, R; Ashby, L

    1990-09-01

    Three boys are described with a mixed developmental disorder, which so far appears to have a relatively good prognosis. Each boy presented in early infancy with visual unresponsiveness, which spontaneously resolved. This delayed visual maturation was accompanied or followed by severe autistic impairment, general developmental delay, hypotonia and clumsiness. Subsequent progress has been unexpectedly favourable, with striking improvements in language, play, social interest and social competence. Widespread, patchy delay in brain maturation could possibly account for this combination of delayed visual maturation and autism, with a good prognosis.

  11. Generalized synchronization-based multiparameter estimation in modulated time-delayed systems

    Science.gov (United States)

    Ghosh, Dibakar; Bhattacharyya, Bidyut K.

    2011-09-01

    We propose a nonlinear active observer based generalized synchronization scheme for multiparameter estimation in time-delayed systems with periodic time delay. A sufficient condition for parameter estimation is derived using Krasovskii-Lyapunov theory. The suggested tool proves to be globally and asymptotically stable by means of Krasovskii-Lyapunov method. With this effective method, parameter identification and generalized synchronization of modulated time-delayed systems with all the system parameters unknown, can be achieved simultaneously. We restrict our study for multiple parameter estimation in modulated time-delayed systems with single state variable only. Theoretical proof and numerical simulation demonstrate the effectiveness and feasibility of the proposed technique. The block diagram of electronic circuit for multiple time delay system shows that the method is easily applicable in practical communication problems.

  12. An automatic bibliography indexing programme

    Directory of Open Access Journals (Sweden)

    J. W. Morris

    1974-12-01

    Full Text Available A relatively simple FORTRAN IV programme, designed for a small computer, for author and key-word indexes to bibliographic records is described, and examples of output are given. It is com­pared with some other systems. Suggested improvements to the programme are given.

  13. Climate Ambassador Programmes in Municipalities

    DEFF Research Database (Denmark)

    Jørgensen, Michael Søgaard; Pedersen, Stine Rahbek

    2016-01-01

    in the municipalities of Furesø, Lyngby-Taarbæk, Frederiksberg and Hvidovre. Two of the ambassador programmes presented here focus primarily on climate change mitigation initiatives, and two have a broader focus on sustainable development. Important elements for the impact of these programmes are the networking among...

  14. Programmable architecture for quantum computing

    NARCIS (Netherlands)

    Chen, J.; Wang, L.; Charbon, E.; Wang, B.

    2013-01-01

    A programmable architecture called “quantum FPGA (field-programmable gate array)” (QFPGA) is presented for quantum computing, which is a hybrid model combining the advantages of the qubus system and the measurement-based quantum computation. There are two kinds of buses in QFPGA, the local bus and

  15. Undergraduate Programme: Admissions for 2013

    Indian Academy of Sciences (India)

    IAS Admin

    2013-02-01

    Feb 1, 2013 ... Undergraduate Programme: Admissions for 2013. The Indian Institute of Science, a leading institution of higher learning with a strong tradition of research, offers a four-year Bachelor of Science (B.S.) Programme which is designed as a balanced blend of core science and interdisciplinary topics to serve as ...

  16. Designing and engineering evolutionary robust genetic circuits

    Directory of Open Access Journals (Sweden)

    Lieviant Jane A

    2010-11-01

    Full Text Available Abstract Background One problem with engineered genetic circuits in synthetic microbes is their stability over evolutionary time in the absence of selective pressure. Since design of a selective environment for maintaining function of a circuit will be unique to every circuit, general design principles are needed for engineering evolutionary robust circuits that permit the long-term study or applied use of synthetic circuits. Results We first measured the stability of two BioBrick-assembled genetic circuits propagated in Escherichia coli over multiple generations and the mutations that caused their loss-of-function. The first circuit, T9002, loses function in less than 20 generations and the mutation that repeatedly causes its loss-of-function is a deletion between two homologous transcriptional terminators. To measure the effect between transcriptional terminator homology levels and evolutionary stability, we re-engineered six versions of T9002 with a different transcriptional terminator at the end of the circuit. When there is no homology between terminators, the evolutionary half-life of this circuit is significantly improved over 2-fold and is independent of the expression level. Removing homology between terminators and decreasing expression level 4-fold increases the evolutionary half-life over 17-fold. The second circuit, I7101, loses function in less than 50 generations due to a deletion between repeated operator sequences in the promoter. This circuit was re-engineered with different promoters from a promoter library and using a kanamycin resistance gene (kanR within the circuit to put a selective pressure on the promoter. The evolutionary stability dynamics and loss-of-function mutations in all these circuits are described. We also found that on average, evolutionary half-life exponentially decreases with increasing expression levels. Conclusions A wide variety of loss-of-function mutations are observed in BioBrick-assembled genetic

  17. Designing and engineering evolutionary robust genetic circuits.

    Science.gov (United States)

    Sleight, Sean C; Bartley, Bryan A; Lieviant, Jane A; Sauro, Herbert M

    2010-11-01

    One problem with engineered genetic circuits in synthetic microbes is their stability over evolutionary time in the absence of selective pressure. Since design of a selective environment for maintaining function of a circuit will be unique to every circuit, general design principles are needed for engineering evolutionary robust circuits that permit the long-term study or applied use of synthetic circuits. We first measured the stability of two BioBrick-assembled genetic circuits propagated in Escherichia coli over multiple generations and the mutations that caused their loss-of-function. The first circuit, T9002, loses function in less than 20 generations and the mutation that repeatedly causes its loss-of-function is a deletion between two homologous transcriptional terminators. To measure the effect between transcriptional terminator homology levels and evolutionary stability, we re-engineered six versions of T9002 with a different transcriptional terminator at the end of the circuit. When there is no homology between terminators, the evolutionary half-life of this circuit is significantly improved over 2-fold and is independent of the expression level. Removing homology between terminators and decreasing expression level 4-fold increases the evolutionary half-life over 17-fold. The second circuit, I7101, loses function in less than 50 generations due to a deletion between repeated operator sequences in the promoter. This circuit was re-engineered with different promoters from a promoter library and using a kanamycin resistance gene (kanR) within the circuit to put a selective pressure on the promoter. The evolutionary stability dynamics and loss-of-function mutations in all these circuits are described. We also found that on average, evolutionary half-life exponentially decreases with increasing expression levels. A wide variety of loss-of-function mutations are observed in BioBrick-assembled genetic circuits including point mutations, small insertions and

  18. Delay of gratification and delay discounting in rats.

    Science.gov (United States)

    Reynolds, Brady; de Wit, Harriet; Richards, Jerry

    2002-09-30

    Delay discounting (DD) and delay of gratification (DG) are two measures of impulsive behavior often viewed as reflecting the same or equivalent processes. However, there are some key differences in the contingencies of reinforcement between the procedures that may have implications for understanding impulsivity. This study used DD and DG procedures to determine if differences in contingencies of reinforcement specified by DD and DG alters how much organisms discount the value of delayed reinforcers. Twenty-four water-deprived rats performed one of two Adjusting Amount procedures, which consisted of repeated choices between a fixed amount of water (250 &mgr;l) delivered after a delay (0, 4, 8, 16, or 32 s) and an adjusting, usually lesser amount delivered immediately. Half of the rats (n=12) performed a DD procedure designed to assess preference for immediate over delayed reinforcers in which they had discrete choices between the immediate and delayed amounts of water. A DG procedure was used for the other half of the rats (n=12). In the DG procedure rats also selected between immediate and delayed alternatives, but if they chose the delayed alternative they could switch to and receive the immediate alternative at any time during the delay to the larger reward. In the DD procedure switching responses were not reinforced but were still recorded and used for analyses. The DD functions of the two groups did not differ significantly. However, at the longer delays, the DG group made significantly fewer switching responses than the DD group. A possible role of response inhibition in the DG procedure is discussed.

  19. Breaking Lorentz Reciprocity with Frequency Conversion and Delay

    Science.gov (United States)

    Rosenthal, Eric I.; Chapman, Benjamin J.; Higginbotham, Andrew P.; Kerckhoff, Joseph; Lehnert, K. W.

    2017-10-01

    We introduce a method for breaking Lorentz reciprocity based upon the noncommutation of frequency conversion and delay. The method requires no magnetic materials or resonant physics, allowing for the design of scalable and broadband nonreciprocal circuits. With this approach, two types of gyrators—universal building blocks for linear, nonreciprocal circuits—are constructed. Using one of these gyrators, we create a circulator with >15 dB of isolation across the 5-9 GHz band. Our designs may be readily extended to any platform with suitable frequency conversion elements, including semiconducting devices for telecommunication or an on-chip superconducting implementation for quantum information processing.

  20. Multifrequency zero-jitter delay-locked loop

    Science.gov (United States)

    Efendovich, Avner; Afek, Yachin; Sella, Coby; Bikowsky, Zeev

    1994-01-01

    The approach of an all-digital phase locked loop is used in this delay-locked loop circuit. This design is designated to a system with two processing units, a master CPU and a slave system chip, that share the same bus. It allows maximum utilization of the bus, as the minimal skew between the clocks of the two components significantly reduces idle periods, and also set-up and hold times. Changes in the operating frequency are possible, without falling out of synchronization. Due to the special lead-lag phase detector, the jitter of the clock is zero, when the loop is locked, under any working conditions.

  1. Bounded Delay Timing Analysis of a Class of CSP Programs

    DEFF Research Database (Denmark)

    Hulgaard, Henrik; Burns, Steven M.

    1997-01-01

    . Such a description is transformed into a safe Petri net with interval time delays specified on the places of the net. The timing analysis we perform determines the extreme separation in time between two communication actions of the CSP program for all possible timed executions of the system. We formally define......We describe an algebraic technique for performing timing analysis of a class of asynchronous circuits described as CSP programs (including Martin's probe operator) with the restrictions that there is no OR-causality and that guard selection is either completely free or mutually exclusive...

  2. Auditing emergency management programmes: Measuring leading indicators of programme performance.

    Science.gov (United States)

    Tomsic, Heather

    Emergency Management Programmes benefit from review and measurement against established criteria. By measuring current vs required programme elements for their actual currency, completeness and effectiveness, the resulting timely reports of achievements and documentation of identified gaps can effectively be used to rationally support prioritised improvement. Audits, with their detailed, triangulated and objectively weighted processes, are the ultimate approach in terms of programme content measurement. Although Emergency Management is often presented as a wholly separate operational mechanism, distinct and functionally different from the organisation's usual management structure, this characterisation is only completely accurate while managing an emergency itself. Otherwise, an organisation's Emergency Management Programme is embedded within that organisation and dependent upon it. Therefore, the organisation's culture and structure of management, accountability and measurement must be engaged for the programme to exist, much less improve. A wise and successful Emergency Management Coordinator does not let the separate and distinct nature of managing an emergency obscure their realisation of the need for an organisation to understand and manage all of the other programme components as part of its regular business practices. This includes its measurement. Not all organisations are sufficiently large or capable of supporting the use of an audit. This paper proposes that alternate, less formal, yet effective mechanisms can be explored, as long as they reflect and support organisational management norms, including a process of relatively informal measurement focused on the organisation's own perception of key Emergency Management Programme performance indicators.

  3. Noise Analysis of Switched-Capacitor Circuits

    Science.gov (United States)

    Retdian, Nicodimus; Takagi, Shigetaka

    Switched-capacitor (SC) circuit has been a well known analog circuit block. Since their characteristics are determined by capacitance ratio, SC circuits are suitable for on-chip implementations. Eventhough there are so many publications on the design of SC circuits, only a few of them discuss the property of noise in SC circuits. Linear noise analysis are common in continuous-time systems. However, SC circuits are operating in discrete-time domain and their noise properties are known to be a non-linear phenomenon and dificult to be analyzed by hand. This paper will show a noise analysis of an SC integrator as an example for a better understanding of the analysis method. It will be shown by simulation results that the proposed formula gives a better approximation of noise power spectral density (PSD).

  4. A concise guide to chaotic electronic circuits

    CERN Document Server

    Buscarino, Arturo; Frasca, Mattia; Sciuto, Gregorio

    2014-01-01

    This brief provides a source of instruction from which students can be taught about the practicalities of designing and using chaotic circuits. The text provides information on suitable materials, circuit design and schemes for design realization. Readers are then shown how to reproduce experiments on chaos and to design new ones. The text guides the reader easily from the basic idea of chaos to the laboratory test providing an experimental basis that can be developed for such applications as secure communications. This brief provides introductory information on sample chaotic circuits, includes coverage of their development, and the “gallery” section provides information on a wide range of circuits. Concise Guide to Chaotic Electronic Circuits will be useful to anyone running a laboratory class involving chaotic circuits and to students wishing to learn about them.

  5. A Singularity in the Kirchhoff's Circuit Equations

    CERN Document Server

    Harsha, N R Sree

    2016-01-01

    Students often have difficulty in understanding qualitatively the behaviour of simple electric circuits. In particular, as different studies have shown, they find multiple batteries connected in multiple loops difficult to analyse. In a recent paper [Phys. Educ. 50 568 (2015)], we showed such an electric circuit, which consists of ideal batteries connected in parallel, that couldn't be solved by the existing circuit analysis methods. In this paper, we shall introduce a new mathematical method of solving simple electric circuits from the solutions of more general circuits and show that the currents, in this particular circuit, take the indeterminate 0/0 form. We shall also present some of the implications of teaching the method. We believe that the description presented in this paper should help the instructors in teaching the behaviour of multiple batteries connected in parallel.

  6. The management of cardiovascular disease in the Netherlands: analysis of different programmes

    Directory of Open Access Journals (Sweden)

    Jane M. Cramm

    2013-08-01

    Full Text Available Background: Disease management programmes are increasingly used to improve the efficacy and effectiveness of chronic care delivery.But, disease management programme development and implementation is a complex undertaking that requires effective decision-making.Choices made in the earliest phases of programme development are crucial, as they ultimately impact costs, outcomes and sustainability. Methods: To increase our understanding of the choices that primary healthcare practices face when implementing such programmes and to stimulate successful implementation and sustainability, we compared the early implementation of eight cardiovascular disease management programmes initiated and managed by healthcare practices in various regions of the Netherlands. Using a mixed-methods design, we identified differences in and challenges to programme implementation in terms of context, patient characteristics, disease management level, healthcare utilisation costs, development costs and health-related quality of life. Results: Shifting to a multidisciplinary, patient-centred care pathway approach to disease management is demanding for organisations, professionals and patients, and is especially vulnerable when sustainable change is the goal. Funding is an important barrier to sustainable implementation of cardiovascular disease management programmes, although development costs of the individual programmes varied considerably in relation to the length of the development period. The large number of professionals involved in combination with duration of programme development was the largest cost drivers. While Information and Communication Technology systems to support the new care pathways did not directly contribute to higher costs, delays in implementation indirectly did. Conclusions: Developing and implementing cardiovascular disease management programmes is time-consuming and challenging. Multidisciplinary, patient-centred care demands multifaceted changes

  7. The management of cardiovascular disease in the Netherlands: analysis of different programmes.

    Science.gov (United States)

    Cramm, Jane M; Tsiachristas, Apostolos; Walters, Bethany H; Adams, Samantha A; Bal, Roland; Huijsman, Robbert; Rutten-Van Mölken, Maureen P M H; Nieboer, Anna P

    2013-01-01

    Disease management programmes are increasingly used to improve the efficacy and effectiveness of chronic care delivery. But, disease management programme development and implementation is a complex undertaking that requires effective decision-making. Choices made in the earliest phases of programme development are crucial, as they ultimately impact costs, outcomes and sustainability. To increase our understanding of the choices that primary healthcare practices face when implementing such programmes and to stimulate successful implementation and sustainability, we compared the early implementation of eight cardiovascular disease management programmes initiated and managed by healthcare practices in various regions of the Netherlands. Using a mixed-methods design, we identified differences in and challenges to programme implementation in terms of context, patient characteristics, disease management level, healthcare utilisation costs, development costs and health-related quality of life. Shifting to a multidisciplinary, patient-centred care pathway approach to disease management is demanding for organisations, professionals and patients, and is especially vulnerable when sustainable change is the goal. Funding is an important barrier to sustainable implementation of cardiovascular disease management programmes, although development costs of the individual programmes varied considerably in relation to the length of the development period. The large number of professionals involved in combination with duration of programme development was the largest cost drivers. While Information and Communication Technology systems to support the new care pathways did not directly contribute to higher costs, delays in implementation indirectly did. Developing and implementing cardiovascular disease management programmes is time-consuming and challenging. Multidisciplinary, patient-centred care demands multifaceted changes in routine care. As care pathways become more complex, they

  8. The management of cardiovascular disease in the Netherlands: analysis of different programmes

    Directory of Open Access Journals (Sweden)

    Jane M. Cramm

    2013-08-01

    Full Text Available Background: Disease management programmes are increasingly used to improve the efficacy and effectiveness of chronic care delivery.But, disease management programme development and implementation is a complex undertaking that requires effective decision-making.Choices made in the earliest phases of programme development are crucial, as they ultimately impact costs, outcomes and sustainability.Methods: To increase our understanding of the choices that primary healthcare practices face when implementing such programmes and to stimulate successful implementation and sustainability, we compared the early implementation of eight cardiovascular disease management programmes initiated and managed by healthcare practices in various regions of the Netherlands. Using a mixed-methods design, we identified differences in and challenges to programme implementation in terms of context, patient characteristics, disease management level, healthcare utilisation costs, development costs and health-related quality of life.Results: Shifting to a multidisciplinary, patient-centred care pathway approach to disease management is demanding for organisations, professionals and patients, and is especially vulnerable when sustainable change is the goal. Funding is an important barrier to sustainable implementation of cardiovascular disease management programmes, although development costs of the individual programmes varied considerably in relation to the length of the development period. The large number of professionals involved in combination with duration of programme development was the largest cost drivers. While Information and Communication Technology systems to support the new care pathways did not directly contribute to higher costs, delays in implementation indirectly did.Conclusions: Developing and implementing cardiovascular disease management programmes is time-consuming and challenging. Multidisciplinary, patient-centred care demands multifaceted changes in

  9. The management of cardiovascular disease in the Netherlands: analysis of different programmes

    Science.gov (United States)

    Cramm, Jane M.; Tsiachristas, Apostolos; Walters, Bethany H.; Adams, Samantha A.; Bal, Roland; Huijsman, Robbert; Rutten-Van Mölken, Maureen P.M.H.; Nieboer, Anna P.

    2013-01-01

    Background Disease management programmes are increasingly used to improve the efficacy and effectiveness of chronic care delivery. But, disease management programme development and implementation is a complex undertaking that requires effective decision-making. Choices made in the earliest phases of programme development are crucial, as they ultimately impact costs, outcomes and sustainability. Methods To increase our understanding of the choices that primary healthcare practices face when implementing such programmes and to stimulate successful implementation and sustainability, we compared the early implementation of eight cardiovascular disease management programmes initiated and managed by healthcare practices in various regions of the Netherlands. Using a mixed-methods design, we identified differences in and challenges to programme implementation in terms of context, patient characteristics, disease management level, healthcare utilisation costs, development costs and health-related quality of life. Results Shifting to a multidisciplinary, patient-centred care pathway approach to disease management is demanding for organisations, professionals and patients, and is especially vulnerable when sustainable change is the goal. Funding is an important barrier to sustainable implementation of cardiovascular disease management programmes, although development costs of the individual programmes varied considerably in relation to the length of the development period. The large number of professionals involved in combination with duration of programme development was the largest cost drivers. While Information and Communication Technology systems to support the new care pathways did not directly contribute to higher costs, delays in implementation indirectly did. Conclusions Developing and implementing cardiovascular disease management programmes is time-consuming and challenging. Multidisciplinary, patient-centred care demands multifaceted changes in routine care. As

  10. Electrically Variable or Programmable Nonvolatile Capacitors

    Science.gov (United States)

    Shangqing, Liu; NaiJuan, Wu; Ignatieu, Alex; Jianren, Li

    2009-01-01

    Electrically variable or programmable capacitors based on the unique properties of thin perovskite films are undergoing development. These capacitors show promise of overcoming two important deficiencies of prior electrically programmable capacitors: Unlike in the case of varactors, it is not necessary to supply power continuously to make these capacitors retain their capacitance values. Hence, these capacitors may prove useful as components of nonvolatile analog and digital electronic memories. Unlike in the case of ferroelectric capacitors, it is possible to measure the capacitance values of these capacitors without changing the values. In other words, whereas readout of ferroelectric capacitors is destructive, readout of these capacitors can be nondestructive. A capacitor of this type is a simple two terminal device. It includes a thin film of a suitable perovskite as the dielectric layer, sandwiched between two metal or metal oxide electrodes (for example, see Figure 1). The utility of this device as a variable capacitor is based on a phenomenon, known as electrical-pulse-induced capacitance (EPIC), that is observed in thin perovskite films and especially in those thin perovskite films that exhibit the colossal magnetoresistive (CMR) effect. In EPIC, the application of one or more electrical pulses that exceed a threshold magnitude (typically somewhat less than 1 V) gives rise to a nonvolatile change in capacitance. The change in capacitance depends on the magnitude duration, polarity, and number of pulses. It is not necessary to apply a magnetic field or to cool the device below (or heat it above) room temperature to obtain EPIC. Examples of suitable CMR perovskites include Pr(1-x)Ca(x)MnO3, La(1-x)S-r(x)MnO3,and Nb(1-x)Ca(x)MnO3. Figure 2 is a block diagram showing an EPIC capacitor connected to a circuit that can vary the capacitance, measure the capacitance, and/or measure the resistance of the capacitor.

  11. Coherent-feedback control in nanophotonic circuits

    Science.gov (United States)

    Mabuchi, Hideo

    2012-06-01

    The emerging discipline of coherent-feedback quantum control provides core concepts and methods for nanopho- tonic circuit theory, which can be assimilated within modern approaches to computer-aided design. Current research in this area includes the development of software tools to enable a schematic capture workflow for compilation and analysis of quantum stochastic models for nanophotonic circuits, exploration of elementary coherent-feedback circuit motifs, and laboratory demonstrations of quantum nonlinear photonic devices.

  12. Logarithmic current-measuring transistor circuits

    DEFF Research Database (Denmark)

    Højberg, Kristian Søe

    1967-01-01

    Describes two transistorized circuits for the logarithmic measurement of small currents suitable for nuclear reactor instrumentation. The logarithmic element is applied in the feedback path of an amplifier, and only one dual transistor is used as logarithmic diode and temperature compensating...... transistor. A simple one-amplifier circuit is compared with a two-amplifier system. The circuits presented have been developed in connexion with an amplifier using a dual m.o.s. transistor input stage with diode-protected gates....

  13. Hybrid Techniques for Quantum Circuit Simulation

    Science.gov (United States)

    2014-02-01

    manufacture, use, or sell any patented invention that may relate to them. This report was cleared for public release by the 88th ABW, Wright-Patterson AFB...that, for any unitary stabilizer circuit, there exists an equivalent block-structured canonical circuit that applies a block of Hadamard (H) gates...operation, we map it to a conventional logic circuit that processes the SNs in an appropriate way. A quantum gate G corresponds to a 2n × 2n unitary

  14. Analog MOS integrated circuits for signal processing

    Science.gov (United States)

    Gregorian, R.; Temes, G. C.

    Theoretical and practical aspects of analog MOS integrated circuits are discussed. The basic properties of these circuits are described, providing necessary background material in mathematics and semiconductor device physics and technology. The operation and design of such important circuits as switched-capacitor filters, analog-to-digital and digital-to-analog converters, amplifiers, modulators, and oscillators. Practical problems encountered in design are discussed, solutions are provided, and some examples of actual system applications are given.

  15. Quantum simulations with circuit quantum electrodynamics

    OpenAIRE

    Romero, G.; Solano, E.; Lamata, L.

    2016-01-01

    Superconducting circuits have become a leading quantum technology for testing fundamentals of quantum mechanics and for the implementation of advanced quantum information protocols. In this chapter, we revise the basic concepts of circuit network theory and circuit quantum electrodynamics for the sake of digital and analog quantum simulations of quantum field theories, relativistic quantum mechanics, and many-body physics, involving fermions and bosons. Based on recent improvements in scalabi...

  16. The analysis and design of linear circuits

    CERN Document Server

    Thomas, Roland E; Toussaint, Gregory J

    2009-01-01

    The Analysis and Design of Linear Circuits, 6e gives the reader the opportunity to not only analyze, but also design and evaluate linear circuits as early as possible. The text's abundance of problems, applications, pedagogical tools, and realistic examples helps engineers develop the skills needed to solve problems, design practical alternatives, and choose the best design from several competing solutions. Engineers searching for an accessible introduction to resistance circuits will benefit from this book that emphasizes the early development of engineering judgment.

  17. Inexact Subgraph Matching for Digital Circuit Analysis

    Science.gov (United States)

    2017-03-01

    circuit graph perspective. As a result, attempting to locate library structures within the larger circuit context via static analysis becomes an...e.g. imaging, biology, and large data set feature analysis ), however, and practical applications of it have been studied for some time. Many of...Digital Circuit Analysis Whitney Batchelor, Frederic Tuttle, Stephen Baka, Scott Harper Secure Computing & Communications Division MacAulay-Brown

  18. Delay dynamic equations with stability

    Directory of Open Access Journals (Sweden)

    Krueger Robert J

    2006-01-01

    Full Text Available We first give conditions which guarantee that every solution of a first order linear delay dynamic equation for isolated time scales vanishes at infinity. Several interesting examples are given. In the last half of the paper, we give conditions under which the trivial solution of a nonlinear delay dynamic equation is asymptotically stable, for arbitrary time scales.

  19. Registration Delay and Student Performance

    Science.gov (United States)

    Siefken, Jason

    2017-01-01

    Tracking the difference between the time a first-year student is allowed to register for a course and the time he or she does register for a course (a student's registration delay), we notice a negative correlation between registration delay and final grade in a course. The difference between a student who registers within the first two minutes…

  20. Delayed Reinforcement of Operant Behavior

    Science.gov (United States)

    Lattal, Kennon A.

    2010-01-01

    The experimental analysis of delay of reinforcement is considered from the perspective of three questions that seem basic not only to understanding delay of reinforcement but also, by implication, the contributions of temporal relations between events to operant behavior. The first question is whether effects of the temporal relation between…

  1. #FakeNobelDelayReasons

    CERN Document Server

    2013-01-01

    Tuesday’s hour-long delay of the Nobel Prize in Physics announcement was (and still is) quite the cause for speculation. But on the Twittersphere, it was simply the catalyst for some fantastic puns, so-bad-they're-good physics jokes and other shenanigans. Here are some of our favourite #FakeNobelDelayReasons.    

  2. Treatment delay among tuberculosis patients in Tanzania: Data from the FIDELIS Initiative

    Directory of Open Access Journals (Sweden)

    Enarson Donald A

    2011-05-01

    Full Text Available Abstract Background Several FIDELIS projects (Fund for Innovative DOTS Expansion through Local Initiatives to Stop TB in Tanzania were conducted by the National Tuberculosis and Leprosy Programme (NTLP during the years 2004-2008 to strengthen diagnostic and treatment services. These projects collected information on treatment delay and some of it was available for research purposes. With this database our objective was to assess the duration and determinants of treatment delay among new smear positive pulmonary tuberculosis (TB patients in FIDELIS projects, and to compare delay according to provider visited prior to diagnosis. Methods Treatment delay among new smear positive TB patients was recorded for each patient at treatment initiation and this information was available and fairly complete in 6 out of 57 districts with FIDELIS projects enrolling patients between 2004 and 2007; other districts had discarded their forms at the time of analysis. It was analysed as a cross sectional study. Results We included 1161 cases, 10% of all patients recruited in the FIDELIS projects in Tanzania. Median delay was 12 weeks. The median duration of cough, weight loss and haemoptysis was 12, 8 and 3 weeks, respectively. Compared to Hai district Handeni had patients with longer delays and Mbozi had patients with shorter delays. Urban and rural patients reported similar delays. Patients aged 15-24 years and patients of 65 years or older had longer delays. Patients reporting contact with traditional healers before diagnosis had a median delay of 15 weeks compared to 12 weeks among those who did not. Patients with dyspnoea and with diarrhoea had longer delays. Conclusion In this patient sample in Tanzania half of the new smear positive pulmonary tuberculosis patients had a treatment delay longer than 12 weeks. Delay was similar in men and women and among urban and rural patients, but longer in the young and older age groups. Patients using traditional healers had

  3. A new delay line loops shrinking time-to-digital converter in low-cost FPGA

    Energy Technology Data Exchange (ETDEWEB)

    Zhang, Jie, E-mail: zhangjie071063@163.com [State Key Laboratory of Geodesy and Earth’s Dynamics, Institute of Geodesy and Geophysics, CAS, Wuhan, China, 430077 (China); University of Chinese Academy of Sciences, Beijing, China, 100049 (China); Zhou, Dongming [State Key Laboratory of Geodesy and Earth’s Dynamics, Institute of Geodesy and Geophysics, CAS, Wuhan, China, 430077 (China)

    2015-01-21

    The article provides the design and test results of a new time-to-digital converter (TDC) based on delay line loops shrinking method and implemented in a low-cost field programmable gate array (FPGA) device. A technique that achieves high resolution with low cost and flexibility is presented. The technique is based on two delay line loops which are used to directly shrink the measured time interval in the designed TDC, and the resolution is dependent on the difference between the entire delay times of the two delay line loops. In order to realize high resolution and eliminate temperature influence, the two delay line loops consist of the same delay cells with the same number. A delay-locked loop (DLL) is used to stabilize the resolution against process variations and ambient conditions. Meanwhile, one method is used to accurately evaluate the resolution of the implemented TDC. The converter has been implemented in a general-propose FPGA device (Actel SmartFusion A2F200M3). A single shot resolution of the implemented converter is 63.3 ps and the measurement standard deviation is about 61.7 ps within the measurement range of 5 ns. - Highlights: • We provide a new FPGA-integrated time-to-digital converter based on delay line loops method which used two delay line loops to directly shrink time intervals with only rising edges. • The two delay line loops consist of the same delay cells with the same number and symmetrical structure. • The resolution is dependent on the difference between the entire delays of the two delay line loops. • We use delay-locked loop to stabilize the resolution against temperature and supply voltage.

  4. Implementation and low speed test of ultra-fast interface circuits for Josephson-CMOS hybrid memories

    Energy Technology Data Exchange (ETDEWEB)

    Fujiwara, K.; Miyakawa, H.; Yoshikawa, N.; Feng, Y.; Whiteley, S.R.; Van Duzer, T

    2003-10-15

    We have been developing Josephson-CMOS hybrid memories where high-density CMOS devices are used as storage cells. One of the key components in the system is the interface circuit, which amplifies the signal from the SFQ circuits into voltage level processible in the CMOS circuits at high-speed. In this paper, we have implemented the ultra-fast interface circuit, which is composed of a Josephson driver and a Josephson-CMOS hybrid amplifier. The propagation delay of the ultra-fast interface circuit is estimated to be about 60 ps assuming a 2.5 kA/cm{sup 2} Nb process and a 0.6 {mu}m CMOS process. A low speed test results of the interface circuit shows that it amplifies the input voltage of 80 {mu}V to 0.9 V. We have also investigated their propagation delay and output voltage swing assuming the spread of the critical current in the Josephson stack.

  5. High temperature superconducting digital circuits and subsystems

    Energy Technology Data Exchange (ETDEWEB)

    Martens, J.S.; Pance, A.; Whiteley, S.R.; Char, K.; Johansson, M.F.; Lee, L. [Conductus, Sunnyvale, CA (United States); Hietala, V.M.; Wendt, J.R. [Sandia National Labs., Albuquerque, NM (United States); Hou, S.Y.; Phillips, J. [AT and T Bell Labs., Murray Hill, NJ (United States)

    1993-10-01

    The advances in the fabrication of high temperature superconducting devices have enabled the demonstration of high performance and useful digital circuits and subsystems. The yield and uniformity of the devices is sufficient for circuit fabrication at the medium scale integration (MSI) level with performance not seen before at 77 K. The circuits demonstrated to date include simple gates, counters, analog to digital converters, and shift registers. All of these are mid-sized building blocks for potential applications in commercial and military systems. The processes used for these circuits and blocks will be discussed along with observed performance data.

  6. Ways to Optimize Analogue Switched Circuits

    Directory of Open Access Journals (Sweden)

    J. Hospodka

    2008-12-01

    Full Text Available This paper describes how analogue switched circuits (switched-capacitor and switched-current circuits can be optimized by means of a personal computer. The optimization of this kind of circuits is not so common and their analysis is more difficult in comparison with continuously working circuits. Firstly, the nonidealities occurring in these circuits whose effect on their characteristics should be optimized are discussed. Then a few ways to analyze analogue switched circuits are shown. From all optimization algorithms applicable for this kind of optimization, two ones that seem to be the most promising are proposed. The differential evolution (one of evolutionary algorithms combined with the simplex method was found to be most appropriate from these two ones. Two types of programs are required for the optimization of these circuits: a program for implementing calculations of the used optimization algorithm and a program for the analysis of the optimized circuit. Several suitable computer programs from both of the groups together with their proper settings according to authors’ experience are proposed. At the end of the paper, an example of a switched-current circuit optimization documenting the previous description is presented.

  7. Electric circuit theory applied electricity and electronics

    CERN Document Server

    Yorke, R

    1981-01-01

    Electric Circuit Theory provides a concise coverage of the framework of electrical engineering. Comprised of six chapters, this book emphasizes the physical process of electrical engineering rather than abstract mathematics. Chapter 1 deals with files, circuits, and parameters, while Chapter 2 covers the natural and forced response of simple circuit. Chapter 3 talks about the sinusoidal steady state, and Chapter 4 discusses the circuit analysis. The fifth chapter tackles frequency response of networks, and the last chapter covers polyphase systems. This book will be of great help to electrical

  8. Circuit complexity in quantum field theory

    Science.gov (United States)

    Jefferson, Robert A.; Myers, Robert C.

    2017-10-01

    Motivated by recent studies of holographic complexity, we examine the question of circuit complexity in quantum field theory. We provide a quantum circuit model for the preparation of Gaussian states, in particular the ground state, in a free scalar field theory for general dimensions. Applying the geometric approach of Nielsen to this quantum circuit model, the complexity of the state becomes the length of the shortest geodesic in the space of circuits. We compare the complexity of the ground state of the free scalar field to the analogous results from holographic complexity, and find some surprising similarities.

  9. Circuit For Control Of Electromechanical Prosthetic Hand

    Science.gov (United States)

    Bozeman, Richard J., Jr.

    1995-01-01

    Proposed circuit for control of electromechanical prosthetic hand derives electrical control signals from shoulder movements. Updated, electronic version of prosthesis, that includes two hooklike fingers actuated via cables from shoulder harness. Circuit built around favored shoulder harness, provides more dexterous movement, without incurring complexity of computer-controlled "bionic" or hydraulically actuated devices. Additional harness and potentiometer connected to similar control circuit mounted on other shoulder. Used to control stepping motor rotating hand about prosthetic wrist to one of number of angles consistent with number of digital outputs. Finger-control signals developed by circuit connected to first shoulder harness transmitted to prosthetic hand via sliprings at prosthetic wrist joint.

  10. Analog circuit design art, science, and personalities

    CERN Document Server

    Williams, Jim

    1991-01-01

    Analog Circuit Design: Art, Science, and Personalities discusses the many approaches and styles in the practice of analog circuit design. The book is written in an informal yet informative manner, making it easily understandable to those new in the field. The selection covers the definition, history, current practice, and future direction of analog design; the practice proper; and the styles in analog circuit design. The book also includes the problems usually encountered in analog circuit design; approach to feedback loop design; and other different techniques and applications. The text is

  11. Hybrid stretchable circuits on silicone substrate

    Energy Technology Data Exchange (ETDEWEB)

    Robinson, A., E-mail: adam.1.robinson@nokia.com; Aziz, A., E-mail: a.aziz1@lancaster.ac.uk [Nanoscience Centre, University of Cambridge, Cambridge CB01FF (United Kingdom); Liu, Q.; Suo, Z. [School of Engineering and Applied Sciences and Kavli Institute for Bionano Science and Technology, Harvard University, Cambridge, Massachusetts 02138 (United States); Lacour, S. P., E-mail: stephanie.lacour@epfl.ch [Centre for Neuroprosthetics and Laboratory for Soft Bioelectronics Interfaces, School of Engineering, Ecole Polytechnique Fédérale de Lausanne, Lausanne 1015 (Switzerland)

    2014-04-14

    When rigid and stretchable components are integrated onto a single elastic carrier substrate, large strain heterogeneities appear in the vicinity of the deformable-non-deformable interfaces. In this paper, we report on a generic approach to manufacture hybrid stretchable circuits where commercial electronic components can be mounted on a stretchable circuit board. Similar to printed circuit board development, the components are electrically bonded on the elastic substrate and interconnected with stretchable electrical traces. The substrate—a silicone matrix carrying concentric rigid disks—ensures both the circuit elasticity and the mechanical integrity of the most fragile materials.

  12. Continuous generation of delayed light

    Science.gov (United States)

    Smartsev, Slava; Eger, David; Davidson, Nir; Firstenberg, Ofer

    2017-11-01

    We use a four-wave mixing process to read-out light from atomic coherence which is continuously written. The light is continuously generated after an effective delay, allowing the atomic coherence to evolve during the process. Contrary to slow-light delay, which depends on the medium optical depth, here the generation delay is determined solely by the intensive properties of the system, approaching the atomic coherence lifetime at the weak driving limit. The atomic evolution during the generation delay is further manifested in the spatial profile of the generated light due to atomic diffusion. Continuous generation of light with a long intrinsic delay can replace discrete write–read procedures when the atomic evolution is the subject of interest.

  13. Summer Student Programme

    CERN Multimedia

    2006-01-01

    Date Time Title Speaker 05/07/2006 09:15 - 10:00 Presentation of the Summer Student Programme F. CERUTTI Information on Computing Rules D. HEAGERTY Workshops presentation O. ULLALAND 10:15 - 11:00 Introduction to CERN J. ENGELEN 11:15 Film on CERN 11:00 Introduction to Particle Physics F. CLOSE 11:15 - 12:00 Accelerators (1/5) S. GILARDONI / E. METRAL 12:00 Discussion Session 7/07/2006 09:15 - 11:00 Introduction to Particle Physics F. CLOSE 11:15 - 12:00 Accelerators (2/5) S. GILARDONI / E. METRAL 12:00 Discussion Session 09:15 - 10:00 Accelerators (3/5) S. GILARDONI / E. METRAL 10:15 - 12:00 Detectors (1-2/5) O. ULLALAND 12:00 Discussion Session 11/07/2006 09:15 - 10:00 Accelerators (4/5) S. GILARDONI / E. METRAL 10:15 - 11:00 Detectors (3/5) O. ULLALAND 11:15 - 12:00 Introduction to Nuclear Physics (1/4) P. CHOMAZ P. CHOMAZ 10:15 - 11:00 Accelerators (5/5) S. GILARDONI / E. METRAL 11:15 - 12:00 Detectors (4/5) O. ULLALAND 12:00 Discus...

  14. Management and Communication programme

    CERN Multimedia

    Nathalie Dumeaux

    2005-01-01

    We are pleased to announce the launch of three new courses in the Management and Communication programme: 1.     Managing Time (Open to all Staff Members) The objectives are: To enhance your personal effectiveness through better organisation skills To acquire ways of making the most of your time through improved work habits To reduce stress For the description of this course, please see:  http://humanresources.web.cern.ch/humanresources/external/training/MANCO/P9798/S8E_e.asp 2.     Service Orientation (Open to all Staff Members working in a service-related function) The objectives are: To understand the key elements in an effective client/service provider relationship To develop a client focused approach to providing services For the description of this course, please see:  http://humanresources.web.cern.ch/humanresources/external/training/MANCO/P9798/serv_e.asp 3.   Introduction to Leadership (Open to Staff in Career Paths E & above, including newly appointed supervisors and Sect...

  15. Management and Communication programme

    CERN Multimedia

    Nathalie Dumeaux

    2005-01-01

    We are pleased to announce the launch of three new courses in the Management and Communication programme: 1.     Managing Time (Open to all Staff Members) The objectives are: To enhance your personal effectiveness through better organisation skills To acquire ways of making the most of your time through improved work habits To reduce stress For the description of this course, please see:  http://humanresources.web.cern.ch/humanresources/external/training/MANCO/P9798/S8E_e.asp 2.     Service Orientation (Open to all Staff Members working in a service-related function) The objectives are: To understand the key elements in an effective client/service provider relationship To develop a client focused approach to providing services For the description of this course, please see:  http://humanresources.web.cern.ch/humanresources/external/training/MANCO/P9798/serv_e.asp 3.   Introduction to Leadership (Open to Staff in Career Paths E & above, including newly appointed supervisors and Secti...

  16. SUMMER STUDENT LECTURE PROGRAMME

    CERN Multimedia

    Françoise Benz

    2002-01-01

    SUMMER STUDENT LECTURE PROGRAMME Main Auditorium, bldg. 500   DATE TIME LECTURER TITLE Monday 29 July 09:15 - 10:00 R. RATTAZZI Beyond the Standard Model (3/3) 10:15 - 11:00 P. WELLS Experimental test of the SM - LEP (3/3) 11:15 - 12:00 P. WELLS Discussion Session 14:00 - 16:00 R. ASSMANN The CLIC Concept for a Future Particle Collider at the Energy Frontier Tuesday 30 July 09:15 - 10:00 F. ANTINORI Heavy Ions (1/2) 10:15 - 12:00 F. DYDAK Neutrino Physics (1&2/4) Wednesday 31 July  09:15 - 10:00 F. ANTINORI Heavy Ions (2/2) 10:15 - 11:00 F. DYDAK Neutrino Physics (3/4) 11:15 - 12:00 F. DYDAK / F. ANTINORI Discussion Session Thursday 1 August 09:15 - 10:00 T. NAKADA CP Violation (1/4) 10:15 - 11:00 F. DYDAK Neutrino Physics (4/4) 11:15 - 12:00 F. BEDESCHI Experimental test of the SM Tevatron (1/2) Friday 2 August 09:15 - 10:00 T. NAKADA CP Violation (2/4) 10:15 ? 11:00 F. BEDESCHI Experimental test of the SM Tevatron (2/2) 11:15 ? 12:00 F. BEDESCHI / T. NAKADA Di...

  17. FPGAs for software programmers

    CERN Document Server

    Hannig, Frank; Ziener, Daniel

    2016-01-01

    This book makes powerful Field Programmable Gate Array (FPGA) and reconfigurable technology accessible to software engineers by covering different state-of-the-art high-level synthesis approaches (e.g., OpenCL and several C-to-gates compilers). It introduces FPGA technology, its programming model, and how various applications can be implemented on FPGAs without going through low-level hardware design phases. Readers will get a realistic sense for problems that are suited for FPGAs and how to implement them from a software designer’s point of view. The authors demonstrate that FPGAs and their programming model reflect the needs of stream processing problems much better than traditional CPU or GPU architectures, making them well-suited for a wide variety of systems, from embedded systems performing sensor processing to large setups for Big Data number crunching. This book serves as an invaluable tool for software designers and FPGA design engineers who are interested in high design productivity through behavi...

  18. Photovoltaic programme, edition 2004

    Energy Technology Data Exchange (ETDEWEB)

    NONE

    2004-07-01

    This comprehensive publication issued by the Swiss Federal Office of Energy's Photovoltaics (PV) Programme presents an overview (in English) of activities and projects in the photovoltaics research and pilot and demonstration areas in Switzerland for the year 2003. Progress in future solar cell technologies as well as in the area of modules, building integration and system technologies is summarised. Also, national and international co-operation and multi-national pilot and demonstration projects are commented on. Associated projects such as eco-balances for PV systems, forecasting and modelling tools as well as system monitoring tools are discussed. In the area of pilot and demonstration projects, component development, PV integration in sloping roofs, on flat roofs and on facades as well as further PV plant are looked at. Also, measurement campaigns, studies, statistics and other PV-related topics are summarised. This volume presents a list of 92 projects in the PV area including the appropriate Internet links and is completed with a collection of project abstracts.

  19. Summer Student Lecture Programme

    CERN Multimedia

    2004-01-01

    Main Auditorium, bldg. 500 More Information DATE TIME LECTURER TITLE Wednesday 7 July 09:15 - 10:00 L. Fayard, O. Ullaland, D. Heagerty (CERN) Programme Presentation Workshops presentation Information on Computing Rules 10:15 - 11:00 R. Aymar (CERN) Introduction to CERN (1/2) 11:15 - 12:00 J. Engelen (CERN) Introduction to CERN (2/2) 15:00 - 16:30 H. Menzel (CERN) An Introduction to Radiation Protection DATE TIME LECTURER TITLE Thursday 8 july 09:15 - 10:00 L. Di Lella (CERN) Introduction to Particle Physics (1/4) 10:15 - 11:00 L. Di Lella (CERN) Introduction to Particle Physics (2/4) 11:15 - 12:00 P. Chomaz (GANIL / CERN) Fundamental questions in modern nuclear physics: The challenge of exotic nuclei (1/2) DATE TIME LECTURER TITLE Friday 9 July 09:15 - 10:00 L. Di Lella (CERN) Introduction to Particle Physics (3/4) 10:15 - 11:00 P. Chomaz (GANIL / CERN) Fundamental questions in modern nuclear physics: The challenge of exotic nuclei (2/2) 11:15 - 12:00 P....

  20. Effects of Parent-based Video Home Training in children with developmental language delay

    NARCIS (Netherlands)

    Balkom, L.J.M. van; Verhoeven, L.T.W.; Weerdenburg, M.W.C. van; Stoep, J.M.G.M.

    2010-01-01

    An efficacy study of an indirect or Parent-based intervention programme involving Video Home Training (PVHT) was conducted with a focus on parental strategies to (re-)establish coherence in conversations between young children with Developmental Language Delay (DLD) and their parents or caregivers.

  1. Delayed radiation neuropathy

    Energy Technology Data Exchange (ETDEWEB)

    Nagashima, T.; Miyamoto, K.; Beppu, H.; Hirose, K.; Yamada, K. (Tokyo Metropolitan Neurological Hospital (Japan))

    1981-07-01

    A case of cervical plexus neuropathy was reported in association with chronic radio-dermatitis, myxedema with thyroid adenoma and epiglottic tumor. A 38-year-old man has noticed muscle weakness and wasting of the right shoulder girdle since age 33. A detailed history taking revealed a previous irradiation to the neck because of the cervical lymphadenopathy at age 10 (X-ray 3,000 rads), keroid skin change at age 19, obesity and edema since 26, and hoarseness at 34. Laryngoscopic examination revealed a tumor on the right vocal cord, diagnosed as benign papilloma by histological study. In addition, there were chronic radio-dermatitis around the neck, primary hypothyroidism with a benign functioning adenoma on the right lobe of the thyroid, the right phrenic nerve palsy and the right recurrent nerve palsy. All these lesions were considered to be the late sequellae of radiation to the neck in childhood. Other neurological signs were weakness and amyotrophy of the right shoulder girdle with patchy sensory loss, and areflexia of the right arm. Gross power was fairly well preserved in the right hand. EMG showed neurogenic changes in the tested muscles, suggesting a peripheral nerve lesion. Nerve conduction velocities were normal. No abnormal findings were revealed by myelography and spinal CT. The neurological findings of the patient were compatible with the diagnosis of middle cervical plexus palsy apparently due to late radiation effect. In the literature eight cases of post-radiation neuropathy with a long latency have been reported. The present case with the longest latency after the radiation should be included in the series of the reported cases of ''delayed radiation neuropathy.'' (author).

  2. A typical proficiency testing programmes sample design for electrical and electronic product

    Science.gov (United States)

    Wang, T. T.; Zhang, H.; Xie, L. L.; Wang, Y. Y.

    2017-04-01

    Creepage distance and clearance testing are the basic testing items in the safety standards for almost all electrical and electronic products. A typical sample group is designed in this paper for the purpose of proficiency testing programmes. The sample group is composed of two kinds of circuit board. The length of the creepage distance of the two circuit boards in pollution degree 2 and 3 are the same but with different paths. This sample group includes three testing points. This sample group is designed beneficial for numerical statistics and avoiding the data complicity in the laboratory. It can be used for effective laboratory monitoring.

  3. FPGA based control circuit for single phase inverter

    Energy Technology Data Exchange (ETDEWEB)

    Ahmad, M.I.; Husin, Z.; Abd Rahim, H.; Abu Hassan, M.S. [Malaysia Perlis Univ., Perlis (Malaysia). School of Computer and Communication Engineering; Ismail, B. [Malaysia Perlis Univ., Perlis (Malaysia). School of Microelectronic Engineering; Isa, M.N. [Malaysia Perlis Univ., Perlis (Malaysia). School of Power System Engineering

    2008-07-01

    A study was conducted in which DC voltage was successfully converted to a pure sine wave AC source. This paper described the controller circuit for a single phase inverter, which was used to convert DC to AC voltage. Inverters typically have various switching techniques, depending on the application, such as emergency lighting systems, AC variable speed drives, uninterrupted power supplies and frequency converters. The techniques include pulse width modulation, sinusoidal pulse width modulation (SPWM) and modified SPWM. In this study, the circuitry of the SPWM inverter was constructed using power MOSFET. However, it could also be constructed using other power semiconductor devices such as a bipolar junction transistor or an insulated gate bipolar transistor. A low cost, field programmable gate array FPGA chip developed by Altera was used as the main controller unit to control the operation of the full bridge circuit and generate a control signal for SPWM. The whole control unit consisted of 1734 logic elements. The high logic density of the FPGA chip served as an efficient hardware for rapid prototyping. As such, the use of the FPGA increased signal accuracy. The output was a pure sine wave of 242 volt rms with low harmonics distortion which is less than 3 per cent. This is suitable for use in complex electrical equipment and frequency sensitive equipment. 4 refs., 1 tab., 8 figs.

  4. South African southern ocean research programme

    CSIR Research Space (South Africa)

    SASCAR

    1987-01-01

    Full Text Available This document describes the South African National Antarctic Research Programme's (SANARP) physical, chemical and biological Southern Ocean research programme. The programme has three main components: ecological studies of the Prince Edward Islands...

  5. Adapting Nepal's polio eradication programme.

    Science.gov (United States)

    Paudel, Krishna P; Hampton, Lee M; Gurung, Santosh; Bohara, Rajendra; Rai, Indra K; Anaokar, Sameer; Swift, Rachel D; Cochi, Stephen

    2017-03-01

    Many countries have weak disease surveillance and immunization systems. The elimination of polio creates an opportunity to use staff and assets from the polio eradication programme to control other vaccine-preventable diseases and improve disease surveillance and immunization systems. In 2003, the active surveillance system of Nepal's polio eradication programme began to report on measles and neonatal tetanus cases. Japanese encephalitis and rubella cases were added to the surveillance system in 2004. Staff from the programme aided the development and implementation of government immunization policies, helped launch vaccination campaigns, and trained government staff in reporting practices and vaccine management. Nepal eliminated indigenous polio in 2000, and controlled outbreaks caused by polio importations between 2005 and 2010. In 2014, the surveillance activities had expanded to 299 sites, with active surveillance for measles, rubella and neonatal tetanus, including weekly visits from 15 surveillance medical officers. Sentinel surveillance for Japanese encephalitis consisted of 132 sites. Since 2002, staff from the eradication programme have helped to introduce six new vaccines and helped to secure funding from Gavi, the Vaccine Alliance. Staff have also assisted in responding to other health events in the country. By expanding the activities of its polio eradication programme, Nepal has improved its surveillance and immunization systems and increased vaccination coverage of other vaccine-preventable diseases. Continued donor support, a close collaboration with the Expanded Programme on Immunization, and the retention of the polio eradication programme's skilled workforce were important for this expansion.

  6. Promoters Architecture-Based Mechanism for Noise-Induced Oscillations in a Single-Gene Circuit.

    Science.gov (United States)

    Guisoni, N; Monteoliva, D; Diambra, L

    2016-01-01

    It is well known that single-gene circuits with negative feedback loop can lead to oscillatory gene expression when they operate with time delay. In order to generate these oscillations many processes can contribute to properly timing such delay. Here we show that the time delay coming from the transitions between internal states of the cis-regulatory system (CRS) can drive sustained oscillations in an auto-repressive single-gene circuit operating in a small volume like a cell. We found that the cooperative binding of repressor molecules is not mandatory for a oscillatory behavior if there are enough binding sites in the CRS. These oscillations depend on an adequate balance between the CRS kinetic, and the synthesis/degradation rates of repressor molecules. This finding suggest that the multi-site CRS architecture can play a key role for oscillatory behavior of gene expression. Finally, our results can also help to synthetic biologists on the design of the promoters architecture for new genetic oscillatory circuits.

  7. TIME CALIBRATED OSCILLOSCOPE SWEEP CIRCUIT

    Science.gov (United States)

    Smith, V.L.; Carstensen, H.K.

    1959-11-24

    An improved time calibrated sweep circuit is presented, which extends the range of usefulness of conventional oscilloscopes as utilized for time calibrated display applications in accordance with U. S. Patent No. 2,832,002. Principal novelty resides in the provision of a pair of separate signal paths, each of which is phase and amplitude adjustable, to connect a high-frequency calibration oscillator to the output of a sawtooth generator also connected to the respective horizontal deflection plates of an oscilloscope cathode ray tube. The amplitude and phase of the calibration oscillator signals in the two signal paths are adjusted to balance out feedthrough currents capacitively coupled at high frequencies of the calibration oscillator from each horizontal deflection plate to the vertical plates of the cathode ray tube.

  8. Coulomb drag in quantum circuits.

    Science.gov (United States)

    Levchenko, Alex; Kamenev, Alex

    2008-11-21

    We study the drag effect in a system of two electrically isolated quantum point contacts, coupled by Coulomb interactions. Drag current exhibits maxima as a function of quantum point contacts gate voltages when the latter are tuned to the transitions between quantized conductance plateaus. In the linear regime this behavior is due to enhanced electron-hole asymmetry near an opening of a new conductance channel. In the nonlinear regime the drag current is proportional to the shot noise of the driving circuit, suggesting that the Coulomb drag experiments may be a convenient way to measure the quantum shot noise. Remarkably, the transition to the nonlinear regime may occur at driving voltages substantially smaller than the temperature.

  9. Electrical circuit theory and technology

    CERN Document Server

    Bird, John

    2014-01-01

    This much-loved textbook explains the principles of electrical circuit theory and technology so that students of electrical and mechanical engineering can master the subject. Real-world situations and engineering examples put the theory into context. The inclusion of worked problems with solutions help you to learn and further problems then allow you to test and confirm you have fully understood each subject. In total the book contains 800 worked problems, 1000 further problems and 14 revision tests with answers online. This an ideal text for foundation and undergraduate degree students and those on upper level vocational engineering courses, in particular electrical and mechanical. It provides a sound understanding of the knowledge required by technicians in fields such as electrical engineering, electronics and telecommunications. This edition has been updated with developments in key areas such as semiconductors, transistors, and fuel cells, along with brand new material on ABCD parameters and Fourier's An...

  10. Delay of Gratification and Delay Discounting: A Unifying Feedback Model of Delay-Related Impulsive Behavior

    Science.gov (United States)

    Reynolds, Brady; Schiffbauer, Ryan

    2005-01-01

    Delay of Gratification (DG) and Delay Discounting (DD) represent two indices of impulsive behavior often treated as though they represent equivalent or the same underlying processes. However, there are key differences between DG and DD procedures, and between certain research findings with each procedure, that suggest they are not equivalent. In…

  11. Programmable Input Mode Instrumentation Amplifier Using Multiple Output Current Conveyors

    Directory of Open Access Journals (Sweden)

    Pankiewicz Bogdan

    2017-03-01

    Full Text Available In this paper a programmable input mode instrumentation amplifier (IA utilising second generation, multiple output current conveyors and transmission gates is presented. Its main advantage is the ability to choose a voltage or current mode of inputs by setting the voltage of two configuration nodes. The presented IA is prepared as an integrated circuit block to be used alone or as a sub-block in a microcontroller or in a field programmable gate array (FPGA, which shall condition analogue signals to be next converted by an analogue-to-digital converter (ADC. IA is designed in AMS 0.35 µm CMOS technology and the power supply is 3.3 V; the power consumption is approximately 9.1 mW. A linear input range in the voltage mode reaches ± 1.68 V or ± 250 µA in current mode. A passband of the IA is above 11 MHz. The amplifier works in class A, so its current supply is almost constant and does not cause noise disturbing nearby working precision analogue circuits.

  12. A programmable Escherichia coli consortium via tunable symbiosis.

    Directory of Open Access Journals (Sweden)

    Alissa Kerner

    Full Text Available Synthetic microbial consortia that can mimic natural systems have the potential to become a powerful biotechnology for various applications. One highly desirable feature of these consortia is that they can be precisely regulated. In this work we designed a programmable, symbiotic circuit that enables continuous tuning of the growth rate and composition of a synthetic consortium. We implemented our general design through the cross-feeding of tryptophan and tyrosine by two E. coli auxotrophs. By regulating the expression of genes related to the export or production of these amino acids, we were able to tune the metabolite exchanges and achieve a wide range of growth rates and strain ratios. In addition, by inverting the relationship of growth/ratio vs. inducer concentrations, we were able to "program" the co-culture for pre-specified attributes with the proper addition of inducing chemicals. This programmable proof-of-concept circuit or its variants can be applied to more complex systems where precise tuning of the consortium would facilitate the optimization of specific objectives, such as increasing the overall efficiency of microbial production of biofuels or pharmaceuticals.

  13. Implementing universal vaccination programmes: Spain.

    Science.gov (United States)

    de la Torre, J; Esteban, R

    1995-01-01

    Until 1990, the immunization policy against hepatitis B in Spain was selective high-risk vaccination. That policy failed to reduce the incidence of hepatitis B and the prevalence rates of chronic carriers. In 1991, Catalonia began a universal immunization programme targeted at 12-year-olds. Six other regions (Castilla-León, Valencia, Extramadura, Navarra, the Balearic Islands and Rioja) introduced vaccination programmes in 1992. In 1993, three more regions (Galicia, Castilla-La-Mancha and Pais Vasco) began immunizing young adolescents. This means that 12-year-olds in Spain are now included in vaccination programmes against hepatitis B.

  14. A Statistical Programme Assignment Model

    DEFF Research Database (Denmark)

    Rosholm, Michael; Staghøj, Jonas; Svarer, Michael

    When treatment effects of active labour market programmes are heterogeneous in an observable way  across the population, the allocation of the unemployed into different programmes becomes a particularly  important issue. In this paper, we present a statistical model designed to improve the present...... duration of unemployment spells may result if a statistical programme assignment model is introduced. We discuss several issues regarding the  plementation of such a system, especially the interplay between the statistical model and  case workers....

  15. Automatic TLI recognition system, programmer`s guide

    Energy Technology Data Exchange (ETDEWEB)

    Lassahn, G.D.

    1997-02-01

    This report describes the software of an automatic target recognition system (version 14), from a programmer`s point of view. The intent is to provide information that will help people who wish to modify the software. In separate volumes are a general description of the ATR system, Automatic TLI Recognition System, General Description, and a user`s manual, Automatic TLI Recognition System, User`s Guide. 2 refs.

  16. Short circuit in deep brain stimulation.

    Science.gov (United States)

    Samura, Kazuhiro; Miyagi, Yasushi; Okamoto, Tsuyoshi; Hayami, Takehito; Kishimoto, Junji; Katano, Mitsuo; Kamikaseda, Kazufumi

    2012-11-01

    The authors undertook this study to investigate the incidence, cause, and clinical influence of short circuits in patients treated with deep brain stimulation (DBS). After the incidental identification of a short circuit during routine follow-up, the authors initiated a policy at their institution of routinely evaluating both therapeutic impedance and system impendence at every outpatient DBS follow-up visit, irrespective of the presence of symptoms suggesting possible system malfunction. This study represents a report of their findings after 1 year of this policy. Implanted DBS leads exhibiting short circuits were identified in 7 patients (8.9% of the patients seen for outpatient follow-up examinations during the 12-month study period). The mean duration from DBS lead implantation to the discovery of the short circuit was 64.7 months. The symptoms revealing short circuits included the wearing off of therapeutic effect, apraxia of eyelid opening, or dysarthria in 6 patients with Parkinson disease (PD), and dystonia deterioration in 1 patient with generalized dystonia. All DBS leads with short circuits had been anchored to the cranium using titanium miniplates. Altering electrode settings resulted in clinical improvement in the 2 PD cases in which patients had specific symptoms of short circuits (2.5%) but not in the other 4 cases. The patient with dystonia underwent repositioning and replacement of a lead because the previous lead was located too anteriorly, but did not experience symptom improvement. In contrast to the sudden loss of clinical efficacy of DBS caused by an open circuit, short circuits may arise due to a gradual decrease in impedance, causing the insidious development of neurological symptoms via limited or extended potential fields as well as shortened battery longevity. The incidence of short circuits in DBS may be higher than previously thought, especially in cases in which DBS leads are anchored with miniplates. The circuit impedance of DBS

  17. 30 CFR 75.518 - Electric equipment and circuits; overload and short circuit protection.

    Science.gov (United States)

    2010-07-01

    ... electric equipment and circuits against short circuit and overloads. Three-phase motors on all electric equipment shall be provided with overload protection that will deenergize all three phases in the event that... 30 Mineral Resources 1 2010-07-01 2010-07-01 false Electric equipment and circuits; overload and...

  18. Design of an improved RCD buffer circuit for full bridge circuit

    Science.gov (United States)

    Yang, Wenyan; Wei, Xueye; Du, Yongbo; Hu, Liang; Zhang, Liwei; Zhang, Ou

    2017-05-01

    In the full bridge inverter circuit, when the switch tube suddenly opened or closed, the inductor current changes rapidly. Due to the existence of parasitic inductance of the main circuit. Therefore, the surge voltage between drain and source of the switch tube can be generated, which will have an impact on the switch and the output voltage. In order to ab sorb the surge voltage. An improve RCD buffer circuit is proposed in the paper. The peak energy will be absorbed through the buffer capacitor of the circuit. The part energy feedback to the power supply, another part release through the resistor in the form of heat, and the circuit can absorb the voltage spikes. This paper analyzes the process of the improved RCD snubber circuit, According to the specific parameters of the main circuit, a reasonable formula for calculating the resistance capacitance is given. A simulation model will be modulated in Multisim, which compared the waveform of tube voltage and the output waveform of the circuit without snubber circuit with the improved RCD snubber circuit. By comparing and analyzing, it is proved that the improved buffer circuit can absorb surge voltage. Finally, experiments are demonstrated to validate that the correctness of the RC formula and the improved RCD snubber circuit.

  19. The Implementation and Evaluation of a Project-Oriented Problem-Based Learning Module in a First Year Engineering Programme

    Science.gov (United States)

    McLoone, Seamus C.; Lawlor, Bob J.; Meehan, Andrew R.

    2016-01-01

    This paper describes how a circuits-based project-oriented problem-based learning educational model was integrated into the first year of a Bachelor of Engineering in Electronic Engineering programme at Maynooth University, Ireland. While many variations of problem based learning exist, the presented model is closely aligned with the model used in…

  20. Stochastic Mesocortical Dynamics and Robustness of Working Memory during Delay-Period.

    Directory of Open Access Journals (Sweden)

    Melissa Reneaux

    Full Text Available The role of prefronto-mesoprefrontal system in the dopaminergic modulation of working memory during delayed response tasks is well-known. Recently, a dynamical model of the closed-loop mesocortical circuit has been proposed which employs a deterministic framework to elucidate the system's behavior in a qualitative manner. Under natural conditions, noise emanating from various sources affects the circuit's functioning to a great extent. Accordingly in the present study, we reformulate the model into a stochastic framework and investigate its steady state properties in the presence of constant background noise during delay-period. From the steady state distribution, global potential landscape and signal-to-noise ratio are obtained which help in defining robustness of the circuit dynamics. This provides insight into the robustness of working memory during delay-period against its disruption due to background noise. The findings reveal that the global profile of circuit's robustness is predominantly governed by the level of D1 receptor activity and high D1 receptor stimulation favors the working memory-associated sustained-firing state over the spontaneous-activity state of the system. Moreover, the circuit's robustness is further fine-tuned by the levels of excitatory and inhibitory activities in a way such that the robustness of sustained-firing state exhibits an inverted-U shaped profile with respect to D1 receptor stimulation. It is predicted that the most robust working memory is formed possibly at a subtle ratio of the excitatory and inhibitory activities achieved at a critical level of D1 receptor stimulation. The study also paves a way to understand various cognitive deficits observed in old-age, acute stress and schizophrenia and suggests possible mechanistic routes to the working memory impairments based on the circuit's robustness profile.