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Sample records for pixel detector front-end

  1. Data acquisition at the front-end of the Mu3e pixel detector

    Energy Technology Data Exchange (ETDEWEB)

    Perrevoort, Ann-Kathrin [Physikalisches Institut, Universitaet Heidelberg (Germany); Collaboration: Mu3e-Collaboration

    2016-07-01

    The Mu3e experiment - searching for the lepton-flavour violating decay of the muon into three electrons at an unprecedented sensitivity of one in 10{sup 16} decays - is based on a pixel tracking detector. The sensors are High-Voltage Monolithic Active Pixel Sensors, a technology which allows for very fast and thin detectors, and thus is an ideal fit for Mu3e where the trajectories of low-momentum electrons at high rates are to be measured. The detector will consist of about 275 million pixels and will be operated at up to 10{sup 9} muon stops per second. Therefore, a fast and trigger-less data readout is required. The pixel sensors feature zero-suppressed data output via high-speed serial links. The data is then buffered and sorted by time on a FPGA on the front-end before being processed to the following readout stage. In this talk, the readout of the Mu3e pixel detector at the front-end is introduced. Furthermore, a first firmware implementation of this concept in a beam telescope consisting of the current pixel sensor prototype MuPix7 is presented.

  2. Pixel front-end development in 65 nm CMOS technology

    International Nuclear Information System (INIS)

    Havránek, M; Hemperek, T; Kishishita, T; Krüger, H; Wermes, N

    2014-01-01

    Luminosity upgrade of the LHC (HL-LHC) imposes severe constraints on the detector tracking systems in terms of radiation hardness and capability to cope with higher hit rates. One possible way of keeping track with increasing luminosity is the usage of more advanced technologies. Ultra deep sub-micron CMOS technologies allow a design of complex and high speed electronics with high integration density. In addition, these technologies are inherently radiation hard. We present a prototype of analog pixel front-end integrated circuit designed in 65 nm CMOS technology with applications oriented towards the ATLAS Pixel Detector upgrade. The aspects of ultra deep sub-micron design and performance of the analog pixel front-end circuits will be discussed

  3. Design and Test of a 65nm CMOS Front-End with Zero Dead Time for Next Generation Pixel Detectors

    Energy Technology Data Exchange (ETDEWEB)

    Gaioni, L. [INFN, Pavia; Braga, D. [Fermilab; Christian, D. [Fermilab; Deptuch, G. [Fermilab; Fahim. F., Fahim. F. [Fermilab; Nodari, B. [Lyon, IPN; Ratti, L. [INFN, Pavia; Re, V. [INFN, Pavia; Zimmerman, T. [Fermilab

    2017-09-01

    This work is concerned with the experimental characterization of a synchronous analog processor with zero dead time developed in a 65 nm CMOS technology, conceived for pixel detectors at the HL-LHC experiment upgrades. It includes a low noise, fast charge sensitive amplifier with detector leakage compensation circuit, and a compact, single ended comparator able to correctly process hits belonging to two consecutive bunch crossing periods. A 2-bit Flash ADC is exploited for digital conversion immediately after the preamplifier. A description of the circuits integrated in the front-end processor and the initial characterization results are provided

  4. The ALICE silicon pixel detector front-end and read-out electronics

    CERN Document Server

    Kluge, A

    2006-01-01

    The ALICE silicon pixel detector (SPD) comprises the two innermost barrel layers of the ALICE inner tracker system. The SPD includes 120 half staves each of which consists of a linear array of 10 ALICE pixel chips bump bonded to two silicon sensors. Each pixel chip contains 8192 active cells, so the total number of pixel cells in the SPD is ≈107. The tight material budget and the limitation in physical dimensions required by the detector design introduce new challenges for the integration of the on-detector electronics. An essential part of the half stave is a low-mass multi-layer flex that carries power, ground, and signals to the pixel chips. Each half stave is read out using a multi-chip module (MCM). The MCM contains three radiation hard ASICs and an 800 Mbit/s custom developed optical link for the data transfer between the detector and the control room. The detector components are less than 3 mm thick. The production of the half-staves and MCMs is currently under way. Test results as well as on overvie...

  5. Dead-time free pixel readout architecture for ATLAS front-end IC

    CERN Document Server

    Einsweiler, Kevin F; Kleinfelder, S A; Luo, L; Marchesini, R; Milgrome, O; Pengg, F X

    1999-01-01

    A low power sparse scan readout architecture has been developed for the ATLAS pixel front-end IC. The architecture supports a dual discriminator and extracts the time over threshold (TOT) information along with a 2-D spatial address $9 of the hits associating them with a unique 7-bit beam crossing number. The IC implements level-1 trigger filtering along with event building (grouping together all hits in a beam crossing) in the end of column (EOC) buffer. The $9 events are transmitted over a 40 MHz serial data link with the protocol supporting buffer overflow handling by appending error flags to events. This mixed-mode full custom IC is implemented in 0.8 mu HP process to meet the $9 requirements for the pixel readout in the ATLAS inner detector. The circuits have been tested and the IC provides dead-time-less ambiguity free readout at 40 MHz data rate.

  6. Design of front end electronics and a full scale 4k pixel readout ASIC for the DSSC X-ray detector at the European XFEL

    International Nuclear Information System (INIS)

    Erdinger, Florian

    2016-01-01

    The goal of this thesis was to design a large scale readout ASIC for the 1-Mega pixel DEPFET Sensor with Signal Compression (DSSC) detector system which is being developed by an international collaboration for the European XFEL (EuXFEL). Requirements for the DSSC detector include single photon detection down to 0.5 keV combined with a large dynamic range of up to 10000 photons at frame rates of up to 4.5 MHz. The detector core concepts include full parallel readout, signal compression on the sensor or ASIC level, filtering, immediate digitization and local storage within the pixel. The DSSC is a hybrid pixel detector, each sensor pixel mates to a dedicated ASIC pixel, which includes the entire specified signal processing chain along with auxiliary circuits. One ASIC comprises 4096 pixels and a full periphery including biasing and digital control. This thesis presents the design of the ASIC, its components and integration are described in detail. Emphasis is put on the design of the analog front-end. The first full format ASIC (F1) has been fabricated within the scope of this thesis along with numerous test chips. Furthermore, the EuXFEL and the DSSC detector system are presented to create the context for the ASIC, which is the core topic of this thesis.

  7. Design of front end electronics and a full scale 4k pixel readout ASIC for the DSSC X-ray detector at the European XFEL

    Energy Technology Data Exchange (ETDEWEB)

    Erdinger, Florian

    2016-11-22

    The goal of this thesis was to design a large scale readout ASIC for the 1-Mega pixel DEPFET Sensor with Signal Compression (DSSC) detector system which is being developed by an international collaboration for the European XFEL (EuXFEL). Requirements for the DSSC detector include single photon detection down to 0.5 keV combined with a large dynamic range of up to 10000 photons at frame rates of up to 4.5 MHz. The detector core concepts include full parallel readout, signal compression on the sensor or ASIC level, filtering, immediate digitization and local storage within the pixel. The DSSC is a hybrid pixel detector, each sensor pixel mates to a dedicated ASIC pixel, which includes the entire specified signal processing chain along with auxiliary circuits. One ASIC comprises 4096 pixels and a full periphery including biasing and digital control. This thesis presents the design of the ASIC, its components and integration are described in detail. Emphasis is put on the design of the analog front-end. The first full format ASIC (F1) has been fabricated within the scope of this thesis along with numerous test chips. Furthermore, the EuXFEL and the DSSC detector system are presented to create the context for the ASIC, which is the core topic of this thesis.

  8. ATLAS ITk Pixel detector

    CERN Document Server

    Gemme, Claudia; The ATLAS collaboration

    2016-01-01

    The high luminosity upgrade of the LHC (HL-LHC) in 2026 will provide new challenge to the ATLAS tracker. The current inner detector will be replaced with a whole silicon tracker which will consist of a five barrel layer Pixel detector surrounded by a four barrel layer Strip detector. The expected high radiation level are requiring the development of upgraded silicon sensors as well as new a front-end chip. The dense tracking environment will require finer granularity detectors. The data rates will require new technologies for high bandwidth data transmission and handling. The current status of the HL-LHC ATLA Pixel detector developments as well as the various layout options will be reviewed.

  9. Calibration Analysis Software for the ATLAS Pixel Detector

    CERN Document Server

    AUTHOR|(INSPIRE)INSPIRE-00372086; The ATLAS collaboration

    2016-01-01

    The calibration of the ATLAS Pixel detector at LHC fulfils two main purposes: to tune the front-end configuration parameters for establishing the best operational settings and to measure the tuning performance through a subset of scans. An analysis framework has been set up in order to take actions on the detector given the outcome of a calibration scan (e.g. to create a mask for disabling noisy pixels). The software framework to control all aspects of the Pixel detector scans and analyses is called Calibration Console. The introduction of a new layer, equipped with new Front End-I4 Chips, required an update the Console architecture. It now handles scans and scans analyses applied together to chips with different characteristics. An overview of the newly developed Calibration Analysis Software will be presented, together with some preliminary result.

  10. Development of pixel front-end electronics using advanced deep submicron CMOS technologies

    International Nuclear Information System (INIS)

    Havranek, Miroslav

    2014-09-01

    The content of this thesis is oriented on the R and D of microelectronic integrated circuits for processing the signal from particle sensors and partially on the sensors themselves. This work is motivated by ongoing upgrades of the ATLAS Pixel Detector at CERN laboratory and by exploration of new technologies for the future experiments in particle physics. Evolution of technologies for the fabrication of microelectronic circuits follows Moore's laws. Transistors become smaller and electronic chips reach higher complexity. Apart from this, silicon foundries become more open to smaller customers and often provide non-standard process options. Two new directions in pixel technologies are explored in this thesis: design of pixel electronics using ultra deep submicron (65 nm) CMOS technology and Depleted Monolithic Active Pixel Sensors (DMAPS). An independent project concerning the measurement of pixel capacitance with a dedicated measurement chip is a part of this thesis. Pixel capacitance is one of the key parameters for design of the pixel front-end electronics and thus it is closely related to the content of the thesis. The theoretical background, aspects of chip design, performance of chip prototypes and prospect for design of large pixel chips are comprehensively described in five chapters of the thesis.

  11. Development of pixel front-end electronics using advanced deep submicron CMOS technologies

    Energy Technology Data Exchange (ETDEWEB)

    Havranek, Miroslav

    2014-09-15

    The content of this thesis is oriented on the R and D of microelectronic integrated circuits for processing the signal from particle sensors and partially on the sensors themselves. This work is motivated by ongoing upgrades of the ATLAS Pixel Detector at CERN laboratory and by exploration of new technologies for the future experiments in particle physics. Evolution of technologies for the fabrication of microelectronic circuits follows Moore's laws. Transistors become smaller and electronic chips reach higher complexity. Apart from this, silicon foundries become more open to smaller customers and often provide non-standard process options. Two new directions in pixel technologies are explored in this thesis: design of pixel electronics using ultra deep submicron (65 nm) CMOS technology and Depleted Monolithic Active Pixel Sensors (DMAPS). An independent project concerning the measurement of pixel capacitance with a dedicated measurement chip is a part of this thesis. Pixel capacitance is one of the key parameters for design of the pixel front-end electronics and thus it is closely related to the content of the thesis. The theoretical background, aspects of chip design, performance of chip prototypes and prospect for design of large pixel chips are comprehensively described in five chapters of the thesis.

  12. The FPGA Pixel Array Detector

    International Nuclear Information System (INIS)

    Hromalik, Marianne S.; Green, Katherine S.; Philipp, Hugh T.; Tate, Mark W.; Gruner, Sol M.

    2013-01-01

    A proposed design for a reconfigurable x-ray Pixel Array Detector (PAD) is described. It operates by integrating a high-end commercial field programmable gate array (FPGA) into a 3-layer device along with a high-resistivity diode detection layer and a custom, application-specific integrated circuit (ASIC) layer. The ASIC layer contains an energy-discriminating photon-counting front end with photon hits streamed directly to the FPGA via a massively parallel, high-speed data connection. FPGA resources can be allocated to perform user defined tasks on the pixel data streams, including the implementation of a direct time autocorrelation function (ACF) with time resolution down to 100 ns. Using the FPGA at the front end to calculate the ACF reduces the required data transfer rate by several orders of magnitude when compared to a fast framing detector. The FPGA-ASIC high-speed interface, as well as the in-FPGA implementation of a real-time ACF for x-ray photon correlation spectroscopy experiments has been designed and simulated. A 16×16 pixel prototype of the ASIC has been fabricated and is being tested. -- Highlights: ► We describe the novelty and need for the FPGA Pixel Array Detector. ► We describe the specifications and design of the Diode, ASIC and FPGA layers. ► We highlight the Autocorrelation Function (ACF) for speckle as an example application. ► Simulated FPGA output calculates the ACF for different input bitstreams to 100 ns. ► Reduced data transfer rate by 640× and sped up real-time ACF by 100× other methods.

  13. FE-I2 a front-end readout chip designed in a commercial 025- mu m process for the ATLAS pixel detector at LHC

    CERN Document Server

    Blanquart, L; Einsweiler, Kevin F; Fischer, P; Mandelli, E; Meddeler, G; Peric, I

    2004-01-01

    A new front-end chip (FE-I2) has been developed for the ATLAS pixel detector at the future Large Hadron Collider (LHC) accelerator facility of the European Laboratory for Particle Physics (CERN). This chip has been submitted in a commercial 0.25- mu m CMOS process using special layout techniques for radiation tolerance. It comprises 2880 pixels arranged into 18 columns of 160 channels. Each pixel element of dimension 50 mu m * 400 mu m is composed of a charge- sensitive amplifier followed by a fast discriminator with a detection threshold adjustable within a range of 0-6000 electrons and slow control logic incorporating a wired-hit-Or, preamplifier-kill, readout mask, and automatic threshold tuning circuitry. There are two single-event- upset (SEU)-tolerant DACs for reducing threshold (7-b) and recovery- time (3-b) mismatches from pixel to pixel along with digital hit emulation and a differential readout circuit aimed at transporting time-stamped data from each pixel to buffers at the bottom of the chip. In c...

  14. Performance of the CMS Phase 1 Pixel Detector

    CERN Document Server

    Akgun, Bora

    2018-01-01

    It is anticipated that the LHC accelerator will reach and exceed the luminosity of L = 2$\\times$10$^{34}$cm$^{-2}$s$^{-1}$ during the LHC Run 2 period until 2023. At this higher luminosity and increased hit occupancies the CMS phase-0 pixel detector would have been subjected to severe dead time and inefficiencies introduced by limited buffers in the analog read-out chip and effects of radiation damage in the sensors. Therefore a new pixel detector has been built and replaced the phase-0 detector in the 2016/17 LHC extended year-end technical stop. The CMS phase-1 pixel detector features four central barrel layers and three end-cap disks in forward and backward direction for robust tracking performance, and a significantly reduced overall material budget including new cooling and powering schemes. The design of the new front-end readout chip comprises larger data buffers, an increased transmission bandwidth, and low-threshold comparators. These improvements allow the new pixel detector to sustain and improve t...

  15. Digital column readout architecture for the ATLAS pixel 025 mum front end IC

    CERN Document Server

    Mandelli, E; Blanquart, L; Comes, G; Denes, P; Einsweiler, Kevin F; Fischer, P; Marchesini, R; Meddeler, G; Peric, I

    2002-01-01

    A fast low noise, limited power, radiation-hard front-end chip was developed for reading out the Atlas Pixel Silicon Detector. As in the past prototypes, every chip is used to digitize and read out charge and time information from hits on each one of its 2880 inputs. The basic column readout architecture idea was adopted and modified to allow a safe transition to quarter micron technology. Each pixel cell, organized in a 160 multiplied by 18 matrix, can be independently enabled and configured in order to optimize the analog signal response and to prevent defective pixels from saturating the readout. The digital readout organizes hit data coming from each column, with respect to time, and output them on a low-level serial interface. A considerable effort was made to design state machines free of undefined states, where single-point defects and charge deposited by heavy ions in the silicon could have led to unpredicted forbidden states. 7 Refs.

  16. Upgrade of ATLAS ITk Pixel Detector

    CERN Document Server

    Huegging, Fabian; The ATLAS collaboration

    2017-01-01

    The high luminosity upgrade of the LHC (HL-LHC) in 2026 will provide new challenges to the ATLAS tracker. The current inner detector will be replaced with an entirely-silicon inner tracker (ITk) which will consist of a five barrel layer Pixel detector surrounded by a four barrel layer Strip detector. The expected high radiation levels are requiring the development of upgraded silicon sensors as well as new a front-end chip. The dense tracking environment will require finer granularity detectors and low mass global and local support structures. The data rates will require new technologies for high bandwidth data transmission and handling. The current status of the ITk ATLAS Pixel detector developments as well as different layout options will be reviewed.

  17. Status of the CMS Phase I pixel detector upgrade

    Energy Technology Data Exchange (ETDEWEB)

    Spannagel, S., E-mail: simon.spannagel@desy.de

    2016-09-21

    A new pixel detector for the CMS experiment is being built, owing to the instantaneous luminosities anticipated for the Phase I Upgrade of the LHC. The new CMS pixel detector provides four-hit tracking while featuring a significantly reduced material budget as well as new cooling and powering schemes. A new front-end readout chip mitigates buffering and bandwidth limitations, and comprises a low-threshold comparator. These improvements allow the new pixel detector to sustain and improve the efficiency of the current pixel tracker at the increased requirements imposed by high luminosities and pile-up. This contribution gives an overview of the design of the upgraded pixel detector and the status of the upgrade project, and presents test beam performance measurements of the production read-out chip.

  18. Status of the CMS Phase I Pixel Detector Upgrade

    CERN Document Server

    Spannagel, Simon

    2016-09-21

    A new pixel detector for the CMS experiment is being built, owing to the instantaneous luminosities anticipated for the Phase~I Upgrade of the LHC. The new CMS pixel detector provides four-hit tracking while featuring a significantly reduced material budget as well as new cooling and powering schemes. A new front-end readout chip mitigates buffering and bandwidth limitations, and comprises a low-threshold comparator. These improvements allow the new pixel detector to sustain and improve the efficiency of the current pixel tracker at the increased requirements imposed by high luminosities and pile-up. This contribution gives an overview of the design of the upgraded pixel detector and the status of the upgrade project, and presents test beam performance measurements of the production read-out chip.

  19. Operational Experience with the ATLAS Pixel Detector at LHC

    CERN Document Server

    Keil, M

    2013-01-01

    The ATLAS Pixel Detector is the innermost detector of the ATLAS experiment at the Large Hadron Collider at CERN, providing high-resolution measurements of charged particle tracks in the high radiation environment close to the collision region. This capability is vital for the identification and measurement of proper decay times of long-lived particles such as b-hadrons, and thus crucial for the ATLAS physics program. The detector provides hermetic coverage with three cylindrical layers and three layers of forward and backward pixel detectors. It consists of approximately 80 million pixels that are individually read out via front-end chips bump-bonded to 1744 n-on-n silicon substrates. In this paper results from the successful operation of the Pixel Detector at the LHC will be presented, including calibration procedures, detector performance and measurements of radiation damage. The detector performance is excellent: more than 95% of the pixels are operational, noise occupancy and hit efficiency exceed the des...

  20. The TDCpix readout ASIC: A 75ps resolution timing front-end for the NA62 Gigatracker hybrid pixel detector

    CERN Document Server

    Kluge, A; Bonacini, S; Jarron, P; Kaplon, J; Morel, M; Noy, M; Perktold, L; Poltorak, K

    2013-01-01

    The TDCpix is a novel pixel readout ASIC for the NA62 Gigatracker detector. NA62 is a new experiment being installed at the CERN Super Proton Synchrotron. Its Gigatracker detector shall provide on-beam tracking and time stamping of individual particles with a time resolution of 150 ps rms. It will consist of three tracking stations, each with one hybrid pixel sensor. The peak fl ow of particles crossing the detector modules reaches 1.27 MHz/mm 2 for a total rate of about 0.75 GHz. Ten TDCpix chips will be bump-bonded to every silicon pixel sensor. Each chip shall perform time stamping of 100 M particle hits per second with a detection ef fi ciency above 99% and a timing accuracy better than 200 ps rms for an overall three-station-setup time resolution of better than 150 ps. The TDCpix chip has been designed in a 130 nm CMOS technology. It will feature 45 40 square pixels of 300 300 μ m 2 and a complex End of Column peripheral region including an array of TDCs based on DLLs, four high speed serializers, a low...

  1. The TDCpix readout ASIC: A 75 ps resolution timing front-end for the NA62 Gigatracker hybrid pixel detector

    Energy Technology Data Exchange (ETDEWEB)

    Kluge, A., E-mail: alexander.kluge@cern.ch; Aglieri Rinella, G.; Bonacini, S.; Jarron, P.; Kaplon, J.; Morel, M.; Noy, M.; Perktold, L.; Poltorak, K.

    2013-12-21

    The TDCpix is a novel pixel readout ASIC for the NA62 Gigatracker detector. NA62 is a new experiment being installed at the CERN Super Proton Synchrotron. Its Gigatracker detector shall provide on-beam tracking and time stamping of individual particles with a time resolution of 150 ps rms. It will consist of three tracking stations, each with one hybrid pixel sensor. The peak flow of particles crossing the detector modules reaches 1.27 MHz/mm{sup 2} for a total rate of about 0.75 GHz. Ten TDCpix chips will be bump-bonded to every silicon pixel sensor. Each chip shall perform time stamping of 100 M particle hits per second with a detection efficiency above 99% and a timing accuracy better than 200 ps rms for an overall three-station-setup time resolution of better than 150 ps. The TDCpix chip has been designed in a 130 nm CMOS technology. It will feature 45×40 square pixels of 300×300μm{sup 2} and a complex End of Column peripheral region including an array of TDCs based on DLLs, four high speed serializers, a low-jitter PLL, readout and control circuits. This contribution will describe the complete design of the final TDCpix ASIC. It will discuss design choices, the challenges faced and some of the lessons learned. Furthermore, experimental results from the testing of circuit prototypes will be presented. These demonstrate the achievement of key performance figures such as a time resolution of the processing chain of 75 ps rms with a laser sent to the center of the pixel and the capability of time stamping charged particles with an overall resolution below 200 ps rms. -- Highlights: • Feasibility demonstration of a silicon pixel detector with sub-ns time tagging capability. • Demonstrator detector assembly with a time resolution of 75 ps RMS with laser charge injection; 170 ps RMS with particle beam. • Design of trigger-less TDCpix ASIC with 1800 pixels, 720 TDC channels and 4 3.2 Gbit/s serializers.

  2. Parallel and pipelined front-end for multi-element silicon detectors in scanning electron microscopy

    International Nuclear Information System (INIS)

    Boulin, C.; Epstein, A.

    1992-01-01

    This paper discusses a silicon quadrant detector (128 elements) implemented as an electron detector in a Scanning Transmission Electron Microscope. As the electron beam scans over the sample, electrons are counted during each pixel. The authors developed an ASIC for the multichannel counting system. The digital front-end carries out the readout of all elements, in four groups, and uses these data to compute linear combinations to generate up to eight simultaneous images. For the preprocessing the authors implemented a parallel and pipelined system. Dedicated software tools were developed to generate the programs for all the processors. These tools are transparently accessed by the user via a user friendly interface

  3. The high dynamic range pixel array detector (HDR-PAD): Concept and design

    Energy Technology Data Exchange (ETDEWEB)

    Shanks, Katherine S.; Philipp, Hugh T.; Weiss, Joel T.; Becker, Julian; Tate, Mark W. [Laboratory of Atomic and Solid State Physics, Cornell University, Ithaca, NY 14853 (United States); Gruner, Sol M., E-mail: smg26@cornell.edu [Laboratory of Atomic and Solid State Physics, Cornell University, Ithaca, NY 14853 (United States); Cornell High Energy Synchrotron Source (CHESS), Cornell University, Ithaca, NY 14853 (United States)

    2016-07-27

    Experiments at storage ring light sources as well as at next-generation light sources increasingly require detectors capable of high dynamic range operation, combining low-noise detection of single photons with large pixel well depth. XFEL sources in particular provide pulse intensities sufficiently high that a purely photon-counting approach is impractical. The High Dynamic Range Pixel Array Detector (HDR-PAD) project aims to provide a dynamic range extending from single-photon sensitivity to 10{sup 6} photons/pixel in a single XFEL pulse while maintaining the ability to tolerate a sustained flux of 10{sup 11} ph/s/pixel at a storage ring source. Achieving these goals involves the development of fast pixel front-end electronics as well as, in the XFEL case, leveraging the delayed charge collection due to plasma effects in the sensor. A first prototype of essential electronic components of the HDR-PAD readout ASIC, exploring different options for the pixel front-end, has been fabricated. Here, the HDR-PAD concept and preliminary design will be described.

  4. Gas pixel detectors

    International Nuclear Information System (INIS)

    Bellazzini, R.; Baldini, L.; Brez, A.; Cavalca, F.; Latronico, L.; Massai, M.M.; Minuti, M.; Omodei, N.; Pesce-Rollins, M.; Sgro, C.; Spandre, G.; Costa, E.; Soffitta, P.

    2007-01-01

    With the Gas Pixel Detector (GPD), the class of micro-pattern gas detectors has reached a complete integration between the gas amplification structure and the read-out electronics. To obtain this goal, three generations of application-specific integrated circuit of increased complexity and improved functionality has been designed and fabricated in deep sub-micron CMOS technology. This implementation has allowed manufacturing a monolithic device, which realizes, at the same time, the pixelized charge-collecting electrode and the amplifying, shaping and charge measuring front-end electronics of a GPD. A big step forward in terms of size and performances has been obtained in the last version of the 0.18 μm CMOS analog chip, where over a large active area of 15x15 mm 2 a very high channel density (470 pixels/mm 2 ) has been reached. On the top metal layer of the chip, 105,600 hexagonal pixels at 50 μm pitch have been patterned. The chip has customable self-trigger capability and includes a signal pre-processing function for the automatic localization of the event coordinates. In this way, by limiting the output signal to only those pixels belonging to the region of interest, it is possible to reduce significantly the read-out time and data volume. In-depth tests performed on a GPD built up by coupling this device to a fine pitch (50 μm) gas electron multiplier are reported. Matching of the gas amplification and read-out pitch has let to obtain optimal results. A possible application of this detector for X-ray polarimetry of astronomical sources is discussed

  5. Novel Front-end Electronics for Time Projection Chamber Detectors

    CERN Document Server

    García García, Eduardo José

    This work has been carried out in the European Organization for Nuclear Research (CERN) and it was supported by the European Union as part of the research and development towards the European detector the (EUDET) project, specifically for the International Linear Collider (ILC). In particle physics there are several different categories of particle detectors. The presented design is focused on a particular kind of tracking detector called Time Projection Chamber (TPC). The TPC provides a three dimensional image of electrically charged particles crossing a gaseous volume. The thesis includes a study of the requirements for future TPC detectors summarizing the parameters that the front-end readout electronics must fulfill. In addition, these requirements are compared with respect to the readouts used in existing TPC detectors. It is concluded that none of the existing front-end readout designs fulfill the stringent requirements. The main requirements for future TPC detectors are high integration, an increased n...

  6. Developments of the ATLAS pixel detector

    International Nuclear Information System (INIS)

    Andreazza, Attilio

    2004-01-01

    The ATLAS silicon pixel detector is the innermost tracking device of the ATLAS experiment at the Large Hardon Collider, consisting of more than 1700 modules for a total sensitive area of about 1.7m2 and over 80 million pixel cells. The concept is a hybrid of front-end chips bump bonded to the pixel sensor. The elementary pixel cell has 50μmx400μm size, providing pulse height information via the time over threshold technique. Prototype devices with oxygenated silicon sensor and rad-hard electronics built in the IBM 0.25μm process have been tested and maintain good resolution, efficiency and timing performances even after receiving the design radiation damage of 1015neq/cm2

  7. Front-end electronics for multichannel semiconductor detector systems

    CERN Document Server

    Grybos, P

    2010-01-01

    Front-end electronics for multichannel semiconductor detektor systems Volume 08, EuCARD Editorial Series on Accelerator Science and Technology The monograph is devoted to many different aspects related to front-end electronics for semiconductor detector systems, namely: − designing and testing silicon position sensitive detectors for HEP experiments and X-ray imaging applications, − designing and testing of multichannel readout electronics for semiconductor detectors used in X-ray imaging applications, especially for noise minimization, fast signal processing, crosstalk reduction and good matching performance, − optimization of semiconductor detection systems in respect to the effects of radiation damage. The monograph is the result mainly of the author's experience in the above-mentioned areas and it is an attempt of a comprehensive presentation of issues related to the position sensitive detection system working in a single photon counting mode and intended to X-ray imaging applications. The structure...

  8. Analog front-end cell designed in a commercial 025 mu m process for the ATLAS pixel detector at LHC

    CERN Document Server

    Blanquart, L; Comes, G; Denes, P; Einsweiler, Kevin F; Fischer, P; Mandelli, E; Meddeler, G; Peric, I; Richardson, J

    2002-01-01

    A new analog pixel front-end cell has been developed for the ATLAS detector at the future Large Hadron Collider (LHC) at the European Laboratory for Particle Physics (CERN). This analog cell has been submitted in two commercial 0.25 mu m CMOS processes (in an analog test chip format), using special layout techniques for radiation hardness purposes. It is composed of two cascaded amplifiers followed by a fast discriminator featuring a detection threshold within the range of 1000 to 10000 electrons. The first preamplifier has the principal role of providing a large bandwidth, low input impedance, and fast rise time in order to enhance the time-walk and crosstalk performance, whereas the second fully differential amplifier is aimed at delivering a sufficiently high-voltage gain for optimum comparison. A new do feedback concept renders the cell tolerant of sensor leakage current up to 300 nA and provides monitoring of this current. Two 5-bit digital-to-analog converters tolerant to single- event upset have been i...

  9. Readout chip for the CMS pixel detector upgrade

    Energy Technology Data Exchange (ETDEWEB)

    Rossini, Marco, E-mail: marco.rossini@phys.ethz.ch

    2014-11-21

    For the CMS experiment a new pixel detector is planned for installation during the extended shutdown in winter 2016/2017. Among the changes of the detector modified front end electronics will be used for higher efficiency at peak luminosity of the LHC and faster readout. The first prototype versions of the new readout chip have been designed and produced. The results of qualification and calibration for the new chip are presented in this paper.

  10. Gas Pixel Detectors for low energy X-ray polarimetry

    International Nuclear Information System (INIS)

    Spandre, Gloria

    2007-01-01

    Gas Pixel Detectors are position-sensitive proportional counters in which a complete integration between the gas amplification structure and the read-out electronics has been reached. Various generation of Application-Specific Integrated Circuit (ASIC) have been designed in deep submicron CMOS technology to realize a monolithic device which is at the same time the charge collecting electrode and the analog amplifying and charge measuring front-end electronics. The experimental response of a detector with 22060 pixels at 80 μm pitch to polarized and un-polarized X-ray radiation is shown and the application of this device for Astronomical X-ray Polarimetry discussed

  11. Initial Measurements on Pixel Detector Modules for the ATLAS Upgrades

    CERN Document Server

    Gallrapp, C; The ATLAS collaboration

    2011-01-01

    Delicate conditions in terms of peak and integrated luminosity in the Large Hadron Collider (LHC) will raise the ATLAS Pixel Detector to its performance limits. Silicon planar, silicon 3D and diamond pixel sensors are three possible sensor technologies which could be implemented in the upcoming Pixel Detector upgrades of the ATLAS experiment. Measurements of the IV-behavior and measurements with radioactive Americium-241 and Strontium-90 are used to characterize the sensor properties and to understand the interaction between the ATLAS FE-I4 front-end chip and the sensor. Comparisons of results from before and after irradiation for silicon planar and 3D pixel sensors, which give a first impression on the charge collection properties of the different sensor technologies, are presented.

  12. Criteria for setting the width of CCD front end transistor to reach minimum pixel noise

    International Nuclear Information System (INIS)

    Fasoli, L.; Sampietro, M.

    1996-01-01

    The paper gives the criteria to calculate the width of the front end transistor integrated next to the charge sensing electrode of CCD's or, in general, of semiconductor detectors, in order to reach the minimum noise in the readout of the signal charge. The paper, for the first time, accounts for white, series and parallel, and 1/f noise contribution. In addition, it points out two different design criteria depending whether a JFET or a MOSFET is used. The attention given to the JFET is due to a lower 1/f noise component, which makes these transistors more and more appealing as input devices in very high resolution detectors. The paper shows that there is a characteristic width of the FET gate that practically doesn't depend on the noise sources but depends only on the capacitance seen by the charge sensing electrode of the detector, making possible the optimum design of the transistor prior to the knowledge of the real values of the spectral density of the noise sources, which are usually precisely known only at the end of the fabrication process. The paper shows that the pixel noise raises sharply as the transistor gate width departs from its optimum value

  13. Semiconductor Pixel detectors and their applications in life sciences

    International Nuclear Information System (INIS)

    Jakubek, J

    2009-01-01

    Recent advances in semiconductor technology allow construction of highly efficient and low noise pixel detectors of ionizing radiation. Steadily improving quality of front end electronics enables fast digital signal processing in each pixel which offers recording of more complete information about each detected quantum (energy, time, number of particles). All these features improve an extend applicability of pixel technology in different fields. Some applications of this technology especially for imaging in life sciences will be shown (energy and phase sensitive X-ray radiography and tomography, radiography with heavy charged particles, neutron radiography, etc). On the other hand a number of obstacles can limit the detector performance if not handled. The pixel detector is in fact an array of individual detectors (pixels), each of them has its own efficiency, energy calibration and also noise. The common effort is to make all these parameters uniform for all pixels. However an ideal uniformity can be never reached. Moreover, it is often seen that the signal in one pixel can affect the neighbouring pixels due to various reasons (e.g. charge sharing). All such effects have to be taken into account during data processing to avoid false data interpretation. A brief view into the future of pixel detectors and their applications including also spectroscopy, tracking and dosimetry is given too. Special attention is paid to the problem of detector segmentation in context of the charge sharing effect.

  14. Initial Measurements On Pixel Detector Modules For The ATLAS Upgrades

    CERN Document Server

    Gallrapp, C; The ATLAS collaboration

    2011-01-01

    Sophisticated conditions in terms of peak and integrated luminosity in the Large Hadron Collider (LHC) will raise the ATLAS Pixel detector to its performance limits. Silicon planar, silicon 3D and diamond pixel sensors are three possible sensor technologies which could be implemented in the upcoming pixel detector upgrades of the ATLAS experiment. Measurements of the IV-behavior and measurements with radioactive Americium-241 and Strontium-90 are used to characterize the sensor properties and to understand the interaction between the ATLAS FE-I4 front-end chip and the sensor. Comparisons of results from before and after irradiation, which give a first impression on the charge collection properties of the different sensor technologies are presented.

  15. ATLAS SemiConductor Tracker and Pixel Detector: Status and Performance

    CERN Document Server

    Reeves, K; The ATLAS collaboration

    2012-01-01

    The Semi-Conductor Tracker (SCT) and the Pixel Detector are the key precision tracking devices in the Inner Detector of the ATLAS experiment at CERN LHC. The SCT is a silicon strip detector and is constructed of 4088 silicon detector modules for a total of 6.3 million strips. Each module is designed, constructed and tested to operate as a stand-alone unit, mechanically, electrically, optically and thermally. The SCT silicon micro-strip sensors are processed in the planar p-in-n technology. The signals from the strips are processed in the front-end ASICS ABCD3TA, working in the binary readout mode. The Pixel Detector consists of approximately 80 million pixels that are individually read out via chips bump-bonded to 1744 n-in-n silicon substrates. In the talk the current status of the SCT and Pixel Detector will be reviewed. We will report on the operation of the detectors including an overview of the issues we encountered and the observation of significant increases in leakage currents (as expected) from bulk ...

  16. A 10 MHz micropower CMOS front end for direct readout of pixel detectors

    International Nuclear Information System (INIS)

    Campbell, M.; Heijne, E.H.M.; Jarron, P.; Krummenacher, F.; Enz, C.C.; Declercq, M.; Vittoz, E.; Viertel, G.

    1990-01-01

    In the framework of the CERN-LAA project for detector R and D, a micropower circuit of 200 μmx200 μm with a current amplifier, a latched comparator and a digital memory element has been tested electrically and operated in connection with linear silicon detector arrays. The experimental direct-readout (DRO) chip comprises a matrix of 9x12 circuit cells and has been manufactured in a 3 μm CMOS technology. Particles and X-ray photons below 22 keV were detected, and thresholds can be set between 2000 and 20000 e - . The noise is less than 4 keV FWHM or 500 e - rms and the power dissipation per pixel element is 30 μW. The chip can be coupled to a detector matrix using bump bonding. (orig.)

  17. Development of the MCM-D technique for pixel detector modules

    CERN Document Server

    Grah, Christian

    2005-01-01

    This thesis treats a copper--polymer based thin film technology, the MCM-D technique and its application when building hybrid pixel detector modules. The ATLAS experiment at the LHC will be equipped with a pixel detector system. The basic mechanical units of the pixel detector are multi chip modules. The main components of these modules are: 16 electronic chips, a controller chip and a large sensor tile, featuring more than 46000 sensor cells. MCM-D is a superior technique to build the necessary signal bus system and the power distribution system directly on the active sensor tile. In collaboration with the Fraunhofer Institute for Reliability and Microintegration, IZM, the thin film process is reviewed and enhanced. The multi layer system was designed and optimized for the interconnection system as well as for the 46000 pixel contacts. Laboratory measurements on prototypes prove that complex routing schemes for geometrically optimized single chips are suitable and have negligible influence on the front--end ...

  18. International Workshop on Semiconductor Pixel Detectors for Particles and Imaging (PIXEL2016)

    CERN Document Server

    Rossi, Leonardo; PIXEL2016

    2016-01-01

    The workshop will cover various topics related to pixel detector technology. Development and applications will be discussed for charged particle tracking in High Energy Physics, Nuclear Physics and Astrophysics, and for X-ray imaging in Astronomy, Biology, Medicine and Material Science. The conference program will also include reports on front and back end electronics, radiation effects, low mass mechanics, environmental control and construction techniques. Emerging technologies, such as monolithic and HV&HR CMOS, will also be treated. Will be published in: http://pos.sissa.it/

  19. Fast CMOS binary front-end for silicon strip detectors at LHC experiments

    CERN Document Server

    Kaplon, Jan

    2004-01-01

    We present the design and the test results of a front-end circuit developed in a 0.25 mu m CMOS technology. The aim of this work is to study the performance of a deep submicron process in applications for fast binary front-end for silicon strip detectors. The channel comprises a fast transimpedance preamplifier working with an active feedback loop, two stages of the amplifier-integrator circuits providing 22 ns peaking time and two-stage differential discriminator. Particular effort has been made to minimize the current and the power consumption of the preamplifier, while keeping the required noise and timing performance. For a detector capacitance of 20 pF noise below 1500 e/sup -/ ENC has been achieved for 300 mu A bias current in the input transistor, which is comparable with levels achieved in the past for a front-end using bipolar input transistor. The total supply current of the front-end is 600 mu A and the power dissipation is 1.5 mW per channel. The offset spread of the comparator is below 3 mV rms.

  20. CMS Barrel Pixel Detector Overview

    CERN Document Server

    Kästli, H C; Erdmann, W; Gabathuler, K; Hörmann, C; Horisberger, Roland Paul; König, S; Kotlinski, D; Meier, B; Robmann, P; Rohe, T; Streuli, S

    2007-01-01

    The pixel detector is the innermost tracking device of the CMS experiment at the LHC. It is built from two independent sub devices, the pixel barrel and the end disks. The barrel consists of three concentric layers around the beam pipe with mean radii of 4.4, 7.3 and 10.2 cm. There are two end disks on each side of the interaction point at 34.5 cm and 46.5 cm. This article gives an overview of the pixel barrel detector, its mechanical support structure, electronics components, services and its expected performance.

  1. Low mass hybrid pixel detectors for the high luminosity LHC upgrade

    Energy Technology Data Exchange (ETDEWEB)

    Gonella, Laura

    2013-10-15

    Reducing material in silicon trackers is of major importance for a good overall detector performance, and poses severe challenges to the design of the tracking system. To match the low mass constraints for trackers in High Energy Physics experiments at high luminosity, dedicated technological developments are required. This dissertation presents three technologies to design low mass hybrid pixel detectors for the high luminosity upgrades of the LHC. The work targets specifically the reduction of the material from the detector services and modules, with novel powering schemes, flip chip and interconnection technologies. A serial powering scheme is prototyped, featuring a new regulator concept, a control and protection element, and AC-coupled data transmission. A modified flip chip technology is developed for thin, large area Front-End chips, and a via last Through Silicon Via process is demonstrated on existing pixel modules. These technologies, their developments, and the achievable material reduction are discussed using the upgrades of the ATLAS pixel detector as a case study.

  2. Low mass hybrid pixel detectors for the high luminosity LHC upgrade

    International Nuclear Information System (INIS)

    Gonella, Laura

    2013-10-01

    Reducing material in silicon trackers is of major importance for a good overall detector performance, and poses severe challenges to the design of the tracking system. To match the low mass constraints for trackers in High Energy Physics experiments at high luminosity, dedicated technological developments are required. This dissertation presents three technologies to design low mass hybrid pixel detectors for the high luminosity upgrades of the LHC. The work targets specifically the reduction of the material from the detector services and modules, with novel powering schemes, flip chip and interconnection technologies. A serial powering scheme is prototyped, featuring a new regulator concept, a control and protection element, and AC-coupled data transmission. A modified flip chip technology is developed for thin, large area Front-End chips, and a via last Through Silicon Via process is demonstrated on existing pixel modules. These technologies, their developments, and the achievable material reduction are discussed using the upgrades of the ATLAS pixel detector as a case study.

  3. Noise propagation issues in Belle II pixel detector power cable

    Science.gov (United States)

    Iglesias, M.; Arteche, F.; Echeverria, I.; Pradas, A.; Rivetta, C.; Moser, H.-G.; Kiesling, C.; Rummel, S.; Arcega, F. J.

    2018-04-01

    The vertex detector used in the upgrade of High-Energy physics experiment Belle II includes DEPFET pixel detector (PXD) technology. In this complex topology the power supply units and the front-end electronics are connected through a PXD power cable bundle which may propagate the output noise from the power supplies to the vertex area. This paper presents a study of the propagation of noise caused by power converters in the PXD cable bundle based on Multi-conductor Transmission Line (MTL) theory. The work exposes the effect of the complex cable topology and shield connections on the noise propagation, which has an impact on the requirements of the power supplies. This analysis is part of the electromagnetic compatibility based design focused on functional safety to define the shield connections and power supply specifications required to ensure the successful integration of the detector and, specifically, to achieve the designed performance of the front-end electronics.

  4. Prototype ATLAS IBL Modules using the FE-I4A Front-End Readout Chip

    CERN Document Server

    Albert, J; Alimonti, Gianluca; Allport, Phil; Altenheiner, Silke; Ancu, Lucian; Andreazza, Attilio; Arguin, Jean-Francois; Arutinov, David; Backhaus, Malte; Bagolini, Alvise; Ballansat, Jacques; Barbero, Marlon; Barbier, Gérard; Bates, Richard; Battistin, Michele; Baudin, Patrick; Beau, Tristan; Beccherle, Roberto; Beck, Hans Peter; Benoit, Mathieu; Bensinger, Jim; Bomben, Marco; Borri, Marcello; Boscardin, Maurizio; Botelho Direito, Jose Antonio; Bousson, Nicolas; Boyd, George Russell Jr; Breugnon, Patrick; Bruni, Graziano; Bruschi, Marco; Buchholz, Peter; Buttar, Craig; Cadoux, Franck; Calderini, Giovanni; Caminada, Leah; Capeans, Mar; Casse, Gianluigi; Catinaccio, Andrea; Cavalli-Sforza, Matteo; Chauveau, Jacques; Chu, Ming-Lee; Ciapetti, Marco; Cindro, Vladimir; Citterio, Mauro; Clark, Allan; Cobal, Marina; Coelli, Simone; Colijn, Auke-Pieter; Colin, Daly; Collot, Johann; Crespo-Lopez, Olivier; Dalla Betta, Gian-Franco; Darbo, Giovanni; DaVia, Cinzia; David, Pierre-Yves; Debieux, Stéphane; Delebecque, Pierre; Devetak, Erik; DeWilde, Burton; Di Girolamo, Beniamino; Dinu, Nicoleta; Dittus, Fridolin; Diyakov, Denis; Djama, Fares; Dobos, Daniel Adam; Doonan, Kate; Dopke, Jens; Dorholt, Ole; Dube, Sourabh; Dushkin, Andrey; Dzahini, Daniel; Egorov, Kirill; Ehrmann, Oswin; Elldge, David; Elles, Sabine; Elsing, Markus; Eraud, Ludovic; Ereditato, Antonio; Eyring, Andreas; Falchieri, Davide; Falou, Aboud; Fang, Xiaochao; Fausten, Camille; Favre, Yannick; Ferrere, Didier; Fleta, Celeste; Fleury, Julien; Flick, Tobias; Forshaw, Dean; Fougeron, Denis; Fritzsch, Thomas; Gabrielli, Alessandro; Gaglione, Renaud; Gallrapp, Christian; Gan, K; Garcia-Sciveres, Maurice; Gariano, Giuseppe; Gastaldi, Thibaut; Gemme, Claudia; Gensolen, Fabrice; George, Matthias; Ghislain, Patrick; Giacomini, Gabriele; Gibson, Stephen; Giordani, Mario Paolo; Giugni, Danilo; Gjersdal, Håvard; Glitza, Karl Walter; Gnani, Dario; Godlewski, Jan; Gonella, Laura; Gorelov, Igor; Gorišek, Andrej; Gössling, Claus; Grancagnolo, Sergio; Gray, Heather; Gregor, Ingrid-Maria; Grenier, Philippe; Grinstein, Sebastian; Gromov, Vladimir; Grondin, Denis; Grosse-Knetter, Jörn; Hansen, Thor-Erik; Hansson, Per; Harb, Ali; Hartman, Neal; Hasi, Jasmine; Hegner, Franziska; Heim, Timon; Heinemann, Beate; Hemperek, Tomasz; Hessey, Nigel; Hetmánek, Martin; Hoeferkamp, Martin; Hostachy, Jean-Yves; Hügging, Fabian; Husi, Coralie; Iacobucci, Giuseppe; Idarraga, John; Ikegami, Yoichi; Janoška, Zdenko; Jansen, Jens; Jansen, Luc; Jensen, Frank; Jentzsch, Jennifer; Joseph, John; Kagan, Harris; Karagounis, Michael; Kass, Richard; Kenney, Christopher J; Kersten, Susanne; Kind, Peter; Klingenberg, Reiner; Kluit, Ruud; Kocian, Martin; Koffeman, Els; Kok, Angela; Korchak, Oleksandr; Korolkov, Ilya; Kostyukhin, Vadim; Krieger, Nina; Krüger, Hans; Kruth, Andre; Kugel, Andreas; Kuykendall, William; La Rosa, Alessandro; Lai, Chung-Hang; Lantzsch, Kerstin; Laporte, Didier; Lapsien, Tobias; Lounis, abdenour; Lozano, Manuel; Lu, Yunpeng; Lubatti, Henry; Macchiolo, Anna; Mallik, Usha; Mandić, Igor; Marchand, Denis; Marchiori, Giovanni; Massol, Nicolas; Matthias, Wittgen; Mättig, Peter; Mekkaoui, Abderrazak; Menouni, Mohsine; Menu, Johann; Meroni, Chiara; Mesa, Javier; Micelli, Andrea; Michal, Sébastien; Miglioranzi, Silvia; Mikuž, Marko; Mitsui, Shingo; Monti, Mauro; Moore, J; Morettini, Paolo; Muenstermann, Daniel; Murray, Peyton; Nellist, Clara; Nelson, David J; Nessi, Marzio; Neumann, Manuel; Nisius, Richard; Nordberg, Markus; Nuiry, Francois-Xavier; Oppermann, Hermann; Oriunno, Marco; Padilla, Cristobal; Parker, Sherwood; Pellegrini, Giulio; Pelleriti, Gabriel; Pernegger, Heinz; Piacquadio, Nicola Giacinto; Picazio, Attilio; Pohl, David; Polini, Alessandro; Popule, Jiří; Portell Bueso, Xavier; Povoli, Marco; Puldon, David; Pylypchenko, Yuriy; Quadt, Arnulf; Quirion, David; Ragusa, Francesco; Rambure, Thibaut; Richards, Erik; Ristic, Branislav; Røhne, Ole; Rothermund, Mario; Rovani, Alessandro; Rozanov, Alexandre; Rubinskiy, Igor; Rudolph, Matthew Scott; Rummler, André; Ruscino, Ettore; Salek, David; Salzburger, Andreas; Sandaker, Heidi; Schipper, Jan-David; Schneider, Basil; Schorlemmer, Andre; Schroer, Nicolai; Schwemling, Philippe; Seidel, Sally; Seiden, Abraham; Šícho, Petr; Skubic, Patrick; Sloboda, Michal; Smith, D; Sood, Alex; Spencer, Edwin; Strang, Michael; Stugu, Bjarne; Stupak, John; Su, Dong; Takubo, Yosuke; Tassan, Jean; Teng, Ping-Kun; Terada, Susumu; Todorov, Theodore; Tomášek, Michal; Toms, Konstantin; Travaglini, Riccardo; Trischuk, William; Troncon, Clara; Troska, Georg; Tsiskaridze, Shota; Tsurin, Ilya; Tsybychev, Dmitri; Unno, Yoshinobu; Vacavant, Laurent; Verlaat, Bart; Vianello, Elisa; Vigeolas, Eric; von Kleist, Stephan; Vrba, Václav; Vuillermet, Raphaël; Wang, Rui; Watts, Stephen; Weber, Michele; Weber, Marteen; Weigell, Philipp; Weingarten, Jens; Welch, Steven David; Wenig, Siegfried; Wermes, Norbert; Wiese, Andreas; Wittig, Tobias; Yildizkaya, Tamer; Zeitnitz, Christian; Ziolkowski, Michal; Zivkovic, Vladimir; Zoccoli, Antonio; Zorzi, Nicola; Zwalinski, Lukasz

    2012-01-01

    The ATLAS Collaboration will upgrade its semiconductor pixel tracking detector with a new Insertable B-layer (IBL) between the existing pixel detector and the vacuum pipe of the Large Hadron Collider. The extreme operating conditions at this location have necessitated the development of new radiation hard pixel sensor technologies and a new front-end readout chip, called the FE-I4. Planar pixel sensors and 3D pixel sensors have been investigated to equip this new pixel layer, and prototype modules using the FE-I4A have been fabricated and characterized using 120 GeV pions at the CERN SPS and 4 GeV positrons at DESY, before and after module irradiation. Beam test results are presented, including charge collection efficiency, tracking efficiency and charge sharing.

  5. Pixel readout ASIC for an APD based 2D X-ray hybrid pixel detector with sub-nanosecond resolution

    Energy Technology Data Exchange (ETDEWEB)

    Thil, Ch., E-mail: christophe.thil@ziti.uni-heidelberg.d [Heidelberg University, Institute of Computer Engineering, B6, 26, 68161 Mannheim (Germany); Baron, A.Q.R. [RIKEN SPring-8 Center, 1-1-1 Kouto, Sayo-cho, Sayo-gun, Hyogo 679-5148 (Japan); Fajardo, P. [ESRF, Polygone Scientifique Louis Neel, 6, rue Jules Horowitz, 38000 Grenoble (France); Fischer, P. [Heidelberg University, Institute of Computer Engineering, B6, 26, 68161 Mannheim (Germany); Graafsma, H. [DESY, Notkestrasse 85, 22607 Hamburg (Germany); Rueffer, R. [ESRF, Polygone Scientifique Louis Neel, 6, rue Jules Horowitz, 38000 Grenoble (France)

    2011-02-01

    The fast response and the short recovery time of avalanche photodiodes (APDs) in linear mode make those devices ideal for direct X-ray detection in applications requiring high time resolution or counting rate. In order to provide position sensitivity, the XNAP project aims at creating a hybrid pixel detector with nanosecond time resolution based on a monolithic APD sensor array with 32 x32 pixels covering about 1 cm{sup 2} active area. The readout is implemented in a pixelated front-end ASIC suited for the readout of such arrays, matched to pixels of 280{mu}mx280{mu}m size. Every single channel features a fast transimpedance amplifier, a discriminator with locally adjustable threshold and two counters with high dynamic range and counting speed able to accumulate X-ray hits with no readout dead time. Additionally, the detector can be operated in list mode by time-stamping every single event with sub-nanosecond resolution. In a first phase of the project, a 4x4 pixel test module is built to validate the conceptual design of the detector. The XNAP project is briefly presented and the performance of the readout ASIC is discussed.

  6. Pixel readout ASIC for an APD based 2D X-ray hybrid pixel detector with sub-nanosecond resolution

    International Nuclear Information System (INIS)

    Thil, Ch.; Baron, A.Q.R.; Fajardo, P.; Fischer, P.; Graafsma, H.; Rueffer, R.

    2011-01-01

    The fast response and the short recovery time of avalanche photodiodes (APDs) in linear mode make those devices ideal for direct X-ray detection in applications requiring high time resolution or counting rate. In order to provide position sensitivity, the XNAP project aims at creating a hybrid pixel detector with nanosecond time resolution based on a monolithic APD sensor array with 32 x32 pixels covering about 1 cm 2 active area. The readout is implemented in a pixelated front-end ASIC suited for the readout of such arrays, matched to pixels of 280μmx280μm size. Every single channel features a fast transimpedance amplifier, a discriminator with locally adjustable threshold and two counters with high dynamic range and counting speed able to accumulate X-ray hits with no readout dead time. Additionally, the detector can be operated in list mode by time-stamping every single event with sub-nanosecond resolution. In a first phase of the project, a 4x4 pixel test module is built to validate the conceptual design of the detector. The XNAP project is briefly presented and the performance of the readout ASIC is discussed.

  7. Development of thin pixel detectors on epitaxial silicon for HEP experiments

    International Nuclear Information System (INIS)

    Boscardin, Maurizio; Calvo, Daniela; Giacomini, Gabriele; Wheadon, Richard; Ronchin, Sabina; Zorzi, Nicola

    2013-01-01

    The foreseen luminosity of the new experiments in High Energy Physics will require that the innermost layer of vertex detectors will be able to sustain fluencies up to 10 16 n eq /cm 2 . Moreover, in many experiments there is a demand for the minimization of the material budget of the detectors. Therefore, thin pixel devices fabricated on n-type silicon are a natural choice to fulfill these requirements due to their rad-hard performances and low active volume. We present an R and D activity aimed at developing a new thin hybrid pixel device in the framework of PANDA experiments. The detector of this new device is a p-on-n pixel sensor realized starting from epitaxial silicon wafers and back thinned up to 50–100 μm after process completion. We present the main technological steps and some electrical characterization on the fabricated devices before and after back thinning and after bump bonding to the front-end electronics

  8. Development of thin pixel detectors on epitaxial silicon for HEP experiments

    Energy Technology Data Exchange (ETDEWEB)

    Boscardin, Maurizio, E-mail: boscardi@fbk.eu [FBK, CMM, Via Sommarive 18, I-38123 Povo, Trento (Italy); Calvo, Daniela [INFN and Dipartimento di Fisica, Università di Torino, Via Pietro Giuria, I-10125 Torino (Italy); Giacomini, Gabriele [FBK, CMM, Via Sommarive 18, I-38123 Povo, Trento (Italy); Wheadon, Richard [INFN and Dipartimento di Fisica, Università di Torino, Via Pietro Giuria, I-10125 Torino (Italy); Ronchin, Sabina; Zorzi, Nicola [FBK, CMM, Via Sommarive 18, I-38123 Povo, Trento (Italy)

    2013-08-01

    The foreseen luminosity of the new experiments in High Energy Physics will require that the innermost layer of vertex detectors will be able to sustain fluencies up to 10{sup 16} n{sub eq}/cm{sup 2}. Moreover, in many experiments there is a demand for the minimization of the material budget of the detectors. Therefore, thin pixel devices fabricated on n-type silicon are a natural choice to fulfill these requirements due to their rad-hard performances and low active volume. We present an R and D activity aimed at developing a new thin hybrid pixel device in the framework of PANDA experiments. The detector of this new device is a p-on-n pixel sensor realized starting from epitaxial silicon wafers and back thinned up to 50–100 μm after process completion. We present the main technological steps and some electrical characterization on the fabricated devices before and after back thinning and after bump bonding to the front-end electronics.

  9. Study of run time errors of the ATLAS Pixel Detector in the 2012 data taking period

    CERN Document Server

    AUTHOR|(INSPIRE)INSPIRE-00339072

    2013-05-16

    The high resolution silicon Pixel detector is critical in event vertex reconstruction and in particle track reconstruction in the ATLAS detector. During the pixel data taking operation, some modules (Silicon Pixel sensor +Front End Chip+ Module Control Chip (MCC)) go to an auto-disable state, where the Modules don’t send the data for storage. Modules become operational again after reconfiguration. The source of the problem is not fully understood. One possible source of the problem is traced to the occurrence of single event upset (SEU) in the MCC. Such a module goes to either a Timeout or Busy state. This report is the study of different types and rates of errors occurring in the Pixel data taking operation. Also, the study includes the error rate dependency on Pixel detector geometry.

  10. Trends in the design of front-end systems for room temperature solid state detectors

    International Nuclear Information System (INIS)

    Manfredi, Pier F.; Re, Valerio

    2003-01-01

    The paper discusses the present trends in the design of low-noise front-end systems for room temperature semiconductor detectors. The technological advancement provided by submicron CMOS and BiCMOS processes is examined from several points of view. The noise performances are a fundamental issue in most detector applications and suitable attention is devoted to them for the purpose of judging whether or not the present processes supersede the solutions featuring a field-effect transistor as a front-end element. However, other considerations are also important in judging how well a monolithic technology suits the front-end design. Among them, the way a technology lends itself to the realization of additional functions, for instance, the charge reset in a charge-sensitive loop or the time-variant filters featuring the special weighting functions that may be requested in some applications of CdTe or CZT detectors

  11. The DIALOG Chip in the Front-End Electronics of the LHCb Muon Detector

    CERN Document Server

    Cadeddu, S; Lai, A

    2004-01-01

    We present a custom integrated circuit, named DIALOG, which is a fundamental building block in the front-end architecture of the LHCb Muon detector. DIALOG is realized in IBM 0.25 um technology, using radiation hardening layout techniques. DIALOG integrates important tools for detector time alignment procedures and time alignment monitoring on the front- end system. In particular, it integrates 16 programmable delays, which can be regulated in steps of 1 ns. Many other features, necessary for the Muon trigger operation and for a safe front-end monitoring are integrated: DIALOG generates the information used by the trigger as a combination of its 16 inputs from the Amplifier-Shaper-Discriminator (ASD) chips, it generates the thresholds of the ASD, it monitors the rate of all its input channels. We describe the circuit architecture, its internal blocks and its main modes of operation.

  12. Front-end Intelligence for triggering and local track recognition in Gas Pixel Detectors

    CERN Document Server

    Hessey, NP; The ATLAS collaboration; van der Graaf, H; Vermeulen, J; Jansweijer, P; Romaniouk, A

    2012-01-01

    The combination of gaseous detectors with pixel readout chips gives unprecedented hit resolution (improving from O(100 um) for wire chambers to 10 um), as well as high-rate capability, low radiation length and giving in addition angular information on the local track. These devices measure individually every electron liberated by the passage of a charged particle, leading to a large quantity of data to be read out. Typically an external trigger is used to start the read-out. We are investigating the addition of local intelligence to the pixel read-out chip. A first level of processing detects the passage of a particle through the gas volume, and accurately determines the time of passage. A second level measures in an approximate but fast way the tilt-angle of the track. This can be used to trigger a third stage in which all hits associated to the track are processed locally to give a least-squares-fit to the track. The chip can then send out just the fitted track parameters instead of the individual electron ...

  13. EXCALIBUR: a small-pixel photon counting area detector for coherent X-ray diffraction - Front-end design, fabrication and characterisation

    Science.gov (United States)

    Marchal, J.; Horswell, I.; Willis, B.; Plackett, R.; Gimenez, E. N.; Spiers, J.; Ballard, D.; Booker, P.; Thompson, J. A.; Gibbons, P.; Burge, S. R.; Nicholls, T.; Lipp, J.; Tartoni, N.

    2013-03-01

    Coherent X-ray diffraction experiments on synchrotron X-ray beamlines require detectors with high spatial resolution and large detection area. The read-out chip developed by the MEDIPIX3 collaboration offers a small pixel size of 55 microns resulting in a very high spatial resolution when coupled to a direct X-ray conversion segmented silicon sensor. MEDIPIX3 assemblies present also the advantages of hybrid pixel detectors working in single photon counting mode: noiseless imaging, large dynamic range, extremely high frame rate. The EXCALIBUR detector is under development for the X-ray Coherence and Imaging Beamline I13 of the Diamond Light Source. This new detector consists of three modules, each with 16 MEDIPIX3 chips which can be read-out at 100 frames per second in continuous mode or 1000 frames per second in burst mode. In each module, the sensor is a large single silicon die covering 2 rows of 8 individual MEDIPIX3 read-out chips and provides a continuous active detection region within a module. Each module includes 1 million solder bumps connecting the 55 microns pixels of the silicon sensor to the 55 microns pixels of the 16 MEDIPIX3 read-out chips. The detection area of the 3-module EXCALIBUR detector is 115 mm × 100 mm with a small 6.8 mm wide inactive region between modules. Each detector module is connected to 2 FPGA read-out boards via a flexi-rigid circuit to allow a fully parallel read-out of the 16 MEDIPIX3 chips. The 6 FPGA read-out boards used in the EXCALIBUR detector are interfaced to 6 computing nodes via 10Gbit/s fibre-optic links to maintain the very high frame-rate capability. The standard suite of EPICS control software is used to operate the detector and to integrate it with the Diamond Light Source beamline software environment. This article describes the design, fabrication and characterisation of the MEDIPIX3-based modules composing the EXCALIBUR detector.

  14. EXCALIBUR: a small-pixel photon counting area detector for coherent X-ray diffraction - Front-end design, fabrication and characterisation

    International Nuclear Information System (INIS)

    Marchal, J; Horswell, I; Willis, B; Plackett, R; Gimenez, E N; Spiers, J; Thompson, J A; Gibbons, P; Tartoni, N; Ballard, D; Booker, P; Burge, S R; Nicholls, T; Lipp, J

    2013-01-01

    Coherent X-ray diffraction experiments on synchrotron X-ray beamlines require detectors with high spatial resolution and large detection area. The read-out chip developed by the MEDIPIX3 collaboration offers a small pixel size of 55 microns resulting in a very high spatial resolution when coupled to a direct X-ray conversion segmented silicon sensor. MEDIPIX3 assemblies present also the advantages of hybrid pixel detectors working in single photon counting mode: noiseless imaging, large dynamic range, extremely high frame rate. The EXCALIBUR detector is under development for the X-ray Coherence and Imaging Beamline I13 of the Diamond Light Source. This new detector consists of three modules, each with 16 MEDIPIX3 chips which can be read-out at 100 frames per second in continuous mode or 1000 frames per second in burst mode. In each module, the sensor is a large single silicon die covering 2 rows of 8 individual MEDIPIX3 read-out chips and provides a continuous active detection region within a module. Each module includes 1 million solder bumps connecting the 55 microns pixels of the silicon sensor to the 55 microns pixels of the 16 MEDIPIX3 read-out chips. The detection area of the 3-module EXCALIBUR detector is 115 mm × 100 mm with a small 6.8 mm wide inactive region between modules. Each detector module is connected to 2 FPGA read-out boards via a flexi-rigid circuit to allow a fully parallel read-out of the 16 MEDIPIX3 chips. The 6 FPGA read-out boards used in the EXCALIBUR detector are interfaced to 6 computing nodes via 10Gbit/s fibre-optic links to maintain the very high frame-rate capability. The standard suite of EPICS control software is used to operate the detector and to integrate it with the Diamond Light Source beamline software environment. This article describes the design, fabrication and characterisation of the MEDIPIX3-based modules composing the EXCALIBUR detector.

  15. Deployment of the CMS Tracker AMC as Backend for the CMS Pixel Detector

    CERN Document Server

    AUTHOR|(CDS)2079000

    2016-01-01

    The silicon pixel detector of the CMS experiment at CERN will be replaced with an upgraded version at the beginning of 2017 with the new detector featuring an additional barrel- and end-cap layer resulting in an increased number of fully digital read-out links running at 400Mb/s. New versions of the PSI46 Read-Out Chip and Token Bit Manager have been developed to operate at higher rates and reduce data loss. Front-End Controller and Front-End Driver boards, based on the {\\textmu}TCA compatible CMS Tracker AMC, a variant of the FC7 card, are being developed using different mezzanines to host the optical links for the digital read-out and control system. An overview of the system architecture is presented, with details on the implementation, and first results obtained from test systems.

  16. Charge Pump Clock Generation PLL for the Data Output Block of the Upgraded ATLAS Pixel Front-End in 130 nm CMOS

    CERN Document Server

    Kruth, A; Arutinov, D; Barbero, M; Gronewald, M; Hemperek, T; Karagounis, M; Krueger, H; Wermes, N; Fougeron, D; Menouni, M; Beccherle, R; Dube, S; Ellege, D; Garcia-Sciveres, M; Gnani, D; Mekkaoui, A; Gromov, V; Kluit, R; Schipper, J

    2009-01-01

    FE-I4 is the 130 nm ATLAS pixel IC currently under development for upgraded Large Hadron Collider (LHC) luminosities. FE-I4 is based on a low-power analog pixel array and digital architecture concepts tuned to higher hit rates [1]. An integrated Phase Locked Loop (PLL) has been developed that locally generates a clock signal for the 160 Mbit/s output data stream from the 40 MHz bunch crossing reference clock. This block is designed for low power, low area consumption and recovers quickly from loss of lock related to single-event transients in the high radiation environment of the ATLAS pixel detector. After a general introduction to the new FE-I4 pixel front-end chip, this work focuses on the FE-I4 output blocks and on a first PLL prototype test chip submitted in early 2009. The PLL is nominally operated from a 1.2V supply and consumes 3.84mW of DC power. Under nominal operating conditions, the control voltage settles to within 2% of its nominal value in less than 700 ns. The nominal operating frequency for t...

  17. Development of the MCM-D technique for pixel detector modules

    International Nuclear Information System (INIS)

    Grah, C.

    2005-03-01

    This thesis treats a copper--polymer based thin film technology, the MCM-D technique and its application when building hybrid pixel detector modules. The ATLAS experiment at the LHC will be equipped with a pixel detector system. The basic mechanical units of the pixel detector are multi chip modules. The main components of these modules are: 16 electronic chips, a controller chip and a large sensor tile, featuring more than 46000 sensor cells. MCM-D is a superior technique to build the necessary signal bus system and the power distribution system directly on the active sensor tile. In collaboration with the Fraunhofer Institute for Reliability and Microintegration, IZM, the thin film process is reviewed and enhanced. The multi layer system was designed and optimized for the interconnection system as well as for the 46000 pixel contacts. Laboratory measurements on prototypes prove that complex routing schemes for geometrically optimized single chips are suitable and have negligible influence on the front--end chips performance. A full scale MCM-D module has been built and it is shown that the technology is suitable to build pixel detector modules. Further tests include the investigation of the impact of hadronic irradiation on the thin film layers. Single chip assemblies have been operated in a test beam environment and the feasibility of the optimization of the sensors could be shown. A review on the potential as well as the perspective for the MCM-D technique in future experiments is given

  18. Low mass hybrid pixel detectors for the high luminosity LHC upgrade

    CERN Document Server

    Gonella, Laura; Desch, Klaus

    2013-11-11

    Reducing material in silicon trackers is of major importance for a good overall detector performance, and poses severe challenges to the design of the tracking system. To match the low mass constraints for trackers in High Energy Physics experiments at high luminosity, dedicated technological developments are required. This dissertation presents three technologies to design low mass hybrid pixel detectors for the high luminosity upgrades of the LHC. The work targets specifically the reduction of the material from the detector services and modules, with novel powering schemes, flip chip and interconnection technologies. A serial powering scheme is prototyped, featuring a new regulator concept, a control and protection element, and AC-coupled data transmission. A modified flip chip technology is developed for thin, large area Front-End chips, and a via last Through Silicon Via process is demonstrated on existing pixel modules. These technologies, their developments, and the achievable material reduction are dis...

  19. Test Beam Performance Measurements for the Phase I Upgrade of the CMS Pixel Detector

    CERN Document Server

    Dragicevic, M.; Hrubec, J.; Steininger, H.; Gädda, A.; Härkönen, J.; Lampén, T.; Luukka, P.; Peltola, T.; Tuominen, E.; Tuovinen, E.; Winkler, A.; Eerola, P.; Tuuva, T.; Baulieu, G.; Boudoul, G.; Caponetto, L.; Combaret, C.; Contardo, D.; Dupasquier, T.; Gallbit, G.; Lumb, N.; Mirabito, L.; Perries, S.; Donckt, M.Vander; Viret, S.; Bonnin, C.; Charles, L.; Gross, L.; Hosselet, J.; Tromson, D.; Feld, L.; Karpinski, W.; Klein, K.; Lipinski, M.; Pierschel, G.; Preuten, M.; Rauch, M.; Wlochal, M.; Aldaya, M.; Asawatangtrakuldee, C.; Beernaert, K.; Bertsche, D.; Contreras-Campana, C.; Eckerlin, G.; Eckstein, D.; Eichhorn, T.; Gallo, E.; Garcia, J.Garay; Hansen, K.; Haranko, M.; Harb, A.; Hauk, J.; Keaveney, J.; Kalogeropoulos, A.; Kleinwort, C.; Lohmann, W.; Mankel, R.; Maser, H.; Mittag, G.; Muhl, C.; Mussgiller, A.; Pitzl, D.; Reichelt, O.; Savitskyi, M.; Schütze, P.; Sola, V.; Spannagel, S.; Walsh, R.; Zuber, A.; Biskop, H.; Buhmann, P.; Centis-Vignali, M.; Garutti, E.; Haller, J.; Hoffmann, M.; Klanner, R.; Lapsien, T.; Matysek, M.; Perieanu, A.; Scharf, Ch.; Schleper, P.; Schmidt, A.; Schwandt, J.; Sonneveld, J.; Steinbrück, G.; Vormwald, B.; Wellhausen, J.; Abbas, M.; Amstutz, C.; Barvich, T.; Barth, Ch.; Boegelspacher, F.; Boer, W.De; Butz, E.; Casele, M.; Colombo, F.; Dierlamm, A.; Freund, B.; Hartmann, F.; Heindl, S.; Husemann, U.; Kornmeyer, A.; Kudella, S.; Muller, Th.; Simonis, H.J.; Steck, P.; Weber, M.; Weiler, Th.; Kiss, T.; Siklér, F.; Tölyhi, T.; Veszprémi, V.; Cariola, P.; Creanza, D.; Palma, M.De; Robertis, G.De; Fiore, L.; Franco, M.; Loddo, F.; Sala, G.; Silvestris, L.; Maggi, G.; My, S.; Selvaggi, G.; Albergo, S.; Cappello, G.; Costa, S.; Mattia, A.Di; Giordano, F.; Potenza, R.; Saizu, M.A.; Tricomi, A.; Tuve, C.; Focardi, E.; Dinardo, M.E.; Fiorendi, S.; Gennai, S.; Malvezzi, S.; Manzoni, R.A.; Menasce, D.; Moroni, L.; Pedrini, D.; Azzi, P.; Bacchetta, N.; Bisello, D.; Dall'Osso, M.; Pozzobon, N.; Tosi, M.; Solestizi, L.Alunni; Biasini, M.; Bilei, G.M.; Cecchi, C.; Checcucci, B.; Ciangottini, D.; Fanò, L.; Gentsos, C.; Ionica, M.; Leonardi, R.; Manoni, E.; Mantovani, G.; Marconi, S.; Mariani, V.; Menichelli, M.; Modak, A.; Morozzi, A.; Moscatelli, F.; Passeri, D.; Placidi, P.; Postolache, V.; Rossi, A.; Saha, A.; Santocchia, A.; Storchi, L.; Spiga, D.; Androsov, K.; Azzurri, P.; Bagliesi, G.; Basti, A.; Boccali, T.; Borrello, L.; Bosi, F.; Castaldi, R.; Ceccanti, M.; Ciocci, M.A.; Dell'Orso, R.; Donato, S.; Fedi, G.; Giassi, A.; Grippo, M.T.; Ligabue, F.; Magazzu, G.; Mammini, P.; Mariani, F.; Mazzoni, E.; Messineo, A.; Moggi, A.; Morsani, F.; Palla, F.; Palmonari, F.; Profeti, A.; Raffaelli, F.; Ragonesi, A.; Rizzi, A.; Soldani, A.; Spagnolo, P.; Tenchini, R.; Tonelli, G.; Venturi, A.; Verdini, P.G.; Abbaneo, D.; Ahmed, I.; Albert, E.; Auzinger, G.; Berruti, G.; Bonnaud, J.; Daguin, J.; D'Auria, A.; Detraz, S.; Dondelewski, O.; Engegaard, B.; Faccio, F.; Frank, N.; Gill, K.; Honma, A.; Kornmayer, A.; Labaza, A.; Manolescu, F.; McGill, I.; Mersi, S.; Michelis, S.; Onnela, A.; Ostrega, M.; Pavis, S.; Peisert, A.; Pernot, J.F.; Petagna, P.; Postema, H.; Rapacz, K.; Sigaud, C.; Tropea, P.; Troska, J.; Tsirou, A.; Vasey, F.; Verlaat, B.; Vichoudis, P.; Zwalinski, L.; Bachmair, F.; Becker, R.; di Calafiori, D.; Casal, B.; Berger, P.; Djambazov, L.; Donega, M.; Grab, C.; Hits, D.; Hoss, J.; Kasieczka, G.; Lustermann, W.; Mangano, B.; Marionneau, M.; Arbol, P.Martinez Ruiz del; Masciovecchio, M.; Meinhard, M.; Perozzi, L.; Roeser, U.; Starodumov, A.; Tavolaro, V.; Wallny, R.; Zhu, D.; Amsler, C.; Bösiger, K.; Caminada, L.; Canelli, F.; Chiochia, V.; de Cosa, A.; Galloni, C.; Hreus, T.; Kilminster, B.; Lange, C.; Maier, R.; Ngadiuba, J.; Pinna, D.; Robmann, P.; Taroni, S.; Yang, Y.; Bertl, W.; Deiters, K.; Erdmann, W.; Horisberger, R.; Kaestli, H.C.; Kotlinski, D.; Langenegger, U.; Meier, B.; Rohe, T.; Streuli, S.; Chen, P.H.; Dietz, C.; Fiori, F.; Grundler, U.; Hou, W.S.; Lu, R.S.; Moya, M.; Tsai, J.F.; Tzeng, Y.M.; Cussans, D.; Goldstein, J.; Grimes, M.; Newbold, D.; Hobson, P.; Reid, I.D.; Auzinger, G.; Bainbridge, R.; Dauncey, P.; Hall, G.; James, T.; Magnan, A.M.; Pesaresi, M.; Raymond, D.M.; Uchida, K.; Durkin, T.; Harder, K.; Shepherd-Themistocleous, C.; Chertok, M.; Conway, J.; Conway, R.; Flores, C.; Lander, R.; Pellett, D.; Ricci-Tam, F.; Squires, M.; Thomson, J.; Yohay, R.; Burt, K.; Ellison, J.; Hanson, G.; Olmedo, M.; Si, W.; Yates, B.R.; Dominguez, A.; Bartek, R.; Bentele, B.; Cumalat, J.P.; Ford, W.T.; Jensen, F.; Johnson, A.; Krohn, M.; Leontsinis, S.; Mulholland, T.; Stenson, K.; Wagner, S.R.; Apresyan, A.; Bolla, G.; Burkett, K.; Butler, J.N.; Canepa, A.; Cheung, H.W.K.; Christian, D.; Cooper, W.E.; Deptuch, G.; Derylo, G.; Gingu, C.; Grünendahl, S.; Hasegawa, S.; Hoff, J.; Howell, J.; Hrycyk, M.; Jindariani, S.; Johnson, M.; Kahlid, F.; Kwan, S.; Lei, C.M.; Lipton, R.; Sá, R.Lopes De; Liu, T.; Los, S.; Matulik, M.; Merkel, P.; Nahn, S.; Prosser, A.; Rivera, R.; Schneider, B.; Sellberg, G.; Shenai, A.; Siehl, K.; Spiegel, L.; Tran, N.; Uplegger, L.; Voirin, E.; Berry, D.R.; Chen, X.; Ennesser, L.; Evdokimov, A.; Gerber, C.E.; Makauda, S.; Mills, C.; Gonzalez, I.D.Sandoval; Alimena, J.; Antonelli, L.J.; Francis, B.; Hart, A.; Hill, C.S.; Parashar, N.; Stupak, J.; Bortoletto, D.; Bubna, M.; Hinton, N.; Jones, M.; Miller, D.H.; Shi, X.; Baringer, P.; Bean, A.; Khalil, S.; Kropivnitskaya, A.; Majumder, D.; Schmitz, E.; Wilson, G.; Ivanov, A.; Mendis, R.; Mitchell, T.; Skhirtladze, N.; Taylor, R.; Anderson, I.; Fehling, D.; Gritsan, A.; Maksimovic, P.; Martin, C.; Nash, K.; Osherson, M.; Swartz, M.; Xiao, M.; Acosta, J.G.; Cremaldi, L.M.; Oliveros, S.; Perera, L.; Summers, D.; Bloom, K.; Claes, D.R.; Fangmeier, C.; Suarez, R.Gonzalez; Monroy, J.; Siado, J.; Bartz, E.; Gershtein, Y.; Halkiadakis, E.; Kyriacou, S.; Lath, A.; Nash, K.; Osherson, M.; Schnetzer, S.; Stone, R.; Walker, M.; Malik, S.; Norberg, S.; Vargas, J.E.Ramirez; Alyari, M.; Dolen, J.; Godshalk, A.; Harrington, C.; Iashvili, I.; Kharchilava, A.; Nguyen, D.; Parker, A.; Rappoccio, S.; Roozbahani, B.; Alexander, J.; Chaves, J.; Chu, J.; Dittmer, S.; McDermott, K.; Mirman, N.; Rinkevicius, A.; Ryd, A.; Salvati, E.; Skinnari, L.; Soffi, L.; Tao, Z.; Thom, J.; Tucker, J.; Zientek, M.; Akgün, B.; Ecklund, K.M.; Kilpatrick, M.; Nussbaum, T.; Zabel, J.; D'Angelo, P.; Johns, W.; Rose, K.

    2017-05-30

    A new pixel detector for the CMS experiment is being built, owing to the instantaneous luminosities anticipated for the Phase I Upgrade of the LHC. The new CMS pixel detector provides four-hit tracking while featuring a reduced material budget as well as new cooling and powering schemes. A new front-end readout chip mitigates buffering and bandwidth limitations, and comprises a low-threshold comparator. These upgrades allow the new pixel detector to sustain and improve the efficiency of the current pixel tracker at the increased requirements imposed by high luminosities and pile-up. In this paper, comprehensive test beam studies are presented which have been conducted to verify the design and to quantify the performance of the new detector assemblies in terms of tracking efficiency and spatial resolution. Under optimal conditions, the tracking efficiency has been determined to be ($99.95 \\pm 0.05$) \\%, while the intrinsic spatial resolution has been measured to be ($4.80 \\pm 0.25$) $\\mu$m and ($7.99 \\pm 0.21$...

  20. Development of front-end electronics for LumiCal detector in CMOS 130 nm technology

    CERN Document Server

    Firlej, M; Idzik, M; Moron, J; Swientek, K; Terlecki, P

    2015-01-01

    front-end electronics for luminosity detector at future Linear Collider are presented. The 8-channel prototype was designed and fabricated in a 130 nm CMOS technology. Each channel comprises a charge sensitive preamplifier with pole-zero cancellation circuit and a CR-RC shaper with 50 ns peaking time. The measurements results confirm full functionality of the prototype and compliance with the requirements imposed by the detector specification. The power consumption of the front-end is in the range 0.6–1.5 mW per channel and the noise ENC around 900 e− at 10 pF input capacitance.

  1. Charge-sensitive poly-silicon TFT amplifiers for a-Si:H pixel particle detectors

    International Nuclear Information System (INIS)

    Cho, G.; Perez-Mendez, V.; Hack, M.; Lewis, A.

    1992-04-01

    Prototype charge-sensitive poly-Si TFT amplifiers have been made for the amplification of signals (from an a-Si:H pixel diode used as an ionizing particle detector). They consist of a charge-sensitive gain stage, a voltage gain stage and a source follower output stage. The gain-bandwidth product of the amplifier is ∼ 300 MHz. When the amplifier is connected to a pixel detector of 0.2 pF, it gives a charge-to-voltage gain of ∼ 0.02 mV/electrons with a pulse rise time less than 100 nsec. An equivalent noise charge of the front-end TFT is ∼ 1000 electrons for a shaping time of 1 μsec

  2. A Serializer ASIC at 5 Gbps for Detector Front-end Electronics Readout

    CERN Document Server

    Gong, D; The ATLAS collaboration; Liu, T; Xiang, A; Ye, J

    2010-01-01

    High speed and ultra low power serial data transmission over fiber optics plays an essential roll in detector front-end electronics readout for experiments at the LHC. The ATLAS Liquid Argon Calorimeter front-end readout upgrade for the sLHC calls for an optical link system with a data bandwidth of 100 Gbps per each front-end board (FEB), a factor of 62 increase compared with the present optical link system. The transmitter of this optical link will have to withstand the radiation environment where the front-end crates are situated, and stay within the current power dissipation budget limited by the present FEB cooling capacity. To meet these challenges, we developed a 16:1 serializer based on a commercial 0.25 μm silicon-on-sapphire (SOS) CMOS technology. This serializer, designed to work at 5 Gbps, is a key component in an optical link system. Test results of this ASIC will be reported. A system design for the 100 Gbps optical link system will also be presented, with discussions about key components identi...

  3. Design of analog front-ends for the RD53 demonstrator chip

    CERN Document Server

    Gaioni, L; Nodari, B; Manghisoni, M; Re, V; Traversi, G; Barbero, M B; Fougeron, D; Gensolen, F; Godiot, S; Menouni, M; Pangaud, P; Rozanov, A; Wang, A; Bomben, M; Calderini, G; Crescioli, F; Le Dortz, O; Marchiori, G; Dzahini, D; Rarbi, F E; Gaglione, R; Gonella, L; Hemperek, T; Huegging, F; Karagounis, M; Kishishita, T; Krueger, H; Rymaszewski, P; Wermes, N; Ciciriello, F; Corsi, F; Marzocca, C; De Robertis, G; Loddo, F; Licciulli, F; Andreazza, A; Liberali, V; Shojaii, S; Stabile, A; Bagatin, M; Bisello, D; Mattiazzo, S; Ding, L; Gerardin, S; Giubilato, P; Neviani, A; Paccagnella, A; Vogrig, D; Wyss, J; Bacchetta, N; Della Casa, G; Demaria, N; Mazza, G; Rivetti, A; Da Rocha Rolo, M D; Comotti, D; Ratti, L; Vacchi, C; Beccherle, R; Bellazzini, R; Magazzu, G; Minuti, M; Morsani, F; Palla, F; Poulios, S; Fanucci, L; Rizzi, A; Saponara, S; Androsov, K; Bilei, G M; Menichelli, M; Conti, E; Marconi, S; Passeri, D; Placidi, P; Monteil, E; Pacher, L; Paternò, A; Gajanana, D; Gromov, V; Hessey, N; Kluit, R; Zivkovic, V; Havranek, M; Janoska, Z; Marcisovsky, M; Neue, G; Tomasek, L; Kafka, V; Sicho, P; Vrba, V; Vila, I; Lopez-Morillo, E; Aguirre, M A; Palomo, F R; Muñoz, F; Abbaneo, D; Christiansen, J; Dannheim, D; Dobos, D; Linssen, L; Pernegger, H; Valerio, P; Alipour Tehrani, N; Bell, S; Prydderch, M L; Thomas, S; Christian, D C; Fahim, F; Hoff, J; Lipton, R; Liu, T; Zimmerman, T; Garcia-Sciveres, M; Gnani, D; Mekkaoui, A; Gorelov, I; Hoeferkamp, M; Seidel, S; Toms, K; De Witt, J N; Grillo, A

    2017-01-01

    The RD53 collaboration is developing a large scale pixel front-end chip, which will be a tool to evaluate the performance of 65 nm CMOS technology in view of its application to the readout of the innermost detector layers of ATLAS and CMS at the HL-LHC. Experimental results of the characterization of small prototypes will be discussed in the frame of the design work that is currently leading to the development of the large scale demonstrator chip RD53A to be submitted in early 2017. The paper is focused on the analog processors developed in the framework of the RD53 collaboration, including three time over threshold front-ends, designed by INFN Torino and Pavia, University of Bergamo and LBNL and a zero dead time front-end based on flash ADC designed by a joint collaboration between the Fermilab and INFN. The paper will also discuss the radiation tolerance features of the front-end channels, which were exposed to up to 800 Mrad of total ionizing dose to reproduce the system operation in the actual experiment.

  4. Front-end electronics for the CMS preshower detector

    CERN Document Server

    Go, A; Barney, D; Bloch, P; Peisert, Anna; Löfstedt, B; Reynaud, S; Borkar, S; Lalwani, S

    2002-01-01

    The front-end readout system PACE2 for the CMS preshower detector consists of two chips: Delta is a 32 channel preamplifier and shaper that provides low noise, charge to voltage readout for large capacitive silicon sensors over a large dynamic range (up to 400 MIPs); PACE-AM contains a 32-channel wide, 160-cell deep, analog memory with a 32 to 1 multiplexer for serial readout. These chips are designed in .8 mu m BiCMOS DMILL radiation tolerant technology. The performance in terms of dynamic range, linearity, noise, peaking time and memory uniformity are presented. (4 refs).

  5. Firmware development and testing of the ATLAS Pixel Detector / IBL ROD card

    International Nuclear Information System (INIS)

    Gabrielli, A.; Balbi, G.; Falchieri, D.; Lama, L.; Travaglini, R.; Backhaus, M.; Bindi, M.; Chen, S.P.; Hauck, S.; Hsu, S.C.; Flick, T.; Wensing, M.; Kretz, M.; Kugel, A.

    2015-01-01

    The ATLAS Experiment is reworking and upgrading systems during the current LHC shut down. In particular, the Pixel detector has inserted an additional inner layer called the Insertable B-Layer (IBL). The Readout-Driver card (ROD), the Back-of-Crate card (BOC), and the S-Link together form the essential frontend data path of the IBL's off-detector DAQ system. The strategy for IBL ROD firmware development was three-fold: keeping as much of the Pixel ROD datapath firmware logic as possible, employing a complete new scheme of steering and calibration firmware, and designing the overall system to prepare for a future unified code version integrating IBL and Pixel layers. Essential features such as data formatting, frontend-specific error handling, and calibration are added to the ROD data path. An IBL DAQ test bench using a realistic front-end chip model was created to serve as an initial framework for full offline electronic system simulation. In this document, major firmware achievements concerning the IBL ROD data path implementation, test on the test bench and ROD prototypes, will be reported. Recent Pixel collaboration efforts focus on finalizing hardware and firmware tests for the IBL. The plan is to approach a complete IBL DAQ hardware-software installation by the end of 2014

  6. Front end optimization for the monolithic active pixel sensor of the ALICE Inner Tracking System upgrade

    International Nuclear Information System (INIS)

    Kim, D.; Rinella, G. Aglieri; Cavicchioli, C.; Hillemanns, H.; Hristozkov, S.; Junique, A.; Keil, M.; Kofarago, M.; Kugathasan, T.; Mager, M.; Chanlek, N.; Collu, A.; Degerli, Y.; Flouzat, C.; Guilloux, F.; Dorokhov, A.; Gajanana, D.; Gao, C.; Kwon, Y.; Lattuca, A.

    2016-01-01

    ALICE plans to replace its Inner Tracking System during the second long shut down of the LHC in 2019 with a new 10 m 2 tracker constructed entirely with monolithic active pixel sensors. The TowerJazz 180 nm CMOS imaging Sensor process has been selected to produce the sensor as it offers a deep pwell allowing full CMOS in-pixel circuitry and different starting materials. First full-scale prototypes have been fabricated and tested. Radiation tolerance has also been verified. In this paper the development of the charge sensitive front end and in particular its optimization for uniformity of charge threshold and time response will be presented

  7. Front end optimization for the monolithic active pixel sensor of the ALICE Inner Tracking System upgrade

    Science.gov (United States)

    Kim, D.; Aglieri Rinella, G.; Cavicchioli, C.; Chanlek, N.; Collu, A.; Degerli, Y.; Dorokhov, A.; Flouzat, C.; Gajanana, D.; Gao, C.; Guilloux, F.; Hillemanns, H.; Hristozkov, S.; Junique, A.; Keil, M.; Kofarago, M.; Kugathasan, T.; Kwon, Y.; Lattuca, A.; Mager, M.; Sielewicz, K. M.; Marin Tobon, C. A.; Marras, D.; Martinengo, P.; Mazza, G.; Mugnier, H.; Musa, L.; Pham, T. H.; Puggioni, C.; Reidt, F.; Riedler, P.; Rousset, J.; Siddhanta, S.; Snoeys, W.; Song, M.; Usai, G.; Van Hoorne, J. W.; Yang, P.

    2016-02-01

    ALICE plans to replace its Inner Tracking System during the second long shut down of the LHC in 2019 with a new 10 m2 tracker constructed entirely with monolithic active pixel sensors. The TowerJazz 180 nm CMOS imaging Sensor process has been selected to produce the sensor as it offers a deep pwell allowing full CMOS in-pixel circuitry and different starting materials. First full-scale prototypes have been fabricated and tested. Radiation tolerance has also been verified. In this paper the development of the charge sensitive front end and in particular its optimization for uniformity of charge threshold and time response will be presented.

  8. The front-end (Level-0) electronics interface module for the LHCb RICH detectors

    Energy Technology Data Exchange (ETDEWEB)

    Adinolfi, M. [Sub-department of Particle Physics, University of Oxford, Denys Wilkinson Building, Keble Road, Oxford, OX1 3RH (United Kingdom); Bibby, J.H. [Sub-department of Particle Physics, University of Oxford, Denys Wilkinson Building, Keble Road, Oxford, OX1 3RH (United Kingdom); Brisbane, S. [Sub-department of Particle Physics, University of Oxford, Denys Wilkinson Building, Keble Road, Oxford, OX1 3RH (United Kingdom); Gibson, V. [Cavendish Laboratory, University of Cambridge, Madingley Road, Cambridge CB3 0HE (United Kingdom); Harnew, N. [Sub-department of Particle Physics, University of Oxford, Denys Wilkinson Building, Keble Road, Oxford, OX1 3RH (United Kingdom); Jones, M. [Sub-department of Particle Physics, University of Oxford, Denys Wilkinson Building, Keble Road, Oxford, OX1 3RH (United Kingdom); Libby, J. [Sub-department of Particle Physics, University of Oxford, Denys Wilkinson Building, Keble Road, Oxford, OX1 3RH (United Kingdom)]. E-mail: j.libby1@physics.ox.ac.uk; Powell, A. [Sub-department of Particle Physics, University of Oxford, Denys Wilkinson Building, Keble Road, Oxford, OX1 3RH (United Kingdom); Newby, C. [Sub-department of Particle Physics, University of Oxford, Denys Wilkinson Building, Keble Road, Oxford, OX1 3RH (United Kingdom); Rotolo, N. [Sub-department of Particle Physics, University of Oxford, Denys Wilkinson Building, Keble Road, Oxford, OX1 3RH (United Kingdom); Smale, N. [Sub-department of Particle Physics, University of Oxford, Denys Wilkinson Building, Keble Road, Oxford, OX1 3RH (United Kingdom); Somerville, L.; Sullivan, P.; Topp-Jorgensen, S. [Sub-department of Particle Physics, University of Oxford, Denys Wilkinson Building, Keble Road, Oxford, OX1 3RH (United Kingdom); Wotton, S. [Cavendish Laboratory, University of Cambridge, Madingley Road, Cambridge CB3 0HE (United Kingdom); Wyllie, K. [CERN, CH-1211, Geneva 23 (Switzerland)

    2007-03-11

    The front-end (Level-0) electronics interface module for the LHCb Ring Imaging Cherenkov (RICH) detectors is described. This module integrates the novel hybrid photon detectors (HPDs), which instrument the RICH detectors, to the LHCb trigger, data acquisition (DAQ) and control systems. The system operates at 40 MHz with a first-level trigger rate of 1 MHz. The module design is presented and results are given for both laboratory and beam tests.

  9. The front-end (Level-0) electronics interface module for the LHCb RICH detectors

    International Nuclear Information System (INIS)

    Adinolfi, M.; Bibby, J.H.; Brisbane, S.; Gibson, V.; Harnew, N.; Jones, M.; Libby, J.; Powell, A.; Newby, C.; Rotolo, N.; Smale, N.; Somerville, L.; Sullivan, P.; Topp-Jorgensen, S.; Wotton, S.; Wyllie, K.

    2007-01-01

    The front-end (Level-0) electronics interface module for the LHCb Ring Imaging Cherenkov (RICH) detectors is described. This module integrates the novel hybrid photon detectors (HPDs), which instrument the RICH detectors, to the LHCb trigger, data acquisition (DAQ) and control systems. The system operates at 40 MHz with a first-level trigger rate of 1 MHz. The module design is presented and results are given for both laboratory and beam tests

  10. A low-power front-end amplifier for the microstrip sensors of the PANDA microvertex detector

    Energy Technology Data Exchange (ETDEWEB)

    Di Pietro, Valentino; Brinkmann, Kai-Thomas; Riccardi, Alberto [II. Physikalisches Institut, JLU Giessen, Giessen (Germany); Rivetti, Angelo; Rolo, Manuel; Garbolino, Sara [INFN Sezione di Torino, Torino (Italy); Collaboration: PANDA-Collaboration

    2014-07-01

    The most common readout systems designed for nuclear physics detectors are based on amplitude measurements. The information that needs to be preserved is the charge delivered by a particle hitting the sensor. The electronic chain employed in these cases is made of two main building blocks: front-end amplifier and ADC. An issue in the implementation of such an architecture in scaled CMOS technologies is the dynamic range, because the charge information is extrapolated through the sampling of the peak of the front-end output signal. It is therefore interesting to explore the use of time-based architectures that offer better performances. In fact, in these topologies the linearity between the charge and the signal duration can be maintained even if some building blocks in the chain saturate. The main drawback is the loss in resolution since a duration measurement involves the difference between two time measurements. This work presents the design of a front-end optimized for fast Time-over-Threshold applications. The circuit has been developed for the microstrip detectors of the PANDA experiment. The architecture of the front-end amplifier is presented, and simulations in a 110 nm CMOS technology are discussed.

  11. Dynamic testing for radiation induced failures in a standard CMOS submicron technology pixel front-end

    International Nuclear Information System (INIS)

    Venuto, D. de; Corsi, F.; Ohletz, M.J.

    1999-01-01

    A testing method for the detection of performance degradation induced by high-dose irradiation in high-energy experiments has been developed. The method used is based on a fault signature generation defined on the basis of the state-space analysis for linear circuits. By sampling the response of the circuit under test (CUT) to a single rectangular pulse, a set of parameters α are evaluated which are functions of the circuit singularities and constitute a signature for the CUT. Amplitude perturbations of these parameters engendered by element drift failure indicate a possible faulty condition. The effects of radiation induced faults in the analogue CMOS front-end of a silicon pixel detector employed in high energy physics experiments has been investigated. The results show that, even for the 800 krad dose, the test devised is able to detect the degradation of the amplifier performances. The results show also that hardened devices do not necessarily produce high circuit immunity to radiation and the proposed test method provides a mean to detect these performance deviations and to monitor them during the operating life of the chip. (A.C.)

  12. Resolution limits achievable with CMOS front-end in X- and γ-ray analysis with semiconductor detectors

    International Nuclear Information System (INIS)

    Manfredi, P.F.; Manghisoni, M.; Ratti, L.; Re, V.; Speziali, V.

    2003-01-01

    During the past 15 years, the CMOS technologies have provided the most widely followed approach to signal processing with microstrip detectors. In more recent times, CMOS front-end systems have been developed to acquire and process signals from pixel detectors. During the past few years, the favor toward CMOS processes in their applications in the broad area of detector signal processing has been enhanced by the technological advancement known as device scaling and by two aspects connected to it. One is the shrinking in channel length L into the deep submicron region. The second one is the related reduction in the gate-oxide thickness t ox to a few nm. The reduction in t ox has, as a consequence of primary importance, a decreased 1/f-noise contribution to the equivalent noise charge (ENC). The thinner gate-oxide and the shrinking in gate length, in some regions of operations, concur to increase the transconductance of the device, which results in a smaller ENC contribution from channel thermal noise. The goal of the present paper is to address the question of whether or not the most advanced CMOS processes may meet the requirements set by high resolution, high dynamic range applications like the energy-dispersive photon analysis with solid-state detectors of comparatively large capacitance

  13. A CMOS self-powered front-end architecture for subcutaneous event-detector devices

    CERN Document Server

    Colomer-Farrarons, Jordi

    2011-01-01

    A CMOS Self-Powered Front-End Architecture for Subcutaneous Event-Detector Devices presents the conception and prototype realization of a Self-Powered architecture for subcutaneous detector devices. The architecture is designed to work as a true/false (event detector) or threshold level alarm of some substances, ions, etc. that are detected through a three-electrodes amperometric BioSensor approach. The device is conceived as a Low-Power subcutaneous implantable application powered by an inductive link, one emitter antenna at the external side of the skin and the receiver antenna under the ski

  14. A time-based front-end ASIC for the silicon micro strip sensors of the bar PANDA Micro Vertex Detector

    Science.gov (United States)

    Di Pietro, V.; Brinkmann, K.-Th.; Riccardi, A.; Ritman, J.; Rivetti, A.; Rolo, M. D.; Stockmanns, T.; Zambanini, A.

    2016-03-01

    The bar PANDA (Antiproton Annihilation at Darmstadt) experiment foresees many detectors for tracking, particle identification and calorimetry. Among them, the innermost is the MVD (Micro Vertex Detector) responsible for a precise tracking and the reconstruction of secondary vertices. This detector will be built from both hybrid pixel (two inner barrels and six forward disks) and double-sided micro strip (two outer barrels and outer rim of the last two disks) silicon sensors. A time-based approach has been chosen for the readout ASIC of the strip sensors. The PASTA (bar PANDA Strip ASIC) chip aims at high resolution time-stamping and charge information through the Time over Threshold (ToT) technique. It benefits from a Time to Digital Converter (TDC) allowing a time bin width down to 50 ps. The analog front-end was designed to serve both n-type and p-type strips and the performed simulations show remarkable performances in terms of linearity and electronic noise. The TDC consists of an analog interpolator, a digital local controller, and a digital global controller as the common back-end for all of the 64 channels.

  15. Front-end module readout and control electronics for the PHENIX Multiplicity Vertex Detector

    International Nuclear Information System (INIS)

    Ericson, M.N.; Allen, M.D.; Boissevain, J.

    1997-11-01

    Front-end module (FEM) readout and control are implemented as modular, high-density, reprogrammable functions in the PHENIX Multiplicity Vertex Detector. FEM control is performed by the heap manager, an FPGA-based circuit in the FEM unit. Each FEM has 256 channels of front-end electronics, readout, and control, all located on an MCM. Data readout, formatting, and control are performed by the heap manager along with 4 interface units that reside outside the MVD detector cylinder. This paper discusses the application of a generic heap manager and the addition of 4 interface module types to meet the specific control and data readout needs of the MVD. Unit functioning, interfaces, timing, data format, and communication rates will be discussed in detail. In addition, subsystem issues regarding mode control, serial architecture and functions, error handling, and FPGA implementation and programming will be presented

  16. A VLSI front-end circuit for microstrip silicon detectors for medical imaging applications

    International Nuclear Information System (INIS)

    Beccherle, R.; Cisternino, A.; Guerra, A. Del; Folli, M.; Marchesini, R.; Bisogni, M.G.; Ceccopieri, A.; Rosso, V.; Stefanini, A.; Tripiccione, R.; Kipnis, I.

    1999-01-01

    An analog CMOS-Integrated Circuit has been developed as Front-End for a double-sided microstrip silicon detector. The IC processes and discriminates signals in the 5-30 keV energy range. Main features are low noise and precise timing information. Low noise is achieved by optimizing the cascoded integrator with the 8 pF detector capacitance and by using an inherently low noise 1.2 μm CMOS technology. Timing information is provided by a double discriminator architecture. The output of the circuit is a digital pulse. The leading edge is determined by a fixed threshold discriminator, while the trailing edge is provided by a zero crossing discriminator. In this paper we first describe the architecture of the Front-End chip. We then present the performance of the chip prototype in terms of noise, minimum discrimination threshold and time resolution

  17. Characterisation of the NA62 GigaTracker End of Column Demonstrator Hybrid Pixel Detector

    Science.gov (United States)

    Noy, M.; Aglieri Rinella, G.; Cotta Ramusino, A.; Fiorini, M.; Jarron, P.; Kaplon, J.; Kluge, A.; Martin, E.; Morel, M.; Perktold, L.; Poltorak, K.; Riedler, P.

    2011-11-01

    The architecture and characterisation of the NA62 GigaTracker End of Column Demonstrator Hybrid Pixel Detector (HPD) are presented. This detector must perform time stamping to 200 ps (RMS) or better, provide 300 μm pitch position information and operate with a dead time of 1% or less for 800 MHz-1 GHz beam rate. The demonstrator HPD Assembly comprises a readout chip with a test column of 45 pixels, alongside other test structures, bump bonded to a p-in-n detector 200 μm in thickness. Validation of the performance of the HPD and the time-over-threshold timewalk compensation mechanism with both beam particles and a high precision laser system was performed and is presented. Confirmation of better than the required time stamping precision has been demonstrated and subsequent work on the design of the full-scale ASIC, dubbed TDCPix, is underway. An overview of the TDCPix architecure is given.

  18. Status report on front end electronics for the EUSO photon detector

    International Nuclear Information System (INIS)

    Bosson, G.; Dzahini, D.; Koang, D.H.; Musico, P.; Pallavicini, M.; Pouxe, J.; Pratolongo, F.; Richer, J.P.

    2002-01-01

    In this paper we'll give a status report on the design of the front end electronic system which will be used for the EUSO photon detector. For space, mass and power consumption constraints the system will be implemented developing an ASIC chip using a deep submicron technology. Two complementary approaches will be described: a digital one (DFEE) and an analog one (AFEE). The DFEE is able to count the single photoelectrons coming form the detector, store the numbers in a memory buffer and read them out after a trigger using a serial communication line. The AFEE integrate the anode signals, store them in an analog memory and serially send all the values to a single output after a trigger for digitalisation (external to the chip). Since the approaches are complementary the idea is to put both of them in the final front end chip. An overview of the system is given together to the actual status of the design. Results from simulations are shown: the system is feasible and we think to implement some devices this year to extensively test the proposed solutions

  19. Status report on front end electronics for the EUSO photon detector

    Energy Technology Data Exchange (ETDEWEB)

    Bosson, G.; Dzahini, D.; Koang, D.H.; Musico, P.; Pallavicini, M.; Pouxe, J.; Pratolongo, F.; Richer, J.P

    2002-12-01

    In this paper we'll give a status report on the design of the front end electronic system which will be used for the EUSO photon detector. For space, mass and power consumption constraints the system will be implemented developing an ASIC chip using a deep submicron technology. Two complementary approaches will be described: a digital one (DFEE) and an analog one (AFEE). The DFEE is able to count the single photoelectrons coming form the detector, store the numbers in a memory buffer and read them out after a trigger using a serial communication line. The AFEE integrate the anode signals, store them in an analog memory and serially send all the values to a single output after a trigger for digitalisation (external to the chip). Since the approaches are complementary the idea is to put both of them in the final front end chip. An overview of the system is given together to the actual status of the design. Results from simulations are shown: the system is feasible and we think to implement some devices this year to extensively test the proposed solutions.

  20. Fast front-end electronics for semiconductor tracking detectors: Trends and perspectives

    Energy Technology Data Exchange (ETDEWEB)

    Rivetti, Angelo

    2014-11-21

    In the past few years, extensive research efforts pursued by both the industry and the academia have lead to major improvements in the performance of Analog to Digital Converters (ADCs) and Time to Digital Converters (TDCs). ADCs achieving 8–10 bit resolution, 50–100 MHz conversion frequency and less than 1 mW power consumption are the today's standard, while TDCs have reached sub-picosecond time resolution. These results have been made possible by architectural upgrades combined with the use of ultra deep submicron CMOS technologies with minimum feature size of 130 nm or smaller. Front-end ASICs in which a prompt digitization is followed by signal conditioning in the digital domain can now be envisaged also within the tight power budget typically available in high density tracking systems. Furthermore, tracking detectors embedding high resolution timing capabilities are gaining interest. In the paper, ADC's and TDC's developments which are of particular relevance for the design front-end electronics for semiconductor trackers are discussed along with the benefits and challenges of exploiting such high performance building blocks in implementing the next generation of ASICs for high granularity particle detectors.

  1. Integration of the CMS Phase 1 Pixel Detector

    CERN Document Server

    Kornmayer, Andreas

    2018-01-01

    During the extended year-end technical stop 2016/17 the CMS Pixel Detector has been replaced. The new Phase 1 Pixel Detector is designed for a luminosity that could exceed $\\text{L} = 2x10^{34} cm^{−2}s^{−1}$. With one additional layer in the barrel and the forward region of the new detector, combined with the higher hit rates as the LHC luminosity increases, these conditions called for an upgrade of the data acquisition system, which was realised based on the $\\mu$TCA standard. This contribution focuses on the experiences with integration of the new detector readout and control system and reports on the operational performance of the CMS Pixel detector.

  2. High-speed x-ray imaging with the Keck pixel array detector (Keck PAD) for time-resolved experiments at synchrotron sources

    Energy Technology Data Exchange (ETDEWEB)

    Philipp, Hugh T., E-mail: htp2@cornell.edu; Tate, Mark W.; Purohit, Prafull; Shanks, Katherine S.; Weiss, Joel T. [Laboratory of Atomic and Solid State Physics, Cornell University, Ithaca, NY (United States); Chamberlain, Darol; Gruner, Sol M. [Laboratory of Atomic and Solid State Physics, Cornell University, Ithaca, NY (United States); Cornell High Energy Synchrotron Source (CHESS), Cornell University, Ithaca, NY (United States)

    2016-07-27

    Modern storage rings are readily capable of providing intense x-ray pulses, tens of picoseconds in duration, millions of times per second. Exploiting the temporal structure of these x-ray sources opens avenues for studying rapid structural changes in materials. Many processes (e.g. crack propagation, deformation on impact, turbulence, etc.) differ in detail from one sample trial to the next and would benefit from the ability to record successive x-ray images with single x-ray sensitivity while framing at 5 to 10 MHz rates. To this end, we have pursued the development of fast x-ray imaging detectors capable of collecting bursts of images that enable the isolation of single synchrotron bunches and/or bunch trains. The detector technology used is the hybrid pixel array detector (PAD) with a charge integrating front-end, and high-speed, in-pixel signal storage elements. A 384×256 pixel version, the Keck-PAD, with 150 µm × 150 µm pixels and 8 dedicated in-pixel storage elements is operational, has been tested at CHESS, and has collected data for compression wave studies. An updated version with 27 dedicated storage capacitors and identical pixel size has been fabricated.

  3. Development of a multi-channel front-end electronics module based on ASIC for silicon strip array detectors

    International Nuclear Information System (INIS)

    Zhao Xingwen; Yan Duo; Su Hong; Qian Yi; Kong Jie; Zhang Xueheng; Li Zhankui; Li Haixia

    2014-01-01

    The silicon strip array detector is one of external target facility subsystems in the Cooling Storage Ring on the Heavy Ion Research Facility at Lanzhou (HIRFL-CSR). Using the ASICs, the front-end electronics module has been developed for the silicon strip array detectors and can implement measurement of energy of 96 channels. The performance of the front-end electronics module has been tested. The energy linearity of the front-end electronics module is better than 0.3% for the dynamic range of 0.1∼0.7 V. The energy resolution is better than 0.45%. The maximum channel crosstalk is better than 10%. The channel consistency is better than 1.3%. After continuously working for 24 h at room temperature, the maximum drift of the zero-peak is 1.48 mV. (authors)

  4. A time-based front-end ASIC for the silicon micro strip sensors of the P-bar ANDA Micro Vertex Detector

    International Nuclear Information System (INIS)

    Pietro, V. Di; Brinkmann, K.-Th.; Riccardi, A.; Ritman, J.; Stockmanns, T.; Zambanini, A.; Rivetti, A.; Rolo, M.D.

    2016-01-01

    The P-bar ANDA (Antiproton Annihilation at Darmstadt) experiment foresees many detectors for tracking, particle identification and calorimetry. Among them, the innermost is the MVD (Micro Vertex Detector) responsible for a precise tracking and the reconstruction of secondary vertices. This detector will be built from both hybrid pixel (two inner barrels and six forward disks) and double-sided micro strip (two outer barrels and outer rim of the last two disks) silicon sensors. A time-based approach has been chosen for the readout ASIC of the strip sensors. The PASTA ( P-bar ANDA Strip ASIC) chip aims at high resolution time-stamping and charge information through the Time over Threshold (ToT) technique. It benefits from a Time to Digital Converter (TDC) allowing a time bin width down to 50 ps. The analog front-end was designed to serve both n-type and p-type strips and the performed simulations show remarkable performances in terms of linearity and electronic noise. The TDC consists of an analog interpolator, a digital local controller, and a digital global controller as the common back-end for all of the 64 channels

  5. Detector and Front-end electronics for ALICE and STAR silicon strip layers

    CERN Document Server

    Arnold, L; Coffin, J P; Guillaume, G; Higueret, S; Jundt, F; Kühn, C E; Lutz, Jean Robert; Suire, C; Tarchini, A; Berst, D; Blondé, J P; Clauss, G; Colledani, C; Deptuch, G; Dulinski, W; Hu, Y; Hébrard, L; Kucewicz, W; Boucham, A; Bouvier, S; Ravel, O; Retière, F

    1998-01-01

    Detector modules consisting of Silicon Strip Detector (SSD) and Front End Electronics (FEE) assembly have been designed in order to provide the two outer layers of the ALICE Inner Tracker System (ITS) [1] as well as the outer layer of the STAR Silicon Vertex Tracker (SVT) [2]. Several prototypes have beenproduced and tested in the SPS and PS beam at CERN to validate the final design. Double-sided, AC-coupled SSD detectors provided by two different manufacturers and also a pair of single-sided SSD have been asssociated to new low-power CMOS ALICE128C ASIC chips in a new detector module assembly. The same detectors have also been associated to current Viking electronics for reference purpose. These prototype detector modules are described and some first results are presented.

  6. A silicon pixel detector with routing for external VLSI read-out

    International Nuclear Information System (INIS)

    Thomas, S.L.; Seller, P.

    1988-07-01

    A silicon pixel detector with an array of 32 by 16 hexagonal pixels has been designed and is being built on high resistivity silicon. The detector elements are reverse biased diodes consisting of p-implants in an n-type substrate and are fully depleted from the front to the back of the wafer. They are intended to measure high energy ionising particles traversing the detector. The detailed design of the pixels, their layout and method of read-out are discussed. A number of test structures have been incorporated onto the wafer to enable measurements to be made on individual pixels together with a variety of active devices. The results will give a better understanding of the operation of the pixel array, and will allow testing of computer simulations of more elaborate structures for the future. (author)

  7. CODA : Compact front-end analog ASIC for silicon detectors

    International Nuclear Information System (INIS)

    Chandratre, V.B.; Sardesai, S.V.; Kataria, S.K.

    2004-01-01

    The paper presents the design of a front-end signal processing ASIC to be used with Silicon detectors having full depletion capacitance up to 40 pf. The ASIC channel consists of a charge amplifier, a shaper amplifier (CR-RC 3 ) and a comparator. There is provision for changing gain and polarity. The circuit has an estimated power dissipation of 16 mw. The ASIC is fabricated in 1.2 um CMOS technology. The 0pf noise is ∼400e. The chip has an area of 3 by 4 mm is packaged in 48 pin CLCC and COB option (Chip on Board). (author)

  8. A low mass pixel detector upgrade for CMS

    CERN Document Server

    Kästli, H C

    2010-01-01

    The CMS pixel detector has been designed for a peak luminosity of 10^34cm-2s-1 and a total dose corresponding to 2 years of LHC operation at a radius of 4 cm from the interaction region. Parts of the pixel detector will have to be replaced until 2015. The detector performance will be degraded for two reasons: radiation damage of the innermost layers and the planned increase of the LHC peak luminosity by a factor of 2-3. Based on the experience in planning, constructing and commissioning of the present pixel detector, we intend to upgrade the whole pixel detector in 2015. The main focus is on lowering the material budget and adding more tracking points. We will present the design of a new low mass pixel system consisting of 4 barrel layers and 3 end cap disks on each side. The design comprises of thin detector modules and a lightweight mechanical support structure using CO2 cooling. In addition, large efforts have been made to move material from the services out of the tracking region.

  9. An eight channel low-noise CMOS readout circuit for silicon detectors with on-chip front-end FET

    International Nuclear Information System (INIS)

    Fiorini, C.; Porro, M.

    2006-01-01

    We propose a CMOS readout circuit for the processing of signals from multi-channel silicon detectors to be used in X-ray spectroscopy and γ-ray imaging applications. The circuit is composed by eight channels, each one featuring a low-noise preamplifier, a 6th-order semigaussian shaping amplifier with four selectable peaking times, from 1.8 up to 6 μs, a peak stretcher and a discriminator. The circuit is conceived to be used with silicon detectors with a front-end FET integrated on the detector chips itself, like silicon drift detectors with JFET and pixel detectors with DEPMOS. The integrated time constants used for the shaping are implemented by means of an RC-cell, based on the technique of demagnification of the current flowing in a resistor R by means of the use of current mirrors. The eight analog channels of the chip are multiplexed to a single analog output. A suitable digital section provides self-resetting of each channel and trigger output and is able to set independent thresholds on the analog channels by means of a programmable serial register and 3-bit DACs. The circuit has been realized in the 0.35 μm CMOS AMS technology. In this work, the main features of the circuit are presented along with the experimental results of its characterization

  10. Test Beam Measurements for the Upgrade of the CMS Pixel Detector and Measurement of the Top Quark Mass from Differential Cross Sections

    CERN Document Server

    Spannagel, Simon

    2016-01-01

    In this dissertation, two different topics are addressed which are vital for the realization ofmodern high-energy physics experiments: detector development and data analysis. The first partfocuses on the development and characterization of silicon pixel detectors. To account for theexpected increase in luminosity of the Large Hadron Collider, the pixel detector of the CompactMuon Solenoid (CMS) experiment will be replaced by an upgraded detector with new front-endelectronics. Comprehensive test beam studies are presented which have been conducted to verifythe design and to quantify the performance of the new front-end in terms of tracking efficiency+0.3and spatial resolution. The tracking efficiency has been determined to be 99.7 −0.5 %, whilethe spatial resolution has been measured to be (4.80 ± 0.29) µm and (7.99 ± 0.23) µm along the100 µm and 150 µm pixel pitch, respectively. Furthermore, a new cluster interpolation method isproposed which utilizes the third central moment of the cluster charge d...

  11. Analog lightwave links for detector front-ends at the LHC

    International Nuclear Information System (INIS)

    Baird, A.; Dowell, J.; Duthie, P.

    1995-01-01

    Lightwave links are being developed for volume application in the transfer of analog signals from the tracking detector front-ends to the readout electronics. The links are based on electro-optic intensity modulators which are mounted on detectors and connected by optical fibers to remotely located transceivers (lasers and photoreceivers). The modulators are 3--5 semiconductor reflective devices based on multi-quantum well structures. The transceivers will be integrated devices of a novel design. Modulator prototypes have been fabricated and tested. Neutron and γ-ray irradiation studies have been performed on modulators and fibers. The main results achieved so far are reported and key system issues are reviewed. This work is part of the CERN DRDC project RD23 project RD23

  12. The hybridized front end electronics of the Central Drift Chamber in the Stanford Linear Collider Detector

    International Nuclear Information System (INIS)

    Lo, C.C.; Kirsten, F.A.; Nakamura, M.

    1987-10-01

    In order to accommodate the high packaging density requirements for the front end electronics of the Central Drift Chamber (CDC) in the SLAC Linear Collider Detector (SLD), the CDC front end electronics has been hybridized. The hybrid package contains eight channels of amplifiers together with all the associated circuits for calibration, event recognition and power economy switching functions. A total of 1280 such hybrids are used in the CDC

  13. Gossipo-3 A prototype of a Front-End Pixel Chip for Read-Out of Micro-Pattern Gas Detectors

    CERN Document Server

    Brezina, Christpoh; van der Graaf, Haryy; Gromov, Vladimir; Kluit, Ruud; Kruth, Andre; Zappon, Francesco

    2009-01-01

    In a joint effort of Nikhef (Amsterdam) and the University of Bonn, the Gossipo-3 integrated circuit (IC) has been developed. This circuit is a prototype of a chip dedicated for read-out of various types of position sensitive Micro-Pattern Gas detectors (MPGD). The Gossipo-3 is defined as a set of building blocks to be used in a future highly granulated (60 μm) chip. The pixel circuit can operate in two modes. In Time mode every readout pixel measures the hit arrival time and the charge deposit. For this purpose it has been equipped with a high resolution TDC (1.7 ns) covering dynamic range up to 102 μs. Charge collected by the pixel will be measured using Time-over- Threshold method in the range from 400 e- to 28000 e- with accuracy of 200 e- (standard deviation). In Counting mode every pixel operates as a 24-bit counter, counting the number of incoming hits. The circuit is also optimized to operate at low power consumption (100 mW/cm2) that is required to avoid the need for massive power transport and coo...

  14. Front-end electronics for the readout of CdZnTe sensors

    CERN Document Server

    Moraes, D; Rudge, A

    2006-01-01

    The CERN_DxCTA is a front-end ASIC optimized for the readout of CdZn Te sensors. The chip is implemented in 0.25 mum CMOS technology. The circuit consists of 128 channels equipped with a transimpedance amplifier followed by a gain-shaper stage with 20 ns peaking time and two discriminators, allowing two threshold settings. Each discriminator includes a 5-bit trim DAC and is followed by an 18-bit static ripple-counter. The channel architecture is optimized for the detector characteristics in order to achieve the best energy resolution at counting rates of up to 5 M counts/second. Complete evaluation of the circuit is presented using electronic pulses and Cd ZnTe pixel detectors.

  15. Diamond Pixel Detectors and 3D Diamond Devices

    International Nuclear Information System (INIS)

    Venturi, N.

    2016-01-01

    Results from detectors of poly-crystalline chemical vapour deposited (pCVD) diamond are presented. These include the first analysis of data of the ATLAS Diamond Beam Monitor (DBM). The DBM module consists of pCVD diamond sensors instrumented with pixellated FE-I4 front-end electronics. Six diamond telescopes, each with three modules, are placed symmetrically around the ATLAS interaction point. The DBM tracking capabilities allow it to discriminate between particles coming from the interaction point and background particles passing through the ATLAS detector. Also, analysis of test beam data of pCVD DBM modules are presented. A new low threshold tuning algorithm based on noise occupancy was developed which increases the DBM module signal to noise ratio significantly. Finally first results from prototypes of a novel detector using pCVD diamond and resistive electrodes in the bulk, forming a 3D diamond device, are discussed. 3D devices based on pCVD diamond were successfully tested with test beams at CERN. The measured charge is compared to that of a strip detector mounted on the same pCVD diamond showing that the 3D device collects significantly more charge than the planar device.

  16. Digital front-end electronics for COMPASS Muon-Wall 1 detector

    International Nuclear Information System (INIS)

    Alekseev, G.D.; Zhuravlev, N.I.; Maggiora, A.

    2005-01-01

    The digital front-end electronics for the COMPASS Muon-Wall 1 (CERN) detector is described. The digital card has been designed on the basis of the TDC chip F1. One card includes 6 F1 chips (192 channels), bus arbiter, DAC, power supply distribution, hot-link interface. The total number of the digital cards in the system is 44 housed in 5 euro-crates (6U), the total number of readout channels is 8448. The electronics has been designed by the Dzhelepov Laboratory of Nuclear Problems (JINR) and INFN (Torino, Italy) experts

  17. Analog front-end for pixel sensors in a 3D CMOS technology for the SuperB Layer0

    International Nuclear Information System (INIS)

    Manazza, A.; Gaioni, L.; Re, V.

    2011-01-01

    This work is concerned with the design of two different analog channels for hybrid and monolithic pixels readout in view of applications to the SVT at the SuperB Factory. The circuits have been designed in a 130nm CMOS, vertically integrated technology, which, among others, may provide some advantages in terms of functional density and electrical isolation between the analog and the digital sections of the front-end.

  18. Pixelated transmission-mode diamond X-ray detector.

    Science.gov (United States)

    Zhou, Tianyi; Ding, Wenxiang; Gaowei, Mengjia; De Geronimo, Gianluigi; Bohon, Jen; Smedley, John; Muller, Erik

    2015-11-01

    Fabrication and testing of a prototype transmission-mode pixelated diamond X-ray detector (pitch size 60-100 µm), designed to simultaneously measure the flux, position and morphology of an X-ray beam in real time, are described. The pixel density is achieved by lithographically patterning vertical stripes on the front and horizontal stripes on the back of an electronic-grade chemical vapor deposition single-crystal diamond. The bias is rotated through the back horizontal stripes and the current is read out on the front vertical stripes at a rate of ∼ 1 kHz, which leads to an image sampling rate of ∼ 30 Hz. This novel signal readout scheme was tested at beamline X28C at the National Synchrotron Light Source (white beam, 5-15 keV) and at beamline G3 at the Cornell High Energy Synchrotron Source (monochromatic beam, 11.3 keV) with incident beam flux ranges from 1.8 × 10(-2) to 90 W mm(-2). Test results show that the novel detector provides precise beam position (positional noise within 1%) and morphology information (error within 2%), with an additional software-controlled single channel mode providing accurate flux measurement (fluctuation within 1%).

  19. The Design and Implementation in $0.13\\mu m$ CMOS of an Algorithm Permitting Spectroscopic Imaging with High Spatial Resolution for Hybrid Pixel Detectors

    CERN Document Server

    Ballabriga, Rafael; Vilasís-Cardona, Xavier

    2009-01-01

    Advances in pixel detector technology are opening up new possibilities in many fields of science. Modern High Energy Physics (HEP) experiments use pixel detectors in tracking systems where excellent spatial resolution, precise timing and high signal-to-noise ratio are required for accurate and clean track reconstruction. Many groups are working worldwide to adapt the hybrid pixel technology to other fields such as medical X-ray radiography, protein structure analysis or neutron imaging. The Medipix3 chip is a 256x256 channel hybrid pixel detector readout chip working in Single Photon Counting Mode. It has been developed with a new front-end architecture aimed at eliminating the spectral distortion produced by charge diffusion in highly segmented semiconductor detectors. In the new architecture neighbouring pixels communicate with one another. Charges can be summed event-by-event and the incoming quantum can be assigned as a single hit to the pixel with the biggest charge deposit. In the case where incoming X-...

  20. Development of Pixel Front-End Electronics using Advanced Deep Submicron CMOS Technologies

    CERN Document Server

    Havránek, Miroslav; Dingfelder, Jochen

    The content of this thesis is oriented on the R&D; of microelectronic integrated circuits for processing the signal from particle sensors and partially on the sensors themselves. This work is motivated by ongoing upgrades of the ATLAS Pixel Detector at CERN laboratory and by exploration of new technologies for the future experiments in particle physics. Evolution of technologies for the fabrication of microelectronic circuits follows Moore’s laws. Transistors become smaller and electronic chips reach higher complexity. Apart from this, silicon foundries become more open to smaller customers and often provide non-standard process options. Two new directions in pixel technologies are explored in this thesis: design of pixel electronics using ultra deep submicron (65 nm) CMOS technology and Depleted Monolithic Active Pixel Sensors (DMAPS). An independent project concerning the measurement of pixel capacitance with a dedicated measurement chip is a part of this thesis. Pixel capacitance is one of the key pa...

  1. Development of a High Dynamic Range Pixel Array Detector for Synchrotrons and XFELs

    Science.gov (United States)

    Weiss, Joel Todd

    Advances in synchrotron radiation light source technology have opened new lines of inquiry in material science, biology, and everything in between. However, x-ray detector capabilities must advance in concert with light source technology to fully realize experimental possibilities. X-ray free electron lasers (XFELs) place particularly large demands on the capabilities of detectors, and developments towards diffraction-limited storage ring sources also necessitate detectors capable of measuring very high flux [1-3]. The detector described herein builds on the Mixed Mode Pixel Array Detector (MM-PAD) framework, developed previously by our group to perform high dynamic range imaging, and the Adaptive Gain Integrating Pixel Detector (AGIPD) developed for the European XFEL by a collaboration between Deustsches Elektronen-Synchrotron (DESY), the Paul-Scherrer-Institute (PSI), the University of Hamburg, and the University of Bonn, led by Heinz Graafsma [4, 5]. The feasibility of combining adaptive gain with charge removal techniques to increase dynamic range in XFEL experiments is assessed by simulating XFEL scatter with a pulsed infrared laser. The strategy is incorporated into pixel prototypes which are evaluated with direct current injection to simulate very high incident x-ray flux. A fully functional 16x16 pixel hybrid integrating x-ray detector featuring several different pixel architectures based on the prototypes was developed. This dissertation describes its operation and characterization. To extend dynamic range, charge is removed from the integration node of the front-end amplifier without interrupting integration. The number of times this process occurs is recorded by a digital counter in the pixel. The parameter limiting full well is thereby shifted from the size of an integration capacitor to the depth of a digital counter. The result is similar to that achieved by counting pixel array detectors, but the integrators presented here are designed to tolerate a

  2. Front-end multiplexing—applied to SQUID multiplexing: Athena X-IFU and QUBIC experiments

    Science.gov (United States)

    Prele, D.

    2015-08-01

    As we have seen for digital camera market and a sensor resolution increasing to "megapixels", all the scientific and high-tech imagers (whatever the wave length - from radio to X-ray range) tends also to always increases the pixels number. So the constraints on front-end signals transmission increase too. An almost unavoidable solution to simplify integration of large arrays of pixels is front-end multiplexing. Moreover, "simple" and "efficient" techniques allow integration of read-out multiplexers in the focal plane itself. For instance, CCD (Charge Coupled Device) technology has boost number of pixels in digital camera. Indeed, this is exactly a planar technology which integrates both the sensors and a front-end multiplexed readout. In this context, front-end multiplexing techniques will be discussed for a better understanding of their advantages and their limits. Finally, the cases of astronomical instruments in the millimeter and in the X-ray ranges using SQUID (Superconducting QUantum Interference Device) will be described.

  3. Front-end multiplexing—applied to SQUID multiplexing: Athena X-IFU and QUBIC experiments

    International Nuclear Information System (INIS)

    Prele, D.

    2015-01-01

    As we have seen for digital camera market and a sensor resolution increasing to 'megapixels', all the scientific and high-tech imagers (whatever the wave length - from radio to X-ray range) tends also to always increases the pixels number. So the constraints on front-end signals transmission increase too. An almost unavoidable solution to simplify integration of large arrays of pixels is front-end multiplexing. Moreover, 'simple' and 'efficient' techniques allow integration of read-out multiplexers in the focal plane itself. For instance, CCD (Charge Coupled Device) technology has boost number of pixels in digital camera. Indeed, this is exactly a planar technology which integrates both the sensors and a front-end multiplexed readout. In this context, front-end multiplexing techniques will be discussed for a better understanding of their advantages and their limits. Finally, the cases of astronomical instruments in the millimeter and in the X-ray ranges using SQUID (Superconducting QUantum Interference Device) will be described

  4. Design of low noise front-end ASIC and DAQ system for CdZnTe detector

    International Nuclear Information System (INIS)

    Luo Jie; Deng Zhi; Liu Yinong

    2012-01-01

    A low noise front-end ASIC has been designed for CdZnTe detector. This chip contains 16 channels and each channel consists of a dual-stage charge sensitive preamplifier, 4th order semi-Gaussian shaper, leakage current compensation (LCC) circuit, discriminator and output buffer. This chip has been fabricated in Chartered 0.35 μm CMOS process, the preliminary results show that it works well. The total channel charge gain can be adjusted from 100 mV/fC to 400 mV/fC and the peaking time can be adjusted from 1 μs to 4 μs. The minimum measured ENC at zero input capacitance is 70 e and minimum noise slope is 20 e/pF. The peak detector and derandomizer (PDD) ASIC developed by BNL and an associated USB DAQ board are also introduced in this paper. Two front-end ASICs can be connected to the PDD ASIC on the USB DAQ board and compose a 32 channels DAQ system for CdZnTe detector. (authors)

  5. Forecasting noise and radiation hardness of CMOS front-end electronics beyond the 100 nm frontier

    International Nuclear Information System (INIS)

    Re, V.; Gaioni, L.; Manghisoni, M.; Ratti, L.; Traversi, G.

    2010-01-01

    The progress of industrial microelectronic technologies has already overtaken the 130 nm CMOS generation that is currently the focus of IC designers for new front-end chips in LHC upgrades and other detector applications. In a broader time span, sub-100 nm CMOS processes may become appealing for the design of very compact front-end systems with advanced integrated functionalities. This is especially true in the case of pixel detectors, both for monolithic devices (MAPS) and for hybrid implementations where a high resistivity sensor is connected to a CMOS readout chip. Technologies beyond the 100 nm frontier have peculiar features, such as the evolution of the device gate material to reduce tunneling currents through the thin dielectric. These new physical device parameters may impact on functional properties such as noise and radiation hardness. On the basis of experimental data relevant to commercial devices, this work studies potential advantages and challenges associated to the design of low-noise and rad-hard analog circuits in these aggressively scaled technologies.

  6. The upgraded CDF front end electronics for calorimetry

    Energy Technology Data Exchange (ETDEWEB)

    Drake, G.; Frei, D.; Hahn, S.R.; Nelson, C.A.; Segler, S.L.; Stuermer, W.

    1991-11-01

    The front end electronics used in the calorimetry of the CDF detector has been upgraded to meet system requirements for higher expected luminosity. A fast digitizer utilizing a 2 {mu}Sec, 16 bit ADC has been designed and built. Improvements to the front end trigger circuitry have been implemented, including the production of 900 new front end modules. Operational experience with the previous system is presented, with discussion of the problems and performance goals.

  7. The upgraded CDF front end electronics for calorimetry

    International Nuclear Information System (INIS)

    Drake, G.; Frei, D.; Hahn, S.R.; Nelson, C.A.; Segler, S.L.; Stuermer, W.

    1991-11-01

    The front end electronics used in the calorimetry of the CDF detector has been upgraded to meet system requirements for higher expected luminosity. A fast digitizer utilizing a 2 μSec, 16 bit ADC has been designed and built. Improvements to the front end trigger circuitry have been implemented, including the production of 900 new front end modules. Operational experience with the previous system is presented, with discussion of the problems and performance goals

  8. ATLAS Pixel Detector Operational Experience

    CERN Document Server

    Di Girolamo, B; The ATLAS collaboration

    2011-01-01

    The ATLAS Pixel Detector is the innermost detector of the ATLAS experiment at the Large Hadron Collider at CERN, providing high-resolution measurements of charged particle tracks in the high radiation environment close to the collision region. This capability is vital for the identification and measurement of proper decay times of long-lived particles such as b-hadrons, and thus vital for the ATLAS physics program. The detector provides hermetic coverage with three cylindrical layers and three layers of forward and backward pixel detectors. It consists of approximately 80 million pixels that are individually read out via chips bump-bonded to 1744 n-in-n silicon substrates. In this talk, results from the successful operation of the Pixel Detector at the LHC will be presented, including monitoring, calibration procedures, timing optimization and detector performance. The detector performance is excellent: 96.9% of the pixels are operational, noise occupancy and hit efficiency exceed the design specification, an...

  9. Review of input stages used in front end electronics for particle detectors

    CERN Document Server

    Kaplon, J

    2015-01-01

    In this paper we present noise analysis of the input stages most commonly used in front end electronics for particle detectors. Analysis shows the calculation of the input referenced noise related to the active devices. It identifies the type, parallel or series, of the equivalent noise sources related to the input transistors, which is the important input for the further choice of the signal processing method. Moreover we calculate the input impedance of amplifiers employed in applications where the particle detector is connected to readout electronics by means of transmission line. We present schematics, small signal models,a complete set of equations, and results of the major steps of calculations for all discussed circuits.

  10. Front end electronics and first results of the ALICE V0 detector

    Energy Technology Data Exchange (ETDEWEB)

    Zoccarato, Y., E-mail: y.zoccarato@ipnl.in2p3.f [Universite de Lyon, Universite Lyon 1, CNRS/IN2P3, Institut de Physique Nucleaire de Lyon (IPNL), 69622 Villeurbanne (France); Tromeur, W. [Universite de Lyon, Universite Lyon 1, CNRS/IN2P3, Institut de Physique Nucleaire de Lyon (IPNL), 69622 Villeurbanne (France); Aguilar, S.; Alfaro, R.; Almaraz Avina, E.; Anzo, A.; Belmont, E. [Instituto de Fisica, Universidad Nacional Autonoma de Mexico, Circuito de la Investigacion Cientifica Ciudad Universitaria, C.P. 04510, Mexico, D.F. (Mexico); Cheshkov, C.; Cheynis, B.; Combaret, C. [Universite de Lyon, Universite Lyon 1, CNRS/IN2P3, Institut de Physique Nucleaire de Lyon (IPNL), 69622 Villeurbanne (France); Contreras, G. [Centro de Investigacion y de Estudios Avanzados (CINVESTAV), Av. Instituto Politecnico Nacional 2508 Col. San Pedro Zacatenco, C.P. 07360, Mexico, D.F. (Mexico); Cuautle, E. [Instituto de Ciencias Nucleares, Universidad Nacional Autonoma de Mexico, Circuito Exterior s/n, Ciudad Universitaria. Delg. Coyoacan, C.P. 04510, Mexico, D.F. (Mexico); Ducroux, L. [Universite de Lyon, Universite Lyon 1, CNRS/IN2P3, Institut de Physique Nucleaire de Lyon (IPNL), 69622 Villeurbanne (France); Gonzalez Trueba, L.; Grabski, V. [Instituto de Fisica, Universidad Nacional Autonoma de Mexico, Circuito de la Investigacion Cientifica Ciudad Universitaria, C.P. 04510, Mexico, D.F. (Mexico); Grossiord, J.-Y. [Universite de Lyon, Universite Lyon 1, CNRS/IN2P3, Institut de Physique Nucleaire de Lyon (IPNL), 69622 Villeurbanne (France); Herrera Corral, G. [Centro de Investigacion y de Estudios Avanzados (CINVESTAV), Av. Instituto Politecnico Nacional 2508 Col. San Pedro Zacatenco, C.P. 07360, Mexico, D.F. (Mexico); Martinez, A. [Instituto de Fisica, Universidad Nacional Autonoma de Mexico, Circuito de la Investigacion Cientifica Ciudad Universitaria, C.P. 04510, Mexico, D.F. (Mexico)

    2011-01-21

    This paper gives a detailed description of the acquisition and trigger electronics especially designed for the V0 detector of ALICE at LHC. A short presentation of the detector itself is given before the description of the Front End Electronics (FEE) system, which is completely embedded within the LHC environment as far as acquisition (DAQ), trigger (CTP), and detector control (DCS) are concerned. It is able to detect on-line coincident events and to achieve charge (with a precision of 0.6 pC) and time measurements (with a precision of 100 ps). It deploys quite a simple architecture. It is however totally programmable and fully non-standard in discriminating events coming from Beam-Beam interaction and Beam-Gas background. Finally, raw data collected from the first LHC colliding beams illustrate the performance of the system.

  11. Online calibrations and performance of the ATLAS Pixel Detector

    CERN Document Server

    Keil, M; The ATLAS collaboration

    2010-01-01

    The ATLAS Pixel Detector is the innermost detector of the ATLAS experiment at the Large Hadron Collider at CERN. It consists of 1744 silicon sensors equipped with approximately 80 M electronic channels, providing typically three measurement points with high resolution for particles emerging from the beam-interaction region, thus allowing measuring particle tracks and secondary vertices with very high precision. The readout system of the Pixel Detector is based on a bi-directional optical data transmission system between the detector and the data acquisition system with an individual link for each of the 1744 modules. Signal conversion components are located on both ends, approximately 80 m apart. The talk will give an overview of the calibration and performance of both the detector and its optical readout. The most basic parameter to be tuned and calibrated for the detector electronics is the readout threshold of the individual pixel channels. These need to be carefully tuned to optimise position resolution a...

  12. Diamond Pixel Detectors

    International Nuclear Information System (INIS)

    Adam, W.; Berdermann, E.; Bergonzo, P.; Bertuccio, G.; Bogani, F.; Borchi, E.; Brambilla, A.; Bruzzi, M.; Colledani, C.; Conway, J.; D'Angelo, P.; Dabrowski, W.; Delpierre, P.; Deneuville, A.; Doroshenko, J.; Dulinski, W.; Eijk, B. van; Fallou, A.; Fizzotti, F.; Foster, J.; Foulon, F.; Friedl, M.; Gan, K.K.; Gheeraert, E.; Gobbi, B.; Grim, G.P.; Hallewell, G.; Han, S.; Hartjes, F.; Hrubec, J.; Husson, D.; Kagan, H.; Kania, D.; Kaplon, J.; Kass, R.; Koeth, T.; Krammer, M.; Lander, R.; Logiudice, A.; Lu, R.; Lynne, L.M.; Manfredotti, C.; Meier, D.; Mishina, M.; Moroni, L.; Oh, A.; Pan, L.S.; Pernicka, M.; Perera, L.; Pirollo, S.; Plano, R.; Procario, M.; Riester, J.L.; Roe, S.; Rott, C.; Rousseau, L.; Rudge, A.; Russ, J.; Sala, S.; Sampietro, M.; Schnetzer, S.; Sciortino, S.; Stelzer, H.; Stone, R.; Suter, B.; Tapper, R.J.; Tesarek, R.; Trischuk, W.; Tromson, D.; Vittone, E.; Wedenig, R.; Weilhammer, P.; White, C.; Zeuner, W.; Zoeller, M.

    2001-01-01

    Diamond based pixel detectors are a promising radiation-hard technology for use at the LHC. We present first results on a CMS diamond pixel sensor. With a threshold setting of 2000 electrons, an average pixel efficiency of 78% was obtained for normally incident minimum ionizing particles

  13. Diamond Pixel Detectors

    Energy Technology Data Exchange (ETDEWEB)

    Adam, W.; Berdermann, E.; Bergonzo, P.; Bertuccio, G.; Bogani, F.; Borchi, E.; Brambilla, A.; Bruzzi, M.; Colledani, C.; Conway, J.; D' Angelo, P.; Dabrowski, W.; Delpierre, P.; Deneuville, A.; Doroshenko, J.; Dulinski, W.; Eijk, B. van; Fallou, A.; Fizzotti, F.; Foster, J.; Foulon, F.; Friedl, M.; Gan, K.K.; Gheeraert, E.; Gobbi, B.; Grim, G.P.; Hallewell, G.; Han, S.; Hartjes, F.; Hrubec, J.; Husson, D.; Kagan, H.; Kania, D.; Kaplon, J.; Kass, R.; Koeth, T.; Krammer, M.; Lander, R.; Logiudice, A.; Lu, R.; Lynne, L.M.; Manfredotti, C.; Meier, D.; Mishina, M.; Moroni, L.; Oh, A.; Pan, L.S.; Pernicka, M.; Perera, L. E-mail: perera@physics.rutgers.edu; Pirollo, S.; Plano, R.; Procario, M.; Riester, J.L.; Roe, S.; Rott, C.; Rousseau, L.; Rudge, A.; Russ, J.; Sala, S.; Sampietro, M.; Schnetzer, S.; Sciortino, S.; Stelzer, H.; Stone, R.; Suter, B.; Tapper, R.J.; Tesarek, R.; Trischuk, W.; Tromson, D.; Vittone, E.; Wedenig, R.; Weilhammer, P.; White, C.; Zeuner, W.; Zoeller, M

    2001-06-01

    Diamond based pixel detectors are a promising radiation-hard technology for use at the LHC. We present first results on a CMS diamond pixel sensor. With a threshold setting of 2000 electrons, an average pixel efficiency of 78% was obtained for normally incident minimum ionizing particles.

  14. The ALICE silicon pixel detector system

    International Nuclear Information System (INIS)

    Kapusta, S.

    2009-01-01

    front-end to the on-detector electronics are from aluminum. In this thesis, I present my involvement in the ALICE SPD project, I summarize the design, the construction, and the testing phase of the ALICE SPD. My involvement in the ALICE DCS project is also presented. During the past years the ALICE SPD collaboration has carried out four testbeams. e primary objective of these testbeams was the validation of the pixel ASICs, the sensors, the read-out electronics and the online systems - Data Acquisition System (DAQ), Trigger (TRG) and Detector Control System DCS with their so w are and offline as well. e pixel chip and sensor prototypes were studied under different conditions (threshold scan, different inclination angles with respect to the beam, bias voltage scan, etc.). Tests of thick and also thin single chip assemblies and chip ladders as designed to be used in the ALICE experiment were also performed. During and a e r the testbeams I developed so w are to verify the data quality, to merge 2 data pixels offline, to correlate the spatial information from different planes, to run a complex offline analysis of the testbeam data, including hit maps, integrated hit maps, event by event analysis, efficiency, multiplicity, cluster size, etc. e prototype full read-out chain with two ladders, the DAQ, Trigger and DCS online systems with their so w are and also offline code were tested and validated during the testbeams. Configuration, readout and control of the SPD is performed via the Detector Control System DCS. As a member of the ALICE Control Coordination ACC team, I had the opportunity to participate in the design, development, commissioning and operation of this system. I took responsibility for the database systems and developed mechanisms for configuring the Front end Electronics (FERO). e SPD has been used as a working example for other detector groups which adopted this approach. I developed and implemented a mechanism of conditions data archival and participated in

  15. Conception and characterization of a virtual coplanar grid for a 11×11 pixelated CZT detector

    Energy Technology Data Exchange (ETDEWEB)

    Espagnet, Romain; Frezza, Andrea [Department of Physics, Engineering Physics and Optics and Cancer Research Center, Université Laval, Quebec city, QC, Canada G1R 0A6 (Canada); Martin, Jean-Pierre; Hamel, Louis-André [Department of Physics, Université de Montréal, C.P. 6128 Montréal QC, Canada H3C 3J7 (Canada); Després, Philippe, E-mail: philippe.despres@phy.ulaval.ca [Department of Physics, Engineering Physics and Optics and Cancer Research Center, Université Laval, Quebec city, QC, Canada G1R 0A6 (Canada); Department of Radiation Oncology and Research Center of CHU de Québec - Université Laval, Quebec city, QC Canada G1R 2J6 (Canada)

    2017-07-11

    Due to the low mobility of holes in CZT, commercially available detectors with a relatively large volume typically use a pixelated anode structure. They are mostly used in imaging applications and often require a dense electronic readout scheme. These large volume detectors are also interesting for high-sensitivity applications and a CZT-based blood gamma counter was developed from a 20×20×15 mm{sup 3} crystal available commercially and having a 11×11 pixelated readout scheme. A method is proposed here to reduce the number of channels required to use the crystal in a high-sensitivity counting application, dedicated to pharmacokinetic modelling in PET and SPECT. Inspired by a classic coplanar anode, an implementation of a virtual coplanar grid was done by connecting the 121 pixels of the detector to form intercalated bands. The layout, the front-end electronics and the characterization of the detector in this 2-channel anode geometry is presented. The coefficients required to compensate for electron trapping in CZT were determined experimentally to improve the performance. The resulting virtual coplanar detector has an intrinsic efficiency of 34% and an energy resolution of 8% at 662 keV. The detector's response was linear between 80 keV and 1372 keV. This suggests that large CZT crystals offer an excellent alternative to scintillation detectors for some applications, especially those where high-sensitivity and compactness are required.

  16. Optimizing read-out of the NECTAr front-end electronics

    Energy Technology Data Exchange (ETDEWEB)

    Vorobiov, S., E-mail: vorobiov@lpta.in2p3.fr [LUPM, Universite Montpellier II and IN2P3/CNRS, Montpellier (France); DESY-Zeuthen, Platanenallee 6, 15738 Zeuthen (Germany); Feinstein, F. [LUPM, Universite Montpellier II and IN2P3/CNRS, Montpellier (France); Bolmont, J.; Corona, P. [LPNHE, Universite Paris VI and Universite Paris VII and IN2P3/CNRS, Paris (France); Delagnes, E. [IRFU/DSM/CEA, Saclay, Gif-sur-Yvette (France); Falvard, A. [LUPM, Universite Montpellier II and IN2P3/CNRS, Montpellier (France); Gascon, D. [ICC-UB, Universitat Barcelona, Barcelona (Spain); Glicenstein, J.-F. [IRFU/DSM/CEA, Saclay, Gif-sur-Yvette (France); Naumann, C.L.; Nayman, P. [LPNHE, Universite Paris VI and Universite Paris VII and IN2P3/CNRS, Paris (France); Ribo, M.; Sanuy, A. [ICC-UB, Universitat Barcelona, Barcelona (Spain); Tavernet, J.-P.; Toussenel, F.; Vincent, P. [LPNHE, Universite Paris VI and Universite Paris VII and IN2P3/CNRS, Paris (France)

    2012-12-11

    We describe the optimization of the read-out specifications of the NECTAr front-end electronics for the Cherenkov Telescope Array (CTA). The NECTAr project aims at building and testing a demonstrator module of a new front-end electronics design, which takes an advantage of the know-how acquired while building the cameras of the CAT, H.E.S.S.-I and H.E.S.S.-II experiments. The goal of the optimization work is to define the specifications of the digitizing electronics of a CTA camera, in particular integration time window, sampling rate, analog bandwidth using physics simulations. We employed for this work real photomultiplier pulses, sampled at 100 ps with a 600 MHz bandwidth oscilloscope. The individual pulses are drawn randomly at the times at which the photo-electrons, originating from atmospheric showers, arrive at the focal planes of imaging atmospheric Cherenkov telescopes. The timing information is extracted from the existing CTA simulations on the GRID and organized in a local database, together with all the relevant physical parameters (energy, primary particle type, zenith angle, distance from the shower axis, pixel offset from the optical axis, night-sky background level, etc.), and detector configurations (telescope types, camera/mirror configurations, etc.). While investigating the parameter space, an optimal pixel charge integration time window, which minimizes relative error in the measured charge, has been determined. This will allow to gain in sensitivity and to lower the energy threshold of CTA telescopes. We present results of our optimizations and first measurements obtained using the NECTAr demonstrator module.

  17. Optimizing read-out of the NECTAr front-end electronics

    International Nuclear Information System (INIS)

    Vorobiov, S.; Feinstein, F.; Bolmont, J.; Corona, P.; Delagnes, E.; Falvard, A.; Gascón, D.; Glicenstein, J.-F.; Naumann, C.L.; Nayman, P.; Ribo, M.; Sanuy, A.; Tavernet, J.-P.; Toussenel, F.; Vincent, P.

    2012-01-01

    We describe the optimization of the read-out specifications of the NECTAr front-end electronics for the Cherenkov Telescope Array (CTA). The NECTAr project aims at building and testing a demonstrator module of a new front-end electronics design, which takes an advantage of the know-how acquired while building the cameras of the CAT, H.E.S.S.-I and H.E.S.S.-II experiments. The goal of the optimization work is to define the specifications of the digitizing electronics of a CTA camera, in particular integration time window, sampling rate, analog bandwidth using physics simulations. We employed for this work real photomultiplier pulses, sampled at 100 ps with a 600 MHz bandwidth oscilloscope. The individual pulses are drawn randomly at the times at which the photo-electrons, originating from atmospheric showers, arrive at the focal planes of imaging atmospheric Cherenkov telescopes. The timing information is extracted from the existing CTA simulations on the GRID and organized in a local database, together with all the relevant physical parameters (energy, primary particle type, zenith angle, distance from the shower axis, pixel offset from the optical axis, night-sky background level, etc.), and detector configurations (telescope types, camera/mirror configurations, etc.). While investigating the parameter space, an optimal pixel charge integration time window, which minimizes relative error in the measured charge, has been determined. This will allow to gain in sensitivity and to lower the energy threshold of CTA telescopes. We present results of our optimizations and first measurements obtained using the NECTAr demonstrator module.

  18. Optimizing read-out of the NECTAr front-end electronics

    Science.gov (United States)

    Vorobiov, S.; Feinstein, F.; Bolmont, J.; Corona, P.; Delagnes, E.; Falvard, A.; Gascón, D.; Glicenstein, J.-F.; Naumann, C. L.; Nayman, P.; Ribo, M.; Sanuy, A.; Tavernet, J.-P.; Toussenel, F.; Vincent, P.

    2012-12-01

    We describe the optimization of the read-out specifications of the NECTAr front-end electronics for the Cherenkov Telescope Array (CTA). The NECTAr project aims at building and testing a demonstrator module of a new front-end electronics design, which takes an advantage of the know-how acquired while building the cameras of the CAT, H.E.S.S.-I and H.E.S.S.-II experiments. The goal of the optimization work is to define the specifications of the digitizing electronics of a CTA camera, in particular integration time window, sampling rate, analog bandwidth using physics simulations. We employed for this work real photomultiplier pulses, sampled at 100 ps with a 600 MHz bandwidth oscilloscope. The individual pulses are drawn randomly at the times at which the photo-electrons, originating from atmospheric showers, arrive at the focal planes of imaging atmospheric Cherenkov telescopes. The timing information is extracted from the existing CTA simulations on the GRID and organized in a local database, together with all the relevant physical parameters (energy, primary particle type, zenith angle, distance from the shower axis, pixel offset from the optical axis, night-sky background level, etc.), and detector configurations (telescope types, camera/mirror configurations, etc.). While investigating the parameter space, an optimal pixel charge integration time window, which minimizes relative error in the measured charge, has been determined. This will allow to gain in sensitivity and to lower the energy threshold of CTA telescopes. We present results of our optimizations and first measurements obtained using the NECTAr demonstrator module.

  19. Detector and front-end electronics of a fissile mass flow monitoring system

    International Nuclear Information System (INIS)

    Paulus, M.J.; Uckan, T.; Lenarduzzi, R.; Mullens, J.A.; Castleberry, K.N.; McMillan, D.E.; Mihalczo, J.T.

    1997-01-01

    A detector and front-end electronics unit with secure data transmission has been designed and implemented for a fissile mass flow monitoring system for fissile mass flow of gases and liquids in a pipe. The unit consists of 4 bismuth germanate (BGO) scintillation detectors, pulse-shaping and counting electronics, local temperature sensors, and on-board local area network nodes which locally acquire data and report to the master computer via a secure network link. The signal gain of the pulse-shaping circuitry and energy windows of the pulse-counting circuitry are periodicially self calibrated and self adjusted in situ using a characteristic line in the fissile material pulse height spectrum as a reference point to compensate for drift such as in the detector gain due to PM tube aging. The temperature- dependent signal amplitude variations due to the intrinsic temperature coefficients of the PM tube gain and BGO scintillation efficiency have been characterized and real-time gain corrections introduced. The detector and electronics design, measured intrinsic performance of the detectors and electronics, and the performance of the detector and electronics within the fissile mass flow monitoring system are described

  20. Thermal Characterization and Optimization of the Pixel Module Support Structure for the Phase-1 Upgrade of the CMS Pixel Detector

    CERN Document Server

    AUTHOR|(CDS)2094386; Feld, Lutz Werner

    2015-01-01

    The CMS (Compact Muon Solenoid) pixel detector is used in CMS for the vertex reconstruction of events in high-energy proton-proton collisions produced by the Large Hadron Collider (LHC). It is planned for the future years that the LHC will deliver significantly higher instantaneous and integrated luminosities. Therefore, also the demands and requirements for the participating detectors rise. Thus the current CMS pixel detector will be replaced by the CMS Phase-1 Upgrade Pixel Detector in the extended year-end technical stop in winter 2016/2017. As a vertex detector, the pixel detector is the innermost detector component and it is located at a short distance to the proton-proton interaction point. Therefore it has to cope with high particle hit rates and high irradiation. The heat produced due to power consumption has to be removed while using a low-mass detector design. The low-mass design of the Phase-1 Upgrade Pixel Detector will be implemented by utilizing a new two-phase CO2 cooling concept and an ultra l...

  1. Photodetectors and front-end electronics for the LHCb RICH upgrade

    Science.gov (United States)

    Cassina, L.; LHCb RICH

    2017-12-01

    The RICH detectors of the LHCb experiment provide identification of hadrons produced in high energy proton-proton collisions in the LHC at CERN over a wide momentum range (2-100 GeV/c). Cherenkov light is collected on photon detector planes sensitive to single photons. The RICH will be upgraded (in 2019) to read out every bunch crossing, at a rate of 40 MHz. The current hybrid photon detectors (HPD) will be replaced with multi-anode photomultiplier tubes (customisations of the Hamamatsu R11265 and the H12699 MaPMTs). These 8×8 pixel devices meet the experimental requirements thanks to their small pixel size, high gain, negligible dark count rate (∼50 Hz/cm2) and moderate cross-talk. The measured performance of several tubes is reported, together with their long-term stability. A new 8-channel front-end chip, named CLARO, has been designed in 0.35 μm CMOS AMS technology for the MaPMT readout. The CLARO chip operates in binary mode and combines low power consumption (∼1 mW/Ch), wide bandwidth (baseline restored in ⩽ 25 ns) and radiation hardness. A 12-bit digital register permits the optimisation of the dynamic range and the threshold level for each channel and provides tools for the on-site calibration. The design choices and the characterization of the electronics are presented.

  2. 18k Channels single photon counting readout circuit for hybrid pixel detector

    International Nuclear Information System (INIS)

    Maj, P.; Grybos, P.; Szczygiel, R.; Zoladz, M.; Sakumura, T.; Tsuji, Y.

    2013-01-01

    We have performed measurements of an integrated circuit named PXD18k designed for hybrid pixel semiconductor detectors used in X-ray imaging applications. The PXD18k integrated circuit, fabricated in CMOS 180 nm technology, has dimensions of 9.64 mm×20 mm and contains approximately 26 million transistors. The core of the IC is a matrix of 96×192 pixels with 100 μm×100 μm pixel size. Each pixel works in a single photon counting mode. A single pixel contains two charge sensitive amplifiers with Krummenacher feedback scheme, two shapers, two discriminators (with independent thresholds A and B) and two 16-bit ripple counters. The data are read out via eight low voltage differential signaling (LVDS) outputs with 100 Mbps rate. The power consumption is dominated by analog blocks and it is about 23 μW/pixel. The effective peaking time at the discriminator input is 30 ns and is mainly determined by the time constants of the charge sensitive amplifier (CSA). The gain is equal to 42.5 μV/e − and the equivalent noise charge is 168 e − rms (with bump-bonded silicon pixel detector). Thanks to the use of trim DACs in each pixel, the effective threshold spread at the discriminator input is only 1.79 mV. The dead time of the front end electronics for a standard setting is 172 ns (paralyzable model). In the standard readout mode (when the data collection time is separated from the time necessary to readout data from the chip) the PXD18k IC works with two energy thresholds per pixel. The PXD18k can also be operated in the continuous readout mode (with a zero dead time) where one can select the number of bits readout from each pixel to optimize the PXD18k frame rate. For example, for reading out 16 bits/pixel the frame rate is 2.7 kHz and for 4 bits/pixel it rises to 7.1 kHz.

  3. 18k Channels single photon counting readout circuit for hybrid pixel detector

    Energy Technology Data Exchange (ETDEWEB)

    Maj, P., E-mail: piotr.maj@agh.edu.pl [AGH University of Science and Technology, Department of Measurements and Electronics, Al. Mickiewicza 30, 30-059 Krakow (Poland); Grybos, P.; Szczygiel, R.; Zoladz, M. [AGH University of Science and Technology, Department of Measurements and Electronics, Al. Mickiewicza 30, 30-059 Krakow (Poland); Sakumura, T.; Tsuji, Y. [X-ray Analysis Division, Rigaku Corporation, Matsubara, Akishima, Tokyo 196-8666 (Japan)

    2013-01-01

    We have performed measurements of an integrated circuit named PXD18k designed for hybrid pixel semiconductor detectors used in X-ray imaging applications. The PXD18k integrated circuit, fabricated in CMOS 180 nm technology, has dimensions of 9.64 mm Multiplication-Sign 20 mm and contains approximately 26 million transistors. The core of the IC is a matrix of 96 Multiplication-Sign 192 pixels with 100 {mu}m Multiplication-Sign 100 {mu}m pixel size. Each pixel works in a single photon counting mode. A single pixel contains two charge sensitive amplifiers with Krummenacher feedback scheme, two shapers, two discriminators (with independent thresholds A and B) and two 16-bit ripple counters. The data are read out via eight low voltage differential signaling (LVDS) outputs with 100 Mbps rate. The power consumption is dominated by analog blocks and it is about 23 {mu}W/pixel. The effective peaking time at the discriminator input is 30 ns and is mainly determined by the time constants of the charge sensitive amplifier (CSA). The gain is equal to 42.5 {mu}V/e{sup -} and the equivalent noise charge is 168 e{sup -} rms (with bump-bonded silicon pixel detector). Thanks to the use of trim DACs in each pixel, the effective threshold spread at the discriminator input is only 1.79 mV. The dead time of the front end electronics for a standard setting is 172 ns (paralyzable model). In the standard readout mode (when the data collection time is separated from the time necessary to readout data from the chip) the PXD18k IC works with two energy thresholds per pixel. The PXD18k can also be operated in the continuous readout mode (with a zero dead time) where one can select the number of bits readout from each pixel to optimize the PXD18k frame rate. For example, for reading out 16 bits/pixel the frame rate is 2.7 kHz and for 4 bits/pixel it rises to 7.1 kHz.

  4. Parameters-adjustable front-end controller in digital nuclear measurement system

    International Nuclear Information System (INIS)

    Hao Dejian; Zhang Ruanyu; Yan Yangyang; Wang Peng; Tang Changjian

    2013-01-01

    Background: One digitizer is used to implement a digital nuclear measurement for the acquisition of nuclear information. Purpose: A principle and method of a parameter-adjustable front-end controller is presented for the sake of reducing the quantitative errors while getting the maximum ENOB (effective number of bits) of ADC (analog-to-digital converter) during waveform digitizing, as well as reducing the losing counts. Methods: First of all, the quantitative relationship among the radiation count rate (n), the amplitude of input signal (V in ), the conversion scale of ADC (±V) and the amplification factor (A) was derived. Secondly, the hardware and software of the front-end controller were designed to fulfill matching the output of different detectors, adjusting the amplification linearly through the control of channel switching, and setting of digital potentiometer by CPLD (Complex Programmable Logic Device). Results: (1) Through the measurement of γ-ray of Am-241 under our digital nuclear measurement set-up with CZT detector, it was validated that the amplitude of output signal of detectors of RC feedback type could be amplified linearly with adjustable amplification by the front-end controller. (2) Through the measurement of X-ray spectrum of Fe-5.5 under our digital nuclear measurement set-up with Si-PIN detector, it was validated that the front-end controller was suitable for the switch resetting type detectors, by which high precision measurement under various count rates could be fulfilled. Conclusion: The principle and method of the parameter-adjustable front-end controller presented in this paper is correct and feasible. (authors)

  5. Single Event Upsets in the ATLAS IBL Front End ASICs

    CERN Document Server

    Rozanov, Alexander; The ATLAS collaboration

    2018-01-01

    During operation at instantaneous luminosities of up to 2.1 10^{34} cm^{-2} s^{-1} the front end chips of the ATLAS innermost pixel layer (IBL) experienced single event upsets affecting its global registers as well as the settings for the individual pixels, causing, among other things loss of occupancy, noisy pixels, and silent pixels. A quantitative analysis of the single event upsets as well as the operational issues and mitigation techniques will be presented.

  6. A segmented Hybrid Photon Detector with integrated auto-triggering front-end electronics for a PET scanner

    CERN Document Server

    Chesi, Enrico Guido; Joram, C; Mathot, S; Séguinot, Jacques; Weilhammer, P; Ciocia, F; De Leo, R; Nappi, E; Vilardi, I; Argentieri, A; Corsi, F; Dragone, A; Pasqua, D

    2006-01-01

    We describe the design, fabrication and test results of a segmented Hybrid Photon Detector with integrated auto-triggering front-end electronics. Both the photodetector and its VLSI readout electronics are custom designed and have been tailored to the requirements of a recently proposed novel geometrical concept of a Positron Emission Tomograph. Emphasis is put on the PET specific features of the device. The detector has been fabricated in the photocathode facility at CERN.

  7. The ATLAS Pixel Detector

    CERN Document Server

    Huegging, Fabian

    2006-06-26

    The contruction of the ATLAS Pixel Detector which is the innermost layer of the ATLAS tracking system is prgressing well. Because the pixel detector will contribute significantly to the ATLAS track and vertex reconstruction. The detector consists of identical sensor-chip-hybrid modules, arranged in three barrels in the centre and three disks on either side for the forward region. The position of the detector near the interaction point requires excellent radiation hardness, mechanical and thermal robustness, good long-term stability for all parts, combined with a low material budget. The final detector layout, new results from production modules and the status of assembly are presented.

  8. Overview of the CMS Pixel Detector

    CERN Document Server

    Cerati, Giuseppe B

    2008-01-01

    The Compact Muon Solenoid Experiment (CMS) will start taking data at the Large Hadron Collider (LHC) in 2009. It will investigate the proton-proton collisions at $14~TeV$. A robust tracking combined with a precise vertex reconstruction is crucial to address the physics challenge of proton collisions at this energy. To this extent an all-silicon tracking system with very fine granularity has been built and now is in the final commissioning phase. It represents the largest silicon tracking detector ever built. The system is composed by an outer part, made of micro-strip detectors, and an inner one, made of pixel detectors. The pixel detector consists of three pixel barrel layers and two forward disks at each side of the interaction region. Each pixel sensor, both for the barrel and forward detectors, has $100 \\times 150$ $\\mu m^2$ cells for a total of 66 million pixels covering a total area of about $1~m^2$. The pixel detector will play a crucial role in the pattern recognition and the track reconstruction both...

  9. The front-end chip of the SuperB SVT detector

    International Nuclear Information System (INIS)

    Giorgi, F.; Comotti, D.; Manghisoni, M.; Re, V.; Traversi, G.; Fabbri, L.; Gabrielli, A.; Pellegrini, G.; Sbarra, C.; Semprini-Cesari, N.; Valentinetti, S.; Villa, M.; Zoccoli, A.; Berra, A.; Lietti, D.; Prest, M.; Bevan, A.; Wilson, F.; Beck, G.; Morris, J.

    2013-01-01

    The asymmetric e + e − collider SuperB is designed to deliver a high luminosity, greater than 10 36 cm −2 s −1 , with moderate beam currents and a reduced center of mass boost with respect to earlier B-Factories. The innermost detector is the Silicon Vertex Tracker which is made of 5 layers of double sided silicon strip sensors plus a layer 0, that can be equipped with short striplets detectors in a first phase of the experiment. In order to achieve an overall track reconstruction efficiency above 98% it is crucial to optimize both analog and digital readout circuits. The readout architecture being developed for the front-end chips will be able to cope with the very high rates expected in the first layer. The digital readout will be optimized to be fully efficient for hit rates up to 2 MHz/strip, including large margins on the maximum expected background rates, but can potentially accommodate higher rates with a proper tuning of the buffer depth. The readout is based on a triggered architecture where each of the 128 strip channel is provided with a dedicated digital buffer. Each buffer collects the digitized charge information by means of a 4-bit TOT, storing it in conjunction with the related time stamp. The depth of buffers was dimensioned considering the expected trigger latency and hit rate including suitable safety margins. Every buffer is connected to a highly parallelized circuit handling the trigger logic, rejecting expired data in the buffers and channeling the parallel stream of triggered hits to the common output of the chip. The presented architecture has been modeled by HDL language and investigated with a Monte Carlo hit generator emulating the analog front-end behavior. The simulations showed that even applying the highest stressing conditions, about 2 MHz per strip, the efficiency of the digital readout remained above 99.8%

  10. Pixelated CdZnTe drift detectors

    DEFF Research Database (Denmark)

    Kuvvetli, Irfan; Budtz-Jørgensen, Carl

    2005-01-01

    A technique, the so-called Drift Strip Method (DSM), for improving the CdZnTe detector energy response to hard X-rays and gamma-rays was applied as a pixel geometry. First tests have confirmed that this detector type provides excellent energy resolution and imaging performance. We specifically...... report on the performance of 3 mm thick prototype CZT drift pixel detectors fabricated using material from eV-products. We discuss issues associated with detector module performance. Characterization results obtained from several prototype drift pixel detectors are presented. Results of position...

  11. The Front End Electronics of the Scintillator Pad Detector of LHCb Calorimeter

    CERN Document Server

    Gascon, David; Bota, S; Comerma, A; Diéguez, A; Garrido, L; Gaspar, A; Graciani, R; Graciani, E; Herms, A; Llorens, M; Luengo, S; Picatoste, E; Riera, J; Rosselló, M; Ruiz, H; Tortella, S; Vilasís, X

    2007-01-01

    In this paper the Front End electronics of the Scintillator Pad Detector (SPD) is outlined. The SPD is a sub-system of the Calorimeter of the LHCb experiment designed to discriminate between charged and neutral particles for the first level trigger. The system design is presented, describing its different functionalities implemented through three different cards and several ASICs. These functionalities are signal processing and digitization, data transmission, interface with control and timing systems of the experiment, low voltage power supply distribution and monitoring. Special emphasis is placed on installation and commissioning subjects such as cabling, grounding, shielding and power distribution.

  12. Status and future of the ATLAS Pixel Detector at the LHC

    International Nuclear Information System (INIS)

    Rozanov, Alexandre

    2013-01-01

    The ATLAS Pixel Detector is the innermost detector of the ATLAS experiment at the Large Hadron Collider at CERN. The detector provides hermetic coverage with three cylindrical layers and three layers of disks in each forward end-cap. It consists of approximately 80 million pixels that are individually read out via chips bump-bonded to 1744 n-on-n silicon substrates. Intensive calibration, tuning, timing optimization and monitoring resulted in the successful five years of operation with good detector performance. The record breaking instantaneous luminosities of 7.7×10 33 cm −2 s −1 recently surpassed at the LHC generated a rapidly increasing particle fluence in the ATLAS Pixel Detector. As the radiation dose accumulated, the first effects of radiation damage became observable in the silicon sensors as an increase in the silicon leakage current and the change of the voltage required to fully deplete the sensor. A fourth pixel layer at a radius of 3.3 cm will be added during the long shutdown (2013–2014) together with the replacement of pixel services. A letter of intent was submitted for a completely new Pixel Detector after 2023, capable to take data with extremely high leveled luminosities of 5×10 34 cm −2 s −1 at the high luminosity LHC. -- Highlights: •The ATLAS Pixel Detector provides hermetic coverage with three layers with 80 million pixels. •Calibration, tuning, timing optimization and monitoring resulted in the successful five years of operation with good detector performance. •First effects of radiation damage became observable in the silicon sensors. •A fourth pixel layer at a radius of 3.3 cm will be added during the long shutdown (2013–2014). •Replacement of pixel services in 2013–2014. •A letter of intent was submitted for new Pixel Detector after 2023 for high luminosity LHC

  13. Design and characterization of integrated front-end transistors in a micro-strip detector technology

    International Nuclear Information System (INIS)

    Simi, G.; Angelini, C.; Batignani, G.; Bettarini, S.; Bondioli, M.; Boscardin, M.; Bosisio, L.; Dalla Betta, G.-F.; Dittongo, S.; Forti, F.; Giorgi, M.; Gregori, P.; Manghisoni, M.; Morganti, M.; U. Pignatel, G.; Ratti, L.; Re, V.; Rizzo, G.; Speziali, V.; Zorzi, N.

    2002-01-01

    We present the developments in a research program aimed at the realization of silicon micro-strip detectors with front-end electronics integrated in a high resistivity substrate to be used in high-energy physics, space and medical/industrial imaging applications. We report on the fabrication process developed at IRST (Trento, Italy), the characterization of the basic wafer parameters and measurements of the relevant working characteristics of the integrated transistors and related test structures

  14. Test of ATLAS RPCs Front-End electronics

    International Nuclear Information System (INIS)

    Aielli, G.; Camarri, P.; Cardarelli, R.; Di Ciaccio, A.; Di Stante, L.; Liberti, B.; Paoloni, A.; Pastori, E.; Santonico, R.

    2003-01-01

    The Front-End Electronics performing the ATLAS RPCs readout is a full custom 8 channels GaAs circuit, which integrates in a single die both the analog and digital signal processing. The die is bonded on the Front-End board which is completely closed inside the detector Faraday cage. About 50 000 FE boards are foreseen for the experiment. The complete functionality of the FE boards will be certificated before the detector assembly. We describe here the systematic test devoted to check the dynamic functionality of each single channel and the selection criteria applied. It measures and registers all relevant electronics parameters to build up a complete database for the experiment. The statistical results from more than 1100 channels are presented

  15. Online Calibration and Performance of the ATLAS Pixel Detector

    CERN Document Server

    Keil, M

    2011-01-01

    The ATLAS Pixel Detector is the innermost detector of the ATLAS experiment at the Large Hadron Collider at CERN. It consists of 1744 silicon sensors equipped with approximately 80 million electronic channels, providing typically three measurement points with high resolution for particles emerging from the beam-interaction region, thus allowing measuring particle tracks and secondary vertices with very high precision. The readout system of the Pixel Detector is based on a bi-directional optical data transmission system between the detector and the data acquisition system with an individual link for each of the 1744 modules. Signal conversion components are located on both ends, approximately 80 m apart. This paper describes the tuning and calibration of the optical links and the detector modules, including measurements of threshold, noise, charge measurement, timing performance and the sensor leakage current.

  16. Performance evaluation of the analogue front-end and ADC prototypes for the Gotthard-II development

    Science.gov (United States)

    Zhang, J.; Andrä, M.; Barten, R.; Bergamaschi, A.; Brückner, M.; Dinapoli, R.; Fröjdh, E.; Greiffenberg, D.; Lopez-Cuenca, C.; Mezza, D.; Mozzanica, A.; Ramilli, M.; Redford, S.; Ruat, M.; Ruder, C.; Schmitt, B.; Shi, X.; Thattil, D.; Tinti, G.; Turcato, M.; Vetter, S.

    2017-12-01

    Gotthard-II is a silicon microstrip detector developed for the European X-ray Free-Electron Laser (XFEL.EU). Its potential scientific applications include X-ray absorption/emission spectroscopy, hard X-ray high resolution single-shot spectrometry (HiREX), energy dispersive experiments at 4.5 MHz frame rate, beam diagnostics, as well as veto signal generation for pixel detectors. Gotthard-II uses a silicon microstrip sensor with a pitch of 50 μm or 25 μm and with 1280 or 2560 channels wire-bonded to readout chips (ROCs). In the ROC, an adaptive gain switching pre-amplifier (PRE), a fully differential Correlated-Double-Sampling (CDS) stage, an Analog-to-Digital Converter (ADC) as well as a Static Random-Access Memory (SRAM) capable of storing all the 2700 images in an XFEL.EU bunch train will be implemented. Several prototypes with different designs of the analogue front-end (PRE and CDS) and ADC test structures have been fabricated in UMC-110 nm CMOS technology and their performance has been evaluated. In this paper, the performance of the analogue front-end and ADC will be summarized.

  17. Characterization and performance of monolithic detector blocks with a dedicated ASIC front-end readout for PET imaging of the human brain

    International Nuclear Information System (INIS)

    Rato Mendes, Pedro; Sarasola Martin, Iciar; Canadas, Mario; Garcia de Acilu, Paz; Cuypers, Robin; Perez, Jose Manuel; Willmott, Carlos

    2011-01-01

    We are developing a human brain PET scanner prototype compatible with MRI based on monolithic scintillator crystals, APD matrices and a dedicated ASIC front-end readout. In this work we report on the performance of individual detector modules and on the operation of such modules in PET coincidence. Results will be presented on the individual characterization of detector blocks and its ASIC front-end readout, with measured energy resolutions of 13% full-width half-maximum (FWHM) at 511 keV and spatial resolutions of the order of 2 mm FWHM. First results on PET coincidence performance indicate spatial resolutions as good as 2.1 mm FWHM for SSRB/FBP reconstruction of tomographic data obtained using a simple PET demonstrator based on a pair of monolithic detector blocks with ASIC readout.

  18. Radiation hardness on very front-end for SPD

    International Nuclear Information System (INIS)

    Cano, Xavier; Graciani, Ricardo; Gascon, David; Garrido, Lluis; Bota, Sebastia; Herms, Atila; Comerma, Albert; Riera, Jordi

    2005-01-01

    The calorimeter front-end electronics of the LHCb experiment will be located in a region, which is not protected from radiation. Therefore, all the electronics must be qualified to stand some defined radiation levels. The procedure, measurements and results of an irradiation test for every component of the very front-end SPD detector, which is part of the LHCb calorimeter are presented here. All the tested components, except a custom made ASIC, are commercially available

  19. Scientific performances of the XAA1.2 front-end chip for silicon microstrip detectors

    International Nuclear Information System (INIS)

    Del Monte, Ettore; Soffitta, Paolo; Morelli, Ennio; Pacciani, Luigi; Porrovecchio, Geiland; Rubini, Alda; Uberti, Olga; Costa, Enrico; Di Persio, Giuseppe; Donnarumma, Immacolata; Evangelista, Yuri; Feroci, Marco; Lazzarotto, Francesco; Mastropietro, Marcello; Rapisarda, Massimo

    2007-01-01

    The XAA1.2 is a custom ASIC chip for silicon microstrip detectors adapted by Ideas for the SuperAGILE instrument on board the AGILE space mission. The chip is equipped with 128 input channels, each one containing a charge preamplifier, shaper, peak detector and stretcher. The most important features of the ASIC are the extended linearity, low noise and low power consumption. The XAA1.2 underwent extensive laboratory testing in order to study its commandability and functionality and evaluate its scientific performances. In this paper we describe the XAA1.2 features, report the laboratory measurements and discuss the results emphasizing the scientific performances in the context of the SuperAGILE front-end electronics

  20. Irradiation induced effects in the FE-I4 front-end chip of the ATLAS IBL detector

    CERN Document Server

    La Rosa, Alessandro; The ATLAS collaboration

    2016-01-01

    The ATLAS Insertable B-Layer (IBL) detector was installed into the ATLAS experiment in 2014 and has been in operation since 2015. During the first year of IBL data taking an increase of the low voltage currents produced by the FE-I4 front-end chip was observed and this increase was traced back to the radiation damage in the chip. The dependence of the current on the total-ionising dose and temperature has been tested with Xray and proton irradiations and will be presented in this paper together with the detector operation guidelines.

  1. Operational experience of the ATLAS Pixel detector

    CERN Document Server

    Hirschbuehl, D; The ATLAS collaboration

    2011-01-01

    The ATLAS Pixel Detector is the innermost detector of the ATLAS experiment at the Large Hadron Collider at CERN, providing high-resolution measurements of charged particle tracks in the high radiation environment close to the collision region. This capability is vital for the identification and measurement of proper decay times of long-lived particles such as b-hadrons, and thus vital for the ATLAS physics program. The detector provides hermetic coverage with three cylindrical layers and three layers of forward and backward pixel detectors. It consists of approximately 80 million pixels that are individually read out via chips bump-bonded to 1744 n-in-n silicon substrates. In this talk, results from the successful operation of the Pixel Detector at the LHC will be presented, including monitoring, calibration procedures, timing optimization and detector performance. The detector performance is excellent: 97,5% of the pixels are operational, noise occupancy and hit efficiency exceed the design specification, an...

  2. Operational experience of the ATLAS Pixel Detector

    CERN Document Server

    Marcisovsky, M; The ATLAS collaboration

    2011-01-01

    The ATLAS Pixel Detector is the innermost detector of the ATLAS experiment at the Large Hadron Collider at CERN, providing high-resolution measurements of charged particle tracks in the high radiation environment close to the collision region. This capability is vital for the identification and measurement of proper decay times of long-lived particles such as b-hadrons, and thus vital for the ATLAS physics program. The detector provides hermetic coverage with three cylindrical layers and three layers of forward and backward pixel detectors. It consists of approximately 80 million pixels that are individually read out via chips bump-bonded to 1744 n-in-n silicon substrates. In this talk, results from the successful operation of the Pixel Detector at the LHC will be presented, including monitoring, calibration procedures, timing optimization and detector performance. The detector performance is excellent: 97,5% of the pixels are operational, noise occupancy and hit efficiency exceed the design specification, an...

  3. Modeling of Pixelated Detector in SPECT Pinhole Reconstruction.

    Science.gov (United States)

    Feng, Bing; Zeng, Gengsheng L

    2014-04-10

    A challenge for the pixelated detector is that the detector response of a gamma-ray photon varies with the incident angle and the incident location within a crystal. The normalization map obtained by measuring the flood of a point-source at a large distance can lead to artifacts in reconstructed images. In this work, we investigated a method of generating normalization maps by ray-tracing through the pixelated detector based on the imaging geometry and the photo-peak energy for the specific isotope. The normalization is defined for each pinhole as the normalized detector response for a point-source placed at the focal point of the pinhole. Ray-tracing is used to generate the ideal flood image for a point-source. Each crystal pitch area on the back of the detector is divided into 60 × 60 sub-pixels. Lines are obtained by connecting between a point-source and the centers of sub-pixels inside each crystal pitch area. For each line ray-tracing starts from the entrance point at the detector face and ends at the center of a sub-pixel on the back of the detector. Only the attenuation by NaI(Tl) crystals along each ray is assumed to contribute directly to the flood image. The attenuation by the silica (SiO 2 ) reflector is also included in the ray-tracing. To calculate the normalization for a pinhole, we need to calculate the ideal flood for a point-source at 360 mm distance (where the point-source was placed for the regular flood measurement) and the ideal flood image for the point-source at the pinhole focal point, together with the flood measurement at 360 mm distance. The normalizations are incorporated in the iterative OSEM reconstruction as a component of the projection matrix. Applications to single-pinhole and multi-pinhole imaging showed that this method greatly reduced the reconstruction artifacts.

  4. CMOS front-end electronics for radiation sensors

    CERN Document Server

    AUTHOR|(CDS)2071026

    2015-01-01

    This book offers a comprehensive treatment of front-end electronics for radiation detection. It discusses the fundamental principles of signal processing for radiation detectors and describes circuits at the level of functional building blocks, omitting transistor-level implementation. It also covers important system-level topics commonly found in the world of front-end electronics for radiation sensors. The book develops the topics in detail, with a constant focus on practical problems. It also provides real implementation examples that offer insights and stimuli for more experienced engineers already working in the field.

  5. The construction of the phase 1 upgrade of the CMS pixel detector

    CERN Document Server

    Weber, Hannsjorg Artur

    2017-01-01

    The innermost layers of the original CMS tracker were built out of pixel detectors arranged in three barrel layers and two forward disks in each endcap. The original CMS detector was designed for the nominal instantaneous LHC luminosity of $1\\times10^{34}\\,\\text{cm}^{-2}\\text{s}^{-1}$. Under the conditions expected in the coming years, which will see an increase of a factor two of the instantaneous luminosity, the CMS pixel detector would have seen a dynamic inefficiency caused by data losses due to buffer overflows. For this reason the CMS collaboration has installed during the recent extended end of year shutdown a replacement pixel detector. The phase-1 upgrade of the CMS pixel detector will operate at high efficiency at an instantaneous luminosity of $2\\times10^{34}\\,\\text{cm}^{-2}\\text{s}^{-1}$ with increased detector acceptance and additional redundancy for the tracking, while at the same time reducing the material budget. These goals are achieved using a new read-out chip and modified powering and rea...

  6. The 150 ns detector project: progress with small detectors

    International Nuclear Information System (INIS)

    Warburton, W.K.; Russell, S.R.; Kleinfelder, Stuart A.; Segal, Julie

    1994-01-01

    This project's long term goal is to develop a pixel area detector capable of 6 MHz frame rates (150 ns/frame). Our milestones toward this goal are: a single pixel, 1x256 1D and 8x8 2D detectors, 256x256 2D detectors and, finally, 1024x1024 2D detectors. The design strategy is to supply a complete electronics chain (resetting preamp, selectable gain amplifier, analog-to-digital converter (ADC), and memory) for each pixel. In the final detectors these will all be custom integrated circuits. The front end preamplifiers are being integrated first, since their design and performance are both the most unusual and also critical to the project's success. Similarly, our early work is also concentrating on devising and perfecting detector structures which are thick enough (1 mm) to absorb over 99% of the incident X-rays in the energy range of interest. In this paper we discuss our progress toward the 1x256 1D and 8x8 2D detectors. We have fabricated sample detectors at Stanford's Center for Integrated Systems and are preparing both to test them individually and to wirebond them to the preamplifier samples to produce our first working small 1D and 2D detectors. We will describe our solutions to the design problems associated with collecting charge in less than 30 ns from 1 mm thick pixels in high resistivity silicon. We have constructed and tested the front end of our preamplifier design using a commercial 1.2 μm CMOS technology and are moving on to produce a few channels of the complete preamplifier, including a switchable gain stage and output stage. We will discuss both the preamplifier design and our initial test results. ((orig.))

  7. The 150 ns detector project: progress with small detectors

    Energy Technology Data Exchange (ETDEWEB)

    Warburton, W.K. (X-ray Instrumentation Associates, 2513 Charleston Rd, Ste 207, Mountain View, CA 94043 (United States)); Russell, S.R. (X-ray Instrumentation Associates, 2513 Charleston Rd, Ste 207, Mountain View, CA 94043 (United States)); Kleinfelder, Stuart A. (VLSI Physics, 19 Drury Lane, Berkeley, CA 94705 (United States)); Segal, Julie (Integrated Ckts Lab., Dept. of Electrical Engineering, Stanford University, Stanford, CA 94305 (United States))

    1994-09-01

    This project's long term goal is to develop a pixel area detector capable of 6 MHz frame rates (150 ns/frame). Our milestones toward this goal are: a single pixel, 1x256 1D and 8x8 2D detectors, 256x256 2D detectors and, finally, 1024x1024 2D detectors. The design strategy is to supply a complete electronics chain (resetting preamp, selectable gain amplifier, analog-to-digital converter (ADC), and memory) for each pixel. In the final detectors these will all be custom integrated circuits. The front end preamplifiers are being integrated first, since their design and performance are both the most unusual and also critical to the project's success. Similarly, our early work is also concentrating on devising and perfecting detector structures which are thick enough (1 mm) to absorb over 99% of the incident X-rays in the energy range of interest. In this paper we discuss our progress toward the 1x256 1D and 8x8 2D detectors. We have fabricated sample detectors at Stanford's Center for Integrated Systems and are preparing both to test them individually and to wirebond them to the preamplifier samples to produce our first working small 1D and 2D detectors. We will describe our solutions to the design problems associated with collecting charge in less than 30 ns from 1 mm thick pixels in high resistivity silicon. We have constructed and tested the front end of our preamplifier design using a commercial 1.2 [mu]m CMOS technology and are moving on to produce a few channels of the complete preamplifier, including a switchable gain stage and output stage. We will discuss both the preamplifier design and our initial test results. ((orig.))

  8. CMS Pixel Detector Upgrade

    CERN Document Server

    INSPIRE-00038772

    2011-01-01

    The present Compact Muon Solenoid silicon pixel tracking system has been designed for a peak luminosity of 1034cm-2s-1 and total dose corresponding to two years of the Large Hadron Collider (LHC) operation. With the steady increase of the luminosity expected at the LHC, a new pixel detector with four barrel layers and three endcap disks is being designed. We will present the key points of the design: the new geometry, which minimizes the material budget and increases the tracking points, and the development of a fast digital readout architecture, which ensures readout efficiency even at high rate. The expected performances for tracking and vertexing of the new pixel detector are also addressed.

  9. Operational Experience with the ATLAS Pixel Detector

    CERN Document Server

    Djama, Fares; The ATLAS collaboration

    2017-01-01

    Run 2 of the LHC collider sets new challenges to track and vertex reconstruction because of its higher energy, pileup and luminosity. The ATLAS tracking performance relies critically on the Pixel Detector. Therefore, in view of Run 2, the ATLAS collaboration has constructed the first 4-layer pixel detector in Particle Physics by installing a new pixel layer, called Insertable B-Layer (IBL). Operational experience and performance of the 4-layer Pixel Detector during Run 2 are presented.

  10. The ALICE Silicon Pixel Detector System (SPD)

    CERN Document Server

    Kluge, A; Antinori, Federico; Burns, M; Cali, I A; Campbell, M; Caselle, M; Ceresa, S; Dima, R; Elias, D; Fabris, D; Krivda, Marian; Librizzi, F; Manzari, Vito; Morel, M; Moretto, Sandra; Osmic, F; Pappalardo, G S; Pepato, Adriano; Pulvirenti, A; Riedler, P; Riggi, F; Santoro, R; Stefanini, G; Torcato De Matos, C; Turrisi, R; Tydesjo, H; Viesti, G; PH-EP

    2007-01-01

    The ALICE silicon pixel detector (SPD) comprises the two innermost layers of the ALICE inner tracker system. The SPD includes 120 detector modules (half-staves) each consisting of 10 ALICE pixel chips bump bonded to two silicon sensors and one multi-chip read-out module. Each pixel chip contains 8192 active cells, so that the total number of pixel cells in the SPD is ≈ 107. The on-detector read-out is based on a multi-chip-module containing 4 ASICs and an optical transceiver module. The constraints on material budget and detector module dimensions are very demanding.

  11. Applying Statistical Mechanics to pixel detectors

    International Nuclear Information System (INIS)

    Pindo, Massimiliano

    2002-01-01

    Pixel detectors, being made of a large number of active cells of the same kind, can be considered as significant sets to which Statistical Mechanics variables and methods can be applied. By properly redefining well known statistical parameters in order to let them match the ones that actually characterize pixel detectors, an analysis of the way they work can be performed in a totally new perspective. A deeper understanding of pixel detectors is attained, helping in the evaluation and comparison of their intrinsic characteristics and performance

  12. Operational experience with the ATLAS Pixel Detector

    CERN Document Server

    Ince, T; The ATLAS collaboration

    2012-01-01

    The ATLAS Pixel Detector is the innermost element of the ATLAS experiment at the Large Hadron Collider at CERN, providing high-resolution measurements of charged particle tracks in the high radiation environment close to the collision region. This capability is vital for the identification and measurement of proper decay times of long-lived particles such as b-hadrons, and thus vital for the ATLAS physics program. The detector provides hermetic coverage with three cylindrical layers and three layers of forward and backward pixel detectors. It consists of approximately 80 million pixels that are individually read out via chips bump-bonded to 1744 n-in-n silicon substrates. In this paper, results from the successful operation of the Pixel Detector at the LHC will be presented, including monitoring, calibration procedures, timing optimization and detector performance. The detector performance is excellent: 96.2% of the pixels are operational, noise occupancy and hit efficiency exceed the design specification, an...

  13. Detector and System Developments for LHC Detector Upgrades

    CERN Document Server

    Mandelli, Beatrice; Guida, Roberto; Rohne, Ole; Stapnes, Steinar

    2015-05-12

    The future Large Hadron Collider (LHC) Physics program and the consequent improvement of the LHC accelerator performance set important challenges to all detector systems. This PhD thesis delineates the studies and strategies adopted to improve two different types of detectors: the replacement of precision trackers with ever increasingly performing silicon detectors, and the improvement of large gaseous detector systems by optimizing their gas mixtures and operation modes. Within the LHC tracker upgrade programs, the ATLAS Insertable B-layer (IBL) is the first major upgrade of a silicon-pixel detector. Indeed the overall ATLAS Pixel Detector performance is expected to degrade with the increase of luminosity and the IBL will recover the performance by adding a fourth innermost layer. The IBL Detector makes use of new pixel and front-end electronics technologies as well as a novel thermal management approach and light support and service structures. These innovations required complex developments and Quality Ass...

  14. Design of the Front-End Detector Control System of the ATLAS New Small Wheels

    CERN Document Server

    Koulouris, Aimilianos; The ATLAS collaboration

    2017-01-01

    The ATLAS experiment will be upgraded during the next LHC Long Shutdown (LS2). The flagship upgrade is the New Small Wheel (NSW), which consists of 2 disks of Muon Gas detectors. The detector technologies used are Micromegas (MM) and sTGC, providing a total of 16 layers of tracking and trigger. The Slow Control Adapter (SCA) is part of the GigaBit Transceiver (GBT) - “Radiation Hard Optical Link Project” family of chips designed at CERN, EP-ESE department, which will be used at the NSW upgrade. The SCA offers several interfaces to read analog and digital inputs, and configure front-end Readout ASICs, FPGAs, or other chips. This poster gives an overview of the system, data flow, and software developed for communicating with the SCA.

  15. A 2D 4×4 Channel Readout ASIC for Pixelated CdTe Detectors for Medical Imaging Applications.

    Science.gov (United States)

    Macias-Montero, Jose-Gabriel; Sarraj, Maher; Chmeissani, Mokhtar; Martínez, Ricardo; Puigdengoles, Carles

    2015-10-01

    We present a 16-channel readout integrated circuit (ROIC) with nanosecond-resolution time to digital converter (TDC) for pixelated Cadmium Telluride (CdTe) gamma-ray detectors. The 4 × 4 pixel array ROIC is the proof of concept of the 10 × 10 pixel array readout ASIC for positron-emission tomography (PET) scanner, positron-emission mammography (PEM) scanner, and Compton gamma camera. The electronics of each individual pixel integrates an analog front-end with switchable gain, an analog to digital converter (ADC), configuration registers, and a 4-state digital controller. For every detected photon, the pixel electronics provides the energy deposited in the detector with 10-bit resolution, and a fast trigger signal for time stamp. The ASIC contains the 16-pixel matrix electronics, a digital controller, five global voltage references, a TDC, a temperature sensor, and a band-gap based current reference. The ASIC has been fabricated with TSMC 0.25 μ m mixed-signal CMOS technology and occupies an area of 5.3 mm × 6.8 mm. The TDC shows a resolution of 95.5 ps, a precision of 600 ps at full width half maximum (FWHM), and a power consumption of 130 μ W. In acquisition mode, the total power consumption of every pixel is 200 μ W. An equivalent noise charge (ENC) of 160 e - RMS at maximum gain and negative polarity conditions has been measured at room temperature.

  16. A digital Front-End and Readout MIcrosystem for calorimetry at LHC

    CERN Multimedia

    2002-01-01

    % RD-16 A Digital Front-End and Readout Microsystem for Calorimetry at LHC \\\\ \\\\Front-end signal processing for calorimetric detectors is essential in order to achieve adequate selectivity in the trigger function of an LHC experiment, with data identification and compaction before readout being required in the harsh, high rate environment of a high luminosity hadron machine. Other crucial considerations are the extremely wide dynamic range and bandwidth requirements, as well as the volume of data to be transferred to following stages of the trigger and readout system. These requirements are best met by an early digitalization of the detector information, followed by integrated digital signal processing and buffering functions covering the trigger latencies.\\\\ \\\\The FERMI (Front-End Readout MIcrosystem) is a digital implementation of the front-end and readout electronic chain for calorimeters. It is based on dynamic range compression, high speed A to D converters, a fully programmable pipeline/digital filter c...

  17. Design and Measurement of a Low-Noise 64-Channels Front-End Readout ASIC for CdZnTe Detectors

    Energy Technology Data Exchange (ETDEWEB)

    Gan, Bo; Wei, Tingcun; Gao, Wu; Liu, Hui; Hu, Yann [School of Computer Science and Technology, Northwestern Polytechnical University, Xi' an (China)

    2015-07-01

    Cadmium zinc telluride (CdZnTe) detectors, as one of the principal detectors for the next-generation X-ray and γ-ray imagers, have high energy resolution and supporting electrode patterning in the radiation environment at room-temperature. In the present, a number of internationally renowned research institutions and universities are actively using these detector systems to carry out researches of energy spectrum analysis, medical imaging, materials characterization, high-energy physics, nuclear plant monitoring, and astrophysics. As the most important part of the readout system for the CdZnTe detector, the front-end readout application specific integrated circuit (ASIC) would have an important impact on the performances of the whole detector system. In order to ensure the small signal to noise ratio (SNR) and sufficient range of the output signal, it is necessary to design a front-end readout ASIC with very low noise and very high dynamic range. In addition, radiation hardness should be considered when the detectors are utilized in the space applications and high energy physics experiments. In this paper, we present measurements and performances of a novel multi-channel radiation-hardness low-noise front-end readout ASIC for CdZnTe detectors. The readout circuits in each channel consist of charge sensitive amplifier, leakage current compensation circuit (LCC), CR-RC shaper, S-K filter, inverse proportional amplifier, peak detect and hold circuit (PDH), discriminator and trigger logic, time sequence control circuit and driving buffer. All of 64 readout channels' outputs enter corresponding inputs of a 64 channel multiplexer. The output of the mux goes directly out of the chip via the output buffer. The 64-channel readout ASIC is implemented using the TSMC 0.35 μm mixed-signal CMOS technology. The die size of the prototype chip is 2.7 mm x 8 mm. At room temperature, the equivalent noise level of a typical channel reaches 66 e{sup -} (rms) at zero farad for a

  18. Small Pixel Hybrid CMOS X-ray Detectors

    Science.gov (United States)

    Hull, Samuel; Bray, Evan; Burrows, David N.; Chattopadhyay, Tanmoy; Falcone, Abraham; Kern, Matthew; McQuaide, Maria; Wages, Mitchell

    2018-01-01

    Concepts for future space-based X-ray observatories call for a large effective area and high angular resolution instrument to enable precision X-ray astronomy at high redshift and low luminosity. Hybrid CMOS detectors are well suited for such high throughput instruments, and the Penn State X-ray detector lab, in collaboration with Teledyne Imaging Sensors, has recently developed new small pixel hybrid CMOS X-ray detectors. These prototype 128x128 pixel devices have 12.5 micron pixel pitch, 200 micron fully depleted depth, and include crosstalk eliminating CTIA amplifiers and in-pixel correlated double sampling (CDS) capability. We report on characteristics of these new detectors, including the best read noise ever measured for an X-ray hybrid CMOS detector, 5.67 e- (RMS).

  19. The pin pixel detector--neutron imaging

    CERN Document Server

    Bateman, J E; Derbyshire, G E; Duxbury, D M; Marsh, A S; Rhodes, N J; Schooneveld, E M; Simmons, J E; Stephenson, R

    2002-01-01

    The development and testing of a neutron gas pixel detector intended for application in neutron diffraction studies is reported. Using standard electrical connector pins as point anodes, the detector is based on a commercial 100 pin connector block. A prototype detector of aperture 25.4 mmx25.4 mm has been fabricated, giving a pixel size of 2.54 mm which matches well to the spatial resolution typically required in a neutron diffractometer. A 2-Dimensional resistive divide readout system has been adapted to permit the imaging properties of the detector to be explored in advance of true pixel readout electronics. The timing properties of the device match well to the requirements of the ISIS-pulsed neutron source.

  20. Characterisation of the VMM3 Front-end read-out ASIC

    CERN Document Server

    Bartels, Lara Maria

    2018-01-01

    This research project was conducted in the RD51 collaboration at CERN, which is involved in the development of micropattern gaseous detector technologies and read-out systems. One example in the broad range of possible applications of such gaseous detectors is the NMX macromolecular diffractometer instrument planned for the European spallation source (ESS) which is currently under construction in Lund, Sweden. For the NMX instrument neutron detectors with high rate capabilities, high stability and excellent spatial resolution are required. A group working in the RD51 collaboration at CERN within the BrightnESS project aims to fulfil those requirements using gas electron multiplier (GEM) detectors with Gadolinium foils as neutron converters [PFE]. In order to match the high rate capability of the detectors, new front-end read-out systems need to be tested and implemented. This project aims to understand and test the capabilities of the VMM3 as the front-end read-out ASIC for GEM detectors.

  1. Performance of the First Version of VMM Front-End ASIC with Resistive Micromegas Detectors

    CERN Document Server

    The ATLAS collaboration

    2014-01-01

    This note describes the performance of the first version of a front end ASIC, VMM1, being developed for the Micromegas and sTGC detectors of the ATLAS New Small Wheel (NSW) upgrade. The VMM1 ASIC was designed by the micro-electronics group of the Instrumentation Division of Brookhaven National Laboratory. It contains 64-channels of linear, low noise amplifiers with adaptive feedback, charge amplitude peak detectors with time stamp. It can accept inputs of both polarities, features selectable gain and shaping time and has a built-in calibration system. It is designed to operate with micro-pattern gas detectors providing both trigger and tracking information. The VMM1 was tested during August 2012 test beam campaign at SPS/H6 beam line at CERN using micromegas detectors of the Muon ATLAS MicroMega Activity R&D program. We present here the VMM1 configuration, the software that was developed to achieve its operation, as well as the calibration procedure. Furthermore, we present the analysis performed with the...

  2. The front end electronics of the NA62 Gigatracker: challenges, design and experimental measurements

    Science.gov (United States)

    Noy, M.; Aglieri Rinella, G.; Ceccucci, A.; Dellacasa, G.; Fiorini, M.; Garbolino, S.; Jarron, P.; Kaplon, J.; Kluge, A.; Marchetto, F.; Martin, E.; Mazza, G.; Martoiu, S.; Morel, M.; Perktold, L.; Rivetti, A.; Tiuraniemi, S.

    2011-06-01

    The beam spectrometer of the NA62 experiment consists of 3 Gigatracker (GTK) stations. Each station comprises a pixel detector of 16 cm active area made of an assembly of 10 readout ASICs bump bonded to a 200 μm thick pixel silicon sensor, comprising 18000 pixels of 300 μm×300 μm. The main challenge of the NA62 pixel GTK station is the combination of an extremely high kaon/pion beam rate, where the intensity in the center of the beam reaches up to 1.5 Mhit s mm together with an extreme time resolution of 100 ps. To date, it is the first silicon tracking system with this time resolution. To face this challenge, the pixel analogue front end has been designed with a peaking time of 4 ns, with a planar silicon sensor operating up to 300 V over depletion. Moreover, the radiation level is severe, 2×10 1 MeV n cm per year of operation. Easy replacement of the GTK stations is foreseen as a design requirement. The amount of material of a single station should also be less than 0.5% X to minimize the background, which imposes strong constraints on the mechanics and the cooling system. We report upon the design and architecture of the 2 prototype demonstrator chips both designed in 130 nm CMOS technology, one with a constant fraction discriminator and the time stamp digitisation in each pixel (In-Pixel), and the other with a time-over-threshold discriminator and the processing of the time stamp located in the End of Column (EoC) region at the chip periphery. Some preliminary results are presented.

  3. The ALICE TPC front end electronics

    CERN Document Server

    Musa, L; Bialas, N; Bramm, R; Campagnolo, R; Engster, Claude; Formenti, F; Bonnes, U; Esteve-Bosch, R; Frankenfeld, Ulrich; Glässel, P; Gonzales, C; Gustafsson, Hans Åke; Jiménez, A; Junique, A; Lien, J; Lindenstruth, V; Mota, B; Braun-Munzinger, P; Oeschler, H; Österman, L; Renfordt, R E; Ruschmann, G; Röhrich, D; Schmidt, H R; Stachel, J; Soltveit, A K; Ullaland, K

    2004-01-01

    In this paper we present the front end electronics for the time projection chamber (TPC) of the ALICE experiment. The system, which consists of about 570000 channels, is based on two basic units: (a) an analogue ASIC (PASA) that incorporates the shaping-amplifier circuits for 16 channels; (b) a mixed-signal ASIC (ALTRO) that integrates 16 channels, each consisting of a 10-bit 25-MSPS ADC, the baseline subtraction, tail cancellation filter, zero suppression and multi-event buffer. The complete readout chain is contained in front end cards (FEC), with 128 channels each, connected to the detector by means of capton cables. A number of FECs (up to 25) are controlled by a readout control unit (RCU), which interfaces the FECs to the data acquisition (DAQ), the trigger, and the detector control system (DCS) . A function of the final electronics (1024 channels) has been characterized in a test that incorporates a prototype of the ALICE TPC as well as many other components of the final set-up. The tests show that the ...

  4. Prototype ALICE front-end card

    CERN Multimedia

    Maximilien Brice

    2004-01-01

    This circuit board is a prototype 48-channel front end digitizer card for the ALICE time projection chamber (TPC), which takes electrical signals from the wire sensors in the TPC and shapes the data before converting the analogue signal to digital data. A total of 4356 cards will be required to process the data from the ALICE TPC, the largest of this type of detector in the world.

  5. Operational Experience with the ATLAS Pixel Detector

    CERN Document Server

    Djama, Fares; The ATLAS collaboration

    2017-01-01

    Run-2 of the LHC is providing new challenges to track and vertex reconstruction imposed by the higher collision energy, pileup and luminosity that are being delivered. The ATLAS tracking performance relies critically on the Pixel Detector, therefore, in view of Run-2 of LHC, the ATLAS experiment has constructed the first 4-layer Pixel detector in HEP, installing a new Pixel layer, also called Insertable B-Layer (IBL). Pixel detector was refurbished with a new service quarter panel to recover about 3% of defective modules lost during run-1 and an additional optical link per module was added to overcome in some layers the readout bandwidth limitation when LHC will exceed the nominal peak luminosity by almost a factor of 3. The key features and challenges met during the IBL project will be presented, as well as its operational experience and Pixel Detector performance in LHC.

  6. Operational Experience with the ATLAS Pixel Detector

    CERN Document Server

    Lantzsch, Kerstin; The ATLAS collaboration

    2016-01-01

    Run 2 of the LHC is providing new challenges to track and vertex reconstruction with higher energies, denser jets and higher rates. Therefore the ATLAS experiment has constructed the first 4-layer Pixel detector in HEP, installing a new Pixel layer, also called Insertable B-Layer (IBL). In addition the Pixel detector was refurbished with new service quarter panels to recover about 3% of defective modules lost during run 1 and a new optical readout system to readout the data at higher speed while reducing the occupancy when running with increased luminosity. The commissioning, operation and performance of the 4-layer Pixel Detector will be presented.

  7. JACoW Design of the front-end detector control system of the ATLAS New Small Wheels

    CERN Document Server

    Moschovakos, Paris

    2018-01-01

    The ATLAS experiment will be upgraded during the next LHC Long Shutdown (LS2). The flagship upgrade is the New Small Wheel (NSW) [1], which consists of 2 disks of Muon Gas detectors. The detector technologies used are Micromegas (MM) and sTGC, providing a total of 16 layers of tracking and trigger. The Slow Control Adapter (SCA) is part of the Gigabit Transceiver (GBT) - “Radiation Hard Optical Link Project” family of chips designed at CERN, EP-ESE department [2,3], which will be used at the NSW upgrade. The SCA offers several interfaces to read analogue and digital inputs, and configure front-end Readout ASICs, FPGAs, or other chips. The design of the NSW Detector Control System (DCS) takes advantage of this functionality, as described in this paper.

  8. Performance of the front-end signal processing electronics for the drift chambers of the Stanford Large Detector

    International Nuclear Information System (INIS)

    Honma, A.; Haller, G.M.; Usher, T.; Shypit, R.

    1990-10-01

    This paper reports on the performance of the front-end analog and digital signal processing electronics for the drift chambers of the Stanford Large Detector (SLD) detector at the Stanford Linear Collider. The electronics mounted on printed circuit boards include up to 64 channels of transimpedance amplification, analog sampling, A/D conversion, and associated control circuitry. Measurements of the time resolution, gain, noise, linearity, crosstalk, and stability of the readout electronics are described and presented. The expected contribution of the electronics to the relevant drift chamber measurement resolutions (i.e., timing and charge division) is given

  9. Studies of the performance of different front-end systems for flat-panel multi-anode PMTs with CsI(Tl) scintillator arrays

    International Nuclear Information System (INIS)

    Sekiya, H.; Hattori, K.; Kubo, H.; Miuchi, K.; Nagayoshi, T.; Nishimura, H.; Okada, Y.; Orito, R.; Takada, A.; Takeda, A.; Tanimori, T.; Ueno, K.

    2006-01-01

    We have studied the performance of two different types of front-end systems for our gamma camera based on Hamamatsu H8500 (flat-panel 64 channels multi-anode PSPMT) with a CsI(Tl) scintillator array. The array consists of 64 pixels of 6x6x20mm 3 which corresponds to the anode pixels of H8500. One of the system is based on commercial ASIC chips in order to read out every anode. The others are based on resistive charge divider network between anodes to reduce readout channels. In both systems, each pixel (6mm) was clearly resolved by flood field irradiation of 137 Cs. We also investigated the energy resolution of these systems and showed the performance of the cascade connection of resistive network between some PMTs for large area detectors

  10. Front end readout electronics for the CMS hadron calorimeter

    CERN Document Server

    Shaw, Terri M

    2002-01-01

    The front-end electronics for the CMS Hadron Calorimeter provides digitized data at the beam interaction rate of 40 MHz. Analog signals provided by hybrid photodiodes (HPDs) or photomultiplier tubes (PMTs) are digitized and the data is sent off board through serialized fiber optic links running at 1600 Mbps. In order to maximize the input signal, the front-end electronics are housed on the detector in close proximity to the scintillating fibers or phototubes. To fit the electronics into available space, custom crates, backplanes and cooling methods have had to be developed. During the expected ten-year lifetime, the front-end readout electronics will exist in an environment where radiation levels approach 330 rads and the neutron fluence will be 1.3E11 n/cm sup 2. For this reason, the design approach relies heavily upon custom radiation tolerant ASICs. This paper will present the system architecture of the front-end readout crates and describe their results with early prototypes.

  11. Front end readout electronics for the CMS hadron calorimeter

    International Nuclear Information System (INIS)

    Terri M. Shaw et al.

    2002-01-01

    The front-end electronics for the CMS Hadron Calorimeter provides digitized data at the beam interaction rate of 40 MHz. Analog signals provided by hybrid photodiodes (HPDs) or photomultiplier tubes (PMTs) are digitized and the data is sent off board through serialized fiber optic links running at 1600 Mbps. In order to maximize the input signal, the front-end electronics are housed on the detector in close proximity to the scintillating fibers or phototubes. To fit the electronics into available space, custom crates, backplanes and cooling methods have had to be developed. During the expected ten-year lifetime, the front-end readout electronics will exist in an environment where radiation levels approach 330 rads and the neutron fluence will be 1.3E11 n/cm 2 . For this reason, the design approach relies heavily upon custom radiation tolerant ASICs. This paper will present the system architecture of the front-end readout crates and describe their results with early prototypes

  12. Test beam measurements for the upgrade of the CMS pixel detector and measurement of the top quark mass from differential cross sections

    International Nuclear Information System (INIS)

    Spannagel, Simon

    2016-05-01

    In this dissertation, two different topics are addressed which are vital for the realization of modern high-energy physics experiments: detector development and data analysis. The first part focuses on the development and characterization of silicon pixel detectors. To account for the expected increase in luminosity of the Large Hadron Collider, the pixel detector of the Compact Muon Solenoid (CMS) experiment will be replaced by an upgraded detector with new front-end electronics. Comprehensive test beam studies are presented which have been conducted to verify the design and to quantify the performance of the new front-end in terms of tracking efficiency and spatial resolution. The tracking efficiency has been determined to be 99.7 +0.3 -0.5 %, while the spatial resolution has been measured to be (4.80±0.29) μm and (7.99±0.23) μm along the 100 μm and 150 μm pixel pitch, respectively. Furthermore, a new cluster interpolation method is proposed which utilizes the third central moment of the cluster charge distribution and achieves improvements of the position resolution of up to 40% over the conventional center of gravity algorithm. In the second part of the thesis, an alternative measurement of the top quark mass is presented. The mass is measured from the normalized differential production cross sections of dileptonic top quark pair events with an additional jet. The measurement is performed on data recorded by the CMS experiment at √(s)=8 TeV, corresponding to an integrated luminosity of 19.7 fb -1 . Using theoretical predictions at next-to-leading order in perturbative QCD, the top quark pole mass is measured to be m pole t = 168.2 +4.7 -2.1 GeV with a precision of about 2.0%. The measurement is in agreement with other measurements of the top quark pole mass within the assigned uncertainties.

  13. Test beam measurements for the upgrade of the CMS pixel detector and measurement of the top quark mass from differential cross sections

    Energy Technology Data Exchange (ETDEWEB)

    Spannagel, Simon

    2016-05-15

    In this dissertation, two different topics are addressed which are vital for the realization of modern high-energy physics experiments: detector development and data analysis. The first part focuses on the development and characterization of silicon pixel detectors. To account for the expected increase in luminosity of the Large Hadron Collider, the pixel detector of the Compact Muon Solenoid (CMS) experiment will be replaced by an upgraded detector with new front-end electronics. Comprehensive test beam studies are presented which have been conducted to verify the design and to quantify the performance of the new front-end in terms of tracking efficiency and spatial resolution. The tracking efficiency has been determined to be 99.7{sup +0.3}{sub -0.5} %, while the spatial resolution has been measured to be (4.80±0.29) μm and (7.99±0.23) μm along the 100 μm and 150 μm pixel pitch, respectively. Furthermore, a new cluster interpolation method is proposed which utilizes the third central moment of the cluster charge distribution and achieves improvements of the position resolution of up to 40% over the conventional center of gravity algorithm. In the second part of the thesis, an alternative measurement of the top quark mass is presented. The mass is measured from the normalized differential production cross sections of dileptonic top quark pair events with an additional jet. The measurement is performed on data recorded by the CMS experiment at √(s)=8 TeV, corresponding to an integrated luminosity of 19.7 fb{sup -1}. Using theoretical predictions at next-to-leading order in perturbative QCD, the top quark pole mass is measured to be m{sup pole}{sub t}= 168.2{sup +4.7}{sub -2.1} GeV with a precision of about 2.0%. The measurement is in agreement with other measurements of the top quark pole mass within the assigned uncertainties.

  14. Linearity enhancement design of a 16-channel low-noise front-end readout ASIC for CdZnTe detectors

    International Nuclear Information System (INIS)

    Zeng, Huiming; Wei, Tingcun; Wang, Jia

    2017-01-01

    A 16-channel front-end readout application-specific integrated circuit (ASIC) with linearity enhancement design for cadmium zinc telluride (CdZnTe) detectors is presented in this paper. The resistors in the slow shaper are realized using a high-Z circuit to obtain constant resistance value instead of using only a metal–oxide–semiconductor (MOS) transistor, thus the shaping time of the slow shaper can be kept constant for different amounts of input energies. As a result, the linearity of conversion gain is improved significantly. The ASIC was designed and fabricated in a 0.35 µm CMOS process with a die size of 2.60 mm×3.53 mm. The tested results show that a typical channel provides an equivalent noise charge (ENC) of 109.7e − +16.3e − /pF with a power consumption of 4 mW and achieves a conversion gain of 87 mV/fC with a nonlinearity of <0.4%. The linearity of conversion gain is improved by at least 86.6% as compared with the traditional approaches using the same front-end readout architecture and manufacture process. Moreover, the inconsistency among channels is <0.3%. An energy resolution of 2.975 keV (FWHM) for gamma rays of 59.5 keV was measured by connecting the ASIC to a 5 mm×5 mm ×2 mm CdZnTe detector at room temperature. The front-end readout ASIC presented in this paper achieves an outstanding linearity performance without compromising the noise, power consumption, and chip size performances.

  15. Linearity enhancement design of a 16-channel low-noise front-end readout ASIC for CdZnTe detectors

    Energy Technology Data Exchange (ETDEWEB)

    Zeng, Huiming; Wei, Tingcun, E-mail: weitc@nwpu.edu.cn; Wang, Jia

    2017-03-01

    A 16-channel front-end readout application-specific integrated circuit (ASIC) with linearity enhancement design for cadmium zinc telluride (CdZnTe) detectors is presented in this paper. The resistors in the slow shaper are realized using a high-Z circuit to obtain constant resistance value instead of using only a metal–oxide–semiconductor (MOS) transistor, thus the shaping time of the slow shaper can be kept constant for different amounts of input energies. As a result, the linearity of conversion gain is improved significantly. The ASIC was designed and fabricated in a 0.35 µm CMOS process with a die size of 2.60 mm×3.53 mm. The tested results show that a typical channel provides an equivalent noise charge (ENC) of 109.7e{sup −}+16.3e{sup −}/pF with a power consumption of 4 mW and achieves a conversion gain of 87 mV/fC with a nonlinearity of <0.4%. The linearity of conversion gain is improved by at least 86.6% as compared with the traditional approaches using the same front-end readout architecture and manufacture process. Moreover, the inconsistency among channels is <0.3%. An energy resolution of 2.975 keV (FWHM) for gamma rays of 59.5 keV was measured by connecting the ASIC to a 5 mm×5 mm ×2 mm CdZnTe detector at room temperature. The front-end readout ASIC presented in this paper achieves an outstanding linearity performance without compromising the noise, power consumption, and chip size performances.

  16. System test and noise performance studies at the ATLAS pixel detector

    International Nuclear Information System (INIS)

    Weingarten, J.

    2007-09-01

    The central component of the ATLAS Inner Tracker is the pixel detector. It consists of three barrel layers and three disk-layers in the end-caps in both forward directions. The innermost barrel layer is mounted at a distance of about 5 cm from the interaction region. With its very high granularity, truly two-dimensional hit information, and fast readout it is well suited to cope with the high densities of charged tracks, expected this close to the interaction region. The huge number of readout channels necessitates a very complex services infrastructure for powering, readout and safety. After a description of the pixel detector and its services infrastructure, key results from the system test at CERN are presented. Furthermore the noise performance of the pixel detector, crucial for high tracking and vertexing efficiencies, is studied. Measurements of the single-channel random noise are presented together with studies of common mode noise and measurements of the noise occupancy using a random trigger generator. (orig.)

  17. System test and noise performance studies at the ATLAS pixel detector

    Energy Technology Data Exchange (ETDEWEB)

    Weingarten, J.

    2007-09-15

    The central component of the ATLAS Inner Tracker is the pixel detector. It consists of three barrel layers and three disk-layers in the end-caps in both forward directions. The innermost barrel layer is mounted at a distance of about 5 cm from the interaction region. With its very high granularity, truly two-dimensional hit information, and fast readout it is well suited to cope with the high densities of charged tracks, expected this close to the interaction region. The huge number of readout channels necessitates a very complex services infrastructure for powering, readout and safety. After a description of the pixel detector and its services infrastructure, key results from the system test at CERN are presented. Furthermore the noise performance of the pixel detector, crucial for high tracking and vertexing efficiencies, is studied. Measurements of the single-channel random noise are presented together with studies of common mode noise and measurements of the noise occupancy using a random trigger generator. (orig.)

  18. A silicon pixel detector prototype for the CLIC vertex detector

    CERN Multimedia

    AUTHOR|(INSPIRE)INSPIRE-00714258

    2017-01-01

    A silicon pixel detector prototype for CLIC, currently under study for the innermost detector surrounding the collision point. The detector is made of a High-Voltage CMOS sensor (top) and a CLICpix2 readout chip (bottom) that are glued to each other. Both parts have a size of 3.3 x 4.0 $mm^2$ and consist of an array of 128 x 128 pixels of 25 x 25 $\\micro m^2$ size.

  19. Novel powering schemes for pixel and tracking detectors

    CERN Document Server

    Feld, Lutz Werner

    2013-01-01

    Future pixel and tracking systems like the ones foreseen in the upgrade programs of the LHC experiments are very demanding on the power supply systems. An increased amount of power has to be supplied to the front-end electronics at a reduced voltage, through existing cable plants. Novel powering schemes are needed to avoid excessive cable losses. The two schemes under consideration, serial powering and DC-DC conversion, are reviewed. Particular emphasis is put on system integration aspects. As an example, the new CMS pixel system, which will be powered via DC-DC conversion, is presented in more detail. This allows to discuss challenges and solutions for a concrete application while the conclusions should be relevant for other applications as well.

  20. Pixel Detectors for Particle Physics and Imaging Applications

    CERN Document Server

    Wermes, N

    2003-01-01

    Semiconductor pixel detectors offer features for the detection of radiation which are interesting for particle physics detectors as well as for imaging e.g. in biomedical applications (radiography, autoradiography, protein crystallography) or in Xray astronomy. At the present time hybrid pixel detectors are technologically mastered to a large extent and large scale particle detectors are being built. Although the physical requirements are often quite different, imaging applications are emerging and interesting prototype results are available. Monolithic detectors, however, offer interesting features for both fields in future applications. The state of development of hybrid and monolithic pixel detectors, excluding CCDs, and their different suitability for particle detection and imaging, is reviewed.

  1. New RPC front-end electronics for hades

    CERN Document Server

    Gil, Alejandro; Cabanelas, P; Díaz, J; Garzón, J A; González-Díaz, D; König, W; Lange, J S; Marín, J; Montes, N; Skott, P; Traxler, M

    2007-01-01

    Time-of-flight (TOF) detectors are mainly used for both particle identification and triggering. Resistive Plate Chamber (RPC) detectors are becoming widely used because of their excellent TOF capabilities and reduced cost. The new ESTRELA* RPC wall, which is being installed in the HADES detector at Darmstadt GSI, will contain 1024 RPC modules, covering an active area of around 7 m2. It has excellent TOF and good charge resolutions. Its Front-End electronics is based on a 8-layer Mother-Board providing impedance matched paths for the output signals of each of the eight 4-channel Daughter-Boards to the TDC.

  2. BGO front-end electronics and signal processing in the MXGS instrument for the ASIM mission

    DEFF Research Database (Denmark)

    Skogseide, Yngve; Cenkeramaddi, Linga Reddy; Genov, Georgi

    2012-01-01

    This paper presents the Bismuth Germanate Oxide (BGO) front-end electronics design and signal processing in Modular X- and Gamma ray sensor (MXGS) instrument onboard the Atmosphere Space Interaction Monitor (ASIM) mission, funded by the European Space Agency. University of Bergen is responsible...... for the design and development of the detector layers and readout electronics for the MXGS instrument. The principal objective of the instrument is to detect Terrestrial Gamma ray Flashes (TGFs), which are related to thunderstorm activity. The digital pulse processing scheme used in the MXGS BGO detector gives...... it a significantly higher rate capability than what has been achieved in other instruments used in the study of terrestrial gamma flashes. The front-end electronics for the BGO detector layer in MXGS system also uses fewer components compared to conventional analog front-ends for BGO detectors, thereby increasing...

  3. Challenges of small-pixel infrared detectors: a review.

    Science.gov (United States)

    Rogalski, A; Martyniuk, P; Kopytko, M

    2016-04-01

    In the last two decades, several new concepts for improving the performance of infrared detectors have been proposed. These new concepts particularly address the drive towards the so-called high operating temperature focal plane arrays (FPAs), aiming to increase detector operating temperatures, and as a consequence reduce the cost of infrared systems. In imaging systems with the above megapixel formats, pixel dimension plays a crucial role in determining critical system attributes such as system size, weight and power consumption (SWaP). The advent of smaller pixels has also resulted in the superior spatial and temperature resolution of these systems. Optimum pixel dimensions are limited by diffraction effects from the aperture, and are in turn wavelength-dependent. In this paper, the key challenges in realizing optimum pixel dimensions in FPA design including dark current, pixel hybridization, pixel delineation, and unit cell readout capacity are outlined to achieve a sufficiently adequate modulation transfer function for the ultra-small pitches involved. Both photon and thermal detectors have been considered. Concerning infrared photon detectors, the trade-offs between two types of competing technology-HgCdTe material systems and III-V materials (mainly barrier detectors)-have been investigated.

  4. Pixel detector readout chip

    CERN Multimedia

    1991-01-01

    Close-up of a pixel detector readout chip. The photograph shows an aera of 1 mm x 2 mm containing 12 separate readout channels. The entire chip contains 1000 readout channels (around 80 000 transistors) covering a sensitive area of 8 mm x 5 mm. The chip has been mounted on a silicon detector to detect high energy particles.

  5. Pixel-Tilecal-MDT Combined Test Beam

    CERN Multimedia

    B. Di Girolamo

    A test with many expectations When an additional week of running (from September 11th to 18th) was allocated for the test-beam, it was decided to give priority to a combined run with the participation of the Pixel, Tilecal and MDT sub-detectors. The integration of these three sub-detectors was possible as they all use the baseline (DAQ-1/EF based) DAQ for test beams (as reported in a previous e-news). The tests and the addition of a common trigger and busy were organized in a short timescale by experts from the three sub-detectors and DAQ/EF. The expectations were many; both looking for problems and finding solutions. The setup The setup, shown in the figure, consisted of the Pixel telescope normally used during the sub-detector tests, two Tilecal barrel modules, two Tilecal extended barrel modules, and six MDT barrel chambers. This fully occupied a length of some 30 meters in the H8 line of the SPS North Area. Each sub-detector used their own specialized front-end electronics. The data collected by modu...

  6. End-Users, Front Ends and Librarians.

    Science.gov (United States)

    Bourne, Donna E.

    1989-01-01

    The increase in end-user searching, the advantages and limitations of front ends, and the role of the librarian in end-user searching are discussed. It is argued that librarians need to recognize that front ends can be of benefit to themselves and patrons, and to assume the role of advisors and educators for end-users. (37 references) (CLB)

  7. Detector performance of the ALICE silicon pixel detector

    CERN Document Server

    Cavicchioli, C

    2011-01-01

    The ALICE Silicon Pixel Detector (SPD) forms the two innermost layers of the ALICE Inner Tracking System (ITS). It consists of two barrel layers of hybrid silicon pixel detectors at radii of 39 and 76 mm. The physics targets of the ALICE experiment require that the material budget of the SPD is kept within approximate to 1\\%X(0) per layer. This has set some stringent constraints on the design and construction of the SPD. A unique feature of the ALICE SPD is that it is capable of providing a prompt trigger signal, called Fast-OR, which contributes to the L0 trigger decision. The pixel trigger system allows to apply a set of algorithms for the trigger selection, and its output is sent to the Central Trigger Processor (CTP). The detector has been installed in the experiment in summer 2007. During the first injection tests in June 2008 the SPD was able to record the very first sign of life of the LHC by registering secondary particles from the beam dumped upstream the ALICE experiment. In the following months the...

  8. An array of virtual Frisch-grid CdZnTe detectors and a front-end application-specific integrated circuit for large-area position-sensitive gamma-ray cameras

    Energy Technology Data Exchange (ETDEWEB)

    Bolotnikov, A. E., E-mail: bolotnik@bnl.gov; Ackley, K.; Camarda, G. S.; Cherches, C.; Cui, Y.; De Geronimo, G.; Fried, J.; Hossain, A.; Mahler, G.; Maritato, M.; Roy, U.; Salwen, C.; Vernon, E.; Yang, G.; James, R. B. [Brookhaven National Laboratory, Upton, New York 11793 (United States); Hodges, D. [University of Texas at El Paso, El Paso, Texas 79968 (United States); Lee, W. [Korea University, Seoul 136-855 (Korea, Republic of); Petryk, M. [SUNY Binghamton, Vestal, New York 13902 (United States)

    2015-07-15

    We developed a robust and low-cost array of virtual Frisch-grid CdZnTe detectors coupled to a front-end readout application-specific integrated circuit (ASIC) for spectroscopy and imaging of gamma rays. The array operates as a self-reliant detector module. It is comprised of 36 close-packed 6 × 6 × 15 mm{sup 3} detectors grouped into 3 × 3 sub-arrays of 2 × 2 detectors with the common cathodes. The front-end analog ASIC accommodates up to 36 anode and 9 cathode inputs. Several detector modules can be integrated into a single- or multi-layer unit operating as a Compton or a coded-aperture camera. We present the results from testing two fully assembled modules and readout electronics. The further enhancement of the arrays’ performance and reduction of their cost are possible by using position-sensitive virtual Frisch-grid detectors, which allow for accurate corrections of the response of material non-uniformities caused by crystal defects.

  9. Pixel detector readout electronics with two-level discriminator scheme

    International Nuclear Information System (INIS)

    Pengg, F.

    1998-01-01

    In preparation for a silicon pixel detector with more than 3,000 readout channels per chip for operation at the future large hadron collider (LHC) at CERN the analog front end of the readout electronics has been designed and measured on several test-arrays with 16 by 4 cells. They are implemented in the HP 0.8 microm process but compatible with the design rules of the radiation hard Honeywell 0.8 microm bulk process. Each cell contains bump bonding pad, preamplifier, discriminator and control logic for masking and testing within a layout area of only 50 microm by 140 microm. A new two-level discriminator scheme has been implemented to cope with the problems of time-walk and interpixel cross-coupling. The measured gain of the preamplifier is 900 mV for a minimum ionizing particle (MIP, about 24,000 e - for a 300 microm thick Si-detector) with a return to baseline within 750 ns for a 1 MIP input signal. The full readout chain (without detector) shows an equivalent noise charge to 60e - r.m.s. The time-walk, a function of the separation between the two threshold levels, is measured to be 22 ns at a separation of 1,500 e - , which is adequate for the 40 MHz beam-crossing frequency at the LHC. The interpixel cross-coupling, measured with a 40fF coupling capacitance, is less than 3%. A single cell consumes 35 microW at 3.5 V supply voltage

  10. Rework of flip chip bonded radiation pixel detectors

    International Nuclear Information System (INIS)

    Vaehaenen, S.; Heikkinen, H.; Pohjonen, H.; Salonen, J.; Savolainen-Pulli, S.

    2008-01-01

    In this paper, some practical aspects of reworking flip chip hybridized pixel detectors are discussed. As flip chip technology has been advancing in terms of placement accuracy and reliability, large-area hybrid pixel detectors have been developed. The area requirements are usually fulfilled by placing several readout chips (ROCs) on single sensor chip. However, as the number of ROCs increases, the probability of failure in the hybridization process and the ROC operation also increases. Because high accuracy flip chip bonding takes time, a significant part of the price of a pixel detector comes from the flip chip assembly process itself. As large-area detector substrates are expensive, and many flip chip placements are required, the price of an assembled detector can become very high. In a typical case, there is just one bad ROC (out of several) on a faulty detector to be replaced. Considering the high price of pixel detectors and the fact that reworking faulty ROCs does not take much longer than the original placement, it is worthwhile to investigate the feasibility of a rework process

  11. Rework of flip chip bonded radiation pixel detectors

    Energy Technology Data Exchange (ETDEWEB)

    Vaehaenen, S. [VTT MEMS and Micropackaging, Espoo 02150 (Finland)], E-mail: sami.vahanen@vtt.fi; Heikkinen, H.; Pohjonen, H.; Salonen, J.; Savolainen-Pulli, S. [VTT MEMS and Micropackaging, Espoo 02150 (Finland)

    2008-06-11

    In this paper, some practical aspects of reworking flip chip hybridized pixel detectors are discussed. As flip chip technology has been advancing in terms of placement accuracy and reliability, large-area hybrid pixel detectors have been developed. The area requirements are usually fulfilled by placing several readout chips (ROCs) on single sensor chip. However, as the number of ROCs increases, the probability of failure in the hybridization process and the ROC operation also increases. Because high accuracy flip chip bonding takes time, a significant part of the price of a pixel detector comes from the flip chip assembly process itself. As large-area detector substrates are expensive, and many flip chip placements are required, the price of an assembled detector can become very high. In a typical case, there is just one bad ROC (out of several) on a faulty detector to be replaced. Considering the high price of pixel detectors and the fact that reworking faulty ROCs does not take much longer than the original placement, it is worthwhile to investigate the feasibility of a rework process.

  12. A front end ASIC for the readout of the PMT in the KM3NeT detector

    International Nuclear Information System (INIS)

    Gajanana, D; Gromov, V; Timmer, P; Heine, E; Kluit, R

    2010-01-01

    In this work, we describe the front end ASIC to readout the Photo-Multiplier-Tube of the KM3NeT detector, in detail. Stringent power budgeting, area constraints and lowering cost motivate us to design a custom front-end ASIC for reading the PMT. The ASIC amplifies the PMT signal and discriminates it against a threshold level and delivers the information via low voltage differential signals (LVDS). These LVDS signals carry highly accurate timing information of the photons . The length of the LVDS signals or Time over Threshold (ToT) gives information on the number of detected photons. A one-time programmable read-only memory (PROM) block provides unique identification to the chip. The chip communicates with the data acquisition electronics via an I 2 C bus. The data is transmitted to shore via fiber optics, where processing is done. The ASIC was fabricated in 0.35u CMOS process from AustriaMicroSystems (AMS).

  13. LISe pixel detector for neutron imaging

    Energy Technology Data Exchange (ETDEWEB)

    Herrera, Elan; Hamm, Daniel [Department of Nuclear Engineering, University of Tennessee, Knoxville, TN (United States); Wiggins, Brenden [Technology Development, Y-12 National Security Complex, Oak Ridge, TN (United States); Department of Physics and Astronomy, Vanderbilt University, Nashville, TN (United States); Milburn, Rob [Department of Nuclear Engineering, University of Tennessee, Knoxville, TN (United States); Burger, Arnold [Department of Physics and Astronomy, Vanderbilt University, Nashville, TN (United States); Department of Life and Physical Sciences, Fisk University, Nashville, TN (United States); Bilheux, Hassina [Chemical and Engineering Materials Division, Oak Ridge National Laboratory, Oak Ridge, TN (United States); Santodonato, Louis [Instrument and Source Division, Oak Ridge National Laboratory, Oak Ridge National Laboratory, Oak Ridge, TN (United States); Chvala, Ondrej [Department of Nuclear Engineering, University of Tennessee, Knoxville, TN (United States); Stowe, Ashley [Department of Nuclear Engineering, University of Tennessee, Knoxville, TN (United States); Technology Development, Y-12 National Security Complex, Oak Ridge, TN (United States); Department of Physics and Astronomy, Vanderbilt University, Nashville, TN (United States); Lukosi, Eric, E-mail: elukosi@utk.edu [Department of Nuclear Engineering, University of Tennessee, Knoxville, TN (United States)

    2016-10-11

    Semiconducting lithium indium diselenide, {sup 6}LiInSe{sub 2} or LISe, has promising characteristics for neutron detection applications. The 95% isotopic enrichment of {sup 6}Li results in a highly efficient thermal neutron-sensitive material. In this study, we report on a proof-of-principle investigation of a semiconducting LISe pixel detector to demonstrate its potential as an efficient neutron imager. The LISe pixel detector had a 4×4 of pixels with a 550 µm pitch on a 5×5×0.56 mm{sup 3} LISe substrate. An experimentally verified spatial resolution of 300 µm was observed utilizing a super-sampling technique.

  14. Diamond and silicon pixel detectors in high radiation environments

    Energy Technology Data Exchange (ETDEWEB)

    Tsung, Jieh-Wen

    2012-10-15

    Diamond pixel detector is a promising candidate for tracking of collider experiments because of the good radiation tolerance of diamond. The diamond pixel detector must withstand the radiation damage from 10{sup 16} particles per cm{sup 2}, which is the expected total fluence in High Luminosity Large Hadron Collider. The performance of diamond and silicon pixel detectors are evaluated in this research in terms of the signal-to-noise ratio (SNR). Single-crystal diamond pixel detectors with the most recent readout chip ATLAS FE-I4 are produced and characterized. Based on the results of the measurement, the SNR of diamond pixel detector is evaluated as a function of radiation fluence, and compared to that of planar-silicon ones. The deterioration of signal due to radiation damage is formulated using the mean free path of charge carriers in the sensor. The noise from the pixel readout circuit is simulated and calculated with leakage current and input capacitance to the amplifier as important parameters. The measured SNR shows good agreement with the calculated and simulated results, proving that the performance of diamond pixel detectors can exceed the silicon ones if the particle fluence is more than 10{sup 15} particles per cm{sup 2}.

  15. Diamond and silicon pixel detectors in high radiation environments

    International Nuclear Information System (INIS)

    Tsung, Jieh-Wen

    2012-10-01

    Diamond pixel detector is a promising candidate for tracking of collider experiments because of the good radiation tolerance of diamond. The diamond pixel detector must withstand the radiation damage from 10 16 particles per cm 2 , which is the expected total fluence in High Luminosity Large Hadron Collider. The performance of diamond and silicon pixel detectors are evaluated in this research in terms of the signal-to-noise ratio (SNR). Single-crystal diamond pixel detectors with the most recent readout chip ATLAS FE-I4 are produced and characterized. Based on the results of the measurement, the SNR of diamond pixel detector is evaluated as a function of radiation fluence, and compared to that of planar-silicon ones. The deterioration of signal due to radiation damage is formulated using the mean free path of charge carriers in the sensor. The noise from the pixel readout circuit is simulated and calculated with leakage current and input capacitance to the amplifier as important parameters. The measured SNR shows good agreement with the calculated and simulated results, proving that the performance of diamond pixel detectors can exceed the silicon ones if the particle fluence is more than 10 15 particles per cm 2 .

  16. A protocol for hit and control synchronous transfer for the front-end electronics at the CBM experiment

    Energy Technology Data Exchange (ETDEWEB)

    Kasinski, K., E-mail: kasinski@agh.edu.pl [AGH University of Science and Technology, Department of Measurement and Electronics, Av. Mickiewicza 30, 30-059 Cracow (Poland); Szczygiel, R. [AGH University of Science and Technology, Department of Measurement and Electronics, Av. Mickiewicza 30, 30-059 Cracow (Poland); Zabolotny, W. [Institute of Electronic Systems, Warsaw University of Technology, ul. Nowowiejska 15/19, 00-665 Warsaw (Poland); Lehnert, J.; Schmidt, C.J. [GSI Helmholtzzentrum für Schwerionenforschung GmbH, Planckstrasse 1, 64-291 Darmstadt (Germany); Müller, W.F.J. [FAIR Facility for Antiproton and Ion Research in Europe GmbH, Planckstrasse 1, 64-291 Darmstadt (Germany)

    2016-11-01

    The Silicon Tracking System, Muon Chamber, Transition Radiation Detector and Time-Of-Flight among others are the detector systems of the Compressed Baryonic Matter (CBM) experiment at the FAIR facility. These detector systems will be built with tens of thousands of front-end ASICs exposed to high radiation doses and difficult environmental and interference conditions. A CERN's GBTx-based solution was chosen for combining data from multiple front-end ASICs into an optical link before further concentration and preprocessing in the common Data Processing Board data hub. This paper presents the protocol design addressing the DAQ system requirements, simplifying the ASIC's back-end design and presents its adaptation for the STS and MUCH detector's conditions. A specific link synchronization technique, hit data bandwidth optimization and time synchronization method for the self-triggered front-end chip are presented.

  17. A protocol for hit and control synchronous transfer for the front-end electronics at the CBM experiment

    International Nuclear Information System (INIS)

    Kasinski, K.; Szczygiel, R.; Zabolotny, W.; Lehnert, J.; Schmidt, C.J.; Müller, W.F.J.

    2016-01-01

    The Silicon Tracking System, Muon Chamber, Transition Radiation Detector and Time-Of-Flight among others are the detector systems of the Compressed Baryonic Matter (CBM) experiment at the FAIR facility. These detector systems will be built with tens of thousands of front-end ASICs exposed to high radiation doses and difficult environmental and interference conditions. A CERN's GBTx-based solution was chosen for combining data from multiple front-end ASICs into an optical link before further concentration and preprocessing in the common Data Processing Board data hub. This paper presents the protocol design addressing the DAQ system requirements, simplifying the ASIC's back-end design and presents its adaptation for the STS and MUCH detector's conditions. A specific link synchronization technique, hit data bandwidth optimization and time synchronization method for the self-triggered front-end chip are presented.

  18. A new front-end ASIC for GEM detectors with time and charge measurement capabilities

    Science.gov (United States)

    Ciciriello, F.; Corsi, F.; De Robertis, G.; Felici, G.; Loddo, F.; Marzocca, C.; Matarrese, G.; Ranieri, A.

    2016-07-01

    A 32 channel CMOS front-end ASIC has been designed to read out the GEM detectors intended to be used for beam monitoring in a new proton-therapy facility currently under construction. In order to improve the spatial resolution by exploiting charge centroid algorithms, the analog channels, based on the classic CSA+shaper architecture, are equipped with a peak detector (PD) which works as an analog memory during the read-out phase. The outputs of the PDs are multiplexed towards an integrated 8-bit subranging ADC. An accurate trigger signal marks the arrival of a valid event and is generated by fast-ORing the outputs of 32 voltage discriminators which compare the shaper outputs with a programmable threshold. The digital part of the ASIC manages the read-out of the channels, the A/D conversion and the configuration of the ASIC. A 100 Mbit/s LVDS serial link is used for data communication. The sensitivity of the analog channel is 15 mV/fC and the dynamic range is 80 fC. The simulated ENC is about 650 e- for a detector capacitance of 10 pF.

  19. A new front-end ASIC for GEM detectors with time and charge measurement capabilities

    Energy Technology Data Exchange (ETDEWEB)

    Ciciriello, F., E-mail: fabio.ciciriello@poliba.it [DEI-Politecnico di Bari, Via Orabona 4, I-70125 Bari (Italy); INFN, Sezione di Bari, Via Orabona 4, I-70125 Bari (Italy); Corsi, F. [DEI-Politecnico di Bari, Via Orabona 4, I-70125 Bari (Italy); INFN, Sezione di Bari, Via Orabona 4, I-70125 Bari (Italy); De Robertis, G. [INFN, Sezione di Bari, Via Orabona 4, I-70125 Bari (Italy); Felici, G. [INFN, Laboratori Nazionali di Frascati, Via E. Fermi 40, I-00044 Frascati (Italy); Loddo, F. [INFN, Sezione di Bari, Via Orabona 4, I-70125 Bari (Italy); Marzocca, C.; Matarrese, G. [DEI-Politecnico di Bari, Via Orabona 4, I-70125 Bari (Italy); INFN, Sezione di Bari, Via Orabona 4, I-70125 Bari (Italy); Ranieri, A. [INFN, Sezione di Bari, Via Orabona 4, I-70125 Bari (Italy)

    2016-07-11

    A 32 channel CMOS front-end ASIC has been designed to read out the GEM detectors intended to be used for beam monitoring in a new proton-therapy facility currently under construction. In order to improve the spatial resolution by exploiting charge centroid algorithms, the analog channels, based on the classic CSA+shaper architecture, are equipped with a peak detector (PD) which works as an analog memory during the read-out phase. The outputs of the PDs are multiplexed towards an integrated 8-bit subranging ADC. An accurate trigger signal marks the arrival of a valid event and is generated by fast-ORing the outputs of 32 voltage discriminators which compare the shaper outputs with a programmable threshold. The digital part of the ASIC manages the read-out of the channels, the A/D conversion and the configuration of the ASIC. A 100 Mbit/s LVDS serial link is used for data communication. The sensitivity of the analog channel is 15 mV/fC and the dynamic range is 80 fC. The simulated ENC is about 650 e{sup −} for a detector capacitance of 10 pF. © 2001 Elsevier Science. All rights reserved.

  20. Characterization of the CMS Pixel Detectors

    CERN Document Server

    Gu, Weihua

    2002-01-01

    In 2005 the Large Hadron Collider (LHC) will start the pp collisions at a high luminosity and at a center of mass energy of 14 TeV. The primary goal of the experimental programme is the search of the Higgs boson(s) and the supersymmetric particles. The programme is also proposed to detect a range of diverse signatures in order to provide guidance for future physics. The pixel detector system makes up the innermost part of the CMS experiment, which is one of the two general purpose detectors at the LHC. The main tasks of the system are vertex detection and flavor tagging. The high luminosity and the high particle multiplicity as well as the small bunch spacing at the LHC impose great challenges on the pixel detectors: radiation hardness of sensors and electronics, fast signal processing and a high granularity are the essential requirements. This thesis concentrates on the study of the suitability of two test stands, which are implemented to characterize the CMS pixel detectors: one is con-cerned with test puls...

  1. First large DEPFET pixel modules for the Belle II Pixel Detector

    Energy Technology Data Exchange (ETDEWEB)

    Mueller, Felix; Avella, Paola; Kiesling, Christian; Koffmane, Christian; Moser, Hans-Guenther; Valentan, Manfred [Max-Planck-Institut fuer Physik, Muenchen (Germany); Andricek, Ladislav; Richter, Rainer [Halbleiterlabor der Max-Planck-Gesellschaft, Muenchen (Germany); Collaboration: Belle II-Collaboration

    2016-07-01

    DEPFET pixel detectors offer excellent signal to noise ratio, resolution and low power consumption with a low material budget. They will be used at Belle II and are a candidate for an ILC vertex detector. The pixels are integrated in a monolithic piece of silicon which also acts as PCB providing the signal and control routings for the ASICs on top. The first prototype DEPFET sensor modules for Belle II have been produced. The modules have 192000 pixels and are equipped with SMD components and three different kinds of ASICs to control and readout the pixels. The entire readout chain has to be studied; the metal layer interconnectivity and routings need to be verified. The modules are fully characterized, and the operation voltages and control sequences of the ASICs are investigated. An overview of the DEPFET concept and first characterization results is presented.

  2. ATLAS Pixel Detector Design For HL-LHC

    CERN Document Server

    Smart, Ben; The ATLAS collaboration

    2016-01-01

    The ATLAS Inner Detector will be replaced for the High-Luminosity LHC (HL-LHC) running in 2026. The new Inner Detector will be called the Inner Tracker (ITk). The ITk will cover an extended eta-range: at least to |eta|<3.2, and likely up to |eta|<4.0. The ITk will be an all-Silicon based detector, consisting of a Silicon strip detector outside of a radius of 362mm, and a Silicon pixel detector inside of this radius. Several novel designs are being considered for the ITk pixel detector, to cope with high-eta charged particle tracks. These designs are grouped into 'extended' and 'inclined' design-types. Extended designs have long pixel staves with sensors parallel to the beamline. High-eta particles will therefore hit these sensors at shallow angles, leaving elongated charge clusters. The length of such a charge cluster can be used to estimate the angle of the passing particle. This information can then be used in track reconstruction to improve tracking efficiency and reduce fake rates. Inclined designs ...

  3. CVD diamond pixel detectors for LHC experiments

    Energy Technology Data Exchange (ETDEWEB)

    Wedenig, R.; Adam, W.; Bauer, C.; Berdermann, E.; Bergonzo, P.; Bogani, F.; Borchi, E.; Brambilla, A.; Bruzzi, M.; Colledani, C.; Conway, J.; Dabrowski, W.; Delpierre, P.; Deneuville, A.; Dulinski, W.; Eijk, B. van; Fallou, A.; Fizzotti, F.; Foulon, F.; Friedl, M.; Gan, K.K.; Gheeraert, E.; Grigoriev, E.; Hallewell, G.; Hall-Wilton, R.; Han, S.; Hartjes, F.; Hrubec, J.; Husson, D.; Kagan, H.; Kania, D.; Kaplon, J.; Karl, C.; Kass, R.; Knoepfle, K.T.; Krammer, M.; Logiudice, A.; Lu, R.; Manfredi, P.F.; Manfredotti, C.; Marshall, R.D.; Meier, D.; Mishina, M.; Oh, A.; Pan, L.S.; Palmieri, V.G.; Pernicka, M.; Peitz, A.; Pirollo, S.; Polesello, P.; Pretzl, K.; Procario, M.; Re, V.; Riester, J.L.; Roe, S.; Roff, D.; Rudge, A.; Runolfsson, O.; Russ, J.; Schnetzer, S.; Sciortino, S.; Speziali, V.; Stelzer, H.; Stone, R.; Suter, B.; Tapper, R.J.; Tesarek, R.; Trawick, M.; Trischuk, W.; Vittone, E.; Wagner, A.; Walsh, A.M.; Weilhammer, P.; White, C.; Zeuner, W.; Ziock, H.; Zoeller, M.; Blanquart, L.; Breugnion, P.; Charles, E.; Ciocio, A.; Clemens, J.C.; Dao, K.; Einsweiler, K.; Fasching, D.; Fischer, P.; Joshi, A.; Keil, M.; Klasen, V.; Kleinfelder, S.; Laugier, D.; Meuser, S.; Milgrome, O.; Mouthuy, T.; Richardson, J.; Sinervo, P.; Treis, J.; Wermes, N

    1999-08-01

    This paper reviews the development of CVD diamond pixel detectors. The preparation of the diamond pixel sensors for bump-bonding to the pixel readout electronics for the LHC and the results from beam tests carried out at CERN are described.

  4. CVD diamond pixel detectors for LHC experiments

    International Nuclear Information System (INIS)

    Wedenig, R.; Adam, W.; Bauer, C.; Berdermann, E.; Bergonzo, P.; Bogani, F.; Borchi, E.; Brambilla, A.; Bruzzi, M.; Colledani, C.; Conway, J.; Dabrowski, W.; Delpierre, P.; Deneuville, A.; Dulinski, W.; Eijk, B. van; Fallou, A.; Fizzotti, F.; Foulon, F.; Friedl, M.; Gan, K.K.; Gheeraert, E.; Grigoriev, E.; Hallewell, G.; Hall-Wilton, R.; Han, S.; Hartjes, F.; Hrubec, J.; Husson, D.; Kagan, H.; Kania, D.; Kaplon, J.; Karl, C.; Kass, R.; Knoepfle, K.T.; Krammer, M.; Logiudice, A.; Lu, R.; Manfredi, P.F.; Manfredotti, C.; Marshall, R.D.; Meier, D.; Mishina, M.; Oh, A.; Pan, L.S.; Palmieri, V.G.; Pernicka, M.; Peitz, A.; Pirollo, S.; Polesello, P.; Pretzl, K.; Procario, M.; Re, V.; Riester, J.L.; Roe, S.; Roff, D.; Rudge, A.; Runolfsson, O.; Russ, J.; Schnetzer, S.; Sciortino, S.; Speziali, V.; Stelzer, H.; Stone, R.; Suter, B.; Tapper, R.J.; Tesarek, R.; Trawick, M.; Trischuk, W.; Vittone, E.; Wagner, A.; Walsh, A.M.; Weilhammer, P.; White, C.; Zeuner, W.; Ziock, H.; Zoeller, M.; Blanquart, L.; Breugnion, P.; Charles, E.; Ciocio, A.; Clemens, J.C.; Dao, K.; Einsweiler, K.; Fasching, D.; Fischer, P.; Joshi, A.; Keil, M.; Klasen, V.; Kleinfelder, S.; Laugier, D.; Meuser, S.; Milgrome, O.; Mouthuy, T.; Richardson, J.; Sinervo, P.; Treis, J.; Wermes, N.

    1999-01-01

    This paper reviews the development of CVD diamond pixel detectors. The preparation of the diamond pixel sensors for bump-bonding to the pixel readout electronics for the LHC and the results from beam tests carried out at CERN are described

  5. Detection of secondary electrons with pixelated hybrid semiconductor detectors

    International Nuclear Information System (INIS)

    Gebert, Ulrike Sonja

    2011-01-01

    Within the scope of this thesis, secondary electrons were detected with a pixelated semiconductor detector named Timepix. The Timepix detector consists of electronics and a sensor made from a semiconductor material. The connection of sensor and electronics is done for each pixel individually using bump bonds. Electrons with energies above 3 keV can be detected with the sensor. One electron produces a certain amount of electron-hole pairs according to its energy. The charge then drifts along an electric field to the pixel electronics, where it induces an electric signal. Even without a sensor it is possible to detect an electric signal from approximately 1000 electrons directly in the pixel electronics. Two different detector systems to detect secondary electrons using the Timepix detector were investigated during this thesis. First of all, a hybrid photon detector (HPD) was used to detect single photoelectrons. The HPD consists of a vacuum vessel with an entrance window and a cesium iodine photocathode at the inner surface of the window. Photoelectrons are released from the photocathode by incident light and are accelerated in an electric field towards the Timepix detector, where the point of interaction and the arrival time of the electron is determined. With a proximity focusing setup, a time resolution of 12 ns (with an acceleration voltage of 20 kV between photocathode and Timepix detector) was obtained. The HPD examined in this thesis showed a strong dependence of the dark rate form the acceleration voltage and the pressure in the vacuum vessel. At a pressure of few 10 -5 mbar and an acceleration voltage of 20 kV, the dark rate was about 800 Hz per mm 2 area of the read out photocathode. One possibility to reduce the dark rate is to identify ion feedback events. With a slightly modified setup it was possible to reduce the dark rate to 0.5 Hz/mm 2 . To achieve this, a new photocathode was mounted in a shorter distance to the detector. The measurements where

  6. The pin pixel detector--X-ray imaging

    CERN Document Server

    Bateman, J E; Derbyshire, G E; Duxbury, D M; Marsh, A S; Simmons, J E; Stephenson, R

    2002-01-01

    The development and testing of a soft X-ray gas pixel detector, which uses connector pins for the anodes is reported. Based on a commercial 100 pin connector block, a prototype detector of aperture 25.4 mm centre dot 25.4 mm can be economically fabricated. The individual pin anodes all show the expected characteristics of small gas detectors capable of counting rates reaching 1 MHz per pin. A 2-dimensional resistive divide readout system has been developed to permit the imaging properties of the detector to be explored in advance of true pixel readout electronics.

  7. CVD diamond pixel detectors for LHC experiments

    CERN Document Server

    Wedenig, R; Bauer, C; Berdermann, E; Bergonzo, P; Bogani, F; Borchi, E; Brambilla, A; Bruzzi, Mara; Colledani, C; Conway, J; Dabrowski, W; Delpierre, P A; Deneuville, A; Dulinski, W; van Eijk, B; Fallou, A; Fizzotti, F; Foulon, F; Friedl, M; Gan, K K; Gheeraert, E; Grigoriev, E; Hallewell, G D; Hall-Wilton, R; Han, S; Hartjes, F G; Hrubec, Josef; Husson, D; Kagan, H; Kania, D R; Kaplon, J; Karl, C; Kass, R; Knöpfle, K T; Krammer, Manfred; Lo Giudice, A; Lü, R; Manfredi, P F; Manfredotti, C; Marshall, R D; Meier, D; Mishina, M; Oh, A; Pan, L S; Palmieri, V G; Pernicka, Manfred; Peitz, A; Pirollo, S; Polesello, P; Pretzl, Klaus P; Procario, M; Re, V; Riester, J L; Roe, S; Roff, D G; Rudge, A; Runólfsson, O; Russ, J; Schnetzer, S R; Sciortino, S; Speziali, V; Stelzer, H; Stone, R; Suter, B; Tapper, R J; Tesarek, R J; Trawick, M L; Trischuk, W; Vittone, E; Wagner, A; Walsh, A M; Weilhammer, Peter; White, C; Zeuner, W; Ziock, H J; Zöller, M

    1999-01-01

    This paper reviews the development of CVD diamond pixel detectors. The preparation of the diamond pixel sensors for bump-bonding to the pixel readout electronics for the LHC and the results from beam tests carried out at CERN are described. (9 refs).

  8. Design of a new front-end electronics test-bench for the upgraded ATLAS detector's Tile Calorimeter

    International Nuclear Information System (INIS)

    Kureba, C O; Govender, M; Hofsajer, I; Ruan, X; Sandrock, C; Spoor, M

    2015-01-01

    The year 2022 has been scheduled to see an upgrade of the Large Hadron Collider (LHC), in order to increase its instantaneous luminosity. The High Luminosity LHC, also referred to as the upgrade Phase-II, means an inevitable complete re-design of the read-out electronics in the Tile Calorimeter (TileCal) of the A Toroidal LHC Apparatus (ATLAS) detector. Here, the new read-out architecture is expected to have the front-end electronics transmit fully digitized information of the detector to the back-end electronics system. Fully digitized signals will allow more sophisticated reconstruction algorithms which will contribute to the required improved triggers at high pile-up. In Phase II, the current Mobile Drawer Integrity ChecKing (MobiDICK) test-bench will be replaced by the next generation test-bench for the TileCal superdrawers, the new Prometeo (A Portable ReadOut ModulE for Tilecal ElectrOnics). Prometeo is a portable, high-throughput electronic system for full certification of the front-end electronics of the ATLAS TileCal. It is designed to interface to the fast links and perform a series of tests on the data to assess the certification of the electronics. The Prometeo's prototype is being assembled by the University of the Witwatersrand and installed at CERN for further developing, tuning and tests. This article describes the overall design of the new Prometeo, and how it fits into the TileCal electronics upgrade. (paper)

  9. A Novel Front-End ASIC With Post Digital Filtering and Calibration for CZT-Based PET Detector

    International Nuclear Information System (INIS)

    Gao, W.; Yin, J.; Li, C.; Zeng, H.; Gao, D.; Hu, Y.

    2015-01-01

    This paper presents a novel front-end electronics based on a front-end ASIC with post digital filtering and calibration dedicated to CZT detectors for PET imaging. A cascade amplifier based on split-leg topology is selected to realize the charge-sensitive amplifier (CSA) for the sake of low noise performances and the simple scheme of the power supplies. The output of the CSA is connected to a variable-gain amplifier to generate the compatible signals for the A/D conversion. A multi-channel single-slope ADC is designed to sample multiple points for the digital filtering and shaping. The digital signal processing algorithms are implemented by a FPGA. To verify the proposed scheme, a front-end readout prototype ASIC is designed and implemented in 0.35 μm CMOS process. In a single readout channel, a CSA, a VGA, a 10-bit ADC and registers are integrated. Two dummy channels, bias circuits, and time controller are also integrated. The die size is 2.0 mm x 2.1 mm. The input range of the ASIC is from 2000 e - to 100000 e - , which is suitable for the detection of the X-and gamma ray from 11.2 keV to 550 keV. The linearity of the output voltage is less than 1 %. The gain of the readout channel is 40.2 V/pC. The static power dissipation is about 10 mW/channel. The above tested results show that the electrical performances of the ASIC can well satisfy PET imaging applications. (authors)

  10. A Novel Front-End ASIC With Post Digital Filtering and Calibration for CZT-Based PET Detector

    Energy Technology Data Exchange (ETDEWEB)

    Gao, W.; Yin, J.; Li, C.; Zeng, H.; Gao, D. [Institute of Microelectronics, School of Computer Science and Techonology, Northwestern Polytechnical University, Xi' an (China); Hu, Y. [Institut Pluridiscipline Hubert Curien, CNRS/UDS/IN2P3, Strasbourg (France)

    2015-07-01

    This paper presents a novel front-end electronics based on a front-end ASIC with post digital filtering and calibration dedicated to CZT detectors for PET imaging. A cascade amplifier based on split-leg topology is selected to realize the charge-sensitive amplifier (CSA) for the sake of low noise performances and the simple scheme of the power supplies. The output of the CSA is connected to a variable-gain amplifier to generate the compatible signals for the A/D conversion. A multi-channel single-slope ADC is designed to sample multiple points for the digital filtering and shaping. The digital signal processing algorithms are implemented by a FPGA. To verify the proposed scheme, a front-end readout prototype ASIC is designed and implemented in 0.35 μm CMOS process. In a single readout channel, a CSA, a VGA, a 10-bit ADC and registers are integrated. Two dummy channels, bias circuits, and time controller are also integrated. The die size is 2.0 mm x 2.1 mm. The input range of the ASIC is from 2000 e{sup -} to 100000 e{sup -}, which is suitable for the detection of the X-and gamma ray from 11.2 keV to 550 keV. The linearity of the output voltage is less than 1 %. The gain of the readout channel is 40.2 V/pC. The static power dissipation is about 10 mW/channel. The above tested results show that the electrical performances of the ASIC can well satisfy PET imaging applications. (authors)

  11. Small-Scale Readout System Prototype for the STAR PIXEL Detector

    International Nuclear Information System (INIS)

    Szelezniak, Michal; Anderssen, Eric; Greiner, Leo; Matis, Howard; Ritter, Hans Georg; Stezelberger, Thorsten; Sun, Xiangming; Thomas, James; Vu, Chinh; Wieman, Howard

    2008-01-01

    Development and prototyping efforts directed towards construction of a new vertex detector for the STAR experiment at the RHIC accelerator at BNL are presented. This new detector will extend the physics range of STAR by allowing for precision measurements of yields and spectra of particles containing heavy quarks. The innermost central part of the new detector is a high resolution pixel-type detector (PIXEL). PIXEL requirements are discussed as well as a conceptual mechanical design, a sensor development path, and a detector readout architecture. Selected progress with sensor prototypes dedicated to the PIXEL detector is summarized and the approach chosen for the readout system architecture validated in tests of hardware prototypes is discussed

  12. Operational Experience with the ATLAS Pixel Detector at the LHC

    CERN Document Server

    Keil, M; The ATLAS collaboration

    2012-01-01

    The ATLAS Pixel Detector is the innermost detector of the ATLAS experiment at the Large Hadron Collider at CERN, providing high-resolution measurements of charged particle tracks in the high radiation environment close to the collision region. This capability is vital for the identification and measurement of proper decay times of long-lived particles such as b-hadrons, and thus vital for the ATLAS physics program. The detector provides hermetic coverage with three cylindrical layers and three layers of forward and backward pixel detectors. It consists of approximately 80 million pixels that are individually read out via chips bump-bonded to 1744 n-in-n silicon substrates. In this talk, results from the successful operation of the Pixel Detector at the LHC and its status after three years of operation will be presented, including calibration procedures, timing optimization and detector performance. The detector performance is excellent: ~96 % of the pixels are operational, noise occupancy and hit efficiency e...

  13. Operational Experience with the ATLAS Pixel Detector at the LHC

    CERN Document Server

    Keil, M; The ATLAS collaboration

    2011-01-01

    The ATLAS Pixel Detector is the innermost detector of the ATLAS experiment at the Large Hadron Collider at CERN, providing high-resolution measurements of charged particle tracks in the high radiation environment close to the collision region. This capability is vital for the identification and measurement of proper decay times of long-lived particles such as b-hadrons, and thus vital for the ATLAS physics program. The detector provides hermetic coverage with three cylindrical layers and three layers of forward and backward pixel detectors. It consists of approximately 80 million pixels that are individually read out via chips bump-bonded to 1744 n-in-n silicon substrates. In this talk, results from the successful operation of the Pixel Detector at the LHC will be presented, including monitoring, calibration procedures, timing optimization and detector performance. The detector performance is excellent: 97,5% of the pixels are operational, noise occupancy and hit efficiency exceed the design specification, an...

  14. Operational experience with the ATLAS Pixel Detector at the LHC

    CERN Document Server

    Hirschbuehl, D; The ATLAS collaboration

    2011-01-01

    The ATLAS Pixel Detector is the innermost detector of the ATLAS experiment at the Large Hadron Collider at CERN, providing high-resolution measurements of charged particle tracks in the high radiation environment close to the collision region. This capability is vital for the identification and measurement of proper decay times of long-lived particles such as b-hadrons, and thus vital for the ATLAS physics program. The detector provides hermetic coverage with three cylindrical layers and three layers of forward and backward pixel detectors. It consists of approximately 80 million pixels that are individually read out via chips bump-bonded to 1744 n-in-n silicon substrates. In this paper results from the successful operation of the Pixel Detector at the LHC will be presented, including monitoring, calibration procedures, timing optimization and detector performance. The detector performance is excellent: 96.7% of the pixels are operational, noise occupancy and hit efficiency exceed the design specification, an...

  15. Operational experience with the ATLAS Pixel Detector at the LHC

    CERN Document Server

    Lapoire, C; The ATLAS collaboration

    2011-01-01

    The ATLAS Pixel Detector is the innermost detector of the ATLAS experiment at the Large Hadron Collider at CERN, providing high-resolution measurements of charged particle tracks in the high radiation environment close to the collision region. This capability is vital for the identification and measurement of proper decay times of long-lived particles such as b-hadrons, and thus vital for the ATLAS physics program. The detector provides hermetic coverage with three cylindrical layers and three layers of forward and backward pixel detectors. It consists of approximately 80 million pixels that are individually read out via chips bump-bonded to 1744 n-in-n silicon substrates. In this talk, results from the successful operation of the Pixel Detector at the LHC will be presented, including monitoring, calibration procedures, timing optimization and detector performance. The detector performance is excellent: 97,5% of the pixels are operational, noise occupancy and hit efficiency exceed the design specification, an...

  16. Operational Experience with the ATLAS Pixel Detector at the LHC

    CERN Document Server

    Lapoire, C; The ATLAS collaboration

    2012-01-01

    The ATLAS Pixel Detector is the innermost detector of the ATLAS experiment at the Large Hadron Collider at CERN, providing high-resolution measurements of charged particle tracks in the high radiation environment close to the collision region. This capability is vital for the identification and measurement of proper decay times of long-lived particles such as B-hadrons, and thus vital for the ATLAS physics program. The detector provides hermetic coverage with three cylindrical layers and three layers of forward and backward pixel detectors. It consists of approximately 80 million pixels that are individually read out via chips bump-bonded to 1744 n-in-n silicon substrates. In this paper, results from the successful operation of the Pixel Detector at the LHC will be presented, including monitoring, calibration procedures and detector performance. The detector performance is excellent: 96.2% of the pixels are operational, noise occupancy and hit efficiency exceed the design specification.

  17. Operational Experience with the ATLAS Pixel Detector at the LHC

    CERN Document Server

    Keil, M

    2012-01-01

    The ATLAS Pixel Detector is the innermost detector of the ATLAS experiment at the Large Hadron Collider at CERN, providing high-resolution measurements of charged particle tracks in the high radiation environment close to the collision region. This capability is vital for the identification and measurement of proper decay times of long-lived particles such as b-hadrons, and thus vital for the ATLAS physics program. The detector provides hermetic coverage with three cylindrical layers and three layers of forward and backward pixel detectors. It consists of approximately 80 million pixels that are individually read out via chips bump-bonded to 1744 n-in-n silicon substrates. In this paper results from the successful operation of the Pixel Detector at the LHC will be presented, including calibration procedures, timing optimization and detector performance. The detector performance is excellent: approximately 97% of the pixels are operational, noise occupancy and hit efficiency exceed the design specification, an...

  18. Operational experience with the ATLAS Pixel Detector at the LHC

    CERN Document Server

    Ince, T; The ATLAS collaboration

    2011-01-01

    The ATLAS Pixel Detector is the innermost detector of the ATLAS experiment at the Large Hadron Collider at CERN, providing high-resolution measurements of charged particle tracks in the high radiation environment close to the collision region. This capability is vital for the identification and measurement of proper decay times of long-lived particles such as b-hadrons, and thus vital for the ATLAS physics program. The detector provides hermetic coverage with three cylindrical layers and three layers of forward and backward pixel detectors. It consists of approximately 80 million pixels that are individually read out via chips bump-bonded to 1744 n-in-n silicon substrates. In this talk, results from the successful operation of the Pixel Detector at the LHC will be presented, including monitoring, calibration procedures, timing optimization and detector performance. The detector performance is excellent: 96.8% of the pixels are operational, noise occupancy and hit efficiency exceed the design specification, an...

  19. Operational experience with the ATLAS Pixel detector at the LHC

    CERN Document Server

    Deluca, C; The ATLAS collaboration

    2011-01-01

    The ATLAS Pixel Detector is the innermost detector of the ATLAS experiment at the Large Hadron Collider at CERN, providing high-resolution measurements of charged particle tracks in the high radiation environment close to the collision region. This capability is vital for the identification and measurement of proper decay times of long-lived particles such as b-hadrons, and thus vital for the ATLAS physics program. The detector provides hermetic coverage with three cylindrical layers and three layers of forward and backward pixel detectors. It consists of approximately 80 million pixels that are individually read out via chips bump-bonded to 1744 n-in-n silicon substrates. In this paper, results from the successful operation of the Pixel Detector at the LHC will be presented, including monitoring, calibration procedures, timing optimization and detector performance. The detector performance is excellent: 97,5\\% of the pixels are operational, noise occupancy and hit efficiency exceed the design specification, ...

  20. Operational Experience with the ATLAS Pixel Detector at the LHC

    CERN Document Server

    Lange, C; The ATLAS collaboration

    2011-01-01

    The ATLAS Pixel Detector is the innermost detector of the ATLAS experiment at the Large Hadron Collider at CERN, providing high-resolution measurements of charged particle tracks in the high radiation environment close to the collision region. This capability is vital for the identification and measurement of proper decay times of long-lived particles such as b-hadrons, and thus vital for the ATLAS physics program. The detector provides hermetic coverage with three cylindrical layers and three layers of forward and backward pixel detectors. It consists of approximately 80 million pixels that are individually read out via chips bump- bonded to 1744 n-in-n silicon substrates. In this talk, results from the successful operation of the Pixel Detector at the LHC will be presented, including monitoring, calibration procedures, timing optimization and detector performance. The detector performance is excellent: 97,5% of the pixels are operational, noise occupancy and hit efficiency exceed the design specification, a...

  1. Operational experience with the ATLAS Pixel detector at the LHC

    CERN Document Server

    Deluca, C; The ATLAS collaboration

    2011-01-01

    The ATLAS Pixel Detector is the innermost detector of the ATLAS experiment at the Large Hadron Collider at CERN, providing high-resolution measurements of charged particle tracks in the high radiation environment close to the collision region. This capability is vital for the identification and measurement of proper decay times of long-lived particles such as b-hadrons, and thus vital for the ATLAS physics program. The detector provides hermetic coverage with three cylindrical layers and three layers of forward and backward pixel detectors. It consists of approximately 80 million pixels that are individually read out via chips bump-bonded to 1744 n-in-n silicon substrates. In this talk, results from the successful operation of the Pixel Detector at the LHC will be presented, including monitoring, calibration procedures, timing optimization and detector performance. The detector performance is excellent: 97,5% of the pixels are operational, noise occupancy and hit efficiency exceed the design specification, an...

  2. Charge sharing in silicon pixel detectors

    CERN Document Server

    Mathieson, K; Seller, P; Prydderch, M L; O'Shea, V; Bates, R L; Smith, K M; Rahman, M

    2002-01-01

    We used a pixellated hybrid silicon X-ray detector to study the effect of the sharing of generated charge between neighbouring pixels over a range of incident X-ray energies, 13-36 keV. The system is a room temperature, energy resolving detector with a Gaussian FWHM of 265 eV at 5.9 keV. Each pixel is 300 mu m square, 300 mu m deep and is bump bonded to matching read out electronics. The modelling packages MEDICI and MCNP were used to model the complete X-ray interaction and the subsequent charge transport. Using this software a model is developed which reproduces well the experimental results. The simulations are then altered to explore smaller pixel sizes and different X-ray energies. Charge sharing was observed experimentally to be 2% at 13 keV rising to 4.5% at 36 keV, for an energy threshold of 4 keV. The models predict that up to 50% of charge may be lost to the neighbouring pixels, for an X-ray energy of 36 keV, when the pixel size is reduced to 55 mu m.

  3. Silicon sensors for the upgrades of the CMS pixel detector

    International Nuclear Information System (INIS)

    Centis Vignali, Matteo

    2015-12-01

    The Compact Muon Solenoid (CMS) is a general purpose detector at the Large Hadron Collider (LHC). The LHC luminosity is constantly increased through upgrades of the accelerator and its injection chain. Two major upgrades will take place in the next years. The first upgrade involves the LHC injector chain and allows the collider to achieve a luminosity of about 2.10 34 cm -2 s -1 . A further upgrade of the LHC foreseen for 2025 will boost its luminosity to 5.10 34 cm -2 s -1 . As a consequence of the increased luminosity, the detectors need to be upgraded. In particular, the CMS pixel detector will undergo two upgrades in the next years. The first upgrade (phase I) consists in the substitution of the current pixel detector in winter 2016/2017. The upgraded pixel detector will implement new readout electronics that allow efficient data taking up to a luminosity of 2.10 34 cm -2 s -1 , twice as much as the LHC design luminosity. The modules that will constitute the upgraded detector are being produced at different institutes. Hamburg (University and DESY) is responsible for the production of 350 pixel modules. The second upgrade (phase II) of the pixel detector is foreseen for 2025. The innermost pixel layer of the upgraded detector will accumulate a radiation damage corresponding to an equivalent fluence of Φ eq =2.10 16 cm -2 and a dose of ∼10 MGy after an integrated luminosity of 3000 fb -1 . Several groups are investigating sensor designs and configurations able to withstand such high doses and fluences. This work is divided into two parts related to important aspects of the upgrades of the CMS pixel detector. For the phase I upgrade, a setup has been developed to provide an absolute energy calibration of the pixel modules that will constitute the detector. The calibration is obtained using monochromatic X-rays. The same setup is used to test the buffering capabilities of the modules' readout chip. The maximum rate experienced by the modules produced in

  4. The front-end analog and digital signal processing electronics for the drift chambers of the Stanford Large Detector

    International Nuclear Information System (INIS)

    Haller, G.M.; Freytag, D.R.; Fox, J.; Olsen, J.; Paffrath, L.; Yim, A.; Honma, A.

    1990-10-01

    The front-end signal processing electronics for the drift-chambers of the Stanford Large Detector (SLD) at the Stanford Linear Collider is described. The system is implemented with printed-circuit boards which are shaped for direct mounting on the detector. Typically, a motherboard comprises 64 channels of transimpedance amplification and analog waveform sampling, A/D conversion, and associated control and readout circuitry. The loaded motherboard thus forms a processor which records low-level wave forms from 64 detector channels and transforms the information into a 64 k-byte serial data stream. In addition, the package performs calibration functions, measures leakage currents on the wires, and generates wire hit patterns for triggering purposes. The construction and operation of the electronic circuits utilizing monolithic, hybridized, and programmable components are discussed

  5. Precision tracking with a single gaseous pixel detector

    NARCIS (Netherlands)

    Tsigaridas, S.; van Bakel, N.; Bilevych, Y.; Gromov, V.; Hartjes, F.; Hessey, N.P.; de Jong, P.; Kluit, R.

    2015-01-01

    The importance of micro-pattern gaseous detectors has grown over the past few years after successful usage in a large number of applications in physics experiments and medicine. We develop gaseous pixel detectors using micromegas-based amplification structures on top of CMOS pixel readout chips.

  6. New pixelized Micromegas detector for the COMPASS experiment

    International Nuclear Information System (INIS)

    Neyret, D; Anfreville, M; Bedfer, Y; Burtin, E; D'Hose, N; Giganon, A; Kunne, F; Magnon, A; Marchand, C; Paul, B; Platchkov, S; Vandenbroucke, M; Ketzer, B; Konorov, I

    2009-01-01

    New Micromegas (Micro-mesh gaseous detectors) are being developed in view of the future physics projects planned by the COMPASS collaboration at CERN. Several major upgrades compared to present detectors are being studied: detectors standing five times higher luminosity with hadron beams, detection of beam particles (flux up to a few hundred of kHz/mm 2 , 10 times larger than for the present detectors) with pixelized read-out in the central part, light and integrated electronics, and improved robustness. Studies were done with the present detectors moved in the beam, and two first pixelized prototypes are being tested with muon and hadron beams in real conditions at COMPASS. We present here this new project and report on two series of tests, with old detectors moved into the beam and with pixelized prototypes operated in real data taking condition with both muon and hadron beams.

  7. NINO an ultrafast low-power front-end amplifier discriminator for the time-of-flight detector in the ALICE experiment

    CERN Document Server

    Anghinolfi, F; Krummenacher, F; Usenko, E; Williams, M C S

    2004-01-01

    An ultrafast front-end preamplifier-discriminator chip called NINO has been developed for use in the ALICE time-of-flight detector. The chip has eight channels. Each channel is designed with an amplifier with less than 1-ns peaking time, a discriminator with a minimum detection threshold of 10 fC and an output stage. The output pulse has minimum time jitter (less than 25 ps) on the front edge, and the pulsewidth is dependent of the input signal charge. Each channel consumes 27 mW, and the eight channels fit in a 2*4 mm/sup 2/ ASIC processed in IBM 0.25- mu m CMOS technology. (3 refs).

  8. NINO, an ultra-fast, low-power, front-end amplifier discriminator for the Time-Of-Flight detector in ALICE experiment

    CERN Document Server

    Anghinolfi, F; Krummenacher, F; Usenko, E; Williams, M C S

    2004-01-01

    An ultra fast front-end preamplifier-discriminator chip NINO has been developed for use in the ALICE Time-Of-Flight detector. The chip has 8 channels. Each channel is designed with an amplifier with less than 1 ns peaking time, a discriminator with a minimum detection threshold of 10fC and an output stage. The output pulse has minimum time jitter (less than 25ps) on the front edge, and the pulse width is dependent of the input signal charge. Each channel consumes 27mW, and the 8 channels fit in a 2*4mm/sup 2/ ASIC processed in IBM 0.2 mu m CMOS technology. (3 refs).

  9. The FE-I4 Pixel Readout Chip and the IBL Module

    Energy Technology Data Exchange (ETDEWEB)

    Barbero, Marlon; Arutinov, David; Backhaus, Malte; Fang, Xiao-Chao; Gonella, Laura; Hemperek, Tomasz; Karagounis, Michael; Hans, Kruger; Kruth, Andre; Wermes, Norbert; /Bonn U.; Breugnon, Patrick; Fougeron, Denis; Gensolen, Fabrice; Menouni, Mohsine; Rozanov, Alexander; /Marseille, CPPM; Beccherle, Roberto; Darbo, Giovanni; /INFN, Genoa; Caminada, Lea; Dube, Sourabh; Fleury, Julien; Gnani, Dario; /LBL, Berkeley /NIKHEF, Amsterdam /Gottingen U. /SLAC

    2012-05-01

    FE-I4 is the new ATLAS pixel readout chip for the upgraded ATLAS pixel detector. Designed in a CMOS 130 nm feature size process, the IC is able to withstand higher radiation levels compared to the present generation of ATLAS pixel Front-End FE-I3, and can also cope with higher hit rate. It is thus suitable for intermediate radii pixel detector layers in the High Luminosity LHC environment, but also for the inserted layer at 3.3 cm known as the 'Insertable B-Layer' project (IBL), at a shorter timescale. In this paper, an introduction to the FE-I4 will be given, focusing on test results from the first full size FE-I4A prototype which has been available since fall 2010. The IBL project will be introduced, with particular emphasis on the FE-I4-based module concept.

  10. Operational Experience with the CMS Pixel Detector

    CERN Document Server

    INSPIRE-00205212

    2015-05-15

    In the first LHC running period the CMS-pixel detector had to face various operational challenges and had to adapt to the rapidly changing beam conditions. In order to maximize the physics potential and the quality of the data, online and offline calibrations were performed on a regular basis. The detector performed excellently with an average hit efficiency above 99\\% for all layers and disks. In this contribution the operational challenges of the silicon pixel detector in the first LHC run and the current long shutdown are summarized and the expectations for 2015 are discussed.

  11. A 32-channel front-end ASIC for GEM detectors used in beam monitoring applications

    Science.gov (United States)

    Ciciriello, F.; Altieri, P. R.; Corsi, F.; De Robertis, G.; Felici, G.; Loddo, F.; Lorusso, L.; Marzocca, C.; Matarrese, G.; Ranieri, A.; Stamerra, A.

    2017-11-01

    A multichannel, mixed-signal, front-end ASIC for GEM detectors, intended for beam monitoring in hadron therapy applications, has been designed and prototyped in a standard 0.35 μm CMOS technology. The analog channels are based on the classic CSA + shaper processing chain, followed by a peak detector which can work as an analog memory, to simplifiy the analog-to-digital conversion of the peak voltage of the output pulse, proportional to the energy of the detected event. The available hardware resources include an 8-bit A/D converter and a standard-cell digital part, which manages the read-out procedure, in sparse or serial mode. The ASIC is self-triggered and transfers energy and address data to the external DAQ via a fast 100 MHz LVDS link. Preliminary characterization results show that the non-linearity error is limited to 5% for a maximum input charge of about 70 fC, the measured ENC is about 1400e- and the time jitter of the trigger signal generated in response to an injected charge of 60 fC is close to 200 ps.

  12. Development and characterization of diamond and 3D-silicon pixel detectors with ATLAS-pixel readout electronics

    International Nuclear Information System (INIS)

    Mathes, Markus

    2008-12-01

    Hybrid pixel detectors are used for particle tracking in the innermost layers of current high energy experiments like ATLAS. After the proposed luminosity upgrade of the LHC, they will have to survive very high radiation fluences of up to 10 16 particles per cm 2 per life time. New sensor concepts and materials are required, which promise to be more radiation tolerant than the currently used planar silicon sensors. Most prominent candidates are so-called 3D-silicon and single crystal or poly-crystalline diamond sensors. Using the ATLAS pixel electronics different detector prototypes with a pixel geometry of 400 x 50 μm 2 have been built. In particular three devices have been studied in detail: a 3D-silicon and a single crystal diamond detector with an active area of about 1 cm 2 and a poly-crystalline diamond detector of the same size as a current ATLAS pixel detector module (2 x 6 cm 2 ). To characterize the devices regarding their particle detection efficiency and spatial resolution, the charge collection inside a pixel cell as well as the charge sharing between adjacent pixels was studied using a high energy particle beam. (orig.)

  13. Monitoring radiation damage in the ATLAS pixel detector

    CERN Document Server

    Schorlemmer, André Lukas; Quadt, Arnulf; Große-Knetter, Jörn; Rembser, Christoph; Di Girolamo, Beniamino

    2014-11-05

    Radiation hardness is one of the most important features of the ATLAS pixel detector in order to ensure a good performance and a long lifetime. Monitoring of radiation damage is crucial in order to assess and predict the expected performance of the detector. Key values for the assessment of radiation damage in silicon, such as the depletion voltage and depletion depth in the sensors, are measured on a regular basis during operations. This thesis summarises the monitoring program that is conducted in order to assess the impact of radiation damage and compares it to model predictions. In addition, the physics performance of the ATLAS detector highly depends on the amount of disabled modules in the ATLAS pixel detector. A worrying amount of module failures was observed during run I. Thus it was decided to recover repairable modules during the long shutdown (LS1) by extracting the pixel detector. The impact of the module repairs and module failures on the detector performance is analysed in this thesis.

  14. Design and construction of the front-end electronics data acquisition for the SLD CRID [Cherenkov Ring Imaging Detector

    International Nuclear Information System (INIS)

    Hoeflich, J.; McShurley, D.; Marshall, D.; Oxoby, G.; Shapiro, S.; Stiles, P.; Spencer, E.

    1990-10-01

    We describe the front-end electronics for the Cherenkov Ring Imaging Detector (CRID) of the SLD at the Stanford Linear Accelerator Center. The design philosophy and implementation are discussed with emphasis on the low-noise hybrid amplifiers, signal processing and data acquisition electronics. The system receives signals from a highly efficient single-photo electron detector. These signals are shaped and amplified before being stored in an analog memory and processed by a digitizing system. The data from several ADCs are multiplexed and transmitted via fiber optics to the SLD FASTBUS system. We highlight the technologies used, as well as the space, power dissipation, and environmental constraints imposed on the system. 16 refs., 10 figs

  15. Front-end electronics for H.E.P

    International Nuclear Information System (INIS)

    Hrisoho, A.

    1990-07-01

    A simplified description of the front-end electronics used for High Energy Physics Detectors is given. A brief analysis of the speed limitation due to the time necessary for the detector charge transfer is given, which depends as well of the detector behaviour as of the preamplifier configuration. A description of the sample electronic circuits like differentiation, integration, pole zero circuit and preamplifier are given. Noise analysis is carried out to derive the relations for the equivalent noise signal for the measuring device with some description of practical noise measuring. The shaping of the signals to obtain an optimization for the noise is considered and some hints for shaping amplifier design, with a description of the noise weightling function for normal and time variant shaping are given

  16. Design Considerations for Area-Constrained In-Pixel Photon Counting in Medipix3

    CERN Document Server

    Wong, W; Campbell, M; Heijne, E H M; Llopart, X; Tlustos, L

    2008-01-01

    Hybrid pixel detectors process impinging photons using front-end electronics electrically connected to a segmented sensor via solder bumps. This allows for complex in-pixel processing while maintaining 100% fill factor. Medipix3 is a single photon processing chip whose 55 μm x 55 μm pixels contain analog charge-processing circuits, inter-pixel routing, and digital blocks. While a standard digital design flow would use logic gates from a standard cell library, the integration of multiple functions and configurations within the compact area of the Medipix3 pixel requires a full-custom manual layout. This work describes the various area-saving design strategies which were employed to optimize the use of available space in the digital section of the Medipix3 pixel.

  17. Simulation study of pixel detector charge digitization

    Science.gov (United States)

    Wang, Fuyue; Nachman, Benjamin; Sciveres, Maurice; Lawrence Berkeley National Laboratory Team

    2017-01-01

    Reconstruction of tracks from nearly overlapping particles, called Tracking in Dense Environments (TIDE), is an increasingly important component of many physics analyses at the Large Hadron Collider as signatures involving highly boosted jets are investigated. TIDE makes use of the charge distribution inside a pixel cluster to resolve tracks that share one of more of their pixel detector hits. In practice, the pixel charge is discretized using the Time-over-Threshold (ToT) technique. More charge information is better for discrimination, but more challenging for designing and operating the detector. A model of the silicon pixels has been developed in order to study the impact of the precision of the digitized charge distribution on distinguishing multi-particle clusters. The output of the GEANT4-based simulation is used to train neutral networks that predict the multiplicity and location of particles depositing energy inside one cluster of pixels. By studying the multi-particle cluster identification efficiency and position resolution, we quantify the trade-off between the number of ToT bits and low-level tracking inputs. As both ATLAS and CMS are designing upgraded detectors, this work provides guidance for the pixel module designs to meet TIDE needs. Work funded by the China Scholarship Council and the Office of High Energy Physics of the U.S. Department of Energy under contract DE-AC02-05CH11231.

  18. Front-end data processing the SLD data acquisition system

    International Nuclear Information System (INIS)

    Nielsen, B.S.

    1986-07-01

    The data acquisition system for the SLD detector will make extensive use of parallel at the front-end level. Fastbus acquisition modules are being built with powerful processing capabilities for calibration, data reduction and further pre-processing of the large amount of analog data handled by each module. This paper describes the read-out electronics chain and data pre-processing system adapted for most of the detector channels, exemplified by the central drift chamber waveform digitization and processing system

  19. Measurement of the front-end dead-time of the LHCb muon detector and evaluation of its contribution to the muon detection inefficiency

    CERN Document Server

    INSPIRE-00357120; Archilli, F.; Auriemma, G.; Baldini, W.; Bencivenni, G.; Bizzeti, A.; Bocci, V.; Bondar, N.; Bonivento, W.; Bochin, B.; Bozzi, C.; Brundu, D.; Cadeddu, S.; Campana, P.; Carboni, G.; Cardini, A.; Carletti, M.; Casu, L.; Chubykin, A.; Ciambrone, P.; Dané, E.; De Simone, P.; Falabella, A.; Felici, G.; Fiore, M.; Fontana, M.; Fresch, P.; Furfaro, E.; Graziani, G.; Kashchuk, A.; Kotriakhova, S.; Lai, A.; Lanfranchi, G.; Loi, A.; Maev, O.; Manca, G.; Martellotti, G.; Neustroev, P.; Oldeman, R.G.C.; Palutan, M.; Passaleva, G.; Penso, G.; Pinci, D.; Polycarpo, E.; Saitta, B.; Santacesaria, R.; Santimaria, M.; Santovetti, E.; Saputi, A.; Sarti, A.; Satriano, C.; Satta, A.; Schmidt, B.; Schneider, T.; Sciascia, B.; Sciubba, A.; Siddi, B.G.; Tellarini, G.; Vacca, C.; Vazquez-Gomez, R.; Vecchi, S.; Veltri, M.; Vorobyev, A.

    2016-04-06

    A method is described which allows to deduce the dead-time of the front-end electronics of the LHCb muon detector from a series of measurements performed at different luminosities at a bunch-crossing rate of 20 MHz. The measured values of the dead-time range from 70 ns to 100 ns. These results allow to estimate the performance of the muon detector at the future bunch-crossing rate of 40 MHz and at higher luminosity.

  20. Sensor development for the CMS pixel detector

    CERN Document Server

    Bölla, G; Horisberger, R P; Kaufmann, R; Rohe, T; Roy, A

    2002-01-01

    The CMS experiment which is currently under construction at the Large Hadron Collider (LHC) at CERN (Geneva, Switzerland) will contain a pixel detector which provides in its final configuration three space points per track close to the interaction point of the colliding beams. Because of the harsh radiation environment of the LHC, the technical realization of the pixel detector is extremely challenging. The readout chip as the most damageable part of the system is believed to survive a particle fluence of 6x10 sup 1 sup 4 n sub e sub q /cm sup 2 (All fluences are normalized to 1 MeV neutrons and therefore all components of the hybrid pixel detector have to perform well up to at least this fluence. As this requires a partially depleted operation of the silicon sensors after irradiation-induced type inversion of the substrate, an ''n in n'' concept has been chosen. In order to perform IV-tests on wafer level and to hold accidentally unconnected pixels close to ground potential, a resistive path between the pixe...

  1. SLHC upgrade plans for the ATLAS pixel detector

    International Nuclear Information System (INIS)

    Sicho, Petr

    2009-01-01

    The ATLAS pixel detector is an 80 million channels silicon tracking system designed to detect charged tracks and secondary vertices with very high precision. An upgrade of the ATLAS pixel detector is presently being considered, enabling to cope with higher luminosity at Super Large Hadron Collider (SLHC). The increased luminosity leads to extremely high radiation doses in the innermost region of the ATLAS tracker. Options considered for a new detector are discussed, as well as some important R and D activities, such as investigations towards novel detector geometries and novel processes.

  2. The STAR Heavy Flavor Tracker PXL detector readout electronics

    International Nuclear Information System (INIS)

    Schambach, J.; Contin, G.; Greiner, L.; Stezelberger, T.; Vu, C.; Sun, X.; Szelezniak, M.

    2016-01-01

    The Heavy Flavor Tracker (HFT) is a recently installed micro-vertex detector upgrade to the STAR experiment at RHIC, consisting of three subsystems with various technologies of silicon sensors arranged in 4 concentric cylinders. The two innermost layers of the HFT close to the beam pipe, the Pixel ('PXL') subsystem, employ CMOS Monolithic Active Pixel Sensor (MAPS) technology that integrate the sensor, front-end electronics, and zero-suppression circuitry in one silicon die. This paper presents selected characteristics of the PXL detector part of the HFT and the hardware, firmware and software associated with the readout system for this detector

  3. Development and characterization of diamond and 3D-silicon pixel detectors with ATLAS-pixel readout electronics

    Energy Technology Data Exchange (ETDEWEB)

    Mathes, Markus

    2008-12-15

    Hybrid pixel detectors are used for particle tracking in the innermost layers of current high energy experiments like ATLAS. After the proposed luminosity upgrade of the LHC, they will have to survive very high radiation fluences of up to 10{sup 16} particles per cm{sup 2} per life time. New sensor concepts and materials are required, which promise to be more radiation tolerant than the currently used planar silicon sensors. Most prominent candidates are so-called 3D-silicon and single crystal or poly-crystalline diamond sensors. Using the ATLAS pixel electronics different detector prototypes with a pixel geometry of 400 x 50 {mu}m{sup 2} have been built. In particular three devices have been studied in detail: a 3D-silicon and a single crystal diamond detector with an active area of about 1 cm{sup 2} and a poly-crystalline diamond detector of the same size as a current ATLAS pixel detector module (2 x 6 cm{sup 2}). To characterize the devices regarding their particle detection efficiency and spatial resolution, the charge collection inside a pixel cell as well as the charge sharing between adjacent pixels was studied using a high energy particle beam. (orig.)

  4. Electron imaging with Medipix2 hybrid pixel detector

    CERN Document Server

    McMullan, G; Chen, S; Henderson, R; Llopart, X; Summerfield, C; Tlustos, L; Faruqi, A R

    2007-01-01

    The electron imaging performance of Medipix2 is described. Medipix2 is a hybrid pixel detector composed of two layers. It has a sensor layer and a layer of readout electronics, in which each 55 μm×55 μm pixel has upper and lower energy discrimination and MHz rate counting. The sensor layer consists of a 300 μm slab of pixellated monolithic silicon and this is bonded to the readout chip. Experimental measurement of the detective quantum efficiency, DQE(0) at 120 keV shows that it can reach 85% independent of electron exposure, since the detector has zero noise, and the DQE(Nyquist) can reach 35% of that expected for a perfect detector (4/π2). Experimental measurement of the modulation transfer function (MTF) at Nyquist resolution for 120 keV electrons using a 60 keV lower energy threshold, yields a value that is 50% of that expected for a perfect detector (2/π). Finally, Monte Carlo simulations of electron tracks and energy deposited in adjacent pixels have been performed and used to calculate expected v...

  5. The Upgraded Pixel Detector of the ATLAS Experiment for Run-2

    CERN Document Server

    Ferrere, Didier; The ATLAS collaboration

    2016-01-01

    Run-2 of the LHC is providing new challenges to track and vertex reconstruction with higher energies, denser jets and higher rates. Therefore the ATLAS experiment has constructed the first 4-layer Pixel detector in HEP, installing a new Pixel layer, also called Insertable B-Layer (IBL). IBL is a fourth layer of pixel detectors, and has been installed in May 2014 at a radius of 3.3 cm between the existing Pixel Detector and a new smaller radius beam-pipe. The new detector, built to cope with high radiation and expected occupancy, is the first large scale application of 3D detectors and CMOS 130nm technology. In addition the Pixel detector was refurbished with a new service quarter panel to recover about 3% of defective modules lost during run-1 and a new optical readout system to readout the data at higher speed while reducing the occupancy when running with increased luminosity. The commissioning and performance of the 4-layer Pixel Detector, in particular the IBL, will be presented, using collision data.

  6. ALICE Silicon Pixel Detector

    CERN Multimedia

    Manzari, V

    2013-01-01

    The Silicon Pixel Detector (SPD) forms the innermost two layers of the 6-layer barrel Inner Tracking System (ITS). The SPD plays a key role in the determination of the position of the primary collision and in the reconstruction of the secondary vertices from particle decays.

  7. The ATLAS Pixel Detector operation and performance

    CERN Document Server

    Andreazza, A; The ATLAS collaboration

    2010-01-01

    The ATLAS Pixel Detector is the innermost detector of the ATLAS experiment at the Large Hadron Collider at CERN. It consists of 1744 silicon sensors equipped with approximately $80 imes 10^6$~electronic channels, providing typically three measurement points with high resolution for particles emerging from the beam-interaction region. The complete Pixel Detector has been taking part in cosmic-ray data-taking since 2008. Since November 2009 it has been operated with LHC colliding beams at $sqrt{s}=900$~GeV, 2.36~TeV and 7 TeV. The detector operated with an active fraction of 97.2% at a threshold of 3500~$e$, showing a noise occupancy rate better than $10^{-9}$~hit/pixel/BC and a track association efficiency of 99%. The Lorentz angle for electrons in silicon is measured to be $ heta_mathrm{L}=12.11^circ pm 0.09^circ$ and its temperature dependence has been verified. The pulse height information from the time-over-threshold technique allows to improve the point resolution using charge sharing and to perform parti...

  8. X-CSIT: a toolkit for simulating 2D pixel detectors

    Science.gov (United States)

    Joy, A.; Wing, M.; Hauf, S.; Kuster, M.; Rüter, T.

    2015-04-01

    A new, modular toolkit for creating simulations of 2D X-ray pixel detectors, X-CSIT (X-ray Camera SImulation Toolkit), is being developed. The toolkit uses three sequential simulations of detector processes which model photon interactions, electron charge cloud spreading with a high charge density plasma model and common electronic components used in detector readout. In addition, because of the wide variety in pixel detector design, X-CSIT has been designed as a modular platform so that existing functions can be modified or additional functionality added if the specific design of a detector demands it. X-CSIT will be used to create simulations of the detectors at the European XFEL, including three bespoke 2D detectors: the Adaptive Gain Integrating Pixel Detector (AGIPD), Large Pixel Detector (LPD) and DePFET Sensor with Signal Compression (DSSC). These simulations will be used by the detector group at the European XFEL for detector characterisation and calibration. For this purpose, X-CSIT has been integrated into the European XFEL's software framework, Karabo. This will further make it available to users to aid with the planning of experiments and analysis of data. In addition, X-CSIT will be released as a standalone, open source version for other users, collaborations and groups intending to create simulations of their own detectors.

  9. The front-end amplifier for the silicon microstrip sensors of the PANDA MVD

    Energy Technology Data Exchange (ETDEWEB)

    Di Pietro, Valentino; Brinkmann, Kai-Thomas; Riccardi, Alberto [II. Physikalisches Institut, JLU Giessen (Germany); Rivetti, Angelo; Rolo, Manuel [INFN Sezione di Torino (Italy)

    2015-07-01

    The most common readout systems designed for the nuclear physics detectors are based on amplitude measurements. The information that needs to be preserved is the charge delivered by a particle hitting the sensor. The electronic chain employed in these cases is made from two main building blocks: front-end amplifier and ADC. One of the issues associated with the implementation of such an architecture in scaled CMOS technologies is the dynamic range, because the charge information is extrapolated through the sampling of the peak of the front-end output signal. It is therefore interesting to explore the possibility of using time-based architectures offering better performances from that point of view. In fact, in these topologies the linearity between the charge and the signal duration can be maintained even if some building blocks in the chain saturate. The main drawback is the loss in resolution since a duration measurement involves the difference between two time measurements. This work will present the design of a front-end optimized for fast Time-over-Threshold applications. The circuit has been developed for the microstrip detectors of the PANDA experiment. The key features of the front-end amplifier are illustrated and both schematic level, and post-layout simulations are discussed.

  10. Pixel array detector for X-ray free electron laser experiments

    Energy Technology Data Exchange (ETDEWEB)

    Philipp, Hugh T., E-mail: htp2@cornell.edu [Department of Physics, Laboratory of Solid State Physics, Cornell University, Ithaca, NY 14853 (United States); Hromalik, Marianne [Electrical and Computer Engineering, SUNY Oswego, Oswego, NY 13126 (United States); Tate, Mark; Koerner, Lucas [Department of Physics, Laboratory of Solid State Physics, Cornell University, Ithaca, NY 14853 (United States); Gruner, Sol M. [Department of Physics, Laboratory of Solid State Physics, Cornell University, Ithaca, NY 14853 (United States); Wilson Laboratory, Cornell University, CHESS, Ithaca, NY 14853 (United States)

    2011-09-01

    X-ray free electron lasers (XFELs) promise to revolutionize X-ray science with extremely high peak brilliances and femtosecond X-ray pulses. This will require novel detectors to fully realize the potential of these new sources. There are many current detector development projects aimed at the many challenges of meeting the XFEL requirements . This paper describes a pixel array detector (PAD) that has been developed for the Coherent X-ray Imaging experiment at the Linac Coherent Light Source (LCLS) at the SLAC National Laboratory . The detector features 14-bit in-pixel digitization; a 2-level in-pixel gain setting that can be used to make an arbitrary 2-D gain pattern that is adaptable to a particular experiment; the ability to handle instantaneous X-ray flux rates of 10{sup 17} photons per second; and continuous frames rates in excess of 120 Hz. The detector uses direct detection of X-rays in a silicon diode. The charge produced by the diode is integrated in a pixilated application specific integrated circuit (ASIC) which digitizes collected holes with single X-ray photon capability. Each ASIC is 194x185 pixels, each pixel is 110{mu}mx110{mu}m on a side. Each pixel can detect up to 2500 X-rays per frame in low-gain mode, yet easily detects single photons at high-gain. Cooled, single-chip detectors have been built and meet all the required specifications. SLAC National Laboratory is engaged in constructing a tiled, multi-chip 1516x1516 pixel detector.

  11. Development of a versatile readout and test system and characterization of a capacitively coupled active pixel sensor

    Energy Technology Data Exchange (ETDEWEB)

    Janssen, Jens; Gonella, Laura; Hemperek, Tomasz; Hirono, Toko; Huegging, Fabian; Krueger, Hans; Wermes, Norbert [Institute of Physics, University of Bonn, Bonn (Germany); Peric, Ivan [Karlsruher Institut fuer Technologie, Karlsruhe (Germany); Collaboration: ATLAS-Collaboration

    2015-07-01

    With the availability of high voltage and high resistivity CMOS processes, active pixel sensors are becoming increasingly interesting for radiation detection in high energy physics experiments. Although the pixel signal-to-noise ratio and the sensor radiation tolerance were improved, active pixel sensors cannot yet compete with state-of-the-art hybrid pixel detector in a high radiation environment. Hence, active pixel sensors are possible candidates for the outer tracking detector in HEP experiments where production cost plays a role. The investigation of numerous prototyping steps and different technologies is still ongoing and requires a versatile test and readout system, which will be presented in this talk. A capacitively coupled active pixel sensor fabricated in AMS 180 nm high voltage CMOS process is investigated. The sensor is designed to be glued to existing front-end pixel readout chips. Results from the characterization are presented in this talk.

  12. Charge Gain, Voltage Gain, and Node Capacitance of the SAPHIRA Detector Pixel by Pixel

    Science.gov (United States)

    Pastrana, Izabella M.; Hall, Donald N. B.; Baker, Ian M.; Jacobson, Shane M.; Goebel, Sean B.

    2018-01-01

    The University of Hawai`i Institute for Astronomy has partnered with Leonardo (formerly Selex) in the development of HgCdTe linear mode avalanche photodiode (L-APD) SAPHIRA detectors. The SAPHIRA (Selex Avalanche Photodiode High-speed Infra-Red Array) is ideally suited for photon-starved astronomical observations, particularly near infrared (NIR) adaptive optics (AO) wave-front sensing. I have measured the stability, and linearity with current, of a 1.7-um (10% spectral bandpass) infrared light emitting diode (IR LED) used to illuminate the SAPHIRA and have then utilized this source to determine the charge gain (in e-/ADU), voltage gain (in uV/ADU), and node capacitance (in fF) for each pixel of the 320x256@24um SAPHIRA. These have previously only been averages over some sub-array. Determined from the ratio of the temporal averaged signal level to variance under constant 1.7-um LED illumination, I present the charge gain pixel-by-pixel in a 64x64 sub-array at the center of the active area of the SAPHIRA (analyzed separately as four 32x32 sub-arrays) to be about 1.6 e-/ADU (σ=0.5 e-/ADU). Additionally, the standard technique of varying the pixel reset voltage (PRV) in 10 mV increments and recording output frames for the same 64x64 subarray found the voltage gain per pixel to be about 11.7 uV/ADU (σ=0.2 uV/ADU). Finally, node capacitance was found to be approximately 23 fF (σ=6 fF) utilizing the aforementioned charge and voltage gain measurements. I further discuss the linearity measurements of the 1.7-um LED used in the charge gain characterization procedure.

  13. Development and characterisation of a front-end ASIC for macro array of photo-detectors of large dimensions

    International Nuclear Information System (INIS)

    Conforti Di Lorenzo, S.

    2010-10-01

    The coverage of large areas of photo-detection is a crucial element of experiments studying high energy atmospheric cosmic showers and neutrinos from different sources. The objective of this project is to realize big detectors using thousands of photomultipliers (PMT). The project proposes to segment the large surface of photo-detection into macro pixels consisting of an array of 16 PMT of 12 inches (2*2 m 2 ), connected to an autonomous front-end electronics which works in without-trigger data acquisition mode placed near the array. This is possible thanks to the microelectronics progress that allows to integrate the readout and the signal processing, of all the multipliers, in the same circuit (ASIC) named PARISROC (Photomultiplier Array Integrated ins SiGe Read Out Chip). The ASIC must only send out the digital data by network to the surface central data storage. The PARISROC chip made in AM's Silicon Germanium (SiGe) 0.35 μm technology, integrates 16 independent channels for each PMT of the array, providing charge and time measurements. The first prototype of PARISROC chip has a total surface of 19 mm 2 . The ASIC measurements have led to the realization of a second prototype. Important measurements were performed in terms of noise, dynamic range, readout frequency (from 10 MHz to 40 MHz), time measurements (TDC improvements) and charge measurements (Slow shaper improvements). This new prototype of PARISROC-2 has been tested and the characterisation has shown a good overall behavior and the verification of the improvements. (author)

  14. The Belle II DEPFET pixel detector

    Energy Technology Data Exchange (ETDEWEB)

    Moser, Hans-Günther, E-mail: moser@mpp.mpg.de

    2016-09-21

    The Belle II experiment at KEK (Tsukuba, Japan) will explore heavy flavour physics (B, charm and tau) at the starting of 2018 with unprecedented precision. Charged particles are tracked by a two-layer DEPFET pixel device (PXD), a four-layer silicon strip detector (SVD) and the central drift chamber (CDC). The PXD will consist of two layers at radii of 14 mm and 22 mm with 8 and 12 ladders, respectively. The pixel sizes will vary, between 50 μm×(55–60) μm in the first layer and between 50 μm×(70–85) μm in the second layer, to optimize the charge sharing efficiency. These innermost layers have to cope with high background occupancy, high radiation and must have minimal material to reduce multiple scattering. These challenges are met using the DEPFET technology. Each pixel is a FET integrated on a fully depleted silicon bulk. The signal charge collected in the ‘internal gate’ modulates the FET current resulting in a first stage amplification and therefore very low noise. This allows very thin sensors (75 μm) reducing the overall material budget of the detector (0.21% X{sub 0}). Four fold multiplexing of the column parallel readout allows read out a full frame of the pixel matrix in only 20 μs while keeping the power consumption low enough for air cooling. Only the active electronics outside the detector acceptance has to be cooled actively with a two phase CO{sub 2} system. Furthermore the DEPFET technology offers the unique feature of an electronic shutter which allows the detector to operate efficiently in the continuous injection mode of superKEKB.

  15. The magic cube and the pixel ionization chamber: detectors for monitor and dosimetry of radiotherapy beams

    International Nuclear Information System (INIS)

    Amerio, S.; Boriano, A.; Bourhaleb, F.; Cirio, R.; Donetti, M.; Garelli, E.; Giordanengo, S.; Madon, E.; Marchetto, F.; Nastasi, U.; Peroni, C.; Sanz Freire, C.J.; Sardo, A.; Trevisiol, E.

    2003-01-01

    Tumor therapy takes advantage of the energy deposition of radiation to concentrate high doses in the target while sparing healthy tissue. Elective pathologies for highly conformal radiotherapies such as photon Intensity Modulated Radiotherapy (IMRT) and radiotherapy with hadrons are head and neck, eye, prostate and in general all tumors that are either deep or located close to critical organs. In the world there are several centers that are using such techniques and a common problem that is being experienced is the verification of treatment plans and monitoring of the beam. We have designed and built two detectors that allow 2D and 3D measurements of dose and fluence of such beams. The detectors allow measurements on big surfaces, up to 25*25 cm 2 . The active media are parallel plate, strip and pixel segmented ionization chambers with front-end Very Large Scale Integration (VLSI) readout and PC based data acquistion. The description of dosimeter, chamber and electronics will be given with results from beam tests and therapy plan verification

  16. Status of the digital pixel array detector for protein crystallography

    CERN Document Server

    Datte, P; Beuville, E; Endres, N; Druillole, F; Luo, L; Millaud, J E; Xuong, N H

    1999-01-01

    A two-dimensional photon counting digital pixel array detector is being designed for static and time resolved protein crystallography. The room temperature detector will significantly enhance monochromatic and polychromatic protein crystallographic through-put data rates by more than three orders of magnitude. The detector has an almost infinite photon counting dynamic range and exhibits superior spatial resolution when compared to present crystallographic phosphor imaging plates or phosphor coupled CCD detectors. The detector is a high resistivity N-type Si with a pixel pitch of 150x150 mu m, and a thickness of 300 mu m, and is bump bonded to an application specific integrated circuit. The event driven readout of the detector is based on the column architecture and allows an independent pixel hit rate above 1 million photons/s/pixel. The device provides energy discrimination and sparse data readout which yields minimal dead-time. This type of architecture allows a continuous (frameless) data acquisition, a f...

  17. 3D silicon sensors: Design, large area production and quality assurance for the ATLAS IBL pixel detector upgrade

    Science.gov (United States)

    Da Via, Cinzia; Boscardin, Maurizio; Dalla Betta, Gian-Franco; Darbo, Giovanni; Fleta, Celeste; Gemme, Claudia; Grenier, Philippe; Grinstein, Sebastian; Hansen, Thor-Erik; Hasi, Jasmine; Kenney, Chris; Kok, Angela; Parker, Sherwood; Pellegrini, Giulio; Vianello, Elisa; Zorzi, Nicola

    2012-12-01

    3D silicon sensors, where electrodes penetrate the silicon substrate fully or partially, have successfully been fabricated in different processing facilities in Europe and USA. The key to 3D fabrication is the use of plasma micro-machining to etch narrow deep vertical openings allowing dopants to be diffused in and form electrodes of pin junctions. Similar openings can be used at the sensor's edge to reduce the perimeter's dead volume to as low as ˜4 μm. Since 2009 four industrial partners of the 3D ATLAS R&D Collaboration started a joint effort aimed at one common design and compatible processing strategy for the production of 3D sensors for the LHC Upgrade and in particular for the ATLAS pixel Insertable B-Layer (IBL). In this project, aimed for installation in 2013, a new layer will be inserted as close as 3.4 cm from the proton beams inside the existing pixel layers of the ATLAS experiment. The detector proximity to the interaction point will therefore require new radiation hard technologies for both sensors and front end electronics. The latter, called FE-I4, is processed at IBM and is the biggest front end of this kind ever designed with a surface of ˜4 cm2. The performance of 3D devices from several wafers was evaluated before and after bump-bonding. Key design aspects, device fabrication plans and quality assurance tests during the 3D sensors prototyping phase are discussed in this paper.

  18. 3D silicon sensors: Design, large area production and quality assurance for the ATLAS IBL pixel detector upgrade

    Energy Technology Data Exchange (ETDEWEB)

    Da Via, Cinzia [School of Physics and Astronomy, University of Manchester, Oxford Road, Manchester, M13 9PL (United Kingdom); Boscardin, Maurizio [Fondazione Bruno Kessler, FBK-CMM, Via Sommarive 18, I-38123 Trento (Italy); Dalla Betta, Gian-Franco, E-mail: dallabe@disi.unitn.it [DISI, Universita degli Studi di Trento and INFN, Via Sommarive 14, I-38123 Trento (Italy); Darbo, Giovanni [INFN Sezione di Genova, Via Dodecaneso 33, I-14146 Genova (Italy); Fleta, Celeste [Centro Nacional de Microelectronica, CNM-IMB (CSIC), Barcelona E-08193 (Spain); Gemme, Claudia [INFN Sezione di Genova, Via Dodecaneso 33, I-14146 Genova (Italy); Grenier, Philippe [SLAC National Accelerator Laboratory, 2575 Sand Hill Road, Menlo Park, CA 94025 (United States); Grinstein, Sebastian [Institut de Fisica d' Altes Energies (IFAE) and ICREA, Universitat Autonoma de Barcelona (UAB), E-08193 Bellaterra, Barcelona (Spain); Hansen, Thor-Erik [SINTEF MiNaLab, Blindern, N-0314 Oslo (Norway); Hasi, Jasmine; Kenney, Chris [SLAC National Accelerator Laboratory, 2575 Sand Hill Road, Menlo Park, CA 94025 (United States); Kok, Angela [SINTEF MiNaLab, Blindern, N-0314 Oslo (Norway); Parker, Sherwood [University of Hawaii, c/o Lawrence Berkeley Laboratory, Berkeley, CA 94720 (United States); Pellegrini, Giulio [Centro Nacional de Microelectronica, CNM-IMB (CSIC), Barcelona E-08193 (Spain); Vianello, Elisa; Zorzi, Nicola [Fondazione Bruno Kessler, FBK-CMM, Via Sommarive 18, I-38123 Trento (Italy)

    2012-12-01

    3D silicon sensors, where electrodes penetrate the silicon substrate fully or partially, have successfully been fabricated in different processing facilities in Europe and USA. The key to 3D fabrication is the use of plasma micro-machining to etch narrow deep vertical openings allowing dopants to be diffused in and form electrodes of pin junctions. Similar openings can be used at the sensor's edge to reduce the perimeter's dead volume to as low as {approx}4 {mu}m. Since 2009 four industrial partners of the 3D ATLAS R and D Collaboration started a joint effort aimed at one common design and compatible processing strategy for the production of 3D sensors for the LHC Upgrade and in particular for the ATLAS pixel Insertable B-Layer (IBL). In this project, aimed for installation in 2013, a new layer will be inserted as close as 3.4 cm from the proton beams inside the existing pixel layers of the ATLAS experiment. The detector proximity to the interaction point will therefore require new radiation hard technologies for both sensors and front end electronics. The latter, called FE-I4, is processed at IBM and is the biggest front end of this kind ever designed with a surface of {approx}4 cm{sup 2}. The performance of 3D devices from several wafers was evaluated before and after bump-bonding. Key design aspects, device fabrication plans and quality assurance tests during the 3D sensors prototyping phase are discussed in this paper.

  19. An Upgraded Front-End Switching Power Supply Design For the ATLAS TileCAL Detector of the LHC

    CERN Document Server

    Drake, Gary; The ATLAS collaboration

    2011-01-01

    We present the design of an upgraded switching power supply brick for the front-end electronics of the ATLAS hadron tile calorimeter (TileCAL) at the LHC. The new design features significant improvement in noise, improved fault detection, and generally a more robust design, while retaining the compact size, water-cooling, output control, and monitoring features in this 300 KHz design. We discuss the improvements to the design, and the radiation testing that we have done to qualify the design. We also present our plans for the production of 2400 new bricks for installation on the detector in 2013.

  20. An Upgraded Front-End Switching Power Supply Design for the ATLAS TileCAL Detector of the LHC

    CERN Document Server

    Drake, G; The ATLAS collaboration; De Lurgio, P; Henriques, A; Minashvili, I; Nemecek, S; Price, L; Proudfoot, J; Stanek, R

    2011-01-01

    We present the design of an upgraded switching power supply brick for the front-end electronics of the ATLAS hadron tile calorimeter (TileCAL) at the LHC. The new design features significant improvement in noise, improved fault detection, and generally a more robust design, while retaining the compact size, water-cooling, output control, and monitoring features in this 300 KHz design. We discuss the improvements to the design, and the radiation testing that we have done to qualify the design. We also present our plans for the production of 2400 new bricks for installation on the detector in 2013.

  1. Commissioning of the ATLAS pixel detector

    International Nuclear Information System (INIS)

    Golling, Tobias

    2008-01-01

    The ATLAS pixel detector is a high precision silicon tracking device located closest to the LHC interaction point. It belongs to the first generation of its kind in a hadron collider experiment. It will provide crucial pattern recognition information and will largely determine the ability of ATLAS to precisely track particle trajectories and find secondary vertices. It was the last detector to be installed in ATLAS in June 2007, has been fully connected and tested in-situ during spring and summer 2008, and is ready for the imminent LHC turn-on. The highlights of the past and future commissioning activities of the ATLAS pixel system are presented

  2. The micro vertex detector for the anti PANDA experiment

    Energy Technology Data Exchange (ETDEWEB)

    Esch, Simone [Forschungszentrum Juelich (Germany); Collaboration: PANDA-Collaboration

    2015-07-01

    The anti PANDA detector is one of the main experiments at the upcoming Facility for Antiproton and Ion Research (FAIR), which is under construction in Darmstadt, Germany. The fixed-target experiment will explore anti pp annihilations with intense, phase space-cooled beams with momenta between 1.5 and 15 GeV/c. One aim of the detector is to perform high precision measurements of particles like excited charmonium and D mesons. Essential for background suppression is the tagging of D mesons by measuring their decay point. Therefore, a Micro Vertex Detector (MVD) is planned at anti PANDA as the innermost tracking detector. The MVD aims to reconstruct vertices with a resolution better than 100 μm to cope with the decay length of the D{sup ±} mesons (cτ=315 μm) produced with a mean βγ=2. The detector consists of silicon pixel and double-sided silicon strip detectors, arranged in four barrel layers and six disk layers. An overview of the MVD is given in this talk. Recent developments like laboratory and testbeam results of the current pixel front-end ASIC prototype ToPix 4 are shown. The concept of the newly developed strip front-end ASIC PASTA is presented.

  3. ATLAS Pixel Detector Upgrade

    CERN Document Server

    Flick, T; The ATLAS collaboration

    2009-01-01

    The first upgrade for higher luminosity at LHC for the ATLAS pixel detector is the insertion of a forth layer, the IBL. The talk gives an overview about what the IBL is and how it will be set up, as well as to give a status of the research and develoment work.

  4. Development and Characterization of Diamond and 3D-Silicon Pixel Detectors with ATLAS-Pixel Readout Electronics

    CERN Document Server

    Mathes, Markus

    2008-01-01

    Hybrid pixel detectors are used for particle tracking in the innermost layers of current high energy experiments like ATLAS. After the proposed luminosity upgrade of the LHC, they will have to survive very high radiation fluences of up to 10^16 particles per cm^2 per life time. New sensor concepts and materials are required, which promise to be more radiation tolerant than the currently used planar silicon sensors. Most prominent candidates are so-called 3D-silicon and single crystal or poly-crystalline diamond sensors. Using the ATLAS pixel electronics different detector prototypes with a pixel geometry of 400 × 50 um^2 have been built. In particular three devices have been studied in detail: a 3D-silicon and a single crystal diamond detector with an active area of about 1 cm^2 and a poly-crystalline diamond detector of the same size as a current ATLAS pixel detector module (2 × 6 cm^2). To characterize the devices regarding their particle detection efficiency and spatial resolution, the charge collection ...

  5. Wafer-scale pixelated detector system

    Science.gov (United States)

    Fahim, Farah; Deptuch, Grzegorz; Zimmerman, Tom

    2017-10-17

    A large area, gapless, detection system comprises at least one sensor; an interposer operably connected to the at least one sensor; and at least one application specific integrated circuit operably connected to the sensor via the interposer wherein the detection system provides high dynamic range while maintaining small pixel area and low power dissipation. Thereby the invention provides methods and systems for a wafer-scale gapless and seamless detector systems with small pixels, which have both high dynamic range and low power dissipation.

  6. A new technique of characterization of the intra-pixel response of astronomical detectors

    International Nuclear Information System (INIS)

    Ketchazo, C.; Boulade, O.; Moreau, V.; Dubreuil, D.; Ronayette, S.; Berthe, M.

    2014-01-01

    This paper is devoted to the presentation of a new technique of characterization of the Intra-Pixel Sensitivity Variations (IPSVs) of astronomical detectors. The IPSV is the spatial variation of the sensitivity within a pixel and it was demonstrated that this variation can contribute to the instrument global error. Then IPSV has not to be neglected especially in the case of under-sampled instruments for high quality imaging and accurate photometry. The common approaches to measure the IPSV consist in determining the pixel response function (PRF) by scanning an optical probe through the detector. These approaches require high-aperture optics, high precision mechanical devices and are time consuming. The original approach we will present in this paper consists in projecting high-resolution periodic patterns onto the whole sensor without classic optics but using the self-imaging property (the Talbot effect) of a Continuously Self Imaging Grating (CSIG) illuminated by a plane wave. This paper describes the test bench and its design rules. The methodology of the measurement is also presented. Two measurement procedures are available: global and local. In the global procedure, the mean PRF corresponding to the whole Focal Plane Array (FPA) or a sub-area of the FPA is evaluated. The results obtained applying this procedure on e2v CCD 204 are presented and discussed in detail. In the local procedure, a CSIG is moved in front of each pixel and a pixel PRF is reconstructed by resolving the inverse problem. The local procedure is presented and validated by simulations. (authors)

  7. Front-end DAQ strategy and implementation for the KLOE-2 experiment

    Science.gov (United States)

    Branchini, P.; Budano, A.; Balla, A.; Beretta, M.; Ciambrone, P.; De Lucia, E.; D'Uffizi, A.; Marciniewski, P.

    2013-04-01

    A new front-end data acquisition (DAQ) system has been conceived for the data collection of the new detectors which will be installed by the KLOE2 collaboration. This system consists of a general purpose FPGA based DAQ module and a VME board hosting up to 16 optical links. The DAQ module has been built around a Virtex-4 FPGA and it is able to acquire up to 1024 different channels distributed over 16 front-end slave cards. Each module is a general interface board (GIB) which performs also first level data concentration tasks. The GIB has an optical interface, a RS-232, an USB and a Gigabit Ethernet Interface. The optical interface will be used for DAQ purposes while the Gigabit Ethernet interface for monitoring tasks and debug. Two new detectors exploit this strategy to collect data. Optical links are used to deliver data to the VME board which performs data concentration tasks. The return optical link from the board to the GIB is used to initialize the front-end cards. The VME interface of the module implements the VME 2eSST protocol in order to sustain a peak data rate of up to 320 MB/s. At the moment the system is working at the Frascati National Laboratory (LNF).

  8. Front-end DAQ strategy and implementation for the KLOE-2 experiment

    International Nuclear Information System (INIS)

    Branchini, P; Budano, A; Balla, A; Beretta, M; Ciambrone, P; Lucia, E De; D'Uffizi, A; Marciniewski, P

    2013-01-01

    A new front-end data acquisition (DAQ) system has been conceived for the data collection of the new detectors which will be installed by the KLOE2 collaboration. This system consists of a general purpose FPGA based DAQ module and a VME board hosting up to 16 optical links. The DAQ module has been built around a Virtex-4 FPGA and it is able to acquire up to 1024 different channels distributed over 16 front-end slave cards. Each module is a general interface board (GIB) which performs also first level data concentration tasks. The GIB has an optical interface, a RS-232, an USB and a Gigabit Ethernet Interface. The optical interface will be used for DAQ purposes while the Gigabit Ethernet interface for monitoring tasks and debug. Two new detectors exploit this strategy to collect data. Optical links are used to deliver data to the VME board which performs data concentration tasks. The return optical link from the board to the GIB is used to initialize the front-end cards. The VME interface of the module implements the VME 2eSST protocol in order to sustain a peak data rate of up to 320 MB/s. At the moment the system is working at the Frascati National Laboratory (LNF).

  9. Electron imaging with Medipix2 hybrid pixel detector

    International Nuclear Information System (INIS)

    McMullan, G.; Cattermole, D.M.; Chen, S.; Henderson, R.; Llopart, X.; Summerfield, C.; Tlustos, L.; Faruqi, A.R.

    2007-01-01

    The electron imaging performance of Medipix2 is described. Medipix2 is a hybrid pixel detector composed of two layers. It has a sensor layer and a layer of readout electronics, in which each 55 μmx55 μm pixel has upper and lower energy discrimination and MHz rate counting. The sensor layer consists of a 300 μm slab of pixellated monolithic silicon and this is bonded to the readout chip. Experimental measurement of the detective quantum efficiency, DQE(0) at 120 keV shows that it can reach ∼85% independent of electron exposure, since the detector has zero noise, and the DQE(Nyquist) can reach ∼35% of that expected for a perfect detector (4/π 2 ). Experimental measurement of the modulation transfer function (MTF) at Nyquist resolution for 120 keV electrons using a 60 keV lower energy threshold, yields a value that is 50% of that expected for a perfect detector (2/π). Finally, Monte Carlo simulations of electron tracks and energy deposited in adjacent pixels have been performed and used to calculate expected values for the MTF and DQE as a function of the threshold energy. The good agreement between theory and experiment allows suggestions for further improvements to be made with confidence. The present detector is already very useful for experiments that require a high DQE at very low doses

  10. Electron imaging with Medipix2 hybrid pixel detector.

    Science.gov (United States)

    McMullan, G; Cattermole, D M; Chen, S; Henderson, R; Llopart, X; Summerfield, C; Tlustos, L; Faruqi, A R

    2007-01-01

    The electron imaging performance of Medipix2 is described. Medipix2 is a hybrid pixel detector composed of two layers. It has a sensor layer and a layer of readout electronics, in which each 55 microm x 55 microm pixel has upper and lower energy discrimination and MHz rate counting. The sensor layer consists of a 300 microm slab of pixellated monolithic silicon and this is bonded to the readout chip. Experimental measurement of the detective quantum efficiency, DQE(0) at 120 keV shows that it can reach approximately 85% independent of electron exposure, since the detector has zero noise, and the DQE(Nyquist) can reach approximately 35% of that expected for a perfect detector (4/pi(2)). Experimental measurement of the modulation transfer function (MTF) at Nyquist resolution for 120 keV electrons using a 60 keV lower energy threshold, yields a value that is 50% of that expected for a perfect detector (2/pi). Finally, Monte Carlo simulations of electron tracks and energy deposited in adjacent pixels have been performed and used to calculate expected values for the MTF and DQE as a function of the threshold energy. The good agreement between theory and experiment allows suggestions for further improvements to be made with confidence. The present detector is already very useful for experiments that require a high DQE at very low doses.

  11. Testbeam and laboratory test results of irradiated 3D CMS pixel detectors

    Energy Technology Data Exchange (ETDEWEB)

    Bubna, Mayur [Purdue University, Department of Physics, West Lafayette, IN 47907-1396 (United States); Purdue University, School of Electrical and Computer Engineering, West Lafayette, IN 47907-1396 (United States); Alagoz, Enver, E-mail: enver.alagoz@cern.ch [Purdue University, Department of Physics, West Lafayette, IN 47907-1396 (United States); Cervantes, Mayra; Krzywda, Alex; Arndt, Kirk [Purdue University, Department of Physics, West Lafayette, IN 47907-1396 (United States); Obertino, Margherita; Solano, Ada [Istituto Nazionale di Fisica Nucleare, Sezione di Torino, 10125 Torino (Italy); Dalla Betta, Gian-Franco [INFN Padova (Gruppo Collegato di Trento) (Italy); Dipartimento di Ingegneria e Scienzadella Informazione, Universitá di Trento, I-38123 Povo di Trento (Italy); Menace, Dario; Moroni, Luigi [Istituto Nazionale di Fisica Nucleare, Sezione di Milano Bicocca (Italy); Universitá degli Studi di Milano Bicocca, 20126 Milano (Italy); Uplegger, Lorenzo; Rivera, Ryan [Fermi National Accelerator Laboratory, Batavia, IL 60510-0500 (United States); Osipenkov, Ilya [Texas A and M University, Department of Physics, College Station, TX 77843-4242 (United States); Andresen, Jeff [Fermi National Accelerator Laboratory, Batavia, IL 60510-0500 (United States); Bolla, Gino; Bortoletto, Daniela [Purdue University, Department of Physics, West Lafayette, IN 47907-1396 (United States); Boscardin, Maurizio [Centro per i Materiali e i Microsistemi Fondazione Bruno Kessler (FBK), Trento, I-38123 Povo di Trento (Italy); Marie Brom, Jean [Strasbourg IPHC, Institut Pluriedisciplinaire Hubert Curien, F-67037 Strasbourg Cedex (France); Brosius, Richard [State University of New York at Buffalo (SUNY), Department of Physics, Buffalo, NY 14260-1500 (United States); Chramowicz, John [Fermi National Accelerator Laboratory, Batavia, IL 60510-0500 (United States); and others

    2013-12-21

    The CMS silicon pixel detector is the tracking device closest to the LHC p–p collisions, which precisely reconstructs the charged particle trajectories. The planar technology used in the current innermost layer of the pixel detector will reach the design limit for radiation hardness at the end of Phase I upgrade and will need to be replaced before the Phase II upgrade in 2020. Due to its unprecedented performance in harsh radiation environments, 3D silicon technology is under consideration as a possible replacement of planar technology for the High Luminosity-LHC or HL-LHC. 3D silicon detectors are fabricated by the Deep Reactive-Ion-Etching (DRIE) technique which allows p- and n-type electrodes to be processed through the silicon substrate as opposed to being implanted through the silicon surface. The 3D CMS pixel devices presented in this paper were processed at FBK. They were bump bonded to the current CMS pixel readout chip, tested in the laboratory, and testbeams carried out at FNAL with the proton beam of 120 GeV/c. In this paper we present the laboratory and beam test results for the irradiated 3D CMS pixel devices. -- Highlights: •Pre-irradiation and post-irradiation electrical properties of 3D sensors and 3D diodes from various FBK production batches were measured and analyzed. •I–T measurements of gamma irradiated diodes were analyzed to understand leakage current generation mechanism in 3D diodes. •Laboratory measurements: signal to noise ratio and charge collection efficiency of 3D sensors before and after irradiation. •Testbeam measurements: pre- and post-irradiation pixel cell efficiency and position resolution of 3D sensors.

  12. Algorithms for spectral calibration of energy-resolving small-pixel detectors

    International Nuclear Information System (INIS)

    Scuffham, J; Veale, M C; Wilson, M D; Seller, P

    2013-01-01

    Small pixel Cd(Zn)Te detectors often suffer from inter-pixel variations in gain, resulting in shifts in the individual energy spectra. These gain variations are mainly caused by inclusions and defects within the crystal structure, which affect the charge transport within the material causing a decrease in the signal pulse height. In imaging applications, spectra are commonly integrated over a particular peak of interest. This means that the individual pixels must be accurately calibrated to ensure that the same portion of the spectrum is integrated in every pixel. The development of large-area detectors with fine pixel pitch necessitates automated algorithms for this spectral calibration, due to the very large number of pixels. Algorithms for automatic spectral calibration require accurate determination of characteristic x-ray or photopeak positions on a pixelwise basis. In this study, we compare two peak searching spectral calibration algorithms for a small-pixel CdTe detector in gamma spectroscopic imaging. The first algorithm uses rigid search ranges to identify peaks in each pixel spectrum, based on the average peak positions across all pixels. The second algorithm scales the search ranges on the basis of the position of the highest-energy peak relative to the average across all pixels. In test spectra acquired with Tc-99m, we found that the rigid search algorithm failed to correctly identify the target calibraton peaks in up to 4% of pixels. In contrast, the scaled search algorithm failed in only 0.16% of pixels. Failures in the scaled search algorithm were attributed to the presence of noise events above the main photopeak, and possible non-linearities in the spectral response in a small number of pixels. We conclude that a peak searching algorithm based on scaling known peak spacings is simple to implement and performs well for the spectral calibration of pixellated radiation detectors

  13. Fully integrated CMOS pixel detector for high energy particles

    International Nuclear Information System (INIS)

    Vanstraelen, G.; Debusschere, I.; Claeys, C.; Declerck, G.

    1989-01-01

    A novel type of position and energy sensitive, monolithic pixel array with integrated readout electronics is proposed. Special features of the design are a reduction of the number of output channels and of the amount of output data, and the use of transistors on the high resistivity silicon. The number of output channels for the detector array is reduced by handling in parallel a number of pixels, chosen as a function of the time resolution required for the system, and by the use of an address decoder. A further reduction of data is achieved by reading out only those pixels which have been activated. The pixel detector circuit will be realized in a 3 μm p-well CMOS process, which is optimized for the full integration of readout electronics and detector diodes on high resistivity Si. A retrograde well is formed by means of a high energy implantation, followed by the appropriate temperature steps. The optimization of the well shape takes into account the high substrate bias applied during the detector operation. The design is largely based on the use of MOS transistors on the high resistivity silicon itself. These have proven to perform as well as transistors on standard doped substrate. The basic building elements as well as the design strategy of the integrated pixel detector are presented in detail. (orig.)

  14. X-ray imaging with photon counting hybrid semiconductor pixel detectors

    CERN Document Server

    Manolopoulos, S; Campbell, M; Snoeys, W; Heijne, Erik H M; Pernigotti, E; Raine, C; Smith, K; Watt, J; O'Shea, V; Ludwig, J; Schwarz, C

    1999-01-01

    Semiconductor pixel detectors, originally developed for particle physics experiments, have been studied as X-ray imaging devices. The performance of devices using the OMEGA 3 read-out chip bump-bonded to pixellated silicon semiconductor detectors is characterised in terms of their signal-to-noise ratio when exposed to 60 kVp X-rays. Although parts of the devices achieve values of this ratio compatible with the noise being photon statistics limited, this is not found to hold for the whole pixel matrix, resulting in the global signal-to-noise ratio being compromised. First results are presented of X-ray images taken with a gallium arsenide pixel detector bump-bonded to a new read-out chip, (MEDIPIX), which is a single photon counting read-out chip incorporating a 15-bit counter in every pixel. (author)

  15. Integration and installation of the CMS pixel barrel detector

    CERN Document Server

    Kastli, Hans-Christian

    2008-01-01

    A 66 million pixel detector has been installed in 2008 into the CMS experiment at CERN. The development and construction time took more than 10 years. In this paper the assembly of the barrel detector is described. A simple but effective method to accomplish a survey of the module positions during assembly is discussed. Furthermore the insertion and commissioning of the CMS pixel barrel detector which took place in July 2008 is illustrated.

  16. 14C autoradiography with an energy-sensitive silicon pixel detector.

    Science.gov (United States)

    Esposito, M; Mettivier, G; Russo, P

    2011-04-07

    The first performance tests are presented of a carbon-14 ((14)C) beta-particle digital autoradiography system with an energy-sensitive hybrid silicon pixel detector based on the Timepix readout circuit. Timepix was developed by the Medipix2 Collaboration and it is similar to the photon-counting Medipix2 circuit, except for an added time-based synchronization logic which allows derivation of energy information from the time-over-threshold signal. This feature permits direct energy measurements in each pixel of the detector array. Timepix is bump-bonded to a 300 µm thick silicon detector with 256 × 256 pixels of 55 µm pitch. Since an energetic beta-particle could release its kinetic energy in more than one detector pixel as it slows down in the semiconductor detector, an off-line image analysis procedure was adopted in which the single-particle cluster of hit pixels is recognized; its total energy is calculated and the position of interaction on the detector surface is attributed to the centre of the charge cluster. Measurements reported are detector sensitivity, (4.11 ± 0.03) × 10(-3) cps mm(-2) kBq(-1) g, background level, (3.59 ± 0.01) × 10(-5) cps mm(-2), and minimum detectable activity, 0.0077 Bq. The spatial resolution is 76.9 µm full-width at half-maximum. These figures are compared with several digital imaging detectors for (14)C beta-particle digital autoradiography.

  17. Vertex measurement at a hadron collider. The ATLAS pixel detector

    International Nuclear Information System (INIS)

    Grosse-Knetter, J.

    2008-03-01

    The ATLAS Pixel Detector is the innermost layer of the ATLAS tracking system and will contribute significantly to the ATLAS track and vertex reconstruction. The detector consists of identical sensor-chip-hybrid modules, arranged in three barrels in the centre and three disks on either side for the forward region. The position of the Pixel Detector near the interaction point requires excellent radiation hardness, fast read-out, mechanical and thermal robustness, good long-term stability, all combined with a low material budget. The new design concepts used to meet the challenging requirements are discussed with their realisation in the Pixel Detector, followed by a description of a refined and extensive set of measurements to assess the detector performance during and after its construction. (orig.)

  18. FED firmware interface testing with pixel phase 1 emulator

    CERN Document Server

    Kilpatrick, Matthew

    2017-01-01

    A hardware emulation of the CMS pixel detector phase 1 upgrade front-end electronics has been developed to test and validate the architecture of the back-end electronics (FED) firmware. The emulation is implemented on a Virtex 6 FPGA on the CERN GLIB uTCA platform, utilizing an 8-way SFP FPGA Mezzanine Card to drive compatible optical transmitters to the back-end electronics at 400 bps. The firmware emulates the complex functions of the phase 1 pixel readout chips (PSI46digv2 and PROC600) and token bit manager ASICs and allows for possible abnormalities that can occur in the output data stream. The emulation implements both fixed data patterns that are used as test vectors and realistic simulated data to drive the readout of the FED at the expected data and trigger rates. Testing software was developed to control the emulator and verify correct transmission of data and exception handling in the FED. An installation has been integrated into the pixel DAQ test system at CMS to be used for fast validation of F...

  19. FED firmware interface testing with pixel phase 1 emulator

    CERN Document Server

    Kilpatrick, Matthew

    2018-01-01

    A hardware emulation of the CMS pixel detector phase 1 upgrade front-end electronics has been developed to test and validate the architecture of the back-end electronics (FED) firmware. The emulation is implemented on a Virtex 6 FPGA on the CERN GLIB uTCA platform, utilizing an 8-way SFP FPGA Mezzanine Card to drive compatible optical transmitters to the back-end electronics at 400 bps. The firmware emulates the complex functions of the phase 1 pixel readout chips (PSI46digv2 and PROC600) and token bit manager ASICs and allows for possible abnormalities that can occur in the output data stream. The emulation implements both fixed data patterns that are used as test vectors and realistic simulated data to drive the readout of the FED at the expected data and trigger rates. Testing software was developed to control the emulator and verify correct transmission of data and exception handling in the FED. An installation has been integrated into the pixel DAQ test system at CMS to be used for fast validation of F...

  20. Developing fine-pixel CdTe detectors for the next generation of high-resolution hard x-ray telescopes

    Science.gov (United States)

    Christe, Steven

    -based detector system through the (1) design, manufacture, and test of front-end electronics instrument boards and (2) calibration of the detectors to assess their performance and (3) vibration and environmental testing. By the end of this program, multiple detector assemblies will be built and characterized, and can be used as part of future instruments. We propose to augment the existing effort with the development of an anti-coincidence shield for these HEXITEC-based detector assemblies to maximize sensitivity. Designing the anti-coincidence shield is enabled by the addition of a new team member, Wayne Baumgartner, who has recently and fortuitously joined the existing effort. Dr. Baumgartner has valuable and relevant past experience with a similar shield systems developed for NuSTAR and the InFOCμS x-ray telescope. We are asking for a modest amount of additional funding in this proposal year, as it coincides with a key time in the characterization and environmental testing of the detector assemblies. Characterization and environmental testing of the bare assemblies is already funded under the current effort. The addition of this active shield will allow for a more complete detector module vibration and environment test at the end of the existing development program so that this project results in a detector system with a demonstrated TRL of 6: "System/subsystem model or prototype demonstration in a relevant environment."

  1. A Prototype of a New Generation Readout ASIC in 65 nm CMOS for Pixel Detectors at HL-LHC

    CERN Document Server

    Pacher, L.; Paternò, A; Panati, S; Demaria, L; Rivetti, A; Da Rocha Rolo, M; Dellacasa, G; Mazza, G; Rotondo, F; Wheadon, R; Loddo, F; Licciulli, F; Ciciriello, F; Marzocca, C; Gaioni, L; Traversi, G; Re, V; De Canio, F; Ratti, L; Marconi, S; Placidi, P; Magazzù, G; Stabile, A; Mattiazzo, S

    2018-01-01

    The prototype is composed of a matrix of 64×64 pixels with 50 μm × 50 μm cells featuring a compact design, low-noise and low-power performance. The pixel array integrates two diffe- rent analogue front-end architectures working in parallel, one with asynchronous and one with synchronous hit discriminators. Common characteristics are a compact layout able to fit int...

  2. Technological aspects of gaseous pixel detectors fabrication

    NARCIS (Netherlands)

    Blanco Carballo, V.M.; Salm, Cora; Smits, Sander M.; Schmitz, Jurriaan; Melai, J.; Chefdeville, M.A.; van der Graaf, H.

    2007-01-01

    Integrated gaseous pixel detectors consisting of a metal punctured foil suspended in the order of 50μm over a pixel readout chip by means by SU-8 insulating pillars have been fabricated. SU-8 is used as sacrificial layer but metallization over uncrosslinked SU-8 presents adhesion and stress

  3. BORA: a front end board, with local intelligence, for the RICH detector of the Compass Collaboration

    International Nuclear Information System (INIS)

    Baum, G.; Birsa, R.; Bradamante, F.; Bressan, A.; Colavita, A.; Crespo, M.; Costa, S.; Dalla Torre, S.; Fauland, P.; Finger, M.; Fratnik, F.; Giorgi, M.; Gobbo, B.; Grasso, A.; Lamanna, M.; Martin, A.; Menon, G.; Panzieri, D.; Schiavon, P.; Tessarotto, F.; Zanetti, A.M.

    1999-01-01

    In this paper we describe the design of the re-configurable front-end boards (BORA boards) for the 82944 channel RICH-1 (Ring Imaging CHerenkov) of the Compass Collaboration (NA58). The front-end electronics controls the sample-and-hold operation after the arrival of an event trigger, acquires the analog voltages from the pre-amp VLSI and converts them into 10 bits at a rate of 20 Ms/s per analog channel. The digitized analogue values are then written into FIFOs. A subsequent operation compares the readings of each and every channel with corresponding programmable thresholds, and transmits those values larger than the threshold, together with the channel number, through an optical fiber to subsequent processing stages of the acquisition system. The overall operation of the board is controlled and supervised by a fast DSP. The availability of local intelligence allows the board to present innovative features such as: to be part of a computer network that connects several similar boards of the detector with a PC. The presence of the DSP allows testing the operability and linearity of the analog channels; and creating engineering frames containing local temperatures and voltages and transmitting the results through the network. The operator can reconfigure the hardware and software of the board by downloading programs from the PC

  4. BORA: A front end board, with local intelligence, for the rich detector of the compass collaboration

    International Nuclear Information System (INIS)

    Baum, G.; Birsa, R.; Bradamante, F.

    1999-02-01

    In this paper we describe the design of the re-configurable front-end boards (BORA boards) for the 82944 channel RICH-1 (Ring Imaging CHerenkov) of the Compass Collaboration (NA58). The front-end electronics controls the sample-and-hold operation after the arrival of an event trigger, acquires the analogue voltages from the pre-amp VLSI and converts them into 10 bits at a rate of 20 Ms/s per analogue channel. After the analog values are digitized they are written into FIFOs. A subsequent operation compares the readings of each and every channel with corresponding programmable thresholds, and transmits those values larger than the threshold, together with the channel number, through an optical fiber to subsequent processing stages of the acquisition system. The overall operation of the board is controlled and supervised by a fast DSP. The availability of local intelligence allows the board to present innovative features such as: to be part of a computer network that connects several similar boards of the detector with a PC. The presence of the DSP allows testing the operability and linearity of the analogue channels; and creating engineering frames containing local temperatures and voltages and transmitting the results through the network. The operator can reconfigure the hardware and software of the board by downloading programs from the PC. (author)

  5. A 65 nm CMOS analog processor with zero dead time for future pixel detectors

    Energy Technology Data Exchange (ETDEWEB)

    Gaioni, L., E-mail: luigi.gaioni@unibg.it [Università di Bergamo, I-24044 Dalmine (Italy); INFN, Sezione di Pavia, I-27100 Pavia (Italy); Braga, D.; Christian, D.C.; Deptuch, G.; Fahim, F. [Fermi National Accelerator Laboratory, Batavia IL (United States); Nodari, B. [Università di Bergamo, I-24044 Dalmine (Italy); INFN, Sezione di Pavia, I-27100 Pavia (Italy); Centre National de Recherche Scientifique, APC/IN2P3, Paris (France); Ratti, L. [Università di Pavia, I-27100 Pavia (Italy); INFN, Sezione di Pavia, I-27100 Pavia (Italy); Re, V. [Università di Bergamo, I-24044 Dalmine (Italy); INFN, Sezione di Pavia, I-27100 Pavia (Italy); Zimmerman, T. [Fermi National Accelerator Laboratory, Batavia IL (United States)

    2017-02-11

    Next generation pixel chips at the High-Luminosity (HL) LHC will be exposed to extremely high levels of radiation and particle rates. In the so-called Phase II upgrade, ATLAS and CMS will need a completely new tracker detector, complying with the very demanding operating conditions and the delivered luminosity (up to 5×10{sup 34} cm{sup −2} s{sup −1} in the next decade). This work is concerned with the design of a synchronous analog processor with zero dead time developed in a 65 nm CMOS technology, conceived for pixel detectors at the HL-LHC experiment upgrades. It includes a low noise, fast charge sensitive amplifier featuring a detector leakage compensation circuit, and a compact, single ended comparator that guarantees very good performance in terms of channel-to-channel dispersion of threshold without needing any pixel-level trimming. A flash ADC is exploited for digital conversion immediately after the charge amplifier. A thorough discussion on the design of the charge amplifier and the comparator is provided along with an exhaustive set of simulation results.

  6. The Majorana Low-noise Low-background Front-end Electronics

    Science.gov (United States)

    Abgrall, N.; Aguayo, E.; Avignone, F. T.; Barabash, A. S.; Bertrand, F. E.; Boswell, M.; Brudanin, V.; Busch, M.; Byram, D.; Caldwell, A. S.; Chan, Y.-D.; Christofferson, C. D.; Combs, D. C.; Cuesta, C.; Detwiler, J. A.; Doe, P. J.; Efremenko, Yu.; Egorov, V.; Ejiri, H.; Elliott, S. R.; Fast, J. E.; Finnerty, P.; Fraenkle, F. M.; Galindo-Uribarri, A.; Giovanetti, G. K.; Goett, J.; Green, M. P.; Gruszko, J.; Guiseppe, V. E.; Gusev, K.; Hallin, A. L.; Hazama, R.; Hegai, A.; Henning, R.; Hoppe, E. W.; Howard, S.; Howe, M. A.; Keeter, K. J.; Kidd, M. F.; Kochetov, O.; Konovalov, S. I.; Kouzes, R. T.; LaFerriere, B. D.; Leon, J.; Leviner, L. E.; Loach, J. C.; MacMullin, J.; MacMullin, S.; Martin, R. D.; Meijer, S.; Mertens, S.; Nomachi, M.; Orrell, J. L.; O'Shaughnessy, C.; Overman, N. R.; Phillips, D. G.; Poon, A. W. P.; Pushkin, K.; Radford, D. C.; Rager, J.; Rielage, K.; Robertson, R. G. H.; Romero-Romero, E.; Ronquest, M. C.; Schubert, A. G.; Shanks, B.; Shima, T.; Shirchenko, M.; Snavely, K. J.; Snyder, N.; Suriano, A. M.; Thompson, J.; Timkin, V.; Tornow, W.; Trimble, J. E.; Varner, R. L.; Vasilyev, S.; Vetter, K.; Vorren, K.; White, B. R.; Wilkerson, J. F.; Wiseman, C.; Xu, W.; Yakushev, E.; Young, A. R.; Yu, C.-H.; Yumatov, V.

    The MAJORANA DEMONSTRATOR will search for the neutrinoless double beta decay (ββ(0ν)) of the isotope 76Ge with a mixed array of enriched and natural germanium detectors. In view of the next generation of tonne-scale germanium-based ββ(0ν)-decay searches, a major goal of the MAJORANA DEMONSTRATOR is to demonstrate a path forward to achieving a background rate at or below 1 cnt/(ROI-t-y) in the 4 keV region of interest (ROI) around the 2039-keV Q-value of the 76Ge ββ(0ν)-decay. Such a requirement on the background level significantly constrains the design of the readout electronics, which is further driven by noise and energy resolution performances. We present here the low-noise low- background front-end electronics developed for the low-capacitance p-type point contact (P-PC) germanium detectors of the MAJORANA DEMONSTRATOR. This resistive-feedback front-end, specifically designed to have low mass, is fabricated on a radioassayed fused-silica substrate where the feedback resistor consists of a sputtered thin film of high purity amorphous germanium and the feedback capacitor is based on the capacitance between gold conductive traces.

  7. Prototype of the front-end circuit for the GOSSIP (Gas On Slimmed Silicon Pixel) chip in the 0.13 μm CMOS technology

    CERN Document Server

    Gromov, V; van der Graaf, H

    2007-01-01

    The new GOSSIP detector, capable to detect single electrons in gas, has certain advantages with respect silicon (pixel) detectors. It does not require a Si sensor; it has a very low detector parasitic capacitance and a zero bias current at the pixel input. These are attractive features to design a compact, low-noise and low-power integrated input circuit. A prototype of the integrated circuit has been developed in 0.13 μm CMOS technology. It includes a few channels equipped with preamplifier, discriminator and the digital circuit to study the feasibility of the TDC-perpixel concept. The design demonstrates very low input referred noise (60e- RMS) in combination with a fast peaking time (40 ns) and an analog power dissipation as low as 2 μW per channel. Switching activity on the clock bus (up to 100 MHz) in the close vicinity of the pixel input pads does not cause noticeable extra noise.

  8. Modeling Radiation Damage to Pixel Sensors in the ATLAS Detector

    CERN Document Server

    Nachman, Benjamin Philip; The ATLAS collaboration

    2017-01-01

    Silicon Pixel detectors are at the core of the current and planned upgrade of the ATLAS detector. As the detector in closest proximity to the interaction point, these detectors will be subjected to a significant amount of radiation over their lifetime: prior to the HL-LHC, the innermost layers will receive a fluence in excess of $10^{15}$ 1 MeV $n_\\mathrm{eq}/\\mathrm{cm}^2$ and the HL-LHC detector upgrades must cope with an order of magnitude higher fluence integrated over their lifetimes. This talk presents a digitization model that includes radiation damage effects to the ATLAS Pixel sensors for the first time. After a thorough description of the setup, predictions for basic Pixel cluster properties are presented alongside first validation studies with Run 2 collision data.

  9. Hybrid circuit prototypes for the CMS Tracker upgrade front-end electronics

    International Nuclear Information System (INIS)

    Blanchot, G; Honma, A; Kovacs, M; Braga, D; Raymond, M

    2013-01-01

    New high-density interconnect hybrid circuits are under development for the CMS tracker modules at the HL-LHC. These hybrids will provide module connectivity between flip-chip front-end ASICs, strip sensors and a service board for the data transmission and powering. Rigid organic-based substrate prototypes and also a flexible hybrid design have been built, containing up to eight front-end flip chip ASICs. A description of the function of the hybrid circuit in the tracker, the first prototype designs, results of some electrical and mechanical properties from the prototypes, and examples of the integration of the hybrids into detector modules are presented

  10. Next generation of optical front-ends for numerical services - 15387

    International Nuclear Information System (INIS)

    Fullenbaum, M.; Durieux, A.; Dubroca, G.; Fuss, P.

    2015-01-01

    Visual Inspection and surveillance technology means in environments exhibiting high levels of gamma and neutron radiation are nowadays fulfilled through the use of analog tubes. The images are thus acquired with analog devices whose vast majority relies on 1 and 2/3 inch imaging formats and deliver native analog images. There is a growing demand for real time image processing and distribution through Ethernet services for quicker and seamless process integration throughout many sectors. This will call for the inception of solid state sensor (CCD, CMOS) to generate numerical native images as the first step and building block towards end to end numerical processing (ICT), assuming these sensors can be hardened or protected in the field of the nuclear industry. On the one hand, these sensor sizes will be significantly reduced (by a factor of 2-3) versus those of the tubes, and on the other hand, one will also be presented with the opportunity of increased spatial resolution, stemming from the high pixel count of the solid state technology, for implementation of new or better services or of enhanced pieces of information for decision making purposes. In order to reap the benefits of such sensors, new optical front-ends will have to be designed. Over and beyond the mere aspects of matching the reduced sensor size to the size of the scenes at stake, optical performances of these front-end will also bear an impact on the whole optical chain applications. As an example, detection and tracking needs will be different from a performance standpoint and the overall performances will have to be balanced out in between the optical front-end, the image format, the image processing software capability, processing speed,...just to name a few. In this paper we will review and explain the missing gaps in order to switch to a full numerical optical chain by focusing on the optical front-end and the associated cost trade-offs. Finally, we will conclude by clearly stating the best

  11. Front-end electronics and readout system for the ILD TPC

    CERN Document Server

    Hedberg, V; Lundberg, B; Mjörnmark, U; Oskarsson, A; Österman, L; De Lentdecker, G; Yang, Y; Zhang, F

    2015-01-01

    A high resolution TPC is the main option for a central tracking detector at the future International Linear Collider (ILC). It is planned that the MPGD (Micro Pattern Gas Detector) technology will be used for the readout. A Large Prototype TPC at DESY has been used to test the performance of MPGDs in an electron beam of energies up to 6 GeV. The first step in the technology development was to demonstrate that the MPGDs are able to achieve the necessary performance set by the goals of ILC. For this ’proof of principle’ phase, the ALTRO front-end electronics from the ALICE TPC was used, modified to adapt to MPGD readout. The proof of principle has been verified and at present further improvement of the MPGD technology is going on, using the same readout electronics. The next step is the ’feasibility phase’, which aims at producing front-end electronics comparable in size (few mm2) to the readout pads of the TPC. This development work is based on the succeeding SALTRO16 chip, which combines the analogue ...

  12. Low-cost bump-bonding processes for high energy physics pixel detectors

    CERN Document Server

    AUTHOR|(CDS)2069357; Blank, Thomas; Colombo, Fabio; Dierlamm, Alexander Hermann; Husemann, Ulrich; Kudella, Simon; Weber, M

    2016-01-01

    In the next generation of collider experiments detectors will be challenged by unprecedented particle fluxes. Thus large detector arrays of highly pixelated detectors with minimal dead area will be required at reasonable costs. Bump-bonding of pixel detectors has been shown to be a major cost-driver. KIT is one of five production centers of the CMS barrel pixel detector for the Phase I Upgrade. In this contribution the SnPb bump-bonding process and the production yield is reported. In parallel to the production of the new CMS pixel detector, several alternatives to the expensive photolithography electroplating/electroless metal deposition technologies are developing. Recent progress and challenges faced in the development of bump-bonding technology based on gold-stud bonding by thin (15 μm) gold wire is presented. This technique allows producing metal bumps with diameters down to 30 μm without using photolithography processes, which are typically required to provide suitable under bump metallization. The sh...

  13. Construction and Tests of Modules for the ATLAS Pixel Detector

    CERN Document Server

    AUTHOR|(CDS)2068490

    2003-01-01

    The ATLAS Pixel Detector is the innermost layer of the ATLAS tracking system and will contribute significantly to the ATLAS track and vertex reconstruction. The detector consists of identical sensor-chip-hybrid modules, arranged in three barrels in the centre and three disks on either side for the forward region. The position of the pixel detector near the interaction point requires excellent radiation hardness, mechanical and thermal robustness, good long-term stability, all combined with a low material budget. The pre-production phase of such pixel modules has nearly finished, yielding fully functional modules. Results are presented of tests with these modules.

  14. Detector Modules for the CMS Pixel Phase 1 Upgrade

    CERN Document Server

    Zhu, De Hua; Berger, Pirmin; Meinhard, Maren Tabea; Starodumov, Andrey; Tavolaro, Vittorio Raoul

    2017-01-01

    The CMS Pixel phase 1 upgrade detector consists of 1184 modules with new design. An important part of the production is the module qualification and calibration, ensuring their proper functionality within the detector. This paper summarizes the qualification and calibration results of modules used in the innermost two detector layers with focus on methods using module-internal calibration signals. Extended characterizations on pixel level such as electronic noise and bump bond connectivity, optimization of operational parameters, sensor quality and thermal stress resistance were performed using a customized setup with controlled environment. It could be shown that the selected modules have on average $0.55 \\mathrm{ {}^{0\\!}\\!/\\!_{00} }\\, \\pm \\, 0.01 \\mathrm{ {}^{0\\!}\\!/\\!_{00} }\\,$ defective pixels and that all performance parameters stay within their specifications.

  15. Synchrotron applications of pixel and strip detectors at Diamond Light Source

    International Nuclear Information System (INIS)

    Marchal, J.; Tartoni, N.; Nave, C.

    2009-01-01

    A wide range of position-sensitive X-ray detectors have been commissioned on the synchrotron X-ray beamlines operating at the Diamond Light Source in UK. In addition to mature technologies such as image-plates, CCD-based detectors, multi-wire and micro-strip gas detectors, more recent detectors based on semiconductor pixel or strip sensors coupled to CMOS read-out chips are also in use for routine synchrotron X-ray diffraction and scattering experiments. The performance of several commercial and developmental pixel/strip detectors for synchrotron studies are discussed with emphasis on the image quality achieved with these devices. Examples of pixel or strip detector applications at Diamond Light Source as well as the status of the commissioning of these detectors on the beamlines are presented. Finally, priorities and ideas for future developments are discussed.

  16. Construction and commissioning of the Phase 1 upgrade of the CMS pixel detector

    CERN Document Server

    Bartek, Rachel

    2017-01-01

    The Phase 1 upgrade of the CMS pixel detector, installed by the CMS collaboration during the recent extended end-of-year technical stop, is built out of four barrel layers (BPIX) and three forward disks in each endcap (FPIX). It comprises a total of 124M pixel channels, in 1,856 modules and it is designed to withstand instantaneous luminosities of up to $2 \\rm{x} 10^{34} \\rm{cm}^{-2} \\rm{s}^{-1}$ with increased detector acceptance and additional redundancy for the tracking, while at the same time reducing the material budget. These goals are achieved using a new readout chip and modified powering and readout schemes, one additional tracking layer both in the barrel and in the disks, and new detector supports including a $\\rm{CO}_2$ based evaporative cooling system. Different parts of the detector have been assembled over the last year and later brought to CERN for installation inside the CMS tracker. At various stages during the assembly tests have been performed to ensure that the readout and power electro...

  17. Results from the commissioning of the ATLAS Pixel Detector

    CERN Document Server

    Masetti, L

    2008-01-01

    The Pixel Detector is the innermost detector of the ATLAS experiment at the Large Hadron Collider at CERN. It is an 80 million channel silicon tracking system designed to detect charged tracks and secondary vertices with very high precision. After connection of cooling and services and verification of their operation, the ATLAS Pixel Detector is now in the final stage of its commissioning phase. Calibration of optical connections, verification of the analog performance and special DAQ runs for noise studies have been performed and the first tracks in combined operation with the other subdetectors of the ATLAS Inner Detector were observed. The results from calibration tests on the whole detector and from cosmic muon data are presented.

  18. Charge collection and absorption-limited x-ray sensitivity of pixellated x-ray detectors

    International Nuclear Information System (INIS)

    Kabir, M. Zahangir; Kasap, S.O.

    2004-01-01

    The charge collection and absorption-limited x-ray sensitivity of a direct conversion pixellated x-ray detector operating in the presence of deep trapping of charge carriers is calculated using the Shockley-Ramo theorem and the weighting potential of the individual pixel. The sensitivity of a pixellated x-ray detector is analyzed in terms of normalized parameters; (a) the normalized x-ray absorption depth (absorption depth/photoconductor thickness), (b) normalized pixel width (pixel size/thickness), and (c) normalized carrier schubwegs (schubweg/thickness). The charge collection and absorption-limited sensitivity of pixellated x-ray detectors mainly depends on the transport properties (mobility and lifetime) of the charges that move towards the pixel electrodes and the extent of dependence increases with decreasing normalized pixel width. The x-ray sensitivity of smaller pixels may be higher or lower than that of larger pixels depending on the rate of electron and hole trapping and the bias polarity. The sensitivity of pixellated detectors can be improved by ensuring that the carrier with the higher mobility-lifetime product is drifted towards the pixel electrodes

  19. Test su fascio di prototipi del rivelatore a pixel per l'esperimento ATLAS

    CERN Document Server

    Matera, Andrea; Andreazza, A

    2005-01-01

    Silicon pixel detectors, developed to meet LHC requirements, were tested within the ATLAS collaboration in the H8 beam at CERN. Different sensor designs were studied using various versions of front end electronics developed during the R&D process. In this thesis a detailed experimental study of the overall performance of both irradiated and unirradiated detectors is presented, with special enphasis on efficiency, charge collection and spatial resolution. For the first time their dependence on timewalk is carefully investigated. Possible solutions to avoid spatial resolution deterioration due to timewalk are presented and discussed.

  20. High-speed readout of high-Z pixel detectors with the LAMBDA detector

    International Nuclear Information System (INIS)

    Pennicard, D.; Smoljanin, S.; Sheviakov, I.; Xia, Q.; Rothkirch, A.; Yu, Y.; Struth, B.; Hirsemann, H.; Graafsma, H.

    2014-01-01

    High-frame-rate X-ray pixel detectors make it possible to perform time-resolved experiments at synchrotron beamlines, and to make better use of these sources by shortening experiment times. LAMBDA is a photon-counting hybrid pixel detector based on the Medipix3 chip, designed to combine a small pixel size of 55 μm, a large tileable module design, high speed, and compatibility with ''high-Z'' sensors for hard X-ray detection. This technical paper focuses on LAMBDA's high-speed-readout functionality, which allows a frame rate of 2000 frames per second with no deadtime between successive images. This takes advantage of the Medipix3 chip's ''continuous read-write'' function and highly parallelised readout. The readout electronics serialise this data and send it back to a server PC over two 10 Gigabit Ethernet links. The server PC controls the detector and receives, processes and stores the data using software designed for the Tango control system. As a demonstration of high-speed readout of a high-Z sensor, a GaAs LAMBDA detector was used to make a high-speed X-ray video of a computer fan

  1. Monolithic pixel detectors in a 0.13μm CMOS technology with sensor level continuous time charge amplification and shaping

    International Nuclear Information System (INIS)

    Ratti, L.; Manghisoni, M.; Re, V.; Speziali, V.; Traversi, G.; Bettarini, S.; Calderini, G.; Cenci, R.; Giorgi, M.; Forti, F.; Morsani, F.; Rizzo, G.

    2006-01-01

    This work studies the feasibility of a new implementation of CMOS monolithic active pixel sensors (MAPS) for applications to charged particle tracking. As compared to standard three MOSFET MAPS, where the charge signal is readout by a source follower, the proposed front-end scheme relies upon a charge sensitive amplifier (CSA), embedded in the elementary pixel cell, to perform charge-to-voltage conversion. The area required for the integration of the front-end electronics is mostly provided by the collecting electrode, which consists of a deep n-type diffusion, available as a shielding frame for n-channel devices in deep submicron, triple well CMOS technologies. Based on the above concept, a chip, which includes several test structures differing in the sensitive element area, has been fabricated in a 0.13μm CMOS process. In this paper, the criteria underlying the design of the pixel level analog processor will be presented, together with some preliminary experimental results demonstrating the feasibility of the proposed approach

  2. Studies on a 300 k pixel detector telescope

    Science.gov (United States)

    Middelkamp, Peter; Antinori, F.; Barberis, D.; Becks, K. H.; Beker, H.; Beusch, W.; Burger, P.; Campbell, M.; Cantatore, E.; Catanesi, M. G.; Chesi, E.; Darbo, G.; D'Auria, S.; Davia, C.; di Bari, D.; di Liberto, S.; Elia, D.; Gys, T.; Heijne, E. H. M.; Helstrup, H.; Jacholkowski, A.; Jæger, J. J.; Jakubek, J.; Jarron, P.; Klempt, W.; Krummenacher, F.; Knudson, K.; Kralik, I.; Kubasta, J.; Lasalle, J. C.; Leitner, R.; Lemeilleur, F.; Lenti, V.; Letheren, M.; Lopez, L.; Loukas, D.; Luptak, M.; Martinengo, P.; Meddeler, G.; Meddi, F.; Morando, M.; Munns, A.; Pellegrini, F.; Pengg, F.; Pospisil, S.; Quercigh, E.; Ridky, J.; Rossi, L.; Safarik, K.; Scharfetter, L.; Segato, G.; Simone, S.; Smith, K.; Snoeys, W.; Vrba, V.

    1996-02-01

    Four silicon pixel detector planes are combined to form a tracking telescope in the lead ion experiment WA97 at CERN with 290 304 sensitive elements each of 75 μm by 500 μm area. An electronic pulse processing circuit is associated with each individual sensing element and the response for ionizing particles is binary with an adjustable threshold. The noise rate for a threshold of 6000 e- has been measured to be less than 10-10. The inefficient area due to malfunctioning pixels is 2.8% of the 120 cm2. Detector overlaps within one plane have been used to determine the alignment of the components of the plane itself, without need for track reconstruction using external detectors. It is the first time that such a big surface covered with active pixels has been used in a physics experiment. Some aspects concerning inclined particle tracks and time walk have been measured separately in a beam test at the CERN SPS H6 beam.

  3. Studies on a 300 k pixel detector telescope

    International Nuclear Information System (INIS)

    Middelkamp, P.; Antinori, F.; Barberis, D.

    1996-01-01

    Four silicon pixel detector planes are combined to form a tracking telescope in the lead ion experiment WA97 at CERN with 290 304 sensitive elements each of 75 μm by 500 μm area. An electronic pulse processing circuit is associated with each individual sensing element and the response for ionizing particles is binary with an adjustable threshold. The noise rate for a threshold of 6000 e - has been measured to be less than 10 -10 . The inefficient area due to malfunctioning pixels is 2.8% of the 120 cm 2 . Detector overlaps within one plane have been used to determine the alignment of the components of the plane itself, without need for track reconstruction using external detectors. It is the first time that such a big surface covered with active pixels has been used in a physics experiment. Some aspects concerning inclined particle tracks and time walk have been measured separately in a beam test at the CERN SPS H6 beam. (orig.)

  4. Gamma Spectroscopy with Pixellated CdZnTe Gamma Detectors

    International Nuclear Information System (INIS)

    Shor, A.; Mardor, I.; Eisen, Y.

    2002-01-01

    Pixellated CdZnTe detectors are good candidates for room temperature gamma detection requiring spectroscopic performance with imaging capabilities. The CdZnTe materials possess high resistivity and good electron charge transport properties. The poor charge transport for the holes inherent in the CdZnTe material can be circumvented by fabricating the electrodes in any one of a number of structures designed for unipolar charge detection[1]. Recent interest in efficient gamma detection at relatively higher gamma energies has imposed more stringent demands on the CdZnTe material and on detector design and optimization. We developed at Soreq a technique where signals from all pixels and from the common electrode are processed, and then a correction is applied for improving the energy resolution and the photopeak efficiency. For illumination with an un-collimated 133 Ba source , we obtain a combined detector energy resolution of 5.0 % FWHM for the 81 keV peak, and 1.5 % FWHM for the 356 keV peak. We discuss the importance of detector material with high electron (μτ) e for thick Pixellated detectors

  5. Modeling Radiation Damage to Pixel Sensors in the ATLAS Detector

    CERN Document Server

    Ducourthial, Audrey; The ATLAS collaboration

    2017-01-01

    Silicon pixel detectors are at the core of the current and planned upgrade of the ATLAS detector at the Large Hadron Collider (LHC). As the closest detector component to the interaction point, these detectors will be subjected to a significant amount of radiation over their lifetime: prior to the High-Luminosity LHC (HL-LHC), the innermost layers will receive a fluence in excess of $10^{15} n_{eq}/cm^2$ and the HL-HLC detector upgrades must cope with an order of magnitude higher fluence integrated over their lifetimes. Simulating radiation damage is critical in order to make accurate predictions for current future detector performance that will enable searches for new particles and forces as well as precision measurements of Standard Model particles such as the Higgs boson. We present a digitization model that includes radiation damage effects to the ATLAS pixel sensors for the first time. In addition to thoroughly describing the setup, we present first predictions for basic pixel cluster properties alongside...

  6. Modeling radiation damage to pixel sensors in the ATLAS detector

    CERN Document Server

    Ducourthial, Audrey; The ATLAS collaboration

    2017-01-01

    Silicon pixel detectors are at the core of the current and planned upgrade of the ATLAS detector at the Large Hadron Collider (LHC). As the closest detector component to the interaction point, these detectors will be subjected to a significant amount of radiation over their lifetime: prior to the High-Luminosity LHC (HL-LHC), the innermost layers will receive a fluence in excess of $10^{15}n_{eq}/cm^2$ and the HL-HLC detector upgrades must cope with an order of magnitude higher fluence integrated over their lifetimes. Simulating radiation damage is critical in order to make accurate predictions for current future detector performance that will enable searches for new particles and forces as well as precision measurements of Standard Model particles such as the Higgs boson. We present a digitization model that includes radiation damage effects to the ATLAS pixel sensors for the first time. In addition to thoroughly describing the setup, we present first predictions for basic pixel cluster properties alongside ...

  7. Geneva University: Pixel Detectors – trends and options for the future

    CERN Multimedia

    Geneva University

    2012-01-01

    GENEVA UNIVERSITY École de physique Département de physique nucléaire et corspusculaire 24, quai Ernest-Ansermet 1211 Genève 4 Tél.: (022) 379 62 73 Fax: (022) 379 69 92   Wednesday 25 April 2012 SEMINAIRE DE PHYSIQUE CORPUSCULAIRE Science III, Auditoire 1S081 30Science III, Auditoire 1S081 30 Pixel Detectors – trends and options for the future Prof. Norbert Wermes - University of Bonn  Pixel detectors have been invented in the early 90s with the advancement of micro technologies. With the advent of the LHC, big vertex detectors have demonstrated that the pixel detector type is holding many of the promises it had made before. Meanwhile new, different or just improved variants of the pixel technology are being studied for their suitability for future experiments or experiment upgrades. The talk will address the various pro's and con's comparing hybrid and monolithic pixel technologies and their su...

  8. X-ray micro-beam characterization of a small pixel spectroscopic CdTe detector

    Science.gov (United States)

    Veale, M. C.; Bell, S. J.; Seller, P.; Wilson, M. D.; Kachkanov, V.

    2012-07-01

    A small pixel, spectroscopic, CdTe detector has been developed at the Rutherford Appleton Laboratory (RAL) for X-ray imaging applications. The detector consists of 80 × 80 pixels on a 250 μm pitch with 50 μm inter-pixel spacing. Measurements with an 241Am γ-source demonstrated that 96% of all pixels have a FWHM of better than 1 keV while the majority of the remaining pixels have FWHM of less than 4 keV. Using the Diamond Light Source synchrotron, a 10 μm collimated beam of monochromatic 20 keV X-rays has been used to map the spatial variation in the detector response and the effects of charge sharing corrections on detector efficiency and resolution. The mapping measurements revealed the presence of inclusions in the detector and quantified their effect on the spectroscopic resolution of pixels.

  9. The hardware of the ATLAS Pixel Detector Control System

    International Nuclear Information System (INIS)

    Henss, T; Andreani, A; Boek, J; Boyd, G; Citterio, M; Einsweiler, K; Kersten, S; Kind, P; Lantzsch, K; Latorre, S; Maettig, P; Meroni, C; Sabatini, F; Schultes, J

    2007-01-01

    The innermost part of the ATLAS (A Toroidal LHC ApparatuS) experiment, which is currently under construction at the LHC (Large Hadron Collider), will be a silicon pixel detector comprised of 1744 individual detector modules. To operate these modules, the readout electronics, and other detector components, a complex power supply and control system is necessary. The specific powering and control requirements, as well as the custom made components of our power supply and control systems, are described. These include remotely programmable regulator stations, the power supply system for the optical transceivers, several monitoring units, and the Interlock System. In total, this comprises the Pixel Detector Control System (DCS)

  10. Tracking performance of a single-crystal and a polycrystalline diamond pixel-detector

    Energy Technology Data Exchange (ETDEWEB)

    Menasce, D.; et al.

    2013-06-01

    We present a comparative characterization of the performance of a single-crystal and a polycrystalline diamond pixel-detector employing the standard CMS pixel readout chips. Measurements were carried out at the Fermilab Test Beam Facility, FTBF, using protons of momentum 120 GeV/c tracked by a high-resolution pixel telescope. Particular attention was directed to the study of the charge-collection, the charge-sharing among adjacent pixels and the achievable position resolution. The performance of the single-crystal detector was excellent and comparable to the best available silicon pixel-detectors. The measured average detection-efficiency was near unity, ε = 0.99860±0.00006, and the position-resolution for shared hits was about 6 μm. On the other hand, the performance of the polycrystalline detector was hampered by its lower charge collection distance and the readout chip threshold. A new readout chip, capable of operating at much lower threshold (around 1 ke$-$), would be required to fully exploit the potential performance of the polycrystalline diamond pixel-detector.

  11. Angular resolution of the gaseous micro-pixel detector Gossip

    Science.gov (United States)

    Bilevych, Y.; Blanco Carballo, V.; van Dijk, M.; Fransen, M.; van der Graaf, H.; Hartjes, F.; Hessey, N.; Koppert, W.; Nauta, S.; Rogers, M.; Romaniouk, A.; Veenhof, R.

    2011-06-01

    Gossip is a gaseous micro-pixel detector with a very thin drift gap intended for a high rate environment like at the pixel layers of ATLAS at the sLHC. The detector outputs not only the crossing point of a traversing MIP, but also the angle of the track, thus greatly simplifying track reconstruction. In this paper we describe a testbeam experiment to examine the angular resolution of the reconstructed track segments in Gossip. We used here the low diffusion gas mixture DME/CO 2 50/50. An angular resolution of 20 mrad for perpendicular tracks could be obtained from a 1.5 mm thin drift volume. However, for the prototype detector used at the testbeam experiment, the resolution of slanting tracks was worsened by poor time resolution of the pixel chip used.

  12. Angular resolution of the gaseous micro-pixel detector Gossip

    Energy Technology Data Exchange (ETDEWEB)

    Bilevych, Y.; Blanco Carballo, V.; Dijk, M. van; Fransen, M.; Graaf, H. van der; Hartjes, F.; Hessey, N.; Koppert, W.; Nauta, S. [Nikhef, P.O. Box 41882, 1009 DB Amsterdam (Netherlands); Rogers, M. [Radboud University, P.O. Box 9102, 6500HC Nijmegen (Netherlands); Romaniouk, A.; Veenhof, R. [CERN, CH-1211, Geneve 23 (Switzerland)

    2011-06-15

    Gossip is a gaseous micro-pixel detector with a very thin drift gap intended for a high rate environment like at the pixel layers of ATLAS at the sLHC. The detector outputs not only the crossing point of a traversing MIP, but also the angle of the track, thus greatly simplifying track reconstruction. In this paper we describe a testbeam experiment to examine the angular resolution of the reconstructed track segments in Gossip. We used here the low diffusion gas mixture DME/CO{sub 2} 50/50. An angular resolution of 20 mrad for perpendicular tracks could be obtained from a 1.5 mm thin drift volume. However, for the prototype detector used at the testbeam experiment, the resolution of slanting tracks was worsened by poor time resolution of the pixel chip used.

  13. Angular resolution of the gaseous micro-pixel detector Gossip

    International Nuclear Information System (INIS)

    Bilevych, Y.; Blanco Carballo, V.; Dijk, M. van; Fransen, M.; Graaf, H. van der; Hartjes, F.; Hessey, N.; Koppert, W.; Nauta, S.; Rogers, M.; Romaniouk, A.; Veenhof, R.

    2011-01-01

    Gossip is a gaseous micro-pixel detector with a very thin drift gap intended for a high rate environment like at the pixel layers of ATLAS at the sLHC. The detector outputs not only the crossing point of a traversing MIP, but also the angle of the track, thus greatly simplifying track reconstruction. In this paper we describe a testbeam experiment to examine the angular resolution of the reconstructed track segments in Gossip. We used here the low diffusion gas mixture DME/CO 2 50/50. An angular resolution of 20 mrad for perpendicular tracks could be obtained from a 1.5 mm thin drift volume. However, for the prototype detector used at the testbeam experiment, the resolution of slanting tracks was worsened by poor time resolution of the pixel chip used.

  14. 3D silicon pixel detectors for the High-Luminosity LHC

    CERN Document Server

    Lange, J.

    2016-01-01

    3D silicon pixel detectors have been investigated as radiation-hard candidates for the innermost layers of the HL-LHC upgrade of the ATLAS pixel detector. 3D detectors are already in use today in the ATLAS IBL and AFP experiments. These are based on 50x250 um2 large pixels connected to the FE-I4 readout chip. Detectors of this generation were irradiated to HL-LHC fluences and demonstrated excellent radiation hardness with operational voltages as low as 180 V and power dissipation of 12--15 mW/cm2 at a fluence of about 1e16 neq/cm2, measured at -25 degree C. Moreover, to cope with the higher occupancies expected at the HL-LHC, a first run of a new generation of 3D detectors designed for the HL-LHC was produced at CNM with small pixel sizes of 50x50 and 25x100 um2, matched to the FE-I4 chip. They demonstrated a good performance in the laboratory and in beam tests with hit efficiencies of about 97% at already 1--2V before irradiation.

  15. Evaluation of the PANDA silicon pixel front-end electronics and investigation of the anti ΛΛ final state

    Energy Technology Data Exchange (ETDEWEB)

    Esch, Simone

    2014-04-28

    high precision particle beams for several experiments. The AntiProton Annihilation at Darmstadt (PANDA) experiment is one of the large detectors at FAIR. PANDAs main physics objectives center around the properties of particles and excited particles made from quarks of the first and second quark family. It is a fixed target experiment within the High Energy Storage Ring (HESR), which delivers an intense, phase-space cooled antiproton beam in the momentum range of 1.5 to 15 GeV/c. With the high precision of the HESR, PANDA will be able to perform precise spectroscopic studies of hadronic states in the charm quark mass range. The luminosity will be up to 2.10{sup 32} cm{sup -2}s{sup -1}, thus enabling very rare processes to be studied. This high luminosity leads to a high particle flux and a high radiation environment which the sub-detectors must withstand. The most highly affected sub-detector of this high radiation environment is the Micro Vertex Detector (MVD), the innermost detector of PANDA. The main task of the MVD is the detection of the interaction points of events (vertexing). This vertex finding is crucial for the analysis of short living particles like e.g. D-mesons, particles consisting of a c-quark and a light antiquark. An essential part of the MVD detector is the readout of the semiconductor sensors. The ToPix (Torino Pixel) Application Specific Integrated Circuit (ASIC) is the front-end electronics for the MVD sensor, developed at the Istituto Nazionale di Fisica Nucleare (INFN) in Turin, Italy. It measures the spatial coordinate, the time and the deposited charge of incident charged particles. The most recent prototype of this ASIC is the ToPix 3, a version of reduced size and functionality. The Juelich Digital Readout System (JDRS) was adopted and extended to be able to readout this prototype, thus enabling specific test measurements of the prototype. In addition, the performance of PANDA for detecting long lived. particles was studied, and the

  16. Development of an external readout electronics for a hybrid photon detector

    CERN Document Server

    Uyttenhove, Simon; Tichon, Jacques; Garcia, Salvador

    The pixel hybrid photon detectors currently installed in the LHCb Cherenkov system encapsulate readout electronics in the vacuum tube envelope. The LHCb upgrade and the new trigger system will require their replacement with new photon detectors. The baseline photon detector candidate is the multi-anode photomultiplier. A hybrid photon detector with external readout electronics has been proposed as a backup option. This master thesis covers a R & D phase to investigate this latter concept. Extensive studies of the initial electronics system underlined the noise contributions from the Beetle chip used as front-end readout ASIC and from the ceramic carrier of the photon detector. New front-end electronic boards have been developed and made fully compatible with the existing LHCb-RICH infrastructure. With this compact readout system, Cherenkov photons have been successfully detected in a real particle beam environment. The proof-of-concept of a hybrid photon detector with external readout electronics was val...

  17. Detector control system of the ATLAS insertable B-Layer

    International Nuclear Information System (INIS)

    Kersten, S.; Kind, P.; Lantzsch, K.; Maettig, P.; Zeitnitz, C.; Gensolen, F.; Citterio, M.; Meroni, C.; Verlaat, B.; Kovalenko, S.

    2012-01-01

    To improve tracking robustness and precision of the ATLAS inner tracker, an additional, fourth pixel layer is foreseen, called Insertable B-Layer (IBL). It will be installed between the innermost present Pixel layer and a new, smaller beam pipe and is presently under construction. As, once installed into the experiment, no access is possible, a highly reliable control system is required. It has to supply the detector with all entities required for operation and protect it at all times. Design constraints are the high power density inside the detector volume, the sensitivity of the sensors against heat-ups, and the protection of the front end electronics against transients. We present the architecture of the control system with an emphasis on the CO 2 cooling system, the power supply system, and protection strategies. As we aim for a common operation of Pixel and IBL detector, the integration of the IBL control system into the Pixel control system will also be discussed. (authors)

  18. 3D track reconstruction capability of a silicon hybrid active pixel detector

    Energy Technology Data Exchange (ETDEWEB)

    Bergmann, Benedikt; Pichotka, Martin; Pospisil, Stanislav; Vycpalek, Jiri [Czech Technical University in Prague, Institute of Experimental and Applied Physics, Praha (Czech Republic); Burian, Petr; Broulim, Pavel [Czech Technical University in Prague, Institute of Experimental and Applied Physics, Praha (Czech Republic); University of West Bohemia, Faculty of Electrical Engineering, Pilsen (Czech Republic); Jakubek, Jan [Advacam s.r.o., Praha (Czech Republic)

    2017-06-15

    Timepix3 detectors are the latest generation of hybrid active pixel detectors of the Medipix/Timepix family. Such detectors consist of an active sensor layer which is connected to the readout ASIC (application specific integrated circuit), segmenting the detector into a square matrix of 256 x 256 pixels (pixel pitch 55 μm). Particles interacting in the active sensor material create charge carriers, which drift towards the pixelated electrode, where they are collected. In each pixel, the time of the interaction (time resolution 1.56 ns) and the amount of created charge carriers are measured. Such a device was employed in an experiment in a 120 GeV/c pion beam. It is demonstrated, how the drift time information can be used for ''4D'' particle tracking, with the three spatial dimensions and the energy losses along the particle trajectory (dE/dx). Since the coordinates in the detector plane are given by the pixelation (x,y), the x- and y-resolution is determined by the pixel pitch (55 μm). A z-resolution of 50.4 μm could be achieved (for a 500 μm thick silicon sensor at 130 V bias), whereby the drift time model independent z-resolution was found to be 28.5 μm. (orig.)

  19. 3D track reconstruction capability of a silicon hybrid active pixel detector

    Science.gov (United States)

    Bergmann, Benedikt; Pichotka, Martin; Pospisil, Stanislav; Vycpalek, Jiri; Burian, Petr; Broulim, Pavel; Jakubek, Jan

    2017-06-01

    Timepix3 detectors are the latest generation of hybrid active pixel detectors of the Medipix/Timepix family. Such detectors consist of an active sensor layer which is connected to the readout ASIC (application specific integrated circuit), segmenting the detector into a square matrix of 256 × 256 pixels (pixel pitch 55 μm). Particles interacting in the active sensor material create charge carriers, which drift towards the pixelated electrode, where they are collected. In each pixel, the time of the interaction (time resolution 1.56 ns) and the amount of created charge carriers are measured. Such a device was employed in an experiment in a 120 GeV/c pion beam. It is demonstrated, how the drift time information can be used for "4D" particle tracking, with the three spatial dimensions and the energy losses along the particle trajectory (dE/dx). Since the coordinates in the detector plane are given by the pixelation ( x, y), the x- and y-resolution is determined by the pixel pitch (55 μm). A z-resolution of 50.4 μm could be achieved (for a 500 μm thick silicon sensor at 130 V bias), whereby the drift time model independent z-resolution was found to be 28.5 μm.

  20. Si and gaas pixel detectors for medical imaging applications

    International Nuclear Information System (INIS)

    Bisogni, M. G.

    2001-01-01

    As the use of digital radiographic equipment in the morphological imaging field is becoming the more and more diffuse, the research of new and more performing devices from public institutions and industrial companies is in constant progress. Most of these devices are based on solid-state detectors as X-ray sensors. Semiconductor pixel detectors, originally developed in the high energy physics environment, have been then proposed as digital detector for medical imaging applications. In this paper a digital single photon counting device, based on silicon and GaAs pixel detector, is presented. The detector is a thin slab of semiconductor crystal where an array of 64 by 64 square pixels, 170- m side, has been built on one side. The data read-out is performed by a VLSI integrated circuit named Photon Counting Chip (PCC), developed within the MEDIPIX collaboration. Each chip cell geometrically matches the sensor pixel. It contains a charge preamplifier, a threshold comparator and a 15 bits pseudo-random counter and it is coupled to the detector by means of bump bonding. Most important advantages of such system, with respect to a traditional X-rays film/screen device, are the wider linear dynamic range (3x104) and the higher performance in terms of MTF and DQE. Besides the single photon counting architecture allows to detect image contrasts lower than 3%. Electronics read-out performance as well as imaging capabilities of the digital device will be presented. Images of mammographic phantoms acquired with a standard Mammographic tube will be compared with radiographs obtained with traditional film/screen systems

  1. The ATLAS Inner Detector operation,data quality and tracking performance.

    CERN Document Server

    Stanecka, E; The ATLAS collaboration

    2012-01-01

    The ATLAS Inner Detector comprises silicon and gas based detectors. The Semi-Conductor Tracker (SCT) and the Pixel Detector are the key precision tracking silicon devices in the Inner Detector of the ATLAS experiment at CERN LHC. And the the Transition Radiation Tracker (TRT), the outermost of the three subsystems of the ATLAS Inner Detector is made of thin-walled proportional-mode drift tubes (straws). The Pixel Detector consists of approximately 80 million pixels that are individually read out via chips bump-bonded to 1744 n-in-n silicon substrates. The SCT is a silicon strip detector and is constructed of 4088 silicon detector modules for a total of 6.3 million strips. Each module is designed, constructed and tested to operate as a stand-alone unit, mechanically, electrically, optically and thermally. The SCT silicon micro-strip sensors are processed in the planar p-in-n technology. The signals from the strips are processed in the front-end ASICS ABCD3TA, working in the binary readout mode. The TRT is made...

  2. Results from the Commissioning of the ATLAS Pixel Detector

    CERN Document Server

    Strandberg, S

    2009-01-01

    The ATLAS pixel detector is a high resolution, silicon based, tracking detector with its innermost layer located only 5 cm away from the ATLAS interaction point. It is designed to provide good hit resolution and low noise, both important qualities for pattern recognition and for finding secondary vertices originating from decays of long-lived particles. The pixel detector has 80 million readout channels and is built up of three barrel layers and six disks, three on each side of the barrel. The detector was installed in the center of ATLAS in June 2007 and is currently being calibrated and commissioned. Details from the installation, commissioning and calibration are presented together with the current status.

  3. Modelling of the small pixel effect in gallium arsenide X-ray imaging detectors

    CERN Document Server

    Sellin, P J

    1999-01-01

    A Monte Carlo simulation has been carried out to investigate the small pixel effect in highly pixellated X-ray imaging detectors fabricated from semi-insulating gallium arsenide. The presence of highly non-uniform weighting fields in detectors with a small pixel geometry causes the majority of the induced signal to be generated when the moving charges are close to the pixellated contacts. The response of GaAs X-ray imaging detectors is further complicated by the presence of charge trapping, particularly of electrons. In this work detectors are modelled with a pixel pitch of 40 and 150 mu m, and with thicknesses of 300 and 500 mu m. Pulses induced in devices with 40 mu m pixels are due almost totally to the movement of the lightly-trapped holes and can exhibit significantly higher charge collection efficiencies than detectors with large electrodes, in which electron trapping is significant. Details of the charge collection efficiencies as a function of interaction depth in the detector and of the incident phot...

  4. The PixFEL project: development of advanced X-ray pixel detectors for application at future FEL facilities

    International Nuclear Information System (INIS)

    Rizzo, G.; Batignani, G.; Bettarini, S.; Casarosa, G.; Forti, F.; Paladino, A.; Paoloni, E.; Comotti, D.; Grassi, M.; Lodola, L.; Malcovati, P.; Ratti, L.; Vacchi, C.; Fabris, L.; Manghisoni, M.; Re, V.; Traversi, G.; Morsani, F.; Betta, G.-F. Dalla; Pancheri, L.

    2015-01-01

    The PixFEL project aims to develop an advanced X-ray camera for imaging suited for the demanding requirements of next generation free electron laser (FEL) facilities. New technologies can be deployed to boost the performance of imaging detectors as well as future pixel devices for tracking. In the first phase of the PixFEL project, approved by the INFN, the focus will be on the development of the microelectronic building blocks, carried out with a 65 nm CMOS technology, implementing a low noise analog front-end channel with high dynamic range and compression features, a low power ADC and high density memory. At the same time PixFEL will investigate and implement some of the enabling technologies to assembly a seamless large area X-ray camera composed by a matrix of multilayer four-side buttable tiles. A pixel matrix with active edge will be developed to minimize the dead area of the sensor layer. Vertical interconnection of two CMOS tiers will be explored to build a four-side buttable readout chip with small pixel pitch and all the on-board required functionalities. The ambitious target requirements of the new pixel device are: single photon resolution, 1 to 10 4 photons @ 1 keV to 10 keV input dynamic range, 10-bit analog to digital conversion up to 5 MHz, 1 kevent in-pixel memory and 100 μm pixel pitch. The long term goal of PixFEL will be the development of a versatile X-ray camera to be operated either in burst mode (European XFEL), or in continuous mode to cope with the high frame rates foreseen for the upgrade phase of the LCLS-II at SLAC

  5. Operational Experience and Performance with the ATLAS Pixel detector

    CERN Document Server

    Martin, Christopher Blake; The ATLAS collaboration

    2018-01-01

    The tracking performance of the ATLAS detector relies critically on its 4-layer Pixel Detector, that has undergone significant hardware and software upgrades to meet the challenges imposed by the higher collision energy, pileup and luminosity that are being delivered by the Large Hadron Collider, with record breaking instantaneous luminosities of $1.3\\times10^{34}\\text{cm}^{{-2}}\\text{s}^{{-1}}$ recently surpassed. The key status and performance metrics of the ATLAS Pixel Detector are summarized, and the operational experience and requirements to ensure optimum data quality and data taking efficiency are described, with special emphasis to radiation damage experience.

  6. Operational Experience and Performance with the ATLAS Pixel detector

    CERN Document Server

    Martin, Christopher Blake; The ATLAS collaboration

    2018-01-01

    The tracking performance of the ATLAS detector relies critically on its 4-layer Pixel Detector, that has undergone significant hardware and software upgrades to meet the challenges imposed by the higher collision energy, pileup and luminosity that are being delivered by the Large Hadron Collider, with record breaking instantaneous luminosities of 1.3 x 10^34 cm-2 s-1 recently surpassed. The key status and performance metrics of the ATLAS Pixel Detector are summarised, and the operational experience and requirements to ensure optimum data quality and data taking efficiency are described, with special emphasis to radiation damage experience.

  7. PROTON RADIOGRAPHY WITH THE PIXEL DETECTOR TIMEPIX

    Directory of Open Access Journals (Sweden)

    Václav Olšanský

    2016-12-01

    Full Text Available This article presents the processing of radiographic data acquired using the position-sensitive hybrid semiconductor pixel detector Timepix. Measurements were made on thin samples at the medical ion-synchrotron HIT [1] in Heidelberg (Germany with a 221 MeV proton beam. The charge is energy by the particles crossing the sample is registered for generation of image contrast. Experimental data from the detector were processed for derivation of the energy loss of each proton using calibration matrices. The interaction point of the protons on the detector were determined with subpixel resolution by model fitting of the individual signals in the pixelated matrix. Three methods were used for calculation of these coordinates: Hough transformation, 2D Gaussian fitting and estimate the 2D mean. Parameters of calculation accuracy and calculation time are compared for each method. The final image was created by method with best parameters.

  8. Modeling radiation damage to pixel sensors in the ATLAS detector

    Science.gov (United States)

    Ducourthial, A.

    2018-03-01

    Silicon pixel detectors are at the core of the current and planned upgrade of the ATLAS detector at the Large Hadron Collider (LHC) . As the closest detector component to the interaction point, these detectors will be subject to a significant amount of radiation over their lifetime: prior to the High-Luminosity LHC (HL-LHC) [1], the innermost layers will receive a fluence in excess of 1015 neq/cm2 and the HL-LHC detector upgrades must cope with an order of magnitude higher fluence integrated over their lifetimes. Simulating radiation damage is essential in order to make accurate predictions for current and future detector performance that will enable searches for new particles and forces as well as precision measurements of Standard Model particles such as the Higgs boson. We present a digitization model that includes radiation damage effects on the ATLAS pixel sensors for the first time. In addition to thoroughly describing the setup, we present first predictions for basic pixel cluster properties alongside early studies with LHC Run 2 proton-proton collision data.

  9. Silicon Sensors for the Upgrades of the CMS Pixel Detector

    CERN Document Server

    Centis Vignali, Matteo; Schleper, Peter

    2015-01-01

    The Compact Muon Solenoid (CMS) is a general purpose detector at the Large Hadron Collider (LHC). The LHC luminosity is constantly increased through upgrades of the accel- erator and its injection chain. Two major upgrades will take place in the next years. The rst upgrade involves the LHC injector chain and allows the collider to achieve a luminosity of about 2 10 34 cm-2 s-1 A further upgrade of the LHC foreseen for 2025 will boost its luminosity to 5 10 34 cm-2 s1. As a consequence of the increased luminosity, the detectors need to be upgraded. In particular, the CMS pixel detector will undergo two upgrades in the next years. The rst upgrade (phase I) consists in the substitution of the current pixel detector in winter 2016/2017. The upgraded pixel detector will implement new readout elec- tronics that allow ecient data taking up to a luminosity of 2 10 34 cm-2s-1,twice as much as the LHC design luminosity. The modules that will constitute the upgraded detector are being produced at dierent institutes. Ham...

  10. PMF: the front end electronic of the ALFA detector

    CERN Document Server

    Barrillon, P; Cheikali, C; Cuisy, D; Gaspard, M; Fournier, D; Heller, M; Iwanski, W; Lavigne, B; de La Taille, C; Puzo, P; Socha, J-L

    2008-01-01

    The front end electronic (PMF) of the future ATLAS luminometer is described here. It is composed by a MAPMT and a compact stack of three PCBs which deliver the high voltage, route and readout the output signals. The third board contains a FPGA and MAROC, a 64 channels ASIC which can correct the non uniformity of the MAPMT channels gain thanks to a variable gain preamplifier. Its main role is to shape and discriminate the input signals at 1/3 photo-electron and produce 64 trigger outputs. Laboratory tests performed on prototype and pre-series PMFs have showed performances in good agreement with the requirements.

  11. Leakage current measurements on pixelated CdZnTe detectors

    International Nuclear Information System (INIS)

    Dirks, B.P.F.; Blondel, C.; Daly, F.; Gevin, O.; Limousin, O.; Lugiez, F.

    2006-01-01

    In the field of the R and D of a new generation hard X-ray cameras for space applications we focus on the use of pixelated CdTe or CdZnTe semiconductor detectors. They are covered with 64 (0.9x0.9 mm 2 ) or 256 (0.5x0.5 mm 2 ) pixels, surrounded by a guard ring and operate in the energy ranging from several keV to 1 MeV, at temperatures between -20 and +20 o C. A critical parameter in the characterisation of these detectors is the leakage current per pixel under polarisation (∼50-500 V/mm). In operation mode each pixel will be read-out by an integrated spectroscopy channel of the multi-channel IDeF-X ASIC currently developed in our lab. The design and functionality of the ASIC depends directly on the direction and value of the current. A dedicated and highly insulating electronics circuit is designed to automatically measure the current in each individual pixel, which is in the order of tens of pico-amperes. Leakage current maps of different CdZnTe detectors of 2 and 6 mm thick and at various temperatures are presented and discussed. Defect density diagnostics have been performed by calculation of the activation energy of the material

  12. Investigation of photon counting pixel detectors for X-ray spectroscopy and imaging

    Energy Technology Data Exchange (ETDEWEB)

    Talla, Patrick Takoukam

    2011-04-07

    The Medipix2 and Medipix3 detectors are hybrid pixelated photon counting detectors with a pixel pitch of 55 {mu}m. The sensor material used in this thesis was silicon. Because of their small pixel size they suffer from charge sharing i.e. an incoming photon can be registered by more than one pixel. In order to correct for charge sharing due to lateral diffusion of charge carriers, the Medipix3 detector was developed: with its Charge Summing Mode, the charge collected in a cluster of 2 x 2 pixel is added up and attributed to only one pixel whose counter is incremented. The adjustable threshold of the detectors allows to count the photons and to gain information on their energy. The main purposes of the thesis are to investigate spectral and imaging properties of pixelated photon counting detectors from the Medipix family such as Medipix2 and Medipix3. The investigations are based on simulations and measurements. In order to investigate the spectral properties of the detectors measurements were performed using fluorescence lines of materials such as molybdenum, silver but also some radioactive sources such as Am-241 or Cd-109. From the measured data, parameters like the threshold dispersion and the gain variation from pixel-to-pixel were extracted and used as input in the Monte Carlo code ROSI to model the responses of the detector to monoenergetic photons. The measured data are well described by the simulations for Medipix2 and for Medipix3 operating in Charge Summing Mode. Due to charge sharing and due to the energy dependence of attenuation processes in silicon and to Compton scattering the incoming and the measured spectrum differ substantially from each other. Since the responses to monoenergetic photons are known, a deconvolution was performed to determine the true incoming spectrum. Several direct and iterative methods were successfully applied on measured and simulated data of an X-ray tube and radioactive sources. The knowledge of the X-ray spectrum is

  13. Investigation of photon counting pixel detectors for X-ray spectroscopy and imaging

    International Nuclear Information System (INIS)

    Talla, Patrick Takoukam

    2011-01-01

    The Medipix2 and Medipix3 detectors are hybrid pixelated photon counting detectors with a pixel pitch of 55 μm. The sensor material used in this thesis was silicon. Because of their small pixel size they suffer from charge sharing i.e. an incoming photon can be registered by more than one pixel. In order to correct for charge sharing due to lateral diffusion of charge carriers, the Medipix3 detector was developed: with its Charge Summing Mode, the charge collected in a cluster of 2 x 2 pixel is added up and attributed to only one pixel whose counter is incremented. The adjustable threshold of the detectors allows to count the photons and to gain information on their energy. The main purposes of the thesis are to investigate spectral and imaging properties of pixelated photon counting detectors from the Medipix family such as Medipix2 and Medipix3. The investigations are based on simulations and measurements. In order to investigate the spectral properties of the detectors measurements were performed using fluorescence lines of materials such as molybdenum, silver but also some radioactive sources such as Am-241 or Cd-109. From the measured data, parameters like the threshold dispersion and the gain variation from pixel-to-pixel were extracted and used as input in the Monte Carlo code ROSI to model the responses of the detector to monoenergetic photons. The measured data are well described by the simulations for Medipix2 and for Medipix3 operating in Charge Summing Mode. Due to charge sharing and due to the energy dependence of attenuation processes in silicon and to Compton scattering the incoming and the measured spectrum differ substantially from each other. Since the responses to monoenergetic photons are known, a deconvolution was performed to determine the true incoming spectrum. Several direct and iterative methods were successfully applied on measured and simulated data of an X-ray tube and radioactive sources. The knowledge of the X-ray spectrum is

  14. An analog integrated front-end amplifier for neural applications

    OpenAIRE

    Zhou, Zhijun; Warr, Paul

    2017-01-01

    The front-end amplifier forms the critical element for signal detection and pre-processing within neural monitoring systems. It determines not only the fidelity of the biosignal, but also impacts power consumption and detector size. In this paper, a combined feedback loop-controlled approach is proposed to neutralize for the input leakage currents generated by low noise amplifiers when in integrated circuit form, alongside signal leakage into the input bias network. Significantly, this loop t...

  15. CMOS Pixel Sensors for High Precision Beam Telescopes and Vertex Detectors

    International Nuclear Information System (INIS)

    Masi, R. de; Baudot, J.; Fontaine, J.-Ch.

    2009-01-01

    CMOS sensors of the MIMOSA (standing for Minimum Ionising particle MOS Active pixel sensor) series are developed at IPHC since a decade and have ended up with full scale devices used in beam telescopes and in demonstrators of future vertex detectors. The sensors deliver analogue, unfiltered, signals and are therefore limited to read-out frequencies of ∼ 1 kframe/s. Since a few years, a fast architecture is being developed in collaboration with IRFU, which aims to speed up the read-out by 1-2 orders of magnitude. The first full scale sensor based on this architecture was fabricated recently and is being tested. Made of 660,000 pixels (18 μm pitch) covering an active area of ∼ 2 cm 2 , it delivers zero-suppressed binary signals, which allow running at ∼ 10 kframes/s. It will equip the beam telescope of the E.U. project EUDET and serve as a forerunner of the sensor equipping the 2 layers of the PIXEL detector of the STAR experiment at RHIC. The contribution to the conference will overview the main features and test results of this pioneering sensor. It will next describe its evolution towards read-out frequencies approaching 100 kframes/s, as required for the vertex detectors of the CBM experiment at FAIR and at the ILC. Finally, the issue of radiation tolerance will be addressed, in the context of a newly available CMOS process using a depleted substrate. A prototype sensor was fabricated in a such CMOS process. The talk will summarise beam test results showing, for the first time, that fluences of 10 14 n eq /cm 2 may be tolerable for CMOS sensors. Overall, the talk provides an overview of the status and plans of CMOS pixel sensors at the frontier of their achievements and outreach. (author)

  16. Geometry simulation and physics with the CMS forward pixel detector

    Energy Technology Data Exchange (ETDEWEB)

    Parashar, N [Purdue University Calumet, Hammond, Indiana (United States)], E-mail: Neeti@fnal.gov

    2008-06-15

    The Forward Pixel Detector of CMS is an integral part of the Tracking system, which will play a key role in addressing the full physics potential of the collected data. It has a very complex geometry that encompasses multilayer structure of its detector modules. This presentation describes the development of geometry simulation for the Forward Pixel Detector. A new geometry package has been developed, which uses the detector description database (DDD) interface for the XML (eXtensive Markup Language) to GEANT simulation. This is necessary for digitization and GEANT4 reconstruction software for tracking. The expected physics performance is also discussed.

  17. Geometry simulation and physics with the CMS forward pixel detector

    International Nuclear Information System (INIS)

    Parashar, N

    2008-01-01

    The Forward Pixel Detector of CMS is an integral part of the Tracking system, which will play a key role in addressing the full physics potential of the collected data. It has a very complex geometry that encompasses multilayer structure of its detector modules. This presentation describes the development of geometry simulation for the Forward Pixel Detector. A new geometry package has been developed, which uses the detector description database (DDD) interface for the XML (eXtensive Markup Language) to GEANT simulation. This is necessary for digitization and GEANT4 reconstruction software for tracking. The expected physics performance is also discussed

  18. STAR PIXEL detector mechanical design

    Energy Technology Data Exchange (ETDEWEB)

    Wieman, H H; Anderssen, E; Greiner, L; Matis, H S; Ritter, H G; Sun, X; Szelezniak, M [Lawrence Berkeley National Laboratory, Berkeley, CA 94720 (United States)], E-mail: hhwieman@lbl.gov

    2009-05-15

    A high resolution pixel detector is being designed for the STAR [1] experiment at RHIC. This device will use MAPS as the detector element and will have a pointing accuracy of {approx}25 microns. We will be reporting on the mechanical design required to support this resolution. The radiation length of the first layer ({approx}0.3% X{sub 0}) and its distance from the interaction point (2.5 cm) determines the resolution. The design makes use of air cooling and thin carbon composite structures to limit the radiation length. The mechanics are being developed to achieve spatial calibrations and stability to 20 microns and to permit rapid detector replacement in event of radiation damage or other potential failures from operation near the beam.

  19. Commissioning and first results from the CMS phase-1 upgrade pixel detector

    CERN Document Server

    Sonneveld, Jorine Mirjam

    2017-01-01

    The phase~1 upgrade of the CMS pixel detector has been designed to maintain the tracking performance at instantaneous luminosities of $2 \\times 10^{34} \\mathrm{~cm}^{-2} \\mathrm{~s}^{-1}$. Both barrel and endcap disk systems now feature one extra layer (4 barrel layers and 3 endcap disks), and a digital readout that provides a large enough bandwidth to read out its 124M pixel channels (87.7 percent more pixels compared to the previous system). The backend control and readout systems have been upgraded accordingly from VME-based to micro-TCA-based ones. The detector is now also fitted with a bi-phase CO$_2$ cooling system that reduces the material budget in the tracking region. The detector has been installed inside CMS at the start of 2017 and is now taking data. These proceedings discuss experiences in the commissioning and operation of the CMS phase~1 pixel detector. The first results from the CMS phase~1 pixel detector with this year's LHC proton-proton collision data are presented. ...

  20. Optimization of detector pixel size for stent visualization in x-ray fluoroscopy

    International Nuclear Information System (INIS)

    Jiang Yuhao; Wilson, David L.

    2006-01-01

    Pixel size is of great interest in the flat-panel detector design because of its potential impact on image quality. In the particular case of angiographic x-ray fluoroscopy, small pixels are required in order to adequately visualize interventional devices such as guidewires and stents which have wire diameters as small as 200 and 50 μm, respectively. We used quantitative experimental and modeling techniques to investigate the optimal pixel size for imaging stents. Image quality was evaluated by the ability of subjects to perform two tasks: detect the presence of a stent and discriminate a partially deployed stent from a fully deployed one in synthetic images. With measurements at 50, 100, 200, and 300 μm, the 100 μm pixel size gave the maximum contrast sensitivity for the detection experiment with the idealized direct detector. For an idealized indirect detector with a scintillating layer, an optimal pixel size was obtained at 200 μm pixel size. A channelized human observer model predicted a peak at 150 and 170 μm, for the idealized direct and indirect detectors, respectively. With regard to the stent deployment task for both detector types, smaller pixel sizes are favored and there is a steep drop in performance with larger pixels. In general, with the increasing exposures, the model and measurements give the enhanced contrast sensitivities and a smaller optimal pixel size. The effects of electronic noise and fill factor were investigated using the model. We believe that the experimental results and human observer model predications can help guide the flat-panel detector design. In addition, the human observer model should work on the similar images and be applicable to the future model and actual flat-panel implementations

  1. Pixel readout chips in deep submicron CMOS for ALICE and LHCb tolerant to 10 Mrad and beyond

    International Nuclear Information System (INIS)

    Snoeys, W.; Burns, M.; Campbell, M.; Cantatore, E.; Cencelli, V.; Dinapoli, R.; Heijne, E.; Jarron, P.; Lamanna, P.; Minervini, D.; Morel, M.; O'Shea, V.; Quiquempoix, V.; Bello, D.S.S.D.San Segundo; Van Koningsveld, B.; Wyllie, K.

    2001-01-01

    The ALICE1LHCB chip is a mixed-mode integrated circuit designed to read out silicon pixel detectors for two different applications: particle tracking in the ALICE Silicon Pixel Detector and particle identification in the LHCb Ring Imaging Cherenkov detector. To satisfy the different needs for these two experiments, the chip can be operated in two different modes. In tracking mode all the 50 μmx425 μm pixel cells in the 256x32 array are read out individually, whilst in particle identification mode they are combined in groups of 8 to form a 32x32 array of 400 μmx425 μm cells. Radiation tolerance was enhanced through special circuit layout. Sensitivity to coupling of digital signals into the analog front end was minimized. System issues such as testability and uniformity further constrained the design. The circuit is currently being manufactured in a commercial 0.25 μm CMOS technology

  2. Test-beam results of a SOI pixel detector prototype

    CERN Document Server

    Bugiel, Roma; Dannheim, Dominik; Fiergolski, Adrian; Hynds, Daniel; Idzik, Marek; Kapusta, P; Kucewicz, Wojciech; Munker, Ruth Magdalena; Nurnberg, Andreas Matthias

    2018-01-01

    This paper presents the test-beam results of a monolithic pixel-detector prototype fabricated in 200 nm Silicon-On-Insulator (SOI) CMOS technology. The SOI detector was tested at the CERN SPS H6 beam line. The detector is fabricated on a 500 μm thick high-resistivity float- zone n-type (FZ-n) wafer. The pixel size is 30 μm × 30 μm and its readout uses a source- follower configuration. The test-beam data are analysed in order to compute the spatial resolution and detector efficiency. The analysis chain includes pedestal and noise calculation, cluster reconstruction, as well as alignment and η-correction for non-linear charge sharing. The results show a spatial resolution of about 4.3 μm.

  3. A MCM-D-type module for the ATLAS pixel detector

    CERN Document Server

    Becks, K H; Ehrmann, O; Gerlach, P; Gregor, I M; Pieters, P; Topper, M; Truzzi, C; Wolf, J

    1999-01-01

    For the ATLAS experiment at the planned Large Hadron Collider LHC at CERN hybrid pixel detectors are being built as innermost layers of the inner tracking detector system. Modules are the basic building blocks of the ATLAS pixel $9 detector. A module consists of a sensor tile with an active area of 16.4 mm*60.4 mm, 16 read out IC's, each serving 24*160 pixel unit cells, a module controller chip, an optical transceiver and the local signal interconnection and $9 power distribution busses. The dies are attached by flip-chip assembly to the sensor diodes and the local busses. In the following a module based on MCM-D technology will be discussed and prototype results will be presented.

  4. The front-end electronics for the 1.8-kchannel SiPM tracking plane in the NEW detector

    International Nuclear Information System (INIS)

    Rodríguez, J.; Lorca, D.; Monrabal, F.; Toledo, J.; Esteve, R.

    2015-01-01

    NEW is the first phase of NEXT-100 experiment, an experiment aimed at searching for neutrinoless double-beta decay. NEXT technology combines an excellent energy resolution with tracking capabilities thanks to a combination of optical sensors, PMTs for the energy measurement and SiPMs for topology reconstruction. Those two tools result in one of the highest background rejection potentials in the field. This work describes the tracking plane that will be constructed for the NEW detector which consists of close to 1800 sensors with a 1-cm pitch arranged in twenty-eight 64-SiPM boards. Then it focuses in the development of the electronics needed to read the 1800 channels with a front-end board that includes per-channel differential transimpedance input amplifier, gated integrator, automatic offset voltage compensation and 12-bit ADC. Finally, a description of how the FPGA buffers data, carries out zero suppression and sends data to the DAQ interface using CERN RD-51 SRS's DTCC link specification complements the description of the electronics of the NEW detector tracking plane

  5. FRONT-END ASIC FOR A SILICON COMPTON TELESCOPE.

    Energy Technology Data Exchange (ETDEWEB)

    DE GERONIMO,G.; FRIED, J.; FROST, E.; PHLIPS, B.; VERNON, E.; WULF, E.A.

    2007-10-27

    We describe a front-end application specific integrated circuit (ASIC) developed for a silicon Compton telescope. Composed of 32 channels, it reads out signals in both polarities from each side of a Silicon strip sensor, 2 mm thick 27 cm long, characterized by a strip capacitance of 30 pF. Each front-end channel provides low-noise charge amplification, shaping with a stabilized baseline, discrimination, and peak detection with an analog memory. The channels can process events simultaneously, and the read out is sparsified. The charge amplifier makes uses a dual-cascode configuration and dual-polarity adaptive reset, The low-hysteresis discriminator and the multi-phase peak detector process signals with a dynamic range in excess of four hundred. An equivalent noise charge (ENC) below 200 electrons was measured at 30 pF, with a slope of about 4.5 electrons/pF at a peaking time of 4 {micro}s. With a total dissipated power of 5 mW the channel covers an energy range up to 3.2 MeV.

  6. A pixelated x-ray detector for diffraction imaging at next-generation high-rate FEL sources

    Science.gov (United States)

    Lodola, L.; Ratti, L.; Comotti, D.; Fabris, L.; Grassi, M.; Malcovati, P.; Manghisoni, M.; Re, V.; Traversi, G.; Vacchi, C.; Batignani, G.; Bettarini, S.; Forti, F.; Casarosa, G.; Morsani, F.; Paladino, A.; Paoloni, E.; Rizzo, G.; Benkechkache, M. A.; Dalla Betta, G.-F.; Mendicino, R.; Pancheri, L.; Verzellesi, G.; Xu, H.

    2017-08-01

    The PixFEL collaboration has developed the building blocks for an X-ray imager to be used in applications at FELs. In particular, slim edge pixel detectors with high detection efficiency over a broad energy range, from 1 to 12 keV, have been developed. Moreover, a multichannel readout chip, called PFM2 (PixFEL front-end Matrix 2) and consisting of 32 × 32 cells, has been designed and fabricated in a 65 nm CMOS technology. The pixel pitch is 110 μm, the overall area is around 16 mm2. In the chip, different solutions have been implemented for the readout channel, which includes a charge sensitive amplifier (CSA) with dynamic signal compression, a time-variant shaper and an A-to-D converter with a 10 bit resolution. The CSA can be configured in four different gain modes, so as to comply with photon energies in the 1 to 10 keV range. The paper will describe in detail the channel architecture and present the results from the characterization of PFM2. It will discuss the design of a new version of the chip, called PFM3, suitable for post-processing with peripheral, under-pad through silicon vias (TSVs), which are needed to develop four-side buttable chips and cover large surfaces with minimum inactive area.

  7. The Upgraded Pixel Detector of the ATLAS Experiment for Run-2 at the LHC

    CERN Document Server

    AUTHOR|(INSPIRE)INSPIRE-00084948; The ATLAS collaboration

    2016-01-01

    Run-2 of the LHC is providing new challenges to track and vertex reconstruction with higher energies, denser jets and higher rates. Therefore the ATLAS experiment has constructed the first 4-layer Pixel detector in HEP, installing a new Pixel layer, also called Insertable B-Layer (IBL). IBL is a fourth layer of pixel detectors, and has been installed in May 2014 at a radius of 3.3 cm between the existing Pixel Detector and a new smaller radius beam-pipe. The new detector, built to cope with high radiation and expected occupancy, is the first large scale application of 3D detectors and CMOS 130 nm technology. In addition the Pixel detector was refurbished with a new service quarter panel to recover about 3% of defective modules lost during run-1 and a new optical readout system to readout the data at higher speed while reducing the occupancy when running with increased luminosity. The commissioning and performance of the 4-layer Pixel Detector, in particular the IBL, will be presented using collision data.

  8. Alignment of the upgraded CMS pixel detector

    CERN Document Server

    Schroder, Matthias

    2018-01-01

    The all-silicon tracking system of the CMS experiment provides excellent resolution for charged tracks and an efficient tagging of heavy-flavour jets. After a new pixel detector has been installed during the LHC technical stop at the beginning of 2017, the positions, orientations, and surface curvatures of the sensors needed to be determined with a precision at the order of a few micrometres to ensure the required physics performance. This is far beyond the mechanical mounting precision but can be achieved using a track-based alignment procedure that minimises the track-hit residuals of reconstructed tracks. The results are carefully validated with data-driven methods. In this article, results of the CMS tracker alignment in 2017 from the early detector-commissioning phase and the later operation are presented, that were derived using several million reconstructed tracks in pp-collision and cosmic-ray data. Special emphasis is put on the alignment of the new pixel detector.

  9. The Dosepix detector—an energy-resolving photon-counting pixel detector for spectrometric measurements

    CERN Document Server

    Zang, A; Ballabriga, R; Bisello, F; Campbell, M; Celi, J C; Fauler, A; Fiederle, M; Jensch, M; Kochanski, N; Llopart, X; Michel, N; Mollenhauer, U; Ritter, I; Tennert, F; Wölfel, S; Wong, W; Michel, T

    2015-01-01

    The Dosepix detector is a hybrid photon-counting pixel detector based on ideas of the Medipix and Timepix detector family. 1 mm thick cadmium telluride and 300 μm thick silicon were used as sensor material. The pixel matrix of the Dosepix consists of 16 x 16 square pixels with 12 rows of (200 μm)2 and 4 rows of (55 μm)2 sensitive area for the silicon sensor layer and 16 rows of pixels with 220 μm pixel pitch for CdTe. Besides digital energy integration and photon-counting mode, a novel concept of energy binning is included in the pixel electronics, allowing energy-resolved measurements in 16 energy bins within one acquisition. The possibilities of this detector concept range from applications in personal dosimetry and energy-resolved imaging to quality assurance of medical X-ray sources by analysis of the emitted photon spectrum. In this contribution the Dosepix detector, its response to X-rays as well as spectrum measurements with Si and CdTe sensor layer are presented. Furthermore, a first evaluation wa...

  10. PMF: The front end electronic of the ALFA detector

    Energy Technology Data Exchange (ETDEWEB)

    Barrillon, P., E-mail: barrillo@lal.in2p3.f [Laboratoire de l' Accelerateur Lineaire, 91898 Orsay (France); Blin, S.; Cheikali, C.; Cuisy, D.; Gaspard, M.; Fournier, D.; Heller, M. [Laboratoire de l' Accelerateur Lineaire, 91898 Orsay (France); Iwanski, W. [Institute of Nuclear Physics PAN, Radzikowskiego 152, 31-342 Cracow (Poland); Lavigne, B.; De la Taille, C.; Puzo, P.; Socha, J-L. [Laboratoire de l' Accelerateur Lineaire, 91898 Orsay (France)

    2010-11-01

    The front end electronic (PMF) of the future ATLAS luminometer is described here. It is composed of a MAPMT and a compact stack of three PCBs, which deliver high voltage, route and read out of the output signals. The third board contains an FPGA and MAROC, a 64-channel ASIC, which can correct the non-uniformity of the MAPMT channels gain, thanks to a variable gain preamplifier. Its main role is to shape and discriminate the input signals at 1/3 photo-electron and produce 64 trigger outputs. Laboratory tests performed on prototype and pre-series PMFs have showed performances in good agreement with the requirements and have fulfilled the approval criteria for the final production of all elements.

  11. PMF: the front end electronic of the ALFA detector

    CERN Document Server

    Barrillon, P; Cheikali, C; Cuisy, D; Gaspard, M; Fournier, D; Heller, M; Iwanski, W; Lavigne, B; de La Taille, C; Puzo, P; Socha, J-L

    2010-01-01

    The front end electronic (PMF) of the future ATLAS luminometer is described here. It is composed of a MAPMT and a compact stack of three PCBs, which deliver high voltage, route and read out of the output signals. The third board contains an FPGA and MAROC, a 64-channel ASIC, which can correct the non-uniformity of the MAPMT channels gain, thanks to a variable gain preamplifier. Its main role is to shape and discriminate the input signals at 1/3 photo-electron and produce 64 trigger outputs. Laboratory tests performed on prototype and pre-series PMFs have showed performances in good agreement with the requirements and have fulfilled the approval criteria for the final production of all elements.

  12. Pixellated thallium bromide detectors for gamma-ray spectroscopy and imaging

    Energy Technology Data Exchange (ETDEWEB)

    Onodera, T. E-mail: tosiyuki@smail.tohtech.ac.jp; Hitomi, K.; Shoji, T.; Hiratate, Y

    2004-06-01

    Recently, pixellated semiconductor detectors exhibit high-energy resolution, which have been studied actively and fabricated from CdTe, CZT and HgI{sub 2}. Thallium bromide (TlBr) is a compound semiconductor characterized with its high atomic numbers (Tl=81, Br=35) and high density (7.56 g/cm{sup 3}). Thus, TlBr exhibits higher photon stopping power than other semiconductor materials used for radiation detector fabrication such as CdTe, CZT and HgI{sub 2}. The wide band gap of TlBr (2.68 eV) permits the detectors low-noise operation at around room temperature. Our studies made an effort to fabricate pixellated TlBr detectors had sufficient detection efficiency and good charge collection efficiency. In this study, pixellated TlBr detectors were fabricated from the crystals purified by the multipass zone-refining method and grown by the horizontal traveling molten zone (TMZ) method. The TlBr detector has a continuous cathode over one crystal surface and 3x3 pixellated anodes (0.57x0.57 mm{sup 2} each) surrounded by a guard ring on the opposite surface. The electrodes were realized by vacuum evaporation of palladium through a shadow mask. Typical thickness of the detector was 2 mm. Spectrometric performance of the TlBr detectors was tested by irradiating them with {sup 241}Am (59.5 keV), {sup 57}Co (122 keV) and {sup 137}Cs (662 keV) gamma-ray sources at temperature of -20 deg. C. Energy resolutions (FWHM) were measured to be 4.0, 6.0 and 9.7 keV for 59.5, 122 and 662 keV gamma-rays, respectively.

  13. Gas filled prototype of a CdZnTe pixel detector

    International Nuclear Information System (INIS)

    Ramsey, B.; Sharma, D.; Sipila, H.; Gostilo, V.; Loupilov, A.

    2001-01-01

    CdZnTe pixel structures are currently the most promising detectors for the focal planes of hard X-ray telescopes, for astronomical observation in the range 5-100 keV. In Sharma et al. (Proc. SPIE 3765 (1999) 822) and Ramsey et al. (Nucl. Instrum. Methods A 458 (2001) 55) we presented preliminary results on the development of prototype 4x4 CdZnTe imaging detectors operated under vacuum. These pixel detectors were installed inside vacuum chambers on three-stage Peltier coolers providing detector temperatures down to -40 deg. C. A miniature sputter ion pump inside each chamber maintained the necessary vacuum of 10 -5 Torr. At a temperature of -20 deg. C we achieved an FWHM energy resolution of between 2% and 3% at 60 keV and ∼15% at 5.9 keV; however, the dependency on temperature was weak and at +20 deg. C the respective resolutions were 3% and 20%. As the detectors could be operated at room temperature without loss of their good characteristics it was possible to exclude the sputter ion pump and fill the chamber with dry nitrogen instead. We have tested a nitrogen-filled CdZnTe (5x5x1 mm 3 ) prototype having 0.65x0.65 mm 2 readout pads on a 0.75 mm pitch. The interpixel resistance at an applied voltage of 10 V was higher than 50 GΩ and the pixel leakage currents at room temperature with a bias of 200 V between each pad and the common electrode did not exceed 0.8 nA. The pixel detector inside the microassembly, which also contained the input stages of the preamplifiers, was installed on a Peltier cooler to maintain the detector temperature at +20 deg. C. To define real leakage currents of the pixels in their switched-on state we have checked the voltage on the preamplifiers feedback resistors. The resulting currents were 10-50 pA at a detector bias of 500 V. Under test, the typical energy resolution per pixel at +20 deg. C was ∼3% at energy 59.6 keV and ∼20% at energy 5.9 keV, which are similar to the values obtained in the vacuum prototype at room temperature

  14. Fabrication of ATLAS pixel detector prototypes at IRST

    International Nuclear Information System (INIS)

    Boscardin, M.; Betta, G.-F. Dalla; Gregori, P.; Zen, M.; Zorzi, N.

    2001-01-01

    We report on the development of a fabrication technology for n-on-n silicon pixel detectors oriented to the ATLAS experiment at LHC. The main processing issues and some selected results from the electrical characterization of detector prototypes and related test structures are presented and discussed

  15. arXiv Performance verification of the CMS Phase-1 Upgrade Pixel detector

    CERN Document Server

    Veszpremi, Viktor

    2017-12-04

    The CMS tracker consists of two tracking systems utilizing semiconductor technology: the inner pixel and the outer strip detectors. The tracker detectors occupy the volume around the beam interaction region between 3 cm and 110 cm in radius and up to 280 cm along the beam axis. The pixel detector consists of 124 million pixels, corresponding to about 2 m 2 total area. It plays a vital role in the seeding of the track reconstruction algorithms and in the reconstruction of primary interactions and secondary decay vertices. It is surrounded by the strip tracker with 10 million read-out channels, corresponding to 200 m 2 total area. The tracker is operated in a high-occupancy and high-radiation environment established by particle collisions in the LHC . The current strip detector continues to perform very well. The pixel detector that has been used in Run 1 and in the first half of Run 2 was, however, replaced with the so-called Phase-1 Upgrade detector. The new system is better suited to match the increased inst...

  16. Solid-State Photomultiplier with Integrated Front End Electronics

    Science.gov (United States)

    Christian, James; Stapels, Christopher; Johnson, Erik; Mukhopadhyay, Sharmistha; Jie Chen, Xiao; Miskimen, Rory

    2009-10-01

    The instrumentation cost of physics experiments has been reduced per channel, by the use of solid-state detectors, but these cost-effective techniques have not been translated to scintillation-based detectors. When considering photodetectors, the cost per channel is determined by the use of high-voltage, analog-to-digital converters, BNC cables, and any other ancillary devices. The overhead associated with device operation limits the number of channels for the detector system, while potentially limiting the scope of physics that can be explored. The PRIMEX experiment at JLab, which is being designed to measure the radiative widths of the η and η' pseudo-scalar mesons for a more comprehensive understanding of QCD at low energies, is an example where CMOS solid-state photomultipliers (SSPMs) can be implemented. The ubiquitous nature of CMOS allows for on-chip signal processing to provide front-end electronics within the detector package. We present the results of the device development for the PRIMEX calorimeter, discussing the characteristics of SSPMs, the potential cost savings, and experimental results of on-chip signal processing.

  17. A new design for SLAM front-end based on recursive SOM

    Science.gov (United States)

    Yang, Xuesi; Xia, Shengping

    2015-12-01

    Aiming at the graph optimization-based monocular SLAM, a novel design for the front-end in single camera SLAM is proposed, based on the recursive SOM. Pixel intensities are directly used to achieve image registration and motion estimation, which can save time compared with the current appearance-based frameworks, usually including feature extraction and matching. Once a key-frame is identified, a recursive SOM is used to actualize loop-closure detecting, resulting a more precise location. The experiment on a public dataset validates our method on a computer with a quicker and effective result.

  18. Design and Performance of the CMS Pixel Detector Readout Chip

    CERN Document Server

    Kästli, H C; Erdmann, W; Hörmann, C; Horisberger, R P; Kotlinski, D; Meier, B; Hoermann, Ch.

    2006-01-01

    The readout chip for the CMS pixel detector has to deal with an enormous data rate. On-chip zero suppression is inevitable and hit data must be buffered locally during the latency of the first level trigger. Dead-time must be kept at a minimum. It is dominated by contributions coming from the readout. To keep it low an analog readout scheme has been adopted where pixel addresses are analog coded. We present the architecture of the final CMS pixel detector readout chip with special emphasis on the analog readout chain. Measurements of its performance are discussed.

  19. FELIX: The New Approach for Interfacing to Front-end Electronics for the ATLAS Experiment

    CERN Document Server

    AUTHOR|(SzGeCERN)754725; The ATLAS collaboration; Anderson, John Thomas; Borga, Andrea; Boterenbrood, Hendrik; Chen, Hucheng; Chen, Kai; Drake, Gary; Donszelmann, Mark; Francis, David; Gorini, Benedetto; Guest, Daniel; Lanni, Francesco; Lehmann Miotto, Giovanna; Levinson, Lorne; Roich, Alexander; Schreuder, Frans Philip; Schumacher, J\\"orn; Vandelli, Wainer; Zhang, Jinlong

    2016-01-01

    From the ATLAS Phase-I upgrade and onward, new or upgraded detectors and trigger systems will be interfaced to the data acquisition, detector control and timing (TTC) systems by the Front-End Link eXchange (FELIX). FELIX is the core of the new ATLAS Trigger/DAQ architecture. Functioning as a router between custom serial links and a commodity network, FELIX is implemented by server PCs with commodity network interfaces and PCIe cards with large FPGAs and many high speed serial fiber transceivers. By separating data transport from data manipulation, the latter can be done by software in commodity servers attached to the network. Replacing traditional point-to-point links between Front-end components and the DAQ system by a switched network, FELIX provides scaling, flexibility uniformity and upgradability and reduces the diversity of custom hardware solutions in favour of software.

  20. Mechanical design and material budget of the CMS barrel pixel detector

    Energy Technology Data Exchange (ETDEWEB)

    Amsler, C; Boesiger, K; Chiochia, V; Maier, R; Meyer, Hp; Robmann, P; Scherr, S; Schmidt, A; Steiner, S [Universitaet Zuerich, Physik-Institut, Winterthurerstr. 190, CH-8057 Zuerich (Switzerland); Erdmann, W; Gabathuler, K; Horisberger, R; Koenig, S; Kotlinski, D; Meier, B; Streuli, S [Paul Scherrer Institut, CH-5232 Villigen (Switzerland); Rizzi, A [ETH Zuerich, Institute for Particle Physics, CH-8093 Zuerich (Switzerland)], E-mail: Alexander.Schmidt@cern.ch

    2009-05-15

    The Compact Muon Solenoid experiment at the Large Hadron Collider at CERN includes a silicon pixel detector as its innermost component. Its main task is the precise reconstruction of charged particles close to the primary interaction vertex. This paper gives an overview of the mechanical requirements and design choices for the barrel pixel detector. The distribution of material in the detector as well as its description in the Monte Carlo simulation are discussed in detail.

  1. Mechanical Design and Material Budget of the CMS Barrel Pixel Detector

    CERN Document Server

    Amsler, C; Chiochia, V; Erdmann, W; Gabathuler, K; Horisberger, R; König, S; Kotlinski, D; Maier, R; Meyer, H; Meier, B; Meyer, Hp; Rizzi, A; Robmann, P; Scherr, S; Schmidt, A; Steiner, S; Erdmann, W; Gabathuler, K; Horisberger, R; König, S; Kotlinski, D; Meier, B; Streuli, S; Rizzi, A

    2009-01-01

    The Compact Muon Solenoid experiment at the Large Hadron Collider at CERN includes a silicon pixel detector as its innermost component. Its main task is the precise reconstruction of charged particles close to the primary interaction vertex. This paper gives an overview of the mechanical requirements and design choices for the barrel pixel detector. The distribution of material in the detector as well as its description in the Monte Carlo simulation are discussed in detail.

  2. The ATLAS Planar Pixel Sensor R and D project

    International Nuclear Information System (INIS)

    Beimforde, M.

    2011-01-01

    Within the R and D project on Planar Pixel Sensor Technology for the ATLAS inner detector upgrade, the use of planar pixel sensors for highest fluences as well as large area silicon detectors is investigated. The main research goals are optimizing the signal size after irradiations, reducing the inactive sensor edges, adjusting the readout electronics to the radiation induced decrease of the signal sizes, and reducing the production costs. Planar n-in-p sensors have been irradiated with neutrons and protons up to fluences of 2x10 16 n eq /cm 2 and 1x10 16 n eq /cm 2 , respectively, to study the collected charge as a function of the irradiation dose received. Furthermore comparisons of irradiated standard 300μm and thin 140μm sensors will be presented showing an increase of signal sizes after irradiation in thin sensors. Tuning studies of the present ATLAS front end electronics show possibilities to decrease the discriminator threshold of the present FE-I3 read out chips to less than 1500 electrons. In the present pixel detector upgrade scenarios a flat stave design for the innermost layers requires reduced inactive areas at the sensor edges to ensure low geometric inefficiencies. Investigations towards achieving slim edges presented here show possibilities to reduce the width of the inactive area to less than 500μm. Furthermore, a brief overview of present simulation activities within the Planar Pixel R and D project is given.

  3. ATLAS rewards two pixel detector suppliers

    CERN Multimedia

    2007-01-01

    Peter Jenni, ATLAS spokesperson, presented the ATLAS supplier award to Herbert Reichl, IZM director, and to Simonetta Di Gioia, from the SELEX company.Two of ATLAS’ suppliers were awarded prizes at a ceremony on Wednesday 13 June attended by representatives of the experiment’s management and of CERN. The prizes went to the Fraunhofer Institut für Zuverlässigkeit und Mikrointegration (IZM) in Berlin and the company SELEX Sistemi Integrati in Rome for the manufacture of modules for the ATLAS pixel detector. SELEX supplied 1500 of the modules for the tracker, while IZM produced a further 1300. The modules, each made up of 46080 channels, form the active part of the ATLAS pixel detector. IZM and SELEX received the awards for the excellent quality of their work: the average number of faulty channels per module was less than 2.10-3. They also stayed within budget and on schedule. The difficulty they faced was designing modules based on electronic components and sensor...

  4. Optical data links for the ATLAS SCT and Pixel Detector

    International Nuclear Information System (INIS)

    Gregor, I.M.; Weidberg, A.R.; Lee, S.C.; Chu, M.L.; Teng, P.K.

    2001-01-01

    ATLAS (The ATLAS Technical Proposal, CERN/LHCC 94-33) is one of the large electronic particle detectors at LHC (The LHC Conceptual Design, Report- The Yellow Book, CERN/AC/95-05(LHC)) which will become operational in 2005. It is planned to use radiation tolerant optical links for the data transfer from the SemiConductor Tracker (SCT) (ATLAS Inner Detector Technical Proposal, CERN/LHCC 97-16 and CERN/LHCC 97-17). and Pixel Detector (ATLAS Pixel Detector Technical Proposal, CERN/LHCC 98-13) systems to the acquisition electronics over a distance up to 140m. The overall architecture and the performance of these optical data links are described. One of the three candidate designs for an on-detector Opto-Package is presented

  5. Studies of mono-crystalline CVD diamond pixel detectors

    CERN Document Server

    Bartz, E; Atramentov, O; Yang, Z; Hall-Wilton, R; Schnetzer, S; Patel, R; Bugg, W; Hebda, P; Halyo, V; Hunt, A; Marlow, D; Steininger, H; Ryjov, V; Hits, D; Spanier, S; Pernicka, M; Johns, W; Doroshenko, J; Hollingsworth, M; Harrop, B; Farrow, C; Stone, R

    2011-01-01

    The Pixel Luminosity Telescope (PLT) is a dedicated luminosity monitor, presently under construction, for the Compact Muon Solenoid (CMS) experiment at the Large Hadron Collider (LHC). It measures the particle flux in several three layered pixel diamond detectors that are aligned precisely with respect to each other and the beam direction. At a lower rate it also performs particle track position measurements. The PLTs mono-crystalline CVD diamonds are bump-bonded to the same readout chip used in the silicon pixel system in CMS. Mono-crystalline diamond detectors have many attributes that make them desirable for use in charged particle tracking in radiation hostile environments such as the LHC. In order to further characterize the applicability of diamond technology to charged particle tracking we performed several tests with particle beams that included a measurement of the intrinsic spatial resolution with a high resolution beam telescope. Published by Elsevier B.V.

  6. Studies of mono-crystalline CVD diamond pixel detectors

    Energy Technology Data Exchange (ETDEWEB)

    Bugg, W. [University of Tennessee, Knoxville (United States); Hollingsworth, M., E-mail: mhollin3@utk.edu [University of Tennessee, Knoxville (United States); Spanier, S.; Yang, Z. [University of Tennessee, Knoxville (United States); Bartz, E.; Doroshenko, J.; Hits, D.; Schnetzer, S.; Stone, R.; Atramentov, O.; Patel, R.; Barker, A. [Rutgers University, Piscataway (United States); Hall-Wilton, R.; Ryjov, V.; Farrow, C. [CERN, Geneva (Switzerland); Pernicka, M.; Steininger, H. [HEPHY, Vienna (Austria); Johns, W. [Vanderbilt University, Nashville (United States); Halyo, V.; Harrop, B. [Princeton University, Princeton (United States); and others

    2011-09-11

    The Pixel Luminosity Telescope (PLT) is a dedicated luminosity monitor, presently under construction, for the Compact Muon Solenoid (CMS) experiment at the Large Hadron Collider (LHC). It measures the particle flux in several three layered pixel diamond detectors that are aligned precisely with respect to each other and the beam direction. At a lower rate it also performs particle track position measurements. The PLT's mono-crystalline CVD diamonds are bump-bonded to the same readout chip used in the silicon pixel system in CMS. Mono-crystalline diamond detectors have many attributes that make them desirable for use in charged particle tracking in radiation hostile environments such as the LHC. In order to further characterize the applicability of diamond technology to charged particle tracking we performed several tests with particle beams that included a measurement of the intrinsic spatial resolution with a high resolution beam telescope.

  7. High-speed X-ray imaging pixel array detector for synchrotron bunch isolation.

    Science.gov (United States)

    Philipp, Hugh T; Tate, Mark W; Purohit, Prafull; Shanks, Katherine S; Weiss, Joel T; Gruner, Sol M

    2016-03-01

    A wide-dynamic-range imaging X-ray detector designed for recording successive frames at rates up to 10 MHz is described. X-ray imaging with frame rates of up to 6.5 MHz have been experimentally verified. The pixel design allows for up to 8-12 frames to be stored internally at high speed before readout, which occurs at a 1 kHz frame rate. An additional mode of operation allows the integration capacitors to be re-addressed repeatedly before readout which can enhance the signal-to-noise ratio of cyclical processes. This detector, along with modern storage ring sources which provide short (10-100 ps) and intense X-ray pulses at megahertz rates, opens new avenues for the study of rapid structural changes in materials. The detector consists of hybridized modules, each of which is comprised of a 500 µm-thick silicon X-ray sensor solder bump-bonded, pixel by pixel, to an application-specific integrated circuit. The format of each module is 128 × 128 pixels with a pixel pitch of 150 µm. In the prototype detector described here, the three-side buttable modules are tiled in a 3 × 2 array with a full format of 256 × 384 pixels. The characteristics, operation, testing and application of the detector are detailed.

  8. MMIC front-ends for optical communication systems

    DEFF Research Database (Denmark)

    Petersen, Anders Kongstad

    1993-01-01

    Two different types of optical front-end MMIC amplifiers for a 2.5-Gb/s coherent heterodyne optical receiver are presented. A bandwidth of 6-12 GHz has been obtained for a tuned front-end and 3-13 GHz for a distributed front-end. An input noise current density of 5-15 pA/√Hz has been obtained for...

  9. Performance verification of the CMS Phase-1 Upgrade Pixel detector

    Science.gov (United States)

    Veszpremi, V.

    2017-12-01

    The CMS tracker consists of two tracking systems utilizing semiconductor technology: the inner pixel and the outer strip detectors. The tracker detectors occupy the volume around the beam interaction region between 3 cm and 110 cm in radius and up to 280 cm along the beam axis. The pixel detector consists of 124 million pixels, corresponding to about 2 m 2 total area. It plays a vital role in the seeding of the track reconstruction algorithms and in the reconstruction of primary interactions and secondary decay vertices. It is surrounded by the strip tracker with 10 million read-out channels, corresponding to 200 m 2 total area. The tracker is operated in a high-occupancy and high-radiation environment established by particle collisions in the LHC . The current strip detector continues to perform very well. The pixel detector that has been used in Run 1 and in the first half of Run 2 was, however, replaced with the so-called Phase-1 Upgrade detector. The new system is better suited to match the increased instantaneous luminosity the LHC would reach before 2023. It was built to operate at an instantaneous luminosity of around 2×1034 cm-2s-1. The detector's new layout has an additional inner layer with respect to the previous one; it allows for more efficient tracking with smaller fake rate at higher event pile-up. The paper focuses on the first results obtained during the commissioning of the new detector. It also includes challenges faced during the first data taking to reach the optimal measurement efficiency. Details will be given on the performance at high occupancy with respect to observables such as data-rate, hit reconstruction efficiency, and resolution.

  10. TDC for the front end architecture in the PANDA MVD

    Energy Technology Data Exchange (ETDEWEB)

    Riccardi, Alberto; Brinkmann, Kai Thomas; Di Pietro, Valentino [II Physikalisches Institut Justus-Liebig-Universitaet Giessen, Giessen (Germany); Garbolino, Sara; Rivetti, Angelo; Rolo, Manuel [INFN Sezione di Torino, Torino (Italy); Collaboration: PANDA-Collaboration

    2014-07-01

    In nuclear detectors the information on the energy of the particle is usually obtained by measuring the amplitude of the signal delivered by the sensor. The low voltage power supply used in modern deep submicron technologies constrains the maximum dynamic range of the ADC. So we can obtain the energy information with time-based techniques, in which the energy is associated with the duration of the signal through the Time over Threshold method. This work is focused on the PANDA Micro Vertex Detector and explores the possibility of applying a time-based readout approach for the microstrip sensors. In PANDA, the strip system must cope with hit rates up to 50 kHz per channel. Therefore, the front-end output must be relatively short. This implies that the clock resolution is not enough to measure the signal duration, so it is necessary to use a Time to Digital Converter. The front-end and the TDC structure are designed in a 0.11μm CMOS process. The TDC chosen is based on an analog clock interpolator because it combines good time resolution with a fairly simple implementation and low power consumption. In the presentation the architectures are described and the challenges associated to its implementation discussed.

  11. Estimation of radiation effects in the front-end electronics of an ILC electromagnetic calorimeter

    International Nuclear Information System (INIS)

    Bartsch, V.; Postranecky, M.; Targett-Adams, C.; Warren, M.; Wing, M.

    2008-01-01

    The front-end electronics of the electromagnetic calorimeter of an International Linear Collider detector are situated in a radiation environment. This requires the effect of the radiation on the performance of the electronics, specifically FPGAs, to be examined. In this paper we study the flux, particle spectra and deposited doses at the front-end electronics of the electromagnetic calorimeter of a detector at the ILC. We also study the occupancy of the electromagnetic calorimeter. These estimates are compared with measurements, e.g. of the radiation damage of FPGAs, done elsewhere. The outcome of the study shows that the radiation doses and the annual flux is low enough to allow today's FPGAs to operate. The Single Event Upset rate, however, lies between 14 min and 12 h depending on the FPGA used and therefore needs to be considered in the design of the data acquisition system of the electromagnetic calorimeter. The occupancy is about 0.002 per bunch train not taking into account the effect of noise which depends on the choice of the detector

  12. Characterization of Thin Pixel Sensor Modules Interconnected with SLID Technology Irradiated to a Fluence of 2⋅10 15 $n_{eq}$ /cm 2

    CERN Document Server

    Weigell, P; Beimforde, M; Macchiolo, A; Moser, H G; Nisius, R; Richter, R H

    2011-01-01

    A new module concept for future ATLAS pixel detector upgrades is presented, where thin n-in-p silicon sensors are connected to the front-end chip exploiting the novel Solid Liquid Interdiffusion technique (SLID) and the signals are read out via Inter Chip Vias (ICV) etched through the front-end. This should serve as a proof of principle for future four-side buttable pixel assemblies for the ATLAS upgrades, without the cantilever presently needed in the chip for the wire bonding. The SLID interconnection, developed by the Fraunhofer EMFT, is a possible alternative to the standard bump-bonding. It is characterized by a very thin eutectic Cu-Sn alloy and allows for stacking of different layers of chips on top of the first one, without destroying the pre-existing bonds. This paves the way for vertical integration technologies. Results of the characterization of the first pixel modules interconnected through SLID as well as of one sample irradiated to 2⋅10 15 \\,\

  13. The simulation of charge sharing in semiconductor X-ray pixel detectors

    CERN Document Server

    Mathieson, K; O'Shea, V; Passmore, M S; Rahman, M; Smith, K M; Watt, J; Whitehill, C

    2002-01-01

    Two simulation packages were used to model the sharing of charge, due to the scattering and diffusion of carriers, between adjacent pixel elements in semiconductors X-ray detectors. The X-ray interaction and the consequent multiple scattering was modelled with the aid of the Monte Carlo package, MCNP. The resultant deposited charge distribution was then used to create the charge cloud profile in the finite element semiconductor simulation code MEDICI. The analysis of the current pulses induced on pixel electrodes for varying photon energies was performed for a GaAs pixel detector. For a pixel pitch of 25 mu m, the charge lost to a neighbouring pixel was observed to be constant, at 0.6%, through the energies simulated. Ultimately, a fundamental limit on the pixel element size for imaging and spectroscopic devices may be set due to these key physical principles.

  14. LHCb: Test Station for the LHCb Muon Front-End Electronic

    CERN Multimedia

    Polycarpo, E

    2005-01-01

    The LHCb Muon Group has developed the CMOS ASIC CARIOCA to readout its Multiwire Proportional Chambers (MWPC) and GEM detectors, using a rad-hard IBM 0.25um process. Each ASIC holds 8 identical current-mode ASDB channels with individual input thresholds. The Muon detector contains around 120000 physical channels, requiring production of 20000 front-end chips, roughly. CARIOCA has been developed to process MWPC cathode and anode signals and two different versions have been implemented to overcome the requirement of MWP and GEM chambers operation. The test station has been devised to accomplish bipolar tests and to measure characteristics of both CARIOCA versions.

  15. Development of a super B-factory monolithic active pixel detector-the Continuous Acquisition Pixel (CAP) prototypes

    International Nuclear Information System (INIS)

    Varner, G.; Barbero, M.; Bozek, A.; Browder, T.; Fang, F.; Hazumi, M.; Igarashi, A.; Iwaida, S.; Kennedy, J.; Kent, N.; Olsen, S.; Palka, H.; Rosen, M.; Ruckman, L.; Stanic, S.; Trabelsi, K.; Tsuboyama, T.; Uchida, K.

    2005-01-01

    Over the last few years great progress has been made in the technological development of Monolithic Active Pixel Sensors (MAPS) such that upgrades to existing vertex detectors using this technology are now actively being considered. Future vertex detection at an upgraded KEK-B factory, already the highest luminosity collider in the world, will require a detector technology capable of withstanding the increased track densities and larger radiation exposures. Near the beam pipe the current silicon strip detectors have projected occupancies in excess of 100%. Deep sub-micron MAPS look very promising to address this problem. In the context of an upgrade to the Belle vertex detector, the major obstacles to realizing such a device have been concerns about radiation hardness and readout speed. Two prototypes implemented in the TSMC 0.35 μm process have been developed to address these issues. Denoted the Continuous Acquisition Pixel, or CAP, the two variants of this architecture are distinguished in that CAP2 includes an 8-deep sampling pipeline within each 22.5 μm 2 pixel. Preliminary test results and remaining R and D issues are presented

  16. Semiconductor pixel detectors for digital mammography

    International Nuclear Information System (INIS)

    Novelli, M.; Amendolia, S.R.; Bisogni, M.G.; Boscardin, M.; Dalla Betta, G.F.; Delogu, P.; Fantacci, M.E.; Quattrocchi, M.; Rosso, V.; Stefanini, A.; Venturelli, L.; Zucca, S.

    2003-01-01

    We present some results obtained with silicon and gallium arsenide pixel detectors to be applied in the field of digital mammography. Even though GaAs is suitable for medical imaging applications thanks to its atomic number, which allows a very good detection efficiency, it often contains an high concentrations of traps which decrease the charge collection efficiency (CCE). So we have analysed both electrical and spectroscopic performance of different SI GaAs diodes as a function of concentrations of dopants in the substrate, in order to find a material by which we can obtain a CCE allowing the detection of all the photons that interact in the detector. Nevertheless to be able to detect low contrast details, efficiency and CCE are not the only parameters to be optimized; also the stability of the detection system is fundamental. In the past we have worked with Si pixel detectors; even if its atomic number does not allow a good detection efficiency at standard thickness, it has a very high stability. So keeping in mind the need to increase the Silicon detection efficiency we performed simulations to study the behaviour of the electrical potential in order to find a geometry to avoid the risk of electrical breakdown

  17. Semiconductor pixel detectors for digital mammography

    Energy Technology Data Exchange (ETDEWEB)

    Novelli, M. E-mail: marzia.novelli@pi.infn.it; Amendolia, S.R.; Bisogni, M.G.; Boscardin, M.; Dalla Betta, G.F.; Delogu, P.; Fantacci, M.E.; Quattrocchi, M.; Rosso, V.; Stefanini, A.; Venturelli, L.; Zucca, S

    2003-08-21

    We present some results obtained with silicon and gallium arsenide pixel detectors to be applied in the field of digital mammography. Even though GaAs is suitable for medical imaging applications thanks to its atomic number, which allows a very good detection efficiency, it often contains an high concentrations of traps which decrease the charge collection efficiency (CCE). So we have analysed both electrical and spectroscopic performance of different SI GaAs diodes as a function of concentrations of dopants in the substrate, in order to find a material by which we can obtain a CCE allowing the detection of all the photons that interact in the detector. Nevertheless to be able to detect low contrast details, efficiency and CCE are not the only parameters to be optimized; also the stability of the detection system is fundamental. In the past we have worked with Si pixel detectors; even if its atomic number does not allow a good detection efficiency at standard thickness, it has a very high stability. So keeping in mind the need to increase the Silicon detection efficiency we performed simulations to study the behaviour of the electrical potential in order to find a geometry to avoid the risk of electrical breakdown.

  18. Defective pixel map creation based on wavelet analysis in digital radiography detectors

    International Nuclear Information System (INIS)

    Park, Chun Joo; Lee, Hyoung Koo; Song, William Y.; Achterkirchen, Thorsten Graeve; Kim, Ho Kyung

    2011-01-01

    The application of digital radiography detectors has attracted increasing attention in both medicine and industry. Since the imaging detectors are fabricated by semiconductor manufacturing process over large areas, defective pixels in the detectors are unavoidable. Moreover, the radiation damage due to the routine use of the detectors progressively increases the density of defective pixels. In this study, we present a method of identifying defective pixels in digital radiography detectors based on wavelet analysis. Artifacts generated due to wavelet transformations have been prevented by an additional local threshold method. The proposed method was applied to a sample digital radiography and the result was promising. The proposed method uses a single pair of dark and white images and does not require them to be corrected in gain-and-offset properties. This method will be helpful for the reliable use of digital radiography detectors through the working lifetime.

  19. Performance Studies of Pixel Hybrid Photon Detectors for the LHCb RICH Counters

    CERN Document Server

    Aglieri Rinella, G; Piedigrossi, D; Van Lysebetten, A

    2004-01-01

    The Pixel Hybrid Photon Detector is a vacuum tube with a multi-alkali photo cathode, high voltage cross-focused electron optics and an anode consisting of a silicon pixel detector bump-bonded to a readout CMOS electronic chip fully encapsulated in the device. The Pixel HPD fulfils the requirements of the Ring Imaging Cherenkov counters of the LHCb experiment at LHC. The performances of the Pixel HPD will be discussed with reference to laboratory measurements, Cherenkov light imaging in recent beam tests, image distortions due to a magnetic field.

  20. Hexagonal pixel detector with time encoded binary readout

    International Nuclear Information System (INIS)

    Hoedlmoser, H.; Varner, G.; Cooney, M.

    2009-01-01

    The University of Hawaii is developing continuous acquisition pixel (CAP) detectors for vertexing applications in lepton colliding experiments such as SuperBelle or ILC. In parallel to the investigation of different technology options such as MAPS or SOI, both analog and binary readout concepts have been tested. First results with a binary readout scheme in which the hit information is time encoded by means of a signal shifting mechanism have recently been published. This paper explains the hit reconstruction for such a binary detector with an emphasis on fake hit reconstruction probabilities in order to evaluate the rate capability in a high background environment such as the planned SuperB factory at KEK. The results show that the binary concept is at least comparable to any analog readout strategy if not better in terms of occupancy. Furthermore, we present a completely new binary readout strategy in which the pixel cells are arranged in a hexagonal grid allowing the use of three independent output directions to reduce reconstruction ambiguities. The new concept uses the same signal shifting mechanism for time encoding, however, in dedicated transfer lines on the periphery of the detector, which enables higher shifting frequencies. Detailed Monte Carlo simulations of full size pixel matrices including hit and BG generation, signal generation, and data reconstruction show that by means of multiple signal transfer lines on the periphery the pixel can be made smaller (higher resolution), the number of output channels and the data volume per triggered event can be reduced dramatically, fake hit reconstruction is lowered to a minimum and the resulting effective occupancies are less than 10 -4 . A prototype detector has been designed in the AMS 0.35μm Opto process and is currently under fabrication.

  1. Development of a Detector Control System for the ATLAS Pixel detector in the HL-LHC

    International Nuclear Information System (INIS)

    Lehmann, N.; Kersten, S.; Zeitnitz, C.; Karagounis, M.

    2016-01-01

    The upgrade of the LHC to the HL-LHC requires a new ITk detector. The innermost part of this new tracker is a pixel detector. The University of Wuppertal is developing a new DCS to monitor and control this new pixel detector. The current concept envisions three parallel paths of the DCS. The first path, called security path, is hardwired and provides an interlock system to guarantee the safety of the detector and human beings. The second path is a control path. This path is used to supervise the entire detector. The control path has its own communication lines independent from the regular data readout for reliable operation. The third path is for diagnostics and provides information on demand. It is merged with the regular data readout and provides the highest granularity and most detailed information. To reduce the material budget, a serial power scheme is the baseline for the pixel modules. A new ASIC used in the control path is in development at Wuppertal for this serial power chain. A prototype exists already and a proof of principle was demonstrated. Development and research is ongoing to guarantee the correct operation of the new ASIC in the harsh environment of the HL-LHC. The concept for the new DCS will be presented in this paper. A focus will be made on the development of the DCS chip, used for monitoring and control of pixel modules in a serial power chain.

  2. Performance of the INTPIX6 SOI pixel detector

    International Nuclear Information System (INIS)

    Arai, Y.; Miyoshi, T.; Bugiel, Sz.; Dasgupta, R.; Idzik, M.; Kapusta, P.; Turala, M.; Kucewicz, W.

    2017-01-01

    Characterization of the monolithic pixel detector INPTIX6, designed at KEK and fabricated in Lapis 0.2 μ  m Fully-Depleted, Low-Leakage Silicon-On-Insulator (SOI) CMOS technology, was performed. The INTPIX6 comprises a large area of 1408 × 896 integrating type squared pixels of 12 micron pitch. In this work the performance and measurement results of the prototypes produced on lower resistivity Czochralski type (CZ-n) and high resistivity floating zone (FZ-n) sensor wafers are presented. Using 241 Am radioactive source the noise of INTPIX6 was measured, showing the ENC (Equivalent Noise Charge) of about 70 e − . The resolution calculated from the FWHM of the Iron-55 X-ray peak was about 100 e − . The radiation hardness of the SOI pixel detector was also investigated. The CZ-n type INTPIX6 received a dose of 60 krad and its performance has been continuously monitored during the irradiation.

  3. Performance of the INTPIX6 SOI pixel detector

    Science.gov (United States)

    Arai, Y.; Bugiel, Sz.; Dasgupta, R.; Idzik, M.; Kapusta, P.; Kucewicz, W.; Miyoshi, T.; Turala, M.

    2017-01-01

    Characterization of the monolithic pixel detector INPTIX6, designed at KEK and fabricated in Lapis 0.2 μ m Fully-Depleted, Low-Leakage Silicon-On-Insulator (SOI) CMOS technology, was performed. The INTPIX6 comprises a large area of 1408 × 896 integrating type squared pixels of 12 micron pitch. In this work the performance and measurement results of the prototypes produced on lower resistivity Czochralski type (CZ-n) and high resistivity floating zone (FZ-n) sensor wafers are presented. Using 241Am radioactive source the noise of INTPIX6 was measured, showing the ENC (Equivalent Noise Charge) of about 70 e-. The resolution calculated from the FWHM of the Iron-55 X-ray peak was about 100 e-. The radiation hardness of the SOI pixel detector was also investigated. The CZ-n type INTPIX6 received a dose of 60 krad and its performance has been continuously monitored during the irradiation.

  4. Design and implementation of an expert system for the detector control systems of the ATLAS pixel detector

    International Nuclear Information System (INIS)

    Henss, Tobias

    2008-12-01

    In the framework of this thesis an expert system ''Pixel-Advisor'' for the control system of the pixel detector was designed and implemented. This supports the operational personnel in the diagnosis and removal of possible problems, which are in connection with the detector control system and unburdens the few available DCS experts

  5. Characterization of active CMOS sensors for capacitively coupled pixel detectors

    Energy Technology Data Exchange (ETDEWEB)

    Hirono, Toko; Gonella, Laura; Janssen, Jens; Hemperek, Tomasz; Huegging, Fabian; Krueger, Hans; Wermes, Norbert [Institute of Physics, University of Bonn (Germany); Peric, Ivan [Institut fuer Prozessdatenverarbeitung und Elektronik, Karlsruher Institut fuer Technologie, Karlsruhe (Germany)

    2015-07-01

    Active CMOS pixel sensor is one of the most attractive candidates for detectors of upcoming particle physics experiments. In contrast to conventional sensors of hybrid detectors, signal processing circuit can be integrated in the active CMOS sensor. The characterization and optimization of the pixel circuit are indispensable to obtain a good performance from the sensors. The prototype chips of the active CMOS sensor were fabricated in the AMS 180nm and L-Foundry 150 nm CMOS processes, respectively a high voltage and high resistivity technology. Both chips have a charge sensitive amplifier and a comparator in each pixel. The chips are designed to be glued to the FEI4 pixel readout chip. The signals from 3 pixels of the prototype chips are capacitively coupled to the FEI4 input pads. We have performed lab tests and test beams to characterize the prototypes. In this presentation, the measurement results of the active CMOS prototype sensors are shown.

  6. Detector Sampling of Optical/IR Spectra: How Many Pixels per FWHM?

    Science.gov (United States)

    Robertson, J. Gordon

    2017-08-01

    Most optical and IR spectra are now acquired using detectors with finite-width pixels in a square array. Each pixel records the received intensity integrated over its own area, and pixels are separated by the array pitch. This paper examines the effects of such pixellation, using computed simulations to illustrate the effects which most concern the astronomer end-user. It is shown that coarse sampling increases the random noise errors in wavelength by typically 10-20 % at 2 pixels per Full Width at Half Maximum, but with wide variation depending on the functional form of the instrumental Line Spread Function (i.e. the instrumental response to a monochromatic input) and on the pixel phase. If line widths are determined, they are even more strongly affected at low sampling frequencies. However, the noise in fitted peak amplitudes is minimally affected by pixellation, with increases less than about 5%. Pixellation has a substantial but complex effect on the ability to see a relative minimum between two closely spaced peaks (or relative maximum between two absorption lines). The consistent scale of resolving power presented by Robertson to overcome the inadequacy of the Full Width at Half Maximum as a resolution measure is here extended to cover pixellated spectra. The systematic bias errors in wavelength introduced by pixellation, independent of signal/noise ratio, are examined. While they may be negligible for smooth well-sampled symmetric Line Spread Functions, they are very sensitive to asymmetry and high spatial frequency sub-structure. The Modulation Transfer Function for sampled data is shown to give a useful indication of the extent of improperly sampled signal in an Line Spread Function. The common maxim that 2 pixels per Full Width at Half Maximum is the Nyquist limit is incorrect and most Line Spread Functions will exhibit some aliasing at this sample frequency. While 2 pixels per Full Width at Half Maximum is nevertheless often an acceptable minimum for

  7. Characterization of Thin Pixel Sensor Modules Interconnected with SLID Technology Irradiated to a Fluence of 2$\\cdot 10^{15}$\\,n$_{\\mathrm{eq}}$/cm$^2$

    CERN Document Server

    INSPIRE-00237859; Beimforde, M.; Macchiolo, A.; Moser, H.G.; Nisius, R.; Richter, R.H.

    2011-01-01

    A new module concept for future ATLAS pixel detector upgrades is presented, where thin n-in-p silicon sensors are connected to the front-end chip exploiting the novel Solid Liquid Interdiffusion technique (SLID) and the signals are read out via Inter Chip Vias (ICV) etched through the front-end. This should serve as a proof of principle for future four-side buttable pixel assemblies for the ATLAS upgrades, without the cantilever presently needed in the chip for the wire bonding. The SLID interconnection, developed by the Fraunhofer EMFT, is a possible alternative to the standard bump-bonding. It is characterized by a very thin eutectic Cu-Sn alloy and allows for stacking of different layers of chips on top of the first one, without destroying the pre-existing bonds. This paves the way for vertical integration technologies. Results of the characterization of the first pixel modules interconnected through SLID as well as of one sample irradiated to $2\\cdot10^{15}$\\,\

  8. Development of a cylindrical tracking detector with multichannel scintillation fibers and pixelated photon detector readout

    Energy Technology Data Exchange (ETDEWEB)

    Akazawa, Y.; Miwa, K.; Honda, R.; Shiozaki, T.; Chiga, N.

    2015-07-01

    We are developing a cylindrical tracking detector for a Σp scattering experiment in J-PARC with scintillation fibers and the Pixelated Photon Detector (PPD) readout, which is called as cylindrical fiber tracker (CFT), in order to reconstruct trajectories of charged particles emitted inside CFT. CFT works not only as a tracking detector but also a particle identification detector from energy deposits. A prototype CFT consisting of two straight layers and one spiral layer was constructed. About 1100 scintillation fibers with a diameter of 0.75 mm (Kuraray SCSF-78 M) were used. Each fiber signal was read by Multi-Pixel Photon Counter (MPPC, HPK S10362-11-050P, 1×1 mm{sup 2}, 400 pixels) fiber by fiber. MPPCs were handled with Extended Analogue Silicon Photomultipliers Integrated ReadOut Chip (EASIROC) boards, which were developed for the readout of a large number of MPPCs. The energy resolution of one layer was 28% for a 70 MeV proton where the energy deposit in fibers was 0.7 MeV.

  9. Fast front-end electronics for COMPASS MWPCs

    CERN Document Server

    Colantoni, M L; Ferrero, A; Frolov, V; Grasso, A; Heinz, S; Maggiora, A; Maggiora, M G; Panzieri, D; Popov, A; Tchalyshev, V

    2000-01-01

    In the COMPASS experiment, under construction at CERN, about 23000 channels of MWPCs will be used. The very high rate of the muon and hadron beams, and the consequently high trigger rate, require front- end electronics with innovative conceptual design. A new MWPC front- end electronics that fulfills the main COMPASS requirement to have a fast DAQ with a minimum dead-time has been designed. The general concept of the front-end cards is described; the comparative tests of two front-end chips, and different fast gas mixtures, are also shown. The commissioning of the experiment will start in the summer 2000, and production running, using the muon beam, is foreseen for the year 2001. (8 refs).

  10. The Gigatracker: An ultra-fast and low-mass silicon pixel detector for the NA62 experiment

    CERN Document Server

    Fiorini, M; Morel, M; Petrucci, F; Marchetto, F; Garbolino, S; Cortina, E; Tiuraniemi, S; Ceccucci, A; Martin, E; Riedler, P; Martoiu, S; Ramusino, A C; Rinella, G A; Mapelli, A; Mazza, G; Noy, M; Jarron, P; Nuessle, G; Dellacasa, G; Kluge, A; Rivetti, A; Kaplon, J

    2011-01-01

    The Gigatracker is a hybrid silicon pixel detector developed to track the highly intense NA62 hadron beam with a time resolution of 150 ps (rms). The beam spectrometer of the experiment is composed of three Gigatracker stations installed in vacuum in order to precisely measure momentum, time and direction of every traversing particle. Precise tracking demands a very low mass of the detector assembly (<0.5\\% X(O) per station) in order to limit multiple scattering and beam hadronic interactions. The high rate and especially the high timing precision requirements are very demanding: two R\\&D options are ongoing and the corresponding prototype read-out chips have been recently designed and produced in 0.13 mu m CMOS technology. One solution makes use of a constant fraction discriminator and on-pixel analogue-based time-to-digital-converter (TDC); the other comprises a delay-locked loop based TDC placed at the end of each pixel column and a time-over-threshold discriminator with time-walk correction techniq...

  11. Charge loss between contacts of CdZnTe pixel detectors

    International Nuclear Information System (INIS)

    Bolotnikov, A.E.; Cook, W.R.; Harrison, F.A.; Wong, A.-S.; Schindler, S.M.; Eichelberger, A.C.

    1999-01-01

    The surface of Cd 1-x Zn x Te (CZT) material has high resistivity but is not a perfect dielectric. Even a small surface conductivity can affect the electric field distribution, and therefore, the charge collection efficiency of a CZT pixel detector. The paper describes studies of this phenomenon for several contact configurations made on a single CZT detector. We have determined the maximum inter-contact separation at which the surface inter-pixel charge loss can be neglected. (author)

  12. RPC performance vs. front-end electronics

    International Nuclear Information System (INIS)

    Cardarelli, R.; Aielli, G.; Camarri, P.; Di Ciaccio, A.; Di Stante, L.; Liberti, B.; Pastori, E.; Santonico, R.; Zerbini, A.

    2012-01-01

    Moving the amplification from the gas to the front-end electronics was a milestone in the development of Resistive Plate Chambers. Here we discuss the historical evolution of RPCs and we show the results obtained with newly developed front-end electronics with threshold in the fC range.

  13. Development of pixel detectors for SSC vertex tracking

    International Nuclear Information System (INIS)

    Kramer, G.; Shapiro, S.L.; Arens, J.F.; Jernigan, J.G.; Skubic, P.

    1991-04-01

    A description of hybrid PIN diode arrays and a readout architecture for their use as a vertex detector in the SSC environment is presented. Test results obtained with arrays having 256 x 256 pixels, each 30 μm square, are also presented. The development of a custom readout for the SSC will be discussed, which supports a mechanism for time stamping hit pixels, storing their xy coordinates, and storing the analog information within the pixel. The peripheral logic located on the array, permits the selection of those pixels containing interesting data and their coordinates to be selectively read out. This same logic also resolves ambiguous pixel ghost locations and controls the pixel neighbor read out necessary to achieve high spatial resolution. The thermal design of the vertex tracker and the proposed signal processing architecture will also be discussed. 5 refs., 13 figs., 3 tabs

  14. A gas pixel detector for X-ray imaging

    International Nuclear Information System (INIS)

    Bateman, J.E.; Connolly, J.F.

    1991-11-01

    A simple, robust form of gas pixel detector is discussed which is based on the use of electronic connector pins as the gain elements. With a rate capability of >10 5 counts/s per pin, an X-ray imaging detector system capable of counting at global rates of the order of 10 10 counts/s is foreseen. (author)

  15. Operational experience of ATLAS SCT and Pixel Detector

    CERN Document Server

    Kocian, Martin; The ATLAS collaboration

    2017-01-01

    The ATLAS Inner Detector based on silicon sensors is consisting of a strip detector (SCT) and a pixel detector. It is the crucial component for vertexing and tracking in the ATLAS experiment. With the excellent performance of the LHC well beyond the original specification the silicon tracking detectors are facing substantial challenges in terms of data acquisition, radiation damage to the sensors, and SEUs in the readout ASICs. The approaches on how the detector systems cope with the demands of high luminosity operation while maintaining excellent performance through hardware upgrades, software and firmware algorithms, and operational settings, are presented.

  16. Muon front end for the neutrino factory

    CERN Document Server

    Rogers, C T; Prior, G; Gilardoni, S; Neuffer, D; Snopok, P; Alekou, A; Pasternak, J

    2013-01-01

    In the neutrino factory, muons are produced by firing high-energy protons onto a target to produce pions. The pions decay to muons and pass through a capture channel known as the muon front end, before acceleration to 12.6 GeV. The muon front end comprises a variable frequency rf system for longitudinal capture and an ionization cooling channel. In this paper we detail recent improvements in the design of the muon front end.

  17. Limits in point to point resolution of MOS based pixels detector arrays

    Science.gov (United States)

    Fourches, N.; Desforge, D.; Kebbiri, M.; Kumar, V.; Serruys, Y.; Gutierrez, G.; Leprêtre, F.; Jomard, F.

    2018-01-01

    In high energy physics point-to-point resolution is a key prerequisite for particle detector pixel arrays. Current and future experiments require the development of inner-detectors able to resolve the tracks of particles down to the micron range. Present-day technologies, although not fully implemented in actual detectors, can reach a 5-μm limit, this limit being based on statistical measurements, with a pixel-pitch in the 10 μm range. This paper is devoted to the evaluation of the building blocks for use in pixel arrays enabling accurate tracking of charged particles. Basing us on simulations we will make here a quantitative evaluation of the physical and technological limits in pixel size. Attempts to design small pixels based on SOI technology will be briefly recalled here. A design based on CMOS compatible technologies that allow a reduction of the pixel size below the micrometer is introduced here. Its physical principle relies on a buried carrier-localizing collecting gate. The fabrication process needed by this pixel design can be based on existing process steps used in silicon microelectronics. The pixel characteristics will be discussed as well as the design of pixel arrays. The existing bottlenecks and how to overcome them will be discussed in the light of recent ion implantation and material characterization experiments.

  18. Signal height in silicon pixel detectors irradiated with pions and protons

    International Nuclear Information System (INIS)

    Rohe, T.; Acosta, J.; Bean, A.; Dambach, S.; Erdmann, W.; Langenegger, U.; Martin, C.; Meier, B.; Radicci, V.; Sibille, J.; Trueb, P.

    2010-01-01

    Pixel detectors are used in the innermost part of multi-purpose experiments at the Large Hadron Collider (LHC) and are therefore exposed to the highest fluences of ionising radiation, which in this part of the detectors consists mainly of charged pions. The radiation hardness of the detectors has been tested thoroughly up to the fluences expected at the LHC. In case of an LHC upgrade the fluence will be much higher and it is not yet clear up to which radii the present pixel technology can be used. To establish such a limit, pixel sensors of the size of one CMS pixel readout chip (PSI46V2.1) have been bump bonded and irradiated with positive pions up to 6x10 14 n eq /cm 2 at PSI and with protons up to 5x10 15 n eq /cm 2 . The sensors were taken from production wafers of the CMS barrel pixel detector. They use n-type DOFZ material with a resistance of about 3.7kΩcm and an n-side read out. As the performance of silicon sensors is limited by trapping, the response to a Sr-90 source was investigated. The highly energetic beta-particles represent a good approximation to minimum ionising particles. The bias dependence of the signal for a wide range of fluences will be presented.

  19. Development and validation of a 64 channel front end ASIC for 3D directional detection for MIMAC

    International Nuclear Information System (INIS)

    Richer, J P; Bourrion, O; Bosson, G; Guillaudin, O; Mayet, F; Santos, D

    2011-01-01

    A front end ASIC has been designed to equip the μTPC prototype developed for the MIMAC project, which requires 3D reconstruction of low energy particle tracks in order to perform directional detection of galactic Dark Matter. Each ASIC is able to monitor 64 strips of pixels and provides the 'Time Over Threshold' information for each of those. These 64 digital informations, sampled at a rate of 50 MHz, can be transferred at 400 MHz by eight LVDS serial links. Eight ASIC were validated on a 2 × 256 strips of pixels prototype.

  20. Radiation Damage Modeling for 3D Pixel Sensors in the ATLAS Detector

    CERN Document Server

    Wallangen, Veronica; The ATLAS collaboration

    2017-01-01

    Silicon Pixel detectors are at the core of the current and planned upgrade of the ATLAS detector. As the detector in closest proximity to the interaction point, these detectors will be subjected to a significant amount of radiation over their lifetime: prior to the HL-LHC, the innermost layers will receive a fluence in excess of 10^15 neq/cm2 and the HL-LHC detector upgrades must cope with an order of magnitude higher fluence integrated over their lifetimes. This poster presents the details of a new digitization model that includes radiation damage effects to the 3D Pixel sensors for the ATLAS Detector.

  1. Muon front end for the neutrino factory

    Directory of Open Access Journals (Sweden)

    C. T. Rogers

    2013-04-01

    Full Text Available In the neutrino factory, muons are produced by firing high-energy protons onto a target to produce pions. The pions decay to muons and pass through a capture channel known as the muon front end, before acceleration to 12.6 GeV. The muon front end comprises a variable frequency rf system for longitudinal capture and an ionization cooling channel. In this paper we detail recent improvements in the design of the muon front end.

  2. Charge loss between contacts of CdZnTe pixel detectors

    CERN Document Server

    Bolotnikov, A E; Harrison, F A; Wong, A S; Schindler, S M; Eichelberger, A C

    1999-01-01

    The surface of Cd sub 1 sub - sub x Zn sub x Te (CZT) material has high resistivity but is not a perfect dielectric. Even a small surface conductivity can affect the electric field distribution, and therefore, the charge collection efficiency of a CZT pixel detector. The paper describes studies of this phenomenon for several contact configurations made on a single CZT detector. We have determined the maximum inter-contact separation at which the surface inter-pixel charge loss can be neglected. (author)

  3. Optical readout in a multi-module system test for the ATLAS pixel detector

    International Nuclear Information System (INIS)

    Flick, Tobias; Becks, Karl-Heinz; Gerlach, Peter; Kersten, Susanne; Maettig, Peter; Nderitu Kirichu, Simon; Reeves, Kendall; Richter, Jennifer; Schultes, Joachim

    2006-01-01

    The innermost part of the ATLAS experiment at the LHC, CERN, will be a pixel detector, which is presently under construction. The command messages and the readout data of the detector are transmitted over an optical data path. The readout chain consists of many components which are produced at several locations around the world, and must work together in the pixel detector. To verify that these parts are working together as expected a system test has been built up. It consists of detector modules, optoboards, optical fibres, Back of Crate cards, Readout Drivers, and control computers. In this paper, the system test setup and the operation of the readout chain are described. Also, some results of tests using the final pixel detector readout chain are given

  4. A new generation of small pixel pitch/SWaP cooled infrared detectors

    Science.gov (United States)

    Espuno, L.; Pacaud, O.; Reibel, Y.; Rubaldo, L.; Kerlain, A.; Péré-Laperne, N.; Dariel, A.; Roumegoux, J.; Brunner, A.; Kessler, A.; Gravrand, O.; Castelein, P.

    2015-10-01

    Following clear technological trends, the cooled IR detectors market is now in demand for smaller, more efficient and higher performance products. This demand pushes products developments towards constant innovations on detectors, read-out circuits, proximity electronics boards, and coolers. Sofradir was first to show a 10μm focal plane array (FPA) at DSS 2012, and announced the DAPHNIS 10μm product line back in 2014. This pixel pitch is a key enabler for infrared detectors with increased resolution. Sofradir recently achieved outstanding products demonstrations at this pixel pitch, which clearly demonstrate the benefits of adopting 10μm pixel pitch focal plane array-based detectors. Both HD and XGA Daphnis 10μm products also benefit from a global video datapath efficiency improvement by transitioning to digital video interfaces. Moreover, innovative smart pixels functionalities drastically increase product versatility. In addition to this strong push towards a higher pixels density, Sofradir acknowledges the need for smaller and lower power cooled infrared detector. Together with straightforward system interfaces and better overall performances, latest technological advances on SWAP-C (Size, Weight, Power and Cost) Sofradir products enable the advent of a new generation of high performance portable and agile systems (handheld thermal imagers, unmanned aerial vehicles, light gimbals etc...). This paper focuses on those features and performances that can make an actual difference in the field.

  5. A pixel detector for the protein crystallography beamline at the SLS

    CERN Document Server

    Brönnimann, C; Eikenberry, E F; Fischer, P; Florin, S; Horisberger, R P; Lindner, Manfred; Schmitt, B; Schulze, C

    2002-01-01

    At the Paul Scherrer Institute a new synchrotron light source is currently under construction, the Swiss Light Source (SLS), which will be operational in summer 2001. Among the first beamlines is a high brightness, micro-focusing protein crystallography beamline. It will be equipped with a pixel detector, which has several features of interest for the next generation of protein crystallography detectors. The point spread function and the effect of charge sharing was measured with a prototype detector in a test experiment at the European Synchrotron Radiation Facility in Grenoble. The concepts of the SLS pixel detector is presented as well as test results from radiation hard prototype chips.

  6. Modeling Radiation Damage to Pixel Sensors in the ATLAS Detector

    CERN Document Server

    Rossini, Lorenzo; The ATLAS collaboration

    2018-01-01

    Silicon pixel detectors are at the core of the current and planned upgrade of the ATLAS detector at the Large Hadron Collider (LHC). As the closest detector component to the interaction point, these detectors will be subjected to a significant amount of radiation over their lifetime: prior to the High- Luminosity LHC (HL-LHC), the innermost layers will receive a fluence in excess of 10^15 neq/cm2 and the HL-HLC detector upgrades must cope with an order of magnitude higher fluence integrated over their lifetimes. Simulating radiation damage is critical in order to make accurate predictions for current future detector performance that will enable searches for new particles and forces as well as precision measurements of Standard Model particles such as the Higgs boson. We present a digitization model that includes radiation damage effects to the ATLAS pixel sensors for the first time and considers both planar and 3D sensor designs. In addition to thoroughly describing the setup, we compare predictions for basic...

  7. Feedback from operational experience in front-end transportation

    International Nuclear Information System (INIS)

    Mondonel, J.L.; Parison, C.

    1998-01-01

    Transport forms an integral part of the nuclear fuel cycle, representing the strategic link between each stage of the cycle. In a way there is a transport cycle that parallels the nuclear fuel cycle. This concerns particularly the front-end of the cycle whose steps - mining conversion, enrichment and fuel fabrication - require numerous transports. Back-end shipments involve a handful of countries, but front-end transports involve all five continents, and many exotic countries. All over Europe such transports are routinely performed with an excellent safety track record. Transnucleaire dominates the French nuclear transportation market and carries out both front and back-end transports. For instance in 1996 more than 28,400 front-end packages were transported as well as more than 3,600 back-end packages. However front-end transport is now a business undergoing much change. A nuclear transportation company must now cope with an evolving picture including new technical requirements, new transportation schemes and new business conditions. This paper describes the latest evolutions in terms of front-end transportation and the way this activity is carried out by Transnucleaire, and goes on to discuss future prospects. (authors)

  8. Development of a counting pixel detector for 'Digitales Roentgen'

    International Nuclear Information System (INIS)

    Lindner, M.

    2001-08-01

    The development of a single photon counting X-ray imaging detector for medical applications using hybrid pixel detectors is reported. The electronics development from the first prototype derived from detector development for particle physics experiments (ATLAS) to the imaging chip MPEC (multi picture element counters) for medical applications is described. This chip consists of 32 x 32 pixels of 200 μm x 200 μm size, each containing the complete read out electronics, i.e. an amplifier, two discriminators with adjustable thresholds and two 18-bit linear feedback shift-counters allowing energy windowing for contrast increase. Results on electronics performance are shown as well as measurements with several semiconductor materials (Si, GaAs, CdTe). Important aspects like detection efficiency, sensor homogeneity, linearity and spatial resolution are discussed. (orig.)

  9. CARIOCA : A Fast Binary Front-End Implemented in 0.25Pm CMOS using a Novel Current-Mode Technique for the LHCb Muon Detector

    CERN Multimedia

    2000-01-01

    The CARIOCA front-end is an amplifier discriminator chip, using 0.25mm CMOS technology, developed with a very fast and low noise preamplifier. This prototype was designed to have input impedance below 10W. Measurements showed a peaking time of 14ns and noise of 450e- at zero input capacitance, with a noise slope of 37.4 e-/pF. The sensitivity of 8mV/fC remains almost unchanged up to a detector capacitance of 120pF.

  10. The TOTEM front end driver, its components and applications in the TOTEM experiment

    OpenAIRE

    Antchev G; Aspell P; Barney D; Reynaud S; Snoeys W; Vichoudis P

    2007-01-01

    The TOTEM Front End Driver, so-called TOTFED, receives and handles trigger building and tracking data from the TOTEM detectors, and interfaces to the global trigger and data acquisition systems. The TOTFED is based on the VME64x standard and has deliberately been kept modular. It is very flexible and programmable to deal with the different TOTEM sub-detectors and possible evolution of the data treatment and trigger algorithms over the duration of the experiment. The main objectives for each u...

  11. DEPFET active pixel detectors for a future linear $e^+e^-$ collider

    CERN Document Server

    Alonso, O; Dieguez, A; Dingfelder, J; Hemperek, T; Kishishita, T; Kleinohl, T; Koch, M; Krueger, H; Lemarenko, M; Luetticke, F; Marinas, C; Schnell, M; Wermes, N; Campbell, A; Ferber, T; Kleinwort, C; Niebuhr, C; Soloviev, Y; Steder, M; Volkenborn, R; Yaschenko, S; Fischer, P; Kreidl, C; Peric, I; Knopf, J; Ritzert, M; Curras, E; Lopez-Virto, A; Moya, D; Vila, I; Boronat, M; Esperante, D; Fuster, J; Garcia Garcia, I; Lacasta, C; Oyanguren, A; Ruiz, P; Timon, G; Vos, M; Gessler, T; Kuehn, W; Lange, S; Muenchow, D; Spruck, B; Frey, A; Geisler, C; Schwenker, B; Wilk, F; Barvich, T; Heck, M; Heindl, S; Lutz, O; Mueller, Th; Pulvermacher, C; Simonis, H.J; Weiler, T; Krausser, T; Lipsky, O; Rummel, S; Schieck, J; Schlueter, T; Ackermann, K; Andricek, L; Chekelian, V; Chobanova, V; Dalseno, J; Kiesling, C; Koffmane, C; Gioi, L.Li; Moll, A; Moser, H.G; Mueller, F; Nedelkovska, E; Ninkovic, J; Petrovics, S; Prothmann, K; Richter, R; Ritter, A; Ritter, M; Simon, F; Vanhoefer, P; Wassatsch, A; Dolezal, Z; Drasal, Z; Kodys, P; Kvasnicka, P; Scheirich, J

    2013-01-01

    The DEPFET collaboration develops highly granular, ultra-transparent active pixel detectors for high-performance vertex reconstruction at future collider experiments. The characterization of detector prototypes has proven that the key principle, the integration of a first amplification stage in a detector-grade sensor material, can provide a comfortable signal to noise ratio of over 40 for a sensor thickness of 50-75 $\\mathrm{\\mathbf{\\mu m}}$. ASICs have been designed and produced to operate a DEPFET pixel detector with the required read-out speed. A complete detector concept is being developed, including solutions for mechanical support, cooling and services. In this paper the status of DEPFET R & D project is reviewed in the light of the requirements of the vertex detector at a future linear $\\mathbf{e^+ e^-}$ collider.

  12. Operational experience with the CMS pixel detector in LHC Run II

    CERN Document Server

    Karancsi, Janos

    2016-01-01

    The CMS pixel detector was repaired successfully, calibrated and commissioned for the second run of Large Hadron Collider during the first long shutdown between 2013 and 2015. The replaced pixel modules were calibrated separately and show the expected behavior of an un-irradiated detector. In 2015, the system performed very well with an even improved spatial resolution compared to 2012. During this time, the operational team faced various challenges including the loss of a sector in one half shell which was only partially recovered. In 2016, the detector is expected to withstand instantaneous luminosities beyond the design limits and will need a combined effort of both online and offline teams in order to provide the high quality data that is required to reach the physics goals of CMS. We present the operational experience gained during the second run of the LHC and show the latest performance results of the CMS pixel detector.

  13. Technology development for SOI monolithic pixel detectors

    International Nuclear Information System (INIS)

    Marczewski, J.; Domanski, K.; Grabiec, P.; Grodner, M.; Jaroszewicz, B.; Kociubinski, A.; Kucharski, K.; Tomaszewski, D.; Caccia, M.; Kucewicz, W.; Niemiec, H.

    2006-01-01

    A monolithic detector of ionizing radiation has been manufactured using silicon on insulator (SOI) wafers with a high-resistivity substrate. In our paper the integration of a standard 3 μm CMOS technology, originally designed for bulk devices, with fabrication of pixels in the bottom wafer of a SOI substrate is described. Both technological sequences have been merged minimizing thermal budget and providing suitable properties of all the technological layers. The achieved performance proves that fully depleted monolithic active pixel matrix might be a viable option for a wide spectrum of future applications

  14. FELIX: a High-Throughput Network Approach for Interfacing to Front End Electronics for ATLAS Upgrades

    International Nuclear Information System (INIS)

    Anderson, J; Drake, G; Ryu, S; Zhang, J; Borga, A; Boterenbrood, H; Schreuder, F; Vermeulen, J; Chen, H; Chen, K; Lanni, F; Francis, D; Gorini, B; Miotto, G Lehmann; Schumacher, J; Vandelli, W; Levinson, L; Narevicius, J; Roich, A; Plessl, C

    2015-01-01

    The ATLAS experiment at CERN is planning full deployment of a new unified optical link technology for connecting detector front end electronics on the timescale of the LHC Run 4 (2025). It is estimated that roughly 8000 GBT (GigaBit Transceiver) links, with transfer rates up to 10.24 Gbps, will replace existing links used for readout, detector control and distribution of timing and trigger information. A new class of devices will be needed to interface many GBT links to the rest of the trigger, data-acquisition and detector control systems. In this paper FELIX (Front End LInk eXchange) is presented, a PC-based device to route data from and to multiple GBT links via a high-performance general purpose network capable of a total throughput up to O(20 Tbps). FELIX implies architectural changes to the ATLAS data acquisition system, such as the use of industry standard COTS components early in the DAQ chain. Additionally the design and implementation of a FELIX demonstration platform is presented and hardware and software aspects will be discussed. (paper)

  15. Front-end electronics and trigger systems-Status and challenges

    International Nuclear Information System (INIS)

    Spieler, Helmuth

    2007-01-01

    The past quarter century has brought about a revolution in front-end electronics for large-scale detector systems. Custom integrated circuits specifically tailored to the requirements of large detector systems have provided unprecedented performance and enabled systems that once were deemed impossible. The evolution of integrated circuit readouts in strip detectors is summarized, the present status described, and challenges posed by the sLHC and ILC are discussed. Performance requirements increase, but key considerations remain as in the past: power dissipation, material, and services. Smaller CMOS feature sizes will not reduce the power required for the desired noise levels, but will improve digital power efficiency. Significant improvements appear to be practical in more efficient power distribution. Enhanced digital electronics have provided powerful trigger processors that greatly improve the trigger efficiency. In data readout systems, they also improve data throughput, while reducing power requirements. Concurrently with new developments in high energy physics, detector systems for cosmology and astrophysics have made great strides. As an example, a large-scale readout for superconducting bolometer arrays is described

  16. Front-end electronics and trigger systems - status and challenges

    International Nuclear Information System (INIS)

    Spieler, Helmuth G; Spieler, Helmuth G

    2007-01-01

    The past quarter century has brought about a revolution in front-end electronics for large-scale detector systems. Custom integrated circuits specifically tailored to the requirements of large detector systems have provided unprecedented performance and enabled systems that once were deemed impossible. The evolution of integrated circuit readouts in strip detectors is summarized, the present status described, and challenges posed by the sLHC and ILC are discussed. Performance requirements increase, but key considerations remain as in the past: power dissipation, material, and services. Smaller CMOS feature sizes will not provide the required electronic noise at lower power, but will improve digital power efficiency. Significant improvements appear to be practical in more efficient power distribution. Enhanced digital electronics have provided powerful trigger processors that greatly improve the trigger efficiency. In data readout systems they also improve data throughput, while reducing power requirements. Concurrently with new developments in high energy physics, detector systems for cosmology and astrophysics have made great strides. As an example, a large-scale readout for superconducting bolometer arrays is described

  17. Cherenkov Ring Imaging Detector front-end electronics

    International Nuclear Information System (INIS)

    Antilogus, P.; Aston, D.; Bienz, T.; Bird, F.; Dasu, S.; Dunwoodie, W.; Hallewell, G.; Kawahara, H.; Kwon, Y.; Leith, D.; Marshall, D.; Muller, D.; Nagamine, T.; Oxoby, G.; Ratcliff, B.; Rensing, P.; Schultz, D.; Shapiro, S.; Simopoulos, C.; Solodov, E.; Suekane, F.; Toge, N.; Va'Vra, J.; Williams, S.; Wilson, R.J.; Whitaker, J.S.; Bean, A.; Caldwell, D.; Duboscq, J.; Huber, J.; Lu, A.; Mathys, L.; McHugh, S.; Morrison, R.; Witherell, M.; Yellin, S.; Coyle, P.; Coyne, D.; Spencer, E.; d'Oliveira, A.; Johnson, R.A.; Martinez, J.; Nussbaum, M.; Santha, A.K.S.; Shoup, A.; Stockdale, I.; Jacques, P.; Plano, R.; Stamer, P.; Abe, K.; Hasegawa, K.; Yuta, H.

    1990-10-01

    The SLD Cherenkov Ring Imaging Detector use a proportional wire detector for which a single channel hybrid has been developed. It consists of a preamplifier, gain selectable amplifier, load driver amplifier, power switching, and precision calibrator. For this hybrid, a bipolar, semicustom integrated circuit has been designed which includes video operational amplifiers for two of the gain stages. This approach allows maximization of the detector volume, allows DC coupling, and enables gain selection. System tests show good noise performance, calibration precision, system linearity, and signal shape uniformity over the full dynamic range. 10 refs., 8 figs

  18. Survey of the ATLAS Pixel Detector Components

    International Nuclear Information System (INIS)

    Andreazza, A.; Kostyukhim, V.; Madaras, R.

    2008-01-01

    This document provides a description of the survey performed on different components of the ATLAS Pixel Detector at different stages of its assembly. During the production of the ATLAS pixel detector great care was put in the geometrical survey of the location of the sensitive area of modules. This had a double purpose: (1) to provide a check of the quality of the assembly procedure and assure tolerances in the geometrical assembly were met; and (2) to provide an initial point for the alignment (the so called 'as-built detector'), better than the ideal geometry. Since direct access to the sensitive area becomes more and more difficult with the progress of the assembly, the survey needed to be performed at different stages: after module loading on the local supports (sectors and staves) and after assembly of the local supports in disks or halfshells. Different techniques were used, including both optical 2D and 3D surveys and mechanical survey. This document summarizes the survey procedures, the analysis done on the collected data and how survey data are stored in case they will need to be accessed in the future

  19. Advanced processing of CdTe pixel radiation detectors

    Science.gov (United States)

    Gädda, A.; Winkler, A.; Ott, J.; Härkönen, J.; Karadzhinova-Ferrer, A.; Koponen, P.; Luukka, P.; Tikkanen, J.; Vähänen, S.

    2017-12-01

    We report a fabrication process of pixel detectors made of bulk cadmium telluride (CdTe) crystals. Prior to processing, the quality and defect density in CdTe material was characterized by infrared (IR) spectroscopy. The semiconductor detector and Flip-Chip (FC) interconnection processing was carried out in the clean room premises of Micronova Nanofabrication Centre in Espoo, Finland. The chip scale processes consist of the aluminum oxide (Al2O3) low temperature thermal Atomic Layer Deposition (ALD), titanium tungsten (TiW) metal sputtering depositions and an electroless Nickel growth. CdTe crystals with the size of 10×10×0.5 mm3 were patterned with several photo-lithography techniques. In this study, gold (Au) was chosen as the material for the wettable Under Bump Metalization (UBM) pads. Indium (In) based solder bumps were grown on PSI46dig read out chips (ROC) having 4160 pixels within an area of 1 cm2. CdTe sensor and ROC were hybridized using a low temperature flip-chip (FC) interconnection technique. The In-Au cold weld bonding connections were successfully connecting both elements. After the processing the detector packages were wire bonded into associated read out electronics. The pixel detectors were tested at the premises of Finnish Radiation Safety Authority (STUK). During the measurement campaign, the modules were tested by exposure to a 137Cs source of 1.5 TBq for 8 minutes. We detected at the room temperature a photopeak at 662 keV with about 2 % energy resolution.

  20. Status of the ATLAS Pixel Detector and its performance after three years of operation

    CERN Document Server

    Favareto, A; The ATLAS collaboration

    2012-01-01

    The ATLAS Pixel Detector is the innermost detector of the ATLAS experiment at the Large Hadron Collider at CERN, providing high-resolution measurements of charged particle tracks in the high radiation environment close to the collision region. This capability is very important for the identification and measurement of proper decay times of long-lived particles such as b-hadrons, and thus vital for the ATLAS physics program. The detector provides hermetic coverage with three cylindrical layers and three layers of forward and backward pixel detectors. It consists of approximately 80 million pixels that are individually read out via chips bump-bonded to 1744 n-in-n silicon substrates. The detector performance is excellent: ~96 % of the pixels are operational, noise occupancy and hit efficiency exceed the design specification, and a good alignment allows high quality track resolution

  1. Status of the ATLAS Pixel Detector and its performance after three years of operation

    CERN Document Server

    Favareto, A; The ATLAS collaboration

    2012-01-01

    The ATLAS Pixel Detector is the innermost detector of the ATLAS experiment at the Large Hadron Collider at CERN, providing high-resolution measurements of charged particle tracks in the high radiation environment close to the collision region. This capability is very important for the identification and measurement of proper decay times of long-lived particles such as b-hadrons, and thus vital for the ATLAS physics program. The detector provides hermetic coverage with three cylindrical layers and three layers of forward and backward pixel detectors. It consists of approximately 80 million pixels that are individually read out via chips bump-bonded to 1744 n-in-n silicon substrates. The detector performance is excellent: ~96% of the pixels are operational, noise occupancy and hit efficiency exceed the design specification, and a good alignment allows high quality track resolution.

  2. 50 μm pixel pitch wafer-scale CMOS active pixel sensor x-ray detector for digital breast tomosynthesis.

    Science.gov (United States)

    Zhao, C; Konstantinidis, A C; Zheng, Y; Anaxagoras, T; Speller, R D; Kanicki, J

    2015-12-07

    Wafer-scale CMOS active pixel sensors (APSs) have been developed recently for x-ray imaging applications. The small pixel pitch and low noise are very promising properties for medical imaging applications such as digital breast tomosynthesis (DBT). In this work, we evaluated experimentally and through modeling the imaging properties of a 50 μm pixel pitch CMOS APS x-ray detector named DynAMITe (Dynamic Range Adjustable for Medical Imaging Technology). A modified cascaded system model was developed for CMOS APS x-ray detectors by taking into account the device nonlinear signal and noise properties. The imaging properties such as modulation transfer function (MTF), noise power spectrum (NPS), and detective quantum efficiency (DQE) were extracted from both measurements and the nonlinear cascaded system analysis. The results show that the DynAMITe x-ray detector achieves a high spatial resolution of 10 mm(-1) and a DQE of around 0.5 at spatial frequencies  CMOS APS x-ray detector, image aquisition geometry and image reconstruction techniques should be considered.

  3. A generic firmware core to drive the Front-End GBT-SCAs for the LHCb ugprade

    CERN Document Server

    Alessio, F; Gaspar, C; Jacobsson, R; Wyllie, K

    2014-01-01

    The LHCb experiment has proposed an upgrade towards a full 40 MHz readout system in order to run between five and ten times its initial design luminosity. The entire Front-End electronics will be upgraded in order to cope with higher sub-detector occupancy, higher data rate and to work in a complete trigger-less fashion. In this paper, we describe a novel way to transmit slow control information to the Front-End electronics, by profiting from bidirectional optical connections and the GBT and GBT-SCA chipset capabilities. The implementation and preliminary validation tests are shown as well.

  4. A generic firmware core to drive the Front-End GBT-SCAs for the LHCb upgrade

    International Nuclear Information System (INIS)

    Alessio, F.; Gaspar, C.; Jacobsson, R.; Wyllie, K.; Caplan, C.

    2015-01-01

    The LHCb experiment has proposed an upgrade towards a full 40 MHz readout system in order to run between five and ten times its initial design luminosity. The entire Front-End electronics will be upgraded in order to cope with higher sub-detector occupancy, higher data rate and to work in a complete trigger-less fashion. In this paper, we describe a novel way to transmit slow control information to the Front-End electronics, by profiting from bidirectional optical connections and the GBT and GBT-SCA chipset capabilities. The implementation and preliminary validation tests are shown as well

  5. 18F-FDG positron autoradiography with a particle counting silicon pixel detector.

    Science.gov (United States)

    Russo, P; Lauria, A; Mettivier, G; Montesi, M C; Marotta, M; Aloj, L; Lastoria, S

    2008-11-07

    We report on tests of a room-temperature particle counting silicon pixel detector of the Medipix2 series as the detector unit of a positron autoradiography (AR) system, for samples labelled with (18)F-FDG radiopharmaceutical used in PET studies. The silicon detector (1.98 cm(2) sensitive area, 300 microm thick) has high intrinsic resolution (55 microm pitch) and works by counting all hits in a pixel above a certain energy threshold. The present work extends the detector characterization with (18)F-FDG of a previous paper. We analysed the system's linearity, dynamic range, sensitivity, background count rate, noise, and its imaging performance on biological samples. Tests have been performed in the laboratory with (18)F-FDG drops (37-37 000 Bq initial activity) and ex vivo in a rat injected with 88.8 MBq of (18)F-FDG. Particles interacting in the detector volume produced a hit in a cluster of pixels whose mean size was 4.3 pixels/event at 11 keV threshold and 2.2 pixels/event at 37 keV threshold. Results show a sensitivity for beta(+) of 0.377 cps Bq(-1), a dynamic range of at least five orders of magnitude and a lower detection limit of 0.0015 Bq mm(-2). Real-time (18)F-FDG positron AR images have been obtained in 500-1000 s exposure time of thin (10-20 microm) slices of a rat brain and compared with 20 h film autoradiography of adjacent slices. The analysis of the image contrast and signal-to-noise ratio in a rat brain slice indicated that Poisson noise-limited imaging can be approached in short (e.g. 100 s) exposures, with approximately 100 Bq slice activity, and that the silicon pixel detector produced a higher image quality than film-based AR.

  6. Preliminary test of an imaging probe for nuclear medicine using hybrid pixel detectors

    International Nuclear Information System (INIS)

    Bertolucci, E.; Maiorino, M.; Mettivier, G.; Montesi, M.C.; Russo, P.

    2002-01-01

    We are investigating the feasibility of an intraoperative imaging probe for lymphoscintigraphy with Tc-99m tracer, for sentinel node radioguided surgery, using the Medipix series of hybrid detectors coupled to a collimator. These detectors are pixelated semiconductor detectors bump-bonded to the Medipix1 photon counting read-out chip (64x64 pixel, 170 μm pitch) or to the Medipix2 chip (256x256 pixel, 55 μm pitch), developed by the European Medipix collaboration. The pixel detector we plan to use in the final version of the probe is a semi-insulating GaAs detector or a 1-2 mm thick CdZnTe detector. For the preliminary tests presented here, we used 300-μm thick silicon detectors, hybridized via bump-bonding to the Medipix1 chip. We used a tungsten parallel-hole collimator (7 mm thick, matrix array of 64x64 100 μm circular holes with 170 μm pitch), and a 22, 60 and 122 keV point-like (1 mm diameter) radioactive sources, placed at various distances from the detector. These tests were conducted in order to investigate the general feasibility of this imaging probe and its resolving power. Measurements show the high resolution but low efficiency performance of the detector-collimator set, which is able to image the 122 keV source with <1 mm FWHM resolution

  7. Pixel electronics for the ATLAS experiment

    International Nuclear Information System (INIS)

    Fischer, P.

    2001-01-01

    The ATLAS experiment at LHC will use 3 barrel layers and 2x5 disks of silicon pixel detectors as the innermost elements of the semiconductor tracker. The basic building blocks are pixel modules with an active area of 16.4 mmx60.8 mm which include an n + on n-type silicon sensor and 16 VLSI front-end (FE) chips. Every FE chip contains a low power, high speed charge sensitive preamplifier, a fast discriminator, and a readout system which operates at the 40 MHz rate of LHC. The addresses of hit pixels (as well as a low resolution pulse height information) are stored on the FE chips until arrival of a level 1 trigger signal. Hits are then transferred to a module controller chip (MCC) which collects the data of all 16 FE chips, builds complete events and sends the data through two optical links to the data acquisition system. The MCC receives clock and data through an additional optical link and provides timing and configuration information for the FE chips. Two additional chips are used to amplify and decode the pin diode signal and to drive the VCSEL laser diodes of the optical links

  8. The upgraded Pixel Detector of the ATLAS experiment for Run-2 at the Large Hadron Collider

    CERN Document Server

    Giordani, MarioPaolo; The ATLAS collaboration

    2016-01-01

    Run-2 of the LHC is providing new challenges to track and vertex reconstruction with higher energies, denser jets and higher rates. Therefore the ATLAS experiment has constructed the first 4-layer Pixel detector in HEP, installing a new Pixel layer, also called Insertable B-Layer (IBL). IBL is a fourth layer of pixel detectors, and has been installed in May 2014 at a radius of 3.3 cm between the existing Pixel Detector and a new smaller radius beam-pipe. The new detector, built to cope with high radiation and expected occupancy, is the first large scale application of 3D detectors and CMOS 130nm technology. In addition the Pixel detector was refurbished with a new service quarter panel to recover about 3% of defective modules lost during run-1 and a new optical readout system to readout the data at higher speed while reducing the occupancy when running with increased luminosity. The commissioning and performance of the 4-layer Pixel Detector, in particular the IBL, will be presented, using collision data.

  9. Radiationhard components for the control system of a future ATLAS pixel detector

    International Nuclear Information System (INIS)

    Becker, K; Boek, J; Kersten, S; Kind, P; Maettig, P; Puellen, L; Zeitnitz, C

    2011-01-01

    The upgrade of the ATLAS experiment for the High Luminosity LHC (HL-LHC) will include a new pixel detector. A completely new detector control system (DCS) for this pixel detector will be required in order to cope with the substantial increase in radiation at the HL-LHC. The DCS has to have a very high reliability and all components installed within the detector volume have to be radiationhard. This will ensure a safe operation of the pixel detector and the experiment. A further design constraint is the minimization of the used material and cables in order to limit the impact on the tracking performance to a minimum. To meet these requirements we propose a DCS network which consists of a DCS chip and a DCS controller. In the following we present the development of the first prototypes for the DCS chip and the DCS controller with a special focus on the communication interface, radiation hardness and robustness against single event upsets.

  10. Studio di Rivelatori a Pixel di nuova generazione per il Sistema di Tracciamento di ATLAS.

    CERN Document Server

    Gaudiello, Andrea; Schiavi, Carlo

    In 2013 the LHC will undergo a long shutdown (Phase 0) in preparation for a an energy and luminosity upgrade. During this period the ATLAS Pixel Detector (that is the tracking detector closest to the beamline) will be upgraded. The new detector, called Insertable B-Layer (IBL), will be installed between the existing pixel detector and a new beam-pipe of smaller radius in order to ensure and maintain excellent performance of tracking, vertexing and jet flavor tagging. To satisfy the new requirements a new electronic front- end (FE-I4) and 2 sensor technologies have been developed: Planar and 3D. Genova is one of two sites dedicated to the assembly of the modules of IBL. The work is then carried out in two parallel directions: on one hand the production and its optimization; on the other the comparison and testing of these new technologies. Chapter 1 gives an overview of the theoretical framework needed to understand the importance and the goals of the experiments operating at the Large Hadron Collider (LHC), w...

  11. Versatile, reprogrammable area pixel array detector for time-resolved synchrotron x-ray applications

    Energy Technology Data Exchange (ETDEWEB)

    Gruner, Sol [Cornell Univ., Ithaca, NY (United States)

    2010-05-01

    The final technical report for DOE grant DE-SC0004079 is presented. The goal of the grant was to perform research, development and application of novel imaging x-ray detectors so as to effectively utilize the high intensity and brightness of the national synchrotron radiation facilities to enable previously unfeasible time-resolved x-ray research. The report summarizes the development of the resultant imaging x-ray detectors. Two types of detector platforms were developed: The first is a detector platform (called a Mixed-Mode Pixel Array Detector, or MM-PAD) that can image continuously at over a thousand images per second while maintaining high efficiency for wide dynamic range signals ranging from 1 to hundreds of millions of x-rays per pixel per image. Research on an even higher dynamic range variant is also described. The second detector platform (called the Keck Pixel Array Detector) is capable of acquiring a burst of x-ray images at a rate of millions of images per second.

  12. The first bump-bonded pixel detectors on CVD diamond

    International Nuclear Information System (INIS)

    Adam, W.; Bauer, C.; Berdermann, E.; Bergonzo, P.; Bogani, F.; Borchi, E.; Brambilla, A.; Bruzzi, M.; Colledani, C.; Conway, J.; Dabrowski, W.; Delpierre, P.; Deneuville, A.; Dulinski, W.; Eijk, B. van; Fallou, A.; Fizzotti, F.; Foulon, F.; Friedl, M.; Gan, K.K.; Gheeraert, E.; Grigoriev, E.; Hallewell, G.; Hall-Wilton, R.; Han, S.; Hartjes, F.; Hrubec, J.; Husson, D.; Kagan, H.; Kania, D.; Kaplon, J.; Karl, C.; Kass, R.; Krammer, M.; Logiudice, A.; Lu, R.; Manfredi, P.F.; Manfredotti, C.; Marshall, R.D.; Meier, D.; Mishina, M.; Oh, A.; Palmieri, V.G.; Pan, L.S.; Peitz, A.; Pernicka, M.; Pirollo, S.; Polesello, P.; Pretzl, K.; Re, V.; Riester, J.L.; Roe, S.; Roff, D.; Rudge, A.; Schnetzer, S.; Sciortino, S.; Speziali, V.; Stelzer, H.; Steuerer, J.; Stone, R.; Tapper, R.J.; Tesarek, R.; Trawick, M.; Trischuk, W.; Turchetta, R.; Vittone, E.; Wagner, A.; Walsh, A.M.; Wedenig, R.; Weilhammer, P.; Zeuner, W.; Ziock, H.; Zoeller, M.; Charles, E.; Ciocio, A.; Dao, K.; Einsweiler, K.; Fasching, D.; Gilchriese, M.; Joshi, A.; Kleinfelder, S.; Milgrome, O.; Palaio, N.; Richardson, J.; Sinervo, P.; Zizka, G.

    1999-01-01

    Diamond is a nearly ideal material for detecting ionising radiation. Its outstanding radiation hardness, fast charge collection and low leakage current allow it to be used in high radiation environments. These characteristics make diamond sensors particularly appealing for use in the next generation of pixel detectors. Over the last year, the RD42 collaboration has worked with several groups that have developed pixel readout electronics in order to optimise diamond sensors for bump-bonding. This effort resulted in an operational diamond pixel sensor that was tested in a pion beam. We demonstrate that greater than 98% of the channels were successfully bump-bonded and functioning. The device shows good overall hit efficiency as well as clear spatial hit correlation to tracks measured in a silicon reference telescope. A position resolution of 14.8 μm was observed, consistent with expectations given the detector pitch

  13. The first bump-bonded pixel detectors on CVD diamond

    CERN Document Server

    Adam, W; Berdermann, E; Bergonzo, P; Bogani, F; Borchi, E; Brambilla, A; Bruzzi, Mara; Colledani, C; Conway, J; Dabrowski, W; Delpierre, P A; Deneuville, A; Dulinski, W; van Eijk, B; Fallou, A; Fizzotti, F; Foulon, F; Fried, M; Gan, K K; Gheeraert, E; Grigoriev, E; Hallewell, G D; Hall-Wilton, R; Han, S; Hartjes, F G; Hrubec, Josef; Husson, D; Kagan, H; Kania, D R; Kaplon, J; Karl, C; Kass, R; Krammer, Manfred; Lo Giudice, A; Lü, R; Manfredi, P F; Manfredotti, C; Marshall, R D; Meier, D; Mishina, M; Oh, A; Palmieri, V G; Pan, L S; Peitz, A; Pernicka, Manfred; Pirollo, S; Polesello, P; Pretzl, Klaus P; Re, V; Riester, J L; Roe, S; Roff, D G; Rudge, A; Schnetzer, S R; Sciortino, S; Speziali, V; Stelzer, H; Steuerer, J; Stone, R; Tapper, R J; Tesarek, R J; Trawick, M L; Trischuk, W; Turchetta, R; Vittone, E; Wagner, A; Walsh, A M; Wedenig, R; Weilhammer, Peter; Zeuner, W; Ziock, H J; Zöller, M; Charles, E; Ciocio, A; Dao, K; Einsweiler, Kevin F; Fasching, D; Gilchriese, M G D; Joshi, A; Kleinfelder, S A; Milgrome, O; Palaio, N; Richardson, J; Sinervo, P K; Zizka, G

    1999-01-01

    Diamond is a nearly ideal material for detecting ionising radiation. Its outstanding radiation hardness, fast charge collection and low leakage current allow it to be used in high radiation environments. These characteristics make diamond sensors particularly appealing for use in the next generation of pixel detectors. Over the last year, the RD42 collaboration has worked with several groups that have developed pixel readout electronics in order to optimise diamond sensors for bump-bonding. This effort resulted in an operational diamond pixel sensor that was tested in a pion beam. We demonstrate that greater than 98565544f the channels were successfully bump-bonded and functioning. The device shows good overall hit efficiency as well as clear spatial hit correlation to tracks measured in a silicon reference telescope. A position resolution of 14.8 mu m was observed, consistent with expectations given the detector pitch. (13 refs).

  14. The first bump-bonded pixel detectors on CVD diamond

    Energy Technology Data Exchange (ETDEWEB)

    Adam, W.; Bauer, C.; Berdermann, E.; Bergonzo, P.; Bogani, F.; Borchi, E.; Brambilla, A.; Bruzzi, M.; Colledani, C.; Conway, J.; Dabrowski, W.; Delpierre, P.; Deneuville, A.; Dulinski, W.; Eijk, B. van; Fallou, A.; Fizzotti, F.; Foulon, F.; Friedl, M.; Gan, K.K.; Gheeraert, E.; Grigoriev, E.; Hallewell, G.; Hall-Wilton, R.; Han, S.; Hartjes, F.; Hrubec, J.; Husson, D.; Kagan, H.; Kania, D.; Kaplon, J.; Karl, C.; Kass, R.; Krammer, M.; Logiudice, A.; Lu, R.; Manfredi, P.F.; Manfredotti, C.; Marshall, R.D.; Meier, D.; Mishina, M.; Oh, A.; Palmieri, V.G.; Pan, L.S.; Peitz, A.; Pernicka, M.; Pirollo, S.; Polesello, P.; Pretzl, K.; Re, V.; Riester, J.L.; Roe, S.; Roff, D.; Rudge, A.; Schnetzer, S.; Sciortino, S.; Speziali, V.; Stelzer, H.; Steuerer, J.; Stone, R.; Tapper, R.J.; Tesarek, R.; Trawick, M.; Trischuk, W. E-mail: william@physics.utoronto.ca; Turchetta, R.; Vittone, E.; Wagner, A.; Walsh, A.M.; Wedenig, R.; Weilhammer, P.; Zeuner, W.; Ziock, H.; Zoeller, M.; Charles, E.; Ciocio, A.; Dao, K.; Einsweiler, K.; Fasching, D.; Gilchriese, M.; Joshi, A.; Kleinfelder, S.; Milgrome, O.; Palaio, N.; Richardson, J.; Sinervo, P.; Zizka, G

    1999-11-01

    Diamond is a nearly ideal material for detecting ionising radiation. Its outstanding radiation hardness, fast charge collection and low leakage current allow it to be used in high radiation environments. These characteristics make diamond sensors particularly appealing for use in the next generation of pixel detectors. Over the last year, the RD42 collaboration has worked with several groups that have developed pixel readout electronics in order to optimise diamond sensors for bump-bonding. This effort resulted in an operational diamond pixel sensor that was tested in a pion beam. We demonstrate that greater than 98% of the channels were successfully bump-bonded and functioning. The device shows good overall hit efficiency as well as clear spatial hit correlation to tracks measured in a silicon reference telescope. A position resolution of 14.8 {mu}m was observed, consistent with expectations given the detector pitch.

  15. Modules and Front-End Electronics Developments for the ATLAS ITk Strips Upgrade

    CERN Document Server

    Garcia-Argos, Carlos; The ATLAS collaboration

    2017-01-01

    The ATLAS experiment is currently preparing for an upgrade of the tracking system in the course of the High Luminosity LHC, scheduled for 2024. The existing Inner Detector will be replaced by an all-silicon Inner Tracker (ITk) with a pixel detector surrounded by a strip detector. The ITk strip detector consists of a four layer barrel and a forward region composed of six discs on each side of the barrel. The basic unit of the detector is the silicon-strip module, consisting of a sensor and one or more hybrid circuits that hold the read-out electronics. The geometries of the barrel and end-cap modules take into account the regions that they have to cover. In the central region, the detectors are rectangular with straight strips, whereas on the forward region the modules require wedge shaped sensors with varying strip length and pitch. The current prototyping phase has resulted in the ITk Strip Detector Technical Design Report (TDR), which kicks-off the pre-production readiness phase at the involved institutes. ...

  16. Modules and Front-End Electronics Developments for the ATLAS ITk Strips Upgrade

    CERN Document Server

    Garcia-Argos, Carlos; The ATLAS collaboration

    2017-01-01

    The ATLAS experiment is currently preparing for an upgrade of the tracking system in the course of the High Luminosity LHC, scheduled for 2024. The existing Inner Detector will be replaced by an all-silicon Inner Tracker (ITk) with a pixel detector surrounded by a strip detector. The ITk strip detector consists of a four layer barrel and a forward region composed of six discs on each side of the barrel. The basic unit of the detector is the silicon-strip module, consisting of a sensor and one or more hybrid circuits that hold the read-out electronics. The geometries of the barrel and end-cap modules take into account the regions that they have to cover. In the central region, the detectors are rectangular with straight strips, whereas in the forward region the modules require wedge shaped sensors with varying strip length and pitch. The current prototyping phase has resulted in the ITk Strip Detector Technical Design Report (TDR), which kicks-off the pre-production readiness phase at the involved institutes. ...

  17. The Layer 1 / Layer 2 readout upgrade for the ATLAS Pixel Detector

    CERN Document Server

    Mullier, Geoffrey; The ATLAS collaboration

    2016-01-01

    The Pixel Detector of the ATLAS experiment has shown excellent performance during the whole Run-1 of the Large Hadron Collider (LHC). The increase of instantaneous luminosity foreseen during the LHC Run 2, will lead to an increased detector occupancy that is expected to saturate the readout links of the outermost layers of the pixel detector: Layers 1 and 2. To ensure a smooth data taking under such conditions, the read out system of the recently installed fourth innermost pixel layer, the Insertable B-Layer, was modified to accomodate the needs of the older detector. The Layer 2 upgrade installation took place during the 2015 winter shutdown, with the Layer 1 installation scheduled for 2016. A report of the successful installation, together with the design of novel dedicated optical to electrical converters and the software and firmware updates will be presented.

  18. Exploration of Pixelated detectors for double beta decay searches within the COBRA experiment

    Energy Technology Data Exchange (ETDEWEB)

    Schwenke, M., E-mail: schwenke@asp.tu-dresden.de [Institut fuer Kern- und Teilchenphysik, Technische Universitaet Dresden, Zellescher Weg 19, 01069 Dresden (Germany); Zuber, K.; Janutta, B. [Institut fuer Kern- und Teilchenphysik, Technische Universitaet Dresden, Zellescher Weg 19, 01069 Dresden (Germany); He, Z.; Zeng, F. [Department of Nuclear Engineering and Radiological Sciences, University of Michigan, Ann Arbor, Michigan 48109-2104 (United States); Anton, G.; Michel, T.; Durst, J.; Lueck, F.; Gleixner, T. [Erlangen Centre for Astroparticle Physics, Friedrich-Alexander-Universitaet Erlangen-Nuernberg, Erwin-Rommel-Str. 1, 91058 Erlangen (Germany); Goessling, C.; Schulz, O.; Koettig, T. [Technische Universitaet Dortmund, Physik E IV, 44221 Dortmund (Germany); Krawczynski, H.; Martin, J. [Department of Physics, Washington University in St. Louis, Campus Box 1105, One Brookings Drive, St. Louis, MO 63130-4899 (United States); Stekl, I.; Cermak, P. [Institute of Experimental and Applied Physics, Czech Technical University in Prague, Horska 3a/22, 128 00 Prague (Czech Republic)

    2011-09-11

    The aim of the COBRA experiment is the search for neutrinoless double beta decay events in Cadmium Zinc Telluride (CdZnTe) room temperature semiconductor detectors. The development of pixelated detectors provides the potential for clear event identification and thus major background reduction. The tracking option of a semiconductor is a unique approach in this field. For initial studies, several possible detector systems are considered with a special regard for low background applications: the large volume system Polaris with a pixelated CdZnTe sensor, Timepix detectors with Si and enriched CdTe sensor material and a CdZnTe pixel system developed at the Washington University in St. Louis, USA. For all detector systems first experimental background measurements taken at underground laboratories (Gran Sasso Underground Laboratory in Italy, LNGS and the Niederniveau Messlabor Felsenkeller in Dresden, Germany) and additionally for the Timepix detectors simulation results are presented.

  19. Test beam results of a depleted monolithic active pixel sensor (DMAPS) prototype

    Energy Technology Data Exchange (ETDEWEB)

    Obermann, Theresa; Hemperek, Tomasz; Huegging, Fabian; Krueger, Hans; Wermes, Norbert [Bonn Univ. (Germany); Schwenker, Benjamin [Goettingen Univ. (Germany); Collaboration: ATLAS Pixel-Collaboration

    2016-07-01

    New monolithic detector concepts are currently being explored for future particle physics experiments, in particular for the upgrade of the ATLAS detector. Common to monolithic pixel detectors is the integration of the front-end circuitry and the sensor on the same silicon substrate. The DMAPS concept makes use of high resistive silicon as substrate. It enables the application of a high bias voltage to create a drift field for the charge collection in the sensor part as well as the full usage of CMOS logic in the same piece of silicon. DMAPS prototypes from several foundries are available since three years and have been extensively characterized in the lab. In this talk, results of test beam campaigns, with neutron irradiated prototypes implemented in the ESPROS process, are presented.

  20. MCC: the Module Controller Chip for the ATLAS Pixel Detector

    International Nuclear Information System (INIS)

    Beccherle, R.; Darbo, G.; Gagliardi, G.; Gemme, C.; Morettini, P.; Musico, P.; Osculati, B.; Oppizzi, P.; Pratolongo, F.; Ruscino, E.; Schiavi, C.; Vernocchi, F.; Blanquart, L.; Einsweiler, K.; Meddeler, G.; Richardson, J.; Comes, G.; Fischer, P.; Calvet, D.; Boyd, R.; Sicho, P.

    2002-01-01

    In this article we describe the architecture of the Module Controller Chip for the ATLAS Pixel Detector. The project started in 1997 with the definition of the system specifications. A first fully-working rad-soft prototype was designed in 1998, while a radiation hard version was submitted in 2000. The 1998 version was used to build pixel detector modules. Results from those modules and from the simulated performance in ATLAS are reported. In the article we also describe the hardware/software tools developed to test the MCC performance at the LHC event rate

  1. Simulated and experimental spectroscopic performance of GaAs X-ray pixel detectors

    International Nuclear Information System (INIS)

    Bisogni, M.G.; Cola, A.; Fantacci, M.E.

    2001-01-01

    In pixel detectors, the electrode geometry affects the signal shape and therefore the spectroscopic performance of the device. This effect is enhanced in semiconductors where carrier trapping is relevant. In particular, semi insulating (SI) GaAs crystals present an incomplete charge collection due to a high concentration of deep traps in the bulk. In the last few years, SI GaAs pixel detectors have been developed as soft X-ray detectors for medical imaging applications. In this paper, we present a numerical method to evaluate the local charge collection properties of pixel detectors. A bi-dimensional description has been used to represent the detector geometry. According to recent models, the active region of a reverse biased SI GaAs detector is almost neutral. Therefore, the electrostatic potential inside a full active detector has been evaluated using the Laplace equation. A finite difference method with a fixed step orthogonal mesh has been adopted. The photon interaction point has been generated with a Monte Carlo method according to the attenuation length of a monochromatic X-ray beam in GaAs. The number of photogenerated carriers for each interaction has been extracted using a gaussian distribution. The induced signal on the collecting electrode has been calculated according to the Ramo's theorem and the trapping effect has been modeled introducing electron and hole lifetimes. The noise of the charge preamplifier have been also taken into account. A comparison between simulated and experimental X-ray spectra from a 241 Am source acquired with different GaAs pixel detectors has been carried out

  2. Iterative local Chi2 alignment algorithm for the ATLAS Pixel detector

    CERN Document Server

    Göttfert, Tobias

    The existing local chi2 alignment approach for the ATLAS SCT detector was extended to the alignment of the ATLAS Pixel detector. This approach is linear, aligns modules separately, and uses distance of closest approach residuals and iterations. The derivation and underlying concepts of the approach are presented. To show the feasibility of the approach for Pixel modules, a simplified, stand-alone track simulation, together with the alignment algorithm, was developed with the ROOT analysis software package. The Pixel alignment software was integrated into Athena, the ATLAS software framework. First results and the achievable accuracy for this approach with a simulated dataset are presented.

  3. Detection of secondary electrons with pixelated hybrid semiconductor detectors; Sekundaerelektronennachweis mit pixelierten hybriden Halbleiterdetektoren

    Energy Technology Data Exchange (ETDEWEB)

    Gebert, Ulrike Sonja

    2011-09-14

    Within the scope of this thesis, secondary electrons were detected with a pixelated semiconductor detector named Timepix. The Timepix detector consists of electronics and a sensor made from a semiconductor material. The connection of sensor and electronics is done for each pixel individually using bump bonds. Electrons with energies above 3 keV can be detected with the sensor. One electron produces a certain amount of electron-hole pairs according to its energy. The charge then drifts along an electric field to the pixel electronics, where it induces an electric signal. Even without a sensor it is possible to detect an electric signal from approximately 1000 electrons directly in the pixel electronics. Two different detector systems to detect secondary electrons using the Timepix detector were investigated during this thesis. First of all, a hybrid photon detector (HPD) was used to detect single photoelectrons. The HPD consists of a vacuum vessel with an entrance window and a cesium iodine photocathode at the inner surface of the window. Photoelectrons are released from the photocathode by incident light and are accelerated in an electric field towards the Timepix detector, where the point of interaction and the arrival time of the electron is determined. With a proximity focusing setup, a time resolution of 12 ns (with an acceleration voltage of 20 kV between photocathode and Timepix detector) was obtained. The HPD examined in this thesis showed a strong dependence of the dark rate form the acceleration voltage and the pressure in the vacuum vessel. At a pressure of few 10{sup -5} mbar and an acceleration voltage of 20 kV, the dark rate was about 800 Hz per mm{sup 2} area of the read out photocathode. One possibility to reduce the dark rate is to identify ion feedback events. With a slightly modified setup it was possible to reduce the dark rate to 0.5 Hz/mm{sup 2}. To achieve this, a new photocathode was mounted in a shorter distance to the detector. The

  4. Neural network based cluster creation in the ATLAS silicon pixel detector

    CERN Document Server

    Selbach, K E; The ATLAS collaboration

    2012-01-01

    The read-out from individual pixels on planar semi-conductor sensors are grouped into clusters to reconstruct the location where a charged particle passed through the sensor. The resolution given by individual pixel sizes is significantly improved by using the information from the charge sharing between pixels. Such analog cluster creation techniques have been used by the ATLAS experiment for many years to obtain an excellent performance. However, in dense environments, such as those inside high-energy jets, clusters have an increased probability of merging the charge deposited by multiple particles. Recently, a neural network based algorithm which estimates both the cluster position and whether a cluster should be split has been developed for the ATLAS pixel detector. The algorithm significantly reduces ambiguities in the assignment of pixel detector measurement to tracks within jets and improves the position accuracy with respect to standard interpolation techniques by taking into account the 2-dimensional ...

  5. Neural network based cluster creation in the ATLAS silicon Pixel Detector

    CERN Document Server

    Andreazza, A; The ATLAS collaboration

    2013-01-01

    The read-out from individual pixels on planar semi-conductor sensors are grouped into clusters to reconstruct the location where a charged particle passed through the sensor. The resolution given by individual pixel sizes is significantly improved by using the information from the charge sharing between pixels. Such analog cluster creation techniques have been used by the ATLAS experiment for many years to obtain an excellent performance. However, in dense environments, such as those inside high-energy jets, clusters have an increased probability of merging the charge deposited by multiple particles. Recently, a neural network based algorithm which estimates both the cluster position and whether a cluster should be split has been developed for the ATLAS Pixel Detector. The algorithm significantly reduces ambiguities in the assignment of pixel detector measurement to tracks within jets and improves the position accuracy with respect to standard interpolation techniques by taking into account the 2-dimensional ...

  6. Modeling Radiation Damage to Pixel Sensors in the ATLAS Detector

    CERN Document Server

    Rossini, Lorenzo; The ATLAS collaboration

    2018-01-01

    Silicon pixel detectors are at the core of the current and planned upgrade of the ATLAS detector at the Large Hadron Collider (LHC). As the closest detector component to the interaction point, these detectors will be subjected to a significant amount of radiation over their lifetime: prior to the High-Luminosity LHC (HL-LHC), the innermost layers will receive a fluence in excess of 10^15 neq/cm^2 and the HL-HLC detector upgrades must cope with an order of magnitude higher fluence integrated over their lifetimes. Simulating radiation damage is critical in order to make accurate predictions for current and future detector performance that will enable searches for new particles and forces as well as precision measurements of Standard Model particles such as the Higgs boson. We present a digitization model that includes radiation damage effects to the ATLAS pixel sensors for the first time and considers both planar and 3D sensor designs. In addition to thoroughly describing the setup, we compare predictions for b...

  7. Recent progress in the development of a B-factory monolithic active pixel detector

    International Nuclear Information System (INIS)

    Stanic, S.; Aihara, H.; Barbero, M.; Bozek, A.; Browder, T.; Hazumi, M.; Kennedy, J.; Kent, N.; Olsen, S.; Palka, H.; Rosen, M.; Ruckman, L.; Trabelsi, K.; Tsuboyama, T.; Uchida, K.; Varner, G.; Yang, Q.

    2006-01-01

    Due to the need for precise vertexing at future higher luminosity B-factories with the expectedly increasing track densities and radiation exposures, upgrade of present silicon strip detectors with thin, radiation resistant pixel detectors is highly desired. Considerable progress in the technological development of thin CMOS based Monolithic Active Pixel Sensors (MAPS) in the last years makes them a realistic upgrade option and the feasibility studies of their application in Belle are actively pursued. The most serious concerns are their radiation hardness and their read-out speed. To address them, several prototypes denoted as Continuous Acquisition Pixel (CAP) sensors have been developed and tested. The latest of the CAP sensor prototypes is CAP3, designed in the TSMC 0.25μm process with a 5-deep sample pair pipeline in each pixel. A setup with several CAP3 sensors will be used to assess the performance of a full scale pixel read-out system running at realistic read-out speed. The results and plans for the next stages of R and D towards a full Pixel Vertex Detector (PVD) are presented

  8. The Gigatracker: An ultra-fast and low-mass silicon pixel detector for the NA62 experiment

    Science.gov (United States)

    Fiorini, M.; Carassiti, V.; Ceccucci, A.; Cortina, E.; Cotta Ramusino, A.; Dellacasa, G.; Garbolino, S.; Jarron, P.; Kaplon, J.; Kluge, A.; Mapelli, A.; Marchetto, F.; Martin, E.; Martoiu, S.; Mazza, G.; Morel, M.; Noy, M.; Nuessle, G.; Petrucci, F.; Riedler, P.; Aglieri Rinella, G.; Rivetti, A.; Tiuraniemi, S.

    2011-02-01

    The Gigatracker is a hybrid silicon pixel detector developed to track the highly intense NA62 hadron beam with a time resolution of 150 ps (rms). The beam spectrometer of the experiment is composed of three Gigatracker stations installed in vacuum in order to precisely measure momentum, time and direction of every traversing particle. Precise tracking demands a very low mass of the detector assembly ( beam hadronic interactions. The high rate and especially the high timing precision requirements are very demanding: two R&D options are ongoing and the corresponding prototype read-out chips have been recently designed and produced in 0.13 μm CMOS technology. One solution makes use of a constant fraction discriminator and on-pixel analogue-based time-to-digital-converter (TDC); the other comprises a delay-locked loop based TDC placed at the end of each pixel column and a time-over-threshold discriminator with time-walk correction technique. The current status of the R&D program is overviewed and results from the prototype read-out chips test are presented.

  9. Design of readout drivers for ATLAS pixel detectors using field programmable gate arrays

    CERN Document Server

    Sivasubramaniyan, Sriram

    Microstrip detectors are an integral patt of high energy physics research . Special protocols are used to transmit the data from these detectors . To readout the data from such detectors specialized instrumentation have to be designed . To achieve this task, creative and innovative high speed algorithms were designed simulated and implemented in Field Programmable gate arrays, using CAD/CAE tools. The simulation results indicated that these algorithms would be able to perform all the required tasks quickly and efficiently. This thesis describes the design of data acquisition system called the Readout Drivers (ROD) . It focuses on the ROD data path for ATLAS Pixel detectors. The data path will be an integrated part of Readout Drivers setup to decode the data from the silicon micro strip detectors and pixel detectors. This research also includes the design of Readout Driver controller. This Module is used to control the operation of the ROD. This module is responsible for the operation of the Pixel decoders bas...

  10. Results from CHIPIX-FE0, a Small-Scale Prototype of a New Generation Pixel Readout ASIC in 65 nm CMOS for HL-LHC

    CERN Document Server

    Pacher, L.; Demaria, N.; Rivetti, A.; Da Rocha Rolo, M.; Dellacasa, G.; Mazza, G.; Rotondo, F.; Wheadon, R.; Paternò, A.; Panati, S.; Loddo, F.; Licciulli, F.; Ciciriello, F.; Marzocca, C.; Gaioni, L.; Traversi, G.; Re, V.; De Canio, F.; Ratti, L.; Marconi, S.; Placidi, P.; Magazzù, G.; Stabile, A.; Mattiazzo, S.

    2018-01-01

    A prototype of a new-generation readout ASIC targeting High-Luminosity (HL) LHC pixel detector upgrades has been designed and fabricated as part of the Italian INFN CHIPIX65 project using a commercial 65 nm CMOS technology. This demonstrator, hereinafter referred to as CHIPIX-FE0, is composed of a matrix of 64 × 64 pixels with 50 μm × 50 μm pixel size embedding two different architectures of analog front-ends working in parallel. The final layout of the chip was submitted and accepted for fabrication on July 2016. Chips were received back from the foundry on October 2016 and successfully characterized before irradiation. Several irra- diation campaigns with X-rays have been accomplished during 2017 at Padova INFN and CERN EP/ESE facilities under different uniformity and temperature conditions up to 630 Mrad Total Ionizing Dose (TID). These studies corfirmed negligible degradation of analog front-ends per- formance after irradiation. First sample chips have been also bump-bonded to 50 μm × 50 μm and sin...

  11. Performance of the Insertable B-Layer for the ATLAS Pixel Detector during Quality Assurance and a Novel Pixel Detector Readout Concept based on PCIe

    CERN Document Server

    AUTHOR|(INSPIRE)INSPIRE-00356268; Pernegger, Heinz

    2016-07-27

    During the first long shutdown of the LHC the Pixel detector has been upgraded with a new 4th innermost layer, the Insertable B-Layer (IBL). The IBL will increase the tracking performance and help with higher than nominal luminosity the LHC will produce. The IBL is made up of 14 staves and in total 20 staves have been produced for the IBL. This thesis presents the results of the final quality tests performed on these staves in an detector-like environment, in order to select the 14 best of the 20 staves for integration onto the detector. The test setup as well as the testing procedure is introduced and typical results of each testing stage are shown and discussed. The overall performance of all staves is presented in regards to: tuning performance, radioactive source measurements, and number of failing pixels. Other measurement, which did not directly impact the selection of staves, but will be important for the operation of the detector or production of a future detector, are included. Based on the experienc...

  12. The High Energy Detector of Simbol-X

    Science.gov (United States)

    Meuris, A.; Limousin, O.; Lugiez, F.; Gevin, O.; Blondel, C.; Le Mer, I.; Pinsard, F.; Cara, C.; Goetschy, A.; Martignac, J.; Tauzin, G.; Hervé, S.; Laurent, P.; Chipaux, R.; Rio, Y.; Fontignie, J.; Horeau, B.; Authier, M.; Ferrando, P.

    2009-05-01

    The High Energy Detector (HED) is one of the three detection units on board the Simbol-X detector spacecraft. It is placed below the Low Energy Detector so as to collect focused photons in the energy range from 8 to 80 keV. It consists of a mosaic of 64 independent cameras, divided in 8 sectors. Each elementary detection unit, called Caliste, is the hybridization of a 256-pixel Cadmium Telluride (CdTe) detector with full custom front-end electronics into a unique component. The status of the HED design will be reported. The promising results obtained from the first micro-camera prototypes called Caliste 64 and Caliste 256 will be presented to illustrate the expected performance of the instrument.

  13. The High Energy Detector of Simbol-X

    International Nuclear Information System (INIS)

    Meuris, A.; Limousin, O.; Blondel, C.; Le Mer, I.; Pinsard, F.; Cara, C.; Goetschy, A.; Martignac, J.; Laurent, P.; Chipaux, R.; Rio, Y.; Fontignie, J.; Horeau, B.; Ferrando, P.; Lugiez, F.; Gevin, O.; Tauzin, G.; Herve, S.; Authier, M.

    2009-01-01

    The High Energy Detector (HED) is one of the three detection units on board the Simbol-X detector spacecraft. It is placed below the Low Energy Detector so as to collect focused photons in the energy range from 8 to 80 keV. It consists of a mosaic of 64 independent cameras, divided in 8 sectors. Each elementary detection unit, called Caliste, is the hybridization of a 256-pixel Cadmium Telluride (CdTe) detector with full custom front-end electronics into a unique component. The status of the HED design will be reported. The promising results obtained from the first micro-camera prototypes called Caliste 64 and Caliste 256 will be presented to illustrate the expected performance of the instrument.

  14. An EUDET/AIDA Pixel Beam Telescope for Detector Development

    CERN Document Server

    Rubinskiy, I

    2015-01-01

    Ahigh resolution(σ< 2 μm) beam telescope based on monolithic active pixel sensors (MAPS) was developed within the EUDET collaboration. EUDET was a coordinated detector R&D programme for the future International Linear Collider providing test beam infrastructure to detector R&D groups. The telescope consists of six sensor planes with a pixel pitch of either 18.4 μm or 10 μmand canbe operated insidea solenoidal magnetic fieldofupto1.2T.Ageneral purpose cooling, positioning, data acquisition (DAQ) and offine data analysis tools are available for the users. The excellent resolution, readout rate andDAQintegration capabilities made the telescopea primary beam tests tool also for several CERN based experiments. In this report the performance of the final telescope is presented. The plans for an even more flexible telescope with three differentpixel technologies(ATLASPixel, Mimosa,Timepix) withinthenew European detector infrastructure project AIDA are presented.

  15. Front-end electronics for the Muon Portal project

    Energy Technology Data Exchange (ETDEWEB)

    Garozzo, S.; Marano, D.; Bonanno, G.; Grillo, A.; Romeo, G.; Timpanaro, M.C. [INAF, Osservatorio Astrofisico di Catania, Via S. Sofia 78, I-95123 Catania (Italy); Lo Presti, D.; Riggi, F.; Russo, V.; Bonanno, D.; La Rocca, P.; Longhitano, F.; Bongiovanni, D.G. [Università di Catania, Dipartimento di Fisica e Astronomia, and INFN, Sezione di Catania, Via S. Sofia 64, I-95123 Catania (Italy); Fallica, G.; Valvo, G. [ST-Microelectronics, Stradale V Primosole 50, Catania (Italy)

    2016-10-11

    The Muon Portal Project was born as a joint initiative between Italian research and industrial partners, aimed at the construction of a real-size working detector prototype to inspect the content of traveling containers by means of secondary cosmic-ray muon radiation and recognize potentially dangerous hidden materials. The tomographic image is obtained by reconstructing the incoming and outgoing muon trajectories when crossing the inspected volume, employing two tracker planes located above and below the container under inspection. In this paper, the design and development of the front-end electronics of the Muon Portal detector is presented, with particular emphasis being devoted to the photo-sensor devices detecting the scintillation light and to the read-out circuitry which is in charge of processing and digitizing the analog pulse signals. In addition, the remote control system, mechanical housing, and thermal cooling system of all structural blocks of the Muon Portal tracker are also discussed, demonstrating the effectiveness and functionality of the adopted design.

  16. X-Ray Beam Studies of Charge Sharing in Small Pixel, Spectroscopic, CdZnTe Detectors

    Science.gov (United States)

    Allwork, Christopher; Kitou, Dimitris; Chaudhuri, Sandeep; Sellin, Paul J.; Seller, Paul; Veale, Matthew C.; Tartoni, Nicola; Veeramani, Perumal

    2012-08-01

    Recent advances in the growth of CdZnTe material have allowed the development of small pixel, spectroscopic, X-ray imaging detectors. These detectors have applications in a diverse range of fields such as medical, security and industrial sectors. As the size of the pixels decreases relative to the detector thickness, the probability that charge is shared between multiple pixels increases due to the non zero width of the charge clouds drifting through the detector. These charge sharing events will result in a degradation of the spectroscopic performance of detectors and must be considered when analyzing the detector response. In this paper charge sharing and charge loss in a 250 μm pitch CdZnTe pixel detector has been investigated using a mono-chromatic X-ray beam at the Diamond Light Source, U.K. Using a 20 μm beam diameter the detector response has been mapped for X-ray energies both above (40 keV) and below (26 keV) the material K-shell absorption energies to study charge sharing and the role of fluorescence X-rays in these events.

  17. Modeling Radiation Damage Effects in 3D Pixel Digitization for the ATLAS Detector

    CERN Document Server

    Giugliarelli, Gilberto; The ATLAS collaboration

    2017-01-01

    Silicon Pixel detectors are at the core of the current and planned upgrade of the ATLAS detector. As the detector in closest proximity to the interaction point, these detectors will be subjected to a significant amount of radiation over their lifetime: prior to the HL-LHC, the innermost layers will receive a fluence in excess of 10^15 neq/cm2 and the HL-LHC detector upgrades must cope with an order of magnitude higher fluence integrated over their lifetimes. This poster presents the details of a new digitization model that includes radiation damage effects to the 3D Pixel sensors for the ATLAS Detector.

  18. Modeling Radiation Damage Effects in 3D Pixel Digitization for the ATLAS Detector

    CERN Document Server

    Wallangen, Veronica; The ATLAS collaboration

    2017-01-01

    Silicon Pixel detectors are at the core of the current and planned upgrade of the ATLAS detector. As the detector in closest proximity to the interaction point, these detectors will be subjected to a significant amount of radiation over their lifetime: prior to the HL-LHC, the innermost layers will receive a fluence in excess of 10$^{15}$ n$_\\mathrm{eq}$/cm$^2$ and the HL-LHC detector upgrades must cope with an order of magnitude higher fluence integrated over their lifetimes. This work presents the details of a new digitization model that includes radiation damage effects to the 3D Pixel sensors for the ATLAS detector.

  19. Silicon micro-fluidic cooling for NA62 GTK pixel detectors

    CERN Document Server

    Romagnoli, G; Brunel, B; Catinaccio, A; Degrange, J; Mapelli, A; Morel, M; Noel, J; Petagna, P

    2015-01-01

    Silicon micro-channel cooling is being studied for efficient thermal management in application fields such as high power computing and 3D electronic integration. This concept has been introduced in 2010 for the thermal management of silicon pixel detectors in high energy physics experiments. Combining the versatility of standard micro-fabrication processes with the high thermal efficiency typical of micro-fluidics, it is possible to produce effective thermal management devices that are well adapted to different detector configurations. The production of very thin cooling devices in silicon enables a minimization of material of the tracking sensors and eliminates mechanical stresses due to the mismatch of the coefficient of thermal expansion between detectors and cooling systems. The NA62 experiment at CERN will be the first high particle physics experiment that will install a micro-cooling system to perform the thermal management of the three detection planes of its Gigatracker pixel detector.

  20. X-ray Imaging Using a Hybrid Photon Counting GaAs Pixel Detector

    CERN Document Server

    Schwarz, C; Göppert, R; Heijne, Erik H M; Ludwig, J; Meddeler, G; Mikulec, B; Pernigotti, E; Rogalla, M; Runge, K; Smith, K M; Snoeys, W; Söldner-Rembold, S; Watt, J

    1999-01-01

    The performance of hybrid GaAs pixel detectors as X-ray imaging sensors were investigated at room temperature. These hybrids consist of 300 mu-m thick GaAs pixel detectors, flip-chip bonded to a CMOS Single Photon Counting Chip (PCC). This chip consists of a matrix of 64 x 64 identical square pixels (170 mu-m x 170 mu-m) and covers a total area of 1.2 cm**2. The electronics in each cell comprises a preamplifier, a discriminator with a 3-bit threshold adjust and a 15-bit counter. The detector is realized by an array of Schottky diodes processed on semi-insulating LEC-GaAs bulk material. An IV-charcteristic and a detector bias voltage scan showed that the detector can be operated with voltages around 200 V. Images of various objects were taken by using a standard X-ray tube for dental diagnostics. The signal to noise ratio (SNR) was also determined. The applications of these imaging systems range from medical applications like digital mammography or dental X-ray diagnostics to non destructive material testing (...

  1. Evaluation of a hybrid photon counting pixel detector for X-ray polarimetry

    International Nuclear Information System (INIS)

    Michel, T.; Durst, J.

    2008-01-01

    It has already been shown in literature that X-ray sensitive CCDs can be used to measure the degree of linear polarization of X-rays using the effect that photoelectrons are emitted with a non-isotropic angular distribution in respect to the orientation of the electric field vector of impinging photons. Up to now hybrid semiconductor pixel detectors like the Timepix-detector have never been used for X-ray polarimetry. The main reason for this is that the pixel pitch is large compared to CCDs which results in a much smaller analyzing power. On the other hand, the active thickness of the sensor layer can be larger than in CCDs leading to an increased efficiency. Therefore hybrid photon counting pixel detectors may be used for imaging and polarimetry at higher photon energies. For irradiation with polarized X-ray photons we were able to measure an asymmetry between vertical and horizontal double hit events in neighboring pixels of the hybrid photon counting Timepix-detector at room temperature. For the specific spectrum used in our experiment an average polarization asymmetry of (0.96±0.02)% was measured. Additionally, the Timepix-detector with its spectroscopic time-over-threshold-mode was used to measure the dependence of the polarization asymmetry on energy deposition in the detector. Polarization asymmetries between 0.2% at 29 keV and 3.4% at 78 keV energy deposition were determined. The results can be reproduced with our EGS4-based Monte-Carlo simulation

  2. Development of 3D-DDTC pixel detectors for the ATLAS upgrade

    International Nuclear Information System (INIS)

    Dalla Betta, Gian-Franco; Boscardin, Maurizio; Darbo, Giovanni; Gemme, Claudia; La Rosa, Alessandro; Pernegger, Heinz; Piemonte, Claudio; Povoli, Marco; Ronchin, Sabina; Zoboli, Andrea; Zorzi, Nicola

    2011-01-01

    We report on the development of n-on-p, 3D Double-Side Double Type Column (3D-DDTC) pixel detectors fabricated at FBK-irst (Trento, Italy) and oriented to the ATLAS upgrade. The considered fabrication technology is simpler than that required for full 3D detectors with active edge, but the detector efficiency and radiation hardness critically depend on the columnar electrode overlap and should be carefully evaluated. The first assemblies of these sensors (featuring 2, 3, or 4 columns per pixel) with the ATLAS FEI3 read-out chip have been tested in laboratory. Selected results from the electrical and functional characterization with radioactive sources are discussed here.

  3. Development of 3D-DDTC pixel detectors for the ATLAS upgrade

    Energy Technology Data Exchange (ETDEWEB)

    Dalla Betta, Gian-Franco, E-mail: dallabe@disi.unitn.it [INFN, Sezione di Padova (Gruppo Collegato di Trento), and DISI, Universita di Trento, Via Sommarive 14, 38123 Povo di Trento (Italy); Boscardin, Maurizio [Fondazione Bruno Kessler (FBK-irst), Via Sommarive 18, 38123 Povo di Trento (Italy); Darbo, Giovanni; Gemme, Claudia [INFN, Sezione di Genova, Via Dodecaneso 33, 16146 Genova (Italy); La Rosa, Alessandro; Pernegger, Heinz [CERN-PH, CH-1211 Geneve 23 (Switzerland); Piemonte, Claudio [Fondazione Bruno Kessler (FBK-irst), Via Sommarive 18, 38123 Povo di Trento (Italy); Povoli, Marco [INFN, Sezione di Padova (Gruppo Collegato di Trento), and DISI, Universita di Trento, Via Sommarive 14, 38123 Povo di Trento (Italy); Ronchin, Sabina [Fondazione Bruno Kessler (FBK-irst), Via Sommarive 18, 38123 Povo di Trento (Italy); Zoboli, Andrea [INFN, Sezione di Padova (Gruppo Collegato di Trento), and DISI, Universita di Trento, Via Sommarive 14, 38123 Povo di Trento (Italy); Zorzi, Nicola [Fondazione Bruno Kessler (FBK-irst), Via Sommarive 18, 38123 Povo di Trento (Italy)

    2011-04-21

    We report on the development of n-on-p, 3D Double-Side Double Type Column (3D-DDTC) pixel detectors fabricated at FBK-irst (Trento, Italy) and oriented to the ATLAS upgrade. The considered fabrication technology is simpler than that required for full 3D detectors with active edge, but the detector efficiency and radiation hardness critically depend on the columnar electrode overlap and should be carefully evaluated. The first assemblies of these sensors (featuring 2, 3, or 4 columns per pixel) with the ATLAS FEI3 read-out chip have been tested in laboratory. Selected results from the electrical and functional characterization with radioactive sources are discussed here.

  4. Development of 3D-DDTC pixel detectors for the ATLAS upgrade

    CERN Document Server

    Betta, G -F Dalla; Darbo, G; Gemme, C; La Rosa, A; Pernegger, H; Piemonte, C; Povoli, M; Ronchin, S; Zoboli, A; Zorzi, N

    2011-01-01

    We report on the development of n-on-p, 3D Double-Side Double Type Column (3D-DDTC) pixel detectors fabricated at FBK-irst (Trento, Italy) and oriented to the ATLAS upgrade. The considered fabrication technology is simpler than that required for full 3D detectors with active edge, but the detector efficiency and radiation hardness critically depend on the columnar electrode overlap and should be carefully evaluated. The first assemblies of these sensors (featuring 2, 3, or 4 columns per pixel) with the ATLAS FEI3 read-out chip have been tested in laboratory. Selected results from the electrical and functional characterization with radioactive sources are here discussed.

  5. A front-end electronic system for large arrays of bolometers

    Science.gov (United States)

    Arnaboldi, C.; Carniti, P.; Cassina, L.; Gotti, C.; Liu, X.; Maino, M.; Pessina, G.; Rosenfeld, C.; Zhu, B. X.

    2018-02-01

    CUORE is an array of thermal calorimeters composed of 988 crystals held at about 10 mK, whose absorbed energy is read out with semiconductor thermistors. The composition of the crystal is TeO2, and the aim is the study of the double beta decay of 130Te on very long and stable runs. CUPID-0 is an array of 26 Zn82Se crystals with double thermistor readout to study the double beta decay of 82Se. In the present paper, we present an overview of the entire front-end electronic readout chain, from the preamplifier to the anti-aliasing filter. This overview includes motivations, design strategies, circuit implementation and performance results of the electronic system, including other auxiliary yet important elements like power supplies and the slow control communication system. The stringent requirements of stability on the very long experimental runs that are foreseen during CUORE and CUPID-0 operation, are achieved thanks to novel solutions of the front-end preamplifier and of the detector bias circuit setup.

  6. LHCb : A generic firmware core to drive the Front-End GBT-SCAs for the LHCb ugprade

    CERN Multimedia

    Alessio, Federico; Gaspar, Clara; Jacobsson, Richard; Wyllie, Ken

    2014-01-01

    The LHCb experiment has proposed an upgrade towards a full 40 MHz readout system in order to run between five and ten times its initial design luminosity. The entire Front-End electronics will be upgraded in order to cope with higher sub-detector occupancy, higher data rate and to work in a complete trigger-less fashion. In this paper, we describe a novel way to transmit slow control information to the Front-End electronics, by profiting from bidirectional optical connections and the GBT and GBT-SCA chipset capabilities. The implementation and preliminary validation tests are shown as well

  7. The upgraded Pixel Detector of the ATLAS Experiment for Run 2 at the Large Hadron Collider

    Energy Technology Data Exchange (ETDEWEB)

    Backhaus, M., E-mail: malte.backhaus@cern.ch

    2016-09-21

    During Run 1 of the Large Hadron Collider (LHC), the ATLAS Pixel Detector has shown excellent performance. The ATLAS collaboration took advantage of the first long shutdown of the LHC during 2013 and 2014 and extracted the ATLAS Pixel Detector from the experiment, brought it to surface and maintained the services. This included the installation of new service quarter panels, the repair of cables, and the installation of the new Diamond Beam Monitor (DBM). Additionally, a completely new innermost pixel detector layer, the Insertable B-Layer (IBL), was constructed and installed in May 2014 between a new smaller beam pipe and the existing Pixel Detector. With a radius of 3.3 cm the IBL is located extremely close to the interaction point. Therefore, a new readout chip and two new sensor technologies (planar and 3D) are used in the IBL. In order to achieve best possible physics performance the material budget was improved with respect to the existing Pixel Detector. This is realized using lightweight staves for mechanical support and a CO{sub 2} based cooling system. This paper describes the improvements achieved during the maintenance of the existing Pixel Detector as well as the performance of the IBL during the construction and commissioning phase. Additionally, first results obtained during the LHC Run 2 demonstrating the distinguished tracking performance of the new Four Layer ATLAS Pixel Detector are presented.

  8. Track parameter resolution study of a pixel only detector for LHC geometry and future high rate experiments

    Energy Technology Data Exchange (ETDEWEB)

    Blago, Michele Piero; Kar, Tamasi Rameshchandra; Schoening, Andre [Physikalisches Institut, Universitaet Heidelberg (Germany)

    2016-07-01

    Recent progress in pixel detector technology, for example using High Voltage-Monolithic Pixel Sensors (HV-MAPS), makes it feasible to construct an all-silicon pixel detector for large scale particle experiments like ATLAS and CMS or other future collider experiments. Preliminary studies have shown that nine layers of pixel sensors are sufficient to reliably reconstruct particle trajectories. The performance of such an all-pixel detector is studied based on a full GEANT simulation for high luminosity conditions at the upgraded LHC. Furthermore, the ability of an all-pixel detector to form trigger decisions using a special triplet pixel layer design is studied. Such a design could be used to reconstruct all tracks originating from the proton-proton interaction at the first hardware level at 40 MHz collision frequency.

  9. The upgraded Pixel detector and the commissioning of the Inner Detector tracking of the ATLAS experiment for Run-2 at the Large Hadron Collider

    CERN Document Server

    AUTHOR|(INSPIRE)INSPIRE-00019188; The ATLAS collaboration

    2016-01-01

    Run-2 of the Large Hadron Collider (LHC) will provide new challenges to track and vertex reconstruction with higher energies, denser jets and higher rates. Therefore the ATLAS experiment has constructed the first 4-layer Pixel detector in HEP, installing a new Pixel layer, also called Insertable B-Layer (IBL). The IBL is a fourth layer of pixel detectors, and has been installed in May 2014 at a radius of 3.3 cm between the existing Pixel Detector and a new smaller radius beam-pipe. The new detector, built to cope with the high radiation and expected occupancy, is the first large scale application of 3D detectors and CMOS 130~nm technology. In addition, the Pixel detector was refurbished with a new service quarter panel to recover about 3% of defective modules lost during Run-1 and a new optical readout system to readout the data at higher speed while reducing the occupancy when running with increased luminosity. Complementing detector improvements, many improvements to Inner Detector track and vertex reconstr...

  10. Anode front-end electronics for the cathode strip chambers of the CMS Endcap Muon detector

    International Nuclear Information System (INIS)

    Ferguson, T.; Bondar, N.; Golyash, A.; Sedov, V.; Terentiev, N.; Vorobiev, I.

    2005-01-01

    The front-end electronics system for the anode signals of the CMS Endcap Muon cathode strip chambers has about 183,000 channels. The purposes of the anode front-end electronics are to acquire precise muon timing information for bunch crossing number identification at the Level-1 muon trigger system and to provide a coarse radial position of the muon track. Each anode channel consists of an input protection network, amplifier, shaper, constant-fraction discriminator, and a programmable delay. The essential parts of the electronics include a 16-channel amplifier-shaper-discriminator ASIC CMP16 and a 16-channel ASIC D16G providing programmable time delay. The ASIC CMP16 was optimized for the large cathode chamber size (up to 3x2.5 m 2 ) and for the large input capacitance (up to 200 pF). The ASIC combines low power consumption (30 mW/channel) with good time resolution (2-3 ns). The delay ASIC D16G makes possible the alignment of signals with an accuracy of 2.2 ns. This paper presents the anode front-end electronics structure and results of the preproduction and the mass production tests, including radiation resistance and reliability tests. The special set of test equipment, techniques, and corresponding software developed and used in the test procedures are also described

  11. Adaptive RF front-ends for hand-held applications

    CERN Document Server

    van Bezooijen, Andre; van Roermund, Arthur

    2010-01-01

    The RF front-end - antenna combination is a vital part of a mobile phone because its performance is very relevant to the link quality between hand-set and cellular network base-stations. The RF front-end performance suffers from changes in operating environment, like hand-effects, that are often unpredictable. ""Adaptive RF Front-Ends for Hand-Held Applications"" presents an analysis on the impact of fluctuating environmental parameters. In order to overcome undesired behavior two different adaptive control methods are treated that make RF frond-ends more resilient: adaptive impedance control,

  12. Results from the Commissioning of the ATLAS Pixel Detector

    CERN Document Server

    Ibragimov, I

    2008-01-01

    The ATLAS pixel detector is the innermost tracking detector of the ATLAS experiment at the Large Hadron Collider (LHC) at CERN. It has a total active area of 1.7 m2 of silicon read out by approximately 80 million electronic channels, which will detect particle tracks and decay vertices with a very high precision. After more than 10 years of development and construction it is the first time ever the whole detector has been operated together. The paper will illustrate the detector performance and give first results from the combined ATLAS cosmics runs.

  13. 3D simulations and modeling of new low capacitance silicon pixel detectors

    Energy Technology Data Exchange (ETDEWEB)

    Xiong, Bo; Li, Yu Yun [School of Materials Science and Engineering, Xiangtan University, Xiangtan 411105 (China); Center for Semiconductor Particle and photon Imaging Detector Development and Fabrication, Xiangtan University, Xiangtan 411105 (China); Li, Zheng, E-mail: zhengli58@gmail.com [School of Materials Science and Engineering, Xiangtan University, Xiangtan 411105 (China); Center for Semiconductor Particle and photon Imaging Detector Development and Fabrication, Xiangtan University, Xiangtan 411105 (China)

    2016-09-21

    With signal to noise ratio (S/N) being a key parameter of a high performance detector, reducing the detector noise has been one of the main tasks in detector development. A new low capacitance silicon pixel detector is proposed, which is based on a new electrode geometry with reduced effective electrode area while keeping the sensitive volume unchanged. Detector electrical characteristics including electrostatic potential, electric field, full depletion voltage, and capacitance have been simulated in detail using a 3D TCAD tool. From these simulations and calculations, we confirm that the new detector structure has a much reduced capacitance (by a factor of 3) as compared to the traditional pixel detectors with the same sensitive volume. This reduction in detector capacitance can certainly improve the detector signal to noise ratio. However, the full depletion voltage for the new structure is larger than that of the traditional one due to the small electrode effect.

  14. Leakage current measurements on pixelated CdZnTe detectors

    NARCIS (Netherlands)

    Dirks, B.; Blondel, C.; Daly, F.; Gevin, O.; Limousin, O.; Lugiez, F.

    2006-01-01

    In the field of the R&D of a new generation hard X-ray cameras for space applications we focus on the use of pixelated CdTe or CdZnTe semiconductor detectors. They are covered with 64 (0.9×0.9 mm2) or 256 (0.5×0.5 mm2) pixels, surrounded by a guard ring and operate in the energy ranging from several

  15. Pixel Detector Developments for Tracker Upgrades of the High Luminosity LHC

    CERN Document Server

    Meschini, Marco; Dalla Betta, G. F; Dinardo, Mauro; Giacomini, G; Menasce, Dario; Mendicino, R; Messineo, Alberto; Moroni, Luigi; Ronchin, S; Sultan, D.M.S; Uplegger, Lorenzo; Viliani, Lorenzo; Zoi, Irene; Zuolo, Davide

    2017-01-01

    and 3D devices. The results on the 3D pixel sensors before irradiation are very satisfactory and % make us confident support the conclusion that columnar devices are % 3D devices very good candidates for the inner layers of the upgrade pixel detectors.

  16. The power supply system for the DEPFET pixel detector at BELLE II

    International Nuclear Information System (INIS)

    Rummel, Stefan

    2013-01-01

    The upgrade of the KEKB accelerator towards 8×10 35 cm −2 s −1 poses several challenges for the BELLE II detector. Especially the innermost detector will be faced with a significant radiation of several MRad per year as well as a high hit density. To cope with this a silicon pixel detector will be used for the inner layers of the silicon tracker. The pixel detector (PXD) consists of two layers of DEPFET active pixel sensors. The DEPFET technology has an unique set of advantages like low power dissipation in the active area, flexible device size, radiation hardness and a thinning procedure allowing to adjust the thickness of the device over a wide range. The two layers close to the interaction point together with a low material budget will improve the IP resolution by a factor of 2 compared to the previous installed silicon detector. In addition silicon stand-alone pattern recognition will be possible together with the four layers of double sided strip detectors (DSSD) of the strip detector. The PXD detector system consists of the DEPFET modules with integrated readout chips, the data handling hybrid receiving the data and sending them to compute nodes performing an online pattern recognition. Moreover the power supply system provides the supply voltages for the DEPFET from a position outside of the detector. The power distribution is designed to provide low output impedance over all frequencies and transient response with appropriate overshoots. The PXD pose several challenges to the power distribution system—number of voltages, tight requirements on regulation and noise. -- Highlights: ► The KEKB accelerator receive a luminosity upgrade towards 8×10 35 cm −2 s −1 . ► A two layer pixel detector based on the DEPFET technology will be installed. ► An improvement of a factor of 2 in. impact parameter resolution is expected. ► The 34 A dedicated power supply system for the detector is under development which aims for low noise, low output impedance

  17. Finite-element simulations of coupling capacitances in capacitively coupled pixel detectors

    CERN Document Server

    AUTHOR|(SzGeCERN)755510

    2017-01-01

    Capacitively coupled hybrid silicon pixel-detector assemblies are under study for the vertex detector at the proposed future CLIC linear electron-positron collider. The assemblies consist of active CCPDv3 sensors, with 25 μm pixel pitch implemented in a 180 nm High- Voltage CMOS process, which are glued to the CLICpix readout ASIC, with the same pixel pitch and processed in a commercial 65 nm CMOS technology. The signal created in the silicon bulk of the active sensors passes a two-stage amplifier, in each pixel, and gets transferred as a voltage pulse to metal pads facing the readout chip (ROC). The coupling of the signal to the metal pads on the ROC side proceeds through the capacitors formed between the two chips by a thin layer of epoxy glue. The coupling strength and the amount of unwanted cross coupling to neighbouring pixels depends critically on the uniformity of the glue layer, its thickness and on the alignment precision during the flip-chip assembly process. Finite-element calculations of the coup...

  18. Characterization of a large-format, fine-pitch CdZnTe pixel detector for the HEFT balloon-Borne experiment

    OpenAIRE

    Chen, C. M. Hubert; Cook, Walter R.; Harrison, Fiona A.; Lin, Jiao Y. Y.

    2004-01-01

    We have developed a large-format CdZnTe pixel detector with custom, low-noise ASIC readout, for astrophysical applications. In particular, this detector is targeted for use in the High-Energy Focusing Telescope (HEFT), a balloon-borne experiment with focusing optics for 20-70 keV. The detector is a 24 X 44 pixel array of 498-µm pitch. As a focal plane detector, uniformity from pixel to pixel is very desirable. In this paper, we present the characterization of some detector properties for the ...

  19. Status of the ATLAS Pixel Detector at the LHC and its performance after three years of operation

    CERN Document Server

    Andreazza, A; The ATLAS collaboration

    2012-01-01

    The ATLAS Pixel Detector is the innermost detector of the ATLAS experiment at the Large Hadron Collider at CERN, providing high-resolution measurements of charged particle tracks in the high radiation environment close to the collision region. This capability is vital for the identification and measurement of proper decay times of long-lived particles such as b-hadrons, and thus vital for the ATLAS physics program. The detector provides hermetic coverage with three cylindrical layers and three layers of forward and backward pixel detectors. It consists of approximately 80 million pixels that are individually read out via chips bump-bonded to 1744 n-in-n silicon substrates. In this talk, results from the successful operation of the Pixel Detector at the LHC and its status after three years of operation will be presented, including monitoring, calibration procedures, timing optimization and detector performance. The detector performance is excellent: ~96 % of the pixels are operational, noise occupancy and hit ...

  20. Testing and Integration of the Service Cylinders for the CMS Phase 1 pixel detector

    CERN Document Server

    Ngadiuba, Jennifer

    2016-01-01

    The present 3-layer CMS pixel detector will be replaced with a new 4-layer pixel system, referred to as Phase~1 upgrade, during the LHC extended technical stop in winter 2016/2017. The upgraded detector will allow to maintain the excellent tracking performance of CMS at the upcoming higher luminosity conditions at the LHC. The addition of an extra layer, closer to the beam pipe, demands a complete redesign of its services. The barrel pixel detector is attached to four half cylinders which carry the services along the beam pipe, accommodate the cooling lines and house the electronics for detector readout and control. The service cylinders are a complex system in design as well as in production due to the large number of channels and tight space requirements. In this document we present the design of the system and discuss the construction and testing of the service cylinders for the barrel pixel detector. Furthermore, we present results of the testing and calibrations carried out with a set of new digital dete...

  1. Monolithic pixel development in TowerJazz 180 nm CMOS for the outer pixel layers in the ATLAS experiment

    Science.gov (United States)

    Berdalovic, I.; Bates, R.; Buttar, C.; Cardella, R.; Egidos Plaja, N.; Hemperek, T.; Hiti, B.; van Hoorne, J. W.; Kugathasan, T.; Mandic, I.; Maneuski, D.; Marin Tobon, C. A.; Moustakas, K.; Musa, L.; Pernegger, H.; Riedler, P.; Riegel, C.; Schaefer, D.; Schioppa, E. J.; Sharma, A.; Snoeys, W.; Solans Sanchez, C.; Wang, T.; Wermes, N.

    2018-01-01

    The upgrade of the ATLAS tracking detector (ITk) for the High-Luminosity Large Hadron Collider at CERN requires the development of novel radiation hard silicon sensor technologies. Latest developments in CMOS sensor processing offer the possibility of combining high-resistivity substrates with on-chip high-voltage biasing to achieve a large depleted active sensor volume. We have characterised depleted monolithic active pixel sensors (DMAPS), which were produced in a novel modified imaging process implemented in the TowerJazz 180 nm CMOS process in the framework of the monolithic sensor development for the ALICE experiment. Sensors fabricated in this modified process feature full depletion of the sensitive layer, a sensor capacitance of only a few fF and radiation tolerance up to 1015 neq/cm2. This paper summarises the measurements of charge collection properties in beam tests and in the laboratory using radioactive sources and edge TCT. The results of these measurements show significantly improved radiation hardness obtained for sensors manufactured using the modified process. This has opened the way to the design of two large scale demonstrators for the ATLAS ITk. To achieve a design compatible with the requirements of the outer pixel layers of the tracker, a charge sensitive front-end taking 500 nA from a 1.8 V supply is combined with a fast digital readout architecture. The low-power front-end with a 25 ns time resolution exploits the low sensor capacitance to reduce noise and analogue power, while the implemented readout architectures minimise power by reducing the digital activity.

  2. Silicon pixel-detector R&D for CLIC

    CERN Document Server

    AUTHOR|(SzGeCERN)718101

    2016-01-01

    The physics aims at the future CLIC high-energy linear e+e- collider set very high precision requirements on the performance of the vertex and tracking detectors. Moreover, these detectors have to be well adapted to the experimental conditions, such as the time structure of the collisions and the presence of beam-induced backgrounds. The principal challenges are: a point resolution of a few μm, ultra-low mass (∼ 0.2% X${}_0$ per layer for the vertex region and ∼ 1 % X${}_0$ per layer for the outer tracker), very low power dissipation (compatible with air-flow cooling in the inner vertex region) and pulsed power operation, complemented with ∼ 10 ns time stamping capabilities. A highly granular all-silicon vertex and tracking detector system is under development, following an integrated approach addressing simultaneously the physics requirements and engineering constraints. For the vertex-detector region, hybrid pixel detectors with small pitch (25 μm) and analog readout are explored. For the outer trac...

  3. The data handling processor of the Belle II DEPFET detector

    Energy Technology Data Exchange (ETDEWEB)

    Germic, Leonard; Hemperek, Tomasz; Kishishita, Tetsuichi; Paschen, Botho; Luetticke, Florian; Krueger, Hans; Marinas, Carlos; Wermes, Norbert [Universitaet Bonn (Germany); Collaboration: Belle II-Collaboration

    2016-07-01

    A two layer highly granular DEPFET pixel detector will be operated as the innermost subsystem of the Belle II experiment, at the new Japanese super flavor factory (SuperKEKB). Such a finely segmented system will allow to improve the vertex reconstruction in such ultra high luminosity environment but, at the same time, the raw data stream generated by the 8 million pixel detector will exceed the capability of real-time processing due to its high frame rate, considering the limited material budged and strict space constrains. For this reason a new ASIC, the Data Handling Processor (DHP) is designed to provide data processing at the level of the front-end electronics, such as zero-suppression and common mode correction. Additional feature of the Data Handling Processor is the control block, providing control signals for the on-module ASICs used in the pixel detector. In this contribution, the description of the latest chip revision in TSMC 65 nm technology together with the latest test results of the interface functionality tests are presented.

  4. FELIX: a high-throughput network approach for interfacing to front end electronics for ATLAS upgrades

    NARCIS (Netherlands)

    Anderson, J.; Borga, A.; Boterenbrood, H.; Chen, H.; Chen, K.; Drake, G.; Francis, D.; Gorini, B.; Lanni, F.; Lehmann Miotto, G.; Levinson, L.; Narevicius, J.; Plessl, C.; Roich, A.; Ryu, S.; Schreuder, F.; Schumacher, J.; Vandelli, W.; Vermeulen, J.; Zhang, J.

    2015-01-01

    The ATLAS experiment at CERN is planning full deployment of a new unified optical link technology for connecting detector front end electronics on the timescale of the LHC Run 4 (2025). It is estimated that roughly 8000 GBT (GigaBit Transceiver) links, with transfer rates up to 10.24 Gbps, will

  5. Operating characteristics of radiation-hardened silicon pixel detectors for the CMS experiment

    CERN Document Server

    Hyosung, Cho

    2002-01-01

    The Compact Muon Solenoid (CMS) experiment at the CERN Large Hadron Collider (LHC) will have forward silicon pixel detectors as its innermost tracking device. The pixel devices will be exposed to the harsh radiation environment of the LHC. Prototype silicon pixel detectors have been designed to meet the specification of the CMS experiment. No guard ring is required on the n/sup +/ side, and guard rings on the p/sup +/ side are always kept active before and after type inversion. The whole n/sup +/ side is grounded and connected to readout chips, which greatly simplifies detector assembling and improves the stability of bump-bonded readout chips on the n/sup +/ side. Operating characteristics such as the leakage current, the full depletion voltage, and the potential distributions over guard rings were tested using standard techniques. The tests are discussed in this paper. (9 refs).

  6. A review of advances in pixel detectors for experiments with high rate and radiation

    Science.gov (United States)

    Garcia-Sciveres, Maurice; Wermes, Norbert

    2018-06-01

    The large Hadron collider (LHC) experiments ATLAS and CMS have established hybrid pixel detectors as the instrument of choice for particle tracking and vertexing in high rate and radiation environments, as they operate close to the LHC interaction points. With the high luminosity-LHC upgrade now in sight, for which the tracking detectors will be completely replaced, new generations of pixel detectors are being devised. They have to address enormous challenges in terms of data throughput and radiation levels, ionizing and non-ionizing, that harm the sensing and readout parts of pixel detectors alike. Advances in microelectronics and microprocessing technologies now enable large scale detector designs with unprecedented performance in measurement precision (space and time), radiation hard sensors and readout chips, hybridization techniques, lightweight supports, and fully monolithic approaches to meet these challenges. This paper reviews the world-wide effort on these developments.

  7. Analysis of test beam data of ALPIDE, the final Monolithic Active Pixel Sensor (MAPS) prototype for the ALICE ITS upgrade

    CERN Document Server

    Emriskova, Natalia

    2017-01-01

    The ALICE collaboration is currently preparing a major upgrade of its apparatus, planned for installation during the second long shutdown of the Large Hadron Collider in 2019-20. The main pillar of the upgrade is the replacement of the current Inner Tracking System (ITS) with a new, low-material, high resolution silicon pixel detector, made of Monolithic Active Pixel Sensors (MAPS). This technology, combining front-end circuitry and sensitive layer in a single device, will lead to a higher granularity of the detector and therefore a better pointing resolution. The silicon pixel chips, called ALPIDEs, developed specifically for the new ITS, are currently characterized using test beams. A part of this characterization is presented in this work. The project involves the very first analysis of test beam data with inclined tracks. The tested ALPIDE is rotated with respect to the beam, hence the particles cross the chip with an inclined incidence angle. The influence of these rotations on the efficiency profile...

  8. ATLAS-TPX: a two-layer pixel detector setup for neutron detection and radiation field characterization

    International Nuclear Information System (INIS)

    Bergmann, B.; Caicedo, I.; Pospisil, S.; Vykydal, Z.; Leroy, C.

    2016-01-01

    A two-layer pixel detector setup (ATLAS-TPX), designed for thermal and fast neutron detection and radiation field characterization is presented. It consists of two segmented silicon detectors (256 × 256 pixels, pixel pitch 55 μm, thicknesses 300 μm and 500 μm) facing each other. To enhance the neutron detection efficiency a set of converter layers is inserted in between these detectors. The pixelation and the two-layer design allow a discrimination of neutrons against γs by pattern recognition and against charged particles by using the coincidence and anticoincidence information. The neutron conversion and detection efficiencies are measured in a thermal neutron field and fast neutron fields with energies up to 600 MeV. A Geant4 simulation model is presented, which is validated against the measured detector responses. The reliability of the coincidence and anticoincidence technique is demonstrated and possible applications of the detector setup are briefly outlined.

  9. Performance of Front-End Readout System for PHENIX RICH

    International Nuclear Information System (INIS)

    Oyama, K.; Hamagaki, H.; Nishimura, S.; Shigaki, K.; Hayano, R.S.; Hibino, M.; Kametani, S.; Kikuchi, J.; Matsumoto, T.; Sakaguchi, T.; Ebisu, K.; Hara, H.; Tanaka, Y.; Ushiroda, T.; Moscone, C.G.; Wintenberg, A.L.; Young, G.R.

    1999-01-01

    A front-end electronics system has been developed for the Ring Imaging Cerenkov (RICH) detector of the PHENIX experiment at the Relativistic Heavy Ion Collider (RHIC), Brookhaven National Laboratory (BNL). A high speed custom back-plane with source synchronous bus architecture, a full custom analog ASIC, and board modules with FPGA's and CPLD's were developed for high performance real time data acquisition. The transfer rate of the back-lane has reached 640 MB/s with 128 bits data bus. Total transaction time is estimated to be less than 30 micros per event. The design specifications and test results of the system are presented in this paper

  10. Managing Controversies in the Fuzzy Front End

    DEFF Research Database (Denmark)

    Christiansen, John K.; Gasparin, Marta

    2016-01-01

    This research investigates the controversies that emerge in the fuzzy front end (FFE) and how they are closed so the innovation process can move on. The fuzzy front has been characterized in the literature as a very critical phase, but controversies in the FFE have not been studied before....... The analysis investigates the microprocesses around the controversies that emerge during the fuzzy front end of four products. Five different types of controversies are identified: profit, production, design, brand and customers/market. Each controversy represents a threat, but also an opportunity to search...

  11. The Gigatracker: An ultra-fast and low-mass silicon pixel detector for the NA62 experiment

    International Nuclear Information System (INIS)

    Fiorini, M.; Carassiti, V.; Ceccucci, A.; Cortina, E.; Cotta Ramusino, A.; Dellacasa, G.; Garbolino, S.; Jarron, P.; Kaplon, J.; Kluge, A.; Mapelli, A.; Marchetto, F.; Martin, E.; Martoiu, S.; Mazza, G.; Morel, M.; Noy, M.; Nuessle, G.; Petrucci, F.; Riedler, P.

    2011-01-01

    The Gigatracker is a hybrid silicon pixel detector developed to track the highly intense NA62 hadron beam with a time resolution of 150 ps (rms). The beam spectrometer of the experiment is composed of three Gigatracker stations installed in vacuum in order to precisely measure momentum, time and direction of every traversing particle. Precise tracking demands a very low mass of the detector assembly ( 0 per station) in order to limit multiple scattering and beam hadronic interactions. The high rate and especially the high timing precision requirements are very demanding: two R and D options are ongoing and the corresponding prototype read-out chips have been recently designed and produced in 0.13μm CMOS technology. One solution makes use of a constant fraction discriminator and on-pixel analogue-based time-to-digital-converter (TDC); the other comprises a delay-locked loop based TDC placed at the end of each pixel column and a time-over-threshold discriminator with time-walk correction technique. The current status of the R and D program is overviewed and results from the prototype read-out chips test are presented.

  12. New pixelized Micromegas detector with low discharge rate for the COMPASS experiment

    CERN Document Server

    Neyret, D.; Anfreville, M.; Bedfer, Y.; Burtin, E.; Coquelet, C.; d'Hose, N.; Desforge, D.; Giganon, A.; Jourde, D.; Kunne, F.; Magnon, A.; Makke, N.; Marchand, C.; Paul, B.; Platchkov, S.; Thibaud, F.; Usseglio, M.; Vandenbroucke, M.

    2012-01-01

    New Micromegas (Micro-mesh gaseous detectors) are being developed in view of the future physics projects planned by the COMPASS collaboration at CERN. Several major upgrades compared to present detectors are being studied: detectors standing five times higher luminosity with hadron beams, detection of beam particles (flux up to a few hundred of kHz/mm^{2}, 10 times larger than for the present Micromegas detectors) with pixelized read-out in the central part, light and integrated electronics, and improved robustness. Two solutions of reduction of discharge impact have been studied, with Micromegas detectors using resistive layers and using an additional GEM foil. Performance of such detectors has also been measured. A large size prototypes with nominal active area and pixelized read-out has been produced and installed at COMPASS in 2010. In 2011 prototypes featuring an additional GEM foil, as well as an resistive prototype, are installed at COMPASS and preliminary results from those detectors presented very go...

  13. Application-specific architectures of CMOS monolithic active pixel sensors

    Energy Technology Data Exchange (ETDEWEB)

    Szelezniak, Michal [Institute de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France)]. E-mail: michal.szelezniak@ires.in2p3.fr; Besson, Auguste [Institute de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France); Claus, Gilles; Colledani, Claude; [Institute de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France); Degerli, Yavuz [CEA Saclay, DAPNIA, Gif-sur-Yvette Cedex (France); Deptuch, Grzegorz [Institute de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France); Deveaux, Michael [Institute de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France); GSI, Planckstrasse 1, Darmstadt 64291 (Germany); Dorokhov, Andrei [Institute de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France); Dulinski, Wojciech [Institute de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France); Fourches, Nicolas [CEA Saclay, DAPNIA, Gif-sur-Yvette Cedex (France); Goffe, Mathieu [Institute de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France); Grandjean, Damien; Guilloux, Fabrice [Institute de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France); Heini, Sebastien [Institute de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France)]|[GSI, Planckstrasse 1, Darmstadt 64291 (Germany); Himmi, Abdelkader [Institute de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France); Hu, Christine [Institute de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France); Jaaskelainen, Kimmo; Li, Yan; Lutz, Pierre; Orsini, Fabienne [CEA Saclay, DAPNIA, Gif-sur-Yvette Cedex (France); Pellicioli, Michel; Shabetai, Alexandre; Valin, Isabelle; Winter, Marc [Institute de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France)

    2006-11-30

    Several development directions intended to adapt and optimize monolithic active pixel sensors for specific applications are presented in this work. The first example, compatible with the STAR microvertex upgrade, is based on a simple two-transistor pixel circuitry. It is suited for a long integration time, room-temperature operation and minimum power dissipation. In another approach for this application, a specific readout method is proposed, allowing optimization of the integration time independently of the full frame-readout time. The circuit consists of an in-pixel front-end voltage amplifier, with a gain on the order of five, followed by two analog memory cells. The extended version of this scheme, based on the implementation of more memory cells per pixel, is the solution considered for the outer layers of a microvertex detector at the international linear collider. For the two innermost layers, a circuit allowing fast frame scans together with on-line, on-chip data sparsification is proposed. The first results of this prototype demonstrate that the fixed pattern dispersion is reduced below a noise level of 15 e{sup -}, allowing the use of a single comparator or a low-resolution ADC per pixel column. A common element for most of the mentioned readout schemes is a low-noise, low power consumption, layout efficient in-pixel amplifier. A review of possible solutions for this element together with some experimental results is presented.

  14. Development of the control system of the ALICE Transition Radiation Detector and of a test environment for quality-assurance of its front-end electronics

    CERN Document Server

    Mercado Pérez, Jorge

    2008-01-01

    Within this thesis, the detector control system (DCS) for the Transition Radiation Detector (TRD) of the ALICE experiment at the Large Hadron Collider has been developed. The TRD DCS is fully implemented as a detector oriented hierarchy of objects behaving as finite state machines. It controls and monitors over 65 thousand front-end electronics (FEE) units, a few hundred low voltage and one thousand high voltage channels, and other sub-systems such as cooling and gas. Commissioning of the TRD DCS took place during several runs with ALICE using cosmic events. Another part of this thesis describes the development of a test environment for large-scale production quality-assurance of over 4 thousand FEE read-out boards containing in total about 1.2 million read-out channels. The hardware and software components are described in detail. Additionally, a series of performance studies were carried out earlier including radiation tolerance tests of the TRAP chip which is the core component of the TRD FEE.

  15. Development of the control system of the ALICE transition radiation detector and of a test environment for quality-assurance of its front-end electronics

    International Nuclear Information System (INIS)

    Mercado Perez, Jorge

    2008-01-01

    Within this thesis, the detector control system (DCS) for the Transition Radiation Detector (TRD) of the ALICE experiment at the Large Hadron Collider has been developed. The TRD DCS is fully implemented as a detector oriented hierarchy of objects behaving as finite state machines. It controls and monitors over 65 thousand front-end electronics (FEE) units, a few hundred low voltage and one thousand high voltage channels, and other sub-systems such as cooling and gas. Commissioning of the TRD DCS took place during several runs with ALICE using cosmic events. Another part of this thesis describes the development of a test environment for large-scale production quality-assurance of over 4 thousand FEE read-out boards containing in total about 1.2 million read-out channels. The hardware and software components are described in detail. Additionally, a series of performance studies were carried out earlier including radiation tolerance tests of the TRAP chip which is the core component of the TRD FEE. (orig.)

  16. Development of the control system of the ALICE transition radiation detector and of a test environment for quality-assurance of its front-end electronics

    Energy Technology Data Exchange (ETDEWEB)

    Mercado Perez, Jorge

    2008-11-10

    Within this thesis, the detector control system (DCS) for the Transition Radiation Detector (TRD) of the ALICE experiment at the Large Hadron Collider has been developed. The TRD DCS is fully implemented as a detector oriented hierarchy of objects behaving as finite state machines. It controls and monitors over 65 thousand front-end electronics (FEE) units, a few hundred low voltage and one thousand high voltage channels, and other sub-systems such as cooling and gas. Commissioning of the TRD DCS took place during several runs with ALICE using cosmic events. Another part of this thesis describes the development of a test environment for large-scale production quality-assurance of over 4 thousand FEE read-out boards containing in total about 1.2 million read-out channels. The hardware and software components are described in detail. Additionally, a series of performance studies were carried out earlier including radiation tolerance tests of the TRAP chip which is the core component of the TRD FEE. (orig.)

  17. Development of the ATLAS FE-I4 pixel readout IC for b-layer Upgrade and Super-LHC

    CERN Document Server

    Karagounis, M

    2008-01-01

    Motivated by the upcoming upgrade of the ATLAS hybrid pixel detector, a new Front-End (FE) IC is being developed in a 130nm technology to face the tightened requirements of the upgraded pixel system. The main design goals are the reduction of material and a decrease in power consumption combined with the capability to handle the higher hit rates that will result from the upgraded machine. New technology features like the higher integration density for digital circuits, better radiation tolerance and Triple-Well transistors are used for optimization and the implementation of new concepts. A description of the ongoing design work is given, focusing more on the analog part and peripheral design blocks.

  18. CdTe hybrid pixel detector for imaging with thermal neutrons

    Czech Academy of Sciences Publication Activity Database

    Jakůbek, J.; Mettivier, G.; Montesi, M.C.; Pospíšil, S.; Russo, P.; Vacík, Jiří

    2006-01-01

    Roč. 563, č. 1 (2006), s. 238-241 ISSN 0168-9002 R&D Pro jects: GA MŠk 1P04LA211 Institutional research plan: CEZ:AV0Z10480505 Keywords : neutronography * pixel detector * semiconductor detector Subject RIV: BG - Nuclear, Atomic and Molecular Physics, Colliders Impact factor: 1.185, year: 2006

  19. Studies on MCM-D pixel-detector-modules

    CERN Document Server

    Flick, T; Gerlach, P; Grah, C; Mättig, P; Rohe, T

    2003-01-01

    In the context of the development of the ATLAS-pixel-detector, a technology for building up the high density interconnects has been studied, the MCM-D (multichip module deposited) technology. Results of building up first assemblies have been reported. MCM-D technology allows to build up assemblies with uniformly segmented sensors. Especially the use of 'equal-sized(-bricked)' sensor geometry has been studied.

  20. The CMS Pixel Detector Upgrade and R\\&D for the High Luminosity LHC

    CERN Document Server

    Viliani, Lorenzo

    2017-01-01

    The High Luminosity Large Hadron Collider (HL-LHC) at CERN is expected to collide protons at a centre-of-mass energy of 14\\,TeV and to reach an unprecedented peak instantaneous luminosity of $5 \\times 10^{34}\\,{\\rm cm}^{-2} {\\rm s}^{-1}$ with an average number of pileup events of 140. This will allow the ATLAS and CMS experiments to collect integrated luminosities of up to $3000\\,{\\rm fb}^{-1}$ during the project lifetime. To cope with this extreme scenario the CMS detector will be substantially upgraded before starting the HL-LHC, a plan known as CMS Phase-2 Upgrade. In the upgrade the entire CMS silicon pixel detector will be replaced and the new detector will feature increased radiation hardness, higher granularity and capability to handle higher data rate and longer trigger latency. In this report the Phase-2 Upgrade of the CMS silicon pixel detector will be reviewed, focusing on the features of the detector layout and on the development of new pixel devices.