Design and Performance of the CMS Pixel Detector Readout Chip

CERN Document Server

Kästli, H C; Erdmann, W; Hörmann, C; Horisberger, R P; Kotlinski, D; Meier, B; Hoermann, Ch.

2006-01-01

The readout chip for the CMS pixel detector has to deal with an enormous data rate. On-chip zero suppression is inevitable and hit data must be buffered locally during the latency of the first level trigger. Dead-time must be kept at a minimum. It is dominated by contributions coming from the readout. To keep it low an analog readout scheme has been adopted where pixel addresses are analog coded. We present the architecture of the final CMS pixel detector readout chip with special emphasis on the analog readout chain. Measurements of its performance are discussed.

Performance of a Fast Binary Readout CMOS Active Pixel Sensor Chip Designed for Charged Particle Detection

Science.gov (United States)

Deerli, Yavuz; Besanon, Marc; Besson, Auguste; Claus, Gilles; Deptuch, Grzegorz; Dulinski, Wojciech; Fourches, Nicolas; Goffe, Mathieu; Himmi, Abdelkader; Li, Yan; Lutz, Pierre; Orsini, Fabienne; Szelezniak, Michal

2006-12-01

We report on the performance of the MIMOSA8 (HiMAPS1) chip. The chip is a 128times32 pixels array where 24 columns have discriminated binary outputs and eight columns analog test outputs. Offset correction techniques are used extensively in this chip to overcome process related mismatches. The array is divided in four blocks of pixels with different conversion factors and is controlled by a serially programmable sequencer. MIMOSA8 is a representative of the CMOS sensors development option considered as a promising candidate for the Vertex Detector of the future International Linear Collider (ILC). The readout technique, implemented on the chip, combines high spatial resolution capabilities with high processing readout speed. Data acquisition, providing control of the chip and signal buffering and linked to a VME system, was made on the eight analog outputs. Analog data, without and with a 55Fe X-ray source, were acquired and processed using off-line analysis software. From the reconstruction of pixel clusters, built around a central pixel, we deduce that the charge spread is limited to the closest 25 pixels and almost all the available charge is collected. The position of the total charge collection peak (and subsequently the charge-to-voltage conversion factor) stays unaffected when the clock frequency is increased even up to 150 MHz (13.6 mus readout time per frame). The discriminators, placed in the readout chain, have proved to be fully functional. Beam tests have been made with high energy electrons at DESY (Germany) to study detection efficiency. The results prove that MIMOSA8 is the first and fastest successful monolithic active pixel sensor with on-chip signal discrimination for detection of MIPs

First operation of a hybrid photon detector prototype with electrostatic cross-focussing and integrated silicon pixel readout

International Nuclear Information System (INIS)

Alemi, M.; Campbell, M.; Gys, T.; Mikulec, B.; Piedigrossi, D.; Puertolas, D.; Rosso, E.; Schomaker, R.; Snoeys, W.; Wyllie, K.

2000-01-01

We report on the first operation of a hybrid photon detector prototype with integrated silicon pixel readout for the ring imaging Cherenkov detectors of the LHCb experiment. The photon detector is based on a cross-focussed image intensifier tube geometry where the image is de-magnified by a factor of 4. The anode consists of a silicon pixel array, bump-bonded to a binary readout chip with matching pixel electronics. The prototype has been characterized using a low-intensity light-emitting diode operated in pulsed mode. Its performance in terms of single-photoelectron detection efficiency and imaging properties is presented. A model of photoelectron detection is proposed, and is shown to be in good agreement with the experimental data. It includes an estimate of the charge signal generated in the silicon detector, and the combined effects of the comparator threshold spread of the pixel readout chip, charge sharing at the pixel boundaries and back-scattering of the photoelectrons at the silicon detector surface

First operation of a hybrid photon detector prototype with electrostatic cross-focussing and integrated silicon pixel readout

Energy Technology Data Exchange (ETDEWEB)

Alemi, M.; Campbell, M.; Gys, T. E-mail: thierry.gys@cern.ch; Mikulec, B.; Piedigrossi, D.; Puertolas, D.; Rosso, E.; Schomaker, R.; Snoeys, W.; Wyllie, K

2000-07-11

We report on the first operation of a hybrid photon detector prototype with integrated silicon pixel readout for the ring imaging Cherenkov detectors of the LHCb experiment. The photon detector is based on a cross-focussed image intensifier tube geometry where the image is de-magnified by a factor of 4. The anode consists of a silicon pixel array, bump-bonded to a binary readout chip with matching pixel electronics. The prototype has been characterized using a low-intensity light-emitting diode operated in pulsed mode. Its performance in terms of single-photoelectron detection efficiency and imaging properties is presented. A model of photoelectron detection is proposed, and is shown to be in good agreement with the experimental data. It includes an estimate of the charge signal generated in the silicon detector, and the combined effects of the comparator threshold spread of the pixel readout chip, charge sharing at the pixel boundaries and back-scattering of the photoelectrons at the silicon detector surface.

Development of readout system for FE-I4 pixel module using SiTCP

Energy Technology Data Exchange (ETDEWEB)

Teoh, J.J., E-mail: jjteoh@champ.hep.sci.osaka-u.ac.jp [Graduate School of Science, Osaka University, 1-1 Machikaneyama, Toyonaka, Osaka, 560-0043 (Japan); Hanagaki, K. [Graduate School of Science, Osaka University, 1-1 Machikaneyama, Toyonaka, Osaka, 560-0043 (Japan); Ikegami, Y.; Takubo, Y.; Terada, S.; Unno, Y. [Institute for Particle and Nuclear Studies, High Energy Accelerator Research Organization (KEK), 1-1 Oho, Tsukuba City, Ibaraki-ken 305-0801 (Japan)

2013-12-11

The ATLAS pixel detector will be replaced in the future High Luminosity-Large Hadron Collider (HL-LHC) upgrade to preserve or improve the detector performance at high luminosity environment. To meet the tight requirements of the upgrade, a new pixel Front-End (FE) Integrated Circuit (IC) called FE-I4 has been developed. We have then devised a readout system for the new FE IC. Our system incorporates Silicon Transmission Control Protocol (SiTCP) technology (Uchida, 2008 [1]) which utilizes the standard TCP/IP and UDP communication protocols. This technology allows direct data access and transfer between a readout hardware chain and PC via a high speed Ethernet. In addition, the communication protocols are small enough to be implemented in a single Field-Programable Gate Array (FPGA). Relying on this technology, we have been able to construct a very compact, versatile and fast readout system. We have developed a firmware and software together with the readout hardware chain. We also have established basic functionalities for reading out FE-I4.

Amorphous silicon pixel radiation detectors and associated thin film transistor electronics readout

International Nuclear Information System (INIS)

Perez-Mendez, V.; Drewery, J.; Hong, W.S.; Jing, T.; Kaplan, S.N.; Lee, H.; Mireshghi, A.

1994-10-01

We describe the characteristics of thin (1 μm) and thick (>30 μm) hydrogenated amorphous silicon p-i-n diodes which are optimized for detecting and recording the spatial distribution of charged particles, x-rays and γ rays. For x-ray, γ ray, and charged particle detection we can use thin p-i-n photosensitive diode arrays coupled to evaporated layers of suitable scintillators. For direct detection of charged particles with high resistance to radiation damage, we use the thick p-i-n diode arrays. Deposition techniques using helium dilution, which produce samples with low stress are described. Pixel arrays for flux exposures can be readout by transistor, single diode or two diode switches. Polysilicon charge sensitive pixel amplifiers for single event detection are described. Various applications in nuclear, particle physics, x-ray medical imaging, neutron crystallography, and radionuclide chromatography are discussed

Common Bias Readout for TES Array on Scanning Transmission Electron Microscope

Science.gov (United States)

Yamamoto, R.; Sakai, K.; Maehisa, K.; Nagayoshi, K.; Hayashi, T.; Muramatsu, H.; Nakashima, Y.; Mitsuda, K.; Yamasaki, N. Y.; Takei, Y.; Hidaka, M.; Nagasawa, S.; Maehata, K.; Hara, T.

2016-07-01

A transition edge sensor (TES) microcalorimeter array as an X-ray sensor for a scanning transmission electron microscope system is being developed. The technical challenge of this system is a high count rate of ˜ 5000 counts/second/array. We adopted a 64 pixel array with a parallel readout. Common SQUID bias, and common TES bias are planned to reduce the number of wires and the resources of a room temperature circuit. The reduction rate of wires is 44 % when a 64 pixel array is read out by a common bias of 8 channels. The possible degradation of the energy resolution has been investigated by simulations and experiments. The bias fluctuation effects of a series connection are less than those of a parallel connection. Simple calculations expect that the fluctuations of the common SQUID bias and common TES bias in a series connection are 10^{-7} and 10^{-3}, respectively. We constructed 8 SQUIDs which are connected to 8 TES outputs and a room temperature circuit for common bias readout and evaluated experimentally. Our simulation of crosstalk indicates that at an X-ray event rate of 500 cps/pixel, crosstalk will broaden a monochromatic line by about 0.01 %, or about 1.5 eV at 15 keV. Thus, our design goal of 10 eV energy resolution across the 0.5-15 keV band should be achievable.

A compact readout system for multi-pixel hybrid photodiodes

International Nuclear Information System (INIS)

Datema, C.P.; Meng, L.J.; Ramsden, D.

1999-01-01

Although the first Multi-pixel Hybrid Photodiode (M-HPD) was developed in the early 1990s by Delft Electronic Products, the main obstacle to its application has been the lack of availability of a compact read-out system. A fast, parallel readout system has been constructed for use with the earlier 25-pixel tube with High-energy Physics applications in mind. The excellent properties of the recently developed multi-pixel hybrid photodiodes (M-HPD) will be easier to exploit following the development of the new hybrid read-out circuits described in this paper. This system will enable all of the required read-out functions to be accommodate on a single board into which the M-HPD is plugged. The design and performance of a versatile system is described in which a trigger-signal, derived from the common-side of the silicon anode in the M-HPD, is used to trigger the readout of the 60-anode pixels in the M-HPD. The multi-channel amplifier section is based on the use of a new, commercial VLSI chip, whilst the read-out sequencer uses a chip of its own design. The common anode signal is processed by a fast amplifier and discriminator to provide a trigger signal when a single event is detected. In the prototype version, the serial analogue output data-stream is processed using a PC-mounted, high speed ADC. Results obtained using the new read-out system in a compact gamma-camera and with a small muon tracking-chamber demonstrate the low-noise performance of the system. The application of this read-out system in other position-sensitive or multi-anode photomultiplier tube applications are also described

Status of the digital pixel array detector for protein crystallography

CERN Document Server

Datte, P; Beuville, E; Endres, N; Druillole, F; Luo, L; Millaud, J E; Xuong, N H

1999-01-01

A two-dimensional photon counting digital pixel array detector is being designed for static and time resolved protein crystallography. The room temperature detector will significantly enhance monochromatic and polychromatic protein crystallographic through-put data rates by more than three orders of magnitude. The detector has an almost infinite photon counting dynamic range and exhibits superior spatial resolution when compared to present crystallographic phosphor imaging plates or phosphor coupled CCD detectors. The detector is a high resistivity N-type Si with a pixel pitch of 150x150 mu m, and a thickness of 300 mu m, and is bump bonded to an application specific integrated circuit. The event driven readout of the detector is based on the column architecture and allows an independent pixel hit rate above 1 million photons/s/pixel. The device provides energy discrimination and sparse data readout which yields minimal dead-time. This type of architecture allows a continuous (frameless) data acquisition, a f...

High-resolution photon spectroscopy with a microwave-multiplexed 4-pixel transition edge sensor array

Science.gov (United States)

Guss, Paul; Rabin, Michael; Croce, Mark; Hoteling, Nathan; Schwellenbach, David; Kruschwitz, Craig; Mocko, Veronika; Mukhopadhyay, Sanjoy

2017-09-01

We demonstrate very high-resolution photon spectroscopy with a microwave-multiplexed 4-pixel transition edge sensor (TES) array. The readout circuit consists of superconducting microwave resonators coupled to radio frequency superconducting-quantum-interference devices (RF-SQUIDs) and transduces changes in input current to changes in phase of a microwave signal. We used a flux-ramp modulation to linearize the response and avoid low-frequency noise. The result is a very high-resolution photon spectroscopy with a microwave-multiplexed 4-pixel transition edge sensor array. We performed and validated a small-scale demonstration and test of all the components of our concept system, which encompassed microcalorimetry, microwave multiplexing, RF-SQUIDs, and software-defined radio (SDR). We shall display data we acquired in the first simultaneous combination of all key innovations in a 4-pixel demonstration, including microcalorimetry, microwave multiplexing, RF-SQUIDs, and SDR. We present the energy spectrum of a gadolinium-153 (153Gd) source we measured using our 4-pixel TES array and the RF-SQUID multiplexer. For each pixel, one can observe the two 97.4 and 103.2 keV photopeaks. We measured the 153Gd photon source with an achieved energy resolution of 70 eV, full width half maximum (FWHM) at 100 keV, and an equivalent readout system noise of 90 pA/pHz at the TES. This demonstration establishes a path for the readout of cryogenic x-ray and gamma ray sensor arrays with more elements and spectral resolving powers. We believe this project has improved capabilities and substantively advanced the science useful for missions such as nuclear forensics, emergency response, and treaty verification through the explored TES developments.

Evaluation of 320x240 pixel LEC GaAs Schottky barrier X-ray imaging arrays, hybridized to CMOS readout circuit based on charge integration

CERN Document Server

Irsigler, R; Alverbro, J; Borglind, J; Froejdh, C; Helander, P; Manolopoulos, S; O'Shea, V; Smith, K

1999-01-01

320x240 pixels GaAs Schottky barrier detector arrays were fabricated, hybridized to silicon readout circuits, and subsequently evaluated. The detector chip was based on semi-insulating LEC GaAs material. The square shaped pixel detector elements were of the Schottky barrier type and had a pitch of 38 mu m. The GaAs wafers were thinned down prior to the fabrication of the ohmic back contact. After dicing, the chips were indium bump, flip-chip bonded to CMOS readout circuits based on charge integration, and finally evaluated. A bias voltage between 50 and 100 V was sufficient to operate the detector. Results on I-V characteristics, noise behaviour and response to X-ray radiation are presented. Images of various objects and slit patterns were acquired by using a standard dental imaging X-ray source. The work done was a part of the XIMAGE project financed by the European Community (Brite-Euram). (author)

A camac based data acquisition system for flat-panel image array readout

International Nuclear Information System (INIS)

Morton, E.J.; Antonuk, L.E.; Berry, J.E.; Huang, W.; Mody, P.; Yorkston, J.; Longo, M.J.

1993-01-01

A readout system has been developed to facilitate the digitization and subsequent display of image data from two-dimensional, pixellated, flat-panel, amorphous silicon imaging arrays. These arrays have been designed specifically for medical x-ray imaging applications. The readout system is based on hardware and software developed for various experiments at CERN and Fermi National Accelerator Laboratory. Additional analog signal processing and digital control electronics were constructed specifically for this application. The authors report on the form of the resulting data acquisition system, discuss aspects of its performance, and consider the compromises which were involved in its design

Development of pixel readout integrated circuits for extreme rate and radiation

CERN Multimedia

Liberali, V; Rizzi, A; Re, V; Minuti, M; Pangaud, P; Barbero, M B; Pacher, L; Kluit, R; Hinchliffe, I; Manghisoni, M; Giubilato, P; Faccio, F; Pernegger, H; Krueger, H; Gensolen, F D; Bilei, G M; Da rocha rolo, M D; Prydderch, M L; Fanucci, L; Grillo, A A; Bellazzini, R; Palomo pinto, F R; Michelis, S; Huegging, F G; Kishishita, T; Marchiori, G; Christian, D C; Kaestli, H C; Meier, B; Andreazza, A; Key-charriere, M; Linssen, L; Dannheim, D; Conti, E; Hemperek, T; Menouni, M; Fougeron, D; Genat, J; Bomben, M; Marzocca, C; Demaria, N; Mazza, G; Van bakel, N A; Palla, F; Grippo, M T; Magazzu, G; Ratti, L; Abbaneo, D; Crescioli, F; Deptuch, G W; Neue, G; De robertis, G; Passeri, D; Placidi, P; Gromov, V; Morsani, F; Paccagnella, A; Christiansen, J; Dho, E; Wermes, N; Rymaszewski, P; Rozanov, A; Wang, A; Lipton, R J; Havranek, M; Neviani, A; Marconi, S; Karagounis, M; Godiot, S; Calderini, G; Seidel, S C; Horisberger, R P; Garcia-sciveres, M A; Stabile, A; Beccherle, R; Bacchetta, N

The present hybrid pixel detectors in operation at the LHC represent a major achievement. They deployed a new technology on an unprecedented scale and their success firmly established pixel tracking as indispensable for future HEP experiments. However, extrapolation of hybrid pixel technology to the HL-LHC presents major challenges on several fronts. We propose a new RD collaboration specifically focused on the development of pixel readout Integrated Circuits (IC). The IC challenges include: smaller pixels to resolve tracks in boosted jets, much higher hit rates (1-2 GHz/cm$^{2}$), unprecedented radiation tolerance (10 MGy), much higher output bandwidth, and large IC format with low power consumption in order to instrument large areas while keeping the material budget low. We propose a collaboration to design the next generation of hybrid pixel readout chips to enable the ATLAS and CMS Phase 2 pixel upgrades. This does not imply that ATLAS and CMS must use the same exact pixel readout chip, as most of the dev...

An inverter-based capacitive trans-impedance amplifier readout with offset cancellation and temporal noise reduction for IR focal plane array

Science.gov (United States)

Chen, Hsin-Han; Hsieh, Chih-Cheng

2013-09-01

This paper presents a readout integrated circuit (ROIC) with inverter-based capacitive trans-impedance amplifier (CTIA) and pseudo-multiple sampling technique for infrared focal plane array (IRFPA). The proposed inverter-based CTIA with a coupling capacitor [1], executing auto-zeroing technique to cancel out the varied offset voltage from process variation, is used to substitute differential amplifier in conventional CTIA. The tunable detector bias is applied from a global external bias before exposure. This scheme not only retains stable detector bias voltage and signal injection efficiency, but also reduces the pixel area as well. Pseudo-multiple sampling technique [2] is adopted to reduce the temporal noise of readout circuit. The noise reduction performance is comparable to the conventional multiple sampling operation without need of longer readout time proportional to the number of samples. A CMOS image sensor chip with 55×65 pixel array has been fabricated in 0.18um CMOS technology. It achieves a 12um×12um pixel size, a frame rate of 72 fps, a power-per-pixel of 0.66uW/pixel, and a readout temporal noise of 1.06mVrms (16 times of pseudo-multiple sampling), respectively.

Progress on the design of a data push architecture for an array of optimized time tagging pixels

International Nuclear Information System (INIS)

Shapiro, S.; Cords, D.; Mani, S.; Holbrook, B.; Atlas, E.

1993-06-01

A pixel array has been proposed which features a completely data driven architecture. A pixel cell has been designed that has been optimized for this readout. It retains the features of preceding designs which allow low noise operation, time stamping, analog signal processing, XY address recording, ghost elimination and sparse data transmission. The pixel design eliminates a number of problems inherent in previous designs, by the use of sampled data techniques, destructive readout, and current mode output drivers. This architecture and pixel design is directed at applications such as a forward spectrometer at the SSC, an e + e - B factory at SLAC, and fixed target experiments at FNAL

A 2D 4×4 Channel Readout ASIC for Pixelated CdTe Detectors for Medical Imaging Applications.

Science.gov (United States)

Macias-Montero, Jose-Gabriel; Sarraj, Maher; Chmeissani, Mokhtar; Martínez, Ricardo; Puigdengoles, Carles

2015-10-01

We present a 16-channel readout integrated circuit (ROIC) with nanosecond-resolution time to digital converter (TDC) for pixelated Cadmium Telluride (CdTe) gamma-ray detectors. The 4 × 4 pixel array ROIC is the proof of concept of the 10 × 10 pixel array readout ASIC for positron-emission tomography (PET) scanner, positron-emission mammography (PEM) scanner, and Compton gamma camera. The electronics of each individual pixel integrates an analog front-end with switchable gain, an analog to digital converter (ADC), configuration registers, and a 4-state digital controller. For every detected photon, the pixel electronics provides the energy deposited in the detector with 10-bit resolution, and a fast trigger signal for time stamp. The ASIC contains the 16-pixel matrix electronics, a digital controller, five global voltage references, a TDC, a temperature sensor, and a band-gap based current reference. The ASIC has been fabricated with TSMC 0.25 μ m mixed-signal CMOS technology and occupies an area of 5.3 mm × 6.8 mm. The TDC shows a resolution of 95.5 ps, a precision of 600 ps at full width half maximum (FWHM), and a power consumption of 130 μ W. In acquisition mode, the total power consumption of every pixel is 200 μ W. An equivalent noise charge (ENC) of 160 e - RMS at maximum gain and negative polarity conditions has been measured at room temperature.

Small-Scale Readout System Prototype for the STAR PIXEL Detector

International Nuclear Information System (INIS)

Szelezniak, Michal; Anderssen, Eric; Greiner, Leo; Matis, Howard; Ritter, Hans Georg; Stezelberger, Thorsten; Sun, Xiangming; Thomas, James; Vu, Chinh; Wieman, Howard

2008-01-01

Development and prototyping efforts directed towards construction of a new vertex detector for the STAR experiment at the RHIC accelerator at BNL are presented. This new detector will extend the physics range of STAR by allowing for precision measurements of yields and spectra of particles containing heavy quarks. The innermost central part of the new detector is a high resolution pixel-type detector (PIXEL). PIXEL requirements are discussed as well as a conceptual mechanical design, a sensor development path, and a detector readout architecture. Selected progress with sensor prototypes dedicated to the PIXEL detector is summarized and the approach chosen for the readout system architecture validated in tests of hardware prototypes is discussed

Optical readout in a multi-module system test for the ATLAS pixel detector

International Nuclear Information System (INIS)

Flick, Tobias; Becks, Karl-Heinz; Gerlach, Peter; Kersten, Susanne; Maettig, Peter; Nderitu Kirichu, Simon; Reeves, Kendall; Richter, Jennifer; Schultes, Joachim

2006-01-01

The innermost part of the ATLAS experiment at the LHC, CERN, will be a pixel detector, which is presently under construction. The command messages and the readout data of the detector are transmitted over an optical data path. The readout chain consists of many components which are produced at several locations around the world, and must work together in the pixel detector. To verify that these parts are working together as expected a system test has been built up. It consists of detector modules, optoboards, optical fibres, Back of Crate cards, Readout Drivers, and control computers. In this paper, the system test setup and the operation of the readout chain are described. Also, some results of tests using the final pixel detector readout chain are given

Hexagonal pixel detector with time encoded binary readout

International Nuclear Information System (INIS)

Hoedlmoser, H.; Varner, G.; Cooney, M.

2009-01-01

The University of Hawaii is developing continuous acquisition pixel (CAP) detectors for vertexing applications in lepton colliding experiments such as SuperBelle or ILC. In parallel to the investigation of different technology options such as MAPS or SOI, both analog and binary readout concepts have been tested. First results with a binary readout scheme in which the hit information is time encoded by means of a signal shifting mechanism have recently been published. This paper explains the hit reconstruction for such a binary detector with an emphasis on fake hit reconstruction probabilities in order to evaluate the rate capability in a high background environment such as the planned SuperB factory at KEK. The results show that the binary concept is at least comparable to any analog readout strategy if not better in terms of occupancy. Furthermore, we present a completely new binary readout strategy in which the pixel cells are arranged in a hexagonal grid allowing the use of three independent output directions to reduce reconstruction ambiguities. The new concept uses the same signal shifting mechanism for time encoding, however, in dedicated transfer lines on the periphery of the detector, which enables higher shifting frequencies. Detailed Monte Carlo simulations of full size pixel matrices including hit and BG generation, signal generation, and data reconstruction show that by means of multiple signal transfer lines on the periphery the pixel can be made smaller (higher resolution), the number of output channels and the data volume per triggered event can be reduced dramatically, fake hit reconstruction is lowered to a minimum and the resulting effective occupancies are less than 10 -4 . A prototype detector has been designed in the AMS 0.35μm Opto process and is currently under fabrication.

High-speed imaging at high x-ray energy: CdTe sensors coupled to charge-integrating pixel array detectors

Energy Technology Data Exchange (ETDEWEB)

Becker, Julian; Tate, Mark W.; Shanks, Katherine S.; Philipp, Hugh T.; Weiss, Joel T.; Purohit, Prafull [Laboratory of Atomic and Solid State Physics, Cornell University, Ithaca, NY 14853 (United States); Chamberlain, Darol [Cornell High Energy Synchrotron Source (CHESS), Cornell University, Ithaca, NY 14853 (United States); Gruner, Sol M., E-mail: smg26@cornell.edu [Laboratory of Atomic and Solid State Physics, Cornell University, Ithaca, NY 14853 (United States); Cornell High Energy Synchrotron Source (CHESS), Cornell University, Ithaca, NY 14853 (United States)

2016-07-27

Pixel Array Detectors (PADs) consist of an x-ray sensor layer bonded pixel-by-pixel to an underlying readout chip. This approach allows both the sensor and the custom pixel electronics to be tailored independently to best match the x-ray imaging requirements. Here we describe the hybridization of CdTe sensors to two different charge-integrating readout chips, the Keck PAD and the Mixed-Mode PAD (MM-PAD), both developed previously in our laboratory. The charge-integrating architecture of each of these PADs extends the instantaneous counting rate by many orders of magnitude beyond that obtainable with photon counting architectures. The Keck PAD chip consists of rapid, 8-frame, in-pixel storage elements with framing periods <150 ns. The second detector, the MM-PAD, has an extended dynamic range by utilizing an in-pixel overflow counter coupled with charge removal circuitry activated at each overflow. This allows the recording of signals from the single-photon level to tens of millions of x-rays/pixel/frame while framing at 1 kHz. Both detector chips consist of a 128×128 pixel array with (150 µm){sup 2} pixels.

A high efficiency readout architecture for a large matrix of pixels.

Science.gov (United States)

Gabrielli, A.; Giorgi, F.; Villa, M.

2010-07-01

In this work we present a fast readout architecture for silicon pixel matrix sensors that has been designed to sustain very high rates, above 1 MHz/mm2 for matrices greater than 80k pixels. This logic can be implemented within MAPS (Monolithic Active Pixel Sensors), a kind of high resolution sensor that integrates on the same bulk the sensor matrix and the CMOS logic for readout, but it can be exploited also with other technologies. The proposed architecture is based on three main concepts. First of all, the readout of the hits is performed by activating one column at a time; all the fired pixels on the active column are read, sparsified and reset in parallel in one clock cycle. This implies the use of global signals across the sensor matrix. The consequent reduction of metal interconnections improves the active area while maintaining a high granularity (down to a pixel pitch of 40 μm). Secondly, the activation for readout takes place only for those columns overlapping with a certain fired area, thus reducing the sweeping time of the whole matrix and reducing the pixel dead-time. Third, the sparsification (x-y address labeling of the hits) is performed with a lower granularity with respect to single pixels, by addressing vertical zones of 8 pixels each. The fine-grain Y resolution is achieved by appending the zone pattern to the zone address of a hit. We show then the benefits of this technique in presence of clusters. We describe this architecture from a schematic point of view, then presenting the efficiency results obtained by VHDL simulations.

A high efficiency readout architecture for a large matrix of pixels

International Nuclear Information System (INIS)

Gabrielli, A; Giorgi, F; Villa, M

2010-01-01

In this work we present a fast readout architecture for silicon pixel matrix sensors that has been designed to sustain very high rates, above 1 MHz/mm 2 for matrices greater than 80k pixels. This logic can be implemented within MAPS (Monolithic Active Pixel Sensors), a kind of high resolution sensor that integrates on the same bulk the sensor matrix and the CMOS logic for readout, but it can be exploited also with other technologies. The proposed architecture is based on three main concepts. First of all, the readout of the hits is performed by activating one column at a time; all the fired pixels on the active column are read, sparsified and reset in parallel in one clock cycle. This implies the use of global signals across the sensor matrix. The consequent reduction of metal interconnections improves the active area while maintaining a high granularity (down to a pixel pitch of 40 μm). Secondly, the activation for readout takes place only for those columns overlapping with a certain fired area, thus reducing the sweeping time of the whole matrix and reducing the pixel dead-time. Third, the sparsification (x-y address labeling of the hits) is performed with a lower granularity with respect to single pixels, by addressing vertical zones of 8 pixels each. The fine-grain Y resolution is achieved by appending the zone pattern to the zone address of a hit. We show then the benefits of this technique in presence of clusters. We describe this architecture from a schematic point of view, then presenting the efficiency results obtained by VHDL simulations.

Focal plane array with modular pixel array components for scalability

Science.gov (United States)

Kay, Randolph R; Campbell, David V; Shinde, Subhash L; Rienstra, Jeffrey L; Serkland, Darwin K; Holmes, Michael L

2014-12-09

A modular, scalable focal plane array is provided as an array of integrated circuit dice, wherein each die includes a given amount of modular pixel array circuitry. The array of dice effectively multiplies the amount of modular pixel array circuitry to produce a larger pixel array without increasing die size. Desired pixel pitch across the enlarged pixel array is preserved by forming die stacks with each pixel array circuitry die stacked on a separate die that contains the corresponding signal processing circuitry. Techniques for die stack interconnections and die stack placement are implemented to ensure that the desired pixel pitch is preserved across the enlarged pixel array.

Readout and characterisation of new silicon pixel photodiode array for use in PET

International Nuclear Information System (INIS)

Hooper, P.; Ward, G.; Lerch, R.; Rozenfeld, A.

2002-01-01

Full text: Positron emission tomography (PET) is a functional imaging tool, which is able to quantify physiological, and biochemical processes in vivo using short-lived cyclotron-produced radiotracers. The main physical principle of PET is the simultaneous measurement of two 511 keV photons which are emitted in opposite directions following the annihilation of a positron in tissue. The accuracy of tracking these photons determines the accuracy of localising the radiotracer in the body, which is referred to as the spatial resolution of the system. Compared with conventional single photon imaging with gamma cameras, PET provides superior spatial resolution and sensitivity. However, compared with anatomical imaging techniques, the spatial resolution remains relatively poor at approximately 4-6 mm full width at half maximum (FWHM), compared with 1 mm FWHM for MRI. The Centre for Medical Radiation Physics at the University of Wollongong is developing a new Positron Emission Tomography (PET) detection sub-module that will significantly improve the spatial resolution of PET. The new sub-module design is simple and robust to minimise module assembly complications and is completely independent of photomultiplier tubes. The new sub-module has also been designed to maximise its flexibility for easy sub-module coupling so as to form a complete, customised, detection module to be used in PET scanners dedicated to human brain and breast, and small animal studies. A new computer controlled gantry allows the system to be used for PET and SPECT applications. Silicon 8x8 detector arrays have been developed by CMRP and will be optically coupled scintillation crystals and readout using the VIKING tM hybrid preamplifier chip to form the basis of the new module Characterisation of the pixel photodiode array has been performed to check the uniformity of the response of the array. This characterisation has been done using a pulsed, near infra-red laser diode system and alpha particles

Amorphous silicon pixel radiation detectors and associated thin film transistor electronics readout

International Nuclear Information System (INIS)

Perez-Mendez, V.; Cho, G.; Drewery, J.; Jing, T.; Kaplan, S.N.; Mireshghi, A.; Wildermuth, D.; Goodman, C.; Fujieda, I.

1992-07-01

We describe the characteristics of thin (1 μm) and thick (> 30 μm) hydrogenated amorphous silicon p-i-n diodes which are optimized for detecting and recording the spatial distribution of charged particles, x-ray, γ rays and thermal neutrons. For x-ray, γ ray, and charged particle detection we can use thin p-i-n photosensitive diode arrays coupled to evaporated layers of suitable scintillators. For thermal neutron detection we use thin (2∼5 μm) gadolinium converters on 30 μm thick a-Si:H diodes. For direct detection of minimum ionizing particles and others with high resistance to radiation damage, we use the thick p-i-n diode arrays. Diode and amorphous silicon readouts as well as polysilicon pixel amplifiers are described

Readout chip for the CMS pixel detector upgrade

Energy Technology Data Exchange (ETDEWEB)

Rossini, Marco, E-mail: marco.rossini@phys.ethz.ch

2014-11-21

For the CMS experiment a new pixel detector is planned for installation during the extended shutdown in winter 2016/2017. Among the changes of the detector modified front end electronics will be used for higher efficiency at peak luminosity of the LHC and faster readout. The first prototype versions of the new readout chip have been designed and produced. The results of qualification and calibration for the new chip are presented in this paper.

Low noise signal-to-noise ratio enhancing readout circuit for current-mediated active pixel sensors

International Nuclear Information System (INIS)

Ottaviani, Tony; Karim, Karim S.; Nathan, Arokia; Rowlands, John A.

2006-01-01

Diagnostic digital fluoroscopic applications continuously expose patients to low doses of x-ray radiation, posing a challenge to both the digital imaging pixel and readout electronics when amplifying small signal x-ray inputs. Traditional switch-based amorphous silicon imaging solutions, for instance, have produced poor signal-to-noise ratios (SNRs) at low exposure levels owing to noise sources from the pixel readout circuitry. Current-mediated amorphous silicon pixels are an improvement over conventional pixel amplifiers with an enhanced SNR across the same low-exposure range, but whose output also becomes nonlinear with increasing dosage. A low-noise SNR enhancing readout circuit has been developed that enhances the charge gain of the current-mediated active pixel sensor (C-APS). The solution takes advantage of the current-mediated approach, primarily integrating the signal input at the desired frequency necessary for large-area imaging, while adding minimal noise to the signal readout. Experimental data indicates that the readout circuit can detect pixel outputs over a large bandwidth suitable for real-time digital diagnostic x-ray fluoroscopy. Results from hardware testing indicate that the minimum achievable C-APS output current that can be discerned at the digital fluoroscopic output from the enhanced SNR readout circuit is 0.341 nA. The results serve to highlight the applicability of amorphous silicon current-mediated pixel amplifiers for large-area flat panel x-ray imagers

18k Channels single photon counting readout circuit for hybrid pixel detector

International Nuclear Information System (INIS)

Maj, P.; Grybos, P.; Szczygiel, R.; Zoladz, M.; Sakumura, T.; Tsuji, Y.

2013-01-01

We have performed measurements of an integrated circuit named PXD18k designed for hybrid pixel semiconductor detectors used in X-ray imaging applications. The PXD18k integrated circuit, fabricated in CMOS 180 nm technology, has dimensions of 9.64 mm×20 mm and contains approximately 26 million transistors. The core of the IC is a matrix of 96×192 pixels with 100 μm×100 μm pixel size. Each pixel works in a single photon counting mode. A single pixel contains two charge sensitive amplifiers with Krummenacher feedback scheme, two shapers, two discriminators (with independent thresholds A and B) and two 16-bit ripple counters. The data are read out via eight low voltage differential signaling (LVDS) outputs with 100 Mbps rate. The power consumption is dominated by analog blocks and it is about 23 μW/pixel. The effective peaking time at the discriminator input is 30 ns and is mainly determined by the time constants of the charge sensitive amplifier (CSA). The gain is equal to 42.5 μV/e − and the equivalent noise charge is 168 e − rms (with bump-bonded silicon pixel detector). Thanks to the use of trim DACs in each pixel, the effective threshold spread at the discriminator input is only 1.79 mV. The dead time of the front end electronics for a standard setting is 172 ns (paralyzable model). In the standard readout mode (when the data collection time is separated from the time necessary to readout data from the chip) the PXD18k IC works with two energy thresholds per pixel. The PXD18k can also be operated in the continuous readout mode (with a zero dead time) where one can select the number of bits readout from each pixel to optimize the PXD18k frame rate. For example, for reading out 16 bits/pixel the frame rate is 2.7 kHz and for 4 bits/pixel it rises to 7.1 kHz.

18k Channels single photon counting readout circuit for hybrid pixel detector

Energy Technology Data Exchange (ETDEWEB)

Maj, P., E-mail: piotr.maj@agh.edu.pl [AGH University of Science and Technology, Department of Measurements and Electronics, Al. Mickiewicza 30, 30-059 Krakow (Poland); Grybos, P.; Szczygiel, R.; Zoladz, M. [AGH University of Science and Technology, Department of Measurements and Electronics, Al. Mickiewicza 30, 30-059 Krakow (Poland); Sakumura, T.; Tsuji, Y. [X-ray Analysis Division, Rigaku Corporation, Matsubara, Akishima, Tokyo 196-8666 (Japan)

2013-01-01

We have performed measurements of an integrated circuit named PXD18k designed for hybrid pixel semiconductor detectors used in X-ray imaging applications. The PXD18k integrated circuit, fabricated in CMOS 180 nm technology, has dimensions of 9.64 mm Multiplication-Sign 20 mm and contains approximately 26 million transistors. The core of the IC is a matrix of 96 Multiplication-Sign 192 pixels with 100 {mu}m Multiplication-Sign 100 {mu}m pixel size. Each pixel works in a single photon counting mode. A single pixel contains two charge sensitive amplifiers with Krummenacher feedback scheme, two shapers, two discriminators (with independent thresholds A and B) and two 16-bit ripple counters. The data are read out via eight low voltage differential signaling (LVDS) outputs with 100 Mbps rate. The power consumption is dominated by analog blocks and it is about 23 {mu}W/pixel. The effective peaking time at the discriminator input is 30 ns and is mainly determined by the time constants of the charge sensitive amplifier (CSA). The gain is equal to 42.5 {mu}V/e{sup -} and the equivalent noise charge is 168 e{sup -} rms (with bump-bonded silicon pixel detector). Thanks to the use of trim DACs in each pixel, the effective threshold spread at the discriminator input is only 1.79 mV. The dead time of the front end electronics for a standard setting is 172 ns (paralyzable model). In the standard readout mode (when the data collection time is separated from the time necessary to readout data from the chip) the PXD18k IC works with two energy thresholds per pixel. The PXD18k can also be operated in the continuous readout mode (with a zero dead time) where one can select the number of bits readout from each pixel to optimize the PXD18k frame rate. For example, for reading out 16 bits/pixel the frame rate is 2.7 kHz and for 4 bits/pixel it rises to 7.1 kHz.

COLIBRI: partial camera readout and sliding trigger for the Cherenkov Telescope Array CTA

International Nuclear Information System (INIS)

Naumann, C L; Tejedor, L A; Martínez, G

2013-01-01

Plans for the future Cherenkov telescope array CTA include replacing the monolithic camera designs used in H.E.S.S. and MAGIC-I by one that is built up from a number of identical segments. These so-called clusters will be relatively autonomous, each containing its own triggering and readout hardware. While this choice was made for reasons of flexibility and ease of manufacture and maintenance, such a concept with semi-independent sub-units lends itself quite naturally to the possibility of new, and more flexible, readout modes. In all previously-used concepts, triggering and readout of the camera is centralised, with a single camera trigger per event that starts the readout of all pixels in the camera at the same time and within the same integration time window. The limitations of such a trigger system can reduce the performance of a large array such as CTA, due to the huge amount of useless data created by night-sky background if trigger thresholds are set low enough to achieve the desired 20 GeV energy threshold, and to image losses at high energies due to the rigid readout window. In this study, an alternative concept (''COLIBRI'' = Concept for an Optimised Local Image Building and Readout Infrastructure) is presented, where only those parts of the camera which are likely to actually contain image data (usually a small percentage of the total pixels) are read out. This leads to a significant reduction of the expected data rate and the dead-times incurred in the camera. Furthermore, the quasi-independence of the individual clusters can be used to read different parts of the camera at slightly different times, thus allowing the readout to follow the slow development of the shower image across the camera field of view. This concept of flexible, partial camera readout is presented in the following, together with a description of Monte-Carlo studies performed to evaluate its performance as well as a hardware implementation proposed for CTA.

SPAD array chips with full frame readout for crystal characterization

Energy Technology Data Exchange (ETDEWEB)

Fischer, Peter; Blanco, Roberto; Sacco, Ilaria; Ritzert, Michael [Heidelberg University (Germany); Weyers, Sascha [Fraunhofer Institute for Microelectronic Circuits and Systems (Germany)

2015-05-18

We present single photon sensitive 2D camera chips containing 88x88 avalanche photo diodes which can be read out in full frame mode with up to 400.000 frames per second. The sensors have an imaging area of ~5mm x 5mm covered by square pixels of ~56µm x 56µm with a ~55% fill factor in the latest chip generation. The chips contain a self triggering logic with selectable (column) multiplicities of up to >=4 hits within an adjustable coincidence time window. The photon accumulation time window is programmable as well. First prototypes have demonstrated low dark count rates of <50kHz/mm2 (SPAD area) at 10 degree C for 10% masked pixels. One chip version contains an automated readout of the photon cluster position. The readout of the detailed photon distribution for single events allows the characterization of light sharing, optical crosstalk etc., in crystals or crystal arrays as they are used in PET instrumentation. This knowledge could lead to improvements in spatial or temporal resolution.

A Discrete Component Low-Noise Preamplifier Readout for a Linear (1x16) SiC Photodiode Array

Science.gov (United States)

Kahle, Duncan; Aslam, Shahid; Herrero, Frederico A.; Waczynski, Augustyn

2016-01-01

A compact, low-noise and inexpensive preamplifier circuit has been designed and fabricated to optimally readout a common cathode (1x16) channel 4H-SiC Schottky photodiode array for use in ultraviolet experiments. The readout uses an operational amplifier with 10 pF capacitor in the feedback loop in parallel with a low leakage switch for each of the channels. This circuit configuration allows for reiterative sample, integrate and reset. A sampling technique is given to remove Johnson noise, enabling a femtoampere level readout noise performance. Commercial-off-the-shelf acquisition electronics are used to digitize the preamplifier analogue signals. The data logging acquisition electronics has a different integration circuit, which allows the bandwidth and gain to be independently adjusted. Using this readout, photoresponse measurements across the array between spectral wavelengths 200 nm and 370 nm are made to establish the array pixels external quantum efficiency, current responsivity and noise equivalent power.

A discrete component low-noise preamplifier readout for a linear (1×16) SiC photodiode array

Energy Technology Data Exchange (ETDEWEB)

Kahle, Duncan [NASA, Goddard Space Flight Center, Detector Systems Branch, Greenbelt, MD 20771 (United States); Aslam, Shahid, E-mail: shahid.aslam-1@nasa.gov [NASA, Goddard Space Flight Center, Planetary Systems Laboratory, Greenbelt, MD 20771 (United States); Herrero, Federico A.; Waczynski, Augustyn [NASA, Goddard Space Flight Center, Detector Systems Branch, Greenbelt, MD 20771 (United States)

2016-09-11

A compact, low-noise and inexpensive preamplifier circuit has been designed and fabricated to optimally readout a common cathode (1×16) channel 4H-SiC Schottky photodiode array for use in ultraviolet experiments. The readout uses an operational amplifier with 10 pF capacitor in the feedback loop in parallel with a low leakage switch for each of the channels. This circuit configuration allows for reiterative sample, integrate and reset. A sampling technique is given to remove Johnson noise, enabling a femtoampere level readout noise performance. Commercial-off-the-shelf acquisition electronics are used to digitize the preamplifier analog signals. The data logging acquisition electronics has a different integration circuit, which allows the bandwidth and gain to be independently adjusted. Using this readout, photoresponse measurements across the array between spectral wavelengths 200 nm and 370 nm are made to establish the array pixels external quantum efficiency, current responsivity and noise equivalent power.

Development of pixel readout integrated circuits for extreme rate and radiation

CERN Document Server

Garcia-Sciveres, M; CERN. Geneva. The LHC experiments Committee; LHCC

2013-01-01

Letter of Intent for RD Collaboration Proposal focused on development of a next generation pixel readout integrated circuits needed for high luminosity LHC detector upgrades. Brings together ATLAS and CMS pixel chip design communities.

Fast Imaging Detector Readout Circuits with In-Pixel ADCs for Fourier Transform Imaging Spectrometers

Science.gov (United States)

Rider, D.; Blavier, J-F.; Cunningham, T.; Hancock, B.; Key, R.; Pannell, Z.; Sander, S.; Seshadri, S.; Sun, C.; Wrigley, C.

2011-01-01

Focal plane arrays (FPAs) with high frame rates and many pixels benefit several upcoming Earth science missions including GEO-CAPE, GACM, and ACE by enabling broader spatial coverage and higher spectral resolution. FPAs for the PanFTS, a high spatial resolution Fourier transform spectrometer and a candidate instrument for the GEO-CAPE mission are the focus of the developments reported here, but this FPA technology has the potential to enable a variety of future measurements and instruments. The ESTO ACT Program funded the developed of a fast readout integrated circuit (ROIC) based on an innovative in-pixel analog-to-digital converter (ADC). The 128 X 128 pixel ROIC features 60 ?m pixels, a 14-bit ADC in each pixel and operates at a continuous frame rate of 14 kHz consuming only 1.1 W of power. The ROIC outputs digitized data completely eliminating the bulky, power consuming signal chains needed by conventional FPAs. The 128 X 128 pixel ROIC has been fabricated in CMOS and tested at the Jet Propulsion Laboratory. The current version is designed to be hybridized with PIN photodiode arrays via indium bump bonding for light detection in the visible and ultraviolet spectral regions. However, the ROIC design incorporates a small photodiode in each cell to permit detailed characterization of the ROICperformance without the need for hybridization. We will describe the essential features of the ROIC design and present results of ROIC performance measurements.

High-speed X-ray imaging pixel array detector for synchrotron bunch isolation.

Science.gov (United States)

Philipp, Hugh T; Tate, Mark W; Purohit, Prafull; Shanks, Katherine S; Weiss, Joel T; Gruner, Sol M

2016-03-01

A wide-dynamic-range imaging X-ray detector designed for recording successive frames at rates up to 10 MHz is described. X-ray imaging with frame rates of up to 6.5 MHz have been experimentally verified. The pixel design allows for up to 8-12 frames to be stored internally at high speed before readout, which occurs at a 1 kHz frame rate. An additional mode of operation allows the integration capacitors to be re-addressed repeatedly before readout which can enhance the signal-to-noise ratio of cyclical processes. This detector, along with modern storage ring sources which provide short (10-100 ps) and intense X-ray pulses at megahertz rates, opens new avenues for the study of rapid structural changes in materials. The detector consists of hybridized modules, each of which is comprised of a 500 µm-thick silicon X-ray sensor solder bump-bonded, pixel by pixel, to an application-specific integrated circuit. The format of each module is 128 × 128 pixels with a pixel pitch of 150 µm. In the prototype detector described here, the three-side buttable modules are tiled in a 3 × 2 array with a full format of 256 × 384 pixels. The characteristics, operation, testing and application of the detector are detailed.

Readout architecture for the Pixel-Strip module of the CMS Outer Tracker Phase-2 upgrade

CERN Document Server

Caratelli, Alessandro; Jan Kaplon; Kloukinas, Konstantinos; Simone Scarfi

2017-01-01

The Outer Tracker upgrade of the Compact Muon Solenoid (CMS) experiment at CERN introduces new challenges for the front-end readout electronics. In particular, the capability of identifying particles with high transverse momentum using modules with double sensor layers requires high speed real time interconnects between readout ASICs. The Pixel-Strip module combines a pixelated silicon layer with a silicon-strip layer. Consequently, it needs two different readout ASICs, namely the Short Strip ASIC (SSA) for the strip sensor and the Macro Pixel ASIC (MPA) for the pixelated sensor. The architecture proposed in this paper allows for a total data flow between readout ASICs of $\\sim$100\\,Gbps and reduces the output data flow from 1.3\\,Tbps to 30\\,Gbps per module while limiting the total power density to below 100\\,mW/cm$^2$. In addition a system-level simulation framework of all the front-end readout ASICs is developed in order to verify the data processing algorithm and the hardware implementation allowing mult...

A Full Parallel Event Driven Readout Technique for Area Array SPAD FLIM Image Sensors

Directory of Open Access Journals (Sweden)

Kaiming Nie

2016-01-01

Full Text Available This paper presents a full parallel event driven readout method which is implemented in an area array single-photon avalanche diode (SPAD image sensor for high-speed fluorescence lifetime imaging microscopy (FLIM. The sensor only records and reads out effective time and position information by adopting full parallel event driven readout method, aiming at reducing the amount of data. The image sensor includes four 8 × 8 pixel arrays. In each array, four time-to-digital converters (TDCs are used to quantize the time of photons’ arrival, and two address record modules are used to record the column and row information. In this work, Monte Carlo simulations were performed in Matlab in terms of the pile-up effect induced by the readout method. The sensor’s resolution is 16 × 16. The time resolution of TDCs is 97.6 ps and the quantization range is 100 ns. The readout frame rate is 10 Mfps, and the maximum imaging frame rate is 100 fps. The chip’s output bandwidth is 720 MHz with an average power of 15 mW. The lifetime resolvability range is 5–20 ns, and the average error of estimated fluorescence lifetimes is below 1% by employing CMM to estimate lifetimes.

A novel high electrode count spike recording array using an 81,920 pixel transimpedance amplifier-based imaging chip.

Science.gov (United States)

Johnson, Lee J; Cohen, Ethan; Ilg, Doug; Klein, Richard; Skeath, Perry; Scribner, Dean A

2012-04-15

Microelectrode recording arrays of 60-100 electrodes are commonly used to record neuronal biopotentials, and these have aided our understanding of brain function, development and pathology. However, higher density microelectrode recording arrays of larger area are needed to study neuronal function over broader brain regions such as in cerebral cortex or hippocampal slices. Here, we present a novel design of a high electrode count picocurrent imaging array (PIA), based on an 81,920 pixel Indigo ISC9809 readout integrated circuit camera chip. While originally developed for interfacing to infrared photodetector arrays, we have adapted the chip for neuron recording by bonding it to microwire glass resulting in an array with an inter-electrode pixel spacing of 30 μm. In a high density electrode array, the ability to selectively record neural regions at high speed and with good signal to noise ratio are both functionally important. A critical feature of our PIA is that each pixel contains a dedicated low noise transimpedance amplifier (∼0.32 pA rms) which allows recording high signal to noise ratio biocurrents comparable to single electrode voltage amplifier recordings. Using selective sampling of 256 pixel subarray regions, we recorded the extracellular biocurrents of rabbit retinal ganglion cell spikes at sampling rates up to 7.2 kHz. Full array local electroretinogram currents could also be recorded at frame rates up to 100 Hz. A PIA with a full complement of 4 readout circuits would span 1cm and could acquire simultaneous data from selected regions of 1024 electrodes at sampling rates up to 9.3 kHz. Published by Elsevier B.V.

An induced charge readout scheme incorporating image charge splitting on discrete pixels

International Nuclear Information System (INIS)

Kataria, D.O.; Lapington, J.S.

2003-01-01

Top hat electrostatic analysers used in space plasma instruments typically use microchannel plates (MCPs) followed by discrete pixel anode readout for the angular definition of the incoming particles. Better angular definition requires more pixels/readout electronics channels but with stringent mass and power budgets common in space applications, the number of channels is restricted. We describe here a technique that improves the angular definition using induced charge and an interleaved anode pattern. The technique adopts the readout philosophy used on the CRRES and CLUSTER I instruments but has the advantages of the induced charge scheme and significantly reduced capacitance. Charge from the MCP collected by an anode pixel is inductively split onto discrete pixels whose geometry can be tailored to suit the scientific requirements of the instrument. For our application, the charge is induced over two pixels. One of them is used for a coarse angular definition but is read out by a single channel of electronics, allowing a higher rate handling. The other provides a finer angular definition but is interleaved and hence carries the expense of lower rate handling. Using the technique and adding four channels of electronics, a four-fold increase in the angular resolution is obtained. Details of the scheme and performance results are presented

Pixel detector readout electronics with two-level discriminator scheme

International Nuclear Information System (INIS)

Pengg, F.

1998-01-01

In preparation for a silicon pixel detector with more than 3,000 readout channels per chip for operation at the future large hadron collider (LHC) at CERN the analog front end of the readout electronics has been designed and measured on several test-arrays with 16 by 4 cells. They are implemented in the HP 0.8 microm process but compatible with the design rules of the radiation hard Honeywell 0.8 microm bulk process. Each cell contains bump bonding pad, preamplifier, discriminator and control logic for masking and testing within a layout area of only 50 microm by 140 microm. A new two-level discriminator scheme has been implemented to cope with the problems of time-walk and interpixel cross-coupling. The measured gain of the preamplifier is 900 mV for a minimum ionizing particle (MIP, about 24,000 e - for a 300 microm thick Si-detector) with a return to baseline within 750 ns for a 1 MIP input signal. The full readout chain (without detector) shows an equivalent noise charge to 60e - r.m.s. The time-walk, a function of the separation between the two threshold levels, is measured to be 22 ns at a separation of 1,500 e - , which is adequate for the 40 MHz beam-crossing frequency at the LHC. The interpixel cross-coupling, measured with a 40fF coupling capacitance, is less than 3%. A single cell consumes 35 microW at 3.5 V supply voltage

High-speed readout of high-Z pixel detectors with the LAMBDA detector

International Nuclear Information System (INIS)

Pennicard, D.; Smoljanin, S.; Sheviakov, I.; Xia, Q.; Rothkirch, A.; Yu, Y.; Struth, B.; Hirsemann, H.; Graafsma, H.

2014-01-01

High-frame-rate X-ray pixel detectors make it possible to perform time-resolved experiments at synchrotron beamlines, and to make better use of these sources by shortening experiment times. LAMBDA is a photon-counting hybrid pixel detector based on the Medipix3 chip, designed to combine a small pixel size of 55 μm, a large tileable module design, high speed, and compatibility with ''high-Z'' sensors for hard X-ray detection. This technical paper focuses on LAMBDA's high-speed-readout functionality, which allows a frame rate of 2000 frames per second with no deadtime between successive images. This takes advantage of the Medipix3 chip's ''continuous read-write'' function and highly parallelised readout. The readout electronics serialise this data and send it back to a server PC over two 10 Gigabit Ethernet links. The server PC controls the detector and receives, processes and stores the data using software designed for the Tango control system. As a demonstration of high-speed readout of a high-Z sensor, a GaAs LAMBDA detector was used to make a high-speed X-ray video of a computer fan

Development of pixel detectors for SSC vertex tracking

International Nuclear Information System (INIS)

Kramer, G.; Shapiro, S.L.; Arens, J.F.; Jernigan, J.G.; Skubic, P.

1991-04-01

A description of hybrid PIN diode arrays and a readout architecture for their use as a vertex detector in the SSC environment is presented. Test results obtained with arrays having 256 x 256 pixels, each 30 μm square, are also presented. The development of a custom readout for the SSC will be discussed, which supports a mechanism for time stamping hit pixels, storing their xy coordinates, and storing the analog information within the pixel. The peripheral logic located on the array, permits the selection of those pixels containing interesting data and their coordinates to be selectively read out. This same logic also resolves ambiguous pixel ghost locations and controls the pixel neighbor read out necessary to achieve high spatial resolution. The thermal design of the vertex tracker and the proposed signal processing architecture will also be discussed. 5 refs., 13 figs., 3 tabs

Digital Power Consumption Estimations for CHIPIX65 Pixel Readout Chip

CERN Document Server

Marcotulli, Andrea

2016-01-01

New hybrid pixel detectors with improved resolution capable of dealing with hit rates up to 3 GHz/cm2 will be required for future High Energy Physics experiments in the Large Hadron Collider (LHC) at CERN. Given this, the RD53 collaboration works on the design of the next generation pixel readout chip needed for both the ATLAS and CMS detector phase 2 pixel upgrades. For the RD53 demonstrator chip in 65nm CMOS technology, different architectures are considered. In particular the purpose of this work is estimating the power consumption of the digital architecture of the readout ASIC developed by CHIPIX65 project of the INFN National Scientific Committee. This has been done with modern chip design tools integrated with the VEPIX53 simulation framework that has been developed within the RD53 collaboration in order to assess the performance of the system in very high rate, high energy physics experiments.

A 128 pixel linear array for radiotherapy quality assurance

Energy Technology Data Exchange (ETDEWEB)

Franco, L. [Departmento de Fisica de Particulas, Facultade de Fisica, Universidade de Santiago, campus sur s/n, 15782 Santiago de Compostela (Spain); Gomez, F. [Departmento de Fisica de Particulas, Facultade de Fisica, Universidade de Santiago, campus sur s/n, 15782 Santiago de Compostela (Spain)]. E-mail: faustgr@usc.es; Iglesias, A. [Departmento de Fisica de Particulas, Facultade de Fisica, Universidade de Santiago, campus sur s/n, 15782 Santiago de Compostela (Spain); Lobato, R. [Hospital Clinico Universitario de Santiago, 15706 Santiago (Spain); Marin, J. [CIEMAT, Laboratorio de Electronica y Automatica, 28040 Madrid Spain (Spain); Mosquera, J. [Hospital Clinico Universitario de Santiago, 15706 Santiago (Spain); Pardo, J. [Departmento de Fisica de Particulas, Facultade de Fisica, Universidade de Santiago, campus sur s/n, 15782 Santiago de Compostela (Spain)]. E-mail: juanpm@usc.es; Pazos, A. [Departmento de Fisica de Particulas, Facultade de Fisica, Universidade de Santiago, campus sur s/n, 15782 Santiago de Compostela (Spain); Pena, J. [Departmento de Fisica de Particulas, Facultade de Fisica, Universidade de Santiago, campus sur s/n, 15782 Santiago de Compostela (Spain); Pombar, M. [Hospital Clinico Universitario de Santiago, 15706 Santiago (Spain); Rodriguez, A. [Departmento de Fisica de Particulas, Facultade de Fisica, Universidade de Santiago, campus sur s/n, 15782 Santiago de Compostela (Spain); Saavedra, D. [Universidade da Coruna, Dpto. de Enxeneria Industrial II, 15403 Ferrol Spain (Spain); Sendon, J. [Hospital Clinico Universitario de Santiago, 15706 Santiago (Spain); Yanez, A. [Universidade da Coruna, Dpto. de Enxeneria Industrial II, 15403 Ferrol Spain (Spain)

2004-12-11

New radiotherapy techniques require detectors able to verify and monitor the clinical beam with high spatial resolution and fast response. Room temperature organic liquid ionization detectors are becoming an alternative to standard air ionization chambers, due to their tissue equivalent behavior, their sensibility and small directional dependence. A liquid isooctane filled ionization linear array for radiotherapy quality assurance has been designed, built and tested. The detector consists of 128 pixels, each of them with an area of 1.7mmx1.7mm and a gap of 0.5mm. The small pixel size makes the detector ideal for high gradient beam profiles like those present in Intensity Modulated Radiation Therapy. The gap and the polarization voltage have been chosen in order to guarantee a linear relationship between the dose rate and the readout signal at high dose rates. As readout electronics we use the X-ray Data Acquisition System with the Xchip developed by the CCLRC.In the first device tests we have confirmed linearity up to a 6.7Gy/min dose rate with a deviation less than 1%. A profile with a signal-to-noise ratio around 500 can be obtained for a 4Gy/min dose rate with a 10 ms integration time.

A 128 pixel linear array for radiotherapy quality assurance

International Nuclear Information System (INIS)

Franco, L.; Gomez, F.; Iglesias, A.; Lobato, R.; Marin, J.; Mosquera, J.; Pardo, J.; Pazos, A.; Pena, J.; Pombar, M.; Rodriguez, A.; Saavedra, D.; Sendon, J.; Yanez, A.

2004-01-01

New radiotherapy techniques require detectors able to verify and monitor the clinical beam with high spatial resolution and fast response. Room temperature organic liquid ionization detectors are becoming an alternative to standard air ionization chambers, due to their tissue equivalent behavior, their sensibility and small directional dependence. A liquid isooctane filled ionization linear array for radiotherapy quality assurance has been designed, built and tested. The detector consists of 128 pixels, each of them with an area of 1.7mmx1.7mm and a gap of 0.5mm. The small pixel size makes the detector ideal for high gradient beam profiles like those present in Intensity Modulated Radiation Therapy. The gap and the polarization voltage have been chosen in order to guarantee a linear relationship between the dose rate and the readout signal at high dose rates. As readout electronics we use the X-ray Data Acquisition System with the Xchip developed by the CCLRC.In the first device tests we have confirmed linearity up to a 6.7Gy/min dose rate with a deviation less than 1%. A profile with a signal-to-noise ratio around 500 can be obtained for a 4Gy/min dose rate with a 10 ms integration time

Spectroscopy study of imaging devices based on silicon Pixel Array Detector coupled to VATAGP7 read-out chips

International Nuclear Information System (INIS)

Linhart, V; Lacasta, C; Llosa, G; Stankova, V; Burdette, D; Chessi, E; Cochran, E; Honscheid, K; Kagan, H; Weilhammer, P; Cindro, V; Grosicar, B; Mikuz, M; Studen, A; Zontar, D; Clinthorne, N H

2011-01-01

Spectroscopic and timing response studies have been conducted on a detector module consisting of a silicon Pixel Array Detector bonded on two VATAGP7 read-out chips manufactured by Gamma-Medica Ideas using laboratory gamma sources and the internal calibration facilities (the calibration system of the read-out chips). The performed tests have proven that the chips have (i) non-linear calibration curves which can be approximated by power functions, (ii) capability to measure the energy of photons with energy resolution better than 2 keV (exact range and resolution depend on experimental setup), (iii) the internal calibration facility which provides 6 out of 16 available internal calibration charges within our region of interest (spanning the Compton edge of 511 keV photons). The peaks induced by the internal calibration facility are suitable for a fit of the calibration curves. However, they are not suitable for measurements of equivalent noise charge because their full width at half maximum varies with their amplitude. These facts indicate that the VATAGP7 chips are useful and precise tools for a wide variety of spectroscopic devices. We have also explored time walk of the module and peaking time of the spectroscopy signals provided by the chips. We have observed that (iv) the time walk is caused partly by the peaking time of the signals provided by the fast shaper of the chips and partly by the timing uncertainty related to the varying position of the photon interaction, (v) the peaking time of the spectroscopy signals provided by the chips increases with increasing pulse height.

Design and realisation of integrated circuits for the readout of pixel sensors in high-energy physics and biomedical imaging

Energy Technology Data Exchange (ETDEWEB)

Peric, I.

2004-08-01

Radiation tolerant pixel-readout chip for the ATLAS pixel detector has been designed, implemented in a deep-submicron CMOS technology and successfully tested. The chip contains readout-channels with complex analog and digital circuits. Chip for steering of the DEPFET active-pixel matrix has been implemented in a high-voltage CMOS technology. The chip contains channels which generate fast sequences of high-voltage signals. Detector containing this chip has been successfully tested. Pixel-readout test chip for an X-ray imaging pixel sensor has been designed, implemented in a CMOS technology and tested. Pixel-readout channels are able to simultaneously count the signals generated by passage of individual photons and to sum the total charge generated during exposure time. (orig.)

Dead-time free pixel readout architecture for ATLAS front-end IC

CERN Document Server

Einsweiler, Kevin F; Kleinfelder, S A; Luo, L; Marchesini, R; Milgrome, O; Pengg, F X

1999-01-01

A low power sparse scan readout architecture has been developed for the ATLAS pixel front-end IC. The architecture supports a dual discriminator and extracts the time over threshold (TOT) information along with a 2-D spatial address $9 of the hits associating them with a unique 7-bit beam crossing number. The IC implements level-1 trigger filtering along with event building (grouping together all hits in a beam crossing) in the end of column (EOC) buffer. The $9 events are transmitted over a 40 MHz serial data link with the protocol supporting buffer overflow handling by appending error flags to events. This mixed-mode full custom IC is implemented in 0.8 mu HP process to meet the $9 requirements for the pixel readout in the ATLAS inner detector. The circuits have been tested and the IC provides dead-time-less ambiguity free readout at 40 MHz data rate.

The high dynamic range pixel array detector (HDR-PAD): Concept and design

Energy Technology Data Exchange (ETDEWEB)

Shanks, Katherine S.; Philipp, Hugh T.; Weiss, Joel T.; Becker, Julian; Tate, Mark W. [Laboratory of Atomic and Solid State Physics, Cornell University, Ithaca, NY 14853 (United States); Gruner, Sol M., E-mail: smg26@cornell.edu [Laboratory of Atomic and Solid State Physics, Cornell University, Ithaca, NY 14853 (United States); Cornell High Energy Synchrotron Source (CHESS), Cornell University, Ithaca, NY 14853 (United States)

2016-07-27

Experiments at storage ring light sources as well as at next-generation light sources increasingly require detectors capable of high dynamic range operation, combining low-noise detection of single photons with large pixel well depth. XFEL sources in particular provide pulse intensities sufficiently high that a purely photon-counting approach is impractical. The High Dynamic Range Pixel Array Detector (HDR-PAD) project aims to provide a dynamic range extending from single-photon sensitivity to 10{sup 6} photons/pixel in a single XFEL pulse while maintaining the ability to tolerate a sustained flux of 10{sup 11} ph/s/pixel at a storage ring source. Achieving these goals involves the development of fast pixel front-end electronics as well as, in the XFEL case, leveraging the delayed charge collection due to plasma effects in the sensor. A first prototype of essential electronic components of the HDR-PAD readout ASIC, exploring different options for the pixel front-end, has been fabricated. Here, the HDR-PAD concept and preliminary design will be described.

Digital column readout architecture for the ATLAS pixel 025 mum front end IC

CERN Document Server

Mandelli, E; Blanquart, L; Comes, G; Denes, P; Einsweiler, Kevin F; Fischer, P; Marchesini, R; Meddeler, G; Peric, I

2002-01-01

A fast low noise, limited power, radiation-hard front-end chip was developed for reading out the Atlas Pixel Silicon Detector. As in the past prototypes, every chip is used to digitize and read out charge and time information from hits on each one of its 2880 inputs. The basic column readout architecture idea was adopted and modified to allow a safe transition to quarter micron technology. Each pixel cell, organized in a 160 multiplied by 18 matrix, can be independently enabled and configured in order to optimize the analog signal response and to prevent defective pixels from saturating the readout. The digital readout organizes hit data coming from each column, with respect to time, and output them on a low-level serial interface. A considerable effort was made to design state machines free of undefined states, where single-point defects and charge deposited by heavy ions in the silicon could have led to unpredicted forbidden states. 7 Refs.

RD Collaboration Proposal: Development of pixel readout integrated circuits for extreme rate and radiation

CERN Document Server

Chistiansen, J (CERN)

2013-01-01

This proposal describes a new RD collaboration to develop the next genrration of hybrid pixel readout chips for use in ATLAS and CMS PHase 2 upgrades. extrapolation of hybrid pixel technology to the HL-LHC presents major challenges on several fronts. Challenges include: smaller pixels to resolve tracks in boosted jets, much higher hit rates (1-2 GHz/cm2 ), unprecedented radiation tolerance (10 MGy), much higher output bandwidth, and large IC format with low power consumption in order to instrument large areas while keeping the material budget low. This collaboration is specifically focused on design of hybrid pixel readout chips, and not on more general chip design or on other aspects of hybrid pixel technology. Participants include 7 institutes on ATLAS and 7 on CMS, plus 2 on both experiments.

The NA62 Gigatracker: Detector properties and pixel read-out architectures

International Nuclear Information System (INIS)

Fiorini, M.; Carassiti, V.; Ceccucci, A.; Cortina, E.; Cotta Ramusino, A.; Dellacasa, G.; Jarron, P.; Kaplon, J.; Kluge, A.; Marchetto, F.; Martin, E.; Martoiu, S.; Mazza, G.; Noy, M.; Petrucci, F.; Riedler, P.; Rivetti, A.; Tiuraniemi, S.

2010-01-01

The beam spectrometer of the NA62 experiment, named Gigatracker, has to perform single track reconstruction with unprecedented time resolution (150 ps rms) in a harsh radiation environment. To meet these requirements, and in order to reduce material budget to a minimum, three hybrid silicon pixel detector stations will be installed in vacuum. An adequate strategy to compensate for the discriminator time-walk must be implemented and R and D investigating two different options is ongoing. Two read-out chip prototypes have been designed in order to compare their performance: one approach is based on the use of a constant-fraction discriminator followed by an on-pixel TDC, while the other one is based on the use of a time-over-threshold circuit followed by a TDC shared by a group of pixels. This paper describes the Gigatracker system, presents the global architectures of both read-out ASICs and reviews the current status of the R and D project.

Low-power priority Address-Encoder and Reset-Decoder data-driven readout for Monolithic Active Pixel Sensors for tracker system

International Nuclear Information System (INIS)

Yang, P.; Aglieri, G.; Cavicchioli, C.; Chalmet, P.L.; Chanlek, N.; Collu, A.; Gao, C.; Hillemanns, H.; Junique, A.; Kofarago, M.; Keil, M.; Kugathasan, T.; Kim, D.; Kim, J.; Lattuca, A.; Marin Tobon, C.A.; Marras, D.; Mager, M.; Martinengo, P.; Mazza, G.

2015-01-01

Active Pixel Sensors used in High Energy Particle Physics require low power consumption to reduce the detector material budget, low integration time to reduce the possibilities of pile-up and fast readout to improve the detector data capability. To satisfy these requirements, a novel Address-Encoder and Reset-Decoder (AERD) asynchronous circuit for a fast readout of a pixel matrix has been developed. The AERD data-driven readout architecture operates the address encoding and reset decoding based on an arbitration tree, and allows us to readout only the hit pixels. Compared to the traditional readout structure of the rolling shutter scheme in Monolithic Active Pixel Sensors (MAPS), AERD can achieve a low readout time and a low power consumption especially for low hit occupancies. The readout is controlled at the chip periphery with a signal synchronous with the clock, allows a good digital and analogue signal separation in the matrix and a reduction of the power consumption. The AERD circuit has been implemented in the TowerJazz 180 nm CMOS Imaging Sensor (CIS) process with full complementary CMOS logic in the pixel. It works at 10 MHz with a matrix height of 15 mm. The energy consumed to read out one pixel is around 72 pJ. A scheme to boost the readout speed to 40 MHz is also discussed. The sensor chip equipped with AERD has been produced and characterised. Test results including electrical beam measurement are presented

Low-power priority Address-Encoder and Reset-Decoder data-driven readout for Monolithic Active Pixel Sensors for tracker system

Energy Technology Data Exchange (ETDEWEB)

Yang, P., E-mail: yangping0710@126.com [Central China Normal University, Wuhan (China); Aglieri, G.; Cavicchioli, C. [CERN, 1210 Geneva 23 (Switzerland); Chalmet, P.L. [MIND, Archamps (France); Chanlek, N. [Suranaree University of Technology, Nakhon Ratchasima (Thailand); Collu, A. [University of Cagliari, Cagliari (Italy); INFN (Italy); Gao, C. [Central China Normal University, Wuhan (China); Hillemanns, H.; Junique, A. [CERN, 1210 Geneva 23 (Switzerland); Kofarago, M. [CERN, 1210 Geneva 23 (Switzerland); University of Utrecht, Utrecht (Netherlands); Keil, M.; Kugathasan, T. [CERN, 1210 Geneva 23 (Switzerland); Kim, D. [Dongguk and Yonsei University, Seoul (Korea, Republic of); Kim, J. [Pusan National University, Busan (Korea, Republic of); Lattuca, A. [University of Torino, Torino (Italy); INFN (Italy); Marin Tobon, C.A. [CERN, 1210 Geneva 23 (Switzerland); Marras, D. [University of Cagliari, Cagliari (Italy); INFN (Italy); Mager, M.; Martinengo, P. [CERN, 1210 Geneva 23 (Switzerland); Mazza, G. [University of Torino, Torino (Italy); INFN (Italy); and others

2015-06-11

Active Pixel Sensors used in High Energy Particle Physics require low power consumption to reduce the detector material budget, low integration time to reduce the possibilities of pile-up and fast readout to improve the detector data capability. To satisfy these requirements, a novel Address-Encoder and Reset-Decoder (AERD) asynchronous circuit for a fast readout of a pixel matrix has been developed. The AERD data-driven readout architecture operates the address encoding and reset decoding based on an arbitration tree, and allows us to readout only the hit pixels. Compared to the traditional readout structure of the rolling shutter scheme in Monolithic Active Pixel Sensors (MAPS), AERD can achieve a low readout time and a low power consumption especially for low hit occupancies. The readout is controlled at the chip periphery with a signal synchronous with the clock, allows a good digital and analogue signal separation in the matrix and a reduction of the power consumption. The AERD circuit has been implemented in the TowerJazz 180 nm CMOS Imaging Sensor (CIS) process with full complementary CMOS logic in the pixel. It works at 10 MHz with a matrix height of 15 mm. The energy consumed to read out one pixel is around 72 pJ. A scheme to boost the readout speed to 40 MHz is also discussed. The sensor chip equipped with AERD has been produced and characterised. Test results including electrical beam measurement are presented.

Low-power priority Address-Encoder and Reset-Decoder data-driven readout for Monolithic Active Pixel Sensors for tracker system

Science.gov (United States)

Yang, P.; Aglieri, G.; Cavicchioli, C.; Chalmet, P. L.; Chanlek, N.; Collu, A.; Gao, C.; Hillemanns, H.; Junique, A.; Kofarago, M.; Keil, M.; Kugathasan, T.; Kim, D.; Kim, J.; Lattuca, A.; Marin Tobon, C. A.; Marras, D.; Mager, M.; Martinengo, P.; Mazza, G.; Mugnier, H.; Musa, L.; Puggioni, C.; Rousset, J.; Reidt, F.; Riedler, P.; Snoeys, W.; Siddhanta, S.; Usai, G.; van Hoorne, J. W.; Yi, J.

2015-06-01

Active Pixel Sensors used in High Energy Particle Physics require low power consumption to reduce the detector material budget, low integration time to reduce the possibilities of pile-up and fast readout to improve the detector data capability. To satisfy these requirements, a novel Address-Encoder and Reset-Decoder (AERD) asynchronous circuit for a fast readout of a pixel matrix has been developed. The AERD data-driven readout architecture operates the address encoding and reset decoding based on an arbitration tree, and allows us to readout only the hit pixels. Compared to the traditional readout structure of the rolling shutter scheme in Monolithic Active Pixel Sensors (MAPS), AERD can achieve a low readout time and a low power consumption especially for low hit occupancies. The readout is controlled at the chip periphery with a signal synchronous with the clock, allows a good digital and analogue signal separation in the matrix and a reduction of the power consumption. The AERD circuit has been implemented in the TowerJazz 180 nm CMOS Imaging Sensor (CIS) process with full complementary CMOS logic in the pixel. It works at 10 MHz with a matrix height of 15 mm. The energy consumed to read out one pixel is around 72 pJ. A scheme to boost the readout speed to 40 MHz is also discussed. The sensor chip equipped with AERD has been produced and characterised. Test results including electrical beam measurement are presented.

Mapping Electrical Crosstalk in Pixelated Sensor Arrays

Science.gov (United States)

Seshadri, Suresh (Inventor); Cole, David (Inventor); Smith, Roger M. (Inventor); Hancock, Bruce R. (Inventor)

2017-01-01

The effects of inter pixel capacitance in a pixilated array may be measured by first resetting all pixels in the array to a first voltage, where a first image is read out, followed by resetting only a subset of pixels in the array to a second voltage, where a second image is read out, where the difference in the first and second images provide information about the inter pixel capacitance. Other embodiments are described and claimed.

MKID digital readout tuning with deep learning

Science.gov (United States)

Dodkins, R.; Mahashabde, S.; O'Brien, K.; Thatte, N.; Fruitwala, N.; Walter, A. B.; Meeker, S. R.; Szypryt, P.; Mazin, B. A.

2018-04-01

Microwave Kinetic Inductance Detector (MKID) devices offer inherent spectral resolution, simultaneous read out of thousands of pixels, and photon-limited sensitivity at optical wavelengths. Before taking observations the readout power and frequency of each pixel must be individually tuned, and if the equilibrium state of the pixels change, then the readout must be retuned. This process has previously been performed through manual inspection, and typically takes one hour per 500 resonators (20 h for a ten-kilo-pixel array). We present an algorithm based on a deep convolution neural network (CNN) architecture to determine the optimal bias power for each resonator. The bias point classifications from this CNN model, and those from alternative automated methods, are compared to those from human decisions, and the accuracy of each method is assessed. On a test feed-line dataset, the CNN achieves an accuracy of 90% within 1 dB of the designated optimal value, which is equivalent accuracy to a randomly selected human operator, and superior to the highest scoring alternative automated method by 10%. On a full ten-kilopixel array, the CNN performs the characterization in a matter of minutes - paving the way for future mega-pixel MKID arrays.

Medipix3 array high performance read-out board for synchrotron research

International Nuclear Information System (INIS)

Tartoni, N.; Horswell, I. C.; Marchal, J.; Gimenez, E. N.; Fearn, R. D.; Silfhout, R. G. van

2010-01-01

The Medipix3 ASIC is one of the most advanced chip that is presently available to build photon counting area detectors. The capabilities of the chip include adjacent pixels charge summing circuitry to sort out the distortion due to charge sharing, simultaneous counting and read-out that enables frames to be acquired without dead time, the colour mode of operation that enables up to eight energy bands to be acquired. In order to fully exploit the capabilities of the Medipix3 chip in synchrotron research, a high performance electronic board capable of driving large arrays of chips is necessary. We propose a parallel read-out board of Medipix3 chip arrays with a scalable architecture that allows driving the Medipix3 chip in all of its modes of operation. The board functions include the control of the chip arrays, data formatting and data compression, the management of the communications with the data storage devices, and operation in various trigger modes. In addition to this the board will have some 'intelligence' embedded. This will add some very important features to the final detector such as pattern recognition, capability of variable frame duration as a function of the photon flux, feedback to other equipment and real time calculations of data relevant to experiments such as the autocorrelation function.

Experimental characterization of the 192 channel Clear-PEM frontend ASIC coupled to a multi-pixel APD readout of LYSO:Ce crystals

International Nuclear Information System (INIS)

Albuquerque, Edgar; Bexiga, Vasco; Bugalho, Ricardo; Carrico, Bruno; Ferreira, Claudia S.; Ferreira, Miguel; Godinho, Joaquim; Goncalves, Fernando; Leong, Carlos; Lousa, Pedro; Machado, Pedro; Moura, Rui; Neves, Pedro; Ortigao, Catarina; Piedade, Fernando; Pinheiro, Joao F.; Rego, Joel; Rivetti, Angelo; Rodrigues, Pedro; Silva, Jose C.

2009-01-01

In the framework of the Clear-PEM project for the construction of a high-resolution scanner for breast cancer imaging, a very compact and dense frontend electronics system has been developed for readout of multi-pixel S8550 Hamamatsu APDs. The frontend electronics are instrumented with a mixed-signal Application-Specific Integrated Circuit (ASIC), which incorporates 192 low-noise charge pre-amplifiers, shapers, analog memory cells and digital control blocks. Pulses are continuously stored in memory cells at clock frequency. Channels above a common threshold voltage are readout for digitization by off-chip free-sampling ADCs. The ASIC has a size of 7.3x9.8mm 2 and was implemented in a AMS 0.35μm CMOS technology. In this paper the experimental characterization of the Clear-PEM frontend ASIC, reading out multi-pixel APDs coupled to LYSO:Ce crystal matrices, is presented. The chips were mounted on a custom test board connected to six APD arrays and to the data acquisition system. Six 32-pixel LYSO:Ce crystal matrices coupled on both sides to APD arrays were readout by two test boards. All 384 channels were operational. The chip power consumption is 660 mW (3.4 mW per channel). A very stable behavior of the chip was observed, with an estimated ENC of 1200-1300e - at APD gain 100. The inter-channel noise dispersion and mean baseline variation is less than 8% and 0.5%, respectively. The spread in the gain between different channels is found to be 1.5%. Energy resolution of 16.5% at 511 keV and 12.8% at 662 keV has been measured. Timing measurements between the two APDs that readout the same crystal is extracted and compared with detailed Monte Carlo simulations. At 511 keV the measured single photon time RMS resolution is 1.30 ns, in very good agreement with the expected value of 1.34 ns.

Operation of a GEM-TPC with pixel readout

CERN Document Server

Brezina, C; Kaminski, J; Killenberg, M; Krautscheid, T

2012-01-01

A prototype time projection chamber with 26 cm drift length was operated with a short-spaced triple gas electron multiplier (GEM) stack in a setup triggering on cosmic muon tracks. A small part of the anode plane is read out with a CMOS pixel application-specified integrated circuit (ASIC) named Timepix, which provides ultimate readout granularity. Pixel clusters of charge depositions corresponding to single primary electrons are observed and analyzed to reconstruct charged particle tracks. A dataset of several weeks of cosmic ray data is analyzed. The number of clusters per track length is well described by simulation. The obtained single point resolution approaches 50 m at short drift distances and is well reproduced by a simple model of single-electron diffusion.

Studies and development of a readout ASIC for pixelated CdTe detectors for space applications

International Nuclear Information System (INIS)

Michalowska, A.

2013-01-01

designed two ASICs. The first one, Caterpylar, is a test-chip, which enables the characterization of differently dimensioned CSA circuits to choose the most suitable one for the final application. It is optimized for readout of the target CdTe detector with 300 μm pixel pitch and the corresponding input parameters. With this circuit I have also analyzed possible filtering methods, in particular the semi-Gaussian shaping and the Multi-Correlated Double Sampling (MCDS). Their comparison is preceded by the theoretical analysis of these shapers. The second ASIC D 2 R 1 is a complete readout circuit, containing 256 channels to readout CdTe detector with the same number of pixels, arranged in 16 *16 array. Each channel fits into a layout area of 300 μm - 300 μm. It is based on the MCDS processing with self-triggering capabilities. The mean electronic noise measured over all channels is 29 electrons rms when characterized without the detector. The corresponding power consumption is 315 μW/channel. With these results the future measurements with the detector give prospects for reaching an FWHM spectral resolution in the order of 600 eV at 60 keV. (author) [fr

Macro Pixel ASIC (MPA): The readout ASIC for the pixel-strip (PS) module of the CMS outer tracker at HL-LHC

CERN Document Server

Ceresa, Davide; Kloukinas, Konstantinos; Jan Kaplon; Bialas, Wojciech; Re, Valerio; Traversi, Gianluca; Gaioni, Luigi; Ratti, Lodovico

2014-01-01

The CMS tracker at HL-LHC is required to provide prompt information on particles with high transverse momentum to the central Level\\,1 trigger. For this purpose, the innermost part of the outer tracker is based on a combination of a pixelated sensor with a short strip sensor, the so-called Pixel-Strip module (PS). The readout of these sensors is carried out by distinct ASICs, the Strip Sensor ASIC (SSA), for the strip layer, and the Macro Pixel ASIC (MPA) for the pixel layer. The processing of the data directly on the front-end module represents a design challenge due to the large data volume (30720\\,pixels and 1920\\,strips per module) and the limited power budget. This is the reason why several studies have been carried out to find the best compromise between ASICs performance and power consumption. This paper describes the current status of the MPA ASIC development where the logic for generating prompt information on particles with high transverse momentum is implemented. An overview of the readout method i...

Toward VIP-PIX: A Low Noise Readout ASIC for Pixelated CdTe Gamma-Ray Detectors for Use in the Next Generation of PET Scanners.

Science.gov (United States)

Macias-Montero, Jose-Gabriel; Sarraj, Maher; Chmeissani, Mokhtar; Puigdengoles, Carles; Lorenzo, Gianluca De; Martínez, Ricardo

2013-08-01

VIP-PIX will be a low noise and low power pixel readout electronics with digital output for pixelated Cadmium Telluride (CdTe) detectors. The proposed pixel will be part of a 2D pixel-array detector for various types of nuclear medicine imaging devices such as positron-emission tomography (PET) scanners, Compton gamma cameras, and positron-emission mammography (PEM) scanners. Each pixel will include a SAR ADC that provides the energy deposited with 10-bit resolution. Simultaneously, the self-triggered pixel which will be connected to a global time-to-digital converter (TDC) with 1 ns resolution will provide the event's time stamp. The analog part of the readout chain and the ADC have been fabricated with TSMC 0.25 μ m mixed-signal CMOS technology and characterized with an external test pulse. The power consumption of these parts is 200 μ W from a 2.5 V supply. It offers 4 switchable gains from ±10 mV/fC to ±40 mV/fC and an input charge dynamic range of up to ±70 fC for the minimum gain for both polarities. Based on noise measurements, the expected equivalent noise charge (ENC) is 65 e - RMS at room temperature.

Development of a readout technique for the high data rate BTeV pixel detector at Fermilab

International Nuclear Information System (INIS)

Hall, Bradley K.

2001-01-01

The pixel detector for the BTeV experiment at Fermilab provides digitized data from approximately 22 million silicon pixel channels. Portions of the detector are six millimeters from the beam providing a substantial hit rate and high radiation dose. The pixel detector data will be employed by the lowest level trigger system for track reconstruction every beam crossing. These requirements impose a considerable constraint on the readout scheme. This paper presents a readout technique that provides the bandwidth that is adequate for high hit rates, minimizes the number of radiation hard components, and satisfies all other design constraints

A 10 MHz micropower CMOS front end for direct readout of pixel detectors

International Nuclear Information System (INIS)

Campbell, M.; Heijne, E.H.M.; Jarron, P.; Krummenacher, F.; Enz, C.C.; Declercq, M.; Vittoz, E.; Viertel, G.

1990-01-01

In the framework of the CERN-LAA project for detector R and D, a micropower circuit of 200 μmx200 μm with a current amplifier, a latched comparator and a digital memory element has been tested electrically and operated in connection with linear silicon detector arrays. The experimental direct-readout (DRO) chip comprises a matrix of 9x12 circuit cells and has been manufactured in a 3 μm CMOS technology. Particles and X-ray photons below 22 keV were detected, and thresholds can be set between 2000 and 20000 e - . The noise is less than 4 keV FWHM or 500 e - rms and the power dissipation per pixel element is 30 μW. The chip can be coupled to a detector matrix using bump bonding. (orig.)

SPIDR, a general-purpose readout system for pixel ASICs

International Nuclear Information System (INIS)

Heijden, B. van der; Visser, J.; Beuzekom, M. van; Boterenbrood, H.; Munneke, B.; Schreuder, F.; Kulis, S.

2017-01-01

The SPIDR (Speedy PIxel Detector Readout) system is a flexible general-purpose readout platform that can be easily adapted to test and characterize new and existing detector readout ASICs. It is originally designed for the readout of pixel ASICs from the Medipix/Timepix family, but other types of ASICs or front-end circuits can be read out as well. The SPIDR system consists of an FPGA board with memory and various communication interfaces, FPGA firmware, CPU subsystem and an API library on the PC . The FPGA firmware can be adapted to read out other ASICs by re-using IP blocks. The available IP blocks include a UDP packet builder, 1 and 10 Gigabit Ethernet MAC's and a 'soft core' CPU . Currently the firmware is targeted at the Xilinx VC707 development board and at a custom board called Compact-SPIDR . The firmware can easily be ported to other Xilinx 7 series and ultra scale FPGAs. The gap between an ASIC and the data acquisition back-end is bridged by the SPIDR system. Using the high pin count VITA 57 FPGA Mezzanine Card (FMC) connector only a simple chip carrier PCB is required. A 1 and a 10 Gigabit Ethernet interface handle the connection to the back-end. These can be used simultaneously for high-speed data and configuration over separate channels. In addition to the FMC connector, configurable inputs and outputs are available for synchronization with other detectors. A high resolution (≈ 27 ps bin size) Time to Digital converter is provided for time stamping events in the detector. The SPIDR system is frequently used as readout for the Medipix3 and Timepix3 ASICs. Using the 10 Gigabit Ethernet interface it is possible to read out a single chip at full bandwidth or up to 12 chips at a reduced rate. Another recent application is the test-bed for the VeloPix ASIC, which is developed for the Vertex Detector of the LHCb experiment. In this case the SPIDR system processes the 20 Gbps scrambled data stream from the VeloPix and distributes it over four

Development of a versatile readout and test system and characterization of a capacitively coupled active pixel sensor

Energy Technology Data Exchange (ETDEWEB)

Janssen, Jens; Gonella, Laura; Hemperek, Tomasz; Hirono, Toko; Huegging, Fabian; Krueger, Hans; Wermes, Norbert [Institute of Physics, University of Bonn, Bonn (Germany); Peric, Ivan [Karlsruher Institut fuer Technologie, Karlsruhe (Germany); Collaboration: ATLAS-Collaboration

2015-07-01

With the availability of high voltage and high resistivity CMOS processes, active pixel sensors are becoming increasingly interesting for radiation detection in high energy physics experiments. Although the pixel signal-to-noise ratio and the sensor radiation tolerance were improved, active pixel sensors cannot yet compete with state-of-the-art hybrid pixel detector in a high radiation environment. Hence, active pixel sensors are possible candidates for the outer tracking detector in HEP experiments where production cost plays a role. The investigation of numerous prototyping steps and different technologies is still ongoing and requires a versatile test and readout system, which will be presented in this talk. A capacitively coupled active pixel sensor fabricated in AMS 180 nm high voltage CMOS process is investigated. The sensor is designed to be glued to existing front-end pixel readout chips. Results from the characterization are presented in this talk.

Compensated readout for high-density MOS-gated memristor crossbar array

KAUST Repository

Zidan, Mohammed A.

2015-01-01

Leakage current is one of the main challenges facing high-density MOS-gated memristor arrays. In this study, we show that leakage current ruins the memory readout process for high-density arrays, and analyze the tradeoff between the array density and its power consumption. We propose a novel readout technique and its underlying circuitry, which is able to compensate for the transistor leakage-current effect in the high-density gated memristor array.

Development of a cylindrical tracking detector with multichannel scintillation fibers and pixelated photon detector readout

Energy Technology Data Exchange (ETDEWEB)

Akazawa, Y.; Miwa, K.; Honda, R.; Shiozaki, T.; Chiga, N.

2015-07-01

We are developing a cylindrical tracking detector for a Σp scattering experiment in J-PARC with scintillation fibers and the Pixelated Photon Detector (PPD) readout, which is called as cylindrical fiber tracker (CFT), in order to reconstruct trajectories of charged particles emitted inside CFT. CFT works not only as a tracking detector but also a particle identification detector from energy deposits. A prototype CFT consisting of two straight layers and one spiral layer was constructed. About 1100 scintillation fibers with a diameter of 0.75 mm (Kuraray SCSF-78 M) were used. Each fiber signal was read by Multi-Pixel Photon Counter (MPPC, HPK S10362-11-050P, 1×1 mm{sup 2}, 400 pixels) fiber by fiber. MPPCs were handled with Extended Analogue Silicon Photomultipliers Integrated ReadOut Chip (EASIROC) boards, which were developed for the readout of a large number of MPPCs. The energy resolution of one layer was 28% for a 70 MeV proton where the energy deposit in fibers was 0.7 MeV.

Monolithic pixels on moderate resistivity substrate and sparsifying readout architecture

CERN Document Server

Giubilato, P; Snoeys, W; Bisello, D; Marchioro, A; Battaglia, M; Demaria, L; Mansuy, S C; Pantano, D; Rousset, J; Mattiazzo, S; Kloukinas, K; Potenza, A; Ikemoto, Y; Rivetti, A; Chalmet, P; Mugnier, H; Silvestrin, L

2013-01-01

The LePix projects aim realizing a new generation monolithic pixel detectors with improved performances at lesser cost with respect to both current state of the art monolithic and hybrid pixel sensors. The detector is built in a 90 nm CMOS process on a substrate of moderate resistivity. This allows charge collection by drift while maintaining the other advantages usually offered by MAPS, like having a single piece detector and using a standard CMOS production line. The collection by drift mechanism, coupled to the low capacitance design of the collecting node made possible by the monolithic approach, provides an excellent signal to noise ratio straight at the pixel cell together with a radiation tolerance far superior to conventional un-depleted MAPS. The excellent signal-to-noise performance is demonstrated by the device ability to separate the 6 keV Fe-55 double peak at room temperature. To achieve high granularity (10-20 mu m pitch pixels) over large detector areas maintaining high readout speed, a complet...

Monolithic pixels on moderate resistivity substrate and sparsifying readout architecture

International Nuclear Information System (INIS)

Giubilato, P.; Battaglia, M.; Bisello, D.; Caselle, M.; Chalmet, P.; Demaria, L.; Ikemoto, Y.; Kloukinas, K.; Mansuy, S.C.; Mattiazzo, S.; Marchioro, A.; Mugnier, H.; Pantano, D.; Potenza, A.; Rivetti, A.; Rousset, J.; Silvestrin, L.; Snoeys, W.

2013-01-01

The LePix projects aim realizing a new generation monolithic pixel detectors with improved performances at lesser cost with respect to both current state of the art monolithic and hybrid pixel sensors. The detector is built in a 90 nm CMOS process on a substrate of moderate resistivity. This allows charge collection by drift while maintaining the other advantages usually offered by MAPS, like having a single piece detector and using a standard CMOS production line. The collection by drift mechanism, coupled to the low capacitance design of the collecting node made possible by the monolithic approach, provides an excellent signal to noise ratio straight at the pixel cell together with a radiation tolerance far superior to conventional un-depleted MAPS. The excellent signal-to-noise performance is demonstrated by the device ability to separate the 6 keV 55 Fe double peak at room temperature. To achieve high granularity (10–20 µm pitch pixels) over large detector areas maintaining high readout speed, a completely new compressing architecture has been devised. This architecture departs from the mainstream hybrid pixel sparsification approach, which uses in-pixel logic to reduce data, by using topological compression to minimize pixel area and power consumption

Cryogenic readout for multiple VUV4 Multi-Pixel Photon Counters in liquid xenon

Science.gov (United States)

Arneodo, F.; Benabderrahmane, M. L.; Bruno, G.; Conicella, V.; Di Giovanni, A.; Fawwaz, O.; Messina, M.; Candela, A.; Franchi, G.

2018-06-01

We present the performances and characterization of an array made of S13370-3050CN (VUV4 generation) Multi-Pixel Photon Counters manufactured by Hamamatsu and equipped with a low power consumption preamplifier operating at liquid xenon temperature (∼ 175 K). The electronics is designed for the readout of a matrix of maximum dimension of 8 × 8 individual photosensors and it is based on a single operational amplifier. The detector prototype presented in this paper utilizes the Analog Devices AD8011 current feedback operational amplifier, but other models can be used depending on the application. A biasing correction circuit has been implemented for the gain equalization of photosensors operating at different voltages. The results show single photon detection capability making this device a promising choice for future generation of large scale dark matter detectors based on liquid xenon, such as DARWIN.

Towards a new generation of pixel detector readout chips

CERN Document Server

Campbell, M; Ballabriga, R.; Frojdh, E.; Heijne, E.; Llopart, X.; Poikela, T.; Tlustos, L.; Valerio, P.; Wong, W.

2016-01-01

The Medipix3 Collaboration has broken new ground in spectroscopic X-ray imaging and in single particle detection and tracking. This paper will review briefly the performance and limitations of the present generation of pixel detector readout chips developed by the Collaboration. Through Silicon Via technology has the potential to provide a significant improvement in the tile- ability and more flexibility in the choice of readout architecture. This has been explored in the context of 3 projects with CEA-LETI using Medipix3 and Timepix3 wafers. The next generation of chips will aim to provide improved spectroscopic imaging performance at rates compatible with human CT. It will also aim to provide full spectroscopic images with unprecedented energy and spatial resolution. Some of the opportunities and challenges posed by moving to a more dense CMOS process will be discussed.

The FE-I4 Pixel Readout Chip and the IBL Module

Energy Technology Data Exchange (ETDEWEB)

Barbero, Marlon; Arutinov, David; Backhaus, Malte; Fang, Xiao-Chao; Gonella, Laura; Hemperek, Tomasz; Karagounis, Michael; Hans, Kruger; Kruth, Andre; Wermes, Norbert; /Bonn U.; Breugnon, Patrick; Fougeron, Denis; Gensolen, Fabrice; Menouni, Mohsine; Rozanov, Alexander; /Marseille, CPPM; Beccherle, Roberto; Darbo, Giovanni; /INFN, Genoa; Caminada, Lea; Dube, Sourabh; Fleury, Julien; Gnani, Dario; /LBL, Berkeley /NIKHEF, Amsterdam /Gottingen U. /SLAC

2012-05-01

FE-I4 is the new ATLAS pixel readout chip for the upgraded ATLAS pixel detector. Designed in a CMOS 130 nm feature size process, the IC is able to withstand higher radiation levels compared to the present generation of ATLAS pixel Front-End FE-I3, and can also cope with higher hit rate. It is thus suitable for intermediate radii pixel detector layers in the High Luminosity LHC environment, but also for the inserted layer at 3.3 cm known as the 'Insertable B-Layer' project (IBL), at a shorter timescale. In this paper, an introduction to the FE-I4 will be given, focusing on test results from the first full size FE-I4A prototype which has been available since fall 2010. The IBL project will be introduced, with particular emphasis on the FE-I4-based module concept.

The TDCpix readout ASIC: A 75 ps resolution timing front-end for the NA62 Gigatracker hybrid pixel detector

Energy Technology Data Exchange (ETDEWEB)

Kluge, A., E-mail: alexander.kluge@cern.ch; Aglieri Rinella, G.; Bonacini, S.; Jarron, P.; Kaplon, J.; Morel, M.; Noy, M.; Perktold, L.; Poltorak, K.

2013-12-21

The TDCpix is a novel pixel readout ASIC for the NA62 Gigatracker detector. NA62 is a new experiment being installed at the CERN Super Proton Synchrotron. Its Gigatracker detector shall provide on-beam tracking and time stamping of individual particles with a time resolution of 150 ps rms. It will consist of three tracking stations, each with one hybrid pixel sensor. The peak flow of particles crossing the detector modules reaches 1.27 MHz/mm{sup 2} for a total rate of about 0.75 GHz. Ten TDCpix chips will be bump-bonded to every silicon pixel sensor. Each chip shall perform time stamping of 100 M particle hits per second with a detection efficiency above 99% and a timing accuracy better than 200 ps rms for an overall three-station-setup time resolution of better than 150 ps. The TDCpix chip has been designed in a 130 nm CMOS technology. It will feature 45×40 square pixels of 300×300μm{sup 2} and a complex End of Column peripheral region including an array of TDCs based on DLLs, four high speed serializers, a low-jitter PLL, readout and control circuits. This contribution will describe the complete design of the final TDCpix ASIC. It will discuss design choices, the challenges faced and some of the lessons learned. Furthermore, experimental results from the testing of circuit prototypes will be presented. These demonstrate the achievement of key performance figures such as a time resolution of the processing chain of 75 ps rms with a laser sent to the center of the pixel and the capability of time stamping charged particles with an overall resolution below 200 ps rms. -- Highlights: • Feasibility demonstration of a silicon pixel detector with sub-ns time tagging capability. • Demonstrator detector assembly with a time resolution of 75 ps RMS with laser charge injection; 170 ps RMS with particle beam. • Design of trigger-less TDCpix ASIC with 1800 pixels, 720 TDC channels and 4 3.2 Gbit/s serializers.

SEU tolerant memory design for the ATLAS pixel readout chip

International Nuclear Information System (INIS)

Menouni, M; Barbero, M; Breugnon, P; Fougeron, D; Gensolen, F; Arutinov, D; Backhaus, M; Gonella, L; Hemperek, T; Karagounis, M; Beccherle, R; Darbo, G; Caminada, L; Dube, S; Fleury, J; Garcia-Sciveres, M; Gnani, D; Jensen, F; Gromov, V; Kluit, R

2013-01-01

The FE-I4 chip for the B-layer upgrade is designed in a 130 nm CMOS process. For this design, configuration memories are based on the DICE latches where layout considerations are followed to improve the tolerance to SEU. Tests have shown that DICE latches for which layout approaches are adopted are 30 times more tolerant to SEU than the standard DICE latches. To prepare for the new pixel readout chip planned for the future upgrades, a prototype chip containing 512 pixels has been designed in a 65 nm CMOS process and a new approach is adopted for SEU tolerant latches. Results in terms of SEU and TID tolerance are presented.

CMOS VLSI Active-Pixel Sensor for Tracking

Science.gov (United States)

Pain, Bedabrata; Sun, Chao; Yang, Guang; Heynssens, Julie

2004-01-01

An architecture for a proposed active-pixel sensor (APS) and a design to implement the architecture in a complementary metal oxide semiconductor (CMOS) very-large-scale integrated (VLSI) circuit provide for some advanced features that are expected to be especially desirable for tracking pointlike features of stars. The architecture would also make this APS suitable for robotic- vision and general pointing and tracking applications. CMOS imagers in general are well suited for pointing and tracking because they can be configured for random access to selected pixels and to provide readout from windows of interest within their fields of view. However, until now, the architectures of CMOS imagers have not supported multiwindow operation or low-noise data collection. Moreover, smearing and motion artifacts in collected images have made prior CMOS imagers unsuitable for tracking applications. The proposed CMOS imager (see figure) would include an array of 1,024 by 1,024 pixels containing high-performance photodiode-based APS circuitry. The pixel pitch would be 9 m. The operations of the pixel circuits would be sequenced and otherwise controlled by an on-chip timing and control block, which would enable the collection of image data, during a single frame period, from either the full frame (that is, all 1,024 1,024 pixels) or from within as many as 8 different arbitrarily placed windows as large as 8 by 8 pixels each. A typical prior CMOS APS operates in a row-at-a-time ( grolling-shutter h) readout mode, which gives rise to exposure skew. In contrast, the proposed APS would operate in a sample-first/readlater mode, suppressing rolling-shutter effects. In this mode, the analog readout signals from the pixels corresponding to the windows of the interest (which windows, in the star-tracking application, would presumably contain guide stars) would be sampled rapidly by routing them through a programmable diagonal switch array to an on-chip parallel analog memory array. The

Single-Readout High-Density Memristor Crossbar

KAUST Repository

Zidan, M. A.

2016-01-07

High-density memristor-crossbar architecture is a very promising technology for future computing systems. The simplicity of the gateless-crossbar structure is both its principal advantage and the source of undesired sneak-paths of current. This parasitic current could consume an enormous amount of energy and ruin the readout process. We introduce new adaptive-threshold readout techniques that utilize the locality and hierarchy properties of the computer-memory system to address the sneak-paths problem. The proposed methods require a single memory access per pixel for an array readout. Besides, the memristive crossbar consumes an order of magnitude less power than state-of-the-art readout techniques.

Single-Readout High-Density Memristor Crossbar

KAUST Repository

Zidan, M. A.; Omran, Hesham; Naous, Rawan; Salem, Ahmed Sultan; Fahmy, H. A. H.; Lu, W. D.; Salama, Khaled N.

2016-01-01

High-density memristor-crossbar architecture is a very promising technology for future computing systems. The simplicity of the gateless-crossbar structure is both its principal advantage and the source of undesired sneak-paths of current. This parasitic current could consume an enormous amount of energy and ruin the readout process. We introduce new adaptive-threshold readout techniques that utilize the locality and hierarchy properties of the computer-memory system to address the sneak-paths problem. The proposed methods require a single memory access per pixel for an array readout. Besides, the memristive crossbar consumes an order of magnitude less power than state-of-the-art readout techniques.

The TDCpix readout ASIC: A 75ps resolution timing front-end for the NA62 Gigatracker hybrid pixel detector

CERN Document Server

Kluge, A; Bonacini, S; Jarron, P; Kaplon, J; Morel, M; Noy, M; Perktold, L; Poltorak, K

2013-01-01

The TDCpix is a novel pixel readout ASIC for the NA62 Gigatracker detector. NA62 is a new experiment being installed at the CERN Super Proton Synchrotron. Its Gigatracker detector shall provide on-beam tracking and time stamping of individual particles with a time resolution of 150 ps rms. It will consist of three tracking stations, each with one hybrid pixel sensor. The peak fl ow of particles crossing the detector modules reaches 1.27 MHz/mm 2 for a total rate of about 0.75 GHz. Ten TDCpix chips will be bump-bonded to every silicon pixel sensor. Each chip shall perform time stamping of 100 M particle hits per second with a detection ef fi ciency above 99% and a timing accuracy better than 200 ps rms for an overall three-station-setup time resolution of better than 150 ps. The TDCpix chip has been designed in a 130 nm CMOS technology. It will feature 45 40 square pixels of 300 300 μ m 2 and a complex End of Column peripheral region including an array of TDCs based on DLLs, four high speed serializers, a low...

Wide field and diffraction limited array camera for SIRTF

International Nuclear Information System (INIS)

Fazio, G.G.; Koch, D.G.; Melnick, G.J.

1986-01-01

The Infrared Array Camera for the Space Infrared Telescope Facility (SIRTF/IRAC) is capable of two-dimensional photometry in either a wide field or diffraction-limited mode over the wavelength interval from 2 to 30 microns. Three different two-dimensional direct readout (DRO) array detectors are being considered: Band 1-InSb or Si:In (2-5 microns) 128 x 128 pixels, Band 2-Si:Ga (5-18 microns) 64 x 64 pixels, and Band 3-Si:Sb (18-30 microns) 64 x 64 pixels. The hybrid DRO readout architecture has the advantages of low read noise, random pixel access with individual readout rates, and nondestructive readout. The scientific goals of IRAC are discussed, which are the basis for several important requirements and capabilities of the array camera: (1) diffraction-limited resolution from 2-30 microns, (2) use of the maximum unvignetted field of view of SIRTF, (3) simultaneous observations within the three infrared spectral bands, and (4) the capability for broad and narrow bandwidth spectral resolution. A strategy has been developed to minimize the total electronic and environmental noise sources to satisfy the scientific requirements. 7 references

The FPGA Pixel Array Detector

International Nuclear Information System (INIS)

Hromalik, Marianne S.; Green, Katherine S.; Philipp, Hugh T.; Tate, Mark W.; Gruner, Sol M.

2013-01-01

A proposed design for a reconfigurable x-ray Pixel Array Detector (PAD) is described. It operates by integrating a high-end commercial field programmable gate array (FPGA) into a 3-layer device along with a high-resistivity diode detection layer and a custom, application-specific integrated circuit (ASIC) layer. The ASIC layer contains an energy-discriminating photon-counting front end with photon hits streamed directly to the FPGA via a massively parallel, high-speed data connection. FPGA resources can be allocated to perform user defined tasks on the pixel data streams, including the implementation of a direct time autocorrelation function (ACF) with time resolution down to 100 ns. Using the FPGA at the front end to calculate the ACF reduces the required data transfer rate by several orders of magnitude when compared to a fast framing detector. The FPGA-ASIC high-speed interface, as well as the in-FPGA implementation of a real-time ACF for x-ray photon correlation spectroscopy experiments has been designed and simulated. A 16×16 pixel prototype of the ASIC has been fabricated and is being tested. -- Highlights: ► We describe the novelty and need for the FPGA Pixel Array Detector. ► We describe the specifications and design of the Diode, ASIC and FPGA layers. ► We highlight the Autocorrelation Function (ACF) for speckle as an example application. ► Simulated FPGA output calculates the ACF for different input bitstreams to 100 ns. ► Reduced data transfer rate by 640× and sped up real-time ACF by 100× other methods.

Development and simulation results of a sparsification and readout circuit for wide pixel matrices

International Nuclear Information System (INIS)

Gabrielli, A.; Giorgi, F.; Morsani, F.; Villa, M.

2011-01-01

In future collider experiments, the increasing luminosity and centre of mass energy are rising challenging problems in the design of new inner tracking systems. In this context we develop high-efficiency readout architectures for large binary pixel matrices that are meant to cope with the high-stressing conditions foreseen in the innermost layers of a tracker [The SuperB Conceptual Design Report, INFN/AE-07/02, SLAC-R-856, LAL 07-15, Available online at: (http://www.pi.infn.it/SuperB)]. We model and design digital readout circuits to be integrated on VLSI ASICs. These architectures can be realized with different technology processes and sensors: they can be implemented on the same silicon sensor substrate of a CMOS MAPS devices (Monolithic Active Pixel Sensor), on the CMOS tier of a hybrid pixel sensor or in a 3D chip where the digital layer is stacked on the sensor and the analog layers [V. Re et al., Nuc. Instr. and Meth. in Phys. Res. A, (doi:10.1016/j.nima.2010.05.039)]. In the presented work, we consider a data-push architecture designed for a sensor matrix of an area of about 1.3 cm 2 with a pitch of 50 microns. The readout circuit tries to take great advantage of the high density of in-pixel digital logic allowed by vertical integration. We aim at sustaining a rate density of 100 Mtrack . s -1 . cm -2 with a temporal resolution below 1 μs. We show how this architecture can cope with these stressing conditions presenting the results of Monte Carlo simulations.

Development and simulation results of a sparsification and readout circuit for wide pixel matrices

Energy Technology Data Exchange (ETDEWEB)

Gabrielli, A.; Giorgi, F. [University and INFN of Bologna (Italy); Morsani, F. [University and INFN of Pisa (Italy); Villa, M. [University and INFN of Bologna (Italy)

2011-06-15

In future collider experiments, the increasing luminosity and centre of mass energy are rising challenging problems in the design of new inner tracking systems. In this context we develop high-efficiency readout architectures for large binary pixel matrices that are meant to cope with the high-stressing conditions foreseen in the innermost layers of a tracker [The SuperB Conceptual Design Report, INFN/AE-07/02, SLAC-R-856, LAL 07-15, Available online at: (http://www.pi.infn.it/SuperB)]. We model and design digital readout circuits to be integrated on VLSI ASICs. These architectures can be realized with different technology processes and sensors: they can be implemented on the same silicon sensor substrate of a CMOS MAPS devices (Monolithic Active Pixel Sensor), on the CMOS tier of a hybrid pixel sensor or in a 3D chip where the digital layer is stacked on the sensor and the analog layers [V. Re et al., Nuc. Instr. and Meth. in Phys. Res. A, (doi:10.1016/j.nima.2010.05.039)]. In the presented work, we consider a data-push architecture designed for a sensor matrix of an area of about 1.3 cm{sup 2} with a pitch of 50 microns. The readout circuit tries to take great advantage of the high density of in-pixel digital logic allowed by vertical integration. We aim at sustaining a rate density of 100 Mtrack . s{sup -1} . cm{sup -2} with a temporal resolution below 1 {mu}s. We show how this architecture can cope with these stressing conditions presenting the results of Monte Carlo simulations.

Development of Micromegas-like gaseous detectors using a pixel readout chip as collecting anode

International Nuclear Information System (INIS)

Chefdeville, M.

2009-01-01

This thesis reports on the fabrication and test of a new gaseous detector with a very large number of readout channels. This detector is intended for measuring the tracks of charged particles with an unprecedented sensitivity to single electrons of almost 100 %. It combines a metal grid for signal amplification called the Micromegas with a pixel readout chip as signal collecting anode and is dubbed GridPix. GridPix is a potential candidate for a sub-detector at a future electron linear collider (ILC) foreseen to work in parallel with the LHC around 2020--2030. The tracking capability of GridPix is best exploited if the Micromegas is integrated on the pixel chip. This integrated grid is called InGrid and is precisely fabricated by wafer post-processing. The various steps of the fabrication process and the measurements of its gain, energy resolution and ion back-flow property are reported in this document. Studies of the response of the complete detector formed by an InGrid and a TimePix pixel chip to X-rays and cosmic particles are also presented. In particular, the efficiency for detecting single electrons and the point resolution in the pixel plane are measured. Implications for a GridPix detector at ILC are discussed. (author)

CMOS Active-Pixel Image Sensor With Simple Floating Gates

Science.gov (United States)

Fossum, Eric R.; Nakamura, Junichi; Kemeny, Sabrina E.

1996-01-01

Experimental complementary metal-oxide/semiconductor (CMOS) active-pixel image sensor integrated circuit features simple floating-gate structure, with metal-oxide/semiconductor field-effect transistor (MOSFET) as active circuit element in each pixel. Provides flexibility of readout modes, no kTC noise, and relatively simple structure suitable for high-density arrays. Features desirable for "smart sensor" applications.

256-pixel microcalorimeter array for high-resolution γ-ray spectroscopy of mixed-actinide materials

Energy Technology Data Exchange (ETDEWEB)

Winkler, R., E-mail: rwinkler@lanl.gov [Los Alamos National Laboratory, Los Alamos, NM (United States); Hoover, A.S.; Rabin, M.W. [Los Alamos National Laboratory, Los Alamos, NM (United States); Bennett, D.A.; Doriese, W.B.; Fowler, J.W.; Hays-Wehle, J.; Horansky, R.D.; Reintsema, C.D.; Schmidt, D.R.; Vale, L.R.; Ullom, J.N. [National Institute of Standards and Technology, Boulder, CO (United States)

2015-01-11

The application of cryogenic microcalorimeter detectors to γ-ray spectroscopy allows for measurements with unprecedented energy resolution. These detectors are ideally suited for γ-ray spectroscopy applications for which the measurement quality is limited by the spectral overlap of many closely spaced transitions using conventional detector technologies. The non-destructive analysis of mixed-isotope Pu materials is one such application where the precision can be potentially improved utilizing microcalorimeter detectors compared to current state-of-the-art high-purity Ge detectors (HPGe). The LANL-NIST γ-ray spectrometer, a 256-pixel microcalorimeter array based on transition-edge sensors (TESs), was recently commissioned and used to collect data on a variety of Pu isotopic standards to characterize the instrument performance. These measurements represent the first time the simultaneous readout of all 256 pixels for measurements of mixed-isotope Pu materials has been achieved. The LANL-NIST γ-ray spectrometer has demonstrated an average pixel resolution of 55 eV full-width-at-half-maximum at 100 keV, nearly an order of magnitude better than HPGe detectors. Some challenges of the analysis of many-channel ultra-high resolution data and the techniques used to produce quality spectra for isotopic analysis will be presented. The LANL-NIST γ-ray spectrometer has also demonstrated stable operation and obtained high resolution measurements at total array event rates beyond 1 kHz. For a total event rate of 1.25 kHz, approximately 5.6 cps/pixel, a 72.2 eV average FWHM for the 103 keV photopeak of {sup 153}Gd was achieved.

Active pixel sensor pixel having a photodetector whose output is coupled to an output transistor gate

Science.gov (United States)

Fossum, Eric R. (Inventor); Nakamura, Junichi (Inventor); Kemeny, Sabrina E. (Inventor)

2005-01-01

An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node. There is also a readout circuit, part of which can be disposed at the bottom of each column of cells and be common to all the cells in the column. A Simple Floating Gate (SFG) pixel structure could also be employed in the imager to provide a non-destructive readout and smaller pixel sizes.

Realistic full wave modeling of focal plane array pixels.

Energy Technology Data Exchange (ETDEWEB)

Campione, Salvatore [Sandia National Laboratories (SNL-NM), Albuquerque, NM (United States). Electromagnetic Theory Dept.; Warne, Larry K. [Sandia National Laboratories (SNL-NM), Albuquerque, NM (United States). Electromagnetic Theory Dept.; Jorgenson, Roy E. [Sandia National Laboratories (SNL-NM), Albuquerque, NM (United States). Electromagnetic Theory Dept.; Davids, Paul [Sandia National Laboratories (SNL-NM), Albuquerque, NM (United States). Applied Photonic Microsystems Dept.; Peters, David W. [Sandia National Laboratories (SNL-NM), Albuquerque, NM (United States). Applied Photonic Microsystems Dept.

2017-11-01

Here, we investigate full-wave simulations of realistic implementations of multifunctional nanoantenna enabled detectors (NEDs). We focus on a 2x2 pixelated array structure that supports two wavelengths of operation. We design each resonating structure independently using full-wave simulations with periodic boundary conditions mimicking the whole infinite array. We then construct a supercell made of a 2x2 pixelated array with periodic boundary conditions mimicking the full NED; in this case, however, each pixel comprises 10-20 antennas per side. In this way, the cross-talk between contiguous pixels is accounted for in our simulations. We observe that, even though there are finite extent effects, the pixels work as designed, each responding at the respective wavelength of operation. This allows us to stress that realistic simulations of multifunctional NEDs need to be performed to verify the design functionality by taking into account finite extent and cross-talk effects.

submitter Development of the readout for the IBL upgrade project of the ATLAS Pixel Detector

CERN Document Server

Krieger, Nina

The LHC luminosity is upgraded in several phases until 2022. The resulting higher occupancy degrades the detector performance of the current Pixel Detector. To provide a good performance during the LHC luminosity upgrade, a fourth pixel layer is inserted into the existing ATLAS Pixel Detector. A new FE-I4 readout chip and a new data acquisition chain are required to cope with the higher track rate and the resulting increased bandwidth. Among others, this includes a new readout board: the IBL ROD. One component of this board is the DSP which creates commands for the FE-I4 chip and has to be upgraded as well. In this thesis, the first tests of the IBL ROD prototype are presented. A correct communication of the DSP to its external memory is verified. Moreover, the implementations for an IBL DSP code are described and tested. This includes the first configuration of the FE-I4 with an IBL ROD. In addition, a working communication with the Histogrammer SDRAM and the Input FIFO on the IBL ROD are demonstrated.

The Layer 1 / Layer 2 readout upgrade for the ATLAS Pixel Detector

CERN Document Server

Mullier, Geoffrey; The ATLAS collaboration

2016-01-01

The Pixel Detector of the ATLAS experiment has shown excellent performance during the whole Run-1 of the Large Hadron Collider (LHC). The increase of instantaneous luminosity foreseen during the LHC Run 2, will lead to an increased detector occupancy that is expected to saturate the readout links of the outermost layers of the pixel detector: Layers 1 and 2. To ensure a smooth data taking under such conditions, the read out system of the recently installed fourth innermost pixel layer, the Insertable B-Layer, was modified to accomodate the needs of the older detector. The Layer 2 upgrade installation took place during the 2015 winter shutdown, with the Layer 1 installation scheduled for 2016. A report of the successful installation, together with the design of novel dedicated optical to electrical converters and the software and firmware updates will be presented.

High resolution phoswich gamma-ray imager utilizing monolithic MPPC arrays with submillimeter pixelized crystals

Science.gov (United States)

Kato, T.; Kataoka, J.; Nakamori, T.; Kishimoto, A.; Yamamoto, S.; Sato, K.; Ishikawa, Y.; Yamamura, K.; Kawabata, N.; Ikeda, H.; Kamada, K.

2013-05-01

We report the development of a high spatial resolution tweezers-type coincidence gamma-ray camera for medical imaging. This application consists of large-area monolithic Multi-Pixel Photon Counters (MPPCs) and submillimeter pixelized scintillator matrices. The MPPC array has 4 × 4 channels with a three-side buttable, very compact package. For typical operational gain of 7.5 × 105 at + 20 °C, gain fluctuation over the entire MPPC device is only ± 5.6%, and dark count rates (as measured at the 1 p.e. level) amount to acrylic light guide measuring 1 mm thick, and with summing operational amplifiers that compile the signals into four position-encoded analog outputs being used for signal readout. Spatial resolution of 1.1 mm was achieved with the coincidence imaging system using a 22Na point source. These results suggest that the gamma-ray imagers offer excellent potential for applications in high spatial medical imaging.

High resolution phoswich gamma-ray imager utilizing monolithic MPPC arrays with submillimeter pixelized crystals

International Nuclear Information System (INIS)

Kato, T; Kataoka, J; Nakamori, T; Kishimoto, A; Yamamoto, S; Sato, K; Ishikawa, Y; Yamamura, K; Kawabata, N; Ikeda, H; Kamada, K

2013-01-01

We report the development of a high spatial resolution tweezers-type coincidence gamma-ray camera for medical imaging. This application consists of large-area monolithic Multi-Pixel Photon Counters (MPPCs) and submillimeter pixelized scintillator matrices. The MPPC array has 4 × 4 channels with a three-side buttable, very compact package. For typical operational gain of 7.5 × 10 5 at + 20 °C, gain fluctuation over the entire MPPC device is only ± 5.6%, and dark count rates (as measured at the 1 p.e. level) amount to ≤ 400 kcps per channel. We selected Ce-doped (Lu,Y) 2 (SiO 4 )O (Ce:LYSO) and a brand-new scintillator, Ce-doped Gd 3 Al 2 Ga 3 O 12 (Ce:GAGG) due to their high light yield and density. To improve the spatial resolution, these scintillators were fabricated into 15 × 15 matrices of 0.5 × 0.5 mm 2 pixels. The Ce:LYSO and Ce:GAGG scintillator matrices were assembled into phosphor sandwich (phoswich) detectors, and then coupled to the MPPC array along with an acrylic light guide measuring 1 mm thick, and with summing operational amplifiers that compile the signals into four position-encoded analog outputs being used for signal readout. Spatial resolution of 1.1 mm was achieved with the coincidence imaging system using a 22 Na point source. These results suggest that the gamma-ray imagers offer excellent potential for applications in high spatial medical imaging.

Photon counting arrays for AO wavefront sensors

CERN Document Server

Vallerga, J; McPhate, J; Mikulec, Bettina; Clark, Allan G; Siegmund, O; CERN. Geneva

2005-01-01

Future wavefront sensors for AO on large telescopes will require a large number of pixels and must operate at high frame rates. Unfortunately for CCDs, there is a readout noise penalty for operating faster, and this noise can add up rather quickly when considering the number of pixels required for the extended shape of a sodium laser guide star observed with a large telescope. Imaging photon counting detectors have zero readout noise and many pixels, but have suffered in the past with low QE at the longer wavelengths (>500 nm). Recent developments in GaAs photocathode technology, CMOS ASIC readouts and FPGA processing electronics have resulted in noiseless WFS detector designs that are competitive with silicon array detectors, though at ~40% the QE of CCDs. We review noiseless array detectors and compare their centroiding performance with CCDs using the best available characteristics of each. We show that for sub-aperture binning of 6x6 and greater that noiseless detectors have a smaller centroid error at flu...

A Readout Integrated Circuit (ROIC) employing self-adaptive background current compensation technique for Infrared Focal Plane Array (IRFPA)

Science.gov (United States)

Zhou, Tong; Zhao, Jian; He, Yong; Jiang, Bo; Su, Yan

2018-05-01

A novel self-adaptive background current compensation circuit applied to infrared focal plane array is proposed in this paper, which can compensate the background current generated in different conditions. Designed double-threshold detection strategy is to estimate and eliminate the background currents, which could significantly reduce the hardware overhead and improve the uniformity among different pixels. In addition, the circuit is well compatible to various categories of infrared thermo-sensitive materials. The testing results of a 4 × 4 experimental chip showed that the proposed circuit achieves high precision, wide application and high intelligence. Tape-out of the 320 × 240 readout circuit, as well as the bonding, encapsulation and imaging verification of uncooled infrared focal plane array, have also been completed.

Readout ASIC for ILC-FPCCD vertex detector

International Nuclear Information System (INIS)

Takubo, Yosuke; Miyamoto, Akiya; Ikeda, Hirokazu; Yamamoto, Hitoshi; Itagaki, Kennosuke; Nagamine, Tadashi; Sugimoto, Yasuhiro

2010-01-01

The concept of FPCCD (Fine Pixel CCD) whose pixel size is 5x5μm 2 has been proposed as vertex detector at ILC. Since FPCCD has 128 x20,000 pixels in one readout channel, its readout poses a considerable challenge. We have developed a prototype of readout ASIC to readout the large number of pixels during the inter-train gap of the ILC beam. In this paper, we report the design and performance of the readout ASIC.

The 160 TES bolometer read-out using FDM for SAFARI

Science.gov (United States)

Hijmering, R. A.; den Hartog, R. H.; van der Linden, A. J.; Ridder, M.; Bruijn, M. P.; van der Kuur, J.; van Leeuwen, B. J.; van Winden, P.; Jackson, B.

2014-07-01

For the read out of the Transition Edge Sensors (TES) bolometer arrays of the SAFARI instrument on the Japanese background-limited far-IR SPICA mission SRON is developing a Frequency Domain Multiplexing (FDM) read-out system. The next step after the successful demonstration of the read out of 38 TES bolometers using FDM was to demonstrate the FDM readout of the required 160 TES bolometers. Of the 160 LC filter and TES bolometer chains 151 have been connected and after cooldown 148 of the resonances could be identified. Although initial operation and locking of the pixels went smoothly the experiment revealed several complications. In this paper we describe the 160 pixel FDM set-up, show the results and discuss the issues faced during operation of the 160 pixel FDM experiment.

32 x 16 CMOS smart pixel array for optical interconnects

Science.gov (United States)

Kim, Jongwoo; Guilfoyle, Peter S.; Stone, Richard V.; Hessenbruch, John M.; Choquette, Kent D.; Kiamilev, Fouad E.

2000-05-01

Free space optical interconnects can increase throughput capacities and eliminate much of the energy consumption required for `all electronic' systems. High speed optical interconnects can be achieved by integrating optoelectronic devices with conventional electronics. Smart pixel arrays have been developed which use optical interconnects. An individual smart pixel cell is composed of a vertical cavity surface emitting laser (VCSEL), a photodetector, an optical receiver, a laser driver, and digital logic circuitry. Oxide-confined VCSELs are being developed to operate at 850 nm with a threshold current of approximately 1 mA. Multiple quantum well photodetectors are being fabricated from AlGaAs for use with the 850 nm VCSELs. The VCSELs and photodetectors are being integrated with complementary metal oxide semiconductor (CMOS) circuitry using flip-chip bonding. CMOS circuitry is being integrated with a 32 X 16 smart pixel array. The 512 smart pixels are serially linked. Thus, an entire data stream may be clocked through the chip and output electrically by the last pixel. Electrical testing is being performed on the CMOS smart pixel array. Using an on-chip pseudo random number generator, a digital data sequence was cycled through the chip verifying operation of the digital circuitry. Although, the prototype chip was fabricated in 1.2 micrometers technology, simulations have demonstrated that the array can operate at 1 Gb/s per pixel using 0.5 micrometers technology.

Optimization of a large-area detector-block based on SiPM and pixelated LYSO crystal arrays.

Science.gov (United States)

Calva-Coraza, E; Alva-Sánchez, H; Murrieta-Rodríguez, T; Martínez-Dávalos, A; Rodríguez-Villafuerte, M

2017-10-01

We present the performance evaluation of a large-area detector module based on the ArrayC-60035-64P, an 8×8 array of tileable, 7.2mm pitch, silicon photomultipliers (SiPM) by SensL, covering a total area of 57.4mm×57.4mm. We characterized the ArrayC-60035-64P, operating at room temperature, using LYSO pixelated crystal arrays of different pitch sizes (1.075, 1.430, 1.683, 2.080 and 2.280mm) to determine the resolvable crystal size. After an optimization process, a 7mm thick coupling light guide was used for all crystal pitches. To identify the interaction position a 16-channel (8 columns, 8 rows) symmetric charge division (SCD) readout board together with a center-of-gravity algorithm was used. Based on this, we assembled the detector modules using a 40×40 LYSO, 1.43mm pitch array, covering the total detector area. Calibration was performed using a 137 Cs source resulting in excellent crystal maps with minor geometric distortion, a mean 4.1 peak-to-valley ratio and 9.6% mean energy resolution for 662keV photons in the central region. The resolvability index was calculated in the x and y directions with values under 0.42 in all cases. We show that these large area SiPM arrays, combined with a 16-channel SCD readout board, can offer high spatial resolution, without processing a big number of signals, attaining excellent energy resolution and detector uniformity. Copyright © 2017 Associazione Italiana di Fisica Medica. Published by Elsevier Ltd. All rights reserved.

Point-source reconstruction with a sparse light-sensor array for optical TPC readout

International Nuclear Information System (INIS)

Rutter, G; Richards, M; Bennieston, A J; Ramachers, Y A

2011-01-01

A reconstruction technique for sparse array optical signal readout is introduced and applied to the generic challenge of large-area readout of a large number of point light sources. This challenge finds a prominent example in future, large volume neutrino detector studies based on liquid argon. It is concluded that the sparse array option may be ruled out for reasons of required number of channels when compared to a benchmark derived from charge readout on wire-planes. Smaller-scale detectors, however, could benefit from this technology.

Fast readout logic interfacing a 256-pixel matrix of a dual-layer 3D device

International Nuclear Information System (INIS)

Gabrielli, A; Giorgi, F; Villa, M; Morsani, F

2010-01-01

A prototype of a 3D ASIC built up of a fast readout architecture, with sparsification capabilities, which interfaces with a matrix of a 256-pixel sensor, was recently submitted. The chosen technology is CMOS Chartered 130 nm as it is compatible with the Tezzaron facility to interconnect face-to-face two silicon wafers allowing for a vertical integration structure by means of through-silicon-vias. Particularly, the readout logic uses one layer that will be stacked on a sensor layer at the end of the fabrication process.

Fast readout logic interfacing a 256-pixel matrix of a dual-layer 3D device

Energy Technology Data Exchange (ETDEWEB)

Gabrielli, A; Giorgi, F; Villa, M [INFN-Bologna and Physics Department, University of Bologna, Viale Berti Pichat, 6/2, 40127, Bologna (Italy); Morsani, F, E-mail: alessandro.gabrielli@bo.infn.i [INFN-Pisa and University of Pisa, Largo B. Pontecorvo, 3, 56127, Pisa (Italy)

2010-07-15

A prototype of a 3D ASIC built up of a fast readout architecture, with sparsification capabilities, which interfaces with a matrix of a 256-pixel sensor, was recently submitted. The chosen technology is CMOS Chartered 130 nm as it is compatible with the Tezzaron facility to interconnect face-to-face two silicon wafers allowing for a vertical integration structure by means of through-silicon-vias. Particularly, the readout logic uses one layer that will be stacked on a sensor layer at the end of the fabrication process.

Four-layer DOI PET detectors using a multi-pixel photon counter array and the light sharing method

Energy Technology Data Exchange (ETDEWEB)

Nishikido, Fumihiko, E-mail: funis@nirs.go.jp; Inadama, Naoko; Yoshida, Eiji; Murayama, Hideo; Yamaya, Taiga

2013-11-21

Silicon photomultipliers (SiPMs) provide many advantages for PET detectors, such as their high internal gain, high photon detection efficiency and insensitivity to magnetic fields. The number of detectable scintillation photons of SiPMs, however, is limited by the number of microcells. Therefore, pulse height of PET detectors using SiPMs is saturated when large numbers of scintillation photons enter the SiPM pixels. On the other hand, we previously presented a depth-of-interaction (DOI) encoding method that is based on the light sharing method. Since our encoding method detects scintillation photons with multiple readout pixels, the saturation effect can be suppressed. We constructed two prototype four-layer DOI detectors using a SiPM array and evaluated their performances. The two prototype detectors consisted of four layers of a 6×6 array of Lu{sub 2(1−x)}Y{sub 2x}SiO{sub 5} (LYSO) crystals and a SiPM (multi-pixel photon detector, MPPC, Hamamatsu Photonics K.K.) array of 4×4 pixels. The size of each LYSO crystal element was 1.46 mm×1.46 mm×4.5 mm and all surfaces of the crystal elements were chemically etched. We used two types of MPPCs. The first one had 3600 microcells and high photon detection efficiency (PDE). The other one had 14,400 microcells and lower PDE. In the evaluation experiment, all the crystals of the detector using the MPPC which had the high PDE were clearly identified. The respective energy and timing resolutions of lower than 15% and 1.0 ns were achieved for each crystal element. No saturation of output signals was observed in the 511 keV energy region due to suppression of the saturation effect by detecting scintillation photons with several MPPC pixels by the light sharing method. -- Highlights: •We constructed and evaluated four-layer DOI detectors by the light sharing method using a MPPC array. •The detectors using two types of the MPPC array were compared. •The energy and timing resolutions of lower than 15% and 1.0 ns were

Four-layer DOI PET detectors using a multi-pixel photon counter array and the light sharing method

International Nuclear Information System (INIS)

Nishikido, Fumihiko; Inadama, Naoko; Yoshida, Eiji; Murayama, Hideo; Yamaya, Taiga

2013-01-01

Silicon photomultipliers (SiPMs) provide many advantages for PET detectors, such as their high internal gain, high photon detection efficiency and insensitivity to magnetic fields. The number of detectable scintillation photons of SiPMs, however, is limited by the number of microcells. Therefore, pulse height of PET detectors using SiPMs is saturated when large numbers of scintillation photons enter the SiPM pixels. On the other hand, we previously presented a depth-of-interaction (DOI) encoding method that is based on the light sharing method. Since our encoding method detects scintillation photons with multiple readout pixels, the saturation effect can be suppressed. We constructed two prototype four-layer DOI detectors using a SiPM array and evaluated their performances. The two prototype detectors consisted of four layers of a 6×6 array of Lu 2(1−x) Y 2x SiO 5 (LYSO) crystals and a SiPM (multi-pixel photon detector, MPPC, Hamamatsu Photonics K.K.) array of 4×4 pixels. The size of each LYSO crystal element was 1.46 mm×1.46 mm×4.5 mm and all surfaces of the crystal elements were chemically etched. We used two types of MPPCs. The first one had 3600 microcells and high photon detection efficiency (PDE). The other one had 14,400 microcells and lower PDE. In the evaluation experiment, all the crystals of the detector using the MPPC which had the high PDE were clearly identified. The respective energy and timing resolutions of lower than 15% and 1.0 ns were achieved for each crystal element. No saturation of output signals was observed in the 511 keV energy region due to suppression of the saturation effect by detecting scintillation photons with several MPPC pixels by the light sharing method. -- Highlights: •We constructed and evaluated four-layer DOI detectors by the light sharing method using a MPPC array. •The detectors using two types of the MPPC array were compared. •The energy and timing resolutions of lower than 15% and 1.0 ns were achieved for

Results of FE65-P2 Pixel Readout Test Chip for High Luminosity LHC Upgrades

CERN Document Server

AUTHOR|(SzGeCERN)394193

2016-01-01

A pixel readout test chip called FE65-P2 has been fabricated on 65 nm CMOS technology. FE65-P2 contains a matrix of 64 x 64 pixels on 50 micron by 50 micron pitch, designed to read out a bump bonded sensor. The goals of FE65-P2 are to demonstrate excellent analog performance isolated from digital activity well enough to achieve 500 electron stable threshold, be radiation hard to at least 500 Mrad, and prove the novel concept of isolated analog front ends embedded in a flat digital design, dubbed “analog islands in a digital sea”. Experience from FE65-P2 and hybrid assemblies will be applied to the design for a large format readout chip, called RD53A, to be produced in a wafer run in early 2017 by the RD53 collaboration. We review the case for 65 nm technology and report on threshold stability test results for the FE65-P2.

Fully integrated CMOS pixel detector for high energy particles

International Nuclear Information System (INIS)

Vanstraelen, G.; Debusschere, I.; Claeys, C.; Declerck, G.

1989-01-01

A novel type of position and energy sensitive, monolithic pixel array with integrated readout electronics is proposed. Special features of the design are a reduction of the number of output channels and of the amount of output data, and the use of transistors on the high resistivity silicon. The number of output channels for the detector array is reduced by handling in parallel a number of pixels, chosen as a function of the time resolution required for the system, and by the use of an address decoder. A further reduction of data is achieved by reading out only those pixels which have been activated. The pixel detector circuit will be realized in a 3 μm p-well CMOS process, which is optimized for the full integration of readout electronics and detector diodes on high resistivity Si. A retrograde well is formed by means of a high energy implantation, followed by the appropriate temperature steps. The optimization of the well shape takes into account the high substrate bias applied during the detector operation. The design is largely based on the use of MOS transistors on the high resistivity silicon itself. These have proven to perform as well as transistors on standard doped substrate. The basic building elements as well as the design strategy of the integrated pixel detector are presented in detail. (orig.)

Faraday Cup Array Integrated with a Readout IC and Method for Manufacture Thereof

Science.gov (United States)

Temple, Dorota (Inventor); Bower, Christopher A. (Inventor); Hedgepath Gilchrist, Kristin (Inventor); Stoner, Brian R. (Inventor)

2014-01-01

A detector array and method for making the detector array. The array includes a substrate including a plurality of trenches formed therein, and includes a plurality of collectors electrically isolated from each other, formed on the walls of the trenches, and configured to collect charge particles incident on respective ones of the collectors and to output from said collectors signals indicative of charged particle collection. The array includes a plurality of readout circuits disposed on a side of the substrate opposite openings to the collectors. The readout circuits are configured to read charge collection signals from respective ones of the plurality of collectors.

Development of HgCdTe large format MBE arrays and noise-free high speed MOVPE EAPD arrays for ground based NIR astronomy

Science.gov (United States)

Finger, G.; Baker, I.; Downing, M.; Alvarez, D.; Ives, D.; Mehrgan, L.; Meyer, M.; Stegmeier, J.; Weller, H. J.

2017-11-01

Large format near infrared HgCdTe 2Kx2K and 4Kx4K MBE arrays have reached a level of maturity which meets most of the specifications required for near infrared (NIR) astronomy. The only remaining problem is the persistence effect which is device specific and not yet fully under control. For ground based multi-object spectroscopy on 40 meter class telescopes larger pixels would be advantageous. For high speed near infrared fringe tracking and wavefront sensing the only way to overcome the CMOS noise barrier is the amplification of the photoelectron signal inside the infrared pixel by means of the avalanche gain. A readout chip for a 320x256 pixel HgCdTe eAPD array will be presented which has 32 parallel video outputs being arranged in such a way that the full multiplex advantage is also available for small sub-windows. In combination with the high APD gain this allows reducing the readout noise to the subelectron level by applying nondestructive readout schemes with subpixel sampling. Arrays grown by MOVPE achieve subelectron readout noise and operate with superb cosmetic quality at high APD gain. Efforts are made to reduce the dark current of those arrays to make this technology also available for large format focal planes of NIR instruments offering noise free detectors for deep exposures. The dark current of the latest MOVPE eAPD arrays is already at a level adequate for noiseless broad and narrow band imaging in scientific instruments.

Optical readout and control interface for the BTeV pixel vertex detector

CERN Document Server

Vergara-Limon, S; Sheaff, M; Vargas, M A

2002-01-01

Optical links will be used for sending data back and forth from the counting room to the detector in the data acquisition systems for future high energy physics experiments, including ATLAS and CMS in the LHC at CERN (Switzerland) and BTeV at Fermilab (USA). This is because they can be ultra-high speed and are relatively immune to electro-magnetic interference (EMI). The baseline design for the BTeV Pixel Vertex Detector includes two types of optical link, one to control and monitor and the other to read out the hit data from the multi-chip modules on each half-plane of the detector. The design and performance of the first prototype of the Optical Readout and Control Interface for the BTeV Pixel Vertex Detector is described.

Fine pitch and low material readout bus in the Silicon Pixel Vertex Tracker for the PHENIX Vertex Tracker upgrade

International Nuclear Information System (INIS)

Fujiwara, Kohei

2010-01-01

The construction of the Silicon Pixel Detector is starting in spring 2009 as project of the RHIC-PHENIX Silicon Vertex Tracker (VTX) upgrade at the Brookhaven National Laboratory. For the construction, we have developed a fine pitch and low material readout bus as the backbone parts of the VTX. In this article, we report the development and production of the readout bus.

Gossipo-3 A prototype of a Front-End Pixel Chip for Read-Out of Micro-Pattern Gas Detectors

CERN Document Server

Brezina, Christpoh; van der Graaf, Haryy; Gromov, Vladimir; Kluit, Ruud; Kruth, Andre; Zappon, Francesco

2009-01-01

In a joint effort of Nikhef (Amsterdam) and the University of Bonn, the Gossipo-3 integrated circuit (IC) has been developed. This circuit is a prototype of a chip dedicated for read-out of various types of position sensitive Micro-Pattern Gas detectors (MPGD). The Gossipo-3 is defined as a set of building blocks to be used in a future highly granulated (60 μm) chip. The pixel circuit can operate in two modes. In Time mode every readout pixel measures the hit arrival time and the charge deposit. For this purpose it has been equipped with a high resolution TDC (1.7 ns) covering dynamic range up to 102 μs. Charge collected by the pixel will be measured using Time-over- Threshold method in the range from 400 e- to 28000 e- with accuracy of 200 e- (standard deviation). In Counting mode every pixel operates as a 24-bit counter, counting the number of incoming hits. The circuit is also optimized to operate at low power consumption (100 mW/cm2) that is required to avoid the need for massive power transport and coo...

Three-dimensional cross point readout detector design for including depth information

Science.gov (United States)

Lee, Seung-Jae; Baek, Cheol-Ha

2018-04-01

We designed a depth-encoding positron emission tomography (PET) detector using a cross point readout method with wavelength-shifting (WLS) fibers. To evaluate the characteristics of the novel detector module and the PET system, we used the DETECT2000 to perform optical photon transport in the crystal array. The GATE was also used. The detector module is made up of four layers of scintillator arrays, the five layers of WLS fiber arrays, and two sensor arrays. The WLS fiber arrays in each layer cross each other to transport light to each sensor array. The two sensor arrays are coupled to the forward and left sides of the WLS fiber array, respectively. The identification of three-dimensional pixels was determined using a digital positioning algorithm. All pixels were well decoded, with the system resolution ranging from 2.11 mm to 2.29 mm at full width at half maximum (FWHM).

A pixel read-out architecture implementing a two-stage token ring, zero suppression and compression

International Nuclear Information System (INIS)

Heuvelmans, S; Boerrigter, M

2011-01-01

Increasing luminosity in high energy physics experiments leads to new challenges in the design of data acquisition systems for pixel detectors. With the upgrade of the LHCb experiment, the data processing will be changed; hit data from every collision will be transported off the pixel chip, without any trigger selection. A read-out architecture is proposed which is able to obtain low hit data loss on limited silicon area by using the logic beneath the pixels as a data buffer. Zero suppression and redundancy reduction ensure that the data rate off chip is minimized. A C++ model has been created for simulation of functionality and data loss, and for system development. A VHDL implementation has been derived from this model.

A pixel read-out architecture implementing a two-stage token ring, zero suppression and compression

Energy Technology Data Exchange (ETDEWEB)

Heuvelmans, S; Boerrigter, M, E-mail: sander.heuvelmans@bruco.nl [Bruco integrated circuits BV, Oostermaat 2, 7623 CS (Netherlands)

2011-01-15

Increasing luminosity in high energy physics experiments leads to new challenges in the design of data acquisition systems for pixel detectors. With the upgrade of the LHCb experiment, the data processing will be changed; hit data from every collision will be transported off the pixel chip, without any trigger selection. A read-out architecture is proposed which is able to obtain low hit data loss on limited silicon area by using the logic beneath the pixels as a data buffer. Zero suppression and redundancy reduction ensure that the data rate off chip is minimized. A C++ model has been created for simulation of functionality and data loss, and for system development. A VHDL implementation has been derived from this model.

Spectroscopic measurements with the ATLAS FE-I4 pixel readout chip

Energy Technology Data Exchange (ETDEWEB)

Pohl, David-Leon; Janssen, Jens; Hemperek, Tomasz; Huegging, Fabian; Wermes, Norbert [Physikalisches Institut der Univeristaet Bonn (Germany)

2015-07-01

The ATLAS FE-I4 pixel readout chip is a large (2 x 2 cm{sup 2}) state of the art ASIC used in high energy physics experiments as well as for research and development purposes. While the FE-I4 is optimized for high hit rates it provides very limited charge resolution. Therefore two methods were developed to obtain high resolution single pixel charge spectra with the ATLAS FE-I4. The first method relies on the ability to change the detection threshold in small steps while counting hits from a particle source and has a resolution limited by electronic noise only. The other method uses a FPGA based time-to-digital-converter to digitize the analog charge signal with high precision. The feasibility, performance and challenges of these methods are discussed. First results of sensor characterizations from radioactive sources and test beams with the ATLAS FE-I4 in view of the charge collection efficiency after irradiation are presented.

Frequency-domain readout multiplexing of transition-edge sensor arrays

Energy Technology Data Exchange (ETDEWEB)

Lanting, T.M. [Physics Department, University of California, Berkeley, CA 94720 (United States)]. E-mail: tlanting@berkeley.edu; Arnold, K. [Physics Department, University of California, Berkeley, CA 94720 (United States); Cho, Hsiao-Mei [Physics Department, University of California, Berkeley, CA 94720 (United States); Clarke, John [Physics Department, University of California, Berkeley, CA 94720 (United States); Materials Sciences Division, Lawrence Berkeley National Laboratory, Berkeley, CA 94720 (United States); Dobbs, Matt [Physics Division, Lawrence Berkeley National Laboratory, Berkeley, CA 94720 (United States); Holzapfel, William [Physics Department, University of California, Berkeley, CA 94720 (United States); Lee, Adrian T. [Physics Department, University of California, Berkeley, CA 94720 (United States); Physics Division, Lawrence Berkeley National Laboratory, Berkeley, CA 94720 (United States); Lueker, M. [Physics Department, University of California, Berkeley, CA 94720 (United States); Richards, P.L. [Physics Department, University of California, Berkeley, CA 94720 (United States); Materials Sciences Division, Lawrence Berkeley National Laboratory, Berkeley, CA 94720 (United States); Space Sciences Laboratory, University of California, Berkeley, CA 94720 (United States); Smith, A.D. [Northrop-Grumman, Redondo Beach, CA 94278 (United States); Spieler, H.G. [Physics Division, Lawrence Berkeley National Laboratory, Berkeley, CA 94720 (United States)

2006-04-15

We have demonstrated frequency-domain readout multiplexing of eight channels for superconducting transition-edge sensor bolometer arrays. The multiplexed readout noise is 6.5 pA/{radical}Hz, well below the bolometer dark noise of 15-20 pA/{radical}Hz. We measure an upper limit on crosstalk of 0.004 between channels adjacent in frequency which meets our design requirement of 0.01. We have observed vibration insensitivity in our frequency-domain multiplexed transition-edge sensors, making this system very attractive for telescope and satellite observations. We also discuss extensions to our multiplexed readout. In particular, we are developing a SQUID flux-locked loop that is entirely cold and collaborating on digital multiplexer technology in order to scale up the number of multiplexed channels.

A silicon pixel detector prototype for the CLIC vertex detector

CERN Multimedia

AUTHOR|(INSPIRE)INSPIRE-00714258

2017-01-01

A silicon pixel detector prototype for CLIC, currently under study for the innermost detector surrounding the collision point. The detector is made of a High-Voltage CMOS sensor (top) and a CLICpix2 readout chip (bottom) that are glued to each other. Both parts have a size of 3.3 x 4.0 $mm^2$ and consist of an array of 128 x 128 pixels of 25 x 25 $\\micro m^2$ size.

Design and Optimization of Multi-Pixel Transition-Edge Sensors for X-Ray Astronomy Applications

Science.gov (United States)

Smith, Stephen J.; Adams, Joseph S.; Bandler, Simon R.; Chervenak, James A.; Datesman, Aaron Michael; Eckart, Megan E.; Ewin, Audrey J.; Finkbeiner, Fred M.; Kelley, Richard L.; Kilbourne, Caroline A.;

Characterization of a 512x512-pixel 8-output full-frame CCD for high-speed imaging

Science.gov (United States)

Graeve, Thorsten; Dereniak, Eustace L.

1993-01-01

The characterization of a 512 by 512 pixel, eight-output full frame CCD manufactured by English Electric Valve under part number CCD13 is discussed. This device is a high- resolution Silicon-based array designed for visible imaging applications at readout periods as low as two milliseconds. The characterization of the device includes mean-variance analysis to determine read noise and dynamic range, as well as charge transfer efficiency, MTF, and quantum efficiency measurements. Dark current and non-uniformity issues on a pixel-to-pixel basis and between individual outputs are also examined. The characterization of the device is restricted by hardware limitations to a one MHz pixel rate, corresponding to a 40 ms readout time. However, subsections of the device have been operated at up to an equivalent 100 frames per second. To maximize the frame rate, the CCD is illuminated by a synchronized strobe flash in between frame readouts. The effects of the strobe illumination on the imagery obtained from the device is discussed.

The ALICE silicon pixel detector front-end and read-out electronics

CERN Document Server

Kluge, A

2006-01-01

The ALICE silicon pixel detector (SPD) comprises the two innermost barrel layers of the ALICE inner tracker system. The SPD includes 120 half staves each of which consists of a linear array of 10 ALICE pixel chips bump bonded to two silicon sensors. Each pixel chip contains 8192 active cells, so the total number of pixel cells in the SPD is ≈107. The tight material budget and the limitation in physical dimensions required by the detector design introduce new challenges for the integration of the on-detector electronics. An essential part of the half stave is a low-mass multi-layer flex that carries power, ground, and signals to the pixel chips. Each half stave is read out using a multi-chip module (MCM). The MCM contains three radiation hard ASICs and an 800 Mbit/s custom developed optical link for the data transfer between the detector and the control room. The detector components are less than 3 mm thick. The production of the half-staves and MCMs is currently under way. Test results as well as on overvie...

FE-I2 a front-end readout chip designed in a commercial 025- mu m process for the ATLAS pixel detector at LHC

CERN Document Server

Blanquart, L; Einsweiler, Kevin F; Fischer, P; Mandelli, E; Meddeler, G; Peric, I

2004-01-01

A new front-end chip (FE-I2) has been developed for the ATLAS pixel detector at the future Large Hadron Collider (LHC) accelerator facility of the European Laboratory for Particle Physics (CERN). This chip has been submitted in a commercial 0.25- mu m CMOS process using special layout techniques for radiation tolerance. It comprises 2880 pixels arranged into 18 columns of 160 channels. Each pixel element of dimension 50 mu m * 400 mu m is composed of a charge- sensitive amplifier followed by a fast discriminator with a detection threshold adjustable within a range of 0-6000 electrons and slow control logic incorporating a wired-hit-Or, preamplifier-kill, readout mask, and automatic threshold tuning circuitry. There are two single-event- upset (SEU)-tolerant DACs for reducing threshold (7-b) and recovery- time (3-b) mismatches from pixel to pixel along with digital hit emulation and a differential readout circuit aimed at transporting time-stamped data from each pixel to buffers at the bottom of the chip. In c...

Design and implementation of Gm-APD array readout integrated circuit for infrared 3D imaging

Science.gov (United States)

Zheng, Li-xia; Yang, Jun-hao; Liu, Zhao; Dong, Huai-peng; Wu, Jin; Sun, Wei-feng

2013-09-01

A single-photon detecting array of readout integrated circuit (ROIC) capable of infrared 3D imaging by photon detection and time-of-flight measurement is presented in this paper. The InGaAs avalanche photon diodes (APD) dynamic biased under Geiger operation mode by gate controlled active quenching circuit (AQC) are used here. The time-of-flight is accurately measured by a high accurate time-to-digital converter (TDC) integrated in the ROIC. For 3D imaging, frame rate controlling technique is utilized to the pixel's detection, so that the APD related to each pixel should be controlled by individual AQC to sense and quench the avalanche current, providing a digital CMOS-compatible voltage pulse. After each first sense, the detector is reset to wait for next frame operation. We employ counters of a two-segmental coarse-fine architecture, where the coarse conversion is achieved by a 10-bit pseudo-random linear feedback shift register (LFSR) in each pixel and a 3-bit fine conversion is realized by a ring delay line shared by all pixels. The reference clock driving the LFSR counter can be generated within the ring delay line Oscillator or provided by an external clock source. The circuit is designed and implemented by CSMC 0.5μm standard CMOS technology and the total chip area is around 2mm×2mm for 8×8 format ROIC with 150μm pixel pitch. The simulation results indicate that the relative time resolution of the proposed ROIC can achieve less than 1ns, and the preliminary test results show that the circuit function is correct.

Depleted fully monolithic CMOS pixel detectors using a column based readout architecture for the ATLAS Inner Tracker upgrade

Science.gov (United States)

Wang, T.; Barbero, M.; Berdalovic, I.; Bespin, C.; Bhat, S.; Breugnon, P.; Caicedo, I.; Cardella, R.; Chen, Z.; Degerli, Y.; Egidos, N.; Godiot, S.; Guilloux, F.; Hemperek, T.; Hirono, T.; Krüger, H.; Kugathasan, T.; Hügging, F.; Marin Tobon, C. A.; Moustakas, K.; Pangaud, P.; Schwemling, P.; Pernegger, H.; Pohl, D.-L.; Rozanov, A.; Rymaszewski, P.; Snoeys, W.; Wermes, N.

2018-03-01

Depleted monolithic active pixel sensors (DMAPS), which exploit high voltage and/or high resistivity add-ons of modern CMOS technologies to achieve substantial depletion in the sensing volume, have proven to have high radiation tolerance towards the requirements of ATLAS in the high-luminosity LHC era. DMAPS integrating fast readout architectures are currently being developed as promising candidates for the outer pixel layers of the future ATLAS Inner Tracker, which will be installed during the phase II upgrade of ATLAS around year 2025. In this work, two DMAPS prototype designs, named LF-Monopix and TJ-Monopix, are presented. LF-Monopix was fabricated in the LFoundry 150 nm CMOS technology, and TJ-Monopix has been designed in the TowerJazz 180 nm CMOS technology. Both chips employ the same readout architecture, i.e. the column drain architecture, whereas different sensor implementation concepts are pursued. The paper makes a joint description of the two prototypes, so that their technical differences and challenges can be addressed in direct comparison. First measurement results for LF-Monopix will also be shown, demonstrating for the first time a fully functional fast readout DMAPS prototype implemented in the LFoundry technology.

First functionality tests of a 64 × 64 pixel DSSC sensor module connected to the complete ladder readout

Science.gov (United States)

Donato, M.; Hansen, K.; Kalavakuru, P.; Kirchgessner, M.; Kuster, M.; Porro, M.; Reckleben, C.; Turcato, M.

2017-03-01

The European X-ray Free Electron Laser (XFEL.EU) will provide every 0.1 s a train of 2700 spatially coherent ultrashort X-ray pulses at 4.5 MHz repetition rate. The Small Quantum Systems (SQS) instrument and the Spectroscopy and Coherent Scattering instrument (SCS) operate with soft X-rays between 0.5 keV-6 keV. The DEPFET Sensor with Signal Compression (DSSC) detector is being developed to meet the requirements set by these two XFEL.EU instruments. The DSSC imager is a 1 mega-pixel camera able to store up to 800 single-pulse images per train. The so-called ladder is the basic unit of the DSSC detector. It is the single unit out of sixteen identical-units composing the DSSC-megapixel camera, containing all representative electronic components of the full-size system and allows testing the full electronic chain. Each DSSC ladder has a focal plane sensor with 128× 512 pixels. The read-out ASIC provides full-parallel readout of the sensor pixels. Every read-out channel contains an amplifier and an analog filter, an up-to 9 bit ADC and the digital memory. The ASIC amplifier have a double front-end to allow one to use either DEPFET sensors or Mini-SDD sensors. In the first case, the signal compression is a characteristic intrinsic of the sensor; in the second case, the compression is implemented at the first amplification stage. The goal of signal compression is to meet the requirement of single-photon detection capability and wide dynamic range. We present the first results of measurements obtained using a 64× 64 pixel DEPFET sensor attached to the full final electronic and data-acquisition chain.

Low-noise readout circuit for SWIR focal plane arrays

Science.gov (United States)

Altun, Oguz; Tasdemir, Ferhat; Nuzumlali, Omer Lutfi; Kepenek, Reha; Inceturkmen, Ercihan; Akyurek, Fatih; Tunca, Can; Akbulut, Mehmet

2017-02-01

This paper reports a 640x512 SWIR ROIC with 15um pixel pitch that is designed and fabricated using 0.18um CMOS process. Main challenge of SWIR ROIC design is related to input circuit due to pixel area and noise limitations. In this design, CTIA with single stage amplifier is utilized as input stage. The pixel design has three pixel gain options; High Gain (HG), Medium Gain (MG), and Low Gain (LG) with corresponding Full-Well-Capacities of 18.7ké, 190ké and 1.56Mé, respectively. According to extracted simulation results, 5.9é noise is achieved at HG mode and 200é is achieved at LG mode of operation. The ROIC can be programmed through an SPI interface. It supports 1, 2 and 4 output modes which enables the user to configure the detector to work at 30, 60 and 120fps frame rates. In the 4 output mode, the total power consumption of the ROIC is less than 120mW. The ROIC is powered from a 3.3V analog supply and allows for an output swing range in excess of 2V. Anti-blooming feature is added to prevent any unwanted blooming effect during readout.

Limits in point to point resolution of MOS based pixels detector arrays

Science.gov (United States)

Fourches, N.; Desforge, D.; Kebbiri, M.; Kumar, V.; Serruys, Y.; Gutierrez, G.; Leprêtre, F.; Jomard, F.

2018-01-01

In high energy physics point-to-point resolution is a key prerequisite for particle detector pixel arrays. Current and future experiments require the development of inner-detectors able to resolve the tracks of particles down to the micron range. Present-day technologies, although not fully implemented in actual detectors, can reach a 5-μm limit, this limit being based on statistical measurements, with a pixel-pitch in the 10 μm range. This paper is devoted to the evaluation of the building blocks for use in pixel arrays enabling accurate tracking of charged particles. Basing us on simulations we will make here a quantitative evaluation of the physical and technological limits in pixel size. Attempts to design small pixels based on SOI technology will be briefly recalled here. A design based on CMOS compatible technologies that allow a reduction of the pixel size below the micrometer is introduced here. Its physical principle relies on a buried carrier-localizing collecting gate. The fabrication process needed by this pixel design can be based on existing process steps used in silicon microelectronics. The pixel characteristics will be discussed as well as the design of pixel arrays. The existing bottlenecks and how to overcome them will be discussed in the light of recent ion implantation and material characterization experiments.

Performance measurements of hybrid PIN diode arrays

International Nuclear Information System (INIS)

Jernigan, J.G.; Arens, J.F.; Collins, T.; Herring, J.; Shapiro, S.L.; Wilburn, C.D.

1990-05-01

We report on the successful effort to develop hybrid PIN diode arrays and to demonstrate their potential as components of vertex detectors. Hybrid pixel arrays have been fabricated by the Hughes Aircraft Co. by bump bonding readout chips developed by Hughes to an array of PIN diodes manufactured by Micron Semiconductor Inc. These hybrid pixel arrays were constructed in two configurations. One array format having 10 x 64 pixels, each 120 μm square, and the other format having 256 x 256 pixels, each 30 μm square. In both cases, the thickness of the PIN diode layer is 300 μm. Measurements of detector performance show that excellent position resolution can be achieved by interpolation. By determining the centroid of the charge cloud which spreads charge into a number of neighboring pixels, a spatial resolution of a few microns has been attained. The noise has been measured to be about 300 electrons (rms) at room temperature, as expected from KTC and dark current considerations, yielding a signal-to-noise ratio of about 100 for minimum ionizing particles. 4 refs., 13 figs

arXiv Characterization and Verification Environment for the RD53A Pixel Readout Chip in 65 nm CMOS

CERN Document Server

Vogt, M.; Hemperek, T.; Janssen, J.; Pohl, D.L.; Daas, M.

2018-02-02

The RD53 collaboration is currently designing a large scale prototype pixel readout chip in 65 nm CMOS technology for the phase 2 upgrades at the HL-LHC. The RD53A chip will be available by the end of the year 2017 and will be extensively tested to confirm if the circuit and the architecture make a solid foundation for the final pixel readout chips for the experiments at the HL-LHC. A test and data acquisition system for the RD53A chip is currently under development to perform single-chip and multi-chip module measurements. In addition, the verification of the RD53A design is performed in a dedicated simulation environment. The concept and the implementation of the test and data acquisition system and the simulation environment, which are based on a modular data acquisition and system testing framework, are presented in this work.

Active pixel sensor having intra-pixel charge transfer with analog-to-digital converter

Science.gov (United States)

Fossum, Eric R. (Inventor); Mendis, Sunetra K. (Inventor); Pain, Bedabrata (Inventor); Nixon, Robert H. (Inventor); Zhou, Zhimin (Inventor)

2003-01-01

An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node and an analog-to-digital converter formed in the substrate connected to the output of the readout circuit.

Design and development of the IBL-BOC firmware for the ATLAS Pixel IBL optical datalink system

CERN Document Server

AUTHOR|(INSPIRE)INSPIRE-00356268

The Insertable $b$-Layer (IBL) is the first upgrade of the ATLAS Pixel detector at the LHC. It will be installed in the Pixel detector in 2013. The IBL will use a new sensor and readout technology, therefore the readout components of the current Pixel detector are redesigned for the readout of the IBL. In this diploma thesis the design and development of the firmware for the new IBL Back-of-Crate card (IBL-BOC) are described. The IBL-BOC is located on the off-detector side of the readout and performs the optical-electrical conversion and vice versa for the optical connection to and from the detector. To process the data transmitted to and received from the detector, the IBL-BOC uses multiple Field Programmable Gate Arrays (FPGA). The transmitted signal is a 40~Mb/s BiPhase Mark (BPM) encoded data stream, providing the timing, trigger and control to the detector. The received signal is a 160~Mb/s 8b10b encoded data stream, containing data from the detector. The IBL-BOC encodes and decodes these data streams. T...

Preliminary Assessment of Microwave Readout Multiplexing Factor

Energy Technology Data Exchange (ETDEWEB)

Croce, Mark Philip [Los Alamos National Lab. (LANL), Los Alamos, NM (United States); Koehler, Katrina Elizabeth [Los Alamos National Lab. (LANL), Los Alamos, NM (United States); Rabin, Michael W. [Los Alamos National Lab. (LANL), Los Alamos, NM (United States); Bennett, D. A. [National Inst. of Standards and Technology (NIST), Boulder, CO (United States); Mates, J. A. B. [National Inst. of Standards and Technology (NIST), Boulder, CO (United States); Gard, J. D. [National Inst. of Standards and Technology (NIST), Boulder, CO (United States); Becker, D. [National Inst. of Standards and Technology (NIST), Boulder, CO (United States); Schmidt, D. R. [National Inst. of Standards and Technology (NIST), Boulder, CO (United States); Ullom, J. N. [National Inst. of Standards and Technology (NIST), Boulder, CO (United States)

2017-01-23

Ultra-high resolution microcalorimeter gamma spectroscopy is a new non-destructive assay technology for measurement of plutonium isotopic composition, with the potential to reduce total measurement uncertainty to a level competitive with destructive analysis methods [1-4]. Achieving this level of performance in practical applications requires not only the energy resolution now routinely achieved with transition-edge sensor microcalorimeter arrays (an order of magnitude better than for germanium detectors) but also high throughput. Microcalorimeter gamma spectrometers have not yet achieved detection efficiency and count rate capability that is comparable to germanium detectors, largely because of limits from existing readout technology. Microcalorimeter detectors must be operated at low temperature to achieve their exceptional energy resolution. Although the typical 100 mK operating temperatures can be achieved with reliable, cryogen-free systems, the cryogenic complexity and heat load from individual readout channels for large sensor arrays is prohibitive. Multiplexing is required for practical systems. The most mature multiplexing technology at present is time-division multiplexing (TDM) [3, 5-6]. In TDM, the sensor outputs are switched by applying bias current to one SQUID amplifier at a time. Transition-edge sensor (TES) microcalorimeter arrays as large as 256 pixels have been developed for X-ray and gamma-ray spectroscopy using TDM technology. Due to bandwidth limits and noise scaling, TDM is limited to a maximum multiplexing factor of approximately 32-40 sensors on one readout line [8]. Increasing the size of microcalorimeter arrays above the kilopixel scale, required to match the throughput of germanium detectors, requires the development of a new readout technology with a much higher multiplexing factor.

Study of multi-pixel Geiger-mode avalanche photodiodes as a read-out for PET

CERN Document Server

Musienko, Yuri; Lecoq, Paul; Reucroft, Stephen; Swain, John; Trummer, Julia

2007-01-01

We have studied the performance of two multi-pixel Geiger-mode APDs (recently developed by the Centre of Perspective Technologies and Apparatus (CPTA) in Moscow) with 1×1 mm2 and 3×3 mm2 sensitive area as a readout for LSO and LYSO scintillator crystals. Energy and timing spectra were measured using a 22Na γ-source. The results of this study allow us to conclude that this photodetector is a very promising candidate for PET applications.

Active pixel sensor with intra-pixel charge transfer

Science.gov (United States)

Fossum, Eric R. (Inventor); Mendis, Sunetra (Inventor); Kemeny, Sabrina E. (Inventor)

2004-01-01

An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node.

Design of a current based readout chip and development of a DEPFET pixel prototype system for the ILC vertex detector

International Nuclear Information System (INIS)

Trimpl, M.

2005-12-01

The future TeV-scale linear collider ILC (International Linear Collider) offers a large variety of precision measurements complementary to the discovery potential of the LHC (Large Hadron Collider). To fully exploit its physics potential, a vertex detector with unprecedented performance is needed. One proposed technology for the ILC vertex detector is the DEPFET active pixel sensor. The DEPFET sensor offers particle detection with in-pixel amplification by incorporating a field effect transistor into a fully depleted high-ohmic silicon substrate. The device provides an excellent signal-to-noise ratio and a good spatial resolution at the same time. To establish a very fast readout of a DEPFET pixel matrix with row rates of 20 MHz and more, the 128 channel CURO II ASIC has been designed and fabricated. The architecture of the chip is completely based on current mode techniques (SI) perfectly adapted to the current signal of the sensor. For the ILC vertex detector a prototype system with a 64 x 128 DEPFET pixel matrix read out by the CURO II chip has been developed. The design issues and the standalone performance of the readout chip as well as first results with the prototype system will be presented. (orig.)

Design of a current based readout chip and development of a DEPFET pixel prototype system for the ILC vertex detector

Energy Technology Data Exchange (ETDEWEB)

Trimpl, M.

2005-12-15

The future TeV-scale linear collider ILC (International Linear Collider) offers a large variety of precision measurements complementary to the discovery potential of the LHC (Large Hadron Collider). To fully exploit its physics potential, a vertex detector with unprecedented performance is needed. One proposed technology for the ILC vertex detector is the DEPFET active pixel sensor. The DEPFET sensor offers particle detection with in-pixel amplification by incorporating a field effect transistor into a fully depleted high-ohmic silicon substrate. The device provides an excellent signal-to-noise ratio and a good spatial resolution at the same time. To establish a very fast readout of a DEPFET pixel matrix with row rates of 20 MHz and more, the 128 channel CURO II ASIC has been designed and fabricated. The architecture of the chip is completely based on current mode techniques (SI) perfectly adapted to the current signal of the sensor. For the ILC vertex detector a prototype system with a 64 x 128 DEPFET pixel matrix read out by the CURO II chip has been developed. The design issues and the standalone performance of the readout chip as well as first results with the prototype system will be presented. (orig.)

The RD53 Collaboration's SystemVerilog-UVM Simulation Framework and its General Applicability to Design of Advanced Pixel Readout Chips

CERN Document Server

Marconi, S.; Placidi, P.; Christiansen, J.; Hemperek, T.

2014-01-01

The foreseen Phase 2 pixel upgrades at the LHC have very challenging requirements for the design of hybrid pixel readout chips. A versatile pixel simulation platform is as an essential development tool for the design, verification and optimization of both the system architecture and the pixel chip building blocks (Intellectual Properties, IPs). This work is focused on the implemented simulation and verification environment named VEPIX53, built using the SystemVerilog language and the Universal Verification Methodology (UVM) class library in the framework of the RD53 Collaboration. The environment supports pixel chips at different levels of description: its reusable components feature the generation of different classes of parameterized input hits to the pixel matrix, monitoring of pixel chip inputs and outputs, conformity checks between predicted and actual outputs and collection of statistics on system performance. The environment has been tested performing a study of shared architectures of the trigger late...

SiPM arrays and miniaturized readout electronics for compact gamma camera

Energy Technology Data Exchange (ETDEWEB)

Dinu, N., E-mail: dinu@lal.in2p3.fr [Laboratory of Linear Accelerator, IN2P3, CNRS, Orsay (France); Imando, T. Ait; Nagai, A. [Laboratory of Linear Accelerator, IN2P3, CNRS, Orsay (France); Pinot, L. [Laboratory of Imaging and Modelisation in Neurobiology and Cancerology, IN2P3, CNRS, Orsay (France); Puill, V. [Laboratory of Linear Accelerator, IN2P3, CNRS, Orsay (France); Callier, S. [Omega Microelectronics Group, CNRS, Palaiseau (France); Janvier, B.; Esnault, C.; Verdier, M.-A. [Laboratory of Imaging and Modelisation in Neurobiology and Cancerology, IN2P3, CNRS, Orsay (France); Raux, L. [Omega Microelectronics Group, CNRS, Palaiseau (France); Vandenbussche, V.; Charon, Y.; Menard, L. [Laboratory of Imaging and Modelisation in Neurobiology and Cancerology, IN2P3, CNRS, Orsay (France)

2015-07-01

This article reports on the design and features of a very compact and light gamma camera based on SiPM arrays and miniaturized readout electronics dedicated to tumor localization during radio-guided cancer surgery. This gamma camera, called MAGICS, is composed of four (2×2) photo-detection elementary modules coupled to an inorganic scintillator. The 256 channels photo-detection system covers a sensitive area of 54×53 m{sup 2}. Each elementary module is based on four (2×2) SiPM monolithic arrays, each array consisting of 16 SiPM photo-sensors (4×4) with 3×3 mm{sup 2} sensitive area, coupled to a miniaturized readout electronics and a dedicated ASIC. The overall dimensions of the electronics fit the size of the detector, enabling to assemble side-by-side several elementary modules in a close-packed arrangement. The preliminary performances of the system are very encouraging, showing an energy resolution of 9.8% and a spatial resolution of less than 1 mm at 122 keV.

Fabrication of a high-density MCM-D for a pixel detector system using a BCB/Cu technology

CERN Document Server

Topper, M; Engelmann, G; Fehlberg, S; Gerlach, P; Wolf, J; Ehrmann, O; Becks, K H; Reichl, H

1999-01-01

The MCM-D which is described here is a prototype for a pixel detector system for the planned Large Hadron Collider (LHC) at CERN, Geneva. The project is within the ATLAS experiment. The module consists of a sensor tile with an active area of 16.4 mm*60.4 mm, 16 readout chips, each serving 24*160 pixel unit cells, a module controller chip, an optical transceiver and the local signal interconnection and power distribution buses. The extremely high wiring density which is necessary to interconnect the readout chips was achieved using a thin film copper/photo-BCB process above the pixel array. The bumping of the readout chips was done by PbSn electroplating. All dice are then attached by flip-chip assembly to the sensor diodes and the local buses. The focus of this paper is a detailed description of the technologies for the fabrication of this advanced MCM-D. (10 refs).

Development and operation of a pixel segmented liquid-filled linear array for radiotherapy quality assurance

Energy Technology Data Exchange (ETDEWEB)

Pardo, J [Departamento de Fisica de Particulas, Facultade de Fisica, 15782 Santiago de Compostela (Spain); Franco, L [Departamento de Fisica de Particulas, Facultade de Fisica, 15782 Santiago de Compostela (Spain); Gomez, F [Departamento de Fisica de Particulas, Facultade de Fisica, 15782 Santiago de Compostela (Spain); Iglesias, A [Departamento de Fisica de Particulas, Facultade de Fisica, 15782 Santiago de Compostela (Spain); Pazos, A [Departamento de Fisica de Particulas, Facultade de Fisica, 15782 Santiago de Compostela (Spain); Pena, J [Departamento de Fisica de Particulas, Facultade de Fisica, 15782 Santiago de Compostela (Spain); Lobato, R [Hospital Clinico Universitario de Santiago, Santiago (Spain); Mosquera, J [Hospital Clinico Universitario de Santiago, Santiago (Spain); Pombar, M [Hospital Clinico Universitario de Santiago, Santiago (Spain); Sendon, J [Hospital Clinico Universitario de Santiago, Santiago (Spain)

2005-04-21

A liquid isooctane (C{sub 8}H{sub 18}) filled ionization linear array for radiotherapy quality assurance has been designed, built and tested. The detector consists of 128 pixels, each of them with an area of 1.7 mm x 1.7 mm and a gap of 0.5 mm. The small pixel size makes the detector ideal for high gradient beam profiles such as those present in intensity modulated radiation therapy (IMRT) and radiosurgery. As the read-out electronics we use the X-ray Data Acquisition System with the Xchip developed by the CCLRC. Studies concerning the collection efficiency dependence on the polarization voltage and on the dose rate have been made in order to optimize the device operation. In the first tests, we have studied dose rate and energy dependences. Dose rate dependence was found to be lower than 2.1% up to 5 Gy min{sup -1}, and energy dependence lower than 2.5% up to 20 cm depth in solid water. Output factors and penumbras for several rectangular fields have been measured with the linear array and were compared with the results obtained with a 0.125 cm{sup 3} air ionization chamber and radiographic film, respectively. Finally, we have acquired profiles for an IMRT field and for a virtual wedge. These profiles have also been compared with radiographic film measurements. All the comparisons show a good correspondence. The device has proved its capability to verify on-line therapy beams with good spatial resolution and signal-to-noise ratio.

Development and operation of a pixel segmented liquid-filled linear array for radiotherapy quality assurance

International Nuclear Information System (INIS)

Pardo, J; Franco, L; Gomez, F; Iglesias, A; Pazos, A; Pena, J; Lobato, R; Mosquera, J; Pombar, M; Sendon, J

2005-01-01

A liquid isooctane (C 8 H 18 ) filled ionization linear array for radiotherapy quality assurance has been designed, built and tested. The detector consists of 128 pixels, each of them with an area of 1.7 mm x 1.7 mm and a gap of 0.5 mm. The small pixel size makes the detector ideal for high gradient beam profiles such as those present in intensity modulated radiation therapy (IMRT) and radiosurgery. As the read-out electronics we use the X-ray Data Acquisition System with the Xchip developed by the CCLRC. Studies concerning the collection efficiency dependence on the polarization voltage and on the dose rate have been made in order to optimize the device operation. In the first tests, we have studied dose rate and energy dependences. Dose rate dependence was found to be lower than 2.1% up to 5 Gy min -1 , and energy dependence lower than 2.5% up to 20 cm depth in solid water. Output factors and penumbras for several rectangular fields have been measured with the linear array and were compared with the results obtained with a 0.125 cm 3 air ionization chamber and radiographic film, respectively. Finally, we have acquired profiles for an IMRT field and for a virtual wedge. These profiles have also been compared with radiographic film measurements. All the comparisons show a good correspondence. The device has proved its capability to verify on-line therapy beams with good spatial resolution and signal-to-noise ratio

Charge sharing and charge loss in a cadmium-zinc-telluride fine-pixel detector array

International Nuclear Information System (INIS)

Gaskin, J.A.; Sharma, D.P.; Ramsey, B.D.

2003-01-01

Because of its high atomic number, room temperature operation, low noise, and high spatial resolution a cadmium-zinc-telluride multi-pixel detector is ideal for hard X-ray astrophysical observation. As part of on-going research at MSFC to develop multi-pixel CdZnTe detectors for this purpose, we have measured charge sharing and charge loss for a 4x4 (750 μm pitch), 1 mm thick pixel array and modeled these results using a Monte-Carlo simulation. This model was then used to predict the amount of charge sharing for a much finer pixel array (with a 300 μm pitch). Future work will enable us to compare the simulated results for the finer array to measured values

Characterization of a large-format, fine-pitch CdZnTe pixel detector for the HEFT balloon-Borne experiment

OpenAIRE

Chen, C. M. Hubert; Cook, Walter R.; Harrison, Fiona A.; Lin, Jiao Y. Y.

2004-01-01

We have developed a large-format CdZnTe pixel detector with custom, low-noise ASIC readout, for astrophysical applications. In particular, this detector is targeted for use in the High-Energy Focusing Telescope (HEFT), a balloon-borne experiment with focusing optics for 20-70 keV. The detector is a 24 X 44 pixel array of 498-µm pitch. As a focal plane detector, uniformity from pixel to pixel is very desirable. In this paper, we present the characterization of some detector properties for the ...

RAPS: an innovative active pixel for particle detection integrated in CMOS technology

International Nuclear Information System (INIS)

Passeri, Daniele; Placidi, Pisana; Verducci, Leonardo; Ciampolini, Paolo; Matrella, Guido; Marras, Alessandro; Bilei, G.M.

2004-01-01

In this paper we discuss some design, implementation and test issues, with respect to the development of the RAPS01 chip in the framework of the Radiation Active Pixel Sensors (RAPS) INFN project. The project aimed at verifying feasibility of smart, high-resolution pixel arrays with a fully standard, submicron CMOS technology for particle detection purposes. Layout optimization of the pixel, including sensitive element and local read and amplification circuits has been carried out. Different basic pixel schemes and read-out options have been proposed and devised. Chip fabrication has been completed and test phase is now under way: to this purpose a suitable test environment has been devised and test strategies have been planned

Modeling Charge Collection in Detector Arrays

Science.gov (United States)

Hardage, Donna (Technical Monitor); Pickel, J. C.

2003-01-01

A detector array charge collection model has been developed for use as an engineering tool to aid in the design of optical sensor missions for operation in the space radiation environment. This model is an enhancement of the prototype array charge collection model that was developed for the Next Generation Space Telescope (NGST) program. The primary enhancements were accounting for drift-assisted diffusion by Monte Carlo modeling techniques and implementing the modeling approaches in a windows-based code. The modeling is concerned with integrated charge collection within discrete pixels in the focal plane array (FPA), with high fidelity spatial resolution. It is applicable to all detector geometries including monolithc charge coupled devices (CCDs), Active Pixel Sensors (APS) and hybrid FPA geometries based on a detector array bump-bonded to a readout integrated circuit (ROIC).

Research of high speed data readout and pre-processing system based on xTCA for silicon pixel detector

International Nuclear Information System (INIS)

Zhao Jingzhou; Lin Haichuan; Guo Fang; Liu Zhen'an; Xu Hao; Gong Wenxuan; Liu Zhao

2012-01-01

As the development of the detector, Silicon pixel detectors have been widely used in high energy physics experiments. It needs data processing system with high speed, high bandwidth and high availability to read data from silicon pixel detectors which generate more large data. The same question occurs on Belle II Pixel Detector which is a new style silicon pixel detector used in SuperKEKB accelerator with high luminance. The paper describes the research of High speed data readout and pre-processing system based on xTCA for silicon pixel detector. The system consists of High Performance Computer Node (HPCN) based on xTCA and ATCA frame. The HPCN consists of 4XFPs based on AMC, 1 AMC Carrier ATCA Board (ACAB) and 1 Rear Transmission Module. It characterized by 5 high performance FPGAs, 16 fiber links based on RocketIO, 5 Gbit Ethernet ports and DDR2 with capacity up to 18GB. In a ATCA frame, 14 HPCNs make up a system using the high speed backplane to achieve the function of data pre-processing and trigger. This system will be used on the trigger and data acquisition system of Belle II Pixel detector. (authors)

Performance of the gamma-ray camera based on GSO(Ce) scintillator array and PSPMT with the ASIC readout system

International Nuclear Information System (INIS)

Ueno, Kazuki; Hattori, Kaori; Ida, Chihiro; Iwaki, Satoru; Kabuki, Shigeto; Kubo, Hidetoshi; Kurosawa, Shunsuke; Miuchi, Kentaro; Nagayoshi, Tsutomu; Nishimura, Hironobu; Orito, Reiko; Takada, Atsushi; Tanimori, Toru

2008-01-01

We have studied the performance of a readout system with ASIC chips for a gamma-ray camera based on a 64-channel multi-anode PSPMT (Hamamatsu flat-panel H8500) coupled to a GSO(Ce) scintillator array. The GSO array consists of 8x8 pixels of 6x6x13 mm 3 with the same pixel pitch as the anode of the H8500. This camera is intended to serve as an absorber of an electron tracking Compton gamma-ray camera that measures gamma rays up to ∼1 MeV. Because we need a readout system with low power consumption for a balloon-borne experiment, we adopted a 32-channel ASIC chip, IDEAS VA32 H DR11, which has one of the widest dynamic range among commercial chips. However, in the case of using a GSO(Ce) crystal and the H8500, the dynamic range of VA32 H DR11 is narrow, and therefore the H8500 has to be operated with a low gain of about 10 5 . If the H8500 is operated with a low gain, the camera has a narrow incident-energy dynamic range from 100 to 700 keV, and a bad energy resolution of 13.0% (FWHM) at 662 keV. We have therefore developed an attenuator board in order to operate the H8500 with the typical gain of 10 6 , which can measure up to ∼1 MeV gamma ray. The board makes the variation of the anode gain uniform and widens the dynamic range of the H8500. The system using the new attenuator board has a good uniformity of min:max∼1:1.6, an incident-energy dynamic range from 30 to 900 keV, a position resolution of less than 6 mm, and a typical energy resolution of 10.6% (FWHM) at 662 keV with a low power consumption of about 1.7 W/64ch

Advanced ACTPol Cryogenic Detector Arrays and Readout

Science.gov (United States)

Henderson, S. W.; Allison, R.; Austermann, J.; Baildon, T.; Battaglia, N.; Beall, J. A.; Becker, D.; De Bernardis, F.; Bond, J. R.; Calabrese, E.; Choi, S. K.; Coughlin, K. P.; Crowley, K. T.; Datta, R.; Devlin, M. J.; Duff, S. M.; Dunkley, J.; Dünner, R.; van Engelen, A.; Gallardo, P. A.; Grace, E.; Hasselfield, M.; Hills, F.; Hilton, G. C.; Hincks, A. D.; Hloẑek, R.; Ho, S. P.; Hubmayr, J.; Huffenberger, K.; Hughes, J. P.; Irwin, K. D.; Koopman, B. J.; Kosowsky, A. B.; Li, D.; McMahon, J.; Munson, C.; Nati, F.; Newburgh, L.; Niemack, M. D.; Niraula, P.; Page, L. A.; Pappas, C. G.; Salatino, M.; Schillaci, A.; Schmitt, B. L.; Sehgal, N.; Sherwin, B. D.; Sievers, J. L.; Simon, S. M.; Spergel, D. N.; Staggs, S. T.; Stevens, J. R.; Thornton, R.; Van Lanen, J.; Vavagiakis, E. M.; Ward, J. T.; Wollack, E. J.

2016-08-01

Advanced ACTPol is a polarization-sensitive upgrade for the 6 m aperture Atacama Cosmology Telescope, adding new frequencies and increasing sensitivity over the previous ACTPol receiver. In 2016, Advanced ACTPol will begin to map approximately half the sky in five frequency bands (28-230 GHz). Its maps of primary and secondary cosmic microwave background anisotropies—imaged in intensity and polarization at few arcminute-scale resolution—will enable precision cosmological constraints and also a wide array of cross-correlation science that probes the expansion history of the universe and the growth of structure via gravitational collapse. To accomplish these scientific goals, the Advanced ACTPol receiver will be a significant upgrade to the ACTPol receiver, including four new multichroic arrays of cryogenic, feedhorn-coupled AlMn transition edge sensor polarimeters (fabricated on 150 mm diameter wafers); a system of continuously rotating meta-material silicon half-wave plates; and a new multiplexing readout architecture which uses superconducting quantum interference devices and time division to achieve a 64-row multiplexing factor. Here we present the status and scientific goals of the Advanced ACTPol instrument, emphasizing the design and implementation of the Advanced ACTPol cryogenic detector arrays.

First large DEPFET pixel modules for the Belle II Pixel Detector

Energy Technology Data Exchange (ETDEWEB)

Mueller, Felix; Avella, Paola; Kiesling, Christian; Koffmane, Christian; Moser, Hans-Guenther; Valentan, Manfred [Max-Planck-Institut fuer Physik, Muenchen (Germany); Andricek, Ladislav; Richter, Rainer [Halbleiterlabor der Max-Planck-Gesellschaft, Muenchen (Germany); Collaboration: Belle II-Collaboration

2016-07-01

DEPFET pixel detectors offer excellent signal to noise ratio, resolution and low power consumption with a low material budget. They will be used at Belle II and are a candidate for an ILC vertex detector. The pixels are integrated in a monolithic piece of silicon which also acts as PCB providing the signal and control routings for the ASICs on top. The first prototype DEPFET sensor modules for Belle II have been produced. The modules have 192000 pixels and are equipped with SMD components and three different kinds of ASICs to control and readout the pixels. The entire readout chain has to be studied; the metal layer interconnectivity and routings need to be verified. The modules are fully characterized, and the operation voltages and control sequences of the ASICs are investigated. An overview of the DEPFET concept and first characterization results is presented.

Digital readouts for large microwave low-temperature detector arrays

International Nuclear Information System (INIS)

Mazin, Benjamin A.; Day, Peter K.; Irwin, Kent D.; Reintsema, Carl D.; Zmuidzinas, Jonas

2006-01-01

Over the last several years many different types of low-temperature detectors (LTDs) have been developed that use a microwave resonant circuit as part of their readout. These devices include microwave kinetic inductance detectors (MKID), microwave SQUID readouts for transition edge sensors (TES), and NIS bolometers. Current readout techniques for these devices use analog frequency synthesizers and IQ mixers. While these components are available as microwave integrated circuits, one set is required for each resonator. We are exploring a new readout technique for this class of detectors based on a commercial-off-the-shelf technology called software defined radio (SDR). In this method a fast digital to analog (D/A) converter creates as many tones as desired in the available bandwidth. Our prototype system employs a 100MS/s 16-bit D/A to generate an arbitrary number of tones in 50MHz of bandwidth. This signal is then mixed up to the desired detector resonant frequency (∼10GHz), sent through the detector, then mixed back down to baseband. The baseband signal is then digitized with a series of fast analog to digital converters (80MS/s, 14-bit). Next, a numerical mixer in a dedicated integrated circuit or FPGA mixes the resonant frequency of a specified detector to 0Hz, and sends the complex detector output over a computer bus for processing and storage. In this paper we will report on our results in using a prototype system to readout a MKID array, including system noise performance, X-ray pulse response, and cross-talk measurements. We will also discuss how this technique can be scaled to read out many thousands of detectors

Bonding techniques for hybrid active pixel sensors (HAPS)

Energy Technology Data Exchange (ETDEWEB)

Bigas, M. [Centre Nacional de Microelectronica, CNM-IMB (CSIC), Campus Universitat Autonoma de Barcelona, 08193 Bellaterra, Barcelona (Spain)]. E-mail: Marc.Bigas@cnm.es; Cabruja, E. [Centre Nacional de Microelectronica, CNM-IMB (CSIC), Campus Universitat Autonoma de Barcelona, 08193 Bellaterra, Barcelona (Spain)]. E-mail: Enric.Cabruja@cnm.es; Lozano, M. [Centre Nacional de Microelectronica, CNM-IMB (CSIC), Campus Universitat Autonoma de Barcelona, 08193 Bellaterra, Barcelona (Spain)

2007-05-01

A hybrid active pixel sensor (HAPS) consists of an array of sensing elements which is connected to an electronic read-out unit. The most used way to connect these two different devices is bump bonding. This interconnection technique is very suitable for these systems because it allows a very fine pitch and a high number of I/Os. However, there are other interconnection techniques available such as direct bonding. This paper, as a continuation of a review [M. Lozano, E. Cabruja, A. Collado, J. Santander, M. Ullan, Nucl. Instr. and Meth. A 473 (1-2) (2001) 95-101] published in 2001, presents an update of the different advanced bonding techniques available for manufacturing a hybrid active pixel detector.

Design of front end electronics and a full scale 4k pixel readout ASIC for the DSSC X-ray detector at the European XFEL

International Nuclear Information System (INIS)

Erdinger, Florian

2016-01-01

The goal of this thesis was to design a large scale readout ASIC for the 1-Mega pixel DEPFET Sensor with Signal Compression (DSSC) detector system which is being developed by an international collaboration for the European XFEL (EuXFEL). Requirements for the DSSC detector include single photon detection down to 0.5 keV combined with a large dynamic range of up to 10000 photons at frame rates of up to 4.5 MHz. The detector core concepts include full parallel readout, signal compression on the sensor or ASIC level, filtering, immediate digitization and local storage within the pixel. The DSSC is a hybrid pixel detector, each sensor pixel mates to a dedicated ASIC pixel, which includes the entire specified signal processing chain along with auxiliary circuits. One ASIC comprises 4096 pixels and a full periphery including biasing and digital control. This thesis presents the design of the ASIC, its components and integration are described in detail. Emphasis is put on the design of the analog front-end. The first full format ASIC (F1) has been fabricated within the scope of this thesis along with numerous test chips. Furthermore, the EuXFEL and the DSSC detector system are presented to create the context for the ASIC, which is the core topic of this thesis.

Design of front end electronics and a full scale 4k pixel readout ASIC for the DSSC X-ray detector at the European XFEL

Energy Technology Data Exchange (ETDEWEB)

Erdinger, Florian

2016-11-22

The goal of this thesis was to design a large scale readout ASIC for the 1-Mega pixel DEPFET Sensor with Signal Compression (DSSC) detector system which is being developed by an international collaboration for the European XFEL (EuXFEL). Requirements for the DSSC detector include single photon detection down to 0.5 keV combined with a large dynamic range of up to 10000 photons at frame rates of up to 4.5 MHz. The detector core concepts include full parallel readout, signal compression on the sensor or ASIC level, filtering, immediate digitization and local storage within the pixel. The DSSC is a hybrid pixel detector, each sensor pixel mates to a dedicated ASIC pixel, which includes the entire specified signal processing chain along with auxiliary circuits. One ASIC comprises 4096 pixels and a full periphery including biasing and digital control. This thesis presents the design of the ASIC, its components and integration are described in detail. Emphasis is put on the design of the analog front-end. The first full format ASIC (F1) has been fabricated within the scope of this thesis along with numerous test chips. Furthermore, the EuXFEL and the DSSC detector system are presented to create the context for the ASIC, which is the core topic of this thesis.

High-voltage pixel sensors for ATLAS upgrade

Energy Technology Data Exchange (ETDEWEB)

Perić, I., E-mail: ivan.peric@ziti.uni-heidelberg.de [Heidelberg University, Institute of Computer Engineering, Mannheim (Germany); Kreidl, C.; Fischer, P. [Heidelberg University, Institute of Computer Engineering, Mannheim (Germany); Bompard, F.; Breugnon, P.; Clemens, J.-C.; Fougeron, D.; Liu, J.; Pangaud, P.; Rozanov, A.; Barbero, M. [CPPM, Marseille (France); Feigl, S.; Capeans, M.; Ferrere, D.; Pernegger, H.; Ristic, B. [CERN, Geneve (Switzerland); Muenstermann, D.; Gonzalez Sevilla, S.; La Rosa, A.; Miucci, A. [University of Geneve (Switzerland); and others

2014-11-21

The high-voltage (HV-) CMOS pixel sensors offer several good properties: a fast charge collection by drift, the possibility to implement relatively complex CMOS in-pixel electronics and the compatibility with commercial processes. The sensor element is a deep n-well diode in a p-type substrate. The n-well contains CMOS pixel electronics. The main charge collection mechanism is drift in a shallow, high field region, which leads to a fast charge collection and a high radiation tolerance. We are currently evaluating the use of the high-voltage detectors implemented in 180 nm HV-CMOS technology for the high-luminosity ATLAS upgrade. Our approach is replacing the existing pixel and strip sensors with the CMOS sensors while keeping the presently used readout ASICs. By intelligence we mean the ability of the sensor to recognize a particle hit and generate the address information. In this way we could benefit from the advantages of the HV sensor technology such as lower cost, lower mass, lower operating voltage, smaller pitch, smaller clusters at high incidence angles. Additionally we expect to achieve a radiation hardness necessary for ATLAS upgrade. In order to test the concept, we have designed two HV-CMOS prototypes that can be readout in two ways: using pixel and strip readout chips. In the case of the pixel readout, the connection between HV-CMOS sensor and the readout ASIC can be established capacitively.

Digital radiography using amorphous selenium: photoconductively activated switch (PAS) readout system.

Science.gov (United States)

Reznik, Nikita; Komljenovic, Philip T; Germann, Stephen; Rowlands, John A

2008-03-01

A new amorphous selenium (a-Se) digital radiography detector is introduced. The proposed detector generates a charge image in the a-Se layer in a conventional manner, which is stored on electrode pixels at the surface of the a-Se layer. A novel method, called photoconductively activated switch (PAS), is used to read out the latent x-ray charge image. The PAS readout method uses lateral photoconduction at the a-Se surface which is a revolutionary modification of the bulk photoinduced discharge (PID) methods. The PAS method addresses and eliminates the fundamental weaknesses of the PID methods--long readout times and high readout noise--while maintaining the structural simplicity and high resolution for which PID optical readout systems are noted. The photoconduction properties of the a-Se surface were investigated and the geometrical design for the electrode pixels for a PAS radiography system was determined. This design was implemented in a single pixel PAS evaluation system. The results show that the PAS x-ray induced output charge signal was reproducible and depended linearly on the x-ray exposure in the diagnostic exposure range. Furthermore, the readout was reasonably rapid (10 ms for pixel discharge). The proposed detector allows readout of half a pixel row at a time (odd pixels followed by even pixels), thus permitting the readout of a complete image in 30 s for a 40 cm x 40 cm detector with the potential of reducing that time by using greater readout light intensity. This demonstrates that a-Se based x-ray detectors using photoconductively activated switches could form a basis for a practical integrated digital radiography system.

Simulation of digital pixel readout chip architectures with the RD53 SystemVerilog-UVM verification environment using Monte Carlo physics data

International Nuclear Information System (INIS)

Conti, E.; Marconi, S.; Christiansen, J.; Placidi, P.; Hemperek, T.

2016-01-01

The simulation and verification framework developed by the RD53 collaboration is a powerful tool for global architecture optimization and design verification of next generation hybrid pixel readout chips. In this paper the framework is used for studying digital pixel chip architectures at behavioral level. This is carried out by simulating a dedicated, highly parameterized pixel chip description, which makes it possible to investigate different grouping strategies between pixels and different latency buffering and arbitration schemes. The pixel hit information used as simulation input can be either generated internally in the framework or imported from external Monte Carlo detector simulation data. The latter have been provided by both the CMS and ATLAS experiments, featuring HL-LHC operating conditions and the specifications related to the Phase 2 upgrade. Pixel regions and double columns were simulated using such Monte Carlo data as inputs: the performance of different latency buffering architectures was compared and the compliance of different link speeds with the expected column data rate was verified

Hard X-ray test and evaluation of a prototype 32x32 pixel gallium-arsenide array

International Nuclear Information System (INIS)

Erd, C.; Owens, A.; Brammertz, G.; Bavdaz, M.; Peacock, A.; Laemsae, V.; Nenonen, S.; Andersson, H.; Haack, N.

2002-01-01

We report X-ray measurements on a prototype 1.1 cm 2 , 32x32 GaAs pixel array with a pixel size of 350x350 μm 2 produced to assess the technological feasibility of making large area, almost Fano-limited arrays, which operate near room temperature. Measurements were carried out on four widely separated pixels both in our laboratories and using monochromatic X-ray pencil beams at the HASYLAB synchrotron research facility in Hamburg, Germany. The pixels were found to be very uniform both in their energy and spatial responses. For example, typical energy resolutions of ∼280 eV at 10.5 keV, rising to ∼560 eV at 60 keV were achieved. The corresponding resolutions measured under full-pixel illumination were found to be the same within statistics, indicating uniform crystallinity and stoichiometry. Likewise, by scanning a 15 keV, 15x15 μm 2 beam across the entire surface of each of the pixels, the gain uniformity across the pixels (and by implication the entire array) was determined to be statistically flat

Numerical simulation of crosstalk in reduced pitch HgCdTe photon-trapping structure pixel arrays.

Science.gov (United States)

Schuster, Jonathan; Bellotti, Enrico

2013-06-17

We have investigated crosstalk in HgCdTe photovoltaic pixel arrays employing a photon trapping (PT) structure realized with a periodic array of pillars intended to provide broadband operation. We have found that, compared to non-PT pixel arrays with similar geometry, the array employing the PT structure has a slightly higher optical crosstalk. However, when the total crosstalk is evaluated, the presence of the PT region drastically reduces the total crosstalk; making the use of the PT structure not only useful to obtain broadband operation, but also desirable for reducing crosstalk in small pitch detector arrays.

Implementation of a Customisable Readout Sequence for the ALICE ITS Upgrade Explorer Family Chips

CERN Document Server

Gazzari, Matthias

2014-01-01

Within the ALICE ITS upgrade R&D programme the Explorer family chips are developed featuring 11700 pixels which are split into 18 different sectors with different properties. These pixels are read out sequentially leading to a time span of 2.34ms between the first and last pixel. Due to the long readout time, shot noise induced by the leakage currents in the in-pixel analogue memories makes the comparison of different sensor implementations located in distant sectors on the Explorer family chips difficult. In order to reduce this noise contribution a customisable readout sequence is developed to read parts instead of the whole chip which reduces the overall readout time. This readout sequence is integrated in the existing characterisation framework in order to choose the best performing sensor implementation through pixel-by-pixel comparison without readout-induced effects.

CMS Pixel Detector Upgrade

CERN Document Server

INSPIRE-00038772

2011-01-01

The present Compact Muon Solenoid silicon pixel tracking system has been designed for a peak luminosity of 1034cm-2s-1 and total dose corresponding to two years of the Large Hadron Collider (LHC) operation. With the steady increase of the luminosity expected at the LHC, a new pixel detector with four barrel layers and three endcap disks is being designed. We will present the key points of the design: the new geometry, which minimizes the material budget and increases the tracking points, and the development of a fast digital readout architecture, which ensures readout efficiency even at high rate. The expected performances for tracking and vertexing of the new pixel detector are also addressed.

Performance of hybrid photon detector prototypes with encapsulated silicon pixel detector and readout for the RICH counters of LHCb

International Nuclear Information System (INIS)

Campbell, M.; George, K.A.; Girone, M.; Gys, T.; Jolly, S.; Piedigrossi, D.; Riedler, P.; Rozema, P.; Snoeys, W.; Wyllie, K.

2003-01-01

These proceedings report on the performance of the latest prototype pixel hybrid photon detector in preparation for the LHCb Ring Imaging Cherenkov detectors. The prototype encapsulates a silicon pixel detector bump-bonded to a binary read-out chip with short (25 ns) peaking time and low ( - ) detection threshold. A brief description of the prototype is given, followed by the preliminary results of the characterisation of the prototype behaviour when tested using a low intensity pulsed light emitting diode. The results obtained are in good agreement with those obtained using previous prototypes. The proceedings conclude with a summary of the current status and future plans

Readout electronics for low dark count pixel detectors based on Geiger mode avalanche photodiodes fabricated in conventional CMOS technologies for future linear colliders

International Nuclear Information System (INIS)

Vilella, E.; Arbat, A.; Comerma, A.; Trenado, J.; Alonso, O.; Gascon, D.; Vila, A.; Garrido, L.; Dieguez, A.

2011-01-01

High sensitivity and excellent timing accuracy of the Geiger mode avalanche photodiodes make them ideal sensors as pixel detectors for particle tracking in high energy physics experiments to be performed in future linear colliders. Nevertheless, it is well known that these sensors suffer from dark counts and afterpulsing noise, which induce false hits (indistinguishable from event detection) as well as an increase in the necessary area of the readout system. In this work, we present a comparison between APDs fabricated in a high voltage 0.35 μm and a high integration 0.13 μm commercially available CMOS technologies that has been performed to determine which of them best fits the particle collider requirements. In addition, a readout circuit that allows low noise operation is introduced. Experimental characterization of the proposed pixel is also presented in this work.

Challenges of small-pixel infrared detectors: a review.

Science.gov (United States)

Rogalski, A; Martyniuk, P; Kopytko, M

2016-04-01

In the last two decades, several new concepts for improving the performance of infrared detectors have been proposed. These new concepts particularly address the drive towards the so-called high operating temperature focal plane arrays (FPAs), aiming to increase detector operating temperatures, and as a consequence reduce the cost of infrared systems. In imaging systems with the above megapixel formats, pixel dimension plays a crucial role in determining critical system attributes such as system size, weight and power consumption (SWaP). The advent of smaller pixels has also resulted in the superior spatial and temperature resolution of these systems. Optimum pixel dimensions are limited by diffraction effects from the aperture, and are in turn wavelength-dependent. In this paper, the key challenges in realizing optimum pixel dimensions in FPA design including dark current, pixel hybridization, pixel delineation, and unit cell readout capacity are outlined to achieve a sufficiently adequate modulation transfer function for the ultra-small pitches involved. Both photon and thermal detectors have been considered. Concerning infrared photon detectors, the trade-offs between two types of competing technology-HgCdTe material systems and III-V materials (mainly barrier detectors)-have been investigated.

Development of Fast and High Precision CMOS Pixel Sensors for an ILC Vertex Detector

CERN Document Server

Hu-Guo, Christine

2010-01-01

The development of CMOS pixel sensors with column parallel read-out and integrated zero-suppression has resulted in a full size, nearly 1 Megapixel, prototype with ~100 \\mu s read-out time. Its performances are quite close to the ILD vertex detector specifications, showing that the sensor architecture can presumably be evolved to meet these specifications exactly. Starting from the existing architecture and achieved performances, the paper will expose the details of how the sensor will be evolved in the coming 2-3 years in perspective of the ILD Detector Baseline Document, to be delivered in 2012. Two different devices are foreseen for this objective, one being optimized for the inner layers and their fast read-out requirement, while the other exploits the dimmed background in the outer layers to reduce the power consumption. The sensor evolution relies on a high resistivity epitaxial layer, on the use of an advanced CMOS process and on the combination of column-level ADCs with a pixel array. The paper will p...

Real-time imaging systems for superconducting nanowire single-photon detector arrays

Energy Technology Data Exchange (ETDEWEB)

Hofherr, Matthias

2014-07-01

Superconducting nanowire singe-photon detectors (SNSPD) are promising detectors in the field of applications, where single-photon resolution is required like in quantum optics, spectroscopy or astronomy. These cryogenic detectors gain from a broad spectrum in the optical and infrared range and deliver low dark counts and low jitter. This work provides a piece of deeper physical understanding of detector functionality in combination with highly engineered readout development. A detailed analysis focuses on the intrinsic detection mechanism of SNSPDs related to the detection in the infrared regime and the evolution of dark counts. With this fundamental knowledge, the next step is the development of a multi-pixel readout at cryogenic conditions. It is demonstrated, how two auspicious multi-pixel readout concepts can be realized, which enables statistical framing like in imaging applications using RSFQ electronics with fast framing rates and the readout of a detector array with continuous real-time single-photon resolution.

The ALICE Silicon Pixel Detector System (SPD)

CERN Document Server

Kluge, A; Antinori, Federico; Burns, M; Cali, I A; Campbell, M; Caselle, M; Ceresa, S; Dima, R; Elias, D; Fabris, D; Krivda, Marian; Librizzi, F; Manzari, Vito; Morel, M; Moretto, Sandra; Osmic, F; Pappalardo, G S; Pepato, Adriano; Pulvirenti, A; Riedler, P; Riggi, F; Santoro, R; Stefanini, G; Torcato De Matos, C; Turrisi, R; Tydesjo, H; Viesti, G; PH-EP

2007-01-01

The ALICE silicon pixel detector (SPD) comprises the two innermost layers of the ALICE inner tracker system. The SPD includes 120 detector modules (half-staves) each consisting of 10 ALICE pixel chips bump bonded to two silicon sensors and one multi-chip read-out module. Each pixel chip contains 8192 active cells, so that the total number of pixel cells in the SPD is ≈ 107. The on-detector read-out is based on a multi-chip-module containing 4 ASICs and an optical transceiver module. The constraints on material budget and detector module dimensions are very demanding.

Innovative multi-cantilever array sensor system with MOEMS read-out

Science.gov (United States)

Ivaldi, F.; Bieniek, T.; Janus, P.; Grabiec, P.; Majstrzyk, W.; Kopiec, D.; Gotszalk, T.

2016-11-01

Cantilever based sensor system are a well-established sensor family exploited in several every-day life applications as well as in high-end research areas. The very high sensitivity of such systems and the possibility to design and functionalize the cantilevers to create purpose built and highly selective sensors have increased the interest of the scientific community and the industry in further exploiting this promising sensors type. Optical deflection detection systems for cantilever sensors provide a reliable, flexible method for reading information from cantilevers with the highest sensitivity. However the need of using multi-cantilever arrays in several fields of application such as medicine, biology or safety related areas, make the optical method less suitable due to its structural complexity. Working in the frame of a the Joint Undertaking project Lab4MEMS II our group proposes a novel and innovative approach to solve this issue, by integrating a Micro-Opto-Electro-Mechanical-System (MOEMS) with dedicated optics, electronics and software with a MOEMS micro-mirror, ultimately developed in the frame of Lab4MEMSII. In this way we are able to present a closely packed, lightweight solution combining the advantages of standard optical read-out systems with the possibility of recording multiple read-outs from large cantilever arrays quasi simultaneously.

Development of n+-in-p planar pixel quadsensor flip-chipped with FE-I4 readout ASICs

International Nuclear Information System (INIS)

Unno, Y.; Hanagaki, K.; Hori, R.; Ikegami, Y.; Nakamura, K.; Takubo, Y.; Kamada, S.; Yamamura, K.; Yamamoto, H.; Takashima, R.; Tojo, J.; Kono, T.; Nagai, R.; Saito, S.; Sugibayashi, K.; Hirose, M.; Jinnouchi, O.; Sato, S.; Sawai, H.; Hara, K.

2017-01-01

We have developed flip-chip modules applicable to the pixel detector for the HL-LHC. New radiation-tolerant n + -in-p planar pixel sensors of a size of four FE-I4 application-specific integrated circuits (ASICs) are laid out in a 6-in wafer. Variation in readout connection for the pixels at the boundary of ASICs is implemented in the design of quadsensors. Bump bonding technology is developed for four ASICs onto one quadsensor. Both sensors and ASICs are thinned to 150 μm before bump bonding, and are held flat with vacuum chucks. Using lead-free SnAg solder bumps, we encounter deficiency with large areas of disconnected bumps after thermal stress treatment, including irradiation. Surface oxidation of the solder bumps is identified as a critical source of this deficiency after bump bonding trials, using SnAg bumps with solder flux, indium bumps, and SnAg bumps with a newly-introduced hydrogen-reflow process. With hydrogen-reflow, we establish flux-less bump bonding technology with SnAg bumps, appropriate for mass production of the flip-chip modules with thin sensors and thin ASICs.

Readout of the upgraded ALICE-ITS

Science.gov (United States)

Szczepankiewicz, A.; ALICE Collaboration

2016-07-01

The ALICE experiment will undergo a major upgrade during the second long shutdown of the CERN LHC. As part of this program, the present Inner Tracking System (ITS), which employs different layers of hybrid pixels, silicon drift and strip detectors, will be replaced by a completely new tracker composed of seven layers of monolithic active pixel sensors. The upgraded ITS will have more than twelve billion pixels in total, producing 300 Gbit/s of data when tracking 50 kHz Pb-Pb events. Two families of pixel chips realized with the TowerJazz CMOS imaging process have been developed as candidate sensors: the ALPIDE, which uses a proprietary readout and sparsification mechanism and the MISTRAL-O, based on a proven rolling shutter architecture. Both chips can operate in continuous mode, with the ALPIDE also supporting triggered operations. As the communication IP blocks are shared among the two chip families, it has been possible to develop a common Readout Electronics. All the sensor components (analog stages, state machines, buffers, FIFOs, etc.) have been modelled in a system level simulation, which has been extensively used to optimize both the sensor and the whole readout chain design in an iterative process. This contribution covers the progress of the R&D efforts and the overall expected performance of the ALICE-ITS readout system.

Readout of the upgraded ALICE-ITS

International Nuclear Information System (INIS)

Szczepankiewicz, A.

2016-01-01

The ALICE experiment will undergo a major upgrade during the second long shutdown of the CERN LHC. As part of this program, the present Inner Tracking System (ITS), which employs different layers of hybrid pixels, silicon drift and strip detectors, will be replaced by a completely new tracker composed of seven layers of monolithic active pixel sensors. The upgraded ITS will have more than twelve billion pixels in total, producing 300 Gbit/s of data when tracking 50 kHz Pb–Pb events. Two families of pixel chips realized with the TowerJazz CMOS imaging process have been developed as candidate sensors: the ALPIDE, which uses a proprietary readout and sparsification mechanism and the MISTRAL-O, based on a proven rolling shutter architecture. Both chips can operate in continuous mode, with the ALPIDE also supporting triggered operations. As the communication IP blocks are shared among the two chip families, it has been possible to develop a common Readout Electronics. All the sensor components (analog stages, state machines, buffers, FIFOs, etc.) have been modelled in a system level simulation, which has been extensively used to optimize both the sensor and the whole readout chain design in an iterative process. This contribution covers the progress of the R&D efforts and the overall expected performance of the ALICE-ITS readout system.

Readout of the upgraded ALICE-ITS

Energy Technology Data Exchange (ETDEWEB)

Szczepankiewicz, A., E-mail: Adam.Szczepankiewicz@cern.ch [CERN, Geneva (Switzerland); Institute of Computer Science, Warsaw University of Technology, Warsaw (Poland)

2016-07-11

The ALICE experiment will undergo a major upgrade during the second long shutdown of the CERN LHC. As part of this program, the present Inner Tracking System (ITS), which employs different layers of hybrid pixels, silicon drift and strip detectors, will be replaced by a completely new tracker composed of seven layers of monolithic active pixel sensors. The upgraded ITS will have more than twelve billion pixels in total, producing 300 Gbit/s of data when tracking 50 kHz Pb–Pb events. Two families of pixel chips realized with the TowerJazz CMOS imaging process have been developed as candidate sensors: the ALPIDE, which uses a proprietary readout and sparsification mechanism and the MISTRAL-O, based on a proven rolling shutter architecture. Both chips can operate in continuous mode, with the ALPIDE also supporting triggered operations. As the communication IP blocks are shared among the two chip families, it has been possible to develop a common Readout Electronics. All the sensor components (analog stages, state machines, buffers, FIFOs, etc.) have been modelled in a system level simulation, which has been extensively used to optimize both the sensor and the whole readout chain design in an iterative process. This contribution covers the progress of the R&D efforts and the overall expected performance of the ALICE-ITS readout system.

Development of radiation hardened pixel sensors for charged particle detection

CERN Document Server

Koziel, Michal

2014-01-01

CMOS Pixel Sensors are being developed since a few years to equip vertex detectors for future high-energy physics experiments with the crucial advantages of a low material budget and low production costs. The features simultaneously required are a short readout time, high granularity and high tolerance to radiation. This thesis mainly focuses on the radiation tolerance studies. To achieve the targeted readout time (tens of microseconds), the sensor pixel readout was organized in parallel columns restricting in addition the readout to pixels that had collected the signal charge. The pixels became then more complex, and consequently more sensitive to radiation. Different in-pixel architectures were studied and it was concluded that the tolerance to ionizing radiation was limited to 300 krad with the 0.35- m fabrication process currently used, while the targeted value was several Mrad. Improving this situation calls for implementation of the sensors in processes with a smaller feature size which naturally imp...

Frequency multiplexed superconducting quantum interference device readout of large bolometer arrays for cosmic microwave background measurements.

Science.gov (United States)

Dobbs, M A; Lueker, M; Aird, K A; Bender, A N; Benson, B A; Bleem, L E; Carlstrom, J E; Chang, C L; Cho, H-M; Clarke, J; Crawford, T M; Crites, A T; Flanigan, D I; de Haan, T; George, E M; Halverson, N W; Holzapfel, W L; Hrubes, J D; Johnson, B R; Joseph, J; Keisler, R; Kennedy, J; Kermish, Z; Lanting, T M; Lee, A T; Leitch, E M; Luong-Van, D; McMahon, J J; Mehl, J; Meyer, S S; Montroy, T E; Padin, S; Plagge, T; Pryke, C; Richards, P L; Ruhl, J E; Schaffer, K K; Schwan, D; Shirokoff, E; Spieler, H G; Staniszewski, Z; Stark, A A; Vanderlinde, K; Vieira, J D; Vu, C; Westbrook, B; Williamson, R

2012-07-01

A technological milestone for experiments employing transition edge sensor bolometers operating at sub-Kelvin temperature is the deployment of detector arrays with 100s-1000s of bolometers. One key technology for such arrays is readout multiplexing: the ability to read out many sensors simultaneously on the same set of wires. This paper describes a frequency-domain multiplexed readout system which has been developed for and deployed on the APEX-SZ and South Pole Telescope millimeter wavelength receivers. In this system, the detector array is divided into modules of seven detectors, and each bolometer within the module is biased with a unique ∼MHz sinusoidal carrier such that the individual bolometer signals are well separated in frequency space. The currents from all bolometers in a module are summed together and pre-amplified with superconducting quantum interference devices operating at 4 K. Room temperature electronics demodulate the carriers to recover the bolometer signals, which are digitized separately and stored to disk. This readout system contributes little noise relative to the detectors themselves, is remarkably insensitive to unwanted microphonic excitations, and provides a technology pathway to multiplexing larger numbers of sensors.

Progress report on the use of hybrid silicon pin diode arrays in high energy physics

International Nuclear Information System (INIS)

Shapiro, S.L.; Jernigan, J.G.; Arens, J.F.

1990-05-01

We report on the successful effort to develop hybrid PIN diode arrays and to demonstrate their potential as components of vertex detectors. Hybrid pixel arrays have been fabricated by the Hughes Aircraft Co. by bump-bonding readout chips developed by Hughes to an array of PIN diodes manufactured by Micron Semiconductor Inc. These hybrid pixel arrays were constructed in two configurations. One array format has 10 x 64 pixels, each 120 μm square; and the other format has 256 x 156 pixels, each 30 μm square. In both cases, the thickness of the PIN diode layer is 300 μm. Measurements of detector performance show that excellent position resolution can be achieved by interpolation. By determining the centroid of the charge cloud which spreads charge into a number of neighboring pixels, a spatial resolution of a few microns has been attained. The noise has been measured to be about 300 electrons (rms) at room temperature, as expected from KTC and dark current considerations, yielding a signal-to-noise ratio of about 100 for minimum ionizing particles. 4 refs., 17 figs

Scalable gamma-ray camera for wide-area search based on silicon photomultipliers array

Science.gov (United States)

Jeong, Manhee; Van, Benjamin; Wells, Byron T.; D'Aries, Lawrence J.; Hammig, Mark D.

2018-03-01

Portable coded-aperture imaging systems based on scintillators and semiconductors have found use in a variety of radiological applications. For stand-off detection of weakly emitting materials, large volume detectors can facilitate the rapid localization of emitting materials. We describe a scalable coded-aperture imaging system based on 5.02 × 5.02 cm2 CsI(Tl) scintillator modules, each partitioned into 4 × 4 × 20 mm3 pixels that are optically coupled to 12 × 12 pixel silicon photo-multiplier (SiPM) arrays. The 144 pixels per module are read-out with a resistor-based charge-division circuit that reduces the readout outputs from 144 to four signals per module, from which the interaction position and total deposited energy can be extracted. All 144 CsI(Tl) pixels are readily distinguishable with an average energy resolution, at 662 keV, of 13.7% FWHM, a peak-to-valley ratio of 8.2, and a peak-to-Compton ratio of 2.9. The detector module is composed of a SiPM array coupled with a 2 cm thick scintillator and modified uniformly redundant array mask. For the image reconstruction, cross correlation and maximum likelihood expectation maximization methods are used. The system shows a field of view of 45° and an angular resolution of 4.7° FWHM.

Operational Experience with the ATLAS Pixel Detector

CERN Document Server

Lantzsch, Kerstin; The ATLAS collaboration

2016-01-01

Run 2 of the LHC is providing new challenges to track and vertex reconstruction with higher energies, denser jets and higher rates. Therefore the ATLAS experiment has constructed the first 4-layer Pixel detector in HEP, installing a new Pixel layer, also called Insertable B-Layer (IBL). In addition the Pixel detector was refurbished with new service quarter panels to recover about 3% of defective modules lost during run 1 and a new optical readout system to readout the data at higher speed while reducing the occupancy when running with increased luminosity. The commissioning, operation and performance of the 4-layer Pixel Detector will be presented.

Pixel readout chips in deep submicron CMOS for ALICE and LHCb tolerant to 10 Mrad and beyond

International Nuclear Information System (INIS)

Snoeys, W.; Burns, M.; Campbell, M.; Cantatore, E.; Cencelli, V.; Dinapoli, R.; Heijne, E.; Jarron, P.; Lamanna, P.; Minervini, D.; Morel, M.; O'Shea, V.; Quiquempoix, V.; Bello, D.S.S.D.San Segundo; Van Koningsveld, B.; Wyllie, K.

2001-01-01

The ALICE1LHCB chip is a mixed-mode integrated circuit designed to read out silicon pixel detectors for two different applications: particle tracking in the ALICE Silicon Pixel Detector and particle identification in the LHCb Ring Imaging Cherenkov detector. To satisfy the different needs for these two experiments, the chip can be operated in two different modes. In tracking mode all the 50 μmx425 μm pixel cells in the 256x32 array are read out individually, whilst in particle identification mode they are combined in groups of 8 to form a 32x32 array of 400 μmx425 μm cells. Radiation tolerance was enhanced through special circuit layout. Sensitivity to coupling of digital signals into the analog front end was minimized. System issues such as testability and uniformity further constrained the design. The circuit is currently being manufactured in a commercial 0.25 μm CMOS technology

Development of the ASICs for the NA62 pixel Gigatracker

CERN Document Server

Jarron, P

2008-01-01

We present the ASIC development for the readout electronics of the Gigatracker pixel detector of NA62. Specifications of this detector are challenging in terms of timing precision with a hit time stamp accuracy of 100 ps and a peak hit rate of 50 Mhits/cm2/s. A timing precision and hit rate are more than one order of magnitude faster than pixel LHC readout ASIC. The research for pixel cell design and the readout architectures are following two approaches, which are presented and discussed in this paper. Presently demonstrator prototypes are under development and SPICE simulation results of the frontend, the readout strategy and and the pixelcolumn are also presented and discussed.

The RD53 collaboration's SystemVerilog-UVM simulation framework and its general applicability to design of advanced pixel readout chips

International Nuclear Information System (INIS)

Marconi, S; Christiansen, J; Conti, E; Placidi, P; Hemperek, T

2014-01-01

The foreseen Phase 2 pixel upgrades at the LHC have very challenging requirements for the design of hybrid pixel readout chips. A versatile pixel simulation platform is as an essential development tool for the design, verification and optimization of both the system architecture and the pixel chip building blocks (Intellectual Properties, IPs). This work is focused on the implemented simulation and verification environment named VEPIX53, built using the SystemVerilog language and the Universal Verification Methodology (UVM) class library in the framework of the RD53 Collaboration. The environment supports pixel chips at different levels of description: its reusable components feature the generation of different classes of parameterized input hits to the pixel matrix, monitoring of pixel chip inputs and outputs, conformity checks between predicted and actual outputs and collection of statistics on system performance. The environment has been tested performing a study of shared architectures of the trigger latency buffering section of pixel chips. A fully shared architecture and a distributed one have been described at behavioral level and simulated; the resulting memory occupancy statistics and hit loss rates have subsequently been compared

Array-scale performance of TES X-ray Calorimeters Suitable for Constellation-X

Science.gov (United States)

Kilbourne, C. A.; Bandler, S. R.; Brown, A. D.; Chervenak, J. A.; Eckart, M. E.; Finkbeiner, F. M.; Iyomoto, N.; Kelley, R. L.; Porter, F. S.; Smith, S. J.;

Performance of a thermal imager employing a hybrid pyroelectric detector array with MOSFET readout

International Nuclear Information System (INIS)

Watton, R.; Mansi, M.V.

1988-01-01

A thermal imager employing a two-dimensional hybrid array of pyroelectric detectors with MOSFET readout has been built. The design and theoretical performance of the detector are discussed, and the results of performance measurements are presented. 8 references

A Novel Two-Wire Fast Readout Approach for Suppressing Cable Crosstalk in a Tactile Resistive Sensor Array.

Science.gov (United States)

Wu, Jianfeng; Wang, Yu; Li, Jianqing; Song, Aiguo

2016-05-18

For suppressing the crosstalk problem due to wire resistances and contacted resistances of the long flexible cables in tactile sensing systems, we present a novel two-wire fast readout approach for the two-dimensional resistive sensor array in shared row-column fashion. In the approach, two wires are used for every driving electrode and every sampling electrode in the resistive sensor array. The approach with a high readout rate, though it requires a large number of wires and many sampling channels, solves the cable crosstalk problem. We also verified the approach's performance with Multisim simulations and actual experiments.

A Novel Two-Wire Fast Readout Approach for Suppressing Cable Crosstalk in a Tactile Resistive Sensor Array

Directory of Open Access Journals (Sweden)

Jianfeng Wu

2016-05-01

Full Text Available For suppressing the crosstalk problem due to wire resistances and contacted resistances of the long flexible cables in tactile sensing systems, we present a novel two-wire fast readout approach for the two-dimensional resistive sensor array in shared row-column fashion. In the approach, two wires are used for every driving electrode and every sampling electrode in the resistive sensor array. The approach with a high readout rate, though it requires a large number of wires and many sampling channels, solves the cable crosstalk problem. We also verified the approach’s performance with Multisim simulations and actual experiments.

X-ray imaging with photon counting hybrid semiconductor pixel detectors

CERN Document Server

Manolopoulos, S; Campbell, M; Snoeys, W; Heijne, Erik H M; Pernigotti, E; Raine, C; Smith, K; Watt, J; O'Shea, V; Ludwig, J; Schwarz, C

1999-01-01

Semiconductor pixel detectors, originally developed for particle physics experiments, have been studied as X-ray imaging devices. The performance of devices using the OMEGA 3 read-out chip bump-bonded to pixellated silicon semiconductor detectors is characterised in terms of their signal-to-noise ratio when exposed to 60 kVp X-rays. Although parts of the devices achieve values of this ratio compatible with the noise being photon statistics limited, this is not found to hold for the whole pixel matrix, resulting in the global signal-to-noise ratio being compromised. First results are presented of X-ray images taken with a gallium arsenide pixel detector bump-bonded to a new read-out chip, (MEDIPIX), which is a single photon counting read-out chip incorporating a 15-bit counter in every pixel. (author)

Gas pixel detectors

International Nuclear Information System (INIS)

Bellazzini, R.; Baldini, L.; Brez, A.; Cavalca, F.; Latronico, L.; Massai, M.M.; Minuti, M.; Omodei, N.; Pesce-Rollins, M.; Sgro, C.; Spandre, G.; Costa, E.; Soffitta, P.

2007-01-01

With the Gas Pixel Detector (GPD), the class of micro-pattern gas detectors has reached a complete integration between the gas amplification structure and the read-out electronics. To obtain this goal, three generations of application-specific integrated circuit of increased complexity and improved functionality has been designed and fabricated in deep sub-micron CMOS technology. This implementation has allowed manufacturing a monolithic device, which realizes, at the same time, the pixelized charge-collecting electrode and the amplifying, shaping and charge measuring front-end electronics of a GPD. A big step forward in terms of size and performances has been obtained in the last version of the 0.18 μm CMOS analog chip, where over a large active area of 15x15 mm 2 a very high channel density (470 pixels/mm 2 ) has been reached. On the top metal layer of the chip, 105,600 hexagonal pixels at 50 μm pitch have been patterned. The chip has customable self-trigger capability and includes a signal pre-processing function for the automatic localization of the event coordinates. In this way, by limiting the output signal to only those pixels belonging to the region of interest, it is possible to reduce significantly the read-out time and data volume. In-depth tests performed on a GPD built up by coupling this device to a fine pitch (50 μm) gas electron multiplier are reported. Matching of the gas amplification and read-out pitch has let to obtain optimal results. A possible application of this detector for X-ray polarimetry of astronomical sources is discussed

Integrated X-ray and charged particle active pixel CMOS sensor arrays using an epitaxial silicon sensitive region

International Nuclear Information System (INIS)

Kleinfelder, Stuart; Bichsel, Hans; Bieser, Fred; Matis, Howard S.; Rai, Gulshan; Retiere, Fabrice; Weiman, Howard; Yamamoto, Eugene

2002-01-01

Integrated CMOS Active Pixel Sensor (APS) arrays have been fabricated and tested using X-ray and electron sources. The 128 by 128 pixel arrays, designed in a standard 0.25 micron process, use a ∼10 micron epitaxial silicon layer as a deep detection region. The epitaxial layer has a much greater thickness than the surface features used by standard CMOS APS, leading to stronger signals and potentially better signal-to-noise ratio (SNR). On the other hand, minority carriers confined within the epitaxial region may diffuse to neighboring pixels, blur images and reduce peak signal intensity. But for low-rate, sparse-event images, centroid analysis of this diffusion may be used to increase position resolution. Careful trade-offs involving pixel size and sense-node area verses capacitance must be made to optimize overall performance. The prototype sensor arrays, therefore, include a range of different pixel designs, including different APS circuits and a range of different epitaxial layer contact structures. The fabricated arrays were tested with 1.5 GeV electrons and Fe-55 X-ray sources, yielding a measured noise of 13 electrons RMS and an SNR for single Fe-55 X-rays of greater than 38

Transition-edge sensor pixel parameter design of the microcalorimeter array for the x-ray integral field unit on Athena

Science.gov (United States)

Smith, S. J.; Adams, J. S.; Bandler, S. R.; Betancourt-Martinez, G. L.; Chervenak, J. A.; Chiao, M. P.; Eckart, M. E.; Finkbeiner, F. M.; Kelley, R. L.; Kilbourne, C. A.; Miniussi, A. R.; Porter, F. S.; Sadleir, J. E.; Sakai, K.; Wakeham, N. A.; Wassell, E. J.; Yoon, W.; Bennett, D. A.; Doriese, W. B.; Fowler, J. W.; Hilton, G. C.; Morgan, K. M.; Pappas, C. G.; Reintsema, C. N.; Swetz, D. S.; Ullom, J. N.; Irwin, K. D.; Akamatsu, H.; Gottardi, L.; den Hartog, R.; Jackson, B. D.; van der Kuur, J.; Barret, D.; Peille, P.

2016-07-01

The focal plane of the X-ray integral field unit (X-IFU) for ESA's Athena X-ray observatory will consist of 4000 transition edge sensor (TES) x-ray microcalorimeters optimized for the energy range of 0.2 to 12 keV. The instrument will provide unprecedented spectral resolution of 2.5 eV at energies of up to 7 keV and will accommodate photon fluxes of 1 mCrab (90 cps) for point source observations. The baseline configuration is a uniform large pixel array (LPA) of 4.28" pixels that is read out using frequency domain multiplexing (FDM). However, an alternative configuration under study incorporates an 18 × 18 small pixel array (SPA) of 2" pixels in the central 36" region. This hybrid array configuration could be designed to accommodate higher fluxes of up to 10 mCrab (900 cps) or alternately for improved spectral performance (< 1.5 eV) at low count-rates. In this paper we report on the TES pixel designs that are being optimized to meet these proposed LPA and SPA configurations. In particular we describe details of how important TES parameters are chosen to meet the specific mission criteria such as energy resolution, count-rate and quantum efficiency, and highlight performance trade-offs between designs. The basis of the pixel parameter selection is discussed in the context of existing TES arrays that are being developed for solar and x-ray astronomy applications. We describe the latest results on DC biased diagnostic arrays as well as large format kilo-pixel arrays and discuss the technical challenges associated with integrating different array types on to a single detector die.

Three Generations of FPGA DAQ Development for the ATLAS Pixel Detector

CERN Document Server

AUTHOR|(CDS)2091916; Hsu, Shih-Chieh; Hauck, Scott Alan

The Large Hadron Collider (LHC) at the European Center for Nuclear Research (CERN) tracks a schedule of long physics runs, followed by periods of inactivity known as Long Shutdowns (LS). During these LS phases both the LHC, and the experiments around its ring, undergo maintenance and upgrades. For the LHC these upgrades improve their ability to create data for physicists; the more data the LHC can create the more opportunities there are for rare events to appear that physicists will be interested in. The experiments upgrade so they can record the data and ensure the event won’t be missed. Currently the LHC is in Run 2 having completed the first LS of three. This thesis focuses on the development of Field-Programmable Gate Array (FPGA)-based readout systems that span across three major tasks of the ATLAS Pixel data acquisition (DAQ) system. The evolution of Pixel DAQ’s Readout Driver (ROD) card is presented. Starting from improvements made to the new Insertable B-Layer (IBL) ROD design, which was part of t...

CVD diamond pixel detectors for LHC experiments

Energy Technology Data Exchange (ETDEWEB)

Wedenig, R.; Adam, W.; Bauer, C.; Berdermann, E.; Bergonzo, P.; Bogani, F.; Borchi, E.; Brambilla, A.; Bruzzi, M.; Colledani, C.; Conway, J.; Dabrowski, W.; Delpierre, P.; Deneuville, A.; Dulinski, W.; Eijk, B. van; Fallou, A.; Fizzotti, F.; Foulon, F.; Friedl, M.; Gan, K.K.; Gheeraert, E.; Grigoriev, E.; Hallewell, G.; Hall-Wilton, R.; Han, S.; Hartjes, F.; Hrubec, J.; Husson, D.; Kagan, H.; Kania, D.; Kaplon, J.; Karl, C.; Kass, R.; Knoepfle, K.T.; Krammer, M.; Logiudice, A.; Lu, R.; Manfredi, P.F.; Manfredotti, C.; Marshall, R.D.; Meier, D.; Mishina, M.; Oh, A.; Pan, L.S.; Palmieri, V.G.; Pernicka, M.; Peitz, A.; Pirollo, S.; Polesello, P.; Pretzl, K.; Procario, M.; Re, V.; Riester, J.L.; Roe, S.; Roff, D.; Rudge, A.; Runolfsson, O.; Russ, J.; Schnetzer, S.; Sciortino, S.; Speziali, V.; Stelzer, H.; Stone, R.; Suter, B.; Tapper, R.J.; Tesarek, R.; Trawick, M.; Trischuk, W.; Vittone, E.; Wagner, A.; Walsh, A.M.; Weilhammer, P.; White, C.; Zeuner, W.; Ziock, H.; Zoeller, M.; Blanquart, L.; Breugnion, P.; Charles, E.; Ciocio, A.; Clemens, J.C.; Dao, K.; Einsweiler, K.; Fasching, D.; Fischer, P.; Joshi, A.; Keil, M.; Klasen, V.; Kleinfelder, S.; Laugier, D.; Meuser, S.; Milgrome, O.; Mouthuy, T.; Richardson, J.; Sinervo, P.; Treis, J.; Wermes, N

1999-08-01

This paper reviews the development of CVD diamond pixel detectors. The preparation of the diamond pixel sensors for bump-bonding to the pixel readout electronics for the LHC and the results from beam tests carried out at CERN are described.

CVD diamond pixel detectors for LHC experiments

International Nuclear Information System (INIS)

Wedenig, R.; Adam, W.; Bauer, C.; Berdermann, E.; Bergonzo, P.; Bogani, F.; Borchi, E.; Brambilla, A.; Bruzzi, M.; Colledani, C.; Conway, J.; Dabrowski, W.; Delpierre, P.; Deneuville, A.; Dulinski, W.; Eijk, B. van; Fallou, A.; Fizzotti, F.; Foulon, F.; Friedl, M.; Gan, K.K.; Gheeraert, E.; Grigoriev, E.; Hallewell, G.; Hall-Wilton, R.; Han, S.; Hartjes, F.; Hrubec, J.; Husson, D.; Kagan, H.; Kania, D.; Kaplon, J.; Karl, C.; Kass, R.; Knoepfle, K.T.; Krammer, M.; Logiudice, A.; Lu, R.; Manfredi, P.F.; Manfredotti, C.; Marshall, R.D.; Meier, D.; Mishina, M.; Oh, A.; Pan, L.S.; Palmieri, V.G.; Pernicka, M.; Peitz, A.; Pirollo, S.; Polesello, P.; Pretzl, K.; Procario, M.; Re, V.; Riester, J.L.; Roe, S.; Roff, D.; Rudge, A.; Runolfsson, O.; Russ, J.; Schnetzer, S.; Sciortino, S.; Speziali, V.; Stelzer, H.; Stone, R.; Suter, B.; Tapper, R.J.; Tesarek, R.; Trawick, M.; Trischuk, W.; Vittone, E.; Wagner, A.; Walsh, A.M.; Weilhammer, P.; White, C.; Zeuner, W.; Ziock, H.; Zoeller, M.; Blanquart, L.; Breugnion, P.; Charles, E.; Ciocio, A.; Clemens, J.C.; Dao, K.; Einsweiler, K.; Fasching, D.; Fischer, P.; Joshi, A.; Keil, M.; Klasen, V.; Kleinfelder, S.; Laugier, D.; Meuser, S.; Milgrome, O.; Mouthuy, T.; Richardson, J.; Sinervo, P.; Treis, J.; Wermes, N.

1999-01-01

This paper reviews the development of CVD diamond pixel detectors. The preparation of the diamond pixel sensors for bump-bonding to the pixel readout electronics for the LHC and the results from beam tests carried out at CERN are described

Study of Charge Diffusion in a Silicon Detector Using an Energy Sensitive Pixel Readout Chip

CERN Document Server

Schioppa, E. J.; van Beuzekom, M.; Visser, J.; Koffeman, E.; Heijne, E.; Engel, K. J.; Uher, J.

2015-01-01

A 300 μm thick thin p-on-n silicon sensor was connected to an energy sensitive pixel readout ASIC and exposed to a beam of highly energetic charged particles. By exploiting the spectral information and the fine segmentation of the detector, we were able to measure the evolution of the transverse profile of the charge carriers cloud in the sensor as a function of the drift distance from the point of generation. The result does not rely on model assumptions or electric field calculations. The data are also used to validate numerical simulations and to predict the detector spectral response to an X-ray fluorescence spectrum for applications in X-ray imaging.

Si and gaas pixel detectors for medical imaging applications

International Nuclear Information System (INIS)

Bisogni, M. G.

2001-01-01

As the use of digital radiographic equipment in the morphological imaging field is becoming the more and more diffuse, the research of new and more performing devices from public institutions and industrial companies is in constant progress. Most of these devices are based on solid-state detectors as X-ray sensors. Semiconductor pixel detectors, originally developed in the high energy physics environment, have been then proposed as digital detector for medical imaging applications. In this paper a digital single photon counting device, based on silicon and GaAs pixel detector, is presented. The detector is a thin slab of semiconductor crystal where an array of 64 by 64 square pixels, 170- m side, has been built on one side. The data read-out is performed by a VLSI integrated circuit named Photon Counting Chip (PCC), developed within the MEDIPIX collaboration. Each chip cell geometrically matches the sensor pixel. It contains a charge preamplifier, a threshold comparator and a 15 bits pseudo-random counter and it is coupled to the detector by means of bump bonding. Most important advantages of such system, with respect to a traditional X-rays film/screen device, are the wider linear dynamic range (3x104) and the higher performance in terms of MTF and DQE. Besides the single photon counting architecture allows to detect image contrasts lower than 3%. Electronics read-out performance as well as imaging capabilities of the digital device will be presented. Images of mammographic phantoms acquired with a standard Mammographic tube will be compared with radiographs obtained with traditional film/screen systems

CVD diamond pixel detectors for LHC experiments

CERN Document Server

Wedenig, R; Bauer, C; Berdermann, E; Bergonzo, P; Bogani, F; Borchi, E; Brambilla, A; Bruzzi, Mara; Colledani, C; Conway, J; Dabrowski, W; Delpierre, P A; Deneuville, A; Dulinski, W; van Eijk, B; Fallou, A; Fizzotti, F; Foulon, F; Friedl, M; Gan, K K; Gheeraert, E; Grigoriev, E; Hallewell, G D; Hall-Wilton, R; Han, S; Hartjes, F G; Hrubec, Josef; Husson, D; Kagan, H; Kania, D R; Kaplon, J; Karl, C; Kass, R; Knöpfle, K T; Krammer, Manfred; Lo Giudice, A; Lü, R; Manfredi, P F; Manfredotti, C; Marshall, R D; Meier, D; Mishina, M; Oh, A; Pan, L S; Palmieri, V G; Pernicka, Manfred; Peitz, A; Pirollo, S; Polesello, P; Pretzl, Klaus P; Procario, M; Re, V; Riester, J L; Roe, S; Roff, D G; Rudge, A; Runólfsson, O; Russ, J; Schnetzer, S R; Sciortino, S; Speziali, V; Stelzer, H; Stone, R; Suter, B; Tapper, R J; Tesarek, R J; Trawick, M L; Trischuk, W; Vittone, E; Wagner, A; Walsh, A M; Weilhammer, Peter; White, C; Zeuner, W; Ziock, H J; Zöller, M

1999-01-01

This paper reviews the development of CVD diamond pixel detectors. The preparation of the diamond pixel sensors for bump-bonding to the pixel readout electronics for the LHC and the results from beam tests carried out at CERN are described. (9 refs).

Research and Development of Monolithic Active Pixel Sensors for the Detection of the Elementary Particles

International Nuclear Information System (INIS)

Li, Y.

2007-09-01

In order to develop high spatial resolution and readout speed vertex detectors for the future International Linear Collider (ILC), fast CMOS Monolithic Active Pixel Sensors (MAPS) are studied on this work. Two prototypes of MAPS, MIMOSA 8 and MIMOSA 16, based on the same micro-electronic architecture were developed in CMOS processes with different thickness of epitaxial layer. The size of pixel matrix is 32 x 128: 8 columns of the pixel array are readout directly with analog outputs and the other 24 columns are connected to the column level auto-zero discriminators. The Correlated Double Sampling (CDS) structures are successfully implemented inside pixel and discriminator. The photo diode type pixels with different diode sizes are used in these prototypes. With a 55 Fe X-ray radioactive source, the important parameters, such as Temporal Noise, Fixed Pattern Noise (FPN), Signal-to-Noise Ratio (SNR), Charge-to-Voltage conversion Factor (CVF) and Charge Collection Efficiency (CCE), are studied as function of readout speed and diode size. For MIMOSA 8, the effect of fast neutrons irradiation is also. Two beam tests campaigns were made: at DESY with a 5 GeV electrons beam and at CERN with a 180 GeV pions beam. Detection Efficiency and Spatial Resolution are studied in function of the discriminator threshold. For these two parameters, the influences of diode size and SNR of the central pixel of a cluster are also discussed. In order to improve the spatial resolution of the digital outputs, a very compact (25 μm x 1 mm) and low consumption (300 μW) column level ADC is designed in AMS 0.35 μm OPTO process. Based on successive approximation architecture, the auto-offset cancellation structure is integrated. A new column level auto-zero discriminator using static latch is also designed. (author)

Transition-Edge Sensor Pixel Parameter Design of the Microcalorimeter Array for the X-Ray Integral Field Unit on Athena

Science.gov (United States)

Smith, S. J.; Adams, J. S.; Bandler, S. R.; Betancourt-Martinez, G. L.; Chervenak, J. A.; Chiao, M. P.; Eckart, M. E.; Finkbeiner, F. M.; Kelley, R. L.; Kilbourne, C. A.;

The pin pixel detector--neutron imaging

CERN Document Server

Bateman, J E; Derbyshire, G E; Duxbury, D M; Marsh, A S; Rhodes, N J; Schooneveld, E M; Simmons, J E; Stephenson, R

2002-01-01

The development and testing of a neutron gas pixel detector intended for application in neutron diffraction studies is reported. Using standard electrical connector pins as point anodes, the detector is based on a commercial 100 pin connector block. A prototype detector of aperture 25.4 mmx25.4 mm has been fabricated, giving a pixel size of 2.54 mm which matches well to the spatial resolution typically required in a neutron diffractometer. A 2-Dimensional resistive divide readout system has been adapted to permit the imaging properties of the detector to be explored in advance of true pixel readout electronics. The timing properties of the device match well to the requirements of the ISIS-pulsed neutron source.

A Prototype of a New Generation Readout ASIC in 65 nm CMOS for Pixel Detectors at HL-LHC

CERN Document Server

Pacher, L.; Paternò, A; Panati, S; Demaria, L; Rivetti, A; Da Rocha Rolo, M; Dellacasa, G; Mazza, G; Rotondo, F; Wheadon, R; Loddo, F; Licciulli, F; Ciciriello, F; Marzocca, C; Gaioni, L; Traversi, G; Re, V; De Canio, F; Ratti, L; Marconi, S; Placidi, P; Magazzù, G; Stabile, A; Mattiazzo, S

2018-01-01

The prototype is composed of a matrix of 64×64 pixels with 50 μm × 50 μm cells featuring a compact design, low-noise and low-power performance. The pixel array integrates two diffe- rent analogue front-end architectures working in parallel, one with asynchronous and one with synchronous hit discriminators. Common characteristics are a compact layout able to fit int...

The Phase-2 ATLAS ITk Pixel Upgrade

CERN Document Server

Macchiolo, Anna; The ATLAS collaboration

2018-01-01

The new ATLAS ITk pixel system will be installed during the LHC Phase-II shutdown, to better take advantage of the increased luminosity of the HL-LHC. The detector will consist of 5 layers of stave-like support structures in the most central region and ring-shaped supports in the endcap regions, covering up to |η| < 4. While the outer 3 layers of the Pixel Detector are designed to operate for the full HL-LHC data taking period, the innermost 2 layers of the detector will be replaced around half of the lifetime. The ITk pixel detector will be instrumented with new sensors and readout electronics to provide improved tracking performance and radiation hardness compared to the current detector. Sensors will be read out by new ASICs based on the chip developed by the RD53 Collaboration. The pixel off-detector readout electronics will be implemented in the framework of the general ATLAS trigger and DAQ system with a readout speed of up to 5 Gb/s per data link for the innermost layers. Results of extensive tests...

Multiplexed detection of cardiac biomarkers in serum with nanowire arrays using readout ASIC.

Science.gov (United States)

Zhang, Guo-Jun; Chai, Kevin Tshun Chuan; Luo, Henry Zhan Hong; Huang, Joon Min; Tay, Ignatius Guang Kai; Lim, Andy Eu-Jin; Je, Minkyu

2012-05-15

Early detection of cardiac biomarkers for diagnosis of heart attack is the key to saving lives. Conventional method of detection like the enzyme-linked immunosorbent assay (ELISA) is time consuming and low in sensitivity. Here, we present a label-free detection system consisting of an array of silicon nanowire sensors and an interface readout application specific integrated circuit (ASIC). This system provides a rapid solution that is highly sensitive and is able to perform direct simultaneous-multiplexed detection of cardiac biomarkers in serum. Nanowire sensor arrays were demonstrated to have the required selectivity and sensitivity to perform multiplexed detection of 100 fg/ml troponin T, creatine kinase MM, and creatine kinase MB in serum. A good correlation between measurements from a probe station and the readout ASIC was obtained. Our detection system is expected to address the existing limitations in cardiac health management that are currently imposed by the conventional testing platform, and opens up possibilities in the development of a miniaturized device for point-of-care diagnostic applications. Copyright © 2012 Elsevier B.V. All rights reserved.

Versatile, reprogrammable area pixel array detector for time-resolved synchrotron x-ray applications

Energy Technology Data Exchange (ETDEWEB)

Gruner, Sol [Cornell Univ., Ithaca, NY (United States)

2010-05-01

The final technical report for DOE grant DE-SC0004079 is presented. The goal of the grant was to perform research, development and application of novel imaging x-ray detectors so as to effectively utilize the high intensity and brightness of the national synchrotron radiation facilities to enable previously unfeasible time-resolved x-ray research. The report summarizes the development of the resultant imaging x-ray detectors. Two types of detector platforms were developed: The first is a detector platform (called a Mixed-Mode Pixel Array Detector, or MM-PAD) that can image continuously at over a thousand images per second while maintaining high efficiency for wide dynamic range signals ranging from 1 to hundreds of millions of x-rays per pixel per image. Research on an even higher dynamic range variant is also described. The second detector platform (called the Keck Pixel Array Detector) is capable of acquiring a burst of x-ray images at a rate of millions of images per second.

Single Photon Detection with Semiconductor Pixel Arrays for Medical Imaging Applications

CERN Document Server

Mikulec, B

2000-01-01

This thesis explores the functioning of a single photon counting pixel detector for X-ray imaging. It considers different applications for such a device, but focuses mainly on the field of medical imaging. The new detector comprises a CMOS read-out chip called PCC containing 4096 identical channels each of which counts X-ray hits. The conversion of the X-rays to electric charge takes place in a semiconductor sensor which is segmented into 4096 matching square diodes of side length 170 um, the 'pixels'. The photon counting concept is based on setting a threshold in energy above which a hit is registered. The immediate advantages are the elimination of background and the in principle unlimited dynamic range. Moreover, this approach allows the use of an electronic shutter for arbitrary measurement periods. As the device was intended for operation in the energy range of ~10-70 keV, gallium arsenide was selected as the preferred sensor material. The development of this detector followed on from about 10 years of r...

The IBL Readout System

CERN Document Server

Dopke, J; The ATLAS collaboration; Flick, T; Gabrielli, A; Kugel, A; Maettig, P; Morettini, P; Polini, A; Schroer, N

2010-01-01

The first upgrade for the ATLAS pixel detector will be an additional layer, which is called IBL (Insertable B-Layer). To readout this new layer having new electronics assembled an update of the readout electronics is necessary. The aim is to develop a system which is capable to read out at a higher bandwidth and also compatible with the existing system to be integrated into it. The talk will describe the necessary development to reach a new readout system, concentrating on the requirements of a newly designed Back of Crate card as the optical interface in the counting room.

The IBL Readout System

CERN Document Server

Dopke, J; Flick, T; Gabrielli, A; Kugel, A; Maettig, P; Morettini, P; Polini, A; Schroer, N

2011-01-01

The first upgrade for the ATLAS Pixel Detector will be an additional layer, which is called IBL (Insertable B-Layer). To readout this new layer, having new electronics, an update of the readout electronics is necessary. The aim is to develop a system which is capable to read out at a higher bandwidth, but also compatible with the existing system to be integrated into it. This paper will describe the necessary development to reach a new readout system, concentrating on the requirements of a newly designed Back of Crate card as the optical interface in the counting room.

Pixel array detector for X-ray free electron laser experiments

Energy Technology Data Exchange (ETDEWEB)

Philipp, Hugh T., E-mail: htp2@cornell.edu [Department of Physics, Laboratory of Solid State Physics, Cornell University, Ithaca, NY 14853 (United States); Hromalik, Marianne [Electrical and Computer Engineering, SUNY Oswego, Oswego, NY 13126 (United States); Tate, Mark; Koerner, Lucas [Department of Physics, Laboratory of Solid State Physics, Cornell University, Ithaca, NY 14853 (United States); Gruner, Sol M. [Department of Physics, Laboratory of Solid State Physics, Cornell University, Ithaca, NY 14853 (United States); Wilson Laboratory, Cornell University, CHESS, Ithaca, NY 14853 (United States)

2011-09-01

X-ray free electron lasers (XFELs) promise to revolutionize X-ray science with extremely high peak brilliances and femtosecond X-ray pulses. This will require novel detectors to fully realize the potential of these new sources. There are many current detector development projects aimed at the many challenges of meeting the XFEL requirements . This paper describes a pixel array detector (PAD) that has been developed for the Coherent X-ray Imaging experiment at the Linac Coherent Light Source (LCLS) at the SLAC National Laboratory . The detector features 14-bit in-pixel digitization; a 2-level in-pixel gain setting that can be used to make an arbitrary 2-D gain pattern that is adaptable to a particular experiment; the ability to handle instantaneous X-ray flux rates of 10{sup 17} photons per second; and continuous frames rates in excess of 120 Hz. The detector uses direct detection of X-rays in a silicon diode. The charge produced by the diode is integrated in a pixilated application specific integrated circuit (ASIC) which digitizes collected holes with single X-ray photon capability. Each ASIC is 194x185 pixels, each pixel is 110{mu}mx110{mu}m on a side. Each pixel can detect up to 2500 X-rays per frame in low-gain mode, yet easily detects single photons at high-gain. Cooled, single-chip detectors have been built and meet all the required specifications. SLAC National Laboratory is engaged in constructing a tiled, multi-chip 1516x1516 pixel detector.

A new generation of small pixel pitch/SWaP cooled infrared detectors

Science.gov (United States)

Espuno, L.; Pacaud, O.; Reibel, Y.; Rubaldo, L.; Kerlain, A.; Péré-Laperne, N.; Dariel, A.; Roumegoux, J.; Brunner, A.; Kessler, A.; Gravrand, O.; Castelein, P.

2015-10-01

Following clear technological trends, the cooled IR detectors market is now in demand for smaller, more efficient and higher performance products. This demand pushes products developments towards constant innovations on detectors, read-out circuits, proximity electronics boards, and coolers. Sofradir was first to show a 10μm focal plane array (FPA) at DSS 2012, and announced the DAPHNIS 10μm product line back in 2014. This pixel pitch is a key enabler for infrared detectors with increased resolution. Sofradir recently achieved outstanding products demonstrations at this pixel pitch, which clearly demonstrate the benefits of adopting 10μm pixel pitch focal plane array-based detectors. Both HD and XGA Daphnis 10μm products also benefit from a global video datapath efficiency improvement by transitioning to digital video interfaces. Moreover, innovative smart pixels functionalities drastically increase product versatility. In addition to this strong push towards a higher pixels density, Sofradir acknowledges the need for smaller and lower power cooled infrared detector. Together with straightforward system interfaces and better overall performances, latest technological advances on SWAP-C (Size, Weight, Power and Cost) Sofradir products enable the advent of a new generation of high performance portable and agile systems (handheld thermal imagers, unmanned aerial vehicles, light gimbals etc...). This paper focuses on those features and performances that can make an actual difference in the field.

Silicon PIN diode hybrid arrays for charged particle detection: Building blocks for vertex detectors at the SSC

International Nuclear Information System (INIS)

Kramer, G.; Gaalema, S.; Shapiro, S.L.; Dunwoodie, W.M.; Arens, J.F.; Jernigan, J.G.

1989-05-01

Two-dimensional arrays of solid state detectors have long been used in visible and infrared systems. Hybrid arrays with separately optimized detector and readout substrates have been extensively developed for infrared sensors. The characteristics and use of these infrared readout chips with silicon PIN diode arrays produced by MICRON SEMICONDUCTOR for detecting high-energy particles are reported. Some of these arrays have been produced in formats as large as 512 /times/ 512 pixels; others have been radiation hardened to total dose levels beyond 1 Mrad. Data generation rates of 380 megasamples/second have been achieved. Analog and digital signal transmission and processing techniques have also been developed to accept and reduce these high data rates. 9 refs., 15 figs., 2 tabs

Uncooled infrared focal plane array imaging in China

Science.gov (United States)

Lei, Shuyu

2015-06-01

This article reviews the development of uncooled infrared focal plane array (UIFPA) imaging in China in the past decade. Sensors based on optical or electrical read-out mechanism were developed but the latter dominates the market. In resistive bolometers, VOx and amorphous silicon are still the two major thermal-sensing materials. The specifications of the IRFPA made by different manufactures were collected and compared. Currently more than five Chinese companies and institutions design and fabricate uncooled infrared focal plane array. Some devices have sensitivity as high as 30 mK; the largest array for commercial products is 640×512 and the smallest pixel size is 17 μm. Emphasis is given on the pixel MEMS design, ROIC design, fabrication, and packaging of the IRFPA manufactured by GWIC, especially on design for high sensitivities, low noise, better uniformity and linearity, better stabilization for whole working temperature range, full-digital design, etc.

High accuracy injection circuit for the calibration of a large pixel sensor matrix

International Nuclear Information System (INIS)

Quartieri, E.; Comotti, D.; Manghisoni, M.

2013-01-01

Semiconductor pixel detectors, for particle tracking and vertexing in high energy physics experiments as well as for X-ray imaging, in particular for synchrotron light sources and XFELs, require a large area sensor matrix. This work will discuss the design and the characterization of a high-linearity, low dispersion injection circuit to be used for pixel-level calibration of detector readout electronics in a large pixel sensor matrix. The circuit provides a useful tool for the characterization of the readout electronics of the pixel cell unit for both monolithic active pixel sensors and hybrid pixel detectors. In the latter case, the circuit allows for precise analogue test of the readout channel already at the chip level, when no sensor is connected. Moreover, it provides a simple means for calibration of readout electronics once the detector has been connected to the chip. Two injection techniques can be provided by the circuit: one for a charge sensitive amplification and the other for a transresistance readout channel. The aim of the paper is to describe the architecture and the design guidelines of the calibration circuit, which has been implemented in a 130 nm CMOS technology. Moreover, experimental results of the proposed injection circuit will be presented in terms of linearity and dispersion

A sub-millimeter resolution PET detector module using a multi-pixel photon counter array

International Nuclear Information System (INIS)

Song, Tae Yong; Wu Heyu; Komarov, Sergey; Tai, Yuan-Chuan; Siegel, Stefan B

2010-01-01

A PET block detector module using an array of sub-millimeter lutetium oxyorthosilicate (LSO) crystals read out by an array of surface-mount, semiconductor photosensors has been developed. The detector consists of a LSO array, a custom acrylic light guide, a 3 x 3 multi-pixel photon counter (MPPC) array (S10362-11-050P, Hamamatsu Photonics, Japan) and a readout board with a charge division resistor network. The LSO array consists of 100 crystals, each measuring 0.8 x 0.8 x 3 mm 3 and arranged in 0.86 mm pitches. A Monte Carlo simulation was used to aid the design and fabrication of a custom light guide to control distribution of scintillation light over the surface of the MPPC array. The output signals of the nine MPPC are multiplexed by a charge division resistor network to generate four position-encoded analog outputs. Flood image, energy resolution and timing resolution measurements were performed using standard NIM electronics. The linearity of the detector response was investigated using gamma-ray sources of different energies. The 10 x 10 array of 0.8 mm LSO crystals was clearly resolved in the flood image. The average energy resolution and standard deviation were 20.0% full-width at half-maximum (FWHM) and ±5.0%, respectively, at 511 keV. The timing resolution of a single MPPC coupled to a LSO crystal was found to be 857 ps FWHM, and the value for the central region of detector module was 1182 ps FWHM when ±10% energy window was applied. The nonlinear response of a single MPPC when used to read out a single LSO was observed among the corner crystals of the proposed detector module. However, the central region of the detector module exhibits significantly less nonlinearity (6.5% for 511 keV). These results demonstrate that (1) a charge-sharing resistor network can effectively multiplex MPPC signals and reduce the number of output signals without significantly degrading the performance of a PET detector and (2) a custom light guide to permit light sharing

Zero suppression logic of the ALICE muon forward tracker pixel chip prototype PIXAM and associated readout electronics development

International Nuclear Information System (INIS)

Flouzat, C.; Değerli, Y.; Guilloux, F.; Orsini, F.; Venault, P.

2015-01-01

In the framework of the ALICE experiment upgrade at HL-LHC, a new forward tracking detector, the Muon Forward Tracker (MFT), is foreseen to overcome the intrinsic limitations of the present Muon Spectrometer and will perform new measurements of general interest for the whole ALICE physics. To fulfill the new detector requirements, CMOS Monolithic Active Pixel Sensors (MAPS) provide an attractive trade-off between readout speed, spatial resolution, radiation hardness, granularity, power consumption and material budget. This technology has been chosen to equip the Muon Forward Tracker and also the vertex detector: the Inner Tracking System (ITS). Since few years, an intensive R and D program has been performed on the design of MAPS in the 0.18 μ m CMOS Image Sensor (CIS) process. In order to avoid pile up effects in the experiment, the classical rolling shutter readout system of MAPS has been improved to overcome the readout speed limitation. A zero suppression algorithm, based on a 3 by 3 cluster finding (position and data), has been chosen for the MFT. This algorithm allows adequate data compression for the sensor. This paper presents the large size prototype PIXAM, which represents 1/3 of the final chip, and will focus specially on the zero suppression block architecture. This chip is designed and under fabrication in the 0.18 μ m CIS process. Finally, the readout electronics principle to send out the compressed data flow is also presented taking into account the cluster occupancy per MFT plane for a single central Pb-Pb collision

Zero suppression logic of the ALICE muon forward tracker pixel chip prototype PIXAM and associated readout electronics development

Science.gov (United States)

Flouzat, C.; Değerli, Y.; Guilloux, F.; Orsini, F.; Venault, P.

2015-05-01

In the framework of the ALICE experiment upgrade at HL-LHC, a new forward tracking detector, the Muon Forward Tracker (MFT), is foreseen to overcome the intrinsic limitations of the present Muon Spectrometer and will perform new measurements of general interest for the whole ALICE physics. To fulfill the new detector requirements, CMOS Monolithic Active Pixel Sensors (MAPS) provide an attractive trade-off between readout speed, spatial resolution, radiation hardness, granularity, power consumption and material budget. This technology has been chosen to equip the Muon Forward Tracker and also the vertex detector: the Inner Tracking System (ITS). Since few years, an intensive R&D program has been performed on the design of MAPS in the 0.18 μ m CMOS Image Sensor (CIS) process. In order to avoid pile up effects in the experiment, the classical rolling shutter readout system of MAPS has been improved to overcome the readout speed limitation. A zero suppression algorithm, based on a 3 by 3 cluster finding (position and data), has been chosen for the MFT. This algorithm allows adequate data compression for the sensor. This paper presents the large size prototype PIXAM, which represents 1/3 of the final chip, and will focus specially on the zero suppression block architecture. This chip is designed and under fabrication in the 0.18 μ m CIS process. Finally, the readout electronics principle to send out the compressed data flow is also presented taking into account the cluster occupancy per MFT plane for a single central Pb-Pb collision.

High-resolution gamma-ray spectroscopy with a microwave-multiplexed transition-edge sensor array

Energy Technology Data Exchange (ETDEWEB)

Noroozian, Omid [National Institute of Standards and Technology, Boulder, Colorado 80305 (United States); Center for Astrophysics and Space Astronomy, University of Colorado, Boulder, Colorado 80309 (United States); Mates, John A. B.; Bennett, Douglas A.; Brevik, Justus A.; Fowler, Joseph W.; Gao, Jiansong; Hilton, Gene C.; Horansky, Robert D.; Irwin, Kent D.; Schmidt, Daniel R.; Vale, Leila R.; Ullom, Joel N. [National Institute of Standards and Technology, Boulder, Colorado 80305 (United States); Kang, Zhao [Department of Physics, University of Colorado, Boulder, Colorado 80309 (United States)

2013-11-11

We demonstrate very high resolution photon spectroscopy with a microwave-multiplexed two-pixel transition-edge sensor (TES) array. We measured a {sup 153}Gd photon source and achieved an energy resolution of 63 eV full-width-at-half-maximum at 97 keV and an equivalent readout system noise of 86 pA/√(Hz) at the TES. The readout circuit consists of superconducting microwave resonators coupled to radio-frequency superconducting-quantum-interference-devices and transduces changes in input current to changes in phase of a microwave signal. We use flux-ramp modulation to linearize the response and evade low-frequency noise. This demonstration establishes one path for the readout of cryogenic X-ray and gamma-ray sensor arrays with more than 10{sup 3} elements and spectral resolving powers R=λ/Δλ>10{sup 3}.

Status of the CMS Phase I pixel detector upgrade

Energy Technology Data Exchange (ETDEWEB)

Spannagel, S., E-mail: simon.spannagel@desy.de

2016-09-21

A new pixel detector for the CMS experiment is being built, owing to the instantaneous luminosities anticipated for the Phase I Upgrade of the LHC. The new CMS pixel detector provides four-hit tracking while featuring a significantly reduced material budget as well as new cooling and powering schemes. A new front-end readout chip mitigates buffering and bandwidth limitations, and comprises a low-threshold comparator. These improvements allow the new pixel detector to sustain and improve the efficiency of the current pixel tracker at the increased requirements imposed by high luminosities and pile-up. This contribution gives an overview of the design of the upgraded pixel detector and the status of the upgrade project, and presents test beam performance measurements of the production read-out chip.

Status of the CMS Phase I Pixel Detector Upgrade

CERN Document Server

Spannagel, Simon

2016-09-21

A new pixel detector for the CMS experiment is being built, owing to the instantaneous luminosities anticipated for the Phase~I Upgrade of the LHC. The new CMS pixel detector provides four-hit tracking while featuring a significantly reduced material budget as well as new cooling and powering schemes. A new front-end readout chip mitigates buffering and bandwidth limitations, and comprises a low-threshold comparator. These improvements allow the new pixel detector to sustain and improve the efficiency of the current pixel tracker at the increased requirements imposed by high luminosities and pile-up. This contribution gives an overview of the design of the upgraded pixel detector and the status of the upgrade project, and presents test beam performance measurements of the production read-out chip.

Test beam analysis of ultra-thin hybrid pixel detector assemblies with Timepix readout ASICs

CERN Document Server

Alipour Tehrani, Niloufar; Dannheim, Dominik; Firu, Elena; Kulis, Szymon; Redford, Sophie; Sicking, Eva

2016-01-01

The requirements for the vertex detector at the proposed Compact Linear Collider imply a very small material budget: less than 0.2% of a radiation length per detection layer including services and mechanical supports. We present here a study using Timepix readout ASICs hybridised to pixel sensors of 50 − 500 μm thickness, including assemblies with 100 μm thick sensors bonded to thinned 100μm thick ASICs. Sensors from three producers (Advacam, Micron Semiconductor Ltd, Canberra) with different edge termination technologies (active edge, slim edge) were bonded to Timepix ASICs. These devices were characterised with the EUDET telescope at the DESY II test beam using 5.6 GeV electrons. Their performance for the detection and tracking of minimum ionising particles was evaluated in terms of charge sharing, detection efficiency, single-point resolution and energy deposition.

A low-power small-area ADC array for IRFPA readout

Science.gov (United States)

Zhong, Shengyou; Yao, Libin

2013-09-01

The readout integrated circuit (ROIC) is a bridge between the infrared focal plane array (IRFPA) and image processing circuit in an infrared imaging system. The ROIC is the first part of signal processing circuit and connected to detectors directly, so its performance will greatly affect the detector or even the whole imaging system performance. With the development of CMOS technologies, it's possible to digitalize the signal inside the ROIC and develop the digital ROIC. Digital ROIC can reduce complexity of the whole system and improve the system reliability. More importantly, it can accommodate variety of digital signal processing techniques which the traditional analog ROIC cannot achieve. The analog to digital converter (ADC) is the most important building block in the digital ROIC. The requirements for ADCs inside the ROIC are low power, high dynamic range and small area. In this paper we propose an RC hybrid Successive Approximation Register (SAR) ADC as the column ADC for digital ROIC. In our proposed ADC structure, a resistor ladder is used to generate several voltages. The proposed RC hybrid structure not only reduces the area of capacitor array but also releases requirement for capacitor array matching. Theory analysis and simulation show RC hybrid SAR ADC is suitable for ADC array applications

Development of a Timepix3 readout system based on the Merlin readout system

International Nuclear Information System (INIS)

Crevatin, G.; Carrato, S.; Horswell, I.; Omar, D.; Tartoni, N.; Cautero, G.

2015-01-01

Timepix3 chip is a new ASIC specifically designed to readout hybrid pixel detectors. The main purpose of Timepix3 is to measure the time of arrival of events. This characteristic can be exploited very effectively to develop detectors for time resolved experiments at synchrotron radiation facilities. In order to investigate how the ASIC can be applied to synchrotron experiments the Merlin readout system, developed at Diamond for the Medipix3 ASIC, has been adapted to readout the Timepix3 ASIC. The first tests of the ASIC with pulse injection and with alpha particles show that its behaviour is consistent with its nominal characteristics

Cryogenic readout for multiple VUV4 Multi-Pixel Photon Counters in liquid xenon

Science.gov (United States)

Di Giovanni, A.

2018-03-01

This work concerned the preliminary tests and characterization of a cryogenic preamplifier board for an array made of 16 S13370-3050CN (VUV4 family) Multi-Pixel Photon Counters manufactured by Hamamatsu and operated at liquid xenon temperature. The proposed prototype is based on the use of the Analog Devices AD8011 current feedback operational amplifier. The detector allows for single photon detection, making this device a promising choice for the future generation of neutrino and dark matter detectors based on liquid xenon targets.

An asynchronous data-driven readout prototype for CEPC vertex detector

Science.gov (United States)

Yang, Ping; Sun, Xiangming; Huang, Guangming; Xiao, Le; Gao, Chaosong; Huang, Xing; Zhou, Wei; Ren, Weiping; Li, Yashu; Liu, Jianchao; You, Bihui; Zhang, Li

2017-12-01

The Circular Electron Positron Collider (CEPC) is proposed as a Higgs boson and/or Z boson factory for high-precision measurements on the Higgs boson. The precision of secondary vertex impact parameter plays an important role in such measurements which typically rely on flavor-tagging. Thus silicon CMOS Pixel Sensors (CPS) are the most promising technology candidate for a CEPC vertex detector, which can most likely feature a high position resolution, a low power consumption and a fast readout simultaneously. For the R&D of the CEPC vertex detector, we have developed a prototype MIC4 in the Towerjazz 180 nm CMOS Image Sensor (CIS) process. We have proposed and implemented a new architecture of asynchronous zero-suppression data-driven readout inside the matrix combined with a binary front-end inside the pixel. The matrix contains 128 rows and 64 columns with a small pixel pitch of 25 μm. The readout architecture has implemented the traditional OR-gate chain inside a super pixel combined with a priority arbiter tree between the super pixels, only reading out relevant pixels. The MIC4 architecture will be introduced in more detail in this paper. It will be taped out in May and will be characterized when the chip comes back.

Design and simulation of a novel method for determining depth-of-interaction in a PET scintillation crystal array using a single-ended readout by a multi-anode PMT

International Nuclear Information System (INIS)

Ito, Mikiko; Sim, Kwang-Souk; Lee, Jae Sung; Park, Min-Jae; Hong, Seong Jong

2010-01-01

PET detectors with depth-of-interaction (DOI) encoding capability allow high spatial resolution and high sensitivity to be achieved simultaneously. To obtain DOI information from a mono-layer array of scintillation crystals using a single-ended readout, the authors devised a method based on light spreading within a crystal array and performed Monte Carlo simulations with individual scintillation photon tracking to prove the concept. A scintillation crystal array model was constructed using a grid method. Conventional grids are constructed using comb-shaped reflector strips with rectangular teeth to isolate scintillation crystals optically. However, the authors propose the use of triangularly shaped teeth, such that scintillation photons spread only in the x-direction in the upper halves of crystals and in the y-direction in lower halves. DOI positions can be estimated by considering the extent of two-dimensional light dispersion, which can be determined from the multiple anode outputs of a position-sensitive PMT placed under the crystal array. In the main simulation, a crystal block consisting of a 29 x 29 array of 1.5 mm x 1.5 mm x 20 mm crystals and a multi-anode PMT with 16 x 16 pixels were used. The effects of crystal size and non-uniform PMT output gain were also explored by simulation. The DOI resolution estimated for 1.5 x 1.5 x 20 mm 3 crystals was 2.16 mm on average. Although the flood map was depth dependent, each crystal was well identified at all depths when a corner of the crystal array was irradiated with 511 keV gamma rays (peak-to-valley ratio ∼9:1). DOI resolution was better than 3 mm up to a crystal length of 28 mm with a 1.5 x 1.5 mm 2 or 2.0 x 2.0 mm 2 crystal surface area. The devised light-sharing method allowed excellent DOI resolutions to be obtained without the use of dual-ended readout or multiple crystal arrays.

Monolithic array of 32 SPAD pixels for single-photon imaging at high frame rates

International Nuclear Information System (INIS)

Tisa, Simone; Guerrieri, Fabrizio; Zappa, Franco

2009-01-01

We present a single-chip monolithic array of 32 Single-Photon Avalanche Diodes (SPAD) and associated electronics for imaging at high frame rates and high sensitivity. Photodetectors, front-end circuitry and control electronics used to manage the array are monolithically integrated on the same chip in a standard 0.35 μm CMOS high-voltage technology. The array is composed of 32 'smart' pixels working in photon counting mode and functioning in a parallel fashion. Every cell comprises of an integrated SPAD photodetector, a novel quenching circuit named as Variable Load Quenching Circuit (VLQC), counting electronics and a buffer memory. Proper ancillary electronics that perform the arbitration of photon counts between two consecutive frames is integrated as well. Thanks to the presence of in-pixel memory registers, the inter-frame dead time between subsequent frames is limited to few nanoseconds. Since integration and download are performed simultaneously and the array can be addressed like a standard digital memory, the achievable maximum frame rate is very high in the order of hundreds of thousands of frame/s.

Magnetically-coupled microcalorimeter arrays for x-ray astrophysics

Science.gov (United States)

Bandler, Simon

�� pixels. Projections based on the current state of this technology indicate that less than 5 eV energy resolution can be achieved with this sort of geometry. Theoretically, magnetically-coupled microcalorimeters are well-equipped to achieve the very highest energy resolutions, especially when several absorbers are attached to each sensor, increasing the heat capacity. This program will build upon the work carried out by our group on metallic magnetic calorimeters (MMC) and Magnetic penetration thermometers (MPT) in the antecedent program. In this program we will carry out development in three main areas. First, we will develop sensor geometries that are optimized for reading out sub-arrays of pixels with a single sensor of the type that is likely desired by the "X-ray Surveyor". Second, we will further develop large-format arraying prototypes with the engineering of wiring-pixel approaches that are scalable to the large-format arrays that are needed. Third, we will develop the read-out technology that will be necessary, which utilizes the next generation of X-ray microcalorimeter read-out approach, a microwave multiplexing readout.

A radiation-tolerant electronic readout system for portal imaging

Science.gov (United States)

Östling, J.; Brahme, A.; Danielsson, M.; Iacobaeus, C.; Peskov, V.

2004-06-01

A new electronic portal imaging device, EPID, is under development at the Karolinska Institutet and the Royal Institute of Technology. Due to considerable demands on radiation tolerance in the radiotherapy environment, a dedicated electronic readout system has been designed. The most interesting aspect of the readout system is that it allows to read out ˜1000 pixels in parallel, with all electronics placed outside the radiation beam—making the detector more radiation resistant. In this work we are presenting the function of a small prototype (6×100 pixels) of the electronic readout board that has been tested. Tests were made with continuous X-rays (10-60 keV) and with α particles. The results show that, without using an optimised gas mixture and with an early prototype only, the electronic readout system still works very well.

High tracking resolution detectors. Final Technical Report

International Nuclear Information System (INIS)

Vasile, Stefan; Li, Zheng

2010-01-01

High-resolution tracking detectors based on Active Pixel Sensor (APS) have been valuable tools in Nuclear Physics and High-Energy Physics research, and have contributed to major discoveries. Their integration time, radiation length and readout rate is a limiting factor for the planed luminosity upgrades in nuclear and high-energy physics collider-based experiments. The goal of this program was to demonstrate and develop high-gain, high-resolution tracking detector arrays with faster readout, and shorter radiation length than APS arrays. These arrays may operate as direct charged particle detectors or as readouts of high resolution scintillating fiber arrays. During this program, we developed in CMOS large, high-resolution pixel sensor arrays with integrated readout, and reset at pixel level. Their intrinsic gain, high immunity to surface and moisture damage, will allow operating these detectors with minimal packaging/passivation requirements and will result in radiation length superior to APS. In Phase I, we designed and fabricated arrays with calorimetric output capable of sub-pixel resolution and sub-microsecond readout rate. The technical effort was dedicated to detector and readout structure development, performance verification, as well as to radiation damage and damage annealing.

High-QE fast-readout wavefront sensor with analog phase reconstruction

Science.gov (United States)

Baker, Jeffrey T.; Loos, Gary C.; Restaino, Sergio R.; Percheron, Isabelle; Finkner, Lyle G.

1998-09-01

The contradiction inherent in high temporal bandwidth adaptive optics wavefront sensing at low-light-levels (LLL) has driven many researchers to consider the use of high bandwidth high quantum efficiency (QE) CCD cameras with the lowest possible readout noise levels. Unfortunately, the performance of these relatively expensive and low production volume devices in the photon counting regime is inevitably limited by readout noise, no matter how arbitrarily close to zero that specification may be reduced. Our alternative approach is to optically couple a new and relatively inexpensive Ultra Blue Gen III image intensifier to an also relatively inexpensive high bandwidth CCD camera with only moderate QE and high rad noise. The result is a high bandwidth broad spectral response image intensifier with a gain of 55,000 at 560 nm. Use of an appropriately selected lenslet array together with coupling optics generates 16 X 16 Shack-Hartmann type subapertures on the image intensifier photocathode, which is imaged onto the fast CCD camera. An integral A/D converter in the camera sends the image data pixel by pixel to a computer data acquisition system for analysis, storage and display. Timing signals are used to decode which pixel is being rad out and the wavefront is calculated in an analog fashion using a least square fit to both x and y tilt data for all wavefront sensor subapertures. Finally, we present system level performance comparisons of these new concept wavefront sensors versus the more standard low noise CCD camera based designs in the low-light-level limit.

Development of a High Dynamic Range Pixel Array Detector for Synchrotrons and XFELs

Science.gov (United States)

Weiss, Joel Todd

Advances in synchrotron radiation light source technology have opened new lines of inquiry in material science, biology, and everything in between. However, x-ray detector capabilities must advance in concert with light source technology to fully realize experimental possibilities. X-ray free electron lasers (XFELs) place particularly large demands on the capabilities of detectors, and developments towards diffraction-limited storage ring sources also necessitate detectors capable of measuring very high flux [1-3]. The detector described herein builds on the Mixed Mode Pixel Array Detector (MM-PAD) framework, developed previously by our group to perform high dynamic range imaging, and the Adaptive Gain Integrating Pixel Detector (AGIPD) developed for the European XFEL by a collaboration between Deustsches Elektronen-Synchrotron (DESY), the Paul-Scherrer-Institute (PSI), the University of Hamburg, and the University of Bonn, led by Heinz Graafsma [4, 5]. The feasibility of combining adaptive gain with charge removal techniques to increase dynamic range in XFEL experiments is assessed by simulating XFEL scatter with a pulsed infrared laser. The strategy is incorporated into pixel prototypes which are evaluated with direct current injection to simulate very high incident x-ray flux. A fully functional 16x16 pixel hybrid integrating x-ray detector featuring several different pixel architectures based on the prototypes was developed. This dissertation describes its operation and characterization. To extend dynamic range, charge is removed from the integration node of the front-end amplifier without interrupting integration. The number of times this process occurs is recorded by a digital counter in the pixel. The parameter limiting full well is thereby shifted from the size of an integration capacitor to the depth of a digital counter. The result is similar to that achieved by counting pixel array detectors, but the integrators presented here are designed to tolerate a

The Read-Out Driver (ROD) card for the ATLAS experiment: commissioning for the IBL detector and upgrade studies for the Pixel Layers 1 and 2

CERN Document Server

Travaglini, R; The ATLAS collaboration; Bindi, M; Falchieri, D; Gabrielli, A; Lama, L; Chen, S P; Hsu, S C; Hauck, S; Kugel, A; Flick, T; Wensing, M

2013-01-01

The upgrade of the ATLAS experiment at LHC foresees the insertion of an innermost silicon layer, called Insertable B-layer (IBL). IBL read-out system will be equipped with new electronics. The Readout-Driver card (ROD) is a VME board devoted to data processing, configuration and control. A pre-production batch has been delivered in order to perform tests with instrumented slices of the overall acquisition chain, aiming to finalize strategies for system commissioning. In this contribution both setups and results will be described, as well as preliminary studies on changes in order to adopt the ROD for the ATLAS Pixel Layers 1 and 2.

Tracking performance of a single-crystal and a polycrystalline diamond pixel-detector

Energy Technology Data Exchange (ETDEWEB)

Menasce, D.; et al.

2013-06-01

We present a comparative characterization of the performance of a single-crystal and a polycrystalline diamond pixel-detector employing the standard CMS pixel readout chips. Measurements were carried out at the Fermilab Test Beam Facility, FTBF, using protons of momentum 120 GeV/c tracked by a high-resolution pixel telescope. Particular attention was directed to the study of the charge-collection, the charge-sharing among adjacent pixels and the achievable position resolution. The performance of the single-crystal detector was excellent and comparable to the best available silicon pixel-detectors. The measured average detection-efficiency was near unity, ε = 0.99860±0.00006, and the position-resolution for shared hits was about 6 μm. On the other hand, the performance of the polycrystalline detector was hampered by its lower charge collection distance and the readout chip threshold. A new readout chip, capable of operating at much lower threshold (around 1 ke^$-$), would be required to fully exploit the potential performance of the polycrystalline diamond pixel-detector.

Development of a multiplexed readout with high position resolution for positron emission tomography

Energy Technology Data Exchange (ETDEWEB)

Lee, Sangwon; Choi, Yong [Molecular Imaging Research & Education (MiRe) Laboratory, Department of Electronic Engineering, Sogang University, Seoul 04107 (Korea, Republic of); Kang, Jihoon [Department of Biomedical Engineering, Chonnam National University, Yeosu 550-749 (Korea, Republic of); Jung, Jin Ho [Molecular Imaging Research & Education (MiRe) Laboratory, Department of Electronic Engineering, Sogang University, Seoul 04107 (Korea, Republic of)

2017-04-01

Detector signals for positron emission tomography (PET) are commonly multiplexed to reduce the number of digital processing channels so that the system can remain cost effective while also maintaining imaging performance. In this work, a multiplexed readout combining Anger position estimation algorithm and position decoder circuit (PDC) was developed to reduce the number of readout channels by a factor of 24, 96-to-4. The data acquisition module consisted of a TDC (50 ps resolution), 4-channel ADCs (12 bit, 105 MHz sampling rate), 2 GB SDRAM and USB3.0. The performance of the multiplexed readout was assessed with a high-resolution PET detector block composed of 2×3 detector modules, each consisting of an 8×8 array of 1.52×1.52×6 mm{sup 3} LYSO, a 4×4 array of 3×3 mm{sup 2} silicon photomultiplier (SiPM) and 13.4×13.4 mm{sup 2} light guide with 0.7 mm thickness. The acquired flood histogram showed that all 384 crystals could be resolved. The average energy resolution at 511 keV was 13.7±1.6% full-width-at-half-maximum (FWHM) and the peak-to-valley ratios of the flood histogram on the horizontal and vertical lines were 18.8±0.8 and 22.8±1.3, respectively. The coincidence resolving time of a pair of detector blocks was 6.2 ns FWHM. The reconstructed phantom image showed that rods down to a diameter of 1.6 mm could be resolved. The results of this study indicate that the multiplexed readout would be useful in developing a PET with a spatial resolution less than the pixel size of the photosensor, such as a SiPM array.

The pin pixel detector--X-ray imaging

CERN Document Server

Bateman, J E; Derbyshire, G E; Duxbury, D M; Marsh, A S; Simmons, J E; Stephenson, R

2002-01-01

The development and testing of a soft X-ray gas pixel detector, which uses connector pins for the anodes is reported. Based on a commercial 100 pin connector block, a prototype detector of aperture 25.4 mm centre dot 25.4 mm can be economically fabricated. The individual pin anodes all show the expected characteristics of small gas detectors capable of counting rates reaching 1 MHz per pin. A 2-dimensional resistive divide readout system has been developed to permit the imaging properties of the detector to be explored in advance of true pixel readout electronics.

Application-specific architectures of CMOS monolithic active pixel sensors

Energy Technology Data Exchange (ETDEWEB)

Szelezniak, Michal [Institute de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France)]. E-mail: michal.szelezniak@ires.in2p3.fr; Besson, Auguste [Institute de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France); Claus, Gilles; Colledani, Claude; [Institute de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France); Degerli, Yavuz [CEA Saclay, DAPNIA, Gif-sur-Yvette Cedex (France); Deptuch, Grzegorz [Institute de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France); Deveaux, Michael [Institute de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France); GSI, Planckstrasse 1, Darmstadt 64291 (Germany); Dorokhov, Andrei [Institute de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France); Dulinski, Wojciech [Institute de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France); Fourches, Nicolas [CEA Saclay, DAPNIA, Gif-sur-Yvette Cedex (France); Goffe, Mathieu [Institute de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France); Grandjean, Damien; Guilloux, Fabrice [Institute de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France); Heini, Sebastien [Institute de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France)]|[GSI, Planckstrasse 1, Darmstadt 64291 (Germany); Himmi, Abdelkader [Institute de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France); Hu, Christine [Institute de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France); Jaaskelainen, Kimmo; Li, Yan; Lutz, Pierre; Orsini, Fabienne [CEA Saclay, DAPNIA, Gif-sur-Yvette Cedex (France); Pellicioli, Michel; Shabetai, Alexandre; Valin, Isabelle; Winter, Marc [Institute de Recherches Subatomiques, 23 rue du Loess, Strasbourg 67037 Cedex 02 (France)

2006-11-30

Several development directions intended to adapt and optimize monolithic active pixel sensors for specific applications are presented in this work. The first example, compatible with the STAR microvertex upgrade, is based on a simple two-transistor pixel circuitry. It is suited for a long integration time, room-temperature operation and minimum power dissipation. In another approach for this application, a specific readout method is proposed, allowing optimization of the integration time independently of the full frame-readout time. The circuit consists of an in-pixel front-end voltage amplifier, with a gain on the order of five, followed by two analog memory cells. The extended version of this scheme, based on the implementation of more memory cells per pixel, is the solution considered for the outer layers of a microvertex detector at the international linear collider. For the two innermost layers, a circuit allowing fast frame scans together with on-line, on-chip data sparsification is proposed. The first results of this prototype demonstrate that the fixed pattern dispersion is reduced below a noise level of 15 e{sup -}, allowing the use of a single comparator or a low-resolution ADC per pixel column. A common element for most of the mentioned readout schemes is a low-noise, low power consumption, layout efficient in-pixel amplifier. A review of possible solutions for this element together with some experimental results is presented.

A 64-channel readout ASIC for nanowire biosensor array with electrical calibration scheme.

Science.gov (United States)

Chai, Kevin T C; Choe, Kunil; Bernal, Olivier D; Gopalakrishnan, Pradeep K; Zhang, Guo-Jun; Kang, Tae Goo; Je, Minkyu

2010-01-01

A 1.8-mW, 18.5-mm(2) 64-channel current readout ASIC was implemented in 0.18-µm CMOS together with a new calibration scheme for silicon nanowire biosensor arrays. The ASIC consists of 64 channels of dedicated readout and conditioning circuits which incorporate correlated double sampling scheme to reduce the effect of 1/f noise and offset from the analog front-end. The ASIC provides a 10-bit digital output with a sampling rate of 300 S/s whilst achieving a minimum resolution of 7 pA(rms). A new electrical calibration method was introduced to mitigate the issue of large variations in the nano-scale sensor device parameters and optimize the sensor sensitivity. The experimental results show that the proposed calibration technique improved the sensitivity by 2 to 10 times and reduced the variation between dataset by 9 times.

On Certain New Methodology for Reducing Sensor and Readout Electronics Circuitry Noise in Digital Domain

Science.gov (United States)

Kizhner, Semion; Miko, Joseph; Bradley, Damon; Heinzen, Katherine

2008-01-01

NASA Hubble Space Telescope (HST) and upcoming cosmology science missions carry instruments with multiple focal planes populated with many large sensor detector arrays. These sensors are passively cooled to low temperatures for low-level light (L3) and near-infrared (NIR) signal detection, and the sensor readout electronics circuitry must perform at extremely low noise levels to enable new required science measurements. Because we are at the technological edge of enhanced performance for sensors and readout electronics circuitry, as determined by thermal noise level at given temperature in analog domain, we must find new ways of further compensating for the noise in the signal digital domain. To facilitate this new approach, state-of-the-art sensors are augmented at their array hardware boundaries by non-illuminated reference pixels, which can be used to reduce noise attributed to sensors. There are a few proposed methodologies of processing in the digital domain the information carried by reference pixels, as employed by the Hubble Space Telescope and the James Webb Space Telescope Projects. These methods involve using spatial and temporal statistical parameters derived from boundary reference pixel information to enhance the active (non-reference) pixel signals. To make a step beyond this heritage methodology, we apply the NASA-developed technology known as the Hilbert- Huang Transform Data Processing System (HHT-DPS) for reference pixel information processing and its utilization in reconfigurable hardware on-board a spaceflight instrument or post-processing on the ground. The methodology examines signal processing for a 2-D domain, in which high-variance components of the thermal noise are carried by both active and reference pixels, similar to that in processing of low-voltage differential signals and subtraction of a single analog reference pixel from all active pixels on the sensor. Heritage methods using the aforementioned statistical parameters in the

LHC1: a semiconductor pixel detector readout chip with internal, tunable delay providing a binary pattern of selected events

International Nuclear Information System (INIS)

Heijne, E.H.M.; Antinori, F.; Barberis, D.

1996-01-01

The Omega3/LHC1 pixel detector readout chip comprises a matrix of 128 x 16 readout cells of 50 μm x 500 μm and peripheral functions with 4 distinct modes of initialization and operation, together more than 800 000 transistors. Each cell contains a complete chain of amplifier, discriminator with adjustable threshold and fast-OR output, a globally adjustable delay with local fine-tuning, coincidence logic and memory. Every cell can be individually addressed for electrical test and masking. First results have been obtained from electrical tests of a chip without detector as well as from source measurements. The electronic noise without detector is ∼100 e - rms. The lowest threshold setting is close to 2000 e - and non-uniformity has been measured to be better than 450 e - rms at 5000 e - threshold. A timewalk of <10 ns and a precision of <6 ns rms on a delay of 2 μs have been measured. The results may be improved by further optimization. (orig.)

Online calibrations and performance of the ATLAS Pixel Detector

CERN Document Server

Keil, M; The ATLAS collaboration

2010-01-01

The ATLAS Pixel Detector is the innermost detector of the ATLAS experiment at the Large Hadron Collider at CERN. It consists of 1744 silicon sensors equipped with approximately 80 M electronic channels, providing typically three measurement points with high resolution for particles emerging from the beam-interaction region, thus allowing measuring particle tracks and secondary vertices with very high precision. The readout system of the Pixel Detector is based on a bi-directional optical data transmission system between the detector and the data acquisition system with an individual link for each of the 1744 modules. Signal conversion components are located on both ends, approximately 80 m apart. The talk will give an overview of the calibration and performance of both the detector and its optical readout. The most basic parameter to be tuned and calibrated for the detector electronics is the readout threshold of the individual pixel channels. These need to be carefully tuned to optimise position resolution a...

Module and Electronics Developments for the ATLAS ITK Pixel System

CERN Document Server

Rummler, Andr{e}; The ATLAS collaboration

2016-01-01

The entire tracking system of the ATLAS experiment will be replaced during the LHC Phase II shutdown around 2025 by an all-silicon detector (Inner Tracker, ITk). The pixel detector will be composed by the five innermost layers, instrumented with new sensor and readout electronics technologies to improve the tracking performance and cope with the severe HL-LHC environment in terms of occupancy and radiation. The total area of the new pixel system could measure up to 14 m^2, depending on the final layout choice that is expected to take place in early 2017. Different designs of planar, 3D, CMOS sensors are being investigated to identify the optimal technology for the different pixel layers. In parallel sensor-chip interconnection options are evaluated in collaboration with industrial partners to identify reliable technologies when employing 100-150 μm thin chips. While the new read-out chip is being developed by the RD53 Collaboration, the pixel off detector read-out electronics will be implemented in the frame...

Fabrication of an Absorber-Coupled MKID Detector and Readout for Sub-Millimeter and Far-Infrared Astronomy

Science.gov (United States)

Brown, Ari-David; Hsieh, Wen-Ting; Moseley, S. Harvey; Stevenson, Thomas R.; U-yen, Kongpop; Wollack, Edward J.

2010-01-01

We have fabricated absorber-coupled microwave kinetic inductance detector (MKID) arrays for sub-millimeter and farinfrared astronomy. Each detector array is comprised of lambda/2 stepped impedance resonators, a 1.5µm thick silicon membrane, and 380µm thick silicon walls. The resonators consist of parallel plate aluminum transmission lines coupled to low impedance Nb microstrip traces of variable length, which set the resonant frequency of each resonator. This allows for multiplexed microwave readout and, consequently, good spatial discrimination between pixels in the array. The Al transmission lines simultaneously act to absorb optical power and are designed to have a surface impedance and filling fraction so as to match the impedance of free space. Our novel fabrication techniques demonstrate high fabrication yield of MKID arrays on large single crystal membranes and sub-micron front-to-back alignment of the microstrip circuit.

Recent progress in the development of a B-factory monolithic active pixel detector

International Nuclear Information System (INIS)

Stanic, S.; Aihara, H.; Barbero, M.; Bozek, A.; Browder, T.; Hazumi, M.; Kennedy, J.; Kent, N.; Olsen, S.; Palka, H.; Rosen, M.; Ruckman, L.; Trabelsi, K.; Tsuboyama, T.; Uchida, K.; Varner, G.; Yang, Q.

2006-01-01

Due to the need for precise vertexing at future higher luminosity B-factories with the expectedly increasing track densities and radiation exposures, upgrade of present silicon strip detectors with thin, radiation resistant pixel detectors is highly desired. Considerable progress in the technological development of thin CMOS based Monolithic Active Pixel Sensors (MAPS) in the last years makes them a realistic upgrade option and the feasibility studies of their application in Belle are actively pursued. The most serious concerns are their radiation hardness and their read-out speed. To address them, several prototypes denoted as Continuous Acquisition Pixel (CAP) sensors have been developed and tested. The latest of the CAP sensor prototypes is CAP3, designed in the TSMC 0.25μm process with a 5-deep sample pair pipeline in each pixel. A setup with several CAP3 sensors will be used to assess the performance of a full scale pixel read-out system running at realistic read-out speed. The results and plans for the next stages of R and D towards a full Pixel Vertex Detector (PVD) are presented

Nuclear resonant scattering measurements on (57)Fe by multichannel scaling with a 64-pixel silicon avalanche photodiode linear-array detector.

Science.gov (United States)

Kishimoto, S; Mitsui, T; Haruki, R; Yoda, Y; Taniguchi, T; Shimazaki, S; Ikeno, M; Saito, M; Tanaka, M

2014-11-01

We developed a silicon avalanche photodiode (Si-APD) linear-array detector for use in nuclear resonant scattering experiments using synchrotron X-rays. The Si-APD linear array consists of 64 pixels (pixel size: 100 × 200 μm(2)) with a pixel pitch of 150 μm and depletion depth of 10 μm. An ultrafast frontend circuit allows the X-ray detector to obtain a high output rate of >10(7) cps per pixel. High-performance integrated circuits achieve multichannel scaling over 1024 continuous time bins with a 1 ns resolution for each pixel without dead time. The multichannel scaling method enabled us to record a time spectrum of the 14.4 keV nuclear radiation at each pixel with a time resolution of 1.4 ns (FWHM). This method was successfully applied to nuclear forward scattering and nuclear small-angle scattering on (57)Fe.

Antenna-coupled bolometer arrays using transition-edge sensors

Energy Technology Data Exchange (ETDEWEB)

Myers, Michael J. [Department of Physics, University of California, Berkeley, California 94720 (United States)]. E-mail: mmyers@cosmology.berkeley.edu; Ade, Peter [School of Physics and Astronomy, Cardiff University, Cardiff, Wales (United Kingdom); Arnold, Kam [Department of Physics, University of California, Berkeley, California 94720 (United States); Engargiola, Greg [Department of Astronomy, University of California, Berkeley, California 94720 (United States); Holzapfel, Bill [Department of Physics, University of California, Berkeley, California 94720 (United States); Lee, Adrian T. [Department of Physics, University of California, Berkeley, California 94720 (United States); O' Brient, Roger [Department of Physics, University of California, Berkeley, California 94720 (United States); Richards, Paul L. [Department of Physics, University of California, Berkeley, California 94720 (United States); Smith, Andy [Northrop Grumman, Redondo Beach, California 90278 (United States); Spieler, Helmuth [Lawrence Berkeley National Laboratory, Berkeley, California 94720 (United States); Tran, Huan T. [Department of Physics, University of California, Berkeley, California 94720 (United States)

2006-04-15

We are developing antenna-coupled Transition-Edge Sensor (TES) bolometer arrays for use in measurements of the CMB polarization. TES bolometers have many well-known advantages over conventional bolometers, such as increased speed, linearity, and the existence of readout multiplexers. Antenna-coupled bolometers use an on-chip planar antenna to couple light into the bolometer. The antenna directivity and polarization sensitivity, along with the potential for on-chip band defining filters and channelizing circuits, allow a significant increase in focal plane integration. This eliminates the bulky horns, quasioptical filters, dichroics, and polarizers which might otherwise be needed in a conventional bolometric system. This simplification will ease the construction of receivers with larger numbers of pixels. We report on the fabrication and optical testing of single antenna-coupled bolometer pixels with integrated band defining filters. We will also discuss current progress on fabrication of a bolometer array based on this design.

A smart-pixel holographic competitive learning network

Science.gov (United States)

Slagle, Timothy Michael

Neural networks are adaptive classifiers which modify their decision boundaries based on feedback from externally- or internally-generated error signals. Optics is an attractive technology for neural network implementation because it offers the possibility of parallel, nearly instantaneous computation of the weighted neuron inputs by the propagation of light through the optical system. Using current optical device technology, system performance levels of 3 × 1011 connection updates per second can be achieved. This thesis presents an architecture for an optical competitive learning network which offers advantages over previous optical implementations, including smart-pixel-based optical neurons, phase- conjugate self-alignment of a single neuron plane, and high-density, parallel-access weight storage, interconnection, and learning in a volume hologram. The competitive learning algorithm with modifications for optical implementation is described, and algorithm simulations are performed for an example problem. The optical competitive learning architecture is then introduced. The optical system is simulated using the ``beamprop'' algorithm at the level of light propagating through the system components, and results showing competitive learning operation in agreement with the algorithm simulations are presented. The optical competitive learning requires a non-linear, non-local ``winner-take-all'' (WTA) neuron function. Custom-designed smart-pixel WTA neuron arrays were fabricated using CMOS VLSI/liquid crystal technology. Results of laboratory tests of the WTA arrays' switching characteristics, time response, and uniformity are then presented. The system uses a phase-conjugate mirror to write the self-aligning interconnection weight holograms, and energy gain is required from the reflection to minimize erasure of the existing weights. An experimental system for characterizing the PCM response is described. Useful gains of 20 were obtained with a polarization

Technological aspects of gaseous pixel detectors fabrication

NARCIS (Netherlands)

Blanco Carballo, V.M.; Salm, Cora; Smits, Sander M.; Schmitz, Jurriaan; Melai, J.; Chefdeville, M.A.; van der Graaf, H.

2007-01-01

Integrated gaseous pixel detectors consisting of a metal punctured foil suspended in the order of 50μm over a pixel readout chip by means by SU-8 insulating pillars have been fabricated. SU-8 is used as sacrificial layer but metallization over uncrosslinked SU-8 presents adhesion and stress

Development of telescope readout system based on FELIX for testbeam experiments

CERN Document Server

Wu, Weihao; Chen, Hucheng; Chen, Kai; Lacobucci, Giuseppe; Lanni, Francessco; Liu, Hongbin; Barrero Pinto, Mateus Vicente; Xu, Lailin

2017-01-01

The High Voltage CMOS (HV-CMOS) sensors are extensively investigated by the ATLAS collaboration in the High-Luminosity LHC (HL-LHC) upgrade of the Inner Tracker (ITk) detector. A testbeam telescope, based on the ATLAS IBL (Insertable B-Layer) silicon pixel modules, has been built to characterize the HV-CMOS sensor prototypes. The Front-End LInk eXchange (FELIX) system is a new approach to function as the gateway between front-ends and the commodity switched network in the different detectors of the ATLAS upgrade. A FELIX based readout system has been developed for the readout of the testbeam telescope, which includes a Telescope Readout FMC Card as interface between the IBL DC (double-chip) modules and a Xilinx ZC706 evaluation board. The test results show that the FELIX based telescope readout system is capable of sensor calibration and readout of a high-density pixel detector in test beam experiments in an effective way.

Precision tracking with a single gaseous pixel detector

NARCIS (Netherlands)

Tsigaridas, S.; van Bakel, N.; Bilevych, Y.; Gromov, V.; Hartjes, F.; Hessey, N.P.; de Jong, P.; Kluit, R.

2015-01-01

The importance of micro-pattern gaseous detectors has grown over the past few years after successful usage in a large number of applications in physics experiments and medicine. We develop gaseous pixel detectors using micromegas-based amplification structures on top of CMOS pixel readout chips.

FE-I4 pixel chip characterization with USBpix3 test system

Energy Technology Data Exchange (ETDEWEB)

Filimonov, Viacheslav; Gonella, Laura; Hemperek, Tomasz; Huegging, Fabian; Janssen, Jens; Krueger, Hans; Pohl, David-Leon; Wermes, Norbert [University of Bonn, Bonn (Germany)

2015-07-01

The USBpix readout system is a small and light weighting test system for the ATLAS pixel readout chips. It is widely used to operate and characterize FE-I4 pixel modules in lab and test beam environments. For multi-chip modules the resources on the Multi-IO board, that is the central control unit of the readout system, are coming to their limits, which makes the simultaneous readout of more than one chip at a time challenging. Therefore an upgrade of the current USBpix system has been developed. The upgraded system is called USBpix3 - the main focus of the talk. Characterization of single chip FE-I4 modules was performed with USBpix3 prototype (digital, analog, threshold and source scans; tuning). PyBAR (Bonn ATLAS Readout in Python scripting language) was used as readout software. PyBAR consists of FEI4 DAQ and Data Analysis Libraries in Python. The presentation describes the USBpix3 system, results of FE-I4 modules characterization and preparation for the multi-chip module and multi-module readout with USBpix3.

Yarr: A PCIe based readout system for semiconductor tracking systems

Energy Technology Data Exchange (ETDEWEB)

Heim, Timon [Bergische Universitaet Wuppertal, Wuppertal (Germany); CERN, Geneva (Switzerland); Maettig, Peter [Bergische Universitaet Wuppertal, Wuppertal (Germany); Pernegger, Heinz [CERN, Geneva (Switzerland)

2015-07-01

The Yarr readout system is a novel DAQ concept, using an FPGA board connected via PCIe to a computer, to read out semiconductor tracking systems. The system uses the FPGA as a reconfigurable IO interface which, in conjunction with the very high speed of the PCIe bus, enables a focus of processing the data stream coming from the pixel detector in software. Modern computer system could potentially make the need of custom signal processing hardware in readout systems obsolete and the Yarr readout system showcases this for FE-I4 chips, which are state-of-the-art readout chips used in the ATLAS Pixel Insertable B-Layer and developed for tracking in high multiplicity environments. The underlying concept of the Yarr readout system tries to move intelligence from hardware into the software without the loss of performance, which is made possible by modern multi-core processors. The FPGA board firmware acts like a buffer and does no further processing of the data stream, enabling rapid integration of new hardware due to minimal firmware minimisation.

Development and characterization of diamond and 3D-silicon pixel detectors with ATLAS-pixel readout electronics

International Nuclear Information System (INIS)

Mathes, Markus

2008-12-01

Hybrid pixel detectors are used for particle tracking in the innermost layers of current high energy experiments like ATLAS. After the proposed luminosity upgrade of the LHC, they will have to survive very high radiation fluences of up to 10 16 particles per cm 2 per life time. New sensor concepts and materials are required, which promise to be more radiation tolerant than the currently used planar silicon sensors. Most prominent candidates are so-called 3D-silicon and single crystal or poly-crystalline diamond sensors. Using the ATLAS pixel electronics different detector prototypes with a pixel geometry of 400 x 50 μm 2 have been built. In particular three devices have been studied in detail: a 3D-silicon and a single crystal diamond detector with an active area of about 1 cm 2 and a poly-crystalline diamond detector of the same size as a current ATLAS pixel detector module (2 x 6 cm 2 ). To characterize the devices regarding their particle detection efficiency and spatial resolution, the charge collection inside a pixel cell as well as the charge sharing between adjacent pixels was studied using a high energy particle beam. (orig.)

Data acquisition at the front-end of the Mu3e pixel detector

Energy Technology Data Exchange (ETDEWEB)

Perrevoort, Ann-Kathrin [Physikalisches Institut, Universitaet Heidelberg (Germany); Collaboration: Mu3e-Collaboration

2016-07-01

The Mu3e experiment - searching for the lepton-flavour violating decay of the muon into three electrons at an unprecedented sensitivity of one in 10{sup 16} decays - is based on a pixel tracking detector. The sensors are High-Voltage Monolithic Active Pixel Sensors, a technology which allows for very fast and thin detectors, and thus is an ideal fit for Mu3e where the trajectories of low-momentum electrons at high rates are to be measured. The detector will consist of about 275 million pixels and will be operated at up to 10{sup 9} muon stops per second. Therefore, a fast and trigger-less data readout is required. The pixel sensors feature zero-suppressed data output via high-speed serial links. The data is then buffered and sorted by time on a FPGA on the front-end before being processed to the following readout stage. In this talk, the readout of the Mu3e pixel detector at the front-end is introduced. Furthermore, a first firmware implementation of this concept in a beam telescope consisting of the current pixel sensor prototype MuPix7 is presented.

Performance of a novel wafer scale CMOS active pixel sensor for bio-medical imaging

International Nuclear Information System (INIS)

Esposito, M; Evans, P M; Wells, K; Anaxagoras, T; Konstantinidis, A C; Zheng, Y; Speller, R D; Allinson, N M

2014-01-01

Recently CMOS active pixels sensors (APSs) have become a valuable alternative to amorphous silicon and selenium flat panel imagers (FPIs) in bio-medical imaging applications. CMOS APSs can now be scaled up to the standard 20 cm diameter wafer size by means of a reticle stitching block process. However, despite wafer scale CMOS APS being monolithic, sources of non-uniformity of response and regional variations can persist representing a significant challenge for wafer scale sensor response. Non-uniformity of stitched sensors can arise from a number of factors related to the manufacturing process, including variation of amplification, variation between readout components, wafer defects and process variations across the wafer due to manufacturing processes. This paper reports on an investigation into the spatial non-uniformity and regional variations of a wafer scale stitched CMOS APS. For the first time a per-pixel analysis of the electro-optical performance of a wafer CMOS APS is presented, to address inhomogeneity issues arising from the stitching techniques used to manufacture wafer scale sensors. A complete model of the signal generation in the pixel array has been provided and proved capable of accounting for noise and gain variations across the pixel array. This novel analysis leads to readout noise and conversion gain being evaluated at pixel level, stitching block level and in regions of interest, resulting in a coefficient of variation ⩽1.9%. The uniformity of the image quality performance has been further investigated in a typical x-ray application, i.e. mammography, showing a uniformity in terms of CNR among the highest when compared with mammography detectors commonly used in clinical practice. Finally, in order to compare the detection capability of this novel APS with the technology currently used (i.e. FPIs), theoretical evaluation of the detection quantum efficiency (DQE) at zero-frequency has been performed, resulting in a higher DQE for this

Performance of a novel wafer scale CMOS active pixel sensor for bio-medical imaging.

Science.gov (United States)

Esposito, M; Anaxagoras, T; Konstantinidis, A C; Zheng, Y; Speller, R D; Evans, P M; Allinson, N M; Wells, K

2014-07-07

Recently CMOS active pixels sensors (APSs) have become a valuable alternative to amorphous silicon and selenium flat panel imagers (FPIs) in bio-medical imaging applications. CMOS APSs can now be scaled up to the standard 20 cm diameter wafer size by means of a reticle stitching block process. However, despite wafer scale CMOS APS being monolithic, sources of non-uniformity of response and regional variations can persist representing a significant challenge for wafer scale sensor response. Non-uniformity of stitched sensors can arise from a number of factors related to the manufacturing process, including variation of amplification, variation between readout components, wafer defects and process variations across the wafer due to manufacturing processes. This paper reports on an investigation into the spatial non-uniformity and regional variations of a wafer scale stitched CMOS APS. For the first time a per-pixel analysis of the electro-optical performance of a wafer CMOS APS is presented, to address inhomogeneity issues arising from the stitching techniques used to manufacture wafer scale sensors. A complete model of the signal generation in the pixel array has been provided and proved capable of accounting for noise and gain variations across the pixel array. This novel analysis leads to readout noise and conversion gain being evaluated at pixel level, stitching block level and in regions of interest, resulting in a coefficient of variation ⩽1.9%. The uniformity of the image quality performance has been further investigated in a typical x-ray application, i.e. mammography, showing a uniformity in terms of CNR among the highest when compared with mammography detectors commonly used in clinical practice. Finally, in order to compare the detection capability of this novel APS with the technology currently used (i.e. FPIs), theoretical evaluation of the detection quantum efficiency (DQE) at zero-frequency has been performed, resulting in a higher DQE for this

Accounting for Dark Current Accumulated during Readout of Hubble's ACS/WFC Detectors

Science.gov (United States)

Ryon, Jenna E.; Grogin, Norman A.; Coe, Dan A.; ACS Team

2018-06-01

We investigate the properties of excess dark current accumulated during the 100-second full-frame readout of the Advanced Camera for Surveys (ACS) Wide Field Channel (WFC) detectors. This excess dark current, called "readout dark", gives rise to ambient background gradients and hot columns in each ACS/WFC image. While readout dark signal is removed from science images during the bias correction step in CALACS, the additional noise from the readout dark is currently not taken into account. We develop a method to estimate the readout dark noise properties in ACS/WFC observations. We update the error (ERR) extensions of superbias images to include the appropriate noise from the ambient readout dark gradient and stable hot columns. In recent data, this amounts to about 5 e-/pixel added variance in the rows farthest from the WFC serial registers, and about 7 to 30 e-/pixel added variance along the stable hot columns. We also flag unstable hot columns in the superbias data quality (DQ) extensions. The new reference file pipeline for ACS/WFC implements these updates to our superbias creation process.

Development of a novel direct X-ray detector using photoinduced discharge (PID) readout for digital radiography

Science.gov (United States)

Heo, D.; Jeon, S.; Kim, J.-S.; Kim, R. K.; Cha, B. K.; Moon, B. J.; Yoon, J.

2013-02-01

We developed a novel direct X-ray detector using photoinduced discharge (PID) readout for digital radiography. The pixel resolution is 512 × 512 with 200 μm pixel and the overall active dimensions of the X-ray imaging panel is 10.24 cm × 10.24 cm. The detector consists of an X-ray absorption layer of amorphous selenium, a charge accumulation layer of metal, and a PID readout layer of amorphous silicon. In particular, the charge accumulation is pixelated because image charges generated by X-ray should be stored pixel by pixel. Here the image charges, or holes, are recombined with electrons generated by the PID method. We used a 405 nm laser diode and cylindrical lens to make a line beam source with a width of 50 μm for PID readout, which generates charges for each pixel lines during the scan. We obtained spatial frequencies of about 1.0 lp/mm for the X-direction (lateral direction) and 0.9 lp/mm for the Y-direction (scanning direction) at 50% modulation transfer function.

Development and characterization of diamond and 3D-silicon pixel detectors with ATLAS-pixel readout electronics

Energy Technology Data Exchange (ETDEWEB)

Mathes, Markus

2008-12-15

Hybrid pixel detectors are used for particle tracking in the innermost layers of current high energy experiments like ATLAS. After the proposed luminosity upgrade of the LHC, they will have to survive very high radiation fluences of up to 10{sup 16} particles per cm{sup 2} per life time. New sensor concepts and materials are required, which promise to be more radiation tolerant than the currently used planar silicon sensors. Most prominent candidates are so-called 3D-silicon and single crystal or poly-crystalline diamond sensors. Using the ATLAS pixel electronics different detector prototypes with a pixel geometry of 400 x 50 {mu}m{sup 2} have been built. In particular three devices have been studied in detail: a 3D-silicon and a single crystal diamond detector with an active area of about 1 cm{sup 2} and a poly-crystalline diamond detector of the same size as a current ATLAS pixel detector module (2 x 6 cm{sup 2}). To characterize the devices regarding their particle detection efficiency and spatial resolution, the charge collection inside a pixel cell as well as the charge sharing between adjacent pixels was studied using a high energy particle beam. (orig.)

CMS Forward Pixel Upgrade Electronics and System Testing

CERN Document Server

Weber, Hannsjorg Artur

2016-01-01

This note discusses results of electronics and system testing of the CMS forward pixel (FPIX) detector upgrade for Phase 1. The FPIX detector is comprised of four stand-alone half cylinders, each of which contains frontend readout electronic boards, power regulators, cables and fibers in addition to the pixel modules. All of the components undergo rigorous testing and quality assurance before assembly into the half cylinders. Afterwards, we perform full system tests on the completely assembled half cylinders, including calibrations at final operating temperatures, characterization of the realistic readout chain, and system grounding and noise studies. The results from all these tests are discussed.

MUSIC: An 8 channel readout ASIC for SiPM arrays

Science.gov (United States)

Gómez, Sergio; Gascón, David; Fernández, Gerard; Sanuy, Andreu; Mauricio, Joan; Graciani, Ricardo; Sanchez, David

2016-04-01

This paper presents an 8 channel ASIC for SiPM anode readout based on a novel low input impedance current conveyor (under patent1). This Multiple Use SiPM Integrated Circuit (MUSIC) has been designed to serve several purposes, including, for instance, the readout of SiPM arrays for some of the Cherenkov Telescope Array (CTA) cameras. The current division scheme at the very front end part of the circuit splits the input current into differently scaled copies which are connected to independent current mirrors. The circuit contains a tunable pole zero cancellation of the SiPM recovery time constant to deal with sensors from different manufacturers. Decay times up to 100 ns are supported covering most of the available SiPM devices in the market. MUSIC offers three main features: (1) differential output of the sum of the individual input channels; (2) 8 individual single ended analog outputs and; (3) 8 individual binary outputs. The digital outputs encode the amount of collected charge in the duration of the digital signal using a time over threshold technique. For each individual channel, the user must select the analog or digital output. Each functionality, the signal sum and the 8 A/D outputs, include a selectable dual-gain configuration. Moreover, the signal sum implements dual-gain output providing a 15 bit dynamic range. Full die simulation results of the MUSIC designed using AMS 0.35 µm SiGe technology are presented: total die size of 9 mm2, 500 MHz bandwidth for channel sum and 150 MHz bandwidth for A/D channels, low input impedance (≍32 Ω), single photon output pulse width at half maximum (FWHM) between 5 and 10 ns and with a power consumption of ≍ 30 mW/ch plus ≍ 200 mW for the 8 ch sum. Encapsulated prototype samples of the MUSIC are expected by March 2016.

Advanced pixel architectures for scientific image sensors

CERN Document Server

Coath, R; Godbeer, A; Wilson, M; Turchetta, R

2009-01-01

We present recent developments from two projects targeting advanced pixel architectures for scientific applications. Results are reported from FORTIS, a sensor demonstrating variants on a 4T pixel architecture. The variants include differences in pixel and diode size, the in-pixel source follower transistor size and the capacitance of the readout node to optimise for low noise and sensitivity to small amounts of charge. Results are also reported from TPAC, a complex pixel architecture with ~160 transistors per pixel. Both sensors were manufactured in the 0.18μm INMAPS process, which includes a special deep p-well layer and fabrication on a high resistivity epitaxial layer for improved charge collection efficiency.

A low-power CMOS readout IC design for bolometer applications

Science.gov (United States)

Galioglu, Arman; Abbasi, Shahbaz; Shafique, Atia; Ceylan, Ömer; Yazici, Melik; Kaynak, Mehmet; Durmaz, Emre C.; Arsoy, Elif Gul; Gurbuz, Yasar

2017-02-01

A prototype of a readout IC (ROIC) designed for use in high temperature coefficient of resistance (TCR) SiGe microbolometers is presented. The prototype ROIC architecture implemented is based on a bridge with active and blind bolometer pixels with a capacitive transimpedance amplifier (CTIA) input stage and column parallel integration with serial readout. The ROIC is designed for use in high (>= 4 %/K) TCR and high detector resistance Si/SiGe microbolometers with 17x17 μm2 pixel sizes in development. The prototype has been designed and fabricated in 0.25- μm SiGe:C BiCMOS process.

Results from CHIPIX-FE0, a Small-Scale Prototype of a New Generation Pixel Readout ASIC in 65 nm CMOS for HL-LHC

CERN Document Server

Pacher, L.; Demaria, N.; Rivetti, A.; Da Rocha Rolo, M.; Dellacasa, G.; Mazza, G.; Rotondo, F.; Wheadon, R.; Paternò, A.; Panati, S.; Loddo, F.; Licciulli, F.; Ciciriello, F.; Marzocca, C.; Gaioni, L.; Traversi, G.; Re, V.; De Canio, F.; Ratti, L.; Marconi, S.; Placidi, P.; Magazzù, G.; Stabile, A.; Mattiazzo, S.

2018-01-01

A prototype of a new-generation readout ASIC targeting High-Luminosity (HL) LHC pixel detector upgrades has been designed and fabricated as part of the Italian INFN CHIPIX65 project using a commercial 65 nm CMOS technology. This demonstrator, hereinafter referred to as CHIPIX-FE0, is composed of a matrix of 64 × 64 pixels with 50 μm × 50 μm pixel size embedding two different architectures of analog front-ends working in parallel. The final layout of the chip was submitted and accepted for fabrication on July 2016. Chips were received back from the foundry on October 2016 and successfully characterized before irradiation. Several irra- diation campaigns with X-rays have been accomplished during 2017 at Padova INFN and CERN EP/ESE facilities under different uniformity and temperature conditions up to 630 Mrad Total Ionizing Dose (TID). These studies corfirmed negligible degradation of analog front-ends per- formance after irradiation. First sample chips have been also bump-bonded to 50 μm × 50 μm and sin...

MT3250BA: a 320×256-50µm snapshot microbolometer ROIC for high-resistance detector arrays

Science.gov (United States)

Eminoglu, Selim; Akin, Tayfun

2013-06-01

This paper reports the development of a new microbolometer readout integrated circuit (MT3250BA) designed for high-resistance detector arrays. MT3250BA is the first microbolometer readout integrated circuit (ROIC) product from Mikro-Tasarim Ltd., which is a fabless IC design house specialized in the development of monolithic CMOS imaging sensors and ROICs for hybrid photonic imaging sensors and microbolometers. MT3250BA has a format of 320 × 256 and a pixel pitch of 50 µm, developed with a system-on-chip architecture in mind, where all the timing and biasing for this ROIC are generated on-chip without requiring any external inputs. MT3250BA is a highly configurable ROIC, where many of its features can be programmed through a 3-wire serial interface allowing on-the-fly configuration of many ROIC features. MT3250BA has 2 analog video outputs and 1 analog reference output for pseudo-differential operation, and the ROIC can be programmed to operate in the 1 or 2-output modes. A unique feature of MT3250BA is that it performs snapshot readout operation; therefore, the image quality will only be limited by the thermal time constant of the detector pixels, but not by the scanning speed of the ROIC, as commonly found in the conventional microbolometer ROICs performing line-by-line (rolling-line) readout operation. The signal integration is performed at the pixel level in parallel for the whole array, and signal integration time can be programmed from 0.1 µs up to 100 ms in steps of 0.1 µs. The ROIC is designed to work with high-resistance detector arrays with pixel resistance values higher than 250 kΩ. The detector bias voltage can be programmed on-chip over a 2 V range with a resolution of 1 mV. The ROIC has a measured input referred noise of 260 µV rms at 300 K. The ROIC can be used to build a microbolometer infrared sensor with an NETD value below 100 mK using a microbolometer detector array fabrication technology with a high detector resistance value (≥ 250 K�

ATLAS Phase-II upgrade pixel data transmission development

CERN Document Server

AUTHOR|(INSPIRE)INSPIRE-00111400; The ATLAS collaboration

2017-01-01

The current tracking system of the ATLAS experiment will be replaced by an all-silicon detector (ITk) in the course of the planned HL-LHC accelerator upgrade around 2025. The readout of the ITk pixel system will be most challenging in terms of data rate and readout speed. Simulation of the on-detector electronics indicates that the planned trigger rate of 1 MHz will require readout speeds up to 5.12 Gb/s per data link. The high-radiation environment precludes optical data transmission, so the first part of the data transmission has to be implemented electrically, over a 6-m distance between the pixel modules and the optical transceivers. Several high-speed electrical data transmission solutions involving small-gauge wire cables or flexible circuits have been prototyped and characterized. A combination of carefully-selected physical layers and aggressive signal conditioning are required to achieve the proposed specifications.

Novel concept of TDI readout circuit for LWIR detector

Science.gov (United States)

Kim, Byunghyuck; Yoon, Nanyoung; Lee, Hee Chul; Kim, Choong-Ki

2000-07-01

Noise property is the prime consideration in readout circuit design. The output noise caused by the photon noise, which dominates total noise in BLIP detectors, is limited by the integration time that an element looks at a specific point in the scene. Large integration time leads to a low noise performance. Time-delay integration (TDI) is used to effectively increase the integration time and reduce the photon noise. However, it increases the number of dead pixels and requires large integration capacitors and low noise output stage of the readout circuit. In this paper, to solve these problems, we propose a new concept of readout circuit, which performs background suppression, cell-to-cell background current non-uniformity compensation, and dead pixel correction using memory, ADC, DAC, and current copier cell. In simulation results, comparing with the conventional TDI readout circuit, the integration capacitor size can be reduced to 1/5 and trans-impedance gain can be increased by five times. Therefore, the new TDI readout circuit does not require large area and low noise output stage. And the error of skimming current is less than 2%, and the fixed pattern noise induced by cell-to-cell background current variation is reduced to less than 1%.

Characterization of Ni/SnPb-TiW/Pt Flip Chip Interconnections in Silicon Pixel Detector Modules

CERN Document Server

Karadzhinova, Aneliya; Härkönen, Jaakko; Luukka, Panja-riina; Mäenpää, Teppo; Tuominen, Eija; Haeggstrom, Edward; Kalliopuska, Juha; Vahanen, Sami; Kassamakov, Ivan

2014-01-01

In contemporary high energy physics experiments, silicon detectors are essential for recording the trajectory of new particles generated by multiple simultaneous collisions. Modern particle tracking systems may feature 100 million channels, or pixels, which need to be individually connected to read-out chains. Silicon pixel detectors are typically connected to readout chips by flip-chip bonding using solder bumps. High-quality electro-mechanical flip-chip interconnects minimizes the number of dead read-out channels in the particle tracking system. Furthermore, the detector modules must endure handling during installation and withstand heat generation and cooling during operation. Silicon pixel detector modules were constructed by flip-chip bonding 16 readout chips to a single sensor. Eutectic SnPb solder bumps were deposited on the readout chips and the sensor chips were coated with TiW/Pt thin film UBM (under bump metallization). The modules were assembled at Advacam Ltd, Finland. We studied the uniformity o...

An EUDET/AIDA Pixel Beam Telescope for Detector Development

CERN Document Server

Perrey, Hanno

2013-01-01

A high resolution ($\\sigma 2 \\sim \\mu$) beam telescope based on monolithic active pixel sensors (MAPS) was developed within the EUDET collaboration. The telescope consists of six sensor planes using Mimosa26 MAPS with a pixel pitch of $18.4 \\mu$ and thinned down to $50 \\mu$. The excellent resolution, readout rate and DAQ integration capabilities made the telescope a primary test beam tool for many groups including several CERN based experiments. Within the new European detector infrastructure project AIDA the test beam telescope will be further extended in terms of cooling infrastructure, readout speed and precision. In order to provide a system optimized for the different requirements by the user community, a combination of various pixel technologies is foreseen. In this report the design of this even more flexible telescope with three different pixel technologies (TimePix, Mimosa, ATLAS FE-I4) will be presented. First test beam results with the HitOR signal provided by the FE-I4 integrated into the trigger...

System test and noise performance studies at the ATLAS pixel detector

International Nuclear Information System (INIS)

Weingarten, J.

2007-09-01

The central component of the ATLAS Inner Tracker is the pixel detector. It consists of three barrel layers and three disk-layers in the end-caps in both forward directions. The innermost barrel layer is mounted at a distance of about 5 cm from the interaction region. With its very high granularity, truly two-dimensional hit information, and fast readout it is well suited to cope with the high densities of charged tracks, expected this close to the interaction region. The huge number of readout channels necessitates a very complex services infrastructure for powering, readout and safety. After a description of the pixel detector and its services infrastructure, key results from the system test at CERN are presented. Furthermore the noise performance of the pixel detector, crucial for high tracking and vertexing efficiencies, is studied. Measurements of the single-channel random noise are presented together with studies of common mode noise and measurements of the noise occupancy using a random trigger generator. (orig.)

System test and noise performance studies at the ATLAS pixel detector

Energy Technology Data Exchange (ETDEWEB)

Weingarten, J.

2007-09-15

The central component of the ATLAS Inner Tracker is the pixel detector. It consists of three barrel layers and three disk-layers in the end-caps in both forward directions. The innermost barrel layer is mounted at a distance of about 5 cm from the interaction region. With its very high granularity, truly two-dimensional hit information, and fast readout it is well suited to cope with the high densities of charged tracks, expected this close to the interaction region. The huge number of readout channels necessitates a very complex services infrastructure for powering, readout and safety. After a description of the pixel detector and its services infrastructure, key results from the system test at CERN are presented. Furthermore the noise performance of the pixel detector, crucial for high tracking and vertexing efficiencies, is studied. Measurements of the single-channel random noise are presented together with studies of common mode noise and measurements of the noise occupancy using a random trigger generator. (orig.)

Diamond and silicon pixel detectors in high radiation environments

Energy Technology Data Exchange (ETDEWEB)

Tsung, Jieh-Wen

2012-10-15

Diamond pixel detector is a promising candidate for tracking of collider experiments because of the good radiation tolerance of diamond. The diamond pixel detector must withstand the radiation damage from 10{sup 16} particles per cm{sup 2}, which is the expected total fluence in High Luminosity Large Hadron Collider. The performance of diamond and silicon pixel detectors are evaluated in this research in terms of the signal-to-noise ratio (SNR). Single-crystal diamond pixel detectors with the most recent readout chip ATLAS FE-I4 are produced and characterized. Based on the results of the measurement, the SNR of diamond pixel detector is evaluated as a function of radiation fluence, and compared to that of planar-silicon ones. The deterioration of signal due to radiation damage is formulated using the mean free path of charge carriers in the sensor. The noise from the pixel readout circuit is simulated and calculated with leakage current and input capacitance to the amplifier as important parameters. The measured SNR shows good agreement with the calculated and simulated results, proving that the performance of diamond pixel detectors can exceed the silicon ones if the particle fluence is more than 10{sup 15} particles per cm{sup 2}.

Diamond and silicon pixel detectors in high radiation environments

International Nuclear Information System (INIS)

Tsung, Jieh-Wen

2012-10-01

Diamond pixel detector is a promising candidate for tracking of collider experiments because of the good radiation tolerance of diamond. The diamond pixel detector must withstand the radiation damage from 10 16 particles per cm 2 , which is the expected total fluence in High Luminosity Large Hadron Collider. The performance of diamond and silicon pixel detectors are evaluated in this research in terms of the signal-to-noise ratio (SNR). Single-crystal diamond pixel detectors with the most recent readout chip ATLAS FE-I4 are produced and characterized. Based on the results of the measurement, the SNR of diamond pixel detector is evaluated as a function of radiation fluence, and compared to that of planar-silicon ones. The deterioration of signal due to radiation damage is formulated using the mean free path of charge carriers in the sensor. The noise from the pixel readout circuit is simulated and calculated with leakage current and input capacitance to the amplifier as important parameters. The measured SNR shows good agreement with the calculated and simulated results, proving that the performance of diamond pixel detectors can exceed the silicon ones if the particle fluence is more than 10 15 particles per cm 2 .

Electron imaging with Medipix2 hybrid pixel detector

CERN Document Server

McMullan, G; Chen, S; Henderson, R; Llopart, X; Summerfield, C; Tlustos, L; Faruqi, A R

2007-01-01

The electron imaging performance of Medipix2 is described. Medipix2 is a hybrid pixel detector composed of two layers. It has a sensor layer and a layer of readout electronics, in which each 55 μm×55 μm pixel has upper and lower energy discrimination and MHz rate counting. The sensor layer consists of a 300 μm slab of pixellated monolithic silicon and this is bonded to the readout chip. Experimental measurement of the detective quantum efficiency, DQE(0) at 120 keV shows that it can reach 85% independent of electron exposure, since the detector has zero noise, and the DQE(Nyquist) can reach 35% of that expected for a perfect detector (4/π2). Experimental measurement of the modulation transfer function (MTF) at Nyquist resolution for 120 keV electrons using a 60 keV lower energy threshold, yields a value that is 50% of that expected for a perfect detector (2/π). Finally, Monte Carlo simulations of electron tracks and energy deposited in adjacent pixels have been performed and used to calculate expected v...

Performance of the CMS Phase 1 Pixel Detector

CERN Document Server

Akgun, Bora

2018-01-01

It is anticipated that the LHC accelerator will reach and exceed the luminosity of L = 2$\\times$10$^{34}$cm$^{-2}$s$^{-1}$ during the LHC Run 2 period until 2023. At this higher luminosity and increased hit occupancies the CMS phase-0 pixel detector would have been subjected to severe dead time and inefficiencies introduced by limited buffers in the analog read-out chip and effects of radiation damage in the sensors. Therefore a new pixel detector has been built and replaced the phase-0 detector in the 2016/17 LHC extended year-end technical stop. The CMS phase-1 pixel detector features four central barrel layers and three end-cap disks in forward and backward direction for robust tracking performance, and a significantly reduced overall material budget including new cooling and powering schemes. The design of the new front-end readout chip comprises larger data buffers, an increased transmission bandwidth, and low-threshold comparators. These improvements allow the new pixel detector to sustain and improve t...

Studies of the performance of different front-end systems for flat-panel multi-anode PMTs with CsI(Tl) scintillator arrays

International Nuclear Information System (INIS)

Sekiya, H.; Hattori, K.; Kubo, H.; Miuchi, K.; Nagayoshi, T.; Nishimura, H.; Okada, Y.; Orito, R.; Takada, A.; Takeda, A.; Tanimori, T.; Ueno, K.

2006-01-01

We have studied the performance of two different types of front-end systems for our gamma camera based on Hamamatsu H8500 (flat-panel 64 channels multi-anode PSPMT) with a CsI(Tl) scintillator array. The array consists of 64 pixels of 6x6x20mm 3 which corresponds to the anode pixels of H8500. One of the system is based on commercial ASIC chips in order to read out every anode. The others are based on resistive charge divider network between anodes to reduce readout channels. In both systems, each pixel (6mm) was clearly resolved by flood field irradiation of 137 Cs. We also investigated the energy resolution of these systems and showed the performance of the cascade connection of resistive network between some PMTs for large area detectors

Direct reading of charge multipliers with a self-triggering CMOS analog chip with 105k pixels at 50 micron pitch

CERN Document Server

Bellazzini, R; Minuti, M; Baldini, L; Brez, A; Cavalca, F; Latronico, L; Omodei, N; Massai, M M; Sgro, C; Costa, E; Krummenacher, P S F; De Oliveira, R

2006-01-01

We report on a large active area (15x15mm2), high channel density (470 pixels/mm2), self-triggering CMOS analog chip that we have developed as pixelized charge collecting electrode of a Micropattern Gas Detector. This device, which represents a big step forward both in terms of size and performance, is the last version of three generations of custom ASICs of increasing complexity. The CMOS pixel array has the top metal layer patterned in a matrix of 105600 hexagonal pixels at 50 micron pitch. Each pixel is directly connected to the underneath full electronics chain which has been realized in the remaining five metal and two poly-silicon layers of a 0.18 micron VLSI technology. The chip has customizable self-triggering capability and includes a signal pre-processing function for the automatic localization of the event coordinates. In this way it is possible to reduce significantly the readout time and the data volume by limiting the signal output only to those pixels belonging to the region of interest. The ve...

Development of the quality control system of the readout electronics for the large size telescope of the Cherenkov Telescope Array observatory

Science.gov (United States)

Konno, Y.; Kubo, H.; Masuda, S.; Paoletti, R.; Poulios, S.; Rugliancich, A.; Saito, T.

2016-07-01

The Cherenkov Telescope Array (CTA) is the next generation VHE γ-ray observatory which will improve the currently available sensitivity by a factor of 10 in the range 100 GeV to 10 TeV. The array consists of different types of telescopes, called large size telescope (LST), medium size telescope (MST) and small size telescope (SST). A LST prototype is currently being built and will be installed at the Observatorio Roque de los Muchachos, island of La Palma, Canary islands, Spain. The readout system for the LST prototype has been designed and around 300 readout boards will be produced in the coming months. In this note we describe an automated quality control system able to measure basic performance parameters and quickly identify faulty boards.

Development of a thinned back-illuminated CMOS active pixel sensor for extreme ultraviolet spectroscopy and imaging in space science

International Nuclear Information System (INIS)

Waltham, N.R.; Prydderch, M.; Mapson-Menard, H.; Pool, P.; Harris, A.

2007-01-01

We describe our programme to develop a large-format, science-grade, monolithic CMOS active pixel sensor for future space science missions, and in particular an extreme ultraviolet (EUV) spectrograph for solar physics studies on ESA's Solar Orbiter. Our route to EUV sensitivity relies on adapting the back-thinning and rear-illumination techniques first developed for CCD sensors. Our first large-format sensor consists of 4kx3k 5 μm pixels fabricated on a 0.25 μm CMOS imager process. Wafer samples of these sensors have been thinned by e2v technologies with the aim of obtaining good sensitivity at EUV wavelengths. We present results from both front- and back-illuminated versions of this sensor. We also present our plans to develop a new sensor of 2kx2k 10 μm pixels, which will be fabricated on a 0.35 μm CMOS process. In progress towards this goal, we have designed a test-structure consisting of six arrays of 512x512 10 μm pixels. Each of the arrays has been given a different pixel design to allow verification of our models, and our progress towards optimizing a design for minimal system readout noise and maximum dynamic range. These sensors will also be back-thinned for characterization at EUV wavelengths

Applications of pixellated GaAs X-ray detectors in a synchrotron radiation beam

CERN Document Server

Watt, J; Campbell, M; Mathieson, K; Mikulec, B; O'Shea, V; Passmore, M S; Schwarz, C; Smith, K M; Whitehill, C

2001-01-01

Hybrid semiconductor pixel detectors are being investigated as imaging devices for radiography and synchrotron radiation beam applications. Based on previous work in the CERN RD19 and the UK IMPACT collaborations, a photon counting GaAs pixel detector (PCD) has been used in an X-ray powder diffraction experiment. The device consists of a 200 mu m thick SI-LEC GaAs detector patterned in a 64*64 array of 170 mu m pitch square pixels, bump-bonded to readout electronics operating in single photon counting mode. Intensity peaks in the powder diffraction pattern of KNbO/sub 3/ have been resolved and compared with results using the standard scintillator, and a PCD predecessor (the Omega 3). The PCD shows improved speed, dynamic range, 2-D information and comparable spatial resolution to the standard scintillator based systems. It also overcomes the severe dead time limitations of the Omega 3 by using a shutter based acquisition mode. A brief demonstration of the possibilities of the system for dental radiography and...

Demonstration of Time Domain Multiplexed Readout for Magnetically Coupled Calorimeters

Science.gov (United States)

Porst, J.-P.; Adams, J. S.; Balvin, M.; Bandler, S.; Beyer, J.; Busch, S. E.; Drung, D.; Seidel, G. M.; Smith, S. J.; Stevenson, T. R.

2012-01-01

Magnetically coupled calorimeters (MCC) have extremely high potential for x-ray applications due to the inherent high energy resolution capability and being non-dissipative. Although very high energy-resolution has been demonstrated, until now there has been no demonstration of multiplexed read-out. We report on the first realization of a time domain multiplexed (TDM) read-out. While this has many similarities with TDM of transition-edge-sensors (TES), for MGGs the energy resolution is limited by the SQUID read-out noise and requires the well established scheme to be altered in order to minimize degradation due to noise aliasing effects. In cur approach, each pixel is read out by a single first stage SQUID (SQ1) that is operated in open loop. The outputs of the SQ1 s are low-pass filtered with an array of low cross-talk inductors, then fed into a single-stage SQUID TD multiplexer. The multiplexer is addressed from room temperature and read out through a single amplifier channel. We present results achieved with a new detector platform. Noise performance is presented and compared to expectations. We have demonstrated multiplexed X-ray spectroscopy at 5.9keV with delta_FWHM=10eV. In an optimized setup, we show it is possible to multiplex 32 detectors without significantly degrading the Intrinsic detector resolution.

14C autoradiography with an energy-sensitive silicon pixel detector.

Science.gov (United States)

Esposito, M; Mettivier, G; Russo, P

2011-04-07

The first performance tests are presented of a carbon-14 ((14)C) beta-particle digital autoradiography system with an energy-sensitive hybrid silicon pixel detector based on the Timepix readout circuit. Timepix was developed by the Medipix2 Collaboration and it is similar to the photon-counting Medipix2 circuit, except for an added time-based synchronization logic which allows derivation of energy information from the time-over-threshold signal. This feature permits direct energy measurements in each pixel of the detector array. Timepix is bump-bonded to a 300 µm thick silicon detector with 256 × 256 pixels of 55 µm pitch. Since an energetic beta-particle could release its kinetic energy in more than one detector pixel as it slows down in the semiconductor detector, an off-line image analysis procedure was adopted in which the single-particle cluster of hit pixels is recognized; its total energy is calculated and the position of interaction on the detector surface is attributed to the centre of the charge cluster. Measurements reported are detector sensitivity, (4.11 ± 0.03) × 10(-3) cps mm(-2) kBq(-1) g, background level, (3.59 ± 0.01) × 10(-5) cps mm(-2), and minimum detectable activity, 0.0077 Bq. The spatial resolution is 76.9 µm full-width at half-maximum. These figures are compared with several digital imaging detectors for (14)C beta-particle digital autoradiography.

High-efficiency dynamic routing architecture for the readout of single photon avalanche diode arrays in time-correlated measurements

Science.gov (United States)

Cominelli, A.; Acconcia, G.; Peronio, P.; Rech, I.; Ghioni, M.

2017-05-01

transfer rate towards the elaboration unit. We developed a novel readout architecture, starting from a completely different perspective: considering the maximum data rate we can manage with a PC, a limited set of conversion data is selected and transferred to the elaboration unit during each excitation period, in order to take full advantage of the bus bandwidth toward the PC. In particular, we introduce a smart routing logic, able to dynamically connect a large number of SPAD detectors to a limited set of high-performance external acquisition chains, paving the way for a more efficient use of resources and allowing us to effectively break the tradeoff between integration and performance, which affects the solutions proposed so far. The routing electronic features a pixelated architecture, while 3D-stacking techniques are exploited to connect each SPAD to its dedicated electronic, leading to a minimization of the overall number of interconnections crossing the integrated system, which is one of the main issues in high-density arrays.

Layout techniques to enhance the radiation tolerance of standard CMOS technologies demonstrated on a pixel detector readout chip

CERN Document Server

Snoeys, W; Burns, M; Campbell, M; Cantatore, E; Carrer, N; Casagrande, L; Cavagnoli, A; Dachs, C; Di Liberto, S; Formenti, F; Giraldo, A; Heijne, Erik H M; Jarron, Pierre; Letheren, M F; Marchioro, A; Martinengo, P; Meddi, F; Mikulec, B; Morando, M; Morel, M; Noah, E; Paccagnella, A; Ropotar, I; Saladino, S; Sansen, Willy; Santopietro, F; Scarlassara, F; Segato, G F; Signe, P M; Soramel, F; Vannucci, Luigi; Vleugels, K

2000-01-01

A new pixel readout prototype has been developed at CERN for high- energy physics applications. This full mixed mode circuit has been implemented in a commercial 0.5 mu m CMOS technology. Its radiation tolerance has been enhanced by designing all NMOS transistors in enclosed geometry and introducing guardrings wherever necessary. The technique is explained and its effectiveness demonstrated on various irradiation measurements on individual transistors and on the prototype. Circuit performance started to degrade only after a total dose of 600 krad-1.7 Mrad depending on the type of radiation. 10 keV X-rays, /sup 60/Co gamma-rays, 6.5 MeV protons, and minimum ionizing particles were used. Implications of this layout approach on the circuit design and perspectives for even deeper submicron technologies are discussed. (20 refs).

3D, Flash, Induced Current Readout for Silicon Sensors

Energy Technology Data Exchange (ETDEWEB)

Parker, Sherwood I. [Univ. of Hawaii, Honolulu, HI (United States)

2014-06-07

A new method for silicon microstrip and pixel detector readout using (1) 65 nm-technology current amplifers which can, for the first time with silicon microstrop and pixel detectors, have response times far shorter than the charge collection time (2) 3D trench electrodes large enough to subtend a reasonable solid angle at most track locations and so have adequate sensitivity over a substantial volume of pixel, (3) induced signals in addition to, or in place of, collected charge

X-ray imaging using amorphous selenium: a photoinduced discharge readout method for digital mammography.

Science.gov (United States)

Rowlands, J A; Hunter, D M; Araj, N

1991-01-01

A new digital image readout method for electrostatic charge images on photoconductive plates is described. The method can be used to read out images on selenium plates similar to those used in xeromammography. The readout method, called the air-gap photoinduced discharge method (PID), discharges the latent image pixel by pixel and measures the charge. The PID readout method, like electrometer methods, is linear. However, the PID method permits much better resolution than scanning electrometers while maintaining quantum limited performance at high radiation exposure levels. Thus the air-gap PID method appears to be uniquely superior for high-resolution digital imaging tasks such as mammography.

ISPA (imaging silicon pixel array) experiment

CERN Multimedia

Patrice Loïez

2002-01-01

The bump-bonded silicon pixel detector, developed at CERN by the EP-MIC group, is shown here in its ceramic carrier. Both represent the ISPA-tube anode. The chip features between 1024 (called OMEGA-1) and 8196 (ALICE-1) active pixels.

The Upgraded Pixel Detector of the ATLAS Experiment for Run-2

CERN Document Server

Ferrere, Didier; The ATLAS collaboration

2016-01-01

Run-2 of the LHC is providing new challenges to track and vertex reconstruction with higher energies, denser jets and higher rates. Therefore the ATLAS experiment has constructed the first 4-layer Pixel detector in HEP, installing a new Pixel layer, also called Insertable B-Layer (IBL). IBL is a fourth layer of pixel detectors, and has been installed in May 2014 at a radius of 3.3 cm between the existing Pixel Detector and a new smaller radius beam-pipe. The new detector, built to cope with high radiation and expected occupancy, is the first large scale application of 3D detectors and CMOS 130nm technology. In addition the Pixel detector was refurbished with a new service quarter panel to recover about 3% of defective modules lost during run-1 and a new optical readout system to readout the data at higher speed while reducing the occupancy when running with increased luminosity. The commissioning and performance of the 4-layer Pixel Detector, in particular the IBL, will be presented, using collision data.

Photon Counting Energy Dispersive Detector Arrays for X-ray Imaging.

Science.gov (United States)

Iwanczyk, Jan S; Nygård, Einar; Meirav, Oded; Arenson, Jerry; Barber, William C; Hartsough, Neal E; Malakhov, Nail; Wessel, Jan C

2009-01-01

The development of an innovative detector technology for photon-counting in X-ray imaging is reported. This new generation of detectors, based on pixellated cadmium telluride (CdTe) and cadmium zinc telluride (CZT) detector arrays electrically connected to application specific integrated circuits (ASICs) for readout, will produce fast and highly efficient photon-counting and energy-dispersive X-ray imaging. There are a number of applications that can greatly benefit from these novel imagers including mammography, planar radiography, and computed tomography (CT). Systems based on this new detector technology can provide compositional analysis of tissue through spectroscopic X-ray imaging, significantly improve overall image quality, and may significantly reduce X-ray dose to the patient. A very high X-ray flux is utilized in many of these applications. For example, CT scanners can produce ~100 Mphotons/mm(2)/s in the unattenuated beam. High flux is required in order to collect sufficient photon statistics in the measurement of the transmitted flux (attenuated beam) during the very short time frame of a CT scan. This high count rate combined with a need for high detection efficiency requires the development of detector structures that can provide a response signal much faster than the transit time of carriers over the whole detector thickness. We have developed CdTe and CZT detector array structures which are 3 mm thick with 16×16 pixels and a 1 mm pixel pitch. These structures, in the two different implementations presented here, utilize either a small pixel effect or a drift phenomenon. An energy resolution of 4.75% at 122 keV has been obtained with a 30 ns peaking time using discrete electronics and a (57)Co source. An output rate of 6×10(6) counts per second per individual pixel has been obtained with our ASIC readout electronics and a clinical CT X-ray tube. Additionally, the first clinical CT images, taken with several of our prototype photon-counting and

Dead pixel replacement in LWIR microgrid polarimeters.

Science.gov (United States)

Ratliff, Bradley M; Tyo, J Scott; Boger, James K; Black, Wiley T; Bowers, David L; Fetrow, Matthew P

2007-06-11

LWIR imaging arrays are often affected by nonresponsive pixels, or "dead pixels." These dead pixels can severely degrade the quality of imagery and often have to be replaced before subsequent image processing and display of the imagery data. For LWIR arrays that are integrated with arrays of micropolarizers, the problem of dead pixels is amplified. Conventional dead pixel replacement (DPR) strategies cannot be employed since neighboring pixels are of different polarizations. In this paper we present two DPR schemes. The first is a modified nearest-neighbor replacement method. The second is a method based on redundancy in the polarization measurements.We find that the redundancy-based DPR scheme provides an order-of-magnitude better performance for typical LWIR polarimetric data.

Status and perspectives of pixel sensors based on 3D vertical integration

CERN Document Server

Re, V

2014-01-01

This paper reviews the most recent developments of 3D integration in the field of silicon pixel sensors and readout integrated circuits. This technology may address the needs of future high energy physics and photon science experiments by increasing the electronic functional density in small pixel readout cells and by stacking various device layers based on different technologies, each optimized for a different function. Current efforts are aimed at improving the performance of both hybrid pixel detectors and of CMOS sensors. The status of these activities is discussed here, taking into account experimental results on 3D devices developed in the frame of the 3D-IC consortium. The paper also provides an overview of the ideas that are being currently devised for novel 3D vertically integrated pixel sensors.

Two-dimensional diced scintillator array for innovative, fine-resolution gamma camera

International Nuclear Information System (INIS)

Fujita, T.; Kataoka, J.; Nishiyama, T.; Ohsuka, S.; Nakamura, S.; Yamamoto, S.

2014-01-01

We are developing a technique to fabricate fine spatial resolution (FWHM<0.5mm) and cost-effective photon counting detectors, by using silicon photomultipliers (SiPMs) coupled with a finely pixelated scintillator plate. Unlike traditional X-ray imagers that use a micro-columnar CsI(Tl) plate, we can pixelate various scintillation crystal plates more than 1 mm thick, and easily develop large-area, fine-pitch scintillator arrays with high precision. Coupling a fine pitch scintillator array with a SiPM array results in a compact, fast-response detector that is ideal for X-ray, gamma-ray, and charged particle detection as used in autoradiography, gamma cameras, and photon counting CTs. As the first step, we fabricated a 2-D, cerium-doped Gd 3 Al 2 Ga 3 O 12 (Ce:GAGG) scintillator array of 0.25 mm pitch, by using a dicing saw to cut micro-grooves 50μm wide into a 1.0 mm thick Ce:GAGG plate. The scintillator plate is optically coupled with a 3.0×3.0mm pixel 4×4 SiPM array and read-out via the resistive charge-division network. Even when using this simple system as a gamma camera, we obtained excellent spatial resolution of 0.48 mm (FWHM) for 122 keV gamma-rays. We will present our plans to further improve the signal-to-noise ratio in the image, and also discuss a variety of possible applications in the near future

An investigation of signal performance enhancements achieved through innovative pixel design across several generations of indirect detection, active matrix, flat-panel arrays

International Nuclear Information System (INIS)

Antonuk, Larry E.; Zhao Qihua; El-Mohri, Youcef; Du Hong; Wang Yi; Street, Robert A.; Ho, Jackson; Weisfield, Richard; Yao, William

2009-01-01

Active matrix flat-panel imager (AMFPI) technology is being employed for an increasing variety of imaging applications. An important element in the adoption of this technology has been significant ongoing improvements in optical signal collection achieved through innovations in indirect detection array pixel design. Such improvements have a particularly beneficial effect on performance in applications involving low exposures and/or high spatial frequencies, where detective quantum efficiency is strongly reduced due to the relatively high level of additive electronic noise compared to signal levels of AMFPI devices. In this article, an examination of various signal properties, as determined through measurements and calculations related to novel array designs, is reported in the context of the evolution of AMFPI pixel design. For these studies, dark, optical, and radiation signal measurements were performed on prototype imagers incorporating a variety of increasingly sophisticated array designs, with pixel pitches ranging from 75 to 127 μm. For each design, detailed measurements of fundamental pixel-level properties conducted under radiographic and fluoroscopic operating conditions are reported and the results are compared. A series of 127 μm pitch arrays employing discrete photodiodes culminated in a novel design providing an optical fill factor of ∼80% (thereby assuring improved x-ray sensitivity), and demonstrating low dark current, very low charge trapping and charge release, and a large range of linear signal response. In two of the designs having 75 and 90 μm pitches, a novel continuous photodiode structure was found to provide fill factors that approach the theoretical maximum of 100%. Both sets of novel designs achieved large fill factors by employing architectures in which some, or all of the photodiode structure was elevated above the plane of the pixel addressing transistor. Generally, enhancement of the fill factor in either discrete or continuous

Mechanical Design and Development of TES Bolometer Detector Arrays for the Advanced ACTPol Experiment

Science.gov (United States)

Ward, Jonathan T.; Austermann, Jason; Beall, James A.; Choi, Steve K.; Crowley, Kevin T.; Devlin, Mark J.; Duff, Shannon M.; Gallardo, Patricio M.; Henderson, Shawn W.; Ho, Shuay-Pwu Patty;

Low-Light-Level InGaAs focal plane arrays with and without illumination

Science.gov (United States)

Macdougal, Michael; Geske, Jon; Wang, Chad; Follman, David

2010-04-01

Short wavelength IR imaging using InGaAs-based FPAs is shown. Aerius demonstrates low dark current in InGaAs detector arrays with 15 μm pixel pitch. The same material is mated with a 640x 512 CTIA-based readout integrated circuit. The resulting FPA is capable of imaging photon fluxes with wavelengths between 1 and 1.6 microns at low light levels. The mean dark current density on the FPAs is extremely low at 0.64 nA/cm2 at 10°C. Noise due to the readout can be reduced from 95 to 57 electrons by using off-chip correlated double sampling (CDS). In addition, Aerius has developed laser arrays that provide flat illumination in scenes that are normally light-starved. The illuminators have 40% wall-plug efficiency and provide speckle-free illumination, provide artifact-free imagery versus conventional laser illuminators.

The Level 0 Pixel Trigger system for the ALICE experiment

International Nuclear Information System (INIS)

Rinella, G Aglieri; Kluge, A; Krivda, M

2007-01-01

The ALICE Silicon Pixel Detector contains 1200 readout chips. Fast-OR signals indicate the presence of at least one hit in the 8192 pixel matrix of each chip. The 1200 bits are transmitted every 100 ns on 120 data readout optical links using the G-Link protocol. The Pixel Trigger System extracts and processes them to deliver an input signal to the Level 0 trigger processor targeting a latency of 800 ns. The system is compact, modular and based on FPGA devices. The architecture allows the user to define and implement various trigger algorithms. The system uses advanced 12-channel parallel optical fiber modules operating at 1310 nm as optical receivers and 12 deserializer chips closely packed in small area receiver boards. Alternative solutions with multi-channel G-Link deserializers implemented directly in programmable hardware devices were investigated. The design of the system and the progress of the ALICE Pixel Trigger project are described in this paper

Status of the CMS Phase 1 Pixel Upgrade

CERN Document Server

Mattig, Stefan

2014-01-01

The silicon pixel detector is the innermost component of the CMS tracking system, providing high precision space point measurements of charged particle trajectories. Before 2018 the instantaneous luminosity of the LHC is expected to reach 2\\,$\\times 10^{34}\\,{\\rm cm^{-2}s^{-1}}$, which will significantly increase the number of interactions per bunch crossing. The current pixel detector of CMS was not designed to work efficiently in such a high occupancy environment and will be degraded by substantial data-loss introduced by buffer filling in the analog Read-Out Chip (ROC) and effects of radiation damage in the sensors, built up over the operational period. To maintain a high tracking efficiency, CMS has planned to replace the current pixel system during ``Phase 1'' (2016/17) by a new lightweight detector, equipped with an additional 4th layer in the barrel, and one additional forward/backward disk. A new digital ROC has been designed, with increased buffers to minimize data-loss, and a digital read-out protoc...

Characterization of an x-ray hybrid CMOS detector with low interpixel capacitive crosstalk

OpenAIRE

Griffith, Christopher V.; Bongiorno, Stephen D.; Burrows, David N.; Falcone, Abraham D.; Prieskorn, Zachary R.

2012-01-01

We present the results of x-ray measurements on a hybrid CMOS detector that uses a H2RG ROIC and a unique bonding structure. The silicon absorber array has a 36{\\mu}m pixel size, and the readout array has a pitch of 18{\\mu}m; but only one readout circuit line is bonded to each 36x36{\\mu}m absorber pixel. This unique bonding structure gives the readout an effective pitch of 36{\\mu}m. We find the increased pitch between readout bonds significantly reduces the interpixel capacitance of the CMOS ...

First MCM-D modules for the b-physics layer of the ATLAS Pixel Detector

CERN Document Server

Basken, O; Ehrmann, O; Gerlach, P; Grah, C; Gregor, I M; Linder, C; Meuser, S; Richardson, J; Topper, M; Wolf, J

2000-01-01

The innermost layer (b-physics layer) of the ATLAS Pixel Detector will consist of modules based on MCM-D technology. Such a module consists of a sensor tile with an active area of 16.4 mm*60.4 mm, 16 read out ICs, each serving 24* 160 pixel unit cells, a module controller chip (MCC), an optical transceiver and the local signal interconnection and power distribution busses. We show a prototype of such a module with additional test pads on both sides. The outer dimensions of the final module will be 21.4 mm*67.8 mm. The extremely high wiring density, which is necessary to interconnect the read-out chips, was achieved using a thin film copper/photo-BCB process on the pixel array. The bumping of the read out chips was done using electroplating PbSn. All dice are then attached by flip-chip assembly to the sensor diodes and the local busses. The focus of this paper is the description of the first results of such MCM-D-type modules. (11 refs).

Heavy Ion Transient Characterization of a Photobit Hardened-by-Design Active Pixel Sensor Array

Science.gov (United States)

Marshall, Paul W.; Byers, Wheaton B.; Conger, Christopher; Eid, El-Sayed; Gee, George; Jones, Michael R.; Marshall, Cheryl J.; Reed, Robert; Pickel, Jim; Kniffin, Scott

2002-01-01

This paper presents heavy ion data on the single event transient (SET) response of a Photobit active pixel sensor (APS) four quadrant test chip with different radiation tolerant designs in a standard 0.35 micron CMOS process. The physical design techniques of enclosed geometry and P-channel guard rings are used to design the four N-type active photodiode pixels as described in a previous paper. Argon transient measurements on the 256 x 256 chip array as a function of incident angle show a significant variation in the amount of charge collected as well as the charge spreading dependent on the pixel type. The results are correlated with processing and design information provided by Photobit. In addition, there is a large degree of statistical variability between individual ion strikes. No latch-up is observed up to an LET of 106 MeV/mg/sq cm.

Development of the Continuous Acquisition Pixel (CAP) sensor for high luminosity lepton colliders

International Nuclear Information System (INIS)

Varner, G.; Aihara, H.; Barbero, M.; Bozek, A.; Browder, T.; Hazumi, M.; Kennedy, J.; Martin, E.; Mueller, J.; Olsen, S.; Palka, H.; Rosen, M.; Ruckman, L.; Stanic, S.; Trabelsi, K.; Tsuboyama, T.; Uchida, K.; Yang, Q.; Yarema, R.

2006-01-01

A future higher luminosity B-factory detector and concept study detectors for the proposed International Linear Collider require precision vertex reconstruction while coping with high track densities and radiation exposures. Compared with current silicon strip and hybrid pixels, a significant reduction in the overall detector material thickness is needed to achieve the desired vertex resolution. Considerable progress in the development of thin CMOS-based Monolithic Active Pixel Sensors (MAPS) in recent years makes them a viable technology option and feasibility studies are being actively pursued. The most serious concerns are their radiation hardness and their readout speed. To address these, several prototypes denoted as the Continuous Acquisition Pixel (CAP) sensors have been developed and tested. The latest of the CAP sensor prototypes is CAP3, designed in the TSMC 0.25μm process with a 5-deep Correlated Double Sample (CDS) pair pipeline in each pixel. A setup with several CAP3 sensors is under evaluation to assess the performance of a full-scale pixel readout system running at realistic readout speed. Given the similarity in the occupancy numbers and hit throughput requirements, per unit area, between a Belle vertex detector upgradation and the requirements for a future ILC pixel detector, this effort can be considered a small-scale functioning prototype for such a future system. The results and plans for the next stages of R and D towards a full Belle Pixel Vertex Detector (PVD) are presented

CMOS monolithic active pixel sensors for high energy physics

Energy Technology Data Exchange (ETDEWEB)

Snoeys, W., E-mail: walter.snoeys@cern.ch

2014-11-21

Monolithic pixel detectors integrating sensor matrix and readout in one piece of silicon are only now starting to make their way into high energy physics. Two major requirements are radiation tolerance and low power consumption. For the most extreme radiation levels, signal charge has to be collected by drift from a depletion layer onto a designated collection electrode without losing the signal charge elsewhere in the in-pixel circuit. Low power consumption requires an optimization of Q/C, the ratio of the collected signal charge over the input capacitance [1]. Some solutions to combine sufficient Q/C and collection by drift require exotic fabrication steps. More conventional solutions up to now require a simple in-pixel readout circuit. Both high voltage CMOS technologies and Monolithic Active Pixel Sensors (MAPS) technologies with high resistivity epitaxial layers offer high voltage diodes. The choice between the two is not fundamental but more a question of how much depletion can be reached and also of availability and cost. This paper tries to give an overview.

Qualification Procedures of the CMS Pixel Barrel Modules

CERN Document Server

Starodumov, A; Horisberger, R.; Kastli, H.Chr.; Kotlinski, D.; Langenegger, U.; Meier, B.; Rohe, T.; Trueb, P.

2006-01-01

The CMS pixel barrel system will consist of three layers built of about 800 modules. One module contains 66560 readout channels and the full pixel barrel system about 48 million channels. It is mandatory to test each channel for functionality, noise level, trimming mechanism, and bump bonding quality. Different methods to determine the bump bonding yield with electrical measurements have been developed. Measurements of several operational parameters are also included in the qualification procedure. Among them are pixel noise, gains and pedestals. Test and qualification procedures of the pixel barrel modules are described and some results are presented.

Advances in Small Pixel TES-Based X-Ray Microcalorimeter Arrays for Solar Physics and Astrophysics

Science.gov (United States)

Bandler, S. R.; Adams, J. S.; Bailey, C. N.; Busch, S. E.; Chervenak, J. A.; Eckart, M. E.; Ewin, A. E.; Finkbeiner, F. M.; Kelley, R. L.; Kelly, D. P.;

Development and Characterization of Diamond and 3D-Silicon Pixel Detectors with ATLAS-Pixel Readout Electronics

CERN Document Server

Mathes, Markus

2008-01-01

Hybrid pixel detectors are used for particle tracking in the innermost layers of current high energy experiments like ATLAS. After the proposed luminosity upgrade of the LHC, they will have to survive very high radiation fluences of up to 10^16 particles per cm^2 per life time. New sensor concepts and materials are required, which promise to be more radiation tolerant than the currently used planar silicon sensors. Most prominent candidates are so-called 3D-silicon and single crystal or poly-crystalline diamond sensors. Using the ATLAS pixel electronics different detector prototypes with a pixel geometry of 400 × 50 um^2 have been built. In particular three devices have been studied in detail: a 3D-silicon and a single crystal diamond detector with an active area of about 1 cm^2 and a poly-crystalline diamond detector of the same size as a current ATLAS pixel detector module (2 × 6 cm^2). To characterize the devices regarding their particle detection efficiency and spatial resolution, the charge collection ...

Microwave Readout Techniques for Very Large Arrays of Nuclear Sensors

Energy Technology Data Exchange (ETDEWEB)

Ullom, Joel [Univ. of Colorado, Boulder, CO (United States). Dept. of Physics

2017-05-17

During this project, we transformed the use of microwave readout techniques for nuclear sensors from a speculative idea to reality. The core of the project consisted of the development of a set of microwave electronics able to generate and process large numbers of microwave tones. The tones can be used to probe a circuit containing a series of electrical resonances whose frequency locations and widths depend on the state of a network of sensors, with one sensor per resonance. The amplitude and phase of the tones emerging from the circuit are processed by the same electronics and are reduced to the sensor signals after two demodulation steps. This approach allows a large number of sensors to be interrogated using a single pair of coaxial cables. We successfully developed hardware, firmware, and software to complete a scalable implementation of these microwave control electronics and demonstrated their use in two areas. First, we showed that the electronics can be used at room temperature to read out a network of diverse sensor types relevant to safeguards or process monitoring. Second, we showed that the electronics can be used to measure large numbers of ultrasensitive cryogenic sensors such as gamma-ray microcalorimeters. In particular, we demonstrated the undegraded readout of up to 128 channels and established a path to even higher multiplexing factors. These results have transformed the prospects for gamma-ray spectrometers based on cryogenic microcalorimeter arrays by enabling spectrometers whose collecting areas and count rates can be competitive with high purity germanium but with 10x better spectral resolution.

Review of results for the NA62 gigatracker read-out prototype

Science.gov (United States)

Martin, E.; Aglieri Rinella, G.; Carassiti, V.; Ceccucci, A.; Cortina Gil, E.; Cotta Ramusino, A.; Dellacasa, G.; Fiorini, M.; Garbolino, S.; Jarron, P.; Kaplon, J.; Kluge, A.; Marchetto, F.; Mapelli, A.; Mazza, G.; Morel, M.; Noy, M.; Nuessle, G.; Petagna, P.; Petrucci, F.; Perktold, L.; Riedler, P.; Rivetti, A.; Statera, M.; Velghe, B.

2012-03-01

The Gigatracker (GTK) is a hybrid silicon pixel detector developed for NA62, an experiment studying ultra-rare kaon decays at the CERN SPS. The main characteristics are a time-tagging resoluion of 150ps, with low material budget per station (0.5% X0) and a fluence comparable to the one expected for the inner trackers of LHC detectors in 10 years of operation. To compensate the time-walk, two read-out architectures have been designed and produced. The first architecture is based on a Constant Fraction Discriminator (CFD) followed by an on-pixel Time-to-Digital-Converter (TDC). The second architecture is based on a on-pixel group shared TDC. The GTK system developments are described: the integration steps (assembly and cooling) and the results obtained from the prototypes fabricated for the two read-out architectures.

Pixel Read-Out Architectures for the NA62 GigaTracker

CERN Document Server

Dellacasa, G

2008-01-01

Beam particles in NA62 experiment are measured with a Si-pixel sensor having a size of 300 μm x 300 μm and a time resolution of 150 ps (rms). To meet the timing requirement an adequate strategy to compensate the discriminator time-walk must be implemented and an R&D effort investigating two different options is ongoing. In this presentation we describe the two different approaches. One is based on the use of a constant-fraction discriminator followed by an on-pixel TDC. The other one is based on the use of a Time-over-Threshold circuit followed by a TDC shared by a group of pixels. The global architectures of both the front-end ASIC will be discussed.

Finite-element simulations of coupling capacitances in capacitively coupled pixel detectors

CERN Document Server

AUTHOR|(SzGeCERN)755510

2017-01-01

Capacitively coupled hybrid silicon pixel-detector assemblies are under study for the vertex detector at the proposed future CLIC linear electron-positron collider. The assemblies consist of active CCPDv3 sensors, with 25 μm pixel pitch implemented in a 180 nm High- Voltage CMOS process, which are glued to the CLICpix readout ASIC, with the same pixel pitch and processed in a commercial 65 nm CMOS technology. The signal created in the silicon bulk of the active sensors passes a two-stage amplifier, in each pixel, and gets transferred as a voltage pulse to metal pads facing the readout chip (ROC). The coupling of the signal to the metal pads on the ROC side proceeds through the capacitors formed between the two chips by a thin layer of epoxy glue. The coupling strength and the amount of unwanted cross coupling to neighbouring pixels depends critically on the uniformity of the glue layer, its thickness and on the alignment precision during the flip-chip assembly process. Finite-element calculations of the coup...

Study of FPGA and GPU based pixel calibration for ATLAS IBL

CERN Document Server

Dopke, J; The ATLAS collaboration; Flick, T; Gabrielli, A; Grosse-Knetter, J; Krieger, N; Kugel, A; Polini, A; Schroer, N

2010-01-01

The insertable B-layer (IBL) is a new stage of the ATLAS pixel detector to be installed around 2014. 12 million pixel are attached to new FE-I4 readout ASICs, each controlling 26680 pixel. Compared to the existing FE-I3 based detector the new system features higher readout speed of 160Mbit/s per ASIC and simplified control. For calibration defined charges are applied to all pixels and the resulting time-over-threshold values are evaluated. In the present system multiple sets of two custom VME cards which employ a combination of FPGA and DSP technology are used for I/O interfacing, formatting and processing. The execution time of 51s to perform a threshold scan on a FE-I3 module of 46080 pixel is composed of 8s control, 29s transfer, 7.5s histogramming and 7s analysis. Extrapolating to FE-I4 the times per module of 53760 pixels are 12ms, 5.8s, 9.4s and 8.3s, a total of 23.5s. We present a proposal for a novel approach to the dominant tasks for FE-I4: histogramming and ananlysis. An FPGA-based histogramming uni...

Development of a Crosstalk Suppression Algorithm for KID Readout

Science.gov (United States)

Lee, Kyungmin; Ishitsuka, H.; Oguri, S.; Suzuki, J.; Tajima, O.; Tomita, N.; Won, Eunil; Yoshida, M.

2018-06-01

The GroundBIRD telescope aims to detect B-mode polarization of the cosmic microwave background radiation using the kinetic inductance detector array as a polarimeter. For the readout of the signal from detector array, we have developed a frequency division multiplexing readout system based on a digital down converter method. These techniques in general have the leakage problems caused by the crosstalks. The window function was applied in the field programmable gate arrays to mitigate the effect of these problems and tested it in algorithm level.

TID-dependent current measurements of IBL readout chips

Energy Technology Data Exchange (ETDEWEB)

Dette, Karola [TU Dortmund, Experimentelle Physik IV (Germany); CERN (Switzerland); Collaboration: ATLAS Pixel-Collaboration

2016-07-01

The ATLAS detector consists of several subsystems with a hybrid pixel detector as the innermost component of the tracking system. The pixel detector has been composed of three layers of silicon sensor assemblies during the first data taking run of the LHC and has been upgraded with a new 4th layer, the so-called Insertable B-Layer (IBL), in summer 2014. Each silicon sensor of the IBL is connected to a Front End readout chip (FE-I4) via bump bonds. During the first year of data taking an increase of the LV current produced by the readout chips was observed. This increase could be traced back to radiation damage inside the silicon. The dependence of the current on the Total Ionizing Dose (TID) and temperature has been tested with X-ray irradiations and will be presented in this talk.

Active pixel sensor array as a detector for electron microscopy.

Science.gov (United States)

Milazzo, Anna-Clare; Leblanc, Philippe; Duttweiler, Fred; Jin, Liang; Bouwer, James C; Peltier, Steve; Ellisman, Mark; Bieser, Fred; Matis, Howard S; Wieman, Howard; Denes, Peter; Kleinfelder, Stuart; Xuong, Nguyen-Huu

2005-09-01

A new high-resolution recording device for transmission electron microscopy (TEM) is urgently needed. Neither film nor CCD cameras are systems that allow for efficient 3-D high-resolution particle reconstruction. We tested an active pixel sensor (APS) array as a replacement device at 200, 300, and 400 keV using a JEOL JEM-2000 FX II and a JEM-4000 EX electron microscope. For this experiment, we used an APS prototype with an area of 64 x 64 pixels of 20 microm x 20 microm pixel pitch. Single-electron events were measured by using very low beam intensity. The histogram of the incident electron energy deposited in the sensor shows a Landau distribution at low energies, as well as unexpected events at higher absorbed energies. After careful study, we concluded that backscattering in the silicon substrate and re-entering the sensitive epitaxial layer a second time with much lower speed caused the unexpected events. Exhaustive simulation experiments confirmed the existence of these back-scattered electrons. For the APS to be usable, the back-scattered electron events must be eliminated, perhaps by thinning the substrate to less than 30 microm. By using experimental data taken with an APS chip with a standard silicon substrate (300 microm) and adjusting the results to take into account the effect of a thinned silicon substrate (30 microm), we found an estimate of the signal-to-noise ratio for a back-thinned detector in the energy range of 200-400 keV was about 10:1 and an estimate for the spatial resolution was about 10 microm.

Numerical simulation of the modulation transfer function (MTF) in infrared focal plane arrays: simulation methodology and MTF optimization

Science.gov (United States)

Schuster, J.

2018-02-01

Military requirements demand both single and dual-color infrared (IR) imaging systems with both high resolution and sharp contrast. To quantify the performance of these imaging systems, a key measure of performance, the modulation transfer function (MTF), describes how well an optical system reproduces an objects contrast in the image plane at different spatial frequencies. At the center of an IR imaging system is the focal plane array (FPA). IR FPAs are hybrid structures consisting of a semiconductor detector pixel array, typically fabricated from HgCdTe, InGaAs or III-V superlattice materials, hybridized with heat/pressure to a silicon read-out integrated circuit (ROIC) with indium bumps on each pixel providing the mechanical and electrical connection. Due to the growing sophistication of the pixel arrays in these FPAs, sophisticated modeling techniques are required to predict, understand, and benchmark the pixel array MTF that contributes to the total imaging system MTF. To model the pixel array MTF, computationally exhaustive 2D and 3D numerical simulation approaches are required to correctly account for complex architectures and effects such as lateral diffusion from the pixel corners. It is paramount to accurately model the lateral di_usion (pixel crosstalk) as it can become the dominant mechanism limiting the detector MTF if not properly mitigated. Once the detector MTF has been simulated, it is directly decomposed into its constituent contributions to reveal exactly what is limiting the total detector MTF, providing a path for optimization. An overview of the MTF will be given and the simulation approach will be discussed in detail, along with how different simulation parameters effect the MTF calculation. Finally, MTF optimization strategies (crosstalk mitigation) will be discussed.

Research and Development of Monolithic Active Pixel Sensors for the Detection of the Elementary Particles; Recherche et developpement de capteurs actifs monolithiques CMOS pour la detection de particules elementaires

Energy Technology Data Exchange (ETDEWEB)

Li, Y

2007-09-15

In order to develop high spatial resolution and readout speed vertex detectors for the future International Linear Collider (ILC), fast CMOS Monolithic Active Pixel Sensors (MAPS) are studied on this work. Two prototypes of MAPS, MIMOSA 8 and MIMOSA 16, based on the same micro-electronic architecture were developed in CMOS processes with different thickness of epitaxial layer. The size of pixel matrix is 32 x 128: 8 columns of the pixel array are readout directly with analog outputs and the other 24 columns are connected to the column level auto-zero discriminators. The Correlated Double Sampling (CDS) structures are successfully implemented inside pixel and discriminator. The photo diode type pixels with different diode sizes are used in these prototypes. With a {sup 55}Fe X-ray radioactive source, the important parameters, such as Temporal Noise, Fixed Pattern Noise (FPN), Signal-to-Noise Ratio (SNR), Charge-to-Voltage conversion Factor (CVF) and Charge Collection Efficiency (CCE), are studied as function of readout speed and diode size. For MIMOSA 8, the effect of fast neutrons irradiation is also. Two beam tests campaigns were made: at DESY with a 5 GeV electrons beam and at CERN with a 180 GeV pions beam. Detection Efficiency and Spatial Resolution are studied in function of the discriminator threshold. For these two parameters, the influences of diode size and SNR of the central pixel of a cluster are also discussed. In order to improve the spatial resolution of the digital outputs, a very compact (25 {mu}m x 1 mm) and low consumption (300 {mu}W) column level ADC is designed in AMS 0.35 {mu}m OPTO process. Based on successive approximation architecture, the auto-offset cancellation structure is integrated. A new column level auto-zero discriminator using static latch is also designed. (author)

Photon-counting hexagonal pixel array CdTe detector: Spatial resolution characteristics for image-guided interventional applications.

Science.gov (United States)

Vedantham, Srinivasan; Shrestha, Suman; Karellas, Andrew; Shi, Linxi; Gounis, Matthew J; Bellazzini, Ronaldo; Spandre, Gloria; Brez, Alessandro; Minuti, Massimo

2016-05-01

High-resolution, photon-counting, energy-resolved detector with fast-framing capability can facilitate simultaneous acquisition of precontrast and postcontrast images for subtraction angiography without pixel registration artifacts and can facilitate high-resolution real-time imaging during image-guided interventions. Hence, this study was conducted to determine the spatial resolution characteristics of a hexagonal pixel array photon-counting cadmium telluride (CdTe) detector. A 650 μm thick CdTe Schottky photon-counting detector capable of concurrently acquiring up to two energy-windowed images was operated in a single energy-window mode to include photons of 10 keV or higher. The detector had hexagonal pixels with apothem of 30 μm resulting in pixel pitch of 60 and 51.96 μm along the two orthogonal directions. The detector was characterized at IEC-RQA5 spectral conditions. Linear response of the detector was determined over the air kerma rate relevant to image-guided interventional procedures ranging from 1.3 nGy/frame to 91.4 μGy/frame. Presampled modulation transfer was determined using a tungsten edge test device. The edge-spread function and the finely sampled line spread function accounted for hexagonal sampling, from which the presampled modulation transfer function (MTF) was determined. Since detectors with hexagonal pixels require resampling to square pixels for distortion-free display, the optimal square pixel size was determined by minimizing the root-mean-squared-error of the aperture functions for the square and hexagonal pixels up to the Nyquist limit. At Nyquist frequencies of 8.33 and 9.62 cycles/mm along the apothem and orthogonal to the apothem directions, the modulation factors were 0.397 and 0.228, respectively. For the corresponding axis, the limiting resolution defined as 10% MTF occurred at 13.3 and 12 cycles/mm, respectively. Evaluation of the aperture functions yielded an optimal square pixel size of 54 μm. After resampling to 54 �

Assembly procedure of the module (half-stave) of the ALICE Silicon Pixel Detector

CERN Document Server

Caselle, M; Antinori, F; Burns, M; Campbell, M; Chochula, P; Dinapoli, R; Elia, D; Formenti, F; Fini, R A; Ghidini, B; Kluge, A; Lenti, V; Manzari, V; Meddi, F; Morel, M; Navach, F; Nilsson, P; Pepato, Adriano; Riedler, P; Santoro, R; Stefanini, G; Viesti, G; Wyllie, K

2004-01-01

The Silicon Pixel Detector (SPD) forms the two innermost layers of the ALICE Inner Tracking System (ITS). The detector includes 1200 readout ASICs, each containing 8192 pixel cells, bump-bonded to Si sensor elements. The thickness of the readout chip and the sensor element is 150mum and 200mum, respectively. Low-mass solutions are implemented for the bus and the mechanical support. In this contribution, we describe the basic module (half-stave) of the two SPD layers and we give an overview of its assembly procedure.

Temporal Noise Analysis of Charge-Domain Sampling Readout Circuits for CMOS Image Sensors

Directory of Open Access Journals (Sweden)

Xiaoliang Ge

2018-02-01

Full Text Available This paper presents a temporal noise analysis of charge-domain sampling readout circuits for Complementary Metal-Oxide Semiconductor (CMOS image sensors. In order to address the trade-off between the low input-referred noise and high dynamic range, a Gm-cell-based pixel together with a charge-domain correlated-double sampling (CDS technique has been proposed to provide a way to efficiently embed a tunable conversion gain along the read-out path. Such readout topology, however, operates in a non-stationery large-signal behavior, and the statistical properties of its temporal noise are a function of time. Conventional noise analysis methods for CMOS image sensors are based on steady-state signal models, and therefore cannot be readily applied for Gm-cell-based pixels. In this paper, we develop analysis models for both thermal noise and flicker noise in Gm-cell-based pixels by employing the time-domain linear analysis approach and the non-stationary noise analysis theory, which help to quantitatively evaluate the temporal noise characteristic of Gm-cell-based pixels. Both models were numerically computed in MATLAB using design parameters of a prototype chip, and compared with both simulation and experimental results. The good agreement between the theoretical and measurement results verifies the effectiveness of the proposed noise analysis models.

Radiation hardness of CMS pixel barrel modules

International Nuclear Information System (INIS)

Rohe, T.; Bean, A.; Erdmann, W.; Kaestli, H.-C.; Khalatyan, S.; Meier, B.; Radicci, V.; Sibille, J.

2010-01-01

Pixel detectors are used in the innermost part of the multi purpose experiments at the LHC and are therefore exposed to the highest fluences of ionising radiation, which in this part of the detectors consists mainly of charged pions. The radiation hardness of all detector components has been thoroughly tested up to the fluences expected at the LHC. In case of an LHC upgrade, the fluence will be much higher and it is not yet clear how long the present pixel modules will stay operative in such a harsh environment. The aim of this study was to establish such a limit as a benchmark for other possible detector concepts considered for the upgrade. As the sensors and the readout chip are the parts most sensitive to radiation damage, samples consisting of a small pixel sensor bump-bonded to a CMS-readout chip (PSI46V2.1) have been irradiated with positive 200 MeV pions at PSI up to 6x10 14 n eq /cm 2 and with 21 GeV protons at CERN up to 5x10 15 n eq /cm 2 . After irradiation the response of the system to beta particles from a 90 Sr source was measured to characterise the charge collection efficiency of the sensor. Radiation induced changes in the readout chip were also measured. The results show that the present pixel modules can be expected to be still operational after a fluence of 2.8x10 15 n eq /cm 2 . Samples irradiated up to 5x10 15 n eq /cm 2 still see the beta particles. However, further tests are needed to confirm whether a stable operation with high particle detection efficiency is possible after such a high fluence.

Ultrathin NbN film superconducting single-photon detector array

International Nuclear Information System (INIS)

Smirnov, K; Korneev, A; Minaeva, O; Divochiy, A; Tarkhov, M; Ryabchun, S; Seleznev, V; Kaurova, N; Voronov, B; Gol'tsman, G; Polonsky, S

2007-01-01

We report on the fabrication process of the 2 x 2 superconducting single-photon detector (SSPD) array. The SSPD array is made from ultrathin NbN film and is operated at liquid helium temperatures. Each detector is a nanowire-based structure patterned by electron beam lithography process. The advances in fabrication technology allowed us to produce highly uniform strips and preserve superconducting properties of the unpatterned film. SSPD exhibit up to 30% quantum efficiency in near infrared and up to 1% at 5-μm wavelength. Due to 120 MHz counting rate and 18 ps jitter, the time-domain multiplexing read-out is proposed for large scale SSPD arrays. Single-pixel SSPD has already found a practical application in non-invasive testing of semiconductor very-large scale integrated circuits. The SSPD significantly outperformed traditional single-photon counting avalanche diodes

Evaluation of Matrix9 silicon photomultiplier array for small-animal PET

Science.gov (United States)

Du, Junwei; Schmall, Jeffrey P.; Yang, Yongfeng; Di, Kun; Roncali, Emilie; Mitchell, Gregory S.; Buckley, Steve; Jackson, Carl; Cherry, Simon R.

2015-01-01

Purpose: The MatrixSL-9-30035-OEM (Matrix9) from SensL is a large-area silicon photomultiplier (SiPM) photodetector module consisting of a 3 × 3 array of 4 × 4 element SiPM arrays (total of 144 SiPM pixels) and incorporates SensL’s front-end electronics board and coincidence board. Each SiPM pixel measures 3.16 × 3.16 mm2 and the total size of the detector head is 47.8 × 46.3 mm2. Using 8 × 8 polished LSO/LYSO arrays (pitch 1.5 mm) the performance of this detector system (SiPM array and readout electronics) was evaluated with a view for its eventual use in small-animal positron emission tomography (PET). Methods: Measurements of noise, signal, signal-to-noise ratio, energy resolution, flood histogram quality, timing resolution, and array trigger error were obtained at different bias voltages (28.0–32.5 V in 0.5 V intervals) and at different temperatures (5 °C–25 °C in 5 °C degree steps) to find the optimal operating conditions. Results: The best measured signal-to-noise ratio and flood histogram quality for 511 keV gamma photons were obtained at a bias voltage of 30.0 V and a temperature of 5 °C. The energy resolution and timing resolution under these conditions were 14.2% ± 0.1% and 4.2 ± 0.1 ns, respectively. The flood histograms show that all the crystals in the 1.5 mm pitch LSO array can be clearly identified and that smaller crystal pitches can also be resolved. Flood histogram quality was also calculated using different center of gravity based positioning algorithms. Improved and more robust results were achieved using the local 9 pixels for positioning along with an energy offset calibration. To evaluate the front-end detector readout, and multiplexing efficiency, an array trigger error metric is introduced and measured at different lower energy thresholds. Using a lower energy threshold greater than 150 keV effectively eliminates any mispositioning between SiPM arrays. Conclusions: In summary, the Matrix9 detector system can resolve

Evaluation of Matrix9 silicon photomultiplier array for small-animal PET

International Nuclear Information System (INIS)

Du, Junwei; Schmall, Jeffrey P.; Yang, Yongfeng; Di, Kun; Roncali, Emilie; Mitchell, Gregory S.; Buckley, Steve; Jackson, Carl; Cherry, Simon R.

2015-01-01

Purpose: The MatrixSL-9-30035-OEM (Matrix9) from SensL is a large-area silicon photomultiplier (SiPM) photodetector module consisting of a 3 × 3 array of 4 × 4 element SiPM arrays (total of 144 SiPM pixels) and incorporates SensL’s front-end electronics board and coincidence board. Each SiPM pixel measures 3.16 × 3.16 mm 2 and the total size of the detector head is 47.8 × 46.3 mm 2 . Using 8 × 8 polished LSO/LYSO arrays (pitch 1.5 mm) the performance of this detector system (SiPM array and readout electronics) was evaluated with a view for its eventual use in small-animal positron emission tomography (PET). Methods: Measurements of noise, signal, signal-to-noise ratio, energy resolution, flood histogram quality, timing resolution, and array trigger error were obtained at different bias voltages (28.0–32.5 V in 0.5 V intervals) and at different temperatures (5 °C–25 °C in 5 °C degree steps) to find the optimal operating conditions. Results: The best measured signal-to-noise ratio and flood histogram quality for 511 keV gamma photons were obtained at a bias voltage of 30.0 V and a temperature of 5 °C. The energy resolution and timing resolution under these conditions were 14.2% ± 0.1% and 4.2 ± 0.1 ns, respectively. The flood histograms show that all the crystals in the 1.5 mm pitch LSO array can be clearly identified and that smaller crystal pitches can also be resolved. Flood histogram quality was also calculated using different center of gravity based positioning algorithms. Improved and more robust results were achieved using the local 9 pixels for positioning along with an energy offset calibration. To evaluate the front-end detector readout, and multiplexing efficiency, an array trigger error metric is introduced and measured at different lower energy thresholds. Using a lower energy threshold greater than 150 keV effectively eliminates any mispositioning between SiPM arrays. Conclusions: In summary, the Matrix9 detector system can

Gossip: Gaseous pixels

Science.gov (United States)

Koffeman, E. N.

2007-12-01

Several years ago a revolutionary miniature TPC was developed using a pixel chip with a Micromegas foil spanned over it. To overcome the mechanical stability problems and improve the positioning accuracy while spanning a foil on top of a small readout chip a process has been developed in which a Micromegas-like grid is applied on a CMOS wafer in a post-processing step. This aluminum grid is supported on insulating pillars that are created by etching after the grid has been made. The energy resolution (measured on the absorption of the X-rays from a 55Fe source) was remarkably good. Several geometries have since been tested and we now believe that a Gas On Slimmed Silicon Pixel chip' (Gossip) may be realized. The drift region of such a gaseous pixel detector would be reduced to a millimeter. Such a detector is potentially very radiation hard (SLHC vertexing) but aging and sparking must be eliminated.

Gossip: Gaseous pixels

Energy Technology Data Exchange (ETDEWEB)

Koffeman, E.N. [Nikhef, Kruislaan 409, 1098 SJ Amsterdam (Netherlands)], E-mail: d77@nikhef.nl

2007-12-01

Several years ago a revolutionary miniature TPC was developed using a pixel chip with a Micromegas foil spanned over it. To overcome the mechanical stability problems and improve the positioning accuracy while spanning a foil on top of a small readout chip a process has been developed in which a Micromegas-like grid is applied on a CMOS wafer in a post-processing step. This aluminum grid is supported on insulating pillars that are created by etching after the grid has been made. The energy resolution (measured on the absorption of the X-rays from a {sup 55}Fe source) was remarkably good. Several geometries have since been tested and we now believe that a Gas On Slimmed Silicon Pixel chip' (Gossip) may be realized. The drift region of such a gaseous pixel detector would be reduced to a millimeter. Such a detector is potentially very radiation hard (SLHC vertexing) but aging and sparking must be eliminated.

Gossip: Gaseous pixels

International Nuclear Information System (INIS)

Koffeman, E.N.

2007-01-01

Several years ago a revolutionary miniature TPC was developed using a pixel chip with a Micromegas foil spanned over it. To overcome the mechanical stability problems and improve the positioning accuracy while spanning a foil on top of a small readout chip a process has been developed in which a Micromegas-like grid is applied on a CMOS wafer in a post-processing step. This aluminum grid is supported on insulating pillars that are created by etching after the grid has been made. The energy resolution (measured on the absorption of the X-rays from a 55 Fe source) was remarkably good. Several geometries have since been tested and we now believe that a Gas On Slimmed Silicon Pixel chip' (Gossip) may be realized. The drift region of such a gaseous pixel detector would be reduced to a millimeter. Such a detector is potentially very radiation hard (SLHC vertexing) but aging and sparking must be eliminated

Module and Electronics Developments for the ATLAS ITK Pixel System

CERN Document Server

Nellist, Clara; The ATLAS collaboration

2016-01-01

ATLAS is preparing for an extensive modification of its detector in the course of the planned HL-LHC accelerator upgrade around 2025 which includes a replacement of the entire tracking system by an all-silicon detector (Inner Tracker, ITk). The five innermost layers of ITk will comprise of a pixel detector built of new sensor and readout electronics technologies to improve the tracking performance and cope with the severe HL-LHC environment in terms of occupancy and radiation. The total area of the new pixel system could measure up to 14 m$^{2}$, depending on the final layout choice that is expected to take place in early 2017. An intense R\\&D activity is taking place in the field of planar, 3D, CMOS sensors to identify the optimal technology for the different pixel layers. In parallel various sensor-chip interconnection options are explored to identify reliable technologies when employing 100-150~$\\mu$m thin chips. While the new read-out chip is being developed by the RD53 Collaboration, the pixel off de...

Radiation hardness of CMS pixel barrel modules

CERN Document Server

Rohe, T; Erdmann, W; Kästli, H C; Khalatyan, S; Meier, B; Radicci, V; Sibille, J

2010-01-01

Pixel detectors are used in the innermost part of the multi purpose experiments at LHC and are therefore exposed to the highest fluences of ionising radiation, which in this part of the detectors consists mainly of charged pions. The radiation hardness of all detector components has thoroughly been tested up to the fluences expected at the LHC. In case of an LHC upgrade, the fluence will be much higher and it is not yet clear how long the present pixel modules will stay operative in such a harsh environment. The aim of this study was to establish such a limit as a benchmark for other possible detector concepts considered for the upgrade. As the sensors and the readout chip are the parts most sensitive to radiation damage, samples consisting of a small pixel sensor bump-bonded to a CMS-readout chip (PSI46V2.1) have been irradiated with positive 200 MeV pions at PSI up to 6E14 Neq and with 21 GeV protons at CERN up to 5E15 Neq. After irradiation the response of the system to beta particles from a Sr-90 source w...

Study of the CMS Phase 1 Pixel Pilot Blade Reconstruction

CERN Document Server

CMS Collaboration

2017-01-01

The silicon pixel detector is the innermost component of the CMS tracking system. It was replaced in March 2017 with an upgraded one, called the Phase 1 upgrade detector. During Long Shutdown 1, a third disk was inserted into the present forward pixel detector with eight prototype blades constructed using a new digital read-out chip architecture and a prototype readout chain. Testing the performance of these pilot modules enabled us to gain experience with the Phase 1 upgrade modules. In this document, the data reconstruction with the pilot system is presented. The hit finding efficiency and residual of these new modules is also shown, and how these observables were used to adjust the timing of the pilot blades.

Commissioning and first results from the CMS phase-1 upgrade pixel detector

CERN Document Server

Sonneveld, Jorine Mirjam

2017-01-01

The phase~1 upgrade of the CMS pixel detector has been designed to maintain the tracking performance at instantaneous luminosities of $2 \\times 10^{34} \\mathrm{~cm}^{-2} \\mathrm{~s}^{-1}$. Both barrel and endcap disk systems now feature one extra layer (4 barrel layers and 3 endcap disks), and a digital readout that provides a large enough bandwidth to read out its 124M pixel channels (87.7 percent more pixels compared to the previous system). The backend control and readout systems have been upgraded accordingly from VME-based to micro-TCA-based ones. The detector is now also fitted with a bi-phase CO$_2$ cooling system that reduces the material budget in the tracking region. The detector has been installed inside CMS at the start of 2017 and is now taking data. These proceedings discuss experiences in the commissioning and operation of the CMS phase~1 pixel detector. The first results from the CMS phase~1 pixel detector with this year's LHC proton-proton collision data are presented. ...

Scintillator counters with multi-pixel avalanche photodiode readout for the ND280 detector of the T2K experiment

International Nuclear Information System (INIS)

Mineev, O.; Afanasjev, A.; Bondarenko, G.; Golovin, V.; Gushchin, E.; Izmailov, A.; Khabibullin, M.; Khotjantsev, A.; Kudenko, Yu.; Kurimoto, Y.; Kutter, T.; Lubsandorzhiev, B.; Mayatski, V.; Musienko, Yu.; Nakaya, T.; Nobuhara, T.; Shaibonov, B.A.J.; Shaikhiev, A.; Taguchi, M.; Yershov, N.; Yokoyama, M.

2007-01-01

The Tokai-to-Kamioka (T2K) experiment is a second generation long baseline neutrino oscillation experiment which aims at a sensitive search for ν e appearance. The main design features of the T2K near neutrino detectors located at 280m from the target are presented, and the scintillator counters are described. The counters are readout via WLS fibers embedded into S-shaped grooves in the scintillator from both ends by multi-pixel avalanche photodiodes operating in a limited Geiger mode. Operating principles and results of tests of photosensors with a sensitive area of 1mm 2 are presented. A time resolution of 1.75ns, a spatial resolution of 9.9-12.4cm, and a detection efficiency for minimum ionizing particles of more than 99% were obtained for scintillator detectors in a beam test

1024-Pixel CMOS Multimodality Joint Cellular Sensor/Stimulator Array for Real-Time Holistic Cellular Characterization and Cell-Based Drug Screening.

Science.gov (United States)

Park, Jong Seok; Aziz, Moez Karim; Li, Sensen; Chi, Taiyun; Grijalva, Sandra Ivonne; Sung, Jung Hoon; Cho, Hee Cheol; Wang, Hua

2018-02-01

This paper presents a fully integrated CMOS multimodality joint sensor/stimulator array with 1024 pixels for real-time holistic cellular characterization and drug screening. The proposed system consists of four pixel groups and four parallel signal-conditioning blocks. Every pixel group contains 16 × 16 pixels, and each pixel includes one gold-plated electrode, four photodiodes, and in-pixel circuits, within a pixel footprint. Each pixel supports real-time extracellular potential recording, optical detection, charge-balanced biphasic current stimulation, and cellular impedance measurement for the same cellular sample. The proposed system is fabricated in a standard 130-nm CMOS process. Rat cardiomyocytes are successfully cultured on-chip. Measured high-resolution optical opacity images, extracellular potential recordings, biphasic current stimulations, and cellular impedance images demonstrate the unique advantages of the system for holistic cell characterization and drug screening. Furthermore, this paper demonstrates the use of optical detection on the on-chip cultured cardiomyocytes to real-time track their cyclic beating pattern and beating rate.

The readout system for the ArTeMis camera

Science.gov (United States)

Doumayrou, E.; Lortholary, M.; Dumaye, L.; Hamon, G.

2014-07-01

During ArTeMiS observations at the APEX telescope (Chajnantor, Chile), 5760 bolometric pixels from 20 arrays at 300mK, corresponding to 3 submillimeter focal planes at 450μm, 350μm and 200μm, have to be read out simultaneously at 40Hz. The read out system, made of electronics and software, is the full chain from the cryostat to the telescope. The readout electronics consists of cryogenic buffers at 4K (NABU), based on CMOS technology, and of warm electronic acquisition systems called BOLERO. The bolometric signal given by each pixel has to be amplified, sampled, converted, time stamped and formatted in data packets by the BOLERO electronics. The time stamping is obtained by the decoding of an IRIG-B signal given by APEX and is key to ensure the synchronization of the data with the telescope. Specifically developed for ArTeMiS, BOLERO is an assembly of analogue and digital FPGA boards connected directly on the top of the cryostat. Two detectors arrays (18*16 pixels), one NABU and one BOLERO interconnected by ribbon cables constitute the unit of the electronic architecture of ArTeMiS. In total, the 20 detectors for the tree focal planes are read by 10 BOLEROs. The software is working on a Linux operating system, it runs on 2 back-end computers (called BEAR) which are small and robust PCs with solid state disks. They gather the 10 BOLEROs data fluxes, and reconstruct the focal planes images. When the telescope scans the sky, the acquisitions are triggered thanks to a specific network protocol. This interface with APEX enables to synchronize the acquisition with the observations on sky: the time stamped data packets are sent during the scans to the APEX software that builds the observation FITS files. A graphical user interface enables the setting of the camera and the real time display of the focal plane images, which is essential in laboratory and commissioning phases. The software is a set of C++, Labview and Python, the qualities of which are respectively used

Photon-counting hexagonal pixel array CdTe detector: Spatial resolution characteristics for image-guided interventional applications

Energy Technology Data Exchange (ETDEWEB)

Vedantham, Srinivasan; Shrestha, Suman; Karellas, Andrew, E-mail: andrew.karellas@umassmed.edu; Shi, Linxi; Gounis, Matthew J. [Department of Radiology, University of Massachusetts Medical School, Worcester, Massachusetts 01655 (United States); Bellazzini, Ronaldo; Spandre, Gloria; Brez, Alessandro; Minuti, Massimo [Istituto Nazionale di Fisica Nucleare (INFN), Pisa 56127, Italy and Pixirad Imaging Counters s.r.l., L. Pontecorvo 3, Pisa 56127 (Italy)

2016-05-15

Purpose: High-resolution, photon-counting, energy-resolved detector with fast-framing capability can facilitate simultaneous acquisition of precontrast and postcontrast images for subtraction angiography without pixel registration artifacts and can facilitate high-resolution real-time imaging during image-guided interventions. Hence, this study was conducted to determine the spatial resolution characteristics of a hexagonal pixel array photon-counting cadmium telluride (CdTe) detector. Methods: A 650 μm thick CdTe Schottky photon-counting detector capable of concurrently acquiring up to two energy-windowed images was operated in a single energy-window mode to include photons of 10 keV or higher. The detector had hexagonal pixels with apothem of 30 μm resulting in pixel pitch of 60 and 51.96 μm along the two orthogonal directions. The detector was characterized at IEC-RQA5 spectral conditions. Linear response of the detector was determined over the air kerma rate relevant to image-guided interventional procedures ranging from 1.3 nGy/frame to 91.4 μGy/frame. Presampled modulation transfer was determined using a tungsten edge test device. The edge-spread function and the finely sampled line spread function accounted for hexagonal sampling, from which the presampled modulation transfer function (MTF) was determined. Since detectors with hexagonal pixels require resampling to square pixels for distortion-free display, the optimal square pixel size was determined by minimizing the root-mean-squared-error of the aperture functions for the square and hexagonal pixels up to the Nyquist limit. Results: At Nyquist frequencies of 8.33 and 9.62 cycles/mm along the apothem and orthogonal to the apothem directions, the modulation factors were 0.397 and 0.228, respectively. For the corresponding axis, the limiting resolution defined as 10% MTF occurred at 13.3 and 12 cycles/mm, respectively. Evaluation of the aperture functions yielded an optimal square pixel size of 54 �

Status and perspectives of pixel sensors based on 3D vertical integration

Energy Technology Data Exchange (ETDEWEB)

Re, Valerio [Università di Bergamo, Dipartimento di Ingegneria, Viale Marconi, 5, 24044 Dalmine (Italy); INFN, Sezione di Pavia, Via Bassi, 6, 27100 Pavia (Italy)

2014-11-21

This paper reviews the most recent developments of 3D integration in the field of silicon pixel sensors and readout integrated circuits. This technology may address the needs of future high energy physics and photon science experiments by increasing the electronic functional density in small pixel readout cells and by stacking various device layers based on different technologies, each optimized for a different function. Current efforts are aimed at improving the performance of both hybrid pixel detectors and of CMOS sensors. The status of these activities is discussed here, taking into account experimental results on 3D devices developed in the frame of the 3D-IC consortium. The paper also provides an overview of the ideas that are being currently devised for novel 3D vertically integrated pixel sensors. - Highlights: • 3D integration is a promising technology for pixel sensors in high energy physics. • Experimental results on two-layer 3D CMOS pixel sensors are presented. • The outcome of the first run from the 3D-IC consortium is discussed. • The AIDA network is studying via-last 3D integration of heterogeneous layers. • New ideas based on 3D vertically integrated pixels are being developed for HEP.

Status and perspectives of pixel sensors based on 3D vertical integration

International Nuclear Information System (INIS)

Re, Valerio

2014-01-01

This paper reviews the most recent developments of 3D integration in the field of silicon pixel sensors and readout integrated circuits. This technology may address the needs of future high energy physics and photon science experiments by increasing the electronic functional density in small pixel readout cells and by stacking various device layers based on different technologies, each optimized for a different function. Current efforts are aimed at improving the performance of both hybrid pixel detectors and of CMOS sensors. The status of these activities is discussed here, taking into account experimental results on 3D devices developed in the frame of the 3D-IC consortium. The paper also provides an overview of the ideas that are being currently devised for novel 3D vertically integrated pixel sensors. - Highlights: • 3D integration is a promising technology for pixel sensors in high energy physics. • Experimental results on two-layer 3D CMOS pixel sensors are presented. • The outcome of the first run from the 3D-IC consortium is discussed. • The AIDA network is studying via-last 3D integration of heterogeneous layers. • New ideas based on 3D vertically integrated pixels are being developed for HEP

Conceptual design of 3D integrated pixel sensors for the innermost layer of the ILC vertex detector

International Nuclear Information System (INIS)

Fu, Y; Hu-Guo, C; Dorokhov, A; Zhao, W; Hu, Y; Torheim, O

2011-01-01

The paper presents a design of CMOS Pixel Sensor (CPS) using the vertical integration technology (3DIT), expected to alleviate the most essential limitations of 2D-CPS. Our objective is to develop an intelligent architecture in order to meet the requirements of the innermost layer of the International Linear Collider (ILC) vertex detectors, which are particularly demanding in spatial resolution of less than 3 μm and associated frame readout time of 10 μs. The sensor, with a pixel pitch of 23 μm, will be composed of 3-tiers Integrated Circuits (IC) with different functionalities: detection with in pixel analogue processing, pixel-level 3-bit Analogue to Digital Conversion (ADC) and fast parallel sparse readout.

The Upgraded Pixel Detector of the ATLAS Experiment for Run-2 at the LHC

CERN Document Server

AUTHOR|(INSPIRE)INSPIRE-00084948; The ATLAS collaboration

2016-01-01

Run-2 of the LHC is providing new challenges to track and vertex reconstruction with higher energies, denser jets and higher rates. Therefore the ATLAS experiment has constructed the first 4-layer Pixel detector in HEP, installing a new Pixel layer, also called Insertable B-Layer (IBL). IBL is a fourth layer of pixel detectors, and has been installed in May 2014 at a radius of 3.3 cm between the existing Pixel Detector and a new smaller radius beam-pipe. The new detector, built to cope with high radiation and expected occupancy, is the first large scale application of 3D detectors and CMOS 130 nm technology. In addition the Pixel detector was refurbished with a new service quarter panel to recover about 3% of defective modules lost during run-1 and a new optical readout system to readout the data at higher speed while reducing the occupancy when running with increased luminosity. The commissioning and performance of the 4-layer Pixel Detector, in particular the IBL, will be presented using collision data.

GOSSIP: A vertex detector combining a thin gas layer as signal generator with a CMOS readout pixel array

Energy Technology Data Exchange (ETDEWEB)

Campbell, M. [CERN/MediPix Consortium, Geneva (Switzerland); Heijne, E.H.M. [CERN/MediPix Consortium, Geneva (Switzerland); Llopart, X. [CERN/MediPix Consortium, Geneva (Switzerland); Colas, P. [DAPNIA, CEA Saclay, 91191 Gif sur Yvette Cedex (France); Giganon, A. [DAPNIA, CEA Saclay, 91191 Gif sur Yvette Cedex (France); Giomataris, Y. [DAPNIA, CEA Saclay, 91191 Gif sur Yvette Cedex (France); Chefdeville, M. [NIKHEF, Amsterdam (Netherlands); Colijn, A.P. [NIKHEF, Amsterdam (Netherlands); Fornaini, A. [NIKHEF, Amsterdam (Netherlands); Graaf, H. van der [NIKHEF, Amsterdam (Netherlands)]. E-mail: vdgraaf@nikhef.nl; Kluit, P. [NIKHEF, Amsterdam (Netherlands); Timmermans, J. [NIKHEF, Amsterdam (Netherlands); Visschers, J.L. [NIKHEF, Amsterdam (Netherlands); Schmitz, J. [University of Twente/MESA (Netherlands)

2006-05-01

A small TPC has been read out by means of a Medipix2 chip as direct anode. A Micromegas foil was placed 50{mu}m above the chip, and electron multiplication occurred in the gap. With a He/isobutane 80/20 mixture, gas multiplication factors up to tens of thousands were achieved, resulting in an efficiency for detecting single electrons of better than 90%. With this new readout technology for gas-filled detectors we recorded many image frames containing 2D images with tracks from cosmic muons. Along these tracks, electron clusters were observed, as well as {delta}-rays. With a gas layer thickness of only 1mm, the device could be applied as vertex detector, outperforming all Si-based detectors.

GOSSIP: A vertex detector combining a thin gas layer as signal generator with a CMOS readout pixel array

International Nuclear Information System (INIS)

Campbell, M.; Heijne, E.H.M.; Llopart, X.; Colas, P.; Giganon, A.; Giomataris, Y.; Chefdeville, M.; Colijn, A.P.; Fornaini, A.; Graaf, H. van der; Kluit, P.; Timmermans, J.; Visschers, J.L.; Schmitz, J.

2006-01-01

A small TPC has been read out by means of a Medipix2 chip as direct anode. A Micromegas foil was placed 50μm above the chip, and electron multiplication occurred in the gap. With a He/isobutane 80/20 mixture, gas multiplication factors up to tens of thousands were achieved, resulting in an efficiency for detecting single electrons of better than 90%. With this new readout technology for gas-filled detectors we recorded many image frames containing 2D images with tracks from cosmic muons. Along these tracks, electron clusters were observed, as well as δ-rays. With a gas layer thickness of only 1mm, the device could be applied as vertex detector, outperforming all Si-based detectors

GOSSIP: A vertex detector combining a thin gas layer as signal generator with a CMOS readout pixel array

Science.gov (United States)

Campbell, M.; Heijne, E. H. M.; Llopart, X.; Colas, P.; Giganon, A.; Giomataris, Y.; Chefdeville, M.; Colijn, A. P.; Fornaini, A.; van der Graaf, H.; Kluit, P.; Timmermans, J.; Visschers, J. L.; Schmitz, J.

2006-05-01

A small TPC has been read out by means of a Medipix2 chip as direct anode. A Micromegas foil was placed 50 μm above the chip, and electron multiplication occurred in the gap. With a He/isobutane 80/20 mixture, gas multiplication factors up to tens of thousands were achieved, resulting in an efficiency for detecting single electrons of better than 90%. With this new readout technology for gas-filled detectors we recorded many image frames containing 2D images with tracks from cosmic muons. Along these tracks, electron clusters were observed, as well as δ-rays. With a gas layer thickness of only 1 mm, the device could be applied as vertex detector, outperforming all Si-based detectors.

A high resolution gamma-ray spectrometer based on superconducting microcalorimeters

Energy Technology Data Exchange (ETDEWEB)

Bennett, D. A.; Horansky, R. D. [National Institute of Standards and Technology, Boulder, Colorado 80305 (United States); University of Denver, Denver, Colorado 80208 (United States); Schmidt, D. R.; Doriese, W. B.; Fowler, J. W.; Kotsubo, V.; Mates, J. A. B. [National Institute of Standards and Technology, Boulder, Colorado 80305 (United States); University of Colorado, Boulder, Colorado 80309 (United States); Hoover, A. S.; Winkler, R.; Rabin, M. W. [Los Alamos National Laboratory, Los Alamos, New Mexico 87545 (United States); Alpert, B. K.; Beall, J. A.; Fitzgerald, C. P.; Hilton, G. C.; Irwin, K. D.; O' Neil, G. C.; Reintsema, C. D.; Schima, F. J.; Swetz, D. S.; Vale, L. R. [National Institute of Standards and Technology, Boulder, Colorado 80305 (United States); and others

2012-09-15

Improvements in superconductor device fabrication, detector hybridization techniques, and superconducting quantum interference device readout have made square-centimeter-sized arrays of gamma-ray microcalorimeters, based on transition-edge sensors (TESs), possible. At these collecting areas, gamma microcalorimeters can utilize their unprecedented energy resolution to perform spectroscopy in a number of applications that are limited by closely-spaced spectral peaks, for example, the nondestructive analysis of nuclear materials. We have built a 256 pixel spectrometer with an average full-width-at-half-maximum energy resolution of 53 eV at 97 keV, a useable dynamic range above 400 keV, and a collecting area of 5 cm{sup 2}. We have demonstrated multiplexed readout of the full 256 pixel array with 236 of the pixels (91%) giving spectroscopic data. This is the largest multiplexed array of TES microcalorimeters to date. This paper will review the spectrometer, highlighting the instrument design, detector fabrication, readout, operation of the instrument, and data processing. Further, we describe the characterization and performance of the newest 256 pixel array.

Investigation of CMOS pixel sensor with 0.18 μm CMOS technology for high-precision tracking detector

International Nuclear Information System (INIS)

Zhang, L.; Wang, M.; Fu, M.; Zhang, Y.; Yan, W.

2017-01-01

The Circular Electron Positron Collider (CEPC) proposed by the Chinese high energy physics community is aiming to measure Higgs particles and their interactions precisely. The tracking detector including Silicon Inner Tracker (SIT) and Forward Tracking Disks (FTD) has driven stringent requirements on sensor technologies in term of spatial resolution, power consumption and readout speed. CMOS Pixel Sensor (CPS) is a promising candidate to approach these requirements. This paper presents the preliminary studies on the sensor optimization for tracking detector to achieve high collection efficiency while keeping necessary spatial resolution. Detailed studies have been performed on the charge collection using a 0.18 μm CMOS image sensor process. This process allows high resistivity epitaxial layer, leading to a significant improvement on the charge collection and therefore improving the radiation tolerance. Together with the simulation results, the first exploratory prototype has bee designed and fabricated. The prototype includes 9 different pixel arrays, which vary in terms of pixel pitch, diode size and geometry. The total area of the prototype amounts to 2 × 7.88 mm 2 .

An Improved Zero Potential Circuit for Readout of a Two-Dimensional Resistive Sensor Array.

Science.gov (United States)

Wu, Jian-Feng; Wang, Feng; Wang, Qi; Li, Jian-Qing; Song, Ai-Guo

2016-12-06

With one operational amplifier (op-amp) in negative feedback, the traditional zero potential circuit could access one element in the two-dimensional (2-D) resistive sensor array with the shared row-column fashion but it suffered from the crosstalk problem for the non-scanned elements' bypass currents, which were injected into array's non-scanned electrodes from zero potential. Firstly, for suppressing the crosstalk problem, we designed a novel improved zero potential circuit with one more op-amp in negative feedback to sample the total bypass current and calculate the precision resistance of the element being tested (EBT) with it. The improved setting non-scanned-electrode zero potential circuit (S-NSE-ZPC) was given as an example for analyzing and verifying the performance of the improved zero potential circuit. Secondly, in the S-NSE-ZPC and the improved S-NSE-ZPC, the effects of different parameters of the resistive sensor arrays and their readout circuits on the EBT's measurement accuracy were simulated with the NI Multisim 12. Thirdly, part features of the improved circuit were verified with the experiments of a prototype circuit. Followed, the results were discussed and the conclusions were given. The experiment results show that the improved circuit, though it requires one more op-amp, one more resistor and one more sampling channel, can access the EBT in the 2-D resistive sensor array more accurately.

A Dual-Mode Large-Arrayed CMOS ISFET Sensor for Accurate and High-Throughput pH Sensing in Biomedical Diagnosis.

Science.gov (United States)

Huang, Xiwei; Yu, Hao; Liu, Xu; Jiang, Yu; Yan, Mei; Wu, Dongping

2015-09-01

The existing ISFET-based DNA sequencing detects hydrogen ions released during the polymerization of DNA strands on microbeads, which are scattered into microwell array above the ISFET sensor with unknown distribution. However, false pH detection happens at empty microwells due to crosstalk from neighboring microbeads. In this paper, a dual-mode CMOS ISFET sensor is proposed to have accurate pH detection toward DNA sequencing. Dual-mode sensing, optical and chemical modes, is realized by integrating a CMOS image sensor (CIS) with ISFET pH sensor, and is fabricated in a standard 0.18-μm CIS process. With accurate determination of microbead physical locations with CIS pixel by contact imaging, the dual-mode sensor can correlate local pH for one DNA slice at one location-determined microbead, which can result in improved pH detection accuracy. Moreover, toward a high-throughput DNA sequencing, a correlated-double-sampling readout that supports large array for both modes is deployed to reduce pixel-to-pixel nonuniformity such as threshold voltage mismatch. The proposed CMOS dual-mode sensor is experimentally examined to show a well correlated pH map and optical image for microbeads with a pH sensitivity of 26.2 mV/pH, a fixed pattern noise (FPN) reduction from 4% to 0.3%, and a readout speed of 1200 frames/s. A dual-mode CMOS ISFET sensor with suppressed FPN for accurate large-arrayed pH sensing is proposed and demonstrated with state-of-the-art measured results toward accurate and high-throughput DNA sequencing. The developed dual-mode CMOS ISFET sensor has great potential for future personal genome diagnostics with high accuracy and low cost.

Tests of the gated mode for Belle II pixel detector

Energy Technology Data Exchange (ETDEWEB)

Prinker, Eduard [Max-Planck-Institute for Physics, Munich (Germany); Collaboration: Belle II-Collaboration

2015-07-01

DEPFET pixel detectors offer intrinsic amplification and very high signal to noise ratio. They form an integral building block for the vertex detector system of the Belle II experiment, which will start data taking in the year 2017 at the SuperKEKB Collider in Japan. A special Test board (Hybrid4) is used, which contains a small version of the DEPFET sensor with a read-out (DCD) and a steering chip (Switcher) attached, both controlled by a field-programmable gate array (FPGA) as the central interface to the computer. In order to keep the luminosity of the collider constant over time, the particle bunch currents have to be topped off by injecting additional bunches at a rate of 50 Hz. The particles in the daughter bunches produce a high rate of background (noisy bunches) for a short period of time, saturating the occupancy of the sensor. Operating the DEPFET sensor in a Gated Mode allows preserving the signals from collisions of normal bunches while protecting the pixels from background signals of the passing noisy bunches. An overview of the Gated Mode and first results is presented.

Preliminary test of an imaging probe for nuclear medicine using hybrid pixel detectors

International Nuclear Information System (INIS)

Bertolucci, E.; Maiorino, M.; Mettivier, G.; Montesi, M.C.; Russo, P.

2002-01-01

We are investigating the feasibility of an intraoperative imaging probe for lymphoscintigraphy with Tc-99m tracer, for sentinel node radioguided surgery, using the Medipix series of hybrid detectors coupled to a collimator. These detectors are pixelated semiconductor detectors bump-bonded to the Medipix1 photon counting read-out chip (64x64 pixel, 170 μm pitch) or to the Medipix2 chip (256x256 pixel, 55 μm pitch), developed by the European Medipix collaboration. The pixel detector we plan to use in the final version of the probe is a semi-insulating GaAs detector or a 1-2 mm thick CdZnTe detector. For the preliminary tests presented here, we used 300-μm thick silicon detectors, hybridized via bump-bonding to the Medipix1 chip. We used a tungsten parallel-hole collimator (7 mm thick, matrix array of 64x64 100 μm circular holes with 170 μm pitch), and a 22, 60 and 122 keV point-like (1 mm diameter) radioactive sources, placed at various distances from the detector. These tests were conducted in order to investigate the general feasibility of this imaging probe and its resolving power. Measurements show the high resolution but low efficiency performance of the detector-collimator set, which is able to image the 122 keV source with <1 mm FWHM resolution

A self-adjusting delay circuit for pixel read-out chips

International Nuclear Information System (INIS)

Raith, B.

1997-01-01

A simple concept for automatic adjustment of important VLSI-circuit properties was proposed in (Fischer and Joens, Nucl. Instr. and. Meth.). As an application, a self-adjusting monoflop is reviewed, and detailed measurements are discussed regarding a possible implementation in the LHC 1 read-out chip for the ATLAS experiment (ATLAS Internal Note, 1995). (orig.)

CMOS Active Pixel Sensors as energy-range detectors for proton Computed Tomography

International Nuclear Information System (INIS)

Esposito, M.; Waltham, C.; Allinson, N.M.; Anaxagoras, T.; Evans, P.M.; Poludniowski, G.; Green, S.; Parker, D.J.; Price, T.; Manolopoulos, S.; Nieto-Camero, J.

2015-01-01

Since the first proof of concept in the early 70s, a number of technologies has been proposed to perform proton CT (pCT), as a means of mapping tissue stopping power for accurate treatment planning in proton therapy. Previous prototypes of energy-range detectors for pCT have been mainly based on the use of scintillator-based calorimeters, to measure proton residual energy after passing through the patient. However, such an approach is limited by the need for only a single proton passing through the energy-range detector in a read-out cycle. A novel approach to this problem could be the use of pixelated detectors, where the independent read-out of each pixel allows to measure simultaneously the residual energy of a number of protons in the same read-out cycle, facilitating a faster and more efficient pCT scan. This paper investigates the suitability of CMOS Active Pixel Sensors (APSs) to track individual protons as they go through a number of CMOS layers, forming an energy-range telescope. Measurements performed at the iThemba Laboratories will be presented and analysed in terms of correlation, to confirm capability of proton tracking for CMOS APSs

CMOS Active Pixel Sensors as energy-range detectors for proton Computed Tomography.

Science.gov (United States)

Esposito, M; Anaxagoras, T; Evans, P M; Green, S; Manolopoulos, S; Nieto-Camero, J; Parker, D J; Poludniowski, G; Price, T; Waltham, C; Allinson, N M

2015-06-03

Since the first proof of concept in the early 70s, a number of technologies has been proposed to perform proton CT (pCT), as a means of mapping tissue stopping power for accurate treatment planning in proton therapy. Previous prototypes of energy-range detectors for pCT have been mainly based on the use of scintillator-based calorimeters, to measure proton residual energy after passing through the patient. However, such an approach is limited by the need for only a single proton passing through the energy-range detector in a read-out cycle. A novel approach to this problem could be the use of pixelated detectors, where the independent read-out of each pixel allows to measure simultaneously the residual energy of a number of protons in the same read-out cycle, facilitating a faster and more efficient pCT scan. This paper investigates the suitability of CMOS Active Pixel Sensors (APSs) to track individual protons as they go through a number of CMOS layers, forming an energy-range telescope. Measurements performed at the iThemba Laboratories will be presented and analysed in terms of correlation, to confirm capability of proton tracking for CMOS APSs.

A two-dimensional position sensitive gas chamber with scanned charge transfer readout

Energy Technology Data Exchange (ETDEWEB)

Gomez, F. E-mail: faustgr@usc.es; Iglesias, A.; Lobato, R.; Mosquera, J.; Pardo, J.; Pena, J.; Pazos, A.; Pombar, M.; Rodriguez, A

2003-10-21

We have constructed and tested a two-dimensional position sensitive parallel-plate gas ionization chamber with scanned charge transfer readout. The scan readout method described here is based on the development of a new position-dependent charge transfer technique. It has been implemented by using gate strips perpendicularly oriented to the collector strips. This solution reduces considerably the number of electronic readout channels needed to cover large detector areas. The use of a 25 {mu}m thick kapton etched circuit allows high charge transfer efficiency with a low gating voltage, consequently needing a very simple commutating circuit. The present prototype covers 8x8 cm{sup 2} with a pixel size of 1.27x1.27 mm{sup 2}. Depending on the intended use and beam characteristics a smaller effective pixel is feasible and larger active areas are possible. This detector can be used for X-ray or other continuous beam intensity profile monitoring.

A two-dimensional position sensitive gas chamber with scanned charge transfer readout

International Nuclear Information System (INIS)

Gomez, F.; Iglesias, A.; Lobato, R.; Mosquera, J.; Pardo, J.; Pena, J.; Pazos, A.; Pombar, M.; Rodriguez, A.

2003-01-01

We have constructed and tested a two-dimensional position sensitive parallel-plate gas ionization chamber with scanned charge transfer readout. The scan readout method described here is based on the development of a new position-dependent charge transfer technique. It has been implemented by using gate strips perpendicularly oriented to the collector strips. This solution reduces considerably the number of electronic readout channels needed to cover large detector areas. The use of a 25 μm thick kapton etched circuit allows high charge transfer efficiency with a low gating voltage, consequently needing a very simple commutating circuit. The present prototype covers 8x8 cm 2 with a pixel size of 1.27x1.27 mm 2 . Depending on the intended use and beam characteristics a smaller effective pixel is feasible and larger active areas are possible. This detector can be used for X-ray or other continuous beam intensity profile monitoring

FED firmware interface testing with pixel phase 1 emulator

CERN Document Server

Kilpatrick, Matthew

2017-01-01

A hardware emulation of the CMS pixel detector phase 1 upgrade front-end electronics has been developed to test and validate the architecture of the back-end electronics (FED) firmware. The emulation is implemented on a Virtex 6 FPGA on the CERN GLIB uTCA platform, utilizing an 8-way SFP FPGA Mezzanine Card to drive compatible optical transmitters to the back-end electronics at 400 bps. The firmware emulates the complex functions of the phase 1 pixel readout chips (PSI46digv2 and PROC600) and token bit manager ASICs and allows for possible abnormalities that can occur in the output data stream. The emulation implements both fixed data patterns that are used as test vectors and realistic simulated data to drive the readout of the FED at the expected data and trigger rates. Testing software was developed to control the emulator and verify correct transmission of data and exception handling in the FED. An installation has been integrated into the pixel DAQ test system at CMS to be used for fast validation of F...

FED firmware interface testing with pixel phase 1 emulator

CERN Document Server

Kilpatrick, Matthew

2018-01-01

A hardware emulation of the CMS pixel detector phase 1 upgrade front-end electronics has been developed to test and validate the architecture of the back-end electronics (FED) firmware. The emulation is implemented on a Virtex 6 FPGA on the CERN GLIB uTCA platform, utilizing an 8-way SFP FPGA Mezzanine Card to drive compatible optical transmitters to the back-end electronics at 400 bps. The firmware emulates the complex functions of the phase 1 pixel readout chips (PSI46digv2 and PROC600) and token bit manager ASICs and allows for possible abnormalities that can occur in the output data stream. The emulation implements both fixed data patterns that are used as test vectors and realistic simulated data to drive the readout of the FED at the expected data and trigger rates. Testing software was developed to control the emulator and verify correct transmission of data and exception handling in the FED. An installation has been integrated into the pixel DAQ test system at CMS to be used for fast validation of F...

Design and performance of large-pixel-size high-fill-fraction TES arrays for future X-ray astrophysics missions

International Nuclear Information System (INIS)

Figueroa-Feliciano, E.; Bandler, S.R.; Chervenak, J.; Finkbeiner, F.; Iyomoto, N.; Kelley, R.L.; Kilbourne, C.A.; Porter, F.S.; Saab, T.; Sadleir, J.; White, J.

2006-01-01

We have designed, modeled, fabricated and tested a 600μm high-fill-fraction microcalorimeter array that will be a good match to the requirements of future X-ray missions. Our devices use transition-edge sensors coupled to overhanging bismuth/copper absorbers to produce arrays with 97% or higher fill fraction. An extensive modeling effort was undertaken in order to accommodate large pixel sizes (500-1000μm) and maintain the best energy resolution possible. The finite thermalization time of the large absorber and the associated position dependence of the pulse shape on absorption position constrain the time constants of the system given a desired energy-resolution performance. We show the results of our analysis and our new pixel design, consisting of a novel TES-on-the-side architecture which creates a controllable TES-absorber conductance

Operating characteristics of radiation-hardened silicon pixel detectors for the CMS experiment

CERN Document Server

Hyosung, Cho

2002-01-01

The Compact Muon Solenoid (CMS) experiment at the CERN Large Hadron Collider (LHC) will have forward silicon pixel detectors as its innermost tracking device. The pixel devices will be exposed to the harsh radiation environment of the LHC. Prototype silicon pixel detectors have been designed to meet the specification of the CMS experiment. No guard ring is required on the n/sup +/ side, and guard rings on the p/sup +/ side are always kept active before and after type inversion. The whole n/sup +/ side is grounded and connected to readout chips, which greatly simplifies detector assembling and improves the stability of bump-bonded readout chips on the n/sup +/ side. Operating characteristics such as the leakage current, the full depletion voltage, and the potential distributions over guard rings were tested using standard techniques. The tests are discussed in this paper. (9 refs).

Argus: A W-band 16-pixel focal plane array for the Green Bank Telescope

Science.gov (United States)

Devaraj, Kiruthika; Church, Sarah; Cleary, Kieran; Frayer, David; Gawande, Rohit; Goldsmith, Paul; Gundersen, Joshua; Harris, Andrew; Kangaslahti, Pekka; Readhead, Tony; Reeves, Rodrigo; Samoska, Lorene; Sieth, Matt; Voll, Patricia

2015-05-01

We are building Argus, a 16-pixel square-packed focal plane array that will cover the 75-115.3 GHz frequency range on the Robert C. Byrd Green Bank Telescope (GBT). The primary research area for Argus is the study of star formation within our Galaxy and nearby galaxies. Argus will map key molecules that trace star formation, including carbon monoxide (CO) and hydrogen cyanide (HCN). An additional key science area is astrochemistry, which will be addressed by observing complex molecules in the interstellar medium, and the study of formation of solar systems, which will be addressed by identifying dense pre-stellar cores and by observing comets in our solar system. Argus has a highly scalable architecture and will be a technology path finder for larger arrays. The array is modular in construction, which will allow easy replacement of malfunctioning and poorly performing components.

Operational Experience with the ATLAS Pixel Detector

CERN Document Server

Djama, Fares; The ATLAS collaboration

2017-01-01

Run-2 of the LHC is providing new challenges to track and vertex reconstruction imposed by the higher collision energy, pileup and luminosity that are being delivered. The ATLAS tracking performance relies critically on the Pixel Detector, therefore, in view of Run-2 of LHC, the ATLAS experiment has constructed the first 4-layer Pixel detector in HEP, installing a new Pixel layer, also called Insertable B-Layer (IBL). Pixel detector was refurbished with a new service quarter panel to recover about 3% of defective modules lost during run-1 and an additional optical link per module was added to overcome in some layers the readout bandwidth limitation when LHC will exceed the nominal peak luminosity by almost a factor of 3. The key features and challenges met during the IBL project will be presented, as well as its operational experience and Pixel Detector performance in LHC.

A fast embedded readout system for large-area Medipix and Timepix systems

International Nuclear Information System (INIS)

Brogna, A S; Balzer, M; Smale, S; Hartmann, J; Bormann, D; Hamann, E; Cecilia, A; Zuber, M; Koenig, T; Weber, M; Fiederle, M; Baumbach, T; Zwerger, A

2014-01-01

In this work we present a novel readout electronics for an X-ray sensor based on a Si crystal bump-bonded to an array of 3 × 2 Medipix ASICs. The pixel size is 55 μm × 55 μm with a total number of ∼ 400k pixels and a sensitive area of 42 mm × 28 mm. The readout electronics operate Medipix-2 MXR or Timepix ASICs with a clock speed of 125 MHz. The data acquisition system is centered around an FPGA and each of the six ASICs has a dedicated I/O port for simultaneous data acquisition. The settings of the auxiliary devices (ADCs and DACs) are also processed in the FPGA. Moreover, a high-resolution timer operates the electronic shutter to select the exposure time from 8 ns to several milliseconds. A sophisticated trigger is available in hardware and software to synchronize the acquisition with external electro-mechanical motors. The system includes a diagnostic subsystem to check the sensor temperature and to control the cooling Peltier cells and a programmable high-voltage generator to bias the crystal. A network cable transfers the data, encapsulated into the UDP protocol and streamed at 1 Gb/s. Therefore most notebooks or personal computers are able to process the data and to program the system without a dedicated interface. The data readout software is compatible with the well-known Pixelman 2.x running both on Windows and GNU/Linux. Furthermore the open architecture encourages users to write their own applications. With a low-level interface library which implements all the basic features, a MATLAB or Python script can be implemented for special manipulations of the raw data. In this paper we present selected images taken with a microfocus X-ray tube to demonstrate the capability to collect the data at rates up to 120 fps corresponding to 0.76 Gb/s

Module Production and Qualification for the Phase I Upgrade of the CMS Pixel Detector

CERN Document Server

AUTHOR|(CDS)2086689

2015-01-01

After consolidation of the LHC in 2013/14 its centre-of-mass energy will increase to 13TeV and the luminosity will reach $2 \\cdot 10^{34}\\, \\textnormal{cm}^{-2} \\textnormal{s}^{-1}$, which is twice the design luminosity. The latter will result in more simultaneous particle collisions, which would significantly increase the dead time of the current readout chip of the CMS pixel detector. Therefore the entire CMS pixel detector is replaced in 2016/17 and a new digital readout with larger buffers will be used to handle increasing pixel hit rates. An additional fourth barrel-layer provides more space points to improve track reconstruction. Half of the required modules for layer four is being produced at Karlsruhe Institute of Technology (KIT). This poster deals with the smallest discrete subunit of the pixel detector, the module and its assembly process. Moreover first production experience will be shown.

New results on diamond pixel sensors using ATLAS frontend electronics

International Nuclear Information System (INIS)

Keil, M.; Adam, W.; Berdermann, E.; Bergonzo, P.; Boer, W. de; Bogani, F.; Borchi, E.; Brambilla, A.; Bruzzi, M.; Colledani, C.; Conway, J.; D'Angelo, P.; Dabrowski, W.; Delpierre, P.; Dulinski, W.; Doroshenko, J.; Doucet, M.; Eijk, B. van; Fallou, A.; Fischer, P.; Fizzotti, F.; Kania, D.; Gan, K.K.; Grigoriev, E.; Hallewell, G.; Han, S.; Hartjes, F.; Hrubec, J.; Husson, D.; Kagan, H.; Kaplon, J.; Kass, R.; Knoepfle, K.T.; Koeth, T.; Krammer, M.; Logiudice, A.; Mac Lynne, L.; Manfredotti, C.; Meier, D.; Menichelli, D.; Meuser, S.; Mishina, M.; Moroni, L.; Noomen, J.; Oh, A.; Pan, L.S.; Pernicka, M.; Perera, L.; Riester, J.L.; Roe, S.; Rudge, A.; Russ, J.; Sala, S.; Sampietro, M.; Schnetzer, S.; Sciortino, S.; Stelzer, H.; Stone, R.; Suter, B.; Trischuk, W.; Tromson, D.; Vittone, E.; Weilhammer, P.; Wermes, N.; Wetstein, M.; Zeuner, W.; Zoeller, M.

2003-01-01

Diamond is a promising sensor material for future collider experiments due to its radiation hardness. Diamond pixel sensors have been bump bonded to an ATLAS pixel readout chip using PbSn solder bumps. Single chip devices have been characterised by lab measurements and in a high-energy pion beam at CERN. Results on charge collection, spatial resolution, efficiency and the charge carrier lifetime are presented

New results on diamond pixel sensors using ATLAS frontend electronics

CERN Document Server

Keil, Markus; Berdermann, E; Bergonzo, P; de Boer, Wim; Bogani, F; Borchi, E; Brambilla, A; Bruzzi, Mara; Colledani, C; Conway, J; D'Angelo, P; Dabrowski, W; Delpierre, P A; Dulinski, W

2003-01-01

Diamond is a promising sensor material for future collider experiments due to its radiation hardness. Diamond pixel sensors have been bump bonded to an ATLAS pixel readout chip using PbSn solder bumps. Single chip devices have been characterised by lab measurements and in a high-energy pion beam at CERN. Results on charge collection, spatial resolution, efficiency and the charge carrier lifetime are presented.

New results on diamond pixel sensors using ATLAS frontend electronics

Energy Technology Data Exchange (ETDEWEB)

Keil, M. E-mail: markus.keil@cern.ch; Adam, W.; Berdermann, E.; Bergonzo, P.; Boer, W. de; Bogani, F.; Borchi, E.; Brambilla, A.; Bruzzi, M.; Colledani, C.; Conway, J.; D' Angelo, P.; Dabrowski, W.; Delpierre, P.; Dulinski, W.; Doroshenko, J.; Doucet, M.; Eijk, B. van; Fallou, A.; Fischer, P.; Fizzotti, F.; Kania, D.; Gan, K.K.; Grigoriev, E.; Hallewell, G.; Han, S.; Hartjes, F.; Hrubec, J.; Husson, D.; Kagan, H.; Kaplon, J.; Kass, R.; Knoepfle, K.T.; Koeth, T.; Krammer, M.; Logiudice, A.; Mac Lynne, L.; Manfredotti, C.; Meier, D.; Menichelli, D.; Meuser, S.; Mishina, M.; Moroni, L.; Noomen, J.; Oh, A.; Pan, L.S.; Pernicka, M.; Perera, L.; Riester, J.L.; Roe, S.; Rudge, A.; Russ, J.; Sala, S.; Sampietro, M.; Schnetzer, S.; Sciortino, S.; Stelzer, H.; Stone, R.; Suter, B.; Trischuk, W.; Tromson, D.; Vittone, E.; Weilhammer, P.; Wermes, N.; Wetstein, M.; Zeuner, W.; Zoeller, M

2003-03-21

Diamond is a promising sensor material for future collider experiments due to its radiation hardness. Diamond pixel sensors have been bump bonded to an ATLAS pixel readout chip using PbSn solder bumps. Single chip devices have been characterised by lab measurements and in a high-energy pion beam at CERN. Results on charge collection, spatial resolution, efficiency and the charge carrier lifetime are presented.

New results on diamond pixel sensors using ATLAS frontend electronics

Science.gov (United States)

Keil, M.; Adam, W.; Berdermann, E.; Bergonzo, P.; de Boer, W.; Bogani, F.; Borchi, E.; Brambilla, A.; Bruzzi, M.; Colledani, C.; Conway, J.; D'Angelo, P.; Dabrowski, W.; Delpierre, P.; Dulinski, W.; Doroshenko, J.; Doucet, M.; van Eijk, B.; Fallou, A.; Fischer, P.; Fizzotti, F.; Kania, D.; Gan, K. K.; Grigoriev, E.; Hallewell, G.; Han, S.; Hartjes, F.; Hrubec, J.; Husson, D.; Kagan, H.; Kaplon, J.; Kass, R.; Knöpfle, K. T.; Koeth, T.; Krammer, M.; Logiudice, A.; mac Lynne, L.; Manfredotti, C.; Meier, D.; Menichelli, D.; Meuser, S.; Mishina, M.; Moroni, L.; Noomen, J.; Oh, A.; Pan, L. S.; Pernicka, M.; Perera, L.; Riester, J. L.; Roe, S.; Rudge, A.; Russ, J.; Sala, S.; Sampietro, M.; Schnetzer, S.; Sciortino, S.; Stelzer, H.; Stone, R.; Suter, B.; Trischuk, W.; Tromson, D.; Vittone, E.; Weilhammer, P.; Wermes, N.; Wetstein, M.; Zeuner, W.; Zoeller, M.

2003-03-01

Diamond is a promising sensor material for future collider experiments due to its radiation hardness. Diamond pixel sensors have been bump bonded to an ATLAS pixel readout chip using PbSn solder bumps. Single chip devices have been characterised by lab measurements and in a high-energy pion beam at CERN. Results on charge collection, spatial resolution, efficiency and the charge carrier lifetime are presented.

Superconducting Microwave Resonator Arrays for Submillimeter/Far-Infrared Imaging

Science.gov (United States)

Noroozian, Omid

Superconducting microwave resonators have the potential to revolutionize submillimeter and far-infrared astronomy, and with it our understanding of the universe. The field of low-temperature detector technology has reached a point where extremely sensitive devices like transition-edge sensors are now capable of detecting radiation limited by the background noise of the universe. However, the size of these detector arrays are limited to only a few thousand pixels. This is because of the cost and complexity of fabricating large-scale arrays of these detectors that can reach up to 10 lithographic levels on chip, and the complicated SQUID-based multiplexing circuitry and wiring for readout of each detector. In order to make substantial progress, next-generation ground-based telescopes such as CCAT or future space telescopes require focal planes with large-scale detector arrays of 104--10 6 pixels. Arrays using microwave kinetic inductance detectors (MKID) are a potential solution. These arrays can be easily made with a single layer of superconducting metal film deposited on a silicon substrate and pattered using conventional optical lithography. Furthermore, MKIDs are inherently multiplexable in the frequency domain, allowing ˜ 10 3 detectors to be read out using a single coaxial transmission line and cryogenic amplifier, drastically reducing cost and complexity. An MKID uses the change in the microwave surface impedance of a superconducting thin-film microresonator to detect photons. Absorption of photons in the superconductor breaks Cooper pairs into quasiparticles, changing the complex surface impedance, which results in a perturbation of resonator frequency and quality factor. For excitation and readout, the resonator is weakly coupled to a transmission line. The complex amplitude of a microwave probe signal tuned on-resonance and transmitted on the feedline past the resonator is perturbed as photons are absorbed in the superconductor. The perturbation can be

Electron imaging with Medipix2 hybrid pixel detector

International Nuclear Information System (INIS)

McMullan, G.; Cattermole, D.M.; Chen, S.; Henderson, R.; Llopart, X.; Summerfield, C.; Tlustos, L.; Faruqi, A.R.

2007-01-01

The electron imaging performance of Medipix2 is described. Medipix2 is a hybrid pixel detector composed of two layers. It has a sensor layer and a layer of readout electronics, in which each 55 μmx55 μm pixel has upper and lower energy discrimination and MHz rate counting. The sensor layer consists of a 300 μm slab of pixellated monolithic silicon and this is bonded to the readout chip. Experimental measurement of the detective quantum efficiency, DQE(0) at 120 keV shows that it can reach ∼85% independent of electron exposure, since the detector has zero noise, and the DQE(Nyquist) can reach ∼35% of that expected for a perfect detector (4/π 2 ). Experimental measurement of the modulation transfer function (MTF) at Nyquist resolution for 120 keV electrons using a 60 keV lower energy threshold, yields a value that is 50% of that expected for a perfect detector (2/π). Finally, Monte Carlo simulations of electron tracks and energy deposited in adjacent pixels have been performed and used to calculate expected values for the MTF and DQE as a function of the threshold energy. The good agreement between theory and experiment allows suggestions for further improvements to be made with confidence. The present detector is already very useful for experiments that require a high DQE at very low doses

Electron imaging with Medipix2 hybrid pixel detector.

Science.gov (United States)

McMullan, G; Cattermole, D M; Chen, S; Henderson, R; Llopart, X; Summerfield, C; Tlustos, L; Faruqi, A R

2007-01-01

The electron imaging performance of Medipix2 is described. Medipix2 is a hybrid pixel detector composed of two layers. It has a sensor layer and a layer of readout electronics, in which each 55 microm x 55 microm pixel has upper and lower energy discrimination and MHz rate counting. The sensor layer consists of a 300 microm slab of pixellated monolithic silicon and this is bonded to the readout chip. Experimental measurement of the detective quantum efficiency, DQE(0) at 120 keV shows that it can reach approximately 85% independent of electron exposure, since the detector has zero noise, and the DQE(Nyquist) can reach approximately 35% of that expected for a perfect detector (4/pi(2)). Experimental measurement of the modulation transfer function (MTF) at Nyquist resolution for 120 keV electrons using a 60 keV lower energy threshold, yields a value that is 50% of that expected for a perfect detector (2/pi). Finally, Monte Carlo simulations of electron tracks and energy deposited in adjacent pixels have been performed and used to calculate expected values for the MTF and DQE as a function of the threshold energy. The good agreement between theory and experiment allows suggestions for further improvements to be made with confidence. The present detector is already very useful for experiments that require a high DQE at very low doses.

The NA60 experiment readout architecture

CERN Document Server

Floris, M; Usai, G L; David, A; Rosinsky, P; Ohnishi, H

2004-01-01

The NA60 experiment was designed to identify signatures of a new state of matter, the Quark Gluon Plasma, in heavy-ion collisions at the CERN Super Proton Synchroton. The apparatus is composed of four main detectors: a muon spectrometer (MS), a zero degree calorimeter (ZDC), a silicon vertex telescope (VT), and a silicon microstrip beam tracker (BT). The readout of the whole experiment is based on a PCI architecture. The basic unit is a general purpose PCI card, interfaced to the different subdetectors via custom mezzanine cards. This allowed us to successfully implement several completely different readout protocols (from the VME like protocol of the MS to the custom protocol of the pixel telescope). The system was fully tested with proton and ion beams, and several million events were collected in 2002 and 2003. This paper presents the readout architecture of NA60, with particular emphasis on the PCI layer common to all the subdetectors. (16 refs).

Thin hybrid pixel assembly fabrication development with backside compensation layer

Energy Technology Data Exchange (ETDEWEB)

Bates, R., E-mail: richard.bates@glasgow.ac.uk [Experimental Particle Physics Group, SUPA School of Physics and Astronomy, The University of Glasgow, Glasgow G12 8QQ (United Kingdom); Buttar, C.; McMullen, T.; Cunningham, L.; Ashby, J.; Doherty, F. [Experimental Particle Physics Group, SUPA School of Physics and Astronomy, The University of Glasgow, Glasgow G12 8QQ (United Kingdom); Pares, G.; Vignoud, L.; Kholti, B. [CEA Leti, MINATEC, 17 rue des Martyrs, F38054, Grenoble (France); Vahanen, S. [Advacam Oy, Tietotie 3, 02150 Espoo (Finland)

2017-02-11

The ATLAS and CMS experiments will both replace their entire tracking systems for operation at the HL-LHC in 2026. This will include a significantly larger pixel systems, for example, for ATLAS approximately 15 m{sup 2}. To keep the tracker material budget low it is crucial to minimize the mass of the pixel modules via thinning both the sensor and readout chip to about 150 μm each. The bump yield of thin module assemblies using solder based bump bonding can be problematic due to wafer bowing during solder reflow at high temperature. A new bump-bonding process using backside compensation on the readout chip to address the issue of low yield will be presented. The objective is to compensate dynamically the stress of the front side stack by adding a compensating layer to the backside of the wafer. A SiN and Al:Si stack has been chosen for the backside layer. The bow reducing effect of applying a backside compensation layer will be demonstrated using the FE-I4 wafer. The world's first results from assemblies produced from readout wafers thinned to 100 μm with a stress compensation layer are presented with bond yields close to 100% measured using the FE-I4 readout chip.

Evaluation of a SiPM array detector coupled to a LFS-3 pixellated scintillator for PET/MR applications

International Nuclear Information System (INIS)

David, Stratos; Fysikopoulos, Eleftherios; Georgiou, Maria; Loudos, George

2015-01-01

SiPM arrays are insensitive to magnetic fields and thus good candidates for hybrid PET/MR imaging systems. Moreover, due to their small size and flexibility can be used in dedicated small field of view small animal imaging detectors and especially in head PET/MR studies in mice. Co-doped LFS-3 scintillator crystals have higher light yield and slightly faster response than that of LSO:Ce mainly due to the co-doped activation of emission centers with varying materials such as Ce, Gd, Sc, Y, La, Tb, or Ca distributed at the molecular scale through the lutetium silicate crystal host. The purpose of this study is to investigate the behavior of the SensL ArraySL-4 (4x4 element array of 3x3 mm 2 silicon photomultipliers) optical detector coupled to a 6x6 LFS-3 scintillator array, with 2x2x5 mm 3 crystal size elements, for possible applications in small field of view PET/MR imaging detectors. We have designed a symmetric resistive charge division circuit to read out the signal outputs of 4x4 pixel SiPM array reducing the 16 pixel outputs of the photodetector to 4 position signals. The 4 position signals were digitized using free running Analog to Digital Converters. The ADCs sampling rate was 50 MHz. An FPGA (Spartan 6 LX150T) was used for triggering and digital signal processing of the pulses. Experimental evaluation was carried out with 22 Na radioactive source and the parameters studied where energy resolution and peak to valley ratio. The first preliminary results of the evaluation shows a clear visualization of the discrete 2x2x5 mm 3 LFS-3 scintillator elements. The mean peak to valley ratio of the horizontal profiles on the raw image was measured equal to 11 while the energy resolution was calculated equal to 30% at the central pixels.

Evaluation of a SiPM array detector coupled to a LFS-3 pixellated scintillator for PET/MR applications

Energy Technology Data Exchange (ETDEWEB)

David, Stratos; Fysikopoulos, Eleftherios [Technological Educational Institute of Athens (Greece); Georgiou, Maria [Technological Educational Institute of Athens (Greece); Department of Medical School, University of Thessaly, Larissa (Greece); Loudos, George [Technological Educational Institute of Athens (Greece)

2015-05-18

SiPM arrays are insensitive to magnetic fields and thus good candidates for hybrid PET/MR imaging systems. Moreover, due to their small size and flexibility can be used in dedicated small field of view small animal imaging detectors and especially in head PET/MR studies in mice. Co-doped LFS-3 scintillator crystals have higher light yield and slightly faster response than that of LSO:Ce mainly due to the co-doped activation of emission centers with varying materials such as Ce, Gd, Sc, Y, La, Tb, or Ca distributed at the molecular scale through the lutetium silicate crystal host. The purpose of this study is to investigate the behavior of the SensL ArraySL-4 (4x4 element array of 3x3 mm{sup 2} silicon photomultipliers) optical detector coupled to a 6x6 LFS-3 scintillator array, with 2x2x5 mm{sup 3} crystal size elements, for possible applications in small field of view PET/MR imaging detectors. We have designed a symmetric resistive charge division circuit to read out the signal outputs of 4x4 pixel SiPM array reducing the 16 pixel outputs of the photodetector to 4 position signals. The 4 position signals were digitized using free running Analog to Digital Converters. The ADCs sampling rate was 50 MHz. An FPGA (Spartan 6 LX150T) was used for triggering and digital signal processing of the pulses. Experimental evaluation was carried out with {sup 22}Na radioactive source and the parameters studied where energy resolution and peak to valley ratio. The first preliminary results of the evaluation shows a clear visualization of the discrete 2x2x5 mm{sup 3} LFS-3 scintillator elements. The mean peak to valley ratio of the horizontal profiles on the raw image was measured equal to 11 while the energy resolution was calculated equal to 30% at the central pixels.

JPL CMOS Active Pixel Sensor Technology

Science.gov (United States)

Fossum, E. R.

1995-01-01

This paper will present the JPL-developed complementary metal- oxide-semiconductor (CMOS) active pixel sensor (APS) technology. The CMOS APS has achieved performance comparable to charge coupled devices, yet features ultra low power operation, random access readout, on-chip timing and control, and on-chip analog to digital conversion. Previously published open literature will be reviewed.

Assembly and Integration Process of the First High Density Detector Array for the Atacama Cosmology Telescope

Science.gov (United States)

Li, Yaqiong; Choi, Steve; Ho, Shuay-Pwu; Crowley, Kevin T.; Salatino, Maria; Simon, Sara M.; Staggs, Suzanne T.; Nati, Federico; Wollack, Edward J.

2016-01-01

The Advanced ACTPol (AdvACT) upgrade on the Atacama Cosmology Telescope (ACT) consists of multichroicTransition Edge Sensor (TES) detector arrays to measure the Cosmic Microwave Background (CMB) polarization anisotropies in multiple frequency bands. The first AdvACT detector array, sensitive to both 150 and 230 GHz, is fabricated on a 150 mm diameter wafer and read out with a completely different scheme compared to ACTPol. Approximately 2000 TES bolometers are packed into the wafer leading to both a much denser detector density and readout circuitry. The demonstration of the assembly and integration of the AdvACT arrays is important for the next generation CMB experiments, which will continue to increase the pixel number and density. We present the detailed assembly process of the first AdvACT detector array.

Initial performance of the two-dimensional 1024-channel amplifier array

International Nuclear Information System (INIS)

Kishishita, Tetsuichi; Ikeda, Hirokazu; Tamura, Ken-ichi; Hiruta, Tatsuro; Nakazawa, Kazuhiro; Takashima, Takeshi; Takahashi, Tadayuki

2007-01-01

This paper describes the initial performance of a two-dimensional analog ASIC that has been developed to read out CdTe pixel detectors for the next-generation hard X-ray imager. The readout chip consists of a 32x32 matrix of identical 200μmx200μm pixel cells. Each readout cell contains a low noise charge-sensitive amplifier, three-stage pulse shaping amplifiers and a comparator circuit. Pulse processing circuits have been also designed to achieve lower power consumption for the space application. Analog outputs by injecting a test pulse have been obtained from 991 pixels out of 1024 pixels. The mean noise level is 297+/-29 electrons (rms) and power consumption is 110μW/pixel

Development and clinical evaluation of an ionization chamber array with 3.5 mm pixel pitch for quality assurance in advanced radiotherapy techniques.

Science.gov (United States)

Togno, M; Wilkens, J J; Menichelli, D; Oechsner, M; Perez-Andujar, A; Morin, O

2016-05-01

To characterize a new air vented ionization chamber technology, suitable to build detector arrays with small pixel pitch and independence of sensitivity on dose per pulse. The prototype under test is a linear array of air vented ionization chambers, consisting of 80 pixels with 3.5 mm pixel pitch distance and a sensitive volume of about 4 mm(3). The detector has been characterized with (60)Co radiation and MV x rays from different linear accelerators (with flattened and unflattened beam qualities). Sensitivity dependence on dose per pulse has been evaluated under MV x rays by changing both the source to detector distance and the beam quality. Bias voltage has been varied in order to evaluate the charge collection efficiency in the most critical conditions. Relative dose profiles have been measured for both flattened and unflattened distributions with different field sizes. The reference detectors were a commercial array of ionization chambers and an amorphous silicon flat panel in direct conversion configuration. Profiles of dose distribution have been measured also with intensity modulated radiation therapy (IMRT), stereotactic radiosurgery (SRS), and volumetric modulated arc therapy (VMAT) patient plans. Comparison has been done with a commercial diode array and with Gafchromic EBT3 films. Repeatability and stability under continuous gamma irradiation are within 0.3%, in spite of low active volume and sensitivity (∼200 pC/Gy). Deviation from linearity is in the range [0.3%, -0.9%] for a dose of at least 20 cGy, while a worsening of linearity is observed below 10 cGy. Charge collection efficiency with 2.67 mGy/pulse is higher than 99%, leading to a ±0.9% sensitivity change in the range 0.09-2.67 mGy/pulse (covering all flattened and unflattened beam qualities). Tissue to phantom ratios show an agreement within 0.6% with the reference detector up to 34 cm depth. For field sizes in the range 2 × 2 to 15 × 15 cm(2), the output factors are in agreement with a

Development and clinical evaluation of an ionization chamber array with 3.5 mm pixel pitch for quality assurance in advanced radiotherapy techniques

Energy Technology Data Exchange (ETDEWEB)

Togno, M., E-mail: michele.togno@iba-group.com [Physik-Department, Technische Universität München, Munich 85748 (Germany); Department of Radiation Oncology, Technische Universität München, Klinikum rechts der Isar, Munich 81675 (Germany); IBA Dosimetry GmbH, Schwarzenbruck 90592 (Germany); Wilkens, J. J. [Physik-Department, Technische Universität München, Munich 85748, Germany and Department of Radiation Oncology, Technische Universität München, Klinikum rechts der Isar, Munich 81675 (Germany); Menichelli, D. [IBA Dosimetry GmbH, Schwarzenbruck 90592 (Germany); Oechsner, M. [Department of Radiation Oncology, Technische Universität München, Klinikum rechts der Isar, Munich 81675 (Germany); Perez-Andujar, A.; Morin, O. [Department of Radiation Oncology, University of California, San Francisco, San Francisco, California 94143 (United States)

2016-05-15

Purpose: To characterize a new air vented ionization chamber technology, suitable to build detector arrays with small pixel pitch and independence of sensitivity on dose per pulse. Methods: The prototype under test is a linear array of air vented ionization chambers, consisting of 80 pixels with 3.5 mm pixel pitch distance and a sensitive volume of about 4 mm{sup 3}. The detector has been characterized with {sup 60}Co radiation and MV x rays from different linear accelerators (with flattened and unflattened beam qualities). Sensitivity dependence on dose per pulse has been evaluated under MV x rays by changing both the source to detector distance and the beam quality. Bias voltage has been varied in order to evaluate the charge collection efficiency in the most critical conditions. Relative dose profiles have been measured for both flattened and unflattened distributions with different field sizes. The reference detectors were a commercial array of ionization chambers and an amorphous silicon flat panel in direct conversion configuration. Profiles of dose distribution have been measured also with intensity modulated radiation therapy (IMRT), stereotactic radiosurgery (SRS), and volumetric modulated arc therapy (VMAT) patient plans. Comparison has been done with a commercial diode array and with Gafchromic EBT3 films. Results: Repeatability and stability under continuous gamma irradiation are within 0.3%, in spite of low active volume and sensitivity (∼200 pC/Gy). Deviation from linearity is in the range [0.3%, −0.9%] for a dose of at least 20 cGy, while a worsening of linearity is observed below 10 cGy. Charge collection efficiency with 2.67 mGy/pulse is higher than 99%, leading to a ±0.9% sensitivity change in the range 0.09–2.67 mGy/pulse (covering all flattened and unflattened beam qualities). Tissue to phantom ratios show an agreement within 0.6% with the reference detector up to 34 cm depth. For field sizes in the range 2 × 2 to 15 × 15 cm{sup 2}, the

LHC-rate beam test of CMS pixel barrel modules

International Nuclear Information System (INIS)

Erdmann, W.; Hoermann, Ch.; Kotlinski, D.; Horisberger, R.; Kaestli, H. Chr.; Gabathuler, K.; Bertl, W.; Meier, B.; Langenegger, U.; Trueeb, P.; Rohe, T.

2007-01-01

Modules for the CMS pixel barrel detector have been operated in a high rate pion beam at PSI in order to verify under LHC-like conditions the final module design for the production. The test beam provided charged particle rates up to 10 8 cm -2 s -1 over the full module area. Bunch structure and randomized high trigger rates simulated realistic operation. A four layer telescope made of single pixel readout chip assemblies provided tracking needed for the determination of the modules hit reconstruction efficiency. The performance of the modules has been shown to be adequate for the CMS pixel barrel

First considerations for a readout system for the ILD TPC with the Timepix3

Energy Technology Data Exchange (ETDEWEB)

Schiffer, Tobias [Universitaet Bonn (Germany); Collaboration: LCTPC-Deutschland-Collaboration

2016-07-01

For the planned International Linear Collider (ILC) two detectors are proposed. One of them, the International Large Detector (ILD) uses a Time Projektion Chamber (TPC) as the main tracking device. As a readout system for this TPC, pixel chips are one of the considered options. An integrated Micromegas stage is foreseen as gas amplification stage, which is built directly on top of the chip. Since first tests of a Pixel-TPC with 160 Timepix ASICs showed promising results, one is interested in developing a detector using the Timepix3 ASIC. It has several advantages, first of all its feature to measure ToT and a ToA at the same time and its significantly increased readout rate. For this purpose a readout system needs to be developed which fulfils the requirements of the Timpix3 ASIC and also has a high scalability. The main challenges are the high speed readout with a clock of up to 640 MHz and the reliability of the system. Also, the data driven as well as the frame-based readout of the Timepix3 needs to be considered for the implementation. The main goal is to provide a fast and parallel readout of several million channels. An overview and the status of the planning is given. Also, the development challenges are discussed.

Development of n-in-p pixel modules for the ATLAS Upgrade at HL-LHC

CERN Document Server

Macchiolo, Anna; Savic, Natascha; Terzo, Stefano

2016-09-21

Thin planar pixel modules are promising candidates to instrument the inner layers of the new ATLAS pixel detector for HL-LHC, thanks to the reduced contribution to the material budget and their high charge collection efficiency after irradiation. 100-200 $\\mu$m thick sensors, interconnected to FE-I4 read-out chips, have been characterized with radioactive sources and beam tests at the CERN-SPS and DESY. The results of these measurements are reported for devices before and after irradiation up to a fluence of $14\\times10^{15}$ n$_{eq}$/cm$^2$. The charge collection and tracking efficiency of the different sensor thicknesses are compared. The outlook for future planar pixel sensor production is discussed, with a focus on sensor design with the pixel pitches (50x50 and 25x100 $\\mu$m$^2$) foreseen for the RD53 Collaboration read-out chip in 65 nm CMOS technology. An optimization of the biasing structures in the pixel cells is required to avoid the hit efficiency loss presently observed in the punch-through region...

Design of fundamental building blocks for fast binary readout CMOS sensors used in high-energy physics experiments

Energy Technology Data Exchange (ETDEWEB)

Degerli, Yavuz [CEA Saclay, IRFU/SEDI, 91191 Gif-sur-Yvette Cedex (France)], E-mail: degerli@cea.fr

2009-04-21

In this paper, design details of key building blocks for fast binary readout CMOS monolithic active pixel sensors developed for charged particle detection are presented. Firstly, an all-NMOS pixel architecture with in-pixel amplification and reset noise suppression which allows fast readout is presented. This pixel achieves high charge-to-voltage conversion factors (CVF) using a few number of transistors inside the pixel. It uses a pre-amplifying stage close to the detector and a simple double sampling (DS) circuitry to store the reset level of the detector. The DS removes the offset mismatches of amplifiers and the reset noise of the detector. Offset mismatches of the source follower are also corrected by a second column-level DS stage. The second important building block of these sensors, a low-power auto-zeroed column-level discriminator, is also presented. These two blocks transform the charge of the impinging particle into binary data. Finally, some experimental results obtained on CMOS chips designed using these blocks are presented.

Performance Studies of Pixel Hybrid Photon Detectors for the LHCb RICH Counters

CERN Document Server

Aglieri Rinella, G; Piedigrossi, D; Van Lysebetten, A

2004-01-01

The Pixel Hybrid Photon Detector is a vacuum tube with a multi-alkali photo cathode, high voltage cross-focused electron optics and an anode consisting of a silicon pixel detector bump-bonded to a readout CMOS electronic chip fully encapsulated in the device. The Pixel HPD fulfils the requirements of the Ring Imaging Cherenkov counters of the LHCb experiment at LHC. The performances of the Pixel HPD will be discussed with reference to laboratory measurements, Cherenkov light imaging in recent beam tests, image distortions due to a magnetic field.

An investigation on continuous depth-of-interaction detection using a monolithic scintillator with single-ended readout

International Nuclear Information System (INIS)

Zhang, H; Zhou, R; Yang, C

2014-01-01

PET detectors with depth-of-interaction (DOI) capability have been studied to improve imaging resolution widely over the world. Since discrete DOI and continuous DOI detection with dual-ended readout technology have their respective limitations, we in this work focus on the continuous DOI detection with single-ended readout using a monolithic LSO scintillator and a multi-pixel photodetector. Based on a non-linear least squares data fitting method and Geant4 simulation, we studied the relationship between the spatial resolution of gamma positioning and the pixel number of photodetector. The results show that for a pixel number larger than 6x6, the positioning spatial resolution does not become significantly better when increasing the pixel number moreover. Another aspect studied is the effect of crystal thickness on the spatial resolution. Increasing the thickness of crystal leads to higher detection efficiency but lower spatial resolution

A Cherenkov camera with integrated electronics based on the 'Smart Pixel' concept

International Nuclear Information System (INIS)

Bulian, Norbert; Hirsch, Thomas; Hofmann, Werner; Kihm, Thomas; Kohnle, Antje; Panter, Michael; Stein, Michael

2000-01-01

An option for the cameras of the HESS telescopes, the concept of a modular camera based on 'Smart Pixels' was developed. A Smart Pixel contains the photomultiplier, the high voltage supply for the photomultiplier, a dual-gain sample-and-hold circuit with a 14 bit dynamic range, a time-to-voltage converter, a trigger discriminator, trigger logic to detect a coincidence of X=1...7 neighboring pixels, and an analog ratemeter. The Smart Pixels plug into a common backplane which provides power, communicates trigger signals between neighboring pixels, and holds a digital control bus as well as an analog bus for multiplexed readout of pixel signals. The performance of the Smart Pixels has been studied using a 19-pixel test camera

Leakage analysis of crossbar memristor arrays

KAUST Repository

Zidan, Mohammed A.; Salem, Ahmed Sultan; Fahmy, Hossam Aly Hassan; Salama, Khaled N.

2014-01-01

the readout operation. In this work we study the trade-off between the crossbar array density and the power consumption required for its readout. Our analysis is based on simulating full memristor arrays on a SPICE platform.

A Versatile Multichannel Digital Signal Processing Module for Microcalorimeter Arrays

Science.gov (United States)

Tan, H.; Collins, J. W.; Walby, M.; Hennig, W.; Warburton, W. K.; Grudberg, P.

2012-06-01

Different techniques have been developed for reading out microcalorimeter sensor arrays: individual outputs for small arrays, and time-division or frequency-division or code-division multiplexing for large arrays. Typically, raw waveform data are first read out from the arrays using one of these techniques and then stored on computer hard drives for offline optimum filtering, leading not only to requirements for large storage space but also limitations on achievable count rate. Thus, a read-out module that is capable of processing microcalorimeter signals in real time will be highly desirable. We have developed multichannel digital signal processing electronics that are capable of on-board, real time processing of microcalorimeter sensor signals from multiplexed or individual pixel arrays. It is a 3U PXI module consisting of a standardized core processor board and a set of daughter boards. Each daughter board is designed to interface a specific type of microcalorimeter array to the core processor. The combination of the standardized core plus this set of easily designed and modified daughter boards results in a versatile data acquisition module that not only can easily expand to future detector systems, but is also low cost. In this paper, we first present the core processor/daughter board architecture, and then report the performance of an 8-channel daughter board, which digitizes individual pixel outputs at 1 MSPS with 16-bit precision. We will also introduce a time-division multiplexing type daughter board, which takes in time-division multiplexing signals through fiber-optic cables and then processes the digital signals to generate energy spectra in real time.

Development of the quality control system of the readout electronics for the large size telescope of the Cherenkov Telescope Array observatory

Energy Technology Data Exchange (ETDEWEB)

Konno, Y.; Kubo, H.; Masuda, S. [Department of Physics, Graduate School of Science, Kyoto University, Kyoto (Japan); Paoletti, R.; Poulios, S. [SFTA Department, Physics Section, University of Siena and INFN, Siena (Italy); Rugliancich, A., E-mail: andrea.rugliancich@pi.infn.it [SFTA Department, Physics Section, University of Siena and INFN, Siena (Italy); Saito, T. [Department of Physics, Graduate School of Science, Kyoto University, Kyoto (Japan)

2016-07-11

The Cherenkov Telescope Array (CTA) is the next generation VHE γ-ray observatory which will improve the currently available sensitivity by a factor of 10 in the range 100 GeV to 10 TeV. The array consists of different types of telescopes, called large size telescope (LST), medium size telescope (MST) and small size telescope (SST). A LST prototype is currently being built and will be installed at the Observatorio Roque de los Muchachos, island of La Palma, Canary islands, Spain. The readout system for the LST prototype has been designed and around 300 readout boards will be produced in the coming months. In this note we describe an automated quality control system able to measure basic performance parameters and quickly identify faulty boards. - Highlights: • The Dragon Board is part of the DAQ of the LST Cherenkov telescope prototype. • We developed an automated quality control system for the Dragon Board. • We check pedestal, linearity, pulse shape and crosstalk values. • The quality control test can be performed on the production line.

Fully Integrated Linear Single Photon Avalanche Diode (SPAD) Array with Parallel Readout Circuit in a Standard 180 nm CMOS Process

Science.gov (United States)

Isaak, S.; Bull, S.; Pitter, M. C.; Harrison, Ian.

2011-05-01

This paper reports on the development of a SPAD device and its subsequent use in an actively quenched single photon counting imaging system, and was fabricated in a UMC 0.18 μm CMOS process. A low-doped p- guard ring (t-well layer) encircling the active area to prevent the premature reverse breakdown. The array is a 16×1 parallel output SPAD array, which comprises of an active quenched SPAD circuit in each pixel with the current value being set by an external resistor RRef = 300 kΩ. The SPAD I-V response, ID was found to slowly increase until VBD was reached at excess bias voltage, Ve = 11.03 V, and then rapidly increase due to avalanche multiplication. Digital circuitry to control the SPAD array and perform the necessary data processing was designed in VHDL and implemented on a FPGA chip. At room temperature, the dark count was found to be approximately 13 KHz for most of the 16 SPAD pixels and the dead time was estimated to be 40 ns.

A compact 16-module camera using 64-pixel CsI(Tl)/Si p-i-n photodiode imaging modules

Science.gov (United States)

Choong, W.-S.; Gruber, G. J.; Moses, W. W.; Derenzo, S. E.; Holland, S. E.; Pedrali-Noy, M.; Krieger, B.; Mandelli, E.; Meddeler, G.; Wang, N. W.; Witt, E. K.

2002-10-01

We present a compact, configurable scintillation camera employing a maximum of 16 individual 64-pixel imaging modules resulting in a 1024-pixel camera covering an area of 9.6 cm/spl times/9.6 cm. The 64-pixel imaging module consists of optically isolated 3 mm/spl times/3 mm/spl times/5 mm CsI(Tl) crystals coupled to a custom array of Si p-i-n photodiodes read out by a custom integrated circuit (IC). Each imaging module plugs into a readout motherboard that controls the modules and interfaces with a data acquisition card inside a computer. For a given event, the motherboard employs a custom winner-take-all IC to identify the module with the largest analog output and to enable the output address bits of the corresponding module's readout IC. These address bits identify the "winner" pixel within the "winner" module. The peak of the largest analog signal is found and held using a peak detect circuit, after which it is acquired by an analog-to-digital converter on the data acquisition card. The camera is currently operated with four imaging modules in order to characterize its performance. At room temperature, the camera demonstrates an average energy resolution of 13.4% full-width at half-maximum (FWHM) for the 140-keV emissions of /sup 99m/Tc. The system spatial resolution is measured using a capillary tube with an inner diameter of 0.7 mm and located 10 cm from the face of the collimator. Images of the line source in air exhibit average system spatial resolutions of 8.7- and 11.2-mm FWHM when using an all-purpose and high-sensitivity parallel hexagonal holes collimator, respectively. These values do not change significantly when an acrylic scattering block is placed between the line source and the camera.

Module and electronics developments for the ATLAS ITK pixel system

CERN Document Server

Nellist, Clara; The ATLAS collaboration

2016-01-01

Summary ATLAS is preparing for an extensive modification of its detector in the course of the planned HL‐ LHC accelerator upgrade around 2025 which includes a replacement of the entire tracking system by an all‐silicon detector (Inner Tracker, ITk). A revised trigger and data taking system is foreseen with triggers expected at lowest level at an average rate of 1 MHz. The five innermost layers of ITk will comprise of a pixel detector built of new sensor and readout electronics technologies to improve the tracking performance and cope with the severe HL‐LHC environment in terms of occupancy and radiation. The total area of the new pixel system could measure up to 14 m2, depending on the final layout choice that is expected to take place in early 2017. A new on‐detector readout chip is designed in the context of the RD53 collaboration in 65 nm CMOS technology. This paper will present the on‐going R&D within the ATLAS ITK project towards the new pixel modules and the off‐detector electronics. Pla...

A 9-Channel, 100 ps LSB Time-to-Digital Converter for the NA62 Gigatracker Readout ASIC (TDCpix)

International Nuclear Information System (INIS)

Perktold, L; Rinella, G Aglieri; Noy, M; Kluge, A; Kloukinas, K; Kaplon, J; Jarron, P; Morel, M; Fiorini, M; Martin, E

2012-01-01

The TDCpix ASIC is the readout chip for the Gigatracker station of the NA62 experiment. Each station of the Gigatracker needs to provide time stamping of individual particles to 200 ps-rms or better. Bump-bonded to the pixel sensor the ASIC serves an array of 40 columns x 40 pixels. The high precision time measurement of the discriminated hit signals is accomplished with a set of 40 TDCs sitting in the End-Of-Column region of the ASIC. Each TDC provides 9 channels per column. For the time-to-digital converter (TDC) a delay-locked-loop (DLL) approach is employed to achieve a constant time binning of 100 ps. Simulation results show that an average rms time resolution of 33 ps with a power consumption of the TDC better than 33 mW per column is achieved. This contribution will present the design, simulation results and implementation challenges of the TDC.

Tailoring the High-Q LC Filter Arrays for Readout of Kilo-Pixel TES Arrays in the SPICA-SAFARI Instrument

Science.gov (United States)

Bruijn, M. P.; Gottardi, L.; den Hartog, R. H.; van der Kuur, J.; van der Linden, A. J.; Jackson, B. D.

2014-08-01

Following earlier presentations of arrays of high quality factor (Q 10.000) superconducting resonators in the MHz regime, we report on improvement of the packing density of resonance frequencies to 160 in the 1-3 MHz band. Spread in the spacing of resonances is found to be limited to 1 kHz (1 with the present fabrication procedure. The present packing density of frequencies and chip area approaches the requirements for the SAFARI instrument on the SPICA mission (in preparation). The a-Si:H dielectric layer in the planar S-I-S capacitors shows a presently unexplained apparent negative effective series resistance, depending on operating temperature and applied testing voltage.

Multi-Anode Photomultplier (MAPMT) readout for High Granularity Calorimeters

CERN Document Server

Mkrtchyan, Tigran; The ATLAS collaboration

2017-01-01

Hadron calorimeter high performance in jet sub-structure measurements can be achieved for objects with $p_{T}$ greater than 1 TeV if the readout geometry is finely segmented in $\\Delta\\eta \\times \\Delta\\phi$. A feasibility study to increase the readout granularity of TileCal, the central hadron calorimeter of the ATLAS detector, is presented. We show a preliminary study exploring the possibility to increase by a factor 4 the present readout granularity of the inner layer cells of TileCal (0.1->0.025 in $\\Delta\\eta$) and to split into two layers the intermediate section of TileCal. The proposed solution is designed to cope with mechanical and readout bandwidth and power constraints. Assuming that the mechanics of the Tile modules cannot be changed, Multi-Anode PMTs with same boundary geometry of the present single-anode PMTs are considered to readout WLS bers, ideally one per pixel, carrying the signals from the individual scintillating tiles of each detector cells. The discussed challenges of the design are: ...

The upgraded Pixel Detector of the ATLAS experiment for Run-2 at the Large Hadron Collider

CERN Document Server

Giordani, MarioPaolo; The ATLAS collaboration

2016-01-01

Run-2 of the LHC is providing new challenges to track and vertex reconstruction with higher energies, denser jets and higher rates. Therefore the ATLAS experiment has constructed the first 4-layer Pixel detector in HEP, installing a new Pixel layer, also called Insertable B-Layer (IBL). IBL is a fourth layer of pixel detectors, and has been installed in May 2014 at a radius of 3.3 cm between the existing Pixel Detector and a new smaller radius beam-pipe. The new detector, built to cope with high radiation and expected occupancy, is the first large scale application of 3D detectors and CMOS 130nm technology. In addition the Pixel detector was refurbished with a new service quarter panel to recover about 3% of defective modules lost during run-1 and a new optical readout system to readout the data at higher speed while reducing the occupancy when running with increased luminosity. The commissioning and performance of the 4-layer Pixel Detector, in particular the IBL, will be presented, using collision data.

Leakage analysis of crossbar memristor arrays

KAUST Repository

Zidan, Mohammed A.

2014-07-01

Crossbar memristor arrays provide a promising high density alternative for the current memory and storage technologies. These arrays suffer from parasitic current components that significantly increase the power consumption, and could ruin the readout operation. In this work we study the trade-off between the crossbar array density and the power consumption required for its readout. Our analysis is based on simulating full memristor arrays on a SPICE platform.

GigaTracker, a Thin and Fast Silicon Pixels Tracker

CERN Document Server

Velghe, Bob; Bonacini, Sandro; Ceccucci, Augusto; Kaplon, Jan; Kluge, Alexander; Mapelli, Alessandro; Morel, Michel; Noël, Jérôme; Noy, Matthew; Perktold, Lukas; Petagna, Paolo; Poltorak, Karolina; Riedler, Petra; Romagnoli, Giulia; Chiozzi, Stefano; Cotta Ramusino, Angelo; Fiorini, Massimiliano; Gianoli, Alberto; Petrucci, Ferruccio; Wahl, Heinrich; Arcidiacono, Roberta; Jarron, Pierre; Marchetto, Flavio; Gil, Eduardo Cortina; Nuessle, Georg; Szilasi, Nicolas

2014-01-01

GigaTracker, the NA62’s upstream spectrometer, plays a key role in the kinematically constrained background suppression for the study of the K + ! p + n ̄ n decay. It is made of three independent stations, each of which is a six by three cm 2 hybrid silicon pixels detector. To meet the NA62 physics goals, GigaTracker has to address challenging requirements. The hit time resolution must be better than 200 ps while keeping the total thickness of the sensor to less than 0.5 mm silicon equivalent. The 200 μm thick sensor is divided into 18000 300 μm 300 μm pixels bump-bounded to ten independent read-out chips. The chips use an end-of-column architecture and rely on time-over- threshold discriminators. A station can handle a crossing rate of 750 MHz. Microchannel cooling technology will be used to cool the assembly. It allows us to keep the sensor close to 0 C with 130 μm of silicon in the beam area. The sensor and read-out chip performance were validated using a 45 pixel demonstrator with a laser test setu...

Semiconductor micropattern pixel detectors: a review of the beginnings

International Nuclear Information System (INIS)

Heijne, E.H.M.

2001-01-01

The innovation in monolithic and hybrid semiconductor 'micropattern' or 'reactive' pixel detectors for tracking in particle physics was actually to fit logic and pulse processing electronics with μW power on a pixel area of less than 0.04 mm 2 , retaining the characteristics of a traditional nuclear amplifier chain. The ns timing precision in conjunction with local memory and logic operations allowed event selection at >10 MHz rates with unambiguous track reconstruction even at particle multiplicities >10 cm -2 . The noise in a channel was ∼100e - rms and enabled binary operation with random noise 'hits' at a level -8 . Rectangular pixels from 75 μmx500 μm down to 34 μmx125 μm have been used by different teams. In binary mode a tracking precision from 6 to 14 μm was obtained, and using analog interpolation one came close to 1 μm. Earlier work, still based on charge integrating imaging circuits, provided a starting point. Two systems each with more than 1 million sensor + readout channels have been built, for WA97-NA57 and for the Delphi very forward tracker. The use of 0.5 μm and 0.25 μm CMOS and enclosed geometry for the transistors in the pixel readout chips resulted in radiation hardness of ∼2 Mrad, respectively, >30 Mrad

Robustness of the ATLAS pixel clustering neural network algorithm

CERN Document Server

AUTHOR|(INSPIRE)INSPIRE-00407780; The ATLAS collaboration

2016-01-01

Proton-proton collisions at the energy frontier puts strong constraints on track reconstruction algorithms. The algorithms depend heavily on accurate estimation of the position of particles as they traverse the inner detector elements. An artificial neural network algorithm is utilised to identify and split clusters of neighbouring read-out elements in the ATLAS pixel detector created by multiple charged particles. The method recovers otherwise lost tracks in dense environments where particles are separated by distances comparable to the size of the detector read-out elements. Such environments are highly relevant for LHC run 2, e.g. in searches for heavy resonances. Within the scope of run 2 track reconstruction performance and upgrades, the robustness of the neural network algorithm will be presented. The robustness has been studied by evaluating the stability of the algorithm’s performance under a range of variations in the pixel detector conditions.

Charge Gain, Voltage Gain, and Node Capacitance of the SAPHIRA Detector Pixel by Pixel

Science.gov (United States)

Pastrana, Izabella M.; Hall, Donald N. B.; Baker, Ian M.; Jacobson, Shane M.; Goebel, Sean B.

2018-01-01

The University of Hawai`i Institute for Astronomy has partnered with Leonardo (formerly Selex) in the development of HgCdTe linear mode avalanche photodiode (L-APD) SAPHIRA detectors. The SAPHIRA (Selex Avalanche Photodiode High-speed Infra-Red Array) is ideally suited for photon-starved astronomical observations, particularly near infrared (NIR) adaptive optics (AO) wave-front sensing. I have measured the stability, and linearity with current, of a 1.7-um (10% spectral bandpass) infrared light emitting diode (IR LED) used to illuminate the SAPHIRA and have then utilized this source to determine the charge gain (in e-/ADU), voltage gain (in uV/ADU), and node capacitance (in fF) for each pixel of the 320x256@24um SAPHIRA. These have previously only been averages over some sub-array. Determined from the ratio of the temporal averaged signal level to variance under constant 1.7-um LED illumination, I present the charge gain pixel-by-pixel in a 64x64 sub-array at the center of the active area of the SAPHIRA (analyzed separately as four 32x32 sub-arrays) to be about 1.6 e-/ADU (σ=0.5 e-/ADU). Additionally, the standard technique of varying the pixel reset voltage (PRV) in 10 mV increments and recording output frames for the same 64x64 subarray found the voltage gain per pixel to be about 11.7 uV/ADU (σ=0.2 uV/ADU). Finally, node capacitance was found to be approximately 23 fF (σ=6 fF) utilizing the aforementioned charge and voltage gain measurements. I further discuss the linearity measurements of the 1.7-um LED used in the charge gain characterization procedure.

Integration of the CMS Phase 1 Pixel Detector

CERN Document Server

Kornmayer, Andreas

2018-01-01

During the extended year-end technical stop 2016/17 the CMS Pixel Detector has been replaced. The new Phase 1 Pixel Detector is designed for a luminosity that could exceed $\\text{L} = 2x10^{34} cm^{−2}s^{−1}$. With one additional layer in the barrel and the forward region of the new detector, combined with the higher hit rates as the LHC luminosity increases, these conditions called for an upgrade of the data acquisition system, which was realised based on the $\\mu$TCA standard. This contribution focuses on the experiences with integration of the new detector readout and control system and reports on the operational performance of the CMS Pixel detector.

Low-Noise CMOS Circuits for On-Chip Signal Processing in Focal-Plane Arrays

Science.gov (United States)

Pain, Bedabrata

The performance of focal-plane arrays can be significantly enhanced through the use of on-chip signal processing. Novel, in-pixel, on-focal-plane, analog signal-processing circuits for high-performance imaging are presented in this thesis. The presence of a high background-radiation is a major impediment for infrared focal-plane array design. An in-pixel, background-suppression scheme, using dynamic analog current memory circuit, is described. The scheme also suppresses spatial noise that results from response non-uniformities of photo-detectors, leading to background limited infrared detector readout performance. Two new, low-power, compact, current memory circuits, optimized for operation at ultra-low current levels required in infrared-detection, are presented. The first one is a self-cascading current memory that increases the output impedance, and the second one is a novel, switch feed-through reducing current memory, implemented using error-current feedback. This circuit can operate with a residual absolute -error of less than 0.1%. The storage-time of the memory is long enough to also find applications in neural network circuits. In addition, a voltage-mode, accurate, low-offset, low-power, high-uniformity, random-access sample-and-hold cell, implemented using a CCD with feedback, is also presented for use in background-suppression and neural network applications. A new, low noise, ultra-low level signal readout technique, implemented by individually counting photo-electrons within the detection pixel, is presented. The output of each unit-cell is a digital word corresponding to the intensity of the photon flux, and the readout is noise free. This technique requires the use of unit-cell amplifiers that feature ultra-high-gain, low-power, self-biasing capability and noise in sub-electron levels. Both single-input and differential-input implementations of such amplifiers are investigated. A noise analysis technique is presented for analyzing sampled

A review of advances in pixel detectors for experiments with high rate and radiation

Science.gov (United States)

Garcia-Sciveres, Maurice; Wermes, Norbert

2018-06-01

The large Hadron collider (LHC) experiments ATLAS and CMS have established hybrid pixel detectors as the instrument of choice for particle tracking and vertexing in high rate and radiation environments, as they operate close to the LHC interaction points. With the high luminosity-LHC upgrade now in sight, for which the tracking detectors will be completely replaced, new generations of pixel detectors are being devised. They have to address enormous challenges in terms of data throughput and radiation levels, ionizing and non-ionizing, that harm the sensing and readout parts of pixel detectors alike. Advances in microelectronics and microprocessing technologies now enable large scale detector designs with unprecedented performance in measurement precision (space and time), radiation hard sensors and readout chips, hybridization techniques, lightweight supports, and fully monolithic approaches to meet these challenges. This paper reviews the world-wide effort on these developments.

Performance of in-pixel circuits for photon counting arrays (PCAs) based on polycrystalline silicon TFTs