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Sample records for non-volatile memory device

  1. Graphene based non-volatile memory devices.

    Science.gov (United States)

    Wang, Xiaomu; Xie, Weiguang; Xu, Jian-Bin

    2014-08-20

    With the continuous advance of modern electronics, the demand for non-volatile memory cells rapidly grows. As a promising material for post-silicon electronic applications, graphene non-volatile memory cells have received renewed interest due to its outstanding electronic and other physical properties. This research news briefly summarizes the recent progress in this area. Appealing research activities and technical trends are highlighted. Afterwards, requirements and aims of future graphene non-volatile memory cells that may possibly influence their commercialization are also discussed. © 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  2. Bioorganic nanodots for non-volatile memory devices

    International Nuclear Information System (INIS)

    Amdursky, Nadav; Shalev, Gil; Handelman, Amir; Natan, Amir; Rosenwaks, Yossi; Litsyn, Simon; Szwarcman, Daniel; Rosenman, Gil; Roizin, Yakov

    2013-01-01

    In recent years we are witnessing an intensive integration of bio-organic nanomaterials in electronic devices. Here we show that the diphenylalanine bio-molecule can self-assemble into tiny peptide nanodots (PNDs) of ∼2 nm size, and can be embedded into metal-oxide-semiconductor devices as charge storage nanounits in non-volatile memory. For that purpose, we first directly observe the crystallinity of a single PND by electron microscopy. We use these nanocrystalline PNDs units for the formation of a dense monolayer on SiO 2 surface, and study the electron/hole trapping mechanisms and charge retention ability of the monolayer, followed by fabrication of PND-based memory cell device

  3. A non-volatile memory device consisting of graphene oxide covalently functionalized with ionic liquid.

    Science.gov (United States)

    Bhunia, Prasenjit; Hwang, Eunhee; Min, Misook; Lee, Junghyun; Seo, Sohyeon; Some, Surajit; Lee, Hyoyoung

    2012-01-21

    We introduce non-volatile resistive crossbar memory based on ionic liquid covalently functionalized on a partially reduced graphene oxide (PrGO). The write-read-erase-read (WRER) cycles were very stable after several hundred cycles and the retention time of both the ON and OFF states was stable for over 1000 s, indicating that the device we developed can function as a non-volatile memory device. This journal is © The Royal Society of Chemistry 2012

  4. Non-volatile memories

    CERN Document Server

    Lacaze, Pierre-Camille

    2014-01-01

    Written for scientists, researchers, and engineers, Non-volatile Memories describes the recent research and implementations in relation to the design of a new generation of non-volatile electronic memories. The objective is to replace existing memories (DRAM, SRAM, EEPROM, Flash, etc.) with a universal memory model likely to reach better performances than the current types of memory: extremely high commutation speeds, high implantation densities and retention time of information of about ten years.

  5. Silicon nano crystal-based non-volatile memory devices

    International Nuclear Information System (INIS)

    Ng, C.Y.; Chen, T.P.; Sreeduth, D.; Chen, Q.; Ding, L.; Du, A.

    2006-01-01

    In this work, we have investigated the performance and reliability of a Flash memory based on silicon nanocrystal synthesized with very-low energy ion beams. The devices are fabricated with a conventional CMOS process and the size of the nanocrystal is ∼ 4 nm as determined from TEM measurement. Electrical properties of the devices with a tunnel oxide of either 3 nm or 7 nm are evaluated. The devices exhibit good endurance up to 10 5 W/E cycles even at the high operation temperature of 85 deg. C for both the tunnel oxide thicknesses. For the thicker tunnel oxide (i.e., the 7-nm tunnel oxide), a good retention performance with an extrapolated 10-year memory window of ∼ 0.3 V (or ∼ 20% of charge lose after 10 years) is achieved. However, ∼ 70% of charge loss after 10 years is expected for the thinner tunnel oxide (i.e., the 3-nm tunnel oxide)

  6. Device performance of ferroelectric/correlated oxide heterostructures for non-volatile memory applications

    International Nuclear Information System (INIS)

    Hoffman, J; Ahn, C H; Hong, X

    2011-01-01

    Ferroelectric field effect devices offer the possibility of non-volatile data storage. Attempts to integrate perovskite ferroelectric materials with silicon semiconductors, however, have been largely unsuccessful in creating non-volatile, nondestructive read memory elements because of difficulties in controlling the ferroelectric/semiconductor interface. Correlated oxide systems have been explored as alternative channel materials to form all-perovskite field effect devices. We examine a non-volatile memory using an electric-field-induced metal-insulator transition in PbZr 0.2 Ti 0.8 O 3 /La 1-x Sr x MnO 3 (PZT/LSMO), PZT/La 1-x Ca x MnO 3 (PZT/LCMO) and PZT/La 1-x Sr x CoO 3 (PZT/LSCO) devices. The performance of these devices in the areas of switching time and retention are discussed.

  7. Device performance of ferroelectric/correlated oxide heterostructures for non-volatile memory applications.

    Science.gov (United States)

    Hoffman, J; Hong, X; Ahn, C H

    2011-06-24

    Ferroelectric field effect devices offer the possibility of non-volatile data storage. Attempts to integrate perovskite ferroelectric materials with silicon semiconductors, however, have been largely unsuccessful in creating non-volatile, nondestructive read memory elements because of difficulties in controlling the ferroelectric/semiconductor interface. Correlated oxide systems have been explored as alternative channel materials to form all-perovskite field effect devices. We examine a non-volatile memory using an electric-field-induced metal-insulator transition in PbZr(0.2)Ti(0.8)O(3)/La(1 - x)Sr(x)MnO(3) (PZT/LSMO), PZT/La(1 - x)Ca(x)MnO(3) (PZT/LCMO) and PZT/La(1 - x)Sr(x)CoO(3) (PZT/LSCO) devices. The performance of these devices in the areas of switching time and retention are discussed.

  8. Non-volatile organic transistor memory devices using the poly(4-vinylpyridine)-based supramolecular electrets.

    Science.gov (United States)

    Chou, Y-H; Chiu, Y-C; Lee, W-Y; Chen, W-C

    2015-02-14

    Supramolecular electrets consisting of poly(4-vinylpyridine) (P4VP) and conjugated molecules of phenol, 2-naphthol and 2-hydroxyanthracene were investigated for non-volatile transistor memory applications. The memory windows of these supramolecular electret devices were significantly enhanced upon increasing the π-conjugation size of the molecule. A high ON/OFF current ratio of more than 10(7) over 10(4) s was achieved on the supramolecule based memory devices.

  9. Synthesis, characterization, and non-volatile memory device application of an N-substituted heteroacene.

    Science.gov (United States)

    Wang, Chengyuan; Wang, Jiangxin; Li, Pei-Zhou; Gao, Junkuo; Tan, Si Yu; Xiong, Wei-Wei; Hu, Benlin; Lee, Pooi See; Zhao, Yanli; Zhang, Qichun

    2014-03-01

    N-substituted heteroacenes have been widely used as electroactive layers in organic electronic devices, and only a few of them have been investigated in organic resistive memory devices. Here, a novel N-substituted heteroacene 2-(4'-(diphenylamino)phenyl)-4,11-bis((triisopropylsilyl)ethynyl)-1H-imidazo[4,5-b]phenazine (DBIP) has been designed, synthesized, and characterized. Sandwich-structure memory devices based on DBIP have been fabricated and the devices show non-volatile and stable memory character with good endurance performance. Copyright © 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  10. Fabrication of flexible, all-reduced graphene oxide non-volatile memory devices.

    Science.gov (United States)

    Liu, Juqing; Yin, Zongyou; Cao, Xiehong; Zhao, Fei; Wang, Lianhui; Huang, Wei; Zhang, Hua

    2013-01-11

    A flexible, all reduced graphene oxide non-volatile memory device, with lightly reduced GO as an active layer and highly reduced GO as both top and bottom electrodes, is fabricated by a full-solution process and its performance is characterized. It provides a convenient method to construct other all-carbon devices. Copyright © 2013 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  11. Metal-organic molecular device for non-volatile memory storage

    International Nuclear Information System (INIS)

    Radha, B.; Sagade, Abhay A.; Kulkarni, G. U.

    2014-01-01

    Non-volatile memory devices have been of immense research interest for their use in active memory storage in powered off-state of electronic chips. In literature, various molecules and metal compounds have been investigated in this regard. Molecular memory devices are particularly attractive as they offer the ease of storing multiple memory states in a unique way and also represent ubiquitous choice for miniaturized devices. However, molecules are fragile and thus the device breakdown at nominal voltages during repeated cycles hinders their practical applicability. Here, in this report, a synergetic combination of an organic molecule and an inorganic metal, i.e., a metal-organic complex, namely, palladium hexadecylthiolate is investigated for memory device characteristics. Palladium hexadecylthiolate following partial thermolysis is converted to a molecular nanocomposite of Pd(II), Pd(0), and long chain hydrocarbons, which is shown to exhibit non-volatile memory characteristics with exceptional stability and retention. The devices are all solution-processed and the memory action stems from filament formation across the pre-formed cracks in the nanocomposite film.

  12. Microwave oven fabricated hybrid memristor devices for non-volatile memory storage

    International Nuclear Information System (INIS)

    Verrelli, E; Gray, R J; O’Neill, M; Kemp, N T; Kelly, S M

    2014-01-01

    Novel hybrid non-volatile memories made using an ultra-fast microwave heating method are reported for the first time. The devices, consisting of aligned ZnO nanorods embedded in poly (methyl methacrylate), require no forming step and exhibit reliable and reproducible bipolar resistive switching at low voltages and with low power usage. We attribute these properties to a combination of the high aspect ratio of the nanorods and the polymeric hybrid structure of the device. The extremely easy, fast and low-cost solution based method of fabrication makes possible the simple and quick production of cheap memory cells. (paper)

  13. A fast and low-power microelectromechanical system-based non-volatile memory device.

    Science.gov (United States)

    Lee, Sang Wook; Park, Seung Joo; Campbell, Eleanor E B; Park, Yung Woo

    2011-01-01

    Several new generation memory devices have been developed to overcome the low performance of conventional silicon-based flash memory. In this study, we demonstrate a novel non-volatile memory design based on the electromechanical motion of a cantilever to provide fast charging and discharging of a floating-gate electrode. The operation is demonstrated by using an electromechanical metal cantilever to charge a floating gate that controls the charge transport through a carbon nanotube field-effect transistor. The set and reset currents are unchanged after more than 11 h constant operation. Over 500 repeated programming and erasing cycles were demonstrated under atmospheric conditions at room temperature without degradation. Multinary bit programming can be achieved by varying the voltage on the cantilever. The operation speed of the device is faster than a conventional flash memory and the power consumption is lower than other memory devices.

  14. Fabrication of spray-printed organic non-volatile memory devices for low cost electronic applications

    International Nuclear Information System (INIS)

    Cha, An-Na; Ji, Yongsung; Lee, Sang-A; Noh, Yong-Young; Na, Seok-In; Bae, Sukang; Lee, Sanghyun; Kim, Tae-Wook

    2015-01-01

    Highlights: • PS:PCBM-based organic non-volatile memory devices was fabricated using spray printing. • The thickness of the film was controlled by adjusting the concentration of the PS:PCBM solutions. • The roughness of spray-printed films was poorer than that of the spin-coated film. • The minimum thickness of the printed film influenced the memory behavior more than the surface roughness. • The spray printed PS:PCBM showed excellent unipolar switching, reliability, retention, and endurance characteristics. - Abstract: We fabricated polystyrene (PS) and 6-phenyl-C61 butyric acid methyl ester (PCBM) based organic non-volatile memory devices using a spray printing technique. Due to the distinct operational properties of this technique, significant differences were observed in the macro- and microscopic features (e.g., the film quality and surface roughness) of the devices. The thickness of the film was successfully controlled by adjusting the concentration of the PS:PCBM solutions sprayed. Although the roughness of the spray-printed films was poorer than that of the spin-coated film, negligible differences were observed in the basic memory characteristics (e.g., the operation voltage range, turn on and off voltage, retention and endurance). In particular, the printing-based organic memory devices were successfully switched, as exhibited by the on/off ratio greater than two orders of magnitude at 0.3 V read voltage. The resistance state of all of the devices was maintained for more than 10 4 s, indicating their non-volatile characteristics

  15. Non-volatile resistive memory devices based on solution-processed ultrathin two-dimensional nanomaterials.

    Science.gov (United States)

    Tan, Chaoliang; Liu, Zhengdong; Huang, Wei; Zhang, Hua

    2015-05-07

    Ultrathin two-dimensional (2D) nanomaterials, such as graphene and MoS2, hold great promise for electronics and optoelectronics due to their distinctive physical and electronic properties. Recent progress in high-yield, massive production of ultrathin 2D nanomaterials via various solution-based methods allows them to be easily integrated into electronic devices via solution processing techniques. Non-volatile resistive memory devices based on ultrathin 2D nanomaterials have been emerging as promising alternatives for the next-generation data storage devices due to their high flexibility, three-dimensional-stacking capability, simple structure, transparency, easy fabrication and low cost. In this tutorial review, we will summarize the recent progress in the utilization of solution-processed ultrathin 2D nanomaterials for fabrication of non-volatile resistive memory devices. Moreover, we demonstrate how to achieve excellent device performance by engineering the active layers, electrodes and/or device structure of resistive memory devices. On the basis of current status, the discussion is concluded with some personal insights into the challenges and opportunities in future research directions.

  16. Oligosaccharide Carbohydrate Dielectrics toward High-Performance Non-volatile Transistor Memory Devices.

    Science.gov (United States)

    Chiu, Yu-Cheng; Sun, Han-Sheng; Lee, Wen-Ya; Halila, Sami; Borsali, Redouane; Chen, Wen-Chang

    2015-10-28

    Oligosaccharides are one of the most promising biomaterials because they are abundant, renewable, diversified, and biosourced. The use of oligo- or polysaccharides for high-performance non-volatile organic field-effect-transistor memory is demonstrated herein. The charge-storage mechanism is attributed to charged hydroxyl groups that induce stronger hydrogen bonding, thus leading to the stabilization of trapped charges. This study reveals a promising future for green memory devices. © 2015 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  17. Emerging non-volatile memories

    CERN Document Server

    Hong, Seungbum; Wouters, Dirk

    2014-01-01

    This book is an introduction to the fundamentals of emerging non-volatile memories and provides an overview of future trends in the field. Readers will find coverage of seven important memory technologies, including Ferroelectric Random Access Memory (FeRAM), Ferromagnetic RAM (FMRAM), Multiferroic RAM (MFRAM), Phase-Change Memories (PCM), Oxide-based Resistive RAM (RRAM), Probe Storage, and Polymer Memories. Chapters are structured to reflect diffusions and clashes between different topics. Emerging Non-Volatile Memories is an ideal book for graduate students, faculty, and professionals working in the area of non-volatile memory. This book also: Covers key memory technologies, including Ferroelectric Random Access Memory (FeRAM), Ferromagnetic RAM (FMRAM), and Multiferroic RAM (MFRAM), among others. Provides an overview of non-volatile memory fundamentals. Broadens readers' understanding of future trends in non-volatile memories.

  18. Robust switching characteristics of CdSe/ZnS quantum dot non-volatile memory devices.

    Science.gov (United States)

    Kannan, V; Rhee, J K

    2013-08-14

    In this paper we report Al/CdSe-ZnS core-shell quantum dot/AlOx/CdSe-ZnS core-shell quantum dot/ITO based non-volatile resistive memory devices with an ON/OFF ratio of ~1000. The facile solution processed device exhibited excellent endurance characteristics for 200,000 switching cycles. Retention tests showed good stability for over 20,000 s and the devices are reproducible. A memory operating mechanism is proposed based on charge trapping-detrapping in core-shell quantum dots with AlOx acting as a barrier leading to Coulomb blockade. I-V characteristics of a three terminal device fabricated with the additional terminal wired-out from the middle AlOx layer supports the proposed charge trapping mechanism.

  19. Non-volatile memory devices with redox-active diruthenium molecular compound

    International Nuclear Information System (INIS)

    Pookpanratana, S; Zhu, H; Bittle, E G; Richter, C A; Li, Q; Hacker, C A; Natoli, S N; Ren, T

    2016-01-01

    Reduction-oxidation (redox) active molecules hold potential for memory devices due to their many unique properties. We report the use of a novel diruthenium-based redox molecule incorporated into a non-volatile Flash-based memory device architecture. The memory capacitor device structure consists of a Pd/Al 2 O 3 /molecule/SiO 2 /Si structure. The bulky ruthenium redox molecule is attached to the surface by using a ‘click’ reaction and the monolayer structure is characterized by x-ray photoelectron spectroscopy to verify the Ru attachment and molecular density. The ‘click’ reaction is particularly advantageous for memory applications because of (1) ease of chemical design and synthesis, and (2) provides an additional spatial barrier between the oxide/silicon to the diruthenium molecule. Ultraviolet photoelectron spectroscopy data identified the energy of the electronic levels of the surface before and after surface modification. The molecular memory devices display an unsaturated charge storage window attributed to the intrinsic properties of the redox-active molecule. Our findings demonstrate the strengths and challenges with integrating molecular layers within solid-state devices, which will influence the future design of molecular memory devices. (paper)

  20. Non-volatile memory devices with redox-active diruthenium molecular compound.

    Science.gov (United States)

    Pookpanratana, S; Zhu, H; Bittle, E G; Natoli, S N; Ren, T; Richter, C A; Li, Q; Hacker, C A

    2016-03-09

    Reduction-oxidation (redox) active molecules hold potential for memory devices due to their many unique properties. We report the use of a novel diruthenium-based redox molecule incorporated into a non-volatile Flash-based memory device architecture. The memory capacitor device structure consists of a Pd/Al2O3/molecule/SiO2/Si structure. The bulky ruthenium redox molecule is attached to the surface by using a 'click' reaction and the monolayer structure is characterized by x-ray photoelectron spectroscopy to verify the Ru attachment and molecular density. The 'click' reaction is particularly advantageous for memory applications because of (1) ease of chemical design and synthesis, and (2) provides an additional spatial barrier between the oxide/silicon to the diruthenium molecule. Ultraviolet photoelectron spectroscopy data identified the energy of the electronic levels of the surface before and after surface modification. The molecular memory devices display an unsaturated charge storage window attributed to the intrinsic properties of the redox-active molecule. Our findings demonstrate the strengths and challenges with integrating molecular layers within solid-state devices, which will influence the future design of molecular memory devices.

  1. Photo-Induced Multiple-State Memory Behaviour in Non-Volatile Bipolar Resistive-Switching Devices.

    Science.gov (United States)

    Zhang, Xuejiao; Xu, Zhiwei; Sun, Bai; Liu, Jianjun; Cao, Yanyan; Qiao, Haixia; Huang, Yong; Pang, Xiaofeng

    2018-04-01

    The recent discovery of non-volatile resistive-switching memory is a promising phenomenon for the semiconductor industry and electronic device technology. In our work, CaWO4 nanoparticles were synthesised through a one-step hydrothermal reaction. A resistive-switching memory device with Ag/CaWO4/fluorine-doped tin oxide structure was prepared. This device presents photo-induced multiple-state memory behaviour at room temperature. This study is valuable for exploring multi-functional materials and their applications in photo-controlled multiple-state non-volatile memories.

  2. A robust molecular platform for non-volatile memory devices with optical and magnetic responses.

    Science.gov (United States)

    Simão, Cláudia; Mas-Torrent, Marta; Crivillers, Núria; Lloveras, Vega; Artés, Juan Manuel; Gorostiza, Pau; Veciana, Jaume; Rovira, Concepció

    2011-05-01

    Bistable molecules that behave as switches in solution have long been known. Systems that can be reversibly converted between two stable states that differ in their physical properties are particularly attractive in the development of memory devices when immobilized in substrates. Here, we report a highly robust surface-confined switch based on an electroactive, persistent organic radical immobilized on indium tin oxide substrates that can be electrochemically and reversibly converted to the anion form. This molecular bistable system behaves as an extremely robust redox switch in which an electrical input is transduced into optical as well as magnetic outputs under ambient conditions. The fact that this molecular surface switch, operating at very low voltages, can be patterned and addressed locally, and also has exceptionally high long-term stability and excellent reversibility and reproducibility, makes it a very promising platform for non-volatile memory devices.

  3. Non-volatile memory devices based on polystyrene derivatives with electron-donating oligofluorene pendent moieties.

    Science.gov (United States)

    Liu, Cheng-Liang; Hsu, Jung-Ching; Chen, Wen-Chang; Sugiyama, Kenji; Hirao, Akira

    2009-09-01

    We report bistable non-volatile memory devices based on polystyrene derivatives containing pendent electron-donating mono-, di-, and tri(9,9-dihexylfluorene), which are denoted as poly(St-Fl), poly(St-Fl(2)), and poly(St-Fl(3)), respectively. The effects of the oligofluorene chain lengths and polymer surface structures on the memory characteristics were explored. Poly(St-Fl)-, poly(St-Fl(2))-, and poly(St-Fl(3))-based devices exhibited a flash memory characteristic with different turn-on threshold voltages of 2.8, 2.0, and 1.8 V, respectively, which was on the reverse trend with the highest occupied molecular orbital levels of -5.86, -5.80, and -5.77 eV. Moreover, the memory device showed a high ON/OFF current ratio of 2.5 x 10(4) and a long retention time of 10(4) s. The possible mechanism of the switching behavior was explained by the space-charge-limited-current theory and filamentary conduction. The larger aggregation domain size of the polymer thin film processed from the mixed solvent of chlorobenzene/N,N-dimethylformamide probably promoted the diffusion of the Al atoms into the polymer film and formed the conduction channel. Thus, it significantly reduced the turn-on threshold voltage on the studied polymer memory devices. The present study suggested that the polymer memory characteristics could be efficiently tuned through the pendent conjugated chain length and surface structures.

  4. Low-temperature process steps for realization of non-volatile memory devices

    NARCIS (Netherlands)

    Brunets, I.; Boogaard, A.; Aarnink, Antonius A.I.; Kovalgin, Alexeij Y.; Wolters, Robertus A.M.; Holleman, J.; Schmitz, Jurriaan

    2007-01-01

    In this work, the low-temperature process steps required for the realization of nano-crystal non-volatile memory cells are discussed. An amorphous silicon film, crystallized using a diode pumped solid state green laser irradiating at 532 nm, is proposed as an active layer. The deposition of the

  5. Unipolar bistable switching of organic non-volatile memory devices with poly(styrene-co-styrenesulfonic acid Na).

    Science.gov (United States)

    Ji, Yongsung; Cho, Byungjin; Song, Sunghoon; Choe, Minhyeok; Kim, Tae-Wook; Kim, Joon-Seop; Choi, Byung-Sang; Lee, Takhee

    2011-02-01

    We demonstrated unipolar organic bistable memory devices with 8 x 8 cross-bar array type structure. The active material for the organic non-volatile memory devices is poly(styrene-co-styrenesulfonic acid Na) (PSSANa). From the electrical measurements of the PSSANa organic memory devices, we observed rewritable unipolar switching behaviors with a stable endurance and narrow cumulative probability. Also the PSSANa memory devices exhibited a uniform cell-to-cell switching with a high ON/OFF ratio of approximately 10(5) and good retention time of approximately 10(4) seconds without significant degradation.

  6. MIEC (mixed-ionic-electronic-conduction)-based access devices for non-volatile crossbar memory arrays

    International Nuclear Information System (INIS)

    Shenoy, Rohit S; Burr, Geoffrey W; Virwani, Kumar; Jackson, Bryan; Padilla, Alvaro; Narayanan, Pritish; Rettner, Charles T; Shelby, Robert M; Bethune, Donald S; Rice, Philip M; Topuria, Teya; Kellock, Andrew J; Kurdi, Bülent; Raman, Karthik V; BrightSky, Matthew; Joseph, Eric; Gopalakrishnan, Kailash

    2014-01-01

    Several attractive applications call for the organization of memristive devices (or other resistive non-volatile memory (NVM)) into large, densely-packed crossbar arrays. While resistive-NVM devices frequently possess some degree of inherent nonlinearity (typically 3–30× contrast), the operation of large (> 1000×1000 device) arrays at low power tends to require quite large (> 1e7) ON-to-OFF ratios (between the currents passed at high and at low voltages). One path to such large nonlinearities is the inclusion of a distinct access device (AD) together with each of the state-bearing resistive-NVM elements. While such an AD need not store data, its list of requirements is almost as challenging as the specifications demanded of the memory device. Several candidate ADs have been proposed, but obtaining high performance without requiring single-crystal silicon and/or the high processing temperatures of the front-end-of-the-line—which would eliminate any opportunity for 3D stacking—has been difficult. We review our work at IBM Research—Almaden on high-performance ADs based on Cu-containing mixed-ionic-electronic conduction (MIEC) materials [1–7]. These devices require only the low processing temperatures of the back-end-of-the-line, making them highly suitable for implementing multi-layer cross-bar arrays. MIEC-based ADs offer large ON/OFF ratios (>1e7), a significant voltage margin V m (over which current <10 nA), and ultra-low leakage (< 10 pA), while also offering the high current densities needed for phase-change memory and the fully bipolar operation needed for high-performance RRAM. Scalability to critical lateral dimensions < 30 nm and thicknesses < 15 nm, tight distributions and 100% yield in large (512 kBit) arrays, long-term stability of the ultra-low leakage states, and sub-50 ns turn-ON times have all been demonstrated. Numerical modeling of these MIEC-based ADs shows that their operation depends on Cu + mediated hole conduction. Circuit

  7. MIEC (mixed-ionic-electronic-conduction)-based access devices for non-volatile crossbar memory arrays

    Science.gov (United States)

    Shenoy, Rohit S.; Burr, Geoffrey W.; Virwani, Kumar; Jackson, Bryan; Padilla, Alvaro; Narayanan, Pritish; Rettner, Charles T.; Shelby, Robert M.; Bethune, Donald S.; Raman, Karthik V.; BrightSky, Matthew; Joseph, Eric; Rice, Philip M.; Topuria, Teya; Kellock, Andrew J.; Kurdi, Bülent; Gopalakrishnan, Kailash

    2014-10-01

    Several attractive applications call for the organization of memristive devices (or other resistive non-volatile memory (NVM)) into large, densely-packed crossbar arrays. While resistive-NVM devices frequently possess some degree of inherent nonlinearity (typically 3-30× contrast), the operation of large (\\gt 1000×1000 device) arrays at low power tends to require quite large (\\gt 1e7) ON-to-OFF ratios (between the currents passed at high and at low voltages). One path to such large nonlinearities is the inclusion of a distinct access device (AD) together with each of the state-bearing resistive-NVM elements. While such an AD need not store data, its list of requirements is almost as challenging as the specifications demanded of the memory device. Several candidate ADs have been proposed, but obtaining high performance without requiring single-crystal silicon and/or the high processing temperatures of the front-end-of-the-line—which would eliminate any opportunity for 3D stacking—has been difficult. We review our work at IBM Research—Almaden on high-performance ADs based on Cu-containing mixed-ionic-electronic conduction (MIEC) materials [1-7]. These devices require only the low processing temperatures of the back-end-of-the-line, making them highly suitable for implementing multi-layer cross-bar arrays. MIEC-based ADs offer large ON/OFF ratios (\\gt 1e7), a significant voltage margin {{V}m} (over which current \\lt 10 nA), and ultra-low leakage (\\lt 10 pA), while also offering the high current densities needed for phase-change memory and the fully bipolar operation needed for high-performance RRAM. Scalability to critical lateral dimensions \\lt 30 nm and thicknesses \\lt 15 nm, tight distributions and 100% yield in large (512 kBit) arrays, long-term stability of the ultra-low leakage states, and sub-50 ns turn-ON times have all been demonstrated. Numerical modeling of these MIEC-based ADs shows that their operation depends on C{{u}+} mediated hole

  8. Carbon nanomaterials for non-volatile memories

    Science.gov (United States)

    Ahn, Ethan C.; Wong, H.-S. Philip; Pop, Eric

    2018-03-01

    Carbon can create various low-dimensional nanostructures with remarkable electronic, optical, mechanical and thermal properties. These features make carbon nanomaterials especially interesting for next-generation memory and storage devices, such as resistive random access memory, phase-change memory, spin-transfer-torque magnetic random access memory and ferroelectric random access memory. Non-volatile memories greatly benefit from the use of carbon nanomaterials in terms of bit density and energy efficiency. In this Review, we discuss sp2-hybridized carbon-based low-dimensional nanostructures, such as fullerene, carbon nanotubes and graphene, in the context of non-volatile memory devices and architectures. Applications of carbon nanomaterials as memory electrodes, interfacial engineering layers, resistive-switching media, and scalable, high-performance memory selectors are investigated. Finally, we compare the different memory technologies in terms of writing energy and time, and highlight major challenges in the manufacturing, integration and understanding of the physical mechanisms and material properties.

  9. Non-volatile memory for checkpoint storage

    Science.gov (United States)

    Blumrich, Matthias A.; Chen, Dong; Cipolla, Thomas M.; Coteus, Paul W.; Gara, Alan; Heidelberger, Philip; Jeanson, Mark J.; Kopcsay, Gerard V.; Ohmacht, Martin; Takken, Todd E.

    2014-07-22

    A system, method and computer program product for supporting system initiated checkpoints in high performance parallel computing systems and storing of checkpoint data to a non-volatile memory storage device. The system and method generates selective control signals to perform checkpointing of system related data in presence of messaging activity associated with a user application running at the node. The checkpointing is initiated by the system such that checkpoint data of a plurality of network nodes may be obtained even in the presence of user applications running on highly parallel computers that include ongoing user messaging activity. In one embodiment, the non-volatile memory is a pluggable flash memory card.

  10. Resistive switching characteristics of polymer non-volatile memory devices in a scalable via-hole structure.

    Science.gov (United States)

    Kim, Tae-Wook; Choi, Hyejung; Oh, Seung-Hwan; Jo, Minseok; Wang, Gunuk; Cho, Byungjin; Kim, Dong-Yu; Hwang, Hyunsang; Lee, Takhee

    2009-01-14

    The resistive switching characteristics of polyfluorene-derivative polymer material in a sub-micron scale via-hole device structure were investigated. The scalable via-hole sub-microstructure was fabricated using an e-beam lithographic technique. The polymer non-volatile memory devices varied in size from 40 x 40 microm(2) to 200 x 200 nm(2). From the scaling of junction size, the memory mechanism can be attributed to the space-charge-limited current with filamentary conduction. Sub-micron scale polymer memory devices showed excellent resistive switching behaviours such as a large ON/OFF ratio (I(ON)/I(OFF) approximately 10(4)), excellent device-to-device switching uniformity, good sweep endurance, and good retention times (more than 10,000 s). The successful operation of sub-micron scale memory devices of our polyfluorene-derivative polymer shows promise to fabricate high-density polymer memory devices.

  11. Resistive switching characteristics of polymer non-volatile memory devices in a scalable via-hole structure

    International Nuclear Information System (INIS)

    Kim, Tae-Wook; Choi, Hyejung; Oh, Seung-Hwan; Jo, Minseok; Wang, Gunuk; Cho, Byungjin; Kim, Dong-Yu; Hwang, Hyunsang; Lee, Takhee

    2009-01-01

    The resistive switching characteristics of polyfluorene-derivative polymer material in a sub-micron scale via-hole device structure were investigated. The scalable via-hole sub-microstructure was fabricated using an e-beam lithographic technique. The polymer non-volatile memory devices varied in size from 40 x 40 μm 2 to 200 x 200 nm 2 . From the scaling of junction size, the memory mechanism can be attributed to the space-charge-limited current with filamentary conduction. Sub-micron scale polymer memory devices showed excellent resistive switching behaviours such as a large ON/OFF ratio (I ON /I OFF ∼10 4 ), excellent device-to-device switching uniformity, good sweep endurance, and good retention times (more than 10 000 s). The successful operation of sub-micron scale memory devices of our polyfluorene-derivative polymer shows promise to fabricate high-density polymer memory devices.

  12. Electric field mediated non-volatile tuning magnetism in CoPt/PMN-PT heterostructure for magnetoelectric memory devices

    Science.gov (United States)

    Yang, Y. T.; Li, J.; Peng, X. L.; Wang, X. Q.; Wang, D. H.; Cao, Q. Q.; Du, Y. W.

    2016-02-01

    We report a power efficient non-volatile magnetoelectric memory in the CoPt/(011)PMN-PT heterostructure. Two reversible and stable electric field induced coercivity states (i.e., high-HC or low-HC) are obtained due to the strain mediated converse magnetoelectric effect. The reading process of the different coercive field information written by electric fields is demonstrated by using a magnetoresistance read head. This result shows good prospects in the application of novel multiferroic devices.

  13. Multi-floor cascading ferroelectric nanostructures: multiple data writing-based multi-level non-volatile memory devices.

    Science.gov (United States)

    Hyun, Seung; Kwon, Owoong; Lee, Bom-Yi; Seol, Daehee; Park, Beomjin; Lee, Jae Yong; Lee, Ju Hyun; Kim, Yunseok; Kim, Jin Kon

    2016-01-21

    Multiple data writing-based multi-level non-volatile memory has gained strong attention for next-generation memory devices to quickly accommodate an extremely large number of data bits because it is capable of storing multiple data bits in a single memory cell at once. However, all previously reported devices have failed to store a large number of data bits due to the macroscale cell size and have not allowed fast access to the stored data due to slow single data writing. Here, we introduce a novel three-dimensional multi-floor cascading polymeric ferroelectric nanostructure, successfully operating as an individual cell. In one cell, each floor has its own piezoresponse and the piezoresponse of one floor can be modulated by the bias voltage applied to the other floor, which means simultaneously written data bits in both floors can be identified. This could achieve multi-level memory through a multiple data writing process.

  14. Phase-change materials for non-volatile memory devices: from technological challenges to materials science issues

    Science.gov (United States)

    Noé, Pierre; Vallée, Christophe; Hippert, Françoise; Fillot, Frédéric; Raty, Jean-Yves

    2018-01-01

    Chalcogenide phase-change materials (PCMs), such as Ge-Sb-Te alloys, have shown outstanding properties, which has led to their successful use for a long time in optical memories (DVDs) and, recently, in non-volatile resistive memories. The latter, known as PCM memories or phase-change random access memories (PCRAMs), are the most promising candidates among emerging non-volatile memory (NVM) technologies to replace the current FLASH memories at CMOS technology nodes under 28 nm. Chalcogenide PCMs exhibit fast and reversible phase transformations between crystalline and amorphous states with very different transport and optical properties leading to a unique set of features for PCRAMs, such as fast programming, good cyclability, high scalability, multi-level storage capability, and good data retention. Nevertheless, PCM memory technology has to overcome several challenges to definitively invade the NVM market. In this review paper, we examine the main technological challenges that PCM memory technology must face and we illustrate how new memory architecture, innovative deposition methods, and PCM composition optimization can contribute to further improvements of this technology. In particular, we examine how to lower the programming currents and increase data retention. Scaling down PCM memories for large-scale integration means the incorporation of the PCM into more and more confined structures and raises materials science issues in order to understand interface and size effects on crystallization. Other materials science issues are related to the stability and ageing of the amorphous state of PCMs. The stability of the amorphous phase, which determines data retention in memory devices, can be increased by doping the PCM. Ageing of the amorphous phase leads to a large increase of the resistivity with time (resistance drift), which has up to now hindered the development of ultra-high multi-level storage devices. A review of the current understanding of all these

  15. Fabrication of solution processed carbon nanotube embedded polyvinyl alcohol composite film for non-volatile memory device.

    Science.gov (United States)

    Kishore, S Chandra; Pandurangan, A

    2014-03-01

    Carbon nanotubes (CNTs) were synthesized by chemical vapor deposition using nickel coated stainless steel prepared by electrophoretic deposition. CNTs were embedded in polyvinyl alcohol (PVA) which acts as an organic insulator to fabricate Si/PVA/CNT/PVA/Al Metal-Insulator-Semiconductor type memory devices. The effect of CNT content in the charge storage capacity of PVA-CNT composite film was investigated. The hysteresis obtained from the capacitance-voltage (CV) measurement resulted in a memory window of 1.9 V with 3% CNT loading with the gate voltage sweep of +/- 6 V at 1 MHz under room temperature. The memory window of the devices was due to electron injection into the CNT charge storage elements from the top electrode through PVA. The extensive pi-conjugation along the CNT axis traps the electrons in the CNT network. The ON/OFF state current ratio of Si/Al/PVA-CNT/AI device with 3% CNT in PVA demonstrated significantly a lower turn-on voltage of -1 V and a higher ON/OFF state current ratio of 10(7). The non-volatile and reprogrammable switching behavior of the device demonstrated the characteristic of a rewritable memory.

  16. Non-volatile transistor memory devices using charge storage cross-linked core-shell nanoparticles.

    Science.gov (United States)

    Lo, Chen-Tsyr; Watanabe, Yu; Oya, Hiroshi; Nakabayashi, Kazuhiro; Mori, Hideharu; Chen, Wen-Chang

    2016-06-07

    Solution processable cross-linked core-shell poly[poly(ethylene glycol)methylether methacrylate]-block-poly(2,5-dibromo-3-vinylthiophene) (poly(PEGMA)m-b-poly(DB3VT)n) nanoparticles are firstly explored as charge storage materials for transistor-type memory devices owing to their efficient and controllable ability in electric charge transfer and trapping.

  17. Composition-dependent nanoelectronics of amido-phenazines: non-volatile RRAM and WORM memory devices.

    Science.gov (United States)

    Maiti, Dilip K; Debnath, Sudipto; Nawaz, Sk Masum; Dey, Bapi; Dinda, Enakhi; Roy, Dipanwita; Ray, Sudipta; Mallik, Abhijit; Hussain, Syed A

    2017-10-17

    A metal-free three component cyclization reaction with amidation is devised for direct synthesis of DFT-designed amido-phenazine derivative bearing noncovalent gluing interactions to fabricate organic nanomaterials. Composition-dependent organic nanoelectronics for nonvolatile memory devices are discovered using mixed phenazine-stearic acid (SA) nanomaterials. We discovered simultaneous two different types of nonmagnetic and non-moisture sensitive switching resistance properties of fabricated devices utilizing mixed organic nanomaterials: (a) sample-1(8:SA = 1:3) is initially off, turning on at a threshold, but it does not turn off again with the application of any voltage, and (b) sample-2 (8:SA = 3:1) is initially off, turning on at a sharp threshold and off again by reversing the polarity. No negative differential resistance is observed in either type. These samples have different device implementations: sample-1 is attractive for write-once-read-many-times memory devices, such as novel non-editable database, archival memory, electronic voting, radio frequency identification, sample-2 is useful for resistive-switching random access memory application.

  18. Technology breakthroughs in high performance metal-oxide-semiconductor devices for ultra-high density, low power non-volatile memory applications

    Science.gov (United States)

    Hong, Augustin Jinwoo

    Non-volatile memory devices have attracted much attention because data can be retained without power consumption more than a decade. Therefore, non-volatile memory devices are essential to mobile electronic applications. Among state of the art non-volatile memory devices, NAND flash memory has earned the highest attention because of its ultra-high scalability and therefore its ultra-high storage capacity. However, human desire as well as market competition requires not only larger storage capacity but also lower power consumption for longer battery life time. One way to meet this human desire and extend the benefits of NAND flash memory is finding out new materials for storage layer inside the flash memory, which is called floating gate in the state of the art flash memory device. In this dissertation, we study new materials for the floating gate that can lower down the power consumption and increase the storage capacity at the same time. To this end, we employ various materials such as metal nanodot, metal thin film and graphene incorporating complementary-metal-oxide-semiconductor (CMOS) compatible processes. Experimental results show excellent memory effects at relatively low operating voltages. Detailed physics and analysis on experimental results are discussed. These new materials for data storage can be promising candidates for future non-volatile memory application beyond the state of the art flash technologies.

  19. Enhancing charge-storage capacity of non-volatile memory devices using template-directed assembly of gold nanoparticles.

    Science.gov (United States)

    Gupta, Raju Kumar; Krishnamoorthy, Sivashankar; Kusuma, Damar Yoga; Lee, Pooi See; Srinivasan, M P

    2012-04-07

    We demonstrate the controlled fabrication of aggregates of gold nanoparticles as a means of enhancing the charge-storage capacity of metal-insulator-semiconductor (MIS) devices by up to 300% at a low biasing voltage of ±4 V. Aggregates of citrate stabilized gold nanoparticles were obtained by directed electrostatic self-assembly onto an underlying nanopattern of positively charged centers. The underlying nanopatterns consist of amine functionalized gold nanoparticle arrays formed using amphiphilic diblock copolymer reverse micelles as templates. The hierarchical self-organization leads to a twelve-fold increase in the number density of the gold nanoparticles and therefore significantly increases the charge storage centers for the MIS device. The MIS structure showed counterclockwise C-V hysteresis curves indicating a good memory effect. A memory window of 1 V was obtained at a low biasing voltage of ±4 V. Furthermore, C-t measurements conducted after applying a charging bias of 4 V showed that the charge was retained beyond 20,000 s. The proposed strategy can be readily adapted for fabricating next generation solution processible non-volatile memory devices. This journal is © The Royal Society of Chemistry 2012

  20. Towards the development of flexible non-volatile memories.

    Science.gov (United States)

    Han, Su-Ting; Zhou, Ye; Roy, V A L

    2013-10-11

    Flexible non-volatile memories have attracted tremendous attentions for data storage for future electronics application. From device perspective, the advantages of flexible memory devices include thin, lightweight, printable, foldable and stretchable. The flash memories, resistive random access memories (RRAM) and ferroelectric random access memory/ferroelectric field-effect transistor memories (FeRAM/FeFET) are considered as promising candidates for next generation non-volatile memory device. Here, we review the general background knowledge on device structure, working principle, materials, challenges and recent progress with the emphasis on the flexibility of above three categories of non-volatile memories. Copyright © 2013 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  1. Scalable processes for fabricating non-volatile memory devices using self-assembled 2D arrays of gold nanoparticles as charge storage nodes.

    Science.gov (United States)

    Muralidharan, Girish; Bhat, Navakanta; Santhanam, Venugopal

    2011-11-01

    We propose robust and scalable processes for the fabrication of floating gate devices using ordered arrays of 7 nm size gold nanoparticles as charge storage nodes. The proposed strategy can be readily adapted for fabricating next generation (sub-20 nm node) non-volatile memory devices.

  2. Securing non-volatile memory regions

    Science.gov (United States)

    Faraboschi, Paolo; Ranganathan, Parthasarathy; Muralimanohar, Naveen

    2013-08-20

    Methods, apparatus and articles of manufacture to secure non-volatile memory regions are disclosed. An example method disclosed herein comprises associating a first key pair and a second key pair different than the first key pair with a process, using the first key pair to secure a first region of a non-volatile memory for the process, and using the second key pair to secure a second region of the non-volatile memory for the same process, the second region being different than the first region.

  3. Biologically active nanocomposite of DNA-PbS nanoparticles: A new material for non-volatile memory devices

    Science.gov (United States)

    Murgunde, B. K.; Rabinal, M. K.; Kalasad, M. N.

    2018-01-01

    Composite films of deoxyribonucleic acid (DNA) and lead sulfide (PbS) nanoparticles are prepared to fabricate biological memory devices. A simple solution based electrografting is developed to deposit large (few cm2) uniform films of DNA:PbS on conducting substrates. The films are studied by X-ray photoelectron spectroscopy, field emission SEM, FTIR and optical spectroscopy to understand their properties. Charge transport measurements are carried out on ITO-DNA:PbS-metal junctions by cyclic voltage scans, electrical bi-stability is observed with ON/OFF ratio more than ∼104 times with good stability and endurance, such performance being rarely reported. The observed results are interpreted in the light of strong electrostatic binding of nanoparticles and DNA stands, which leads doping of Pb atoms into DNA. As a result, these devices exhibit negative differential resistance (NDR) effect due to oxidation of doped metal atoms. These composites can be the potential materials in the development of new generation non-volatile memory devices.

  4. Layer-by-layer charging in non-volatile memory devices using embedded sub-2 nm platinum nanoparticles

    International Nuclear Information System (INIS)

    Ramalingam, Balavinayagam; Zheng, Haisheng; Gangopadhyay, Shubhra

    2014-01-01

    In this work, we demonstrate multi-level operation of a non-volatile memory metal oxide semiconductor capacitor by controlled layer-by-layer charging of platinum nanoparticle (PtNP) floating gate devices with defined gate voltage bias ranges. The device consists of two layers of ultra-fine, sub-2 nm PtNPs integrated between Al 2 O 3 tunneling and separation layers. PtNP size and interparticle distance were varied to control the particle self-capacitance and associated Coulomb charging energy. Likewise, the tunneling layer thicknesses were also varied to control electron tunneling to the first and second PtNP layers. The final device configuration with optimal charging behavior and multi-level programming was attained with a 3 nm Al 2 O 3 initial tunneling layer, initial PtNP layer with particle size 0.54 ± 0.12 nm and interparticle distance 4.65 ± 2.09 nm, 3 nm Al 2 O 3 layer to separate the PtNP layers, and second particle layer with 1.11 ± 0.28 nm PtNP size and interparticle distance 2.75 ± 1.05 nm. In this device, the memory window of the first PtNP layer saturated over a programming bias range of 7 V to 14 V, after which the second PtNP layer starts charging, exhibiting a multi-step memory window with layer-by-layer charging

  5. Low-temperature LPCVD of Si nanocrystals from disilane and trisilane (Silcore®) embedded in ALD-alumina for non-volatile memory devices

    NARCIS (Netherlands)

    Brunets, I.; Aarnink, Antonius A.I.; Boogaard, A.; Kovalgin, Alexeij Y.; Wolters, Robertus A.M.; Holleman, J.; Schmitz, Jurriaan

    Non-volatile memory devices are realized using CVD and ALD of all active layers in a cluster tool. The floating gate consists of silicon nanocrystals. A high nanocrystal density was obtained through an enhanced nucleation rate by using disilane (Si2H6) as well as trisilane (Si3H8, known as Silcore®)

  6. The impact of tunnel oxide nitridation to reliability performance of charge storage non-volatile memory devices.

    Science.gov (United States)

    Lee, Meng Chuan; Wong, Hin Yong

    2014-02-01

    This paper is written to review the development of critical research on the overall impact of tunnel oxide nitridation (TON) with the aim to mitigate reliability issues due to incessant technology scaling of charge storage NVM devices. For more than 30 years, charge storage non-volatile memory (NVM) has been critical in the evolution of intelligent electronic devices and continuous development of integrated technologies. Technology scaling is the primary strategy implemented throughout the semiconductor industry to increase NVM density and drive down average cost per bit. In this paper, critical reliability challenges and key innovative technical mitigation methods are reviewed. TON is one of the major candidates to replace conventional oxide layer for its superior quality and reliability performance. Major advantages and caveats of key TON process techniques are discussed. The impact of TON on quality and reliability performance of charge storage NVM devices is carefully reviewed with emphasis on major advantages and drawbacks of top and bottom nitridation. Physical mechanisms attributed to charge retention and V(t) instability phenomenon are also reviewed in this paper.

  7. Size-tunable synthesis of monolayer MoS2 nanoparticles and their applications in non-volatile memory devices.

    Science.gov (United States)

    Jeon, Jaeho; Lee, Jinhee; Yoo, Gwangwe; Park, Jin-Hong; Yeom, Geun Young; Jang, Yun Hee; Lee, Sungjoo

    2016-09-29

    We report the CVD synthesis of a monolayer of MoS 2 nanoparticles such that the nanoparticle size was controlled over the range 5-100 nm and the chemical potential of sulfur was modified, both by controlling the hydrogen flow rate during the CVD process. As the hydrogen flow rate was increased, the reaction process of sulfur changed from a "sulfiding" process to a "sulfo-reductive" process, resulting in the growth of smaller MoS 2 nanoparticles on the substrates. The size control, crystalline quality, chemical configuration, and distribution uniformity of the CVD-grown monolayer MoS 2 nanoparticles were confirmed. The growth of the MoS 2 nanoparticles at different edge states was studied using density functional theory calculations to clarify the size-tunable mechanism. A non-volatile memory device fabricated using the CVD-grown size-controlled 5 nm monolayer MoS 2 nanoparticles as a floating gate showed a good memory window of 5-8 V and an excellent retention period of a decade.

  8. Microwave-Assisted Size Control of Colloidal Nickel Nanocrystals for Colloidal Nanocrystals-Based Non-volatile Memory Devices

    Science.gov (United States)

    Yadav, Manoj; Velampati, Ravi Shankar R.; Mandal, D.; Sharma, Rohit

    2018-03-01

    Colloidal synthesis and size control of nickel (Ni) nanocrystals (NCs) below 10 nm are reported using a microwave synthesis method. The synthesised colloidal NCs have been characterized using x-ray diffraction, transmission electron microscopy (TEM) and dynamic light scattering (DLS). XRD analysis highlights the face centred cubic crystal structure of synthesised NCs. The size of NCs observed using TEM and DLS have a distribution between 2.6 nm and 10 nm. Furthermore, atomic force microscopy analysis of spin-coated NCs over a silicon dioxide surface has been carried out to identify an optimum spin condition that can be used for the fabrication of a metal oxide semiconductor (MOS) non-volatile memory (NVM) capacitor. Subsequently, the fabrication of a MOS NVM capacitor is reported to demonstrate the potential application of colloidal synthesized Ni NCs in NVM devices. We also report the capacitance-voltage (C-V) and capacitance-time (C-t) response of the fabricated MOS NVM capacitor. The C-V and C-t characteristics depict a large flat band voltage shift (V FB) and high retention time, respectively, which indicate that colloidal Ni NCs are excellent candidates for applications in next-generation NVM devices.

  9. Fabrication of Pb (Zr, Ti) O3 Thin Film for Non-Volatile Memory Device Application

    International Nuclear Information System (INIS)

    Mar Lar Win

    2011-12-01

    Ferroelectric lead zirconate titanate powder was composed of mainly the oxides of titanium, zirconium and lead. PZT powder was firstly prepared by thermal synthesis at different Zr/Ti ratios with various sintering temperatures. PZT thin film was fabricated on SiO2/Si substrate by using thermal evaporation method. Physical and elemental analysis were carried out by using SEM, EDX and XRD The ferroelectric properties and the switching behaviour of the PZT thin films were investigated. The ferroelectric properties and switching properties of the PZT thin film (near morphotropic phase boundary sintered at 800 C) could function as a nonvolatile memory.

  10. Thermally stable and high ON/OFF ratio non-volatile memory devices based on poly(triphenylamine) with pendent PCBM.

    Science.gov (United States)

    Chen, Chih-Jung; Wu, Jia-Hao; Liou, Guey-Sheng

    2014-04-28

    High ON/OFF ratio electrically bistable non-volatile WORM memory devices were prepared based on poly(triphenylamine) with different amounts of pendent PCBM. With the introduction of 10 wt% PCBM into P-TPA via covalent bonding, a memory device with low switching-ON voltage (0.9 V) and high ON/OFF ratio (10(9)) could be obtained. The device performance remained satisfactory under the heating condition up to 100 °C which is beneficial to maintain device stability for computer application when other components produce heat.

  11. Electrical reliability, multilevel data storage and mechanical stability of MoS2-PMMA nanocomposite-based non-volatile memory device

    International Nuclear Information System (INIS)

    Bhattacharjee, Snigdha; Sarkar, Pranab Kumar; Roy, Asim; Prajapat, Manoj

    2017-01-01

    Molybdenum disulfide (MoS 2 ) is of great interest for its applicability in various optoelectronic devices. Here we report the resistive switching properties of polymethylmethacrylate embedding MoS 2 nano-crystals. The devices are developed on an ITO-coated PET substrate with copper as the top electrode. Systematic evaluation of resistive switching parameters, on the basis of MoS 2 content, suggests non-volatile memory characteristics. A decent ON/OFF ratio, high retention time and long endurance of 3  ×  10 3 , 10 5 s and 10 5 cycles are respectively recorded in a device with 1 weight percent (wt%) of MoS 2 . The bending cyclic measurements confirm the flexibility of the memory devices with good electrical reliability as well as mechanical stability. In addition, multilevel storage has been demonstrated by controlling the current compliance and span of voltage sweeping in the memory device. (paper)

  12. Non-volatile memory based on the ferroelectric photovoltaic effect.

    Science.gov (United States)

    Guo, Rui; You, Lu; Zhou, Yang; Lim, Zhi Shiuh; Zou, Xi; Chen, Lang; Ramesh, R; Wang, Junling

    2013-01-01

    The quest for a solid state universal memory with high-storage density, high read/write speed, random access and non-volatility has triggered intense research into new materials and novel device architectures. Though the non-volatile memory market is dominated by flash memory now, it has very low operation speed with ~10 μs programming and ~10 ms erasing time. Furthermore, it can only withstand ~10(5) rewriting cycles, which prevents it from becoming the universal memory. Here we demonstrate that the significant photovoltaic effect of a ferroelectric material, such as BiFeO3 with a band gap in the visible range, can be used to sense the polarization direction non-destructively in a ferroelectric memory. A prototype 16-cell memory based on the cross-bar architecture has been prepared and tested, demonstrating the feasibility of this technique.

  13. Non-volatile memory based on the ferroelectric photovoltaic effect

    Science.gov (United States)

    Guo, Rui; You, Lu; Zhou, Yang; Shiuh Lim, Zhi; Zou, Xi; Chen, Lang; Ramesh, R.; Wang, Junling

    2013-01-01

    The quest for a solid state universal memory with high-storage density, high read/write speed, random access and non-volatility has triggered intense research into new materials and novel device architectures. Though the non-volatile memory market is dominated by flash memory now, it has very low operation speed with ~10 μs programming and ~10 ms erasing time. Furthermore, it can only withstand ~105 rewriting cycles, which prevents it from becoming the universal memory. Here we demonstrate that the significant photovoltaic effect of a ferroelectric material, such as BiFeO3 with a band gap in the visible range, can be used to sense the polarization direction non-destructively in a ferroelectric memory. A prototype 16-cell memory based on the cross-bar architecture has been prepared and tested, demonstrating the feasibility of this technique. PMID:23756366

  14. EDITORIAL: Non-volatile memory based on nanostructures Non-volatile memory based on nanostructures

    Science.gov (United States)

    Kalinin, Sergei; Yang, J. Joshua; Demming, Anna

    2011-06-01

    Non-volatile memory refers to the crucial ability of computers to store information once the power source has been removed. Traditionally this has been achieved through flash, magnetic computer storage and optical discs, and in the case of very early computers paper tape and punched cards. While computers have advanced considerably from paper and punched card memory devices, there are still limits to current non-volatile memory devices that restrict them to use as secondary storage from which data must be loaded and carefully saved when power is shut off. Denser, faster, low-energy non-volatile memory is highly desired and nanostructures are the critical enabler. This special issue on non-volatile memory based on nanostructures describes some of the new physics and technology that may revolutionise future computers. Phase change random access memory, which exploits the reversible phase change between crystalline and amorphous states, also holds potential for future memory devices. The chalcogenide Ge2Sb2Te5 (GST) is a promising material in this field because it combines a high activation energy for crystallization and a relatively low crystallization temperature, as well as a low melting temperature and low conductivity, which accommodates localized heating. Doping is often used to lower the current required to activate the phase change or 'reset' GST but this often aggravates other problems. Now researchers in Korea report in-depth studies of SiO2-doped GST and identify ways of optimising the material's properties for phase-change random access memory [1]. Resistance switching is an area that has attracted a particularly high level of interest for non-volatile memory technology, and a great deal of research has focused on the potential of TiO2 as a model system in this respect. Researchers at HP labs in the US have made notable progress in this field, and among the work reported in this special issue they describe means to control the switch resistance and show

  15. Novel Molecular Non-Volatile Memory: Application of Redox-Active Molecules

    OpenAIRE

    Hao Zhu; Qiliang Li

    2015-01-01

    This review briefly describes the development of molecular electronics in the application of non-volatile memory. Molecules, especially redox-active molecules, have become interesting due to their intrinsic redox behavior, which provides an excellent basis for low-power, high-density and high-reliability non-volatile memory applications. Recently, solid-state non-volatile memory devices based on redox-active molecules have been reported, exhibiting fast speed, low operation voltage, excellent...

  16. Flexible non-volatile optical memory thin-film transistor device with over 256 distinct levels based on an organic bicomponent blend.

    Science.gov (United States)

    Leydecker, Tim; Herder, Martin; Pavlica, Egon; Bratina, Gvido; Hecht, Stefan; Orgiu, Emanuele; Samorì, Paolo

    2016-09-01

    Organic nanomaterials are attracting a great deal of interest for use in flexible electronic applications such as logic circuits, displays and solar cells. These technologies have already demonstrated good performances, but flexible organic memories are yet to deliver on all their promise in terms of volatility, operational voltage, write/erase speed, as well as the number of distinct attainable levels. Here, we report a multilevel non-volatile flexible optical memory thin-film transistor based on a blend of a reference polymer semiconductor, namely poly(3-hexylthiophene), and a photochromic diarylethene, switched with ultraviolet and green light irradiation. A three-terminal device featuring over 256 (8 bit storage) distinct current levels was fabricated, the memory states of which could be switched with 3 ns laser pulses. We also report robustness over 70 write-erase cycles and non-volatility exceeding 500 days. The device was implemented on a flexible polyethylene terephthalate substrate, validating the concept for integration into wearable electronics and smart nanodevices.

  17. Flexible non-volatile optical memory thin-film transistor device with over 256 distinct levels based on an organic bicomponent blend

    Science.gov (United States)

    Leydecker, Tim; Herder, Martin; Pavlica, Egon; Bratina, Gvido; Hecht, Stefan; Orgiu, Emanuele; Samorì, Paolo

    2016-09-01

    Organic nanomaterials are attracting a great deal of interest for use in flexible electronic applications such as logic circuits, displays and solar cells. These technologies have already demonstrated good performances, but flexible organic memories are yet to deliver on all their promise in terms of volatility, operational voltage, write/erase speed, as well as the number of distinct attainable levels. Here, we report a multilevel non-volatile flexible optical memory thin-film transistor based on a blend of a reference polymer semiconductor, namely poly(3-hexylthiophene), and a photochromic diarylethene, switched with ultraviolet and green light irradiation. A three-terminal device featuring over 256 (8 bit storage) distinct current levels was fabricated, the memory states of which could be switched with 3 ns laser pulses. We also report robustness over 70 write-erase cycles and non-volatility exceeding 500 days. The device was implemented on a flexible polyethylene terephthalate substrate, validating the concept for integration into wearable electronics and smart nanodevices.

  18. Non-volatile magnetic random access memory

    Science.gov (United States)

    Katti, Romney R. (Inventor); Stadler, Henry L. (Inventor); Wu, Jiin-Chuan (Inventor)

    1994-01-01

    Improvements are made in a non-volatile magnetic random access memory. Such a memory is comprised of an array of unit cells, each having a Hall-effect sensor and a thin-film magnetic element made of material having an in-plane, uniaxial anisotropy and in-plane, bipolar remanent magnetization states. The Hall-effect sensor is made more sensitive by using a 1 m thick molecular beam epitaxy grown InAs layer on a silicon substrate by employing a GaAs/AlGaAs/InAlAs superlattice buffering layer. One improvement avoids current shunting problems of matrix architecture. Another improvement reduces the required magnetizing current for the micromagnets. Another improvement relates to the use of GaAs technology wherein high electron-mobility GaAs MESFETs provide faster switching times. Still another improvement relates to a method for configuring the invention as a three-dimensional random access memory.

  19. Non-volatile resistive memory device fabricated from CdSe quantum dot embedded in thermally grown In2O3 nanostructure by oblique angle deposition

    Science.gov (United States)

    Kannan, V.; Kim, Hyun-Seok; Park, Hyun-Chang

    2016-11-01

    In this paper we report In2O3/CdSe quantum dot based non-volatile resistive memory device with ON/OFF ratio ∼1000. Indium nanostructures were grown by oblique angle deposition technique in a thermal evaporator. Indium oxide nanostructures had size ranging from 20 nm to 100 nm as observed from TEM and AFM methods. The facile device fabricated with a layer of CdSe quantum dot on indium oxide film exhibited excellent endurance characteristics over 100,000 switching cycles. Retention tests showed good stability for over 4000 s. Memory operating mechanism is proposed based on charge trapping/de-trapping in quantum dots with indium oxide acting as barrier leading to Coulomb blockade. The mechanism is supported by negative differential resistance (NDR) observed exclusively in the ON state.

  20. Characterization of an Autonomous Non-Volatile Ferroelectric Memory Latch

    Science.gov (United States)

    John, Caroline S.; MacLeod, Todd C.; Evans, Joe; Ho, Fat D.

    2011-01-01

    We present the electrical characterization of an autonomous non-volatile ferroelectric memory latch using the principle that when an electric field is applied to a ferroelectriccapacitor,the positive and negative remnant polarization charge states of the capacitor are denoted as either data 0 or data 1. The properties of the ferroelectric material to store an electric polarization in the absence of an electric field make the device non-volatile. Further the memory latch is autonomous as it operates with the ground, power and output node connections, without any externally clocked control line. The unique quality of this latch circuit is that it can be written when powered off. The advantages of this latch over flash memories are: a) It offers unlimited reads/writes b) works on symmetrical read/write cycles. c) The latch is asynchronous. The circuit was initially developed by Radiant Technologies Inc., Albuquerque, New Mexico.

  1. A light incident angle switchable ZnO nanorod memristor: reversible switching behavior between two non-volatile memory devices.

    Science.gov (United States)

    Park, Jinjoo; Lee, Seunghyup; Lee, Junghan; Yong, Kijung

    2013-11-26

    A light incident angle selectivity of a memory device is demonstrated. As a model system, the ZnO resistive switching device has been selected. Electrical signal is reversibly switched between memristor and resistor behaviors by modulating the light incident angle on the device. Moreover, a liquid passivation layer is introduced to achieve stable and reversible exchange between the memristor and WORM behaviors. © 2013 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  2. GaAs metal-oxide-semiconductor based non-volatile flash memory devices with InAs quantum dots as charge storage nodes

    International Nuclear Information System (INIS)

    Islam, Sk Masiul; Chowdhury, Sisir; Sarkar, Krishnendu; Nagabhushan, B.; Banerji, P.; Chakraborty, S.; Mukherjee, Rabibrata

    2015-01-01

    Ultra-thin InP passivated GaAs metal-oxide-semiconductor based non-volatile flash memory devices were fabricated using InAs quantum dots (QDs) as charge storing elements by metal organic chemical vapor deposition technique to study the efficacy of the QDs as charge storage elements. The grown QDs were embedded between two high-k dielectric such as HfO 2 and ZrO 2 , which were used for tunneling and control oxide layers, respectively. The size and density of the QDs were found to be 5 nm and 1.8×10 11 cm −2 , respectively. The device with a structure Metal/ZrO 2 /InAs QDs/HfO 2 /GaAs/Metal shows maximum memory window equivalent to 6.87 V. The device also exhibits low leakage current density of the order of 10 −6 A/cm 2 and reasonably good charge retention characteristics. The low value of leakage current in the fabricated memory device is attributed to the Coulomb blockade effect influenced by quantum confinement as well as reduction of interface trap states by ultra-thin InP passivation on GaAs prior to HfO 2 deposition

  3. A supramolecular approach on using poly(fluorenylstyrene)-block-poly(2-vinylpyridine):PCBM composite thin films for non-volatile memory device applications.

    Science.gov (United States)

    Hsu, Jung-Ching; Liu, Cheng-Liang; Chen, Wen-Chang; Sugiyama, Kenji; Hirao, Akira

    2011-03-16

    Supramolecular composite thin films of poly[4-(9,9-dihexylfloren-2-yl)styrene]-block-poly(2-vinylpyridine) (P(St-Fl)-b-P2VP):[6,6]-phenyl-C(61)-butyric acid methyl ester (PCBM) were prepared for write-once-read-many times (WORM) non-volatile memory devices. The optical absorption and photoluminescence results indicated the formation of charge transfer complexation between the P2VP block and PCBM, which led to the varied PCBM aggregated size and memory characteristics. The ITO/PCBM:(P(St-Fl)-b-P2VP)/Al device exhibited the WORM characteristic with low threshold voltage (-1.6 to -3.2 V) and high ON/OFF ratio (10(3) to 10(5)) by tuning the PCBM content. The switching behavior could be explained by the charge injection dominated thermionic emission in the OFF state and field-induced charge transfer in the ON state. The present study provides a novel approach system for tuning polymer memory device characteristics through the supramolecular materials approach. Copyright © 2011 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  4. Laser Nanosoldering of Golden and Magnetite Particles and its Possible Application in 3D Printing Devices and Four-Valued Non-Volatile Memories

    Directory of Open Access Journals (Sweden)

    Jaworski Jacek

    2015-12-01

    Full Text Available In recent years the 3D printing methods have been developing rapidly. This article presents researches about a new composite consisted of golden and magnetite nanoparticles which could be used for this technique. Preparation of golden nanoparticles by laser ablation and their soldering by laser green light irradiation proceeded in water environment. Magnetite was obtained on chemical way. During experiments it was tested a change of a size of nanoparticles during laser irradiation, surface plasmon resonance, zeta potential. The obtained golden - magnetite composite material was magnetic after laser irradiation. On the end there was considered the application it for 3D printing devices, water filters and four-valued non-volatile memories.

  5. An overview of Experimental Condensed Matter Physics in Argentina by 2014, and Oxides for Non Volatile Memory Devices: The MeMOSat Project

    Science.gov (United States)

    Levy, Pablo

    2015-03-01

    In the first part of my talk, I will describe the status of the experimental research in Condensed Matter Physics in Argentina, biased towards developments related to micro and nanotechnology. In the second part, I will describe the MeMOSat Project, a consortium aimed at producing non-volatile memory devices to work in aggressive environments, like those found in the aerospace and nuclear industries. Our devices rely on the Resistive Switching mechanism, which produces a permanent but reversible change in the electrical resistance across a metal-insulator-metal structure by means of a pulsed protocol of electrical stimuli. Our project is devoted to the study of Memory Mechanisms in Oxides (MeMO) in order to establish a technological platform that tests the Resistive RAM (ReRAM) technology for aerospace applications. A review of MeMOSat's activities is presented, covering the initial Proof of Concept in ceramic millimeter sized samples; the study of different oxide-metal couples including (LaPr)2/3Ca1/3MnO, La2/3Ca1/3MnO3, YBa2Cu3O7, TiO2, HfO2, MgO and CuO; and recent miniaturized arrays of micrometer sized devices controlled by in-house designed electronics, which were launched with the BugSat01 satellite in June2014 by the argentinian company Satellogic.

  6. Channel equalization techniques for non-volatile memristor memories

    KAUST Repository

    Naous, Rawan

    2016-03-16

    Channel coding and information theoretic approaches have been utilized in conventional non-volatile memories to overcome their inherent design limitations of leakage, coupling and refresh rates. However, the continuous scaling and integration constraints set on the current devices directed the attention towards emerging memory technologies as suitable alternatives. Memristive devices are prominent candidates to replace the conventional electronics due to its non-volatility and small feature size. Nonetheless, memristor-based memories still encounter an accuracy limitation throughout the read operation addressed as the sneak path phenomenon. The readout data is corrupted with added distortion that increases significantly the bit error rate and jeopardizes the reliability of the read operation. A novel technique is applied to alleviate this distorting effect where the communication channel model is proposed for the memory array. Noise cancellation principles are applied with the aid of preset pilots to extract channel information and adjust the readout values accordingly. The proposed technique has the virtue of high speed, energy efficiency, and low complexity design while achieving high reliability and error-free decoding.

  7. VLSI-design of non-volatile memories

    CERN Document Server

    Campardo, Giovanni; Novosel, David

    2005-01-01

    VLSI-Design for Non-Volatile Memories is intended for electrical engineers and graduate students who want to enter into the integrated circuit design world. Non-volatile memories are treated as an example to explain general design concepts. Practical illustrative examples of non-volatile memories, including flash types, are showcased to give insightful examples of the discussed design approaches. A collection of photos is included to make the reader familiar with silicon aspects. Throughout all parts of this book, the authors have taken a practical and applications-driven point of view, provid

  8. Development of non-volatile semiconductor memory

    Science.gov (United States)

    Heikkila, W. W.

    1979-01-01

    A 256 word by 8-bit random access memory chip was developed utilizing p channel, metal gate metal-nitride-oxide-silicon (MNOS) technology; with operational characteristics of a 2.5 microsecond read cycle, a 6.0 microsecond write cycle, 800 milliwatts of power dissipation; and retention characteristics of 10 to the 8th power read cycles before data refresh and 5000 hours of no power retention. Design changes were implemented to reduce switching currents that caused parasitic bipolar transistors inherent in the MNOS structure to turn on. Final wafer runs exhibited acceptable yields for a die 250 mils on a side. Evaluation testing was performed on the device in order to determine the maturity of the device. A fixed gate breakdown mechanism was found when operated continuously at high temperature.

  9. Method for refreshing a non-volatile memory

    Science.gov (United States)

    Riekels, James E.; Schlesinger, Samuel

    2008-11-04

    A non-volatile memory and a method of refreshing a memory are described. The method includes allowing an external system to control refreshing operations within the memory. The memory may generate a refresh request signal and transmit the refresh request signal to the external system. When the external system finds an available time to process the refresh request, the external system acknowledges the refresh request and transmits a refresh acknowledge signal to the memory. The memory may also comprise a page register for reading and rewriting a data state back to the memory. The page register may comprise latches in lieu of supplemental non-volatile storage elements, thereby conserving real estate within the memory.

  10. Novel Molecular Non-Volatile Memory: Application of Redox-Active Molecules

    Directory of Open Access Journals (Sweden)

    Hao Zhu

    2015-12-01

    Full Text Available This review briefly describes the development of molecular electronics in the application of non-volatile memory. Molecules, especially redox-active molecules, have become interesting due to their intrinsic redox behavior, which provides an excellent basis for low-power, high-density and high-reliability non-volatile memory applications. Recently, solid-state non-volatile memory devices based on redox-active molecules have been reported, exhibiting fast speed, low operation voltage, excellent endurance and multi-bit storage, outperforming the conventional floating-gate flash memory. Such high performance molecular memory will lead to promising on-chip memory and future portable/wearable electronics applications.

  11. Non-exponential resistive switching in Ag2S memristors: a key to nanometer-scale non-volatile memory devices.

    Science.gov (United States)

    Gubicza, Agnes; Csontos, Miklós; Halbritter, András; Mihály, György

    2015-03-14

    The dynamics of resistive switchings in nanometer-scale metallic junctions formed between an inert metallic tip and an Ag film covered by a thin Ag2S layer are investigated. Our thorough experimental analysis and numerical simulations revealed that the resistance change upon a switching bias voltage pulse exhibits a strongly non-exponential behaviour yielding markedly different response times at different bias levels. Our results demonstrate the merits of Ag2S nanojunctions as nanometer-scale non-volatile memory cells with stable switching ratios, high endurance as well as fast response to write/erase, and an outstanding stability against read operations at technologically optimal bias and current levels.

  12. Non Volatile Flash Memory Radiation Tests

    Science.gov (United States)

    Irom, Farokh; Nguyen, Duc N.; Allen, Greg

    2012-01-01

    Commercial flash memory industry has experienced a fast growth in the recent years, because of their wide spread usage in cell phones, mp3 players and digital cameras. On the other hand, there has been increased interest in the use of high density commercial nonvolatile flash memories in space because of ever increasing data requirements and strict power requirements. Because of flash memories complex structure; they cannot be treated as just simple memories in regards to testing and analysis. It becomes quite challenging to determine how they will respond in radiation environments.

  13. Active non-volatile memory post-processing

    Energy Technology Data Exchange (ETDEWEB)

    Kannan, Sudarsun; Milojicic, Dejan S.; Talwar, Vanish

    2017-04-11

    A computing node includes an active Non-Volatile Random Access Memory (NVRAM) component which includes memory and a sub-processor component. The memory is to store data chunks received from a processor core, the data chunks comprising metadata indicating a type of post-processing to be performed on data within the data chunks. The sub-processor component is to perform post-processing of said data chunks based on said metadata.

  14. Non-Volatile Memory Technology Symposium 2000: Proceedings

    Science.gov (United States)

    Aranki, Nazeeh (Editor)

    2000-01-01

    This publication contains the proceedings for the Non-Volatile Memory Technology Symposium 2000 that was held on November 15-16, 2000 in Arlington, Virginia. The proceedings contains a wide range of papers that cover the presentations of myriad advances in the nonvolatile memory technology during the recent past including memory cell design, simulations, radiation environment, and emerging memory technologies. The papers presented in the proceedings address the design challenges and applications and deals with newer, emerging memory technologies as well as related issues of radiation environment and die packaging.

  15. Organic non-volatile memories from ferroelectric phase separated blends

    Science.gov (United States)

    Asadi, Kamal; de Leeuw, Dago; de Boer, Bert; Blom, Paul

    2009-03-01

    Ferroelectric polarisation is an attractive physical property for non-volatile binary switching. The functionality of the targeted memory should be based on resistive switching. Conductivity and ferroelectricity however cannot be tuned independently. The challenge is to develop a storage medium in which the favourable properties of ferroelectrics such as bistability and non-volatility can be combined with the beneficial properties provided by semiconductors such as conductivity and rectification. In this contribution we present an integrated solution by blending semiconducting and ferroelectric polymers into phase separated networks. The polarisation field of the ferroelectric modulates the injection barrier at the semiconductor--metal contact. This combination allows for solution-processed non-volatile memory arrays with a simple cross-bar architecture that can be read-out non-destructively. Based on this general concept a non-volatile, reversible switchable Schottky diode with relatively fast programming time of shorter than 100 microseconds, long information retention time of longer than 10^ days, and high programming cycle endurance with non-destructive read-out is demonstrated.

  16. Non-Volatile Memory Technology Symposium 2001: Proceedings

    Science.gov (United States)

    Aranki, Nazeeh; Daud, Taher; Strauss, Karl

    2001-01-01

    This publication contains the proceedings for the Non-Volatile Memory Technology Symposium 2001 that was held on November 7-8, 2001 in San Diego, CA. The proceedings contains a a wide range of papers that cover current and new memory technologies including Flash memories, Magnetic Random Access Memories (MRAM and GMRAM), Ferro-electric RAM (FeRAM), and Chalcogenide RAM (CRAM). The papers presented in the proceedings address the use of these technologies for space applications as well as radiation effects and packaging issues.

  17. Overview of radiation effects on emerging non-volatile memory technologies

    Directory of Open Access Journals (Sweden)

    Fetahović Irfan S.

    2017-01-01

    Full Text Available In this paper we give an overview of radiation effects in emergent, non-volatile memory technologies. Investigations into radiation hardness of resistive random access memory, ferroelectric random access memory, magneto-resistive random access memory, and phase change memory are presented in cases where these memory devices were subjected to different types of radiation. The obtained results proved high radiation tolerance of studied devices making them good candidates for application in radiation-intensive environments. [Project of the Serbian Ministry of Education, Science and Technological Development, Grant no. 171007

  18. Integration of organic based Schottky junctions for crossbar non-volatile memory applications

    DEFF Research Database (Denmark)

    Katsia, E.; Tallarida, G.; Ferrari, S.

    2008-01-01

    -voltage characteristics were studied in order to investigate which of the tested compounds could possibly reach the requirements for non-volatile memory applications. All the investigated devices displayed good rectifying properties, ranging from 10(2) to 10(4). On the other hand, one of the compounds reveals higher...

  19. High-performance non-volatile organic ferroelectric memory on banknotes.

    Science.gov (United States)

    Khan, M A; Bhansali, Unnat S; Alshareef, H N

    2012-04-24

    High-performance non-volatile polymer ferroelectric memory are fabricated on banknotes using poly(vinylidene fluoride trifluoroethylene). The devices show excellent performance with high remnant polarization, low operating voltages, low leakage, high mobility, and long retention times. Copyright © 2012 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  20. High-performance non-volatile organic ferroelectric memory on banknotes

    KAUST Repository

    Khan, Yasser

    2012-03-21

    High-performance non-volatile polymer ferroelectric memory are fabricated on banknotes using poly(vinylidene fluoride trifluoroethylene). The devices show excellent performance with high remnant polarization, low operating voltages, low leakage, high mobility, and long retention times. Copyright © 2012 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  1. Use of non-volatile memories for SSC detector readout

    International Nuclear Information System (INIS)

    Fennelly, A.J.; Woosley, J.K.; Johnson, M.B.

    1990-01-01

    Use of non-volatile memory units at the end of each fiber optic bunch/strand would substantially increase information available from experiments by providing a complete event history, in addition to easing real time processing requirements. This may be an alternative to enhancing technology to optical computing techniques. Available and low-risk projected technologies will be surveyed, with costing addressed. Some discussion will be given to covnersion of optical signals, to electronic information, concepts for providing timing pulses to the memory units, and to the magnetoresistive (MRAM) and ferroelectric (FERAM) random access memory technologies that may be utilized in the prototype system

  2. Non-volatile memory with self-assembled ferrocene charge trapping layer

    Science.gov (United States)

    Zhu, Hao; Hacker, Christina A.; Pookpanratana, Sujitra J.; Richter, Curt A.; Yuan, Hui; Li, Haitao; Kirillov, Oleg; Ioannou, Dimitris E.; Li, Qiliang

    2013-07-01

    A metal/oxide/molecule/oxide/Si capacitor structure containing redox-active ferrocene molecules has been fabricated for non-volatile memory application. Cyclic voltammetry and X-ray photoelectron spectroscopy were used to measure the molecules in the structure, showing that the molecules attach on SiO2/Si and the molecules are functional after device fabrication. These solid-state molecular memory devices have fast charge-storage speed and can endure more than 109 program/erase cycles. This excellent performance is derived from the intrinsic properties of the redox-active molecules and the hybrid Si-molecular device structure. These molecular devices are very attractive for future high-level non-volatile memory applications.

  3. Integrated photonics with programmable non-volatile memory.

    Science.gov (United States)

    Song, Jun-Feng; Luo, Xian-Shu; Lim, Andy Eu-Jin; Li, Chao; Fang, Qing; Liow, Tsung-Yang; Jia, Lian-Xi; Tu, Xiao-Guang; Huang, Ying; Zhou, Hai-Feng; Lo, Guo-Qiang

    2016-03-04

    Silicon photonics integrated circuits (Si-PIC) with well-established active and passive building elements are progressing towards large-scale commercialization in optical communications and high speed optical interconnects applications. However, current Si-PICs do not have memory capabilities, in particular, the non-volatile memory functionality for energy efficient data storage. Here, we propose an electrically programmable, multi-level non-volatile photonics memory cell (PMC) fabricated by standard complementary-metal-oxide-semiconductor (CMOS) compatible processes. A micro-ring resonator (MRR) was built using the PMC to optically read the memory states. Switching energy smaller than 20 pJ was achieved. Additionally, a MRR memory array was employed to demonstrate a four-bit memory read capacity. Theoretically, this can be increased up to ~400 times using a 100 nm free spectral range broadband light source. The fundamental concept of this design provides a route to eliminate the von Neumann bottleneck. The energy-efficient optical storage can complement on-chip optical interconnects for neutral networking, memory input/output interfaces and other computational intensive applications.

  4. Single-crystal C60 needle/CuPc nanoparticle double floating-gate for low-voltage organic transistors based non-volatile memory devices.

    Science.gov (United States)

    Chang, Hsuan-Chun; Lu, Chien; Liu, Cheng-Liang; Chen, Wen-Chang

    2015-01-07

    Low-voltage organic field-effect transistor memory devices exhibiting a wide memory window, low power consumption, acceptable retention, endurance properties, and tunable memory performance are fabricated. The performance is achieved by employing single-crystal C60 needles and copper phthalocyanine nanoparticles to produce an ambipolar (hole/electron) trapping effect in a double floating-gate architecture. © 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  5. Physical principles and current status of emerging non-volatile solid state memories

    Science.gov (United States)

    Wang, L.; Yang, C.-H.; Wen, J.

    2015-07-01

    Today the influence of non-volatile solid-state memories on persons' lives has become more prominent because of their non-volatility, low data latency, and high robustness. As a pioneering technology that is representative of non-volatile solidstate memories, flash memory has recently seen widespread application in many areas ranging from electronic appliances, such as cell phones and digital cameras, to external storage devices such as universal serial bus (USB) memory. Moreover, owing to its large storage capacity, it is expected that in the near future, flash memory will replace hard-disk drives as a dominant technology in the mass storage market, especially because of recently emerging solid-state drives. However, the rapid growth of the global digital data has led to the need for flash memories to have larger storage capacity, thus requiring a further downscaling of the cell size. Such a miniaturization is expected to be extremely difficult because of the well-known scaling limit of flash memories. It is therefore necessary to either explore innovative technologies that can extend the areal density of flash memories beyond the scaling limits, or to vigorously develop alternative non-volatile solid-state memories including ferroelectric random-access memory, magnetoresistive random-access memory, phase-change random-access memory, and resistive random-access memory. In this paper, we review the physical principles of flash memories and their technical challenges that affect our ability to enhance the storage capacity. We then present a detailed discussion of novel technologies that can extend the storage density of flash memories beyond the commonly accepted limits. In each case, we subsequently discuss the physical principles of these new types of non-volatile solid-state memories as well as their respective merits and weakness when utilized for data storage applications. Finally, we predict the future prospects for the aforementioned solid-state memories for

  6. Low-power non-volatile spintronic memory: STT-RAM and beyond

    International Nuclear Information System (INIS)

    Wang, K L; Alzate, J G; Khalili Amiri, P

    2013-01-01

    The quest for novel low-dissipation devices is one of the most critical for the future of semiconductor technology and nano-systems. The development of a low-power, universal memory will enable a new paradigm of non-volatile computation. Here we consider STT-RAM as one of the emerging candidates for low-power non-volatile memory. We show different configurations for STT memory and demonstrate strategies to optimize key performance parameters such as switching current and energy. The energy and scaling limits of STT-RAM are discussed, leading us to argue that alternative writing mechanisms may be required to achieve ultralow power dissipation, a necessary condition for direct integration with CMOS at the gate level for non-volatile logic purposes. As an example, we discuss the use of the giant spin Hall effect as a possible alternative to induce magnetization reversal in magnetic tunnel junctions using pure spin currents. Further, we concentrate on magnetoelectric effects, where electric fields are used instead of spin-polarized currents to manipulate the nanomagnets, as another candidate solution to address the challenges of energy efficiency and density. The possibility of an electric-field-controlled magnetoelectric RAM as a promising candidate for ultralow-power non-volatile memory is discussed in the light of experimental data demonstrating voltage-induced switching of the magnetization and reorientation of the magnetic easy axis by electric fields in nanomagnets. (paper)

  7. Application of deposited by ALD HfO2 and Al2O3 layers in double-gate dielectric stacks for non-volatile semiconductor memory (NVSM) devices

    International Nuclear Information System (INIS)

    Mroczyński, Robert; Taube, Andrzej; Gierałtowska, Sylwia; Guziewicz, Elżbieta; Godlewski, Marek

    2012-01-01

    The feasibility of the application of double-gate dielectric stacks with fabricated by atomic layer deposited (ALD) HfO 2 and Al 2 O 3 layers in non-volatile semiconductor memory (NVSM) devices was investigated. Significant improvement in retention at elevated temperatures after the application of ALD high-k oxides was demonstrated. Superior memory window (extrapolated at 10 years) of flat-band voltage (U fb ) value of the order of 2.6 V and 4.55 V at 85 °C, for stack with HfO 2 and Al 2 O 3 , respectively, was obtained. Moreover, the analysis of conduction mechanisms in the investigated stacks under negative voltage revealed F-N tunneling in the range of high values of electric field intensity and lowering of barrier height with increasing temperature.

  8. Scalable printed electronics: an organic decoder addressing ferroelectric non-volatile memory.

    Science.gov (United States)

    Ng, Tse Nga; Schwartz, David E; Lavery, Leah L; Whiting, Gregory L; Russo, Beverly; Krusor, Brent; Veres, Janos; Bröms, Per; Herlogsson, Lars; Alam, Naveed; Hagel, Olle; Nilsson, Jakob; Karlsson, Christer

    2012-01-01

    Scalable circuits of organic logic and memory are realized using all-additive printing processes. A 3-bit organic complementary decoder is fabricated and used to read and write non-volatile, rewritable ferroelectric memory. The decoder-memory array is patterned by inkjet and gravure printing on flexible plastics. Simulation models for the organic transistors are developed, enabling circuit designs tolerant of the variations in printed devices. We explain the key design rules in fabrication of complex printed circuits and elucidate the performance requirements of materials and devices for reliable organic digital logic.

  9. Scalable printed electronics: an organic decoder addressing ferroelectric non-volatile memory

    Science.gov (United States)

    Ng, Tse Nga; Schwartz, David E.; Lavery, Leah L.; Whiting, Gregory L.; Russo, Beverly; Krusor, Brent; Veres, Janos; Bröms, Per; Herlogsson, Lars; Alam, Naveed; Hagel, Olle; Nilsson, Jakob; Karlsson, Christer

    2012-01-01

    Scalable circuits of organic logic and memory are realized using all-additive printing processes. A 3-bit organic complementary decoder is fabricated and used to read and write non-volatile, rewritable ferroelectric memory. The decoder-memory array is patterned by inkjet and gravure printing on flexible plastics. Simulation models for the organic transistors are developed, enabling circuit designs tolerant of the variations in printed devices. We explain the key design rules in fabrication of complex printed circuits and elucidate the performance requirements of materials and devices for reliable organic digital logic. PMID:22900143

  10. Organic non-volatile memories from ferroelectric phase-separated blends

    Science.gov (United States)

    Asadi, Kamal; de Leeuw, Dago M.; de Boer, Bert; Blom, Paul W. M.

    2008-07-01

    New non-volatile memories are being investigated to keep up with the organic-electronics road map. Ferroelectric polarization is an attractive physical property as the mechanism for non-volatile switching, because the two polarizations can be used as two binary levels. However, in ferroelectric capacitors the read-out of the polarization charge is destructive. The functionality of the targeted memory should be based on resistive switching. In inorganic ferroelectrics conductivity and ferroelectricity cannot be tuned independently. The challenge is to develop a storage medium in which the favourable properties of ferroelectrics such as bistability and non-volatility can be combined with the beneficial properties provided by semiconductors such as conductivity and rectification. Here we present an integrated solution by blending semiconducting and ferroelectric polymers into phase-separated networks. The polarization field of the ferroelectric modulates the injection barrier at the semiconductor-metal contact. The combination of ferroelectric bistability with (semi)conductivity and rectification allows for solution-processed non-volatile memory arrays with a simple cross-bar architecture that can be read out non-destructively. The concept of an electrically tunable injection barrier as presented here is general and can be applied to other electronic devices such as light-emitting diodes with an integrated on/off switch.

  11. A fast, high-endurance and scalable non-volatile memory device made from asymmetric Ta2O(5-x)/TaO(2-x) bilayer structures.

    Science.gov (United States)

    Lee, Myoung-Jae; Lee, Chang Bum; Lee, Dongsoo; Lee, Seung Ryul; Chang, Man; Hur, Ji Hyun; Kim, Young-Bae; Kim, Chang-Jung; Seo, David H; Seo, Sunae; Chung, U-In; Yoo, In-Kyeong; Kim, Kinam

    2011-07-10

    Numerous candidates attempting to replace Si-based flash memory have failed for a variety of reasons over the years. Oxide-based resistance memory and the related memristor have succeeded in surpassing the specifications for a number of device requirements. However, a material or device structure that satisfies high-density, switching-speed, endurance, retention and most importantly power-consumption criteria has yet to be announced. In this work we demonstrate a TaO(x)-based asymmetric passive switching device with which we were able to localize resistance switching and satisfy all aforementioned requirements. In particular, the reduction of switching current drastically reduces power consumption and results in extreme cycling endurances of over 10(12). Along with the 10 ns switching times, this allows for possible applications to the working-memory space as well. Furthermore, by combining two such devices each with an intrinsic Schottky barrier we eliminate any need for a discrete transistor or diode in solving issues of stray leakage current paths in high-density crossbar arrays.

  12. Highly Stretchable Non-volatile Nylon Thread Memory.

    Science.gov (United States)

    Kang, Ting-Kuo

    2016-04-13

    Integration of electronic elements into textiles, to afford e-textiles, can provide an ideal platform for the development of lightweight, thin, flexible, and stretchable e-textiles. This approach will enable us to meet the demands of the rapidly growing market of wearable-electronics on arbitrary non-conventional substrates. However the actual integration of the e-textiles that undergo mechanical deformations during both assembly and daily wear or satisfy the requirements of the low-end applications, remains a challenge. Resistive memory elements can also be fabricated onto a nylon thread (NT) for e-textile applications. In this study, a simple dip-and-dry process using graphene- PSS (poly(3,4-ethylenedioxythiophene) polystyrene sulfonate) ink is proposed for the fabrication of a highly stretchable non-volatile NT memory. The NT memory appears to have typical write-once-read-many-times characteristics. The results show that an ON/OFF ratio of approximately 10(3) is maintained for a retention time of 10(6)s. Furthermore, a highly stretchable strain and a long-term digital-storage capability of the ON-OFF-ON states are demonstrated in the NT memory. The actual integration of the knitted NT memories into textiles will enable new design possibilities for low-cost and large-area e-textile memory applications.

  13. Highly Stretchable Non-volatile Nylon Thread Memory

    Science.gov (United States)

    Kang, Ting-Kuo

    2016-04-01

    Integration of electronic elements into textiles, to afford e-textiles, can provide an ideal platform for the development of lightweight, thin, flexible, and stretchable e-textiles. This approach will enable us to meet the demands of the rapidly growing market of wearable-electronics on arbitrary non-conventional substrates. However the actual integration of the e-textiles that undergo mechanical deformations during both assembly and daily wear or satisfy the requirements of the low-end applications, remains a challenge. Resistive memory elements can also be fabricated onto a nylon thread (NT) for e-textile applications. In this study, a simple dip-and-dry process using graphene-PEDOT:PSS (poly(3,4-ethylenedioxythiophene) polystyrene sulfonate) ink is proposed for the fabrication of a highly stretchable non-volatile NT memory. The NT memory appears to have typical write-once-read-many-times characteristics. The results show that an ON/OFF ratio of approximately 103 is maintained for a retention time of 106 s. Furthermore, a highly stretchable strain and a long-term digital-storage capability of the ON-OFF-ON states are demonstrated in the NT memory. The actual integration of the knitted NT memories into textiles will enable new design possibilities for low-cost and large-area e-textile memory applications.

  14. PREFACE: Emerging non-volatile memories: magnetic and resistive technologies Emerging non-volatile memories: magnetic and resistive technologies

    Science.gov (United States)

    Dieny, B.; Jagadish, Chennupati

    2013-02-01

    In 2010, the International Technology Roadmap for Semiconductors (ITRS) published an assessment of the potential and maturity of selected emerging research on memory technologies. Eight different technologies of non-volatile memories were compared (ferroelectric gate field-effect transistor, nano-electro-mechanical switch, spin-transfer torque random access memories (STTRAM), various types of resistive RAM, in particular redox RAM, nanothermal phase change RAM, electronic effects RAM, macromolecular memories and molecular RAM). In this report, spin-transfer torque MRAM and redox RRAM were identified as two emerging memory technologies recommended for accelerated research and development leading to scaling and commercialization of non-volatile RAM to and beyond the 16nm generation. Nowadays, there is an intense research and development effort in microelectronics on these two technologies, one based on spintronic phenomena (tunnel magnetoresistance and spin-transfer torque), the other based on migration of vacancies or ions in an insulating matrix driven by oxydo-reduction potentials. Both technologies could be used for standalone or embedded applications. In this context, it appeared timely to publish a cluster of review articles related to these two technologies. In this cluster, the first two articles introduce the general principles of spin-transfer torque RAM and of thermally assisted RAM. The third presents a broader range of applications for this integrated CMOS/magnetic tunnel junction technology for low-power electronics. The fourth paper presents more advanced research on voltage control of magnetization switching with the aim of dramatically reducing the write energy in MRAM. The last two papers deal with two categories of resistive RAM, one based on the migration of cations, the other one based on nanowires. We thank all the authors and reviewers for their contribution to this cluster issue. Our special thanks are due to Dr Olivia Roche, Publisher, and Dr

  15. Design exploration of emerging nano-scale non-volatile memory

    CERN Document Server

    Yu, Hao

    2014-01-01

    This book presents the latest techniques for characterization, modeling and design for nano-scale non-volatile memory (NVM) devices.  Coverage focuses on fundamental NVM device fabrication and characterization, internal state identification of memristic dynamics with physics modeling, NVM circuit design, and hybrid NVM memory system design-space optimization. The authors discuss design methodologies for nano-scale NVM devices from a circuits/systems perspective, including the general foundations for the fundamental memristic dynamics in NVM devices.  Coverage includes physical modeling, as well as the development of a platform to explore novel hybrid CMOS and NVM circuit and system design.   • Offers readers a systematic and comprehensive treatment of emerging nano-scale non-volatile memory (NVM) devices; • Focuses on the internal state of NVM memristic dynamics, novel NVM readout and memory cell circuit design, and hybrid NVM memory system optimization; • Provides both theoretical analysis and pr...

  16. A direct metal transfer method for cross-bar type polymer non-volatile memory applications

    International Nuclear Information System (INIS)

    Kim, Tae-Wook; Lee, Kyeongmi; Oh, Seung-Hwan; Wang, Gunuk; Kim, Dong-Yu; Jung, Gun-Young; Lee, Takhee

    2008-01-01

    Polymer non-volatile memory devices in 8 x 8 array cross-bar architecture were fabricated by a non-aqueous direct metal transfer (DMT) method using a two-step thermal treatment. Top electrodes with a linewidth of 2 μm were transferred onto the polymer layer by the DMT method. The switching behaviour of memory devices fabricated by the DMT method was very similar to that of devices fabricated by the conventional shadow mask method. The devices fabricated using the DMT method showed three orders of magnitude of on/off ratio with stable resistance switching, demonstrating that the DMT method can be a simple process to fabricate organic memory array devices

  17. Spirocyclic aromatic hydrocarbon-based organic nanosheets for eco-friendly aqueous processed thin-film non-volatile memory devices.

    Science.gov (United States)

    Lin, Zong-Qiong; Liang, Jin; Sun, Peng-Ju; Liu, Feng; Tay, Yee-Yan; Yi, Ming-Dong; Peng, Kun; Xia, Xian-Hai; Xie, Ling-Hai; Zhou, Xin-Hui; Zhao, Jian-Feng; Huang, Wei

    2013-07-19

    Supramolecular steric hindrance designs make pyrene-functionalized spiro[fluorene-9,7'-dibenzo[c,h]acridine]-5'-one (Py-SFDBAO) assemble into 2D nanostructures that facilitate aqueous phase large-area synthesis of high-quality and uniform crystalline thin films. Thin-film diodes using aqueous nanosheets as active layers exhibit a non-volatile bistable electrical switching feature with ON/OFF ratios of 6.0 × 10(4) and photoswitching with conductive gains of 10(2) -10(3). Organic nanosheets are potentially key components for eco-friendly aqueous dispersed organic nano-inks in the application of printed and flexible electronics. Copyright © 2013 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  18. Low-cost and nanoscale non-volatile memory concept for future silicon chips

    NARCIS (Netherlands)

    Lankhorst, M.H.R.; Ketelaars, B.W.S.M.M.; Wolters, Robertus A.M.

    2005-01-01

    Non-volatile 'flash' memories are key components of integrated circuits because they retain their data when power is interrupted. Despite their great commercial success, the semiconductor industry is searching for alternative non-volatile memories with improved performance and better opportunities

  19. Models for Total-Dose Radiation Effects in Non-Volatile Memory

    Energy Technology Data Exchange (ETDEWEB)

    Campbell, Philip Montgomery; Wix, Steven D.

    2017-04-01

    The objective of this work is to develop models to predict radiation effects in non- volatile memory: flash memory and ferroelectric RAM. In flash memory experiments have found that the internal high-voltage generators (charge pumps) are the most sensitive to radiation damage. Models are presented for radiation effects in charge pumps that demonstrate the experimental results. Floating gate models are developed for the memory cell in two types of flash memory devices by Intel and Samsung. These models utilize Fowler-Nordheim tunneling and hot electron injection to charge and erase the floating gate. Erase times are calculated from the models and compared with experimental results for different radiation doses. FRAM is less sensitive to radiation than flash memory, but measurements show that above 100 Krad FRAM suffers from a large increase in leakage current. A model for this effect is developed which compares closely with the measurements.

  20. Non-volatile ferroelectric memory with position-addressable polymer semiconducting nanowire.

    Science.gov (United States)

    Hwang, Sun Kak; Min, Sung-Yong; Bae, Insung; Cho, Suk Man; Kim, Kang Lib; Lee, Tae-Woo; Park, Cheolmin

    2014-05-28

    One-dimensional nanowires (NWs) have been extensively examined for numerous potential nano-electronic device applications such as transistors, sensors, memories, and photodetectors. The ferroelectric-gate field effect transistors (Fe-FETs) with semiconducting NWs in particular in combination with ferroelectric polymers as gate insulating layers have attracted great attention because of their potential in high density memory integration. However, most of the devices still suffer from low yield of devices mainly due to the ill-control of the location of NWs on a substrate. NWs randomly deposited on a substrate from solution-dispersed droplet made it extremely difficult to fabricate arrays of NW Fe-FETs. Moreover, rigid inorganic NWs were rarely applicable for flexible non-volatile memories. Here, we present the NW Fe-FETs with position-addressable polymer semiconducting NWs. Polymer NWs precisely controlled in both location and number between source and drain electrode were achieved by direct electrohydrodynamic NW printing. The polymer NW Fe-FETs with a ferroelectric poly(vinylidene fluoride-co-trifluoroethylene) exhibited non-volatile ON/OFF current margin at zero gate voltage of approximately 10(2) with time-dependent data retention and read/write endurance of more than 10(4) seconds and 10(2) cycles, respectively. Furthermore, our device showed characteristic bistable current hysteresis curves when being deformed with various bending radii and multiple bending cycles over 1000 times. © 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  1. Non-volatile flash memory with discrete bionanodot floating gate assembled by protein template

    International Nuclear Information System (INIS)

    Miura, Atsushi; Yamashita, Ichiro; Uraoka, Yukiharu; Fuyuki, Takashi; Tsukamoto, Rikako; Yoshii, Shigeo

    2008-01-01

    We demonstrated non-volatile flash memory fabrication by utilizing uniformly sized cobalt oxide (Co 3 O 4 ) bionanodot (Co-BND) architecture assembled by a cage-shaped supramolecular protein template. A fabricated high-density Co-BND array was buried in a metal-oxide-semiconductor field-effect-transistor (MOSFET) structure to use as the charge storage node of a floating nanodot gate memory. We observed a clockwise hysteresis in the drain current-gate voltage characteristics of fabricated BND-embedded MOSFETs. Observed hysteresis obviously indicates a memory operation of Co-BND-embedded MOSFETs due to the charge confinement in the embedded BND and successful functioning of embedded BNDs as the charge storage nodes of the non-volatile flash memory. Fabricated Co-BND-embedded MOSFETs showed good memory properties such as wide memory windows, long charge retention and high tolerance to repeated write/erase operations. A new pathway for device fabrication by utilizing the versatile functionality of biomolecules is presented

  2. Non-volatile flash memory with discrete bionanodot floating gate assembled by protein template.

    Science.gov (United States)

    Miura, Atsushi; Tsukamoto, Rikako; Yoshii, Shigeo; Yamashita, Ichiro; Uraoka, Yukiharu; Fuyuki, Takashi

    2008-06-25

    We demonstrated non-volatile flash memory fabrication by utilizing uniformly sized cobalt oxide (Co(3)O(4)) bionanodot (Co-BND) architecture assembled by a cage-shaped supramolecular protein template. A fabricated high-density Co-BND array was buried in a metal-oxide-semiconductor field-effect-transistor (MOSFET) structure to use as the charge storage node of a floating nanodot gate memory. We observed a clockwise hysteresis in the drain current-gate voltage characteristics of fabricated BND-embedded MOSFETs. Observed hysteresis obviously indicates a memory operation of Co-BND-embedded MOSFETs due to the charge confinement in the embedded BND and successful functioning of embedded BNDs as the charge storage nodes of the non-volatile flash memory. Fabricated Co-BND-embedded MOSFETs showed good memory properties such as wide memory windows, long charge retention and high tolerance to repeated write/erase operations. A new pathway for device fabrication by utilizing the versatile functionality of biomolecules is presented.

  3. Controlled data storage for non-volatile memory cells embedded in nano magnetic logic

    Science.gov (United States)

    Riente, Fabrizio; Ziemys, Grazvydas; Mattersdorfer, Clemens; Boche, Silke; Turvani, Giovanna; Raberg, Wolfgang; Luber, Sebastian; Breitkreutz-v. Gamm, Stephan

    2017-05-01

    Among the beyond-CMOS technologies, perpendicular Nano Magnetic Logic (pNML) is a promising candidate due to its low power consumption, its non-volatility and its monolithic 3D integrability, which makes it possible to integrate memory and logic into the same device by exploiting the interaction of bi-stable nanomagnets with perpendicular magnetic anisotropy. Logic computation and signal synchronization are achieved by focus ion beam irradiation and by pinning domain walls in magnetic notches. However, in realistic circuits, the information storage and their read-out are crucial issues, often ignored in the exploration of beyond-CMOS devices. In this paper we address these issues by experimentally demonstrating a pNML memory element, whose read and write operations can be controlled by two independent pulsed currents. Our results prove the correct behavior of the proposed structure that enables high density memory embedded in the logic plane of 3D-integrated pNML circuits.

  4. Organic non-volatile memories from ferroelectric phase-separated blends

    NARCIS (Netherlands)

    Asadi, Kamal; De Leeuw, Dago M.; De Boer, Bert; Blom, Paul W. M.

    New non-volatile memories are being investigated to keep up with the organic-electronics road map(1). Ferroelectric polarization is an attractive physical property as the mechanism for non-volatile switching, because the two polarizations can be used as two binary levels(2). However, in

  5. Non-volatile organic memory with sub-millimetre bending radius.

    Science.gov (United States)

    Kim, Richard Hahnkee; Kim, Hae Jin; Bae, Insung; Hwang, Sun Kak; Velusamy, Dhinesh Babu; Cho, Suk Man; Takaishi, Kazuto; Muto, Tsuyoshi; Hashizume, Daisuke; Uchiyama, Masanobu; André, Pascal; Mathevet, Fabrice; Heinrich, Benoit; Aoyama, Tetsuya; Kim, Dae-Eun; Lee, Hyungsuk; Ribierre, Jean-Charles; Park, Cheolmin

    2014-04-08

    High-performance non-volatile memory that can operate under various mechanical deformations such as bending and folding is in great demand for the future smart wearable and foldable electronics. Here we demonstrate non-volatile solution-processed ferroelectric organic field-effect transistor memories operating in p- and n-type dual mode, with excellent mechanical flexibility. Our devices contain a ferroelectric poly(vinylidene fluoride-co-trifluoroethylene) thin insulator layer and use a quinoidal oligothiophene derivative (QQT(CN)4) as organic semiconductor. Our dual-mode field-effect devices are highly reliable with data retention and endurance of >6,000 s and 100 cycles, respectively, even after 1,000 bending cycles at both extreme bending radii as low as 500 μm and with sharp folding involving inelastic deformation of the device. Nano-indentation and nano scratch studies are performed to characterize the mechanical properties of organic layers and understand the crucial role played by QQT(CN)4 on the mechanical flexibility of our devices.

  6. Anchor-free NEMS non-volatile memory cell for harsh environment data storage

    International Nuclear Information System (INIS)

    Singh, Pushpapraj; Chua, Geng Li; Liang, Ying Shun; Jayaraman, Karthik Gopal; Do, Anh Tuan; Kim, Tony Tae-Hyoung

    2014-01-01

    This work demonstrates a novel anchor-free nano-electromechanical (NEMS) based non-volatile memory cell, suitable for high temperature (T ≤ 300 °C) and radiation prone harsh environment applications. The anchor-free circular metal beam is actuated by electrostatic force and is held in one of the bi-stable memory states by adhesion force between two smooth metal surfaces in contact. Smooth metal layers form strong van der Waals stiction between two surfaces in contact and memory detection (Logic-‘1’ / Logic-‘0’) is obtained by detecting the conductance between two fixed contacts. This anchor-free design offers highest density (9F 2 footprint) compared to other mechanical memory devices reported to date. (paper)

  7. Role of Non-Volatile Memories in Automotive and IoT Markets

    Science.gov (United States)

    2017-03-01

    Role of Non-Volatile Memories in Automotive and IoT Markets Vipin Tiwari Director, Business Development and Product Marketing SST – A Wholly Own...automotive and Internet of Things ( IoT ) markets. Keywords: Embedded flash; Microcontrollers, Automotive; Internet of Things, IoT ; Non-volatile memories...volatile memory. The Internet of Things ( IoT ) is centered on providing distributed intelligence, sensing and connectivity to electronics around

  8. Transistor device for multi-bit non-volatile storage

    International Nuclear Information System (INIS)

    Tan, S.G.; Jalil, M.B.A.; Kumar, Vimal; Liew, Thomas; Teo, K.L.; Chong, T.C.

    2006-01-01

    We propose a transistor model that incorporates multiple storage elements within a single transistor device. This device is thus smaller in size compared to the magnetoresistive random access memory (MRAM) with the same number of storage bits. The device model can function in both the current as well as voltage detection mode. Simulations were carried out at higher temperature, taking into consideration the spread of electron density above the Fermi level. We found that linear detection of conductance variation with the stored binary value can be achieved for a 3-bit storage device up to a temperature of 350 K

  9. Radiation Hardened Nanobridge based Non-volatile Memory for Space Applications, Phase I

    Data.gov (United States)

    National Aeronautics and Space Administration — This NASA Phase I SBIR program would develop and demonstrate radiation hardened nanobridge based non-volatile memory (NVM) for space applications. Specifically, we...

  10. Rad hard Non volatile memory for FPGA boot loading, Phase I

    Data.gov (United States)

    National Aeronautics and Space Administration — Radiation-hardened non volatile memory is needed to store the golden copy of the image(s) has not kept pace with the advances in FPGAs. Consider that a single image...

  11. Rad Hard Non Volatile Memory for FPGA BootLoading, Phase II

    Data.gov (United States)

    National Aeronautics and Space Administration — Radiation-hardened non volatile memory (NVM) is needed to store the golden copy of the image(s) has not kept pace with the advances in FPGAs. Consider that a single...

  12. Self-assembled three-dimensional non-volatile memories

    NARCIS (Netherlands)

    Abelmann, Leon; Tas, Niels Roelof; Berenschot, Johan W.; Elwenspoek, Michael Curt

    2010-01-01

    The continuous increase in capacity of non-volatile data storage systems will lead to bit densities of one bit per atom in 2020. Beyond this point, capacity can be increased by moving into the third dimension. We propose to use self-assembly of nanosized elements, either as a loosely organised

  13. Quasi-unipolar pentacene films embedded with fullerene for non-volatile organic transistor memories

    International Nuclear Information System (INIS)

    Lee, Juhee; Lee, Sungpyo; Lee, Moo Hyung; Kang, Moon Sung

    2015-01-01

    Quasi-unipolar non-volatile organic transistor memory (NOTM) can combine the best characteristics of conventional unipolar and ambipolar NOTMs and, as a result, exhibit improved device performance. Unipolar NOTMs typically exhibit a large signal ratio between the programmed and erased current signals but also require a large voltage to program and erase the memory cells. Meanwhile, an ambipolar NOTM can be programmed and erased at lower voltages, but the resulting signal ratio is small. By embedding a discontinuous n-type fullerene layer within a p-type pentacene film, quasi-unipolar NOTMs are fabricated, of which the signal storage utilizes both electrons and holes while the electrical signal relies on only hole conduction. These devices exhibit superior memory performance relative to both pristine unipolar pentacene devices and ambipolar fullerene/pentacene bilayer devices. The quasi-unipolar NOTM exhibited a larger signal ratio between the programmed and erased states while also reducing the voltage required to program and erase a memory cell. This simple approach should be readily applicable for various combinations of advanced organic semiconductors that have been recently developed and thereby should make a significant impact on organic memory research

  14. An FPGA-Based Test-Bed for Reliability and Endurance Characterization of Non-Volatile Memory

    Science.gov (United States)

    Rao, Vikram; Patel, Jagdish; Patel, Janak; Namkung, Jeffrey

    2001-01-01

    Memory technologies are divided into two categories. The first category, nonvolatile memories, are traditionally used in read-only or read-mostly applications because of limited write endurance and slow write speed. These memories are derivatives of read only memory (ROM) technology, which includes erasable programmable ROM (EPROM), electrically-erasable programmable ROM (EEPROM), Flash, and more recent ferroelectric non-volatile memory technology. Nonvolatile memories are able to retain data in the absence of power. The second category, volatile memories, are random access memory (RAM) devices including SRAM and DRAM. Writing to these memories is fast and write endurance is unlimited, so they are most often used to store data that change frequently, but they cannot store data in the absence of power. Nonvolatile memory technologies with better future potential are FRAM, Chalcogenide, GMRAM, Tunneling MRAM, and Silicon-Oxide-Nitride-Oxide-Silicon (SONOS) EEPROM.

  15. The floating-gate non-volatile semiconductor memory--from invention to the digital age.

    Science.gov (United States)

    Sze, S M

    2012-10-01

    In the past 45 years (from 1967 to 2012), the non-volatile semiconductor memory (NVSM) has emerged from a floating-gate concept to the prime technology driver of the largest industry in the world-the electronics industry. In this paper, we briefly review the historical development of NVSM and project its future trends to the year 2020. In addition, we consider NVSM's wide-range of applications from the digital cellular phone to tablet computer to digital television. As the device dimension is scaled down to the deca-nanometer regime, we expect that many innovations will be made to meet the scaling challenges, and NVSM-inspired technology will continue to enrich and improve our lives for decades to come.

  16. Attachable and flexible aluminum oxide resistive non-volatile memory arrays fabricated on tape as the substrate.

    Science.gov (United States)

    Lee, Woocheol; Jang, Jingon; Song, Younggul; Cho, Kyungjune; Yoo, Daekyoung; Kim, Youngrok; Chung, Seungjun; Lee, Takhee

    2017-03-01

    We fabricated 8 × 8 arrays of non-volatile resistive memory devices on commercially available Scotch ® Magic ™ tape as a flexible substrate. The memory devices consist of double active layers of Al 2 O 3 with a structure of Au/Al 2 O 3 /Au/Al 2 O 3 /Al (50 nm/20 nm/20 nm/20 nm/50 nm) on attachable tape substrates. Because the memory devices were fabricated using only dry and low temperature processes, the tape substrate did not suffer from any physical or chemical damage during the fabrication. The fabricated memory devices were turned to the low resistance state at ∼3.5 V and turned to the high resistance state at ∼10 V with a negative differential resistance region after ∼5 V, showing typical unipolar non-volatile resistive memory behavior. The memory devices on the tape substrates exhibited reasonable electrical performances including a high ON/OFF ratio of 10 4 , endurance over 200 cycles of reading/writing processes, and retention times of over 10 4 s in both the flat and bent configurations.

  17. Review on Non-Volatile Memory with High-k Dielectrics: Flash for Generation Beyond 32 nm.

    Science.gov (United States)

    Zhao, Chun; Zhao, Ce Zhou; Taylor, Stephen; Chalker, Paul R

    2014-07-15

    Flash memory is the most widely used non-volatile memory device nowadays. In order to keep up with the demand for increased memory capacities, flash memory has been continuously scaled to smaller and smaller dimensions. The main benefits of down-scaling cell size and increasing integration are that they enable lower manufacturing cost as well as higher performance. Charge trapping memory is regarded as one of the most promising flash memory technologies as further down-scaling continues. In addition, more and more exploration is investigated with high -k dielectrics implemented in the charge trapping memory. The paper reviews the advanced research status concerning charge trapping memory with high -k dielectrics for the performance improvement. Application of high -k dielectric as charge trapping layer, blocking layer, and tunneling layer is comprehensively discussed accordingly.

  18. Review on Non-Volatile Memory with High-k Dielectrics: Flash for Generation Beyond 32 nm

    Directory of Open Access Journals (Sweden)

    Chun Zhao

    2014-07-01

    Full Text Available Flash memory is the most widely used non-volatile memory device nowadays. In order to keep up with the demand for increased memory capacities, flash memory has been continuously scaled to smaller and smaller dimensions. The main benefits of down-scaling cell size and increasing integration are that they enable lower manufacturing cost as well as higher performance. Charge trapping memory is regarded as one of the most promising flash memory technologies as further down-scaling continues. In addition, more and more exploration is investigated with high-k dielectrics implemented in the charge trapping memory. The paper reviews the advanced research status concerning charge trapping memory with high-k dielectrics for the performance improvement. Application of high-k dielectric as charge trapping layer, blocking layer, and tunneling layer is comprehensively discussed accordingly.

  19. Controlled data storage for non-volatile memory cells embedded in nano magnetic logic

    Directory of Open Access Journals (Sweden)

    Fabrizio Riente

    2017-05-01

    Full Text Available Among the beyond-CMOS technologies, perpendicular Nano Magnetic Logic (pNML is a promising candidate due to its low power consumption, its non-volatility and its monolithic 3D integrability, which makes it possible to integrate memory and logic into the same device by exploiting the interaction of bi-stable nanomagnets with perpendicular magnetic anisotropy. Logic computation and signal synchronization are achieved by focus ion beam irradiation and by pinning domain walls in magnetic notches. However, in realistic circuits, the information storage and their read-out are crucial issues, often ignored in the exploration of beyond-CMOS devices. In this paper we address these issues by experimentally demonstrating a pNML memory element, whose read and write operations can be controlled by two independent pulsed currents. Our results prove the correct behavior of the proposed structure that enables high density memory embedded in the logic plane of 3D-integrated pNML circuits.

  20. Origami-based tunable truss structures for non-volatile mechanical memory operation.

    Science.gov (United States)

    Yasuda, Hiromi; Tachi, Tomohiro; Lee, Mia; Yang, Jinkyu

    2017-10-17

    Origami has recently received significant interest from the scientific community as a method for designing building blocks to construct metamaterials. However, the primary focus has been placed on their kinematic applications by leveraging the compactness and auxeticity of planar origami platforms. Here, we present volumetric origami cells-specifically triangulated cylindrical origami (TCO)-with tunable stability and stiffness, and demonstrate their feasibility as non-volatile mechanical memory storage devices. We show that a pair of TCO cells can develop a double-well potential to store bit information. What makes this origami-based approach more appealing is the realization of two-bit mechanical memory, in which two pairs of TCO cells are interconnected and one pair acts as a control for the other pair. By assembling TCO-based truss structures, we experimentally verify the tunable nature of the TCO units and demonstrate the operation of purely mechanical one- and two-bit memory storage prototypes.Origami is a popular method to design building blocks for mechanical metamaterials. Here, the authors assemble a volumetric origami-based structure, predict its axial and rotational movements during folding, and demonstrate the operation of mechanical one- and two-bit memory storage.

  1. Progress on a New Non-Volatile Memory for Space Based on Chalcogenide Glass

    Science.gov (United States)

    Maimon, J.; Hunt, K.; Rodgers, J.; Burcin, L.; Knowles, K.

    2004-02-01

    We report on the progress of a recent addition to non-volatile solid state memory technologies suited for space and other ionizing radiation environments. We summarize the material and processing science behind the current generation of chalcogenide phase-change memories fabricated on CMOS structures. The chalcogenide material used for phase-change applications in rewritable optical storage (Ge2Sb2Te5) has been integrated with a radiation hardened CMOS process to produce 64kbit memory arrays. On selected arrays electrical testing demonstrated up to 100% memory cell yield, 100ns programming and read speeds, and write currents as low as 1mA/bit. Devices functioned normally from - 55°C to 125°C. Write/read endurance has been demonstrated to 1 × 108 before first bit failure. Radiation results show no degradation to the hardened CMOS or effects that can be attributed to the phase-change material. Future applications of the technology are discussed.

  2. Inkjet-printing of non-volatile organic resistive devices and crossbar array structures

    Science.gov (United States)

    Sax, Stefan; Nau, Sebastian; Popovic, Karl; Bluemel, Alexander; Klug, Andreas; List-Kratochvil, Emil J. W.

    2015-09-01

    Due to the increasing demand for storage capacity in various electronic gadgets like mobile phones or tablets, new types of non-volatile memory devices have gained a lot of attention over the last few years. Especially multilevel conductance switching elements based on organic semiconductors are of great interest due to their relatively simple device architecture and their small feature size. Since organic semiconductors combine the electronic properties of inorganic materials with the mechanical characteristics of polymers, this class of materials is suitable for solution based large area device preparation techniques. Consequently, inkjet based deposition techniques are highly capable of facing preparation related challenges. By gradually replacing the evaporated electrodes with inkjet printed silver, the preparation related influence onto device performance parameters such as the ON/OFF ratio was investigated with IV measurements and high resolution transmission electron microscopy. Due to the electrode surface roughness the solvent load during the printing of the top electrode as well as organic layer inhomogeneity's the utilization in array applications is hampered. As a prototypical example a 1diode-1resistor element and a 2×2 subarray from 5×5 array matrix were fully characterized demonstrating the versatility of inkjet printing for device preparation.

  3. Investigation of High-k Dielectrics and Metal Gate Electrodes for Non-volatile Memory Applications

    Science.gov (United States)

    Jayanti, Srikant

    Due to the increasing demand of non-volatile flash memories in the portable electronics, the device structures need to be scaled down drastically. However, the scalability of traditional floating gate structures beyond 20 nm NAND flash technology node is uncertain. In this regard, the use of metal gates and high-k dielectrics as the gate and interpoly dielectrics respectively, seem to be promising substitutes in order to continue the flash scaling beyond 20nm. Furthermore, research of novel memory structures to overcome the scaling challenges need to be explored. Through this work, the use of high-k dielectrics as IPDs in a memory structure has been studied. For this purpose, IPD process optimization and barrier engineering were explored to determine and improve the memory performance. Specifically, the concept of high-k / low-k barrier engineering was studied in corroboration with simulations. In addition, a novel memory structure comprising a continuous metal floating gate was investigated in combination with high-k blocking oxides. Integration of thin metal FGs and high-k dielectrics into a dual floating gate memory structure to result in both volatile and non-volatile modes of operation has been demonstrated, for plausible application in future unified memory architectures. The electrical characterization was performed on simple MIS/MIM and memory capacitors, fabricated through CMOS compatible processes. Various analytical characterization techniques were done to gain more insight into the material behavior of the layers in the device structure. In the first part of this study, interfacial engineering was investigated by exploring La2O3 as SiO2 scavenging layer. Through the silicate formation, the consumption of low-k SiO2 was controlled and resulted in a significant improvement in dielectric leakage. The performance improvement was also gauged through memory capacitors. In the second part of the study, a novel memory structure consisting of continuous metal FG

  4. Radiation Tolerant, High Capacity Non-Volatile Memory

    Data.gov (United States)

    National Aeronautics and Space Administration — The need for reliable, high capacity, radiation tolerant nonvolatile memory exists in many Human space flight applications. Most projects rely on COTS hardware for a...

  5. Formation of high density TiN nanocrystals and its application in non-volatile memories

    International Nuclear Information System (INIS)

    Li Xuelin; Chen Guoguang; Feng Shunshan

    2008-01-01

    Non-volatile memory based on TiN nanocrystal (TiN-NC) charge storage nodes embedded in SiO 2 has been fabricated and its electrical properties have been measured. It was found that the density and size distribution of TiN-NCs can be controlled by annealing temperature. The formation of well separated crystalline TiN nano-dots with an average size of 5nm is confirmed by transmission electron microscopy and x-ray diffraction. x-ray photoelectron spectroscopy confirms the existence of a transition layer of TiN x O y /SiON oxide between TiN-NC and SiO 2 , which reduces the barrier height of tunnel oxide and thereby enhances programming/erasing speed. The memory device shows a memory window of 2.5V and an endurance cycle throughout 10 5 . Its charging mechanism, which is interpreted from the analysis of programming speed (dV th /dt) and the gate leakage versus voltage characteristics (I g vs V g ), has been explained by direct tunnelling for tunnel oxide and Fowler–Nordheim tunnelling for control oxide at programming voltages lower than 9V, and by Fowler–Nordheim tunnelling for both the oxides at programming voltages higher than 9 V

  6. Formation of high density TiN nanocrystals and its application in non-volatile memories

    Science.gov (United States)

    Li, Xue-Lin; Feng, Shun-Shan; Chen, Guo-Guang

    2008-03-01

    Non-volatile memory based on TiN nanocrystal (TiN-NC) charge storage nodes embedded in SiO2 has been fabricated and its electrical properties have been measured. It was found that the density and size distribution of TiN-NCs can be controlled by annealing temperature. The formation of well separated crystalline TiN nano-dots with an average size of 5nm is confirmed by transmission electron microscopy and x-ray diffraction. x-ray photoelectron spectroscopy confirms the existence of a transition layer of TiNxOy/SiON oxide between TiN-NC and SiO2, which reduces the barrier height of tunnel oxide and thereby enhances programming/erasing speed. The memory device shows a memory window of 2.5V and an endurance cycle throughout 105. Its charging mechanism, which is interpreted from the analysis of programming speed (dVth/dt) and the gate leakage versus voltage characteristics (Ig vs Vg), has been explained by direct tunnelling for tunnel oxide and Fowler-Nordheim tunnelling for control oxide at programming voltages lower than 9V, and by Fowler-Nordheim tunnelling for both the oxides at programming voltages higher than 9 V.

  7. Si nano crystals by ultra-low energy ion implantation for non-volatile memory applications

    International Nuclear Information System (INIS)

    Coffin, H.; Bonafos, C.; Schamm, S.; Carrada, M.; Cherkashin, N.; Ben Assayag, G.; Dimitrakis, P.; Normand, P.; Respaud, M.; Claverie, A.

    2005-01-01

    In nanocrystal (nc) metal-oxide-semiconductor (MOS) memory structures, a fine control of nc location and population is required for pinpointing the optimal device architectures. In this work, we show how to manipulate and control the depth-position, size and surface density of two dimensional (2D) arrays of Si ncs embedded in thin ( 2 layers, fabricated by ultra-low energy (typically 1 keV) ion implantation and subsequent annealing. The influence of implantation and annealing conditions on the nc characteristics (e.g. size, density) and the charge storage properties of associated MOS structures is reported with particular emphasis upon the effect of annealing in N 2 -diluted-O 2 gas mixture. The latter annealing conditions restore the integrity of the oxide and allow for the fabrication of non-volatile memory devices operating at low-gate voltages. Annealing in diluted oxygen has also an effect on the population of silicon ncs. Their evolution has been studied as a function of the annealing duration under N 2 + O 2 at 900 o C. An extended spherical Deal-Grove model for the self-limiting oxidation of embedded Si ncs has been carried out. It shows that stress effects, due to the deformation of the oxide, slows down the chemical oxidation rate and leads to a self-limiting oxide growth. The model predictions are in agreement with the experimental results

  8. Reconfigurable Electronics and Non-Volatile Memory Research

    Science.gov (United States)

    2015-11-10

    energy of the spin-spin and spin-orbit angular moment of the electrons around an atom and the angular momentum (spin- spin and spin-orbit) of the...mode wavelength stabilized laser diode (Innovative Photonic Solutions). The Raman spectra were measured three times on different points for each...devices under test c) Custom switching circuitry is used to allow multiplexing the 150 rows by 150 columns of devices to 10 rows by 10 columns d

  9. High-Speed Non-Volatile Optical Memory: Achievements and Challenges

    Directory of Open Access Journals (Sweden)

    Vadym Zayets

    2017-01-01

    Full Text Available We have proposed, fabricated, and studied a new design of a high-speed optical non-volatile memory. The recoding mechanism of the proposed memory utilizes a magnetization reversal of a nanomagnet by a spin-polarized photocurrent. It was shown experimentally that the operational speed of this memory may be extremely fast above 1 TBit/s. The challenges to realize both a high-speed recording and a high-speed reading are discussed. The memory is compact, integratable, and compatible with present semiconductor technology. If realized, it will advance data processing and computing technology towards a faster operation speed.

  10. Peroxide induced volatile and non-volatile switching behavior in ZnO-based electrochemical metallization memory cell.

    Science.gov (United States)

    Simanjuntak, Firman Mangasa; Chandrasekaran, Sridhar; Pattanayak, Bhaskar; Lin, Chun-Chieh; Tseng, Tseung-Yuen

    2017-09-20

    We explore the use of cubic-zinc peroxide (ZnO 2 ) as a switching material for electrochemical metallization memory (ECM) cell. The ZnO 2 was synthesized with a simple peroxide surface treatment. Devices made without surface treatment exhibits a high leakage current due to the self-doped nature of the hexagonal-ZnO material. Thus, its switching behavior can only be observed when a very high current compliance is employed. The synthetic ZnO 2 layer provides a sufficient resistivity to the Cu/ZnO 2 /ZnO/ITO devices. The high resistivity of ZnO 2 encourages the formation of a conducting bridge to activate the switching behavior at a lower operation current. Volatile and non-volatile switching behaviors with sufficient endurance and an adequate memory window are observed in the surface-treated devices. The room temperature retention of more than 10 4 s confirms the non-volatility behavior of the devices. In addition, our proposed device structure is able to work at a lower operation current among other reported ZnO-based ECM cells.

  11. A metal/Al2O3/ZrO2/SiO2/Si (MAZOS) structure for high-performance non-volatile memory application

    International Nuclear Information System (INIS)

    Liu, Jing; Wang, Qin; Long, Shibing; Zhang, Manhong; Liu, Ming

    2010-01-01

    In this paper, we report a metal/Al 2 O 3 /ZrO 2 /SiO 2 /Si (MAZOS) structure with a ZrO 2 charge-trapping layer for non-volatile memory application. The superiority of this device over the traditional metal/Al 2 O 3 /Si 3 N 4 /SiO 2 /Si (MANOS) devices is much better data retention and enhanced program/erase efficiency. The MAZOS device exhibits excellent memory characteristics, including a large memory window of 7.1 V under ±11 V capacitance–voltage sweep, and a greatly improved data retention (only 16% charge loss for 10 years time) along with good endurance. The MAZOS device has a strong potential for future high-performance non-volatile memory application

  12. A hybrid magnetic/complementary metal oxide semiconductor three-context memory bit cell for non-volatile circuit design

    International Nuclear Information System (INIS)

    Jovanović, B.; Brum, R. M.; Torres, L.

    2014-01-01

    After decades of continued scaling to the beat of Moore's law, it now appears that conventional silicon based devices are approaching their physical limits. In today's deep-submicron nodes, a number of short-channel and quantum effects are emerging that affect the manufacturing process, as well as, the functionality of the microelectronic systems-on-chip. Spintronics devices that exploit both the intrinsic spin of the electron and its associated magnetic moment, in addition to its fundamental electronic charge, are promising solutions to circumvent these scaling threats. Being compatible with the CMOS technology, such devices offer a promising synergy of radiation immunity, infinite endurance, non-volatility, increased density, etc. In this paper, we present a hybrid (magnetic/CMOS) cell that is able to store and process data both electrically and magnetically. The cell is based on perpendicular spin-transfer torque magnetic tunnel junctions (STT-MTJs) and is suitable for use in magnetic random access memories and reprogrammable computing (non-volatile registers, processor cache memories, magnetic field-programmable gate arrays, etc). To demonstrate the potential our hybrid cell, we physically implemented a small hybrid memory block using 45 nm × 45 nm round MTJs for the magnetic part and 28 nm fully depleted silicon on insulator (FD-SOI) technology for the CMOS part. We also report the cells measured performances in terms of area, robustness, read/write speed and energy consumption

  13. Bipolar resistive switching based on bis(8-hydroxyquinoline) cadmium complex: Mechanism and non-volatile memory application

    International Nuclear Information System (INIS)

    Wang Ying; Yang Ting; Xie Ji-Peng; Lü Wen-Li; Fan Guo-Ying; Liu Su

    2013-01-01

    Stable and persistent bipolar resistive switching was observed in an organic diode with the structure of indium-tin oxide (ITO)/bis(8-hydroxyquinoline) cadmium (Cdq 2 )/Al. Aggregate formation and electric field driven trapping and de-trapping of charge carriers in the aggregate states that lie in the energy gap of the highest occupied molecular orbital (HOMO) and the lowest unoccupied molecular orbital (LUMO) of the organic molecule were proposed as the mechanism of the observed bipolar resistive switching, and this was solidly supported by the results of AFM investigations. Repeatedly set, read, and reset measurements demonstrated that the device is potentially applicable in non-volatile memories

  14. Non-volatile, high density, high speed, Micromagnet-Hall effect Random Access Memory (MHRAM)

    Science.gov (United States)

    Wu, Jiin C.; Katti, Romney R.; Stadler, Henry L.

    1991-01-01

    The micromagnetic Hall effect random access memory (MHRAM) has the potential of replacing ROMs, EPROMs, EEPROMs, and SRAMs because of its ability to achieve non-volatility, radiation hardness, high density, and fast access times, simultaneously. Information is stored magnetically in small magnetic elements (micromagnets), allowing unlimited data retention time, unlimited numbers of rewrite cycles, and inherent radiation hardness and SEU immunity, making the MHRAM suitable for ground based as well as spaceflight applications. The MHRAM device design is not affected by areal property fluctuations in the micromagnet, so high operating margins and high yield can be achieved in large scale integrated circuit (IC) fabrication. The MHRAM has short access times (less than 100 nsec). Write access time is short because on-chip transistors are used to gate current quickly, and magnetization reversal in the micromagnet can occur in a matter of a few nanoseconds. Read access time is short because the high electron mobility sensor (InAs or InSb) produces a large signal voltage in response to the fringing magnetic field from the micromagnet. High storage density is achieved since a unit cell consists only of two transistors and one micromagnet Hall effect element. By comparison, a DRAM unit cell has one transistor and one capacitor, and a SRAM unit cell has six transistors.

  15. Flexible non-volatile ferroelectric polymer memory with gate-controlled multilevel operation.

    Science.gov (United States)

    Hwang, Sun Kak; Bae, Insung; Kim, Richard Hahnkee; Park, Cheolmin

    2012-11-20

    A flexible field-effect transistor with a poly(3-hexylthiophene) (P3HT) active channel and a ferroelectric poly(vinlyidene fluoride-co-trifluoro ethylene) (PVDF-TrFE) insulator exhibits gate-voltage-controllable multilevel non-volatile memory characteristics with highly reliable data retention and endurance. Copyright © 2012 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  16. Floating-gate controlled programmable non-volatile black phosphorus PNP junction memory.

    Science.gov (United States)

    Zhang, Pengfei; Li, Dong; Chen, Mingyuan; Zong, Qijun; Shen, Jun; Wan, Dongyun; Zhu, Jingtao; Zhang, Zengxing

    2018-02-15

    To meet the increasing requirements of minimizing circuits, the development of novel device architectures that use ultra-thin two-dimensional materials is encouraged. Here, we demonstrate a non-volatile black phosphorus (BP) PNP junction in a BP/h-BN/graphene heterostructure in which BP acts as a transport channel layer, hexagonal boron nitride (h-BN) serves as a tunnel barrier layer and graphene is the charge-trapping layer. The device architecture is designed such that only the middle part of the BP is aligned over the graphene flake, enabling the flexible tuning of the charge carriers in the BP over the graphene charge-trapping layer. Thus, the device exhibits the ability to work in two different operating modes (PNP and PP + P). Each operating mode can be retained well and demonstrates non-volatile behavior, and each can be programmed by using the control-gate.

  17. Type-II heterojunction organic/inorganic hybrid non-volatile memory based on FeS2 nanocrystals embedded in poly(3-hexylthiophene)

    International Nuclear Information System (INIS)

    Lin, C W; Yang, Y J; Wang, D Y; Jiang, Y T; Chen, C C; Tai, Y; Chen, M C; Chen, Y F

    2011-01-01

    Electrical bistable behaviour was demonstrated in memory devices based on n-type FeS 2 nanocrystals (NCs) embedded in a p-type poly(3-hexylthiophene) (P3HT) matrix. An organic/inorganic hybrid non-volatile memory device with a type-II band alignment, fabricated by a spin-coating process, exhibited electrical bistable characteristics. The bistable behaviour of carrier transport can be well described through the space-charge-limited current model. The small amount of FeS 2 NCs in this device serve as an excellent charge trapping medium arising from the type-II band alignment between FeS 2 and P3HT. Our study suggests a new way to integrate non-volatile memory with other devices such as transistor or photovoltaic since the presented FeS 2 /P3HT offers a type-II band alignment. (fast track communication)

  18. Improving reliability of non-volatile memory technologies through circuit level techniques and error control coding

    Science.gov (United States)

    Yang, Chengen; Emre, Yunus; Cao, Yu; Chakrabarti, Chaitali

    2012-12-01

    Non-volatile resistive memories, such as phase-change RAM (PRAM) and spin transfer torque RAM (STT-RAM), have emerged as promising candidates because of their fast read access, high storage density, and very low standby power. Unfortunately, in scaled technologies, high storage density comes at a price of lower reliability. In this article, we first study in detail the causes of errors for PRAM and STT-RAM. We see that while for multi-level cell (MLC) PRAM, the errors are due to resistance drift, in STT-RAM they are due to process variations and variations in the device geometry. We develop error models to capture these effects and propose techniques based on tuning of circuit level parameters to mitigate some of these errors. Unfortunately for reliable memory operation, only circuit-level techniques are not sufficient and so we propose error control coding (ECC) techniques that can be used on top of circuit-level techniques. We show that for STT-RAM, a combination of voltage boosting and write pulse width adjustment at the circuit-level followed by a BCH-based ECC scheme can reduce the block failure rate (BFR) to 10-8. For MLC-PRAM, a combination of threshold resistance tuning and BCH-based product code ECC scheme can achieve the same target BFR of 10-8. The product code scheme is flexible; it allows migration to a stronger code to guarantee the same target BFR when the raw bit error rate increases with increase in the number of programming cycles.

  19. Future Trend of Non-Volatile Semiconductor Memory and Feasibility Study of BiCS Type Stacked Structure

    OpenAIRE

    渡辺, 重佳

    2009-01-01

    Future trend of non-volatile semiconductor memory—FeRAM, MRAM, PRAM, ReRAM—compared with NAND typeflash memory has been described based on its history, application and performance. In the realistic point of view,FeRAM and MRAM are suitable for embedded memory and main memory, and PRAM and ReRAM are promising candidatesfor main memory and mass-storage memory for multimedia. Furthermore, the feasibility study of aggressiveultra-low-cost high-speed universal non-volatile semiconductor memory has...

  20. Ultralow-power non-volatile memory cells based on P(VDF-TrFE) ferroelectric-gate CMOS silicon nanowire channel field-effect transistors.

    Science.gov (United States)

    Van, Ngoc Huynh; Lee, Jae-Hyun; Whang, Dongmok; Kang, Dae Joon

    2015-07-21

    Nanowire-based ferroelectric-complementary metal-oxide-semiconductor (NW FeCMOS) nonvolatile memory devices were successfully fabricated by utilizing single n- and p-type Si nanowire ferroelectric-gate field effect transistors (NW FeFETs) as individual memory cells. In addition to having the advantages of single channel n- and p-type Si NW FeFET memory, Si NW FeCMOS memory devices exhibit a direct readout voltage and ultralow power consumption. The reading state power consumption of this device is less than 0.1 pW, which is more than 10(5) times lower than the ON-state power consumption of single-channel ferroelectric memory. This result implies that Si NW FeCMOS memory devices are well suited for use in non-volatile memory chips in modern portable electronic devices, especially where low power consumption is critical for energy conservation and long-term use.

  1. ZnO as dielectric for optically transparent non-volatile memory

    International Nuclear Information System (INIS)

    Salim, N. Tjitra; Aw, K.C.; Gao, W.; Wright, Bryon E.

    2009-01-01

    This paper discusses the application of a DC sputtered ZnO thin film as a dielectric in an optically transparent non-volatile memory. The main motivation for using ZnO as a dielectric is due to its optical transparency and mechanical flexibility. We have established the relationship between the electrical resistivity (ρ) and the activation energy (E a ) of the electron transport in the conduction band of the ZnO film. The ρ of 2 x 10 4 -5 x 10 7 Ω-cm corresponds to E a of 0.36-0.76 eV, respectively. The k-value and optical band-gap for films sputtered with Ar:O 2 ratio of 4:1 are 53 ± 3.6 and 3.23 eV, respectively. In this paper, the basic charge storage element for a non-volatile memory is a triple layer dielectric structure in which a 50 nm thick ZnO film is sandwiched between two layers of methyl silsesquioxane sol-gel dielectric of varying thickness. A pronounced clockwise capacitance-voltage (C-V) hysteresis was observed with a memory window of 6 V. The integration with a solution-processable pentacene, 13,6-N-Sulfinylacetamodipentacene resulted in an optically transparent organic field effect transistor non-volatile memory (OFET-NVM). We have demonstrated that this OFET-NVM can be electrically programmed and erased at low voltage (± 10 V) with a threshold voltage shift of 4.0 V.

  2. Non-volatile main memory management methods based on a file system.

    Science.gov (United States)

    Oikawa, Shuichi

    2014-01-01

    There are upcoming non-volatile (NV) memory technologies that provide byte addressability and high performance. PCM, MRAM, and STT-RAM are such examples. Such NV memory can be used as storage because of its data persistency without power supply while it can be used as main memory because of its high performance that matches up with DRAM. There are a number of researches that investigated its uses for main memory and storage. They were, however, conducted independently. This paper presents the methods that enables the integration of the main memory and file system management for NV memory. Such integration makes NV memory simultaneously utilized as both main memory and storage. The presented methods use a file system as their basis for the NV memory management. We implemented the proposed methods in the Linux kernel, and performed the evaluation on the QEMU system emulator. The evaluation results show that 1) the proposed methods can perform comparably to the existing DRAM memory allocator and significantly better than the page swapping, 2) their performance is affected by the internal data structures of a file system, and 3) the data structures appropriate for traditional hard disk drives do not always work effectively for byte addressable NV memory. We also performed the evaluation of the effects caused by the longer access latency of NV memory by cycle-accurate full-system simulation. The results show that the effect on page allocation cost is limited if the increase of latency is moderate.

  3. Fabrication, characterization and simulation of high performance Si nanowire-based non-volatile memory cells

    International Nuclear Information System (INIS)

    Zhu Xiaoxiao; Li Qiliang; Ioannou, Dimitris E; Gu, Diefeng; Baumgart, Helmut; Bonevich, John E; Suehle, John S; Richter, Curt A

    2011-01-01

    We report the fabrication, characterization and simulation of Si nanowire SONOS-like non-volatile memory with HfO 2 charge trapping layers of varying thicknesses. The memory cells, which are fabricated by self-aligning in situ grown Si nanowires, exhibit high performance, i.e. fast program/erase operations, long retention time and good endurance. The effect of the trapping layer thickness of the nanowire memory cells has been experimentally measured and studied by simulation. As the thickness of HfO 2 increases from 5 to 30 nm, the charge trap density increases as expected, while the program/erase speed and retention remain the same. These data indicate that the electric field across the tunneling oxide is not affected by HfO 2 thickness, which is in good agreement with simulation results. Our work also shows that the Omega gate structure improves the program speed and retention time for memory applications.

  4. Fabrication, characterization and simulation of high performance Si nanowire-based non-volatile memory cells.

    Science.gov (United States)

    Zhu, Xiaoxiao; Li, Qiliang; Ioannou, Dimitris E; Gu, Diefeng; Bonevich, John E; Baumgart, Helmut; Suehle, John S; Richter, Curt A

    2011-06-24

    We report the fabrication, characterization and simulation of Si nanowire SONOS-like non-volatile memory with HfO(2) charge trapping layers of varying thicknesses. The memory cells, which are fabricated by self-aligning in situ grown Si nanowires, exhibit high performance, i.e. fast program/erase operations, long retention time and good endurance. The effect of the trapping layer thickness of the nanowire memory cells has been experimentally measured and studied by simulation. As the thickness of HfO(2) increases from 5 to 30 nm, the charge trap density increases as expected, while the program/erase speed and retention remain the same. These data indicate that the electric field across the tunneling oxide is not affected by HfO(2) thickness, which is in good agreement with simulation results. Our work also shows that the Omega gate structure improves the program speed and retention time for memory applications.

  5. Fabrication, characterization and simulation of high performance Si nanowire-based non-volatile memory cells

    Science.gov (United States)

    Zhu, Xiaoxiao; Li, Qiliang; Ioannou, Dimitris E.; Gu, Diefeng; Bonevich, John E.; Baumgart, Helmut; Suehle, John S.; Richter, Curt A.

    2011-06-01

    We report the fabrication, characterization and simulation of Si nanowire SONOS-like non-volatile memory with HfO2 charge trapping layers of varying thicknesses. The memory cells, which are fabricated by self-aligning in situ grown Si nanowires, exhibit high performance, i.e. fast program/erase operations, long retention time and good endurance. The effect of the trapping layer thickness of the nanowire memory cells has been experimentally measured and studied by simulation. As the thickness of HfO2 increases from 5 to 30 nm, the charge trap density increases as expected, while the program/erase speed and retention remain the same. These data indicate that the electric field across the tunneling oxide is not affected by HfO2 thickness, which is in good agreement with simulation results. Our work also shows that the Omega gate structure improves the program speed and retention time for memory applications.

  6. Electron retention in InAs-nanocrystals embedded in SiO2/Si for non-volatile memories

    International Nuclear Information System (INIS)

    Hocevar, M.; Regreny, P.; Gendry, M.; Poncet, A.; Souifi, A.

    2008-01-01

    In this paper we present the electrical characterization of an InAs nanocrystal based metal-oxide-semiconductor structure. The fabricated device behaves as a memory since the charges injected in the InAs through the SiO 2 tunnel layer (holes or electrons) have a long retention time in or by the nanocrystals. A discharging model based on direct tunnelling through a dielectric barrier has been used in order to calculate electron discharging kinetics. The results show that InAs-nanocrystals are of real interest for electron storage in non-volatile memories with an improvement of data retention for electron. (copyright 2008 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim) (orig.)

  7. A Survey of Soft-Error Mitigation Techniques for Non-Volatile Memories

    Directory of Open Access Journals (Sweden)

    Sparsh Mittal

    2017-02-01

    Full Text Available Non-volatile memories (NVMs offer superior density and energy characteristics compared to the conventional memories; however, NVMs suffer from severe reliability issues that can easily eclipse their energy efficiency advantages. In this paper, we survey architectural techniques for improving the soft-error reliability of NVMs, specifically PCM (phase change memory and STT-RAM (spin transfer torque RAM. We focus on soft-errors, such as resistance drift and write disturbance, in PCM and read disturbance and write failures in STT-RAM. By classifying the research works based on key parameters, we highlight their similarities and distinctions. We hope that this survey will underline the crucial importance of addressing NVM reliability for ensuring their system integration and will be useful for researchers, computer architects and processor designers.

  8. Effect of redox proteins on the behavior of non-volatile memory.

    Science.gov (United States)

    Lee, Ji Hyun; Yew, Seung Chul; Cho, Jinhan; Kim, Youn Sang

    2012-12-21

    We demonstrated the memory effect of redox proteins in organic field-effect transistor (OFET) flash memory devices. Redox proteins include a heme structure, which has reversible redox reactions. These properties of the proteins could be successfully applied to the flash memory devices, which show a considerable memory window (~11 V) and relatively good endurance properties (~over 100 cycles).

  9. Resistive Memory Devices for Radiation Resistant Non-Volatile Memory

    Data.gov (United States)

    National Aeronautics and Space Administration — Ionizing radiation in space can damage electronic equipment, corrupting data and even disabling computers. Radiation resistant (rad hard) strategies must be employed...

  10. Effect of electrode material on characteristics of non-volatile resistive memory consisting of Ag2S nanoparticles

    International Nuclear Information System (INIS)

    Jang, Jaewon

    2016-01-01

    In this study, Ag 2 S nanoparticles are synthesized and used as the active material for two-terminal resistance switching memory devices. Sintered Ag 2 S films are successfully crystallized on plastic substrates with synthesized Ag 2 S nanoparticles, after a relatively low-temperature sintering process (200 °C). After the sintering process, the crystallite size is increased from 6.8 nm to 80.3 nm. The high ratio of surface atoms to inner atoms of nanoparticles reduces the melting point temperature, deciding the sintering process temperature. In order to investigate the resistance switching characteristics, metal/Ag 2 S/metal structures are fabricated and tested. The effect of the electrode material on the non-volatile resistive memory characteristics is studied. The bottom electrochemically inert materials, such as Au and Pt, were critical for maintaining stable memory characteristics. By using Au and Pt inert bottom electrodes, we are able to significantly improve the memory endurance and retention to more than 10 3 cycles and 10 4 sec, respectively.

  11. Effect of electrode material on characteristics of non-volatile resistive memory consisting of Ag{sub 2}S nanoparticles

    Energy Technology Data Exchange (ETDEWEB)

    Jang, Jaewon, E-mail: j1jang@knu.ac.kr [School of Electronics Engineering, Kyungpook National University, Daegu 702-701 (Korea, Republic of)

    2016-07-15

    In this study, Ag{sub 2}S nanoparticles are synthesized and used as the active material for two-terminal resistance switching memory devices. Sintered Ag{sub 2}S films are successfully crystallized on plastic substrates with synthesized Ag{sub 2}S nanoparticles, after a relatively low-temperature sintering process (200 °C). After the sintering process, the crystallite size is increased from 6.8 nm to 80.3 nm. The high ratio of surface atoms to inner atoms of nanoparticles reduces the melting point temperature, deciding the sintering process temperature. In order to investigate the resistance switching characteristics, metal/Ag{sub 2}S/metal structures are fabricated and tested. The effect of the electrode material on the non-volatile resistive memory characteristics is studied. The bottom electrochemically inert materials, such as Au and Pt, were critical for maintaining stable memory characteristics. By using Au and Pt inert bottom electrodes, we are able to significantly improve the memory endurance and retention to more than 10{sup 3} cycles and 10{sup 4} sec, respectively.

  12. The origin of traps and the effect of nitrogen plasma in oxide-nitride-oxide structures for non-volatile memories

    International Nuclear Information System (INIS)

    Kim, W. S.; Kwak, D. W.; Oh, J. S.; Lee, D. W.; Cho, H. Y.

    2010-01-01

    Ultrathin oxide-nitride-oxide (ONO) dielectric stacked layers are fundamental structures of silicon-oxide-nitride-oxide-silicon (SONOS) non-volatile memory devices in which information is known to be stored as charges trapped in silicon nitride. Deep-level transient spectroscopy (DLTS) and a capacitance-voltage (CV) analysis were introduced to observe the trap behavior related to the memory effect in memory devices. The DLTS results verified that the nitride-related traps were a dominant factor in the memory effect. The energy of hole traps was 0.307 eV above the balance band. To improve the memory effects of the non-volatile memory devices with ONO structures, we introduced a nitrogen plasma treatment. After the N-plasma treatment, the flat-band voltage shift (ΔV FB ) was increased by about 1.5 times. The program and the erase (P-E) characteristics were also shown to be better than those for the as-ONO structure. In addition, the retention characteristics were improved by over 2.4 times.

  13. The origin of traps and the effect of nitrogen plasma in oxide-nitride-oxide structures for non-volatile memories

    Energy Technology Data Exchange (ETDEWEB)

    Kim, W. S. [Doowon Technical College, Kyonggi (Korea, Republic of); Kwak, D. W.; Oh, J. S.; Lee, D. W.; Cho, H. Y. [Dongguk University, Seoul (Korea, Republic of)

    2010-08-15

    Ultrathin oxide-nitride-oxide (ONO) dielectric stacked layers are fundamental structures of silicon-oxide-nitride-oxide-silicon (SONOS) non-volatile memory devices in which information is known to be stored as charges trapped in silicon nitride. Deep-level transient spectroscopy (DLTS) and a capacitance-voltage (CV) analysis were introduced to observe the trap behavior related to the memory effect in memory devices. The DLTS results verified that the nitride-related traps were a dominant factor in the memory effect. The energy of hole traps was 0.307 eV above the balance band. To improve the memory effects of the non-volatile memory devices with ONO structures, we introduced a nitrogen plasma treatment. After the N-plasma treatment, the flat-band voltage shift ({Delta}V{sub FB}) was increased by about 1.5 times. The program and the erase (P-E) characteristics were also shown to be better than those for the as-ONO structure. In addition, the retention characteristics were improved by over 2.4 times.

  14. A Compute Capable SSD Architecture for Next-Generation Non-volatile Memories

    Energy Technology Data Exchange (ETDEWEB)

    De, Arup [Univ. of California, San Diego, CA (United States)

    2014-01-01

    Existing storage technologies (e.g., disks and ash) are failing to cope with the processor and main memory speed and are limiting the overall perfor- mance of many large scale I/O or data-intensive applications. Emerging fast byte-addressable non-volatile memory (NVM) technologies, such as phase-change memory (PCM), spin-transfer torque memory (STTM) and memristor are very promising and are approaching DRAM-like performance with lower power con- sumption and higher density as process technology scales. These new memories are narrowing down the performance gap between the storage and the main mem- ory and are putting forward challenging problems on existing SSD architecture, I/O interface (e.g, SATA, PCIe) and software. This dissertation addresses those challenges and presents a novel SSD architecture called XSSD. XSSD o oads com- putation in storage to exploit fast NVMs and reduce the redundant data tra c across the I/O bus. XSSD o ers a exible RPC-based programming framework that developers can use for application development on SSD without dealing with the complication of the underlying architecture and communication management. We have built a prototype of XSSD on the BEE3 FPGA prototyping system. We implement various data-intensive applications and achieve speedup and energy ef- ciency of 1.5-8.9 and 1.7-10.27 respectively. This dissertation also compares XSSD with previous work on intelligent storage and intelligent memory. The existing ecosystem and these new enabling technologies make this system more viable than earlier ones.

  15. Process Qualification Strategy for Advances Embedded Non Volatile Memory Technology : The Philips' 0.18um Embedded Flash Case

    NARCIS (Netherlands)

    Tao, Guoqiao; Scarpa, Andrea; van Dijk, Kitty; Kuper, Fred G.

    2003-01-01

    A qualification strategy for advanced embedded non-volatile memory technology has been revealed. This strategy consists of: a thorough understanding of the requirements, extensive use and frequent update of the FMEA (failure mode effect analysis), a qualification plan with excellent coverage of all

  16. Applying the fWLR concept to Stress induced leakage current in non-volatile memory processes

    NARCIS (Netherlands)

    Tao, Guoqiao; Scarpa, Andrea; van Marwijk, Leo; van Dijk, Kitty; Kuper, F.G.

    A fast wafer level reliability structure and evaluation method has been developed for stress induced leakage current (SILC) in non-volatile memory processes. The structure is based on parallel floating gate cell arrays. The evaluation method is straightforward, and not time-consuming. The

  17. 5 V driving organic non-volatile memory transistors with poly(vinyl alcohol) gate insulator and poly(3-hexylthiophene) channel layers

    Science.gov (United States)

    Nam, Sungho; Seo, Jooyeok; Kim, Hwajeong; Kim, Youngkyoo

    2015-10-01

    Organic non-volatile memory devices were fabricated by employing organic field-effect transistors (OFETs) with poly(vinyl alcohol) (PVA) and poly(3-hexylthiophene) as a gate insulating layer and a channel layer, respectively. The 10-nm-thick nickel layers were inserted for better charge injection between the channel layer and the top source/drain electrodes. The fabricated PVA-OFET memory devices could be operated at low voltages (≤5 V) and showed pronounced hysteresis characteristics in the transfer curves, even though very small hysteresis was measured from the output curves. The degree of hysteresis was considerably dependent on the ratio of channel width (W) to channel length (L). The PVA-OFET memory device with the smaller W/L ratio (25) exhibited better retention characteristics upon 700 cycles of writing-reading-erasing-reading operations, which was assigned to the stability of charged states in devices.

  18. Investigation on the Charge Loss Mechanisms of Nanoscale Charge Trap Non-Volatile Memory by Using Stretched Exponential Function.

    Science.gov (United States)

    Lee, Meng Chuan; Wong, Hin Yong

    2016-01-01

    Charge loss mechanisms of nanoscale charge trap non-volatile memory devices are carefully examined and studied. Fowler-Nordheim tunnelling mechanism is used to perform rapid program/erase cycling. Based on the good fit of post cycled and baked threshold voltage data to Stretched Exponential function, the lowest point and the peak of Vt distribution were found to evolve in a similar manner that resulted to similar derived Ea. The saturation behaviour of the threshold voltage decay can be predicted and validated through cells' threshold voltage measurements that fit well to Stretched Exponential function. The power law relationship of program/erase cycle count and the saturation behaviour was found to be similar on the device under study and NROM devices that utilizes significant different charge injection mechanisms for program/erase operation. The experimental results also demonstrated that charge injection mechanism is one of the dominant factors in determining the underlying charge loss mechanism. Moreover, the determination of charge loss mechanism depends on the total charges injected through the tunnel oxide layer of ONO stack in NB-CTNVM cell. Physical interpretation of the experimental findings of the dominant charge loss mechanism is deliberated in detail.

  19. A semi-floating gate memory based on van der Waals heterostructures for quasi-non-volatile applications.

    Science.gov (United States)

    Liu, Chunsen; Yan, Xiao; Song, Xiongfei; Ding, Shijin; Zhang, David Wei; Zhou, Peng

    2018-04-09

    As conventional circuits based on field-effect transistors are approaching their physical limits due to quantum phenomena, semi-floating gate transistors have emerged as an alternative ultrafast and silicon-compatible technology. Here, we show a quasi-non-volatile memory featuring a semi-floating gate architecture with band-engineered van der Waals heterostructures. This two-dimensional semi-floating gate memory demonstrates 156 times longer refresh time with respect to that of dynamic random access memory and ultrahigh-speed writing operations on nanosecond timescales. The semi-floating gate architecture greatly enhances the writing operation performance and is approximately 10 6 times faster than other memories based on two-dimensional materials. The demonstrated characteristics suggest that the quasi-non-volatile memory has the potential to bridge the gap between volatile and non-volatile memory technologies and decrease the power consumption required for frequent refresh operations, enabling a high-speed and low-power random access memory.

  20. Resistance Switching in Complex Oxides: Improvements in Understanding and Function for Use as Non-Volatile Memory

    Science.gov (United States)

    Young, Kristina Garrison

    2011-12-01

    Pro0.7Ca0.3MnO3 (PCMO) is a complex oxide that is studied for use as a non-volatile memory with potential to replace flash-type memory. PCMO functions as a resistive random access memory (RRAM) whose memory function is due to an oxygen vacancy concentration change that occurs in the top interface of the PCMO during the application of an electric field. The concentration of the oxygen ions/vacancies in this top interface region significantly affects the resistance seen in a simple thin film device. The electric field required to move ions/vacancies within PCMO is generated by a short (ns), low voltage (few V) pulse. During the pulse a high current is seen that is not commensurate with the resistance seen after the removal of the pulse. Additionally, after the removal of the pulse there is a degradation of the resistance state set by the pulse. The high current seen during the pulse has been explored using electrical characterization techniques and is believed to be due to quantum mechanical tunneling through the high resistance interface region. Modeling of conduction values confirms that quantum mechanical tunneling is the source of the high current. The degradation of the state after the removal of the pulse has been improved through the nanostructure modification of the PCMO film. A thin (barrier layer was placed immediately below the interface of the PCMO minimizing the back diffusion of ions/vacancies after removal of the pulse. The modification improved the EPIR ratio, fatigue and retention in PCMO.

  1. Solution-processed Al-chelated gelatin for highly transparent non-volatile memory applications

    International Nuclear Information System (INIS)

    Chang, Yu-Chi; Wang, Yeong-Her

    2015-01-01

    Using the biomaterial of Al-chelated gelatin (ACG) prepared by sol-gel method in the ITO/ACG/ITO structure, a highly transparent resistive random access memory (RRAM) was obtained. The transmittance of the fabricated device is approximately 83% at 550 nm while that of Al/gelatin/ITO is opaque. As to the ITO/gelatin/ITO RRAM, no resistive switching behavior can be seen. The ITO/ACG/ITO RRAM shows high ON/OFF current ratio (>10 5 ), low operation voltage, good uniformity, and retention characteristics at room temperature and 85 °C. The mechanism of the ACG-based memory devices is presented. The enhancement of these electrical properties can be attributed to the chelate effect of Al ions with gelatin. Results show that transparent ACG-based memory devices possess the potential for next-generation resistive memories and bio-electronic applications

  2. High performance non-volatile ferroelectric copolymer memory based on a ZnO nanowire transistor fabricated on a transparent substrate

    International Nuclear Information System (INIS)

    Nedic, Stanko; Welland, Mark; Tea Chun, Young; Chu, Daping; Hong, Woong-Ki

    2014-01-01

    A high performance ferroelectric non-volatile memory device based on a top-gate ZnO nanowire (NW) transistor fabricated on a glass substrate is demonstrated. The ZnO NW channel was spin-coated with a poly (vinylidenefluoride-co-trifluoroethylene) (P(VDF-TrFE)) layer acting as a top-gate dielectric without buffer layer. Electrical conductance modulation and memory hysteresis are achieved by a gate electric field induced reversible electrical polarization switching of the P(VDF-TrFE) thin film. Furthermore, the fabricated device exhibits a memory window of ∼16.5 V, a high drain current on/off ratio of ∼10 5 , a gate leakage current below ∼300 pA, and excellent retention characteristics for over 10 4 s

  3. High-temperature operating non-volatile memory of printable single-wall carbon nanotubes self-assembled with a conjugate block copolymer.

    Science.gov (United States)

    Hwang, Sun Kak; Choi, Jae Ryung; Bae, Insung; Hwang, Ihn; Cho, Suk Man; Huh, June; Park, Cheolmin

    2013-03-25

    Printable non-volatile polymer memories are fabricated with solution-processed nanocomposite films of poly(styrene-block-paraphenylene) (PS-b-PPP) and single-wall carbon nanotubes (SWNTs). The devices show stable data retention at high temperatures of up to 100 °C without significant performance degradation due to the strong, non-destructive, and isomorphic π-π interactions between the SWNTs and PPP block. Copyright © 2013 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  4. Titanium-tungsten nanocrystals embedded in a SiO2/Al2O3 gate dielectric stack for low-voltage operation in non-volatile memory

    International Nuclear Information System (INIS)

    Yang Shiqian; Wang Qin; Zhang Manhong; Long Shibing; Liu Jing; Liu Ming

    2010-01-01

    Titanium-tungsten nanocrystals (NCs) were fabricated by a self-assembly rapid thermal annealing (RTA) process. Well isolated Ti 0.46 W 0.54 NCs were embedded in the gate dielectric stack of SiO 2 /Al 2 O 3 . A metal-oxide-semiconductor (MOS) capacitor was fabricated to investigate its application in a non-volatile memory (NVM) device. It demonstrated a large memory window of 6.2 V in terms of flat-band voltage (V FB ) shift under a dual-directional sweeping gate voltage of - 10 to 10 V. A 1.1 V V FB shift under a low dual-directional sweeping gate voltage of - 4 to 4 V was also observed. The retention characteristic of this MOS capacitor was demonstrated by a 0.5 V memory window after 10 4 s of elapsed time at room temperature. The endurance characteristic was demonstrated by a program/erase cycling test.

  5. Silicon photonic integrated circuits with electrically programmable non-volatile memory functions.

    Science.gov (United States)

    Song, J-F; Lim, A E-J; Luo, X-S; Fang, Q; Li, C; Jia, L X; Tu, X-G; Huang, Y; Zhou, H-F; Liow, T-Y; Lo, G-Q

    2016-09-19

    Conventional silicon photonic integrated circuits do not normally possess memory functions, which require on-chip power in order to maintain circuit states in tuned or field-configured switching routes. In this context, we present an electrically programmable add/drop microring resonator with a wavelength shift of 426 pm between the ON/OFF states. Electrical pulses are used to control the choice of the state. Our experimental results show a wavelength shift of 2.8 pm/ms and a light intensity variation of ~0.12 dB/ms for a fixed wavelength in the OFF state. Theoretically, our device can accommodate up to 65 states of multi-level memory functions. Such memory functions can be integrated into wavelength division mutiplexing (WDM) filters and applied to optical routers and computing architectures fulfilling large data downloading demands.

  6. Brain-like associative learning using a nanoscale non-volatile phase change synaptic device array

    Directory of Open Access Journals (Sweden)

    Sukru Burc Eryilmaz

    2014-07-01

    Full Text Available Recent advances in neuroscience together with nanoscale electronic device technology have resulted in huge interests in realizing brain-like computing hardwares using emerging nanoscale memory devices as synaptic elements. Although there has been experimental work that demonstrated the operation of nanoscale synaptic element at the single device level, network level studies have been limited to simulations. In this work, we demonstrate, using experiments, array level associative learning using phase change synaptic devices connected in a grid like configuration similar to the organization of the biological brain. Implementing Hebbian learning with phase change memory cells, the synaptic grid was able to store presented patterns and recall missing patterns in an associative brain-like fashion. We found that the system is robust to device variations, and large variations in cell resistance states can be accommodated by increasing the number of training epochs. We illustrated the tradeoff between variation tolerance of the network and the overall energy consumption, and found that energy consumption is decreased significantly for lower variation tolerance.

  7. Large scale integration of flexible non-volatile, re-addressable memories using P(VDF-TrFE) and amorphous oxide transistors

    International Nuclear Information System (INIS)

    Gelinck, Gerwin H; Cobb, Brian; Van Breemen, Albert J J M; Myny, Kris

    2015-01-01

    Ferroelectric polymers and amorphous metal oxide semiconductors have emerged as important materials for re-programmable non-volatile memories and high-performance, flexible thin-film transistors, respectively. However, realizing sophisticated transistor memory arrays has proven to be a challenge, and demonstrating reliable writing to and reading from such a large scale memory has thus far not been demonstrated. Here, we report an integration of ferroelectric, P(VDF-TrFE), transistor memory arrays with thin-film circuitry that can address each individual memory element in that array. n-type indium gallium zinc oxide is used as the active channel material in both the memory and logic thin-film transistors. The maximum process temperature is 200 °C, allowing plastic films to be used as substrate material. The technology was scaled up to 150 mm wafer size, and offers good reproducibility, high device yield and low device variation. This forms the basis for successful demonstration of memory arrays, read and write circuitry, and the integration of these. (paper)

  8. Electrical properties of ultra-thin oxynitrided layer using N2O plasma in inductively coupled plasma chemical vapor deposition for non-volatile memory on glass

    International Nuclear Information System (INIS)

    Jung, Sungwook; Hwang, Sunghyun; Kim, Kyunghae; Dhungel, S.K.; Chung, Ho-Kyoon; Choi, Byoung-Deog; Lee, Ki-Yong; Yi, J.

    2007-01-01

    In this work, the silicon oxynitride layer was studied as a tunneling layer for non-volatile memory application by fabricating low temperature polysilicon thin film transistors on glass. Silicon wafers were oxynitrided by only nitrous oxide plasma under different radio frequency powers and plasma treatment times. Plasma oxynitridation was performed in RF plasma using inductively coupled plasma chemical vapor deposition. The X-ray energy dispersive spectroscopy was employed to analyze the atomic concentration ratio of nitrogen/oxygen in oxynitride layer. The oxynitrided layer formed under radio frequency power of 150 W and substrate temperature of 623 K was found to contain the atomic concentration ratio of nitrogen/oxygen as high as 1.57. The advantage of high nitrogen concentration in silicon oxide layer formed by using nitrous oxide plasma was investigated by capacitance-voltage measurement. The analysis of capacitance-voltage characteristics demonstrated that the ultra-thin oxynitride layers of 2 nm thickness formed by only nitrous oxide plasma have good properties as tunneling layer for non-volatile memory device

  9. Investigation of resistive switching in Cu-doped HfO2 thin film for multilevel non-volatile memory applications

    Science.gov (United States)

    Wang, Yan; Liu, Qi; Long, Shibing; Wang, Wei; Wang, Qin; Zhang, Manhong; Zhang, Sen; Li, Yingtao; Zuo, Qingyun; Yang, Jianhong; Liu, Ming

    2010-01-01

    In this paper, the resistive switching characteristics in a Cu/HfO2:Cu/Pt sandwiched structure is investigated for multilevel non-volatile memory applications. The device shows excellent resistive switching performance, including good endurance, long retention time, fast operation speed and a large storage window (ROFF/RON>107). Based on the temperature-dependent test results, the formation of Cu conducting filaments is believed to be the reason for the resistance switching from the OFF state to the ON state. By integrating the resistive switching mechanism study and the device fabrication, different resistance values are achieved using different compliance currents in the program process. These resistance values can be easily distinguished in a large temperature range, and can be maintained over 10 years by extrapolating retention data at room temperature. The integrated experiment and mechanism studies set up the foundation for the development of high-performance multilevel RRAM.

  10. Electrical and ferroelectric properties of RF sputtered PZT/SBN on silicon for non-volatile memory applications

    Science.gov (United States)

    Singh, Prashant; Jha, Rajesh Kumar; Singh, Rajat Kumar; Singh, B. R.

    2018-02-01

    We report the integration of multilayer ferroelectric film deposited by RF magnetron sputtering and explore the electrical characteristics for its application as the gate of ferroelectric field effect transistor for non-volatile memories. PZT (Pb[Zr0.35Ti0.65]O3) and SBN (SrBi2Nb2O9) ferroelectric materials were selected for the stack fabrication due to their large polarization and fatigue free properties respectively. Electrical characterization has been carried out to obtain memory window, leakage current density, PUND and endurance characteristics. Fabricated multilayer ferroelectric film capacitor structure shows large memory window of 17.73 V and leakage current density of the order 10-6 A cm-2 for the voltage sweep of -30 to +30 V. This multilayer gate stack of PZT/SBN shows promising endurance property with no degradation in the remnant polarization for the read/write iteration cycles upto 108.

  11. Germanium sulfide-based solid electrolytes for non-volatile memory

    Science.gov (United States)

    Balakrishnan, Muralikrishnan

    Programmable Metallization Cell (PMC) technology involves the storage of data as reduced metal ions in a solid electrolyte. Earlier work on Selenide-based (Ag-Ge-Se) PMC devices requires relatively low back-end-of-line processing (BEOL) since the electrolyte may undergo undesirable changes at process temperatures in excess of 200°C. This dissertation is focused on Sulfide-based (Ag/Cu-Ge-S) solid electrolytes which have better temperature stability and the PMC technology based on these materials is compatible with most BEOL process in CMOS Integrated Circuits. The devices fabricated using Ag-Ge-S and Cu-Ge-S solid electrolytes were tested after annealing at 300°C and 430°C. Extensive material analysis was performed on both the systems in an effort to understand the behavior of the devices at elevated temperatures. Electrical characterization testing involved standard memory characterization techniques such as quasi-static measurements tests, retention tests, speed tests, elevated temperature operation tests and endurance tests. The Ag-Ge-S PMC devices were made with different compositions to find out the optimum composition which would ensure reliable operation even after the high temperature anneal. The Sulfide-based PMC devices were also tested for reconfigurable logic applications with special test structures that would demonstrate the low resistance connections that can be achieved by programming the PMC elements using higher currents. Optimum composition of the starting glass was found from the material and data analysis, to ensure reliable operation of the Sulfide-based PMC devices with no degradation in the electrical characteristics even after the typical BEOL anneal.

  12. Unipolar resistive switching in metal oxide/organic semiconductor non-volatile memories as a critical phenomenon

    International Nuclear Information System (INIS)

    Bory, Benjamin F.; Meskers, Stefan C. J.; Rocha, Paulo R. F.; Gomes, Henrique L.; Leeuw, Dago M. de

    2015-01-01

    Diodes incorporating a bilayer of an organic semiconductor and a wide bandgap metal oxide can show unipolar, non-volatile memory behavior after electroforming. The prolonged bias voltage stress induces defects in the metal oxide with an areal density exceeding 10 17  m −2 . We explain the electrical bistability by the coexistence of two thermodynamically stable phases at the interface between an organic semiconductor and metal oxide. One phase contains mainly ionized defects and has a low work function, while the other phase has mainly neutral defects and a high work function. In the diodes, domains of the phase with a low work function constitute current filaments. The phase composition and critical temperature are derived from a 2D Ising model as a function of chemical potential. The model predicts filamentary conduction exhibiting a negative differential resistance and nonvolatile memory behavior. The model is expected to be generally applicable to any bilayer system that shows unipolar resistive switching

  13. In search of the next memory inside the circuitry from the oldest to the emerging non-volatile memories

    CERN Document Server

    Campardo, Giovanni

    2017-01-01

    This book provides students and practicing chip designers with an easy-to-follow yet thorough, introductory treatment of the most promising emerging memories under development in the industry. Focusing on the chip designer rather than the end user, this book offers expanded, up-to-date coverage of emerging memories circuit design. After an introduction on the old solid-state memories and the fundamental limitations soon to be encountered, the working principle and main technology issues of each of the considered technologies (PCRAM, MRAM, FeRAM, ReRAM) are reviewed and a range of topics related to design is explored: the array organization, sensing and writing circuitry, programming algorithms and error correction techniques are reviewed comparing the approach followed and the constraints for each of the technologies considered. Finally the issue of radiation effects on memory devices has been briefly treated. Additionally some considerations are entertained about how emerging memories can find a place in the...

  14. Large scale integration of flexible non-volatile, re-addressable memories using P(VDF-TrFE) and amorphous oxide transistors

    NARCIS (Netherlands)

    Gelinck, G.H.; Cobb, B.; Breemen, A.J.J.M. van; Myny, K.

    2015-01-01

    Ferroelectric polymers and amorphous metal oxide semiconductors have emerged as important materials for re-programmable non-volatile memories and high-performance, flexible thin-film transistors, respectively. However, realizing sophisticated transistor memory arrays has proven to be a challenge,

  15. Integration of lead-free ferroelectric on HfO2/Si (100) for high performance non-volatile memory applications.

    Science.gov (United States)

    Kundu, Souvik; Maurya, Deepam; Clavel, Michael; Zhou, Yuan; Halder, Nripendra N; Hudait, Mantu K; Banerji, Pallab; Priya, Shashank

    2015-02-16

    We introduce a novel lead-free ferroelectric thin film (1-x)BaTiO3-xBa(Cu1/3Nb2/3)O3 (x = 0.025) (BT-BCN) integrated on to HfO2 buffered Si for non-volatile memory (NVM) applications. Piezoelectric force microscopy (PFM), x-ray diffraction, and high resolution transmission electron microscopy were employed to establish the ferroelectricity in BT-BCN thin films. PFM study reveals that the domains reversal occurs with 180° phase change by applying external voltage, demonstrating its effectiveness for NVM device applications. X-ray photoelectron microscopy was used to investigate the band alignments between atomic layer deposited HfO2 and pulsed laser deposited BT-BCN films. Programming and erasing operations were explained on the basis of band-alignments. The structure offers large memory window, low leakage current, and high and low capacitance values that were easily distinguishable even after ~10(6) s, indicating strong charge storage potential. This study explains a new approach towards the realization of ferroelectric based memory devices integrated on Si platform and also opens up a new possibility to embed the system within current complementary metal-oxide-semiconductor processing technology.

  16. BLACKCOMB2: Hardware-software co-design for non-volatile memory in exascale systems

    Energy Technology Data Exchange (ETDEWEB)

    Mudge, Trevor [Univ. of Michigan, Ann Arbor, MI (United States)

    2017-12-15

    This work was part of a larger project, Blackcomb2, centered at Oak Ridge National Labs (Jeff Vetter PI) to investigate the opportunities for replacing or supplementing DRAM main memory with nonvolatile memory (NVmemory) in Exascale memory systems. The goal was to reduce the energy consumed by in future supercomputer memory systems and to improve their resiliency. Building on the accomplishments of the original Blackcomb Project, funded in 2010, the goal for Blackcomb2 was to identify, evaluate, and optimize the most promising emerging memory technologies, architecture hardware and software technologies, which are essential to provide the necessary memory capacity, performance, resilience, and energy efficiency in Exascale systems. Capacity and energy are the key drivers.

  17. Non-Volatile Flash Memory Characteristics of Tetralayer Nickel-Germanide Nanocrystals Embedded Structure.

    Science.gov (United States)

    Panda, D; Panda, M

    2016-01-01

    Formation of tetralayer memory structure having nickel-germanide nanocrystals using a Ge/Ni multilayers is proposed. X-ray diffraction study shows the NiGe (002) phase formation after proper annealing. Cross sectional HRTEM clearly shows the sharpness and the size (~4-6 nm) of the stacked nanocrystals embedded in the oxide matrix. A large anti-clockwise hysteresis memory win- dow of 13.4 Volt at ± 15 Volt is observed for the optimized samples. This large memory window indicates for the MLC applications. Frequency independent C-V curve confirms about the charge storage in the nanocrystals. A good charge retention and endurance characteristics are exhibited upto 125 °C for the nonvolatile memory application.

  18. Titanium-tungsten nanocrystals embedded in a SiO(2)/Al(2)O(3) gate dielectric stack for low-voltage operation in non-volatile memory.

    Science.gov (United States)

    Yang, Shiqian; Wang, Qin; Zhang, Manhong; Long, Shibing; Liu, Jing; Liu, Ming

    2010-06-18

    Titanium-tungsten nanocrystals (NCs) were fabricated by a self-assembly rapid thermal annealing (RTA) process. Well isolated Ti(0.46)W(0.54) NCs were embedded in the gate dielectric stack of SiO(2)/Al(2)O(3). A metal-oxide-semiconductor (MOS) capacitor was fabricated to investigate its application in a non-volatile memory (NVM) device. It demonstrated a large memory window of 6.2 V in terms of flat-band voltage (V(FB)) shift under a dual-directional sweeping gate voltage of - 10 to 10 V. A 1.1 V V(FB) shift under a low dual-directional sweeping gate voltage of - 4 to 4 V was also observed. The retention characteristic of this MOS capacitor was demonstrated by a 0.5 V memory window after 10(4) s of elapsed time at room temperature. The endurance characteristic was demonstrated by a program/erase cycling test.

  19. A high performance triboelectric nanogenerator for self-powered non-volatile ferroelectric transistor memory.

    Science.gov (United States)

    Fang, Huajing; Li, Qiang; He, Wenhui; Li, Jing; Xue, Qingtang; Xu, Chao; Zhang, Lijing; Ren, Tianling; Dong, Guifang; Chan, H L W; Dai, Jiyan; Yan, Qingfeng

    2015-11-07

    We demonstrate an integrated module of self-powered ferroelectric transistor memory based on the combination of a ferroelectric FET and a triboelectric nanogenerator (TENG). The novel TENG was made of a self-assembled polystyrene nanosphere array and a poly(vinylidene fluoride) porous film. Owing to this unique structure, it exhibits an outstanding performance with an output voltage as high as 220 V per cycle. Meanwhile, the arch-shaped TENG is shown to be able to pole a bulk ferroelectric 0.65Pb(Mg1/3Nb2/3)O3-0.35PbTiO3 (PMN-PT) single crystal directly. Based on this effect, a bottom gate ferroelectric FET was fabricated using pentacene as the channel material and a PMN-PT single crystal as the gate insulator. Systematic tests illustrate that the ON/OFF current ratio of this transistor memory element is approximately 10(3). More importantly, we demonstrate the feasibility to switch the polarization state of this FET gate insulator, namely the stored information, by finger tapping the TENG with a designed circuit. These results may open up a novel application of TENGs in the field of self-powered memory systems.

  20. HfSiO/SiO2- and SiO2/HfSiO/SiO2-gate stacks for non-volatile memories

    International Nuclear Information System (INIS)

    Erlbacher, T.; Jank, M.P.M.; Lemberger, M.; Bauer, A.J.; Ryssel, H.

    2008-01-01

    The use of hafnium silicate (HfSiO) as a charge trapping layer in charge-based non-volatile memory cells will be discussed. First, fundamental properties (e.g., dielectric constant, trap depths/levels) of the hafnium silicate layers, deposited from a single-source precursor, are deduced from capacitance-voltage and current density-voltage measurements. The oxide trap density of the analyzed HfSiO layers can be tuned to exceed that of silicon nitride. At the same time, a significant reduction of the write voltage is achieved due to a reduced effective oxide thickness. The erase operation, however, is hampered by the lower electric field at the HfSiO layer due to its high dielectric constant. Measurements also indicate that HfSiO exposed to a higher thermal budget during device fabrication results in fewer trapping centers. Retention measurements show that information can be reliably stored in memory cells with a trapping layer of HfSiO for more than 10 years similar to their silicon nitride counterparts. But the thickness of the top and bottom oxides must be increased for compensation of additional charge losses which are due to lower trap depth and free electron mass in HfSiO

  1. The microstructure investigation of GeTi thin film used for non-volatile memory

    International Nuclear Information System (INIS)

    Shen Jie; Liu Bo; Song Zhitang; Xu Cheng; Liang Shuang; Feng Songlin; Chen Bomy

    2008-01-01

    GeTi thin film has been found to have the reversible resistance switching property in our previous work. In this paper, the microstructure of this material with a given composition was investigated. The film was synthesized by magnetron sputtering and treated by the rapid temperature process. The results indicate a coexist status of amorphous and polycrystalline states in the as-deposited GeTi film, and the grains in the film are extremely fine. Furthermore, not until the film annealed at 600 deg. C, can the polycrystalline state be detected by X-ray diffraction. Based on the morphological analysis, the sputtered GeTi has the column growth tendency, and the column structure vanishes with the temperature increasing. The microstructure and thermal property analysis indicate that GeTi does not undergo evident phase change process during the annealing process, which makes the switching mechanism of GeTi different from that of chalcogenide memory material, the most widely used phase change memory material

  2. Exploring the Future of Out-of-Core Computing with Compute-Local Non-Volatile Memory

    Directory of Open Access Journals (Sweden)

    Myoungsoo Jung

    2014-01-01

    Full Text Available Drawing parallels to the rise of general purpose graphical processing units (GPGPUs as accelerators for specific high-performance computing (HPC workloads, there is a rise in the use of non-volatile memory (NVM as accelerators for I/O-intensive scientific applications. However, existing works have explored use of NVM within dedicated I/O nodes, which are distant from the compute nodes that actually need such acceleration. As NVM bandwidth begins to out-pace point-to-point network capacity, we argue for the need to break from the archetype of completely separated storage. Therefore, in this work we investigate co-location of NVM and compute by varying I/O interfaces, file systems, types of NVM, and both current and future SSD architectures, uncovering numerous bottlenecks implicit in these various levels in the I/O stack. We present novel hardware and software solutions, including the new Unified File System (UFS, to enable fuller utilization of the new compute-local NVM storage. Our experimental evaluation, which employs a real-world Out-of-Core (OoC HPC application, demonstrates throughput increases in excess of an order of magnitude over current approaches.

  3. Piezoelectric control of magnetoelectric coupling driven non-volatile memory switching and self cooling effects in FE/FSMA multiferroic heterostructures

    Science.gov (United States)

    Singh, Kirandeep; Kaur, Davinder

    2017-02-01

    The manipulation of magnetic states and materials' spin degree-of-freedom via a control of an electric (E-) field has been recently pursued to develop magnetoelectric (ME) coupling-driven electronic data storage devices with high read/write endurance, fast dynamic response, and low energy dissipation. One major hurdle for this approach is to develop reliable materials which should be compatible with prevailing silicon (Si)-based complementary metal-oxide-semiconductor (CMOS) technology, simultaneously allowing small voltage for the tuning of magnetization switching. In this regard, multiferroic heterostructures where ferromagnetic (FM) and ferroelectric (FE) layers are alternatively grown on conventional Si substrates are promising as the piezoelectric control of magnetization switching is anticipated to be possible by an E-field. In this work, we study the ferromagnetic shape memory alloys based PbZr0.52Ti0.48O3/Ni50Mn35In15 (PZT/Ni-Mn-In) multiferroic heterostructures, and investigate their potential for CMOS compatible non-volatile magnetic data storage applications. We demonstrate the voltage-impulse controlled nonvolatile, reversible, and bistable magnetization switching at room temperature in Si-integrated PZT/Ni-Mn-In thin film multiferroic heterostructures. We also thoroughly unveil the various intriguing features in these materials, such as E-field tuned ME coupling and magnetocaloric effect, shape memory induced ferroelectric modulation, improved fatigue endurance as well as Refrigeration Capacity (RC). This comprehensive study suggests that these novel materials have a great potential for the development of unconventional nanoscale memory and refrigeration devices with self-cooling effect and enhanced refrigeration efficiency, thus providing a new venue for their applications.

  4. Atomic layer-deposited Al–HfO2/SiO2 bi-layers towards 3D charge trapping non-volatile memory

    International Nuclear Information System (INIS)

    Congedo, Gabriele; Wiemer, Claudia; Lamperti, Alessio; Cianci, Elena; Molle, Alessandro; Volpe, Flavio G.; Spiga, Sabina

    2013-01-01

    A metal/oxide/high-κ dielectric/oxide/silicon (MOHOS) planar charge trapping memory capacitor including SiO 2 as tunnel oxide, Al–HfO 2 as charge trapping layer, SiO 2 as blocking oxide and TaN metal gate was fabricated and characterized as test vehicle in the view of integration into 3D cells. The thin charge trapping layer and blocking oxide were grown by atomic layer deposition, the technique of choice for the implementation of these stacks into 3D structures. The oxide stack shows a good thermal stability for annealing temperature of 900 °C in N 2 , as required for standard complementary metal–oxide–semiconductor processes. MOHOS capacitors can be efficiently programmed and erased under the applied voltages of ± 20 V to ± 12 V. When compared to a benchmark structure including thin Si 3 N 4 as charge trapping layer, the MOHOS cell shows comparable program characteristics, with the further advantage of the equivalent oxide thickness scalability due to the high dielectric constant (κ) value of 32, and an excellent retention even for strong testing conditions. Our results proved that high-κ based oxide structures grown by atomic layer deposition can be of interest for the integration into three dimensionally stacked charge trapping devices. - Highlights: ► Charge trapping device with Al–HfO 2 storage layer is fabricated and characterized. ► Al–HfO 2 and SiO 2 blocking oxides are deposited by atomic layer deposition. ► The oxide stack shows a good thermal stability after annealing at 900 °C. ► The device can be efficiently programmed/erased and retention is excellent. ► The oxide stack could be used for 3D-stacked Flash non-volatile memories

  5. A non-volatile organic electrochemical device as a low-voltage artificial synapse for neuromorphic computing

    Science.gov (United States)

    van de Burgt, Yoeri; Lubberman, Ewout; Fuller, Elliot J.; Keene, Scott T.; Faria, Grégorio C.; Agarwal, Sapan; Marinella, Matthew J.; Alec Talin, A.; Salleo, Alberto

    2017-04-01

    The brain is capable of massively parallel information processing while consuming only ~1-100 fJ per synaptic event. Inspired by the efficiency of the brain, CMOS-based neural architectures and memristors are being developed for pattern recognition and machine learning. However, the volatility, design complexity and high supply voltages for CMOS architectures, and the stochastic and energy-costly switching of memristors complicate the path to achieve the interconnectivity, information density, and energy efficiency of the brain using either approach. Here we describe an electrochemical neuromorphic organic device (ENODe) operating with a fundamentally different mechanism from existing memristors. ENODe switches at low voltage and energy (500 distinct, non-volatile conductance states within a ~1 V range, and achieves high classification accuracy when implemented in neural network simulations. Plastic ENODes are also fabricated on flexible substrates enabling the integration of neuromorphic functionality in stretchable electronic systems. Mechanical flexibility makes ENODes compatible with three-dimensional architectures, opening a path towards extreme interconnectivity comparable to the human brain.

  6. Improved Programming Efficiency through Additional Boron Implantation at the Active Area Edge in 90 nm Localized Charge-Trapping Non-volatile Memory

    International Nuclear Information System (INIS)

    Yue, Xu; Feng, Yan; Dun-Jun, Chen; Yi, Shi; Yong-Gang, Wang; Zhi-Guo, Li; Fan, Yang; Jos-Hua, Wang; Peter, Lin; Jian-Guang, Chang

    2010-01-01

    As the scaling-down of non-volatile memory (NVM) cells continues, the impact of shallow trench isolation (STI) on NVM cells becomes more severe. It has been observed in the 90 nm localized charge-trapping non-volatile memory (NROM™) that the programming efficiency of edge cells adjacent to STI is remarkably lower than that of other cells when channel hot electron injection is applied. Boron segregation is found to be mainly responsible for the low programming efficiency of edge cells. Meanwhile, an additional boron implantation of 10° tilt at the active area edge as a new solution to solve this problem is developed. (condensed matter: electronic structure, electrical, magnetic, and optical properties)

  7. Nanocrystals manufacturing by ultra-low-energy ion-beam-synthesis for non-volatile memory applications

    Energy Technology Data Exchange (ETDEWEB)

    Normand, P. E-mail: p.normand@imel.demokritos.gr; Kapetanakis, E.; Dimitrakis, P.; Skarlatos, D.; Beltsios, K.; Tsoukalas, D.; Bonafos, C.; Ben Assayag, G.; Cherkashin, N.; Claverie, A.; Berg, J.A. van den; Soncini, V.; Agarwal, A.; Ameen, M.; Perego, M.; Fanciulli, M

    2004-02-01

    An overview of recent developments regarding the fabrication and structure of thin silicon dioxide films with embedded nanocrystals through ultra-low-energy ion-beam-synthesis (ULE-IBS) is presented. Advances in fabrication, increased understanding of structure formation processes and ways to control them allow for the fabrication of reproducible and attractive silicon-nanocrystal memory devices for a wide-range of memory applications as herein demonstrated in the case of low-voltage EEPROM-like applications.

  8. Nanocrystals manufacturing by ultra-low-energy ion-beam-synthesis for non-volatile memory applications

    International Nuclear Information System (INIS)

    Normand, P.; Kapetanakis, E.; Dimitrakis, P.; Skarlatos, D.; Beltsios, K.; Tsoukalas, D.; Bonafos, C.; Ben Assayag, G.; Cherkashin, N.; Claverie, A.; Berg, J.A. van den; Soncini, V.; Agarwal, A.; Ameen, M.; Perego, M.; Fanciulli, M.

    2004-01-01

    An overview of recent developments regarding the fabrication and structure of thin silicon dioxide films with embedded nanocrystals through ultra-low-energy ion-beam-synthesis (ULE-IBS) is presented. Advances in fabrication, increased understanding of structure formation processes and ways to control them allow for the fabrication of reproducible and attractive silicon-nanocrystal memory devices for a wide-range of memory applications as herein demonstrated in the case of low-voltage EEPROM-like applications

  9. A Radiation-Tolerant, Low-Power Non-Volatile Memory Based on Silicon Nanocrystal Quantum Dots

    Science.gov (United States)

    Bell, L. D.; Boer, E. A.; Ostraat, M. L.; Brongersma, M. L.; Flagan, R. C.; Atwater, H. A.; deBlauwe, J.; Green, M. L.

    2001-01-01

    Nanocrystal nonvolatile floating-gate memories are a good candidate for space applications - initial results suggest they are fast, more reliable and consume less power than conventional floating gate memories. In the nanocrystal based NVM device, charge is not stored on a continuous polysilicon layer (so-called floating gate), but instead on a layer of discrete nanocrystals. Charge injection and storage in dense arrays of silicon nanocrystals in SiO2 is a critical aspect of the performance of potential nanocrystal flash memory structures. The ultimate goal for this class of devices is few- or single-electron storage in a small number of nanocrystal elements. In addition, the nanocrystal layer fabrication technique should be simple, 8-inch wafer compatible and well controlled in program/erase threshold voltage swing was seen during 100,000 program and erase cycles. Additional near-term goals for this project include extensive testing for radiation hardness and the development of artificial layered tunnel barrier heterostructures which have the potential for large speed enhancements for read/write of nanocrystal memory elements, compared with conventional flash devices. Additional information is contained in the original extended abstract.

  10. Ordered arrays of a defect-modified ferroelectric polymer for non-volatile memory with minimized energy consumption.

    Science.gov (United States)

    Chen, Xiang-Zhong; Chen, Xin; Guo, Xu; Cui, Yu-Shuang; Shen, Qun-Dong; Ge, Hai-Xiong

    2014-11-21

    Ferroelectric polymers are among the most promising materials for flexible electronic devices. Highly ordered arrays of the defect-modified ferroelectric polymer P(VDF-TrFE-CFE) (poly(vinylidene fluoride-trifluoroethylene-chlorofluoroethylene)) are fabricated by nanoimprint lithography for nonvolatile memory application. The defective CFE units reduce the coercive field to one-fifth of that of the un-modified P(VDF-TrFE), which can help minimize the energy consumption and extend the lifespan of the device. The nanoimprint process leads to preferable orientation of polymer chains and delicately controlled distribution of the defects, and thus a bi-stable polarization that makes the memory nonvolatile, as revealed by the pulsed polarization experiment.

  11. Flexible and twistable non-volatile memory cell array with all-organic one diode-one resistor architecture.

    Science.gov (United States)

    Ji, Yongsung; Zeigler, David F; Lee, Dong Su; Choi, Hyejung; Jen, Alex K-Y; Ko, Heung Cho; Kim, Tae-Wook

    2013-01-01

    Flexible organic memory devices are one of the integral components for future flexible organic electronics. However, high-density all-organic memory cell arrays on malleable substrates without cross-talk have not been demonstrated because of difficulties in their fabrication and relatively poor performances to date. Here we demonstrate the first flexible all-organic 64-bit memory cell array possessing one diode-one resistor architectures. Our all-organic one diode-one resistor cell exhibits excellent rewritable switching characteristics, even during and after harsh physical stresses. The write-read-erase-read output sequence of the cells perfectly correspond to the external pulse signal regardless of substrate deformation. The one diode-one resistor cell array is clearly addressed at the specified cells and encoded letters based on the standard ASCII character code. Our study on integrated organic memory cell arrays suggests that the all-organic one diode-one resistor cell architecture is suitable for high-density flexible organic memory applications in the future.

  12. Reversible strain-induced magnetization switching in FeGa nanomagnets: Pathway to a rewritable, non-volatile, non-toggle, extremely low energy straintronic memory.

    Science.gov (United States)

    Ahmad, Hasnain; Atulasimha, Jayasimha; Bandyopadhyay, Supriyo

    2015-12-14

    We report reversible strain-induced magnetization switching between two stable/metastable states in ~300 nm sized FeGa nanomagnets delineated on a piezoelectric PMN-PT substrate. Voltage of one polarity applied across the substrate generates compressive strain in a nanomagnet and switches its magnetization to one state, while voltage of the opposite polarity generates tensile strain and switches the magnetization back to the original state. The two states can encode the two binary bits, and, using the right voltage polarity, one can write either bit deterministically. This portends an ultra-energy-efficient non-volatile "non-toggle" memory.

  13. Nanoscale memory devices

    International Nuclear Information System (INIS)

    Chung, Andy; Deen, Jamal; Lee, Jeong-Soo; Meyyappan, M

    2010-01-01

    This article reviews the current status and future prospects for the use of nanomaterials and devices in memory technology. First, the status and continuing scaling trends of the flash memory are discussed. Then, a detailed discussion on technologies trying to replace flash in the near-term is provided. This includes phase change random access memory, Fe random access memory and magnetic random access memory. The long-term nanotechnology prospects for memory devices include carbon-nanotube-based memory, molecular electronics and memristors based on resistive materials such as TiO 2 . (topical review)

  14. DNA multi-bit non-volatile memory and bit-shifting operations using addressable electrode arrays and electric field-induced hybridization.

    Science.gov (United States)

    Song, Youngjun; Kim, Sejung; Heller, Michael J; Huang, Xiaohua

    2018-01-18

    DNA has been employed to either store digital information or to perform parallel molecular computing. Relatively unexplored is the ability to combine DNA-based memory and logical operations in a single platform. Here, we show a DNA tri-level cell non-volatile memory system capable of parallel random-access writing of memory and bit shifting operations. A microchip with an array of individually addressable electrodes was employed to enable random access of the memory cells using electric fields. Three segments on a DNA template molecule were used to encode three data bits. Rapid writing of data bits was enabled by electric field-induced hybridization of fluorescently labeled complementary probes and the data bits were read by fluorescence imaging. We demonstrated the rapid parallel writing and reading of 8 (2 3 ) combinations of 3-bit memory data and bit shifting operations by electric field-induced strand displacement. Our system may find potential applications in DNA-based memory and computations.

  15. Four-state memory based on a giant and non-volatile converse magnetoelectric effect in FeAl/PIN-PMN-PT structure.

    Science.gov (United States)

    Wei, Yanping; Gao, Cunxu; Chen, Zhendong; Xi, Shibo; Shao, Weixia; Zhang, Peng; Chen, Guilin; Li, Jiangong

    2016-07-15

    We report a stable, tunable and non-volatile converse magnetoelectric effect (ME) in a new type of FeAl/PIN-PMN-PT heterostructure at room temperature, with a giant electrical modulation of magnetization for which the maximum relative magnetization change (ΔM/M) is up to 66%. The 109° ferroelastic domain switching in the PIN-PMN-PT and coupling with the ferromagnetic (FM) film via uniaxial anisotropy originating from the PIN-PMN-PT (011) surface are the key roles in converse ME effect. We also propose here a new, four-state memory through which it is possible to modify the remanent magnetism state by adjusting the electric field. This work represents a helpful approach to securing electric-writing magnetic-reading with low energy consumption for future high-density information storage applications.

  16. Magnetic Random Access Memory based non-volatile asynchronous Muller cell for ultra-low power autonomous applications

    Energy Technology Data Exchange (ETDEWEB)

    Di Pendina, G., E-mail: gregory.dipendina@cea.fr, E-mail: eldar.zianbetov@cea.fr, E-mail: edith.beigne@cea.fr; Zianbetov, E., E-mail: gregory.dipendina@cea.fr, E-mail: eldar.zianbetov@cea.fr, E-mail: edith.beigne@cea.fr [Univ. Grenoble Alpes, INAC-SPINTEC, F-38000 Grenoble (France); CNRS, SPINTEC, F-38000 Grenoble (France); CEA, INAC-SPINTEC, F-38000 Grenoble (France); Beigne, E., E-mail: gregory.dipendina@cea.fr, E-mail: eldar.zianbetov@cea.fr, E-mail: edith.beigne@cea.fr [Univ. Grenoble Alpes, CEA, LETI, F-38000 Grenoble (France)

    2015-05-07

    Micro and nano electronic integrated circuit domain is today mainly driven by the advent of the Internet of Things for which the constraints are strong, especially in terms of power consumption and autonomy, not only during the computing phases but also during the standby or idle phases. In such ultra-low power applications, the circuit has to meet new constraints mainly linked to its changing energetic environment: long idle phases, automatic wake up, data back-up when the circuit is sporadically turned off, and ultra-low voltage power supply operation. Such circuits have to be completely autonomous regarding their unstable environment, while remaining in an optimum energetic configuration. Therefore, we propose in this paper the first MRAM-based non-volatile asynchronous Muller cell. This cell has been simulated and characterized in a very advanced 28 nm CMOS fully depleted silicon-on-insulator technology, presenting good power performance results due to an extremely efficient body biasing control together with ultra-wide supply voltage range from 160 mV up to 920 mV. The leakage current can be reduced to 154 pA thanks to reverse body biasing. We also propose an efficient standard CMOS bulk version of this cell in order to be compatible with different fabrication processes.

  17. Magnetic Random Access Memory based non-volatile asynchronous Muller cell for ultra-low power autonomous applications

    Science.gov (United States)

    Di Pendina, G.; Zianbetov, E.; Beigne, E.

    2015-05-01

    Micro and nano electronic integrated circuit domain is today mainly driven by the advent of the Internet of Things for which the constraints are strong, especially in terms of power consumption and autonomy, not only during the computing phases but also during the standby or idle phases. In such ultra-low power applications, the circuit has to meet new constraints mainly linked to its changing energetic environment: long idle phases, automatic wake up, data back-up when the circuit is sporadically turned off, and ultra-low voltage power supply operation. Such circuits have to be completely autonomous regarding their unstable environment, while remaining in an optimum energetic configuration. Therefore, we propose in this paper the first MRAM-based non-volatile asynchronous Muller cell. This cell has been simulated and characterized in a very advanced 28 nm CMOS fully depleted silicon-on-insulator technology, presenting good power performance results due to an extremely efficient body biasing control together with ultra-wide supply voltage range from 160 mV up to 920 mV. The leakage current can be reduced to 154 pA thanks to reverse body biasing. We also propose an efficient standard CMOS bulk version of this cell in order to be compatible with different fabrication processes.

  18. Magnetic Random Access Memory based non-volatile asynchronous Muller cell for ultra-low power autonomous applications

    International Nuclear Information System (INIS)

    Di Pendina, G.; Zianbetov, E.; Beigne, E.

    2015-01-01

    Micro and nano electronic integrated circuit domain is today mainly driven by the advent of the Internet of Things for which the constraints are strong, especially in terms of power consumption and autonomy, not only during the computing phases but also during the standby or idle phases. In such ultra-low power applications, the circuit has to meet new constraints mainly linked to its changing energetic environment: long idle phases, automatic wake up, data back-up when the circuit is sporadically turned off, and ultra-low voltage power supply operation. Such circuits have to be completely autonomous regarding their unstable environment, while remaining in an optimum energetic configuration. Therefore, we propose in this paper the first MRAM-based non-volatile asynchronous Muller cell. This cell has been simulated and characterized in a very advanced 28 nm CMOS fully depleted silicon-on-insulator technology, presenting good power performance results due to an extremely efficient body biasing control together with ultra-wide supply voltage range from 160 mV up to 920 mV. The leakage current can be reduced to 154 pA thanks to reverse body biasing. We also propose an efficient standard CMOS bulk version of this cell in order to be compatible with different fabrication processes

  19. Role of the nano amorphous interface in the crystallization of Sb2Te3 towards non-volatile phase change memory: insights from first principles.

    Science.gov (United States)

    Wang, Xue-Peng; Chen, Nian-Ke; Li, Xian-Bin; Cheng, Yan; Liu, X Q; Xia, Meng-Jiao; Song, Z T; Han, X D; Zhang, S B; Sun, Hong-Bo

    2014-06-14

    The nano amorphous interface is important as it controls the phase transition for data storage. Yet, atomic scale insights into such kinds of systems are still rare. By first-principles calculations, we obtain the atomic interface between amorphous Si and amorphous Sb2Te3, which prevails in the series of Si-Sb-Te phase change materials. This interface model reproduces the experiment-consistent phenomena, i.e. the amorphous stability of Sb2Te3, which defines the data retention in phase change memory, and is greatly enhanced by the nano interface. More importantly, this method offers a direct platform to explore the intrinsic mechanism to understand the material function: (1) by steric effects through the atomic "channel" of the amorphous interface, the arrangement of the Te network is significantly distorted and is separated from the p-orbital bond angle in the conventional phase-change material; and (2) through the electronic "channel" of the amorphous interface, high localized electrons in the form of a lone pair are "projected" to Sb2Te3 from amorphous Si by a proximity effect. These factors set an effective barrier for crystallization and improve the amorphous stability, and thus data retention. The present research and scheme sheds new light on the engineering and manipulation of other key amorphous interfaces, such as Si3N4/Ge2Sb2Te5 and C/Sb2Te3, through first-principles calculations towards non-volatile phase change memory.

  20. Lead-free epitaxial ferroelectric material integration on semiconducting (100) Nb-doped SrTiO3 for low-power non-volatile memory and efficient ultraviolet ray detection.

    Science.gov (United States)

    Kundu, Souvik; Clavel, Michael; Biswas, Pranab; Chen, Bo; Song, Hyun-Cheol; Kumar, Prashant; Halder, Nripendra N; Hudait, Mantu K; Banerji, Pallab; Sanghadasa, Mohan; Priya, Shashank

    2015-07-23

    We report lead-free ferroelectric based resistive switching non-volatile memory (NVM) devices with epitaxial (1-x)BaTiO3-xBiFeO3 (x = 0.725) (BT-BFO) film integrated on semiconducting (100) Nb (0.7%) doped SrTiO3 (Nb:STO) substrates. The piezoelectric force microscopy (PFM) measurement at room temperature demonstrated ferroelectricity in the BT-BFO thin film. PFM results also reveal the repeatable polarization inversion by poling, manifesting its potential for read-write operation in NVM devices. The electroforming-free and ferroelectric polarization coupled electrical behaviour demonstrated excellent resistive switching with high retention time, cyclic endurance, and low set/reset voltages. X-ray photoelectron spectroscopy was utilized to determine the band alignment at the BT-BFO and Nb:STO heterojunction, and it exhibited staggered band alignment. This heterojunction is found to behave as an efficient ultraviolet photo-detector with low rise and fall time. The architecture also demonstrates half-wave rectification under low and high input signal frequencies, where the output distortion is minimal. The results provide avenue for an electrical switch that can regulate the pixels in low or high frequency images. Combined this work paves the pathway towards designing future generation low-power ferroelectric based microelectronic devices by merging both electrical and photovoltaic properties of BT-BFO materials.

  1. Lead-free epitaxial ferroelectric material integration on semiconducting (100) Nb-doped SrTiO3 for low-power non-volatile memory and efficient ultraviolet ray detection

    Science.gov (United States)

    Kundu, Souvik; Clavel, Michael; Biswas, Pranab; Chen, Bo; Song, Hyun-Cheol; Kumar, Prashant; Halder, Nripendra N.; Hudait, Mantu K.; Banerji, Pallab; Sanghadasa, Mohan; Priya, Shashank

    2015-07-01

    We report lead-free ferroelectric based resistive switching non-volatile memory (NVM) devices with epitaxial (1-x)BaTiO3-xBiFeO3 (x = 0.725) (BT-BFO) film integrated on semiconducting (100) Nb (0.7%) doped SrTiO3 (Nb:STO) substrates. The piezoelectric force microscopy (PFM) measurement at room temperature demonstrated ferroelectricity in the BT-BFO thin film. PFM results also reveal the repeatable polarization inversion by poling, manifesting its potential for read-write operation in NVM devices. The electroforming-free and ferroelectric polarization coupled electrical behaviour demonstrated excellent resistive switching with high retention time, cyclic endurance, and low set/reset voltages. X-ray photoelectron spectroscopy was utilized to determine the band alignment at the BT-BFO and Nb:STO heterojunction, and it exhibited staggered band alignment. This heterojunction is found to behave as an efficient ultraviolet photo-detector with low rise and fall time. The architecture also demonstrates half-wave rectification under low and high input signal frequencies, where the output distortion is minimal. The results provide avenue for an electrical switch that can regulate the pixels in low or high frequency images. Combined this work paves the pathway towards designing future generation low-power ferroelectric based microelectronic devices by merging both electrical and photovoltaic properties of BT-BFO materials.

  2. Impact of process parameters on the structural and electrical properties of metal/PZT/Al2O3/silicon gate stack for non-volatile memory applications

    Science.gov (United States)

    Singh, Prashant; Jha, Rajesh Kumar; Singh, Rajat Kumar; Singh, B. R.

    2018-02-01

    In this paper, we present the structural and electrical properties of the Al2O3 buffer layer on non-volatile memory behavior using Metal/PZT/Al2O3/Silicon structures. Metal/PZT/Silicon and Metal/Al2O3/Silicon structures were also fabricated and characterized to obtain capacitance and leakage current parameters. Lead zirconate titanate (PZT::35:65) and Al2O3 films were deposited by sputtering on the silicon substrate. Memory window, PUND, endurance, breakdown voltage, effective charges, flat-band voltage and leakage current density parameters were measured and the effects of process parameters on the structural and electrical characteristics were investigated. X-ray data show dominant (110) tetragonal phase of the PZT film, which crystallizes at 500 °C. The sputtered Al2O3 film annealed at different temperatures show dominant (312) orientation and amorphous nature at 425 °C. Multiple angle laser ellipsometric analysis reveals the temperature dependence of PZT film refractive index and extinction coefficient. Electrical characterization shows the maximum memory window of 3.9 V and breakdown voltage of 25 V for the Metal/Ferroelectric/Silicon (MFeS) structures annealed at 500 °C. With 10 nm Al2O3 layer in the Metal/Ferroelectric/Insulator/Silicon (MFeIS) structure, the memory window and breakdown voltage was improved to 7.21 and 35 V, respectively. Such structures show high endurance with no significant reduction polarization charge for upto 2.2 × 109 iteration cycles.

  3. Data Retention Characterization of Gate-Injected Gold-Nanoparticle Non-Volatile Memory with Low-Damage CF4-Plasma-Treated Blocking Oxide Layer

    Directory of Open Access Journals (Sweden)

    Yu-Hua Liu

    2017-11-01

    Full Text Available Gold-nanoparticle (Au-NP non-volatile memories (NVMs with low-damage CF4 plasma treatment on the blocking oxide (BO layer have been investigated to present the gate injection of the holes. These holes, injected from the Al gate with the positive gate bias, were explained by the bandgap engineering of the gradually-fluorinated BO layer and the effective work function modulation of the Al gate. The Si–F complex in the BO layer was analyzed by X-ray photoelectron spectroscopy (XPS, while the depth of fluorine incorporation was verified using a secondary ion mass spectrometer (SIMS. In addition, the valence band modification of the fluorinated BO layer was examined by ultraviolet photoelectron spectroscopy (UPS to support the bandgap engineering. The reactive power of the CF4 plasma treatment on the BO layer was modified to increase the electric field of the BO layer and raise the effective work function of the Al gate, leading to the hole-injection from the gate. The injected holes are trapped at the interface between the gold-nanoparticles (Au-NPs and the tunneling oxide (TO layer, resulting in superior data retention properties such as an extremely low charge loss of 5.7% at 104 s and a nearly negligible increase in charge loss at 85 °C of the CF4-plasma-treated Au-NP NVMs, which can be applied in highly reliable consumer electronics.

  4. Data Retention Characterization of Gate-Injected Gold-Nanoparticle Non-Volatile Memory with Low-Damage CF₄-Plasma-Treated Blocking Oxide Layer.

    Science.gov (United States)

    Liu, Yu-Hua; Kao, Chyuan-Haur; Cheng, Tsung-Chin; Wu, Chih-I; Wang, Jer-Chyi

    2017-11-10

    Gold-nanoparticle (Au-NP) non-volatile memories (NVMs) with low-damage CF₄ plasma treatment on the blocking oxide (BO) layer have been investigated to present the gate injection of the holes. These holes, injected from the Al gate with the positive gate bias, were explained by the bandgap engineering of the gradually-fluorinated BO layer and the effective work function modulation of the Al gate. The Si-F complex in the BO layer was analyzed by X-ray photoelectron spectroscopy (XPS), while the depth of fluorine incorporation was verified using a secondary ion mass spectrometer (SIMS). In addition, the valence band modification of the fluorinated BO layer was examined by ultraviolet photoelectron spectroscopy (UPS) to support the bandgap engineering. The reactive power of the CF₄ plasma treatment on the BO layer was modified to increase the electric field of the BO layer and raise the effective work function of the Al gate, leading to the hole-injection from the gate. The injected holes are trapped at the interface between the gold-nanoparticles (Au-NPs) and the tunneling oxide (TO) layer, resulting in superior data retention properties such as an extremely low charge loss of 5.7% at 10⁴ s and a nearly negligible increase in charge loss at 85 °C of the CF₄-plasma-treated Au-NP NVMs, which can be applied in highly reliable consumer electronics.

  5. Optimization of poly(vinylidene fluoride-trifluoroethylene) films as non-volatile memory for flexible electronics

    KAUST Repository

    Mao, Duo

    2010-05-01

    The impact of thermal treatment and thickness on the polarization and leakage current of poly(vinylidene fluoride-trifluoroethylene) [P(VDF-TrFE)] copolymer thin film capacitors has been studied. The evolution of the film morphology, crystallinity and bonding orientation as a function of annealing temperature and thickness were characterized using multiple techniques. Electrical performance of the devices was correlated with the material properties. It was found that annealing at or slightly above the Curie temperature (Tc) is the optimal temperature for high polarization, smooth surface morphology and low leakage current. Higher annealing temperature (but below the melting temperature Tm) favors larger size β crystallites through molecular chain self-organization, resulting in increased film roughness, and the vertical polarization tends to saturate. Metal-Ferroelectric-Metal (MFM) capacitors consistently achieved Ps, Pr and Vc of 8.5 μC/cm2, 7.4 μC/cm2 and 10.2 V, respectively.

  6. Forced Ion Migration for Chalcogenide Phase Change Memory Device

    Science.gov (United States)

    Campbell, Kristy A (Inventor)

    2013-01-01

    Non-volatile memory devices with two stacked layers of chalcogenide materials comprising the active memory device have been investigated for their potential as phase-change memories. The devices tested included GeTe/SnTe, Ge2Se3/SnTe, and Ge2Se3/SnSe stacks. All devices exhibited resistance switching behavior. The polarity of the applied voltage with respect to the SnTe or SnSe layer was critical to the memory switching properties, due to the electric field induced movement of either Sn or Te into the Ge-chalcogenide layer. One embodiment of the invention is a device comprising a stack of chalcogenide-containing layers which exhibit phase-change switching only after a reverse polarity voltage potential is applied across the stack causing ion movement into an adjacent layer and thus "activating" the device to act as a phase-change random access memory device or a reconfigurable electronics device when the applied voltage potential is returned to the normal polarity. Another embodiment of the invention is a device that is capable of exhibiting more than two data states.

  7. Hybrid superconducting-magnetic memory device using competing order parameters.

    Science.gov (United States)

    Baek, Burm; Rippard, William H; Benz, Samuel P; Russek, Stephen E; Dresselhaus, Paul D

    2014-05-28

    In a hybrid superconducting-magnetic device, two order parameters compete, with one type of order suppressing the other. Recent interest in ultra-low-power, high-density cryogenic memories has spurred new efforts to simultaneously exploit superconducting and magnetic properties so as to create novel switching elements having these two competing orders. Here we describe a reconfigurable two-layer magnetic spin valve integrated within a Josephson junction. Our measurements separate the suppression in the superconducting coupling due to the exchange field in the magnetic layers, which causes depairing of the supercurrent, from the suppression due to the stray magnetic field. The exchange field suppression of the superconducting order parameter is a tunable and switchable behaviour that is also scalable to nanometer device dimensions. These devices demonstrate non-volatile, size-independent switching of Josephson coupling, in magnitude as well as phase, and they may enable practical nanoscale superconducting memory devices.

  8. Time and total dose response of non-volatile UVPROMs

    International Nuclear Information System (INIS)

    Sampson, D.F.

    1988-01-01

    While survivability testing of floating gate non-volatile UVPROM memory devices has been documented in numerous journals, this paper reports on the total dose radiation response and intrinsic charge loss as a function of operating time in a system. Five groups of Intel and Signetics 27C256 devices were aged from one to five years through accelerated bake to simulate system use. Characterizations of the groups with five years of simulated use will be presented in detail in this paper. Device margin voltage was characterized before and after aging and after exposure to five total dose radiation levels (1K - 5K rads (Si)). A statistical model based upon the characterization data was developed to establish re-programming intervals for these devices when used in airborne electronic systems

  9. Different importance of the volatile and non-volatile fractions of an olfactory signature for individual social recognition in rats versus mice and short-term versus long-term memory.

    Science.gov (United States)

    Noack, Julia; Richter, Karin; Laube, Gregor; Haghgoo, Hojjat Allah; Veh, Rüdiger W; Engelmann, Mario

    2010-11-01

    When tested in the olfactory cued social recognition/discrimination test, rats and mice differ in their retention of a recognition memory for a previously encountered conspecific juvenile: Rats are able to recognize a given juvenile for approximately 45 min only whereas mice show not only short-term, but also long-term recognition memory (≥ 24 h). Here we modified the social recognition/social discrimination procedure to investigate the neurobiological mechanism(s) underlying the species differences. We presented a conspecific juvenile repeatedly to the experimental subjects and monitored the investigation duration as a measure for recognition. Presentation of only the volatile fraction of the juvenile olfactory signature was sufficient for both short- and long-term recognition in mice but not rats. Applying additional volatile, mono-molecular odours to the "to be recognized" juveniles failed to affect short-term memory in both species, but interfered with long-term recognition in mice. Finally immunocytochemical analysis of c-Fos as a marker for cellular activation, revealed that juvenile exposure stimulated areas involved in the processing of olfactory signals in both the main and the accessory olfactory bulb in mice. In rats, we measured an increased c-Fos synthesis almost exclusively in cells of the accessory olfactory bulb. Our data suggest that the species difference in the retention of social recognition memory is based on differences in the processing of the volatile versus non-volatile fraction of the individuals' olfactory signature. The non-volatile fraction is sufficient for retaining a short-term social memory only. Long-term social memory - as observed in mice - requires a processing of both the volatile and non-volatile fractions of the olfactory signature. Copyright © 2010 Elsevier Inc. All rights reserved.

  10. Enhanced non-volatile memory characteristics with quattro-layer graphene nanoplatelets vs. 2.85-nm Si nanoparticles with asymmetric Al2O 3/HfO 2 tunnel oxide.

    Science.gov (United States)

    El-Atab, Nazek; Turgut, Berk Berkan; Okyay, Ali K; Nayfeh, Munir; Nayfeh, Ammar

    2015-12-01

    In this work, we demonstrate a non-volatile metal-oxide semiconductor (MOS) memory with Quattro-layer graphene nanoplatelets as charge storage layer with asymmetric Al2O3/HfO2 tunnel oxide and we compare it to the same memory structure with 2.85-nm Si nanoparticles charge trapping layer. The results show that graphene nanoplatelets with Al2O3/HfO2 tunnel oxide allow for larger memory windows at the same operating voltages, enhanced retention, and endurance characteristics. The measurements are further confirmed by plotting the energy band diagram of the structures, calculating the quantum tunneling probabilities, and analyzing the charge transport mechanism. Also, the required program time of the memory with ultra-thin asymmetric Al2O3/HfO2 tunnel oxide with graphene nanoplatelets storage layer is calculated under Fowler-Nordheim tunneling regime and found to be 4.1 ns making it the fastest fully programmed MOS memory due to the observed pure electrons storage in the graphene nanoplatelets. With Si nanoparticles, however, the program time is larger due to the mixed charge storage. The results confirm that band-engineering of both tunnel oxide and charge trapping layer is required to enhance the current non-volatile memory characteristics.

  11. Three-terminal resistive switching memory in a transparent vertical-configuration device

    International Nuclear Information System (INIS)

    Ungureanu, Mariana; Llopis, Roger; Casanova, Fèlix; Hueso, Luis E.

    2014-01-01

    The resistive switching phenomenon has attracted much attention recently for memory applications. It describes the reversible change in the resistance of a dielectric between two non-volatile states by the application of electrical pulses. Typical resistive switching memories are two-terminal devices formed by an oxide layer placed between two metal electrodes. Here, we report on the fabrication and operation of a three-terminal resistive switching memory that works as a reconfigurable logic component and offers an increased logic density on chip. The three-terminal memory device we present is transparent and could be further incorporated in transparent computing electronic technologies

  12. Solution-processed flexible NiO resistive random access memory device

    Science.gov (United States)

    Kim, Soo-Jung; Lee, Heon; Hong, Sung-Hoon

    2018-04-01

    Non-volatile memories (NVMs) using nanocrystals (NCs) as active materials can be applied to soft electronic devices requiring a low-temperature process because NCs do not require a heat treatment process for crystallization. In addition, memory devices can be implemented simply by using a patterning technique using a solution process. In this study, a flexible NiO ReRAM device was fabricated using a simple NC patterning method that controls the capillary force and dewetting of a NiO NC solution at low temperature. The switching behavior of a NiO NC based memory was clearly observed by conductive atomic force microscopy (c-AFM).

  13. New memory devices based on the proton transfer process

    International Nuclear Information System (INIS)

    Wierzbowska, Małgorzata

    2016-01-01

    Memory devices operating due to the fast proton transfer (PT) process are proposed by the means of first-principles calculations. Writing  information is performed using the electrostatic potential of scanning tunneling microscopy (STM). Reading information is based on the effect of the local magnetization induced at the zigzag graphene nanoribbon (Z-GNR) edge—saturated with oxygen or the hydroxy group—and can be realized with the use of giant magnetoresistance (GMR), a magnetic tunnel junction or spin-transfer torque devices. The energetic barriers for the hop forward and backward processes can be tuned by the distance and potential of the STM tip; this thus enables us to tailor the non-volatile logic states. The proposed system enables very dense packing of the logic cells and could be used in random access and flash memory devices. (paper)

  14. New memory devices based on the proton transfer process

    Science.gov (United States)

    Wierzbowska, Małgorzata

    2016-01-01

    Memory devices operating due to the fast proton transfer (PT) process are proposed by the means of first-principles calculations. Writing information is performed using the electrostatic potential of scanning tunneling microscopy (STM). Reading information is based on the effect of the local magnetization induced at the zigzag graphene nanoribbon (Z-GNR) edge—saturated with oxygen or the hydroxy group—and can be realized with the use of giant magnetoresistance (GMR), a magnetic tunnel junction or spin-transfer torque devices. The energetic barriers for the hop forward and backward processes can be tuned by the distance and potential of the STM tip; this thus enables us to tailor the non-volatile logic states. The proposed system enables very dense packing of the logic cells and could be used in random access and flash memory devices.

  15. Effect of mechanical loads on stability of nanodomains in ferroelectric ultrathin films: towards flexible erasing of the non-volatile memories.

    Science.gov (United States)

    Chen, W J; Zheng, Yue; Xiong, W M; Feng, Xue; Wang, Biao; Wang, Ying

    2014-06-18

    Intensive investigations have been drawn on nanoscale ferroelectrics for their prospective applications such as developing memory devices. In contrast with the commonly used electrical means to process (i.e., read, write or erase) the information carried by ferroelectric domains, at present, mechanisms of non-electrical processing ferroelectric domains are relatively lacking. Here we make a systematical investigation on the stability of 180° cylindrical domains in ferroelectric nanofilms subjected to macroscopic mechanical loads, and explore the possibility of mechanical erasing. Effects of domain size, film thickness, temperature and different mechanical loads, including uniform strain, cylindrical bending and wavy bending, have been revealed. It is found that the stability of a cylindrical domain depends on its radius, temperature and film thickness. More importantly, mechanical loads have great controllability on the stability of cylindrical domains, with the critical radius nonlinearly sensitive to both strain and strain gradient. This indicates that erasing cylindrical domain can be achieved by changing the strain state of nanofilm. Based on the calculated phase diagrams, we successfully simulate several mechanical erasing processes on 4 × 4 bits memory devices. Our study sheds light on prospective device applications of ferroelectrics involving mechanical loads, such as flexible memory devices and other micro-electromechanical systems.

  16. Effect of Mechanical Loads on Stability of Nanodomains in Ferroelectric Ultrathin Films: Towards Flexible Erasing of the Non-Volatile Memories

    OpenAIRE

    Chen, W. J.; Zheng, Yue; Xiong, W. M.; Feng, Xue; Wang, Biao; Wang, Ying

    2014-01-01

    Intensive investigations have been drawn on nanoscale ferroelectrics for their prospective applications such as developing memory devices. In contrast with the commonly used electrical means to process (i.e., read, write or erase) the information carried by ferroelectric domains, at present, mechanisms of non-electrical processing ferroelectric domains are relatively lacking. Here we make a systematical investigation on the stability of 180° cylindrical domains in ferroelectric nanofilms subj...

  17. Improvement of multi-level resistive switching characteristics in solution-processed AlO x -based non-volatile resistive memory using microwave irradiation

    Science.gov (United States)

    Kim, Seung-Tae; Cho, Won-Ju

    2018-01-01

    We fabricated a resistive random access memory (ReRAM) device on a Ti/AlO x /Pt structure with solution-processed AlO x switching layer using microwave irradiation (MWI), and demonstrated multi-level cell (MLC) operation. To investigate the effect of MWI power on the MLC characteristics, post-deposition annealing was performed at 600-3000 W after AlO x switching layer deposition, and the MLC operation was compared with as-deposited (as-dep) and conventional thermally annealing (CTA) treated devices. All solution-processed AlO x -based ReRAM devices exhibited bipolar resistive switching (BRS) behavior. We found that these devices have four-resistance states (2 bits) of MLC operation according to the modulation of the high-resistance state (HRSs) through reset voltage control. Particularly, compared to the as-dep and CTA ReRAM devices, the MWI-treated ReRAM devices showed a significant increase in the memory window and stable endurance for multi-level operation. Moreover, as the MWI power increased, excellent MLC characteristics were exhibited because the resistance ratio between each resistance state was increased. In addition, it exhibited reliable retention characteristics without deterioration at 25 °C and 85 °C for 10 000 s. Finally, the relationship between the chemical characteristics of the solution-processed AlO x switching layer and BRS-based multi-level operation according to the annealing method and MWI power was investigated using x-ray photoelectron spectroscopy.

  18. Soluble dendrimers europium(III) β-diketonate complex for organic memory devices

    International Nuclear Information System (INIS)

    Wang Binbin; Fang Junfeng; Li Bin; You Han; Ma Dongge; Hong Ziruo; Li Wenlian; Su Zhongmin

    2008-01-01

    We report the synthesis of a soluble dendrimers europium(III) complex, tris(dibenzoylmethanato)(1,3,5-tris[2-(2'-pyridyl) benzimidazoly]methylbenzene)-europium(III), and its application in organic electrical bistable memory device. Excellent stability that ensured more than 10 6 write-read-erase-reread cycles has been performed in ambient conditions without current-induced degradation. High-density, low-cost memory, good film-firming property, fascinating thermal and morphological stability allow the application of the dendrimers europium(III) complex as an active medium in non-volatile memory devices

  19. A New Concept for Non-Volatile Memory: The Electric-Pulse Induced Resistive Change Effect in Colossal Magnetoresistive Thin Films

    Science.gov (United States)

    Liu, S. Q.; Wu, N. J.; Ignatiev, A.

    2001-01-01

    A novel electric pulse-induced resistive change (EPIR) effect has been found in thin film colossal magnetoresistive (CMR) materials, and has shown promise for the development of resistive, nonvolatile memory. The EPIR effect is induced by the application of low voltage (resistance of the thin film sample depending on pulse polarity. The sample resistance change has been shown to be over two orders of magnitude, and is nonvolatile after pulsing. The sample resistance can also be changed through multiple levels - as many as 50 have been shown. Such a device can provide a way for the development of a new kind of nonvolatile multiple-valued memory with high density, fast write/read speed, low power-consumption, and potential high radiation-hardness.

  20. A novel architecture of non-volatile magnetic arithmetic logic unit using magnetic tunnel junctions

    International Nuclear Information System (INIS)

    Guo, Wei; Prenat, Guillaume; Dieny, Bernard

    2014-01-01

    Complementary metal–oxide–semiconductor (CMOS) technology is facing increasingly difficult obstacles such as power consumption and interconnection delay. Novel hybrid technologies and architectures are being investigated with the aim to circumvent some of these limits. In particular, hybrid CMOS/magnetic technology based on magnetic tunnel junctions (MTJs) is considered as a very promising approach thanks to the full compatibility of MTJs with CMOS technology. By tightly merging the conventional electronics with magnetism, both logic and memory functions can be implemented in the same device. As a result, non-volatility is directly brought into logic circuits, yielding significant improvement of device performances and new functionalities as well. We have conceived an innovative methodology to construct non-volatile magnetic arithmetic logic units (MALUs) combining spin-transfer torque MTJs with MOS transistors. The present 4-bit MALU utilizes 4 MTJ pairs to store its operation code (opcode). Its operations and performances have been confirmed and evaluated through electrical simulations. (paper)

  1. An ultra-low-power area-efficient non-volatile memory in a 0.18 μm single-poly CMOS process for passive RFID tags

    International Nuclear Information System (INIS)

    Jia Xiaoyun; Feng Peng; Zhang Shengguang; Wu Nanjian; Zhao Baiqin; Liu Su

    2013-01-01

    This paper presents an ultra-low-power area-efficient non-volatile memory (NVM) in a 0.18 μm single-poly standard CMOS process for passive radio frequency identification (RFID) tags. In the memory cell, a novel low-power operation method is proposed to realize bi-directional Fowler—Nordheim tunneling during write operation. Furthermore, the cell is designed with PMOS transistors and coupling capacitors to minimize its area. In order to improve its reliability, the cell consists of double floating gates to store the data, and the 1 kbit NVM was implemented in a 0.18 μm single-poly standard CMOS process. The area of the memory cell and 1 kbit memory array is 96 μm 2 and 0.12 mm 2 , respectively. The measured results indicate that the program/erase voltage ranges from 5 to 6 V The power consumption of the read/write operation is 0.19 μW/0.69 μW at a read/write rate of (268 kb/s)/(3.0 kb/s). (semiconductor integrated circuits)

  2. Flash drive memory apparatus and method

    Science.gov (United States)

    Hinchey, Michael G. (Inventor)

    2010-01-01

    A memory apparatus includes a non-volatile computer memory, a USB mass storage controller connected to the non-volatile computer memory, the USB mass storage controller including a daisy chain component, a male USB interface connected to the USB mass storage controller, and at least one other interface for a memory device, other than a USB interface, the at least one other interface being connected to the USB mass storage controller.

  3. A New Concept for Non-Volatile Memory: The Electric-Pulse Induced Resistive Change Effect in Colossal Magnetoresistive Thin Films

    Science.gov (United States)

    Liu, S. Q.; Wu, N. J.; Ignatiev, A.

    2001-01-01

    A novel electric pulse-induced resistive change (EPIR) effect has been found in thin film colossal magnetoresistive (CMR) materials, and has shown promise for the development of resistive, nonvolatile memory. The EPIR effect is induced by the application of low voltage (memory with high density, fast write/read speed, low power-consumption, and potential high radiation-hardness.

  4. Device and methods for writing and erasing analog information in small memory units via voltage pulses

    Energy Technology Data Exchange (ETDEWEB)

    El Gabaly Marquez, Farid; Talin, Albert Alec

    2018-04-17

    Devices and methods for non-volatile analog data storage are described herein. In an exemplary embodiment, an analog memory device comprises a potential-carrier source layer, a barrier layer deposited on the source layer, and at least two storage layers deposited on the barrier layer. The memory device can be prepared to write and read data via application of a biasing voltage between the source layer and the storage layers, wherein the biasing voltage causes potential-carriers to migrate into the storage layers. After initialization, data can be written to the memory device by application of a voltage pulse between two storage layers that causes potential-carriers to migrate from one storage layer to another. A difference in concentration of potential carriers caused by migration of potential-carriers between the storage layers results in a voltage that can be measured in order to read the written data.

  5. Polymer ferroelectric field-effect memory device with SnO channel layer exhibits record hole mobility

    KAUST Repository

    Caraveo-Frescas, Jesus Alfonso

    2014-06-10

    Here we report for the first time a hybrid p-channel polymer ferroelectric field-effect transistor memory device with record mobility. The memory device, fabricated at 200C on both plastic polyimide and glass substrates, uses ferroelectric polymer P(VDF-TrFE) as the gate dielectric and transparent p-type oxide (SnO) as the active channel layer. A record mobility of 3.3 cm 2V-1s-1, large memory window (~16 V), low read voltages (~-1 V), and excellent retention characteristics up to 5000 sec have been achieved. The mobility achieved in our devices is over 10 times higher than previously reported polymer ferroelectric field-effect transistor memory with p-type channel. This demonstration opens the door for the development of non-volatile memory devices based on dual channel for emerging transparent and flexible electronic devices.

  6. Memories are made of this

    OpenAIRE

    Marsh, George

    2001-01-01

    Traditional semiconductor memory falls into two categories—volatile and non-volatile. Volatile memories, such as SRAM (static random access memory) and DRAM (dynamic random access memory), lose their contents when power is rémoved. RAM memories are easy to use and perform well, but require a continuous power source—not ideal for battery-powered portable devices. Non-volatile memories retain their contents when power is removed and those in current use are derived from ROM (read-only memory). ...

  7. Acoustically assisted spin-transfer-torque switching of nanomagnets: An energy-efficient hybrid writing scheme for non-volatile memory

    International Nuclear Information System (INIS)

    Biswas, Ayan K.; Bandyopadhyay, Supriyo; Atulasimha, Jayasimha

    2013-01-01

    We show that the energy dissipated to write bits in spin-transfer-torque random access memory can be reduced by an order of magnitude if a surface acoustic wave (SAW) is launched underneath the magneto-tunneling junctions (MTJs) storing the bits. The SAW-generated strain rotates the magnetization of every MTJs' soft magnet from the easy towards the hard axis, whereupon passage of a small spin-polarized current through a target MTJ selectively switches it to the desired state with > 99.99% probability at room temperature, thereby writing the bit. The other MTJs return to their original states at the completion of the SAW cycle

  8. From silicon to organic nanoparticle memory devices.

    Science.gov (United States)

    Tsoukalas, D

    2009-10-28

    After introducing the operational principle of nanoparticle memory devices, their current status in silicon technology is briefly presented in this work. The discussion then focuses on hybrid technologies, where silicon and organic materials have been combined together in a nanoparticle memory device, and finally concludes with the recent development of organic nanoparticle memories. The review is focused on the nanoparticle memory concept as an extension of the current flash memory device. Organic nanoparticle memories are at a very early stage of research and have not yet found applications. When this happens, it is expected that they will not directly compete with mature silicon technology but will find their own areas of application.

  9. Organic nonvolatile memory devices based on ferroelectricity

    NARCIS (Netherlands)

    Naber, R.C.G.; Asadi, K.; Blom, P.W.M.; Leeuw, D.M. de; Boer, B. de

    2010-01-01

    A memory functionality is a prerequisite for many applications of electronic devices. Organic nonvolatile memory devices based on ferroelectricity are a promising approach toward the development of a low-cost memory technology. In this Review Article we discuss the latest developments in this area

  10. Phase change materials in non-volatile storage

    OpenAIRE

    Ielmini, Daniele; Lacaita, Andrea L.

    2011-01-01

    After revolutionizing the technology of optical data storage, phase change materials are being adopted in non-volatile semiconductor memories. Their success in electronic storage is mostly due to the unique properties of the amorphous state where carrier transport phenomena and thermally-induced phase change cooperate to enable high-speed, low-voltage operation and stable data retention possible within the same material. This paper reviews the key physical properties that make this phase so s...

  11. Organic ferroelectric opto-electronic memories

    NARCIS (Netherlands)

    Asadi, K.; Li, M.; Blom, P.W.M.; Kemerink, M.; Leeuw, D.M. de

    2011-01-01

    Memory is a prerequisite for many electronic devices. Organic non-volatile memory devices based on ferroelectricity are a promising approach towards the development of a low-cost memory technology based on a simple cross-bar array. In this review article we discuss the latest developments in this

  12. Transparent and flexible write-once-read-many (WORM) memory device based on egg albumen

    Science.gov (United States)

    Qu, Bo; Lin, Qianru; Wan, Tao; Du, Haiwei; Chen, Nan; Lin, Xi; Chu, Dewei

    2017-08-01

    Egg albumen, as an important protein resource in nature, is an interesting dielectric material exhibiting many fascinating properties for the development of environmentally friendly electronic devices. Taking advantage of their extraordinary transparency and flexibility, this paper presents an innovative preparation approach for albumen thin film based write-once-read-many-times (WORM) memory devices in a simple, cost-effective manner. The fabricated device shows superior data retention properties including non-volatile character (over 105 s) and promising great read durability (106 times). Furthermore, our results suggested that the electric-field-induced trap-controlled space charge limited current (SCLC) conduction is responsible for the observed resistance switching effect. The present study may likely reveal another pathway towards complete see-through electrical devices.

  13. Transparent and flexible write-once-read-many (WORM) memory device based on egg albumen

    International Nuclear Information System (INIS)

    Qu, Bo; Lin, Qianru; Wan, Tao; Du, Haiwei; Chen, Nan; Lin, Xi; Chu, Dewei

    2017-01-01

    Egg albumen, as an important protein resource in nature, is an interesting dielectric material exhibiting many fascinating properties for the development of environmentally friendly electronic devices. Taking advantage of their extraordinary transparency and flexibility, this paper presents an innovative preparation approach for albumen thin film based write-once-read-many-times (WORM) memory devices in a simple, cost-effective manner. The fabricated device shows superior data retention properties including non-volatile character (over 10 5 s) and promising great read durability (10 6 times). Furthermore, our results suggested that the electric-field-induced trap-controlled space charge limited current (SCLC) conduction is responsible for the observed resistance switching effect. The present study may likely reveal another pathway towards complete see-through electrical devices. (paper)

  14. Robust resistive memory devices using solution-processable metal-coordinated azo aromatics

    Science.gov (United States)

    Goswami, Sreetosh; Matula, Adam J.; Rath, Santi P.; Hedström, Svante; Saha, Surajit; Annamalai, Meenakshi; Sengupta, Debabrata; Patra, Abhijeet; Ghosh, Siddhartha; Jani, Hariom; Sarkar, Soumya; Motapothula, Mallikarjuna Rao; Nijhuis, Christian A.; Martin, Jens; Goswami, Sreebrata; Batista, Victor S.; Venkatesan, T.

    2017-12-01

    Non-volatile memories will play a decisive role in the next generation of digital technology. Flash memories are currently the key player in the field, yet they fail to meet the commercial demands of scalability and endurance. Resistive memory devices, and in particular memories based on low-cost, solution-processable and chemically tunable organic materials, are promising alternatives explored by the industry. However, to date, they have been lacking the performance and mechanistic understanding required for commercial translation. Here we report a resistive memory device based on a spin-coated active layer of a transition-metal complex, which shows high reproducibility (~350 devices), fast switching (106 s) and scalability (down to ~60 nm2). In situ Raman and ultraviolet-visible spectroscopy alongside spectroelectrochemistry and quantum chemical calculations demonstrate that the redox state of the ligands determines the switching states of the device whereas the counterions control the hysteresis. This insight may accelerate the technological deployment of organic resistive memories.

  15. Electric Field Tuning Non-volatile Magnetism in Half-Metallic Alloys Co2FeAl/Pb(Mg1/3Nb2/3)O3-PbTiO3 Heterostructure

    Science.gov (United States)

    Dunzhu, Gesang; Wang, Fenglong; Zhou, Cai; Jiang, Changjun

    2018-03-01

    We reported the non-volatile electric field-mediated magnetic properties in the half-metallic Heusler alloy Co2FeAl/Pb(Mg1/3Nb2/3)O3-PbTiO3 heterostructure at room temperature. The remanent magnetization with different applied electric field along [100] and [01-1] directions was achieved, which showed the non-volatile remanent magnetization driven by an electric field. The two giant reversible and stable remanent magnetization states were obtained by applying pulsed electric field. This can be attributed to the piezostrain effect originating from the piezoelectric substrate, which can be used for magnetoelectric-based memory devices.

  16. Shape memory polymer medical device

    Science.gov (United States)

    Maitland, Duncan [Pleasant Hill, CA; Benett, William J [Livermore, CA; Bearinger, Jane P [Livermore, CA; Wilson, Thomas S [San Leandro, CA; Small, IV, Ward; Schumann, Daniel L [Concord, CA; Jensen, Wayne A [Livermore, CA; Ortega, Jason M [Pacifica, CA; Marion, III, John E.; Loge, Jeffrey M [Stockton, CA

    2010-06-29

    A system for removing matter from a conduit. The system includes the steps of passing a transport vehicle and a shape memory polymer material through the conduit, transmitting energy to the shape memory polymer material for moving the shape memory polymer material from a first shape to a second and different shape, and withdrawing the transport vehicle and the shape memory polymer material through the conduit carrying the matter.

  17. Projected phase-change memory devices

    Science.gov (United States)

    Koelmans, Wabe W.; Sebastian, Abu; Jonnalagadda, Vara Prasad; Krebs, Daniel; Dellmann, Laurent; Eleftheriou, Evangelos

    2015-09-01

    Nanoscale memory devices, whose resistance depends on the history of the electric signals applied, could become critical building blocks in new computing paradigms, such as brain-inspired computing and memcomputing. However, there are key challenges to overcome, such as the high programming power required, noise and resistance drift. Here, to address these, we present the concept of a projected memory device, whose distinguishing feature is that the physical mechanism of resistance storage is decoupled from the information-retrieval process. We designed and fabricated projected memory devices based on the phase-change storage mechanism and convincingly demonstrate the concept through detailed experimentation, supported by extensive modelling and finite-element simulations. The projected memory devices exhibit remarkably low drift and excellent noise performance. We also demonstrate active control and customization of the programming characteristics of the device that reliably realize a multitude of resistance states.

  18. A study of selenium nanoparticles as charge storage element for flexible semi-transparent memory devices

    Science.gov (United States)

    Alotaibi, Sattam; Nama Manjunatha, Krishna; Paul, Shashi

    2017-12-01

    Flexible Semi-Transparent electronic memory would be useful in coming years for integrated flexible transparent electronic devices. However, attaining such flexibility and semi-transparency leads to the boundaries in material composition. Thus, impeding processing speed and device performance. In this work, we present the use of inorganic stable selenium nanoparticles (Se-NPs) as a storage element and hydrogenated amorphous carbon (a-C:H) as an insulating layer in two terminal non-volatile physically flexible and semi-transparent capacitive memory devices (2T-NMDs). Furthermore, a-C:H films can be deposited at very low temperature (memory on a flexible substrate. Moreover, the memory behaviour of the Se-NPs was found to be more distinct than those of the semiconductor and metal nanostructures due to higher work function compared to the commonly used semiconductor and metal species. The memory behaviour was observed from the hysteresis of current-voltage (I-V) measurements while the two distinguishable electrical conductivity states (;0; and "1") were studied by current-time (I-t) measurements.

  19. Controlled charge trapping by molybdenum disulphide and graphene in ultrathin heterostructured memory devices.

    Science.gov (United States)

    Choi, Min Sup; Lee, Gwan-Hyoung; Yu, Young-Jun; Lee, Dae-Yeong; Lee, Seung Hwan; Kim, Philip; Hone, James; Yoo, Won Jong

    2013-01-01

    Atomically thin two-dimensional materials have emerged as promising candidates for flexible and transparent electronic applications. Here we show non-volatile memory devices, based on field-effect transistors with large hysteresis, consisting entirely of stacked two-dimensional materials. Graphene and molybdenum disulphide were employed as both channel and charge-trapping layers, whereas hexagonal boron nitride was used as a tunnel barrier. In these ultrathin heterostructured memory devices, the atomically thin molybdenum disulphide or graphene-trapping layer stores charge tunnelled through hexagonal boron nitride, serving as a floating gate to control the charge transport in the graphene or molybdenum disulphide channel. By varying the thicknesses of two-dimensional materials and modifying the stacking order, the hysteresis and conductance polarity of the field-effect transistor can be controlled. These devices show high mobility, high on/off current ratio, large memory window and stable retention, providing a promising route towards flexible and transparent memory devices utilizing atomically thin two-dimensional materials.

  20. Semiconductor-based, large-area, flexible, electronic devices

    Science.gov (United States)

    Goyal, Amit [Knoxville, TN

    2011-03-15

    Novel articles and methods to fabricate the same resulting in flexible, large-area, triaxially textured, single-crystal or single-crystal-like, semiconductor-based, electronic devices are disclosed. Potential applications of resulting articles are in areas of photovoltaic devices, flat-panel displays, thermophotovoltaic devices, ferroelectric devices, light emitting diode devices, computer hard disc drive devices, magnetoresistance based devices, photoluminescence based devices, non-volatile memory devices, dielectric devices, thermoelectric devices and quantum dot laser devices.

  1. Homo-junction ferroelectric field-effect-transistor memory device using solution-processed lithium-doped zinc oxide thin films

    KAUST Repository

    Nayak, Pradipta K.

    2012-06-22

    High performance homo-junction field-effect transistor memory devices were prepared using solution processed transparent lithium-doped zinc oxide thin films for both the ferroelectric and semiconducting active layers. A highest field-effect mobility of 8.7 cm2/Vs was obtained along with an Ion/Ioff ratio of 106. The ferroelectric thin filmtransistors showed a low sub-threshold swing value of 0.19 V/dec and a significantly reduced device operating voltage (±4 V) compared to the reported hetero-junction ferroelectrictransistors, which is very promising for low-power non-volatile memory applications.

  2. Thermal investigation of a phase change memory device at the nanoscale

    International Nuclear Information System (INIS)

    Battaglia, Jean-Luc; De, Indrayush; Saci, Abdelhak; Kusiak, Andrzej; Sousa, Véronique

    2016-01-01

    New technologies in non-volatile memories have been developed for several years based on phase-change alloys out of which, the most known is the Ge 2 Sb 2 Te 5 . The thermal investigation of the microelectronics device at cell scale is relevant since the heat transfer is the main limiting aspect for the optimal functioning of the device. More particularly, the thermal resistance at interfaces between the constitutive materials is of primary importance. We implemented a scanning thermal microscopy experiment in the 3D mode that allowed to fully characterizing the thermal properties of the cell at the nanoscale. The results lead to understand the 3D heat diffusion in the cell and more particularly the role of the vertical and horizontal interfaces. (paper)

  3. Novel spintronics devices for memory and logic: prospects and challenges for room temperature all spin computing

    Science.gov (United States)

    Wang, Jian-Ping

    An energy efficient memory and logic device for the post-CMOS era has been the goal of a variety of research fields. The limits of scaling, which we expect to reach by the year 2025, demand that future advances in computational power will not be realized from ever-shrinking device sizes, but rather by innovative designs and new materials and physics. Magnetoresistive based devices have been a promising candidate for future integrated magnetic computation because of its unique non-volatility and functionalities. The application of perpendicular magnetic anisotropy for potential STT-RAM application was demonstrated and later has been intensively investigated by both academia and industry groups, but there is no clear path way how scaling will eventually work for both memory and logic applications. One of main reasons is that there is no demonstrated material stack candidate that could lead to a scaling scheme down to sub 10 nm. Another challenge for the usage of magnetoresistive based devices for logic application is its available switching speed and writing energy. Although a good progress has been made to demonstrate the fast switching of a thermally stable magnetic tunnel junction (MTJ) down to 165 ps, it is still several times slower than its CMOS counterpart. In this talk, I will review the recent progress by my research group and my C-SPIN colleagues, then discuss the opportunities, challenges and some potential path ways for magnetoresitive based devices for memory and logic applications and their integration for room temperature all spin computing system.

  4. Excellent resistive switching properties of atomic layer-deposited Al2O3/HfO2/Al2O3 trilayer structures for non-volatile memory applications.

    Science.gov (United States)

    Wang, Lai-Guo; Qian, Xu; Cao, Yan-Qiang; Cao, Zheng-Yi; Fang, Guo-Yong; Li, Ai-Dong; Wu, Di

    2015-01-01

    We have demonstrated a flexible resistive random access memory unit with trilayer structure by atomic layer deposition (ALD). The device unit is composed of Al2O3/HfO2/Al2O3-based functional stacks on TiN-coated Si substrate. The cross-sectional HRTEM image and XPS depth profile of Al2O3/HfO2/Al2O3 on TiN-coated Si confirm the existence of interfacial layers between trilayer structures of Al2O3/HfO2/Al2O3 after 600°C post-annealing. The memory units of Pt/Al2O3/HfO2/Al2O3/TiN/Si exhibit a typical bipolar, reliable, and reproducible resistive switching behavior, such as stable resistance ratio (>10) of OFF/ON states, sharp distribution of set and reset voltages, better switching endurance up to 10(3) cycles, and longer data retention at 85°C over 10 years. The possible switching mechanism of trilayer structure of Al2O3/HfO2/Al2O3 has been proposed. The trilayer structure device units of Al2O3/HfO2/Al2O3 on TiN-coated Si prepared by ALD may be a potential candidate for oxide-based resistive random access memory.

  5. Poly (vinylidene fluoride-trifluoroethylene)/barium titanate nanocomposite for ferroelectric nonvolatile memory devices

    International Nuclear Information System (INIS)

    Valiyaneerilakkal, Uvais; Varghese, Soney

    2013-01-01

    The effect of barium titanate (BaTiO 3 ) nanoparticles (particle size <100 nm) on the ferroelectric properties of poly (vinylidenefluoride-trifluoroethylene) P(VDF-TrFE) copolymer has been studied. Different concentrations of nanoparticles were added to P(VDF-TrFE) using probe sonication, and uniform thin films were made. Polarisation - Electric field (P-E) hysteresis analysis shows an increase in remnant polarization (P r ) and decrease in coercive voltage (V c ). Piezo-response force microscopy analysis shows the switching capability of the polymer composite. The topography and surface roughness was studied using atomic force microscopy. It has been observed that this nanocomposite can be used for the fabrication of non-volatile ferroelectric memory devices.

  6. Poly (vinylidene fluoride-trifluoroethylene/barium titanate nanocomposite for ferroelectric nonvolatile memory devices

    Directory of Open Access Journals (Sweden)

    Uvais Valiyaneerilakkal

    2013-04-01

    Full Text Available The effect of barium titanate (BaTiO3 nanoparticles (particle size <100nm on the ferroelectric properties of poly (vinylidenefluoride-trifluoroethylene P(VDF-TrFE copolymer has been studied. Different concentrations of nanoparticles were added to P(VDF-TrFE using probe sonication, and uniform thin films were made. Polarisation - Electric field (P-E hysteresis analysis shows an increase in remnant polarization (Pr and decrease in coercive voltage (Vc. Piezo-response force microscopy analysis shows the switching capability of the polymer composite. The topography and surface roughness was studied using atomic force microscopy. It has been observed that this nanocomposite can be used for the fabrication of non-volatile ferroelectric memory devices.

  7. All-magnetic magnetoresistive random access memory based on four terminal mCell device

    Science.gov (United States)

    Bromberg, D. M.; Sumbul, H. E.; Zhu, J.-G.; Pileggi, L.

    2015-05-01

    Magnetoresistive random access memory (MRAM) is a promising candidate to enable fast, non-volatile storage on chip. In this paper, we present an MRAM design where each bitcell is comprised entirely of four-terminal magnetic devices ("mCells") with no CMOS access transistors. We show that this design can achieve significant energy and area savings compared to the standard one transistor-one magnetic tunnel junction (1T1MTJ) bitcell based design. We estimate a write energy of ≈5 fJ/bit based on bitline and wordline voltages that operate at less than 100 mV with projected area smaller than that possible with aggressively scaled 10 nm node FinFETs in the 1T1MTJ design.

  8. Semiconductor-based, large-area, flexible, electronic devices on {110} oriented substrates

    Science.gov (United States)

    Goyal, Amit

    2014-08-05

    Novel articles and methods to fabricate the same resulting in flexible, oriented, semiconductor-based, electronic devices on {110} textured substrates are disclosed. Potential applications of resulting articles are in areas of photovoltaic devices, flat-panel displays, thermophotovoltaic devices, ferroelectric devices, light emitting diode devices, computer hard disc drive devices, magnetoresistance based devices, photoluminescence based devices, non-volatile memory devices, dielectric devices, thermoelectric devices and quantum dot laser devices.

  9. [100] or [110] aligned, semiconductor-based, large-area, flexible, electronic devices

    Science.gov (United States)

    Goyal, Amit

    2015-03-24

    Novel articles and methods to fabricate the same resulting in flexible, large-area, [100] or [110] textured, semiconductor-based, electronic devices are disclosed. Potential applications of resulting articles are in areas of photovoltaic devices, flat-panel displays, thermophotovoltaic devices, ferroelectric devices, light emitting diode devices, computer hard disc drive devices, magnetoresistance based devices, photoluminescence based devices, non-volatile memory devices, dielectric devices, thermoelectric devices and quantum dot laser devices.

  10. {100} or 45.degree.-rotated {100}, semiconductor-based, large-area, flexible, electronic devices

    Science.gov (United States)

    Goyal, Amit [Knoxville, TN

    2012-05-15

    Novel articles and methods to fabricate the same resulting in flexible, {100} or 45.degree.-rotated {100} oriented, semiconductor-based, electronic devices are disclosed. Potential applications of resulting articles are in areas of photovoltaic devices, flat-panel displays, thermophotovoltaic devices, ferroelectric devices, light emitting diode devices, computer hard disc drive devices, magnetoresistance based devices, photoluminescence based devices, non-volatile memory devices, dielectric devices, thermoelectric devices and quantum dot laser devices.

  11. Exploring Spin-transfer-torque devices and memristors for logic and memory applications

    Science.gov (United States)

    Pajouhi, Zoha

    As scaling CMOS devices is approaching its physical limits, researchers have begun exploring newer devices and architectures to replace CMOS. Due to their non-volatility and high density, Spin Transfer Torque (STT) devices are among the most prominent candidates for logic and memory applications. In this research, we first considered a new logic style called All Spin Logic (ASL). Despite its advantages, ASL consumes a large amount of static power; thus, several optimizations can be performed to address this issue. We developed a systematic methodology to perform the optimizations to ensure stable operation of ASL. Second, we investigated reliable design of STT-MRAM bit-cells and addressed the conflicting read and write requirements, which results in overdesign of the bit-cells. Further, a Device/Circuit/Architecture co-design framework was developed to optimize the STT-MRAM devices by exploring the design space through jointly considering yield enhancement techniques at different levels of abstraction. Recent advancements in the development of memristive devices have opened new opportunities for hardware implementation of non-Boolean computing. To this end, the suitability of memristive devices for swarm intelligence algorithms has enabled researchers to solve a maze in hardware. In this research, we utilized swarm intelligence of memristive networks to perform image edge detection. First, we proposed a hardware-friendly algorithm for image edge detection based on ant colony. Next, we designed the image edge detection algorithm using memristive networks.

  12. An error-resilient non-volatile magneto-elastic universal logic gate with ultralow energy-delay product.

    Science.gov (United States)

    Biswas, Ayan K; Atulasimha, Jayasimha; Bandyopadhyay, Supriyo

    2014-12-23

    A long-standing goal of computer technology is to process and store digital information with the same device in order to implement new architectures. One way to accomplish this is to use nanomagnetic logic gates that can perform Boolean operations and then store the output data in the magnetization states of nanomagnets, thereby doubling as both logic and memory. Unfortunately, many of these nanomagnetic devices do not possess the seven essential characteristics of a Boolean logic gate : concatenability, non-linearity, isolation between input and output, gain, universal logic implementation, scalability and error resilience. More importantly, their energy-delay products and error rates tend to vastly exceed that of conventional transistor-based logic gates, which is unacceptable. Here, we propose a non-volatile voltage-controlled nanomagnetic logic gate that possesses all the necessary characteristics of a logic gate and whose energy-delay product is two orders of magnitude less than that of other nanomagnetic (non-volatile) logic gates. The error rate is also superior.

  13. PIYAS-Proceeding to Intelligent Service Oriented Memory Allocation for Flash Based Data Centric Sensor Devices in Wireless Sensor Networks

    Directory of Open Access Journals (Sweden)

    Sanam Shahla Rizvi

    2009-12-01

    Full Text Available Flash memory has become a more widespread storage medium for modern wireless devices because of its effective characteristics like non-volatility, small size, light weight, fast access speed, shock resistance, high reliability and low power consumption. Sensor nodes are highly resource constrained in terms of limited processing speed, runtime memory, persistent storage, communication bandwidth and finite energy. Therefore, for wireless sensor networks supporting sense, store, merge and send schemes, an efficient and reliable file system is highly required with consideration of sensor node constraints. In this paper, we propose a novel log structured external NAND flash memory based file system, called Proceeding to Intelligent service oriented memorY Allocation for flash based data centric Sensor devices in wireless sensor networks (PIYAS. This is the extended version of our previously proposed PIYA [1]. The main goals of the PIYAS scheme are to achieve instant mounting and reduced SRAM space by keeping memory mapping information to a very low size of and to provide high query response throughput by allocation of memory to the sensor data by network business rules. The scheme intelligently samples and stores the raw data and provides high in-network data availability by keeping the aggregate data for a longer period of time than any other scheme has done before. We propose effective garbage collection and wear-leveling schemes as well. The experimental results show that PIYAS is an optimized memory management scheme allowing high performance for wireless sensor networks.

  14. Carbon nanotube network-silicon oxide non-volatile switches.

    Science.gov (United States)

    Liao, Albert D; Araujo, Paulo T; Xu, Runjie; Dresselhaus, Mildred S

    2014-12-08

    The integration of carbon nanotubes with silicon is important for their incorporation into next-generation nano-electronics. Here we demonstrate a non-volatile switch that utilizes carbon nanotube networks to electrically contact a conductive nanocrystal silicon filament in silicon dioxide. We form this device by biasing a nanotube network until it physically breaks in vacuum, creating the conductive silicon filament connected across a small nano-gap. From Raman spectroscopy, we observe coalescence of nanotubes during breakdown, which stabilizes the system to form very small gaps in the network~15 nm. We report that carbon nanotubes themselves are involved in switching the device to a high resistive state. Calculations reveal that this switching event occurs at ~600 °C, the temperature associated with the oxidation of nanotubes. Therefore, we propose that, in switching to a resistive state, the nanotube oxidizes by extracting oxygen from the substrate.

  15. Application of nanomaterials in two-terminal resistive-switching memory devices

    Directory of Open Access Journals (Sweden)

    Jianyong Ouyang

    2010-05-01

    Full Text Available Nanometer materials have been attracting strong attention due to their interesting structure and properties. Many important practical applications have been demonstrated for nanometer materials based on their unique properties. This article provides a review on the fabrication, electrical characterization, and memory application of two-terminal resistive-switching devices using nanomaterials as the active components, including metal and semiconductor nanoparticles (NPs, nanotubes, nanowires, and graphenes. There are mainly two types of device architectures for the two-terminal devices with NPs. One has a triple-layer structure with a metal film sandwiched between two organic semiconductor layers, and the other has a single polymer film blended with NPs. These devices can be electrically switched between two states with significant different resistances, i.e. the ‘ON’ and ‘OFF’ states. These render the devices important application as two-terminal non-volatile memory devices. The electrical behavior of these devices can be affected by the materials in the active layer and the electrodes. Though the mechanism for the electrical switches has been in argument, it is generally believed that the resistive switches are related to charge storage on the NPs. Resistive switches were also observed on crossbars formed by nanotubes, nanowires, and graphene ribbons. The resistive switches are due to nanoelectromechanical behavior of the materials. The Coulombic interaction of transient charges on the nanomaterials affects the configurable gap of the crossbars, which results into significant change in current through the crossbars. These nanoelectromechanical devices can be used as fast-response and high-density memory devices as well. Dr. Jianyong Ouyang received his bachelor degree from the Tsinghua University in Beijing, China, and MSc from the Institute of Chemistry, Chinese Academy of Science. He received his PhD from the Institute for Molecular

  16. Large non-volatile tuning of magnetism mediated by electric field in Fe–Al/Pb(Mg1/3Nb2/3)O3–PbTiO3 heterostructure

    International Nuclear Information System (INIS)

    Chen, Zhendong; Gao, Cunxu; Wei, Yanping; Zhang, Peng; Wang, Yutian; Zhang, Chao; Ma, Zhikun

    2017-01-01

    Electric-field control of magnetism is now an attractive trend to approach a new kind of fast, low-power-cost memory device. In this work, we report a strong non-volatile electric control of magnetism in an Fe–Al/Pb(Mg 1/3 Nb 2/3 )O 3 –PbTiO 3 heterostructure. In this system, a 90° rotation of the in-plane uniaxial magnetic anisotropy is exhibited during the increase of the external electric field, which means the easy axis turns into a hard axis and the hard axis turns into an easy one. Additionally, a non-volatile switch of the remanence is observed after a sweeping of the electric field from 0 kV cm −1 to  ±  10 kV cm −1 , then back to 0 kV cm −1 . More interestingly, a 20% non-volatile magnetic state tuning driven by individual pulse electric fields is shown in contrast to large tuning up to 120% caused by pulse electric fields with small assistant pulse magnetic fields, which means a 180° reverse of the magnetization. These remarkable behaviors demonstrated in this heterostructure reveal a promising potential application in magnetic memory devices mediated by electric fields. (paper)

  17. Memory and Spin Injection Devices Involving Half Metals

    Directory of Open Access Journals (Sweden)

    M. Shaughnessy

    2011-01-01

    Full Text Available We suggest memory and spin injection devices fabricated with half-metallic materials and based on the anomalous Hall effect. Schematic diagrams of the memory chips, in thin film and bulk crystal form, are presented. Spin injection devices made in thin film form are also suggested. These devices do not need any external magnetic field but make use of their own magnetization. Only a gate voltage is needed. The carriers are 100% spin polarized. Memory devices may potentially be smaller, faster, and less volatile than existing ones, and the injection devices may be much smaller and more efficient than existing spin injection devices.

  18. High-performance and low-power rewritable SiOx 1 kbit one diode-one resistor crossbar memory array.

    Science.gov (United States)

    Wang, Gunuk; Lauchner, Adam C; Lin, Jian; Natelson, Douglas; Palem, Krishna V; Tour, James M

    2013-09-14

    An entire 1-kilobit crossbar device based upon SiOx resistive memories with integrated diodes has been made. The SiOx -based one diode-one resistor device system has promise to satisfy the prerequisite conditions for next generation non-volatile memory applications. Copyright © 2013 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  19. An ultrafast programmable electrical tester for enabling time-resolved, sub-nanosecond switching dynamics and programming of nanoscale memory devices

    Science.gov (United States)

    Shukla, Krishna Dayal; Saxena, Nishant; Manivannan, Anbarasu

    2017-12-01

    Recent advancements in commercialization of high-speed non-volatile electronic memories including phase change memory (PCM) have shown potential not only for advanced data storage but also for novel computing concepts. However, an in-depth understanding on ultrafast electrical switching dynamics is a key challenge for defining the ultimate speed of nanoscale memory devices that demands for an unconventional electrical setup, specifically capable of handling extremely fast electrical pulses. In the present work, an ultrafast programmable electrical tester (PET) setup has been developed exceptionally for unravelling time-resolved electrical switching dynamics and programming characteristics of nanoscale memory devices at the picosecond (ps) time scale. This setup consists of novel high-frequency contact-boards carefully designed to capture extremely fast switching transient characteristics within 200 ± 25 ps using time-resolved current-voltage measurements. All the instruments in the system are synchronized using LabVIEW, which helps to achieve various programming characteristics such as voltage-dependent transient parameters, read/write operations, and endurance test of memory devices systematically using short voltage pulses having pulse parameters varied from 1 ns rise/fall time and 1.5 ns pulse width (full width half maximum). Furthermore, the setup has successfully demonstrated strikingly one order faster switching characteristics of Ag5In5Sb60Te30 (AIST) PCM devices within 250 ps. Hence, this novel electrical setup would be immensely helpful for realizing the ultimate speed limits of various high-speed memory technologies for future computing.

  20. Conductive bridge random access memory characteristics of SiCN based transparent device due to indium diffusion

    Science.gov (United States)

    Kumar, Dayanand; Aluguri, Rakesh; Chand, Umesh; Tseng, Tseung-Yuen

    2018-03-01

    In this work, the transparent bipolar resistive switching characteristics of a SiCN-based ITO/SiCN/AZO structure due to In diffusion from ITO is studied. The SiCN based device is found to be 80% transparent in the visible wavelength region. This device, with AZO as both top and bottom electrodes, does not show any RRAM property due to deposition of the high quality O2-free SiCN film. Replacing the AZO top electrode with ITO in this device results in good resistive switching (RS) characteristics with a high on/off ratio and long retention. Replacing the SiCN film with ZrO2 also results in excellent RS characteristics due to the formation of an oxygen vacancies filament inside the ZrO2 film. A resistance ratio of on/off is found to be higher in the SiCN based device compared to that of the ZrO2 device. Diffusion of In from ITO into the SiCN film on application of high positive voltage during forming can be attributed to the occurrence of RS in the device, which is confirmed by the analyses of energy dispersive spectroscopy and secondary-ion mass spectrometry. This study shows a pathway for the fabrication of CBRAM based transparent devices for non-volatile memory application.

  1. A study on electromechanical carbon nanotube memory devices

    International Nuclear Information System (INIS)

    Kang, Jeong Won; Hwang, Ho Jung

    2005-01-01

    Electromechanical operations of carbon-nanotube (CNT) bridge memory device were investigated by using atomistic simulations based on empirical potentials. The nanotube-bridge memory device was operated by the electrostatic and the van der Waals forces acting on the nanotube-bridge. For the CNT bridge memory device, the van der Waals interactions between the CNT bridge and the oxide were very important. As the distance between the CNT bridge and the oxide decreased and the van der Waals interaction energy increased, the pull-in bias of the CNT-bridge decreased and the nonvolatility of the nanotube-bridge memory device increased, while the pull-out voltages increased. When the materials composed of the oxide film are different, since the van der Waals interactions must be also different, the oxide materials must be carefully selected for the CNT-bridge memory device to work as a nonvolatile memory.

  2. Phase change memory

    CERN Document Server

    Qureshi, Moinuddin K

    2011-01-01

    As conventional memory technologies such as DRAM and Flash run into scaling challenges, architects and system designers are forced to look at alternative technologies for building future computer systems. This synthesis lecture begins by listing the requirements for a next generation memory technology and briefly surveys the landscape of novel non-volatile memories. Among these, Phase Change Memory (PCM) is emerging as a leading contender, and the authors discuss the material, device, and circuit advances underlying this exciting technology. The lecture then describes architectural solutions t

  3. Microwave impedance imaging on semiconductor memory devices

    Science.gov (United States)

    Kundhikanjana, Worasom; Lai, Keji; Yang, Yongliang; Kelly, Michael; Shen, Zhi-Xun

    2011-03-01

    Microwave impedance microscopy (MIM) maps out the real and imaginary components of the tip-sample impedance, from which the local conductivity and dielectric constant distribution can be derived. The stray field contribution is minimized in our shielded cantilever design, enabling quantitative analysis of nano-materials and device structures. We demonstrate here that the MIM can spatially resolve the conductivity variation in a dynamic random access memory (DRAM) sample. With DC or low-frequency AC bias applied to the tip, contrast between n-doped and p-doped regions in the dC/dV images is observed, and p-n junctions are highlighted in the dR/dV images. The results can be directly compared with data taken by scanning capacitance microscope (SCM), which uses unshielded cantilevers and resonant electronics, and the MIM reveals more information of the local dopant concentration than SCM.

  4. Non-volatile MOS RAM cell with capacitor-isolated nodes that are radiation accessible for rendering a non-permanent programmed information in the cell of a non-volatile one

    NARCIS (Netherlands)

    Widdershoven, Franciscus P.; Annema, Anne J.; Storms, Maurits M.N.; Pelgrom, Marcellinus J.M.; Pelgrom, Marcel J M

    2001-01-01

    A non-volatile, random access memory cell comprises first and second inverters each having an output node cross-coupled by cross-coupling means to an input node of the other inverter for forming a MOS RAM cell. The output node of each inverter is selectively connected via the conductor paths of

  5. Comparative study of CNT, silicon nanowire and fullerene embedded multilayer high-k gate dielectric MOS memory devices

    Energy Technology Data Exchange (ETDEWEB)

    Sengupta, Amretashis; Sarkar, Chandan Kumar [Department of Electronics and Telecommunication Engineering, Jadavpur University, Kolkata-700 032 (India); Requejo, Felix G, E-mail: amretashis@gmail.com [INIFTA, Departmento de Quimica and Departmento de Fisica, Facultad de Ciencias Exactas, Universidad Nacional de La Plata, CC/67-1900, La Plata (Argentina)

    2011-10-12

    Here, we present a comparative theoretical study on stacked (multilayer) gate dielectric MOS memory devices, having a metallic/semiconducting carbon nanotube (CNT), silicon nanowire (Si NW) and fullerene (C60) embedded nitride layer acting as a floating gate. Two types of devices, one with HfO{sub 2}-SiO{sub 2} stack (stack-1) and the other with La{sub 2}O{sub 3}-SiO{sub 2} stack (stack-2) as the tunnel oxide were compared. We evaluated the effective barrier height, the dielectric constant and the effective electron mobility in the composite gate dielectric with the Maxwell-Garnett effective medium theory. Thereafter applying the WKB approximation, we simulated the Fowler-Nordheim (F-N) tunnelling/writing current and the direct tunnelling/leakage current in these devices. We evaluated the I-V characteristics, the charge decay and also the impact of CNT/Si NW aspect ratio and the volume fraction on the effective barrier height and the write voltage, respectively. We also simulated the write time, retention time and the erase time of these MOS devices. Based on the simulation results, it was concluded that the metallic CNT embedded stack-1 device offered the best performance in terms of higher F-N tunnelling current, lower direct tunnelling current and lesser write voltage and write time compared with the other devices. In case of direct tunnelling leakage and retention time it was found that the met CNT embedded stack-2 device showed better characteristics. For erasing, however, the C60 embedded stack-1 device showed the smallest erase time. When compared with earlier reports, it was seen that CNT, C60 and Si NW embedded devices all performed better than nanocrystalline Si embedded MOS non-volatile memories.

  6. Comparative study of CNT, silicon nanowire and fullerene embedded multilayer high-k gate dielectric MOS memory devices

    Science.gov (United States)

    Sengupta, Amretashis; Sarkar, Chandan Kumar; Requejo, Felix G.

    2011-10-01

    Here, we present a comparative theoretical study on stacked (multilayer) gate dielectric MOS memory devices, having a metallic/semiconducting carbon nanotube (CNT), silicon nanowire (Si NW) and fullerene (C60) embedded nitride layer acting as a floating gate. Two types of devices, one with HfO2-SiO2 stack (stack-1) and the other with La2O3-SiO2 stack (stack-2) as the tunnel oxide were compared. We evaluated the effective barrier height, the dielectric constant and the effective electron mobility in the composite gate dielectric with the Maxwell-Garnett effective medium theory. Thereafter applying the WKB approximation, we simulated the Fowler-Nordheim (F-N) tunnelling/writing current and the direct tunnelling/leakage current in these devices. We evaluated the I-V characteristics, the charge decay and also the impact of CNT/Si NW aspect ratio and the volume fraction on the effective barrier height and the write voltage, respectively. We also simulated the write time, retention time and the erase time of these MOS devices. Based on the simulation results, it was concluded that the metallic CNT embedded stack-1 device offered the best performance in terms of higher F-N tunnelling current, lower direct tunnelling current and lesser write voltage and write time compared with the other devices. In case of direct tunnelling leakage and retention time it was found that the met CNT embedded stack-2 device showed better characteristics. For erasing, however, the C60 embedded stack-1 device showed the smallest erase time. When compared with earlier reports, it was seen that CNT, C60 and Si NW embedded devices all performed better than nanocrystalline Si embedded MOS non-volatile memories.

  7. Next generation spin torque memories

    CERN Document Server

    Kaushik, Brajesh Kumar; Kulkarni, Anant Aravind; Prajapati, Sanjay

    2017-01-01

    This book offers detailed insights into spin transfer torque (STT) based devices, circuits and memories. Starting with the basic concepts and device physics, it then addresses advanced STT applications and discusses the outlook for this cutting-edge technology. It also describes the architectures, performance parameters, fabrication, and the prospects of STT based devices. Further, moving from the device to the system perspective it presents a non-volatile computing architecture composed of STT based magneto-resistive and all-spin logic devices and demonstrates that efficient STT based magneto-resistive and all-spin logic devices can turn the dream of instant on/off non-volatile computing into reality.

  8. Radiation Damage in Electronic Memory Devices

    OpenAIRE

    Fetahović, Irfan; Pejović, Milić; Vujisić, Miloš

    2013-01-01

    This paper investigates the behavior of semiconductor memories exposed to radiation in order to establish their applicability in a radiation environment. The experimental procedure has been used to test radiation hardness of commercial semiconductor memories. Different types of memory chips have been exposed to indirect ionizing radiation by changing radiation dose intensity. The effect of direct ionizing radiation on semiconductor memory behavior has been analyzed by using Monte Carlo simula...

  9. Transistor and memory devices based on novel organic and biomaterials

    Science.gov (United States)

    Tseng, Jia-Hung

    Organic semiconductor devices have aroused considerable interest because of the enormous potential in many technological applications. Organic electroluminescent devices have been extensively applied in display technology. Rapid progress has also been made in transistor and memory devices. This thesis considers aspects of the transistor based on novel organic single crystals and memory devices using hybrid nanocomposites comprising polymeric/inorganic nanoparticles, and biomolecule/quantum dots. Organic single crystals represent highly ordered structures with much less imperfections compared to amorphous thin films for probing the intrinsic charge transport in transistor devices. We demonstrate that free-standing, thin organic single crystals with natural flexing ability can be fabricated as flexible transistors. We study the surface properties of the organic crystals to determine a nearly perfect surface leading to high performance transistors. The flexible transistors can maintain high performance under reversible bending conditions. Because of the high quality crystal technique, we further develop applications on organic complementary circuits and organic single crystal photovoltaics. In the second part, two aspects of memory devices are studied. We examine the charge transfer process between conjugated polymers and metal nanoparticles. This charge transfer process is essential for the conductance switching in nanoseconds to induce the memory effect. Under the reduction condition, the charge transfer process is eliminated as well as the memory effect, raising the importance of coupling between conjugated systems and nanoparticle accepters. The other aspect of memory devices focuses on the interaction of virus biomolecules with quantum dots or metal nanoparticles in the devices. We investigate the impact of memory function on the hybrid bio-inorganic system. We perform an experimental analysis of the charge storage activation energy in tobacco mosaic virus with

  10. Memory-assisted measurement-device-independent quantum key distribution

    Science.gov (United States)

    Panayi, Christiana; Razavi, Mohsen; Ma, Xiongfeng; Lütkenhaus, Norbert

    2014-04-01

    A protocol with the potential of beating the existing distance records for conventional quantum key distribution (QKD) systems is proposed. It borrows ideas from quantum repeaters by using memories in the middle of the link, and that of measurement-device-independent QKD, which only requires optical source equipment at the user's end. For certain memories with short access times, our scheme allows a higher repetition rate than that of quantum repeaters with single-mode memories, thereby requiring lower coherence times. By accounting for various sources of nonideality, such as memory decoherence, dark counts, misalignment errors, and background noise, as well as timing issues with memories, we develop a mathematical framework within which we can compare QKD systems with and without memories. In particular, we show that with the state-of-the-art technology for quantum memories, it is potentially possible to devise memory-assisted QKD systems that, at certain distances of practical interest, outperform current QKD implementations.

  11. Energy-Efficient Streaming Using Non-volatile Memory

    NARCIS (Netherlands)

    Khatib, M.G.; Hartel, Pieter H.; van Dijk, H.W.

    The disk and the DRAM in a typical mobile system consume a significant fraction (up to 30%) of the total system energy. To save on storage energy, the DRAM should be small and the disk should be spun down for long periods of time. We show that this can be achieved for predominantly streaming

  12. Electrostatically telescoping nanotube nonvolatile memory device

    International Nuclear Information System (INIS)

    Kang, Jeong Won; Jiang Qing

    2007-01-01

    We propose a nonvolatile memory based on carbon nanotubes (CNTs) serving as the key building blocks for molecular-scale computers and investigate the dynamic operations of a double-walled CNT memory element by classical molecular dynamics simulations. The localized potential energy wells achieved from both the interwall van der Waals energy and CNT-metal binding energy make the bistability of the CNT positions and the electrostatic attractive forces induced by the voltage differences lead to the reversibility of this CNT memory. The material for the electrodes should be carefully chosen to achieve the nonvolatility of this memory. The kinetic energy of the CNT shuttle experiences several rebounds induced by the collisions of the CNT onto the metal electrodes, and this is critically important to the performance of such an electrostatically telescoping CNT memory because the collision time is sufficiently long to cause a delay of the state transition

  13. Radiation Damage in Electronic Memory Devices

    Directory of Open Access Journals (Sweden)

    Irfan Fetahović

    2013-01-01

    Full Text Available This paper investigates the behavior of semiconductor memories exposed to radiation in order to establish their applicability in a radiation environment. The experimental procedure has been used to test radiation hardness of commercial semiconductor memories. Different types of memory chips have been exposed to indirect ionizing radiation by changing radiation dose intensity. The effect of direct ionizing radiation on semiconductor memory behavior has been analyzed by using Monte Carlo simulation method. Obtained results show that gamma radiation causes decrease in threshold voltage, being proportional to the absorbed dose of radiation. Monte Carlo simulations of radiation interaction with material proved to be significant and can be a good estimation tool in probing semiconductor memory behavior in radiation environment.

  14. Quantum tunnelling and charge accumulation in organic ferroelectric memory diodes

    Science.gov (United States)

    Ghittorelli, Matteo; Lenz, Thomas; Sharifi Dehsari, Hamed; Zhao, Dong; Asadi, Kamal; Blom, Paul W. M.; Kovács-Vajna, Zsolt M.; de Leeuw, Dago M.; Torricelli, Fabrizio

    2017-06-01

    Non-volatile memories--providing the information storage functionality--are crucial circuit components. Solution-processed organic ferroelectric memory diodes are the non-volatile memory candidate for flexible electronics, as witnessed by the industrial demonstration of a 1 kbit reconfigurable memory fabricated on a plastic foil. Further progress, however, is limited owing to the lack of understanding of the device physics, which is required for the technological implementation of high-density arrays. Here we show that ferroelectric diodes operate as vertical field-effect transistors at the pinch-off. The tunnelling injection and charge accumulation are the fundamental mechanisms governing the device operation. Surprisingly, thermionic emission can be disregarded and the on-state current is not space charge limited. The proposed model explains and unifies a wide range of experiments, provides important design rules for the implementation of organic ferroelectric memory diodes and predicts an ultimate theoretical array density of up to 1012 bit cm-2.

  15. 3D Printed Photoresponsive Devices Based on Shape Memory Composites.

    Science.gov (United States)

    Yang, Hui; Leow, Wan Ru; Wang, Ting; Wang, Juan; Yu, Jiancan; He, Ke; Qi, Dianpeng; Wan, Changjin; Chen, Xiaodong

    2017-09-01

    Compared with traditional stimuli-responsive devices with simple planar or tubular geometries, 3D printed stimuli-responsive devices not only intimately meet the requirement of complicated shapes at macrolevel but also satisfy various conformation changes triggered by external stimuli at the microscopic scale. However, their development is limited by the lack of 3D printing functional materials. This paper demonstrates the 3D printing of photoresponsive shape memory devices through combining fused deposition modeling printing technology and photoresponsive shape memory composites based on shape memory polymers and carbon black with high photothermal conversion efficiency. External illumination triggers the shape recovery of 3D printed devices from the temporary shape to the original shape. The effect of materials thickness and light density on the shape memory behavior of 3D printed devices is quantified and calculated. Remarkably, sunlight also triggers the shape memory behavior of these 3D printed devices. This facile printing strategy would provide tremendous opportunities for the design and fabrication of biomimetic smart devices and soft robotics. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  16. One bipolar transistor selector - One resistive random access memory device for cross bar memory array

    Directory of Open Access Journals (Sweden)

    R. Aluguri

    2017-09-01

    Full Text Available A bipolar transistor selector was connected in series with a resistive switching memory device to study its memory characteristics for its application in cross bar array memory. The metal oxide based p-n-p bipolar transistor selector indicated good selectivity of about 104 with high retention and long endurance showing its usefulness in cross bar RRAM devices. Zener tunneling is found to be the main conduction phenomena for obtaining high selectivity. 1BT-1R device demonstrated good memory characteristics with non-linearity of 2 orders, selectivity of about 2 orders and long retention characteristics of more than 105 sec. One bit-line pull-up scheme shows that a 650 kb cross bar array made with this 1BT1R devices works well with more than 10 % read margin proving its ability in future memory technology application.

  17. One bipolar transistor selector - One resistive random access memory device for cross bar memory array

    Science.gov (United States)

    Aluguri, R.; Kumar, D.; Simanjuntak, F. M.; Tseng, T.-Y.

    2017-09-01

    A bipolar transistor selector was connected in series with a resistive switching memory device to study its memory characteristics for its application in cross bar array memory. The metal oxide based p-n-p bipolar transistor selector indicated good selectivity of about 104 with high retention and long endurance showing its usefulness in cross bar RRAM devices. Zener tunneling is found to be the main conduction phenomena for obtaining high selectivity. 1BT-1R device demonstrated good memory characteristics with non-linearity of 2 orders, selectivity of about 2 orders and long retention characteristics of more than 105 sec. One bit-line pull-up scheme shows that a 650 kb cross bar array made with this 1BT1R devices works well with more than 10 % read margin proving its ability in future memory technology application.

  18. High Density Memory Based on Quantum Device Technology

    Science.gov (United States)

    vanderWagt, Paul; Frazier, Gary; Tang, Hao

    1995-01-01

    We explore the feasibility of ultra-high density memory based on quantum devices. Starting from overall constraints on chip area, power consumption, access speed, and noise margin, we deduce boundaries on single cell parameters such as required operating voltage and standby current. Next, the possible role of quantum devices is examined. Since the most mature quantum device, the resonant tunneling diode (RTD) can easily be integrated vertically, it naturally leads to the issue of 3D integrated memory. We propose a novel method of addressing vertically integrated bistable two-terminal devices, such as resonant tunneling diodes (RTD) and Esaki diodes, that avoids individual physical contacts. The new concept has been demonstrated experimentally in memory cells of field effect transistors (FET's) and stacked RTD's.

  19. An UV photochromic memory effect in proton-based WO3 electrochromic devices

    International Nuclear Information System (INIS)

    Zhang Yong; Lee, S.-H.; Mascarenhas, A.; Deb, S. K.

    2008-01-01

    We report an UV photochromic memory effect on a standard proton-based WO 3 electrochromic device. It exhibits two memory states, associated with the colored and bleached states of the device, respectively. Such an effect can be used to enhance device performance (increasing the dynamic range), re-energize commercial electrochromic devices, and develop memory devices

  20. An UV photochromic memory effect in proton-based WO3 electrochromic devices

    Science.gov (United States)

    Zhang, Yong; Lee, S.-H.; Mascarenhas, A.; Deb, S. K.

    2008-11-01

    We report an UV photochromic memory effect on a standard proton-based WO3 electrochromic device. It exhibits two memory states, associated with the colored and bleached states of the device, respectively. Such an effect can be used to enhance device performance (increasing the dynamic range), re-energize commercial electrochromic devices, and develop memory devices.

  1. A Technique for Improving Lifetime of Non-Volatile Caches Using Write-Minimization

    Directory of Open Access Journals (Sweden)

    Sparsh Mittal

    2016-01-01

    Full Text Available While non-volatile memories (NVMs provide high-density and low-leakage, they also have low write-endurance. This, along with the write-variation introduced by the cache management policies, can lead to very small cache lifetime. In this paper, we propose ENLIVE, a technique for ENhancing the LIfetime of non-Volatile cachEs. Our technique uses a small SRAM (static random access memory storage, called HotStore. ENLIVE detects frequently written blocks and transfers them to the HotStore so that they can be accessed with smaller latency and energy. This also reduces the number of writes to the NVM cache which improves its lifetime. We present microarchitectural schemes for managing the HotStore. Simulations have been performed using an x86-64 simulator and benchmarks from SPEC2006 suite. We observe that ENLIVE provides higher improvement in lifetime and better performance and energy efficiency than two state-of-the-art techniques for improving NVM cache lifetime. ENLIVE provides 8.47×, 14.67× and 15.79× improvement in lifetime or two, four and eight core systems, respectively. In addition, it works well for a range of system and algorithm parameters and incurs only small overhead.

  2. A Nonvolatile MOSFET Memory Device Based on Mobile Protons in SiO(2) Thin Films

    Energy Technology Data Exchange (ETDEWEB)

    Vanheusden, K.; Warren, W.L.; Devine, R.A.B.; Fleetwood, D.M.; Draper, B.L.; Schwank, J.R.

    1999-03-02

    It is shown how mobile H{sup +} ions can be generated thermally inside the oxide layer of Si/SiO{sub 2}/Si structures. The technique involves only standard silicon processing steps: the nonvolatile field effect transistor (NVFET) is based on a standard MOSFET with thermally grown SiO{sub 2} capped with a poly-silicon layer. The capped thermal oxide receives an anneal at {approximately}1100 C that enables the incorporation of the mobile protons into the gate oxide. The introduction of the protons is achieved by a subsequent 500-800 C anneal in a hydrogen-containing ambient, such as forming gas (N{sub 2}:H{sub 2} 95:5). The mobile protons are stable and entrapped inside the oxide layer, and unlike alkali ions, their space-charge distribution can be controlled and rapidly rearranged at room temperature by an applied electric field. Using this principle, a standard MOS transistor can be converted into a nonvolatile memory transistor that can be switched between normally on and normally off. Switching speed, retention, endurance, and radiation tolerance data are presented showing that this non-volatile memory technology can be competitive with existing Si-based non-volatile memory technologies such as the floating gate technologies (e.g. Flash memory).

  3. EqualChance: Addressing Intra-set Write Variation to Increase Lifetime of Non-volatile Caches

    Energy Technology Data Exchange (ETDEWEB)

    Mittal, Sparsh [ORNL; Vetter, Jeffrey S [ORNL

    2014-01-01

    To address the limitations of SRAM such as high-leakage and low-density, researchers have explored use of non-volatile memory (NVM) devices, such as ReRAM (resistive RAM) and STT-RAM (spin transfer torque RAM) for designing on-chip caches. A crucial limitation of NVMs, however, is that their write endurance is low and the large intra-set write variation introduced by existing cache management policies may further exacerbate this problem, thereby reducing the cache lifetime significantly. We present EqualChance, a technique to increase cache lifetime by reducing intra-set write variation. EqualChance works by periodically changing the physical cache-block location of a write-intensive data item within a set to achieve wear-leveling. Simulations using workloads from SPEC CPU2006 suite and HPC (high-performance computing) field show that EqualChance improves the cache lifetime by 4.29X. Also, its implementation overhead is small, and it incurs very small performance and energy loss.

  4. Fabrication and properties of nanoscale multiferroic heterostructures for application in magneto-electric random access memory (MERAM) devices

    Science.gov (United States)

    Kim, Gunwoo

    Magnetoelectric random access memory (MERAM) has emerged as a promising new class of non-volatile solid-state memory device. It offers nondestructive reading along with low power consumption during the write operation. A common implementation of MERAM involves use of multiferroic tunneling junctions (MFTJs), which besides offering non-volatility are both electrically and magnetically tunable. Fundamentally, a MFTJ consists of a heterostructure of an ultrathin multiferroic or ferroelectric material as the active tunneling barrier sandwiched between ferromagnetic electrodes. Thereby, the MFTJ exhibits both tunnel electroresistance (TER) and tunnel magnetoresistance (TMR) effects with application of an electric and magnetic field, respectively. In this thesis work, we have developed two-dimensional (2D) thin-film multiferroic heterostructure METJ prototypes consisting of ultrathin ferroelectric BaTiO3 (BTO) layer and a conducting ferromagnetic La0.67Sr 0.33MnO3 (LSMO) electrode. The heteroepitaxial films are grown using the pulsed laser deposition (PLD) technique. This oxide heterostructure offers the opportunity to study the nano-scale details of the tunnel electroresistance (TER) effect using scanning probe microscopy techniques. We performed the measurements using the MFP-3D (Asylum Research) scanning probe microscope. The ultrathin BTO films (1.2-2.0 nm) grown on LSMO electrodes display both ferro- and piezo-electric properties and exhibit large tunnel resistance effect. We have explored the growth and properties of one-dimensional (1D) heterostructures, referred to as multiferoric nanowire (NW) heterostructures. The ferromagnetic/ferroelectric composite heterostructures are grown as sheath layers using PLD on lattice-matched template NWs, e.g. MgO, that are deposited by chemical vapor deposition utilizing the vapor-liquid-solid (VLS) mechanism. The one-dimensional geometry can substantially overcome the clamping effect of the substrate present in two

  5. Terrestrial neutron-induced soft errors in advanced memory devices

    CERN Document Server

    Nakamura, Takashi; Ibe, Eishi; Yahagi, Yasuo; Kameyama, Hideaki

    2008-01-01

    Terrestrial neutron-induced soft errors in semiconductor memory devices are currently a major concern in reliability issues. Understanding the mechanism and quantifying soft-error rates are primarily crucial for the design and quality assurance of semiconductor memory devices. This book covers the relevant up-to-date topics in terrestrial neutron-induced soft errors, and aims to provide succinct knowledge on neutron-induced soft errors to the readers by presenting several valuable and unique features. Sample Chapter(s). Chapter 1: Introduction (238 KB). Table A.30 mentioned in Appendix A.6 on

  6. Memory-assisted measurement-device-independent quantum key distribution

    International Nuclear Information System (INIS)

    Panayi, Christiana; Razavi, Mohsen; Ma, Xiongfeng; Lütkenhaus, Norbert

    2014-01-01

    A protocol with the potential of beating the existing distance records for conventional quantum key distribution (QKD) systems is proposed. It borrows ideas from quantum repeaters by using memories in the middle of the link, and that of measurement-device-independent QKD, which only requires optical source equipment at the user's end. For certain memories with short access times, our scheme allows a higher repetition rate than that of quantum repeaters with single-mode memories, thereby requiring lower coherence times. By accounting for various sources of nonideality, such as memory decoherence, dark counts, misalignment errors, and background noise, as well as timing issues with memories, we develop a mathematical framework within which we can compare QKD systems with and without memories. In particular, we show that with the state-of-the-art technology for quantum memories, it is potentially possible to devise memory-assisted QKD systems that, at certain distances of practical interest, outperform current QKD implementations. (paper)

  7. Atomic crystals resistive switching memory

    International Nuclear Information System (INIS)

    Liu Chunsen; Zhang David Wei; Zhou Peng

    2017-01-01

    Facing the growing data storage and computing demands, a high accessing speed memory with low power and non-volatile character is urgently needed. Resistive access random memory with 4F 2 cell size, switching in sub-nanosecond, cycling endurances of over 10 12 cycles, and information retention exceeding 10 years, is considered as promising next-generation non-volatile memory. However, the energy per bit is still too high to compete against static random access memory and dynamic random access memory. The sneak leakage path and metal film sheet resistance issues hinder the further scaling down. The variation of resistance between different devices and even various cycles in the same device, hold resistive access random memory back from commercialization. The emerging of atomic crystals, possessing fine interface without dangling bonds in low dimension, can provide atomic level solutions for the obsessional issues. Moreover, the unique properties of atomic crystals also enable new type resistive switching memories, which provide a brand-new direction for the resistive access random memory. (topical reviews)

  8. Gd-substituted bismuth titanate film capacitors having ferroelectric reliability and large non-volatile charges

    International Nuclear Information System (INIS)

    Chon, Uong; Jang, Hyun M.; Shin, Nam S.; Kim, Jae S.; Ahn, Do C.; Kim, Yun S.; No, Kwangsoo

    2007-01-01

    Fatigue-free Gd-modified bismuth titanate (Bi 3.15 Gd 0.85 Ti 3 O 12 ; BGdT) film capacitors having stable charge-retaining characteristics were grown on Pt/TiO 2 /SiO 2 /Si(1 0 0) substrates using the method of metal-organic sol decomposition. The BGdT film capacitor with a top Pt electrode showed significantly improved values of the remanent polarization (2P r ) and the non-volatile charge as compared to those of the Bi 4- x La x Ti 3 O 12 (BLT; x=0.75) film capacitor, currently renowned as a promising candidate for non-volatile memories. The saturated 2P r value of the BGdT capacitor was 75 μC/cm 2 while it remained essentially constant up to 4.5x10 10 read/write switching cycles at a frequency of 1 MHz. In addition to these, the capacitor demonstrated excellent charge-retention characteristics with its sensing margin of 52 μC/cm 2 and a strong resistance against the imprinting failure

  9. Method and device for efficiently updating data in electronic devices

    OpenAIRE

    Sánchez Espeso, Pablo Pedro; Díaz Suárez, Álvaro

    2014-01-01

    ABSTRACT: The invention relates to a method and a device for efficiently updating data in electronic devices, solving problems presented by existing techniques in a simple manner. The invention allows the device to be updated rapidly, with low energy consumption, and minimising the number of times the non-volatile memory unit (for example, flash) is erased, at a profitable cost. RESUMEN: Método y dispositivo para la actualización eficiente de datos en dispositivos electrónicos que resuelve...

  10. Discrete charge states in nanowire flash memory with multiple Ta2O5 charge-trapping stacks

    Science.gov (United States)

    Zhu, Hao; Bonevich, John E.; Li, Haitao; Richter, Curt A.; Yuan, Hui; Kirillov, Oleg; Li, Qiliang

    2014-06-01

    In this work, multi-bit flash-like memory cell based on Si nanowire field-effect transistor and multiple Ta2O5 charge-trapping stacks have been fabricated and fully characterized. The memory cells exhibited staircase, discrete charged states at small gate voltages. Such discrete multi-bit on one memory cell is attractive for high memory density. These non-volatile memory devices exhibited fast programming/erasing speed, excellent retention, and endurance, indicating the advantages of integrating the multilayer of charge-storage stacks on the nanowire channel. Such high-performance flash-like non-volatile memory can be integrated into the microprocessor chip as the local memory which requires high density and good endurance.

  11. Giant magneto-resistance devices

    CERN Document Server

    Hirota, Eiichi; Inomata, Koichiro

    2002-01-01

    This book deals with the application of giant magneto-resistance (GMR) effects to electronic devices. It will appeal to engineers and graduate students in the fields of electronic devices and materials. The main subjects are magnetic sensors with high resolution and magnetic read heads with high sensitivity, required for hard-disk drives with recording densities of several gigabytes. Another important subject is novel magnetic random-access memories (MRAM) with non-volatile non-destructive and radiation-resistant characteristics. Other topics include future GMR devices based on bipolar spin transistors, spin field-effect transistors (FETs) and double-tunnel junctions.

  12. C-RAM: breaking mobile device memory barriers using the cloud

    OpenAIRE

    Pamboris, A; Pietzuch, P

    2015-01-01

    ?Mobile applications are constrained by the available memory of mobile devices. We present C-RAM, a system that uses cloud-based memory to extend the memory of mobile devices. It splits application state and its associated computation between a mobile device and a cloud node to allow applications to consume more memory, while minimising the performance impact. C-RAM thus enables developers to realise new applications or port legacy desktop applications with a large memory footprint to mobile ...

  13. Materials and Physics Challenges for Spin Transfer Torque Magnetic Random Access Memories

    Energy Technology Data Exchange (ETDEWEB)

    Heinonen, O.

    2014-10-05

    Magnetic random access memories utilizing the spin transfer torque effect for writing information are a strong contender for non-volatile memories scalable to the 20 nm node, and perhaps beyond. I will here examine how these devices behave as the device size is scaled down from 70 nm size to 20 nm. As device sizes go below ~50 nm, the size becomes comparable to intrinsic magnetic length scales and the device behavior does not simply scale with size. This has implications for the device design and puts additional constraints on the materials in the device.

  14. Some Improvements in Utilization of Flash Memory Devices

    Science.gov (United States)

    Gender, Thomas K.; Chow, James; Ott, William E.

    2009-01-01

    Two developments improve the utilization of flash memory devices in the face of the following limitations: (1) a flash write element (page) differs in size from a flash erase element (block), (2) a block must be erased before its is rewritten, (3) lifetime of a flash memory is typically limited to about 1,000,000 erases, (4) as many as 2 percent of the blocks of a given device may fail before the expected end of its life, and (5) to ensure reliability of reading and writing, power must not be interrupted during minimum specified reading and writing times. The first development comprises interrelated software components that regulate reading, writing, and erasure operations to minimize migration of data and unevenness in wear; perform erasures during idle times; quickly make erased blocks available for writing; detect and report failed blocks; maintain the overall state of a flash memory to satisfy real-time performance requirements; and detect and initialize a new flash memory device. The second development is a combination of hardware and software that senses the failure of a main power supply and draws power from a capacitive storage circuit designed to hold enough energy to sustain operation until reading or writing is completed.

  15. Radiation-hardened MRAM-based LUT for non-volatile FPGA soft error mitigation with multi-node upset tolerance

    Science.gov (United States)

    Zand, Ramtin; DeMara, Ronald F.

    2017-12-01

    In this paper, we have developed a radiation-hardened non-volatile lookup table (LUT) circuit utilizing spin Hall effect (SHE)-magnetic random access memory (MRAM) devices. The design is motivated by modeling the effect of radiation particles striking hybrid complementary metal oxide semiconductor/spin based circuits, and the resistive behavior of SHE-MRAM devices via established and precise physics equations. The models developed are leveraged in the SPICE circuit simulator to verify the functionality of the proposed design. The proposed hardening technique is based on using feedback transistors, as well as increasing the radiation capacity of the sensitive nodes. Simulation results show that our proposed LUT circuit can achieve multiple node upset (MNU) tolerance with more than 38% and 60% power-delay product improvement as well as 26% and 50% reduction in device count compared to the previous energy-efficient radiation-hardened LUT designs. Finally, we have performed a process variation analysis showing that the MNU immunity of our proposed circuit is realized at the cost of increased susceptibility to transistor and MRAM variations compared to an unprotected LUT design.

  16. Vapor condensation onto a non-volatile liquid drop

    Energy Technology Data Exchange (ETDEWEB)

    Inci, Levent; Bowles, Richard K., E-mail: richard.bowles@usask.ca [Department of Chemistry, University of Saskatchewan, Saskatoon, Saskatchewan S7N 5C9 (Canada)

    2013-12-07

    Molecular dynamics simulations of miscible and partially miscible binary Lennard–Jones mixtures are used to study the dynamics and thermodynamics of vapor condensation onto a non-volatile liquid drop in the canonical ensemble. When the system volume is large, the driving force for condensation is low and only a submonolayer of the solvent is adsorbed onto the liquid drop. A small degree of mixing of the solvent phase into the core of the particles occurs for the miscible system. At smaller volumes, complete film formation is observed and the dynamics of film growth are dominated by cluster-cluster coalescence. Mixing into the core of the droplet is also observed for partially miscible systems below an onset volume suggesting the presence of a solubility transition. We also develop a non-volatile liquid drop model, based on the capillarity approximations, that exhibits a solubility transition between small and large drops for partially miscible mixtures and has a hysteresis loop similar to the one observed in the deliquescence of small soluble salt particles. The properties of the model are compared to our simulation results and the model is used to study the formulation of classical nucleation theory for systems with low free energy barriers.

  17. RFID and Memory Devices Fabricated Integrally on Substrates

    Science.gov (United States)

    Schramm, Harry F.

    2004-01-01

    Electronic identification devices containing radio-frequency identification (RFID) circuits and antennas would be fabricated integrally with the objects to be identified, according to a proposal. That is to say, the objects to be identified would serve as substrates for the deposition and patterning of the materials of the devices used to identify them, and each identification device would be bonded to the identified object at the molecular level. Vacuum arc vapor deposition (VAVD) is the NASA derived process for depositing layers of material on the substrate. This proposal stands in contrast to the current practice of fabricating RFID and/or memory devices as wafer-based, self-contained integrated-circuit chips that are subsequently embedded in or attached to plastic cards to make smart account-information cards and identification badges. If one relies on such a chip to store data on the history of an object to be tracked and the chip falls off or out of the object, then one loses both the historical data and the means to track the object and verify its identity electronically. Also, in contrast is the manufacturing philosophy in use today to make many memory devices. Today s methods involve many subtractive processes such as etching. This proposal only uses additive methods, building RFID and memory devices from the substrate up in thin layers. VAVD is capable of spraying silicon, copper, and other materials commonly used in electronic devices. The VAVD process sprays most metals and some ceramics. The material being sprayed has a very strong bond with the substrate, whether that substrate is metal, ceramic, or even wood, rock, glass, PVC, or paper. An object to be tagged with an identification device according to the proposal must be compatible with a vacuum deposition process. Temperature is seldom an issue as the substrate rarely reaches 150 F (66 C) during the deposition process. A portion of the surface of the object would be designated as a substrate for

  18. Nonvolatile Memory Technology for Space Applications

    Science.gov (United States)

    Oldham, Timothy R.; Irom, Farokh; Friendlich, Mark; Nguyen, Duc; Kim, Hak; Berg, Melanie; LaBel, Kenneth A.

    2010-01-01

    This slide presentation reviews several forms of nonvolatile memory for use in space applications. The intent is to: (1) Determine inherent radiation tolerance and sensitivities, (2) Identify challenges for future radiation hardening efforts, (3) Investigate new failure modes and effects, and technology modeling programs. Testing includes total dose, single event (proton, laser, heavy ion), and proton damage (where appropriate). Test vehicles are expected to be a variety of non-volatile memory devices as available including Flash (NAND and NOR), Charge Trap, Nanocrystal Flash, Magnetic Memory (MRAM), Phase Change--Chalcogenide, (CRAM), Ferroelectric (FRAM), CNT, and Resistive RAM.

  19. A triple quantum dot based nano-electromechanical memory device

    International Nuclear Information System (INIS)

    Pozner, R.; Lifshitz, E.; Peskin, U.

    2015-01-01

    Colloidal quantum dots (CQDs) are free-standing nano-structures with chemically tunable electronic properties. This tunability offers intriguing possibilities for nano-electromechanical devices. In this work, we consider a nano-electromechanical nonvolatile memory (NVM) device incorporating a triple quantum dot (TQD) cluster. The device operation is based on a bias induced motion of a floating quantum dot (FQD) located between two bound quantum dots (BQDs). The mechanical motion is used for switching between two stable states, “ON” and “OFF” states, where ligand-mediated effective interdot forces between the BQDs and the FQD serve to hold the FQD in each stable position under zero bias. Considering realistic microscopic parameters, our quantum-classical theoretical treatment of the TQD reveals the characteristics of the NVM

  20. Radiation Testing, Characterization and Qualification Challenges for Modern Microelectronics and Photonics Devices and Technologies

    Science.gov (United States)

    LaBel, Kenneth A.; Cohn, Lewis M.

    2008-01-01

    At GOMAC 2007, we discussed a selection of the challenges for radiation testing of modern semiconductor devices focusing on state-of-the-art memory technologies. This included FLASH non-volatile memories (NVMs) and synchronous dynamic random access memories (SDRAMs). In this presentation, we extend this discussion in device packaging and complexity as well as single event upset (SEU) mechanisms using several technology areas as examples including: system-on-a-chip (SOC) devices and photonic or fiber optic systems. The underlying goal is intended to provoke thought for understanding the limitations and interpretation of radiation testing results.

  1. Review of radiation effects on ReRAM devices and technology

    Science.gov (United States)

    Gonzalez-Velo, Yago; Barnaby, Hugh J.; Kozicki, Michael N.

    2017-08-01

    A review of the ionizing radiation effects on resistive random access memory (ReRAM) technology and devices is presented in this article. The review focuses on vertical devices exhibiting bipolar resistance switching, devices that have already exhibited interesting properties and characteristics for memory applications and, in particular, for non-volatile memory applications. Non-volatile memories are important devices for any type of electronic and embedded system, as they are for space applications. In such applications, specific environmental issues related to the existence of cosmic rays and Van Allen radiation belts around the Earth contribute to specific failure mechanisms related to the energy deposition induced by such ionizing radiation. Such effects are important in non-volatile memory as the current leading technology, i.e. flash-based technology, is sensitive to the total ionizing dose (TID) and single-event effects. New technologies such as ReRAM, if competing with or complementing the existing non-volatile area of memories from the point of view of performance, also have to exhibit great reliability for use in radiation environments such as space. This has driven research on the radiation effects of such ReRAM technology, on both the conductive-bridge RAM as well as the valence-change memories, or OxRAM variants of the technology. Initial characterizations of ReRAM technology showed a high degree of resilience to TID, developing researchers’ interest in characterizing such resilience as well as investigating the cause of such behavior. The state of the art of such research is reviewed in this article.

  2. Wearable Intrinsically Soft, Stretchable, Flexible Devices for Memories and Computing.

    Science.gov (United States)

    Rajan, Krishna; Garofalo, Erik; Chiolerio, Alessandro

    2018-01-27

    A recent trend in the development of high mass consumption electron devices is towards electronic textiles (e-textiles), smart wearable devices, smart clothes, and flexible or printable electronics. Intrinsically soft, stretchable, flexible, Wearable Memories and Computing devices (WMCs) bring us closer to sci-fi scenarios, where future electronic systems are totally integrated in our everyday outfits and help us in achieving a higher comfort level, interacting for us with other digital devices such as smartphones and domotics, or with analog devices, such as our brain/peripheral nervous system. WMC will enable each of us to contribute to open and big data systems as individual nodes, providing real-time information about physical and environmental parameters (including air pollution monitoring, sound and light pollution, chemical or radioactive fallout alert, network availability, and so on). Furthermore, WMC could be directly connected to human brain and enable extremely fast operation and unprecedented interface complexity, directly mapping the continuous states available to biological systems. This review focuses on recent advances in nanotechnology and materials science and pays particular attention to any result and promising technology to enable intrinsically soft, stretchable, flexible WMC.

  3. Electronic polymer memory devices-Easy to fabricate, difficult to understand

    International Nuclear Information System (INIS)

    Paul, Shashi; Salaoru, Iulia

    2010-01-01

    There has been a number reports on polymer memory devices for the last one decade. Polymer memory devices are fabricated by depositing a blend (an admixture of organic polymer, small organic molecules and nanoparticles) between two metal electrodes. These devices show two electrical conductance states ('1' and '0') when voltage is applied, thus rendering the structures suitable for data retention. These two states can be viewed as the realisation of memory devices. However, polymer memory devices reported so far suffer from multiple drawbacks that render their industrial implementation premature. There is a large discrepancy in the results reported by different groups. This article attempts to answer some of the questions.

  4. Numerical analysis of a polysilicon-based resistive memory device

    KAUST Repository

    Berco, Dan

    2018-03-08

    This study investigates a conductive bridge resistive memory device based on a Cu top electrode, 10-nm polysilicon resistive switching layer and a TiN bottom electrode, by numerical analysis for $$10^{3}$$103 programming and erase simulation cycles. The low and high resistive state values in each cycle are calculated, and the analysis shows that the structure has excellent retention reliability properties. The presented Cu species density plot indicates that Cu insertion occurs almost exclusively along grain boundaries resulting in a confined isomorphic conductive filament that maintains its overall shape and electric properties during cycling. The superior reliability of this structure may thus be attributed to the relatively low amount of Cu migrating into the RSL during initial formation. In addition, the results show a good match and help to confirm experimental measurements done over a previously demonstrated device.

  5. Selected Advances in Nanoelectronic Devices Logic, Memory and RF

    CERN Document Server

    Joodaki, Mojtaba

    2013-01-01

    Nanoelectronics, as a true successor of microelectronics, is certainly a major technology boomer in the 21st century. This has been shown by its several applications and also by its enormous potential to influence all areas of electronics, computers, information technology, aerospace defense, and consumer goods. Although the current semiconductor technology is projected to reach its physical limit in about a decade, nanoscience and nanotechnology promise breakthroughs for the future. The present books provides an in-depth review of the latest advances in the technology of nanoelectronic devices and their developments over the past decades. Moreover, it introduces new concepts for the realization of future nanoelectronic devices. The main focus of the book is on three fundamental branches of semiconductor products or applications: logic, memory, and RF and communication. By pointing out to the key technical challenges, important aspects and characteristics of various designs are used to illustrate mechanisms t...

  6. A CMOS-Compatible Poly-Si Nanowire Device with Hybrid Sensor/Memory Characteristics for System-on-Chip Applications

    Directory of Open Access Journals (Sweden)

    Chia-Hua Ho

    2012-03-01

    Full Text Available This paper reports a versatile nano-sensor technology using “top-down” poly-silicon nanowire field-effect transistors (FETs in the conventional Complementary Metal-Oxide Semiconductor (CMOS-compatible semiconductor process. The nanowire manufacturing technique reduced nanowire width scaling to 50 nm without use of extra lithography equipment, and exhibited superior device uniformity. These n type polysilicon nanowire FETs have positive pH sensitivity (100 mV/pH and sensitive deoxyribonucleic acid (DNA detection ability (100 pM at normal system operation voltages. Specially designed oxide-nitride-oxide buried oxide nanowire realizes an electrically Vth-adjustable sensor to compensate device variation. These nanowire FETs also enable non-volatile memory application for a large and steady Vth adjustment window (>2 V Programming/Erasing window. The CMOS-compatible manufacturing technique of polysilicon nanowire FETs offers a possible solution for commercial System-on-Chip biosensor application, which enables portable physiology monitoring and in situ recording.

  7. A CMOS-compatible poly-Si nanowire device with hybrid sensor/memory characteristics for System-on-Chip applications.

    Science.gov (United States)

    Chen, Min-Cheng; Chen, Hao-Yu; Lin, Chia-Yi; Chien, Chao-Hsin; Hsieh, Tsung-Fan; Horng, Jim-Tong; Qiu, Jian-Tai; Huang, Chien-Chao; Ho, Chia-Hua; Yang, Fu-Liang

    2012-01-01

    This paper reports a versatile nano-sensor technology using "top-down" poly-silicon nanowire field-effect transistors (FETs) in the conventional Complementary Metal-Oxide Semiconductor (CMOS)-compatible semiconductor process. The nanowire manufacturing technique reduced nanowire width scaling to 50 nm without use of extra lithography equipment, and exhibited superior device uniformity. These n type polysilicon nanowire FETs have positive pH sensitivity (100 mV/pH) and sensitive deoxyribonucleic acid (DNA) detection ability (100 pM) at normal system operation voltages. Specially designed oxide-nitride-oxide buried oxide nanowire realizes an electrically V(th)-adjustable sensor to compensate device variation. These nanowire FETs also enable non-volatile memory application for a large and steady V(th) adjustment window (>2 V Programming/Erasing window). The CMOS-compatible manufacturing technique of polysilicon nanowire FETs offers a possible solution for commercial System-on-Chip biosensor application, which enables portable physiology monitoring and in situ recording.

  8. Silicon nanowire charge-trap memory incorporating self-assembled iron oxide quantum dots.

    Science.gov (United States)

    Huang, Ruo-Gu; Heath, James R

    2012-11-19

    Charge-trap non-volatile memory devices based upon the precise integration of quantum dot storage elements with silicon nanowire field-effect transistors are described. Template-assisted assembly yields an ordered array of FeO QDs within the trenches that separate highly aligned SiNWs, and injected charges are reversibly stored via Fowler-Nordheim tunneling into the QDs. Stored charges shift the transistor threshold voltages, providing the basis for a memory device. Quantum dot size is found to strongly influence memory performance metrics. Copyright © 2012 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  9. Transistor memory devices with large memory windows, using multi-stacking of densely packed, hydrophobic charge trapping metal nanoparticle array.

    Science.gov (United States)

    Cho, Ikjun; Kim, Beom Joon; Ryu, Sook Won; Cho, Jeong Ho; Cho, Jinhan

    2014-12-19

    Organic field-effect transistor (OFET) memories have rapidly evolved from low-cost and flexible electronics with relatively low-memory capacities to memory devices that require high-capacity memory such as smart memory cards or solid-state hard drives. Here, we report the high-capacity OFET memories based on the multilayer stacking of densely packed hydrophobic metal NP layers in place of the traditional transistor memory systems based on a single charge trapping layer. We demonstrated that the memory performances of devices could be significantly enhanced by controlling the adsorption isotherm behavior, multilayer stacking structure and hydrophobicity of the metal NPs. For this study, tetraoctylammonium (TOA)-stabilized Au nanoparticles (TOA-Au(NPs)) were consecutively layer-by-layer (LbL) assembled with an amine-functionalized poly(amidoamine) dendrimer (PAD). The formed (PAD/TOA-Au(NP))(n) films were used as a multilayer stacked charge trapping layer at the interface between the tunneling dielectric layer and the SiO2 gate dielectric layer. For a single AuNP layer (i.e. PAD/TOA-Au(NP))1) with a number density of 1.82 × 10(12) cm(-2), the memory window of the OFET memory device was measured to be approximately 97 V. The multilayer stacked OFET memory devices prepared with four Au(NP) layers exhibited excellent programmable memory properties (i.e. a large memory window (ΔV(th)) exceeding 145 V, a fast switching speed (1 μs), a high program/erase (P/E) current ratio (greater than 10(6)) and good electrical reliability) during writing and erasing over a relatively short time scale under an operation voltage of 100 V applied at the gate.

  10. Transistor memory devices with large memory windows, using multi-stacking of densely packed, hydrophobic charge trapping metal nanoparticle array

    International Nuclear Information System (INIS)

    Cho, Ikjun; Cho, Jinhan; Kim, Beom Joon; Cho, Jeong Ho; Ryu, Sook Won

    2014-01-01

    Organic field-effect transistor (OFET) memories have rapidly evolved from low-cost and flexible electronics with relatively low-memory capacities to memory devices that require high-capacity memory such as smart memory cards or solid-state hard drives. Here, we report the high-capacity OFET memories based on the multilayer stacking of densely packed hydrophobic metal NP layers in place of the traditional transistor memory systems based on a single charge trapping layer. We demonstrated that the memory performances of devices could be significantly enhanced by controlling the adsorption isotherm behavior, multilayer stacking structure and hydrophobicity of the metal NPs. For this study, tetraoctylammonium (TOA)-stabilized Au nanoparticles (TOA-Au NPs ) were consecutively layer-by-layer (LbL) assembled with an amine-functionalized poly(amidoamine) dendrimer (PAD). The formed (PAD/TOA-Au NP ) n films were used as a multilayer stacked charge trapping layer at the interface between the tunneling dielectric layer and the SiO 2 gate dielectric layer. For a single Au NP layer (i.e. PAD/TOA-Au NP ) 1 ) with a number density of 1.82 × 10 12 cm −2 , the memory window of the OFET memory device was measured to be approximately 97 V. The multilayer stacked OFET memory devices prepared with four Au NP layers exhibited excellent programmable memory properties (i.e. a large memory window (ΔV th ) exceeding 145 V, a fast switching speed (1 μs), a high program/erase (P/E) current ratio (greater than 10 6 ) and good electrical reliability) during writing and erasing over a relatively short time scale under an operation voltage of 100 V applied at the gate. (paper)

  11. Quantum tunnelling and charge accumulation in organic ferroelectric memory diodes

    NARCIS (Netherlands)

    Ghittorelli, M.; Lenz, Thomas; Dehsari, H.S.; Zhao (赵冬), Dong; Asadi, Kamal; Blom, Paul W.M.; Kovács-Vajna, Z. M.; de Leeuw, D.M.; Torricelli, F.

    2017-01-01

    Non-volatile memories—providing the information storage functionality—are crucial circuit components. Solution-processed organic ferroelectric memory diodes are the non-volatile memory candidate for flexible electronics, as witnessed by the industrial demonstration of a 1 kbit reconfigurable memory

  12. Field-effect transistor memories based on ferroelectric polymers

    Science.gov (United States)

    Zhang, Yujia; Wang, Haiyang; Zhang, Lei; Chen, Xiaomeng; Guo, Yu; Sun, Huabin; Li, Yun

    2017-11-01

    Field-effect transistors based on ferroelectrics have attracted intensive interests, because of their non-volatile data retention, rewritability, and non-destructive read-out. In particular, polymeric materials that possess ferroelectric properties are promising for the fabrications of memory devices with high performance, low cost, and large-area manufacturing, by virtue of their good solubility, low-temperature processability, and good chemical stability. In this review, we discuss the material characteristics of ferroelectric polymers, providing an update on the current development of ferroelectric field-effect transistors (Fe-FETs) in non-volatile memory applications. Program supported partially by the NSFC (Nos. 61574074, 61774080), NSFJS (No. BK20170075), and the Open Partnership Joint Projects of NSFC-JSPS Bilateral Joint Research Projects (No. 61511140098).

  13. Offline Forensic Analysis Of Microsoft Windows XP Physical Memory

    National Research Council Canada - National Science Library

    Schultz, John S

    2006-01-01

    .... Existing forensic tools that analyze non-volatile memory are not capable of analyzing volatile memory and the few tools that are capable of detailed analysis of volatile memory are not openly available to the public...

  14. SHADE: A Shape-Memory-Activated Device Promoting Ankle Dorsiflexion

    Science.gov (United States)

    Pittaccio, S.; Viscuso, S.; Rossini, M.; Magoni, L.; Pirovano, S.; Villa, E.; Besseghini, S.; Molteni, F.

    2009-08-01

    Acute post-stroke rehabilitation protocols include passive mobilization as a means to prevent contractures. A device (SHADE) that provides repetitive passive motion to a flaccid ankle by using shape memory alloy actuators could be of great help in providing this treatment. A suitable actuator was designed as a cartridge of approximately 150 × 20 × 15 mm, containing 2.5 m of 0.25 mm diameter NiTi wire. This actuator was activated by Joule’s effect employing a 7 s current input at 0.7 A, which provided 10 N through 76 mm displacement. Cooling and reset by natural convection took 30 s. A prototype of SHADE was assembled with two thermoplastic shells hinged together at the ankle and strapped on the shin and foot. Two actuators were fixed on the upper shell while an inextensible thread connected each NiTi wire to the foot shell. The passive ankle motion (passive range of motion, PROM) generated by SHADE was evaluated optoelectronically on three flaccid patients (58 ± 5 years old); acceptability was assessed by a questionnaire presented to further three flaccid patients (44 ± 11.5 years old) who used SHADE for 5 days, 30 min a day. SHADE was well accepted by all patients, produced good PROM, and caused no pain. The results prove that suitable limb mobilization can be produced by SMA actuators.

  15. Lanthanum Gadolinium Oxide: A New Electronic Device Material for CMOS Logic and Memory Devices

    Directory of Open Access Journals (Sweden)

    Shojan P. Pavunny

    2014-03-01

    Full Text Available A comprehensive study on the ternary dielectric, LaGdO3, synthesized and qualified in our laboratory as a novel high-k dielectric material for logic and memory device applications in terms of its excellent features that include a high linear dielectric constant (k of ~22 and a large energy bandgap of ~5.6 eV, resulting in sufficient electron and hole band offsets of ~2.57 eV and ~1.91 eV, respectively, on silicon, good thermal stability with Si and lower gate leakage current densities within the International Technology Roadmap for Semiconductors (ITRS specified limits at the sub-nanometer electrical functional thickness level, which are desirable for advanced complementary metal-oxide-semiconductor (CMOS, bipolar (Bi and BiCMOS chips applications, is presented in this review article.

  16. Status and Prospects of ZnO-Based Resistive Switching Memory Devices

    Science.gov (United States)

    Simanjuntak, Firman Mangasa; Panda, Debashis; Wei, Kung-Hwa; Tseng, Tseung-Yuen

    2016-08-01

    In the advancement of the semiconductor device technology, ZnO could be a prospective alternative than the other metal oxides for its versatility and huge applications in different aspects. In this review, a thorough overview on ZnO for the application of resistive switching memory (RRAM) devices has been conducted. Various efforts that have been made to investigate and modulate the switching characteristics of ZnO-based switching memory devices are discussed. The use of ZnO layer in different structure, the different types of filament formation, and the different types of switching including complementary switching are reported. By considering the huge interest of transparent devices, this review gives the concrete overview of the present status and prospects of transparent RRAM devices based on ZnO. ZnO-based RRAM can be used for flexible memory devices, which is also covered here. Another challenge in ZnO-based RRAM is that the realization of ultra-thin and low power devices. Nevertheless, ZnO not only offers decent memory properties but also has a unique potential to be used as multifunctional nonvolatile memory devices. The impact of electrode materials, metal doping, stack structures, transparency, and flexibility on resistive switching properties and switching parameters of ZnO-based resistive switching memory devices are briefly compared. This review also covers the different nanostructured-based emerging resistive switching memory devices for low power scalable devices. It may give a valuable insight on developing ZnO-based RRAM and also should encourage researchers to overcome the challenges.

  17. Inadvertently programmed bits in Samsung 128 Mbit flash devices: a flaky investigation

    Science.gov (United States)

    Swift, G.

    2002-01-01

    JPL's X2000 avionics design pioneers new territory by specifying a non-volatile memory (NVM) board based on flash memories. The Samsung 128Mb device chosen was found to demonstrate bit errors (mostly program disturbs) and block-erase failures that increase with cycling. Low temperature, certain pseudo- random patterns, and, probably, higher bias increase the observable bit errors. An experiment was conducted to determine the wearout dependence of the bit errors to 100k cycles at cold temperature using flight-lot devices (some pre-irradiated). The results show an exponential growth rate, a wide part-to-part variation, and some annealing behavior.

  18. Ferroelectric-gate field effect transistor memories device physics and applications

    CERN Document Server

    Ishiwara, Hiroshi; Okuyama, Masanori; Sakai, Shigeki; Yoon, Sung-Min

    2016-01-01

    This book provides comprehensive coverage of the materials characteristics, process technologies, and device operations for memory field-effect transistors employing inorganic or organic ferroelectric thin films. This transistor-type ferroelectric memory has interesting fundamental device physics and potentially large industrial impact. Among the various applications of ferroelectric thin films, the development of nonvolatile ferroelectric random access memory (FeRAM) has progressed most actively since the late 1980s and has achieved modest mass production levels for specific applications since 1995. There are two types of memory cells in ferroelectric nonvolatile memories. One is the capacitor-type FeRAM and the other is the field-effect transistor (FET)-type FeRAM. Although the FET-type FeRAM claims ultimate scalability and nondestructive readout characteristics, the capacitor-type FeRAMs have been the main interest for the major semiconductor memory companies, because the ferroelectric FET has fatal handic...

  19. Memory characteristics of silicon nitride with silicon nanocrystals as a charge trapping layer of nonvolatile memory devices

    International Nuclear Information System (INIS)

    Choi, Sangmoo; Yang, Hyundeok; Chang, Man; Baek, Sungkweon; Hwang, Hyunsang; Jeon, Sanghun; Kim, Juhyung; Kim, Chungwoo

    2005-01-01

    Silicon nitride with silicon nanocrystals formed by low-energy silicon plasma immersion ion implantation has been investigated as a charge trapping layer of a polycrystalline silicon-oxide-nitride-oxide-silicon-type nonvolatile memory device. Compared with the control sample without silicon nanocrystals, silicon nitride with silicon nanocrystals provides excellent memory characteristics, such as larger width of capacitance-voltage hysteresis, higher program/erase speed, and lower charge loss rate at elevated temperature. These improved memory characteristics are derived by incorporation of silicon nanocrystals into the charge trapping layer as additional accessible charge traps with a deeper effective trap energy level

  20. New Content Addressable Memory (CAM) Technologies for Big Data and Intelligent Electronics Enabled by Magneto-Electric Ternary CAM

    Science.gov (United States)

    2017-12-11

    higher frequency than its intrinsic search delay. Furthermore, the MeTCAM incorporates the state-of-the art nonvolatile memory device, the voltage...faster speed compared to the software lookup. There are two types of CAM: binary CAM and ternary CAM (TCAM). Especially, TCAM has not only two binary...scalability. These characteristics allow MTJs interacting with the-state-of-the- art charge- based electronics on the same chip as a non-volatile

  1. Nonvolatile write-once-read-many-times memory device with functionalized-nanoshells/PEDOT:PSS nanocomposites

    Energy Technology Data Exchange (ETDEWEB)

    Avila-Nino, J.A.; Segura-Cardenas, E. [Universidad Autonoma de San Luis Potosi, Instituto de Investigacion en Comunicacion Optica, Alvaro Obregon 64 Zona Centro, 78000 SLP (Mexico); Sustaita, A.O. [Instituto Potosino de Investigacion Cientifica y Tecnologica, Camino a la presa San Jose 2055, CP 78216, San Luis Potosi (Mexico); Cruz-Cruz, I. [Universidad Autonoma de San Luis Potosi, Instituto de Investigacion en Comunicacion Optica, Alvaro Obregon 64 Zona Centro, 78000 SLP (Mexico); Lopez-Sandoval, R. [Instituto Potosino de Investigacion Cientifica y Tecnologica, Camino a la presa San Jose 2055, CP 78216, San Luis Potosi (Mexico); Reyes-Reyes, M., E-mail: reyesm@iico.uaslp.mx [Universidad Autonoma de San Luis Potosi, Instituto de Investigacion en Comunicacion Optica, Alvaro Obregon 64 Zona Centro, 78000 SLP (Mexico)

    2011-03-25

    We have investigated the memory effect of the nanocomposites of functionalized carbon nanoshells (f-CNSs) mixed with poly(3,4-ethylenedioxythiophene) doped with polystyrenesulfonate (PEDOT:PSS) polymer. The f-CNSs were synthesized by the spray pyrolysis method and functionalized in situ with functional groups (OH, COOH, C-H, C-OH) with the aim of improving their compatibility in the aqueous dispersion of PEDOT:PSS. The current-voltage (I-V) sweep curves at room temperature for the Al/f-CNSs, for certain concentrations range, embedded in a PEDOT:PSS layer/Al devices showed electrical bistability for write-once-read-many-times (WORM) memory devices. The memory effect observed in the devices can be explained due to the existence of trapped charges in the f-CNSs/PEDOT:PSS layer. The carrier transport mechanisms for the memory devices is studied and discussed.

  2. Nonvolatile write-once-read-many-times memory device with functionalized-nanoshells/PEDOT:PSS nanocomposites

    International Nuclear Information System (INIS)

    Avila-Nino, J.A.; Segura-Cardenas, E.; Sustaita, A.O.; Cruz-Cruz, I.; Lopez-Sandoval, R.; Reyes-Reyes, M.

    2011-01-01

    We have investigated the memory effect of the nanocomposites of functionalized carbon nanoshells (f-CNSs) mixed with poly(3,4-ethylenedioxythiophene) doped with polystyrenesulfonate (PEDOT:PSS) polymer. The f-CNSs were synthesized by the spray pyrolysis method and functionalized in situ with functional groups (OH, COOH, C-H, C-OH) with the aim of improving their compatibility in the aqueous dispersion of PEDOT:PSS. The current-voltage (I-V) sweep curves at room temperature for the Al/f-CNSs, for certain concentrations range, embedded in a PEDOT:PSS layer/Al devices showed electrical bistability for write-once-read-many-times (WORM) memory devices. The memory effect observed in the devices can be explained due to the existence of trapped charges in the f-CNSs/PEDOT:PSS layer. The carrier transport mechanisms for the memory devices is studied and discussed.

  3. Configurable memory system and method for providing atomic counting operations in a memory device

    Science.gov (United States)

    Bellofatto, Ralph E.; Gara, Alan G.; Giampapa, Mark E.; Ohmacht, Martin

    2010-09-14

    A memory system and method for providing atomic memory-based counter operations to operating systems and applications that make most efficient use of counter-backing memory and virtual and physical address space, while simplifying operating system memory management, and enabling the counter-backing memory to be used for purposes other than counter-backing storage when desired. The encoding and address decoding enabled by the invention provides all this functionality through a combination of software and hardware.

  4. Observation of long term potentiation in papain-based memory devices

    KAUST Repository

    Bag, A.

    2014-06-01

    Biological synaptic behavior in terms of long term potentiation has been observed in papain-based (plant protein) memory devices (memristors) for the first time. Improvement in long term potentiation depends on pulse amplitude and width (duration). Continuous/repetitive dc voltage sweep leads to an increase in memristor conductivity leading to a long term memory in the \\'learning\\' processes.

  5. Studying the fate of non-volatile organic compounds in a commercial plasma air purifier

    Energy Technology Data Exchange (ETDEWEB)

    Schmid, Stefan [ETH Zürich, Department of Chemistry and Applied Biosciences, CH-8093 Zürich (Switzerland); Seiler, Cornelia; Gerecke, Andreas C. [Swiss Federal Laboratories for Material Science and Technology (EMPA), CH-8600 Dübendorf (Switzerland); Hächler, Herbert [University of Zürich, Institute for Food Safety and Hygiene, National Centre for Enteropathogenic Bacteria and Listeria (NENT), CH-8057 Zürich (Switzerland); Hilbi, Hubert [Ludwig-Maximilians-Universität München Max von Pettenkofer-Institut, D-80336 München (Germany); Frey, Joachim [University of Bern, Institute for Veterinary Bacteriology, CH-3001 Bern (Switzerland); Weidmann, Simon; Meier, Lukas; Berchtold, Christian [ETH Zürich, Department of Chemistry and Applied Biosciences, CH-8093 Zürich (Switzerland); Zenobi, Renato, E-mail: zenobi@org.chem.ethz.ch [ETH Zürich, Department of Chemistry and Applied Biosciences, CH-8093 Zürich (Switzerland)

    2013-07-15

    Highlights: • Degradation of environmental toxins, a protein, and bioparticles were studied. • A commercial air purifier based on a cold plasma was used. • Passage through the device reduced the concentration of the compounds/particles. • Deposition inside the plasma air purifier was the main removal process. -- Abstract: Degradation of non-volatile organic compounds–environmental toxins (methyltriclosane and phenanthrene), bovine serum albumin, as well as bioparticles (Legionella pneumophila, Bacillus subtilis, and Bacillus anthracis)–in a commercially available plasma air purifier based on a cold plasma was studied in detail, focusing on its efficiency and on the resulting degradation products. This system is capable of handling air flow velocities of up to 3.0 m s{sup −1} (3200 L min{sup −1}), much higher than other plasma-based reactors described in the literature, which generally are limited to air flow rates below 10 L min{sup −1}. Mass balance studies consistently indicated a reduction in concentration of the compounds/particles after passage through the plasma air purifier, 31% for phenanthrene, 17% for methyltriclosane, and 80% for bovine serum albumin. L. pneumophila did not survive passage through the plasma air purifier, and cell counts of aerosolized spores of B. subtilis and B. anthracis were reduced by 26- and 15-fold, depending on whether it was run at 10 Hz or 50 Hz, respectively. However rather than chemical degradation, deposition on the inner surfaces of the plasma air purifier occured. Our interpretation is that putative “degradation” efficiencies were largely due to electrostatic precipitation rather than to decomposition into smaller molecules.

  6. Enhanced non-volatile and updatable holography using a polymer composite system.

    Science.gov (United States)

    Wu, Pengfei; Sun, Sam Q; Baig, Sarfaraz; Wang, Michael R

    2012-03-12

    Updatable holography is considered as the ultimate technique for true 3D information recording and display. However, there is no practical solution to preserve the required features of both non-volatility and reversibility which conflict with each other when the reading has the same wavelength as the recording. We demonstrate a non-volatile and updatable holographic approach by exploiting new features of molecular transformations in a polymer recording system. In addition, by using a new composite recording film containing photo-reconfigurable liquid-crystal (LC) polymer, the holographic recording is enhanced due to the collective reorientation of LC molecules around the reconfigured polymer chains.

  7. Characterizations of MoTiO{sub 5} flash memory devices with post-annealing

    Energy Technology Data Exchange (ETDEWEB)

    Kao, Chyuan Haur [Chang Gung University, No. 1, University Rd, Puli, Nantou County 54561, Taiwan, ROC (China); Chen, Hsiang, E-mail: hchen@ncnu.edu.tw [National Chi Nan University, No. 1, University Rd, Puli, Nantou County 54561, Taiwan, ROC (China); Chen, Su Zhien [Chang Gung University, No. 1, University Rd, Puli, Nantou County 54561, Taiwan, ROC (China); Chen, Yu Jie; Chu, Yu Cheng [National Chi Nan University, No. 1, University Rd, Puli, Nantou County 54561, Taiwan, ROC (China)

    2014-11-03

    In this study, high-K MoTiO{sub 5} dielectrics were applied as charge trapping layers in fabricated metal-oxide-high-K MoTiO{sub 5}-oxide-Si-type memory devices. Among the applied MoTiO{sub 5} trapping layer treatment conditions, annealing at 900 °C yielded devices that exhibited superior memory performance, such as a larger memory window and faster programming/erasing speed. Multiple material analyses, namely X-ray diffraction, X-ray photoelectron spectroscopy, and atomic force microscopy, confirmed that annealing at 900 °C can improve the material quality as a result of crystallization. The fabricated MoTiO{sub 5}-based memory devices show potential for future commercial memory device applications. - Highlights: • MoTiO5-based flash memories have been fabricated. • MoTiO5 trapping layers could be formed by co-sputtering. • MoTiO5 layers with annealing exhibited a good memory performance. • Multiple material analyses confirm that annealing enhanced crystallization.

  8. Two-bit memory devices based on single-wall carbon nanotubes: demonstration and mechanism

    International Nuclear Information System (INIS)

    Guo Ao; Fu Yunyi; Wang Chuan; Guan Lunhui; Liu Jia; Shi Zujin; Gu Zhennan; Huang Ru; Zhang Xing

    2007-01-01

    Two-bit memory devices of SWNTs, based on the hysteresis effect, have been demonstrated for the first time. The pertinent memory behaviours seem to originate from the capacitive effect due to polarization of molecules, especially the surface-bound water molecules on SiO 2 in close proximity to carbon nanotubes. Our investigations are intimately linked with ultrahigh-density memory applications, and possibly go a long way in broadening the memory applications of SWNTs, for example from nonvolatile to volatile cells

  9. A novel junction-assisted programming scheme for Si-nanocrystal memory devices with improved performance

    Science.gov (United States)

    Jiang, Dandan; Huo, Zongliang; Zhang, Manhong; Jin, Lin; Bai, Jie; Yu, Zhaoan; Liu, Jing; Wang, Qin; Yang, Xiaonan; Wang, Yong; Zhang, Bo; Chen, Junning; Liu, Ming

    2011-11-01

    A novel drain-junction-assisted hot electron programming scheme has been proposed for Si nanocrystal memory devices. Different from the conventional channel hot electron (CHE) injection, two electron injection paths are responsible for the proposed scheme. Experimental results show that the new scheme has a nearly 1 V memory window increase and almost 300 times faster programming speed rather than the conventional CHE method. Meanwhile, improved data retention and endurance characteristics have also been achieved with the enlarged memory window, which is mainly due to less tunnel oxide degradation during the program/erase cycling. Therefore, the new scheme is shown to be more promising for Si nanocrystal memory application.

  10. Quantum tunnelling and charge accumulation in organic ferroelectric memory diodes.

    Science.gov (United States)

    Ghittorelli, Matteo; Lenz, Thomas; Sharifi Dehsari, Hamed; Zhao, Dong; Asadi, Kamal; Blom, Paul W M; Kovács-Vajna, Zsolt M; de Leeuw, Dago M; Torricelli, Fabrizio

    2017-06-12

    Non-volatile memories-providing the information storage functionality-are crucial circuit components. Solution-processed organic ferroelectric memory diodes are the non-volatile memory candidate for flexible electronics, as witnessed by the industrial demonstration of a 1 kbit reconfigurable memory fabricated on a plastic foil. Further progress, however, is limited owing to the lack of understanding of the device physics, which is required for the technological implementation of high-density arrays. Here we show that ferroelectric diodes operate as vertical field-effect transistors at the pinch-off. The tunnelling injection and charge accumulation are the fundamental mechanisms governing the device operation. Surprisingly, thermionic emission can be disregarded and the on-state current is not space charge limited. The proposed model explains and unifies a wide range of experiments, provides important design rules for the implementation of organic ferroelectric memory diodes and predicts an ultimate theoretical array density of up to 10 12  bit cm -2 .

  11. Ferroelectric Thin Films Basic Properties and Device Physics for Memory Applications

    CERN Document Server

    Okuyama, Masanori

    2005-01-01

    Ferroelectric thin films continue to attract much attention due to their developing, diverse applications in memory devices, FeRAM, infrared sensors, piezoelectric sensors and actuators. This book, aimed at students, researchers and developers, gives detailed information about the basic properties of these materials and the associated device physics. All authors are acknowledged experts in the field.

  12. Emerging materials and devices in spintronic integrated circuits for energy-smart mobile computing and connectivity

    International Nuclear Information System (INIS)

    Kang, S.H.; Lee, K.

    2013-01-01

    A spintronic integrated circuit (IC) is made of a combination of a semiconductor IC and a dense array of nanometer-scale magnetic tunnel junctions. This emerging field is of growing scientific and engineering interest, owing to its potential to bring disruptive device innovation to the world of electronics. This technology is currently being pursued not only for scalable non-volatile spin-transfer-torque magnetoresistive random access memory, but also for various forms of non-volatile logic (Spin-Logic). This paper reviews recent advances in spintronic IC. Key discoveries and breakthroughs in materials and devices are highlighted in light of the broader perspective of their application in low-energy mobile computing and connectivity systems, which have emerged as leading drivers for the prevailing electronics ecosystem

  13. Magnetic Resonance Flow Velocity and Temperature Mapping of a Shape Memory Polymer Foam Device

    Energy Technology Data Exchange (ETDEWEB)

    Small IV, W; Gjersing, E; Herberg, J L; Wilson, T S; Maitland, D J

    2008-10-29

    Interventional medical devices based on thermally responsive shape memory polymer (SMP) are under development to treat stroke victims. The goals of these catheter-delivered devices include re-establishing blood flow in occluded arteries and preventing aneurysm rupture. Because these devices alter the hemodynamics and dissipate thermal energy during the therapeutic procedure, a first step in the device development process is to investigate fluid velocity and temperature changes following device deployment. A laser-heated SMP foam device was deployed in a simplified in vitro vascular model. Magnetic resonance imaging (MRI) techniques were used to assess the fluid dynamics and thermal changes associated with device deployment. Spatial maps of the steady-state fluid velocity and temperature change inside and outside the laser-heated SMP foam device were acquired. Though non-physiological conditions were used in this initial study, the utility of MRI in the development of a thermally-activated SMP foam device has been demonstrated.

  14. Metal oxide-resistive memory using graphene-edge electrodes

    Science.gov (United States)

    Lee, Seunghyun; Sohn, Joon; Jiang, Zizhen; Chen, Hong-Yu; Philip Wong, H.-S.

    2015-09-01

    The emerging paradigm of `abundant-data' computing requires real-time analytics on enormous quantities of data collected by a mushrooming network of sensors. Todays computing technology, however, cannot scale to satisfy such big data applications with the required throughput and energy efficiency. The next technology frontier will be monolithically integrated chips with three-dimensionally interleaved memory and logic for unprecedented data bandwidth with reduced energy consumption. In this work, we exploit the atomically thin nature of the graphene edge to assemble a resistive memory (~3 Å thick) stacked in a vertical three-dimensional structure. We report some of the lowest power and energy consumption among the emerging non-volatile memories due to an extremely thin electrode with unique properties, low programming voltages, and low current. Circuit analysis of the three-dimensional architecture using experimentally measured device properties show higher storage potential for graphene devices compared that of metal based devices.

  15. Metal oxide-resistive memory using graphene-edge electrodes.

    Science.gov (United States)

    Lee, Seunghyun; Sohn, Joon; Jiang, Zizhen; Chen, Hong-Yu; Philip Wong, H-S

    2015-09-25

    The emerging paradigm of 'abundant-data' computing requires real-time analytics on enormous quantities of data collected by a mushrooming network of sensors. Todays computing technology, however, cannot scale to satisfy such big data applications with the required throughput and energy efficiency. The next technology frontier will be monolithically integrated chips with three-dimensionally interleaved memory and logic for unprecedented data bandwidth with reduced energy consumption. In this work, we exploit the atomically thin nature of the graphene edge to assemble a resistive memory (∼ 3 Å thick) stacked in a vertical three-dimensional structure. We report some of the lowest power and energy consumption among the emerging non-volatile memories due to an extremely thin electrode with unique properties, low programming voltages, and low current. Circuit analysis of the three-dimensional architecture using experimentally measured device properties show higher storage potential for graphene devices compared that of metal based devices.

  16. 46 CFR 62.25-25 - Programable systems and devices.

    Science.gov (United States)

    2010-10-01

    ..., alarm, and monitoring systems must be stored in non-volatile memory and automatically operate on supply... to be aboard the vessel must not be stored in electronic or magnetic memory. [CGD 81-030, 53 FR 17838...

  17. Memory attacks on device-independent quantum cryptography.

    Science.gov (United States)

    Barrett, Jonathan; Colbeck, Roger; Kent, Adrian

    2013-01-04

    Device-independent quantum cryptographic schemes aim to guarantee security to users based only on the output statistics of any components used, and without the need to verify their internal functionality. Since this would protect users against untrustworthy or incompetent manufacturers, sabotage, or device degradation, this idea has excited much interest, and many device-independent schemes have been proposed. Here we identify a critical weakness of device-independent protocols that rely on public communication between secure laboratories. Untrusted devices may record their inputs and outputs and reveal information about them via publicly discussed outputs during later runs. Reusing devices thus compromises the security of a protocol and risks leaking secret data. Possible defenses include securely destroying or isolating used devices. However, these are costly and often impractical. We propose other more practical partial defenses as well as a new protocol structure for device-independent quantum key distribution that aims to achieve composable security in the case of two parties using a small number of devices to repeatedly share keys with each other (and no other party).

  18. effect of non-volatile solute on the freezing point of malonic acid

    African Journals Online (AJOL)

    DR. AMINU

    and pestle were washed with liquid soap, rinsed with distilled water and then soaked in 10% HNO3 solution for 24 hrs (Todorovi et al 2001). They were then washed with .... concluded that addition of non-volatile solute decreases the freezing point of a solvent and the depression is directly proportional to the amount of.

  19. Shape-memory polymer foam device for treating aneurysms

    Science.gov (United States)

    Ortega, Jason M.; Benett, William J.; Small, Ward; Wilson, Thomas S.; Maitland, Duncan J; Hartman, Jonathan

    2017-05-30

    A system for treating an aneurysm in a blood vessel or vein, wherein the aneurysm has a dome, an interior, and a neck. The system includes a shape memory polymer foam in the interior of the aneurysm between the dome and the neck. The shape memory polymer foam has pores that include a first multiplicity of pores having a first pore size and a second multiplicity of pores having a second pore size. The second pore size is larger than said first pore size. The first multiplicity of pores are located in the neck of the aneurysm. The second multiplicity of pores are located in the dome of the aneurysm.

  20. Nonvolatile rewritable memory device based on solution-processable graphene/poly(3-hexylthiophene) nanocomposite

    International Nuclear Information System (INIS)

    Zhang, Li; Li, Ye; Shi, Jun; Shi, Gaoquan; Cao, Shaokui

    2013-01-01

    An electrically bistable device utilizing a nanocomposite of hexadecylamine-functionalized graphene oxide (HDAGO) with poly(3-hexylthiophene) (P3HT) is demonstrated. The device has an ITO/P3HT-HDAGO/Al sandwich structure, in which the composite film of P3HT-HDAGO was prepared by simple solution phase mixing of the exfoliated HDAGO monolayers with P3HT matrix and a spin-coating method. The memory device exhibits typical bistable electrical switching behavior and a nonvolatile rewritable memory effect, with a turn-on voltage of about 1.5 V and an ON/OFF-state current ratio of 10 5 . Under ambient conditions, both the ON and OFF states are stable under a constant voltage stress or a continuous pulse voltage stress at a read voltage of 1 V. The conduction mechanism is deduced from the modeling of the nature of currents in both states, and the electrical switching behavior can be attributed to the electric-field-induced charge transfer between P3HT and HDAGO nanosheets. - Highlights: • Nonvolatile rewritable memory effect in P3HT–graphene composite is demonstrated. • The memory device was fabricated through a simple solution processing technique. • The device shows a remarkable electrical bistable behavior and excellent stability. • Memory mechanism is deduced from the modeling of the currents in both states

  1. Measurements of non-volatile aerosols with a VTDMA and their correlations with carbonaceous aerosols in Guangzhou, China

    Science.gov (United States)

    Cheung, Heidi H. Y.; Tan, Haobo; Xu, Hanbing; Li, Fei; Wu, Cheng; Yu, Jian Z.; Chan, Chak K.

    2016-07-01

    Simultaneous measurements of aerosol volatility and carbonaceous matters were conducted at a suburban site in Guangzhou, China, in February and March 2014 using a volatility tandem differential mobility analyzer (VTDMA) and an organic carbon/elemental carbon (OC / EC) analyzer. Low volatility (LV) particles, with a volatility shrink factor (VSF) at 300 °C exceeding 0.9, contributed 5 % of number concentrations of the 40 nm particles and 11-15 % of the 80-300 nm particles. They were composed of non-volatile material externally mixed with volatile material, and therefore did not evaporate significantly at 300 °C. Non-volatile material mixed internally with the volatile material was referred to as medium volatility (MV, 0.4 transported at low altitudes (below 1500 m) for over 40 h before arrival. Further comparison with the diurnal variations in the mass fractions of EC and the non-volatile OC in PM2.5 suggests that the non-volatile residuals may be related to both EC and non-volatile OC in the afternoon, during which the concentration of aged organics increased. A closure analysis of the total mass of LV and MV residuals and the mass of EC or the sum of EC and non-volatile OC was conducted. It suggests that non-volatile OC, in addition to EC, was one of the components of the non-volatile residuals measured by the VTDMA in this study.

  2. Modeling of strain effects on the device behaviors of ferroelectric memory field-effect transistors

    International Nuclear Information System (INIS)

    Yang, Feng; Hu, Guangda; Wu, Weibing; Yang, Changhong; Wu, Haitao; Tang, Minghua

    2013-01-01

    The influence of strains on the channel current–gate voltage behaviors and memory windows of ferroelectric memory field-effect transistors (FeMFETs) were studied using an improved model based on the Landau–Devonshire theory. ‘Channel potential–gate voltage’ ferroelectric polarization and silicon surface potential diagrams were constructed for strained single-domain BaTiO 3 FeMFETs. The compressive strains can increase (or decrease) the amplitude of transistor currents and enlarge memory windows. However, tensile strains only decrease the maximum value of transistor currents and compress memory windows. Mismatch strains were found to have a significant influence on the electrical behaviors of the devices, therefore, they must be considered in FeMFET device designing. (fast track communication)

  3. A novel 2-T structure memory device using a Si nanodot for embedded application

    Science.gov (United States)

    Xiaonan, Yang; Yong, Wang; Manhong, Zhang; Zongliang, Huo; Jing, Liu; Bo, Zhang; Ming, Liu

    2011-12-01

    Performance and reliability of a 2 transistor Si nanocrystal nonvolatile memory (NVM) are investigated. A good performance of the memory cell has been achieved, including a fast program/erase (P/E) speed under low voltages, an excellent data retention (maintaining for 10 years) and good endurance with a less threshold voltage shift of less than 10% after 104 P/E cycles. The data show that the device has strong potential for future embedded NVM applications.

  4. Scientific developments of liquid crystal-based optical memory: a review

    Science.gov (United States)

    Prakash, Jai; Chandran, Achu; Biradar, Ashok M.

    2017-01-01

    The memory behavior in liquid crystals (LCs), although rarely observed, has made very significant headway over the past three decades since their discovery in nematic type LCs. It has gone from a mere scientific curiosity to application in variety of commodities. The memory element formed by numerous LCs have been protected by patents, and some commercialized, and used as compensation to non-volatile memory devices, and as memory in personal computers and digital cameras. They also have the low cost, large area, high speed, and high density memory needed for advanced computers and digital electronics. Short and long duration memory behavior for industrial applications have been obtained from several LC materials, and an LC memory with interesting features and applications has been demonstrated using numerous LCs. However, considerable challenges still exist in searching for highly efficient, stable, and long-lifespan materials and methods so that the development of useful memory devices is possible. This review focuses on the scientific and technological approach of fascinating applications of LC-based memory. We address the introduction, development status, novel design and engineering principles, and parameters of LC memory. We also address how the amalgamation of LCs could bring significant change/improvement in memory effects in the emerging field of nanotechnology, and the application of LC memory as the active component for futuristic and interesting memory devices.

  5. The effectiveness of music as a mnemonic device on recognition memory for people with multiple sclerosis.

    Science.gov (United States)

    Moore, Kimberly Sena; Peterson, David A; O'Shea, Geoffrey; McIntosh, Gerald C; Thaut, Michael H

    2008-01-01

    Research shows that people with multiple sclerosis exhibit learning and memory difficulties and that music can be used successfully as a mnemonic device to aid in learning and memory. However, there is currently no research investigating the effectiveness of music mnemonics as a compensatory learning strategy for people with multiple sclerosis. Participants with clinically definitive multiple sclerosis (N = 38) were given a verbal learning and memory test. Results from a recognition memory task were analyzed that compared learning through music (n = 20) versus learning through speech (n = 18). Preliminary baseline neuropsychological data were collected that measured executive functioning skills, learning and memory abilities, sustained attention, and level of disability. An independent samples t test showed no significant difference between groups on baseline neuropsychological functioning or on recognition task measures. Correlation analyses suggest that music mnemonics may facilitate learning for people who are less impaired by the disease. Implications for future research are discussed.

  6. Conjugated polymer covalently modified graphene oxide quantum dots for ternary electronic memory devices.

    Science.gov (United States)

    Fan, Fei; Zhang, Bin; Cao, Yaming; Yang, Xutong; Gu, Junwei; Chen, Yu

    2017-08-03

    Zero dimensional graphene oxide (GO) quantum dots (GOQDs) have been expected to play an important role in the development of new memory materials. When the size of GO was reduced to that of GOQDs, both the electron affinity and ionization potential of GO were found to be decreased, and this was followed by the elevation of lowest energy unoccupied molecular orbital (LUMO) energy level. This implies that the electron withdrawing ability of GOQDs is weaker than that of GO. In this work, a novel arylamine-based polyazomethine covalently functionalized graphene oxide quantum dots (TPAPAM-GOQDs), which was synthesized using an amidation reaction, was for the first time used to fabricate a ternary memory device with a configuration of gold/TPAPAM-GOQDs/indium tin oxide. The current ratio of OFF : ON-1 : ON-2 was found to be 1 : 60 : 3000. Its conductive nature was also revealed using an in situ conductive atomic force microscopy technique. This memory device could potentially increase the memory capacity of the device from the conventional 2 n to 3 n when compared to binary memory devices.

  7. Spatial memory in nonhuman primates implanted with the subdural pharmacotherapy device.

    Science.gov (United States)

    Ludvig, Nandor; Tang, Hai M; Baptiste, Shirn L; Stefanov, Dimitre G; Kral, John G

    2015-06-01

    This study investigated the possible influence of the Subdural Pharmacotherapy Device (SPD) on spatial memory in 3 adult, male bonnet macaques (Macaca radiata). The device was implanted in and above the subdural/subarachnoid space and cranium overlaying the right parietal/frontal cortex: a circuitry involved in spatial memory processing. A large test chamber, equipped with four baited and four non-baited food-ports at different locations, was used: reaches into empty food ports were counted as spatial memory errors. In this study of within-subject design, before SPD implantation (control) the animals made mean 373.3 ± 114.9 (mean ± SEM) errors in the first spatial memory test session. This value dropped to 47.7 ± 18.4 by the 8th session. After SPD implantation and alternating cycles of transmeningeal saline delivery and local cerebrospinal fluid (CSF) drainage in the implanted cortex the spatial memory error count, with the same port locations, was 33.0 ± 12.2 during the first spatial memory test session, further decreasing to 5.7 ± 3.5 by the 8th post-implantation session (Pmemory performance, which in fact included at least one completely error-free session per animal over time. The study showed that complication-free implantation and use of the SPD over the parietal and frontal cortices for months leave spatial memory processes intact in nonhuman primates. Copyright © 2015 Elsevier B.V. All rights reserved.

  8. Nonvolatile Electric Double-Layer Transistor Memory Devices Embedded with Au Nanoparticles.

    Science.gov (United States)

    Koo, Jaemok; Yang, Jeehye; Cho, Boeun; Jo, Hyunwoo; Lee, Keun Hyung; Kang, Moon Sung

    2018-03-21

    We present nonvolatile transistor memory devices that rely on the formation of electric double layer (EDL) at the semiconductor-electrolyte interface. The two critical functional components of the devices are the ion gel electrolyte and gold nanoparticles (NPs). The ion gel electrolyte contains ionic species for EDL formation that allow inducing charges in the semiconductor-electrolyte interface. The gold NPs inserted between the ion gel and the channel layer serve as trapping sites to the induced charges to store the electrical input signals. Two different types of gold NPs were used: one prepared using direct thermal evaporation and the other prepared using a colloidal process. The organic ligands attached onto the colloidal gold NPs prevented the escape of the trapped charges from the particles and thus enhanced the retention characteristics of the programmed/erased signals. The low-voltage-driven EDL formation resulted in a programmed/erased memory signal ratio larger than 10 3 from the nonvolatile indium-gallium-zinc oxide transistor memory devices at voltages below 10 V, which could be held for >10 5 s. The utility of the electrolytes to operate memory devices demonstrated herein should provide an alternative strategy to realize cheap, portable electronic devices powered with thin-film batteries.

  9. Bipolar resistive switching characteristics in tantalum nitride-based resistive random access memory devices

    International Nuclear Information System (INIS)

    Kim, Myung Ju; Jeon, Dong Su; Park, Ju Hyun; Kim, Tae Geun

    2015-01-01

    This paper reports the bipolar resistive switching characteristics of TaN x -based resistive random access memory (ReRAM). The conduction mechanism is explained by formation and rupture of conductive filaments caused by migration of nitrogen ions and vacancies; this mechanism is in good agreement with either Ohmic conduction or the Poole-Frenkel emission model. The devices exhibit that the reset voltage varies from −0.82 V to −0.62 V, whereas the set voltage ranges from 1.01 V to 1.30 V for 120 DC sweep cycles. In terms of reliability, the devices exhibit good retention (>10 5  s) and pulse-switching endurance (>10 6 cycles) properties. These results indicate that TaN x -based ReRAM devices have a potential for future nonvolatile memory devices

  10. Interface-engineered templates for molecular spin memory devices

    NARCIS (Netherlands)

    Raman, Karthik V.; Kamerbeek, Alexander M.; Mukherjee, Arup; Atodiresei, Nicolae; Sen, Tamal K.; Lazic, Predrag; Caciuc, Vasile; Michel, Reent; Stalke, Dietmar; Mandal, Swadhin K.; Bluegel, Stefan; Muenzenberg, Markus; Moodera, Jagadeesh S.

    2013-01-01

    The use of molecular spin state as a quantum of information for storage, sensing and computing has generated considerable interest in the context of next-generation data storage and communication devices(1,2), opening avenues for developing multifunctional molecular spintronics(3). Such ideas have

  11. Application of complex programmable logic devices in memory radiation effects test system

    International Nuclear Information System (INIS)

    Li Yonghong; He Chaohui; Yang Hailiang; He Baoping

    2005-01-01

    The application of the complex programmable logic device (CPLD) in electronics is emphatically discussed. The method of using software MAX + plus II and CPLD are introduced. A new test system for memory radiation effects is established by using CPLD devices-EPM7128C84-15. The old test system's function are realized and, moreover, a number of small scale integrated circuits are reduced and the test system's reliability is improved. (authors)

  12. Growth of Si nanocrystals on alumina and integration in memory devices

    Science.gov (United States)

    Baron, T.; Fernandes, A.; Damlencourt, J. F.; De Salvo, B.; Martin, F.; Mazen, F.; Haukka, S.

    2003-06-01

    We present a detailed study of the growth of Si quantum dots (Si QDs) by low pressure chemical vapor deposition on alumina dielectric deposited by atomic layer deposition. The Si QDs density is very high, 1012 cm-2, for a mean diameter between 5 and 10 nm. Al2O3/Si QD stacks have been integrated in memory devices as granular floating gate. The devices demonstrate good charge storage and data retention characteristics.

  13. Identifying Non-Volatile Data Storage Areas: Unique Notebook Identification Information as Digital Evidence

    Directory of Open Access Journals (Sweden)

    Nikica Budimir

    2007-03-01

    Full Text Available The research reported in this paper introduces new techniques to aid in the identification of recovered notebook computers so they may be returned to the rightful owner. We identify non-volatile data storage areas as a means of facilitating the safe storing of computer identification information. A forensic proof of concept tool has been designed to test the feasibility of several storage locations identified within this work to hold the data needed to uniquely identify a computer. The tool was used to perform the creation and extraction of created information in order to allow the analysis of the non-volatile storage locations as valid storage areas capable of holding and preserving the data created within them.  While the format of the information used to identify the machine itself is important, this research only discusses the insertion, storage and ability to retain such information.

  14. Spatially resolved Raman spectroelectrochemistry of solid-state polythiophene/viologen memory devices.

    Science.gov (United States)

    Kumar, Rajesh; Pillai, Rajesh G; Pekas, Nikola; Wu, Yiliang; McCreery, Richard L

    2012-09-12

    A three terminal molecular memory device was monitored with in situ Raman spectroscopy during bias-induced switching between two metastable states having different conductivity. The device structure is similar to that of a polythiophene field effect transistor, but ethylviologen perchlorate was added to provide a redox counter-reaction to accompany polythiophene redox reactions. The conductivity of the polythiophene layer was reversibly switched between high and low conductance states with a "write/erase" (W/E) bias, while a separate readout circuit monitored the polymer conductance. Raman spectroscopy revealed reversible polythiophene oxidation to its polaron form accompanied by a one-electron viologen reduction. "Write", "read", and "erase" operations were repeatable, with only minor degradation of response after 200 W/E cycles. The devices exhibited switching immediately after fabrication and did not require an "electroforming" step required in many types of memory devices. Spatially resolved Raman spectroscopy revealed polaron formation throughout the polymer layer, even away from the electrodes in the channel and drain regions, indicating that thiophene oxidation "propagates" by growth of the conducting polaron form away from the source electrode. The results definitively demonstrate concurrent redox reactions of both polythiophene and viologen in solid-state devices and correlate such reactions with device conductivity. The mechanism deduced from spectroscopic and electronic monitoring should guide significant improvements in memory performance.

  15. Configurable Resistive Switching between Memory and Threshold Characteristics for Protein-Based Devices

    KAUST Repository

    Wang, Hong

    2015-05-01

    The employ of natural biomaterials as the basic building blocks of electronic devices is of growing interest for biocompatible and green electronics. Here, resistive switching (RS) devices based on naturally silk protein with configurable functionality are demonstrated. The RS type of the devices can be effectively and exactly controlled by controlling the compliance current in the set process. Memory RS can be triggered by a higher compliance current, while threshold RS can be triggered by a lower compliance current. Furthermore, two types of memory devices, working in random access and WORM modes, can be achieved with the RS effect. The results suggest that silk protein possesses the potential for sustainable electronics and data storage. In addition, this finding would provide important guidelines for the performance optimization of biomaterials based memory devices and the study of the underlying mechanism behind the RS effect arising from biomaterials. Resistive switching (RS) devices with configurable functionality based on protein are successfully achieved. © 2015 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  16. Electronic memory devices based on the chalcone with negative electrostatic potential regions

    Energy Technology Data Exchange (ETDEWEB)

    Yan, Bao-Long; Sun, Ru; Ge, Jian-Feng, E-mail: ge_jianfeng@hotmail.com; Wang, Dong; Li, Hua; Lu, Jian-Mei, E-mail: lujm@suda.edu.cn

    2013-10-01

    The molecular electrostatic potential (ESP) properties were used for the explanation of organic electric memory ability. Several chalcone compounds, owning a negative ESP region locates at the oxygen atom, were selected in this paper to validate the selection of compounds for organic memory materials. The synthesis, characterization, fabrication of the organic memory devices and the electrical properties for them were reported, and they were shown as WORM (write once read many times) type memory devices. The molecular geometries were optimized by the addition of a changeable electric field in the x direction inside the molecules using FF-DFT (Finite Field-Density Functionary Theory) method. The relationship between ESP of the molecules under different electric field and the property was discussed, and the mechanisms associated with the memory effect were also elucidated from DFT calculation results. - Highlights: • The molecular electrostatic potential (ESP) properties were used. • The chalcone compounds were used for the WORM type device. • The molecular geometries were optimized by the addition of a changeable electric field in the x direction. • The structure–property relationship was discussed.

  17. Exploration of Uninitialized Configuration Memory Space for Intrinsic Identification of Xilinx Virtex-5 FPGA Devices

    Directory of Open Access Journals (Sweden)

    Oliver Sander

    2012-01-01

    Full Text Available SRAM-based fingerprinting uses deviations in power-up behaviour caused by the CMOS fabrication process to identify distinct devices. This method is a promising technique for unique identification of physical devices. In the case of SRAM-based hardware reconfigurable devices such as FPGAs, the integrated SRAM cells are often initialized automatically at power-up, sweeping potential identification data. We demonstrate an approach to utilize unused parts of configuration memory space for device identification. Based on a total of over 200,000 measurements on nine Xilinx Virtex-5 FPGAs, we show that the retrieved values have promising properties with respect to consistency on one device, variety between different devices, and stability considering temperature variation and aging.

  18. High performance electrical, magnetic, electromagnetic and electrooptical devices enabled by three dimensionally ordered nanodots and nanorods

    Science.gov (United States)

    Goyal, Amit , Kang; Sukill, [Knoxville, TN

    2012-02-21

    Novel articles and methods to fabricate same with self-assembled nanodots and/or nanorods of a single or multicomponent material within another single or multicomponent material for use in electrical, electronic, magnetic, electromagnetic and electrooptical devices is disclosed. Self-assembled nanodots and/or nanorods are ordered arrays wherein ordering occurs due to strain minimization during growth of the materials. A simple method to accomplish this when depositing in-situ films is also disclosed. Device applications of resulting materials are in areas of superconductivity, photovoltaics, ferroelectrics, magnetoresistance, high density storage, solid state lighting, non-volatile memory, photoluminescence, thermoelectrics and in quantum dot lasers.

  19. High performance superconducting devices enabled by three dimensionally ordered nanodots and/or nanorods

    Science.gov (United States)

    Goyal, Amit

    2013-09-17

    Novel articles and methods to fabricate same with self-assembled nanodots and/or nanorods of a single or multicomponent material within another single or multicomponent material for use in electrical, electronic, magnetic, electromagnetic and electrooptical devices is disclosed. Self-assembled nanodots and/or nanorods are ordered arrays wherein ordering occurs due to strain minimization during growth of the materials. A simple method to accomplish this when depositing in-situ films is also disclosed. Device applications of resulting materials are in areas of superconductivity, photovoltaics, ferroelectrics, magnetoresistance, high density storage, solid state lighting, non-volatile memory, photoluminescence, thermoelectrics and in quantum dot lasers.

  20. High performance devices enabled by epitaxial, preferentially oriented, nanodots and/or nanorods

    Science.gov (United States)

    Goyal, Amit [Knoxville, TN

    2011-10-11

    Novel articles and methods to fabricate same with self-assembled nanodots and/or nanorods of a single or multicomponent material within another single or multicomponent material for use in electrical, electronic, magnetic, electromagnetic, superconducting and electrooptical devices is disclosed. Self-assembled nanodots and/or nanorods are ordered arrays wherein ordering occurs due to strain minimization during growth of the materials. A simple method to accomplish this when depositing in-situ films is also disclosed. Device applications of resulting materials are in areas of superconductivity, photovoltaics, ferroelectrics, magnetoresistance, high density storage, solid state lighting, non-volatile memory, photoluminescence, thermoelectrics and in quantum dot lasers.

  1. Non-volatile fission product core release model evaluation in ISAAC 2.0 code

    International Nuclear Information System (INIS)

    Song, Y. M.; Park, S. Y.; Kim, H. D.

    2004-01-01

    To evaluate fission product core release behavior in ISAAC 2.0 code, which is an integrated severe accident computer code for PHWR plants, release fractions according to core release models and/or options are analyzed for major non-volatile fission product species under severe accident conditions. The upgrade models in ISAAC 2.0 beta version (2003), which has revised from ISAAC 1.0 (1995), are used as simulation tools and the reference plant is Wolsong 2/3/4 units. For the analyzed sequence, a hypothetical conservative large LOCA is selected initiated by a guillotine break in the reactor outlet header with total loss of feed water assuming that most of safety systems are not available. As analysis results, the release fractions of upgrade models were higher in the order of ORNL-B, CORSOR-M and CORSOR-O models and the release fractions of existing models were similar with the CORSOR-O case. In conclusion, most non-volatile fission products except Sb species whose initial inventory is very small are transported together with corium under severe accident conditions while only small amount (less than maximum several percents) are released and distributed into other regions due to their non-volatile characteristics. This model evaluation will help users to predict the difference and uncertainty among core release models, which results in easier comparison with other competitive codes

  2. Supercritical fluid extraction of volatile and non-volatile compounds from Schinus molle L.

    Directory of Open Access Journals (Sweden)

    M. S. T. Barroso

    2011-06-01

    Full Text Available Schinus molle L., also known as pepper tree, has been reported to have antimicrobial, antifungal, anti-inflammatory, antispasmodic, antipyretic, antitumoural and cicatrizing properties. This work studies supercritical fluid extraction (SFE to obtain volatile and non-volatile compounds from the aerial parts of Schinus molle L. and the influence of the process on the composition of the extracts. Experiments were performed in a pilot-scale extractor with a capacity of 1 L at pressures of 9, 10, 12, 15 and 20 MPa at 323.15 K. The volatile compounds were obtained by CO2 supercritical extraction with moderate pressure (9 MPa, whereas the non-volatile compounds were extracted at higher pressure (12 to 20 MPa. The analysis of the essential oil was carried out by GC-MS and the main compounds identified were sabinene, limonene, D-germacrene, bicyclogermacrene, and spathulenol. For the non-volatile extracts, the total phenolic content was determined by the Folin-Ciocalteau method. Moreover, one of the goals of this study was to compare the experimental data with the simulated yields predicted by a mathematical model based on mass transfer. The model used requires three adjustable parameters to predict the experimental extraction yield curves.

  3. High-performance nonvolatile Al/AlOx/CdTe:Sb nanowire memory device

    International Nuclear Information System (INIS)

    Xie Chao; Wu Yucheng; Nie Biao; Zhu Long; Zeng Longhui; Yu Yongqiang; Wang Xianhe; Luo Linbao; Fang Qunling

    2013-01-01

    Here we demonstrate a room temperature processed nonvolatile memory device based on an Al/AlO x /CdTe:Sb nanowire (NW) heterojunction. Electrical analysis shows an echelon hysteresis composed of a high-resistance state (HRS) and a low-resistance state (LRS), which can allow it to write and erase data from the device. The conductance ratio is as high as 10 6 , with a retention time of 3 × 10 4 s. Moreover, the SET voltages ranged from +6 to +8 V, whilst the RESET voltage ∼0 V. In addition, flexible memory nano-devices on PET substrate with comparable switching performance at bending condition were fabricated. XPS analysis of the Al/AlO x /CdTe:Sb NW heterojunction after controlled Ar + bombardment reveals that this memory behavior is associated with the presence of ultra-thin AlO x film. This Al/AlO x /CdTe:Sb NW heterojunction will open up opportunities for new memory devices with different configurations. (paper)

  4. Nonvolatile memory device using gold nanoparticles covalently bound to reduced graphene oxide.

    Science.gov (United States)

    Cui, Peng; Seo, Sohyeon; Lee, Junghyun; Wang, Luyang; Lee, Eunkyo; Min, Misook; Lee, Hyoyoung

    2011-09-27

    Nonvolatile memory devices using gold nanoparticles (AuNPs) and reduced graphene oxide (rGO) sheets were fabricated in both horizontal and vertical structures. The horizontal memory device, in which a singly and doubly overlayered semiconducting rGO channel was formed by simply using a spin-casting technique to connect two gold electrodes, was designed for understanding the origin of charging effects. AuNPs were chemically bound to the rGO channel through a π-conjugated molecular linker. The π-conjugated bifunctional molecular linker, 4-mercapto-benzenediazonium tetrafluoroborate (MBDT) salt, was newly synthesized and used as a molecular bridge to connect the AuNPs and rGOs. By using a self-assembly technique, the diazonium functional group of the MBDT molecular linker was spontaneously immobilized on the rGOs. Then, the monolayered AuNPs working as capacitors were covalently connected to the thiol groups of the MBDT molecules, which were attached to rGOs (AuNP-frGO). These covalent bonds were confirmed by XPS analyses. The current-voltage characteristics of both the horizontal and vertical AuNP-frGO memory devices showed noticeable nonlinear hysteresis, stable write-multiple read-erase-multiple read cycles over 1000 s, and a long retention time over 700 s. In addition, the vertical AuNP-frGO memory device showed a large current ON/OFF ratio and high stability. © 2011 American Chemical Society

  5. An intensive study of LPCVD silicon morphology and texture for non volatile memory

    NARCIS (Netherlands)

    Klootwijk, J.H.; van Kranenburg, H.; Cobianu, C.; Petrescu, V.; Woerlee, P.H.; Wallinga, Hans

    1995-01-01

    Results of an intensive study by means of XRD, SEM, AFM and TEM of the microstructure (i.e. the texture and morphology) of LPCVD silicon layers as a function of different process parameters are described. The influence of different deposition parameters, like partial and total pressure, doping,

  6. Integrating Two-Dimensional Nanomaterials and Molecular Dielectrics for Radiation-Hard Non-Volatile Memory

    Data.gov (United States)

    National Aeronautics and Space Administration — The space radiation environment presents a significant hazard to the critical electronic components used in a variety of space applications. Many such applications...

  7. A bio-inspired memory device based on interfacing Physarum polycephalum with an organic semiconductor

    Energy Technology Data Exchange (ETDEWEB)

    Romeo, Agostino; Dimonte, Alice; Tarabella, Giuseppe; D’Angelo, Pasquale, E-mail: dangelo@imem.cnr.it, E-mail: iannotta@imem.cnr.it; Erokhin, Victor; Iannotta, Salvatore, E-mail: dangelo@imem.cnr.it, E-mail: iannotta@imem.cnr.it [IMEM-CNR, Institute of Materials for Electronics and Magnetism-National Research Council, Parma 43124 (Italy)

    2015-01-01

    The development of devices able to detect and record ion fluxes is a crucial point in order to understand the mechanisms that regulate communication and life of organisms. Here, we take advantage of the combined electronic and ionic conduction properties of a conducting polymer to develop a hybrid organic/living device with a three-terminal configuration, using the Physarum polycephalum Cell (PPC) slime mould as a living bio-electrolyte. An over-oxidation process induces a conductivity switch in the polymer, due to the ionic flux taking place at the PPC/polymer interface. This behaviour endows a current-depending memory effect to the device.

  8. Low-energy Resistive Random Access Memory Devices with No Need for a Compliance Current

    OpenAIRE

    Xu, Zedong; Yu, Lina; Wu, Yong; Dong, Chang; Deng, Ning; Xu, Xiaoguang; Miao, J.; Jiang, Yong

    2015-01-01

    A novel resistive random access memory device is designed with SrTiO3/ La2/3Sr1/3MnO3 (LSMO)/MgAl2O4 (MAO)/Cu structure, in which metallic epitaxial LSMO is employed as the bottom electrode rather than traditional metal materials. In this device, the critical external compliance current is no longer necessary due to the high self-resistance of LSMO. The LMSO bottom electrode can act as a series resistor to offer a compliance current during the set process. Besides, the device also has excelle...

  9. Anomalous Threshold Voltage Variability of Nitride Based Charge Storage Nonvolatile Memory Devices

    Directory of Open Access Journals (Sweden)

    Meng Chuan Lee

    2013-01-01

    Full Text Available Conventional technology scaling is implemented to meet the insatiable demand of high memory density and low cost per bit of charge storage nonvolatile memory (NVM devices. In this study, effect of technology scaling to anomalous threshold voltage ( variability is investigated thoroughly on postcycled and baked nitride based charge storage NVM devices. After long annealing bake of high temperature, cell’s variability of each subsequent bake increases within stable distribution and found exacerbate by technology scaling. Apparent activation energy of this anomalous variability was derived through Arrhenius plots. Apparent activation energy (Eaa of this anomalous variability is 0.67 eV at sub-40 nm devices which is a reduction of approximately 2 times from 110 nm devices. Technology scaling clearly aggravates this anomalous variability, and this poses reliability challenges to applications that demand strict control, for example, reference cells that govern fundamental program, erase, and verify operations of NVM devices. Based on critical evidence, this anomalous variability is attributed to lateral displacement of trapped charges in nitride storage layer. Reliability implications of this study are elucidated. Moreover, potential mitigation methods are proposed to complement technology scaling to prolong the front-runner role of nitride based charge storage NVM in semiconductor flash memory market.

  10. Memory effects in a Al/Ti:HfO2/CuPc metal-oxide-semiconductor device

    Science.gov (United States)

    Tripathi, Udbhav; Kaur, Ramneek

    2016-05-01

    Metal oxide semiconductor structured organic memory device has been successfully fabricated. Ti doped hafnium oxide (Ti:HfO2) nanoparticles has been fabricated by precipitation method and further calcinated at 800 °C. Copper phthalocyanine, a hole transporting material has been utilized as an organic semiconductor. The electrical properties of the fabricated device have been studied by measuring the current-voltage and capacitance-voltage characteristics. The amount of charge stored in the nanoparticles has been calculated by using flat band condition. This simple approach for fabricating MOS memory device has opens up opportunities for the development of next generation memory devices.

  11. Emerging memory technologies design, architecture, and applications

    CERN Document Server

    2014-01-01

    This book explores the design implications of emerging, non-volatile memory (NVM) technologies on future computer memory hierarchy architecture designs. Since NVM technologies combine the speed of SRAM, the density of DRAM, and the non-volatility of Flash memory, they are very attractive as the basis for future universal memories. This book provides a holistic perspective on the topic, covering modeling, design, architecture and applications. The practical information included in this book will enable designers to exploit emerging memory technologies to improve significantly the performance/power/reliability of future, mainstream integrated circuits. • Provides a comprehensive reference on designing modern circuits with emerging, non-volatile memory technologies, such as MRAM and PCRAM; • Explores new design opportunities offered by emerging memory technologies, from a holistic perspective; • Describes topics in technology, modeling, architecture and applications; • Enables circuit designers to ex...

  12. CMOS Compatible Nonvolatile Memory Devices Based on SiO2/Cu/SiO2 Multilayer Films

    Science.gov (United States)

    Wang, Yan; Liu, Qi; Lu, Hang-Bing; Long, Shi-Bing; Zhang, Sen; Li, Ying-Tao; Lian, Wen-Tai; Yang, Jian-Hong; Liu, Ming

    2011-07-01

    We systematically investigate the resistive switching characteristics of SiO2 films with a Cu/SiO2/Cu/SiO2/Pt multilayer structure. The device exhibits good resistive switching performances, including a high ON/OFF resistance ratio (>103), good retention characteristic (>104s), satisfactory switching endurance (>200 cycles), a fast programming speed (<100 ns) and a high device yield (~100%). Considering these results, SiO2-based memories have highly promising applications for nonvolatile memory devices.

  13. Feasibility study of molecular memory device based on DNA using methylation to store information

    Energy Technology Data Exchange (ETDEWEB)

    Jiang, Liming; Al-Dirini, Feras [Department of Electrical and Electronic Engineering, The University of Melbourne, Parkville 3010 (Australia); Center for Neural Engineering (CfNE), The University of Melbourne, Carlton 3053 (Australia); National ICT Australia, The University of Melbourne, Parkville 3010 (Australia); Qiu, Wanzhi; Skafidas, Efstratios, E-mail: sskaf@unimelb.edu.au [Department of Electrical and Electronic Engineering, The University of Melbourne, Parkville 3010 (Australia); Center for Neural Engineering (CfNE), The University of Melbourne, Carlton 3053 (Australia); Hossain, Faruque M. [Center for Neural Engineering (CfNE), The University of Melbourne, Carlton 3053 (Australia); Evans, Robin [Department of Electrical and Electronic Engineering, The University of Melbourne, Parkville 3010 (Australia)

    2016-07-14

    DNA, because of its robustness and dense information storage capability, has been proposed as a potential candidate for next-generation storage media. However, encoding information into the DNA sequence requires molecular synthesis technology, which to date is costly and prone to synthesis errors. Reading the DNA strand information is also complex. Ideally, DNA storage will provide methods for modifying stored information. Here, we conduct a feasibility study investigating the use of the DNA 5-methylcytosine (5mC) methylation state as a molecular memory to store information. We propose a new 1-bit memory device and study, based on the density functional theory and non-equilibrium Green's function method, the feasibility of electrically reading the information. Our results show that changes to methylation states lead to changes in the peak of negative differential resistance which can be used to interrogate memory state. Our work demonstrates a new memory concept based on methylation state which can be beneficial in the design of next generation DNA based molecular electronic memory devices.

  14. Feasibility study of molecular memory device based on DNA using methylation to store information

    International Nuclear Information System (INIS)

    Jiang, Liming; Al-Dirini, Feras; Qiu, Wanzhi; Skafidas, Efstratios; Hossain, Faruque M.; Evans, Robin

    2016-01-01

    DNA, because of its robustness and dense information storage capability, has been proposed as a potential candidate for next-generation storage media. However, encoding information into the DNA sequence requires molecular synthesis technology, which to date is costly and prone to synthesis errors. Reading the DNA strand information is also complex. Ideally, DNA storage will provide methods for modifying stored information. Here, we conduct a feasibility study investigating the use of the DNA 5-methylcytosine (5mC) methylation state as a molecular memory to store information. We propose a new 1-bit memory device and study, based on the density functional theory and non-equilibrium Green's function method, the feasibility of electrically reading the information. Our results show that changes to methylation states lead to changes in the peak of negative differential resistance which can be used to interrogate memory state. Our work demonstrates a new memory concept based on methylation state which can be beneficial in the design of next generation DNA based molecular electronic memory devices.

  15. Technology for Sustainment of Strategic Systems. Report Memory (MRAM) Product Development

    National Research Council Canada - National Science Library

    Beck, Vicki

    2004-01-01

    ...) Honeywell is developing radiation-hardened Magneto-resistive Random Access Memory (MRAM) non-volatile memory for military and aerospace products where data processing and storage performance is critical utilizing Motorola technology...

  16. Next generation Associative Memory devices for the FTK tracking processor of the ATLAS experiment

    CERN Document Server

    Andreani, A; The ATLAS collaboration; Beccherle, B; Beretta, M; Citterio, M; Crescioli, F; Colombo, A; Giannetti, P; Liberali, V; Shojaii, J; Stabile, A

    2013-01-01

    The AMchip is a VLSI device that implements the associative memory function, a special content addressable memory specifically designed for high energy physics applications and first used in the CDF experiment at Tevatron. The 4th generation of AMchip has been developed for the core pattern recognition stage of the Fast TracKer (FTK) processor: a hardware processor for online reconstruction of particle trajectories at the ATLAS experiment at LHC. We present the architecture, design considerations, power consumption and performance measurements of the 4th generation of AMchip. We present also the design innovations toward the 5th generation and the first prototype results.

  17. Optical proximity correction for 0.15-μm-rule memory devices

    Science.gov (United States)

    Iwasaki, Haruo; Tanabe, Hiroyoshi; Inoue, Takashi; Tanaka, Yoshiyuki

    1998-12-01

    Optical proximity correction (OPC) is applied to the cell patterns of 0.15-micrometer-rule memory devices. Two kinds of memory cell patterns are studied. The first is a wire pattern which has small gaps between two wires. The small gaps can be clearly resolved by using OPC such as jogs or resizing. The second pattern is a storage node pattern which has a rectangular shape. The area of the storage node is enlarged by using OPC such as resizing, hammer heads or serifs. These OPC masks are successfully fabricated by using dry etching process.

  18. A Supramolecular Nanofiber-Based Passive Memory Device for Remembering Past Humidity.

    Science.gov (United States)

    Mogera, Umesha; Gedda, Murali; George, Subi J; Kulkarni, Giridhar U

    2017-09-20

    Memorizing the magnitude of a physical parameter such as relative humidity in a consignment may be useful for maintaining recommended conditions over a period of time. In relation to cost and energy considerations, it is important that the memorizing device works in the unpowered passive state. In this article, we report the fabrication of a humidity-responsive device that can memorize the humidity condition it had experienced while being unpowered. The device makes use of supramolecular nanofibers obtained from the self-assembly of donor-acceptor (D-A) molecules, coronene tetracarboxylate salt (CS) and dodecyl methyl viologen (DMV), respectively, from aqueous medium. The fibers, while being highly sensitive to humidity, tend to develop electrically induced disorder under constant voltage, leading to increased resistance with time. The conducting state can be regained via self-assembly by exposing the device to humidity in the absence of applied voltage, the extent of recovery depending on the magnitude of the humidity applied under no bias. This nature of the fibers has been exploited in reading the humidity memory state, which interestingly is independent of the lapsed time since the humidity exposure as well as the duration of exposure. Importantly, the device is capable of differentiating the profiles of varying humidity conditions from its memory. The device finds use in applications requiring stringent condition monitoring.

  19. Compact Modeling Solutions for Oxide-Based Resistive Switching Memories (OxRAM

    Directory of Open Access Journals (Sweden)

    Marc Bocquet

    2014-01-01

    Full Text Available Emerging non-volatile memories based on resistive switching mechanisms attract intense R&D efforts from both academia and industry. Oxide-based Resistive Random Acces Memories (OxRAM gather noteworthy performances, such as fast write/read speed, low power and high endurance outperforming therefore conventional Flash memories. To fully explore new design concepts such as distributed memory in logic, OxRAM compact models have to be developed and implemented into electrical simulators to assess performances at a circuit level. In this paper, we present compact models of the bipolar OxRAM memory based on physical phenomenons. This model was implemented in electrical simulators for single device up to circuit level.

  20. Spin-transfer torque magnetoresistive random-access memory technologies for normally off computing (invited)

    International Nuclear Information System (INIS)

    Ando, K.; Yuasa, S.; Fujita, S.; Ito, J.; Yoda, H.; Suzuki, Y.; Nakatani, Y.; Miyazaki, T.

    2014-01-01

    Most parts of present computer systems are made of volatile devices, and the power to supply them to avoid information loss causes huge energy losses. We can eliminate this meaningless energy loss by utilizing the non-volatile function of advanced spin-transfer torque magnetoresistive random-access memory (STT-MRAM) technology and create a new type of computer, i.e., normally off computers. Critical tasks to achieve normally off computers are implementations of STT-MRAM technologies in the main memory and low-level cache memories. STT-MRAM technology for applications to the main memory has been successfully developed by using perpendicular STT-MRAMs, and faster STT-MRAM technologies for applications to the cache memory are now being developed. The present status of STT-MRAMs and challenges that remain for normally off computers are discussed

  1. Spin-transfer torque magnetoresistive random-access memory technologies for normally off computing (invited)

    Energy Technology Data Exchange (ETDEWEB)

    Ando, K., E-mail: ando-koji@aist.go.jp; Yuasa, S. [National Institute of Advanced Industrial Science and Technology (AIST), Tsukuba 305-8568 (Japan); Fujita, S.; Ito, J.; Yoda, H. [Toshiba Corporation, Kawasaki 212-8582 (Japan); Suzuki, Y. [Graduate School of Engineering Science, Osaka University, Toyonaka 560-8531 (Japan); Nakatani, Y. [Department of Communication Engineering and Informatics, University of Electro-Communication, Chofu 182-8585 (Japan); Miyazaki, T. [WPI-AIMR, Tohoku University, Sendai 980-8577 (Japan)

    2014-05-07

    Most parts of present computer systems are made of volatile devices, and the power to supply them to avoid information loss causes huge energy losses. We can eliminate this meaningless energy loss by utilizing the non-volatile function of advanced spin-transfer torque magnetoresistive random-access memory (STT-MRAM) technology and create a new type of computer, i.e., normally off computers. Critical tasks to achieve normally off computers are implementations of STT-MRAM technologies in the main memory and low-level cache memories. STT-MRAM technology for applications to the main memory has been successfully developed by using perpendicular STT-MRAMs, and faster STT-MRAM technologies for applications to the cache memory are now being developed. The present status of STT-MRAMs and challenges that remain for normally off computers are discussed.

  2. Magnetic resonance flow velocity and temperature mapping of a shape memory polymer foam device

    Directory of Open Access Journals (Sweden)

    Wilson Thomas S

    2009-12-01

    Full Text Available Abstract Background Interventional medical devices based on thermally responsive shape memory polymer (SMP are under development to treat stroke victims. The goals of these catheter-delivered devices include re-establishing blood flow in occluded arteries and preventing aneurysm rupture. Because these devices alter the hemodynamics and dissipate thermal energy during the therapeutic procedure, a first step in the device development process is to investigate fluid velocity and temperature changes following device deployment. Methods A laser-heated SMP foam device was deployed in a simplified in vitro vascular model. Magnetic resonance imaging (MRI techniques were used to assess the fluid dynamics and thermal changes associated with device deployment. Results Spatial maps of the steady-state fluid velocity and temperature change inside and outside the laser-heated SMP foam device were acquired. Conclusions Though non-physiological conditions were used in this initial study, the utility of MRI in the development of a thermally-activated SMP foam device has been demonstrated.

  3. Spin orbit torques in W(O) based three terminal magnetic memory devices

    Science.gov (United States)

    Zhang, Jie; Phung, Timothy; Garg, Chirag; Rettner, Charles; Hughes, Brian. P.; Yang, See-Hun; Parkin, Stuart. S. P.

    Recently, there has been a large interest in using spin orbit torques to controllably manipulate the magnetic order parameter in several promising magnetic memory devices such as racetrack memory and spin transfer torque MRAM. The efficient operation of such devices necessitates the finding of materials which exhibit efficient conversion of charge currents to spin orbit torques. This is typically quantified by the so-called spin Hall angle. The most efficient spin orbit torque generator to date based on the use of conventional metallic materials is W(O), wherein the effective spin hall angle is found to be -0.5. Here, we explore the use of W(O) to manipulate magnetization in three terminal magnetic memory devices. We find, consistent with the large spin orbit torques, observed in W(O), that the critical current required for switching a magnetic element is significantly smaller than compared to other metallic systems such as Pt, β-W, and Ta. Lastly, we shall discuss the technologically important high speed ( ns time scale) switching dynamics in these devices and the role of complex micromagnetic states upon the switching process.

  4. Flexible All-Inorganic Perovskite CsPbBr3 Nonvolatile Memory Device.

    Science.gov (United States)

    Liu, Dongjue; Lin, Qiqi; Zang, Zhigang; Wang, Ming; Wangyang, Peihua; Tang, Xiaosheng; Zhou, Miao; Hu, Wei

    2017-02-22

    All-inorganic perovskite CsPbX 3 (X = Cl, Br, or I) is widely used in a variety of photoelectric devices such as solar cells, light-emitting diodes, lasers, and photodetectors. However, studies to understand the flexible CsPbX 3 electrical application are relatively scarce, mainly due to the limitations of the low-temperature fabricating process. In this study, all-inorganic perovskite CsPbBr 3 films were successfully fabricated at 75 °C through a two-step method. The highly crystallized films were first employed as a resistive switching layer in the Al/CsPbBr 3 /PEDOT:PSS/ITO/PET structure for flexible nonvolatile memory application. The resistive switching operations and endurance performance demonstrated the as-prepared flexible resistive random access memory devices possess reproducible and reliable memory characteristics. Electrical reliability and mechanical stability of the nonvolatile device were further tested by the robust current-voltage curves under different bending angles and consecutive flexing cycles. Moreover, a model of the formation and rupture of filaments through the CsPbBr 3 layer was proposed to explain the resistive switching effect. It is believed that this study will offer a new setting to understand and design all-inorganic perovskite materials for future stable flexible electronic devices.

  5. LDRD Final Report - Investigations of the impact of the process integration of deposited magnetic films for magnetic memory technologies on radiation hardened CMOS devices and circuits - LDRD Project (FY99)

    International Nuclear Information System (INIS)

    Myers, David R.; Jessing, Jeffrey R.; Spahn, Olga B.; Shaneyfelt, Marty R.

    2000-01-01

    This project represented a coordinated LLNL-SNL collaboration to investigate the feasibility of developing radiation-hardened magnetic non-volatile memories using giant magnetoresistance (GMR) materials. The intent of this limited-duration study was to investigate whether giant magnetoresistance (GMR) materials similar to those used for magnetic tunnel junctions (MTJs) were process compatible with functioning CMOS circuits. Sandia's work on this project demonstrated that deposition of GMR materials did not affect the operation nor the radiation hardness of Sandia's rad-hard CMOS technology, nor did the integration of GMR materials and exposure to ionizing radiation affect the magnetic properties of the GMR films. Thus, following deposition of GMR films on rad-hard integrated circuits, both the circuits and the films survived ionizing radiation levels consistent with DOE mission requirements. Furthermore, Sandia developed techniques to pattern deposited GMR films without degrading the completed integrated circuits upon which they were deposited. The present feasibility study demonstrated all the necessary processing elements to allow fabrication of the non-volatile memory elements onto an existing CMOS chip, and even allow the use of embedded (on-chip) non-volatile memories for system-on-a-chip applications, even in demanding radiation environments. However, funding agencies DTRA, AIM, and DARPA did not have any funds available to support the required follow-on technology development projects that would have been required to develop functioning prototype circuits, nor were such funds available from LDRD nor from other DOE program funds

  6. The influence of Ti doping and annealing on Ce2Ti2O7 flash memory devices

    Science.gov (United States)

    Kao, Chyuan Haur; Chen, Su Zhien; Luo, Yang; Chiu, Wang Ting; Chiu, Shih Wei; Chen, I. Chien; Lin, Chan-Yu; Chen, Hsiang

    2017-02-01

    In this research, a CeO2 film with Ti doping was used as a trapping layer in metal oxide high-K-oxide-Si (MOHOS)-type memory devices. Since incorporation of Ti atoms into the film could fix dangling bonds and defects, the Ce2Ti2O7 trapping layer with annealing treatment could have a larger memory window and a faster programming/erasing speed. To confirm the origin, multiple material analyses indicate that annealing at an appropriate temperature and Ti doping could enhance crystallization. The Ce2Ti2O7-based memory device is promising for future industrial flash memory applications.

  7. Coding for flash memories

    OpenAIRE

    Yaakobi, Eitan

    2011-01-01

    Flash memories are, by far, the most important type of non -volatile memory in use today. They are employed widely in mobile, embedded, and mass-storage applications, and the growth in this sector continues at a staggering pace. Moreover, since flash memories do not suffer from the mechanical limitations of magnetic disk drives, solid- state drives have the potential to upstage the magnetic recording industry in the foreseeable future. The research goal of this dissertation is the discovery o...

  8. Nanoscale data storage device of metallofullerene peapods

    International Nuclear Information System (INIS)

    Byun, Ki Ryang; Kang, Jeong Won; Hwang, Ho Jung

    2004-01-01

    We studied the energetics and the operations of nonvolatile nano-memory elements based on metallofullerene peapods by using classical molecular dynamics simulations. The system proposed in this work was composed of two carbon nanotubes and metallofullerenes. In classical molecular dynamics simulations, the open ends of two (10, 10) carbon nanotubes were face to face with a separation of 8 A, and the metallofullerenes shuttled between two carbon nanotubes under alternatively applied force fields. When the metallofullerenes were encapsulated in the carbon nanotubes, the electronic properties of the metallofullerene peapods were different from those of the carbon nanotubes. Therefore, these changes could be detected by a current flow change; then, the bit classifications could be done by using metallofullerene shuttle between two carbon nanotubes under applied force fields. Since the metallofullerenes encapsulated in the carbon nanotubes can hardly escape from the carbon nanotubes without external force fields, the proposed system can operate a non-volatile memory device.

  9. Nonvolatile organic write-once-read-many-times memory devices based on hexadecafluoro-copper-phthalocyanine

    Science.gov (United States)

    Wang, Lidan; Su, Zisheng; Wang, Cheng

    2012-05-01

    Nonvolatile organic write-once-read-many-times memory device was demonstrated based on hexadecafluoro-copper-phthalocyanine (F16CuPc) single layer sandwiched between indium tin oxide (ITO) anode and Al cathode. The as fabricated device remains in ON state and it can be tuned to OFF state by applying a reverse bias. The ON/OFF current ratio of the device can reach up to 2.3 × 103. Simultaneously, the device shows long-term storage stability and long retention time in air. The ON/OFF transition is attributed to the formation and destruction of the interfacial dipole layer in the ITO/F16CuPc interface, and such a mechanism is different from previously reported ones.

  10. Low-energy Resistive Random Access Memory Devices with No Need for a Compliance Current

    Science.gov (United States)

    Xu, Zedong; Yu, Lina; Wu, Yong; Dong, Chang; Deng, Ning; Xu, Xiaoguang; Miao, J.; Jiang, Yong

    2015-01-01

    A novel resistive random access memory device is designed with SrTiO3/ La2/3Sr1/3MnO3 (LSMO)/MgAl2O4 (MAO)/Cu structure, in which metallic epitaxial LSMO is employed as the bottom electrode rather than traditional metal materials. In this device, the critical external compliance current is no longer necessary due to the high self-resistance of LSMO. The LMSO bottom electrode can act as a series resistor to offer a compliance current during the set process. Besides, the device also has excellent switching features which are originated in the formation of Cu filaments under external voltage. Therefore it provides the possibility of reducing power consumption and accelerating the commercialization of resistive switching devices. PMID:25982101

  11. Chemical-Vapor-Deposited Graphene as Charge Storage Layer in Flash Memory Device

    Directory of Open Access Journals (Sweden)

    W. J. Liu

    2016-01-01

    Full Text Available We demonstrated a flash memory device with chemical-vapor-deposited graphene as a charge trapping layer. It was found that the average RMS roughness of block oxide on graphene storage layer can be significantly reduced from 5.9 nm to 0.5 nm by inserting a seed metal layer, which was verified by AFM measurements. The memory window is 5.6 V for a dual sweep of ±12 V at room temperature. Moreover, a reduced hysteresis at the low temperature was observed, indicative of water molecules or −OH groups between graphene and dielectric playing an important role in memory windows.

  12. Recent trends in hardware security exploiting hybrid CMOS-resistive memory circuits

    Science.gov (United States)

    Sahay, Shubham; Suri, Manan

    2017-12-01

    This paper provides a comprehensive review and insight of recent trends in the field of random number generator (RNG) and physically unclonable function (PUF) circuits implemented using different types of emerging resistive non-volatile (NVM) memory devices. We present a detailed review of hybrid RNG/PUF implementations based on the use of (i) Spin-Transfer Torque (STT-MRAM), and (ii) metal-oxide based (OxRAM), NVM devices. Various approaches on Hybrid CMOS-NVM RNG/PUF circuits are considered, followed by a discussion on different nanoscale device phenomena. Certain nanoscale device phenomena (variability/stochasticity etc), which are otherwise undesirable for reliable memory and storage applications, form the basis for low power and highly scalable RNG/PUF circuits. Detailed qualitative comparison and benchmarking of all implementations is performed.

  13. Magnetic Shape Memory Alloys as smart materials for micro-positioning devices

    Directory of Open Access Journals (Sweden)

    A. Hubert

    2012-10-01

    Full Text Available In the field of microrobotics, actuators based on smart materials are predominant because of very good precision, integration capabilities and high compactness. This paper presents the main characteristics of Magnetic Shape Memory Alloys as new candidates for the design of micromechatronic devices. The thermo-magneto-mechanical energy conversion process is first presented followed by the adequate modeling procedure required to design actuators. Finally, some actuators prototypes realized at the Femto-ST institute are presented, including a push-pull bidirectional actuator. Some results on the control and performances of these devices conclude the paper.

  14. Metal-free, single-polymer device exhibits resistive memory effect

    KAUST Repository

    Bhansali, Unnat Sampatraj

    2013-12-23

    All-polymer, write-once-read-many times resistive memory devices have been fabricated on flexible substrates using a single polymer, poly(3,4- ethylenedioxythiophene):polystyrene sulfonate (PEDOT:PSS). Spin-cast or inkjet-printed films of solvent-modified PEDOT:PSS are used as electrodes, while the unmodified or as-is PEDOT:PSS is used as the semiconducting active layer. The all-polymer devices exhibit an irreversible but stable transition from a low resistance state (ON) to a high resistance state (OFF) at low voltages caused by an electric-field-induced morphological rearrangement of PEDOT and PSS at the electrode interface. However, in the metal-PEDOT:PSS-metal devices, we have shown a metal filament formation switching the device from an initial high resistance state (OFF) to the low resistance state (ON). The all-PEDOT:PSS memory device has low write voltages (<3 V), high ON/OFF ratio (>10 3), good retention characteristics (>10 000 s), and stability in ambient storage (>3 months). © 2013 American Chemical Society.

  15. Metal oxide resistive random access memory based synaptic devices for brain-inspired computing

    Science.gov (United States)

    Gao, Bin; Kang, Jinfeng; Zhou, Zheng; Chen, Zhe; Huang, Peng; Liu, Lifeng; Liu, Xiaoyan

    2016-04-01

    The traditional Boolean computing paradigm based on the von Neumann architecture is facing great challenges for future information technology applications such as big data, the Internet of Things (IoT), and wearable devices, due to the limited processing capability issues such as binary data storage and computing, non-parallel data processing, and the buses requirement between memory units and logic units. The brain-inspired neuromorphic computing paradigm is believed to be one of the promising solutions for realizing more complex functions with a lower cost. To perform such brain-inspired computing with a low cost and low power consumption, novel devices for use as electronic synapses are needed. Metal oxide resistive random access memory (ReRAM) devices have emerged as the leading candidate for electronic synapses. This paper comprehensively addresses the recent work on the design and optimization of metal oxide ReRAM-based synaptic devices. A performance enhancement methodology and optimized operation scheme to achieve analog resistive switching and low-energy training behavior are provided. A three-dimensional vertical synapse network architecture is proposed for high-density integration and low-cost fabrication. The impacts of the ReRAM synaptic device features on the performances of neuromorphic systems are also discussed on the basis of a constructed neuromorphic visual system with a pattern recognition function. Possible solutions to achieve the high recognition accuracy and efficiency of neuromorphic systems are presented.

  16. Effect of vacuum annealing on evaporated pentacene thin films for memory device applications

    International Nuclear Information System (INIS)

    Gayathri, A.G.; Joseph, C.M.

    2016-01-01

    Graphical abstract: Switching of ITO/pentacene/Al thin films for different annealing temperatures. - Highlights: • Memory device performance in pentacene improved considerably with annealing. • ON/OFF ratio of the pentacene device increases due to annealing. • Threshold voltage reduces from 2.55 V to 1.35 V due to annealing. • Structure of pentacene thin films is also dependent on annealing temperature. - Abstract: Thin films of pentacene were deposited thermally onto glass substrates and annealed at 323 K, 373 K, 423 K, 473 K and 523 K in high vacuum. Effect of annealing on the morphological and structural properties of these films was studied. X-ray diffraction patterns confirmed the crystalline nature of the films. Electrical studies for the use as write once read many (WORM) memory devices were done for the vacuum deposited pentacene thin films on indium tin oxide coated glass. Due to annealing, a sharp increase in the ON/OFF ratio of current and a decrease in threshold voltage were observed at around 373 K. This device showed a stable switching with an ON/OFF current ratio as high as 10 9 and a switching threshold voltage of 1.35 V. The performance of the device degraded above 423 K due to the changes in the crystallinity of the film.

  17. Interfacial behavior of resistive switching in ITO–PVK–Al WORM memory devices

    International Nuclear Information System (INIS)

    Whitcher, T J; Woon, K L; Wong, W S; Chanlek, N; Nakajima, H; Saisopa, T; Songsiriritthigul, P

    2016-01-01

    Understanding the mechanism of resistive switching in a memory device is fundamental in order to improve device performance. The mechanism of current switching in a basic organic write-once read-many (WORM) memory device is investigated by determining the energy level alignments of indium tin oxide (ITO), poly(9-vinylcarbazole) (PVK) and aluminum (Al) using x-ray and ultraviolet photoelectron spectroscopy, current–voltage characterization and Auger depth profiling. The current switching mechanism was determined to be controlled by the interface between the ITO and the PVK. The electric field applied across the device causes the ITO from the uneven surface of the anode to form metallic filaments through the PVK, causing a shorting effect within the device leading to increased conduction. This was found to be independent of the PVK thickness, although the switch-on voltage was non-linearly dependent on the thickness. The formation of these filaments also caused the destruction of the interfacial dipole at the PVK–Al interface. (paper)

  18. Interfacial behavior of resistive switching in ITO-PVK-Al WORM memory devices

    Science.gov (United States)

    Whitcher, T. J.; Woon, K. L.; Wong, W. S.; Chanlek, N.; Nakajima, H.; Saisopa, T.; Songsiriritthigul, P.

    2016-02-01

    Understanding the mechanism of resistive switching in a memory device is fundamental in order to improve device performance. The mechanism of current switching in a basic organic write-once read-many (WORM) memory device is investigated by determining the energy level alignments of indium tin oxide (ITO), poly(9-vinylcarbazole) (PVK) and aluminum (Al) using x-ray and ultraviolet photoelectron spectroscopy, current-voltage characterization and Auger depth profiling. The current switching mechanism was determined to be controlled by the interface between the ITO and the PVK. The electric field applied across the device causes the ITO from the uneven surface of the anode to form metallic filaments through the PVK, causing a shorting effect within the device leading to increased conduction. This was found to be independent of the PVK thickness, although the switch-on voltage was non-linearly dependent on the thickness. The formation of these filaments also caused the destruction of the interfacial dipole at the PVK-Al interface.

  19. Study on the Multi-level Resistance-Switching Memory and Memory-State-Dependent Photovoltage in Pt/Nd:SrTiO3 Junctions

    Science.gov (United States)

    Wang, Shengkai; Sun, Xianwen; Li, Guanghui; Jia, Caihong; Li, Guoqiang; Zhang, Weifeng

    2018-01-01

    Pt/Nd:SrTiO3 (STO)/In devices were fabricated by depositing Schottky-contact Pt and Ohmic-contact In electrodes on a single crystal STO with Nd doping. The Pt/Nd:STO/In devices show multi-level resistance-switching (RS) memory and memory-state-dependent photovoltage (PV) effects, which can be controlled by the applied pulse width or magnitude. Both the RS and PV are related to the bias-induced modulation of the interface barrier, both in height and width, at the Pt/Nd:STO interface. The results establish a strong connection between the RS/PV effects and the modulation of the Nd:STO interface triggered by applied electric field and provide a new route by using an open-circuit voltage for non-destructively sensing multiple non-volatile memory states.

  20. Germanium nanoparticles grown at different deposition times for memory device applications

    International Nuclear Information System (INIS)

    Mederos, M.; Mestanza, S.N.M.; Lang, R.; Doi, I.; Diniz, J.A.

    2016-01-01

    In the present work, circular Metal-Oxide-Semiconductor capacitors with 200 μm of diameter and germanium (Ge) nanoparticles (NPs) embedded in the gate oxide are studied for memory applications. Optimal process parameters are investigated for Ge NPs growing by low pressure chemical vapor deposition at different deposition times. Photoluminescence measurements showed room-temperature size-dependent green-red region bands attributed to quantum confinement effects present in the NPs. High-frequency capacitance versus voltage measurements demonstrated the memory effects on the MOS structures due to the presence of Ge NPs in the gate oxide acting as discrete floating gates. Current versus voltage measurements confirmed the Fowler-Nordheim tunneling as the programming mechanism of the devices. - Highlights: • Ge nanoparticles with high density and uniforms sizes were obtained by LPCVD. • Room-temperature size-dependent bands of photoluminescence were observed. • MOS capacitors with Ge nanoparticles embedded in the oxide were fabricated. • Ge nanoparticles are the main responsible for the memory properties in the devices. • Fowler-Nordheim tunneling is the conduction mechanism observed on the devices.

  1. Germanium nanoparticles grown at different deposition times for memory device applications

    Energy Technology Data Exchange (ETDEWEB)

    Mederos, M., E-mail: melissa.mederos@gmail.com [Center for Semiconductor Components and Nanotechnology (CCSNano), University of Campinas (Unicamp), Rua João Pandia Calógeras 90, Campinas, CEP: 13083-870, São Paulo (Brazil); Mestanza, S.N.M. [Federal University of ABC (UFABC), Rua Santa Adélia 166, Bangu, Santo André, CEP: 09210-170, São Paulo (Brazil); Lang, R. [Institute of Science and Technology, Federal University of São Paulo (UNIFESP), Rua Talim, 330, São José dos Campos, CEP: 12231-280, São Paulo (Brazil); Doi, I.; Diniz, J.A. [Center for Semiconductor Components and Nanotechnology (CCSNano), University of Campinas (Unicamp), Rua João Pandia Calógeras 90, Campinas, CEP: 13083-870, São Paulo (Brazil); School of Electrical and Computer Engineering, University of Campinas (Unicamp), Av. Albert Einstein 400, Campinas, CEP: 13083-852, São Paulo (Brazil)

    2016-07-29

    In the present work, circular Metal-Oxide-Semiconductor capacitors with 200 μm of diameter and germanium (Ge) nanoparticles (NPs) embedded in the gate oxide are studied for memory applications. Optimal process parameters are investigated for Ge NPs growing by low pressure chemical vapor deposition at different deposition times. Photoluminescence measurements showed room-temperature size-dependent green-red region bands attributed to quantum confinement effects present in the NPs. High-frequency capacitance versus voltage measurements demonstrated the memory effects on the MOS structures due to the presence of Ge NPs in the gate oxide acting as discrete floating gates. Current versus voltage measurements confirmed the Fowler-Nordheim tunneling as the programming mechanism of the devices. - Highlights: • Ge nanoparticles with high density and uniforms sizes were obtained by LPCVD. • Room-temperature size-dependent bands of photoluminescence were observed. • MOS capacitors with Ge nanoparticles embedded in the oxide were fabricated. • Ge nanoparticles are the main responsible for the memory properties in the devices. • Fowler-Nordheim tunneling is the conduction mechanism observed on the devices.

  2. Non-volatile high-temperature shell-magnetic pinning of Ni-Mn-Sn Heusler precipitates obtained by decomposition under magnetic field

    Science.gov (United States)

    Çakır, A.; Acet, M.

    2018-02-01

    The thermodynamic instability of the off-stoichiometric Ni49.8Mn45.1Sn5.1 martensitic Heusler causes it to decompose into ferromagnetic Ni50Mn25Sn25 precipitates and an antiferromagnetic NiMn matrix. If the decomposition takes place under an applied magnetic field, the shell of the precipitates acquires a preferred spin orientation that is strongly pinned by the anisotropy of the matrix. The pinning leads to a large vertical shift in the field dependence of the magnetization even at temperatures as high as 500 K. The positive remanence remains permanent even when the magnetic field is cycled or when the sample is directionally manipulated with respect to the external field, providing a non-volatile magnetic-field-proof memory as a further functionality to those existing in martensitic Heuslers.

  3. A novel 2 T P-channel nano-crystal memory for low power/high speed embedded NVM applications

    International Nuclear Information System (INIS)

    Zhang Junyu; Wang Yong; Liu Jing; Zhang Manhong; Xu Zhongguang; Huo Zongliang; Liu Ming

    2012-01-01

    We introduce a novel 2 T P-channel nano-crystal memory structure for low power and high speed embedded non-volatile memory (NVM) applications. By using the band-to-band tunneling-induced hot-electron (BTBTIHE) injection scheme, both high-speed and low power programming can be achieved at the same time. Due to the use of a select transistor, the 'erased states' can be set to below 0 V, so that the periphery HV circuit (high-voltage generating and management) and read-out circuit can be simplified. Good memory cell performance has also been achieved, including a fast program/erase (P/E) speed (a 1.15 V memory window under 10 μs program pulse), an excellent data retention (only 20% charge loss for 10 years). The data shows that the device has strong potential for future embedded NVM applications. (semiconductor devices)

  4. Ultra-Low Power Memory Design in Scaled Technology Nodes

    DEFF Research Database (Denmark)

    Zeinali, Behzad

    technology nodes, this thesis also investigates emerging non-volatile spintronics memories. In this respect, STT-MRAMs and SOT-MRAMs are studied and their design challenges are explored. To improve the read performance of STT-MRAMs, a novel non-destructive self-reference sensing scheme is proposed enabling...... technology nodes i.e. sub-50 nm. The 6T-SRAM designed based on the proposed device shows 18% leakage reduction and 54%, 6.6% and 3.1X improvement in read margin, write margin and write time, respectively, compared to the conventional 6T-SRAM cell. To address the standby power issue of SRAMs in scaled......In today’s chip design, robust memory design is one of the key challenges of process technology scaling. The steady pace of process technology scaling allows doubling memory array sizes approximately every 2 years. However, further scaling emerges undesirable effects which threaten the power...

  5. Systematic Development Strategy for Smart Devices Based on Shape-Memory Polymers

    Directory of Open Access Journals (Sweden)

    Andrés Díaz Lantada

    2017-10-01

    Full Text Available Shape-memory polymers are outstanding “smart” materials, which can perform important geometrical changes, when activated by several types of external stimuli, and which can be applied to several emerging engineering fields, from aerospace applications, to the development of biomedical devices. The fact that several shape-memory polymers can be structured in an additive way is an especially noteworthy advantage, as the development of advanced actuators with complex geometries for improved performance can be achieved, if adequate design and manufacturing considerations are taken into consideration. Present study presents a review of challenges and good practices, leading to a straightforward methodology (or integration of strategies, for the development of “smart” actuators based on shape-memory polymers. The combination of computer-aided design, computer-aided engineering and additive manufacturing technologies is analyzed and applied to the complete development of interesting shape-memory polymer-based actuators. Aspects such as geometrical design and optimization, development of the activation system, selection of the adequate materials and related manufacturing technologies, training of the shape-memory effect, final integration and testing are considered, as key processes of the methodology. Current trends, including the use of low-cost 3D and 4D printing, and main challenges, including process eco-efficiency and biocompatibility, are also discussed and their impact on the proposed methodology is considered.

  6. High Performance Transparent Transistor Memory Devices Using Nano-Floating Gate of Polymer/ZnO Nanocomposites

    Science.gov (United States)

    Shih, Chien-Chung; Lee, Wen-Ya; Chiu, Yu-Cheng; Hsu, Han-Wen; Chang, Hsuan-Chun; Liu, Cheng-Liang; Chen, Wen-Chang

    2016-01-01

    Nano-floating gate memory devices (NFGM) using metal nanoparticles (NPs) covered with an insulating polymer have been considered as a promising electronic device for the next-generation nonvolatile organic memory applications NPs. However, the transparency of the device with metal NPs is restricted to 60~70% due to the light absorption in the visible region caused by the surface plasmon resonance effects of metal NPs. To address this issue, we demonstrate a novel NFGM using the blends of hole-trapping poly (9-(4-vinylphenyl) carbazole) (PVPK) and electron-trapping ZnO NPs as the charge storage element. The memory devices exhibited a remarkably programmable memory window up to 60 V during the program/erase operations, which was attributed to the trapping/detrapping of charge carriers in ZnO NPs/PVPK composite. Furthermore, the devices showed the long-term retention time (>105 s) and WRER test (>200 cycles), indicating excellent electrical reliability and stability. Additionally, the fabricated transistor memory devices exhibited a relatively high transparency of 90% at the wavelength of 500 nm based on the spray-coated PEDOT:PSS as electrode, suggesting high potential for transparent organic electronic memory devices. PMID:26831222

  7. UPLC-Q-TOF-MS analysis of non-volatile migrants from new active packaging materials.

    Science.gov (United States)

    Aznar, M; Rodriguez-Lafuente, A; Alfaro, P; Nerin, C

    2012-10-01

    Ultra-performance liquid chromatography (UPLC) coupled to mass spectrometry (MS) is a useful tool in the analysis of non-volatile compounds, and the use of a quadrupole-time-of-flight (Q-TOF) mass analyzer allows a high sensitivity and accuracy when acquiring full fragment mode, providing a high assurance of correct identification of unknown compounds. In this work, UPLC-Q-TOF-MS technology has been applied to the analysis of non-volatile migrants from new active packaging materials. The materials tested were based on polypropylene (PP), ethylene-vinyl alcohol copolymer (EVOH), and poly(ethylene terephthalate) (PET). The active packaging materials studied were one PP film containing a natural antioxidant, and two PP/EVOH films, two PET/EVOH films and one coextruded PP/EVOH/PP film containing natural antimicrobials. The chemical structure of several compounds was unequivocally identified. The analysis revealed the migration of some of the active substances used in the manufacture of active packaging, such as caffeine (0.07 ± 0.01 μg/g), carvacrol (0.31 ± 0.03 μg/g) and citral (0.20 ± 0.01 μg/g). Unintentionally added substances were also found, such as citral reaction compounds, or citral impurities present in the raw materials.

  8. DESTINY: A Comprehensive Tool with 3D and Multi-Level Cell Memory Modeling Capability

    Directory of Open Access Journals (Sweden)

    Sparsh Mittal

    2017-09-01

    Full Text Available To enable the design of large capacity memory structures, novel memory technologies such as non-volatile memory (NVM and novel fabrication approaches, e.g., 3D stacking and multi-level cell (MLC design have been explored. The existing modeling tools, however, cover only a few memory technologies, technology nodes and fabrication approaches. We present DESTINY, a tool for modeling 2D/3D memories designed using SRAM, resistive RAM (ReRAM, spin transfer torque RAM (STT-RAM, phase change RAM (PCM and embedded DRAM (eDRAM and 2D memories designed using spin orbit torque RAM (SOT-RAM, domain wall memory (DWM and Flash memory. In addition to single-level cell (SLC designs for all of these memories, DESTINY also supports modeling MLC designs for NVMs. We have extensively validated DESTINY against commercial and research prototypes of these memories. DESTINY is very useful for performing design-space exploration across several dimensions, such as optimizing for a target (e.g., latency, area or energy-delay product for a given memory technology, choosing the suitable memory technology or fabrication method (i.e., 2D v/s 3D for a given optimization target, etc. We believe that DESTINY will boost studies of next-generation memory architectures used in systems ranging from mobile devices to extreme-scale supercomputers. The latest source-code of DESTINY is available from the following git repository: https://bitbucket.org/sparshmittal/destinyv2.

  9. Charging effect in Au nanoparticle memory device with biomolecule binding mechanism.

    Science.gov (United States)

    Jung, Sung Mok; Kim, Hyung-Jun; Kim, Bong-Jin; Yoon, Tae-Sik; Kim, Yong-Sang; Lee, Hyun Ho

    2011-07-01

    Organic memory device having gold nanoparticle (Au NPs) has been introduced in the structure of metal-pentacene-insulator-silicon (MPIS) capacitor device, where the Au NPs layer was formed by a new bonding method. Biomolecule binding mechanism between streptavidin and biotin was used as a strong binding method for the formation of monolayered Au NPs on polymeric dielectric of poly vinyl alcohol (PVA). The self-assembled Au NPs was functioned to show storages of charge in the MPIS device. The binding by streptavidin and biotin was confirmed by AFM and UV-VIS. The UV-VIS absorption of the Au NPs was varied at 515 nm and 525 nm depending on the coating of streptavidin. The AFM image showed no formation of multi-stacked layers of the streptavidin-capped Au NPs on biotin-NHS layer. Capacitance-voltage (C-V) performance of the memory device was measured to investigate the charging effect from Au NPs. In addition, charge retention by the Au NPs storage was tested to show 10,000 s in the C-V curve.

  10. Characterization of charge injection and trapping in scaled SONOS/MONOS memory devices

    Science.gov (United States)

    Chao, Chen-Chung; White, Marvin H.

    1987-03-01

    In this paper we investigate scaled SONOS/MONOS (polysilicon-oxide-nitride-oxide-semiconductor)/(metal-oxide-nitride-oxide-semiconductor) memory devices, and the characterization of storage traps in the nitride. The amphoteric and closely-compensating trap models, which describe the positive and negative charging of the nitride "memory" layer, have been compared. "Scaled" complementary SONOS and MONOS nonvolatile memory transistors with the nitride thickness ranging from 85 to 185 A have been designed and fabricated. The linear voltage-ramp method, which measures the flatband voltage shift and separates the charges at the injecting boundary during the WRITE/ERASE operations, has been employed to study non-steady state trapping in the nitride of "scaled" complementary SONOS/MONOS devices for low voltage E 2PROM's (electrically erasable and programmable read only memories). We have demonstrated a differential, saturated flatband voltage shift of 6.5 V with a ±8 V programming voltage for scaled-down devices with dimensions of 20 A for the tunnel oxide, 85 A for the nitride, and 51 A for the blocking oxide. Charge injection and trapping in scaled multi-dielectric structures have been modelled with an amphoteric trap concept. The trap density NT0 , ≈ 10 19 cm -3, effective capture cross section of electrons and holes, ̂gs n+, ̂gs p- ≈10 -13cm2, and effective capture cross section of neutral charge states, ̂gs n0, ̂gs p0 ≈ 10 -14cm2, have been determined with an amphoteric trap model.

  11. Memory characteristics of a self-assembled monolayer of Pt nanoparticles as a charge trapping layer

    International Nuclear Information System (INIS)

    Choi, Hyejung; Kim, Tae-Wook; Jung, Seung-Jae; Chang, Man; Lee, Takhee; Hwang, Hyunsang; Choi, Byung-Sang

    2008-01-01

    A self-assembled monolayer of Pt nanoparticles (NPs) was studied as a charge trapping layer for non-volatile memory (NVM) applications. Pt NPs with a narrow size distribution (diameter ∼4 nm) were synthesized via an alcohol reduction method. The monolayer of these Pt NPs was immobilized on a SiO 2 substrate using poly(4-vinylpyridine) (P4VP) as a surface modifier. A metal-oxide-semiconductor (MOS) type memory device with Pt NPs exhibits a relatively large memory window of 5.8 V under ± 7 V for program/erase voltage. These results indicate that the self-assembled Pt NPs can be utilized for NVM devices

  12. Enabling universal memory by overcoming the contradictory speed and stability nature of phase-change materials.

    Science.gov (United States)

    Wang, Weijie; Loke, Desmond; Shi, Luping; Zhao, Rong; Yang, Hongxin; Law, Leong-Tat; Ng, Lung-Tat; Lim, Kian-Guan; Yeo, Yee-Chia; Chong, Tow-Chong; Lacaita, Andrea L

    2012-01-01

    The quest for universal memory is driving the rapid development of memories with superior all-round capabilities in non-volatility, high speed, high endurance and low power. Phase-change materials are highly promising in this respect. However, their contradictory speed and stability properties present a key challenge towards this ambition. We reveal that as the device size decreases, the phase-change mechanism changes from the material inherent crystallization mechanism (either nucleation- or growth-dominated), to the hetero-crystallization mechanism, which resulted in a significant increase in PCRAM speeds. Reducing the grain size can further increase the speed of phase-change. Such grain size effect on speed becomes increasingly significant at smaller device sizes. Together with the nano-thermal and electrical effects, fast phase-change, good stability and high endurance can be achieved. These findings lead to a feasible solution to achieve a universal memory.

  13. Analog memory and spike-timing-dependent plasticity characteristics of a nanoscale titanium oxide bilayer resistive switching device

    Energy Technology Data Exchange (ETDEWEB)

    Seo, Kyungah; Park, Sangsu; Lee, Kwanghee; Lee, Byounghun; Hwang, Hyunsang [Department of Nanobio Materials and Electronics, Gwangju Institute of Science and Technology, Gwangju 500-712 (Korea, Republic of); Kim, Insung; Jung, Seungjae; Jo, Minseok; Park, Jubong; Shin, Jungho; Biju, Kuyyadi P; Kong, Jaemin, E-mail: kyseo@gist.ac.kr, E-mail: hwanghs@gist.ac.kr [School of Material Science and Engineering, Gwangju Institute of Science and Technology, Gwangju 500-712 (Korea, Republic of)

    2011-06-24

    We demonstrated analog memory, synaptic plasticity, and a spike-timing-dependent plasticity (STDP) function with a nanoscale titanium oxide bilayer resistive switching device with a simple fabrication process and good yield uniformity. We confirmed the multilevel conductance and analog memory characteristics as well as the uniformity and separated states for the accuracy of conductance change. Finally, STDP and a biological triple model were analyzed to demonstrate the potential of titanium oxide bilayer resistive switching device as synapses in neuromorphic devices. By developing a simple resistive switching device that can emulate a synaptic function, the unique characteristics of synapses in the brain, e.g. combined memory and computing in one synapse and adaptation to the outside environment, were successfully demonstrated in a solid state device.

  14. Impact of deposition parameters on the performance of ceria based resistive switching memories

    International Nuclear Information System (INIS)

    Zhang, Lepeng; Younis, Adnan; Chu, Dewei; Li, Sean

    2016-01-01

    Resistive-switching memories stacked in a metal–insulator–metal (MIM) like structure have shown great potential for next generation non-volatile memories. In this study, ceria based resistive memory stacks are fabricated by implementing different sputter conditions (temperatures and powers). The films deposited at low temperatures were found to have random grain orientations, less porosity and dense structure. The effect of deposition conditions on resistive switching characteristics of as-prepared films were also investigated. Improved and reliable resistive switching behaviors were achieved for the memory devices occupying less porosity and densely packed structures prepared at low temperatures. Finally, the underlying switching mechanism was also explained on the basis of quantitative analysis. (paper)

  15. Synthesis of Gold Nanoparticles Capped with Quaterthiophene for Transistor and Resistor Memory Devices

    Directory of Open Access Journals (Sweden)

    Mai Ha Hoang

    2016-01-01

    Full Text Available Recently, the fabrication of nonvolatile memory devices based on gold nanoparticles has been intensively investigated. In this work, we report on the design and synthesis of new semiconducting quaterthiophene incorporating hexyl thiol group (4TT. Gold nanoparticles capped with 4TT (4TTG were prepared in a two-phase liquid-liquid system. These nanoparticles have diameters in the range 2–6 nm and are well dispersed in the poly(3-hexylthiophene (P3HT host matrix. The intermolecular interaction between 4TT and P3HT could enhance the charge-transport between gold nanoparticles and P3HT. Transfer curve of transistor memory device made of 4TTG/P3HT hybrid film exhibited significant current hysteresis, probably arising from the energy level barrier at 4TTG/P3HT interface. Additionally, the polymer memory resistor structure with an active layer consisting of 4TTG and P3HT displayed a remarkable electrical bistable behavior.

  16. Resistive switching effect of N-doped MoS2-PVP nanocomposites films for nonvolatile memory devices

    Science.gov (United States)

    Wu, Zijin; Wang, Tongtong; Sun, Changqi; Liu, Peitao; Xia, Baorui; Zhang, Jingyan; Liu, Yonggang; Gao, Daqiang

    2017-12-01

    Resistive memory technology is very promising in the field of semiconductor memory devices. According to Liu et al, MoS2-PVP nanocomposite can be used as an active layer material for resistive memory devices due to its bipolar resistive switching behavior. Recent studies have also indicated that the doping of N element can reduce the band gap of MoS2 nanosheets, which is conducive to improving the conductivity of the material. Therefore, in this paper, we prepared N-doped MoS2 nanosheets and then fabricated N-doped MoS2-PVP nanocomposite films by spin coating. Finally, the resistive memory [C. Tan et al., Chem. Soc. Rev. 44, 2615 (2015)], device with ITO/N-doped MoS2-PVP/Pt structure was fabricated. Study on the I-V characteristics shows that the device has excellent resistance switching effect. It is worth mentioning that our device possesses a threshold voltage of 0.75 V, which is much better than 3.5 V reported previously for the undoped counterparts. The above research shows that N-doped MoS2-PVP nanocomposite films can be used as the active layer of resistive switching memory devices, and will make the devices have better performance.

  17. Impact of time and space evolution of ion tracks in nonvolatile memory cells approaching nanoscale

    International Nuclear Information System (INIS)

    Cellere, G.; Paccagnella, A.; Murat, M.; Barak, J.; Akkerman, A.; Harboe-Sorensen, R.; Virtanen, A.; Visconti, A.; Bonanomi, M.

    2010-01-01

    Swift heavy ions impacting on matter lose energy through the creation of dense tracks of charges. The study of the space and time evolution of energy exchange allows understanding the single event effects behavior in advanced microelectronic devices. In particular, the shrinking of minimum feature size of most advanced memory devices makes them very interesting test vehicles to study these effects since the device and the track dimensions are comparable; hence, measured effects are directly correlated with the time and space evolution of the energy release. In this work we are studying the time and space evolution of ion tracks by using advanced non volatile memories and Monte Carlo simulations. Experimental results are very well explained by the theoretical calculations.

  18. Anisotropic sensor and memory device with a ferromagnetic tunnel barrier as the only magnetic element.

    Science.gov (United States)

    Lόpez-Mir, L; Frontera, C; Aramberri, H; Bouzehouane, K; Cisneros-Fernández, J; Bozzo, B; Balcells, L; Martínez, B

    2018-01-16

    Multiple spin functionalities are probed on Pt/La 2 Co 0.8 Mn 1.2 O 6 /Nb:SrTiO 3 , a device composed by a ferromagnetic insulating barrier sandwiched between non-magnetic electrodes. Uniquely, La 2 Co 0.8 Mn 1.2 O 6 thin films present strong perpendicular magnetic anisotropy of magnetocrystalline origin, property of major interest for spintronics. The junction has an estimated spin-filtering efficiency of 99.7% and tunneling anisotropic magnetoresistance (TAMR) values up to 30% at low temperatures. This remarkable angular dependence of the magnetoresistance is associated with the magnetic anisotropy whose origin lies in the large spin-orbit interaction of Co 2+ which is additionally tuned by the strain of the crystal lattice. Furthermore, we found that the junction can operate as an electrically readable magnetic memory device. The findings of this work demonstrate that a single ferromagnetic insulating barrier with strong magnetocrystalline anisotropy is sufficient for realizing sensor and memory functionalities in a tunneling device based on TAMR.

  19. Comparison of single event upset rates for microelectronic memory devices during interplanetary solar particle events

    Science.gov (United States)

    Mckerracher, P. L.; Kinnison, J. D.; Maurer, R. H.

    1993-01-01

    Variability in the methods and models used for single event upset calculations in microelectronic memory devices can lead to a range of possible upset rates. Using heavy ion and proton data for selected DRAM and SRAM memories, we have calculated an array of upset rates in order to compare the Adams worst case interplanetary solar flare model to a model proposed by scientists at the Jet Propulsion Laboratory. In addition, methods of upset rate calculation are compared: the Cosmic Ray Effects on Microelectronics CREME code and a Monte Carlo algorithm developed at the Applied Physics Laboratory. The results show that use of a more realistic, although still conservative, model of the space environment can have significant cost saving benefits.

  20. Atomic-layer deposited IrO2 nanodots for charge-trap flash-memory devices

    International Nuclear Information System (INIS)

    Choi, Sangmoo; Cha, Young-Kwan; Seo, Bum-Seok; Park, Sangjin; Park, Ju-Hee; Shin, Sangmin; Seol, Kwang Soo; Park, Jong-Bong; Jung, Young-Soo; Park, Youngsoo; Park, Yoondong; Yoo, In-Kyeong; Choi, Suk-Ho

    2007-01-01

    Charge-trap flash- (CTF) memory structures have been fabricated by employing IrO 2 nanodots (NDs) grown by atomic-layer deposition. A band of isolated IrO 2 NDs of about 3 nm lying almost parallel to Si/SiO 2 interface is confirmed by transmission electron microscopy and x-ray photoelectron spectroscopy. The memory device with IrO 2 NDs shows much larger capacitance-voltage (C-V) hysteresis and memory window compared with the control sample without IrO 2 NDs. After annealing at 800 deg. C for 20 min, the ND device shows almost no change in the width of C-V hysteresis and the ND distribution. These results indicate that the IrO 2 NDs embedded in SiO 2 can be utilized as thermally stable, discrete charge traps, promising for metal oxide-ND-based CTF memory devices

  1. Defect engineering: reduction effect of hydrogen atom impurities in HfO2-based resistive-switching memory devices

    International Nuclear Information System (INIS)

    Kim, Seonghyun; Park, Jubong; Jung, Seungjae; Lee, Wootae; Shin, Jungho; Hwang, Hyunsang; Lee, Daeseok; Woo, Jiyong; Choi, Godeuni

    2012-01-01

    In this study, we propose a new and effective methodology for improving the resistive-switching performance of memory devices by high-pressure hydrogen annealing under ambient conditions. The reduction effect results in the uniform creation of oxygen vacancies that in turn enable forming-free operation and afford uniform switching characteristics. In addition, H + and mobile hydroxyl (OH − ) ions are generated, and these induce fast switching operation due to the higher mobility compared to oxygen ions. Defect engineering, specifically, the introduction of hydrogen atom impurities, improves the device performance for metal–oxide-based resistive-switching random access memory devices. (paper)

  2. Role of potential fluctuations in phase-change GST memory devices

    Energy Technology Data Exchange (ETDEWEB)

    Agarwal, Satish C. [Department of Physics, Indian Institute of Technology, Kanpur 208016 (India)

    2012-10-15

    The long range potential fluctuations (LRPFs) arising from the defects and heterogeneities in disordered semiconductors are important for understanding their atomic and electronic properties. Here, they are measured in Ge{sub X}Sb{sub Y}Te{sub 1-X-Y} (GST) chalcogenide glasses used in rewritable phase change memory (PCM) devices. It is found that the most commonly used composition Ge{sub 2}Sb{sub 2}Te{sub 5} has the smallest LRPF amongst its nearby compositions. This finding may be useful in the search for better PCM materials. (Copyright copyright 2012 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim)

  3. Charge retention of scaled SONOS nonvolatile memory devices at elevated temperatures

    Science.gov (United States)

    Yang, Yang (Larr); White, Marvin H.

    2000-06-01

    The charge retention characteristics in scaled SONOS nonvolatile memory devices with an effective gate oxide thickness of 94 Å and a tunnel oxide of 15 Å are investigated in a temperature range from room temperature to 175°C. Electron charge decay rate is sensitive to the temperature, whereas hole charge decay rate remains essentially constant. Based on experimental observations and an amphoteric trap model for nitride traps, an analytical model for charge retention of the excess electron state is developed. Using this thermal activated electron retention model, the trap distribution in energy within the nitride film is extracted.

  4. Self-formed conductive nanofilaments in (Bi, Mn)Ox for ultralow-power memory devices

    KAUST Repository

    Kang, Chen Fang

    2015-04-01

    Resistive random access memory (RRAM) is one of the most promising candidates as a next generation nonvolatile memory (NVM), owing to its superior scalability, low power consumption and high speed. From the materials science point of view, to explore optimal RRAM materials is still essential for practical application. In this work, a new material (Bi, Mn)Ox (BMO) is investigated and several key performance characteristics of Pt/BMO/Pt structured device, including switching performance, retention and endurance, are examined in details. Furthermore, it has been confirmed by high-resolution transmission electron microscopy that the underlying switching mechanism is attributed to formation and disruption of metallic conducting nanofilaments (CNFs). More importantly, the power dissipation for each CNF is as low as 3.8/20fJ for set/reset process, and a realization of cross-bar structure memory cell is demonstrated to prove the downscaling ability of proposed RRAM. These distinctive properties have important implications for understanding switching mechanisms and implementing ultralow power-dissipation RRAM based on BMO. •Self-formed conductive nanofilaments in BMO show ultralow-power memory feature.•The feature of 10nm in diameter and an average 20-30nm spacing of CNFs suggests the compatibility with the current CMOS technologies.•Power dissipation for each CNF is as low as 3.8/20fJ for set/reset process•A realization of cross-bar structure memory cell is demonstrated to prove the downscaling ability of proposed RRAM. © 2015 Elsevier Ltd.

  5. Chemical insight into origin of forming-free resistive random-access memory devices

    KAUST Repository

    Wu, X.

    2011-09-29

    We demonstrate the realization of a forming-step free resistive random access memory (RRAM) device using a HfOx/TiOx/HfOx/TiOxmultilayer structure, as a replacement for the conventional HfOx-based single layer structure. High-resolution transmission electron microscopy (HRTEM), along with electron energy loss spectroscopy(EELS)analysis has been carried out to identify the distribution and the role played by Ti in the RRAM stack. Our results show that Ti out-diffusion into the HfOx layer is the chemical cause of forming-free behavior. Moreover, the capability of Ti to change its ionic state in HfOx eases the reduction-oxidation (redox) reaction, thus lead to the RRAM devices performance improvements.

  6. Stretchable carbon nanotube charge-trap floating-gate memory and logic devices for wearable electronics.

    Science.gov (United States)

    Son, Donghee; Koo, Ja Hoon; Song, Jun-Kyul; Kim, Jaemin; Lee, Mincheol; Shim, Hyung Joon; Park, Minjoon; Lee, Minbaek; Kim, Ji Hoon; Kim, Dae-Hyeong

    2015-05-26

    Electronics for wearable applications require soft, flexible, and stretchable materials and designs to overcome the mechanical mismatch between the human body and devices. A key requirement for such wearable electronics is reliable operation with high performance and robustness during various deformations induced by motions. Here, we present materials and device design strategies for the core elements of wearable electronics, such as transistors, charge-trap floating-gate memory units, and various logic gates, with stretchable form factors. The use of semiconducting carbon nanotube networks designed for integration with charge traps and ultrathin dielectric layers meets the performance requirements as well as reliability, proven by detailed material and electrical characterizations using statistics. Serpentine interconnections and neutral mechanical plane layouts further enhance the deformability required for skin-based systems. Repetitive stretching tests and studies in mechanics corroborate the validity of the current approaches.

  7. Current Controlled Relaxation Oscillations in Ge2Sb2Te5-Based Phase Change Memory Devices

    International Nuclear Information System (INIS)

    Lu Yao-Yao; Cai Dao-Lin; Chen Yi-Feng; Wang Yue-Qing; Wei Hong-Yang; Huo Ru-Ru; Song Zhi-Tang

    2016-01-01

    The relaxation oscillation of the phase change memory (PCM) devices based on the Ge 2 Sb 2 Te 5 material is investigated by applying square current pulses. The current pulses with different amplitudes could be accurately given by the independently designed current testing system. The relaxation oscillation across the PCM device could be measured using an oscilloscope. The oscillation duration decreases with time, showing an inner link with the shrinking threshold voltage V th . However, the relaxation oscillation would not terminate until the remaining voltage V on reaches the holding voltage V h . This demonstrates that the relaxation oscillation might be controlled by V on . The increasing current amplitudes could only quicken the oscillation velocity but not be able to eliminate it, which indicates that the relaxation oscillation might be an inherent behavior for the PCM cell. (paper)

  8. CMOS-compatible spintronic devices: a review

    Science.gov (United States)

    Makarov, Alexander; Windbacher, Thomas; Sverdlov, Viktor; Selberherr, Siegfried

    2016-11-01

    For many decades CMOS devices have been successfully scaled down to achieve higher speed and increased performance of integrated circuits at lower cost. Today’s charge-based CMOS electronics encounters two major challenges: power dissipation and variability. Spintronics is a rapidly evolving research and development field, which offers a potential solution to these issues by introducing novel ‘more than Moore’ devices. Spin-based magnetoresistive random-access memory (MRAM) is already recognized as one of the most promising candidates for future universal memory. Magnetic tunnel junctions, the main elements of MRAM cells, can also be used to build logic-in-memory circuits with non-volatile storage elements on top of CMOS logic circuits, as well as versatile compact on-chip oscillators with low power consumption. We give an overview of CMOS-compatible spintronics applications. First, we present a brief introduction to the physical background considering such effects as magnetoresistance, spin-transfer torque (STT), spin Hall effect, and magnetoelectric effects. We continue with a comprehensive review of the state-of-the-art spintronic devices for memory applications (STT-MRAM, domain wall-motion MRAM, and spin-orbit torque MRAM), oscillators (spin torque oscillators and spin Hall nano-oscillators), logic (logic-in-memory, all-spin logic, and buffered magnetic logic gate grid), sensors, and random number generators. Devices with different types of resistivity switching are analyzed and compared, with their advantages highlighted and challenges revealed. CMOS-compatible spintronic devices are demonstrated beginning with predictive simulations, proceeding to their experimental confirmation and realization, and finalized by the current status of application in modern integrated systems and circuits. We conclude the review with an outlook, where we share our vision on the future applications of the prospective devices in the area.

  9. Functionalized Graphitic Carbon Nitride for Metal-free, Flexible and Rewritable Nonvolatile Memory Device via Direct Laser-Writing

    Science.gov (United States)

    Zhao, Fei; Cheng, Huhu; Hu, Yue; Song, Long; Zhang, Zhipan; Jiang, Lan; Qu, Liangti

    2014-01-01

    Graphitic carbon nitride nanosheet (g-C3N4-NS) has layered structure similar with graphene nanosheet and presents unusual physicochemical properties due to the s-triazine fragments. But their electronic and electrochemical applications are limited by the relatively poor conductivity. The current work provides the first example that atomically thick g-C3N4-NSs are the ideal candidate as the active insulator layer with tunable conductivity for achieving the high performance memory devices with electrical bistability. Unlike in conventional memory diodes, the g-C3N4-NSs based devices combined with graphene layer electrodes are flexible, metal-free and low cost. The functionalized g-C3N4-NSs exhibit desirable dispersibility and dielectricity which support the all-solution fabrication and high performance of the memory diodes. Moreover, the flexible memory diodes are conveniently fabricated through the fast laser writing process on graphene oxide/g-C3N4-NSs/graphene oxide thin film. The obtained devices not only have the nonvolatile electrical bistability with great retention and endurance, but also show the rewritable memory effect with a reliable ON/OFF ratio of up to 105, which is the highest among all the metal-free flexible memory diodes reported so far, and even higher than those of metal-containing devices. PMID:25073687

  10. Organic ferroelectric memory devices with inkjet-printed polymer electrodes on flexible substrates

    KAUST Repository

    Bhansali, Unnat Sampatraj

    2013-05-01

    Drop-on-demand piezoelectric inkjet-printing technique has been used to fabricate a functional cross-bar array of all-organic ferroelectric memory devices. The polymer-ferroelectric-polymer device consists of a ferroelectric copolymer P(VDF-TrFE) film sandwiched between inkjet-patterned, continuous, orthogonal lines of PEDOT:PSS polymer as the bottom and top electrodes. These devices exhibit well-saturated hysteresis curves with a maximum remnant polarization (Pr) = 6.7 μC/cm2, coercive field (E c) = 55 MV/m and a peak capacitance density of 45 nF/cm2. Our polarization fatigue measurements show that these devices retain ∼100% and 45% of their initial Pr values after 103 and 10 5 stress cycles, respectively. The overall performance and polarization retention characteristics of these ferroelectric capacitors with inkjet-printed polymer electrodes are comparable to metal and spin-cast polymer electrodes suggesting their potential use in large-area flexible electronics. © 2013 Elsevier Ltd. All rights reserved.

  11. Investigation of the Hydrogen Silsesquioxane (HSQ) Electron Resist as Insulating Material in Phase Change Memory Devices

    Science.gov (United States)

    Zhou, Jiao; Ji, Hongkai; Lan, Tian; Yan, Junbing; Zhou, Wenli; Miao, Xiangshui

    2015-01-01

    Phase change random access memory (PCRAM) affords many advantages over conventional solid-state memories due to its nonvolatility, high speed, and scalability. However, high programming current to amorphize the crystalline phase through the melt-quench process of PCRAM, known as the RESET current, poses a critical challenge and has become the most significant obstacle for its widespread commercialization. In this work, an excellent negative tone resist for high resolution electron beam lithography, hydrogen silsesquioxane (HSQ), has been investigated as the insulating material which locally blocks the contact between the bottom electrode and the phase change material in PCRAM devices. Fabrications of the highly scaled HSQ nanopore arrays (as small as 16 nm) are presented. The insulating properties of the HSQ material are studied, especially under e-beam exposure plus thermal curing. Some other critical issues about the thickness adjustment of HSQ films and the influence of the PCRAM electrode on electron scattering in e-beam lithography are discussed. In addition, the HSQ material was successfully integrated into the PCRAM devices, achieving ultra-low RESET current (sub-100 μA), outstanding on/off ratios (~50), and improved endurance at tens of nanometers.

  12. Nano-Floating Gate Memory Devices Composed of ZnO Thin-Film Transistors on Flexible Plastics

    Directory of Open Access Journals (Sweden)

    Park Byoungjun

    2011-01-01

    Full Text Available Abstract Nano-floating gate memory devices were fabricated on a flexible plastic substrate by a low-temperature fabrication process. The memory characteristics of ZnO-based thin-film transistors with Al nanoparticles embedded in the gate oxides were investigated in this study. Their electron mobility was found to be 0.18 cm2/V·s and their on/off ratio was in the range of 104–105. The threshold voltages of the programmed and erased states were negligibly changed up to 103 cycles. The flexibility, memory properties, and low-temperature fabrication of the nano-floating gate memory devices described herein suggest that they have potential applications for future flexible integrated electronics.

  13. Charge transport and storage of low programming voltage SONOS/MONOS memory devices

    Science.gov (United States)

    Libsch, Frank R.; White, Marvin H.

    1990-01-01

    In this paper, a model based on two carrier conduction (electrons and holes) at both injecting boundaries (semiconductor bulk and gate electrode) is introduced to interpret the ERASE/WRITE characteristics of scaled SONOS devices. The amphoteric statistics describe the positive and negative charging of the deep-level traps in the nitride "memory" layer. Scaled SONOS/MONOS (polysilicon-oxide-nitride-oxide-semiconductor)/(metal-oxide- nitride-oxide-semiconductor) transistors and capacitors with the bottom ('tunnel') oxide layer thickness around 20 Å, the final nitride layer thickness below 100 Å, and the top ('blocking') oxide layer thickness between 35-50 Å, have been fabricated and characterized. The results of the model are consistent with the experimental data, which permits physical insight into the mechanisms of charge injection, transport and storage during the ERASE/WRITE operation. Lattice imaging electron microscopy (TEM), ellipsometry, electrical capacitance, and chemical etchback techniques have been used to determine scaled SONOS/MONOS material parameters. The linear voltage ramp technique, which simultaneously measures the flatband voltage shift and separates the charges at the injecting boundary, and the dynamic pulse techniques of flatband tracking and threshold monitoring, which measure ERASE/WRITE, retention and endurance operations, have been employed to electrically characterize the scaled SONOS/MONOS devices. We have demonstrated a differential, saturated ERASE/WRITE flatband shift of 3.8 V with a ±5 V programming voltage for scaled-down SONOS/MONOS devices with dimensions of 20 Å for the tunnel oxide, 50 Å for the nitride, and 35 Å for the blocking oxide. With ±5 V saturated ERASE/WRITE programming voltages and 10 6 ERASE/WRITE cycles, extrapolated retention gives a projected 10 year 0.5 V memory window at room temperature.

  14. Transmission electron microscopy assessment of conductive-filament formation in Ni-HfO2-Si resistive-switching operational devices

    Science.gov (United States)

    Martín, Gemma; González, Mireia B.; Campabadal, Francesca; Peiró, Francesca; Cornet, Albert; Estradé, Sònia

    2018-01-01

    Resistive random-access memory (ReRAM) devices are currently the object of extensive research to replace flash non-volatile memory. However, elucidation of the conductive-filament formation mechanisms in ReRAM devices at nanoscale is mandatory. In this study, the different states created under real operation conditions of HfO2-based ReRAM devices are characterized through transmission electron microscopy and electron energy-loss spectroscopy. The physical mechanism behind the conductive-filament formation in Ni/HfO2/Si ReRAM devices based on the diffusion of Ni from the electrode to the Si substrate and of Si from the substrate to the electrode through the HfO2 layer is demonstrated.

  15. Facile Synthesis of Co9Se8Quantum Dots as Charge Traps for Flexible Organic Resistive Switching Memory Device.

    Science.gov (United States)

    Zhang, Peng; Xu, Benhua; Gao, Cunxu; Chen, Guilin; Gao, Meizhen

    2016-11-09

    Uniform Co 9 Se 8 quantum dots (CSQDs) were successfully synthesized through a facile solvothermal method. The obtained CSQDs with average size of 3.2 ± 0.1 nm and thickness of 1.8 ± 0.2 nm were demonstrated good stability and strong fluorescence under UV light after being easily dispersed in both of N,N-dimethylformamide (DMF) and deionized water. We demonstrated the flexible resistive switching memory device based on the hybridization of CSQDs and polyvinylpyrrolidone (PVP) (CSQDs-PVP). The device with the Al/CSQDs-PVP/Pt/poly(ethylene terephthalate) (PET) structure represented excellent switching parameters such as high ON/OFF current ratio, low operating voltages, good stability, and flexibility. The flexible resistive switching memory device based on hybridization of CSQDs and PVP has a great potential to be used in flexible and high-performance memory applications.

  16. Multilevel characteristics and memory mechanisms for nonvolatile memory devices based on CuInS2 quantum dot-polymethylmethacrylate nanocomposites

    International Nuclear Information System (INIS)

    Zhou, Yang; Yun, Dong Yeol; Kim, Tae Whan; Kim, Sang Wook

    2014-01-01

    Nonvolatile memory devices based on CuInS 2 (CIS) quantum dots (QDs) embedded in a polymethylmethacrylate (PMMA) layer were fabricated using spin-coating method. The memory window widths of the capacitance-voltage (C-V) curves for the Al/CIS QDs embedded in PMMA layer/p-Si devices were 0.3, 0.6, and 1.0 V for sweep voltages of ±3, ±5, and ±7 V, respectively. Capacitance-cycle data demonstrated that the charge-trapping capability of the devices with an ON/OFF ratio value of 2.81 × 10 −10 was maintained for 8 × 10 3 cycles without significant degradation and that the extrapolation of the ON/OFF ratio value to 1 × 10 6 cycles converged to 2.40 × 10 −10 , indicative of the good stability of the devices. The memory mechanisms for the devices are described on the basis of the C-V curves and the energy-band diagrams

  17. Semiconductor-Free Nonvolatile Resistive Switching Memory Devices Based on Metal Nanogaps Fabricated on Flexible Substrates via Adhesion Lithography

    KAUST Repository

    Semple, James

    2017-01-02

    Electronic memory cells are of critical importance in modern-day computing devices, including emerging technology sectors such as large-area printed electronics. One technology that has being receiving significant interest in recent years is resistive switching primarily due to its low dimensionality and nonvolatility. Here, we describe the development of resistive switching memory device arrays based on empty aluminum nanogap electrodes. By employing adhesion lithography, a low-temperature and large-area compatible nanogap fabrication technique, dense arrays of memory devices are demonstrated on both rigid and flexible plastic substrates. As-prepared devices exhibit nonvolatile memory operation with stable endurance, resistance ratios >10⁴ and retention times of several months. An intermittent analysis of the electrode microstructure reveals that controlled resistive switching is due to migration of metal from the electrodes into the nanogap under the application of an external electric field. This alternative form of resistive random access memory is promising for use in emerging sectors such as large-area electronics as well as in electronics for harsh environments, e.g., space, high/low temperature, magnetic influences, radiation, vibration, and pressure.

  18. Opportunity of spinel ferrite materials in nonvolatile memory device applications based on their resistive switching performances.

    Science.gov (United States)

    Hu, Wei; Qin, Ni; Wu, Guangheng; Lin, Yanting; Li, Shuwei; Bao, Dinghua

    2012-09-12

    The opportunity of spinel ferrites in nonvolatile memory device applications has been demonstrated by the resistive switching performance characteristics of a Pt/NiFe(2)O(4)/Pt structure, such as low operating voltage, high device yield, long retention time (up to 10(5) s), and good endurance (up to 2.2 × 10(4) cycles). The dominant conduction mechanisms are Ohmic conduction in the low-resistance state and in the lower-voltage region of the high-resistance state and Schottky emission in the higher-voltage region of the high-resistance state. On the basis of measurements of the temperature dependence of the resistances and magnetic properties in different resistance states, we explain the physical mechanism of resistive switching of Pt/NiFe(2)O(4)/Pt devices using the model of formation and rupture of conducting filaments by considering the thermal effect of oxygen vacancies and changes in the valences of cations due to the redox effect.

  19. Current-driven domain wall motion based memory devices: Application to a ratchet ferromagnetic strip

    Science.gov (United States)

    Sánchez-Tejerina, Luis; Martínez, Eduardo; Raposo, Víctor; Alejos, Óscar

    2018-04-01

    Ratchet memories, where perpendicular magnetocristalline anisotropy is tailored so as to precisely control the magnetic transitions, has been recently proven to be a feasible device to store and manipulate data bits. For such devices, it has been shown that the current-driven regime of domain walls can improve their performances with respect to the field-driven one. However, the relaxing time required by the traveling domain walls constitutes a certain drawback if the former regime is considered, since it results in longer device latencies. In order to speed up the bit shifting procedure, it is demonstrated here that the application of a current of inverse polarity during the DW relaxing time may reduce such latencies. The reverse current must be sufficiently high as to drive the DW to the equilibrium position faster than the anisotropy slope itself, but with an amplitude sufficiently low as to avoid DW backward shifting. Alternatively, it is possible to use such a reverse current to increase the proper range of operation for a given relaxing time, i.e., the pair of values of the current amplitude and pulse time that ensures single DW jumps for a certain latency time.

  20. Chemical composition and non-volatile components of three wild edible mushrooms collected from northwest Tunisia

    Directory of Open Access Journals (Sweden)

    ibtissem Kacem Jedidi

    2016-04-01

    Full Text Available In Tunisia, many people collect wild edible mushrooms as pickers for their own consumption. The present work aims at contributing to the determination of the chemical composition, non volatile components content (soluble sugars, free amino acids and minerals and trace elements of three popular Tunisian wild edible mushrooms species collected from the northwest of Tunisia (Agaricus campestris, Boletus edulis and Cantharellus cibarius.All investigated mushrooms revealed that these species are rich sources of proteins (123.70 – 374.10 g kg-1 dry weight (DW and carbohydrates (403.3 – 722.40 g kg-1 DW, and low content of fat (28.2 – 39.9 g kg-1 DW; the highest energetic contribution was guaranteed by C. cibarius (1542.71 kJ / 100 g. A. compestris (33.14 mg/g DW showed the highest concentration of essential amino acids. The composition in individual sugars was also determined, mannitol and trehalose being the most abundant sugars. C. cibarius revealed the highest concentrations of carbohydrates (722.4 g kg-1 DW and A. compestris the lowest concentration (403.3 g kg-1 DW. Potassium (K and sodium (Na are the most abundant minerals in analyzed samples (A. compestris showed the highest concentrations of K and Na, 49141.44 and 9263.886 µg/g DW respectively.

  1. Analysis of the build-up of semi and non volatile organic compounds on urban roads.

    Science.gov (United States)

    Mahbub, Parvez; Ayoko, Godwin A; Goonetilleke, Ashantha; Egodawatta, Prasanna

    2011-04-01

    Vehicular traffic in urban areas may adversely affect urban water quality through the build-up of traffic generated semi and non volatile organic compounds (SVOCs and NVOCs) on road surfaces. The characterisation of the build-up processes is the key to developing mitigation measures for the removal of such pollutants from urban stormwater. An in-depth analysis of the build-up of SVOCs and NVOCs was undertaken in the Gold Coast region in Australia. Principal Component Analysis (PCA) and Multicriteria Decision tools such as PROMETHEE and GAIA were employed to understand the SVOC and NVOC build-up under combined traffic scenarios of low, moderate, and high traffic in different land uses. It was found that congestion in the commercial areas and use of lubricants and motor oils in the industrial areas were the main sources of SVOCs and NVOCs on urban roads, respectively. The contribution from residential areas to the build-up of such pollutants was hardly noticeable. It was also revealed through this investigation that the target SVOCs and NVOCs were mainly attached to particulate fractions of 75-300 μm whilst the redistribution of coarse fractions due to vehicle activity mainly occurred in the >300 μm size range. Lastly, under combined traffic scenario, moderate traffic with average daily traffic ranging from 2300 to 5900 and average congestion of 0.47 were found to dominate SVOC and NVOC build-up on roads. Copyright © 2011 Elsevier Ltd. All rights reserved.

  2. Discharge characteristics of an ablative pulsed plasma thruster with non-volatile liquid propellant

    Science.gov (United States)

    Ling, William Yeong Liang; Schönherr, Tony; Koizumi, Hiroyuki

    2017-07-01

    Pulsed plasma thrusters (PPTs) are a form of electric spacecraft propulsion. They have an extremely simple structure and are highly suitable for nano/micro-spacecraft with weights in the kilogram range. Such small spacecraft have recently experienced increased growth but still lack suitable efficient propulsion systems. PPTs operate in a pulsed mode (one discharge = one shot) and typically use solid polytetrafluoroethylene (PTFE) as a propellant. However, new non-volatile liquids in the perfluoropolyether (PFPE) family have recently been found to be promising alternatives. A recent study presented results on the physical characteristics of PFPE vs. PTFE, showing that PFPE is superior in terms of physical characteristics such as its resistance to carbon deposition. This letter will examine the electrical discharge characteristics of PFPE vs. PTFE. The results demonstrate that PFPE has excellent shot-to-shot repeatability and a lower discharge resistance when compared with PTFE. Taken together with its physical characteristics, PFPE appears to be a strong contender to PTFE as a PPT propellant.

  3. Perpendicular spin transfer torque magnetic random access memories with high spin torque efficiency and thermal stability for embedded applications (invited)

    Energy Technology Data Exchange (ETDEWEB)

    Thomas, Luc, E-mail: luc.thomas@headway.com; Jan, Guenole; Zhu, Jian; Liu, Huanlong; Lee, Yuan-Jen; Le, Son; Tong, Ru-Ying; Pi, Keyu; Wang, Yu-Jen; Shen, Dongna; He, Renren; Haq, Jesmin; Teng, Jeffrey; Lam, Vinh; Huang, Kenlin; Zhong, Tom; Torng, Terry; Wang, Po-Kang [TDK-Headway Technologies, Inc., Milpitas, California 95035 (United States)

    2014-05-07

    Magnetic random access memories based on the spin transfer torque phenomenon (STT-MRAMs) have become one of the leading candidates for next generation memory applications. Among the many attractive features of this technology are its potential for high speed and endurance, read signal margin, low power consumption, scalability, and non-volatility. In this paper, we discuss our recent results on perpendicular STT-MRAM stack designs that show STT efficiency higher than 5 k{sub B}T/μA, energy barriers higher than 100 k{sub B}T at room temperature for sub-40 nm diameter devices, and tunnel magnetoresistance higher than 150%. We use both single device data and results from 8 Mb array to demonstrate data retention sufficient for automotive applications. Moreover, we also demonstrate for the first time thermal stability up to 400 °C exceeding the requirement of Si CMOS back-end processing, thus opening the realm of non-volatile embedded memory to STT-MRAM technology.

  4. LDRD Final Report - Investigations of the impact of the process integration of deposited magnetic films for magnetic memory technologies on radiation-hardened CMOS devices and circuits - LDRD Project (FY99)

    Energy Technology Data Exchange (ETDEWEB)

    MYERS,DAVID R.; JESSING,JEFFREY R.; SPAHN,OLGA B.; SHANEYFELT,MARTY R.

    2000-01-01

    This project represented a coordinated LLNL-SNL collaboration to investigate the feasibility of developing radiation-hardened magnetic non-volatile memories using giant magnetoresistance (GMR) materials. The intent of this limited-duration study was to investigate whether giant magnetoresistance (GMR) materials similar to those used for magnetic tunnel junctions (MTJs) were process compatible with functioning CMOS circuits. Sandia's work on this project demonstrated that deposition of GMR materials did not affect the operation nor the radiation hardness of Sandia's rad-hard CMOS technology, nor did the integration of GMR materials and exposure to ionizing radiation affect the magnetic properties of the GMR films. Thus, following deposition of GMR films on rad-hard integrated circuits, both the circuits and the films survived ionizing radiation levels consistent with DOE mission requirements. Furthermore, Sandia developed techniques to pattern deposited GMR films without degrading the completed integrated circuits upon which they were deposited. The present feasibility study demonstrated all the necessary processing elements to allow fabrication of the non-volatile memory elements onto an existing CMOS chip, and even allow the use of embedded (on-chip) non-volatile memories for system-on-a-chip applications, even in demanding radiation environments. However, funding agencies DTRA, AIM, and DARPA did not have any funds available to support the required follow-on technology development projects that would have been required to develop functioning prototype circuits, nor were such funds available from LDRD nor from other DOE program funds.

  5. Effect of hydrogen ion beam treatment on Si nanocrystal/SiO2 superlattice-based memory devices

    International Nuclear Information System (INIS)

    Fu, Sheng-Wen; Chen, Hui-Ju; Wu, Hsuan-Ta; Chuang, Bing-Ru; Shih, Chuan-Feng

    2016-01-01

    Graphical abstract: - Highlights: • Memory window and retention properties are improved employing HIBAS technique. • The O/Si ratio and radiative recombination are changed by HIBAS. • Memory properties are affected not only by Si NCs and O/Si ratio but also the RDCs. • The mechanism of hydrogen ion beam alters the memory properties is investigated. - Abstract: This study presents a novel route for synthesizing silicon-rich oxide (SRO)/SiO 2 superlattice-based memory devices with an improved memory window and retention properties. The SiO 2 and SRO superlattices are deposited by reactive sputtering. Specifically, the hydrogen ion beam is used to irradiate the SRO layer immediately after its deposition in the vacuum chamber. The use of the hydrogen ion beam was determined to increase oxygen content and the density of the Si nanocrystals. The memory window increased from 16 to 25.6 V, and the leakage current decreased significantly by two orders, to under ±20 V, for the hydrogen ion beam-prepared devices. This study investigates the mechanism into how hydrogen ion beam treatment alters SRO films and influences memory properties.

  6. Amorphous blue phase III polymer scaffold as a sub-millisecond switching electro-optical memory device

    Science.gov (United States)

    Gandhi, Sahil Sandesh; Kim, Min Su; Hwang, Jeoung-Yeon; Chien, Liang-Chy

    2017-02-01

    We demonstrate the application of the nanostructured scaffold of BPIII as a resuable EO device that retains the BPIII ordering and sub-millisecond EO switching characteristics, that is, "EO-memory" of the original BPIII even after removal of the cholesteric blue phase liquid crystal (LC) and subsequent refilling with different nematic LCs. We also fabricate scaffolds mimicking the isotropic phase and cubic blue phase I (BPI) to demonstrate the versatility of our material system to nano-engineer EO-memory scaffolds of various structures. We envisage that this work will promote new experimental investigations of the mysterious BPIII and the development of novel device architectures and optically functional nanomaterials.

  7. Characterization and Modeling of Charge Trapping and Retention in Novel Multi-Dielectric Nonvolatile Semiconductor Memory Devices.

    Science.gov (United States)

    Roy, Anirban

    This dissertation deals with the synthesis and analysis of new multidielectric memory devices to identify a viable low voltage programmable (5-10V) electrically erasable programmable read only memory (EEPROM) cell for memory densities exceeding 1MB/chip. The memory devices are variations of the triple dielectric silicon dioxide -silicon nitride-silicon dioxide (ONO) structure, where the silicon nitride is the "memory layer". We have developed physically based analytical and numerical models to explain the charge trapping and storage in the scaled down nitride (~100 A) layer. The recombination kinetics in the nitride is modeled with amphoteric traps acting as "memory" centers for electrons and holes injected through the tunneling oxide during programming. We have investigated electron and hole charge separation at the silicon-insulator interface. Surface channel or buried channel transistors can only separate electrons and holes under one gate bias polarity. We have demonstrated, for the first time, charge separation for both gate polarities with the specially designed dual channel (n-buried channel and p-surface channel under the same gate) transistor. We have gained evidence to prove that the memory properties of thin-oxide SONOS devices is dominated by electron and hole recombination in the nitride bulk. We have fabricated ONO memory capacitors and transistors with bottom(tunneling) oxide thicknesses in the range of 15-23A, nitride thicknesses in the range of 50-205A and top(blocking) oxide thicknesses in the range of 17-56A. We have demonstrated 5-10V programming on both uniform and graded(Si-rich composition bounded by N-rich composition) nitride ONO memory devices. We have shown that the graded nitride devices are better than uniform composition nitride for long term (>10 years) charge retention. We have shown that a Au gate electrode reduces electron injection from the gate for large negative gate bias, when compared with Al or n^+ poly gate electrodes. Based

  8. Memory

    Science.gov (United States)

    ... it has to decide what is worth remembering. Memory is the process of storing and then remembering this information. There are different types of memory. Short-term memory stores information for a few ...

  9. Large scale testing of nitinol shape memory alloy devices for retrofitting of bridges

    International Nuclear Information System (INIS)

    Johnson, Rita; Emmanuel Maragakis, M; Saiid Saiidi, M; Padgett, Jamie E; DesRoches, Reginald

    2008-01-01

    A large scale testing program was conducted to determine the effects of shape memory alloy (SMA) restrainer cables on the seismic performance of in-span hinges of a representative multiple-frame concrete box girder bridge subjected to earthquake excitations. Another objective of the study was to compare the performance of SMA restrainers to that of traditional steel restrainers as restraining devices for reducing hinge displacement and the likelihood of collapse during earthquakes. The results of the tests show that SMA restrainers performed very well as restraining devices. The forces in the SMA and steel restrainers were comparable. However, the SMA restrainer cables had minimal residual strain after repeated loading and exhibited the ability to undergo many cycles with little strength and stiffness degradation. In addition, the hysteretic damping that was observed in the larger ground accelerations demonstrated the ability of the materials to dissipate energy. An analytical study was conducted to assess the anticipated seismic response of the test setup and evaluate the accuracy of the analytical model. The results of the analytical simulation illustrate that the analytical model was able to match the responses from the experimental tests, including peak stresses, strains, forces, and hinge openings

  10. Influence of mineral salts upon activity of Trichoderma harzianum non-volatile metabolites on Armillaria spp. rhizomorphs

    Directory of Open Access Journals (Sweden)

    Krystyna Przybył

    2011-01-01

    Full Text Available Effect of non-volatile metabolites of Trichoderma harzianum together with certain salts containing Mg++, Fe+++, Mn++, Cu++, Al+++, Ca++, K++, Na+, PO4--- and SO3--- on the production and length of rhizomorphs of Armillaria borealis, A. gallica and A. ostoyae was studied. In pure medium, T. harzianum exhibited stimulating effect on rhizomorphs of A. borealis (both number and length and A. ostoyae (only initiation. Cu++ salt totaly inhibited the initiation of rhizomorphs of Armillaria borealis, A. gallica and A. ostoyae. Effect of other compounds on the activity of T. harzianum depended on Armillaria species. The majority of chemical compounds tested supressed the activity of non-volatile metabolites of T. harzianum. Evident stimulating effect was observed under influence of sulphate salts consisting Al++ and Fe+++ on the rhizomorph number of A. borealis and A. gallica, respectively.

  11. Volatile and non-volatile/semi-volatile compounds and in vitro bioactive properties of Chilean Ulmo (Eucryphia cordifolia Cav.) honey.

    Science.gov (United States)

    Acevedo, Francisca; Torres, Paulina; Oomah, B Dave; de Alencar, Severino Matias; Massarioli, Adna Prado; Martín-Venegas, Raquel; Albarral-Ávila, Vicenta; Burgos-Díaz, César; Ferrer, Ruth; Rubilar, Mónica

    2017-04-01

    Ulmo honey originating from Eucryphia cordifolia tree, known locally in the Araucania region as the Ulmo tree is a natural product with valuable nutritional and medicinal qualities. It has been used in the Mapuche culture to treat infections. This study aimed to identify the volatile and non-volatile/semi-volatile compounds of Ulmo honey and elucidate its in vitro biological properties by evaluating its antioxidant, antibacterial, antiproliferative and hemolytic properties and cytotoxicity in Caco-2 cells. Headspace volatiles of Ulmo honey were isolated by solid-phase microextraction (SPME); non-volatiles/semi-volatiles were obtained by removing all saccharides with acidified water and the compounds were identified by GC/MS analysis. Ulmo honey volatiles consisted of 50 compounds predominated by 20 flavor components. Two of the volatile compounds, lyrame and anethol have never been reported before as honey compounds. The non-volatile/semi-volatile components of Ulmo honey comprised 27 compounds including 13 benzene derivatives accounting 75% of the total peak area. Ulmo honey exhibited weak antioxidant activity but strong antibacterial activity particularly against gram-negative bacteria and methicillin-resistant Staphylococcus aureus (MRSA), the main strain involved in wounds and skin infections. At concentrations >0.5%, Ulmo honey reduced Caco-2 cell viability, released lactate dehydrogenase (LDH) and increased reactive oxygen species (ROS) production in a dose dependent manner in the presence of foetal bovine serum (FBS). The wide array of volatile and non-volatile/semi-volatile constituents of Ulmo honey rich in benzene derivatives may partly account for its strong antibacterial and antiproliferative properties important for its therapeutic use. Our results indicate that Ulmo honey can potentially inhibit cancer growth at least partly by modulating oxidative stress. Copyright © 2017 Elsevier Ltd. All rights reserved.

  12. Demonstration of Novel Sampling Techniques for Measurement of Turbine Engine Volatile and Non-Volatile Particulate Matter (PM) Emissions

    Science.gov (United States)

    2016-09-01

    only), which includes hot and cold dilution with an evaporator , and finally to instrumentation for particle number measurements . However, several...DC, CDP and plume BC was measure using a Laser Induced Incandescence (LII) instrument. Data for the BC LII mass measurements at the plume and...AFRL-RQ-WP-TR-2016-0131 DEMONSTRATION OF NOVEL SAMPLING TECHNIQUES FOR MEASUREMENT OF TURBINE ENGINE VOLATILE AND NON-VOLATILE PARTICULATE

  13. Rare-Earth Ions in Niobium-Based Devices as a Quantum Memory: Magneto-Optical Effects on Room Temperature Electrical Transport

    Science.gov (United States)

    2016-09-01

    TECHNICAL REPORT 3050 September 2016 Rare-Earth Ions in Niobium-based Devices as a Quantum Memory Magneto-Optical Effects on Room Temperature...Advanced Systems and Applied Sciences Division iii EXECUTIVE SUMMARY Rare-earth ions are useful for the implementation of quantum memory . In...the films and devices so they can properly designed and optimized for utility as quantum memory . We find that the magnetic field has a strong effect

  14. Memory.

    Science.gov (United States)

    McKean, Kevin

    1983-01-01

    Discusses current research (including that involving amnesiacs and snails) into the nature of the memory process, differentiating between and providing examples of "fact" memory and "skill" memory. Suggests that three brain parts (thalamus, fornix, mammilary body) are involved in the memory process. (JN)

  15. Umbrella-shaped, memory alloy femoral head support device for treatment of avascular osteonecrosis of the femoral head.

    Science.gov (United States)

    Yu, Xiaowei; Jiang, Wenxiong; Pan, Qi; Wu, Tianyi; Zhang, Yan; Zhou, Zubin; Du, Dongpeng

    2013-07-01

    Avascular necrosis (AVN) of the femoral head is a common orthopaedic disease that is difficult to treat. The purpose of this study was to explore the preliminary efficacy of a self-designed umbrella-shaped memory alloy femoral head support device in the treatment of adult patients with avascular osteonecrosis of the femoral head. The minimally-invasive approach involved curettage of the necrotic tissue of the femoral head, and a self-designed umbrella-shaped, memory alloy femoral head support device was implanted into the collapsed necrotic area to support the collapsed femoral head. Autologous iliac bone and artificial bone were implanted into the support device for the treatment of adult patients with avascular osteonecrosis of the femoral head. The clinical device was used in ten patients and 18 hip joints. The support device failed in one hip joint, which subsequently underwent joint replacement surgery, and the remaining 17 implanted devices were followed up for four to 19 months. The 17 postoperative hip joints were evaluated using the percent-efficacy evaluation method for avascular osteonecrosis of the femoral head in adult patients, and the efficacy rate was 82.35 %. The umbrella-shaped femoral head support device can be used in Ficat stage I, stage II, and stage III adult patients with avascular osteonecrosis of the femoral head.

  16. Multistate Memristive Tantalum Oxide Devices for Ternary Arithmetic

    Science.gov (United States)

    Kim, Wonjoo; Chattopadhyay, Anupam; Siemon, Anne; Linn, Eike; Waser, Rainer; Rana, Vikas

    2016-11-01

    Redox-based resistive switching random access memory (ReRAM) offers excellent properties to implement future non-volatile memory arrays. Recently, the capability of two-state ReRAMs to implement Boolean logic functionality gained wide interest. Here, we report on seven-states Tantalum Oxide Devices, which enable the realization of an intrinsic modular arithmetic using a ternary number system. Modular arithmetic, a fundamental system for operating on numbers within the limit of a modulus, is known to mathematicians since the days of Euclid and finds applications in diverse areas ranging from e-commerce to musical notations. We demonstrate that multistate devices not only reduce the storage area consumption drastically, but also enable novel in-memory operations, such as computing using high-radix number systems, which could not be implemented using two-state devices. The use of high radix number system reduces the computational complexity by reducing the number of needed digits. Thus the number of calculation operations in an addition and the number of logic devices can be reduced.

  17. Bistable out-of-plane stress-mismatched thermally actuated bilayer devices with large deflection

    International Nuclear Information System (INIS)

    Goessling, B A; Lucas, T M; Moiseeva, E V; Aebersold, J W; Harnett, C K

    2011-01-01

    In this paper, we explore microfabricated bistable actuators released as thin films from a silicon wafer. The actuators are based on a serpentine design where two cantilevers are coupled at the tips by a thin-film bar. These devices are parameterized by two lengths: cantilever length and the length of the coupling bar. These two dimensions are systematically varied to study the effect of design parameters on bistability. The three-dimensional devices have extremely large deflection (hundreds of microns rather than tens of microns for most planar microactuators of similar size) and are thermally actuated out of the plane of the wafer by applying a bias across either the left or right side of the serpentine. The bistability of these devices is evaluated using electron and optical microscopy. Potential applications include non-volatile mechanical memory, optical shutters, and reconfigurable antenna elements

  18. Interfacial phase-change memory.

    Science.gov (United States)

    Simpson, R E; Fons, P; Kolobov, A V; Fukaya, T; Krbal, M; Yagi, T; Tominaga, J

    2011-07-03

    Phase-change memory technology relies on the electrical and optical properties of certain materials changing substantially when the atomic structure of the material is altered by heating or some other excitation process. For example, switching the composite Ge(2)Sb(2)Te(5) (GST) alloy from its covalently bonded amorphous phase to its resonantly bonded metastable cubic crystalline phase decreases the resistivity by three orders of magnitude, and also increases reflectivity across the visible spectrum. Moreover, phase-change memory based on GST is scalable, and is therefore a candidate to replace Flash memory for non-volatile data storage applications. The energy needed to switch between the two phases depends on the intrinsic properties of the phase-change material and the device architecture; this energy is usually supplied by laser or electrical pulses. The switching energy for GST can be reduced by limiting the movement of the atoms to a single dimension, thus substantially reducing the entropic losses associated with the phase-change process. In particular, aligning the c-axis of a hexagonal Sb(2)Te(3) layer and the 〈111〉 direction of a cubic GeTe layer in a superlattice structure creates a material in which Ge atoms can switch between octahedral sites and lower-coordination sites at the interface of the superlattice layers. Here we demonstrate GeTe/Sb(2)Te(3) interfacial phase-change memory (IPCM) data storage devices with reduced switching energies, improved write-erase cycle lifetimes and faster switching speeds.

  19. Flexible nonvolatile memory devices based on Au/PMMA nanocomposites deposited on PEDOT:PSS/Ag nanowire hybrid electrodes

    International Nuclear Information System (INIS)

    Sung, Sihyun; Kim, Tae Whan

    2017-01-01

    Highlights: • Flexible nonvolatile memory (NVM) devices fabricated utilizing Au nanoparticles (AuNPs) embedded in a PMMA layer were fabricated. • The insertion of the PEDOT:PSS layer enhanced the surface uniformity of the AgNW bottom electrode, resulting in improved device performances. • Current-voltage curves for the Al/PMMA:AuNP/PEDOT:PSS/AgNW/PET devices showed clockwise current hysteresis behaviors. • ON/OFF ratio of 1 × 10 3 was maintained for retention times longer than 1 × 10 4 s. • Memory characteristics of the NVM devices before and after bending were similar. - Abstract: Flexible nonvolatile memory (NVM) devices fabricated utilizing Au nanoparticles (AuNPs) embedded in a poly(methylmethacrylate) (PMMA) layer were fabricated on a silver nanowire (AgNW) or a poly(3,4-ethylenedioxythiophene):poly(styrenesulfonate) (PEDOT:PSS)/AgNW coated on poly(ethylene terephthalate) (PET) substrates. The transmittance and the sheet resistance of the PEDOT:PSS/AgNW hybrid layer were approximately 89% and 50 Ω/sq, respectively, which were comparable to the values for commercial indium-tin-oxide (ITO) electrodes. Current-voltage curves for the Al/PMMA:AuNP/PEDOT:PSS/AgNW/PET devices at 300 K showed clockwise current hysteresis behaviors due to the existence of the AuNPs. The endurance number of ON/OFF switching for the NVM devices was above 30 cycles. An ON/OFF ratio of 1 × 10 3 was maintained for retention times longer than 1 × 10 4 s. The maximum memory margins of the NVM devices before and after bending were approximately 3.4 × 10 3 and 1.4 × 10 3 , respectively. The retention times of the devices before and after bending remained same 1 × 10 4 s. The memory margin and the stability of flexible NVMs fabricated on AgNW electrodes were enhanced due to the embedded PEDOT:PSS buffer layer.

  20. Flexible nonvolatile memory devices based on Au/PMMA nanocomposites deposited on PEDOT:PSS/Ag nanowire hybrid electrodes

    Energy Technology Data Exchange (ETDEWEB)

    Sung, Sihyun; Kim, Tae Whan, E-mail: twk@hanyang.ac.kr

    2017-07-31

    Highlights: • Flexible nonvolatile memory (NVM) devices fabricated utilizing Au nanoparticles (AuNPs) embedded in a PMMA layer were fabricated. • The insertion of the PEDOT:PSS layer enhanced the surface uniformity of the AgNW bottom electrode, resulting in improved device performances. • Current-voltage curves for the Al/PMMA:AuNP/PEDOT:PSS/AgNW/PET devices showed clockwise current hysteresis behaviors. • ON/OFF ratio of 1 × 10{sup 3} was maintained for retention times longer than 1 × 10{sup 4} s. • Memory characteristics of the NVM devices before and after bending were similar. - Abstract: Flexible nonvolatile memory (NVM) devices fabricated utilizing Au nanoparticles (AuNPs) embedded in a poly(methylmethacrylate) (PMMA) layer were fabricated on a silver nanowire (AgNW) or a poly(3,4-ethylenedioxythiophene):poly(styrenesulfonate) (PEDOT:PSS)/AgNW coated on poly(ethylene terephthalate) (PET) substrates. The transmittance and the sheet resistance of the PEDOT:PSS/AgNW hybrid layer were approximately 89% and 50 Ω/sq, respectively, which were comparable to the values for commercial indium-tin-oxide (ITO) electrodes. Current-voltage curves for the Al/PMMA:AuNP/PEDOT:PSS/AgNW/PET devices at 300 K showed clockwise current hysteresis behaviors due to the existence of the AuNPs. The endurance number of ON/OFF switching for the NVM devices was above 30 cycles. An ON/OFF ratio of 1 × 10{sup 3} was maintained for retention times longer than 1 × 10{sup 4} s. The maximum memory margins of the NVM devices before and after bending were approximately 3.4 × 10{sup 3} and 1.4 × 10{sup 3}, respectively. The retention times of the devices before and after bending remained same 1 × 10{sup 4} s. The memory margin and the stability of flexible NVMs fabricated on AgNW electrodes were enhanced due to the embedded PEDOT:PSS buffer layer.

  1. Magnetization Dynamics in Two Novel Current-Driven Spintronic Memory Cell Structures

    KAUST Repository

    Velazquez-Rizo, Martin

    2017-07-01

    In this work, two new spintronic memory cell structures are proposed. The first cell uses the diffusion of polarized spins into ferromagnets with perpendicular anisotropy to tilt their magnetization followed by their dipolar coupling to a fixed magnet (Bhowmik et al., 2014). The possibility of setting the magnetization to both stable magnetization states in a controlled manner using a similar concept remains unknown, but the proposed structure poses to be a solution to this difficulty. The second cell proposed takes advantage of the multiple stable magnetic states that exist in ferromagnets with configurational anisotropy and also uses spin torques to manipulate its magnetization. It utilizes a square-shaped ferromagnet whose stable magnetization has preferred directions along the diagonals of the square, giving four stable magnetic states allowing to use the structure as a multi-bit memory cell. Both devices use spin currents generated in heavy metals by the Spin Hall effect present in these materials. Among the advantages of the structures proposed are their inherent non-volatility and the fact that there is no need for applying external magnetic fields during their operation, which drastically improves the energy efficiency of the devices. Computational simulations using the Object Oriented Micromagnetic Framework (OOMMF) software package were performed to study the dynamics of the magnetization process in both structures and predict their behavior. Besides, we fabricated a 4-terminal memory cell with configurational anisotropy similar to the device proposed, and found four stable resistive states on the structure, proving the feasibility of this technology for implementation of high-density, non-volatile memory cells.

  2. Electrical bistabilities and memory stabilities of nonvolatile bistable devices fabricated utilizing C60 molecules embedded in a polymethyl methacrylate layer

    International Nuclear Information System (INIS)

    Cho, Sung Hwan; Lee, Dong Ik; Jung, Jae Hun; Kim, Tae Whan

    2009-01-01

    Current-voltage (I-V) measurements on Al/fullerene (C 60 ) molecules embedded in polymethyl methacrylate/Al devices at 300 K showed a current bistability due to the existence of the C 60 molecules. The on/off ratio of the current bistability for the memory devices was as large as 10 3 . The retention time of the devices was above 2.5 x 10 4 s at room temperature, and cycling endurance tests on these devices indicated that the ON and OFF currents showed no degradation until 50 000 cycles. Carrier transport mechanisms for the nonvolatile bistable devices are described on the basis of the I-V experimental and fitting results.

  3. Development of Next Generation Memory Test Experiment for Deployment on a Small Satellite

    Science.gov (United States)

    MacLeod, Todd; Ho, Fat D.

    2012-01-01

    The original Memory Test Experiment successfully flew on the FASTSAT satellite launched in November 2010. It contained a single Ramtron 512K ferroelectric memory. The memory device went through many thousands of read/write cycles and recorded any errors that were encountered. The original mission length was schedule to last 6 months but was extended to 18 months. New opportunities exist to launch a similar satellite and considerations for a new memory test experiment should be examined. The original experiment had to be designed and integrated in less than two months, so the experiment was a simple design using readily available parts. The follow-on experiment needs to be more sophisticated and encompass more technologies. This paper lays out the considerations for the design and development of this follow-on flight memory experiment. It also details the results from the original Memory Test Experiment that flew on board FASTSAT. Some of the design considerations for the new experiment include the number and type of memory devices to be used, the kinds of tests that will be performed, other data needed to analyze the results, and best use of limited resources on a small satellite. The memory technologies that are considered are FRAM, FLASH, SONOS, Resistive Memory, Phase Change Memory, Nano-wire Memory, Magneto-resistive Memory, Standard DRAM, and Standard SRAM. The kinds of tests that could be performed are read/write operations, non-volatile memory retention, write cycle endurance, power measurements, and testing Error Detection and Correction schemes. Other data that may help analyze the results are GPS location of recorded errors, time stamp of all data recorded, radiation measurements, temperature, and other activities being perform by the satellite. The resources of power, volume, mass, temperature, processing power, and telemetry bandwidth are extremely limited on a small satellite. Design considerations must be made to allow the experiment to not interfere

  4. Retooling Predictive Relations for non-volatile PM by Comparison to Measurements

    Science.gov (United States)

    Vander Wal, R. L.; Abrahamson, J. P.

    2015-12-01

    Non-volatile particulate matter (nvPM) emissions from jet aircraft at cruise altitude are of particular interest for climate and atmospheric processes but are difficult to measure and are normally approximated. To provide such inventory estimates the present approach is to use measured, ground-based values with scaling to cruise (engine operating) conditions. Several points are raised by this approach. First is what ground based values to use. Empirical and semi-empirical approaches, such as the revised first order approximation (FOA3) and formation-oxidation (FOX) methods, each with embedded assumptions are available to calculate a ground-based black carbon concentration, CBC. Second is the scaling relation that can depend upon the ratios of fuel-air equivalence, pressure, and combustor flame temperature. We are using measured ground-based values to evaluate the accuracy of present methods towards developing alternative methods for CBCby smoke number or via a semi-empirical kinetic method for the specific engine, CFM56-2C, representative of a rich-dome style combustor, and as one of the most prevalent engine families in commercial use. Applying scaling relations to measured ground based values and comparison to measurements at cruise evaluates the accuracy of current scaling formalism. In partnership with GE Aviation, performing engine cycle deck calculations enables critical comparison between estimated or predicted thermodynamic parameters and true (engine) operational values for the CFM56-2C engine. Such specific comparisons allow tracing differences between predictive estimates for, and measurements of nvPM to their origin - as either divergence of input parameters or in the functional form of the predictive relations. Such insights will lead to development of new predictive tools for jet aircraft nvPM emissions. Such validated relations can then be extended to alternative fuels with confidence in operational thermodynamic values and functional form

  5. Efficient Management for Hybrid Memory in Managed Language Runtime

    OpenAIRE

    Wang , Chenxi; Cao , Ting; Zigman , John; Lv , Fang; Zhang , Yunquan; Feng , Xiaobing

    2016-01-01

    Part 1: Memory: Non-Volatile, Solid State Drives, Hybrid Systems; International audience; Hybrid memory, which leverages the benefits of traditional DRAM and emerging memory technologies, is a promising alternative for future main memory design. However popular management policies through memory-access recording and page migration may invoke non-trivial overhead in execution time and hardware space. Nowadays, managed language applications are increasingly dominant in every kind of platform. M...

  6. Exploration of perpendicular magnetic anisotropy material system for application in spin transfer torque - Random access memory

    Science.gov (United States)

    Natarajarathinam, Anusha

    Perpendicular magnetic anisotropy (PMA) materials have unique advantages when used in magnetic tunnel junctions (MTJ) which are the most critical part of spin-torque transfer random access memory devices (STT-RAMs) that are being researched intensively as future non-volatile memory technology. They have high magnetoresistance which improves their sensitivity. The STT-RAM has several advantages over competing technologies, for instance, low power consumption, non-volatility, ultra-fast read and write speed and high endurance. In personal computers, it can replace SRAM for high-speed applications, Flash for non-volatility, and PSRAM and DRAM for high-speed program execution. The main aim of this research is to identify and optimize the best perpendicular magnetic anisotropy (PMA) material system for application to STT-RAM technology. Preliminary search for perpendicular magnetic anisotropy (PMA) materials for pinned layer for MTJs started with the exploration and optimization of crystalline alloys such as Co50Pd50 alloy, Mn50Al50 and amorphous alloys such as Tb21Fe72Co7 and are first presented in this work. Further optimization includes the study of Co/[Pd/Pt]x multilayers (ML), and the development of perpendicular synthetic antiferromagnets (SAF) utilizing these multilayers. Focused work on capping and seed layers to evaluate interfacial perpendicular anisotropy in free layers for pMTJs is then discussed. Optimization of the full perpendicular magnetic tunnel junction (pMTJ) includes the CoFeB/MgO/CoFeB trilayer coupled to a pinned/pinning layer with perpendicular Co/[Pd/Pt]x SAF and a thin Ta seeded CoFeB free layer. Magnetometry, simulations, annealing studies, transport measurements and TEM analysis on these samples will then be presented.

  7. Embedded nonvolatile memory devices with various silicon nitride energy band gaps on glass used for flat panel display applications

    International Nuclear Information System (INIS)

    Son, Dang Ngoc; Van Duy, Nguyen; Jung, Sungwook; Yi, Junsin

    2010-01-01

    Nonvolatile memory (NVM) devices with a nitride–nitride–oxynitride stack structure on a rough poly-silicon (poly-Si) surface were fabricated using a low-temperature poly-Si (LTPS) thin film transistor technology on glass substrates for application of flat panel display (FPD). The plasma-assisted oxidation/nitridation method is used to form a uniform oxynitride with an ultrathin tunneling layer on a rough LTPS surface. The NVMs, using a Si-rich silicon nitride film as a charge-trapping layer, were proposed as one of the solutions for the improvement of device performance such as the program/erase speed, the memory window and the charge retention characteristics. To further improve the vertical scaling and charge retention characteristics of NVM devices, the high-κ high-density N-rich SiN x films are used as a blocking layer. The fabricated NVM devices have outstanding electrical properties, such as a low threshold voltage, a high ON/OFF current ratio, a low subthreshold swing, a low operating voltage of less than ±9 V and a large memory window of 3.7 V, which remained about 1.9 V over a period of 10 years. These characteristics are suitable for electrical switching and data storage with in FPD application

  8. Choice of quantum dot materials for fabricating memory devices with longer storage and faster writing of information

    Science.gov (United States)

    Damodaran, V.; Ghosh, Kaustab

    2016-12-01

    We present theoretical modelling and simulation approach for studying the electron and hole dynamics in various III-V quantum dot (QD) device systems for high performance memory applications. A rigorous computation is carried out by developing a self-consistent Schrödinger Poisson solver for obtaining the potential state of the QD for various applied voltages of the device. A detailed capture as well as emission mechanism of the carriers is elucidated at various operating temperatures ranging from 10 to 300 K. Our results showed suitability of holes in GaSb/GaAs dots for 107 times increase in the duration of data storage and 34 times faster writing capability as compared to InAs/GaAs QDs at room temperature operation. A trade-off is necessary between extending the storage time and increasing the write time by incorporation of high bandgap AlAs barrier. However, a technique is proposed to avoid the trade-off and minimize the write and erase time along with longer storage of data for QD memories with barrier layers. Our computation also reveals greater retention capacity of electrons over holes when localized to the same potential barrier. Applications of these QDs at cryogenic temperatures are also elucidated. Thus, based on our comparative analysis, valuable information is being provided to the device scientist in choosing suitable quantum dot material for memory devices and optimizing its performance.

  9. Nonvolatile Flash Memory Devices Using CeO2 Nanocrystal Trapping Layer for Two-Bit per Cell Applications

    Science.gov (United States)

    Yang, Shao-Ming; Chien, Chao-Hsin; Huang, Jiun-Jia; Lei, Tan-Fu

    2007-06-01

    In this study, we demonstrated the characteristics of nonvolatile silicon oxide nitride oxide silicon (SONOS)-type memories using cerium oxide (CeO2) nanocrystals as a charge storage agent. We observed that the shape of the formed CeO2 nanocrystals is nearly spherical and that their size is almost similar identical to their high density of 5× 1011 cm-2. Such CeO2 nanocrystals were formed by depositing a thin CeO2 film of ca. 2-3 nm thickness using an evaporater gun system and then rapid thermal annealing (RTA) in O2 ambient at 900 °C for 1 min. The fabricated memory devices show good electrical properties in terms of a sufficiently large memory window (>2 V), program/erase (P/E) speed (0.1/1 ms), retention time up to 104 s with only 5% charge loss, and endurance after 105 cycles with small memory window narrowing and two-bit operation. These properties suggest that the nonvolatile SONOS-type memories with the CeO2 nanocrystal trapping agent can be applied in future flash memories.

  10. Patient-borne memory device facilitates "point of care" data access.

    Science.gov (United States)

    Overdyk, F J; Haynes, G R; Arvanitis, P J

    1999-01-01

    Although electronic medical records and a central database have made accurate and consistent patient medical information more readily available than with the traditional patient chart, there are many locations in healthcare facilities where terminals for accessing patient data are not available. As patient care becomes decentralized and more patients require anesthesia outside of the operating suites, routing a network-based system to all these locations can be expensive and time consuming. We designed a system whereby essential patient data of interest to anesthesiologists is stored on an electronic memory device the size of a watch battery attached to the patient's wristband. Accessing and editing the data is done via a hand-held computer. This system provides secure patient data storage and management at the "point of care." At the conclusion of the patient's anesthesia-related care, the data is downloaded to a relational database for use in outcome analysis, billing, and quality assurance. After collecting preoperative evaluations, intraoperative data, and postoperative data on 560 patients anesthetized for surgery or other procedures, we find this system to be a reliable, low-cost, medical information management system, with possible application to other medical specialties.

  11. A new isolation device using shape memory alloy and its application for long-span structures

    Science.gov (United States)

    Ding, Youliang; Chen, Xin; Li, Aiqun; Zuo, Xiaobao

    2011-06-01

    The key points to consider in determining the effectiveness of using structural isolation with shape memory alloys (SMA) are the constitutive model, the SMA isolation device and the analysis method. In this paper, a simplified constitutive model based on the classic theory of plasticity is proposed to simulate the behavior of the superelasticity of the SMA, in which the martensite volume fraction is considered as one of the state variables. Comparisons between simulation results and experimental results are made and indicate that the proposed constitutive model yields stress-strain curves that are in good agreement with the experimental ones. Thus, the proposed model can correctly simulate the yield mechanism and energy dissipation capacity of the SMA. Next, in order to make full use of the superelasticity of SMA, a new SMA isolator composed of pre-tensioned SMA bars is presented. Then, a finite element analytical model is established to simulate the behavior of the SMA isolator according to its configuration and simplified constitutive model. Finally, a simplified design method for long-span structures installed with SMA isolators is proposed, which is further used to investigate the isolation effects of a space grid structure. Results show that the SMA isolator can reduce the seismic responses of the structure effectively, which indicates the effectiveness of the proposed SMA isolation method.

  12. Reducing the influence of STI on SONOS memory through optimizing added boron implantation technology

    International Nuclear Information System (INIS)

    Xu Yue; Yan Feng; Li Zhiguo; Yang Fan; Wang Yonggang; Chang Jianguang

    2010-01-01

    The influence of shallow trench isolation (STI) on a 90 nm polysilicon-oxide-nitride-oxide-silicon structure non-volatile memory has been studied based on experiments. It has been found that the performance of edge memory cells adjacent to STI deteriorates remarkably. The compressive stress and boron segregation induced by STI are thought to be the main causes of this problem. In order to mitigate the STI impact, an added boron implantation in the STI region is developed as a new solution. Four kinds of boron implantation experiments have been implemented to evaluate the impact of STI on edge cells, respectively. The experimental results show that the performance of edge cells can be greatly improved through optimizing added boron implantation technology. (semiconductor devices)

  13. Writing to and reading from a nano-scale crossbar memory based on memristors

    International Nuclear Information System (INIS)

    Vontobel, Pascal O; Robinett, Warren; Kuekes, Philip J; Stewart, Duncan R; Straznicky, Joseph; Stanley Williams, R

    2009-01-01

    We present a design study for a nano-scale crossbar memory system that uses memristors with symmetrical but highly nonlinear current-voltage characteristics as memory elements. The memory is non-volatile since the memristors retain their state when un-powered. In order to address the nano-wires that make up this nano-scale crossbar, we use two coded demultiplexers implemented using mixed-scale crossbars (in which CMOS-wires cross nano-wires and in which the crosspoint junctions have one-time configurable memristors). This memory system does not utilize the kind of devices (diodes or transistors) that are normally used to isolate the memory cell being written to and read from in conventional memories. Instead, special techniques are introduced to perform the writing and the reading operation reliably by taking advantage of the nonlinearity of the type of memristors used. After discussing both writing and reading strategies for our memory system in general, we focus on a 64 x 64 memory array and present simulation results that show the feasibility of these writing and reading procedures. Besides simulating the case where all device parameters assume exactly their nominal value, we also simulate the much more realistic case where the device parameters stray around their nominal value: we observe a degradation in margins, but writing and reading is still feasible. These simulation results are based on a device model for memristors derived from measurements of fabricated devices in nano-scale crossbars using Pt and Ti nano-wires and using oxygen-depleted TiO 2 as the switching material.

  14. Endurance degradation and lifetime model of p-channel floating gate flash memory device with 2T structure

    Science.gov (United States)

    Wei, Jiaxing; Liu, Siyang; Liu, Xiaoqiang; Sun, Weifeng; Liu, Yuwei; Liu, Xiaohong; Hou, Bo

    2017-08-01

    The endurance degradation mechanisms of p-channel floating gate flash memory device with two-transistor (2T) structure are investigated in detail in this work. With the help of charge pumping (CP) measurements and Sentaurus TCAD simulations, the damages in the drain overlap region along the tunnel oxide interface caused by band-to-band (BTB) tunneling programming and the damages in the channel region resulted from Fowler-Nordheim (FN) tunneling erasure are verified respectively. Furthermore, the lifetime model of endurance characteristic is extracted, which can extrapolate the endurance degradation tendency and predict the lifetime of the device.

  15. Polarity-Free Resistive Switching Characteristics of CuxO Films for Non-volatile Memory Applications

    International Nuclear Information System (INIS)

    Hang-Bing, Lv; Peng, Zhou; Xiu-Feng, Fu; Ming, Yin; Ya-Li, Song; Li, Tang; Ting-Ao, Tang; Yin-Yin, Lin

    2008-01-01

    Resistive switching characteristics of Cu x O films grown by plasma oxidation process at room temperature are investigated. Both bipolar and unipolar stable resistive switching behaviours are observed and confirmed by repeated current–voltage measurements. It is found that the RESET current is dependent on SET compliance current. The mechanism behind this new phenomenon can be understood in terms of conductive filaments formation/rupture with the contribution of Joule heating

  16. Dietary exposure to volatile and non-volatile N-nitrosamines from processed meat products in Denmark

    DEFF Research Database (Denmark)

    Herrmann, Susan Strange; Duedahl-Olesen, Lene; Christensen, Tue

    2015-01-01

    Recent epidemiological studies show a positive association between cancer incidence and high intake of processed meat. N-nitrosamines (NAs) in these products have been suggested as one potential causative factor. Most volatile NAs (VNAs) are classified as probable human carcinogens, whereas...... the carcinogenicity for the majority of the non-volatile NA (NVNA) remains to be elucidated. Danish adults (15–75 years) and children (4–6 years) consume 20 g and 16 g of processed meat per day (95th percentile), respectively. The consumption is primarily accounted for by sausages, salami, pork flank (spiced...

  17. Enhanced oxygen vacancy diffusion in Ta2O5 resistive memory devices due to infinitely adaptive crystal structure

    Science.gov (United States)

    Jiang, Hao; Stewart, Derek A.

    2016-04-01

    Metal oxide resistive memory devices based on Ta2O5 have demonstrated high switching speed, long endurance, and low set voltage. However, the physical origin of this improved performance is still unclear. Ta2O5 is an important archetype of a class of materials that possess an adaptive crystal structure that can respond easily to the presence of defects. Using first principles nudged elastic band calculations, we show that this adaptive crystal structure leads to low energy barriers for in-plane diffusion of oxygen vacancies in λ phase Ta2O5. Identified diffusion paths are associated with collective motion of neighboring atoms. The overall vacancy diffusion is anisotropic with higher diffusion barriers found for oxygen vacancy movement between Ta-O planes. Coupled with the fact that oxygen vacancy formation energy in Ta2O5 is relatively small, our calculated low diffusion barriers can help explain the low set voltage in Ta2O5 based resistive memory devices. Our work shows that other oxides with adaptive crystal structures could serve as potential candidates for resistive random access memory devices. We also discuss some general characteristics for ideal resistive RAM oxides that could be used in future computational material searches.

  18. Simulation of trapping properties of high κ material as the charge storage layer for flash memory application

    International Nuclear Information System (INIS)

    Yeo, Yee Ngee; Wang Yingqian; Samanta, Santanu Kumar; Yoo, Won Jong; Samudra, Ganesh; Gao, Dongyue; Chong, Chee Ching

    2006-01-01

    We investigated the trapping properties of high κ material as the charge storage layer in non-volatile flash memory devices using a two-dimensional device simulator, Medici. The high κ material is sandwiched between two silicon oxide layers, resulting in the Silicon-Oxide-High κ-Oxide-Silicon (SOHOS) structure. The trap energy levels of the bulk electron traps in high κ material were determined. The programming and erasing voltage and time using Fowler Nordheim tunneling were estimated by simulation. The effect of deep level traps on erasing was investigated. Also, the effect of bulk traps density, thickness of block oxide and thickness of high κ material on the threshold voltage of the device was simulated

  19. Towards developing a compact model for magnetization switching in straintronics magnetic random access memory devices

    Science.gov (United States)

    Barangi, Mahmood; Erementchouk, Mikhail; Mazumder, Pinaki

    2016-08-01

    Strain-mediated magnetization switching in a magnetic tunneling junction (MTJ) by exploiting a combination of piezoelectricity and magnetostriction has been proposed as an energy efficient alternative to spin transfer torque (STT) and field induced magnetization switching methods in MTJ-based magnetic random access memories (MRAM). Theoretical studies have shown the inherent advantages of strain-assisted switching, and the dynamic response of the magnetization has been modeled using the Landau-Lifshitz-Gilbert (LLG) equation. However, an attempt to use LLG for simulating dynamics of individual elements in large-scale simulations of multi-megabyte straintronics MRAM leads to extremely time-consuming calculations. Hence, a compact analytical solution, predicting the flipping delay of the magnetization vector in the nanomagnet under stress, combined with a liberal approximation of the LLG dynamics in the straintronics MTJ, can lead to a simplified model of the device suited for fast large-scale simulations of multi-megabyte straintronics MRAMs. In this work, a tensor-based approach is developed to study the dynamic behavior of the stressed nanomagnet. First, using the developed method, the effect of stress on the switching behavior of the magnetization is investigated to realize the margins between the underdamped and overdamped regimes. The latter helps the designer realize the oscillatory behavior of the magnetization when settling along the minor axis, and the dependency of oscillations on the stress level and the damping factor. Next, a theoretical model to predict the flipping delay of the magnetization vector is developed and tested against LLG-based numerical simulations to confirm the accuracy of findings. Lastly, the obtained delay is incorporated into the approximate solutions of the LLG dynamics, in order to create a compact model to liberally and quickly simulate the magnetization dynamics of the MTJ under stress. Using the developed delay equation, the

  20. Towards developing a compact model for magnetization switching in straintronics magnetic random access memory devices

    Energy Technology Data Exchange (ETDEWEB)

    Barangi, Mahmood, E-mail: barangi@umich.edu; Erementchouk, Mikhail; Mazumder, Pinaki [Department of Electrical Engineering and Computer Science, University of Michigan, Ann Arbor, Michigan 48109-2121 (United States)

    2016-08-21

    Strain-mediated magnetization switching in a magnetic tunneling junction (MTJ) by exploiting a combination of piezoelectricity and magnetostriction has been proposed as an energy efficient alternative to spin transfer torque (STT) and field induced magnetization switching methods in MTJ-based magnetic random access memories (MRAM). Theoretical studies have shown the inherent advantages of strain-assisted switching, and the dynamic response of the magnetization has been modeled using the Landau-Lifshitz-Gilbert (LLG) equation. However, an attempt to use LLG for simulating dynamics of individual elements in large-scale simulations of multi-megabyte straintronics MRAM leads to extremely time-consuming calculations. Hence, a compact analytical solution, predicting the flipping delay of the magnetization vector in the nanomagnet under stress, combined with a liberal approximation of the LLG dynamics in the straintronics MTJ, can lead to a simplified model of the device suited for fast large-scale simulations of multi-megabyte straintronics MRAMs. In this work, a tensor-based approach is developed to study the dynamic behavior of the stressed nanomagnet. First, using the developed method, the effect of stress on the switching behavior of the magnetization is investigated to realize the margins between the underdamped and overdamped regimes. The latter helps the designer realize the oscillatory behavior of the magnetization when settling along the minor axis, and the dependency of oscillations on the stress level and the damping factor. Next, a theoretical model to predict the flipping delay of the magnetization vector is developed and tested against LLG-based numerical simulations to confirm the accuracy of findings. Lastly, the obtained delay is incorporated into the approximate solutions of the LLG dynamics, in order to create a compact model to liberally and quickly simulate the magnetization dynamics of the MTJ under stress. Using the developed delay equation, the

  1. Towards developing a compact model for magnetization switching in straintronics magnetic random access memory devices

    International Nuclear Information System (INIS)

    Barangi, Mahmood; Erementchouk, Mikhail; Mazumder, Pinaki

    2016-01-01

    Strain-mediated magnetization switching in a magnetic tunneling junction (MTJ) by exploiting a combination of piezoelectricity and magnetostriction has been proposed as an energy efficient alternative to spin transfer torque (STT) and field induced magnetization switching methods in MTJ-based magnetic random access memories (MRAM). Theoretical studies have shown the inherent advantages of strain-assisted switching, and the dynamic response of the magnetization has been modeled using the Landau-Lifshitz-Gilbert (LLG) equation. However, an attempt to use LLG for simulating dynamics of individual elements in large-scale simulations of multi-megabyte straintronics MRAM leads to extremely time-consuming calculations. Hence, a compact analytical solution, predicting the flipping delay of the magnetization vector in the nanomagnet under stress, combined with a liberal approximation of the LLG dynamics in the straintronics MTJ, can lead to a simplified model of the device suited for fast large-scale simulations of multi-megabyte straintronics MRAMs. In this work, a tensor-based approach is developed to study the dynamic behavior of the stressed nanomagnet. First, using the developed method, the effect of stress on the switching behavior of the magnetization is investigated to realize the margins between the underdamped and overdamped regimes. The latter helps the designer realize the oscillatory behavior of the magnetization when settling along the minor axis, and the dependency of oscillations on the stress level and the damping factor. Next, a theoretical model to predict the flipping delay of the magnetization vector is developed and tested against LLG-based numerical simulations to confirm the accuracy of findings. Lastly, the obtained delay is incorporated into the approximate solutions of the LLG dynamics, in order to create a compact model to liberally and quickly simulate the magnetization dynamics of the MTJ under stress. Using the developed delay equation, the

  2. Electric field mediated non-volatile tuning magnetism at the single-crystalline Fe/Pb(Mg1/3Nb2/3)0.7Ti0.3O3 interface.

    Science.gov (United States)

    Zhang, Chao; Wang, Fenglong; Dong, Chunhui; Gao, Cunxu; Jia, Chenglong; Jiang, Changjun; Xue, Desheng

    2015-03-07

    We report non-volatile electric-field control of magnetism modulation in Fe/Pb(Mg1/3Nb2/3)0.7Ti0.3O3 (PMN-PT) heterostructure by fabricating an epitaxial Fe layer on a PMN-PT substrate using a molecular beam epitaxy technique. The remnant magnetization with a different electric field shows a non-symmetric loop-like shape, which demonstrates a change of interfacial chemistry and a large magnetoelectric coupling in Fe/PMN-PT at room temperature to realize low loss multistate memory under an electric field. Fitting with the angular-dependence of the in-plane magnetization reveals that the magnetoelectric effect is dominated by the direct electric-field effect rather than the strain effect at the interface. The magnetoelectric effect and the induced surface anisotropy are found to be dependent on the Fe film thickness and are linear with respect to the applied electric field.

  3. WORM memory devices based on conformation change of a PVK derivative with a rigid spacer in side chain

    International Nuclear Information System (INIS)

    Liu Yuanhua; Li Najun; Xia Xuewei; Xu Qingfeng; Ge Jianfeng; Lu Jianmei

    2010-01-01

    A nonvolatile write-once-read-many-times (WORM) memory device based on poly((4-vinylbenzyl)-9H-carbazole) (PVCz) was fabricated by a simple and conventional process. The as-fabricated device was found to be at its OFF state and could be programmed irreversibly to the ON state with a low transition voltage of -1.7 V. The device exhibits a high ON/OFF current ratio of up to 10 6 , high stability in retention time up to 8 h and number of read cycles up to 10 8 under a read voltage of -1.0 V in both ON and OFF states. The results of X-ray diffraction (XRD) and fluorescence emission spectra in different states of PVCz indicate that the electrical bistable phenomenon is caused by the voltage-induced conformation change of the pendant carbazole groups. With high performance, low power consumption and low production cost, the device fabricated with PVCz has a potential application for nonvolatile memory.

  4. Identifying key non-volatile compounds in ready-to-drink green tea and their impact on taste profile.

    Science.gov (United States)

    Yu, Peigen; Yeo, Angelin Soo-Lee; Low, Mei-Yin; Zhou, Weibiao

    2014-07-15

    Thirty-nine non-volatile compounds in seven ready-to-drink (RTD) green tea samples were analysed and quantified using liquid chromatography. Taste reconstruction experiments using thirteen selected compounds were conducted to identify the key non-volatile tastants. Taste profiles of the reconstructed samples did not differ significantly from the RTD tea samples. To investigate the taste contribution and significance of individual compounds, omission experiments were carried out by removing individual or a group of compounds. Sensory evaluation revealed that the astringent- and bitter-tasting (-)-epigallocatechin gallate, bitter-tasting caffeine, and the umami-tasting l-glutamic acid were the main contributors to the taste of RTD green tea. Subsequently, the taste profile of the reduced recombinant, comprising of a combination of these three compounds and l-theanine, was found to not differ significantly from the sample recombinant and RTD tea sample. Lastly, regression models were developed to objectively predict and assess the intensities of bitterness and astringency in RTD green teas. Copyright © 2014 Elsevier Ltd. All rights reserved.

  5. Impact of continuing scaling on the device performance of 3D cylindrical junction-less charge trapping memory

    International Nuclear Information System (INIS)

    Li Xinkai; Huo Zongliang; Jin Lei; Jiang Dandan; Hong Peizhen; Xu Qiang; Tang Zhaoyun; Li Chunlong; Ye Tianchun

    2015-01-01

    This work presents a comprehensive analysis of 3D cylindrical junction-less charge trapping memory device performance regarding continuous scaling of the structure dimensions. The key device performance, such as program/erase speed, vertical charge loss, and lateral charge migration under high temperature are intensively studied using the Sentaurus 3D device simulator. Although scaling of channel radius is beneficial for operation speed improvement, it leads to a retention challenge due to vertical leakage, especially enhanced charge loss through TPO. Scaling of gate length not only decreases the program/erase speed but also leads to worse lateral charge migration. Scaling of spacer length is critical for the interference of adjacent cells and should be carefully optimized according to specific cell operation conditions. The gate stack shape is also found to be an important factor affecting the lateral charge migration. Our results provide guidance for high density and high reliability 3D CTM integration. (paper)

  6. 3D Printing of Shape Memory Polymers for Flexible Electronic Devices.

    Science.gov (United States)

    Zarek, Matt; Layani, Michael; Cooperstein, Ido; Sachyani, Ela; Cohn, Daniel; Magdassi, Shlomo

    2016-06-01

    The formation of 3D objects composed of shape memory polymers for flexible electronics is described. Layer-by-layer photopolymerization of methacrylated semicrystalline molten macromonomers by a 3D digital light processing printer enables rapid fabrication of complex objects and imparts shape memory functionality for electrical circuits. © 2015 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  7. Nanometer-scale temperature imaging for independent observation of Joule and Peltier effects in phase change memory devices.

    Science.gov (United States)

    Grosse, Kyle L; Pop, Eric; King, William P

    2014-09-01

    This paper reports a technique for independent observation of nanometer-scale Joule heating and thermoelectric effects, using atomic force microscopy (AFM) based measurements of nanometer-scale temperature fields. When electrical current flows through nanoscale devices and contacts the temperature distribution is governed by both Joule and thermoelectric effects. When the device is driven by an electrical current that is both periodic and bipolar, the temperature rise due to the Joule effect is at a different harmonic than the temperature rise due to the Peltier effect. An AFM tip scanning over the device can simultaneously measure all of the relevant harmonic responses, such that the Joule effect and the Peltier effect can be independently measured. Here we demonstrate the efficacy of the technique by measuring Joule and Peltier effects in phase change memory devices. By comparing the observed temperature responses of these working devices, we measure the device thermopower, which is in the range of 30 ± 3 to 250 ± 10 μV K(-1). This technique could facilitate improved measurements of thermoelectric phenomena and properties at the nanometer-scale.

  8. Nanometer-scale temperature imaging for independent observation of Joule and Peltier effects in phase change memory devices

    Energy Technology Data Exchange (ETDEWEB)

    Grosse, Kyle L. [Department of Mechanical Science and Engineering, University of Illinois at Urbana-Champaign, Urbana, Illinois 61801 (United States); Pop, Eric [Department of Electrical Engineering, Stanford University, Stanford, California 94305 (United States); King, William P., E-mail: wpk@illinois.edu [Department of Mechanical Science and Engineering, University of Illinois at Urbana-Champaign, Urbana, Illinois 61801 (United States); Departments of Electrical and Computer Engineering and Materials Science and Engineering, University of Illinois at Urbana-Champaign, Urbana, Illinois 61801 (United States)

    2014-09-15

    This paper reports a technique for independent observation of nanometer-scale Joule heating and thermoelectric effects, using atomic force microscopy (AFM) based measurements of nanometer-scale temperature fields. When electrical current flows through nanoscale devices and contacts the temperature distribution is governed by both Joule and thermoelectric effects. When the device is driven by an electrical current that is both periodic and bipolar, the temperature rise due to the Joule effect is at a different harmonic than the temperature rise due to the Peltier effect. An AFM tip scanning over the device can simultaneously measure all of the relevant harmonic responses, such that the Joule effect and the Peltier effect can be independently measured. Here we demonstrate the efficacy of the technique by measuring Joule and Peltier effects in phase change memory devices. By comparing the observed temperature responses of these working devices, we measure the device thermopower, which is in the range of 30 ± 3 to 250 ± 10 μV K{sup −1}. This technique could facilitate improved measurements of thermoelectric phenomena and properties at the nanometer-scale.

  9. Nonvolatile memory characteristics in metal-oxide-semiconductors containing metal nanoparticles fabricated by using a unique laser irradiation method

    International Nuclear Information System (INIS)

    Yang, JungYup; Yoon, KapSoo; Kim, JuHyung; Choi, WonJun; Do, YoungHo; Kim, ChaeOk; Hong, JinPyo

    2006-01-01

    Metal-oxide-semiconductor (MOS) capacitors with metal nanoparticles (Co NP) were successfully fabricated by utilizing an external laser exposure technique for application of non-volatile memories. Images of high-resolution transmission electron microscopy reveal that the spherically shaped Co NP are clearly embedded in the gate oxide layer. Capacitance-voltage measurements exhibit typical charging and discharging effects with a large flat-band shift. The effects of the tunnel oxide thickness and the different tunnel materials are analyzed using capacitance-voltage and retention characteristics. In addition, the memory characteristics of the NP embedded in a high-permittivity material are investigated because the thickness of conventionally available SiO 2 gates is approaching the quantum tunneling limit as devices are scaled down. Finally, the suitability of NP memory devices for nonvolatile memory applications is also discussed. The present results suggest that our unique laser exposure technique holds promise for the NP formation as floating gate elements in nonvolatile NP memories and that the quality of the tunnel oxide is very important for enhancing the retention properties of nonvolatile memory.

  10. Cell characteristics of FePt nano-dot memories with a high-k Al2O3 blocking oxide

    International Nuclear Information System (INIS)

    Lee, Gae Hun; Lee, Jung Min; Yang, Hyung Jun; Song, Yun Heub; Bea, Ji Cheol; Tanaka, Testsu

    2012-01-01

    The cell characteristics of an alloy FePt nano-dot (ND) charge trapping memory with a high-k dielectric as a blocking oxide was investigated. Adoption of a high-k Al 2 O 3 material as a blocking oxide for the metal nano-dot memory provided a superior scaling of the operation voltage compared to silicon oxide under a similar gate leakage level. For the 40-nm-thick high-k (Al 2 O 3 ) blocking oxide, we confirmed an operation voltage reduction of ∼7 V under the same memory window on for silicon dioxide. Also, this device showed a large memory window of 7.8 V and a low leakage current under 10 -10 A in an area of Φ 0.25 mm. From these results, the use of a dielectric (Al 2 O 3 ) as a blocking oxide for a metal nano-dot device is essential, and a metal nano-dot memory with a high-k dielectric will be one of the candidates for a high-density non-volatile memory device.

  11. Dynamics of Metabolite Induction in Fungal Co-cultures by Metabolomics at Both Volatile and Non-volatile Levels

    Directory of Open Access Journals (Sweden)

    Antonio Azzollini

    2018-02-01

    Full Text Available Fungal co-cultivation has emerged as a promising way for activating cryptic biosynthetic pathways and discovering novel antimicrobial metabolites. For the success of such studies, a key element remains the development of standardized co-cultivation methods compatible with high-throughput analytical procedures. To efficiently highlight induction processes, it is crucial to acquire a holistic view of intermicrobial communication at the molecular level. To tackle this issue, a strategy was developed based on the miniaturization of fungal cultures that allows for a concomitant survey of induction phenomena in volatile and non-volatile metabolomes. Fungi were directly grown in vials, and each sample was profiled by head space solid phase microextraction gas chromatography mass spectrometry (HS-SPME-GC-MS, while the corresponding solid culture medium was analyzed by liquid chromatography high resolution mass spectrometry (LC-HRMS after solvent extraction. This strategy was implemented for the screening of volatile and non-volatile metabolite inductions in an ecologically relevant fungal co-culture of Eutypa lata (Pers. Tul. & C. Tul. (Diatrypaceae and Botryosphaeria obtusa (Schwein. Shoemaker (Botryosphaeriaceae, two wood-decaying fungi interacting in the context of esca disease of grapevine. For a comprehensive evaluation of the results, a multivariate data analysis combining Analysis of Variance and Partial Least Squares approaches, namely AMOPLS, was used to explore the complex LC-HRMS and GC-MS datasets and highlight dynamically induced compounds. A time-series study was carried out over 9 days, showing characteristic metabolite induction patterns in both volatile and non-volatile dimensions. Relevant links between the dynamics of expression of specific metabolite production were observed. In addition, the antifungal activity of 2-nonanone, a metabolite incrementally produced over time in the volatile fraction, was assessed against Eutypa lata and

  12. Investigations on the effects of electrode materials on the device characteristics of ferroelectric memory thin film transistors fabricated on flexible substrates

    Science.gov (United States)

    Yang, Ji-Hee; Yun, Da-Jeong; Seo, Gi-Ho; Kim, Seong-Min; Yoon, Myung-Han; Yoon, Sung-Min

    2018-03-01

    For flexible memory device applications, we propose memory thin-film transistors using an organic ferroelectric poly(vinylidene fluoride-trifluoroethylene) [P(VDF-TrFE)] gate insulator and an amorphous In-Ga-Zn-O (a-IGZO) active channel. The effects of electrode materials and their deposition methods on the characteristics of memory devices exploiting the ferroelectric field effect were investigated for the proposed ferroelectric memory thin-film transistors (Fe-MTFTs) at flat and bending states. It was found that the plasma-induced sputtering deposition and mechanical brittleness of the indium-tin oxide (ITO) markedly degraded the ferroelectric-field-effect-driven memory window and bending characteristics of the Fe-MTFTs. The replacement of ITO electrodes with metal aluminum (Al) electrodes prepared by plasma-free thermal evaporation greatly enhanced the memory device characteristics even under bending conditions owing to their mechanical ductility. Furthermore, poly(3,4-ethylenedioxythiophene)-poly(styrene sulfonate) (PEDOT:PSS) was introduced to achieve robust bending performance under extreme mechanical stress. The Fe-MTFTs using PEDOT:PSS source/drain electrodes were successfully fabricated and showed the potential for use as flexible memory devices. The suitable choice of electrode materials employed for the Fe-MTFTs is concluded to be one of the most important control parameters for highly functional flexible Fe-MTFTs.

  13. Memory

    OpenAIRE

    Wager, Nadia

    2017-01-01

    This chapter will explore a response to traumatic victimisation which has divided the opinions of psychologists at an exponential rate. We will be examining amnesia for memories of childhood sexual abuse and the potential to recover these memories in adulthood. Whilst this phenomenon is generally accepted in clinical circles, it is seen as highly contentious amongst research psychologists, particularly experimental cognitive psychologists. The chapter will begin with a real case study of a wo...

  14. Feasibility study of using a Zener diode as the selection device for bipolar RRAM and WORM memory arrays

    International Nuclear Information System (INIS)

    Li, Yingtao; Fu, Liping; Tao, Chunlan; Jiang, Xinyu; Sun, Pengxiao

    2014-01-01

    Cross-bar arrays are usually used for the high density application of resistive random access memory (RRAM) devices. However, cross-talk interference limits an increase in the integration density. In this paper, the Zener diode is proposed as a selection device to suppress the sneak current in bipolar RRAM arrays. Measurement results show that the Zener diode can act as a good selection device, and the sneak current can be effectively suppressed. The readout margin is sufficiently improved compared to that obtained without the selection device. Due to the improvement for the reading disturbance, the size of the cross-bar array can be enhanced to more than 10 3  × 10 3 . Furthermore, the possibility of using a write-once-read-many-times (WORM) cross-bar array is also demonstrated by connecting the Zener diode and the bipolar RRAM in series. These results strongly suggest that using a Zener diode as a selection device opens up great opportunities to realize high density bipolar RRAM arrays. (paper)

  15. Two-bit memory and quantized storage phenomenon in conventional MOS structures with double-stacked Pt-NCs in an HfAlO matrix.

    Science.gov (United States)

    Zhou, Guangdong; Wu, Bo; Liu, Xiaoqin; Li, Ping; Zhang, Shuangju; Sun, Bai; Zhou, Ankun

    2016-03-07

    A two-bit memory and quantized storage phenomenon are observed at room temperature for a device based on the traditional MOS structure with double-stacked Pt-nanocrystals (Pt-NCs). A 2.68 and 1.72 V flat band voltage shift (memory window) has been obtained when applying a ±7 V programming/erasing voltage to the structures with double-stacked Pt-NCs. The memory windows of 2.40 and 1.44 V can be retained after stress for 10(5) seconds, which correspond to 89.55% and 83.72% stored charges reserved. The quantized charge storage phenomenon characterized by current-voltage (J-V) hysteresis curves was detected at room temperature. The shrinkage of the memory window results from the decreasing tunneling probability, which strongly depends on the number of stacks. The traps, de-traps and quantum confinement effects of Pt-NCs may contribute to the improvement of dielectric characteristics and the two-bit memory behavior. The multi-bit memory and quantized storage behavior observed in the Pt-NCs stacks structure at room temperature might provide a feasible method for realizing the multi-bit storage in non-volatile flash memory devices.

  16. 3D Printing: 3D Printing of Shape Memory Polymers for Flexible Electronic Devices (Adv. Mater. 22/2016).

    Science.gov (United States)

    Zarek, Matt; Layani, Michael; Cooperstein, Ido; Sachyani, Ela; Cohn, Daniel; Magdassi, Shlomo

    2016-06-01

    On page 4449, D. Cohn, S. Magdassi, and co-workers describe a general and facile method based on 3D printing of methacrylated macromonomers to fabricate shape-memory objects that can be used in flexible and responsive electrical circuits. Such responsive objects can be used in the fabrication of soft robotics, minimal invasive medical devices, sensors, and wearable electronics. The use of 3D printing overcomes the poor processing characteristics of thermosets and enables complex geometries that are not easily accessible by other techniques. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  17. Untargeted metabolomic analysis using liquid chromatography quadrupole time-of-flight mass spectrometry for non-volatile profiling of wines

    Energy Technology Data Exchange (ETDEWEB)

    Arbulu, M. [Department of Analytical Chemistry, Faculty of Pharmacy, University of the Basque Country, 01006 Vitoria-Gasteiz (Spain); Sampedro, M.C. [Central Service of Analysis, SGIker, University of the Basque Country, 01006 Vitoria-Gasteiz (Spain); Gómez-Caballero, A.; Goicolea, M.A. [Department of Analytical Chemistry, Faculty of Pharmacy, University of the Basque Country, 01006 Vitoria-Gasteiz (Spain); Barrio, R.J., E-mail: r.barrio@ehu.es [Department of Analytical Chemistry, Faculty of Pharmacy, University of the Basque Country, 01006 Vitoria-Gasteiz (Spain)

    2015-02-09

    Highlights: • An untargeted metabolomic method for the non-volatile profile of the Graciano wine was developed. • 411 different metabolites in Graciano Vitis vinifera red wine were identified. • 15 compounds could serve to differentiate Graciano and Tempranillo wines. • An enological database (WinMet) with 2080 compounds was constructed. - Abstract: The current study presents a method for comprehensive untargeted metabolomic fingerprinting of the non-volatile profile of the Graciano Vitis vinifera wine variety, using liquid chromatography/electrospray ionization time of flight mass spectrometry (LC–ESI-QTOF). Pre-treatment of samples, chromatographic columns, mobile phases, elution gradients and ionization sources, were evaluated for the extraction of the maximum number of metabolites in red wine. Putative compounds were extracted from the raw data using the extraction algorithm, molecular feature extractor (MFE). For the metabolite identification the WinMet database was designed based on electronic databases and literature research and includes only the putative metabolites reported to be present in oenological matrices. The results from WinMet were compared with those in the METLIN database to evaluate how much the databases overlap for performing identifications. The reproducibility of the analysis was assessed using manual processing following replicate injections of Vitis vinifera cv. Graciano wine spiked with external standards. In the present work, 411 different metabolites in Graciano Vitis vinifera red wine were identified, including primary wine metabolites such as sugars (4%), amino acids (23%), biogenic amines (4%), fatty acids (2%), and organic acids (32%) and secondary metabolites such as phenols (27%) and esters (8%). Significant differences between varieties Tempranillo and Graciano were related to the presence of fifteen specific compounds.

  18. Untargeted metabolomic analysis using liquid chromatography quadrupole time-of-flight mass spectrometry for non-volatile profiling of wines

    International Nuclear Information System (INIS)

    Arbulu, M.; Sampedro, M.C.; Gómez-Caballero, A.; Goicolea, M.A.; Barrio, R.J.

    2015-01-01

    Highlights: • An untargeted metabolomic method for the non-volatile profile of the Graciano wine was developed. • 411 different metabolites in Graciano Vitis vinifera red wine were identified. • 15 compounds could serve to differentiate Graciano and Tempranillo wines. • An enological database (WinMet) with 2080 compounds was constructed. - Abstract: The current study presents a method for comprehensive untargeted metabolomic fingerprinting of the non-volatile profile of the Graciano Vitis vinifera wine variety, using liquid chromatography/electrospray ionization time of flight mass spectrometry (LC–ESI-QTOF). Pre-treatment of samples, chromatographic columns, mobile phases, elution gradients and ionization sources, were evaluated for the extraction of the maximum number of metabolites in red wine. Putative compounds were extracted from the raw data using the extraction algorithm, molecular feature extractor (MFE). For the metabolite identification the WinMet database was designed based on electronic databases and literature research and includes only the putative metabolites reported to be present in oenological matrices. The results from WinMet were compared with those in the METLIN database to evaluate how much the databases overlap for performing identifications. The reproducibility of the analysis was assessed using manual processing following replicate injections of Vitis vinifera cv. Graciano wine spiked with external standards. In the present work, 411 different metabolites in Graciano Vitis vinifera red wine were identified, including primary wine metabolites such as sugars (4%), amino acids (23%), biogenic amines (4%), fatty acids (2%), and organic acids (32%) and secondary metabolites such as phenols (27%) and esters (8%). Significant differences between varieties Tempranillo and Graciano were related to the presence of fifteen specific compounds

  19. Detection of an organic-non volatile compound in variable-contaminated volcanic soil samples via Time Domain Reflectometry (TDR) technique: Preliminary results

    Science.gov (United States)

    comegna, alessandro; coppola, antonio; dragonetti, giovanna; chaali, nesrine; sommella, angelo

    2014-05-01

    Hydrocarbons may be present in soils as non-aqueous phase liquids (NAPLs), which means that these organic compounds, exist as a separate and immiscible phase with respect to water and air commonly present in the soil. NAPLs, which can be accidentally introduced in the environment (for example by waste disposal sites, industrial spills, gasoline stations, etc), constitutes a serious geo-environmental problem, given the toxicity level and the high mobility. Time domain reflectometry (TDR) has became, over several decades, an important technique for water estimation in soils. In order to expand the potentiality of the TDR technique, the main objective of this study is to explore the capacity of dielectric response to detect the presence of NAPLs in volcanic soils. In laboratory, soil samples were oven dried at 105° C and passed through a 2 mm sieve. Known quantities of soil, water and NAPL (corn oil, a non-volatile and non-toxic organic compound) were mixed and repacked into plastic cylinders (16 cm high and 9.5 cm in diameter); in order to obtain forty different volumetric combinations of water and oil (i.e. θfg = θwater + θNAPL), with θNAPL varying from 0.05 to 0.40 by 0.05 cm3/cm3 increments. Data collected were employed to implement a multiphase mixing model which permitted conversion from a dielectric permittivity domain into a θf domain and vice versa. The results of this study show that, the TDR device is NAPL-sensitive, especially for θf values greater than 0.20. Further works will be built on this initial study, concentrating on improving the dielectric response-database, in order to: i) enhancing the model efficiency in terms of NAPL capability detention, and ii) validating the developed TDR interpretation tool with field results.

  20. Highly scalable 3-D NAND-NOR hybrid-type dual bit per cell flash memory devices with an additional cut-off gate

    International Nuclear Information System (INIS)

    Cho, Seongjae; Shim, Wonbo; Park, Ilhan; Kim, Yoon; Park, Byunggook

    2010-01-01

    In this work, a nonvolatile memory (NVM) device of novel structure in 3 dimensions is introduced, and its operation physics is validated. It is based on a pillar structure in which two identical storage nodes are located for dual-bit operation. The two storage nodes on neighboring pillars are controlled by using one common control gate so that the space between silicon pillars can be further reduced. For compatibility with conventional memory operations, an additional cut-off gate is constructed under the common control gate. This is considered as the ultimate form for a 3-D nonvolatile memory device based on a double-gate structure. The underlying physics is explained, and the operational schemes are validated in various aspects by using a numerical device simulation. Also, critical issues in device design for higher reliability are discussed.