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Sample records for n-channel metal-oxide-semiconductor field-effect

  1. A comparison of ionizing radiation and high field stress effects in n-channel power vertical double-diffused metal-oxide-semiconductor field-effect transistors

    International Nuclear Information System (INIS)

    Park, Mun-Soo; Na, Inmook; Wie, Chu R.

    2005-01-01

    n-channel power vertical double-diffused metal-oxide-semiconductor field-effect-transistor (VDMOSFET) devices were subjected to a high electric field stress or to a x-ray radiation. The current-voltage and capacitance-voltage measurements show that the channel-side interface and the drain-side interface are affected differently in the case of high electric field stress, whereas the interfaces are nearly uniformly affected in the case of x-ray radiation. This paper also shows that for the gated diode structure of VDMOSFET, the direct-current current-voltage technique measures only the drain-side interface; the subthreshold current-voltage technique measures only the channel-side interface; and the capacitance-voltage technique measures both interfaces simultaneously and clearly distinguishes the two interfaces. The capacitance-voltage technique is suggested to be a good quantitative method to examine both interface regions by a single measurement

  2. Scheme for the fabrication of ultrashort channel metal-oxide-semiconductor field-effect transistors

    International Nuclear Information System (INIS)

    Appenzeller, J.; Martel, R.; Solomon, P.; Chan, K.; Avouris, Ph.; Knoch, J.; Benedict, J.; Tanner, M.; Thomas, S.; Wang, K. L.

    2000-01-01

    We present a scheme for the fabrication of ultrashort channel length metal-oxide-semiconductor field-effect transistors (MOSFETs) involving nanolithography and molecular-beam epitaxy. The active channel is undoped and is defined by a combination of nanometer-scale patterning and anisotropic etching of an n ++ layer grown on a silicon on insulator wafer. The method is self-limiting and can produce MOSFET devices with channel lengths of less than 10 nm. Measurements on the first batch of n-MOSFET devices fabricated with this approach show very good output characteristics and good control of short-channel effects. (c) 2000 American Institute of Physics

  3. Gate controlled magnetoresistance in a silicon metal-oxide-semiconductor field-effect-transistor

    Science.gov (United States)

    Ciccarelli, C.; Park, B. G.; Ogawa, S.; Ferguson, A. J.; Wunderlich, J.

    2010-08-01

    We present a study of the magnetoresistance (MR) of a Si metal-oxide-semiconductor field-effect-transistor (MOSFET) at the break-down regime when a magnetic field is applied perpendicular to the plane of the device. We have identified two different regimes where we observe a large and gate-voltage dependent MR. We suggest two different mechanisms which can explain the observed high MR. Moreover, we have studied how the MR of the MOSFET scales with the dimensions of the channel for gate voltages below the threshold. We observed a decrease in the MR by two orders of magnitude by reducing the dimensions of the channel from 50×280 μm2 to 5×5 μm2.

  4. Optimal design of an electret microphone metal-oxide-semiconductor field-effect transistor preamplifier.

    Science.gov (United States)

    van der Donk, A G; Bergveld, P

    1992-04-01

    A theoretical noise analysis of the combination of a capacitive microphone and a preamplifier containing a metal-oxide-semiconductor field-effect transistor (MOSFET) and a high-value resistive bias element is given. It is found that the output signal-to-noise ratio for a source follower and for a common-source circuit is almost the same. It is also shown that the output noise can be reduced by making the microphone capacitance as well as the bias resistor as large as possible, and furthermore by keeping the parasitic gate capacitances as low as possible and finally by using an optimum value for the gate area of the MOSFET. The main noise source is the thermal noise of the gate leakage resistance of the MOSFET. It is also shown that short-channel MOSFETs produce more thermal channel noise than longer channel devices.

  5. Semi-classical noise investigation for sub-40nm metal-oxide-semiconductor field-effect transistors

    OpenAIRE

    C. Spathis; A. Birbas; K. Georgakopoulou

    2015-01-01

    Device white noise levels in short channel Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs) dictate the performance and reliability of high-frequency circuits ranging from high-speed microprocessors to Low-Noise Amplifiers (LNAs) and microwave circuits. Recent experimental noise measurements with very short devices demonstrate the existence of suppressed shot noise, contrary to the predictions of classical channel thermal noise models. In this work we show that, as the dimensions ...

  6. Molecular-beam-deposited yttrium-oxide dielectrics in aluminum-gated metal - oxide - semiconductor field-effect transistors: Effective electron mobility

    International Nuclear Information System (INIS)

    Ragnarsson, L.-A degree.; Guha, S.; Copel, M.; Cartier, E.; Bojarczuk, N. A.; Karasinski, J.

    2001-01-01

    We report on high effective mobilities in yttrium-oxide-based n-channel metal - oxide - semiconductor field-effect transistors (MOSFETs) with aluminum gates. The yttrium oxide was grown in ultrahigh vacuum using a reactive atomic-beam-deposition system. Medium-energy ion-scattering studies indicate an oxide with an approximate composition of Y 2 O 3 on top of a thin layer of interfacial SiO 2 . The thickness of this interfacial oxide as well as the effective mobility are found to be dependent on the postgrowth anneal conditions. Optimum conditions result in mobilities approaching that of SiO 2 -based MOSFETs at higher fields with peak mobilities at approximately 210 cm 2 /Vs. [copyright] 2001 American Institute of Physics

  7. Nanoampere charge pump by single-electron ratchet using silicon nanowire metal-oxide-semiconductor field-effect transistor

    Science.gov (United States)

    Fujiwara, Akira; Nishiguchi, Katsuhiko; Ono, Yukinori

    2008-01-01

    Nanoampere single-electron pumping is presented at 20K using a single-electron ratchet comprising silicon nanowire metal-oxide-semiconductor field-effect transistors. The ratchet features an asymmetric potential with a pocket that captures single electrons from the source and ejects them to the drain. Directional single-electron transfer is achieved by applying one ac signal with the frequency up to 2.3GHz. We find anomalous shapes of current steps which can be ascribed to nonadiabatic electron capture.

  8. Metal-oxide-semiconductor AlGaN/GaN heterostructure field-effect transistors using TiN/AlO stack gate layer deposited by reactive sputtering

    International Nuclear Information System (INIS)

    Li, Liuan; Wang, Qingpeng; Nakamura, Ryosuke; Jiang, Ying; Ao, Jin-Ping; Xu, Yonggang

    2015-01-01

    In this paper, the influence of deposition conditions and post annealing upon the device performance of sputtering-deposited TiN/AlO/AlGaN/GaN metal-oxide-semiconductor heterostructure field-effect transistors is reported. The metal-oxide-semiconductor structure on GaN with AlO deposited in a medium O 2 /Ar ratio possessed the smallest interfacial state density and reverse leakage current. Metal-oxide-semiconductor heterostructure field-effect transistors with a small hysteresis and a low leakage current were obtained by depositing AlO with a medium O 2 /Ar ratio and post-annealing at 600 °C for 1 min. After annealing, the maximum transconductance shows some decrease, resulting in a decrease of saturation drain current. (paper)

  9. Single photon sources in 4H-SiC metal-oxide-semiconductor field-effect transistors

    Science.gov (United States)

    Abe, Y.; Umeda, T.; Okamoto, M.; Kosugi, R.; Harada, S.; Haruyama, M.; Kada, W.; Hanaizumi, O.; Onoda, S.; Ohshima, T.

    2018-01-01

    We present single photon sources (SPSs) embedded in 4H-SiC metal-oxide-semiconductor field-effect transistors (MOSFETs). They are formed in the SiC/SiO2 interface regions of wet-oxidation C-face 4H-SiC MOSFETs and were not found in other C-face and Si-face MOSFETs. Their bright room-temperature photoluminescence (PL) was observed in the range from 550 to 750 nm and revealed variable multi-peak structures as well as variable peak shifts. We characterized a wide variety of their PL spectra as the inevitable variation of local atomic structures at the interface. Their polarization dependence indicates that they are formed at the SiC side of the interface. We also demonstrate that it is possible to switch on/off the SPSs by a bias voltage of the MOSFET.

  10. Effect of channel orientation in p-type nanowire Schottky barrier metal-oxide-semiconductor field-effect transistors

    Science.gov (United States)

    Shin, Mincheol

    2010-08-01

    Device performance of p-type nanowire Schotty barrier metal-oxide-semiconductor field-effect transistors is investigated focusing on the channel orientation effects. A rigorous quantum-mechanical calculation of hole current based on the multiband k ṡp method is carried out. The [111] oriented devices show the most superior performance, in terms of subthreshold slope, threshold voltage variation, and on-current. In particular, on-current in the [111] oriented devices is about twice as large as that in the [100] oriented devices. Tunneling effective mass, quantization energy, and Schottky barrier thickness are examined as the major factors that influence on the orientation-dependent current injection into the channel.

  11. Experimental study on vertical scaling of InAs-on-insulator metal-oxide-semiconductor field-effect transistors

    Science.gov (United States)

    Kim, SangHyeon; Yokoyama, Masafumi; Nakane, Ryosho; Ichikawa, Osamu; Osada, Takenori; Hata, Masahiko; Takenaka, Mitsuru; Takagi, Shinichi

    2014-06-01

    We have investigated effects of the vertical scaling on electrical properties in extremely thin-body InAs-on-insulator (-OI) metal-oxide-semiconductor field-effect transistors (MOSFETs). It is found that the body thickness (Tbody) scaling provides better short channel effect (SCE) control, whereas the Tbody scaling also causes the reduction of the mobility limited by channel thickness fluctuation (δTbody) scattering (μfluctuation). Also, in order to achieve better SCEs control, the thickness of InAs channel layer (Tchannel) scaling is more favorable than the thickness of MOS interface buffer layer (Tbuffer) scaling from a viewpoint of a balance between SCEs control and μfluctuation reduction. These results indicate necessity of quantum well channel structure in InAs-OI MOSFETs and these should be considered in future transistor design.

  12. Semi-classical noise investigation for sub-40nm metal-oxide-semiconductor field-effect transistors

    Directory of Open Access Journals (Sweden)

    C. Spathis

    2015-08-01

    Full Text Available Device white noise levels in short channel Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs dictate the performance and reliability of high-frequency circuits ranging from high-speed microprocessors to Low-Noise Amplifiers (LNAs and microwave circuits. Recent experimental noise measurements with very short devices demonstrate the existence of suppressed shot noise, contrary to the predictions of classical channel thermal noise models. In this work we show that, as the dimensions continue to shrink, shot noise has to be considered when the channel resistance becomes comparable to the barrier resistance at the source-channel junction. By adopting a semi-classical approach and taking retrospectively into account transport, short-channel and quantum effects, we investigate the partitioning between shot and thermal noise, and formulate a predictive model that describes the noise characteristics of modern devices.

  13. Semi-classical noise investigation for sub-40nm metal-oxide-semiconductor field-effect transistors

    Science.gov (United States)

    Spathis, C.; Birbas, A.; Georgakopoulou, K.

    2015-08-01

    Device white noise levels in short channel Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs) dictate the performance and reliability of high-frequency circuits ranging from high-speed microprocessors to Low-Noise Amplifiers (LNAs) and microwave circuits. Recent experimental noise measurements with very short devices demonstrate the existence of suppressed shot noise, contrary to the predictions of classical channel thermal noise models. In this work we show that, as the dimensions continue to shrink, shot noise has to be considered when the channel resistance becomes comparable to the barrier resistance at the source-channel junction. By adopting a semi-classical approach and taking retrospectively into account transport, short-channel and quantum effects, we investigate the partitioning between shot and thermal noise, and formulate a predictive model that describes the noise characteristics of modern devices.

  14. Vertical InAs/InGaAs Heterostructure Metal-Oxide-Semiconductor Field-Effect Transistors on Si.

    Science.gov (United States)

    Kilpi, Olli-Pekka; Svensson, Johannes; Wu, Jun; Persson, Axel R; Wallenberg, Reine; Lind, Erik; Wernersson, Lars-Erik

    2017-10-11

    III-V compound semiconductors offer a path to continue Moore's law due to their excellent electron transport properties. One major challenge, integrating III-V's on Si, can be addressed by using vapor-liquid-solid grown vertical nanowires. InAs is an attractive material due to its superior mobility, although InAs metal-oxide-semiconductor field-effect transistors (MOSFETs) typically suffer from band-to-band tunneling caused by its narrow band gap, which increases the off-current and therefore the power consumption. In this work, we present vertical heterostructure InAs/InGaAs nanowire MOSFETs with low off-currents provided by the wider band gap material on the drain side suppressing band-to-band tunneling. We demonstrate vertical III-V MOSFETs achieving off-current below 1 nA/μm while still maintaining on-performance comparable to InAs MOSFETs; therefore, this approach opens a path to address not only high-performance applications but also Internet-of-Things applications that require low off-state current levels.

  15. A New Analytical Subthreshold Behavior Model for Single-Halo, Dual-Material Gate Silicon-on-Insulator Metal Oxide Semiconductor Field Effect Transistor

    Science.gov (United States)

    Chiang, Te-Kuang

    2008-11-01

    On the basis of the exact solution of the two-dimensional Poisson equation, a new analytical subthreshold behavior model consisting of the two-dimensional potential, threshold voltage, and subthreshold current for the single-halo, dual-material gate (SHDMG) silicon-on-insulator (SOI) metal oxide semiconductor field effect transistor (MOSFET) is developed. The model is verified by the good agreement with a numerical simulation using the device simulator MEDICI. The model not only offers a physical insight into device physics but is also an efficient device model for the circuit simulation.

  16. Trivalued Memory Circuit Using Metal-Oxide-Semiconductor Field-Effect Transistor Bipolar-Junction-Transistor Negative-Differential-Resistance Circuits Fabricated by Standard SiGe Process

    Science.gov (United States)

    Gan, Kwang-Jow; Tsai, Cher-Shiung; Liang, Dong-Shong; Wen, Chun-Ming; Chen, Yaw-Hwang

    2006-09-01

    A trivalued memory circuit based on two cascoded metal-oxide-semiconductor field-effect transistor bipolar-junction-transistor negative-differential-resistance (MOS-BJT-NDR) devices is investigated. The MOS-BJT-NDR device is made of MOS and BJT devices, but it can show the NDR current-voltage characteristic by suitably arranging the MOS parameters. We demonstrate a trivalued memory circuit using the two-peak MOS-BJT-NDR circuit as the driver and a resistor as the load. The MOS-BJT-NDR devices and memory circuits are fabricated by the standard 0.35 μm SiGe process.

  17. Calibration and error analysis of metal-oxide-semiconductor field-effect transistor dosimeters for computed tomography radiation dosimetry.

    Science.gov (United States)

    Trattner, Sigal; Prinsen, Peter; Wiegert, Jens; Gerland, Elazar-Lars; Shefer, Efrat; Morton, Tom; Thompson, Carla M; Yagil, Yoad; Cheng, Bin; Jambawalikar, Sachin; Al-Senan, Rani; Amurao, Maxwell; Halliburton, Sandra S; Einstein, Andrew J

    2017-12-01

    Metal-oxide-semiconductor field-effect transistors (MOSFETs) serve as a helpful tool for organ radiation dosimetry and their use has grown in computed tomography (CT). While different approaches have been used for MOSFET calibration, those using the commonly available 100 mm pencil ionization chamber have not incorporated measurements performed throughout its length, and moreover, no previous work has rigorously evaluated the multiple sources of error involved in MOSFET calibration. In this paper, we propose a new MOSFET calibration approach to translate MOSFET voltage measurements into absorbed dose from CT, based on serial measurements performed throughout the length of a 100-mm ionization chamber, and perform an analysis of the errors of MOSFET voltage measurements and four sources of error in calibration. MOSFET calibration was performed at two sites, to determine single calibration factors for tube potentials of 80, 100, and 120 kVp, using a 100-mm-long pencil ion chamber and a cylindrical computed tomography dose index (CTDI) phantom of 32 cm diameter. The dose profile along the 100-mm ion chamber axis was sampled in 5 mm intervals by nine MOSFETs in the nine holes of the CTDI phantom. Variance of the absorbed dose was modeled as a sum of the MOSFET voltage measurement variance and the calibration factor variance, the latter being comprised of three main subcomponents: ionization chamber reading variance, MOSFET-to-MOSFET variation and a contribution related to the fact that the average calibration factor of a few MOSFETs was used as an estimate for the average value of all MOSFETs. MOSFET voltage measurement error was estimated based on sets of repeated measurements. The calibration factor overall voltage measurement error was calculated from the above analysis. Calibration factors determined were close to those reported in the literature and by the manufacturer (~3 mV/mGy), ranging from 2.87 to 3.13 mV/mGy. The error σ V of a MOSFET voltage

  18. Single-electron effects in non-overlapped multiple-gate silicon-on-insulator metal-oxide-semiconductor field-effect transistors.

    Science.gov (United States)

    Lee, W; Su, P

    2009-02-11

    This paper systematically presents controlled single-electron effects in multiple-gate silicon-on-insulator (SOI) metal-oxide-semiconductor field-effect transistors (MOSFETs) with various gate lengths, fin widths, gate bias and temperature. Our study indicates that using the non-overlapped gate to source/drain structure as an approach to the single-electron transistor (SET) in MOSFETs is promising. Combining the advantage of gate control and the constriction of high source/drain resistances, single-electron effects are further enhanced using the multiple-gate architecture. From the presented results, downsizing multiple-gate SOI MOSFETs is needed for future room-temperature SET applications. Besides, the tunnel barriers and access resistances may need to be further optimized. Since the Coulomb blockade oscillation can be achieved in state-of-the-art complementary metal-oxide-semiconductor (CMOS) devices, it is beneficial to build SETs in low-power CMOS circuits for ultra-high-density purposes.

  19. Electrical characterization of Ω-gated uniaxial tensile strained Si nanowire-array metal-oxide-semiconductor field effect transistors with - and channel orientations

    International Nuclear Information System (INIS)

    Habicht, Stefan; Feste, Sebastian; Zhao, Qing-Tai; Buca, Dan; Mantl, Siegfried

    2012-01-01

    Nanowire-array metal-oxide-semiconductor field effect transistors (MOSFETs) were fabricated along and crystal directions on (001) un-/strained silicon-on-insulator substrates. Lateral strain relaxation through patterning was employed to transform biaxial tensile strain into uniaxial tensile strain along the nanowire. Devices feature ideal subthreshold swings and maximum on-current/off-current ratios of 10 11 for n and p-type transistors on both substrates. Electron and hole mobilities were extracted by split C–V method. For p-MOSFETs an increased mobility is observed for channel direction devices compared to devices. The n-MOSFETs showed a 45% increased electron mobility compared to devices. The comparison of strained and unstrained n-MOSFETs along and clearly demonstrates improved electron mobilities for strained channels of both channel orientations.

  20. Identification of Fixed and Interface Trap Charges in Hot-Carrier Stressed Metal Oxide Semiconductor Field Effect Transistors (MOSFET's) through Ultraviolet Light Anneal and Gate Capacitance Measurements

    Science.gov (United States)

    Ling, C.

    1995-01-01

    Fixed and interface trap charges in hot-carrier degraded metal oxide semiconductor field effect transistors (MOSFET's) can be distinguished by ultraviolet light (λ=253.7 nm) annealing, and observing the resultant changes in the gate-to-drain capacitance. Trapped electrons anneal readily, resulting in large changes in the gate capacitance and the threshold voltage. This suggests a trap level below the conduction band edge of SiO2 that is smaller than the photon energy (4.9 eV). In contrast, trapped holes and interface traps do not anneal, or anneal insignificantly even after prolonged irradiation. This is consistent with a much deeper hole trap level in SiO2, generally reported.

  1. Effect of intravalley acoustic phonon scattering on quantum transport in multigate silicon nanowire metal-oxide-semiconductor field-effect transistors

    Science.gov (United States)

    Akhavan, Nima Dehdashti; Afzalian, Aryan; Lee, Chi-Woo; Yan, Ran; Ferain, Isabelle; Razavi, Pedram; Yu, Ran; Fagas, Giorgos; Colinge, Jean-Pierre

    2010-08-01

    In this paper we investigate the effects of intravalley acoustic phonon scattering on the quantum transport and on the electrical characteristics of multigate silicon nanowire metal-oxide-semiconductor field-effect transistors. We show that acoustic phonons cause a shift and broadening of the local DOS in the nanowire, which modifies the electrical characteristics of the device. The influence of scattering on off-state and on-state currents is investigated for different values of channel length. In the ballistic transport regime, source-to-drain tunneling current is predominant, whereas in the presence of acoustic phonons, diffusion becomes the dominant current transport mechanism. A three-dimensional quantum mechanical device simulator based on the nonequilibrium Green's function formalism in uncoupled-mode space has been developed to extract device parameters in the presence of electron-phonon interactions. Electron-phonon scattering is accounted for by adopting the self-consistent Born approximation and using the deformation potential theory.

  2. P-Channel InGaN/GaN heterostructure metal-oxide-semiconductor field effect transistor based on polarization-induced two-dimensional hole gas.

    Science.gov (United States)

    Zhang, Kexiong; Sumiya, Masatomo; Liao, Meiyong; Koide, Yasuo; Sang, Liwen

    2016-03-29

    The concept of p-channel InGaN/GaN heterostructure field effect transistor (FET) using a two-dimensional hole gas (2DHG) induced by polarization effect is demonstrated. The existence of 2DHG near the lower interface of InGaN/GaN heterostructure is verified by theoretical simulation and capacitance-voltage profiling. The metal-oxide-semiconductor FET (MOSFET) with Al2O3 gate dielectric shows a drain-source current density of 0.51 mA/mm at the gate voltage of -2 V and drain bias of -15 V, an ON/OFF ratio of two orders of magnitude and effective hole mobility of 10 cm(2)/Vs at room temperature. The normal operation of MOSFET without freeze-out at 8 K further proves that the p-channel behavior is originated from the polarization-induced 2DHG.

  3. New Analytical Model for Short-Channel Fully Depleted Dual-Material-Gate Silicon-on-Insulator Metal-Oxide-Semiconductor Field-Effect Transistors

    Science.gov (United States)

    Te-Kuang Chiang,

    2010-07-01

    Using the exact solution of the two-dimensional Poisson equation, a new analytical model comprising two-dimensional potential and threshold voltage for short-channel fully depleted dual-material-gate silicon-on-insulator (SOI) metal-oxide-semiconductor field-effect transistors (MOSFETs) is developed. The model shows that the minimum acceptable channel length can be sustained while repressing the short-channel effects if a thin gate oxide and a thin silicon body are employed in the device. Moreover, by increasing the ratio of the screen gate length to control gate length, the threshold voltage roll-off can be more effectively reduced. The model is verified by the close agreement of its results with those of a numerical simulation using the device simulator MEDICI. The model not only offers an insight into the device physics but is also an efficient model for circuit simulation.

  4. Spin-dependent transport properties of a GaMnAs-based vertical spin metal-oxide-semiconductor field-effect transistor structure

    International Nuclear Information System (INIS)

    Kanaki, Toshiki; Asahara, Hirokatsu; Ohya, Shinobu; Tanaka, Masaaki

    2015-01-01

    We fabricate a vertical spin metal-oxide-semiconductor field-effect transistor (spin-MOSFET) structure, which is composed of an epitaxial single-crystal heterostructure with a ferromagnetic-semiconductor GaMnAs source/drain, and investigate its spin-dependent transport properties. We modulate the drain-source current I DS by ∼±0.5% with a gate-source voltage of ±10.8 V and also modulate I DS by up to 60% with changing the magnetization configuration of the GaMnAs source/drain at 3.5 K. The magnetoresistance ratio is more than two orders of magnitude higher than that obtained in the previous studies on spin MOSFETs. Our result shows that a vertical structure is one of the hopeful candidates for spin MOSFET when the device size is reduced to a sub-micron or nanometer scale

  5. Single carrier trapping and de-trapping in scaled silicon complementary metal-oxide-semiconductor field-effect transistors at low temperatures

    Science.gov (United States)

    Li, Zuo; Khaled Husain, Muhammad; Yoshimoto, Hiroyuki; Tani, Kazuki; Sasago, Yoshitaka; Hisamoto, Digh; Fletcher, Jonathan David; Kataoka, Masaya; Tsuchiya, Yoshishige; Saito, Shinichi

    2017-07-01

    The scaling of Silicon (Si) technology is approaching the physical limit, where various quantum effects such as direct tunnelling and quantum confinement are observed, even at room temperatures. We have measured standard complementary metal-oxide-semiconductor field-effect-transistors (CMOSFETs) with wide and short channels at low temperatures to observe single electron/hole characteristics due to local structural disturbances such as roughness and defects. In fact, we observed Coulomb blockades in sub-threshold regimes of both p-type and n-type Si CMOSFETs, showing the presence of quantum dots in the channels. The stability diagrams for the Coulomb blockade were explained by the potential minima due to poly-Si grains. We have also observed sharp current peaks at narrow bias windows at the edges of the Coulomb diamonds, showing resonant tunnelling of single carriers through charge traps.

  6. A reliable extraction method for source and drain series resistances in silicon nanowire metal-oxide-semiconductor field-effect-transistors (MOSFETs) based on radio-frequency analysis.

    Science.gov (United States)

    Hwa, Jae Hwa; Yoon, Young Jun; Lee, Hwan Gi; Yoo, Gwan Min; Cho, Eou-Sik; Cho, Seongjae; Lee, Jung-Hee; Kang, In Man

    2014-11-01

    This paper presents a new extraction method for source and drain (S/D) series resistances of silicon nanowire (SNW) metal-oxide-semiconductor field-effect transistors (MOSFETs) based on small-signal radio-frequency (RF) analysis. The proposed method can be applied to the extraction of S/D series resistances for SNW MOSFETs with finite off-state channel resistance as well as gate bias-dependent on-state resistive components realized by 3-dimensional (3-D) device simulation. The series resistances as a function of frequency and gate voltage are presented and compared with the results obtained by an existing method with infinite off-state channel resistance model. The accuracy of the newly proposed parameter extraction method has been successfully verified by Z22- and Y-parameters up to 100 GHz operation frequency.

  7. Non-Stoichiometric SixN Metal-Oxide-Semiconductor Field-Effect Transistor for Compact Random Number Generator with 0.3 Mbit/s Generation Rate

    Science.gov (United States)

    Matsumoto, Mari; Ohba, Ryuji; Yasuda, Shin-ichi; Uchida, Ken; Tanamoto, Tetsufumi; Fujita, Shinobu

    2008-08-01

    The demand for random numbers for security applications is increasing. A conventional random number generator using thermal noise can generate unpredictable high-quality random numbers, but the circuit is extremely large because of large amplifier circuit for a small thermal signal. On the other hand, a pseudo-random number generator is small but the quality of randomness is bad. For a small circuit and a high quality of randomness, we purpose a non-stoichiometric SixN metal-oxide-semiconductor field-effect transistor (MOSFET) noise source device. This device generates a very large noise signal without an amplifier circuit. As a result, it is shown that, utilizing a SiN MOSFET, we can attain a compact random number generator with a high generation rate near 1 Mbit/s, which is suitable for almost all security applications.

  8. An accurate simulation study on capacitance-voltage characteristics of metal-oxide-semiconductor field-effect transistors in novel structures

    Science.gov (United States)

    Yu, Eunseon; Cho, Seongjae; Park, Byung-Gook

    2017-09-01

    An essential and important method for physical and electrical characterization of a metal-oxide-semiconductor (MOS) structure is the capacitance-voltage (C-V) measurement. Judging from the C-V characteristics of a MOS structure, we are allowed to predict the DC and AC behaviors of the field-effect transistor and extract a set of primary parameters. The MOS field-effect transistor (MOSFET) technology has evolved to enhance the gate controllability over the channel in order for effectively suppressing the short-channel effects (SCEs) unwantedly taking place as device scaling progresses. For the goal, numerous novel structures have been suggested for the advanced MOSFET devices. However, the C-V characteristics of such novel MOS structures have not been seldom studied in depth. In this work, we report the C-V characteristics of ultra-thin-body (UTB) MOSFETs on the bulk Si and silicon-on-insulator (SOI) substrates by rigorous technology computer-aided design (TCAD) simulation. For higher credibility and accuracy, quantum-mechanical models are activated and empirical material parameters are employed from the existing literature. The MOSFET structure and the material configurations are schemed referring advanced logic technology suggested by the most recent technology roadmap. The C-V characteristics of UTB MOSFETs having a floating body with extremely small volume are closely investigated.

  9. Monolithic integration of a silicon nanowire field-effect transistors array on a complementary metal-oxide semiconductor chip for biochemical sensor applications.

    Science.gov (United States)

    Livi, Paolo; Kwiat, Moria; Shadmani, Amir; Pevzner, Alexander; Navarra, Giulio; Rothe, Jörg; Stettler, Alexander; Chen, Yihui; Patolsky, Fernando; Hierlemann, Andreas

    2015-10-06

    We present a monolithic complementary metal-oxide semiconductor (CMOS)-based sensor system comprising an array of silicon nanowire field-effect transistors (FETs) and the signal-conditioning circuitry on the same chip. The silicon nanowires were fabricated by chemical vapor deposition methods and then transferred to the CMOS chip, where Ti/Pd/Ti contacts had been patterned via e-beam lithography. The on-chip circuitry measures the current flowing through each nanowire FET upon applying a constant source-drain voltage. The analog signal is digitized on chip and then transmitted to a receiving unit. The system has been successfully fabricated and tested by acquiring I-V curves of the bare nanowire-based FETs. Furthermore, the sensing capabilities of the complete system have been demonstrated by recording current changes upon nanowire exposure to solutions of different pHs, as well as by detecting different concentrations of Troponin T biomarkers (cTnT) through antibody-functionalized nanowire FETs.

  10. Study on the drain bias effect on negative bias temperature instability degradation of an ultra-short p-channel metal-oxide-semiconductor field-effect transistor

    International Nuclear Information System (INIS)

    Yan-Rong, Cao; Xiao-Hua, Ma; Yue, Hao; Shi-Gang, Hu

    2010-01-01

    This paper studies the effect of drain bias on ultra-short p-channel metal-oxide-semiconductor field-effect transistor (PMOSFET) degradation during negative bias temperature (NBT) stress. When a relatively large gate voltage is applied, the degradation magnitude is much more than the drain voltage which is the same as the gate voltage supplied, and the time exponent gets larger than that of the NBT instability (NBTI). With decreasing drain voltage, the degradation magnitude and the time exponent all get smaller. At some values of the drain voltage, the degradation magnitude is even smaller than that of NBTI, and when the drain voltage gets small enough, the exhibition of degradation becomes very similar to the NBTI degradation. When a relatively large drain voltage is applied, with decreasing gate voltage, the degradation magnitude gets smaller. However, the time exponent becomes larger. With the help of electric field simulation, this paper concludes that the degradation magnitude is determined by the vertical electric field of the oxide, the amount of hot holes generated by the strong channel lateral electric field at the gate/drain overlap region, and the time exponent is mainly controlled by localized damage caused by the lateral electric field of the oxide in the gate/drain overlap region where hot carriers are produced. (condensed matter: electronic structure, electrical, magnetic, and optical properties)

  11. Modeling of anisotropic two-dimensional materials monolayer HfS{sub 2} and phosphorene metal-oxide semiconductor field effect transistors

    Energy Technology Data Exchange (ETDEWEB)

    Chang, Jiwon [SEMATECH, 257 Fuller Rd #2200, Albany, New York 12203 (United States)

    2015-06-07

    Ballistic transport characteristics of metal-oxide semiconductor field effect transistors (MOSFETs) based on anisotropic two-dimensional materials monolayer HfS{sub 2} and phosphorene are explored through quantum transport simulations. We focus on the effects of the channel crystal orientation and the channel length scaling on device performances. Especially, the role of degenerate conduction band (CB) valleys in monolayer HfS{sub 2} is comprehensively analyzed. Benchmarking monolayer HfS{sub 2} with phosphorene MOSFETs, we predict that the effect of channel orientation on device performances is much weaker in monolayer HfS{sub 2} than in phosphorene due to the degenerate CB valleys of monolayer HfS{sub 2}. Our simulations also reveal that at 10 nm channel length scale, phosphorene MOSFETs outperform monolayer HfS{sub 2} MOSFETs in terms of the on-state current. However, it is observed that monolayer HfS{sub 2} MOSFETs may offer comparable, but a little bit degraded, device performances as compared with phosphorene MOSFETs at 5 nm channel length.

  12. Effective dose assessment in the maxillofacial region using thermoluminescent (TLD) and metal oxide semiconductor field-effect transistor (MOSFET) dosemeters: a comparative study

    Science.gov (United States)

    Schulze, D; Wolff, J; Rottke, D

    2014-01-01

    Objectives: The objective of this study was to compare the performance of metal oxide semiconductor field-effect transistor (MOSFET) technology dosemeters with thermoluminescent dosemeters (TLDs) (TLD 100; Thermo Fisher Scientific, Waltham, MA) in the maxillofacial area. Methods: Organ and effective dose measurements were performed using 40 TLD and 20 MOSFET dosemeters that were alternately placed in 20 different locations in 1 anthropomorphic RANDO® head phantom (the Phantom Laboratory, Salem, NY). The phantom was exposed to four different CBCT default maxillofacial protocols using small (4 × 5 cm) to full face (20 × 17 cm) fields of view (FOVs). Results: The TLD effective doses ranged between 7.0 and 158.0 µSv and the MOSFET doses between 6.1 and 175.0 µSv. The MOSFET and TLD effective doses acquired using four different (FOV) protocols were as follows: face maxillofacial (FOV 20 × 17 cm) (MOSFET, 83.4 µSv; TLD, 87.6 µSv; −5%); teeth, upper jaw (FOV, 8.5 × 5.0 cm) (MOSFET, 6.1 µSv; TLD, 7.0 µSv; −14%); tooth, mandible and left molar (FOV, 4 × 5 cm) (MOSFET, 10.3 µSv; TLD, 12.3 µSv; −16%) and teeth, both jaws (FOV, 10 × 10 cm) (MOSFET, 175 µSv; TLD, 158 µSv; +11%). The largest variation in organ and effective dose was recorded in the small FOV protocols. Conclusions: Taking into account the uncertainties of both measurement methods and the results of the statistical analysis, the effective doses acquired using MOSFET dosemeters were found to be in good agreement with those obtained using TLD dosemeters. The MOSFET dosemeters constitute a feasible alternative for TLDs for the effective dose assessment of CBCT devices in the maxillofacial region. PMID:25143020

  13. Effective dose estimation for pediatric upper gastrointestinal examinations using an anthropomorphic phantom set and metal oxide semiconductor field-effect transistor (MOSFET) technology

    International Nuclear Information System (INIS)

    Emigh, Brent; Gordon, Christopher L.; Falkiner, Michelle; Thomas, Karen E.; Connolly, Bairbre L.

    2013-01-01

    There is a need for updated radiation dose estimates in pediatric fluoroscopy given the routine use of new dose-saving technologies and increased radiation safety awareness in pediatric imaging. To estimate effective doses for standardized pediatric upper gastrointestinal (UGI) examinations at our institute using direct dose measurement, as well as provide dose-area product (DAP) to effective dose conversion factors to be used for the estimation of UGI effective doses for boys and girls up to 10 years of age at other centers. Metal oxide semiconductor field-effect transistor (MOSFET) dosimeters were placed within four anthropomorphic phantoms representing children ≤10 years of age and exposed to mock UGI examinations using exposures much greater than used clinically to minimize measurement error. Measured effective dose was calculated using ICRP 103 weights and scaled to our institution's standardized clinical UGI (3.6-min fluoroscopy, four spot exposures and four examination beam projections) as determined from patient logs. Results were compared to Monte Carlo simulations and related to fluoroscope-displayed DAP. Measured effective doses for standardized pediatric UGI examinations in our institute ranged from 0.35 to 0.79 mSv in girls and were 3-8% lower for boys. Simulation-derived and measured effective doses were in agreement (percentage differences 0.18). DAP-to-effective dose conversion factors ranged from 6.5 x 10 -4 mSv per Gy-cm 2 to 4.3 x 10 -3 mSv per Gy-cm 2 for girls and were similarly lower for boys. Using modern fluoroscopy equipment, the effective dose associated with the UGI examination in children ≤10 years at our institute is < 1 mSv. Estimations of effective dose associated with pediatric UGI examinations can be made for children up to the age of 10 using the DAP-normalized conversion factors provided in this study. These estimates can be further refined to reflect individual hospital examination protocols through the use of direct organ

  14. Origin of the performances degradation of two-dimensional-based metal-oxide-semiconductor field effect transistors in the sub-10 nm regime: A first-principles study

    Energy Technology Data Exchange (ETDEWEB)

    Lu, Anh Khoa Augustin [Semiconductor Physics Laboratory, Department of Physics and Astronomy, University of Leuven, Celestijnenlaan 200 D, B-3001 Leuven (Belgium); IMEC, 75 Kapeldreef, B-3001 Leuven (Belgium); Pourtois, Geoffrey [IMEC, 75 Kapeldreef, B-3001 Leuven (Belgium); Department of Chemistry, Plasmant Research Group, University of Antwerp, B-2610 Wilrijk-Antwerp (Belgium); Agarwal, Tarun [IMEC, 75 Kapeldreef, B-3001 Leuven (Belgium); Department of Electrical Engineering, University of Leuven, Kasteelpark Arenberg 10, B-3001 Leuven (Belgium); Afzalian, Aryan [TSMC, Kapeldreef 75, B-3001 Leuven (Belgium); Radu, Iuliana P. [IMEC, 75 Kapeldreef, B-3001 Leuven (Belgium); Houssa, Michel [Semiconductor Physics Laboratory, Department of Physics and Astronomy, University of Leuven, Celestijnenlaan 200 D, B-3001 Leuven (Belgium)

    2016-01-25

    The impact of the scaling of the channel length on the performances of metal-oxide-semiconductor field effect transistors, based on two-dimensional (2D) channel materials, is theoretically investigated, using density functional theory combined with the non-equilibrium Green's function method. It is found that the scaling of the channel length below 10 nm leads to strong device performance degradations. Our simulations reveal that this degradation is essentially due to the tunneling current flowing between the source and the drain in these aggressively scaled devices. It is shown that this electron tunneling process is modulated by the effective mass of the 2D channel material, and sets the limit of the scaling in future transistor designs.

  15. Origin of the performances degradation of two-dimensional-based metal-oxide-semiconductor field effect transistors in the sub-10 nm regime: A first-principles study

    International Nuclear Information System (INIS)

    Lu, Anh Khoa Augustin; Pourtois, Geoffrey; Agarwal, Tarun; Afzalian, Aryan; Radu, Iuliana P.; Houssa, Michel

    2016-01-01

    The impact of the scaling of the channel length on the performances of metal-oxide-semiconductor field effect transistors, based on two-dimensional (2D) channel materials, is theoretically investigated, using density functional theory combined with the non-equilibrium Green's function method. It is found that the scaling of the channel length below 10 nm leads to strong device performance degradations. Our simulations reveal that this degradation is essentially due to the tunneling current flowing between the source and the drain in these aggressively scaled devices. It is shown that this electron tunneling process is modulated by the effective mass of the 2D channel material, and sets the limit of the scaling in future transistor designs

  16. Ultralow power complementary inverter circuits using axially doped p- and n-channel Si nanowire field effect transistors.

    Science.gov (United States)

    Van, Ngoc Huynh; Lee, Jae-Hyun; Whang, Dongmok; Kang, Dae Joon

    2016-06-09

    We have successfully synthesized axially doped p- and n-type regions on a single Si nanowire (NW). Diodes and complementary metal-oxide-semiconductor (CMOS) inverter devices using single axial p- and n-channel Si NW field-effect transistors (FETs) were fabricated. We show that the threshold voltages of both p- and n-channel Si NW FETs can be lowered to nearly zero by effectively controlling the doping concentration. Because of the high performance of the p- and n-type Si NW channel FETs, especially with regard to the low threshold voltage, the fabricated NW CMOS inverters have a low operating voltage (power dissipation (≤0.3 pW) at an input voltage of ±3 V. This result offers a viable way for the fabrication of a high-performance high-density logic circuit using a low-temperature fabrication process, which makes it suitable for flexible electronics.

  17. The impact of non-uniform channel layer growth on device characteristics in state of the Art Si/SiGe/Si p-metal oxide semiconductor field effect transistors

    International Nuclear Information System (INIS)

    Chang, A.C.K.; Ross, I.M.; Norris, D.J.; Cullis, A.G.; Tang, Y.T.; Cerrina, C.; Evans, A.G.R.

    2006-01-01

    In this study we have highlighted the effect of non-uniform channel layer growth by the direct correlation of the microstructure and electrical characteristics in state-of-the-art pseudomorphic Si/SiGe p-channel metal oxide semiconductor field effect transistor devices fabricated on Si. Two nominally identical sets of devices from adjacent locations of the same wafer were found to have radically different distributions in gate threshold voltages. Due to the close proximity and narrow gate length of the devices, focused ion beam milling was used to prepare a number of thin cross-sections from each of the two regions for subsequent analysis using transmission electron microscopy. It was found that devices from the region giving a very narrow range of gate threshold voltages exhibited a uniform microstructure in general agreement with the intended growth parameters. However, in the second region, which showed a large spread in the gate threshold voltages, profound anomalies in the microstructure were observed. These anomalies consisted of fluctuations in the quality and thickness of the SiGe strained layers. The non-uniform growth of the strained SiGe layer clearly accounted for the poorly controlled threshold voltages of these devices. The results emphasize the importance of good layer growth uniformity to ensure optimum device yield

  18. Illumination of Double Snapback Mechanism in High Voltage Operating Grounded Gate Extended Drain N-type Metal-Oxide-Semiconductor Field Effects Transistor Electro-Static Discharge Protection Devices

    Science.gov (United States)

    Kim, Kil Ho; Jung, Yong Icc; Shim, Jin Seop; So, Hyung Tae; Lee, Ji Hyun; Hwang, Lee Yeun; Park, Jin Won

    2004-10-01

    High current behaviors of the ‘grounded gate extended drain N-type metal-oxide-semiconductor field effects transistor’ (GG_EDNMOS) electro-static discharge (ESD) protection devices are analyzed. Both the transmission line pulse (TLP) data and the thermal incorporated 2-dimensional simulation analyses demonstrate a characteristic double snapback phenomenon after triggering of biploar junction transistor (BJT) operation. This implies the co-existence of two different on-states in high current region. The 2nd on-state, characterized by extremely low snapback holding voltage and low on-resistance, seems to be responsible for the vulnerability of the device under ESD stress. Simulation based contour analyses reveal that combination of BJT operation and deep electron channeling induced by high electron injection gives rise to the 2nd on-state. Thus, the deep electron channel formation needs to be prevented in order to realize stable and robust ESD protection performance. Further studies reveal that the N-drift implant dose, among various process parameters, is a critical factor to determine the formation of deep electron channeling and consequential occurrence of the 2nd on-state. Based on our analyses, general methodology to avoid the double snapback and to realize stable ESD protection is to be discussed.

  19. Relating Random Telegraph Signal Noise in Metal Oxide Semiconductor Transistors to Interface Trap Energy Distribution

    NARCIS (Netherlands)

    van der Wel, A.P.; Klumperink, Eric A.M.; Hoekstra, E.; Nauta, Bram

    2005-01-01

    In this work, we study random telegraph signal (RTS) noise in metal-oxide-semiconductor field effect transistors when the device is periodically and rapidly cycled between an "on" and an "off" bias state. We derive the effective RTS time constants for this case using Shockley–Read–Hall statistics

  20. Neutron radiation effects on metal oxide semiconductor (MOS) devices

    Energy Technology Data Exchange (ETDEWEB)

    Abdul Amir, Haider F. [School of Science and Technology, University Malaysia Sabah, 88999 Kota Kinabalu, Sabah (Malaysia)], E-mail: haider@ums.edu.my; Chik, Abdulah [School of Science and Technology, University Malaysia Sabah, 88999 Kota Kinabalu, Sabah (Malaysia)

    2009-09-15

    The main purpose of this study is to provide the knowledge and data on Deuterium-Tritium (D-T) fusion neutron induced damage in MOS devices. Silicon metal oxide semiconductor (MOS) devices are currently the cornerstone of the modern microelectronics industry. However, when a MOS device is exposed to a flux of energetic radiation or particles, the resulting effects from this radiation can cause several degradation of the device performance and of its operating life. The part of MOS structure (metal oxide semiconductor) most sensitive to neutron radiation is the oxide insulating layer (SiO{sub 2}). When ionizing radiation passes through the oxide, the energy deposited creates electron-hole pairs. These electron-hole pairs have been seriously hazardous to the performance of these electronic components. The degradation of the current gain of the dual n-channel depletion mode MOS caused by neutron displacement defects, was measured using in situ method during neutron irradiation. The average degradation of the gain of the current is about 35 mA, and the change in channel current gain increased proportionally with neutron fluence. The total fusion neutron displacement damage was found to be 4.8 x 10{sup -21} dpa per n/cm{sup 2}, while the average fraction of damage in the crystal of silicon was found to be 1.24 x 10{sup -12}. All the MOS devices tested were found to be controllable after neutron irradiation and no permanent damage was caused by neutron fluence irradiation below 10{sup 10}n/cm{sup 2}. The calculation results shows that (n,{alpha}) reaction induced soft-error cross-section about 8.7 x 10{sup -14} cm{sup 2}, and for recoil atoms about 2.9 x 10{sup -15} cm{sup 2}, respectively.

  1. Neutron radiation effects on metal oxide semiconductor (MOS) devices

    International Nuclear Information System (INIS)

    Abdul Amir, Haider F.; Chik, Abdulah

    2009-01-01

    The main purpose of this study is to provide the knowledge and data on Deuterium-Tritium (D-T) fusion neutron induced damage in MOS devices. Silicon metal oxide semiconductor (MOS) devices are currently the cornerstone of the modern microelectronics industry. However, when a MOS device is exposed to a flux of energetic radiation or particles, the resulting effects from this radiation can cause several degradation of the device performance and of its operating life. The part of MOS structure (metal oxide semiconductor) most sensitive to neutron radiation is the oxide insulating layer (SiO 2 ). When ionizing radiation passes through the oxide, the energy deposited creates electron-hole pairs. These electron-hole pairs have been seriously hazardous to the performance of these electronic components. The degradation of the current gain of the dual n-channel depletion mode MOS caused by neutron displacement defects, was measured using in situ method during neutron irradiation. The average degradation of the gain of the current is about 35 mA, and the change in channel current gain increased proportionally with neutron fluence. The total fusion neutron displacement damage was found to be 4.8 x 10 -21 dpa per n/cm 2 , while the average fraction of damage in the crystal of silicon was found to be 1.24 x 10 -12 . All the MOS devices tested were found to be controllable after neutron irradiation and no permanent damage was caused by neutron fluence irradiation below 10 10 n/cm 2 . The calculation results shows that (n,α) reaction induced soft-error cross-section about 8.7 x 10 -14 cm 2 , and for recoil atoms about 2.9 x 10 -15 cm 2 , respectively.

  2. InGaAs/GaAs metal-oxide-semiconductor heterostructure field-effect transistors with oxygen-plasma oxide and Al2O3 double-layer insulator

    Science.gov (United States)

    Gucmann, F.; Gregušová, D.; Stoklas, R.; Dérer, J.; Kúdela, R.; Fröhlich, K.; Kordoš, P.

    2014-11-01

    Surface condition before an insulator deposition is the key issue for the preparation of reliable GaAs-based metal-oxide-semiconductor (MOS) devices. This study presents the preparation and properties of InGaAs/GaAs MOS structures with a double-layer insulator consisting of an oxygen-plasma oxide covered by Al2O3. The structures were oxidized during 75 s and 150 s. Static measurements yielded a saturation drain current of ˜250 mA/mm at VG = 1 V. Capacitance measurements showed improved performance in the depletion region compared with the structures without the double-layer insulator. Trapping effects were investigated by conductance vs. frequency measurements. The trap state density was in order of 1011 cm-2.eV-1 with a continuous decrease with increased trap energy. The carrier mobility evaluation showed peak values of 3950 cm2/V.s for 75 s and 4570 cm2/V.s for 150 s oxidation times with the sheet charge density ≅2 × 1012 cm-2. The results demonstrate great potential of the procedure that was used to prepare the GaAs-based MOS devices with oxidized GaAs surface covered with an Al2O3 insulator.

  3. Single-photon imaging in complementary metal oxide semiconductor processes

    NARCIS (Netherlands)

    Charbon, E.

    2014-01-01

    This paper describes the basics of single-photon counting in complementary metal oxide semiconductors, through single-photon avalanche diodes (SPADs), and the making of miniaturized pixels with photon-counting capability based on SPADs. Some applications, which may take advantage of SPAD image

  4. Metal oxide semiconductor thin-film transistors for flexible electronics

    Science.gov (United States)

    Petti, Luisa; Münzenrieder, Niko; Vogt, Christian; Faber, Hendrik; Büthe, Lars; Cantarella, Giuseppe; Bottacchi, Francesca; Anthopoulos, Thomas D.; Tröster, Gerhard

    2016-06-01

    The field of flexible electronics has rapidly expanded over the last decades, pioneering novel applications, such as wearable and textile integrated devices, seamless and embedded patch-like systems, soft electronic skins, as well as imperceptible and transient implants. The possibility to revolutionize our daily life with such disruptive appliances has fueled the quest for electronic devices which yield good electrical and mechanical performance and are at the same time light-weight, transparent, conformable, stretchable, and even biodegradable. Flexible metal oxide semiconductor thin-film transistors (TFTs) can fulfill all these requirements and are therefore considered the most promising technology for tomorrow's electronics. This review reflects the establishment of flexible metal oxide semiconductor TFTs, from the development of single devices, large-area circuits, up to entirely integrated systems. First, an introduction on metal oxide semiconductor TFTs is given, where the history of the field is revisited, the TFT configurations and operating principles are presented, and the main issues and technological challenges faced in the area are analyzed. Then, the recent advances achieved for flexible n-type metal oxide semiconductor TFTs manufactured by physical vapor deposition methods and solution-processing techniques are summarized. In particular, the ability of flexible metal oxide semiconductor TFTs to combine low temperature fabrication, high carrier mobility, large frequency operation, extreme mechanical bendability, together with transparency, conformability, stretchability, and water dissolubility is shown. Afterward, a detailed analysis of the most promising metal oxide semiconducting materials developed to realize the state-of-the-art flexible p-type TFTs is given. Next, the recent progresses obtained for flexible metal oxide semiconductor-based electronic circuits, realized with both unipolar and complementary technology, are reported. In particular

  5. Metal oxide semiconductor thin-film transistors for flexible electronics

    Energy Technology Data Exchange (ETDEWEB)

    Petti, Luisa; Vogt, Christian; Büthe, Lars; Cantarella, Giuseppe; Tröster, Gerhard [Electronics Laboratory, Swiss Federal Institute of Technology, Zürich (Switzerland); Münzenrieder, Niko [Electronics Laboratory, Swiss Federal Institute of Technology, Zürich (Switzerland); Sensor Technology Research Centre, University of Sussex, Falmer (United Kingdom); Faber, Hendrik; Bottacchi, Francesca; Anthopoulos, Thomas D. [Department of Physics and Centre for Plastic Electronics, Imperial College London, London (United Kingdom)

    2016-06-15

    The field of flexible electronics has rapidly expanded over the last decades, pioneering novel applications, such as wearable and textile integrated devices, seamless and embedded patch-like systems, soft electronic skins, as well as imperceptible and transient implants. The possibility to revolutionize our daily life with such disruptive appliances has fueled the quest for electronic devices which yield good electrical and mechanical performance and are at the same time light-weight, transparent, conformable, stretchable, and even biodegradable. Flexible metal oxide semiconductor thin-film transistors (TFTs) can fulfill all these requirements and are therefore considered the most promising technology for tomorrow's electronics. This review reflects the establishment of flexible metal oxide semiconductor TFTs, from the development of single devices, large-area circuits, up to entirely integrated systems. First, an introduction on metal oxide semiconductor TFTs is given, where the history of the field is revisited, the TFT configurations and operating principles are presented, and the main issues and technological challenges faced in the area are analyzed. Then, the recent advances achieved for flexible n-type metal oxide semiconductor TFTs manufactured by physical vapor deposition methods and solution-processing techniques are summarized. In particular, the ability of flexible metal oxide semiconductor TFTs to combine low temperature fabrication, high carrier mobility, large frequency operation, extreme mechanical bendability, together with transparency, conformability, stretchability, and water dissolubility is shown. Afterward, a detailed analysis of the most promising metal oxide semiconducting materials developed to realize the state-of-the-art flexible p-type TFTs is given. Next, the recent progresses obtained for flexible metal oxide semiconductor-based electronic circuits, realized with both unipolar and complementary technology, are reported. In

  6. Large Lateral Photovoltaic Effect in Metal-(Oxide-Semiconductor Structures

    Directory of Open Access Journals (Sweden)

    Chongqi Yu

    2010-11-01

    Full Text Available The lateral photovoltaic effect (LPE can be used in position-sensitive detectors to detect very small displacements due to its output of lateral photovoltage changing linearly with light spot position. In this review, we will summarize some of our recent works regarding LPE in metal-semiconductor and metal-oxide-semiconductor structures, and give a theoretical model of LPE in these two structures.

  7. Large lateral photovoltaic effect in metal-(oxide-) semiconductor structures.

    Science.gov (United States)

    Yu, Chongqi; Wang, Hui

    2010-01-01

    The lateral photovoltaic effect (LPE) can be used in position-sensitive detectors to detect very small displacements due to its output of lateral photovoltage changing linearly with light spot position. In this review, we will summarize some of our recent works regarding LPE in metal-semiconductor and metal-oxide-semiconductor structures, and give a theoretical model of LPE in these two structures.

  8. Bisacenaphthopyrazinoquinoxaline derivatives: Synthesis, physical properties and applications as semiconductors for n-channel field effect transistors

    KAUST Repository

    Tong, Chenhua

    2013-01-01

    Several bisacenaphthopyrazinoquinoxaline (BAPQ) based derivatives 1-3 were synthesized by condensation between the acenaphthenequinones and 1,2,4,5-tetraaminobenzene tetrahydrochloride. Their optical, electrochemical and self-assembling properties are tuned by different substituents. Among them, compound 3 possesses a homogeneously distributed low-lying LUMO due to the peripheral substitution with four cyano groups. The corresponding n-channel field effect transistors showed a field effect electron mobility of 5 × 10-3 cm2 V-1 s-1. © 2013 The Royal Society of Chemistry.

  9. Slow response in gate current-voltage characteristics of metal-oxide-semiconductor structures on the 4H-SiC(000\\bar{1}) face

    Science.gov (United States)

    Kumagai, Naoki; Kimura, Hiroshi; Onishi, Yasuhiko; Okamoto, Mitsuo; Fukuda, Kenji

    2016-05-01

    We have investigated the gate current-voltage (I g-V g) characteristics of n-channel metal-oxide-semiconductor field-effect transistors (MOSFETs) and p-MOS capacitors on the 4H-SiC(000\\bar{1}) face. The gate current response to a change in gate voltage has a very slow part, which has been considered to be due to slow traps in the oxide near the SiO2-SiC interface. However, we found that the slow response can be explained by fast interface traps if the traps have a relatively large concentration. Carrier injection into the interface traps results in a change in the surface potential, and this suppresses the further injection of carriers. This new model can explain many electrical properties such as the constant-current behavior in the I g-V g characteristics, which was confirmed by one-dimensional (1D) device simulation. According to this model, the interface traps will not be occupied up to the surface Fermi level within the general time scale of the measurement. In spite of the arguments described above, slow traps also probably exist near the interface between SiO2 and SiC.

  10. Charge transient spectroscopy measurements of metal-oxide-semiconductor

    Energy Technology Data Exchange (ETDEWEB)

    Arnold, Markus; Fechner, Axel; Zahn, Dietrich R.T. [Chemnitz University of Technology, Semiconductor Physics, 09107 Chemnitz (Germany)

    2010-02-15

    Charge transient spectroscopy (QTS) is an electrical measurement technique related to deep-level transient spectroscopy (DLTS). Using QTS it is possible to measure fast charge reloading processes even in the absence of depletion regions as a function of time and temperature with different pulse voltages and pulse widths. As a result, one can determine the number, the energetic position, the capture cross section, and the density of the electrically active traps. Here QTS measurements of Al/SiO2/Si metal-oxide-semiconductor structures are presented revealing the influence of manganese implantation into p- and n-doped silicon on the charge carrier transport and trapping properties. The QTS results are compared to I-V, C-V and DLTS measurements on the same samples and the differences are discussed (copyright 2010 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim) (orig.)

  11. Single-photon imaging in complementary metal oxide semiconductor processes

    Science.gov (United States)

    Charbon, E.

    2014-01-01

    This paper describes the basics of single-photon counting in complementary metal oxide semiconductors, through single-photon avalanche diodes (SPADs), and the making of miniaturized pixels with photon-counting capability based on SPADs. Some applications, which may take advantage of SPAD image sensors, are outlined, such as fluorescence-based microscopy, three-dimensional time-of-flight imaging and biomedical imaging, to name just a few. The paper focuses on architectures that are best suited to those applications and the trade-offs they generate. In this context, architectures are described that efficiently collect the output of single pixels when designed in large arrays. Off-chip readout circuit requirements are described for a variety of applications in physics, medicine and the life sciences. Owing to the dynamic nature of SPADs, designs featuring a large number of SPADs require careful analysis of the target application for an optimal use of silicon real estate and of limited readout bandwidth. The paper also describes the main trade-offs involved in architecting such chips and the solutions adopted with focus on scalability and miniaturization. PMID:24567470

  12. Plasmonic nanostructured metal-oxide-semiconductor reflection modulators.

    Science.gov (United States)

    Olivieri, Anthony; Chen, Chengkun; Hassan, Sa'ad; Lisicka-Skrzek, Ewa; Tait, R Niall; Berini, Pierre

    2015-04-08

    We propose a plasmonic surface that produces an electrically controlled reflectance as a high-speed intensity modulator. The device is conceived as a metal-oxide-semiconductor capacitor on silicon with its metal structured as a thin patch bearing a contiguous nanoscale grating. The metal structure serves multiple functions as a driving electrode and as a grating coupler for perpendicularly incident p-polarized light to surface plasmons supported by the patch. Modulation is produced by charging and discharging the capacitor and exploiting the carrier refraction effect in silicon along with the high sensitivity of strongly confined surface plasmons to index perturbations. The area of the modulator is set by the area of the incident beam, leading to a very compact device for a strongly focused beam (∼2.5 μm in diameter). Theoretically, the modulator can operate over a broad electrical bandwidth (tens of gigahertz) with a modulation depth of 3 to 6%, a loss of 3 to 4 dB, and an optical bandwidth of about 50 nm. About 1000 modulators can be integrated over a 50 mm(2) area producing an aggregate electro-optic modulation rate in excess of 1 Tb/s. We demonstrate experimentally modulators operating at telecommunications wavelengths, fabricated as nanostructured Au/HfO2/p-Si capacitors. The modulators break conceptually from waveguide-based devices and belong to the same class of devices as surface photodetectors and vertical cavity surface-emitting lasers.

  13. Low-Frequency Noise Characterization of Ultra-shallow Gate N-channel Junction Field Effect Transistors

    NARCIS (Netherlands)

    Piccolo, G.; Sarubbi, F.; Vandamme, L.J.K.; Macucci, M.; Scholtes, T.L.M.; Nanver, Lis Karen

    2007-01-01

    A recently developed technique for ultra shallow pn junction formation has been applied for the fabrication of ring-gate n-channel junction field effect devices (JFET) devices. Several different geometries, gate formation parameters and channel doping profiles have been realized and characterized

  14. Laser Doppler perfusion imaging with a complimentary metal oxide semiconductor image sensor

    NARCIS (Netherlands)

    Serov, Alexander; Steenbergen, Wiendelt; de Mul, F.F.M.

    2002-01-01

    We utilized a complimentary metal oxide semiconductor video camera for fast f low imaging with the laser Doppler technique. A single sensor is used for both observation of the area of interest and measurements of the interference signal caused by dynamic light scattering from moving particles inside

  15. Solution-processed barium salts as charge injection layers for high performance N-channel organic field-effect transistors.

    Science.gov (United States)

    Kim, Nam-Koo; Khim, Dongyoon; Xu, Yong; Lee, Seung-Hoon; Kang, Minji; Kim, Jihong; Facchetti, Antonio; Noh, Yong-Young; Kim, Dong-Yu

    2014-06-25

    N-channel organic field-effect transistors (OFETs) have generally shown lower field-effect mobilities (μFET) than their p-type counterparts. One of the reasons is the energetic misalignment between the work function (WF) of commonly used charge injection electrode, i.e. gold (Au), and the lowest unoccupied molecular orbital (LUMO) of n-channel electron-transporting organic semiconductors. Here, we report barium salts as solution-processed interlayers, to improve the electron-injection and/or hole-blocking in top-gate/bottom-contact n-channel OFETs, based on poly{[N,N'-bis(2-octyldodecyl)-naphthalene-1,4,5,8-bis(dicarboximide)-2,6-diyl]-alt-5,5'-(2,2'-dithiophene)} (P(NDI2OD-T2)) and phenyl-C61-butyric acid methyl ester (PC61BM). Two different barium salts, barium hydroxide (Ba(OH)2) and barium chloride (Ba(Cl)2), are employed as the ultrathin interlayer (∼2 nm); and they effectively tune the WF of Au from 4.9 eV, to as low as 3.5 eV. The resulting n-channel OFETs exhibit significantly improved μFET, approaching 2.6 cm(2)/(V s) and 0.1 cm(2)/(V s) for the best P(NDI2OD-T2) and PC61BM devices, respectively, with Ba(OH)2 as interlayer.

  16. Effects of buffered HF cleaning on metal-oxide-semiconductor interface properties of Al2O3/InAs/GaSb structures

    Science.gov (United States)

    Nishi, Koichi; Yokoyama, Masafumi; Yokoyama, Haruki; Hoshi, Takuya; Sugiyama, Hiroki; Takenaka, Mitsuru; Takagi, Shinichi

    2015-06-01

    We studied the impact of buffered HF (BHF) cleaning on the interface properties of Al2O3/InAs/GaSb metal-oxide-semiconductor (MOS) structures fabricated by the ex-situ surface cleaning process. The Al2O3/InAs/GaSb MOS structures fabricated with BHF cleaning exhibited lower Dit values than those fabricated with sulfur passivation. In addition, the Al2O3/InAs/GaSb MOS structures fabricated with BHF cleaning were robust with respect to the MOS field-effect transistor fabrication process by using W gate metal with PMA in the 250-300 °C range.

  17. Mechanical anomaly impact on metal-oxide-semiconductor capacitors on flexible silicon fabric

    KAUST Repository

    Ghoneim, Mohamed T.

    2014-06-09

    We report the impact of mechanical anomaly on high-κ/metal-oxide-semiconductor capacitors built on flexible silicon (100) fabric. The mechanical tests include studying the effect of bending radius up to 5 mm minimum bending radius with respect to breakdown voltage and leakage current of the devices. We also report the effect of continuous mechanical stress on the breakdown voltage over extended periods of times.

  18. Cyanated diazatetracene diimides with ultrahigh electron affinity for n-channel field effect transistors

    KAUST Repository

    Ye, Qun

    2013-03-15

    Several diazatetracene diimides with high electron affinity (up to 4.66 eV!) were prepared and well characterized. The LUMO energy level of these electron-deficient molecules was found to be closely related to their material stability. Compound 7 with ultrahigh electron affinity suffered from reduction and hydrolysis in the presence of silica gel or water. The stable compounds 3 and 6 showed n-channel FET behavior with an average electron mobility of 0.002 and 0.005 cm2 V-1 s-1, respectively, using a solution processing method. © 2013 American Chemical Society.

  19. Potential for normally-off operation from GaN metal oxide semiconductor devices based upon semi-insulating GaN

    Directory of Open Access Journals (Sweden)

    Yusuke Sakai

    2013-08-01

    Full Text Available The conditions for preparing normally-off GaN devices incorporating semi-insulating (SI GaN materials are explored. The properties of SI GaN where carbon behaves as a deep level acceptor are predicted using a Shockley diagram. Metal-oxide-semiconductor (MOS structures based upon these on SI-GaN layers are designed. The bandgap alignment of these structures is analyzed using Poisson equations. Normally-off operation is shown to be possible in devices featuring a thin n-GaN layer and SI-GaN layer, because of a higher conduction band energy. It is also shown that higher threshold voltage can be achieved by reducing the carrier concentration of the n-GaN channel layer.

  20. Comparison of the leading-edge timing walk in pulsed TOF laser range finding with avalanche bipolar junction transistor (BJT) and metal-oxide-semiconductor (MOS) switch based laser diode drivers.

    Science.gov (United States)

    Hintikka, Mikko; Hallman, Lauri; Kostamovaara, Juha

    2017-12-01

    Timing walk error in pulsed time-of-flight based laser range finding was studied using two different types of laser diode drivers. The study compares avalanche bipolar junction transistor (BJT) and metal-oxide-semiconductor field-effect transistor switch based laser pulse drivers, both producing 1.35 ns current pulse length (full width at half maximum), and investigates how the slowly rising part of the current pulse of the avalanche BJT based driver affects the leading edge timing walk. The walk error was measured to be very similar with both drivers within an input signal dynamic range of 1:10 000 (receiver bandwidth of 700 MHz) but increased rapidly with the avalanche BJT based driver at higher values of dynamic range. The slowly rising part does not exist in the current pulse produced by the metal-oxide-semiconductor (MOS) based laser driver, and thus the MOS based driver can be utilized in a wider dynamic range.

  1. Interface state density of SiO2/p-type 4H-SiC ( 0001 ), ( 11 2 ¯ 0 ), ( 1 1 ¯ 00 ) metal-oxide-semiconductor structures characterized by low-temperature subthreshold slopes

    Science.gov (United States)

    Kobayashi, Takuma; Nakazawa, Seiya; Okuda, Takafumi; Suda, Jun; Kimoto, Tsunenobu

    2016-04-01

    Interface properties of heavily Al-doped 4H-SiC ( 0001 ) (Si-face), ( 11 2 ¯ 0 ) (a-face), and ( 1 1 ¯ 00 ) (m-face) metal-oxide-semiconductor (MOS) structures were characterized from the low-temperature gate characteristics of metal-oxide-semiconductor field-effect transistors (MOSFETs). From low-temperature subthreshold slopes, interface state density (Dit) at very shallow energy levels (ET) near the conduction band edge (Ec) was evaluated. We discovered that the Dit near Ec (Ec - 0.01 eV MOS structures with higher Al doping density for every crystal face (Si-, a-, and m-face). Linear correlation is observed between the channel mobility and Dit near Ec, and we concluded that the mobility drop observed in heavily doped MOSFETs is mainly caused by the increase of Dit near Ec.

  2. Energy level alignment in metal/oxide/semiconductor and organic dye/oxide systems

    Science.gov (United States)

    Bersch, Eric

    The alignment between the energy levels of the constituent materials of metal-oxide-semiconductor field effect transistors (MOSFET's) and dye sensitized solar cell (DSSC's) is a key property that is critical to the functions of these devices. We have measured the energy level alignment (band offsets) for metal/oxide/semiconductor (MOS) systems with high-kappa gate oxides and metal gates, and for organic dye/oxide systems. The combination of UV photoemission spectroscopy (UPS) and inverse photoemission spectroscopy (IPS) in the same vacuum system was used to measure both the occupied and unoccupied density of states (DOS), respectively, of these materials systems. Additional soft X-ray photoemission spectroscopy (SXPS) measurements were made of both the valence bands and core levels of the high-kappa systems. The combination of the UPS, IPS and SXPS measurements were used to determine the band offsets between the high-kappa oxides and the Si substrates of thin film oxide/Si samples. To find the metal-oxide band offsets, thin metal layers were sequentially deposited on the oxide surfaces, followed by spectroscopic measurements. These measurements, combined with the measurements from the clean oxide surfaces, were used to find the metal-oxide band offsets. Metal-oxide band offset values were also calculated by the Interface Gap State (IGS) model. We compared the experimental metal-oxide conduction band offset (CBO) values with those calculated using the IGS model, and found that they tended to agree well for Ru/oxide and Ti/oxide systems, but not as well for Al/oxide systems. Through core level spectroscopy, we correlated observations of the composition of the metallic layers with the trends in agreement between the experimental and IGS CBO values, which led to the conclusion that the IGS model gives accurate values for the CBO for systems with chemically abrupt interfaces. Core level spectroscopy of the MOS systems also showed that Al and Ti overlayers reduced the

  3. Incorporating TCNQ into thiophene-fused heptacene for n-channel field effect transistor

    KAUST Repository

    Ye, Qun

    2012-06-01

    Incorporation of electron-deficient tetracyanoquinodimethane (TCNQ) into electron-rich thiophene-fused heptacene was successfully achieved for the purpose of stabilizing longer acenes and generating new n-type organic semiconductors. The heptacene-TCNQ derivative 1 was found to have good stability and an expected electron transporting property. Electron mobility up to 0.01 cm 2 V -1 s -1 has been obtained for this novel material in solution processed organic field effect transistors. © 2012 American Chemical Society.

  4. Low operating voltage n-channel organic field effect transistors using lithium fluoride/PMMA bilayer gate dielectric

    Energy Technology Data Exchange (ETDEWEB)

    Kumar, S.; Dhar, A., E-mail: adhar@phy.iitkgp.ernet.in

    2015-10-15

    Highlights: • Alternative to chemically crosslinking of PMMA to achieve low leakage in provided. • Effect of LiF in reducing gate leakage through the OFET device is studied. • Effect of gate leakage on transistor performance has been investigated. • Low voltage operable and low temperature processed n-channel OFETs were fabricated. - Abstract: We report low temperature processed, low voltage operable n-channel organic field effect transistors (OFETs) using N,N′-Dioctyl-3,4,9,10-perylenedicarboximide (PTCDI-C{sub 8}) organic semiconductor and poly(methylmethacrylate) (PMMA)/lithium fluoride (LiF) bilayer gate dielectric. We have studied the role of LiF buffer dielectric in effectively reducing the gate leakage through the device and thus obtaining superior performance in contrast to the single layer PMMA dielectric devices. The bilayer OFET devices had a low threshold voltage (V{sub t}) of the order of 5.3 V. The typical values of saturation electron mobility (μ{sub s}), on/off ratio and inverse sub-threshold slope (S) for the range of devices made were estimated to be 2.8 × 10{sup −3} cm{sup 2}/V s, 385, and 3.8 V/decade respectively. Our work thus provides a potential substitution for much complicated process of chemically crosslinking PMMA to achieve low leakage, high capacitance, and thus low operating voltage OFETs.

  5. Gate controlled magnetoresistance in a silicon metal-oxide-semiconductor field-effect-transistor

    Czech Academy of Sciences Publication Activity Database

    Ciccarelli, C.; Park, B.G.; Ogawa, S.; Ferguson, A.J.; Wunderlich, Joerg

    2010-01-01

    Roč. 97, č. 8 (2010), 082106/1-082106/3 ISSN 0003-6951 Institutional research plan: CEZ:AV0Z10100521 Keywords : MOSFET Subject RIV: BM - Solid Matter Physics ; Magnetism Impact factor: 3.820, year: 2010

  6. Magnetotransport investigations of the two-dimensional metallic state in silicon metal-oxid-semiconductor structures

    International Nuclear Information System (INIS)

    Prinz, A.

    2002-03-01

    For more than two decades it was the predominant view among the physical community that the every two-dimensional (2D) disordered electron system becomes insulating as the temperature approaches the absolute zero temperature (0 Kelvin or -273.15 o C). Two-dimensional means that the movement of the charge carriers is confined in one direction by a potential so that the carriers can move freely only perpendicular to the confinement. The most famous physical realization of a 2D system is the silicon metal-oxide-semiconductor field effect transistor (Si-MOSFET). It is one of the basic elements of most electronic devices in our daily life. The working principle is very simple. Charges are attracted to the semiconductor-oxide interface by an electric field applied between the metallic gate and the semiconductor, so that a 2D conductive channel is formed. The charge density can be adjusted by the voltage from zero up to 10 13 cm -2 . In 1994 Kravchenko and coworkers made a very important discovery. They studied high mobility Si-MOSFETs and found that for densities below a certain critical value, nc, the resistivity increases as the temperature is decreased below 2 K, whereas for densities above $n c $ the resistivity decreases unexpectedly. The transition from insulating to metallic behavior, known as metal-insulator transition (MIT), was obviously a contradiction to the commonly accepted theories which predict insulating behavior for any density. The insulating behavior is a consequence of the wave properties of electrons which leads to interference in disordered media and thus to enhanced backscattering. In the subsequent years, experimental studies were performed on a variety of 2D systems, which qualitatively showed a similar behavior. All the investigated samples had one thing in common. The interaction energy between the carriers was considerable higher than their mean kinetic energy due to their movement in the 2D plane. Since the electron-electron interaction was

  7. Surface Preparation and Deposited Gate Oxides for Gallium Nitride Based Metal Oxide Semiconductor Devices

    Science.gov (United States)

    Long, Rathnait D.; McIntyre, Paul C.

    2012-01-01

    The literature on polar Gallium Nitride (GaN) surfaces, surface treatments and gate dielectrics relevant to metal oxide semiconductor devices is reviewed. The significance of the GaN growth technique and growth parameters on the properties of GaN epilayers, the ability to modify GaN surface properties using in situ and ex situ processes and progress on the understanding and performance of GaN metal oxide semiconductor (MOS) devices are presented and discussed. Although a reasonably consistent picture is emerging from focused studies on issues covered in each of these topics, future research can achieve a better understanding of the critical oxide-semiconductor interface by probing the connections between these topics. The challenges in analyzing defect concentrations and energies in GaN MOS gate stacks are discussed. Promising gate dielectric deposition techniques such as atomic layer deposition, which is already accepted by the semiconductor industry for silicon CMOS device fabrication, coupled with more advanced physical and electrical characterization methods will likely accelerate the pace of learning required to develop future GaN-based MOS technology.

  8. Energy Harvesting Thermoelectric Generators Manufactured Using the Complementary Metal Oxide Semiconductor Process

    Directory of Open Access Journals (Sweden)

    Wen-Jung Tsai

    2013-02-01

    Full Text Available This paper presents the fabrication and characterization of energy harvesting thermoelectric micro generators using the commercial complementary metal oxide semiconductor (CMOS process. The micro generator consists of 33 thermocouples in series. Thermocouple materials are p-type and n-type polysilicon since they have a large Seebeck coefficient difference. The output power of the micro generator depends on the temperature difference in the hot and cold parts of the thermocouples. In order to increase this temperature difference, the hot part of the thermocouples is suspended to reduce heat-sinking. The micro generator needs a post-CMOS process to release the suspended structures of hot part, which the post-process includes an anisotropic dry etching to etch the sacrificial oxide layer and an isotropic dry etching to remove the silicon substrate. Experiments show that the output power of the micro generator is 9.4 mW at a temperature difference of 15 K.

  9. Ultrasensitive mass sensor fully integrated with complementary metal-oxide-semiconductor circuitry

    DEFF Research Database (Denmark)

    Forsén, Esko Sebastian; Abadal, G.; Ghatnekar-Nilsson, S.

    2005-01-01

    Nanomechanical resonators have been monolithically integrated on preprocessed complementary metal-oxide-semiconductor (CMOS) chips. Fabricated resonator systems have been designed to have resonance frequencies up to 1.5 MHz. The systems have been characterized in ambient air and vacuum conditions...... and display ultrasensitive mass detection in air. A mass sensitivity of 4 ag/Hz has been determined in air by placing a single glycerine drop, having a measured weight of 57 fg, at the apex of a cantilever and subsequently measuring a frequency shift of 14.8 kHz. CMOS integration enables electrostatic...... excitation, capacitive detection, and amplification of the resonance signal directly on the chip. (c) 2005 American Institute of Physics....

  10. Impedance analysis of Al2O3/H-terminated diamond metal-oxide-semiconductor structures

    Science.gov (United States)

    Liao, Meiyong; Liu, Jiangwei; Sang, Liwen; Coathup, David; Li, Jiangling; Imura, Masataka; Koide, Yasuo; Ye, Haitao

    2015-02-01

    Impedance spectroscopy (IS) analysis is carried out to investigate the electrical properties of the metal-oxide-semiconductor (MOS) structure fabricated on hydrogen-terminated single crystal diamond. The low-temperature atomic layer deposition Al2O3 is employed as the insulator in the MOS structure. By numerically analysing the impedance of the MOS structure at various biases, the equivalent circuit of the diamond MOS structure is derived, which is composed of two parallel capacitive and resistance pairs, in series connection with both resistance and inductance. The two capacitive components are resulted from the insulator, the hydrogenated-diamond surface, and their interface. The physical parameters such as the insulator capacitance are obtained, circumventing the series resistance and inductance effect. By comparing the IS and capacitance-voltage measurements, the frequency dispersion of the capacitance-voltage characteristic is discussed.

  11. Thermal oxidation and electrical properties of silicon carbide metal-oxide-semiconductor structures

    Science.gov (United States)

    Singh, N.; Rys, A.

    1993-02-01

    The fabrication of metal-oxide-semiconductor (MOS) capacitors on n-type, Si-face 6H-SiC is described for both wet and dry oxidation processes, and the effect of thermal oxidation conditions on the electrical properties of MOS capacitors are investigated. The values of the oxide thickness were obtained as a function of the oxidation time at various oxidation temperatures (which were kept between 1150 and 1250 C). It was found that samples prepared by both dry and wet oxidation showed accumulation, depletion, and inversion regions under illumination, while inversion did not occur under dark conditions. The C-V characteristics of oxidized samples were improved after the oxidized samples were annealed in argon for 30 min. The relation between the oxide thickness and the oxidation time could be expressed by parabolic law, which is also used for thermal oxidation of Si.

  12. Dimensional optimization of nanowire--complementary metal oxide--semiconductor inverter.

    Science.gov (United States)

    Hashim, Yasir; Sidek, Othman

    2013-01-01

    This study is the first to demonstrate dimensional optimization of nanowire-complementary metal-oxide-semiconductor inverter. Noise margins and inflection voltage of transfer characteristics are used as limiting factors in this optimization. Results indicate that optimization depends on both dimensions ratio and digital voltage level (Vdd). Diameter optimization reveals that when Vdd increases, the optimized value of (Dp/Dn) decreases. Channel length optimization results show that when Vdd increases, the optimized value of Ln decreases and that of (Lp/Ln) increases. Dimension ratio optimization reveals that when Vdd increases, the optimized value of Kp/Kn decreases, and silicon nanowire transistor with suitable dimensions (higher Dp and Ln with lower Lp and Dn) can be fabricated.

  13. High performance and stable N-channel organic field-effect transistors by patterned solvent-vapor annealing.

    Science.gov (United States)

    Khim, Dongyoon; Baeg, Kang-Jun; Kim, Juhwan; Kang, Minji; Lee, Seung-Hoon; Chen, Zhihua; Facchetti, Antonio; Kim, Dong-Yu; Noh, Yong-Young

    2013-11-13

    We report the fabrication of high-performance, printed, n-channel organic field-effect transistors (OFETs) based on an N,N-dialkyl-substituted-(1,7&1,6)-dicyanoperylene-3,4:9,10-bis(dicarboximide) derivative, PDI-RCN2, optimized by the solvent-vapor annealing (SVA) process. We performed a systematic study on the influence of solubility and the chemical structure of a solvent used for the SVA process on the ordering and orientation of PDI-RCN2 molecules in the thin film. The PDI-RCN2 film showed improved crystallinity under vapor annealing with the aliphatic 1,2-dichloroethane (DCE) as a marginal solvent. The n-type OFETs with DCE-vapor-annealed PDI-RCN2 show highly improved charge-carrier mobility of ~0.5 cm(2) V(-1) s(-1) and higher stability under gate bias stress than the pristine OFETs. This large performance improvement was mainly attributed to increased crystallinity of the semiconductor thin film, enhancing π-π stacking. We also introduced a new method to pattern crystallinity of a certain region in the semiconducting film by selective exposure to the solvent vapor using a shadow mask. The crystal-patterned PDI-RCN2 OFETs exhibit decreased off-currents by ~10× and improved gate bias stability by minimizing crosstalk, reducing leakage current between devices, and reducing the density of charge trap states of the organic semiconductor.

  14. Functional integrity of flexible n-channel metal–oxide–semiconductor field-effect transistors on a reversibly bistable platform

    KAUST Repository

    Alfaraj, Nasir

    2015-10-26

    Flexibility can bring a new dimension to state-of-the-art electronics, such as rollable displays and integrated circuit systems being transformed into more powerful resources. Flexible electronics are typically hosted on polymeric substrates. Such substrates can be bent and rolled up, but cannot be independently fixed at the rigid perpendicular position necessary to realize rollable display-integrated gadgets and electronics. A reversibly bistable material can assume two stable states in a reversible way: flexibly rolled state and independently unbent state. Such materials are used in cycling and biking safety wristbands and a variety of ankle bracelets for orthopedic healthcare. They are often wrapped around an object with high impulsive force loading. Here, we study the effects of cumulative impulsive force loading on thinned (25 μm) flexible silicon-based n-channel metal–oxide–semiconductor field-effect transistor devices housed on a reversibly bistable flexible platform. We found that the transistors have maintained their high performance level up to an accumulated 180 kN of impact force loading. The gate dielectric layers have maintained their reliability, which is evidenced by the low leakage current densities. Also, we observed low variation in the effective electron mobility values, which manifests that the device channels have maintained their carrier transport properties.

  15. Reducing leakage currents in n-channel organic field-effect transistors using molecular dipole monolayers on nanoscale oxides.

    Science.gov (United States)

    Martínez Hardigree, Josué F; Dawidczyk, Thomas J; Ireland, Robert M; Johns, Gary L; Jung, Byung-Jun; Nyman, Mathias; Osterbacka, Ronald; Marković, Nina; Katz, Howard E

    2013-08-14

    Leakage currents through the gate dielectric of thin film transistors remain a roadblock to the fabrication of organic field-effect transistors (OFETs) on ultrathin dielectrics. We report the first investigation of a self-assembled monolayer (SAM) dipole as an electrostatic barrier to reduce leakage currents in n-channel OFETs fabricated on a minimal, leaky ∼10 nm SiO2 dielectric on highly doped Si. The electric field associated with 1H,1H,2H,2H-perfluoro-octyltriethoxysilane (FOTS) and octyltriethoxysilane (OTS) dipolar chains affixed to the oxide surface of n-Si gave an order of magnitude decrease in gate leakage current and subthreshold leakage and a two order-of-magnitude increase in ON/OFF ratio for a naphthalenetetracarboxylic diimide (NTCDI) transistor. Identically fabricated devices on p-Si showed similarly reduced leakage and improved performance for oxides treated with the larger dipole FOTS monolayer, while OTS devices showed poorer transfer characteristics than those on bare oxide. Comparison of OFETs on both substrates revealed that relative device performance from OTS and FOTS treatments was dictated primarily by the organosilane chain and not the underlying siloxane-substrate bond. This conclusion is supported by the similar threshold voltages (VT) extrapolated for SAM-treated devices, which display positive relative VT shifts for FOTS on either substrate but opposite VT shifts for OTS treatment on n-Si and p-Si. Our results highlight the potential of dipolar SAMs as performance-enhancing layers for marginal quality dielectrics, broadening the material spectrum for low power, ultrathin organic electronics.

  16. Characterization of Interface State in Silicon Carbide Metal Oxide Semiconductor Capacitors

    Science.gov (United States)

    Kao, Wei-Chieh

    Silicon carbide (SiC) has always been considered as an excellent material for high temperature and high power devices. Since SiC is the only compound semiconductor whose native oxide is silicon dioxide (SiO2), it puts SiC in a unique position. Although SiC metal oxide semiconductor (MOS) technology has made significant progress in recent years, there are still a number of issues to be overcome before more commercial SiC devices can enter the market. The prevailing issues surrounding SiC MOSFET devices are the low channel mobility, the low quality of the oxide layer and the high interface state density at the SiC/SiO2 interface. Consequently, there is a need for research to be performed in order to have a better understanding of the factors causing the poor SiC/SiO2 interface properties. In this work, we investigated the generation lifetime in SiC materials by using the pulsed metal oxide semiconductor (MOS) capacitor method and measured the interface state density distribution at the SiC/SiO2 interface by using the conductance measurement and the high-low frequency capacitance technique. These measurement techniques have been performed on n-type and p-type SiC MOS capacitors. In the course of our investigation, we observed fast interface states at semiconductor-dielectric interfaces in SiC MOS capacitors that underwent three different interface passivation processes, such states were detected in the nitrided samples but not observed in PSG-passivated samples. This result indicate that the lack of fast states at PSG-passivated interface is one of the main reasons for higher channel mobility in PSG MOSFETs. In addition, the effect of mobile ions in the oxide on the response time of interface states has been investigated. In the last chapter we propose additional methods of investigation that can help elucidate the origin of the particular interface states, enabling a more complete understanding of the SiC/SiO2 material system.

  17. Polycrystalline silicon ring resonator photodiodes in a bulk complementary metal-oxide-semiconductor process.

    Science.gov (United States)

    Mehta, Karan K; Orcutt, Jason S; Shainline, Jeffrey M; Tehar-Zahav, Ofer; Sternberg, Zvi; Meade, Roy; Popović, Miloš A; Ram, Rajeev J

    2014-02-15

    We present measurements on resonant photodetectors utilizing sub-bandgap absorption in polycrystalline silicon ring resonators, in which light is localized in the intrinsic region of a p+/p/i/n/n+ diode. The devices, operating both at λ=1280 and λ=1550  nm and fabricated in a complementary metal-oxide-semiconductor (CMOS) dynamic random-access memory emulation process, exhibit detection quantum efficiencies around 20% and few-gigahertz response bandwidths. We observe this performance at low reverse biases in the range of a few volts and in devices with dark currents below 50 pA at 10 V. These results demonstrate that such photodetector behavior, previously reported by Preston et al. [Opt. Lett. 36, 52 (2011)], is achievable in bulk CMOS processes, with significant improvements with respect to the previous work in quantum efficiency, dark current, linearity, bandwidth, and operating bias due to additional midlevel doping implants and different material deposition. The present work thus offers a robust realization of a fully CMOS-fabricated all-silicon photodetector functional across a wide wavelength range.

  18. Laser line scan underwater imaging by complementary metal-oxide-semiconductor camera

    Science.gov (United States)

    He, Zhiyi; Luo, Meixing; Song, Xiyu; Wang, Dundong; He, Ning

    2017-12-01

    This work employs the complementary metal-oxide-semiconductor (CMOS) camera to acquire images in a scanning manner for laser line scan (LLS) underwater imaging to alleviate backscatter impact of seawater. Two operating features of the CMOS camera, namely the region of interest (ROI) and rolling shutter, can be utilized to perform image scan without the difficulty of translating the receiver above the target as the traditional LLS imaging systems have. By the dynamically reconfigurable ROI of an industrial CMOS camera, we evenly divided the image into five subareas along the pixel rows and then scanned them by changing the ROI region automatically under the synchronous illumination by the fun beams of the lasers. Another scanning method was explored by the rolling shutter operation of the CMOS camera. The fun beam lasers were turned on/off to illuminate the narrow zones on the target in a good correspondence to the exposure lines during the rolling procedure of the camera's electronic shutter. The frame synchronization between the image scan and the laser beam sweep may be achieved by either the strobe lighting output pulse or the external triggering pulse of the industrial camera. Comparison between the scanning and nonscanning images shows that contrast of the underwater image can be improved by our LLS imaging techniques, with higher stability and feasibility than the mechanically controlled scanning method.

  19. Core/shell nano-structuring of metal oxide semiconductors and their photocatalytic studies

    Science.gov (United States)

    Balakumar, S.; Rakkesh, R. Ajay

    2013-02-01

    Core/Shell Nanostructures of Metal Oxide Semiconductors (MOS) have attracted much attention because of their most fascinating tunable applications. These core shell morphologies can be easily engineered to enhance the unique properties of the metal-oxide nanostructures, which make them suitable as photocatalyst due to their high catalytic activity, substantial stability, and brilliant perspective in applications. This paper provides an overview on our work on the synthesis of some interesting core/ shell nanostructures of MOS such as ZnO-TiO2, ZnO-MoO3, and V2O5-TiO2 using a low temperature wet chemical route and hydrothermal techniques and their photocatalytic properties from the aspects of different shell materials and shell thicknesses. The effect of process parameters such as pH, temperature, and ratio of core and shell materials, was systematically studied. Here the evidence for the core shell formation with different shell thicknesses came from the X-ray diffraction peak intensities. The shell thickness variation was also confirmed by Transmission Electron Microscopic studies. Effect of shell thickness on optical band gap of the core shell fabricated was also investigated using DRS UV-Visible spectroscopy. A comprehensive study was carried out for the photocatalytic efficiency of core shell nanostructures by evaluating the photo-degradation of Acridine Orange (AO) dye in aqueous solution under visible and solar light irradiations. These results offered simple approaches to the nanoscale engineering and synthesis of MOS hybrid systems to serve as better photocatalytic materials.

  20. High performance high-κ/metal gate complementary metal oxide semiconductor circuit element on flexible silicon

    KAUST Repository

    Sevilla, Galo T.

    2016-02-29

    Thinned silicon based complementary metal oxide semiconductor(CMOS)electronics can be physically flexible. To overcome challenges of limited thinning and damaging of devices originated from back grinding process, we show sequential reactive ion etching of silicon with the assistance from soft polymeric materials to efficiently achieve thinned (40 μm) and flexible (1.5 cm bending radius) silicon based functional CMOSinverters with high-κ/metal gate transistors. Notable advances through this study shows large area of silicon thinning with pre-fabricated high performance elements with ultra-large-scale-integration density (using 90 nm node technology) and then dicing of such large and thinned (seemingly fragile) pieces into smaller pieces using excimer laser. The impact of various mechanical bending and bending cycles show undeterred high performance of flexible siliconCMOSinverters. Future work will include transfer of diced silicon chips to destination site, interconnects, and packaging to obtain fully flexible electronic systems in CMOS compatible way.

  1. Advancing metal-oxide-semiconductor theory: Steady-state nonequilibrium conditions

    Science.gov (United States)

    Passlack, M.; Hong, M.; Schubert, E. F.; Zydzik, G. J.; Mannaerts, J. P.; Hobson, W. S.; Harris, T. D.

    1997-06-01

    This article investigates steady-state nonequilibrium conditions in metal-oxide-semiconductor (MOS) capacitors. Steady-state nonequilibrium conditions are of significant interest due to the advent of wide-gap semiconductors in the arena of MOS (or metal-insulator-semiconductor) devices and due to the scaling of oxide thickness in Si technology. Two major classes of steady-state nonequilibrium conditions were studied both experimentally and theoretically: (i) steady-state deep depletion and (ii) steady-state low level optical generation. It is found that the identification and subsequent understanding of steady-state nonequilibrium conditions is of significant importance for correct interpretation of electrical measurements such as capacitance-voltage and conductance-voltage measurements. Basic implications of steady-state nonequilibrium conditions were derived for both MOS capacitors with low interfaces state density Dit and for oxide semiconductor interfaces with a pinned Fermi level. Further, a photoluminescence power spectroscopy technique is investigated as a complementary tool for direct-gap semiconductors to study Dit and to monitor the interface quality during device fabrication.

  2. Finite Element Analysis of Film Stack Architecture for Complementary Metal-Oxide-Semiconductor Image Sensors.

    Science.gov (United States)

    Wu, Kuo-Tsai; Hwang, Sheng-Jye; Lee, Huei-Huang

    2017-05-02

    Image sensors are the core components of computer, communication, and consumer electronic products. Complementary metal oxide semiconductor (CMOS) image sensors have become the mainstay of image-sensing developments, but are prone to leakage current. In this study, we simulate the CMOS image sensor (CIS) film stacking process by finite element analysis. To elucidate the relationship between the leakage current and stack architecture, we compare the simulated and measured leakage currents in the elements. Based on the analysis results, we further improve the performance by optimizing the architecture of the film stacks or changing the thin-film material. The material parameters are then corrected to improve the accuracy of the simulation results. The simulated and experimental results confirm a positive correlation between measured leakage current and stress. This trend is attributed to the structural defects induced by high stress, which generate leakage. Using this relationship, we can change the structure of the thin-film stack to reduce the leakage current and thereby improve the component life and reliability of the CIS components.

  3. Deep electron traps in HfO2-based metal-oxide-semiconductor capacitors

    International Nuclear Information System (INIS)

    Salomone, L. Sambuco; Lipovetzky, J.; Carbonetto, S.H.; García Inza, M.A.; Redin, E.G.; Campabadal, F.

    2016-01-01

    Hafnium oxide (HfO 2 ) is currently considered to be a good candidate to take part as a component in charge-trapping nonvolatile memories. In this work, the electric field and time dependences of the electron trapping/detrapping processes are studied through a constant capacitance voltage transient technique on metal-oxide-semiconductor capacitors with atomic layer deposited HfO 2 as insulating layer. A tunneling-based model is proposed to reproduce the experimental results, obtaining fair agreement between experiments and simulations. From the fitting procedure, a band of defects is identified, located in the first 1.7 nm from the Si/HfO 2 interface at an energy level E t = 1.59 eV below the HfO 2 conduction band edge with density N t = 1.36 × 10 19 cm −3 . A simplified analytical version of the model is proposed in order to ease the fitting procedure for the low applied voltage case considered in this work. - Highlights: • We characterized deep electron trapping/detrapping in HfO 2 structures. • We modeled the experimental results through a tunneling-based model. • We obtained an electron trap energy level of 1.59 eV below conduction band edge. • We obtained a spatial trap distribution extending 1.7 nm within the insulator. • A simplified tunneling front model is able to reproduce the experimental results.

  4. Laser Doppler blood flow complementary metal oxide semiconductor imaging sensor with analog on-chip processing

    International Nuclear Information System (INIS)

    Gu Quan; Hayes-Gill, Barrie R.; Morgan, Stephen P.

    2008-01-01

    A 4x4 pixel array with analog on-chip processing has been fabricated within a 0.35 μm complementary metal oxide semiconductor process as a prototype sensor for laser Doppler blood flow imaging. At each pixel the bandpass and frequency weighted filters necessary for processing laser Doppler blood flow signals have been designed and fabricated. Because of the space constraints of implementing an accurate ω 0.5 filter at the pixel level, this has been approximated using the ''roll off'' of a high-pass filter with a cutoff frequency set at 10 kHz. The sensor has been characterized using a modulated laser source. Fixed pattern noise is present that is demonstrated to be repeatable across the array and can be calibrated. Preliminary blood flow results on a finger before and after occlusion demonstrate that the sensor array provides the potential for a system that can be scaled to a larger number of pixels for blood flow imaging

  5. Thermal stability of atomic layer deposited WCxNy electrodes for metal oxide semiconductor devices

    Science.gov (United States)

    Zonensain, Oren; Fadida, Sivan; Fisher, Ilanit; Gao, Juwen; Danek, Michal; Eizenberg, Moshe

    2018-01-01

    This study is a thorough investigation of the chemical, structural, and electrical stability of W based organo-metallic films, grown by atomic layer deposition, for future use as gate electrodes in advanced metal oxide semiconductor structures. In an earlier work, we have shown that high effective work-function (4.7 eV) was produced by nitrogen enriched films (WCxNy) dominated by W-N chemical bonding, and low effective work-function (4.2 eV) was produced by hydrogen plasma resulting in WCx films dominated by W-C chemical bonding. In the current work, we observe, using x-ray diffraction analysis, phase transformation of the tungsten carbide and tungsten nitride phases after 900 °C annealing to the cubic tungsten phase. Nitrogen diffusion is also observed and is analyzed with time-of-flight secondary ion mass spectroscopy. After this 900 °C anneal, WCxNy effective work function tunability is lost and effective work-function values of 4.7-4.8 eV are measured, similar to stable effective work function values measured for PVD TiN up to 900 °C anneal. All the observed changes after annealing are discussed and correlated to the observed change in the effective work function.

  6. Accurate geometry scalable complementary metal oxide semiconductor modelling of low-power 90 nm amplifier circuits

    Directory of Open Access Journals (Sweden)

    Apratim Roy

    2014-05-01

    Full Text Available This paper proposes a technique to accurately estimate radio frequency behaviour of low-power 90 nm amplifier circuits with geometry scalable discrete complementary metal oxide semiconductor (CMOS modelling. Rather than characterising individual elements, the scheme is able to predict gain, noise and reflection loss of low-noise amplifier (LNA architectures made with bias, active and passive components. It reduces number of model parameters by formulating dependent functions in symmetric distributed modelling and shows that simple fitting factors can account for extraneous (interconnect effects in LNA structure. Equivalent-circuit model equations based on physical structure and describing layout parasites are developed for major amplifier elements like metal–insulator–metal (MIM capacitor, spiral symmetric inductor, polysilicon (PS resistor and bulk RF transistor. The models are geometry scalable with respect to feature dimensions, i.e. MIM/PS width and length, outer-dimension/turns of planar inductor and channel-width/fingers of active device. Results obtained with the CMOS models are compared against measured literature data for two 1.2 V amplifier circuits where prediction accuracy for RF parameters (S(21, noise figure, S(11, S(22 lies within the range of 92–99%.

  7. Structural damage at the Si/SiO2 interface resulting from electron injection in metal-oxide-semiconductor devices

    Science.gov (United States)

    Mikawa, R. E.; Lenahan, P. M.

    1985-03-01

    With electron spin resonance, we have observed structural changes in metal-oxide-semiconductor structures resulting from the photoemisson of electrons from the silicon into the oxide. A trivalent silicon defect at the Si/SiO2 interface, termed Pb, is shown to be responsible for the interface states induced by electron injection. We find that these Pb centers are amphoteric interface state defects.

  8. Low Power Operation of Temperature-Modulated Metal Oxide Semiconductor Gas Sensors.

    Science.gov (United States)

    Burgués, Javier; Marco, Santiago

    2018-01-25

    Mobile applications based on gas sensing present new opportunities for low-cost air quality monitoring, safety, and healthcare. Metal oxide semiconductor (MOX) gas sensors represent the most prominent technology for integration into portable devices, such as smartphones and wearables. Traditionally, MOX sensors have been continuously powered to increase the stability of the sensing layer. However, continuous power is not feasible in many battery-operated applications due to power consumption limitations or the intended intermittent device operation. This work benchmarks two low-power, duty-cycling, and on-demand modes against the continuous power one. The duty-cycling mode periodically turns the sensors on and off and represents a trade-off between power consumption and stability. On-demand operation achieves the lowest power consumption by powering the sensors only while taking a measurement. Twelve thermally modulated SB-500-12 (FIS Inc. Jacksonville, FL, USA) sensors were exposed to low concentrations of carbon monoxide (0-9 ppm) with environmental conditions, such as ambient humidity (15-75% relative humidity) and temperature (21-27 °C), varying within the indicated ranges. Partial Least Squares (PLS) models were built using calibration data, and the prediction error in external validation samples was evaluated during the two weeks following calibration. We found that on-demand operation produced a deformation of the sensor conductance patterns, which led to an increase in the prediction error by almost a factor of 5 as compared to continuous operation (2.2 versus 0.45 ppm). Applying a 10% duty-cycling operation of 10-min periods reduced this prediction error to a factor of 2 (0.9 versus 0.45 ppm). The proposed duty-cycling powering scheme saved up to 90% energy as compared to the continuous operating mode. This low-power mode may be advantageous for applications that do not require continuous and periodic measurements, and which can tolerate slightly higher

  9. Metal-oxide-semiconductor based gas sensors: screening, preparation, and integration.

    Science.gov (United States)

    Zhang, Jian; Qin, Ziyu; Zeng, Dawen; Xie, Changsheng

    2017-03-01

    Metal-oxide-semiconductor (MOS) based gas sensors have been considered a promising candidate for gas detection over the past few years. However, the sensing properties of MOS-based gas sensors also need to be further enhanced to satisfy the higher requirements for specific applications, such as medical diagnosis based on human breath, gas detection in harsh environments, etc. In these fields, excellent selectivity, low power consumption, a fast response/recovery rate, low humidity dependence and a low limit of detection concentration should be fulfilled simultaneously, which pose great challenges to the MOS-based gas sensors. Recently, in order to improve the sensing performances of MOS-based gas sensors, more and more researchers have carried out extensive research from theory to practice. For a similar purpose, on the basis of the whole fabrication process of gas sensors, this review gives a presentation of the important role of screening and the recent developments in high throughput screening. Subsequently, together with the sensing mechanism, the factors influencing the sensing properties of MOSs involved in material preparation processes were also discussed in detail. It was concluded that the sensing properties of MOSs not only depend on the morphological structure (particle size, morphology, pore size, etc.), but also rely on the defect structure and heterointerface structure (grain boundaries, heterointerfaces, defect concentrations, etc.). Therefore, the material-sensor integration was also introduced to maintain the structural stability in the sensor fabrication process, ensuring the sensing stability of MOS-based gas sensors. Finally, the perspectives of the MOS-based gas sensors in the aspects of fundamental research and the improvements in the sensing properties are pointed out.

  10. Photo induced minority carrier annihilation at crystalline silicon surface in metal oxide semiconductor structure

    Science.gov (United States)

    Sameshima, Toshiyuki; Furukawa, Jun; Nakamura, Tomohiko; Shigeno, Satoshi; Node, Tomohito; Yoshidomi, Shinya; Hasumi, Masahiko

    2014-03-01

    We report the properties of features of photo induced minority carrier annihilation at the silicon surface in a metal-oxide-semiconductor (MOS) structure using 9.35 GHz microwave transmittance measurement. 7 Ω cm n-type 500-µm-thick crystalline silicon substrates coated with 100-nm-thick thermally grown SiO2 layers were prepared. Part of the SiO2 at the rear surface was removed. Al electrode bars were formed at the top and rear surfaces to form the structures Al/SiO2/Si/SiO2/Al and Al/SiO2/Si/Al. 635 nm light illumination onto the top surface caused photo induced carriers to be in one side of the silicon region of the Al electrode bar of the structure Al/SiO2/Si/SiO2/Al. Microwave transmittance was measured on the other side of the silicon region of the Al electrode bars. The measurement and analysis of microwave absorption by photo induced carriers laterally diffusing across the silicon region coated with Al electrodes revealed a change in the carrier recombination velocity at the silicon surface with the bias voltage applied onto the top Al electrode. The applied bias voltages of +2.0 and -2.2 V gave peaks at surface recombination velocities of 83 and 86 cm/s, respectively, for the sample structure Al/SiO2/Si/SiO2/Al, while it was 44 cm/s under the bias-free condition. A peak surface recombination velocity of 81 cm/s was only observed at a bias voltage of -2.0 V for the sample structure Al/SiO2/Si/Al.

  11. Systematic reliability study of top-gate p- and n-channel organic field-effect transistors.

    Science.gov (United States)

    Hwang, Do Kyung; Fuentes-Hernandez, Canek; Fenoll, Mathieu; Yun, Minseong; Park, Jihoon; Shim, Jae Won; Knauer, Keith A; Dindar, Amir; Kim, Hyungchul; Kim, Yongjin; Kim, Jungbae; Cheun, Hyeunseok; Payne, Marcia M; Graham, Samuel; Im, Seongil; Anthony, John E; Kippelen, Bernard

    2014-03-12

    We report on a systematic investigation on the performance and stability of p-channel and n-channel top-gate OFETs, with a CYTOP/Al2O3 bilayer gate dielectric, exposed to controlled dry oxygen and humid atmospheres. Despite the severe conditions of environmental exposure, p-channel and n-channel top-gate OFETs show only minor changes of their performance parameters without undergoing irreversible damage. When correlated with the conditions of environmental exposure, these changes provide new insight into the possible physical mechanisms in the presence of oxygen and water. Photoexcited charge collection spectroscopy experiments provided further evidence of oxygen and water effects on OFETs. Top-gate OFETs also display outstanding durability, even when exposed to oxygen plasma and subsequent immersion in water or operated under aqueous media. These remarkable properties arise as a consequence of the use of relatively air stable organic semiconductors and proper engineering of the OFET structure.

  12. A striking performance improvement of fullerene n-channel field-effect transistors via synergistic interfacial modifications

    Science.gov (United States)

    Du, Lili; Luo, Xiao; Wen, Zhanwei; Zhang, Jianping; Sun, Lei; Lv, Wenli; Li, Yao; Zhao, Feiyu; Zhong, Junkang; Ren, Qiang; Huang, Fobao; Xia, Hongquan; Peng, Yingquan

    2015-10-01

    For fullerene based n-channel transistors, remarkably improved device characteristics were achieved via charge injection and transport interfacial synergistic modifications using low-cost aluminium source/drain electrodes. Compared with the reference device without any modifications (device A), the as-fabricated transistor (device H) showed a dramatic improvement of saturation mobility from 0.0026 to 0.3078 cm2 V-1 s-1 with a maximum on-off current ratio of 106 and a minimum subthreshold slope of 1.52 V decade-1. AFM and XRD analysis manifested that the deposited C60 films on PVA/OTS successive-modified SiO2 substrate were highly dense polycrystalline and uniform with larger crystalline grain and less grain boundary. A gap state assisted electron injection mechanism was proposed to explicate the enhanced electrical conductivity considering BCP modification for charge injection interface, which has been well corroborated by a diode-based injection experiment and a theoretical calculation of contact resistances. We further demonstrated the application of the concept modification method to enable comparative time-stable operation of fullerene n-channel transistors. Given many key merits, we believed that this general method using multi-interface modifications could be extended to fabricate other n-channel OFETs with superior electrical performance and stability.

  13. Metal-oxide-semiconductor devices based on epitaxial germanium-carbon layers grown directly on silicon substrates by ultra-high-vacuum chemical vapor deposition

    Science.gov (United States)

    Kelly, David Quest

    After the integrated circuit was invented in 1959, complementary metal-oxide-semiconductor (CMOS) technology soon became the mainstay of the semiconductor industry. Silicon-based CMOS has dominated logic technologies for decades. During this time, chip performance has grown at an exponential rate at the cost of higher power consumption and increased process complexity. The performance gains have been made possible through scaling down circuit dimensions by improvements in lithography capabilities. Since scaling cannot continue forever, researchers have vigorously pursued new ways of improving the performance of metal-oxide-semiconductor field-effect transistors (MOSFETs) without having to shrink gate lengths and reduce the gate insulator thickness. Strained silicon, with its ability to boost transistor current by improving the channel mobility, is one of the methods that has already found its way into production. Although not yet in production, high-kappa dielectrics have also drawn wide interest in industry since they allow for the reduction of the electrical oxide thickness of the gate stack without having to reduce the physical thickness of the dielectric. Further out on the horizon is the incorporation of high-mobility materials such as germanium (Ge), silicon-germanium (Si1-xGe x), and the III-V semiconductors. Among the high-mobility materials, Ge has drawn the most attention because it has been shown to be compatible with high-kappa dielectrics and to produce high drive currents compared to Si. Among the most difficult challenges for integrating Ge on Si is finding a suitable method for reducing the number of crystal defects. The use of strain-relaxed Si1- xGex buffers has proven successful for reducing the threading dislocation density in Ge epitaxial layers, but questions remain as to the viability of this method in terms of cost and process complexity. This dissertation presents research on thin germanium-carbon (Ge 1-yCy layers on Si for the fabrication

  14. Multichannel, time-resolved picosecond laser ultrasound imaging and spectroscopy with custom complementary metal-oxide-semiconductor detector

    International Nuclear Information System (INIS)

    Smith, Richard J.; Light, Roger A.; Johnston, Nicholas S.; Pitter, Mark C.; Somekh, Mike G.; Sharples, Steve D.

    2010-01-01

    This paper presents a multichannel, time-resolved picosecond laser ultrasound system that uses a custom complementary metal-oxide-semiconductor linear array detector. This novel sensor allows parallel phase-sensitive detection of very low contrast modulated signals with performance in each channel comparable to that of a discrete photodiode and a lock-in amplifier. Application of the instrument is demonstrated by parallelizing spatial measurements to produce two-dimensional thickness maps on a layered sample, and spectroscopic parallelization is demonstrated by presenting the measured Brillouin oscillations from a gallium arsenide wafer. This paper demonstrates the significant advantages of our approach to pump probe systems, especially picosecond ultrasonics.

  15. Memory effects in a Al/Ti:HfO2/CuPc metal-oxide-semiconductor device

    Science.gov (United States)

    Tripathi, Udbhav; Kaur, Ramneek

    2016-05-01

    Metal oxide semiconductor structured organic memory device has been successfully fabricated. Ti doped hafnium oxide (Ti:HfO2) nanoparticles has been fabricated by precipitation method and further calcinated at 800 °C. Copper phthalocyanine, a hole transporting material has been utilized as an organic semiconductor. The electrical properties of the fabricated device have been studied by measuring the current-voltage and capacitance-voltage characteristics. The amount of charge stored in the nanoparticles has been calculated by using flat band condition. This simple approach for fabricating MOS memory device has opens up opportunities for the development of next generation memory devices.

  16. Phenacyl-thiophene and quinone semiconductors designed for solution processability and air-stability in high mobility n-channel field-effect transistors.

    Science.gov (United States)

    Letizia, Joseph A; Cronin, Scott; Ortiz, Rocio Ponce; Facchetti, Antonio; Ratner, Mark A; Marks, Tobin J

    2010-02-08

    Electron-transporting organic semiconductors (n-channel) for field-effect transistors (FETs) that are processable in common organic solvents or exhibit air-stable operation are rare. This investigation addresses both these challenges through rational molecular design and computational predictions of n-channel FET air-stability. A series of seven phenacyl-thiophene-based materials are reported incorporating systematic variations in molecular structure and reduction potential. These compounds are as follows: 5,5'''-bis(perfluorophenylcarbonyl)-2,2':5',- 2'':5'',2'''-quaterthiophene (1), 5,5'''-bis(phenacyl)-2,2':5',2'': 5'',2'''-quaterthiophene (2), poly[5,5'''-(perfluorophenac-2-yl)-4',4''-dioctyl-2,2':5',2'':5'',2'''-quaterthiophene) (3), 5,5'''-bis(perfluorophenacyl)-4,4'''-dioctyl-2,2':5',2'':5'',2'''-quaterthiophene (4), 2,7-bis((5-perfluorophenacyl)thiophen-2-yl)-9,10-phenanthrenequinone (5), 2,7-bis[(5-phenacyl)thiophen-2-yl]-9,10-phenanthrenequinone (6), and 2,7-bis(thiophen-2-yl)-9,10-phenanthrenequinone, (7). Optical and electrochemical data reveal that phenacyl functionalization significantly depresses the LUMO energies, and introduction of the quinone fragment results in even greater LUMO stabilization. FET measurements reveal that the films of materials 1, 3, 5, and 6 exhibit n-channel activity. Notably, oligomer 1 exhibits one of the highest mu(e) (up to approximately = 0.3 cm(2) V(-1) s(-1)) values reported to date for a solution-cast organic semiconductor; one of the first n-channel polymers, 3, exhibits mu(e) approximately = 10(-6) cm(2) V(-1) s(-1) in spin-cast films (mu(e)=0.02 cm(2) V(-1) s(-1) for drop-cast 1:3 blend films); and rare air-stable n-channel material 5 exhibits n-channel FET operation with mu(e)=0.015 cm(2) V(-1) s(-1), while maintaining a large I(on:off)=10(6) for a period greater than one year in air. The crystal structures of 1 and 2 reveal close herringbone interplanar pi-stacking distances (3.50 and 3.43 A, respectively

  17. High temperature operation of n-AlGaN channel metal semiconductor field effect transistors on low-defect AlN templates

    Science.gov (United States)

    Muhtadi, S.; Hwang, S.; Coleman, A.; Asif, F.; Lunev, A.; Chandrashekhar, M. V. S.; Khan, A.

    2017-05-01

    We report room-temperature to 200 °C operation of n-Al0.65Ga0.35N channel metal semiconductor field effect transistors (MESFET) grown over high-quality AlN/sapphire templates. For this temperature range, the source-drain currents, threshold voltages, and dc-transconductance values remain nearly unchanged with an estimated field-effect mobility of ˜90 cm2/V-s at 200 °C and currents of >100 mA/mm. The analysis of the temperature dependent current-voltage characteristics of the gate-source Schottky barrier diode reveals that the leakage currents arise from Frenkel-Poole emission. The capacitance-voltage data show no hysteresis, indicating a high quality Schottky barrier interface. These MESFET's have excellent potential for use as a high temperature power electronic or a solar-blind ultraviolet sensing device.

  18. Novel self-assembled phosphonic acids monolayers applied in N-channel perylene diimide (PDI) organic field effect transistors

    Science.gov (United States)

    Cheng, Heng; Huai, Jinyue; Cao, Li; Li, Zhefeng

    2016-08-01

    Phosphoric acid (PA) self-assembled monolayers (SAMs) have been developed for applications in organic field-effect transistors (OFETs). This efficient interface modification is helpful for semiconductor layer to form crystal thin film during vapor deposition. Results show that the PDI-i8C based OFETs with PA SAMs exhibit field-effect mobilities up to 0.014 cm2 V-1 s-1 (with ODPA as SAMs), which is over 500 times higher than the device without SAMs. Also, transistors with Naph6PA as SAMs show up to 1.5 × 10-3 cm2 V-1 s-1. By studying the morphology of semiconductor layer and SAMs surface, it is found that ODPA bilayer structure plays a key role in inducing PDI-i8C to form orderly crystal thin film.

  19. High performance n-channel organic field-effect transistors based on halogenated derivatives of 1,2,4,5-benzenetetracarboxylic diimides

    Science.gov (United States)

    Peng, Yue; Cao, Li; Li, Zhefeng

    2017-10-01

    Three kind of 1,2,4,5-benzenetetracarboxylic diimides (BTDs) with halogenated phenyl groups were synthesized through one-step reaction with high yields. Top-contact organic field-effect transistors (OFETs) were fabricated via vacuum deposition of BTDs as the semiconducting channel materials on N-octadecylphosphonic acid (ODPA) treated SiO2/Si substrates. The electronic characterization was measured in ambient condition. All these derivatives exhibit excellent n-channel OFET transport with the highest mobility up to 9.2 × 10-2 cm2v-1s-1 for BTD-ClAN deposited at room temperature. The crystallinity and morphology of film were improved by modified the substrate and demonstrated by X-ray diffraction (XRD) and atomic force microscopy (AFM). Our results indicates that introducing electron-withdrawing substituents into 1,2,4,5-benzenetetracarboxylic diimides is an effective way to achieve high OFETs performance.

  20. Charge-flow structures as polymeric early-warning fire alarm devices. M.S. Thesis; [metal oxide semiconductors

    Science.gov (United States)

    Sechen, C. M.; Senturia, S. D.

    1977-01-01

    The charge-flow transistor (CFT) and its applications for fire detection and gas sensing were investigated. The utility of various thin film polymers as possible sensing materials was determined. One polymer, PAPA, showed promise as a relative humidity sensor; two others, PFI and PSB, were found to be particularly suitable for fire detection. The behavior of the charge-flow capacitor, which is basically a parallel-plate capacitor with a polymer-filled gap in the metallic tip electrode, was successfully modeled as an RC transmission line. Prototype charge-flow transistors were fabricated and tested. The effective threshold voltage of this metal oxide semiconductor was found to be dependent on whether surface or bulk conduction in the thin film was dominant. Fire tests with a PFI-coated CFT indicate good sensitivity to smouldering fires.

  1. Effect of Water Vapor and Surface Morphology on the Low Temperature Response of Metal Oxide Semiconductor Gas Sensors.

    Science.gov (United States)

    Maier, Konrad; Helwig, Andreas; Müller, Gerhard; Hille, Pascal; Eickhoff, Martin

    2015-09-23

    In this work the low temperature response of metal oxide semiconductor gas sensors is analyzed. Important characteristics of this low-temperature response are a pronounced selectivity to acid- and base-forming gases and a large disparity of response and recovery time constants which often leads to an integrator-type of gas response. We show that this kind of sensor performance is related to the trend of semiconductor gas sensors to adsorb water vapor in multi-layer form and that this ability is sensitively influenced by the surface morphology. In particular we show that surface roughness in the nanometer range enhances desorption of water from multi-layer adsorbates, enabling them to respond more swiftly to changes in the ambient humidity. Further experiments reveal that reactive gases, such as NO₂ and NH₃, which are easily absorbed in the water adsorbate layers, are more easily exchanged across the liquid/air interface when the humidity in the ambient air is high.

  2. Impedance analysis of Al{sub 2}O{sub 3}/H-terminated diamond metal-oxide-semiconductor structures

    Energy Technology Data Exchange (ETDEWEB)

    Liao, Meiyong, E-mail: meiyong.liao@nims.go.jp [School of Engineering and Applied Science, Aston University, Birmingham B4 7ET (United Kingdom); Optical and Electronic Materials Unit, National Institute for Materials Science, Namiki 1-1, Tsukuba, Ibaraki 3050044 (Japan); Liu, Jiangwei; Imura, Masataka; Koide, Yasuo [Optical and Electronic Materials Unit, National Institute for Materials Science, Namiki 1-1, Tsukuba, Ibaraki 3050044 (Japan); Sang, Liwen [International Center for Materials Nanoarchitectonics (MANA), National Institute for Materials Science, Namiki 1-1, Tsukuba, Ibaraki 3050044 (Japan); Coathup, David; Li, Jiangling; Ye, Haitao, E-mail: h.ye@aston.ac.uk [School of Engineering and Applied Science, Aston University, Birmingham B4 7ET (United Kingdom)

    2015-02-23

    Impedance spectroscopy (IS) analysis is carried out to investigate the electrical properties of the metal-oxide-semiconductor (MOS) structure fabricated on hydrogen-terminated single crystal diamond. The low-temperature atomic layer deposition Al{sub 2}O{sub 3} is employed as the insulator in the MOS structure. By numerically analysing the impedance of the MOS structure at various biases, the equivalent circuit of the diamond MOS structure is derived, which is composed of two parallel capacitive and resistance pairs, in series connection with both resistance and inductance. The two capacitive components are resulted from the insulator, the hydrogenated-diamond surface, and their interface. The physical parameters such as the insulator capacitance are obtained, circumventing the series resistance and inductance effect. By comparing the IS and capacitance-voltage measurements, the frequency dispersion of the capacitance-voltage characteristic is discussed.

  3. A complementary metal-oxide-semiconductor compatible monocantilever 12-point probe for conductivity measurements on the nanoscale

    DEFF Research Database (Denmark)

    Gammelgaard, Lauge; Bøggild, Peter; Wells, J.W.

    2008-01-01

    and a probe pitch of 500 nm. In-air four-point measurements have been performed on indium tin oxide, ruthenium, and titanium-tungsten, showing good agreement with values obtained by other four-point probes. In-vacuum four-point resistance measurements have been performed on clean Bi(111) using different probe......We present a complementary metal-oxide-semiconductor compatible, nanoscale 12-point-probe based on TiW electrodes placed on a SiO2 monocantilever. Probes are mass fabricated on Si wafers by a combination of electron beam and UV lithography, realizing TiW electrode tips with a width down to 250 nm...

  4. On the decay of the trapped holes and the slow states in metal-oxide-semiconductor capacitors

    Science.gov (United States)

    Meinertzhagen, A.; Petit, C.; Yard, G.; Jourdain, M.; Salace, G.

    1996-03-01

    We have compared the charge created in p-metal-oxide-semiconductor capacitors by Fowler-Nordheim injection from the gate and from the substrate. We have shown that an injection from the gate creates a negative charge, trapped holes, and positively charged slow states whereas an injection from the substrate creates a negative charge, slow states, and amphoteric neutral traps; once charged these neutral traps are discharged irreversibly, as are the trapped holes, by an appropriate gate bias. We have observed that the discharge of the trapped holes, and the charge or discharge of the slow states, obey the same general law, but the time response of the trapped holes is always shorter than the time response of the slow states. This general law is equivalent to the so-called ``universal law,'' which is the law which describes the time dependence of current observed in any dielectric in response to a step-function field.

  5. Impact of process temperature on GaSb metal-oxide-semiconductor interface properties fabricated by ex-situ process

    Science.gov (United States)

    Yokoyama, Masafumi; Asakura, Yuji; Yokoyama, Haruki; Takenaka, Mitsuru; Takagi, Shinichi

    2014-06-01

    We have studied the impact of process temperature on interface properties of GaSb metal-oxide-semiconductor (MOS) structures fabricated by an ex-situ atomic-layer-deposition (ALD) process. We have found that the ALD temperature strongly affects the Al2O3/GaSb MOS interface properties. The Al2O3/GaSb MOS interfaces fabricated at the low ALD temperature of 150 °C have the minimum interface-trap density (Dit) of ˜4.5 × 1013 cm-2 eV-1. We have also found that the post-metalization annealing at temperature higher than 200 °C degrades the Al2O3/GaSb MOS interface properties. The low-temperature process is preferable in fabricating GaSb MOS interfaces in the ex-situ ALD process to avoid the high-temperature-induced degradations.

  6. Single-electron-occupation metal-oxide-semiconductor quantum dots formed from efficient poly-silicon gate layout

    Energy Technology Data Exchange (ETDEWEB)

    Carroll, Malcolm S.; rochette, sophie; Rudolph, Martin; Roy, A. -M.; Curry, Matthew Jon; Ten Eyck, Gregory A.; Manginell, Ronald P.; Wendt, Joel R.; Pluym, Tammy; Carr, Stephen M; Ward, Daniel Robert; Lilly, Michael; pioro-ladriere, michel

    2017-07-01

    We introduce a silicon metal-oxide-semiconductor quantum dot structure that achieves dot-reservoir tunnel coupling control without a dedicated barrier gate. The elementary structure consists of two accumulation gates separated spatially by a gap, one gate accumulating a reservoir and the other a quantum dot. Control of the tunnel rate between the dot and the reservoir across the gap is demonstrated in the single electron regime by varying the reservoir accumulation gate voltage while compensating with the dot accumulation gate voltage. The method is then applied to a quantum dot connected in series to source and drain reservoirs, enabling transport down to the single electron regime. Finally, tuning of the valley splitting with the dot accumulation gate voltage is observed. This split accumulation gate structure creates silicon quantum dots of similar characteristics to other realizations but with less electrodes, in a single gate stack subtractive fabrication process that is fully compatible with silicon foundry manufacturing.

  7. A Logarithmic Response Complementary Metal Oxide Semiconductor Image Sensor with Parasitic P-N-P Bipolar Junction Transistor

    Science.gov (United States)

    Lai, Cheng‑Hsiao; Lai, Liang‑Wei; Chiang, Wen‑Jen; King, Ya‑Chin

    2006-04-01

    Logarithmic-response complementary metal oxide semiconductor (CMOS) active pixel sensors provide a desirable attribute of wide dynamic range even with low supply voltages. In this paper, a log-mode pixel with employing parasitic P-N-P bipolar junction transistor (BJT) to amplify photo-current is investigated and optimized. A new log-mode cell with a calibration transistor is proposed to increase the output voltage swing as well as to reduce the fixed pattern noise. The measurement results demonstrate that, the output voltage swing of this new cell is enhanced by 4× and fixed pattern noise (FPN) of a pixel array can be reduced by 10× comparing to that of a conventional log-mode CMOS active pixel sensor.

  8. Study of the tunnelling initiated leakage current through the carbon nanotube embedded gate oxide in metal oxide semiconductor structures

    International Nuclear Information System (INIS)

    Chakraborty, Gargi; Sarkar, C K; Lu, X B; Dai, J Y

    2008-01-01

    The tunnelling currents through the gate dielectric partly embedded with semiconducting single-wall carbon nanotubes in a silicon metal-oxide-semiconductor (MOS) structure have been investigated. The application of the gate voltage to such an MOS device results in the band bending at the interface of the partly embedded oxide dielectric and the surface of the silicon, initiating tunnelling through the gate oxide responsible for the gate leakage current whenever the thickness of the oxide is scaled. A model for silicon MOS structures, where carbon nanotubes are confined in a narrow layer embedded in the gate dielectric, is proposed to investigate the direct and the Fowler-Nordheim (FN) tunnelling currents of such systems. The idea of embedding such elements in the gate oxide is to assess the possibility for charge storage for memory device applications. Comparing the FN tunnelling onset voltage between the pure gate oxide and the gate oxide embedded with carbon nanotubes, it is found that the onset voltage decreases with the introduction of the nanotubes. The direct tunnelling current has also been studied at very low gate bias, for the thin oxide MOS structure which plays an important role in scaling down the MOS transistors. The FN tunnelling current has also been studied with varying nanotube diameter

  9. Anomalous wear-out phenomena of europium-implanted light emitters based on a metal-oxide-semiconductor structure

    International Nuclear Information System (INIS)

    Rebohle, L.; Lehmann, J.; Prucnal, S.; Nazarov, A.; Tyagulskii, I.; Tyagulskii, S.; Kanjilal, A.; Voelskow, M.; Grambole, D.; Skorupa, W.; Helm, M.

    2009-01-01

    The anomalous wear-out phenomena of Eu-implanted metal-oxide-semiconductor devices were investigated. It will be shown that in contrast to other rare earth elements the electroluminescence (EL) intensity of Eu-implanted SiO 2 layers can rise under constant current injection before the known EL quenching will start. Under certain circumstances, this rise may amount up to two orders of magnitude. The EL behavior will be correlated with the microstructural and electrical properties of the devices. Transmission electron microscopy and Rutherford backscattering spectroscopy were applied to trace the development of Eu/Eu oxide clusters and the diffusion of Eu to the interfaces of the gate oxide layer. The hydrogen profile within the SiO 2 -SiON interface region was determined by nuclear reaction analysis. Current-voltage characteristics, EL decay times, and the progression of the voltage and the EL spectrum with increasing charge injection were measured to study charge and trapping phenomena in the oxide layer to reveal details of the EL excitation mechanism. A first qualitative model for the anomalous life time behavior is proposed.

  10. Effect of Water Vapor and Surface Morphology on the Low Temperature Response of Metal Oxide Semiconductor Gas Sensors

    Directory of Open Access Journals (Sweden)

    Konrad Maier

    2015-09-01

    Full Text Available In this work the low temperature response of metal oxide semiconductor gas sensors is analyzed. Important characteristics of this low-temperature response are a pronounced selectivity to acid- and base-forming gases and a large disparity of response and recovery time constants which often leads to an integrator-type of gas response. We show that this kind of sensor performance is related to the trend of semiconductor gas sensors to adsorb water vapor in multi-layer form and that this ability is sensitively influenced by the surface morphology. In particular we show that surface roughness in the nanometer range enhances desorption of water from multi-layer adsorbates, enabling them to respond more swiftly to changes in the ambient humidity. Further experiments reveal that reactive gases, such as NO2 and NH3, which are easily absorbed in the water adsorbate layers, are more easily exchanged across the liquid/air interface when the humidity in the ambient air is high.

  11. Nonvolatile memory characteristics in metal-oxide-semiconductors containing metal nanoparticles fabricated by using a unique laser irradiation method

    International Nuclear Information System (INIS)

    Yang, JungYup; Yoon, KapSoo; Kim, JuHyung; Choi, WonJun; Do, YoungHo; Kim, ChaeOk; Hong, JinPyo

    2006-01-01

    Metal-oxide-semiconductor (MOS) capacitors with metal nanoparticles (Co NP) were successfully fabricated by utilizing an external laser exposure technique for application of non-volatile memories. Images of high-resolution transmission electron microscopy reveal that the spherically shaped Co NP are clearly embedded in the gate oxide layer. Capacitance-voltage measurements exhibit typical charging and discharging effects with a large flat-band shift. The effects of the tunnel oxide thickness and the different tunnel materials are analyzed using capacitance-voltage and retention characteristics. In addition, the memory characteristics of the NP embedded in a high-permittivity material are investigated because the thickness of conventionally available SiO 2 gates is approaching the quantum tunneling limit as devices are scaled down. Finally, the suitability of NP memory devices for nonvolatile memory applications is also discussed. The present results suggest that our unique laser exposure technique holds promise for the NP formation as floating gate elements in nonvolatile NP memories and that the quality of the tunnel oxide is very important for enhancing the retention properties of nonvolatile memory.

  12. Single-electron regime and Pauli spin blockade in a silicon metal-oxide-semiconductor double quantum dot

    Science.gov (United States)

    Rochette, Sophie; Ten Eyck, Gregory A.; Pluym, Tammy; Lilly, Michael P.; Carroll, Malcolm S.; Pioro-Ladrière, Michel

    2015-03-01

    Silicon quantum dots are promising candidates for quantum information processing as spin qubits with long coherence time. We present electrical transport measurements on a silicon metal-oxide-semiconductor (MOS) double quantum dot (DQD). First, Coulomb diamonds measurements demonstrate the one-electron regime at a relatively high temperature of 1.5 K. Then, the 8 mK stability diagram shows Pauli spin blockade with a large singlet-triplet separation of approximatively 0.40 meV, pointing towards a strong lifting of the valley degeneracy. Finally, numerical simulations indicate that by integrating a micro-magnet to those devices, we could achieve fast spin rotations of the order of 30 ns. Those results are part of the recent body of work demonstrating the potential of Si MOS DQD as reliable and long-lived spin qubits that could be ultimately integrated into modern electronic facilities. Sandia National Laboratories is a multi-program laboratory managed and operated by Sandia Corporation, a wholly owned subsidiary of Lockheed Martin Corporation, for the U.S. DOE's National Nuclear Security Administration under Contract DE-AC04-94AL85000.

  13. Impact of process temperature on GaSb metal-oxide-semiconductor interface properties fabricated by ex-situ process

    Energy Technology Data Exchange (ETDEWEB)

    Yokoyama, Masafumi, E-mail: yokoyama@mosfet.t.u-tokyo.ac.jp; Takenaka, Mitsuru; Takagi, Shinichi [Department of Electrical Engineering and Information Systems, The University of Tokyo, Yayoi 2-11-16, Bunkyo, Tokyo 113-0032 (Japan); JST-CREST, Yayoi 2-11-16, Bunkyo, Tokyo 113-0032 (Japan); Asakura, Yuji [Department of Electrical Engineering and Information Systems, The University of Tokyo, Yayoi 2-11-16, Bunkyo, Tokyo 113-0032 (Japan); Yokoyama, Haruki [NTT Photonics Laboratories, NTT Corporation, Atsugi 243-0198 (Japan)

    2014-06-30

    We have studied the impact of process temperature on interface properties of GaSb metal-oxide-semiconductor (MOS) structures fabricated by an ex-situ atomic-layer-deposition (ALD) process. We have found that the ALD temperature strongly affects the Al{sub 2}O{sub 3}/GaSb MOS interface properties. The Al{sub 2}O{sub 3}/GaSb MOS interfaces fabricated at the low ALD temperature of 150 °C have the minimum interface-trap density (D{sub it}) of ∼4.5 × 10{sup 13 }cm{sup −2} eV{sup −1}. We have also found that the post-metalization annealing at temperature higher than 200 °C degrades the Al{sub 2}O{sub 3}/GaSb MOS interface properties. The low-temperature process is preferable in fabricating GaSb MOS interfaces in the ex-situ ALD process to avoid the high-temperature-induced degradations.

  14. A Very Low Dark Current Temperature-Resistant, Wide Dynamic Range, Complementary Metal Oxide Semiconductor Image Sensor

    Science.gov (United States)

    Mizobuchi, Koichi; Adachi, Satoru; Tejada, Jose; Oshikubo, Hiromichi; Akahane, Nana; Sugawa, Shigetoshi

    2008-07-01

    A very low dark current (VLDC) temperature-resistant approach which best suits a wide dynamic range (WDR) complementary metal oxide semiconductor (CMOS) image sensor with a lateral over-flow integration capacitor (LOFIC) has been developed. By implementing a low electric field photodiode without a trade-off of full well-capacity, reduced plasma damage, re-crystallization, and termination of silicon-silicon dioxide interface states in the front end of line and back end of line (FEOL and BEOL) in a 0.18 µm, two polycrystalline silicon, three metal (2P3M) process, the dark current is reduced to 11 e-/s/pixel (0.35 e-/s/µm2: pixel area normalized) at 60 °C, which is the lowest value ever reported. For further robustness at low and high temperatures, 1/3-in., 5.6-µm pitch, 800×600 pixel sensor chips with low noise readout circuits designed for a signal and noise hold circuit and a programmable gain amplifier (PGA) have also been deposited with an inorganic cap layer on a micro-lens and covered with a metal hermetically sealed package assembly. Image sensing performance results in 2.4 e-rms temporal noise and 100 dB dynamic range (DR) with 237 ke- full well-capacity. The operating temperature range is extended from -40 to 85 °C while retaining good image quality.

  15. A Customized Metal Oxide Semiconductor-Based Gas Sensor Array for Onion Quality Evaluation: System Development and Characterization

    Science.gov (United States)

    Konduru, Tharun; Rains, Glen C.; Li, Changying

    2015-01-01

    A gas sensor array, consisting of seven Metal Oxide Semiconductor (MOS) sensors that are sensitive to a wide range of organic volatile compounds was developed to detect rotten onions during storage. These MOS sensors were enclosed in a specially designed Teflon chamber equipped with a gas delivery system to pump volatiles from the onion samples into the chamber. The electronic circuit mainly comprised a microcontroller, non-volatile memory chip, and trickle-charge real time clock chip, serial communication chip, and parallel LCD panel. User preferences are communicated with the on-board microcontroller through a graphical user interface developed using LabVIEW. The developed gas sensor array was characterized and the discrimination potential was tested by exposing it to three different concentrations of acetone (ketone), acetonitrile (nitrile), ethyl acetate (ester), and ethanol (alcohol). The gas sensor array could differentiate the four chemicals of same concentrations and different concentrations within the chemical with significant difference. Experiment results also showed that the system was able to discriminate two concentrations (196 and 1964 ppm) of methlypropyl sulfide and two concentrations (145 and 1452 ppm) of 2-nonanone, two key volatile compounds emitted by rotten onions. As a proof of concept, the gas sensor array was able to achieve 89% correct classification of sour skin infected onions. The customized low-cost gas sensor array could be a useful tool to detect onion postharvest diseases in storage. PMID:25587975

  16. Improved interface properties of GaN-based metal-oxide-semiconductor devices with thin Ga-oxide interlayers

    Science.gov (United States)

    Yamada, Takahiro; Ito, Joyo; Asahara, Ryohei; Watanabe, Kenta; Nozaki, Mikito; Hosoi, Takuji; Shimura, Takayoshi; Watanabe, Heiji

    2017-06-01

    The impact of thin Ga-oxide (GaOx) interlayers on the electrical properties of GaN-based metal-oxide-semiconductor (MOS) devices was systematically investigated. Thin thermal oxides formed at around 900 °C were found to be beneficial for improving the electrical properties of insulator/GaN interfaces, despite the fact that thermal oxidation of GaN surfaces at high temperatures proceeds by means of grain growth. Consequently, well-behaved capacitance-voltage characteristics of SiO2/GaOx/n-GaN stacked MOS capacitors with an interface state density (Dit) as low as 1.7 × 1011 cm-2 eV-1 were demonstrated. Moreover, the Dit value was further reduced for the SiO2/GaOx/GaN capacitor with a 2-nm-thick sputter-deposited GaOx interlayer. These results clearly indicate the intrinsically superior nature of the oxide/GaN interfaces and provide plausible guiding principles for fabricating high-performance GaN-MOS devices with thin GaOx interlayers.

  17. A low-voltage complementary metal-oxide semiconductor adapter circuit suitable for input rail-to-rail operation

    Science.gov (United States)

    Tadić, Nikša; Zogović, Milena; Banjević, Mirjana; Zimmermann, Horst

    2010-11-01

    In this article, a low-voltage complementary metal-oxide semiconductor (CMOS) input signal adapter (ISA) suitable for input rail-to-rail operation of various types of analogue basic building blocks is presented. The adapter acts as a pre-stage with infinite input resistance and linear transfer characteristics. Its input signal is translated into the region fitting the operating range of the following stage. The generality of the proposed method is proven through the application of the ISA in different types of analogue basic building blocks designed in 0.5 μm CMOS technology. They are the following: below-negative-rail-to-above-positive-rail voltage-controlled transconductor, quasi rail-to-rail voltage-controlled resistor (VCR), rail-to-rail operational amplifier (OA) and quasi rail-to-rail second generation current conveyor. The proposed negative resistance quasi rail-to-rail VCR and rail-to-rail OA have been used in a Sallen and Key band-pass filter. All of these analogue basic building blocks and their applications in the form of the Sallen and Key band-pass filter operate from a single supply of 1.5 V. Simulation results confirm the predictions of the analysis performed.

  18. Temperature Modulation with Specified Detection Point on Metal Oxide Semiconductor Gas Sensors for E-Nose Application

    Directory of Open Access Journals (Sweden)

    Arief SUDARMAJI

    2015-03-01

    Full Text Available Temperature modulation technique, some called dynamic measurement mode, on Metal-Oxide Semiconductor (MOS/MOX gas sensor has been widely observed and employed in many fields. We present its development, a Specified Detection Point (SDP on modulated sensing element of MOS sensor is applied which associated to its temperature modulation, temperature modulation-SDP so-named. We configured the rectangular modulation signal for MOS gas sensors (TGSs and FISs using PSOC CY8C28445-24PVXI (Programmable System on Chip which also functioned as acquisition unit and interface to a computer. Initial responses and selectivity evaluations were performed using statistical tool and Principal Component Analysis (PCA to differ sample gases (Toluene, Ethanol and Ammonia on dynamic chamber measurement under various frequencies (0.25 Hz, 1 Hz, 4 Hz and duty-cycles (25 %, 50 %, 75 %. We found that at lower frequency the response waveform of the sensors becomes more sloping and distinct, and selected modulations successfully increased the selectivity either on singular or array sensors rather than static temperature measurement.

  19. Electrical characteristic of metal-oxide-semiconductor with NiSi2 nanocrystals embedded in oxide layer

    Science.gov (United States)

    Tsai, Jenn-Kai; Lo, Ikai; Gau, M. H.; Chen, Y. L.; Yeh, P. H.; Chang, T. C.

    2006-03-01

    The nano-structured electronic devices have received more attention recently. Metal-oxide-semiconductor structure with NiSi2 nanocrystals embedded in the oxide layer, HfO2/SiO2, has been fabricated. Comparing with conventional ones, it could be operated under lower voltage and faster program/erase speed and has better endurance and retention. We have measured the temperature-dependent tunneling V-I curve on these HfO2/SiO2 nano-structured devices for the temperature from 1.2K to 300K. The results show an abnormal electrical characteristic. The tunneling V-I characteristics appear a new threshold voltage in the low temperature region, from 30K to 100K, while applied a negative voltage. The abnormal threshold voltage disappears when the temperature higher than 150K or lower than 30K. We attribute the new threshold voltage to the discrete quantum states of NiSi2 nanocrystals in the oxide layer.

  20. Signatures of Quantized Energy States in Solution-Processed Ultrathin Layers of Metal-Oxide Semiconductors and Their Devices

    KAUST Repository

    Labram, John G.

    2015-02-13

    Physical phenomena such as energy quantization have to-date been overlooked in solution-processed inorganic semiconducting layers, owing to heterogeneity in layer thickness uniformity unlike some of their vacuum-deposited counterparts. Recent reports of the growth of uniform, ultrathin (<5 nm) metal-oxide semiconductors from solution, however, have potentially opened the door to such phenomena manifesting themselves. Here, a theoretical framework is developed for energy quantization in inorganic semiconductor layers with appreciable surface roughness, as compared to the mean layer thickness, and present experimental evidence of the existence of quantized energy states in spin-cast layers of zinc oxide (ZnO). As-grown ZnO layers are found to be remarkably continuous and uniform with controllable thicknesses in the range 2-24 nm and exhibit a characteristic widening of the energy bandgap with reducing thickness in agreement with theoretical predictions. Using sequentially spin-cast layers of ZnO as the bulk semiconductor and quantum well materials, and gallium oxide or organic self-assembled monolayers as the barrier materials, two terminal electronic devices are demonstrated, the current-voltage characteristics of which resemble closely those of double-barrier resonant-tunneling diodes. As-fabricated all-oxide/hybrid devices exhibit a characteristic negative-differential conductance region with peak-to-valley ratios in the range 2-7.

  1. Study of the tunnelling initiated leakage current through the carbon nanotube embedded gate oxide in metal oxide semiconductor structures.

    Science.gov (United States)

    Chakraborty, Gargi; Sarkar, C K; Lu, X B; Dai, J Y

    2008-06-25

    The tunnelling currents through the gate dielectric partly embedded with semiconducting single-wall carbon nanotubes in a silicon metal-oxide-semiconductor (MOS) structure have been investigated. The application of the gate voltage to such an MOS device results in the band bending at the interface of the partly embedded oxide dielectric and the surface of the silicon, initiating tunnelling through the gate oxide responsible for the gate leakage current whenever the thickness of the oxide is scaled. A model for silicon MOS structures, where carbon nanotubes are confined in a narrow layer embedded in the gate dielectric, is proposed to investigate the direct and the Fowler-Nordheim (FN) tunnelling currents of such systems. The idea of embedding such elements in the gate oxide is to assess the possibility for charge storage for memory device applications. Comparing the FN tunnelling onset voltage between the pure gate oxide and the gate oxide embedded with carbon nanotubes, it is found that the onset voltage decreases with the introduction of the nanotubes. The direct tunnelling current has also been studied at very low gate bias, for the thin oxide MOS structure which plays an important role in scaling down the MOS transistors. The FN tunnelling current has also been studied with varying nanotube diameter.

  2. Investigation of structural and electrical properties on substrate material for high frequency metal-oxide-semiconductor (MOS) devices

    Science.gov (United States)

    Kumar, M.; Yang, Sung-Hyun; Janardhan Reddy, K.; JagadeeshChandra, S. V.

    2017-04-01

    Hafnium oxide (HfO2) thin films were grown on cleaned P-type Ge and Si substrates by using atomic layer deposition technique (ALD) with thickness of 8 nm. The composition analysis of as-deposited and annealed HfO2 films was characterized by XPS, further electrical measurements; we fabricated the metal-oxide-semiconductor (MOS) devices with Pt electrode. Post deposition annealing in O2 ambient at 500 °C for 30 min was carried out on both Ge and Si devices. Capacitance-voltage (C-V) and conductance-voltage (G-V) curves measured at 1 MHz. The Ge MOS devices showed improved interfacial and electrical properties, high dielectric constant (~19), smaller EOT value (0.7 nm), and smaller D it value as Si MOS devices. The C-V curves shown significantly high accumulation capacitance values from Ge devices, relatively when compare with the Si MOS devices before and after annealing. It could be due to the presence of very thin interfacial layer at HfO2/Ge stacks than HfO2/Si stacks conformed by the HRTEM images. Besides, from current-voltage (I-V) curves of the Ge devices exhibited similar leakage current as Si devices. Therefore, Ge might be a reliable substrate material for structural, electrical and high frequency applications.

  3. A Customized Metal Oxide Semiconductor-Based Gas Sensor Array for Onion Quality Evaluation: System Development and Characterization

    Directory of Open Access Journals (Sweden)

    Tharun Konduru

    2015-01-01

    Full Text Available A gas sensor array, consisting of seven Metal Oxide Semiconductor (MOS sensors that are sensitive to a wide range of organic volatile compounds was developed to detect rotten onions during storage. These MOS sensors were enclosed in a specially designed Teflon chamber equipped with a gas delivery system to pump volatiles from the onion samples into the chamber. The electronic circuit mainly comprised a microcontroller, non-volatile memory chip, and trickle-charge real time clock chip, serial communication chip, and parallel LCD panel. User preferences are communicated with the on-board microcontroller through a graphical user interface developed using LabVIEW. The developed gas sensor array was characterized and the discrimination potential was tested by exposing it to three different concentrations of acetone (ketone, acetonitrile (nitrile, ethyl acetate (ester, and ethanol (alcohol. The gas sensor array could differentiate the four chemicals of same concentrations and different concentrations within the chemical with significant difference. Experiment results also showed that the system was able to discriminate two concentrations (196 and 1964 ppm of methlypropyl sulfide and two concentrations (145 and 1452 ppm of 2-nonanone, two key volatile compounds emitted by rotten onions. As a proof of concept, the gas sensor array was able to achieve 89% correct classification of sour skin infected onions. The customized low-cost gas sensor array could be a useful tool to detect onion postharvest diseases in storage.

  4. Effect of Water Vapor and Surface Morphology on the Low Temperature Response of Metal Oxide Semiconductor Gas Sensors

    Science.gov (United States)

    Maier, Konrad; Helwig, Andreas; Müller, Gerhard; Hille, Pascal; Eickhoff, Martin

    2015-01-01

    In this work the low temperature response of metal oxide semiconductor gas sensors is analyzed. Important characteristics of this low-temperature response are a pronounced selectivity to acid- and base-forming gases and a large disparity of response and recovery time constants which often leads to an integrator-type of gas response. We show that this kind of sensor performance is related to the trend of semiconductor gas sensors to adsorb water vapor in multi-layer form and that this ability is sensitively influenced by the surface morphology. In particular we show that surface roughness in the nanometer range enhances desorption of water from multi-layer adsorbates, enabling them to respond more swiftly to changes in the ambient humidity. Further experiments reveal that reactive gases, such as NO2 and NH3, which are easily absorbed in the water adsorbate layers, are more easily exchanged across the liquid/air interface when the humidity in the ambient air is high. PMID:28793583

  5. Ultrasonic fingerprint sensor using a piezoelectric micromachined ultrasonic transducer array integrated with complementary metal oxide semiconductor electronics

    Energy Technology Data Exchange (ETDEWEB)

    Lu, Y.; Fung, S.; Wang, Q.; Horsley, D. A. [Berkeley Sensor and Actuator Center, University of California, Davis, 1 Shields Avenue, Davis, California 95616 (United States); Tang, H.; Boser, B. E. [Berkeley Sensor and Actuator Center, University of California, Berkeley, California 94720 (United States); Tsai, J. M.; Daneman, M. [InvenSense, Inc., 1745 Technology Drive, San Jose, California 95110 (United States)

    2015-06-29

    This paper presents an ultrasonic fingerprint sensor based on a 24 × 8 array of 22 MHz piezoelectric micromachined ultrasonic transducers (PMUTs) with 100 μm pitch, fully integrated with 180 nm complementary metal oxide semiconductor (CMOS) circuitry through eutectic wafer bonding. Each PMUT is directly bonded to a dedicated CMOS receive amplifier, minimizing electrical parasitics and eliminating the need for through-silicon vias. The array frequency response and vibration mode-shape were characterized using laser Doppler vibrometry and verified via finite element method simulation. The array's acoustic output was measured using a hydrophone to be ∼14 kPa with a 28 V input, in reasonable agreement with predication from analytical calculation. Pulse-echo imaging of a 1D steel grating is demonstrated using electronic scanning of a 20 × 8 sub-array, resulting in 300 mV maximum received amplitude and 5:1 contrast ratio. Because the small size of this array limits the maximum image size, mechanical scanning was used to image a 2D polydimethylsiloxane fingerprint phantom (10 mm × 8 mm) at a 1.2 mm distance from the array.

  6. Evidence of the ion's impact position effect on SEB in N-channel power MOSFETs

    International Nuclear Information System (INIS)

    Dachs, C.; Roubaud, F.; Palau, J.M.; Bruguier, G.; Gasiot, J.

    1994-01-01

    Triggering of Single Event Burnout (SEB) in Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs) is studied by means of experiments and simulations based on real structures. Conditions for destructive and nondestructive events are investigated through current duration observations. The effect of the ion's impact position is experimentally pointed out. Finally, further investigation with 2D MEDICI simulations show that the different regions of the MOSFET cell indeed exhibit different sensitivity with respect to burnout triggering

  7. Practical Use of Metal Oxide Semiconductor Gas Sensors for Measuring Nitrogen Dioxide and Ozone in Urban Environments.

    Science.gov (United States)

    Peterson, Philip J D; Aujla, Amrita; Grant, Kirsty H; Brundle, Alex G; Thompson, Martin R; Vande Hey, Josh; Leigh, Roland J

    2017-07-19

    The potential of inexpensive Metal Oxide Semiconductor (MOS) gas sensors to be used for urban air quality monitoring has been the topic of increasing interest in the last decade. This paper discusses some of the lessons of three years of experience working with such sensors on a novel instrument platform (Small Open General purpose Sensor (SOGS)) in the measurement of atmospheric nitrogen dioxide and ozone concentrations. Analytic methods for increasing long-term accuracy of measurements are discussed, which permit nitrogen dioxide measurements with 95% confidence intervals of 20.0 μ g m - 3 and ozone precision of 26.8 μ g m - 3 , for measurements over a period one month away from calibration, averaged over 18 months of such calibrations. Beyond four months from calibration, sensor drift becomes significant, and accuracy is significantly reduced. Successful calibration schemes are discussed with the use of controlled artificial atmospheres complementing deployment on a reference weather station exposed to the elements. Manufacturing variation in the attributes of individual sensors are examined, an experiment possible due to the instrument being equipped with pairs of sensors of the same kind. Good repeatability (better than 0.7 correlation) between individual sensor elements is shown. The results from sensors that used fans to push air past an internal sensor element are compared with mounting the sensors on the outside of the enclosure, the latter design increasing effective integration time to more than a day. Finally, possible paths forward are suggested for improving the reliability of this promising sensor technology for measuring pollution in an urban environment.

  8. Practical Use of Metal Oxide Semiconductor Gas Sensors for Measuring Nitrogen Dioxide and Ozone in Urban Environments

    Directory of Open Access Journals (Sweden)

    Philip J. D. Peterson

    2017-07-01

    Full Text Available The potential of inexpensive Metal Oxide Semiconductor (MOS gas sensors to be used for urban air quality monitoring has been the topic of increasing interest in the last decade. This paper discusses some of the lessons of three years of experience working with such sensors on a novel instrument platform (Small Open General purpose Sensor (SOGS in the measurement of atmospheric nitrogen dioxide and ozone concentrations. Analytic methods for increasing long-term accuracy of measurements are discussed, which permit nitrogen dioxide measurements with 95% confidence intervals of 20.0 μ g m − 3 and ozone precision of 26.8 μ g m − 3 , for measurements over a period one month away from calibration, averaged over 18 months of such calibrations. Beyond four months from calibration, sensor drift becomes significant, and accuracy is significantly reduced. Successful calibration schemes are discussed with the use of controlled artificial atmospheres complementing deployment on a reference weather station exposed to the elements. Manufacturing variation in the attributes of individual sensors are examined, an experiment possible due to the instrument being equipped with pairs of sensors of the same kind. Good repeatability (better than 0.7 correlation between individual sensor elements is shown. The results from sensors that used fans to push air past an internal sensor element are compared with mounting the sensors on the outside of the enclosure, the latter design increasing effective integration time to more than a day. Finally, possible paths forward are suggested for improving the reliability of this promising sensor technology for measuring pollution in an urban environment.

  9. Interface traps contribution on transport mechanisms under illumination in metal-oxide-semiconductor structures based on silicon nanocrystals

    Science.gov (United States)

    Chatbouri, S.; Troudi, M.; Kalboussi, A.; Souifi, A.

    2018-02-01

    The transport phenomena in metal-oxide-semiconductor (MOS) structures having silicon nanocrystals (Si-NCs) inside the dielectric layer have been investigated, in dark condition and under visible illumination. At first, using deep-level transient spectroscopy (DLTS), we find the presence of series electron traps having very close energy levels (comprised between 0.28 and 0.45 eV) for ours devices (with/without Si-NCs). And a single peak appears at low temperature only for MOS with Si-NCs related to Si-NCs DLTS response. In dark condition, the conduction mechanism is dominated by the thermionic fast emission/capture of charge carriers from the highly doped polysilicon layer to Si-substrate through interface trap states for MOS without Si-NCs. The tunneling of charge carriers from highly poly-Si to Si substrate trough the trapping/detrapping mechanism in the Si-NCs, at low temperature, contributed to the conduction mechanism for MOS with Si-NCs. The light effect on transport mechanisms has been investigated using current-voltage ( I- V), and high frequency capacitance-voltage ( C- V) methods. We have been marked the photoactive trap effect in inversion zone at room temperature in I- V characteristics, which confirm the contribution of photo-generated charge on the transport mechanisms from highly poly-Si to Si substrate trough the photo-trapping/detrapping mechanism in the Si-NCs and interfaces traps levels. These results have been confirmed by an increasing about 10 pF in capacity's values for the C- V characteristics of MOS with Si-NCs, in the inversion region for inverse high voltage applied under photoexcitation at low temperature. These results are helpful to understand the principle of charge transport in dark condition and under illumination, of MOS structures having Si-NCs in the SiO x = 1.5 oxide matrix.

  10. High-Resolution p-Type Metal Oxide Semiconductor Nanowire Array as an Ultrasensitive Sensor for Volatile Organic Compounds.

    Science.gov (United States)

    Cho, Soo-Yeon; Yoo, Hae-Wook; Kim, Ju Ye; Jung, Woo-Bin; Jin, Ming Liang; Kim, Jong-Seon; Jeon, Hwan-Jin; Jung, Hee-Tae

    2016-07-13

    The development of high-performance volatile organic compound (VOC) sensor based on a p-type metal oxide semiconductor (MOS) is one of the important topics in gas sensor research because of its unique sensing characteristics, namely, rapid recovery kinetics, low temperature dependence, high humidity or thermal stability, and high potential for p-n junction applications. Despite intensive efforts made in this area, the applications of such sensors are hindered because of drawbacks related to the low sensitivity and slow response or long recovery time of p-type MOSs. In this study, the VOC sensing performance of a p-type MOS was significantly enhanced by forming a patterned p-type polycrystalline MOS with an ultrathin, high-aspect-ratio (∼25) structure (∼14 nm thickness) composed of ultrasmall grains (∼5 nm size). A high-resolution polycrystalline p-type MOS nanowire array with a grain size of ∼5 nm was fabricated by secondary sputtering via Ar(+) bombardment. Various p-type nanowire arrays of CuO, NiO, and Cr2O3 were easily fabricated by simply changing the sputtering material. The VOC sensor thus fabricated exhibited higher sensitivity (ΔR/Ra = 30 at 1 ppm hexane using NiO channels), as well as faster response or shorter recovery time (∼30 s) than that of previously reported p-type MOS sensors. This result is attributed to the high resolution and small grain size of p-type MOSs, which lead to overlap of fully charged zones; as a result, electrical properties are predominantly determined by surface states. Our new approach may be used as a route for producing high-resolution MOSs with particle sizes of ∼5 nm within a highly ordered, tall nanowire array structure.

  11. Electrical analysis of high dielectric constant insulator and metal gate metal oxide semiconductor capacitors on flexible bulk mono-crystalline silicon

    KAUST Repository

    Ghoneim, Mohamed T.

    2015-06-01

    We report on the electrical study of high dielectric constant insulator and metal gate metal oxide semiconductor capacitors (MOSCAPs) on a flexible ultra-thin (25 μm) silicon fabric which is peeled off using a CMOS compatible process from a standard bulk mono-crystalline silicon substrate. A lifetime projection is extracted using statistical analysis of the ramping voltage (Vramp) breakdown and time dependent dielectric breakdown data. The obtained flexible MOSCAPs operational voltages satisfying the 10 years lifetime benchmark are compared to those of the control MOSCAPs, which are not peeled off from the silicon wafer. © 2014 IEEE.

  12. Solution-processed ambipolar organic field-effect transistors and inverters

    NARCIS (Netherlands)

    Meijer, E.J.; Leeuw, D.M. de; Setayesh, S.; Veenendaal, E. van; Huisman, B.H.; Blom, P.W.M.; Hummelen, J.C.; Scherf, U.; Klapwijk, T.M.

    2003-01-01

    There is ample evidence that organic field-effect transistors have reached a stage where they can be industrialized, analogous to standard metal oxide semiconductor (MOS) transistors. Monocrystalline silicon technology is largely based on complementary MOS (CMOS) structures that use both n-type and

  13. Performance enhancement in uniaxially tensile stressed GeSn n-channel fin tunneling field-effect transistor: Impact of stress direction

    Science.gov (United States)

    Wang, Hongjuan; Han, Genquan; Jiang, Xiangwei; Liu, Yan; Zhang, Chunfu; Zhang, Jincheng; Hao, Yue

    2017-04-01

    In this work, the boosting effect on the performance of GeSn n-channel fin tunneling FET (nFinTFET) enabled by uniaxial tensile stress is investigated theoretically. As the fin rotates within the (001) plane, the uniaxial tensile stress is always along its direction. The electrical characteristics of tensile-stressed GeSn nFinTFETs with point and line tunneling modes are computed utilizing the technology computer aided design (TCAD) simulator in which the dynamic nonlocal band-to-band tunneling (BTBT) algorithm is employed. In comparison with the relaxed devices, tensile-stressed GeSn nFinTFETs achieve a substantial enhancement in band-to-band tunneling generation rate (G BTBT) and on-state current I ON owing to the reduced bandgap E G induced by the tensile stress. Performance improvement of GeSn nFinTFETs induced by tensile stress demonstrates a strong dependence on channel direction and tunneling modes. Under the same magnitude of stress, line-nFinTFETs obtain a more pronounced I ON enhancement over the transistors with point tunneling mode.

  14. Temperature Dependent Electrical Transport in Al/Poly(4-vinyl phenol/p-GaAs Metal-Oxide-Semiconductor by Sol-Gel Spin Coating Method

    Directory of Open Access Journals (Sweden)

    Şadan Özden

    2016-01-01

    Full Text Available Deposition of poly(4-vinyl phenol insulator layer is carried out by applying the spin coating technique onto p-type GaAs substrate so as to create Al/poly(4-vinyl phenol/p-GaAs metal-oxide-semiconductor (MOS structure. Temperature was set to 80–320 K while the current-voltage (I-V characteristics of the structure were examined in the study. Ideality factor (n and barrier height (ϕb values found in the experiment ranged from 3.13 and 0.616 eV (320 K to 11.56 and 0.147 eV (80 K. Comparing the thermionic field emission theory and thermionic emission theory, the temperature dependent ideality factor behavior displayed that thermionic field emission theory is more valid than the latter. The calculated tunneling energy was 96 meV.

  15. Structural and electrical characteristics of high-k/metal gate metal oxide semiconductor capacitors fabricated on flexible, semi-transparent silicon (100) fabric

    KAUST Repository

    Rojas, Jhonathan Prieto

    2013-02-12

    In pursuit of flexible computers with high performance devices, we demonstrate a generic process to fabricate 10 000 metal-oxide-semiconductor capacitors (MOSCAPs) with semiconductor industry\\'s most advanced high-k/metal gate stacks on widely used, inexpensive bulk silicon (100) wafers and then using a combination of iso-/anisotropic etching to release the top portion of the silicon with the already fabricated devices as a mechanically flexible (bending curvature of 133 m−1), optically semi-transparent silicon fabric (1.5 cm × 3 cm × 25 μm). The electrical characteristics show 3.7 nm effective oxide thickness, −0.2 V flat band voltage, and no hysteresis from the fabricated MOSCAPs.

  16. Electrical hysteresis in p-GaN metal-oxide-semiconductor capacitor with atomic-layer-deposited Al2O3 as gate dielectric

    Science.gov (United States)

    Zhang, Kexiong; Liao, Meiyong; Imura, Masataka; Nabatame, Toshihide; Ohi, Akihiko; Sumiya, Masatomo; Koide, Yasuo; Sang, Liwen

    2016-12-01

    The electrical hysteresis in current-voltage (I-V) and capacitance-voltage characteristics was observed in an atomic-layer-deposited Al2O3/p-GaN metal-oxide-semiconductor capacitor (PMOSCAP). The absolute minimum leakage currents of the PMOSCAP for forward and backward I-V scans occurred not at 0 V but at -4.4 and +4.4 V, respectively. A negative flat-band voltage shift of 5.5 V was acquired with a capacitance step from +4.4 to +6.1 V during the forward scan. Mg surface accumulation on p-GaN was demonstrated to induce an Mg-Ga-Al-O oxidized layer with a trap density on the order of 1013 cm-2. The electrical hysteresis is attributed to the hole trapping and detrapping process in the traps of the Mg-Ga-Al-O layer via the Poole-Frenkel mechanism.

  17. Memory characteristics of Au nanocrystals embedded in metal-oxide-semiconductor structure by using atomic-layer-deposited Al2O3 as control oxide

    International Nuclear Information System (INIS)

    Wang, C.-C.; Chiou, Y.-K.; Chang, C.-H.; Tseng, J.-Y.; Wu, L.-J.; Chen, C.-Y.; Wu, T.-B.

    2007-01-01

    The nonvolatile memory characteristics of metal-oxide-semiconductor (MOS) structures containing Au nanocrystals in the Al 2 O 3 /SiO 2 matrix were studied. In this work, we have demonstrated that the use of Al 2 O 3 as control oxide prepared by atomic-layer-deposition enhances the erase speed of the MOS capacitors. A giant capacitance-voltage hysteresis loop and a very short erase time which is lower than 1 ms can be obtained. Compared with the conventional floating-gate electrically erasable programmable read-only memories, the erase speed was promoted drastically. In addition, very low leakage current and large turn-around voltage resulting from electrons or holes stored in the Au nanocrystals were found in the current-voltage relation of the MOS capacitors

  18. Study of Interface Charge Densities for ZrO2 and HfO2 Based Metal-Oxide-Semiconductor Devices

    Directory of Open Access Journals (Sweden)

    N. P. Maity

    2014-01-01

    Full Text Available A thickness-dependent interfacial distribution of oxide charges for thin metal oxide semiconductor (MOS structures using high-k materials ZrO2 and HfO2 has been methodically investigated. The interface charge densities are analyzed using capacitance-voltage (C-V method and also conductance (G-V method. It indicates that, by reducing the effective oxide thickness (EOT, the interface charge densities (Dit increases linearly. For the same EOT, Dit has been found for the materials to be of the order of 1012 cm−2 eV−1 and it is originated to be in good agreement with published fabrication results at p-type doping level of 1×1017 cm−3. Numerical calculations and solutions are performed by MATLAB and device simulation is done by ATLAS.

  19. Characteristics and reliability of metal-oxide-semiconductor transistors with various depths of plasma-induced Si recess structure

    Science.gov (United States)

    Chen, Jone F.; Tsai, Yen-Lin; Chen, Chun-Yen; Hsu, Hao-Tang; Kao, Chia-Yu; Hwang, Hann-Ping

    2018-04-01

    Device characteristics and hot-carrier-induced device degradation of n-channel MOS transistors with an off-state breakdown voltage of approximately 25 V and various Si recess depths introduced by sidewall spacer overetching are investigated. Experimental data show that the depth of the Si recess has small effects on device characteristics. A device with a deeper Si recess has lower substrate current and channel electric field, whereas a greater hot-carrier-induced device degradation and a shorter hot-carrier lifetime are observed. Results of technology computer-aided design simulations suggest that these unexpected observations are related to the severity of plasma damage caused by the sidewall spacer overetching and the difference in topology.

  20. Two Dimensional Modeling of III-V Heterojunction Gate All Around Tunnel Field Effect Transistor

    OpenAIRE

    Manjula Vijh; R.S. Gupta; Sujata Pandey

    2017-01-01

    Tunnel Field Effect Transistor is one of the extensively researched semiconductor devices, which has captured attention over the conventional Metal Oxide Semiconductor Field Effect Transistor. This device, due to its varied advantages, is considered in applications where devices are scaled down to deep sub-micron level. Like MOSFETs, many geometries of TFETs have been studied and analyzed in the past few years. This work, presents a two dimensional analytical model for a III-V Heterojunction ...

  1. InxGa1-xSb Channel p-Metal-Oxide-Semiconductor Field Effect Transistors: Effect of Strain and Heterostructure Design

    Science.gov (United States)

    2011-07-06

    good gate dielectric that will minimize the leakage current while having a low density of interface states (Dit), is direly needed for the antimonides ...dielectric, followed by evaporation and patterning of the aluminum gate material. This was followed by ion implanta- tion of beryllium, which acts as

  2. Co-integration of nano-scale vertical- and horizontal-channel metal-oxide-semiconductor field-effect transistors for low power CMOS technology.

    Science.gov (United States)

    Sun, Min-Chul; Kim, Garam; Kim, Sang Wan; Kim, Hyun Woo; Kim, Hyungjin; Lee, Jong-Ho; Shin, Hyungcheol; Park, Byung-Gook

    2012-07-01

    In order to extend the conventional low power Si CMOS technology beyond the 20-nm node without SOI substrates, we propose a novel co-integration scheme to build horizontal- and vertical-channel MOSFETs together and verify the idea using TCAD simulations. From the fabrication viewpoint, it is highlighted that this scheme provides additional vertical devices with good scalability by adding a few steps to the conventional CMOS process flow for fin formation. In addition, the benefits of the co-integrated vertical devices are investigated using a TCAD device simulation. From this study, it is confirmed that the vertical device shows improved off-current control and a larger drive current when the body dimension is less than 20 nm, due to the electric field coupling effect at the double-gated channel. Finally, the benefits from the circuit design viewpoint, such as the larger midpoint gain and beta and lower power consumption, are confirmed by the mixed-mode circuit simulation study.

  3. Characterizations of HfxMoyNz Alloys as Gate Electrodes for n- and p-Channel Metal Oxide Semiconductor Field Effect Transistors

    Science.gov (United States)

    Lai, Chao Sung; Kan Peng, Hsing; Huang, Chin Wei; Fan, Kung Ming; Fang, Yu Ching; Hsu, Li; Wang, Hui Chun; Lee, Chung Yuan; Jyh Lin, Shian

    2008-04-01

    In this article, the work functions (Φm) of hafnium-molybdenum (HfxMoy) alloys were modified using nitrogen in dc reactive cosputtering for the first time. The HfxMoyNz alloys show low resistivity and excellent thermal stability up to 900 °C. In addition, the work functions (Φm) of the HfxMoyNz alloys were tuned from the conduction band (4.17 eV) to the valence band (5.16 eV) by increasing the nitrogen flow ratio. From the X-ray diffraction (XRD) data, the MoN(200) peak can be observed for samples with a nitrogen ratio higher than 6%, which was responsible for the work function (Φm) increase in the HfxMoyNz alloys.

  4. Technology breakthroughs in high performance metal-oxide-semiconductor devices for ultra-high density, low power non-volatile memory applications

    Science.gov (United States)

    Hong, Augustin Jinwoo

    Non-volatile memory devices have attracted much attention because data can be retained without power consumption more than a decade. Therefore, non-volatile memory devices are essential to mobile electronic applications. Among state of the art non-volatile memory devices, NAND flash memory has earned the highest attention because of its ultra-high scalability and therefore its ultra-high storage capacity. However, human desire as well as market competition requires not only larger storage capacity but also lower power consumption for longer battery life time. One way to meet this human desire and extend the benefits of NAND flash memory is finding out new materials for storage layer inside the flash memory, which is called floating gate in the state of the art flash memory device. In this dissertation, we study new materials for the floating gate that can lower down the power consumption and increase the storage capacity at the same time. To this end, we employ various materials such as metal nanodot, metal thin film and graphene incorporating complementary-metal-oxide-semiconductor (CMOS) compatible processes. Experimental results show excellent memory effects at relatively low operating voltages. Detailed physics and analysis on experimental results are discussed. These new materials for data storage can be promising candidates for future non-volatile memory application beyond the state of the art flash technologies.

  5. Real-time, multiplexed electrochemical DNA detection using an active complementary metal-oxide-semiconductor biosensor array with integrated sensor electronics

    Science.gov (United States)

    Levine, Peter M.; Gong, Ping; Levicky, Rastislav; Shepard, Kenneth L.

    2009-01-01

    Optical biosensing based on fluorescence detection has arguably become the standard technique for quantifying extents of hybridization between surface-immobilized probes and fluorophore-labeled analyte targets in DNA microarrays. However, electrochemical detection techniques are emerging which could eliminate the need for physically bulky optical instrumentation, enabling the design of portable devices for point-of-care applications. Unlike fluorescence detection, which can function well using a passive substrate (one without integrated electronics), multiplexed electrochemical detection requires an electronically-active substrate to analyze each array site and benefits from the addition of integrated electronic instrumentation to further reduce platform size and eliminate the electromagnetic interference that can result from bringing non-amplified signals off chip. We report on an active electrochemical biosensor array, constructed with a standard complementary metal-oxide-semiconductor (CMOS) technology, to perform quantitative DNA hybridization detection on chip using targets conjugated with ferrocene redox labels. A 4×4 array of gold working electrodes and integrated potentiostat electronics, consisting of control amplifiers and current-input analog-to-digital converters, on a custom-designed 5×3 mm2 CMOS chip drive redox reactions using cyclic voltammetry, sense DNA binding, and transmit digital data off chip for analysis. We demonstrate multiplexed and specific detection of DNA targets as well as real-time monitoring of hybridization, a task that is difficult, if not impossible, with traditional fluorescence-based microarrays. PMID:19054661

  6. GaAs metal-oxide-semiconductor based non-volatile flash memory devices with InAs quantum dots as charge storage nodes

    International Nuclear Information System (INIS)

    Islam, Sk Masiul; Chowdhury, Sisir; Sarkar, Krishnendu; Nagabhushan, B.; Banerji, P.; Chakraborty, S.; Mukherjee, Rabibrata

    2015-01-01

    Ultra-thin InP passivated GaAs metal-oxide-semiconductor based non-volatile flash memory devices were fabricated using InAs quantum dots (QDs) as charge storing elements by metal organic chemical vapor deposition technique to study the efficacy of the QDs as charge storage elements. The grown QDs were embedded between two high-k dielectric such as HfO 2 and ZrO 2 , which were used for tunneling and control oxide layers, respectively. The size and density of the QDs were found to be 5 nm and 1.8×10 11 cm −2 , respectively. The device with a structure Metal/ZrO 2 /InAs QDs/HfO 2 /GaAs/Metal shows maximum memory window equivalent to 6.87 V. The device also exhibits low leakage current density of the order of 10 −6 A/cm 2 and reasonably good charge retention characteristics. The low value of leakage current in the fabricated memory device is attributed to the Coulomb blockade effect influenced by quantum confinement as well as reduction of interface trap states by ultra-thin InP passivation on GaAs prior to HfO 2 deposition

  7. Determination of bulk and interface density of states in metal oxide semiconductor thin-film transistors by using capacitance-voltage characteristics

    Science.gov (United States)

    Wei, Xixiong; Deng, Wanling; Fang, Jielin; Ma, Xiaoyu; Huang, Junkai

    2017-10-01

    A physical-based straightforward extraction technique for interface and bulk density of states in metal oxide semiconductor thin film transistors (TFTs) is proposed by using the capacitance-voltage (C-V) characteristics. The interface trap density distribution with energy has been extracted from the analysis of capacitance-voltage characteristics. Using the obtained interface state distribution, the bulk trap density has been determined. With this method, for the interface trap density, it is found that deep state density nearing the mid-gap is approximately constant and tail states density increases exponentially with energy; for the bulk trap density, it is a superposition of exponential deep states and exponential tail states. The validity of the extraction is verified by comparisons with the measured current-voltage (I-V) characteristics and the simulation results by the technology computer-aided design (TCAD) model. This extraction method uses non-numerical iteration which is simple, fast and accurate. Therefore, it is very useful for TFT device characterization.

  8. Interfacial and electrical properties of Al2O3/GaN metal-oxide-semiconductor junctions with ultrathin AlN layer

    Science.gov (United States)

    Kim, Hogyoung; Kim, Dong Ha; Choi, Byung Joon

    2017-12-01

    Ultrathin AlN layer deposited by atomic layer deposition (ALD) was employed in Al2O3/GaN metal-oxide-semiconductor (MOS) capacitors, and their interfacial and electrical properties were investigated using X-ray photoelectron spectroscopy (XPS) and current-voltage ( I-V) and capacitance-voltage ( C-V) measurements. XPS analyses revealed that the diffusion of N atoms into Al2O3 and the degradation of Al2O3 film quality were significant for the thickest Al2O3 (10 nm). The sample with a 10-nm-thick Al2O3 layer produced the highest leakage current and trap density. These results may result from the deteriorated interface characteristics near the AlN layer caused by long growth time. Therefore, it is suggested that the Al2O3 thickness (and optimal growth time) is a key factor in Al2O3/AlN/GaN MOS capacitors.

  9. Epitaxial ZnO gate dielectrics deposited by RF sputter for AlGaN/GaN metal-oxide-semiconductor high-electron-mobility transistors

    Science.gov (United States)

    Yoon, Seonno; Lee, Seungmin; Kim, Hyun-Seop; Cha, Ho-Young; Lee, Hi-Deok; Oh, Jungwoo

    2018-01-01

    Radio frequency (RF)-sputtered ZnO gate dielectrics for AlGaN/GaN metal-oxide-semiconductor high-electron-mobility transistors (MOS-HEMTs) were investigated with varying O2/Ar ratios. The ZnO deposited with a low oxygen content of 4.5% showed a high dielectric constant and low interface trap density due to the compensation of oxygen vacancies during the sputtering process. The good capacitance-voltage characteristics of ZnO-on-AlGaN/GaN capacitors resulted from the high crystallinity of oxide at the interface, as investigated by x-ray diffraction and high-resolution transmission electron microscopy. The MOS-HEMTs demonstrated comparable output electrical characteristics with conventional Ni/Au HEMTs but a lower gate leakage current. At a gate voltage of -20 V, the typical gate leakage current for a MOS-HEMT with a gate length of 6 μm and width of 100 μm was found to be as low as 8.2 × 10-7 mA mm-1, which was three orders lower than that of the Ni/Au Schottky gate HEMT. The reduction of the gate leakage current improved the on/off current ratio by three orders of magnitude. These results indicate that RF-sputtered ZnO with a low O2/Ar ratio is a good gate dielectric for high-performance AlGaN/GaN MOS-HEMTs.

  10. Interface States and Trapping Effects in Al2O3- and ZrO2/InAlN/AlN/GaN Metal-Oxide-Semiconductor Heterostructures

    Science.gov (United States)

    Ťapajna, Milan; Kuzmík, Jan; Čičo, Karol; Pogany, Dionyz; Pozzovivo, Gianmauro; Strasser, Gottfried; Abermann, Stephan; Bertagnolli, Emmerich; Carlin, Jean-François; Grandjean, Nicolas; Fröhlich, Karol

    2009-09-01

    We investigate Al2O3- and ZrO2/InAlN/GaN metal-oxide-semiconductor heterostructures (MOS-H) using capacitance-time transients in the temperature range of 25-300 °C. A deep-level transient spectroscopy based analysis revealed the maximum interface state density distributions Dit(E) up to 3×1013 and 1×1013 eV-1 cm-2 for the Al2O3/InAlN and ZrO2/InAlN interface, respectively. The integral densities of interface states correlate well with the trapping-related gate-lag effect in corresponding InAlN/GaN MOS high electron mobility transistors (HEMTs). This explains the strongly reduced lag effect in ZrO2 MOS HEMTs. We assume hole trapping at oxide/InAlN interface to be a dominant effect responsible for the gate-lag effect in InAlN/GaN MOS HEMTs.

  11. Capacitance characteristics of metal-oxide-semiconductor capacitors with a single layer of embedded nickel nanoparticles for the application of nonvolatile memory

    International Nuclear Information System (INIS)

    Wei, Li; Ling, Xu; Wei-Ming, Zhao; Hong-Lin, Ding; Zhong-Yuan, Ma; Jun, Xu; Kun-Ji, Chen

    2010-01-01

    This paper reports that metal-oxide-semiconductor (MOS) capacitors with a single layer of Ni nanoparticles were successfully fabricated by using electron-beam evaporation and rapid thermal annealing for application to nonvolatile memory. Experimental scanning electron microscopy images showed that Ni nanoparticles of about 5 nm in diameter were clearly embedded in the SiO 2 layer on p-type Si (100). Capacitance–voltage measurements of the MOS capacitor show large flat-band voltage shifts of 1.8 V, which indicate the presence of charge storage in the nickel nanoparticles. In addition, the charge-retention characteristics of MOS capacitors with Ni nanoparticles were investigated by using capacitance–time measurements. The results showed that there was a decay of the capacitance embedded with Ni nanoparticles for an electron charge after 10 4 s. But only a slight decay of the capacitance originating from hole charging was observed. The present results indicate that this technique is promising for the efficient formation or insertion of metal nanoparticles inside MOS structures. (condensed matter: electronic structure, electrical, magnetic, and optical properties)

  12. In Situ XPS Chemical Analysis of MnSiO3 Copper Diffusion Barrier Layer Formation and Simultaneous Fabrication of Metal Oxide Semiconductor Electrical Test MOS Structures.

    Science.gov (United States)

    Byrne, Conor; Brennan, Barry; McCoy, Anthony P; Bogan, Justin; Brady, Anita; Hughes, Greg

    2016-02-03

    Copper/SiO2/Si metal-oxide-semiconductor (MOS) devices both with and without a MnSiO3 barrier layer at the Cu/SiO2 interface have been fabricated in an ultrahigh vacuum X-ray photoelectron spectroscopy (XPS) system, which allows interface chemical characterization of the barrier formation process to be directly correlated with electrical testing of barrier layer effectiveness. Capacitance voltage (CV) analysis, before and after tube furnace anneals of the fabricated MOS structures showed that the presence of the MnSiO3 barrier layer significantly improved electric stability of the device structures. Evidence of improved adhesion of the deposited copper layer to the MnSiO3 surface compared to the clean SiO2 surface was apparent both from tape tests and while probing the samples during electrical testing. Secondary ion mass spectroscopy (SIMS) depth profiling measurements of the MOS test structures reveal distinct differences of copper diffusion into the SiO2 dielectric layers following the thermal anneal depending on the presence of the MnSiO3 barrier layer.

  13. Investigation of 'surface donors' in Al2O3/AlGaN/GaN metal-oxide-semiconductor heterostructures: Correlation of electrical, structural, and chemical properties

    Science.gov (United States)

    Ťapajna, M.; Stoklas, R.; Gregušová, D.; Gucmann, F.; Hušeková, K.; Haščík, Š.; Fröhlich, K.; Tóth, L.; Pécz, B.; Brunner, F.; Kuzmík, J.

    2017-12-01

    III-N surface polarization compensating charge referred here to as 'surface donors' (SD) was analyzed in Al2O3/AlGaN/GaN metal-oxide-semiconductor (MOS) heterojunctions using scaled oxide films grown by metal-organic chemical vapor deposition at 600 °C. We systematically investigated impact of HCl pre-treatment prior to oxide deposition and post-deposition annealing (PDA) at 700 °C. SD density was reduced down to 1.9 × 1013 cm-2 by skipping HCl pre-treatment step as compared to 3.3 × 1013 cm-2 for structures with HCl pre-treatment followed by PDA. The nature and origin of SD was then analyzed based on the correlation between electrical, micro-structural, and chemical properties of the Al2O3/GaN interfaces with different SD density (NSD). From the comparison between distributions of interface traps of MOS heterojunction with different NSD, it is demonstrated that SD cannot be attributed to interface trapped charge. Instead, variation in the integrity of the GaOx interlayer confirmed by X-ray photoelectron spectroscopy is well correlated with NSD, indicating SD may be formed by border traps at the Al2O3/GaOx interface.

  14. Influence of CO annealing in metal-oxide-semiconductor capacitors with SiO2 films thermally grown on Si and on SiC

    Science.gov (United States)

    Pitthan, E.; dos Reis, R.; Corrêa, S. A.; Schmeisser, D.; Boudinov, H. I.; Stedile, F. C.

    2016-01-01

    Understanding the influence of SiC reaction with CO, a by-product of SiC thermal oxidation, is a key point to elucidate the origin of electrical defects in SiC metal-oxide-semiconductor (MOS) devices. In this work, the effects on electrical, structural, and chemical properties of SiO2/Si and SiO2/SiC structures submitted to CO annealing were investigated. It was observed that long annealing times resulted in the incorporation of carbon from CO in the Si substrate, followed by deterioration of the SiO2/Si interface, and its crystallization as SiC. Besides, this incorporated carbon remained in the Si surface (previous SiO2/Si region) after removal of the silicon dioxide film by HF etching. In the SiC case, an even more defective surface region was observed due to the CO interaction. All MOS capacitors formed using both semiconductor materials presented higher leakage current and generation of positive effective charge after CO annealings. Such results suggest that the negative fixed charge, typically observed in SiO2/SiC structures, is not originated from the interaction of the CO by-product, formed during SiC oxidation, with the SiO2/SiC interfacial region.

  15. Interfacial and electrical properties of InGaAs metal-oxide-semiconductor capacitor with TiON/TaON multilayer composite gate dielectric

    Science.gov (United States)

    Wang, L. S.; Xu, J. P.; Liu, L.; Lu, H. H.; Lai, P. T.; Tang, W. M.

    2015-03-01

    InGaAs metal-oxide-semiconductor (MOS) capacitors with composite gate dielectric consisting of Ti-based oxynitride (TiON)/Ta-based oxynitride (TaON) multilayer are fabricated by RF sputtering. The interfacial and electrical properties of the TiON/TaON/InGaAs and TaON/TiON/InGaAs MOS structures are investigated and compared. Experimental results show that the former exhibits lower interface-state density (1.0 × 1012 cm-2 eV-1 at midgap), smaller gate leakage current (9.5 × 10-5 A/cm2 at a gate voltage of 2 V), larger equivalent dielectric constant (19.8), and higher reliability under electrical stress than the latter. The involved mechanism lies in the fact that the ultrathin TaON interlayer deposited on the sulfur-passivated InGaAs surface can effectively reduce the defective states and thus unpin the Femi level at the TaON/InGaAs interface, improving the electrical properties of the device.

  16. Optimization of Vertical Double-Diffused Metal-Oxide Semiconductor (VDMOS) Power Transistor Structure for Use in High Frequencies and Medical Devices.

    Science.gov (United States)

    Farhadi, Rozita; Farhadi, Bita

    2014-01-01

    Power transistors, such as the vertical, double-diffused, metal-oxide semiconductor (VDMOS), are used extensively in the amplifier circuits of medical devices. The aim of this research was to construct a VDMOS power transistor with an optimized structure to enhance the operation of medical devices. First, boron was implanted in silicon by implanting unclamped inductive switching (UIS) and a Faraday shield. The Faraday shield was implanted in order to replace the gate-field parasitic capacitor on the entry part of the device. Also, implanting the UIS was used in order to decrease the effect of parasitic bipolar junction transistor (BJT) of the VDMOS power transistor. The research tool used in this study was Silvaco software. By decreasing the transistor entry resistance in the optimized VDMOS structure, power losses and noise at the entry of the transistor were decreased, and, by increasing the breakdown voltage, the lifetime of the VDMOS transistor lifetime was increased, which resulted in increasing drain flow and decreasing Ron. This consequently resulted in enhancing the operation of high-frequency medical devices that use transistors, such as Radio Frequency (RF) and electrocardiograph machines.

  17. Decrease in effective electron mobility in the channel of a metal-oxide-semiconductor transistor as the gate length is decreased

    International Nuclear Information System (INIS)

    Frantsuzov, A. A.; Boyarkina, N. I.; Popov, V. P.

    2008-01-01

    Effective electron mobility μ eff in channels of metal-oxide-semiconductor transistors with a gate length L in the range of 3.8 to 0.34 μm was measured; the transistors were formed on wafers of the silicon-oninsulator type. It was found that μ eff decreases as L is decreased. It is shown that this decrease can be accounted for by the effect of series resistances of the source and drain only if it is assumed that there is a rapid increase in these resistances as the gate voltage is decreased. This assumption is difficult to substantiate. A more realistic model is suggested; this model accounts for the observed decrease in μ eff as L is decreased. The model implies that zones with a mobility lower than that in the middle part of the channel originate at the edges of the gate. An analysis shows that, in this case, the plot of the dependence of 1/μ eff on 1/L should be linear, which is exactly what is observed experimentally. The use of this plot makes it possible to determine both the electron mobility μ 0 in the middle part of the channel and the quantity A that characterizes the zones with lowered mobility at the gate’s edges.

  18. Accuracy of dielectric-dependent hybrid functionals in the prediction of optoelectronic properties of metal oxide semiconductors: a comprehensive comparison with many-body GW and experiments

    Science.gov (United States)

    Gerosa, M.; E Bottani, C.; Di Valentin, C.; Onida, G.; Pacchioni, G.

    2018-01-01

    Understanding the electronic structure of metal oxide semiconductors is crucial to their numerous technological applications, such as photoelectrochemical water splitting and solar cells. The needed experimental and theoretical knowledge goes beyond that of pristine bulk crystals, and must include the effects of surfaces and interfaces, as well as those due to the presence of intrinsic defects (e.g. oxygen vacancies), or dopants for band engineering. In this review, we present an account of the recent efforts in predicting and understanding the optoelectronic properties of oxides using ab initio theoretical methods. In particular, we discuss the performance of recently developed dielectric-dependent hybrid functionals, providing a comparison against the results of many-body GW calculations, including G 0 W 0 as well as more refined approaches, such as quasiparticle self-consistent GW. We summarize results in the recent literature for the band gap, the band level alignment at surfaces, and optical transition energies in defective oxides, including wide gap oxide semiconductors and transition metal oxides. Correlated transition metal oxides are also discussed. For each method, we describe successes and drawbacks, emphasizing the challenges faced by the development of improved theoretical approaches. The theoretical section is preceded by a critical overview of the main experimental techniques needed to characterize the optoelectronic properties of semiconductors, including absorption and reflection spectroscopy, photoemission, and scanning tunneling spectroscopy (STS).

  19. Sustained hole inversion layer in a wide-bandgap metal-oxide semiconductor with enhanced tunnel current.

    Science.gov (United States)

    Shoute, Gem; Afshar, Amir; Muneshwar, Triratna; Cadien, Kenneth; Barlage, Douglas

    2016-02-04

    Wide-bandgap, metal-oxide thin-film transistors have been limited to low-power, n-type electronic applications because of the unipolar nature of these devices. Variations from the n-type field-effect transistor architecture have not been widely investigated as a result of the lack of available p-type wide-bandgap inorganic semiconductors. Here, we present a wide-bandgap metal-oxide n-type semiconductor that is able to sustain a strong p-type inversion layer using a high-dielectric-constant barrier dielectric when sourced with a heterogeneous p-type material. A demonstration of the utility of the inversion layer was also investigated and utilized as the controlling element in a unique tunnelling junction transistor. The resulting electrical performance of this prototype device exhibited among the highest reported current, power and transconductance densities. Further utilization of the p-type inversion layer is critical to unlocking the previously unexplored capability of metal-oxide thin-film transistors, such applications with next-generation display switches, sensors, radio frequency circuits and power converters.

  20. Repeat analysis of intraoral digital imaging performed by undergraduate students using a complementary metal oxide semiconductor sensor: An institutional case study

    Science.gov (United States)

    Rahman, Nur Liyana Abdul; Asri, Amiza Aqiela Ahmad; Othman, Noor Ilyani; Wan Mokhtar, Ilham

    2017-01-01

    Purpose This study was performed to quantify the repeat rate of imaging acquisitions based on different clinical examinations, and to assess the prevalence of error types in intraoral bitewing and periapical imaging using a digital complementary metal-oxide-semiconductor (CMOS) intraoral sensor. Materials and Methods A total of 8,030 intraoral images were retrospectively collected from 3 groups of undergraduate clinical dental students. The type of examination, stage of the procedure, and reasons for repetition were analysed and recorded. The repeat rate was calculated as the total number of repeated images divided by the total number of examinations. The weighted Cohen's kappa for inter- and intra-observer agreement was used after calibration and prior to image analysis. Results The overall repeat rate on intraoral periapical images was 34.4%. A total of 1,978 repeated periapical images were from endodontic assessment, which included working length estimation (WLE), trial gutta-percha (tGP), obturation, and removal of gutta-percha (rGP). In the endodontic imaging, the highest repeat rate was from WLE (51.9%) followed by tGP (48.5%), obturation (42.2%), and rGP (35.6%). In bitewing images, the repeat rate was 15.1% and poor angulation was identified as the most common cause of error. A substantial level of intra- and interobserver agreement was achieved. Conclusion The repeat rates in this study were relatively high, especially for certain clinical procedures, warranting training in optimization techniques and radiation protection. Repeat analysis should be performed from time to time to enhance quality assurance and hence deliver high-quality health services to patients. PMID:29279822

  1. Electroluminescence color tuning between green and red from metal-oxide-semiconductor devices fabricated by spin-coating of rare-earth (terbium + europium) organic compounds on silicon

    Science.gov (United States)

    Matsuda, Toshihiro; Hattori, Fumihiro; Iwata, Hideyuki; Ohzone, Takashi

    2018-04-01

    Color tunable electroluminescence (EL) from metal-oxide-semiconductor devices with the rare-earth elements Tb and Eu is reported. Organic compound liquid sources of (Tb + Ba) and Eu with various Eu/Tb ratios from 0.001 to 0.4 were spin-coated on an n+-Si substrate and annealed to form an oxide insulator layer. The EL spectra had only peaks corresponding to the intrashell Tb3+/Eu3+ transitions in the spectral range from green to red, and the intensity ratio of the peaks was appropriately tuned using the appropriate Eu/Tb ratios in liquid sources. Consequently, the EL emission colors linearly changed from yellowish green to yellowish orange and eventually to reddish orange on the CIE chromaticity diagram. The gate current +I G current also affected the EL colors for the medium-Eu/Tb-ratio device. The structure of the surface insulator films analyzed by cross-sectional transmission electron microscopy (TEM), X-ray diffraction (XRD) analysis, and X-ray photoelectron spectroscopy (XPS) has four layers, namely, (Tb4O7 + Eu2O3), [Tb4O7 + Eu2O3 + (Tb/Eu/Ba)SiO x ], (Tb/Eu/Ba)SiO x , and SiO x -rich oxide. The EL mechanism proposed is that electrons injected from the Si substrate into the SiO x -rich oxide and Tb/Eu/Ba-silicate layers become hot electrons accelerated in a high electric field, and then these hot electrons excite Tb3+ and Eu3+ ions in the Tb4O7/Eu2O3 layers resulting in EL emission from Tb3+ and Eu3+ intrashell transitions.

  2. High-quality III-V semiconductor MBE growth on Ge/Si virtual substrates for metal-oxide-semiconductor device fabrication

    Science.gov (United States)

    Choi, Donghun; Harris, James S.; Kim, Eunji; McIntyre, Paul C.; Cagnon, Joel; Stemmer, Susanne

    2009-03-01

    We describe the molecular-beam epitaxial (MBE) growth and fabrication of III-V metal-oxide-semiconductor (MOS) devices on Ge/Si virtual substrates. We show that high-temperature in-situ H 2 annealing in the chemical-vapor deposition system changes the Ge surface configuration and produces a surface with predominantly double-step-layer conditions, which is crucial for the growth of single-domain GaAs. In addition, the surface morphology of III-V on Ge/Si improved significantly with an annealing treatment of the Ge surface carried out under high arsenic background pressure in the MBE chamber. This facilitates uniform As-monolayer formation on the entire Ge surface. Low-temperature migration-enhanced epitaxy (MEE) and low-temperature conventional GaAs growth not only enhance the growth of single-domain GaAs without Ge outdiffusion but also produce a sufficiently smooth surface for high-k dielectric deposition, achieving low leakage current. A 300-nm-thick GaAs buffer layer was grown, followed by a 10 nm growth of In 0.2Ga 0.8As high-mobility channel layer. A 7-8-nm-thick Al 2O 3 layer was deposited ex-situ by atomic-layer deposition (ALD). We verify the quality of III-V growth using transmission electron microscopy (TEM), X-ray diffraction (XRD), secondary ion mass spectrometry (SIMS) and photoluminescence (PL) measurement. The C-V characteristics show unpinning of the Fermi level, which is a necessary condition for gate voltage control of the drain current. This work suggests this materials combination is a promising candidate for the realization of advanced, nonclassical complementary-MOS and optoelectronic devices on Si substrates.

  3. Transport properties of SiO2/AlInN/AlN/GaN metal-oxide-semiconductor high electron mobility transistors on SiC substrate

    Science.gov (United States)

    Lachab, M.; Sultana, M.; Fareed, Q.; Husna, F.; Adivarahan, V.; Khan, A.

    2014-04-01

    Unpassivated SiO2/AlInN/AlN/GaN metal-oxide-semiconductor high electron mobility transistors (MOSHEMTs) exhibiting a thin barrier layer are investigated with a particular focus on their dc characteristics dependence on the gate length. The epiwafer exhibits a sheet resistance of ˜250 Ω/□ and a channel charge density of 7.4 × 1012 cm-2 deduced from the 1 MHz capacitance-voltage curves. The results indicate that the thickness of the AlInN barrier can be reduced below 5 nm without degradation of the insulated gate devices performance. For transistors with gate lengths (LG) between 1.8 and 2.0 µm, dc drain saturation currents densities as high as 1.8 A mm-1 are achieved at +4 V gate-source bias (VGS) with very low reverse gate leakage currents. The electron zero-bias drift mobility was determined to be 1670 cm2 V-1 s-1 from the low-field channel conductance measurements. On the other side, using an analytical model it is found that the maximum output current density at VGS = 0 V can be enhanced by ˜23% when LG is scaled from 1.8 µm down to 100 nm. With further improvement of the quality of the gate insulating oxide layer and the implementation of surface passivation, both with the aim of suppressing the observed current collapse, the presented results suggest that these MOSHEMTs could become very attractive for the realization of high-power electronics.

  4. Effect of H and OH desorption and diffusion on electronic structure in amorphous In-Ga-Zn-O metal-oxide-semiconductor diodes with various gate insulators

    Science.gov (United States)

    Hino, Aya; Morita, Shinya; Yasuno, Satoshi; Kishi, Tomoya; Hayashi, Kazushi; Kugimiya, Toshihiro

    2012-12-01

    Metal-oxide-semiconductor (MOS) diodes with various gate insulators (G/Is) were characterized by capacitance-voltage characteristics and isothermal capacitance transient spectroscopy (ICTS) to evaluate the effect of H and OH desorption and diffusion on the electronic structures in amorphous In-Ga-Zn-O (a-IGZO) thin films. The density and the distribution of the space charge were found to be varied depending on the nature of the G/I. In the case of thermally grown SiO2 (thermal SiO2) G/Is, a high space-charge region was observed near the a-IGZO and G/I interface. After thermal annealing, the space-charge density in the deeper region of the film decreased, whereas remained unchanged near the interface region. The ICTS spectra obtained from the MOS diodes with the thermal SiO2 G/Is consisted of two broad peaks at around 5 × 10-4 and 3 × 10-2 s before annealing, while one broad peak was observed at around 1 × 10-4 s at the interface and at around 1 × 10-3 s in the bulk after annealing. Further, the trap density was considerably high near the interface. In contrast, the space-charge density was high throughout the bulk region of the MOS diode when the G/I was deposited by chemical vapor deposition (CVD). The ICTS spectra from the MOS diodes with the CVD G/Is revealed the existence of continuously distributed trap states, suggesting formations of high-density tail states below the conduction band minimum. According to secondary ion mass spectroscopy analyses, desorption and outdiffusion of H and OH were clearly observed in the CVD G/I sample. These phenomena could introduce structural fluctuations in the a-IGZO films, resulting in the formation of the conduction band tail states. Thin-film transistors (TFTs) with the same gate structure as the MOS diodes were fabricated to correlate the electronic properties with the TFT performance, and it was found that TFTs with the CVD G/I showed a reduced saturation mobility. These results indicate that the electronic structures

  5. Physical and electrical characteristics of AlGaN/GaN metal-oxide-semiconductor high-electron-mobility transistors with rare earth Er2O3 as a gate dielectric

    International Nuclear Information System (INIS)

    Lin, Ray-Ming; Chu, Fu-Chuan; Das, Atanu; Liao, Sheng-Yu; Chou, Shu-Tsun; Chang, Liann-Be

    2013-01-01

    In this study, the rare earth erbium oxide (Er 2 O 3 ) was deposited using an electron beam onto an AlGaN/GaN heterostructure to fabricate metal-oxide-semiconductor high-electron-mobility transistors (MOS–HEMTs) that exhibited device performance superior to that of a conventional HEMT. Under similar bias conditions, the gate leakage currents of these MOS–HEMT devices were four orders of magnitude lower than those of conventional Schottky gate HEMTs. The measured sub-threshold swing (SS) and the effective trap state density (N t ) of the MOS–HEMT were 125 mV/decade and 4.3 × 10 12 cm −2 , respectively. The dielectric constant of the Er 2 O 3 layer in this study was 14, as determined through capacitance–voltage measurements. In addition, the gate–source reverse breakdown voltage increased from –166 V for the conventional HEMT to –196 V for the Er 2 O 3 MOS–HEMT. - Highlights: ► GaN/AlGaN/Er 2 O 3 metal-oxide semiconductor high electron mobility transistor ► Physical and electrical characteristics are presented. ► Electron beam evaporated Er 2 O 3 with excellent surface roughness ► Device exhibits reduced gate leakage current and improved I ON /I OFF ratio

  6. Manipulating Conduction in Metal Oxide Semiconductors: Mechanism Investigation and Conductance Tuning in Doped Fe2O3 Hematite and Metal/Ga2O3/Metal Heterostructure

    Science.gov (United States)

    Zhao, Bo

    This study aims at understanding the fundamental mechanisms of conduction in several metal oxide semiconductors, namely alpha-Fe2O 3 and beta-Ga2O3, and how it could be tuned to desired values/states to enable a wide range of application. In the first effort, by adding Ti dopant, we successfully turned Fe2O3 from insulating to conductive by fabricated compositionally and structurally well-defined epitaxial alpha-(TixFe1-x)2 O3(0001) films for x ≤ 0.09. All films were grown by oxygen plasma assisted molecular beam epitaxy on Al2O3(0001) sapphire substrate with a buffer layer of Cr2O3 to relax the strain from lattice mismatch. Van der Pauw resistivity and Hall effect measurements reveal carrier concentrations between 1019 and 1020 cm-3 at room temperature and mobilities in the range of 0.1 to 0.6 cm2/V˙s. Such low mobility, unlike conventional band-conduction semiconductor, was attributed to hopping mechanism due to strong electron-phonon interaction in the lattice. More interestingly, conduction mechanism transitions from small-polaron hopping at higher temperatures to variable range hopping at lower temperatures with a transition temperature between 180 to 140 K. Consequently, by adding Ti dopant, conductive Fe 2O3 hematite thin films were achieved with a well-understood conducting mechanism that could guide further device application such as spin transistor and water splitting. In the case of Ga2O3, while having a band gap as high as 5 eV, they are usually conductive for commercially available samples due to unintentional Si doping. However, we discovered the conductance could be repeatedly switched between high resistance state and low resistance state when made into metal/Ga2O3 /metal heterostructure. However, to obtain well controlled switching process with consistent switching voltages and resistances, understanding switching mechanism is the key. In this study, we fabricated resistive switching devices utilizing a Ni/Ga2O3/Ir heterostructure. Bipolar

  7. High performance Si nanowire field-effect-transistors based on a CMOS inverter with tunable threshold voltage.

    Science.gov (United States)

    Van, Ngoc Huynh; Lee, Jae-Hyun; Sohn, Jung Inn; Cha, Seung Nam; Whang, Dongmok; Kim, Jong Min; Kang, Dae Joon

    2014-05-21

    We successfully fabricated nanowire-based complementary metal-oxide semiconductor (NWCMOS) inverter devices by utilizing n- and p-type Si nanowire field-effect-transistors (NWFETs) via a low-temperature fabrication processing technique. We demonstrate that NWCMOS inverter devices can be operated at less than 1 V, a significantly lower voltage than that of typical thin-film based complementary metal-oxide semiconductor (CMOS) inverter devices. This low-voltage operation was accomplished by controlling the threshold voltage of the n-type Si NWFETs through effective management of the nanowire (NW) doping concentration, while realizing high voltage gain (>10) and ultra-low static power dissipation (≤3 pW) for high-performance digital inverter devices. This result offers a viable means of fabricating high-performance, low-operation voltage, and high-density digital logic circuits using a low-temperature fabrication processing technique suitable for next-generation flexible electronics.

  8. Silicon nanotube field effect transistor with core-shell gate stacks for enhanced high-performance operation and area scaling benefits

    KAUST Repository

    Fahad, Hossain M.

    2011-10-12

    We introduce the concept of a silicon nanotube field effect transistor whose unique core-shell gate stacks help achieve full volume inversion by giving a surge in minority carrier concentration in the near vicinity of the ultrathin channel and at the same time rapid roll-off at the source and drain junctions constituting velocity saturation-induced higher drive current-enhanced high performance per device with efficient real estate consumption. The core-shell gate stacks also provide superior short channel effects control than classical planar metal oxide semiconductor field effect transistor (MOSFET) and gate-all-around nanowire FET. The proposed device offers the true potential to be an ideal blend for quantum ballistic transport study of device property control by bottom-up approach and high-density integration compatibility using top-down state-of-the-art complementary metal oxide semiconductor flow. © 2011 American Chemical Society.

  9. Improved linearity and reliability in GaN metal-oxide-semiconductor high-electron-mobility transistors using nanolaminate La2O3/SiO2 gate dielectric

    Science.gov (United States)

    Hsu, Ching-Hsiang; Shih, Wang-Cheng; Lin, Yueh-Chin; Hsu, Heng-Tung; Hsu, Hisang-Hua; Huang, Yu-Xiang; Lin, Tai-Wei; Wu, Chia-Hsun; Wu, Wen-Hao; Maa, Jer-Shen; Iwai, Hiroshi; Kakushima, Kuniyuki; Chang, Edward Yi

    2016-04-01

    Improved device performance to enable high-linearity power applications has been discussed in this study. We have compared the La2O3/SiO2 AlGaN/GaN metal-oxide-semiconductor high-electron-mobility transistors (MOS-HEMTs) with other La2O3-based (La2O3/HfO2, La2O3/CeO2 and single La2O3) MOS-HEMTs. It was found that forming lanthanum silicate films can not only improve the dielectric quality but also can improve the device characteristics. The improved gate insulation, reliability, and linearity of the 8 nm La2O3/SiO2 MOS-HEMT were demonstrated.

  10. Quantitative characterization of interface traps in Al2O3/AlGaN/GaN metal-oxide-semiconductor high-electron-mobility transistors by dynamic capacitance dispersion technique

    Science.gov (United States)

    Ma, Xiao-Hua; Zhu, Jie-Jie; Liao, Xue-Yang; Yue, Tong; Chen, Wei-Wei; Hao, Yue

    2013-07-01

    In this letter, the interface traps of Al2O3/AlGaN/GaN metal-oxide-semiconductor high-electron-mobility transistors (MOS-HEMTs) were characterized quantitatively by dynamic capacitance dispersion technique. An analysis of Al2O3/AlGaN interface states demonstrated deep traps in the range of 0.53 eV-1.16 eV below the conduction band, with trap density nearly constant and two orders of magnitude smaller than that at AlGaN surface due to the use of atomic layer deposition-grown Al2O3 insulator. As much as 2.23 × 1013 eV-1 cm-2 fast traps with time constant smaller than 0.3 μs were observed at AlGaN/GaN interface of MOS-HEMTs, which was consistent with the qualitative prediction from pulsed I-V test.

  11. Design and control of interface reaction between Al-based dielectrics and AlGaN layer in AlGaN/GaN metal-oxide-semiconductor structures

    Science.gov (United States)

    Watanabe, Kenta; Nozaki, Mikito; Yamada, Takahiro; Nakazawa, Satoshi; Anda, Yoshiharu; Ishida, Masahiro; Ueda, Tetsuzo; Yoshigoe, Akitaka; Hosoi, Takuji; Shimura, Takayoshi; Watanabe, Heiji

    2017-07-01

    Important clues for achieving well-behaved AlGaN/GaN metal-oxide-semiconductor (MOS) devices with Al-based gate dielectrics were systematically investigated on the basis of electrical and physical characterizations. We found that low-temperature deposition of alumina insulators on AlGaN surfaces is crucial to improve the interface quality, thermal stability, and variability of MOS devices by suppressing Ga diffusion into the gate oxides. Moreover, aluminum oxynitride grown in a reactive nitric atmosphere was proven to expand the optimal process window that would improve the interface quality and to enhance immunity against charge injection into the gate dielectrics. The results constitute common guidelines for achieving high-performance and reliable AlGaN/GaN MOS devices.

  12. Potential of carbon nanotube field effect transistors for analogue circuits

    Directory of Open Access Journals (Sweden)

    Khizar Hayat

    2013-11-01

    Full Text Available This Letter presents a detailed comparison of carbon nanotube field effect transistors (CNFETs and metal oxide semiconductor field effect transistors (MOSFETs with special focus on carbon nanotube FET's potential for implementing analogue circuits in the mm-wave and sub-terahertz range. The latest CNFET lithographic dimensions place it at-par with complementary metal oxide semiconductor in terms of current handling capability, whereas the forecasted improvement in the lithography enables the CNFETs to handle more than twice the current of MOSFETs. The comparison of RF parameters shows superior performance of CNFETs with a g(m, f(T and f(max of 2.7, 2.6 and 4.5 times higher, respectively. MOSFET- and CNFET-based inverter, three-stage ring oscillator and LC oscillator have been designed and compared as well. The CNFET-based inverters are found to be ten times faster, the ring oscillator demonstrates three times higher oscillation frequency and CNFET-based LC oscillator also shows improved performance than its MOSFET counterpart.

  13. Potential of carbon nanotube field effect transistors for analogue circuits

    KAUST Repository

    Hayat, Khizar

    2013-05-11

    This Letter presents a detailed comparison of carbon nanotube field effect transistors (CNFETs) and metal oxide semiconductor field effect transistors (MOSFETs) with special focus on carbon nanotube FET\\'s potential for implementing analogue circuits in the mm-wave and sub-terahertz range. The latest CNFET lithographic dimensions place it at-par with complementary metal oxide semiconductor in terms of current handling capability, whereas the forecasted improvement in the lithography enables the CNFETs to handle more than twice the current of MOSFETs. The comparison of RF parameters shows superior performance of CNFETs with a g m , f T and f max of 2.7, 2.6 and 4.5 times higher, respectively. MOSFET- and CNFET-based inverter, three-stage ring oscillator and LC oscillator have been designed and compared as well. The CNFET-based inverters are found to be ten times faster, the ring oscillator demonstrates three times higher oscillation frequency and CNFET-based LC oscillator also shows improved performance than its MOSFET counterpart.

  14. Physical and electrical characteristics of AlGaN/GaN metal-oxide-semiconductor high-electron-mobility transistors with rare earth Er{sub 2}O{sub 3} as a gate dielectric

    Energy Technology Data Exchange (ETDEWEB)

    Lin, Ray-Ming, E-mail: rmlin@mail.cgu.edu.tw; Chu, Fu-Chuan; Das, Atanu; Liao, Sheng-Yu; Chou, Shu-Tsun; Chang, Liann-Be

    2013-10-01

    In this study, the rare earth erbium oxide (Er{sub 2}O{sub 3}) was deposited using an electron beam onto an AlGaN/GaN heterostructure to fabricate metal-oxide-semiconductor high-electron-mobility transistors (MOS–HEMTs) that exhibited device performance superior to that of a conventional HEMT. Under similar bias conditions, the gate leakage currents of these MOS–HEMT devices were four orders of magnitude lower than those of conventional Schottky gate HEMTs. The measured sub-threshold swing (SS) and the effective trap state density (N{sub t}) of the MOS–HEMT were 125 mV/decade and 4.3 × 10{sup 12} cm{sup −2}, respectively. The dielectric constant of the Er{sub 2}O{sub 3} layer in this study was 14, as determined through capacitance–voltage measurements. In addition, the gate–source reverse breakdown voltage increased from –166 V for the conventional HEMT to –196 V for the Er{sub 2}O{sub 3} MOS–HEMT. - Highlights: ► GaN/AlGaN/Er{sub 2}O{sub 3} metal-oxide semiconductor high electron mobility transistor ► Physical and electrical characteristics are presented. ► Electron beam evaporated Er{sub 2}O{sub 3} with excellent surface roughness ► Device exhibits reduced gate leakage current and improved I{sub ON}/I{sub OFF} ratio.

  15. Sensing with Advanced Computing Technology: Fin Field-Effect Transistors with High-k Gate Stack on Bulk Silicon.

    Science.gov (United States)

    Rigante, Sara; Scarbolo, Paolo; Wipf, Mathias; Stoop, Ralph L; Bedner, Kristine; Buitrago, Elizabeth; Bazigos, Antonios; Bouvet, Didier; Calame, Michel; Schönenberger, Christian; Ionescu, Adrian M

    2015-05-26

    Field-effect transistors (FETs) form an established technology for sensing applications. However, recent advancements and use of high-performance multigate metal-oxide semiconductor FETs (double-gate, FinFET, trigate, gate-all-around) in computing technology, instead of bulk MOSFETs, raise new opportunities and questions about the most suitable device architectures for sensing integrated circuits. In this work, we propose pH and ion sensors exploiting FinFETs fabricated on bulk silicon by a fully CMOS compatible approach, as an alternative to the widely investigated silicon nanowires on silicon-on-insulator substrates. We also provide an analytical insight of the concept of sensitivity for the electronic integration of sensors. N-channel fully depleted FinFETs with critical dimensions on the order of 20 nm and HfO2 as a high-k gate insulator have been developed and characterized, showing excellent electrical properties, subthreshold swing, SS ∼ 70 mV/dec, and on-to-off current ratio, Ion/Ioff ∼ 10(6), at room temperature. The same FinFET architecture is validated as a highly sensitive, stable, and reproducible pH sensor. An intrinsic sensitivity close to the Nernst limit, S = 57 mV/pH, is achieved. The pH response in terms of output current reaches Sout = 60%. Long-term measurements have been performed over 4.5 days with a resulting drift in time δVth/δt = 0.10 mV/h. Finally, we show the capability to reproduce experimental data with an extended three-dimensional commercial finite element analysis simulator, in both dry and wet environments, which is useful for future advanced sensor design and optimization.

  16. The implant-free quantum well field-effect transistor: Harnessing the power of heterostructures

    International Nuclear Information System (INIS)

    Hellings, Geert; Hikavyy, Andriy; Mitard, Jerome; Witters, Liesbeth; Benbakhti, Brahim; Alian, AliReza; Waldron, Niamh; Bender, Hugo; Eneman, Geert; Krom, Raymond; Schulze, Andreas; Vandervorst, Wilfried; Loo, Roger; Heyns, Marc; Meuris, Marc; Hoffmann, Thomas; De Meyer, Kristin

    2012-01-01

    The Implant-Free Quantum Well Field-Effect Transistor (FET) offers enhanced scalability in a planar architecture through the integration of heterostructures. The Implant-Free architecture fully utilizes the band offsets between different materials, whereby charge carriers are effectively confined to a thin channel layer. This prevents sub-surface source/drain leakage observed in classical bulk Metal-Oxide-Semiconductor FETs at small gate lengths. An investigation of the V T -tuning capabilities of this technology reveals sensitivity to both well doping and bulk voltage.

  17. Capacitance-Voltage Characterization of La2O3 Metal-Oxide-Semiconductor Structures on In0.53Ga0.47As Substrate with Different Surface Treatment Methods

    Science.gov (United States)

    Zade, Dariush; Kanda, Takashi; Yamashita, Koji; Kakushima, Kuniyuki; Nohira, Hiroshi; Ahmet, Parhat; Tsutsui, Kazuo; Nishiyama, Akira; Sugii, Nobuyuki; Natori, Kenji; Hattori, Takeo; Iwai, Hiroshi

    2011-10-01

    We studied InGaAs surface treatment using hexamethyldisilazane (HMDS) vapor or (NH4)2S solution after initial oxide removal by hydrofluoric acid. The effect of each treatment on interface properties of La2O3/In0.53Ga0.47As metal-oxide-semiconductor (MOS) capacitor was evaluated. We found that HMDS surface treatment of InGaAs, followed by La2O3 deposition and forming gas annealing reduces the MOS capacitor's interface state density more effectively than (NH4)2S treatment. The comparison of the capacitance-voltage data shows that the HMDS-treated sample reaches a maximum accumulation capacitance of 2.3 µF/cm2 at 1 MHz with roughly 40% less frequency dispersion near accumulation, than the sample treated with (NH4)2S solution. These results suggest that process optimization of HMDS application could lead to further improvement of InGaAs MOS interface, thereby making it a potential routine step for InGaAs surface passivation.

  18. Disorder induced gap states as a cause of threshold voltage instabilities in Al2O3/AlGaN/GaN metal-oxide-semiconductor high-electron-mobility transistors

    Science.gov (United States)

    Matys, M.; Kaneki, S.; Nishiguchi, K.; Adamowicz, B.; Hashizume, T.

    2017-12-01

    We proposed that the disorder induced gap states (DIGS) can be responsible for the threshold voltage (Vth) instability in Al2O3/AlGaN/GaN metal-oxide-semiconductor high-electron-mobility transistors. In order to verify this hypothesis, we performed the theoretical calculations of the capacitance voltage (C-V) curves for the Al2O3/AlGaN/GaN structures using the DIGS model and compared them with measured ones. We found that the experimental C-V curves with a complex hysteresis behavior varied with the maximum forward bias and the sweeping rate can be well reproduced theoretically by assuming a particular distribution in energy and space of the DIGS continuum near the Al2O3/AlGaN interface, i.e., a U-shaped energy density distribution and exponential depth decay from the interface into Al2O3 layer (up to 4 nm), as well as suitable DIGS capture cross sections (the order of magnitude of 10-15 cm2). Finally, we showed that the DIGS model can also explain the negative bias induced threshold voltage instability. We believe that these results should be critical for the successful development of the passivation techniques, which allows to minimize the Vth instability related effects.

  19. Enhanced two dimensional electron gas transport characteristics in Al2O3/AlInN/GaN metal-oxide-semiconductor high-electron-mobility transistors on Si substrate

    Science.gov (United States)

    Freedsman, J. J.; Watanabe, A.; Urayama, Y.; Egawa, T.

    2015-09-01

    The authors report on Al2O3/Al0.85In0.15N/GaN Metal-Oxide-Semiconductor High-Electron-Mobility Transistor (MOS-HEMT) on Si fabricated by using atomic layer deposited Al2O3 as gate insulator and passivation layer. The MOS-HEMT with the gate length of 2 μm exhibits excellent direct-current (dc) characteristics with a drain current maximum of 1270 mA/mm at a gate bias of 3 V and an off-state breakdown voltage of 180 V for a gate-drain spacing of 4 μm. Also, the 1 μm-gate MOS-HEMT shows good radio-frequency (rf) response such as current gain and maximum oscillation cut-off frequencies of 10 and 34 GHz, respectively. The capacitance-voltage characteristics at 1 MHz revealed significant increase in two-dimensional electron gas (2DEG) density for the MOS-HEMT compared to conventional Schottky barrier HEMTs. Analyses using drain-source conductivity measurements showed improvements in 2DEG transport characteristics for the MOS-HEMT. The enhancements in dc and rf performances of the Al2O3/Al0.85In0.15N/GaN MOS-HEMT are attributed to the improvements in 2DEG characteristics.

  20. Enhanced two dimensional electron gas transport characteristics in Al2O3/AlInN/GaN metal-oxide-semiconductor high-electron-mobility transistors on Si substrate

    International Nuclear Information System (INIS)

    Freedsman, J. J.; Watanabe, A.; Urayama, Y.; Egawa, T.

    2015-01-01

    The authors report on Al 2 O 3 /Al 0.85 In 0.15 N/GaN Metal-Oxide-Semiconductor High-Electron-Mobility Transistor (MOS-HEMT) on Si fabricated by using atomic layer deposited Al 2 O 3 as gate insulator and passivation layer. The MOS-HEMT with the gate length of 2 μm exhibits excellent direct-current (dc) characteristics with a drain current maximum of 1270 mA/mm at a gate bias of 3 V and an off-state breakdown voltage of 180 V for a gate-drain spacing of 4 μm. Also, the 1 μm-gate MOS-HEMT shows good radio-frequency (rf) response such as current gain and maximum oscillation cut-off frequencies of 10 and 34 GHz, respectively. The capacitance-voltage characteristics at 1 MHz revealed significant increase in two-dimensional electron gas (2DEG) density for the MOS-HEMT compared to conventional Schottky barrier HEMTs. Analyses using drain-source conductivity measurements showed improvements in 2DEG transport characteristics for the MOS-HEMT. The enhancements in dc and rf performances of the Al 2 O 3 /Al 0.85 In 0.15 N/GaN MOS-HEMT are attributed to the improvements in 2DEG characteristics

  1. Fabrication and electrical properties of metal-oxide semiconductor capacitors based on polycrystalline p-Cu{sub x}O and HfO{sub 2}/SiO{sub 2} high-{kappa} stack gate dielectrics

    Energy Technology Data Exchange (ETDEWEB)

    Zou Xiao [Department of Electronic Science and Technology, School of Physical Science and Technology, Wuhan University, Wuhan, 430074 (China); Department of Electromachine Engineering, Jianghan University, Wuhan, 430056 (China); Fang Guojia, E-mail: gjfang@whu.edu.c [Department of Electronic Science and Technology, School of Physical Science and Technology, Wuhan University, Wuhan, 430074 (China); Yuan Longyan; Liu Nishuang; Long Hao; Zhao Xingzhong [Department of Electronic Science and Technology, School of Physical Science and Technology, Wuhan University, Wuhan, 430074 (China)

    2010-05-31

    Polycrystalline p-type Cu{sub x}O films were deposited after the growth of HfO{sub 2} dielectric on Si substrate by pulsed laser deposition, and Cu{sub x}O metal-oxide-semiconductor (MOS) capacitors with HfO{sub 2}/SiO{sub 2} stack gate dielectric were primarily fabricated and investigated. X-ray diffraction and X-ray photoelectron spectroscopy were applied to analyze crystalline structure and Cu{sup +}/Cu{sup 2+} ratios of Cu{sub x}O films respectively. SiO{sub 2} interlayer formed between the high-{kappa} dielectric and substrate was estimated by the transmission electron microscope. Results of electrical characteristic measurement indicate that the permittivity of HfO{sub 2} is about 22, and the gate leakage current density of MOS capacitor with 11.3 nm HfO{sub 2}/SiO{sub 2} stack dielectrics is {approx} 10{sup -4} A/cm{sup 2}. Results also show that the annealing in N{sub 2} can improve the quality of Cu{sub x}O/HfO{sub 2} interface and thus reduce the gate leakage density.

  2. Interface/border trap characterization of Al{sub 2}O{sub 3}/AlN/GaN metal-oxide-semiconductor structures with an AlN interfacial layer

    Energy Technology Data Exchange (ETDEWEB)

    Liu, Shenghou; Yang, Shu; Tang, Zhikai; Jiang, Qimeng; Liu, Cheng; Chen, Kevin J., E-mail: eekjchen@ust.hk [Department of Electronic and Computer Engineering, The Hong Kong University of Science and Technology, Clear Water Bay, Kowloon (Hong Kong); Wang, Maojun [Institute of Microelectronics, Peking University, Beijing 100871 (China); Shen, Bo [School of Physics, Peking University, Beijing 100871 (China)

    2015-02-02

    We report the interface characterization of Al{sub 2}O{sub 3}/AlN/GaN MOS (metal-oxide-semiconductor) structures with an AlN interfacial layer. A thin monocrystal-like interfacial layer (AlN) is formed at the Al{sub 2}O{sub 3}/GaN to effectively block oxygen from the GaN surface and prevent the formation of detrimental Ga-O bonds. The suppression of Ga-O bonds is validated by X-ray photoelectron spectroscopy of the critical interface. Frequency-dispersion in C-V characteristics has been significantly reduced, owing to improved interface quality. Furthermore, using the conventional conductance method suitable for extracting the interface trap density D{sub it} in MOS structures, D{sub it} in the device with AlN was determined to be in the range of 10{sup 11}–10{sup 12 }eV{sup −1 }cm{sup −2}, showing one order of magnitude lower than that without AlN. Border traps near the gate-dielectric/GaN interface were identified and shown to be suppressed by the AlN interfacial layer as well.

  3. Field-effect mobility of a two dimensional electron gas in an n-channel of Si-SiO2 MOS structure with due consideration of some practical features

    Science.gov (United States)

    Basu, A.; Middya, T. R.; Bhattacharya, D. P.

    2017-09-01

    The field-effect mobility characteristics of a non-degenerate ensemble of a two dimensional electron gas for interaction with acoustic mode lattice vibrations in the Si-SiO2 MOS structure at the high surface electric fields are calculated here for the low and high temperature cases. The calculation takes due account of some features which are usually neglected. These include the effects of (i) the transverse component of the phonon wave vector, (ii) the realistic model of the infinite triangular potential well along the transverse direction, while applying the momentum conservation approximation, and (iii) the full form of the phonon distribution function at low temperatures. The results seem to be interesting in that they are significantly different from what follows from other theories that neglect the effects of the above features. Moreover, the agreement between the results which are obtained here with the experimental data seems to be significantly better. The scope for further refinement of the present theory has been discussed.

  4. Effect of graded InGaN drain region and 'In' fraction in InGaN channel on performances of InGaN tunnel field-effect transistor

    Science.gov (United States)

    Duan, Xiaoling; Zhang, Jincheng; Wang, Shulong; Quan, Rudai; Hao, Yue

    2017-12-01

    An InGaN-based graded drain region tunnel field-effect transistor (GD-TFET) is proposed to suppress the ambipolar behavior. The simulation results with the trade-off between on-state current (Ion) and ambipolar current (Iambipolar) show decreased Iambipolar (1.9 × 10-14 A/μm) in comparison with that of conventional TFETs (2.0 × 10-8 A/μm). Furthermore, GD-TFET with high 'In' fraction InxGa1-xN source-side channel (SC- GD-TFET) is explored and exhibits 5.3 times Ion improvement and 60% average subthreshold swing (SSavg) reduction in comparison with GD-TFET by adjusting 'In' fraction in the InxGa1-xN source-side channel. The improvement is attributed to the confinement of BTBT in the source-side channel by the heterojunction. And then, the optimum value for source-side channel length (Lsc) is researched by DC performances results, which shows it falls into the range between Lsc = 10 nm and 20 nm.

  5. Thermal annealing effects on the interface state density of metal-oxide-semiconductor capacitors with electron cyclotron resonance plasma enhanced chemical vapor deposition Silicon dioxide

    Energy Technology Data Exchange (ETDEWEB)

    Maiolo, L. [Istituto di Fotonica e Nanotecnologie (IFN), CNR, Via Cineto Romano 42, 00156 Rome (Italy)], E-mail: lmaiolo@ifn.cnr.it; Pecora, A.; Cuscuna, M.; Fortunato, G. [Istituto di Fotonica e Nanotecnologie (IFN), CNR, Via Cineto Romano 42, 00156 Rome (Italy)

    2007-07-16

    Silicon dioxide films (SiO{sub 2}), deposited at room temperature by electron cyclotron resonance (ECR) plasma reactor from a gas phase combination of O{sub 2}, SiH{sub 4} and He, present excellent structural and electrical properties. However, when fabricating field effect devices it is also crucial to minimize the defect density at the semiconductor/insulator interface. We show that the interface state density, investigated in Al/SiO{sub 2}/Si MOS capacitors, can be substantially reduced performing post-deposition annealing. In particular we studied the effects of annealing temperature and time in different gas ambient: vacuum, nitrogen and forming gas (5% H{sub 2} + N{sub 2}). We found that interface state passivation mainly occurs when thermal annealing is performed after Al-contact deposition and that it is quite insensitive to the annealing atmosphere. The present results clearly suggest that the hydrogen passivation mechanism is driven by the H-containing species present in the film and a possible mechanism to explain the results is proposed.

  6. Thermal annealing effects on the interface state density of metal-oxide-semiconductor capacitors with electron cyclotron resonance plasma enhanced chemical vapor deposition Silicon dioxide

    International Nuclear Information System (INIS)

    Maiolo, L.; Pecora, A.; Cuscuna, M.; Fortunato, G.

    2007-01-01

    Silicon dioxide films (SiO 2 ), deposited at room temperature by electron cyclotron resonance (ECR) plasma reactor from a gas phase combination of O 2 , SiH 4 and He, present excellent structural and electrical properties. However, when fabricating field effect devices it is also crucial to minimize the defect density at the semiconductor/insulator interface. We show that the interface state density, investigated in Al/SiO 2 /Si MOS capacitors, can be substantially reduced performing post-deposition annealing. In particular we studied the effects of annealing temperature and time in different gas ambient: vacuum, nitrogen and forming gas (5% H 2 + N 2 ). We found that interface state passivation mainly occurs when thermal annealing is performed after Al-contact deposition and that it is quite insensitive to the annealing atmosphere. The present results clearly suggest that the hydrogen passivation mechanism is driven by the H-containing species present in the film and a possible mechanism to explain the results is proposed

  7. Impact of acceptor concentration on electrical properties and density of interface states of 4H-SiC n-metal-oxide-semiconductor field effect transistors studied by Hall effect

    Czech Academy of Sciences Publication Activity Database

    Ortiz, G.; Strenger, C.; Uhnevionak, V.; Burenkov, A.; Bauer, A.J.; Pichler, P.; Cristiano, F.; Bedel-Pereira, E.; Mortet, Vincent

    2015-01-01

    Roč. 106, č. 6 (2015), "062104-1"-"062104-5" ISSN 0003-6951 Institutional support: RVO:68378271 Keywords : MOSFETs * doping * Hall mobility * conduction bands * epitaxy Subject RIV: BM - Solid Matter Physics ; Magnetism Impact factor: 3.142, year: 2015

  8. A detailed coupled-mode-space non-equilibrium Green's function simulation study of source-to-drain tunnelling in gate-all-around Si nanowire metal oxide semiconductor field effect transistors

    Science.gov (United States)

    Seoane, N.; Martinez, A.

    2013-09-01

    In this paper we present a 3D quantum transport simulation study of source-to-drain tunnelling in gate-all-around Si nanowire transistors by using the non-equilibrium Green's function approach. The impact of the channel length, device cross-section, and drain and gate applied biases on the source-to-drain tunnelling is examined in detail. The overall effect of tunnelling on the ID-VG characteristics is also investigated. Tunnelling in devices with channel lengths of 10 nm or less substantially enhances the off-current. This enhancement is more important at high drain biases and at larger cross-sections where the sub-threshold slope is substantially degraded. A less common effect is the increase in the on-current due to the tunnelling which contributes as much as 30% of the total on-current. This effect is almost independent of the cross-section, and it depends weakly on the studied channel lengths.

  9. Complementary Metal Oxide Semiconductor-Compatible, High-Mobility, ⟨111⟩-Oriented GaSb Nanowires Enabled by Vapor-Solid-Solid Chemical Vapor Deposition.

    Science.gov (United States)

    Yang, Zai-Xing; Liu, Lizhe; Yip, SenPo; Li, Dapan; Shen, Lifan; Zhou, Ziyao; Han, Ning; Hung, Tak Fu; Pun, Edwin Yue-Bun; Wu, Xinglong; Song, Aimin; Ho, Johnny C

    2017-04-25

    Using CMOS-compatible Pd catalysts, we demonstrated the formation of high-mobility ⟨111⟩-oriented GaSb nanowires (NWs) via vapor-solid-solid (VSS) growth by surfactant-assisted chemical vapor deposition through a complementary experimental and theoretical approach. In contrast to NWs formed by the conventional vapor-liquid-solid (VLS) mechanism, cylindrical-shaped Pd 5 Ga 4 catalytic seeds were present in our Pd-catalyzed VSS-NWs. As solid catalysts, stoichiometric Pd 5 Ga 4 was found to have the lowest crystal surface energy and thus giving rise to a minimal surface diffusion as well as an optimal in-plane interface orientation at the seed/NW interface for efficient epitaxial NW nucleation. These VSS characteristics led to the growth of slender NWs with diameters down to 26.9 ± 3.5 nm. Over 95% high crystalline quality NWs were grown in ⟨111⟩ orientation for a wide diameter range of between 10 and 70 nm. Back-gated field-effect transistors (FETs) fabricated using the Pd-catalyzed GaSb NWs exhibit a superior peak hole mobility of ∼330 cm 2 V -1 s -1 , close to the mobility limit for a NW channel diameter of ∼30 nm with a free carrier concentration of ∼10 18 cm -3 . This suggests that the NWs have excellent homogeneity in phase purity, growth orientation, surface morphology and electrical characteristics. Contact printing process was also used to fabricate large-scale assembly of Pd-catalyzed GaSb NW parallel arrays, confirming the potential constructions and applications of these high-performance electronic devices.

  10. Epitaxial Gd2O3 on GaN and AlGaN: a potential candidate for metal oxide semiconductor based transistors on Si for high power application

    Science.gov (United States)

    Ghosh, Kankat; Das, S.; Khiangte, K. R.; Choudhury, N.; Laha, Apurba

    2017-11-01

    We report structural and electrical properties of hexagonal Gd2O3 grown epitaxially on GaN/Si (1 1 1) and AlGaN/GaN/Si(1 1 1) virtual substrates. GaN and AlGaN/GaN heterostructures were grown on Si(1 1 1) substrates by plasma assisted molecular beam epitaxy (PA-MBE), whereas the Gd2O3 layer was grown by the pulsed laser ablation (PLA) technique. Initial structural characterizations show that Gd2O3 grown on III-nitride layers by PLA, exhibit a hexagonal structure with an epitaxial relationship as {{≤ft[ 0 0 0 1 \\right]}G{{d2}{{O}3}}}||{{≤ft[ 0 0 0 1 \\right]}GaN} and {{≤ft[ 1 \\bar{1} 0 0 \\right]}G{{d2}{{O}3}}}||{{≤ft[ 1 \\bar{1} 0 0 \\right]}GaN} . X-ray photoelectron measurements of the valence bands revealed that Gd2O3 exhibits band offsets of 0.97 eV and 0.4 eV, for GaN and Al0.3Ga0.7N, respectively. Electrical measurements such as capacitance-voltage and leakage current characteristics further confirm that epi-Gd2O3 on III-nitrides could be a potential candidate for future metal-oxide-semiconductor (MOS)-based transistors also for high power applications in radio frequency range.

  11. Impact of GaN cap on charges in Al2O3/(GaN/)AlGaN/GaN metal-oxide-semiconductor heterostructures analyzed by means of capacitance measurements and simulations

    Science.gov (United States)

    Ťapajna, M.; Jurkovič, M.; Válik, L.; Haščík, Š.; Gregušová, D.; Brunner, F.; Cho, E.-M.; Hashizume, T.; Kuzmík, J.

    2014-09-01

    Oxide/semiconductor interface trap density (Dit) and net charge of Al2O3/(GaN)/AlGaN/GaN metal-oxide-semiconductor high-electron mobility transistor (MOS-HEMT) structures with and without GaN cap were comparatively analyzed using comprehensive capacitance measurements and simulations. Dit distribution was determined in full band gap of the barrier using combination of three complementary capacitance techniques. A remarkably higher Dit (˜5-8 × 1012 eV-1 cm-2) was found at trap energies ranging from EC-0.5 to 1 eV for structure with GaN cap compared to that (Dit ˜ 2-3 × 1012 eV-1 cm-2) where the GaN cap was selectively etched away. Dit distributions were then used for simulation of capacitance-voltage characteristics. A good agreement between experimental and simulated capacitance-voltage characteristics affected by interface traps suggests (i) that very high Dit (>1013 eV-1 cm-2) close to the barrier conduction band edge hampers accumulation of free electron in the barrier layer and (ii) the higher Dit centered about EC-0.6 eV can solely account for the increased C-V hysteresis observed for MOS-HEMT structure with GaN cap. Analysis of the threshold voltage dependence on Al2O3 thickness for both MOS-HEMT structures suggests that (i) positive charge, which compensates the surface polarization, is not necessarily formed during the growth of III-N heterostructure, and (ii) its density is similar to the total surface polarization charge of the GaN/AlGaN barrier, rather than surface polarization of the top GaN layer only. Some constraints for the positive surface compensating charge are discussed.

  12. Enhanced two dimensional electron gas transport characteristics in Al{sub 2}O{sub 3}/AlInN/GaN metal-oxide-semiconductor high-electron-mobility transistors on Si substrate

    Energy Technology Data Exchange (ETDEWEB)

    Freedsman, J. J., E-mail: freedy54@gmail.com; Watanabe, A.; Urayama, Y. [Research Center for Nano-Devices and Advanced Materials, Nagoya Institute of Technology, Gokiso-cho, Showa-ku, Nagoya 466 8555 (Japan); Egawa, T., E-mail: egawa.takashi@nitech.ac.jp [Research Center for Nano-Devices and Advanced Materials, Nagoya Institute of Technology, Gokiso-cho, Showa-ku, Nagoya 466 8555 (Japan); Innovation Center for Multi-Business of Nitride Semiconductors, Nagoya Institute of Technology, Gokiso-cho, Showa-ku, Nagoya 466 8555 (Japan)

    2015-09-07

    The authors report on Al{sub 2}O{sub 3}/Al{sub 0.85}In{sub 0.15}N/GaN Metal-Oxide-Semiconductor High-Electron-Mobility Transistor (MOS-HEMT) on Si fabricated by using atomic layer deposited Al{sub 2}O{sub 3} as gate insulator and passivation layer. The MOS-HEMT with the gate length of 2 μm exhibits excellent direct-current (dc) characteristics with a drain current maximum of 1270 mA/mm at a gate bias of 3 V and an off-state breakdown voltage of 180 V for a gate-drain spacing of 4 μm. Also, the 1 μm-gate MOS-HEMT shows good radio-frequency (rf) response such as current gain and maximum oscillation cut-off frequencies of 10 and 34 GHz, respectively. The capacitance-voltage characteristics at 1 MHz revealed significant increase in two-dimensional electron gas (2DEG) density for the MOS-HEMT compared to conventional Schottky barrier HEMTs. Analyses using drain-source conductivity measurements showed improvements in 2DEG transport characteristics for the MOS-HEMT. The enhancements in dc and rf performances of the Al{sub 2}O{sub 3}/Al{sub 0.85}In{sub 0.15}N/GaN MOS-HEMT are attributed to the improvements in 2DEG characteristics.

  13. Ultraviolet GaN photodetectors on Si via oxide buffer heterostructures with integrated short period oxide-based distributed Bragg reflectors and leakage suppressing metal-oxide-semiconductor contacts

    Science.gov (United States)

    Szyszka, A.; Lupina, L.; Lupina, G.; Schubert, M. A.; Zaumseil, P.; Haeberlen, M.; Storck, P.; Thapa, S. B.; Schroeder, T.

    2014-08-01

    Based on a novel double step oxide buffer heterostructure approach for GaN integration on Si, we present an optimized Metal-Semiconductor-Metal (MSM)-based Ultraviolet (UV) GaN photodetector system with integrated short-period (oxide/Si) Distributed Bragg Reflector (DBR) and leakage suppressing Metal-Oxide-Semiconductor (MOS) electrode contacts. In terms of structural properties, it is demonstrated by in-situ reflection high energy electron diffraction and transmission electron microscopy-energy dispersive x-ray studies that the DBR heterostructure layers grow with high thickness homogeneity and sharp interface structures sufficient for UV applications; only minor Si diffusion into the Y2O3 films is detected under the applied thermal growth budget. As revealed by comparative high resolution x-ray diffraction studies on GaN/oxide buffer/Si systems with and without DBR systems, the final GaN layer structure quality is not significantly influenced by the growth of the integrated DBR heterostructure. In terms of optoelectronic properties, it is demonstrated that—with respect to the basic GaN/oxide/Si system without DBR—the insertion of (a) the DBR heterostructures and (b) dark current suppressing MOS contacts enhances the photoresponsivity below the GaN band-gap related UV cut-off energy by almost up to two orders of magnitude. Given the in-situ oxide passivation capability of grown GaN surfaces and the one order of magnitude lower number of superlattice layers in case of higher refractive index contrast (oxide/Si) systems with respect to classical III-N DBR superlattices, virtual GaN substrates on Si via functional oxide buffer systems are thus a promising robust approach for future GaN-based UV detector technologies.

  14. Electrical properties of GaAs metal-oxide-semiconductor structure comprising Al2O3 gate oxide and AlN passivation layer fabricated in situ using a metal-organic vapor deposition/atomic layer deposition hybrid system

    Science.gov (United States)

    Aoki, Takeshi; Fukuhara, Noboru; Osada, Takenori; Sazawa, Hiroyuki; Hata, Masahiko; Inoue, Takayuki

    2015-08-01

    This paper presents a compressive study on the fabrication and optimization of GaAs metal-oxide-semiconductor (MOS) structures comprising a Al2O3 gate oxide, deposited via atomic layer deposition (ALD), with an AlN interfacial passivation layer prepared in situ via metal-organic chemical vapor deposition (MOCVD). The established protocol afforded self-limiting growth of Al2O3 in the atmospheric MOCVD reactor. Consequently, this enabled successive growth of MOCVD-formed AlN and ALD-formed Al2O3 layers on the GaAs substrate. The effects of AlN thickness, post-deposition anneal (PDA) conditions, and crystal orientation of the GaAs substrate on the electrical properties of the resulting MOS capacitors were investigated. Thin AlN passivation layers afforded incorporation of optimum amounts of nitrogen, leading to good capacitance-voltage (C-V) characteristics with reduced frequency dispersion. In contrast, excessively thick AlN passivation layers degraded the interface, thereby increasing the interfacial density of states (Dit) near the midgap and reducing the conduction band offset. To further improve the interface with the thin AlN passivation layers, the PDA conditions were optimized. Using wet nitrogen at 600 °C was effective to reduce Dit to below 2 × 1012 cm-2 eV-1. Using a (111)A substrate was also effective in reducing the frequency dispersion of accumulation capacitance, thus suggesting the suppression of traps in GaAs located near the dielectric/GaAs interface. The current findings suggest that using an atmosphere ALD process with in situ AlN passivation using the current MOCVD system could be an efficient solution to improving GaAs MOS interfaces.

  15. Impact of La2O3 interfacial layers on InGaAs metal-oxide-semiconductor interface properties in Al2O3/La2O3/InGaAs gate stacks deposited by atomic-layer-deposition

    Science.gov (United States)

    Chang, C.-Y.; Ichikawa, O.; Osada, T.; Hata, M.; Yamada, H.; Takenaka, M.; Takagi, S.

    2015-08-01

    We examine the electrical properties of atomic layer deposition (ALD) La2O3/InGaAs and Al2O3/La2O3/InGaAs metal-oxide-semiconductor (MOS) capacitors. It is found that the thick ALD La2O3/InGaAs interface provides low interface state density (Dit) with the minimum value of ˜3 × 1011 cm-2 eV-1, which is attributable to the excellent La2O3 passivation effect for InGaAs surfaces. It is observed, on the other hand, that there are a large amount of slow traps and border traps in La2O3. In order to simultaneously satisfy low Dit and small hysteresis, the effectiveness of Al2O3/La2O3/InGaAs gate stacks with ultrathin La2O3 interfacial layers is in addition evaluated. The reduction of the La2O3 thickness to 0.4 nm in Al2O3/La2O3/InGaAs gate stacks leads to the decrease in hysteresis. On the other hand, Dit of the Al2O3/La2O3/InGaAs interfaces becomes higher than that of the La2O3/InGaAs ones, attributable to the diffusion of Al2O3 through La2O3 into InGaAs and resulting modification of the La2O3/InGaAs interface structure. As a result of the effective passivation effect of La2O3 on InGaAs, however, the Al2O3/10 cycle (0.4 nm) La2O3/InGaAs gate stacks can realize still lower Dit with maintaining small hysteresis and low leakage current than the conventional Al2O3/InGaAs MOS interfaces.

  16. Tin - an unlikely ally for silicon field effect transistors?

    KAUST Repository

    Hussain, Aftab M.

    2014-01-13

    We explore the effectiveness of tin (Sn), by alloying it with silicon, to use SiSn as a channel material to extend the performance of silicon based complementary metal oxide semiconductors. Our density functional theory based simulation shows that incorporation of tin reduces the band gap of Si(Sn). We fabricated our device with SiSn channel material using a low cost and scalable thermal diffusion process of tin into silicon. Our high-κ/metal gate based multi-gate-field-effect-transistors using SiSn as channel material show performance enhancement, which is in accordance with the theoretical analysis. © 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  17. Metal oxide semiconductors for dye degradation

    Energy Technology Data Exchange (ETDEWEB)

    Adhikari, Sangeeta; Sarkar, Debasish, E-mail: dsarkar@nitrkl.ac.in

    2015-12-15

    Highlights: • Hydrothermal synthesis of monoclinic and hexagonal WO{sub 3} nanostructures. • Nanocuboid and nanofiber growth using different structure directing agents. • WO{sub 3}–ZnO nanocomposites for dye degradation under UV and visible light. • High photocatalytic efficiency is achieved by 10 wt% monoclinic WO{sub 3}. • WO{sub 3} assists to trap hole in UV and arrests electron in visible light irradiation. - Abstract: Organic contaminants are a growing threat to the environment that widely demands their degradation by high efficient photocatalysts. Thus, the proposed research work primely focuses on the efficient degradation of methyl orange using designed WO{sub 3}–ZnO photocatalysts under both UV and visible light irradiation. Two different sets of WO{sub 3} nanostructures namely, monoclinic WO{sub 3} (m-WO{sub 3}) and hexagonal WO{sub 3} (h-WO{sub 3}) synthesizes in presence of a different structure directing agents. A specific dispersion technique allows the intimate contact of as-synthesized WO{sub 3} and ultra-violet active commercial ZnO photocatalyst in different weight variations. ZnO nanocrystal in presence of an optimum 10 wt% m-WO{sub 3} shows a high degree of photocatalytic activity under both UV and visible light irradiation compared to counterpart h-WO{sub 3}. Symmetrical monoclinic WO{sub 3} assists to trap hole in UV, but electron arresting mechanism predominates in visible irradiation. Coupling of monoclinic nanocuboid WO{sub 3} with ZnO proves to be a promising photocatalyst in both wavelengths.

  18. Fringing field effects in negative capacitance field-effect transistors with a ferroelectric gate insulator

    Science.gov (United States)

    Hattori, Junichi; Fukuda, Koichi; Ikegami, Tsutomu; Ota, Hiroyuki; Migita, Shinji; Asai, Hidehiro; Toriumi, Akira

    2018-04-01

    We study the effects of fringing electric fields on the behavior of negative-capacitance (NC) field-effect transistors (FETs) with a silicon-on-insulator body and a gate stack consisting of an oxide film, an internal metal film, a ferroelectric film, and a gate electrode using our own device simulator that can properly handle the complicated relationship between the polarization and the electric field in ferroelectric materials. The behaviors of such NC FETs and the corresponding metal-oxide-semiconductor (MOS) FETs are simulated and compared with each other to evaluate the effects of the NC of the ferroelectric film. Then, the fringing field effects are evaluated by comparing the NC effects in NC FETs with and without gate spacers. The fringing field between the gate stack, especially the internal metal film, and the source/drain region induces more charges at the interface of the film with the ferroelectric film. Accordingly, the function of the NC to modulate the gate voltage and the resulting function to improve the subthreshold swing are enhanced. We also investigate the relationships of these fringing field effects to the drain voltage and four design parameters of NC FETs, i.e., gate length, gate spacer permittivity, internal metal film thickness, and oxide film thickness.

  19. Comparison of modification strategies towards enhanced charge carrier separation and photocatalytic degradation activity of metal oxide semiconductors (TiO{sub 2}, WO{sub 3} and ZnO)

    Energy Technology Data Exchange (ETDEWEB)

    Kumar, S. Girish [Department of Physics, Indian Institute of Science, Bengaluru, 560012 Karnataka (India); Department of Chemistry, School of Engineering and Technology, CMR University, Bengaluru, 562149, Karnataka (India); Rao, K.S.R. Koteswara, E-mail: raoksrk@gmail.com [Department of Physics, Indian Institute of Science, Bengaluru, 560012 Karnataka (India)

    2017-01-01

    Graphical abstract: Semiconductor metal oxides: Modifications, charge carrier dynamics and photocatalysis. - Highlights: • TiO{sub 2}, WO{sub 3} and ZnO based photocatalysis is reviewed. • Advances to improve the efficiency are emphasized. • Differences and similarities in the modifications are highlighted. • Charge carrier dynamics for each strategy are discussed. - Abstract: Metal oxide semiconductors (TiO{sub 2}, WO{sub 3} and ZnO) finds unparalleled opportunity in wastewater purification under UV/visible light, largely encouraged by their divergent admirable features like stability, non-toxicity, ease of preparation, suitable band edge positions and facile generation of active oxygen species in the aqueous medium. However, the perennial failings of these photocatalysts emanates from the stumbling blocks like rapid charge carrier recombination and meager visible light response. In this review, tailoring the surface-bulk electronic structure through the calibrated and veritable approaches such as impurity doping, deposition with noble metals, sensitizing with other compounds (dyes, polymers, inorganic complexes and simple chelating ligands), hydrogenation process (annealing under hydrogen atmosphere), electronic integration with other semiconductors, modifying with carbon nanostructures, designing with exposed facets and tailoring with hierarchical morphologies to overcome their critical drawbacks are summarized. Taking into account the materials intrinsic properties, the pros and cons together with similarities and striking differences for each strategy in specific to TiO{sub 2}, WO{sub 3} & ZnO are highlighted. These subtlety enunciates the primacy for improving the structure-electronic properties of metal oxides and credence to its fore in the practical applications. Future research must focus on comparing the performances of ZnO, TiO{sub 2} and WO{sub 3} in parallel to get insight into their photocatalytic behaviors. Such comparisons not only reveal

  20. Impact of GaN cap on charges in Al2O3/(GaN/)AlGaN/GaN metal-oxide-semiconductor heterostructures analyzed by means of capacitance measurements and simulations

    International Nuclear Information System (INIS)

    Ťapajna, M.; Jurkovič, M.; Válik, L.; Haščík, Š.; Gregušová, D.; Kuzmík, J.; Brunner, F.; Cho, E.-M.; Hashizume, T.

    2014-01-01

    Oxide/semiconductor interface trap density (D it ) and net charge of Al 2 O 3 /(GaN)/AlGaN/GaN metal-oxide-semiconductor high-electron mobility transistor (MOS-HEMT) structures with and without GaN cap were comparatively analyzed using comprehensive capacitance measurements and simulations. D it distribution was determined in full band gap of the barrier using combination of three complementary capacitance techniques. A remarkably higher D it (∼5–8 × 10 12  eV −1  cm −2 ) was found at trap energies ranging from E C -0.5 to 1 eV for structure with GaN cap compared to that (D it  ∼ 2–3 × 10 12  eV −1  cm −2 ) where the GaN cap was selectively etched away. D it distributions were then used for simulation of capacitance-voltage characteristics. A good agreement between experimental and simulated capacitance-voltage characteristics affected by interface traps suggests (i) that very high D it (>10 13  eV −1  cm −2 ) close to the barrier conduction band edge hampers accumulation of free electron in the barrier layer and (ii) the higher D it centered about E C -0.6 eV can solely account for the increased C-V hysteresis observed for MOS-HEMT structure with GaN cap. Analysis of the threshold voltage dependence on Al 2 O 3 thickness for both MOS-HEMT structures suggests that (i) positive charge, which compensates the surface polarization, is not necessarily formed during the growth of III-N heterostructure, and (ii) its density is similar to the total surface polarization charge of the GaN/AlGaN barrier, rather than surface polarization of the top GaN layer only. Some constraints for the positive surface compensating charge are discussed.

  1. Impact of GaN cap on charges in Al₂O₃/(GaN/)AlGaN/GaN metal-oxide-semiconductor heterostructures analyzed by means of capacitance measurements and simulations

    Energy Technology Data Exchange (ETDEWEB)

    Ťapajna, M., E-mail: milan.tapajna@savba.sk; Jurkovič, M.; Válik, L.; Haščík, Š.; Gregušová, D.; Kuzmík, J. [Institute of Electrical Engineering, Slovak Academy of Sciences, Dúbravská cesta 9, 841 04 Bratislava (Slovakia); Brunner, F.; Cho, E.-M. [Ferdinand-Braun-Institut, Leibniz Institut für Höchstfrequenztechnik, Gustav-Kirchhoff-Strasse 4, 12489 Berlin (Germany); Hashizume, T. [Research Center for Integrated Quantum Electronics (RCIQE), Hokkaido University, 060-0814 Sapporo, Japan and JST-CREST, 102-0075 Tokyo (Japan)

    2014-09-14

    Oxide/semiconductor interface trap density (D{sub it}) and net charge of Al₂O₃/(GaN)/AlGaN/GaN metal-oxide-semiconductor high-electron mobility transistor (MOS-HEMT) structures with and without GaN cap were comparatively analyzed using comprehensive capacitance measurements and simulations. D{sub it} distribution was determined in full band gap of the barrier using combination of three complementary capacitance techniques. A remarkably higher D{sub it} (∼5–8 × 10¹²eV⁻¹ cm⁻²) was found at trap energies ranging from EC-0.5 to 1 eV for structure with GaN cap compared to that (D{sub it} ∼ 2–3 × 10¹²eV⁻¹ cm⁻²) where the GaN cap was selectively etched away. D{sub it} distributions were then used for simulation of capacitance-voltage characteristics. A good agreement between experimental and simulated capacitance-voltage characteristics affected by interface traps suggests (i) that very high D{sub it} (>10¹³eV⁻¹ cm⁻²) close to the barrier conduction band edge hampers accumulation of free electron in the barrier layer and (ii) the higher D{sub it} centered about EC-0.6 eV can solely account for the increased C-V hysteresis observed for MOS-HEMT structure with GaN cap. Analysis of the threshold voltage dependence on Al₂O₃ thickness for both MOS-HEMT structures suggests that (i) positive charge, which compensates the surface polarization, is not necessarily formed during the growth of III-N heterostructure, and (ii) its density is similar to the total surface polarization charge of the GaN/AlGaN barrier, rather than surface polarization of the top GaN layer only. Some constraints for the positive surface compensating charge are discussed.

  2. Silicon Tunneling Field Effect Transistors with a Hemicylindrical Nanowire Channel for Ultra-Low Power Application

    Science.gov (United States)

    Park, Byung-Gook; Sun, Min-Chul; Kim, Sang Wan

    In order to decrease the threshold voltage while maintaining the OFF current low, reduction of the subthreshold swing is essential in field effect transistors (FETs). To reduce the subthreshold swing below 60 mV/decade, inter-band tunneling can be used for injection of carriers and the device that utilizes such a mechanism is tunneling field effect transistor (TFET). Silicon(Si) TFETs, which are favored due to their compatibility with currently dominant complementary metal-oxide-semiconductor (CMOS) technology, suffer from low ON current because of the relatively large bandgap of Si. The ON current of Si TFETs can be increased by field and area enhancement in a cylindrical nanowire channel. Numerical analysis has confirmed that the cylindrical channel structure shows significantly higher tunneling rate and wider tunneling area than the double gate structure. Si TFETs with a hemicylindrical nanowire channel are fabricated and characterized, and the effectiveness of nanowire channel approach is demonstrated.

  3. Non-Planar Nano-Scale Fin Field Effect Transistors on Textile, Paper, Wood, Stone, and Vinyl via Soft Material-Enabled Double-Transfer Printing

    KAUST Repository

    Rojas, Jhonathan Prieto

    2015-05-01

    The ability to incorporate rigid but high-performance nano-scale non-planar complementary metal-oxide semiconductor (CMOS) electronics with curvilinear, irregular, or asymmetric shapes and surfaces is an arduous but timely challenge in enabling the production of wearable electronics with an in-situ information-processing ability in the digital world. Therefore, we are demonstrating a soft-material enabled double-transfer-based process to integrate flexible, silicon-based, nano-scale, non-planar, fin-shaped field effect transistors (FinFETs) and planar metal-oxide-semiconductor field effect transistors (MOSFETs) on various asymmetric surfaces to study their compatibility and enhanced applicability in various emerging fields. FinFET devices feature sub-20 nm dimensions and state-of-the-art, high-κ/metal gate stack, showing no performance alteration after the transfer process. A further analysis of the transferred MOSFET devices, featuring 1 μm gate length exhibits ION ~70 μA/μm (VDS = 2 V, VGS = 2 V) and a low sub-threshold swing of around 90 mV/dec, proving that a soft interfacial material can act both as a strong adhesion/interposing layer between devices and final substrate as well as a means to reduce strain, which ultimately helps maintain the device’s performance with insignificant deterioration even at a high bending state.

  4. Interdigitated Extended Gate Field Effect Transistor Without Reference Electrode

    Science.gov (United States)

    Ali, Ghusoon M.

    2017-02-01

    An interdigitated extended gate field effect transistor (IEGFET) has been proposed as a modified pH sensor structure of an extended gate field effect transistor (EGFET). The reference electrode and the extended gate in the conventional device have been replaced by a single interdigitated extended gate. A metal-semiconductor-metal interdigitated extended gate containing two multi-finger Ni electrodes based on zinc oxide (ZnO) thin film as a pH-sensitive membrane. ZnO thin film was grown on a p-type Si (100) substrate by the sol-gel technique. The fabricated extended gate is connected to a commercial metal-oxide-semiconductor field-effect transistor device in CD4007UB. The experimental data show that this structure has real time and linear pH voltage and current sensitivities in a concentration range between pH 4 and 11. The voltage and current sensitivities are found to be about 22.4 mV/pH and 45 μA/pH, respectively. Reference electrode elimination makes the IEGFET device simple to fabricate, easy to carry out the measurements, needing a small volume of solution to test and suitable for disposable biosensor applications. Furthermore, this uncomplicated structure could be extended to fabricate multiple ions microsensors and lab-on-chip devices.

  5. Localized Electrothermal Annealing with Nanowatt Power for a Silicon Nanowire Field-Effect Transistor.

    Science.gov (United States)

    Park, Jun-Young; Lee, Byung-Hyun; Lee, Geon-Beom; Bae, Hagyoul; Choi, Yang-Kyu

    2018-02-07

    This work investigates localized electrothermal annealing (ETA) with extremely low power consumption. The proposed method utilizes, for the first time, tunneling-current-induced Joule heat in a p-i-n diode, consisting of p-type, intrinsic, and n-type semiconductors. The consumed power used for dopant control is the lowest value ever reported. A metal-oxide-semiconductor field-effect transistor (MOSFET) composed of a p-i-n silicon nanowire, which is a substructure of a tunneling FET (TFET), was fabricated and utilized as a test platform to examine the annealing behaviors. A more than 2-fold increase in the on-state (I ON ) current was achieved using the ETA. Simulations are conducted to investigate the location of the hot spot and how its change in heat profile activates the dopants.

  6. Theoretical study of potential performance of armchair graphene nanoribbon field effect transistors: Dependence on channel dimensions and contact resistance

    Science.gov (United States)

    Hur, Ji-Hyun; Kim, Deok-kee

    2017-12-01

    In this paper, we examine the performance limitations of graphene nanoribbon field effect transistors (GNRFETs) with various channel dimensions and electrode contact resistances. To do this, we formulate a self-consistent non-equilibrium Green's function method in conjunction with the Poisson equation. We model the behavior of GNRFETs with nanometer dimensions and relatively large bandgaps operating as metal-oxide-semiconductor field effect transistors (MOSFETs) and calculate their performance including contact resistance effects typically occurring at the graphene nanoribbon (GNR) channel and electrodes. We propose a metric for GNRFETs to compete with the current silicon CMOS high performance or low power devices and explain that this can vary significantly depending on the contact resistance.

  7. Silicon junctionless field effect transistors as room temperature terahertz detectors

    Science.gov (United States)

    Marczewski, J.; Knap, W.; Tomaszewski, D.; Zaborowski, M.; Zagrajek, P.

    2015-09-01

    Terahertz (THz) radiation detection by junctionless metal-oxide-semiconductor field-effect transistors (JL MOSFETs) was studied and compared with THz detection using conventional MOSFETs. It has been shown that in contrast to the behavior of standard transistors, the junctionless devices have a significant responsivity also in the open channel (low resistance) state. The responsivity for a photolithographically defined JL FET was 70 V/W and the noise equivalent power 460 pW/√Hz. Working in the open channel state may be advantageous for THz wireless and imaging applications because of its low thermal noise and possible high operating speed or large bandwidth. It has been proven that the junctionless MOSFETs can also operate in a zero gate bias mode, which enables simplification of the THz array circuitry. Existing models of THz detection by MOSFETs were considered and it has been demonstrated that the process of detection by these junctionless devices cannot be explained within the framework of the commonly accepted models and therefore requires a new theoretical approach.

  8. n-Channel semiconductor materials design for organic complementary circuits.

    Science.gov (United States)

    Usta, Hakan; Facchetti, Antonio; Marks, Tobin J

    2011-07-19

    Organic semiconductors have unique properties compared to traditional inorganic materials such as amorphous or crystalline silicon. Some important advantages include their adaptability to low-temperature processing on flexible substrates, low cost, amenability to high-speed fabrication, and tunable electronic properties. These features are essential for a variety of next-generation electronic products, including low-power flexible displays, inexpensive radio frequency identification (RFID) tags, and printable sensors, among many other applications. Accordingly, the preparation of new materials based on π-conjugated organic molecules or polymers has been a central scientific and technological research focus over the past decade. Currently, p-channel (hole-transporting) materials are the leading class of organic semiconductors. In contrast, high-performance n-channel (electron-transporting) semiconductors are relatively rare, but they are of great significance for the development of plastic electronic devices such as organic field-effect transistors (OFETs). In this Account, we highlight the advances our team has made toward realizing moderately and highly electron-deficient n-channel oligomers and polymers based on oligothiophene, arylenediimide, and (bis)indenofluorene skeletons. We have synthesized and characterized a "library" of structurally related semiconductors, and we have investigated detailed structure-property relationships through optical, electrochemical, thermal, microstructural (both single-crystal and thin-film), and electrical measurements. Our results reveal highly informative correlations between structural parameters at various length scales and charge transport properties. We first discuss oligothiophenes functionalized with perfluoroalkyl and perfluoroarene substituents, which represent the initial examples of high-performance n-channel semiconductors developed in this project. The OFET characteristics of these compounds are presented with an

  9. Ultralow-power non-volatile memory cells based on P(VDF-TrFE) ferroelectric-gate CMOS silicon nanowire channel field-effect transistors.

    Science.gov (United States)

    Van, Ngoc Huynh; Lee, Jae-Hyun; Whang, Dongmok; Kang, Dae Joon

    2015-07-21

    Nanowire-based ferroelectric-complementary metal-oxide-semiconductor (NW FeCMOS) nonvolatile memory devices were successfully fabricated by utilizing single n- and p-type Si nanowire ferroelectric-gate field effect transistors (NW FeFETs) as individual memory cells. In addition to having the advantages of single channel n- and p-type Si NW FeFET memory, Si NW FeCMOS memory devices exhibit a direct readout voltage and ultralow power consumption. The reading state power consumption of this device is less than 0.1 pW, which is more than 10(5) times lower than the ON-state power consumption of single-channel ferroelectric memory. This result implies that Si NW FeCMOS memory devices are well suited for use in non-volatile memory chips in modern portable electronic devices, especially where low power consumption is critical for energy conservation and long-term use.

  10. Solution-processed ambipolar organic field-effect transistors and inverters.

    Science.gov (United States)

    Meijer, E J; de Leeuw, D M; Setayesh, S; van Veenendaal, E; Huisman, B H; Blom, P W M; Hummelen, J C; Scherf, U; Kadam, J; Klapwijk, T M

    2003-10-01

    There is ample evidence that organic field-effect transistors have reached a stage where they can be industrialized, analogous to standard metal oxide semiconductor (MOS) transistors. Monocrystalline silicon technology is largely based on complementary MOS (CMOS) structures that use both n-type and p-type transistor channels. This complementary technology has enabled the construction of digital circuits, which operate with a high robustness, low power dissipation and a good noise margin. For the design of efficient organic integrated circuits, there is an urgent need for complementary technology, where both n-type and p-type transistor operation is realized in a single layer, while maintaining the attractiveness of easy solution processing. We demonstrate, by using solution-processed field-effect transistors, that hole transport and electron transport are both generic properties of organic semiconductors. This ambipolar transport is observed in polymers based on interpenetrating networks as well as in narrow bandgap organic semiconductors. We combine the organic ambipolar transistors into functional CMOS-like inverters.

  11. Electron energy dissipation model of gate dielectric progressive breakdown in n- and p-channel field effect transistors

    Science.gov (United States)

    Lombardo, S.; Wu, E. Y.; Stathis, J. H.

    2017-08-01

    We report the data and a model showing that the energy loss experienced by the carriers flowing through breakdown spots is the primary cause of progressive breakdown spot growth. The experiments are performed in gate dielectrics of metal-oxide-semiconductor (MOS) devices subjected to accelerated high electric field constant voltage stress under inversion conditions. The model is analytical and contains few free parameters of clear physical meaning. This is compared to a large set of data on breakdown transients at various oxide thicknesses, stress voltages, and temperatures, both in cases of n-channel and p-channel transistors and polycrystalline Si/oxynitride/Si and metal gate/high k dielectric/Si gate stacks. The basic idea is that the breakdown transient is due to the growth of one or more filaments in the dielectric promoted by electromigration driven by the energy lost by the electrons traveling through the breakdown spots. Both cases of polycrystalline Si/oxynitride/Si and metal gate/high-k dielectric/Si MOS structures are investigated. The best fit values of the model to the data, reported and discussed in the paper, consistently describe a large set of data. The case of simultaneous growth of multiple progressive breakdown spots in the same device is also discussed in detail.

  12. Light-emitting ambipolar organic heterostructure field-effect transistor

    NARCIS (Netherlands)

    Rost, Constance; Karg, Siegfried; Riess, Walter; Loi, Maria Antonietta; Murgia, Mauro; Muccini, Michele

    2004-01-01

    We have investigated ambipolar charge injection and transport in organic field-effect transistors (OFETs) as prerequisites for a light-emitting organic field-effect transistor (LEOFET). OFETs containing a single material as active layer generally function either as a p- or an n-channel device.

  13. High-temperature complementary metal oxide semiconductors (CMOS)

    International Nuclear Information System (INIS)

    McBrayer, J.D.

    1979-10-01

    Silicon CMOS devices were studied, tested, and evaluated at high temperatures to determine processing, geometric, operating characteristics, and stability parameters. After more than 1000 hours at 300 0 C, most devices showed good stability, reliability, and operating characteristics. Processing and geometric parameters were evaluated and optimization steps discussed

  14. High-temperature complementary metal oxide semiconductors (CMOS)

    Energy Technology Data Exchange (ETDEWEB)

    McBrayer, J.D.

    1979-10-01

    Silicon CMOS devices were studied, tested, and evaluated at high temperatures to determine processing, geometric, operating characteristics, and stability parameters. After more than 1000 hours at 300/sup 0/C, most devices showed good stability, reliability, and operating characteristics. Processing and geometric parameters were evaluated and optimization steps discussed.

  15. Radiation effects in metal-oxide-semiconductor capacitors

    International Nuclear Information System (INIS)

    Collins, J.L.

    1987-01-01

    The effects of various radiations on commercially made Al-SiO 2 -Si Capacitors (MOSCs) have been investigated. Intrinsic dielectric breakdown in MOSCs has been shown to be a two-stage process dominated by charge injection in a pre-breakdown stage; this is associated with localised high-field injection of carriers from the semiconductor substrate to interfacial and bulk charge traps which, it is proposed, leads to the formation of conducting channels through the dielectric with breakdown occurring as a result of the dissipation of the conduction band energy. A study of radiation-induced dielectric breakdown has revealed the possibility of anomalous hot-electron injection to an excess of bulk oxide traps in the ionization channel produced by very heavily ionizing radiation, which leads to intrinsic breakdown in high-field stressed devices. This is interpreted in terms of a modified model for radiation-induced dielectric breakdown based upon the primary dependence of breakdown on charge injection rather than high-field mechanisms. A detailed investigation of charge trapping and interface state generation due to various radiations has revealed evidence of neutron induced interface states, and the generation of positive oxide charge in devices due to all the radiations tested. The greater the linear energy transfer of the radiation, the greater the magnitude of charge trapped in the oxide and the number of interface states generated. This is interpreted in terms of Si-H and Si-OH bond-breaking at the Si-SiO 2 interface which is enhanced by charge carrier transfer to the interface and by anomalous charge injection to compensate for the excess of charge carriers created by the radiation. (author)

  16. Bistability in a complementary metal oxide semiconductor inverter circuit.

    Science.gov (United States)

    Carroll, Thomas L

    2005-09-01

    Radiofrequency signals can disrupt the operation of low frequency circuits. A digital inverter circuit would seem to be immune to such disruption, because its output state usually jumps abruptly between 0 and 5 V. Nevertheless, when driven with a high frequency signal, the inverter can have two coexisting stable states (which are not at 0 and 5 V). Slow switching between these states (by changing the rf signal) will produce a low frequency signal. I demonstrate the bistability in a circuit experiment and in a simple model of the circuit.

  17. Band alignments and improved leakage properties of (La2O3)0.5(SiO2)0.5/SiO2/GaN stacks for high-temperature metal-oxide-semiconductor field-effect transistor applications

    Science.gov (United States)

    Gao, L. G.; Xu, B.; Guo, H. X.; Xia, Y. D.; Yin, J.; Liu, Z. G.

    2009-06-01

    The band alignments of (La2O3)0.5(SiO2)0.5(LSO)/GaN and LSO/SiO2/GaN gate dielectric stacks were investigated comparatively by using x-ray photoelectron spectroscopy. The valence band offsets for LSO/GaN stack and LSO/SiO2/GaN stack are 0.88 and 1.69 eV, respectively, while the corresponding conduction band offsets are found to be 1.40 and 1.83 eV, respectively. Measurements of the leakage current density as function of temperature revealed that the LSO/SiO2/GaN stack has much lower leakage current density than that of the LSO/GaN stack, especially at high temperature. It is concluded that the presence of a SiO2 buffer layer increases band offsets and reduces the leakage current density effectively.

  18. Two-dimensional negative capacitance field-effect transistor with organic ferroelectric.

    Science.gov (United States)

    Zhang, Heng; Chen, Yan; Ding, Shi-Jin; Wang, Jianlu; Bao, Wen-Zhong; Zhang, David Wei; Zhou, Peng

    2018-03-27

    In the past fifty years, the complementary metal-oxide-semiconductor(CMOS) integrated circuits have got great development, but Moore's law will soon come to an end. In order to break through the physical limit of Moore's law, two-dimensional materials have been widely used in many electronic devices because of its high mobility and large quantum capacitances. And the emergence of negative capacitance field-effect transistor(FET) could not only break the thermal limit of conventional devices, but also reduce operating voltage and power consumption. This paper demonstrates a two-dimensional negative capacitance FET treating molybdenum disulfide(MoS2) as channel material and organic P(VDF-TrFE) as gate dielectric directly, which makes a new attempt for preparation of negative capacitance FETs and producing flexible electronic devices. It exhibited 10^6 on-/off-current ratio. And the minimum subthreshold swing(SS) of 21mV/decade and average subthreshold swing of 44mV/decade in four orders magnitude of drain current were also observed at room temperature of 300K. © 2018 IOP Publishing Ltd.

  19. Gate-Sensing Coherent Charge Oscillations in a Silicon Field-Effect Transistor.

    Science.gov (United States)

    Gonzalez-Zalba, M Fernando; Shevchenko, Sergey N; Barraud, Sylvain; Johansson, J Robert; Ferguson, Andrew J; Nori, Franco; Betz, Andreas C

    2016-03-09

    Quantum mechanical effects induced by the miniaturization of complementary metal-oxide-semiconductor (CMOS) technology hamper the performance and scalability prospects of field-effect transistors. However, those quantum effects, such as tunneling and coherence, can be harnessed to use existing CMOS technology for quantum information processing. Here, we report the observation of coherent charge oscillations in a double quantum dot formed in a silicon nanowire transistor detected via its dispersive interaction with a radio frequency resonant circuit coupled via the gate. Differential capacitance changes at the interdot charge transitions allow us to monitor the state of the system in the strong-driving regime where we observe the emergence of Landau-Zener-Stückelberg-Majorana interference on the phase response of the resonator. A theoretical analysis of the dispersive signal demonstrates that quantum and tunneling capacitance changes must be included to describe the qubit-resonator interaction. Furthermore, a Fourier analysis of the interference pattern reveals a charge coherence time, T2 ≈ 100 ps. Our results demonstrate charge coherent control and readout in a simple silicon transistor and open up the possibility to implement charge and spin qubits in existing CMOS technology.

  20. Stepwise cyanation of naphthalene diimide for n-channel field-effect transistors

    KAUST Repository

    Chang, Jingjing

    2012-06-15

    Stepwise cyanation of tetrabromonaphthalenediimide (NDI) 1 gave a series of cyanated NDIs 2-5 with the monocyanated NDI 2 and dicyanated NDI 3 isolated. The tri- and tetracyano- NDIs 4 and 5 show intrinsic instability toward moisture because of their extremely low-lying LUMO energy levels. The partially cyanated intermediates can be utilized as air-stable n-type semiconductors with OFET electron mobility up to 0.05 cm 2 V -1 s -1. © 2012 American Chemical Society.

  1. Monte Carlo simulations of spin transport in a strained nanoscale InGaAs field effect transistor

    Science.gov (United States)

    Thorpe, B.; Kalna, K.; Langbein, F. C.; Schirmer, S.

    2017-12-01

    Spin-based logic devices could operate at a very high speed with a very low energy consumption and hold significant promise for quantum information processing and metrology. We develop a spintronic device simulator by combining an in-house developed, experimentally verified, ensemble self-consistent Monte Carlo device simulator with spin transport based on a Bloch equation model and a spin-orbit interaction Hamiltonian accounting for Dresselhaus and Rashba couplings. It is employed to simulate a spin field effect transistor operating under externally applied voltages on a gate and a drain. In particular, we simulate electron spin transport in a 25 nm gate length In0.7Ga0.3As metal-oxide-semiconductor field-effect transistor with a CMOS compatible architecture. We observe a non-uniform decay of the net magnetization between the source and the gate and a magnetization recovery effect due to spin refocusing induced by a high electric field between the gate and the drain. We demonstrate a coherent control of the polarization vector of the drain current via the source-drain and gate voltages, and show that the magnetization of the drain current can be increased twofold by the strain induced into the channel.

  2. A scanning microscopy technique based on capacitive coupling with a field-effect transistor integrated with the tip.

    Science.gov (United States)

    Shin, Kumjae; Kang, Dae sil; Lee, Sang hoon; Moon, Wonkyu

    2015-12-01

    We propose a method for measuring the capacitance of a thin layer using a Tip-on-Gate of Field-Effect Transistor (ToGoFET) probe. A ToGoFET probe with a metal-oxide-semiconductor field-effect transistor (MOSFET) with an ion-implant channel was embedded at the end of a cantilever and a Pt tip was fabricated using micro-machining. The ToGoFET probe was used to detect an alternating electric field at the dielectric surface. A dielectric buried metal sample was prepared; a sinusoidal input signal was applied to the buried metal lines; and the ToGoFET probe detected the electric field at the tip via the dielectric. The AC signal detected by the ToGoFET probe was demodulated by a simple AC-to-DC converter. Experimentally, it was shown that an electric field could be measured at the surface of the dielectric layer above a buried metal line. This promising result shows that it is possible to measure the surface local capacitance. Copyright © 2015 Elsevier B.V. All rights reserved.

  3. On the drain bias dependence of long-channel silicon-on-insulator-based tunnel field-effect transistors

    Science.gov (United States)

    Fukuda, Koichi; Mori, Takahiro; Asai, Hidehiro; Hattori, Junichi; Mizubayashi, Wataru; Morita, Yukinori; Fuketa, Hiroshi; Migita, Shinji; Ota, Hiroyuki; Masahara, Meishoku; Endo, Kazuhiko; Matsukawa, Takashi

    2017-04-01

    The drain bias dependence of tunnel field-effect transistors (TFETs) is examined on the basis of the measured characteristics and device simulation to understand the electrical behavior of TFETs. Our analyses focus on the long-channel silicon-on-insulator (SOI)-based TFETs as a good basis for further studies of short-channel effects, scaling issues, and more complicated device structures, such as multigate or nanowire TFETs. By device simulation, it is revealed that the drain bias dependence of the transfer characteristics of the measured TFETs is governed by two physical mechanisms: the density of states (DOS) occupancy factor, which depends on drain-to-source bias voltage, and channel electrostatic potential, which is limited by the drain bias through strong carrier accumulation. These mechanisms differ from the drain-induced barrier lowering (DIBL) of metal-oxide-semiconductor field-effect-transistors (MOSFETs), and cause a significant impact even in long-channel SOIs. Finally, the obtained insights are successfully implemented in a TFET compact model.

  4. New Material Transistor with Record-High Field-Effect Mobility among Wide-Band-Gap Semiconductors.

    Science.gov (United States)

    Shih, Cheng Wei; Chin, Albert

    2016-08-03

    At an ultrathin 5 nm, we report a new high-mobility tin oxide (SnO2) metal-oxide-semiconductor field-effect transistor (MOSFET) exhibiting extremely high field-effect mobility values of 279 and 255 cm(2)/V-s at 145 and 205 °C, respectively. These values are the highest reported mobility values among all wide-band-gap semiconductors of GaN, SiC, and metal-oxide MOSFETs, and they also exceed those of silicon devices at the aforementioned elevated temperatures. For the first time among existing semiconductor transistors, a new device physical phenomenon of a higher mobility value was measured at 45-205 °C than at 25 °C, which is due to the lower optical phonon scattering by the large SnO2 phonon energy. Moreover, the high on-current/off-current of 4 × 10(6) and the positive threshold voltage of 0.14 V at 25 °C are significantly better than those of a graphene transistor. This wide-band-gap SnO2 MOSFET exhibits high mobility in a 25-205 °C temperature range, a wide operating voltage of 1.5-20 V, and the ability to form on an amorphous substrate, rendering it an ideal candidate for multifunctional low-power integrated circuit (IC), display, and brain-mimicking three-dimensional IC applications.

  5. Tunnel-field-effect-transistor based gas-sensor: Introducing gas detection with a quantum-mechanical transducer

    Science.gov (United States)

    Sarkar, Deblina; Gossner, Harald; Hansch, Walter; Banerjee, Kaustav

    2013-01-01

    A gas-sensor based on tunnel-field-effect-transistor (TFET) is proposed that leverages the unique current injection mechanism in the form of quantum-mechanical band-to-band tunneling to achieve substantially improved performance compared to conventional metal-oxide-semiconductor field-effect-transistors (MOSFETs) for detection of gas species under ambient conditions. While nonlocal phonon-assisted tunneling model is used for detailed device simulations, in order to provide better physical insights, analytical formula for sensitivity is derived for both metal as well as organic conducting polymer based sensing elements. Analytical derivations are also presented for capturing the effects of temperature on sensor performance. Combining the developed analytical and numerical models, intricate properties of the sensor such as gate bias dependence of sensitivity, relationship between the required work-function modulation and subthreshold swing, counter-intuitive increase in threshold voltage for MOSFETs and reduction in tunneling probability for TFETs with temperature are explained. It is shown that TFET gas-sensors can not only lead to more than 10 000× increase in sensitivity but also provide design flexibility and immunity against screening of work-function modulation through non-specific gases as well as ensure stable operation under temperature variations.

  6. Electrical and noise characteristics of graphene field-effect transistors: ambient effects, noise sources and physical mechanisms.

    Science.gov (United States)

    Rumyantsev, S; Liu, G; Stillman, W; Shur, M; Balandin, A A

    2010-10-06

    We fabricated a large number of single and bilayer graphene transistors and carried out a systematic experimental study of their low-frequency noise characteristics. Special attention was given to determining the dominant noise sources in these devices and the effect of aging on the current-voltage and noise characteristics. The analysis of the noise spectral density dependence on the area of graphene channel showed that the dominant contributions to the low-frequency electronic noise come from the graphene layer itself rather than from the contacts. Aging of graphene transistors due to exposure to ambient conditions for over a month resulted in substantially increased noise, attributed to the decreasing mobility of graphene and increasing contact resistance. The noise spectral density in both single and bilayer graphene transistors either increased with deviation from the charge neutrality point or depended weakly on the gate bias. This observation confirms that the low-frequency noise characteristics of graphene transistors are qualitatively different from those of conventional silicon metal-oxide-semiconductor field-effect transistors.

  7. MoS2/Rubrene van der Waals Heterostructure: Toward Ambipolar Field-Effect Transistors and Inverter Circuits.

    Science.gov (United States)

    He, Xuexia; Chow, WaiLeong; Liu, Fucai; Tay, BengKang; Liu, Zheng

    2017-01-01

    2D transition metal dichalcogenides are promising channel materials for the next-generation electronic device. Here, vertically 2D heterostructures, so called van der Waals solids, are constructed using inorganic molybdenum sulfide (MoS 2 ) few layers and organic crystal - 5,6,11,12-tetraphenylnaphthacene (rubrene). In this work, ambipolar field-effect transistors are successfully achieved based on MoS 2 and rubrene crystals with the well balanced electron and hole mobilities of 1.27 and 0.36 cm 2 V -1 s -1 , respectively. The ambipolar behavior is explained based on the band alignment of MoS 2 and rubrene. Furthermore, being a building block, the MoS 2 /rubrene ambipolar transistors are used to fabricate CMOS (complementary metal oxide semiconductor) inverters that show good performance with a gain of 2.3 at a switching threshold voltage of -26 V. This work paves a way to the novel organic/inorganic ultrathin heterostructure based flexible electronics and optoelectronic devices. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  8. AlGaN Channel Transistors for Power Management and Distribution

    Science.gov (United States)

    VanHove, James M.

    1996-01-01

    Contained within is the Final report of a Phase 1 SBIR program to develop AlGaN channel junction field effect transistors (JFET). The report summarizes our work to design, deposit, and fabricate JFETS using molecular beam epitaxy growth AlGaN. Nitride growth is described using a RF atomic nitrogen plasma source. Processing steps needed to fabricate the device such as ohmic source-drain contacts, reactive ion etching, gate formation, and air bride fabrication are documented. SEM photographs of fabricated power FETS are shown. Recommendations are made to continue the effort in a Phase 2 Program.

  9. Enhanced Device and Circuit-Level Performance Benchmarking of Graphene Nanoribbon Field-Effect Transistor against a Nano-MOSFET with Interconnects

    Directory of Open Access Journals (Sweden)

    Huei Chaeng Chin

    2014-01-01

    Full Text Available Comparative benchmarking of a graphene nanoribbon field-effect transistor (GNRFET and a nanoscale metal-oxide-semiconductor field-effect transistor (nano-MOSFET for applications in ultralarge-scale integration (ULSI is reported. GNRFET is found to be distinctly superior in the circuit-level architecture. The remarkable transport properties of GNR propel it into an alternative technology to circumvent the limitations imposed by the silicon-based electronics. Budding GNRFET, using the circuit-level modeling software SPICE, exhibits enriched performance for digital logic gates in 16 nm process technology. The assessment of these performance metrics includes energy-delay product (EDP and power-delay product (PDP of inverter and NOR and NAND gates, forming the building blocks for ULSI. The evaluation of EDP and PDP is carried out for an interconnect length that ranges up to 100 μm. An analysis, based on the drain and gate current-voltage (Id-Vd and Id-Vg, for subthreshold swing (SS, drain-induced barrier lowering (DIBL, and current on/off ratio for circuit implementation is given. GNRFET can overcome the short-channel effects that are prevalent in sub-100 nm Si MOSFET. GNRFET provides reduced EDP and PDP one order of magnitude that is lower than that of a MOSFET. Even though the GNRFET is energy efficient, the circuit performance of the device is limited by the interconnect capacitances.

  10. Performance improvement of junctionless field effect transistors using p-GaAs/AlGaAs heterostructure

    Science.gov (United States)

    Bajelan, F.; Goharrizi, A. Yazdanpanah; Faez, R.; Darvish, G.

    2017-10-01

    The performance analysis of junctionless (JL) gate-all-around (GAA) metal oxide semiconductor field effect transistors (MOSFETs) is investigated using the Non-Equilibrium Green's Function (NEGF) formalism. The main problem of JL transistors is found to be the OFF-state current. In the present work, the OFF-state current of such devices is decreased by choosing channel materials with a large band gap and heavy effective mass. Our simulation results show that the OFF-state current of JL transistors with p-type GaAs is less than that of n-type GaAs. Plus, the heterostructure (HES) channel is proposed in this study for improving the device characteristics of JL-FETs as compared to homostructure (HOS). Therefore, p-type GaAs and GaAs/AlGaAs are used as the channel material for HOS and HES devices, respectively. The simulation is performed for different thicknesses of GaAs and AlGaAs with a fixed diameter of 5 nm for the nanowire. It is shown that the optimum electronic characteristics of HES devices is achieved when the thicknesses of GaAs and AlGaAs layers are chosen to be 0.5 nm and 4 nm, respectively. OFF-state current (IOFF) of 5.32 × 10-16 A, ON-state current (ION) of 6.44 × 10-6 A, ON/OFF current ratio (ION/IOFF) of 1.21 × 1010, subthreshold slope (SS) of 60.8 mV/dec, drain induced barrier lowering (DIBL) of 4.6 mV/V, and threshold voltage (VTH) of 330 mV are obtained for the proposed HES JL-GAA-FET.

  11. Chemical Gated Field Effect Transistor by Hybrid Integration of One-Dimensional Silicon Nanowire and Two-Dimensional Tin Oxide Thin Film for Low Power Gas Sensor.

    Science.gov (United States)

    Han, Jin-Woo; Rim, Taiuk; Baek, Chang-Ki; Meyyappan, M

    2015-09-30

    Gas sensors based on metal-oxide-semiconductor transistor with the polysilicon gate replaced by a gas sensitive thin film have been around for over 50 years. These are not suitable for the emerging mobile and wearable sensor platforms due to operating voltages and powers far exceeding the supply capability of batteries. Here we present a novel approach to decouple the chemically sensitive region from the conducting channel for reducing the drive voltage and increasing reliability. This chemically gated field effect transistor uses silicon nanowire for the current conduction channel with a tin oxide film on top of the nanowire serving as the gas sensitive medium. The potential change induced by the molecular adsorption and desorption allows the electrically floating tin oxide film to gate the silicon channel. As the device is designed to be normally off, the power is consumed only during the gas sensing event. This feature is attractive for the battery operated sensor and wearable electronics. In addition, the decoupling of the chemical reaction and the current conduction regions allows the gas sensitive material to be free from electrical stress, thus increasing reliability. The device shows excellent gas sensitivity to the tested analytes relative to conventional metal oxide transistors and resistive sensors.

  12. Dual-Mode Gas Sensor Composed of a Silicon Nanoribbon Field Effect Transistor and a Bulk Acoustic Wave Resonator: A Case Study in Freons.

    Science.gov (United States)

    Chang, Ye; Hui, Zhipeng; Wang, Xiayu; Qu, Hemi; Pang, Wei; Duan, Xuexin

    2018-01-25

    In this paper, we develop a novel dual-mode gas sensor system which comprises a silicon nanoribbon field effect transistor (Si-NR FET) and a film bulk acoustic resonator (FBAR). We investigate their sensing characteristics using polar and nonpolar organic compounds, and demonstrate that polarity has a significant effect on the response of the Si-NR FET sensor, and only a minor effect on the FBAR sensor. In this dual-mode system, qualitative discrimination can be achieved by analyzing polarity with the Si-NR FET and quantitative concentration information can be obtained using a polymer-coated FBAR with a detection limit at the ppm level. The complementary performance of the sensing elements provides higher analytical efficiency. Additionally, a dual mixture of two types of freons (CFC-113 and HCFC-141b) is further analyzed with the dual-mode gas sensor. Owing to the small size and complementary metal-oxide semiconductor (CMOS)-compatibility of the system, the dual-mode gas sensor shows potential as a portable integrated sensing system for the analysis of gas mixtures in the future.

  13. Au-free AlGaN/GaN heterostructure field-effect transistor with recessed overhang ohmic contacts using a Ti/Al bilayer

    International Nuclear Information System (INIS)

    Lee, Jae-Gil; Kim, Hyun-Seop; Han, Sang-Woo; Cha, Ho-Young; Kim, Dong-Hwan; Seo, Kwang-Seok

    2015-01-01

    We have developed a low-temperature ohmic contact process with a recessed overhang configuration for Au-free (complementary metal-oxide semiconductor) CMOS-compatible AlGaN/GaN heterostructure field effect transistors (HFETs). The recessed overhang configuration has a Ti/Al bilayer directly in contact with the AlGaN/GaN heterojunction interface at the recessed sidewall overlaid with the AlGaN barrier layer, which allows good and reproducible ohmic formation with low-temperature annealing. The optimum Ti/Al thickness was 40/200 nm, which resulted in an R c of 0.76 Ω mm with excellent surface morphology when annealed at 550 °C for 1 min. The device fabricated with a Ni/Mo gate exhibited a maximum drain current density of ∼500 mA mm −1 , a specific on-resistance of 1.35 mΩ cm 2 and a breakdown voltage of >1 kV. (paper)

  14. Simulation study of 14-nm-gate III-V trigate field effect transistor devices with In1−xGaxAs channel capping layer

    Directory of Open Access Journals (Sweden)

    Cheng-Hao Huang

    2015-06-01

    Full Text Available In this work, we study characteristics of 14-nm-gate InGaAs-based trigate MOSFET (metal-oxide-semiconductor field effect transistor devices with a channel capping layer. The impacts of thickness and gallium (Ga concentration of the channel capping layer on the device characteristic are firstly simulated and optimized by using three-dimensional quantum-mechanically corrected device simulation. Devices with In1−xGaxAs/In0.53Ga0.47As channels have the large driving current owing to small energy band gap and low alloy scattering at the channel surface. By simultaneously considering various physical and switching properties, a 4-nm-thick In0.68Ga0.32As channel capping layer can be adopted for advanced applications. Under the optimized channel parameters, we further examine the effects of channel fin angle and the work-function fluctuation (WKF resulting from nano-sized metal grains of NiSi gate on the characteristic degradation and variability. To maintain the device characteristics and achieve the minimal variation induced by WKF, the physical findings of this study indicate a critical channel fin angle of 85o is needed for the device with an averaged grain size of NiSi below 4x4 nm2.

  15. Capacitive effective thickness of a few nanometers by atomic layer deposition and device performance in Ge gate-all-around fin field effect transistors

    Science.gov (United States)

    Chu, Chu-Lin; Chen, Bo-Yuan; Fuh, Yiin-Kuen

    2015-10-01

    Ge gate-all-around fin field-effect transistors (Ge FinFETs) with a capacitive effective thickness of a few nanometers have been successfully achieved via atomic-layer-deposited (ALD) high-dielectric Al2O3 on GeO2/Ge and by adopting low-cost thermo ALD equipment. The MOS interface properties of the ZrO2 or Al2O3/GeO2/Ge structures have been studied systematically. It has been found that a GeO2 interfacial layer that is greater than approximately 2.5 nm results in a significant degradation of the MOS interfaces, while an equivalent oxide thickness of MOS interface quality obtained with the technique developed for high-permittivity/Ge gate stacks is also extremely useful for the fabrication of triangle-fin complementary metal oxide semiconductor devices. An I/I ratio of 3.2×104 and a subthreshold swing of 103 mV/dec were obtained for the triangular n-type Ge gate-all-around FET with (111) sidewalls. The drain current at VGS-VT=VDS=-1.5 V is 88 mA/mm.

  16. Dual-Mode Gas Sensor Composed of a Silicon Nanoribbon Field Effect Transistor and a Bulk Acoustic Wave Resonator: A Case Study in Freons

    Directory of Open Access Journals (Sweden)

    Ye Chang

    2018-01-01

    Full Text Available In this paper, we develop a novel dual-mode gas sensor system which comprises a silicon nanoribbon field effect transistor (Si-NR FET and a film bulk acoustic resonator (FBAR. We investigate their sensing characteristics using polar and nonpolar organic compounds, and demonstrate that polarity has a significant effect on the response of the Si-NR FET sensor, and only a minor effect on the FBAR sensor. In this dual-mode system, qualitative discrimination can be achieved by analyzing polarity with the Si-NR FET and quantitative concentration information can be obtained using a polymer-coated FBAR with a detection limit at the ppm level. The complementary performance of the sensing elements provides higher analytical efficiency. Additionally, a dual mixture of two types of freons (CFC-113 and HCFC-141b is further analyzed with the dual-mode gas sensor. Owing to the small size and complementary metal-oxide semiconductor (CMOS-compatibility of the system, the dual-mode gas sensor shows potential as a portable integrated sensing system for the analysis of gas mixtures in the future.

  17. Photosensitive N channel MOSFET device on silicon on sapphire substrate

    International Nuclear Information System (INIS)

    Le Goascoz, V.; Borel, J.

    1975-01-01

    An anomalous behavior of the N channel output current characteristic in a SOS MOSFET with a floating bulk is described. Such a phenomenon can be used in a photosensitive device with internal gain. Such devices can be used on SOS substrates to achieve integrated circuits with high insulating voltages and data transmission by optical means [fr

  18. Climate Change and Closure of Thyborøn Channel

    DEFF Research Database (Denmark)

    Larsen, Torben

    passed the so-called Thyborøn Act after which the Thyborøn Channel should be closed by a dam including a ship lock and a sluice for water exchange. Because of lack of money and professional disagreement the works progressed very slowly and in 1972 the act was repealed without finishing the final closure...... of the channel. The coasts in the Limfjord are most sensitive to flooding and the climate changes will call for many types of precautions for the rising sea level. The closure of Thyborøn Channel should be understood as an alternative to many local solutions especially in the western part of the fjord...

  19. Top-down nanofabrication of silicon nanoribbon field effect transistor (Si-NR FET) for carcinoembryonic antigen detection.

    Science.gov (United States)

    Bao, Zengtao; Sun, Jialin; Zhao, Xiaoqian; Li, Zengyao; Cui, Songkui; Meng, Qingyang; Zhang, Ye; Wang, Tong; Jiang, Yanfeng

    2017-01-01

    Sensitive and quantitative detection of tumor markers is highly required in the clinic for cancer diagnosis and consequent treatment. A field-effect transistor-based (FET-based) nanobiosensor emerges with characteristics of being label-free, real-time, having high sensitivity, and providing direct electrical readout for detection of biomarkers. In this paper, a top-down approach is proposed and implemented to fulfill a novel silicon nano-ribbon FET, which acts as biomarker sensor for future clinical application. Compared with the bottom-up approach, a top-down fabrication approach can confine width and length of the silicon FET precisely to control its electrical properties. The silicon nanoribbon (Si-NR) transistor is fabricated on a Silicon-on-Insulator (SOI) substrate by a top-down approach with complementary metal oxide semiconductor (CMOS)-compatible technology. After the preparation, the surface of Si-NR is functionalized with 3-aminopropyltriethoxysilane (APTES). Glutaraldehyde is utilized to bind the amino terminals of APTES and antibody on the surface. Finally, a microfluidic channel is integrated on the top of the device, acting as a flowing channel for the carcinoembryonic antigen (CEA) solution. The Si-NR FET is 120 nm in width and 25 nm in height, with ambipolar electrical characteristics. A logarithmic relationship between the changing ratio of the current and the CEA concentration is measured in the range of 0.1-100 ng/mL. The sensitivity of detection is measured as 10 pg/mL. The top-down fabricated biochip shows feasibility in direct detecting of CEA with the benefits of real-time, low cost, and high sensitivity as a promising biosensor for tumor early diagnosis.

  20. N Channel JFET Based Digital Logic Gate Structure

    Science.gov (United States)

    Krasowski, Michael J (Inventor)

    2013-01-01

    An apparatus is provided that includes a first field effect transistor with a source tied to zero volts and a drain tied to voltage drain drain (Vdd) through a first resistor. The apparatus also includes a first node configured to tie a second resistor to a third resistor and connect to an input of a gate of the first field effect transistor in order for the first field effect transistor to receive a signal. The apparatus also includes a second field effect transistor configured as a unity gain buffer having a drain tied to Vdd and an uncommitted source.

  1. The impact of uniaxial stress on subband structure and mobility of strain Si NMOSFETs

    International Nuclear Information System (INIS)

    Chang, S.T.; Liao, S.H.; Lin, C.-Y.

    2008-01-01

    An effect of stress distortion on the conduction band structure was derived by k.p method considering a second order perturbation. From k.p conduction band calculations, stress-induced band edge split and the change of effective mass are quantitatively evaluated. The physical reasons of warped subband structure and abnormal mobility enhancement by uniaxial stress are investigated. Variation rates of experimental electron mobility in the silicon n-channel metal-oxide-semiconductor field-effect-transistors under a [110] uniaxial stress as a function of channel direction is theoretically studied

  2. The comparison of gamma-radiation and electrical stress influences on oxide and interface defects in power VDMOSFET

    Directory of Open Access Journals (Sweden)

    Đorić-Veljković Snežana M.

    2013-01-01

    Full Text Available The behaviour of oxide and interface defects in n-channel power vertical double-diffused metal-oxide-semiconductor field-effect transistors, firstly degraded by the gamma-irradiation and electric field and subsequently recovered and annealed, is presented. By analyzing the transfer characteristic shifts, the changes of threshold voltage and underlying changes of gate oxide and interface trap densities during the stress (recovery, annealing of investigated devices, it is shown that these two types of stress influence differently on the gate oxide and the SiO2-Si interface. [Projekat Ministarstva nauke Republike Srbije, br. OI171026

  3. Silicon device performance measurements to support temperature range enhancement

    Science.gov (United States)

    Johnson, R. Wayne; Askew, Ray; Bromstead, James; Weir, Bennett

    1991-01-01

    The results of the NPN bipolar transistor (BJT) (2N6023) breakdown voltage measurements were analyzed. Switching measurements were made on the NPN BJT, the insulated gate bipolar transistor (IGBT) (TA9796) and the N-channel metal oxide semiconductor field effect transistor (MOSFET) (RFH75N05E). Efforts were also made to build a H-bridge inverter. Also discussed are the plans that have been made to do life testing on the devices, to build an inductive switching test circuit and to build a dc/dc switched mode converter.

  4. Ambipolar organic field-effect transistors based on a solution-processed methanofullerene

    NARCIS (Netherlands)

    Anthopoulos, Thomas D.; Tanase, Cristina; Setayesh, Sepas; Meijer, Eduard J.; Hummelen, Jan C.; Blom, Paul W.M.; de Leeuw, Dagobert

    2004-01-01

    Organic field-effect transistors (OFETs, see Figure), based on the solution-processible methanofullerene [6,6]-phenyl-C-61-butyric acid methyl ester (PCBM), have been fabricated in a bottom-contact device configuration using gold electrodes. The OFET functions either as a p- or n-channel device,

  5. On device design for steep-slope negative-capacitance field-effect-transistor operating at sub-0.2V supply voltage with ferroelectric HfO2 thin film

    Directory of Open Access Journals (Sweden)

    Masaharu Kobayashi

    2016-02-01

    Full Text Available Internet-of-Things (IoT technologies require a new energy-efficient transistor which operates at ultralow voltage and ultralow power for sensor node devices employing energy-harvesting techniques as power supply. In this paper, a practical device design guideline for low voltage operation of steep-slope negative-capacitance field-effect-transistors (NCFETs operating at sub-0.2V supply voltage is investigated regarding operation speed, material requirement and energy efficiency in the case of ferroelectric HfO2 gate insulator, which is the material fully compatible to Complementary Metal-Oxide-Semiconductor (CMOS process technologies. A physics-based numerical simulator was built to design NCFETs with the use of experimental HfO2 material parameters by modeling the ferroelectric gate insulator and FET channel simultaneously. The simulator revealed that NCFETs with ferroelectric HfO2 gate insulator enable hysteresis-free operation by setting appropriate operation point with a few nm thick gate insulator. It also revealed that, if the finite response time of spontaneous polarization of the ferroelectric gate insulator is 10-100psec, 1-10MHz operation speed can be achieved with negligible hysteresis. Finally, by optimizing material parameters and tuning negative capacitance, 2.5 times higher energy efficiency can be achieved by NCFET than by conventional MOSFETs. Thus, NCFET is expected to be a new CMOS technology platform for ultralow power IoT.

  6. Trap density of states in n-channel organic transistors: variable temperature characteristics and band transport

    International Nuclear Information System (INIS)

    Cho, Joung-min; Akiyama, Yuto; Kakinuma, Tomoyuki; Mori, Takehiko

    2013-01-01

    We have investigated trap density of states (trap DOS) in n-channel organic field-effect transistors based on N,N ’-bis(cyclohexyl)naphthalene diimide (Cy-NDI) and dimethyldicyanoquinonediimine (DMDCNQI). A new method is proposed to extract trap DOS from the Arrhenius plot of the temperature-dependent transconductance. Double exponential trap DOS are observed, in which Cy-NDI has considerable deep states, by contrast, DMDCNQI has substantial tail states. In addition, numerical simulation of the transistor characteristics has been conducted by assuming an exponential trap distribution and the interface approximation. Temperature dependence of transfer characteristics are well reproduced only using several parameters, and the trap DOS obtained from the simulated characteristics are in good agreement with the assumed trap DOS, indicating that our analysis is self-consistent. Although the experimentally obtained Meyer-Neldel temperature is related to the trap distribution width, the simulation satisfies the Meyer-Neldel rule only very phenomenologically. The simulation also reveals that the subthreshold swing is not always a good indicator of the total trap amount, because it also largely depends on the trap distribution width. Finally, band transport is explored from the simulation having a small number of traps. A crossing point of the transfer curves and negative activation energy above a certain gate voltage are observed in the simulated characteristics, where the critical V G above which band transport is realized is determined by the sum of the trapped and free charge states below the conduction band edge

  7. Impedance Characterization of the Capacitive field-Effect pH-Sensor Based on a thin-Layer Hafnium Oxide Formed by Atomic Layer Deposition

    Directory of Open Access Journals (Sweden)

    Michael LEE

    2014-05-01

    Full Text Available As a sensing element, silicon dioxide (SiO2 has been applied within ion-sensitive field effect transistors (ISFET. However, a requirement of increasing pH-sensitivity and stability has observed an increased number of insulating materials that obtain high-k gate being applied as FETs. The increased high-k gate reduces the required metal oxide layer and, thus, the fabrication of thin hafnium oxide (HfO2 layers by atomic layer deposition (ALD has grown with interest in recent years. This metal oxide presents advantageous characteristics that can be beneficial for the advancements within miniaturization of complementary metal oxide semiconductor (CMOS technology. In this article, we describe a process for fabrication of HfO2 based on ALD by applying water (H2O as the oxygen precursor. As a first, electrochemical impedance spectroscopy (EIS measurements were performed with varying pH (2-10 to demonstrate the sensitivity of HfO2 as a potential pH sensing material. The Nyquist plot demonstrates a high clear shift of the polarization resistance (Rp between pH 6-10 (R2 = 0.9986, Y = 3,054X + 12,100. At acidic conditions (between pH 2-10, the Rp change was small due to the unmodified oxide gate (R2 = 0.9655, Y = 2,104X + 4,250. These preliminary results demonstrate the HfO2 substrate functioned within basic to neutral conditions and establishes a great potential for applying HfO2 as a dielectric material for future pH measuring FET sensors.

  8. N-channel thin-film transistors based on 1,4,5,8-naphthalene tetracarboxylic dianhydride with ultrathin polymer gate buffer layer

    International Nuclear Information System (INIS)

    Tanida, Shinji; Noda, Kei; Kawabata, Hiroshi; Matsushige, Kazumi

    2009-01-01

    N-channel operation of thin-film transistors based on 1,4,5,8-naphthalene tetracarboxylic dianhydride (NTCDA) with a 9-nm-thick poly(methyl methacrylate) (PMMA) gate buffer layer was examined. The uniform coverage of the ultrathin PMMA layer on an SiO 2 gate insulator, verified by X-ray reflectivity measurement, caused the increase of electron field-effect mobility because of the suppression of electron traps existing on the SiO 2 surface. In addition, air stability for n-channel operation of the NTCDA transistor was also improved by the PMMA layer which possibly prevented the adsorption of ambient water molecules onto the SiO 2 surface.

  9. Millimeter wave complementary metal-oxide-semiconductor on-chip hexagonal ferrite circulator

    Science.gov (United States)

    Chao, Liu; Fu, Enjin; Koomson, Valencia J.; Afsar, Mohammed N.

    2014-05-01

    Hexagonal ferrites, such as BaFe12O19 and SrFe12O19, have strong uniaxial anisotropic magnetic field and remanent magnetism. By employing these properties, magnetic devices, such as phase shifter, isolator and circulator, can work up to tens of GHz frequency range without strong external magnetic field or even self-biasing. As the monolithic microwave integrated circuit extends to higher millimeter wave frequencies, the demand for high performance integrated passive magnetic components is more and more eminent. The micro- and nano-sized hexagonal ferrite can be conveniently utilized to fabricate magnetic components integrated in CMOS circuits via post processing. A nano-ferrite circulator working at 60 GHz is designed, fabricated, and integrated into the CMOS front end for the first time.

  10. Millimeter wave complementary metal-oxide-semiconductor on-chip hexagonal nano-ferrite circulator

    Science.gov (United States)

    Chao, Liu; Oukacha, Hassan; Fu, Enjin; Koomson, Valencia Joyner; Afsar, Mohammed N.

    2015-05-01

    Hexagonal ferrites such as M-type BaFe12O19 and SrFe12O19 have strong uniaxial anisotropic magnetic field and remanent magnetism. The nano-sized ferrite powder exhibits high compatibility and processability in composite material. New magnetic devices using the M-type ferrite materials can work in the tens of GHz frequency range from microwave to millimeter wave without the application of strong external magnetic field. The micro- and nano-sized hexagonal ferrite can be conveniently utilized to fabricate magnetic components integrated in CMOS integrated circuits as thin as several micrometers. The micro-fabrication method of such nano ferrite device is presented in this paper. A circulator working at 60 GHz is designed and integrated into the commercial CMOS process. The circulator exhibits distinct circulation properties in the frequency range from 56 GHz to 58 GHz.

  11. Electrosprayed Metal Oxide Semiconductor Films for Sensitive and Selective Detection of Hydrogen Sulfide

    NARCIS (Netherlands)

    Ghimbeu, C.M.; Lumbreras, M.; Schoonman, J.; Siadat, M.

    2009-01-01

    Semiconductor metal oxide films of copper-doped tin oxide (Cu-SnO2), tungsten oxide (WO3) and indium oxide (In2O3) were deposited on a platinum coated alumina substrate employing the electrostatic spray deposition technique (ESD). The morphology studied with scanning electron microscopy (SEM) and

  12. Low Temperature Processed Complementary Metal Oxide Semiconductor (CMOS) Device by Oxidation Effect from Capping Layer

    KAUST Repository

    Wang, Zhenwei

    2015-04-20

    In this report, both p- and n-type tin oxide thin-film transistors (TFTs) were simultaneously achieved using single-step deposition of the tin oxide channel layer. The tuning of charge carrier polarity in the tin oxide channel is achieved by selectively depositing a copper oxide capping layer on top of tin oxide, which serves as an oxygen source, providing additional oxygen to form an n-type tin dioxide phase. The oxidation process can be realized by annealing at temperature as low as 190°C in air, which is significantly lower than the temperature generally required to form tin dioxide. Based on this approach, CMOS inverters based entirely on tin oxide TFTs were fabricated. Our method provides a solution to lower the process temperature for tin dioxide phase, which facilitates the application of this transparent oxide semiconductor in emerging electronic devices field.

  13. Experimental characterization of the dominant multiple nodes charge collection mechanism in metal oxide-semiconductor transistors

    Science.gov (United States)

    Song, Ruiqiang; Chen, Shuming; Chi, Yaqing; Wu, Zhenyu; Liang, Bin; Chen, Jianjun; Xu, Jingyan; Hao, Peipei; Yu, Junting

    2017-06-01

    We propose an experimental method to investigate the dominant multiple node charge collection mechanism. A transistor array-based test structure is used to distinguish charge collection owing to the drift-diffusion and parasitic bipolar amplification effect. Heavy ion experimental results confirm that drift-diffusion dominates multiple node charge collection at low linear energy transfer (LET). However, the parasitic bipolar amplification effect dominates it at high LET. We also propose simple equations to determine the critical LET which may change the dominant multiple node charge collection mechanism. The calculated LET value is consistent with the heavy ion experimental results.

  14. Composite metal oxide semiconductor based photodiodes for solar panel tracking applications

    Energy Technology Data Exchange (ETDEWEB)

    Al-Ghamdi, Ahmed A., E-mail: aghamdi90@hotmail.com [Department of Physics, Faculty of Science, King Abdulaziz University, Jeddah (Saudi Arabia); Dere, A. [Department of Physics, Faculty of Science, Firat University, Elazig (Turkey); Tataroğlu, A. [Department of Physics, Faculty of Science, Gazi University, Ankara (Turkey); Arif, Bilal [Department of Physics, Faculty of Science, Firat University, Elazig (Turkey); Yakuphanoglu, F. [Department of Physics, Faculty of Science, King Abdulaziz University, Jeddah (Saudi Arabia); Department of Physics, Faculty of Science, Firat University, Elazig (Turkey); El-Tantawy, Farid [Department of Physics, Faculty of Science, Suez Canal University, Ismailia (Egypt); Farooq, W.A. [Physics and Astronomy Department, College of Science, King Saud University, Riyadh (Saudi Arabia)

    2015-11-25

    The Zn{sub 1−x}Al{sub x}O:Cu{sub 2}O composite films were synthesized by the sol gel method to fabricate photodiodes. The transparent metal oxide Zn{sub 1−x}Al{sub x}O:Cu{sub 2}O thin films were grown on p-Si substrates by spin coating technique. Electrical characterization of the p-Si/AZO:Cu{sub 2}O photodiodes was performed by current–voltage and capacitance–conductance–voltage characteristics under dark and various illumination conditions. The transient photocurrent of the diodes increases with increase in illumination intensity. The photoconducting mechanism of the diodes is controlled by the continuous distribution of trap levels. The photocapacitance and photoconductivity of the diodes are decreased with increasing Cu{sub 2}O content. The series resistance–voltage behavior confirms the presence of the interface states in the interface of the diodes. The photoresponse properties of the diodes indicate that the p-Si/Zn{sub 1−x}Al{sub x}O–Cu{sub 2}O diodes can be used as a photosensor in solar panel tracking applications. - Highlights: • Zn{sub 1−x}Al{sub x}O:Cu{sub 2}O composite films were synthesized by the sol gel method. • p-Si/Zn{sub 1−x}Al{sub x}O–Cu{sub 2}O diodes were fabricated. • p-Si/Zn{sub 1−x}Al{sub x}O–Cu{sub 2}O diodes can be used in the optoelectronic applications.

  15. Adsorption smoke detector made of thin-film metal-oxide semiconductor sensor

    CERN Document Server

    Adamian, A Z; Aroutiounian, V M

    2001-01-01

    Based on results of investigations of the thin-film smoke sensors made of Bi sub 2 O sub 3 , irresponsive to a change in relative humidity of the environment, an absorption smoke detector processing circuit, where investigated sensor is used as a sensitive element, is proposed. It is shown that such smoke detector is able to function reliably under conditions of high relative humidity of the environment (up to 100%) and it considerably exceeds the known smoke detectors by the sensitivity threshold.

  16. Adsorption smoke detector made of thin-film metal-oxide semiconductor sensor

    International Nuclear Information System (INIS)

    Adamian, A.Z.; Adamian, Z.N.; Aroutiounian, V.M.

    2001-01-01

    Based on results of investigations of the thin-film smoke sensors made of Bi 2 O 3 , irresponsive to a change in relative humidity of the environment, an absorption smoke detector processing circuit, where investigated sensor is used as a sensitive element, is proposed. It is shown that such smoke detector is able to function reliably under conditions of high relative humidity of the environment (up to 100%) and it considerably exceeds the known smoke detectors by the sensitivity threshold

  17. Electronic defect levels in continuous wave laser annealed silicon metal oxide semiconductor devices

    Science.gov (United States)

    Cervera, M.; Garcia, B. J.; Martinez, J.; Garrido, J.; Piqueras, J.

    1988-09-01

    The effect of laser treatment on the bulk and interface states of the Si-SiO2 structure has been investigated. The annealing was performed prior to the gate metallization using a continuous wave Ar+ laser. For low laser powers the interface state density seems to decrease slightly in comparison with untreated samples. However, for the highest irradiating laser powers a new bulk level at 0.41 eV above the valence band with concentrations up to 1015 cm-3 arises probably due to the electrical activation of the oxygen diluted in the Czochralski silicon. Later postmetallization annealings reduce the interface state density to values in the 1010 cm-2 eV-1 range but leave the concentration of the 0.41-eV center nearly unchanged.

  18. Experimental investigation of a shielded complementary Metal-Oxide Semiconductor (MOS) structure

    Science.gov (United States)

    Lin, H. C.; Halsor, J. L.

    1974-01-01

    A shielded integrated complimentary MOS transistor structure is described which is used to prevent field inversion in the region not occupied by the gates and which permits the use of a thinner field oxide, reduces the chip area, and has provision for simplified multilayer connections. The structure is used in the design of a static shift register and results in a 20% reduction in area.

  19. Metal Oxide/Semiconductor Heterojunctions as Carrier-Selective Contacts for Photovoltaic Applications

    Science.gov (United States)

    Man, Gabriel Jen Shi

    Solar radiation is a vast, distributed, and renewable energy source which Humanity can utilize via the photovoltaic effect. The goal of photovoltaic technology is to minimize the true costs, while maximizing the power conversion efficiency and lifetime of the cell/module. Interface-related approaches to achieving this goal are explored here, for two technologically-important classes of light absorbers: crystalline-silicon (c-Si) and metal halide perovskite (MHP). The simplest solar cell consists of a light absorber, sandwiched between two metals with dissimilar work functions. Carrier-selective contacts (CSC's), which are ubiquitous in modern solar cells, are added to improve the electrical performance. Solar cells require asymmetric carrier transport within the cell, which can be effected via electrostatic and/or effective fields, and CSC's augment the asymmetry by selectively transporting holes to one contact, and electrons to the other contact. The proper design and implementation of a CSC is crucial, as the performance, lifetime, and/or cost reduction of a solar cell can be hampered by a single interface or layer. A framework, consisting of eight core requirements, was developed from first-principles to evaluate the effectiveness of a given CSC. The framework includes some requirements which are well-recognized, such as the need for appropriate band offsets, and some requirements which are not well-recognized at the moment, such as the need for effective valence/conduction band density of states matching between the absorber and CSC. The application of the framework to multiple silicon-based and MHP-based CSC's revealed the difficulties of effectively designing and implementing a CSC. A poly(3-hexylthiophene)/c-Si heterojunction was found to be a near ideal hole-selective contact (HSC). Three metal oxide/c-Si heterojunctions initially expected to yield comparable electron-selective contacts (ESC's), titanium dioxide/c-Si (TiO2/c-Si), zinc oxide/c-Si (ZnO/c-Si), and tin dioxide/c-Si (SnO2/c-Si), were instead discovered to be widely different. The TiO2/MHP heterojunction was found to be a moderately ideal ESC, and the nickel oxide/MHP (NiOX/MHP) heterojunction is expected to be a good HSC. If interfacial lead di-iodide (PbI2) is intentionally or unintentionally deposited at the interfaces of a MHP solar cell, it is expected to be detrimental to the operation of the NiOX/MHP HSC, but not to the TiO2/MHP ESC.

  20. Electrosprayed metal oxide semiconductor films for sensitive and selective detection of hydrogen sulfide.

    Science.gov (United States)

    Ghimbeu, Camelia Matei; Lumbreras, Martine; Schoonman, Joop; Siadat, Maryam

    2009-01-01

    Semiconductor metal oxide films of copper-doped tin oxide (Cu-SnO(2)), tungsten oxide (WO(3)) and indium oxide (In(2)O(3)) were deposited on a platinum coated alumina substrate employing the electrostatic spray deposition technique (ESD). The morphology studied with scanning electron microscopy (SEM) and atomic force microscopy (AFM) shows porous homogeneous films comprising uniformly distributed aggregates of nano particles. The X-ray diffraction technique (XRD) proves the formation of crystalline phases with no impurities. Besides, the Raman cartographies provided information about the structural homogeneity. Some of the films are highly sensitive to low concentrations of H(2)S (10 ppm) at low operating temperatures (100 and 200 °C) and the best response in terms of R(air)/R(gas) is given by Cu-SnO(2) films (2500) followed by WO(3) (1200) and In(2)O(3) (75). Moreover, all the films exhibit no cross-sensitivity to other reducing (SO(2)) or oxidizing (NO(2)) gases.

  1. Synthesis methods, microscopy characterization and device integration of nanoscale metal oxide semiconductors for gas sensing.

    Science.gov (United States)

    Vander Wal, Randy L; Berger, Gordon M; Kulis, Michael J; Hunter, Gary W; Xu, Jennifer C; Evans, Laura

    2009-01-01

    A comparison is made between SnO(2), ZnO, and TiO(2) single-crystal nanowires and SnO(2) polycrystalline nanofibers for gas sensing. Both nanostructures possess a one-dimensional morphology. Different synthesis methods are used to produce these materials: thermal evaporation-condensation (TEC), controlled oxidation, and electrospinning. Advantages and limitations of each technique are listed. Practical issues associated with harvesting, purification, and integration of these materials into sensing devices are detailed. For comparison to the nascent form, these sensing materials are surface coated with Pd and Pt nanoparticles. Gas sensing tests, with respect to H(2), are conducted at ambient and elevated temperatures. Comparative normalized responses and time constants for the catalyst and noncatalyst systems provide a basis for identification of the superior metal-oxide nanostructure and catalyst combination. With temperature-dependent data, Arrhenius analyses are made to determine activation energies for the catalyst-assisted systems.

  2. Magnetic state dependent transient lateral photovoltaic effect in patterned ferromagnetic metal-oxide-semiconductor films

    Directory of Open Access Journals (Sweden)

    Isidoro Martinez

    2015-11-01

    Full Text Available We investigate the influence of an external magnetic field on the magnitude and dephasing of the transient lateral photovoltaic effect (T-LPE in lithographically patterned Co lines of widths of a few microns grown over naturally passivated p-type Si(100. The T-LPE peak-to-peak magnitude and dephasing, measured by lock-in or through the characteristic time of laser OFF exponential relaxation, exhibit a notable influence of the magnetization direction of the ferromagnetic overlayer. We show experimentally and by numerical simulations that the T-LPE magnitude is determined by the Co anisotropic magnetoresistance. On the other hand, the magnetic field dependence of the dephasing could be described by the influence of the Lorentz force acting perpendiculary to both the Co magnetization and the photocarrier drift directions. Our findings could stimulate the development of fast position sensitive detectors with magnetically tuned magnitude and phase responses.

  3. Development of a Silicon Metal-Oxide-Semiconductor-Based Qubit Using Spin Exchange Interactions Alone

    Science.gov (United States)

    2016-03-31

    Meeting of the Institute for Transdisciplinary Research in Quantum Computing, Montreal, Canada, April 18, 2013. 7. HongWen Jiang, "Exploration of Si...objectives. The exchange based qubit in Si MOS QDs, in our optimistic opinion, is now about one or two years away from surpassing the state-of-the- art in...qubits based on individual charges/spins in semiconductor quantum dots", Invited talk in Annual Meeting of the Institute for Transdisciplinary Research

  4. An Overview of Radiation-Induced Interface Traps in MOS (Metal-Oxide Semiconductor) Structures

    Science.gov (United States)

    1989-11-01

    continu- this hydrogen reached the interface it could ous-time-random-walk ( CTRW ) formalism break an Si-H bond producing H2 and a dan- developed by Montroll...al- Recently, Brown et al. applied CTRW analysis ready explained for the case of hole transport. to the H + transport, with very good results [711. 12

  5. Electron transport properties of indium oxide - indium nitride metal-oxide-semiconductor heterostructures

    Energy Technology Data Exchange (ETDEWEB)

    Wang, C.Y.; Hauguth, S.; Polyakov, V.; Schwierz, F.; Cimalla, V.; Kups, T.; Himmerlich, M.; Schaefer, J.A.; Krischok, S.; Ambacher, O. [Institute of Micro- and Nanotechnologies, Technical University Ilmenau, 98684 Ilmenau (Germany); Morales, F.M.; Lozano, J.G.; Gonzalez, D. [Dpto. de Ciencia de los Materiales e Ingenieria Metalurgica y Quimica Inorganica, Universidad de Cadiz, 11510 Cadiz (Spain); Lebedev, V.

    2008-07-01

    The structural, chemical and electron transport properties of In{sub 2}O{sub 3}/InN heterostructures and oxidized InN epilayers are reported. It is shown that the accumulation of electrons at the InN surface can be manipulated by the formation of a thin surface oxide layer. The epitaxial In{sub 2}O{sub 3}/InN heterojunctions show an increase in the electron concentration due to the increasing band banding at the heterointerface. The oxidation of InN results in improved transport properties and in a reduction of the sheet carrier concentration of the InN epilayer very likely caused by a passivation of surface donors. (copyright 2008 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim) (orig.)

  6. Trap states in AlGaN channel high-electron-mobility transistors

    International Nuclear Information System (INIS)

    Zhao, ShengLei; Zhang, Kai; Ha, Wei; Chen, YongHe; Zhang, Peng; Zhang, JinCheng; Hao, Yue; Ma, XiaoHua

    2013-01-01

    Frequency dependent capacitance and conductance measurements were performed to analyze the trap states in the AlGaN channel high-electron-mobility transistors (HEMTs). The trap state density in the AlGaN channel HEMTs decreases from 1.26 × 10 13  cm −2 eV −1 at the energy of 0.33 eV to 4.35 × 10 11  cm −2 eV −1 at 0.40 eV. Compared with GaN channel HEMTs, the trap states in the AlGaN channel HEMTs have deeper energy levels. The trap with deeper energy levels in the AlGaN channel HEMTs is another reason for the reduction of the reverse gate leakage current besides the higher Schottky barrier height

  7. Trap states in AlGaN channel high-electron-mobility transistors

    Science.gov (United States)

    Zhao, ShengLei; Zhang, Kai; Ha, Wei; Chen, YongHe; Zhang, Peng; Zhang, JinCheng; Ma, XiaoHua; Hao, Yue

    2013-11-01

    Frequency dependent capacitance and conductance measurements were performed to analyze the trap states in the AlGaN channel high-electron-mobility transistors (HEMTs). The trap state density in the AlGaN channel HEMTs decreases from 1.26 × 1013 cm-2eV-1 at the energy of 0.33 eV to 4.35 × 1011 cm-2eV-1 at 0.40 eV. Compared with GaN channel HEMTs, the trap states in the AlGaN channel HEMTs have deeper energy levels. The trap with deeper energy levels in the AlGaN channel HEMTs is another reason for the reduction of the reverse gate leakage current besides the higher Schottky barrier height.

  8. Design and Simulation of Voting and Protective Logic Sub Modules (V and PL) for Nuclear Power Plants

    International Nuclear Information System (INIS)

    Harzawardi Bin Hasim; Mohd Sabri Minhat; Syirrazie Che Soh; Mohd Idris Taib

    2011-01-01

    V and PL is one of the importance modules in Reactor Protection System (RPS). In Nuclear power plant, V and PL submodules output is high when any two in put off our inputs are high. This paper design and simulate V and PL submodules using LT spice IV software. N-channel Metal Oxide Semiconductor(NMOS) and p-channel Metal Oxide Semiconductor (PMOS) were used to design Complementary Metal Oxide Semiconductor (CMOS) gated. Thus all the gated was applied to design V and PL submodules. This design concept practiced bottom up design rule. At the end, this V and PL function correctly as expected. (author)

  9. Micro pH Sensors and Biosensors Based on Electrochemical Field Effect Transistors

    Science.gov (United States)

    Sasano, Junji; Niwa, Daisuke; Osaka, Tetsuya

    A study on ion-sensing using field effect transistor (FET) was begun by Bergveld in the 1970s [1-3]. The ion-sensitive (IS) FET is now widely used as a miniaturized pH sensor, commercialized by some companies. First, the principle and structure of the ISFET are introduced in this section. A basic design of ISFET is shown in Fig. 10.1 a. ISFET has silicon substrate with field-effect structures such as electrolyte/IS layer/(insulator)/semiconductor structures; the space charge region in the semiconductor is modulated depending on the gate voltage (V g), same as a typical metal-oxide-semiconductor (MOS) FET. A typical bias V g versus drain-source current (I ds) characteristic of the device that has silicon nitride/silicon dioxide/silicon is shown in Fig. 10.1 b. This characteristic is quite similar to the MOSFET. A prominent difference between ISFET and MOSFET is that the gate voltage for the operation of the device is applied by an electrochemical reference electrode through the electrolyte in contact with the gate insulator. The threshold voltage (V th) could shift according to the value of the pH of the solution. In the MOSFET, the V th would shift depending on the change in the space charge region in the MOS capacitor structure by the application of V g. On the other hand, the V th in ISFET would shift according to the change in the surface potential in the electrolyte/IS layer interface. Therefore, the IS layers and their interfaces in ISFET play an important role in the performance of pH responsibility. It is well-known that the silicon nitride surface shows a good pH response in solution. The silicon nitride layer is often formed by plasma-enhanced chemical vapor deposition (PECVD), which is generally formed at the thickness of 100-500 nm. The V g vs. I ds, characteristics of the silicon nitride-based ISFET indicate a good pH responsibility of 58 mV/decade that shows Nernstian response (Fig. 10.1 c). The shift of the V th depends on the changes of surface

  10. Irradiation of: MOS field effect structures effect of the radiation dose

    International Nuclear Information System (INIS)

    Leray, J.L.

    1989-01-01

    The radiation effects on the structure and the operation of a metal-oxide semiconductor (MOS) are studied. The phenomenology of the radiation damage is analyzed as a function of the accumulated radiation dose and the time. The chronology of the phenomena which takes place in the oxide and the radiation transient phases in MOS structures are discussed. The equivalence of different radiations on SiO2 and other semiconductors is analyzed. The models applied to the study of the radiation permanent effects are reviewed [fr

  11. Tunneling field effect transistor technology

    CERN Document Server

    Chan, Mansun

    2016-01-01

    This book provides a single-source reference to the state-of-the art in tunneling field effect transistors (TFETs). Readers will learn the TFETs physics from advanced atomistic simulations, the TFETs fabrication process and the important roles that TFETs will play in enabling integrated circuit designs for power efficiency. · Provides comprehensive reference to tunneling field effect transistors (TFETs); · Covers all aspects of TFETs, from device process to modeling and applications; · Enables design of power-efficient integrated circuits, with low power consumption TFETs.

  12. Towards Prognostics of Power MOSFETs: Accelerated Aging and Precursors of Failure

    Data.gov (United States)

    National Aeronautics and Space Administration — This paper presents research results dealing with power MOSFETs (metal oxide semiconductor field effect tran- sistor) within the prognostics and health management of...

  13. Comparison of proton irradiated P-channel and N-channel CCDs

    Energy Technology Data Exchange (ETDEWEB)

    Gow, Jason P.D., E-mail: j.p.d.gow@open.ac.uk [e2v Centre for Electronic Imaging, Planetary and Space Sciences, The Open University, Walton Hall, Milton Keynes MK7 6AA (United Kingdom); Murray, Neil J.; Holland, Andrew D. [e2v Centre for Electronic Imaging, Planetary and Space Sciences, The Open University, Walton Hall, Milton Keynes MK7 6AA (United Kingdom); Burt, David; Pool, Peter J. [e2v Technologies plc, 106 Waterhouse Lance, Chelmsford, Essex CM1 2QU (United Kingdom)

    2012-09-11

    Charge transfer inefficiency and dark current effects are compared for e2v Technologies plc p-channel and n-channel CCDs, both irradiated with protons. The p-channel devices, prior to their irradiation, exhibited twice the dark current and considerable worse charge transfer inefficiency (CTI) than a typical n-channel. The radiation induced increase in dark current was found to be comparable with n-channel CCDs, and its temperature dependence suggest that the divacancy is the dominant source of thermally generated dark current pre- and post-irradiation. The factor of improvement in tolerance to radiation induced CTI varied by between 15 and 25 for serial CTI and 8 and 3 for parallel CTI, between -70 Degree-Sign C and -110 Degree-Sign C, respectively.

  14. Field Effect Transistor in Nanoscale

    Science.gov (United States)

    2017-04-26

    significant alteration in transport behaviour of these molecular junctions. 15. SUBJECT TERMS Theory , Nanoscale, Field Effect Transistor (FET), Devices...Density Functional Theory (DFT), Non-equilibrium Green Function 16. SECURITY CLASSIFICATION OF: 17. LIMITATION OF ABSTRACT SAR 18. NUMBER OF PAGES     13...Keep in mind the amount of funding you received relative to the amount of effort you put into the report. References: 1. J. R. Heath and M

  15. Improved compact model for double-gate tunnel field-effect transistors by the rigorous consideration of gate fringing field

    Science.gov (United States)

    Kim, Sangwan; Choi, Woo Young

    2017-08-01

    In this work, the accuracy of a compact current-voltage (I-V) model for double-gate n-channel tunnel field-effect transistors (TFETs) is improve by considering outer and inner gate fringing field effects. The refined model is benchmarked against technology computer-aided design (TCAD) device simulations and compared against a previously published compact model. The normalized root-mean-square error for current in the linear region of operation (i.e., for 0.05 V drain voltage) is reduced from ˜593 to ˜5%.

  16. Pronounced Side Chain Effects in Triple Bond-Conjugated Polymers Containing Naphthalene Diimides for n-Channel Organic Field-Effect Transistors

    KAUST Repository

    Nam, Sungho

    2018-03-23

    Three triple bond-conjugated naphthalene diimide (NDI) copolymers, poly{[N,N′-bis(2-R1)-naphthalene-1,4,5,8-bis(dicarboximide)-2,6-diyl]-alt-[(2,5-bis(2-R2)-1,4-phenylene)bis(ethyn-2,1-diyl)]} (PNDIR1-R2), were synthesized via Sonogashira coupling polymerization with varying alkyl side chains at the nitrogen atoms of the imide ring and 2,5-positions of the 1,4-diethynylbenzene moiety. Considering their identical polymer backbone structures, the side chains were found to have a strong influence on the surface morphology/nanostructure, thus playing a critical role in charge-transporting properties of the three NDI-based copolymers. Among the polymers, the one with an octyldodecyl (OD) chain at the nitrogen atoms of imide ring and a hexadecyloxy (HO) chain at the 2,5-positions of 1,4-diethynylbenzene, P(NDIOD-HO), exhibited the highest electron mobility of 0.016 cm2 V–1 s–1, as compared to NDI-based copolymers with an ethylhexyl chain at the 2,5-positions of 1,4-diethynylbenzene. The enhanced charge mobility in the P(NDIOD-HO) layers is attributed to the well-aligned nano-fiber-like surface morphology and highly ordered packing structure with a dominant edge-on orientation, thus enabling efficient in-plane charge transport. Our results on the molecular structure–charge transport property relationship in these materials may provide an insight into novel design of n-type conjugated polymers for applications in the organic electronics of the future.

  17. Measurement and Analysis of a Ferroelectric Field-Effect Transistor NAND Gate

    Science.gov (United States)

    Phillips, Thomas A.; MacLeond, Todd C.; Sayyah, Rana; Ho, Fat Duen

    2009-01-01

    Previous research investigated expanding the use of Ferroelectric Field-Effect Transistors (FFET) to other electronic devices beyond memory circuits. Ferroelectric based transistors possess unique characteris tics that give them interesting and useful properties in digital logic circuits. The NAND gate was chosen for investigation as it is one of the fundamental building blocks of digital electronic circuits. In t his paper, NAND gate circuits were constructed utilizing individual F FETs. N-channel FFETs with positive polarization were used for the standard CMOS NAND gate n-channel transistors and n-channel FFETs with n egative polarization were used for the standard CMOS NAND gate p-chan nel transistors. The voltage transfer curves were obtained for the NA ND gate. Comparisons were made between the actual device data and the previous modeled data. These results are compared to standard MOS logic circuits. The circuits analyzed are not intended to be fully opera tional circuits that would interface with existing logic circuits, bu t as a research tool to look into the possibility of using ferroelectric transistors in future logic circuits. Possible applications for th ese devices are presented, and their potential benefits and drawbacks are discussed.

  18. Ambipolar phosphorene field effect transistor.

    Science.gov (United States)

    Das, Saptarshi; Demarteau, Marcel; Roelofs, Andreas

    2014-11-25

    In this article, we demonstrate enhanced electron and hole transport in few-layer phosphorene field effect transistors (FETs) using titanium as the source/drain contact electrode and 20 nm SiO2 as the back gate dielectric. The field effect mobility values were extracted to be ∼38 cm(2)/Vs for electrons and ∼172 cm(2)/Vs for the holes. On the basis of our experimental data, we also comprehensively discuss how the contact resistances arising due to the Schottky barriers at the source and the drain end effect the different regime of the device characteristics and ultimately limit the ON state performance. We also propose and implement a novel technique for extracting the transport gap as well as the Schottky barrier height at the metal-phosphorene contact interface from the ambipolar transfer characteristics of the phosphorene FETs. This robust technique is applicable to any ultrathin body semiconductor which demonstrates symmetric ambipolar conduction. Finally, we demonstrate a high gain, high noise margin, chemical doping free, and fully complementary logic inverter based on ambipolar phosphorene FETs.

  19. Organic tunnel field effect transistors

    KAUST Repository

    Tietze, Max Lutz

    2017-06-29

    Various examples are provided for organic tunnel field effect transistors (OTFET), and methods thereof. In one example, an OTFET includes a first intrinsic layer (i-layer) of organic semiconductor material disposed over a gate insulating layer; source (or drain) contact stacks disposed on portions of the first i-layer; a second i-layer of organic semiconductor material disposed on the first i-layer surrounding the source (or drain) contact stacks; an n-doped organic semiconductor layer disposed on the second i-layer; and a drain (or source) contact layer disposed on the n-doped organic semiconductor layer. The source (or drain) contact stacks can include a p-doped injection layer, a source (or drain) contact layer, and a contact insulating layer. In another example, a method includes disposing a first i-layer over a gate insulating layer; forming source or drain contact stacks; and disposing a second i-layer, an n-doped organic semiconductor layer, and a drain or source contact.

  20. Ambipolar Phosphorene Field Effect Transistor

    Energy Technology Data Exchange (ETDEWEB)

    Das, Saptarshi [Center for Nanoscale Material and ‡Division of High Energy Physics, Argonne National Laboratory, Argonne, Illinois 60439, United States; Demarteau, Marcel [Center for Nanoscale Material and ‡Division of High Energy Physics, Argonne National Laboratory, Argonne, Illinois 60439, United States; Roelofs, Andreas [Center for Nanoscale Material and ‡Division of High Energy Physics, Argonne National Laboratory, Argonne, Illinois 60439, United States

    2014-10-23

    Two dimensional materials provide an intriguing platform to investigate rich physical phenomena which could ultimately lead to the development of innovative nanotechnologies (1-17). Semiconducting black phosphorous (BP) with high carrier mobility (18-20), anisotropic transport (21, 22) and tunable bandgap (23, 24) is the most recent addition to this exotic class of two dimensional materials. In this article we experimentally demonstrate room temperature quasi ballistic transport of both holes and electrons in ionic liquid gated black phosphorous (BP) field effect transistors (FET) with sub-100nm channel length. The carrier mean free path (mfp) was found to be 15nm for the holes and 5nm for the electrons. By improving the carrier injection through superior electrostatic gate control (EOT=1.5nm), highly symmetric ambipolar conduction with record high hole current of ~0.78mA/µm and electron current of ~0.68mA/µm are achieved for VDD=0.2V. The extracted record low contact resistance of 220Ω-µm is similar to the state of the art Si technology. This is also the best contact resistance value achieved for any two dimensional metal-semiconductor interfaces. Finally, we provide an analytical framework to compare the experimental results with ballistic simulations which includes quantum capacitance considerations.

  1. Performance of a 100V Half-Bridge MOSFET Driver, Type MIC4103, Over a Wide Temperature Range

    Science.gov (United States)

    Patterson, Richard L.; Hammoud, Ahmad

    2011-01-01

    The operation of a high frequency, high voltage MOSFET (metal-oxide semiconductor field-effect transistors) driver was investigated over a wide temperature regime that extended beyond its specified range. The Micrel MIC4103 is a 100V, non-inverting, dual driver that is designed to independently drive both high-side and low-side N-channel MOSFETs. It features fast propagation delay times and can drive 1000 pF load with 10ns rise times and 6 ns fall times [1]. The device consumes very little power, has supply under-voltage protection, and is rated for a -40 C to +125 C junction temperature range. The floating high-side driver of the chip can sustain boost voltages up to 100 V. Table I shows some of the device manufacturer s specification.

  2. Investigation of InP/InGaAs metamorphic co-integrated complementary doping-channel field-effect transistors for logic application

    Science.gov (United States)

    Tsai, Jung-Hui

    2014-01-01

    DC performance of InP/InGaAs metamorphic co-integrated complementary doping-channel field-effect transistors (DCFETs) grown on a low-cost GaAs substrate is first demonstrated. In the complementary DCFETs, the n-channel device was fabricated on the InxGa1-xP metamorphic linearly graded buffer layer and the p-channel field-effect transistor was stacked on the top of the n-channel device. Particularly, the saturation voltage of the n-channel device is substantially reduced to decrease the VOL and VIH values attributed that two-dimensional electron gas is formed and could be modulated in the n-InGaAs channel. Experimentally, a maximum extrinsic transconductance of 215 (17) mS/mm and a maximum saturation current density of 43 (-27) mA/mm are obtained in the n-channel (p-channel) device. Furthermore, the noise margins NMH and NML are up to 0.842 and 0.330 V at a supply voltage of 1.5 V in the complementary logic inverter application.

  3. Pulsed Capacitance Measurement of Silicon Carbide (SiC) Schottky Diode and SiC Metal Oxide Semiconductor

    National Research Council Canada - National Science Library

    Griffin, Timothy E

    2006-01-01

    The incremental capacitance C was measured for a silicon carbide (SiC) Schottky diode during a reverse-biasing pulse and for two SiC n-MOS transistors during a negative pulse to their source with the drain grounded...

  4. Thin film complementary metal oxide semiconductor (CMOS) device using a single-step deposition of the channel layer

    KAUST Repository

    Nayak, Pradipta K.

    2014-04-14

    We report, for the first time, the use of a single step deposition of semiconductor channel layer to simultaneously achieve both n-and p-type transport in transparent oxide thin film transistors (TFTs). This effect is achieved by controlling the concentration of hydroxyl groups (OH-groups) in the underlying gate dielectrics. The semiconducting tin oxide layer was deposited at room temperature, and the maximum device fabrication temperature was 350C. Both n and p-type TFTs showed fairly comparable performance. A functional CMOS inverter was fabricated using this novel scheme, indicating the potential use of our approach for various practical applications.

  5. A hybrid magnetic/complementary metal oxide semiconductor three-context memory bit cell for non-volatile circuit design

    International Nuclear Information System (INIS)

    Jovanović, B.; Brum, R. M.; Torres, L.

    2014-01-01

    After decades of continued scaling to the beat of Moore's law, it now appears that conventional silicon based devices are approaching their physical limits. In today's deep-submicron nodes, a number of short-channel and quantum effects are emerging that affect the manufacturing process, as well as, the functionality of the microelectronic systems-on-chip. Spintronics devices that exploit both the intrinsic spin of the electron and its associated magnetic moment, in addition to its fundamental electronic charge, are promising solutions to circumvent these scaling threats. Being compatible with the CMOS technology, such devices offer a promising synergy of radiation immunity, infinite endurance, non-volatility, increased density, etc. In this paper, we present a hybrid (magnetic/CMOS) cell that is able to store and process data both electrically and magnetically. The cell is based on perpendicular spin-transfer torque magnetic tunnel junctions (STT-MTJs) and is suitable for use in magnetic random access memories and reprogrammable computing (non-volatile registers, processor cache memories, magnetic field-programmable gate arrays, etc). To demonstrate the potential our hybrid cell, we physically implemented a small hybrid memory block using 45 nm × 45 nm round MTJs for the magnetic part and 28 nm fully depleted silicon on insulator (FD-SOI) technology for the CMOS part. We also report the cells measured performances in terms of area, robustness, read/write speed and energy consumption

  6. Study of the Physics of Insulating Films as Related to the Reliability of Metal-Oxide-Semiconductor (MOS) Devices

    Science.gov (United States)

    1982-02-01

    Powe1l- and MMH. Woods. AppI. Phys. Lett. 29. 377 (1976). 32. G.W. Hughes and R.J. Powell. IEEE Trans. iNucl. Sci. NS-23, 1569 (1976). 33. G.A. Dussel ...and K.W. Boer, Phvs. Stat. Sol. 39. 375 (1970). 34. G.A. Dussel and R.H. Bube. J. App. Phys. 37, 2797 (1966). 35. TA-I. Ning, J. Appi. Phys. 47. 3203

  7. Electron spin resonance study of interface states induced by electron injection in metal-oxide-semiconductor devices

    Science.gov (United States)

    Mikawa, R. E.; Lenahan, P. M.

    1986-03-01

    We find that electrons emitted from silicon into the oxide of metal-oxide-silicon devices generate amphoteric trivalent silicon (Pb center) defects at the Si/SiO2 interface. The Pb centers are generated in numbers approximately equal to that of the electron injection induced interface states. The effects of electron injection are similar to those of ionizing radiation to the extent that in both cases Pb centers are generated at the Si/SiO2 interface. However, the effects are not identical; ionizing radiation creates another trivalent silicon defect, termed E', in the oxide. We are unable to observe any E' generation in oxides subjected to electron injection. There appears to be a strong correlation between the number of trapped electrons and the electron injection induced Pb center interface states; this observation suggests that the trapping of electrons in the bulk of the oxides is in some way related to the creation of the Pb center interface state defects. We find that dry oxides subjected to a deuterium/nitrogen anneal exhibit less electron trapping than otherwise identical oxides which have been subjected to a hydrogen/nitrogen anneal. This observation is consistent with the idea that a hydrogen bond breaking event may be involved in electron capture.

  8. Synthesis Methods, Microscopy Characterization and Device Integration of Nanoscale Metal Oxide Semiconductors for Gas Sensing in Aerospace Applications

    Science.gov (United States)

    VanderWal, Randy L.; Berger, Gordon M.; Kulis, Michael J.; Hunter, Gary W.; Xu, Jennifer C.; Evans, Laura J.

    2009-01-01

    A comparison is made between SnO2, ZnO, and TiO2 single-crystal nanowires and SnO2 polycrystalline nanofibers for gas sensing. Both nanostructures possess a one-dimensional morphology. Different synthesis methods are used to produce these materials: thermal evaporation-condensation (TEC), controlled oxidation, and electrospinning. Advantages and limitations of each technique are listed. Practical issues associated with harvesting, purification, and integration of these materials into sensing devices are detailed. For comparison to the nascent form, these sensing materials are surface coated with Pd and Pt nanoparticles. Gas sensing tests, with respect to H2, are conducted at ambient and elevated temperatures. Comparative normalized responses and time constants for the catalyst and noncatalyst systems provide a basis for identification of the superior metal-oxide nanostructure and catalyst combination. With temperature-dependent data, Arrhenius analyses are made to determine an activation energy for the catalyst-assisted systems.

  9. Study of the Physics of Insulating Films as Related to the Reliability of Metal-Oxide Semiconductor Devices

    Science.gov (United States)

    1983-08-01

    gate structure. As a result, the charge retention characteristics are excellent and we do not have to make the usual compromises associated with MNOS...W. Allen. AppI. Phys. Lett. 35. o I Nacional de Ciencia y Technologist (CONACyT) and Centro ( 19791. de Investigaciones y Estudios Avanzados del I.P.N...Sponsored in part by Consejo Nacional de Ciencia y Technologia (CONACyT) and Centro de Investigaciones y Estudios Avanzados del I.P.N. (CIEA). Mexico

  10. Nanowire Field-Effect Transistors : Sensing Simplicity?

    NARCIS (Netherlands)

    Mescher, M.

    2014-01-01

    Silicon nanowires are structures made from silicon with at least one spatial dimension in the nanometer regime (1-100 nm). From these nanowires, silicon nanowire field-effect transistors can be constructed. Since their introduction in 2001 silicon nanowire field-effect transistors have been studied

  11. A fully integrated, monolithic, cryogenic charge sensitive preamplifier using N-channel JFETs and polysilicon resistors

    International Nuclear Information System (INIS)

    Jung, T.S.; Guckel, H.; Seefeldt, J.; Ott, G.; Ahn, Y.C.

    1994-01-01

    In this paper, an integrated charge preamplifier to be used with small (10--30 mm 2 ) Si(Li) and Ge(Li) X-ray detectors is described. The preamplifier is designed to operate at cryogenic temperatures (∼100 K to 160 K) for the best performance. An N-channel JFET process technology for integrated charge sensitive preamplifiers has been developed. The process integrates multiple pinch-off voltage JFETs fabricated in an n-type epitaxial layer on a low resistivity p-type substrate. The process also incorporates polysilicon resistors integrated on the same die as the JFETs. The optimized polysilicon resistors exhibit 1/f noise nearly as good as metal film resistors at the same current. Results for integrated amplifier are discussed

  12. Simulating single-event burnout of n-channel power MOSFET's

    International Nuclear Information System (INIS)

    Johnson, G.H.; Hohl, J.H.; Schrimpf, R.D.; Galloway, K.F.

    1993-01-01

    Heavy ions are ubiquitous in a space environment. Single-event burnout of power MOSFET's is a sudden catastrophic failure mechanism that is initiated by the passage of a heavy ion through the device structure. The passage of the heavy ion generates a current filament that locally turns on a parasitic n-p-n transistor inherent to the power MOSFET. Subsequent high currents and high voltage in the device induce second breakdown of the parasitic bipolar transistor and hence meltdown of the device. This paper presents a model that can be used for simulating the burnout mechanism in order to gain insight into the significant device parameters that most influence the single-event burnout susceptibility of n-channel power MOSFET's

  13. Investigation of capacitance voltage characteristics of strained Si/SiGe n-channel MODFET varactor

    Science.gov (United States)

    Elogail, Y.; Kasper, E.; Gunzer, F.; Shaker, A.; Schulze, J.

    2016-06-01

    This work is concerned with the investigation of Capacitance-Voltage (CV) behavior of n-channel Si/SiGe MODFET varactors. This investigation provides a valuable insight into the high frequency response of the device under test and its dependence on design parameters; especially regarding the modulation layer doping concentration. The heterostructure under consideration is much more complicated than conventional MOS varactor with respect to non-uniform doping, energy band offsets and the pn-junction in series. Subsequently, CV characterization has never been applied to such MODFET varactor structure. Experimental CV measurements have shown a non-monotonic behavior with a transition point minimum and higher saturation levels on both sides, in contradiction to the conventional high frequency MOS characteristics. This behavior was confirmed qualitatively using simulations. Moreover, we explain some fundamental capacitance properties of the structure, which provide already very interesting perceptions of the MODFET varactor operation, modeling and possible applications using the obtained stimulating results.

  14. Flexible ambipolar organic field-effect transistors with reverse-offset-printed silver electrodes for a complementary inverter.

    Science.gov (United States)

    Park, Junsu; Kim, Minseok; Yeom, Seung-Won; Ha, Hyeon Jun; Song, Hyenggun; Min Jhon, Young; Kim, Yun-Hi; Ju, Byeong-Kwon

    2016-06-03

    We report ambipolar organic field-effect transistors and complementary inverter circuits with reverse-offset-printed (ROP) Ag electrodes fabricated on a flexible substrate. A diketopyrrolopyrrole-based co-polymer (PDPP-TAT) was used as the semiconductor and poly(methyl methacrylate) was used as the gate insulator. Considerable improvement is observed in the n-channel electrical characteristics by inserting a cesium carbonate (Cs2CO3) as the electron-injection/hole-blocking layer at the interface between the semiconductors and the electrodes. The saturation mobility values are 0.35 cm(2) V(-1) s(-1) for the p-channel and 0.027 cm(2) V(-1) s(-1) for the n-channel. A complementary inverter is demonstrated based on the ROP process, and it is selectively controlled by the insertion of Cs2CO3 onto the n-channel region via thermal evaporation. Moreover, the devices show stable operation during the mechanical bending test using tensile strains ranging from 0.05% to 0.5%. The results confirm that these devices have great potential for use in flexible and inexpensive integrated circuits over a large area.

  15. Graphene Field Effect Transistors for Radiation Detection

    Data.gov (United States)

    National Aeronautics and Space Administration — This is propose to develop Graphene Field Effect Transistor based Radiation Sensors (GFET-RS) for NASA Manned Spaceflight Missions anticipated in next several...

  16. Silicon-on-insulator field effect transistor with improved body ties for rad-hard applications

    Science.gov (United States)

    Schwank, James R.; Shaneyfelt, Marty R.; Draper, Bruce L.; Dodd, Paul E.

    2001-01-01

    A silicon-on-insulator (SOI) field-effect transistor (FET) and a method for making the same are disclosed. The SOI FET is characterized by a source which extends only partially (e.g. about half-way) through the active layer wherein the transistor is formed. Additionally, a minimal-area body tie contact is provided with a short-circuit electrical connection to the source for reducing floating body effects. The body tie contact improves the electrical characteristics of the transistor and also provides an improved single-event-upset (SEU) radiation hardness of the device for terrestrial and space applications. The SOI FET also provides an improvement in total-dose radiation hardness as compared to conventional SOI transistors fabricated without a specially prepared hardened buried oxide layer. Complementary n-channel and p-channel SOI FETs can be fabricated according to the present invention to form integrated circuits (ICs) for commercial and military applications.

  17. Radiation dose response of N channel MOSFET submitted to filtered X-ray photon beam

    Science.gov (United States)

    Gonçalves Filho, Luiz C.; Monte, David S.; Barros, Fabio R.; Santos, Luiz A. P.

    2018-01-01

    MOSFET can operate as a radiation detector mainly in high-energy photon beams, which are normally used in cancer treatments. In general, such an electronic device can work as a dosimeter from threshold voltage shift measurements. The purpose of this article is to show a new way for measuring the dose-response of MOSFETs when they are under X-ray beams generated from 100kV potential range, which is normally used in diagnostic radiology. Basically, the method consists of measuring the MOSFET drain current as a function of the radiation dose. For this the type of device, it has to be biased with a high value resistor aiming to see a substantial change in the drain current after it has been irradiated with an amount of radiation dose. Two types of N channel device were used in the experiment: a signal transistor and a power transistor. The delivered dose to the device was varied and the electrical curves were plotted. Also, a sensitivity analysis of the power MOSFET response was made, by varying the tube potential of about 20%. The results show that both types of devices have responses very similar, the shift in the electrical curve is proportional to the radiation dose. Unlike the power MOSFET, the signal transistor does not provide a linear function between the dose rate and its drain current. We also have observed that the variation in the tube potential of the X-ray equipment produces a very similar dose-response.

  18. Graphene Field Effect Transistor for Radiation Detection

    Science.gov (United States)

    Li, Mary J. (Inventor); Chen, Zhihong (Inventor)

    2016-01-01

    The present invention relates to a graphene field effect transistor-based radiation sensor for use in a variety of radiation detection applications, including manned spaceflight missions. The sensing mechanism of the radiation sensor is based on the high sensitivity of graphene in the local change of electric field that can result from the interaction of ionizing radiation with a gated undoped silicon absorber serving as the supporting substrate in the graphene field effect transistor. The radiation sensor has low power and high sensitivity, a flexible structure, and a wide temperature range, and can be used in a variety of applications, particularly in space missions for human exploration.

  19. Radiation hardness of MOS devices and N-channel MOS/SOS transistors

    International Nuclear Information System (INIS)

    Wang, S.T.

    1977-01-01

    The radiation behavior of control MOS capacitor was studied at both room temperature and liquid nitrogen temperature. It was found that additional positive charges were stored in the oxide as a result of low temperature x-irradiation and that this behaved differently from that induced by room temperature irradation. This additional charge could be removed from the SiO 2 by photodepopulating with light of 2.3 eV energy or less, by field emission or thermal annealing to 130 0 K. The experimental data indicated that the observed effect was not due to ion transport within the oxide. The effect of Al ion implantation on oxide charge storage is reported. Implantation had been found to introduce charge trapping centers in the displacement damaged region of the oxide which altered the electrical behavior of implanted MOS capacitors. The predictions of a model which accounted for the trapping of electrons and holes were in agreement with the experimental observations on the radiation behavior of implanted MOS capacitors. The activation energy associated with thermally annealed displacement damage had also been calculated. The behaviors of implanted sample in a high or a pre-breakdown field environment are discussed in terms of the Poole-Frenkel effect and an impurity induced breakdown effect respectively. The investigation of radiation induced leakage current in an n-channel MOS/SOS transistor showed that the positive charge trapped in the sapphire layer had an optical depth of 2.5 eV and a thermal activation energy of 0.75 eV. The present study also indicated that the carrier conduction through the sapphire layer and the variation in trapped charge density were both important in the thermal stimulated leakage current behavior

  20. Fringing-field effects in acceleration columns

    International Nuclear Information System (INIS)

    Yavor, M.I.; Weick, H.; Wollnik, H.

    1999-01-01

    Fringing-field effects in acceleration columns are investigated, based on the fringing-field integral method. Transfer matrices at the effective boundaries of the acceleration column are obtained, as well as the general transfer matrix of the region separating two homogeneous electrostatic fields with different field strengths. The accuracy of the fringing-field integral method is investigated

  1. Fundamentals of nanoscaled field effect transistors

    CERN Document Server

    Chaudhry, Amit

    2013-01-01

    Fundamentals of Nanoscaled Field Effect Transistors gives comprehensive coverage of the fundamental physical principles and theory behind nanoscale transistors. The specific issues that arise for nanoscale MOSFETs, such as quantum mechanical tunneling and inversion layer quantization, are fully explored. The solutions to these issues, such as high-κ technology, strained-Si technology, alternate devices structures and graphene technology are also given. Some case studies regarding the above issues and solution are also given in the book. In summary, this book: Covers the fundamental principles behind nanoelectronics/microelectronics Includes chapters devoted to solutions tackling the quantum mechanical effects occurring at nanoscale Provides some case studies to understand the issue mathematically Fundamentals of Nanoscaled Field Effect Transistors is an ideal book for researchers and undergraduate and graduate students in the field of microelectronics, nanoelectronics, and electronics.

  2. Nanowire field effect transistors principles and applications

    CERN Document Server

    Jeong, Yoon-Ha

    2014-01-01

    “Nanowire Field Effect Transistor: Basic Principles and Applications” places an emphasis on the application aspects of nanowire field effect transistors (NWFET). Device physics and electronics are discussed in a compact manner, together with the p-n junction diode and MOSFET, the former as an essential element in NWFET and the latter as a general background of the FET. During this discussion, the photo-diode, solar cell, LED, LD, DRAM, flash EEPROM and sensors are highlighted to pave the way for similar applications of NWFET. Modeling is discussed in close analogy and comparison with MOSFETs. Contributors focus on processing, electrostatic discharge (ESD) and application of NWFET. This includes coverage of solar and memory cells, biological and chemical sensors, displays and atomic scale light emitting diodes. Appropriate for scientists and engineers interested in acquiring a working knowledge of NWFET as well as graduate students specializing in this subject.

  3. Gate sensing coherent charge oscillations in a silicon field-effect transistor

    Science.gov (United States)

    Gonzalez-Zalba, M. Fernando; Shevchenko, Sergey; Barraud, Sylvain; Johansson, J. Robert; Ferguson, Andrew; Nori, Franco; Betz, Andreas

    We report the observation of coherent charge oscillations in a double quantum dot formed in a silicon nanowire transistor detected via its dispersive interaction with a radio-frequency resonant circuit coupled via the gate. Differential capacitance changes at the inter-dot charge transitions allow us to monitor the state of the system in the strong-driving regime where we observe the emergence of Landau-Zener-Stückelberg-Majorana interference on the phase response of the resonator. A theoretical analysis of the dispersive signal demonstrates that quantum and tunnelling capacitance changes must be included to describe the qubit-resonator interaction. Furthermore, a Fourier analysis of the interference pattern reveals a charge coherence time, T2 = 100 ps. Our results demonstrate charge coherent control and readout in a simple silicon transistor and open up the possibility to implement charge and spin qubits in existing complementary metal-oxide-semiconductor technology. We thank FP7 318397, RIKEN iTHES project, AFOSR FA9550-14-1-0040, IMPACT program of JST and a Grant-in-Aid for Scientific Research.

  4. Classic and Quantum Capacitances in Bernal Bilayer and Trilayer Graphene Field Effect Transistor

    Directory of Open Access Journals (Sweden)

    Hatef Sadeghi

    2013-01-01

    Full Text Available Our focus in this study is on characterizing the capacitance voltage (C-V behavior of Bernal stacking bilayer graphene (BG and trilayer graphene (TG as the channel of FET devices. The analytical models of quantum capacitance (QC of BG and TG are presented. Although QC is smaller than the classic capacitance in conventional devices, its contribution to the total metal oxide semiconductor capacitor in graphene-based FET devices becomes significant in the nanoscale. Our calculation shows that QC increases with gate voltage in both BG and TG and decreases with temperature with some fluctuations. However, in bilayer graphene the fluctuation is higher due to its tunable band structure with external electric fields. In similar temperature and size, QC in metal oxide BG is higher than metal oxide TG configuration. Moreover, in both BG and TG, total capacitance is more affected by classic capacitance as the distance between gate electrode and channel increases. However, QC is more dominant when the channel becomes thinner into the nanoscale, and therefore we mostly deal with quantum capacitance in top gate in contrast with bottom gate that the classic capacitance is dominant.

  5. Interlayer tunnel field-effect transistor (ITFET): physics, fabrication and applications

    Science.gov (United States)

    Kang, Sangwoo; Mou, Xuehao; Fallahazad, Babak; Prasad, Nitin; Wu, Xian; Valsaraj, Amithraj; Movva, Hema C. P.; Kim, Kyounghwan; Tutuc, Emanuel; Register, Leonard F.; Banerjee, Sanjay K.

    2017-09-01

    The scaling challenges of complementary metal oxide semiconductors (CMOS) are increasing with the pace of scaling showing marked signs of slowing down. This slowing has brought about a widespread search for an alternative beyond-CMOS device concept. While the charge tunneling phenomenon has been known for almost a century, and tunneling based transistors have been studied in the past few decades, its possibilities are being re-examined with the emergence of a new class of two-dimensional (2D) materials. By stacking varying 2D materials together, with two electrode layers sandwiching a tunnel dielectric layer, it could be possible to make vertical tunnel transistors without the limitations that have plagued such devices implemented within other material systems. When the two electrode layers are of the same material, under certain conditions, one can achieve resonant tunneling between the two layers, manifesting as negative differential resistance (NDR) in the interlayer current-voltage characteristics. We call this type of device an interlayer tunnel FET (ITFET). We review the basic operation principles of this device, experimental and theoretical studies, and benchmark simulation results for several digital logic gates based on a compact model that we developed. The results are placed in the context of work going on in other groups.

  6. A high-performance complementary inverter based on transition metal dichalcogenide field-effect transistors.

    Science.gov (United States)

    Cho, Ah-Jin; Park, Kee Chan; Kwon, Jang-Yeon

    2015-01-01

    For several years, graphene has been the focus of much attention due to its peculiar characteristics, and it is now considered to be a representative 2-dimensional (2D) material. Even though many research groups have studied on the graphene, its intrinsic nature of a zero band-gap, limits its use in practical applications, particularly in logic circuits. Recently, transition metal dichalcogenides (TMDs), which are another type of 2D material, have drawn attention due to the advantage of having a sizable band-gap and a high mobility. Here, we report on the design of a complementary inverter, one of the most basic logic elements, which is based on a MoS2 n-type transistor and a WSe2 p-type transistor. The advantages provided by the complementary metal-oxide-semiconductor (CMOS) configuration and the high-performance TMD channels allow us to fabricate a TMD complementary inverter that has a high-gain of 13.7. This work demonstrates the operation of the MoS2 n-FET and WSe2 p-FET on the same substrate, and the electrical performance of the CMOS inverter, which is based on a different driving current, is also measured.

  7. Planar graphene tunnel field-effect transistor

    OpenAIRE

    Katkov, V. L.; Osipov, V. A.

    2013-01-01

    We propose a concept for a graphene tunnel field-effect transistor. The main idea is based on the use of two graphene electrodes with zigzag termination divided by a narrow gap under the influence of the common gate. Our analysis shows that such device will have a pronounced switching effect at low gate voltage and high on/off current ratio at room temperature.

  8. Pressure Sensitive Insulated Gate Field Effect Transistor

    Science.gov (United States)

    Suminto, James Tjan-Meng

    A pressure sensitive insulated gate field effect transistor has been developed. The device is an elevated gate field-effect-transistor. It consists of a p-type silicon substrate in which two n^+ region, the source and drain, are formed. The gate electrode is a metal film sandwiched in an insulated micro-diaphragm resembling a pill-box which covers the gate oxide, drain, and source. The space between the gate electrode and the oxide is vacuum or an air-gap. When pressure is applied on the diaphragm it deflects and causes a change in the gate capacitance, and thus modulates the conductance of the channel between source and drain. A general theory dealing with the characteristic of this pressure sensitive insulated gate field effect transistor has been derived, and the device fabricated. The fabrication process utilizes the standard integrated circuit fabrication method. It features a batch fabrication of field effect devices followed by the batch fabrication of the deposited diaphragm on top of each field effect device. The keys steps of the diaphragm fabrication are the formation of spacer layer, formation of the diaphragm layer, and the subsequent removal of the spacer layer. The chip size of the device is 600 μm x 1050 mum. The diaphragm size is 200 μm x 200 mum. Characterization of the device has been performed. The current-voltage characteristics with pressure as parameters have been demonstrated and the current-pressure transfer curves obtained. They show non-linear characteristics as those of conventional capacitive pressure sensors. The linearity of threshold voltage versus pressure transfer curves has been demonstrated. The temperature effect on the device performances has been tested. The temperature coefficient of threshold voltage, rather than the electron mobility, has dominated the temperature coefficient of the device. Two temperature compensation schemes have been tested: one method is by connecting two identical PSIGFET in a differential amplifier

  9. A Comparison of SiC Power Switches for High-Rel Defense Applications (preprint)

    Science.gov (United States)

    2007-07-01

    junction transistor ( BJT ). The VJFET is principally valued for having demonstrated the highest current and voltage combinations, positive...for defense applications. They are the vertical junction field effect transistor (VJFET), the metal-oxide-semiconductor FET (MOSFET), and the bipolar...most technologically ready SiC power switch, the vertical junction field effect transistor (VJFET), has been demonstrated in preproduction devices at

  10. Functional organic field-effect transistors.

    Science.gov (United States)

    Guo, Yunlong; Yu, Gui; Liu, Yunqi

    2010-10-25

    Functional organic field-effect transistors (OFETs) have attracted increasing attention in the past few years due to their wide variety of potential applications. Research on functional OFETs underpins future advances in organic electronics. In this review, different types of functional OFETs including organic phototransistors, organic memory FETs, organic light emitting FETs, sensors based on OFETs and other functional OFETs are introduced. In order to provide a comprehensive overview of this field, the history, current status of research, main challenges and prospects for functional OFETs are all discussed.

  11. Oxidation and crystal field effects in uranium

    Energy Technology Data Exchange (ETDEWEB)

    Tobin, J. G. [Lawrence Livermore National Lab. (LLNL), Livermore, CA (United States); Booth, C. H. [Lawrence Berkeley National Lab. (LBNL), Berkeley, CA (United States); Shuh, D. K. [Lawrence Berkeley National Lab. (LBNL), Berkeley, CA (United States); van der Laan, G. [Diamond Light Source, Didcot (United Kingdom); Sokaras, D. [Stanford Synchrotron Radiation Lightsource, Stanford, CA (United States); Weng, T. -C. [Stanford Synchrotron Radiation Lightsource, Stanford, CA (United States); Yu, S. W. [Lawrence Livermore National Lab. (LLNL), Livermore, CA (United States); Bagus, P. S. [Univ. of North Texas, Denton, TX (United States); Tyliszczak, T. [Lawrence Berkeley National Lab. (LBNL), Berkeley, CA (United States); Nordlund, D. [Stanford Synchrotron Radiation Lightsource, Stanford, CA (United States)

    2015-07-06

    An extensive investigation of oxidation in uranium has been pursued. This includes the utilization of soft x-ray absorption spectroscopy, hard x-ray absorption near-edge structure, resonant (hard) x-ray emission spectroscopy, cluster calculations, and a branching ratio analysis founded on atomic theory. The samples utilized were uranium dioxide (UO2), uranium trioxide (UO3), and uranium tetrafluoride (UF4). As a result, a discussion of the role of non-spherical perturbations, i.e., crystal or ligand field effects, will be presented.

  12. Towards accurate simulation of fringe field effects

    International Nuclear Information System (INIS)

    Berz, M.; Erdelyi, B.; Makino, K.

    2001-01-01

    In this paper, we study various fringe field effects. Previously, we showed the large impact that fringe fields can have on certain lattice scenarios of the proposed Neutrino Factory. Besides the linear design of the lattice, the effects depend strongly on the details of the field fall off. Various scenarios are compared. Furthermore, in the absence of detailed information, we study the effects for the LHC, a case where the fringe fields are known, and try to draw some conclusions for Neutrino Factory lattices

  13. Dielectric Engineered Tunnel Field-Effect Transistor

    OpenAIRE

    Ilatikhameneh, Hesameddin; Ameen, Tarek A.; Klimeck, Gerhard; Appenzeller, Joerg; Rahman, Rajib

    2015-01-01

    The dielectric engineered tunnel field-effect transistor (DE-TFET) as a high performance steep transistor is proposed. In this device, a combination of high-k and low-k dielectrics results in a high electric field at the tunnel junction. As a result a record ON-current of about 1000 uA/um and a subthreshold swing (SS) below 20mV/dec are predicted for WTe2 DE-TFET. The proposed TFET works based on a homojunction channel and electrically doped contacts both of which are immune to interface stat...

  14. High-performance PbS quantum dot vertical field-effect phototransistor using graphene as a transparent electrode

    Science.gov (United States)

    Che, Yongli; Zhang, Yating; Cao, Xiaolong; Song, Xiaoxian; Zhang, Haiting; Cao, Mingxuan; Dai, Haitao; Yang, Junbo; Zhang, Guizhong; Yao, Jianquan

    2016-12-01

    Solution processed photoactive PbS quantum dots (QDs) were used as channel in high-performance near-infrared vertical field-effect phototransistor (VFEpT) where monolayer graphene embedded as transparent electrode. In this vertical architecture, the PbS QD channel was sandwiched and naturally protected between the drain and source electrodes, which made the device ultrashort channel length (110 nm) simply the thickness of the channel layer. The VFEpT exhibited ambipolar operation with high mobilities of μe = 3.5 cm2/V s in n-channel operation and μh = 3.3 cm2/V s in p-channel operation at low operation voltages. By using the photoactive PbS QDs as channel material, the VFEpT exhibited good photoresponse properties with a responsivity of 4.2 × 102 A/W, an external quantum efficiency of 6.4 × 104% and a photodetectivity of 2.1 × 109 Jones at the light irradiance of 36 mW/cm2. Additionally, the VFEpT showed excellent on/off switching with good stability and reproducibility and fast response speed with a short rise time of 12 ms in n-channel operation and 10.6 ms in p-channel operation. These high mobilities, good photoresponse properties and simplistic fabrication of our VFEpTs provided a facile route to the high-performance inorganic photodetectors.

  15. Two-dimensional numerical simulation of the effect of single event burnout for n-channel VDMOSFET

    International Nuclear Information System (INIS)

    Guo Hongxia; Chen Yusheng; Wang Wei; Zhao Jinlong; Zhang Yimen; Zhou Hui

    2004-01-01

    2D MEDICI simulator is used to investigate the effect of Single Event Burnout (SEB) for n-channel power VDMOSFETs. The simulation results are consistent with experimental results which have been published. The simulation results are of great interest for a better understanding of the occurrence of events. The effects of the minority carrier lifetime in the base region, the base width and the emitter doping density on SEB susceptibility are verified. Some hardening solutions to SEB are provided. The work shows that the 2D simulator MEDICI is an useful tool for burnout prediction and for the evaluation of hardening solutions. (authors)

  16. Perspective analysis of tri gate germanium tunneling field-effect transistor with dopant segregation region at source/drain

    Science.gov (United States)

    Liu, Liang-kui; Shi, Cheng; Zhang, Yi-bo; Sun, Lei

    2017-04-01

    A tri gate Ge-based tunneling field-effect transistor (TFET) has been numerically studied with technology computer aided design (TCAD) tools. Dopant segregated Schottky source/drain is applied to the device structure design (DS-TFET). The characteristics of the DS-TFET are compared and analyzed comprehensively. It is found that the performance of n-channel tri gate DS-TFET with a positive bias is insensitive to the dopant concentration and barrier height at n-type drain, and that the dopant concentration and barrier height at a p-type source considerably affect the device performance. The domination of electron current in the entire BTBT current of this device accounts for this phenomenon and the tri-gate DS-TFET is proved to have a higher performance than its dual-gate counterpart.

  17. Individual SWCNT based ionic field effect transistor

    Science.gov (United States)

    Pang, Pei; He, Jin; Park, Jae Hyun; Krstic, Predrag; Lindsay, Stuart

    2011-03-01

    Here we report that the ionic current through a single-walled carbon nanotube (SWCNT) can be effectively gated by a perpendicular electrical field from a top gate electrode, working as ionic field effect transistor. Both our experiment and simulation confirms that the electroosmotic current (EOF) is the main component in the ionic current through the SWCNT and is responsible for the gating effect. We also studied the gating efficiency as a function of solution concentration and pH and demonstrated that the device can work effectively in the physiological relevant condition. This work opens the door to use CNT based nanofluidics for ion and molecule manipulation. This work was supported by the DNA Sequencing Technology Program of the National Human Genome Research Institute (1RC2HG005625-01, 1R21HG004770-01), Arizona Technology Enterprises and the Biodesign Institute.

  18. Antiferromagnetic Spin Wave Field-Effect Transistor

    Science.gov (United States)

    Cheng, Ran; Daniels, Matthew W.; Zhu, Jian-Gang; Xiao, Di

    2016-01-01

    In a collinear antiferromagnet with easy-axis anisotropy, symmetry dictates that the spin wave modes must be doubly degenerate. Theses two modes, distinguished by their opposite polarization and available only in antiferromagnets, give rise to a novel degree of freedom to encode and process information. We show that the spin wave polarization can be manipulated by an electric field induced Dzyaloshinskii-Moriya interaction and magnetic anisotropy. We propose a prototype spin wave field-effect transistor which realizes a gate-tunable magnonic analog of the Faraday effect, and demonstrate its application in THz signal modulation. Our findings open up the exciting possibility of digital data processing utilizing antiferromagnetic spin waves and enable the direct projection of optical computing concepts onto the mesoscopic scale. PMID:27048928

  19. Vertically Integrated Multiple Nanowire Field Effect Transistor.

    Science.gov (United States)

    Lee, Byung-Hyun; Kang, Min-Ho; Ahn, Dae-Chul; Park, Jun-Young; Bang, Tewook; Jeon, Seung-Bae; Hur, Jae; Lee, Dongil; Choi, Yang-Kyu

    2015-12-09

    A vertically integrated multiple channel-based field-effect transistor (FET) with the highest number of nanowires reported ever is demonstrated on a bulk silicon substrate without use of wet etching. The driving current is increased by 5-fold due to the inherent vertically stacked five-level nanowires, thus showing good feasibility of three-dimensional integration-based high performance transistor. The developed fabrication process, which is simple and reproducible, is used to create multiple stiction-free and uniformly sized nanowires with the aid of the one-route all-dry etching process (ORADEP). Furthermore, the proposed FET is revamped to create nonvolatile memory with the adoption of a charge trapping layer for enhanced practicality. Thus, this research suggests an ultimate design for the end-of-the-roadmap devices to overcome the limits of scaling.

  20. Field-effect P-N junction

    Science.gov (United States)

    Regan, William; Zettl, Alexander

    2015-05-05

    This disclosure provides systems, methods, and apparatus related to field-effect p-n junctions. In one aspect, a device includes an ohmic contact, a semiconductor layer disposed on the ohmic contact, at least one rectifying contact disposed on the semiconductor layer, a gate including a layer disposed on the at least one rectifying contact and the semiconductor layer and a gate contact disposed on the layer. A lateral width of the rectifying contact is less than a semiconductor depletion width of the semiconductor layer. The gate contact is electrically connected to the ohmic contact to create a self-gating feedback loop that is configured to maintain a gate electric field of the gate.

  1. Modeling quantization effects in field effect transistors

    CERN Document Server

    Troger, C

    2001-01-01

    Numerical simulation in the field of semiconductor device development advanced to a valuable, cost-effective and flexible facility. The most widely used simulators are based on classical models, as they need to satisfy time and memory constraints. To improve the performance of field effect transistors such as MOSFETs and HEMTs these devices are continuously scaled down in their dimensions. Consequently the characteristics of such devices are getting more and more determined by quantum mechanical effects arising from strong transversal fields in the channel. In this work an approach based on a two-dimensional electron gas is used to describe the confinement of the carriers. Quantization is considered in one direction only. For the derivation of a one-dimensional Schroedinger equation in the effective mass framework a non-parabolic correction for the energy dispersion due to Kane is included. For each subband a non-parabolic dispersion relation characterized by subband masses and subband non-parabolicity coeffi...

  2. Field Effect Microparticle Generation for Cell Microencapsulation.

    Science.gov (United States)

    Hsu, Brend Ray-Sea; Fu, Shin-Huei

    2017-01-01

    The diameter and sphericity of alginate-poly-L-lysine-alginate microcapsules, determined by the size and the shape of calcium alginate microspheres, affect their in vivo durability and biocompatibility and the results of transplantation. The commonly used air-jet spray method generates microspheres with a wider variation in diameter, larger sphere morphology, and evenly distributed encapsulated cells. In order to overcome these drawbacks, we designed a field effect microparticle generator to create a stable electric field to prepare microparticles with a smaller diameter and more uniform morphology. Using this electric field microparticle generator the encapsulated cells will be located at the periphery of the microspheres, and thus the supply of oxygen and nutrients for the encapsulated cells will be improved compared with the centrally located encapsulated cells in the air-jet spray method.

  3. Water soluble nano-scale transient material germanium oxide for zero toxic waste based environmentally benign nano-manufacturing

    KAUST Repository

    Almuslem, A. S.

    2017-02-14

    In the recent past, with the advent of transient electronics for mostly implantable and secured electronic applications, the whole field effect transistor structure has been dissolved in a variety of chemicals. Here, we show simple water soluble nano-scale (sub-10 nm) germanium oxide (GeO) as the dissolvable component to remove the functional structures of metal oxide semiconductor devices and then reuse the expensive germanium substrate again for functional device fabrication. This way, in addition to transiency, we also show an environmentally friendly manufacturing process for a complementary metal oxide semiconductor (CMOS) technology. Every year, trillions of complementary metal oxide semiconductor (CMOS) electronics are manufactured and billions are disposed, which extend the harmful impact to our environment. Therefore, this is a key study to show a pragmatic approach for water soluble high performance electronics for environmentally friendly manufacturing and bioresorbable electronic applications.

  4. Water soluble nano-scale transient material germanium oxide for zero toxic waste based environmentally benign nano-manufacturing

    Science.gov (United States)

    Almuslem, A. S.; Hanna, A. N.; Yapici, T.; Wehbe, N.; Diallo, E. M.; Kutbee, A. T.; Bahabry, R. R.; Hussain, M. M.

    2017-02-01

    In the recent past, with the advent of transient electronics for mostly implantable and secured electronic applications, the whole field effect transistor structure has been dissolved in a variety of chemicals. Here, we show simple water soluble nano-scale (sub-10 nm) germanium oxide (GeO2) as the dissolvable component to remove the functional structures of metal oxide semiconductor devices and then reuse the expensive germanium substrate again for functional device fabrication. This way, in addition to transiency, we also show an environmentally friendly manufacturing process for a complementary metal oxide semiconductor (CMOS) technology. Every year, trillions of complementary metal oxide semiconductor (CMOS) electronics are manufactured and billions are disposed, which extend the harmful impact to our environment. Therefore, this is a key study to show a pragmatic approach for water soluble high performance electronics for environmentally friendly manufacturing and bioresorbable electronic applications.

  5. Field effect sensors for PCR applications

    Science.gov (United States)

    Taing, Meng-Houit; Sweatman, Denis R.

    2004-03-01

    The use of field effect sensors for biological and chemical sensing is widely employed due to its ability to make detections based on charge and surface potential. Because proteins and DNA almost always carry a charge [1], silicon can be used to micro fabricate such a sensor. The EIS structure (Electrolyte on Insulator on Silicon) provides a novel, label-free and simple to fabricate way to make a field effect DNA detection sensor. The sensor responds to fluctuating capacitance caused by a depletion layer thickness change at the surface of the silicon substrate through DNA adsorption onto the dielectric oxide/PLL (Poly-L-Lysine) surface. As DNA molecules diffuse to the sensor surface, they are bound to their complimentary capture probes deposited on the surface. The negative charge exhibited by the DNA forces negative charge carriers in the substrate to move away from the surface. This causes an n-type depletion layer substrate to thicken and a p-type to thin. The depletion layer thickness can be measured by its capacitance using an LCR meter. This experiment is conducted using the ConVolt (constant voltage) approach. Nucleic acids are amplified by an on chip PCR (Polymerase Chain Reaction) system and then fed into the sensor. The low ionic solution strength will ensure that counter-ions do not affect the sensor measurements. The sensor surface contains capture probes that bind to the pathogen. The types of pathogens we"ll be detecting include salmonella, campylobacter and E.Coli DNA. They are held onto the sensor surface by the positively charged Poly-L-Lysine layer. The electrolyte is biased through a pseudo-reference electrode. Pseudo reference electrodes are usually made from metals such as Platinum or Silver. The problem associated with "floating" biasing electrodes is they cannot provide stable biasing potentials [2]. They drift due to surface charging effects and trapped charges on the surface. To eliminate this, a differential system consisting of 2 sensors

  6. Characterization of a vertically movable gate field effect transistor using a silicon-on-insulator wafer

    International Nuclear Information System (INIS)

    Song, In-Hyouk; Forfang, William B D; Cole, Bryan; Hee You, Byoung

    2014-01-01

    The vertically movable gate field effect transistor (VMGFET) is a FET-based sensing element, whose gate moves in a vertical direction over the channel. A VMGFET gate covers the region between source and drain. A 1 μm thick air layer separates the gate and the substrate of the VMGFET. A novel fabrication process to form a VMGFET using a silicon-on-insulator (SOI) wafer provides minimal internal stress of the gate structure. The enhancement-type n-channel VMGFET is fabricated with the threshold voltage of 2.32 V in steady state. A non-inverting amplifier is designed and integrated on a printable circuit board (PCB) to characterize device sensitivity and mechanical properties. The VMGFET is mechanically coupled to a speaker membrane to apply mechanical vibration. The oscillated drain current of FET are monitored and sampled with NI LabVIEW. The frequency of the output signal correlates with that of the input stimulus. The resonance frequency of the fabricated VMGFET is measured to be 1.11 kHz. The device sensitivity linearly increases by 0.106 mV/g Hz in the range of 150 Hz and 1 kHz. (paper)

  7. Regulating charge injection in ambipolar organic field-effect transistors by mixed self-assembled monolayers.

    Science.gov (United States)

    Xu, Yong; Baeg, Kang-Jun; Park, Won-Tae; Cho, Ara; Choi, Eun-Young; Noh, Yong-Young

    2014-08-27

    We report on a technique using mixed self-assembled monolayers (SAMs) to finely regulate ambipolar charge injection in polymer organic field-effect transistors. Differing from the other works that employ single SAM specifically for efficient charge injection in p-type and n-type transistors, we blend two different SAMs of alkyl- and perfluoroalkyl thiols at different ratios and apply them to ambipolar OFETs and inverter. Thanks to the utilization of ambipolar semiconductor and one SAM mixture, the device and circuit fabrications are facile with only one step for semiconductor deposition and another for SAM treatment. This is much simpler with respect to the conventional scheme for the unipolar-device-based complementary circuitry that demands separate deposition and processing for individual p-channel and n-channel transistors. Our results show that the mixed-SAM treatments not only improve ambipolar charge injection manifesting as higher hole- and electron-mobility and smaller threshold voltage but also gradually tune the device characteristics to reach a desired condition for circuit application. Therefore, this simple but useful approach is promising for ambipolar electronics.

  8. A Low-Power and In Situ Annealing Technique for the Recovery of Active Devices After Proton Irradiation

    Directory of Open Access Journals (Sweden)

    Francis Laurent A.

    2018-01-01

    Full Text Available In this paper, we study the recovery of onmembrane semiconductor components, such as N-type Field-Effect Transistors (FETs available in two different channel widths and a Complementary Metal-Oxide-Semiconductor (CMOS inverter, after the exposure to high dose of proton radiation. Due to the ionizing effect, the electrical characteristics of the components established remarkable shifts, where the threshold voltages showed an average shift of -480 mV and -280 mV respectively for 6 μm and 24 μm N-channel transistors, likewise the inversion point of the inverter showed an important shift of -690 mV. The recovery concept is based mainly on a micro-hotplate, fabricated with backside MEMS micromachining structure and a Silicon-On-Insulator (SOI technology, ensuring rapid, low power and in situ annealing technique, this method proved its reliability in recent works. Annealing the N-channel transistors and the inverter for 16 min with a temperature of the heater up to 385 °C, guaranteed a partial recovery of the semiconductor based components with a maximum power consumption of 66 mW.

  9. Durability-enhanced two-dimensional hole gas of C-H diamond surface for complementary power inverter applications.

    Science.gov (United States)

    Kawarada, Hiroshi; Yamada, Tetsuya; Xu, Dechen; Tsuboi, Hidetoshi; Kitabayashi, Yuya; Matsumura, Daisuke; Shibata, Masanobu; Kudo, Takuya; Inaba, Masafumi; Hiraiwa, Atsushi

    2017-02-20

    Complementary power field effect transistors (FETs) based on wide bandgap materials not only provide high-voltage switching capability with the reduction of on-resistance and switching losses, but also enable a smart inverter system by the dramatic simplification of external circuits. However, p-channel power FETs with equivalent performance to those of n-channel FETs are not obtained in any wide bandgap material other than diamond. Here we show that a breakdown voltage of more than 1600 V has been obtained in a diamond metal-oxide-semiconductor (MOS) FET with a p-channel based on a two-dimensional hole gas (2DHG). Atomic layer deposited (ALD) Al 2 O 3 induces the 2DHG ubiquitously on a hydrogen-terminated (C-H) diamond surface and also acts as both gate insulator and passivation layer. The high voltage performance is equivalent to that of state-of-the-art SiC planar n-channel FETs and AlGaN/GaN FETs. The drain current density in the on-state is also comparable to that of these two FETs with similar device size and V B .

  10. A Low-Power and In Situ Annealing Technique for the Recovery of Active Devices After Proton Irradiation

    Science.gov (United States)

    Francis, Laurent A.; Sedki, Amor; André, Nicolas; Kilchytska, Valéria; Gérard, Pierre; Ali, Zeeshan; Udrea, Florin; Flandre, Denis

    2018-01-01

    In this paper, we study the recovery of onmembrane semiconductor components, such as N-type Field-Effect Transistors (FETs) available in two different channel widths and a Complementary Metal-Oxide-Semiconductor (CMOS) inverter, after the exposure to high dose of proton radiation. Due to the ionizing effect, the electrical characteristics of the components established remarkable shifts, where the threshold voltages showed an average shift of -480 mV and -280 mV respectively for 6 μm and 24 μm N-channel transistors, likewise the inversion point of the inverter showed an important shift of -690 mV. The recovery concept is based mainly on a micro-hotplate, fabricated with backside MEMS micromachining structure and a Silicon-On-Insulator (SOI) technology, ensuring rapid, low power and in situ annealing technique, this method proved its reliability in recent works. Annealing the N-channel transistors and the inverter for 16 min with a temperature of the heater up to 385 °C, guaranteed a partial recovery of the semiconductor based components with a maximum power consumption of 66 mW.

  11. High-current and low acceleration voltage arsenic ion implanted polysilicon-gate and source-drain electrode Si mos transistor

    International Nuclear Information System (INIS)

    Saito, Yasuyuki; Sugimura, Yoshiro; Sugihara, Michiyuki

    1993-01-01

    The fabrication process of high current arsenic (As) ion implanted polysilicon (Si) gate and source drain (SD) electrode Si n-channel metal oxide-semiconductor field effect transistor (MOSFET) was examined. Poly Si film n-type doping was performed by using high current (typical current: 2mA) and relatively low acceleration voltage (40keV) As ion implantation technique (Lintott series 3). It was observed that high dose As implanted poly Si films as is show refractoriness against radical fluorine excited by microwave. Using GCA MANN4800 (m/c ID No.2, resist: OFPR) mask pattern printing technique, the high current As ion implantation technique and radical fluorine gas phase etching (Chemical dry etching: CDE) technique, the n-channel Poly Si gate (ρs = ≅100Ω/□) enhancement MQSFETs(ρs source drain = ≅50Ω/□, SiO 2 gate=380 angstrom) with off-leak-less were obtained on 3 inch Czochralski grown 2Ωcm boron doped p type wafers (Osaka titanium). By the same process, a 8 bit single chip μ-processor with 26MHz full operation was performed

  12. Experimental and 2D simulation study of the single-event burnout in n-channel power MOSFETs

    International Nuclear Information System (INIS)

    Roubaud, F.; Dachs, C.; Palau, J.M.; Gasiot, J.

    1993-01-01

    The use of the 2D simulator MEDICI as a tool for Single Event Burnout (SEB) comprehension is investigated. Simulation results are compared to experimental currents induced in an N channel power MOSFET by the ions from a 252 Cf source. Current measurements have been carried out with a specially designed circuit. Simulations allow to analyze separately the effects of the ion impact and of the electrical environment parameters on the SEB phenomenon. Burnout sensitivity is found to be increased by increasing supply voltage, ion's LET and by decreasing load charge. These electrical tendencies are validated by experiments. Burnout sensitivity is also found to be sensitive to the ion impact position. The current shapes variations for given electrical parameters can be related to LET or ion impact position changes. However, some experimental current shapes are not reproduced by simulations

  13. p-Channel and n-Channel Thin-Film-Transistor Operation on Sprayed ZnO Nanoparticle Layers

    Directory of Open Access Journals (Sweden)

    Daiki Itohara

    2016-01-01

    Full Text Available Both n-channel and p-channel thin-film transistors have been realized on ZnO nanoparticle (NP layers sprayed onto quartz substrates. In this study, nitrogen-doped ZnO-NPs were synthesized using an arc-discharge-mediated gas-evaporation method that was recently developed. Sprayed NP layers were characterized by scanning electron microscopy and Hall effect measurements. It was confirmed that p-type behaving NP layers can be obtained using ZnO-NPs synthesized with lower chamber pressure, whereas n-type conductivity can be obtained with higher chamber pressure. pn-junction diodes were also tested, resulting in clear rectifying characteristics. The possibility of particle-process-based ZnO-NP electronics was confirmed.

  14. Electric Field Effects in RUS Measurements

    Energy Technology Data Exchange (ETDEWEB)

    Darling, Timothy W [Los Alamos National Laboratory; Ten Cate, James A [Los Alamos National Laboratory; Allured, Bradley [UNIV NEVADA, RENO; Carpenter, Michael A [CAMBRIDGE UNIV. UK

    2009-09-21

    Much of the power of the Resonant Ultrasound Spectroscopy (RUS) technique is the ability to make mechanical resonance measurements while the environment of the sample is changed. Temperature and magnetic field are important examples. Due to the common use of piezoelectric transducers near the sample, applied electric fields introduce complications, but many materials have technologically interesting responses to applied static and RF electric fields. Non-contact optical, buffered, or shielded transducers permit the application of charge and externally applied electric fields while making RUS measurements. For conducting samples, in vacuum, charging produces a small negative pressure in the volume of the material - a state rarely explored. At very high charges we influence the electron density near the surface so the propagation of surface waves and their resonances may give us a handle on the relationship of electron density to bond strength and elasticity. Our preliminary results indicate a charge sign dependent effect, but we are studying a number of possible other effects induced by charging. In dielectric materials, external electric fields influence the strain response, particularly in ferroelectrics. Experiments to study this connection at phase transformations are planned. The fact that many geological samples contain single crystal quartz suggests a possible use of the piezoelectric response to drive vibrations using applied RF fields. In polycrystals, averaging of strains in randomly oriented crystals implies using the 'statistical residual' strain as the drive. The ability to excite vibrations in quartzite polycrystals and arenites is explored. We present results of experimental and theoretical approaches to electric field effects using RUS methods.

  15. An accurate mobility model for the I-V characteristics of n-channel enhancement-mode MOSFETs with single-channel boron implantation

    International Nuclear Information System (INIS)

    Chingyuan Wu; Yeongwen Daih

    1985-01-01

    In this paper an analytical mobility model is developed for the I-V characteristics of n-channel enhancement-mode MOSFETs, in which the effects of the two-dimensional electric fields in the surface inversion channel and the parasitic resistances due to contact and interconnection are included. Most importantly, the developed mobility model easily takes the device structure and process into consideration. In order to demonstrate the capabilities of the developed model, the structure- and process-oriented parameters in the present mobility model are calculated explicitly for an n-channel enhancement-mode MOSFET with single-channel boron implantation. Moreover, n-channel MOSFETs with different channel lengths fabricated in a production line by using a set of test keys have been characterized and the measured mobilities have been compared to the model. Excellent agreement has been obtained for all ranges of the fabricated channel lengths, which strongly support the accuracy of the model. (author)

  16. Direct coupled amplifiers using field effect transistors

    International Nuclear Information System (INIS)

    Fowler, E.P.

    1964-03-01

    The concept of the uni-polar field effect transistor (P.E.T.) was known before the invention of the bi-polar transistor but it is only recently that they have been made commercially. Being produced as yet only in small quantities, their price imposes a restriction on use to circuits where their peculiar properties can be exploited to the full. One such application is described here where the combination of low voltage drift and relatively low input leakage current are necessarily used together. One of the instruments used to control nuclear reactors has a logarithmic response to the mean output current from a polarised ionisation chamber. The logarithmic signal is then differentiated electrically, the result being displayed on a meter calibrated to show the reactor divergence or doubling time. If displayed in doubling time the scale is calibrated reciprocally. Because of the wide range obtained in the logarithmic section and the limited supply voltage, an output of 1 volt per decade change in ionisation current is used. Differentiating this gives a current of 1.5 x 10 -8 A for p.s.D. (20 sec. doubling time) in the differentiating amplifier. To overcome some of the problems of noise due to statistical variations in input current, the circuit design necessitates a resistive path to ground at the amplifier input of 20 M.ohms. A schematic diagram is shown. 1. It is evident that a zero drift of 1% can be caused by a leakage current of 1.5 x 10 -10 A or an offset voltage of 3 mV at the amplifier input. Although the presently used electrometer valve is satisfactory from the point of view of grid current, there have been sudden changes in grid to grid voltage (the valve is a double triode) of up to 10 m.V. It has been found that a pair of F.E.T's. can be used to replace the electrometer valve so long as care is taken in correct balance of the two devices. An investigation has been made into the characteristics of some fourteen devices to see whether those with very

  17. GaN High Power Devices

    Energy Technology Data Exchange (ETDEWEB)

    PEARTON,S.J.; REN,F.; ZHANG,A.P.; DANG,G.; CAO,X.A.; LEE,K.P.; CHO,H.; GILA,B.P.; JOHNSON,J.W.; MONIER,C.; ABERNATHY,C.R.; HAN,JUNG; BACA,ALBERT G.; CHYI,J.-I.; LEE,C.-M.; NEE,T.-E.; CHUO,C.-C.; CHI,G.C.; CHU,S.N.G.

    2000-07-17

    A brief review is given of recent progress in fabrication of high voltage GaN and AlGaN rectifiers, GaN/AlGaN heterojunction bipolar transistors, GaN heterostructure and metal-oxide semiconductor field effect transistors. Improvements in epitaxial layer quality and in fabrication techniques have led to significant advances in device performance.

  18. Characterization of MOSFET dosimeters for low-dose measurements in maxillofacial anthropomorphic phantoms

    NARCIS (Netherlands)

    Koivisto, J.H.; Wolff, J.E.; Kiljunen, T.; Schulze, D.; Kortesniemi, M.

    2015-01-01

    The aims of this study were to characterize reinforced metal-oxide-semiconductor field-effect transistor (MOSFET) dosimeters to assess the measurement uncertainty, single exposure low-dose limit with acceptable accuracy, and the number of exposures required to attain the corresponding limit of the

  19. Numerical method for a 2D drift diffusion model arising in strained n ...

    Indian Academy of Sciences (India)

    This paper reports the calculation of electron transport in metal oxide semiconductor field effects transistors (MOSFETs) with biaxially tensile strained silicon channel. The calculation is formulated based on two-dimensional drift diffusion model (DDM) including strain effects. The carrier mobility dependence on the lateral and ...

  20. Short-channel drain current model for asymmetric heavily / lightly ...

    Indian Academy of Sciences (India)

    PRADIPTA DUTTA

    2017-07-29

    Jul 29, 2017 ... Abstract. The paper presents a drain current model for double gate metal oxide semiconductor field effect transistors (DG MOSFETs) based on a new velocity saturation model that accounts for short-channel velocity saturation effect independently in the front and the back gate controlled channels under ...

  1. A Pulsed Power System Design Using Lithium-ion Batteries and One Charger per Battery

    Science.gov (United States)

    2009-12-01

    Metal Oxide Semiconductor Field Effect Transistor OPAMP Operational Amplifiers RMS Root, Mean, Square SMES Superconducting Magnetic Energy... resistance in cells developed during repeated discharge and charge cycles, the voltage of individual Li-ion batteries in strings must be...cell shunting, resistive equalization, and transformer equalization. All of these methods rely on using either resistive means to dissipate energy

  2. Serializing off-the-shelf MOSFETs by Magnetically Coupling Their Gate Electrodes

    DEFF Research Database (Denmark)

    Dimopoulos, Emmanouil; Munk-Nielsen, Stig

    2013-01-01

    While the semiconductor industry struggles with the inherent trade-offs of solid-state devices, serialization of power switches, like the Metal-Oxide-Semiconductor Field Effect Transistor (MOSFET) or the Insulated Gate Bipolar Transistor (IGBT), has been proven to be an advantageous alternative...

  3. Simultaneous On-State Voltage and Bond-Wire Resistance Monitoring of Silicon Carbide MOSFETs

    DEFF Research Database (Denmark)

    Baker, Nick; Luo, Haoze; Iannuzzo, Francesco

    2017-01-01

    the voltage between the kelvin-source and power-source can be used to specifically monitor bond-wire degradation. Meanwhile, the drain to kelvin-source voltage can be monitored to track defects in the semiconductor die or gate driver. Through an accelerated aging test on 20 A Silicon Carbide Metal-Oxide-Semiconductor-Field-Effect...

  4. NPS-SCAT: Systems Engineering and Payload Subsystem Design, Integration, and Testing of NPS’ First CubeSat

    Science.gov (United States)

    2010-06-01

    MOSFET Metal Oxide Semiconductor Field Effect Transistor MOSI Master Output, Slave Input MPPT Maximum Power Point Tracker NASA National Aerospace...current not to exceed 0.5 A; the solar panels must be designed to meet this specification. The BCRs use a maximum power point tracker ( MPPT ) to

  5. Effects of post-deposition annealing on sputtered SiO2/4H-SiC metal-oxide-semiconductor

    Science.gov (United States)

    Lee, Suhyeong; Kim, Young Seok; Kang, Hong Jeon; Kim, Hyunwoo; Ha, Min-Woo; Kim, Hyeong Joon

    2018-01-01

    Reactive sputtering followed by N2, NH3, O2, and NO post-deposition annealing (PDA) of SiO2 on 4H-SiC was investigated in this study. The results of ellipsometry, an etching test, and X-ray photoemission spectroscopy showed that N2 and NH3 PDA nitrified the SiO2. Devices using N2 and NH3 PDA exhibited a high gate leakage current and low breakdown field due to oxygen vacancies and incomplete oxynitride. SiO2/4H-SiC MOS capacitors were also fabricated and their electrical characteristics measured. The average breakdown fields of the devices using N2, NH3, O2, and NO PDA were 0.12, 0.17, 4.71 and 2.63 MV/cm, respectively. The shifts in the flat-band voltage after O2 and NO PDA were 0.95 and -2.56 V, respectively, compared with the theoretical value. The extracted effective oxide charge was -4.11 × 1011 cm-2 for O2 PDA and 1.11 × 1012 cm-2 for NO PDA. NO PDA for 2 h at 1200 °C shifted the capacitance-voltage curve in the negative direction. The oxygen containing PDA showed better electrical properties than non-oxygen PDA. The sputtering method described can be applied to 4H-SiC MOS fabrication.

  6. Effects of series and parallel resistances on the C-V characteristics of silicon-based metal oxide semiconductor (MOS) devices

    Science.gov (United States)

    Omar, Rejaiba; Mohamed, Ben Amar; Adel, Matoussi

    2015-04-01

    This paper investigates the electrical behavior of the Al/SiO2/Si MOS structure. We have used the complex admittance method to develop an analytical model of total capacitance applied to our proposed equivalent circuit. The charge density, surface potential, semiconductor capacitance, flatband and threshold voltages have been determined by resolving the Poisson transport equations. This modeling is used to predict in particular the effects of frequency, parallel and series resistance on the capacitance-voltage characteristic. Results show that the variation of both frequency and parallel resistance causes strong dispersion of the C-V curves in the inversion regime. It also reveals that the series resistance influences the shape of C-V curves essentially in accumulation and inversion modes. A significant decrease of the accumulation capacitance is observed when R s increases in the range 200-50000 Ω. The degradation of the C-V magnitude is found to be more pronounced when the series resistance depends on the substrate doping density. When R s varies in the range 100 Ω-50 kΩ, it shows a decrease in the flatband voltage from -1.40 to -1.26 V and an increase in the threshold voltage negatively from -0.28 to -0.74 V, respectively. Good agreement has been observed between simulated and measured C-V curves obtained at high frequency. This study is necessary to control the adverse effects that disrupt the operation of the MOS structure in different regimes and optimizes the efficiency of such electronic device before manufacturing.

  7. Electrical characterization of 4H-SiC metal-oxide-semiconductor structure with Al2O3 stacking layers as dielectric

    Science.gov (United States)

    Chang, P. K.; Hwu, J. G.

    2018-02-01

    Interface defects and oxide bulk traps conventionally play important roles in the electrical performance of SiC MOS device. Introducing the Al2O3 stack grown by repeated anodization of Al films can notably lower the leakage current in comparison to the SiO2 structure, and enhance the minority carrier response at low frequency when the number of Al2O3 layers increase. In addition, the interface quality is not deteriorated by the stacking of Al2O3 layers because the stacked Al2O3 structure grown by anodization possesses good uniformity. In this work, the capacitance equivalent thickness (CET) of stacking Al2O3 will be up to 19.5 nm and the oxidation process can be carried out at room temperature. For the Al2O3 gate stack with CET 19.5 nm on n-SiC substrate, the leakage current at 2 V is 2.76 × 10-10 A/cm2, the interface trap density at the flatband voltage is 3.01 × 1011 eV-1 cm-2, and the effective breakdown field is 11.8 MV/cm. Frequency dispersion and breakdown characteristics may thus be improved as a result of the reduction in trap density. The Al2O3 stacking layers are capable of maintaining the leakage current as low as possible even after constant voltage stress test, which will further ameliorate reliability characteristics.

  8. Contribution to the study of metal-oxide-semiconductor devices with optical access. In2O3-SiO2-Si structure

    International Nuclear Information System (INIS)

    Thenoz, Yves.

    1974-01-01

    A general study of the fabrication of the structure In 2 O 3 /SiO 2 /Si was made encompassing the problems posed during the realization of these structures. The sputtering study enabled the influence of the main parameters on layer properties to be determined. The decisive importance of clean conditions throughout fabrication (especially during sputtering) on the properties of In 2 O 3 layers and on those of the structure and its stability was revealed. However, the problem of ageing of the structure were not investigated. Finally, the construction of MOS capacitors and transistors showed that In 2 O 3 /SiO 2 /Si structures can be used in MOS circuits [fr

  9. A 94GHz Temperature Compensated Low Noise Amplifier in 45nm Silicon-on-Insulator Complementary Metal-Oxide Semiconductor (SOI CMOS)

    Science.gov (United States)

    2014-01-01

    Meninger, T. Xanthopoulos, E. Crain, D. Ha, and D. Ham . “Dual-DLL-Based CMOS All-Digital Temperature Sensor for Microprocessor Thermal Monitoring...oscillator 49 Approved for public release; distribution unlimited. ACRONYM DESCRIPTION VLSI very-large-scale integration DR dutch roll frequency ° degree

  10. Note: Multi-confocal fluorescence correlation spectroscopy in living cells using a complementary metal oxide semiconductor-single photon avalanche diode array

    Science.gov (United States)

    Kloster-Landsberg, M.; Tyndall, D.; Wang, I.; Walker, R.; Richardson, J.; Henderson, R.; Delon, A.

    2013-07-01

    Living cells are heterogeneous and rapidly changing biological samples. It is thus desirable to measure molecular concentration and dynamics in many locations at the same time. In this note, we present a multi-confocal setup capable of performing simultaneous fluorescence correlation spectroscopy measurements, by focusing the spots with a spatial light modulator and acquiring data with a monolithic 32 × 32 single-photon avalanche photodiode array. A post-processing method is proposed to correct cross-talk effects between neighboring spots. We demonstrate the applicability of our system by simultaneously measuring the diffusion of free enhanced Green Fluorescent Protein (eGFP) molecules at nine different points in living cells.

  11. Ultra-low power high temperature and radiation hard complementary metal-oxide-semiconductor (CMOS) silicon-on-insulator (SOI) voltage reference.

    Science.gov (United States)

    Boufouss, El Hafed; Francis, Laurent A; Kilchytska, Valeriya; Gérard, Pierre; Simon, Pascal; Flandre, Denis

    2013-12-13

    This paper presents an ultra-low power CMOS voltage reference circuit which is robust under biomedical extreme conditions, such as high temperature and high total ionized dose (TID) radiation. To achieve such performances, the voltage reference is designed in a suitable 130 nm Silicon-on-Insulator (SOI) industrial technology and is optimized to work in the subthreshold regime of the transistors. The design simulations have been performed over the temperature range of -40-200 °C and for different process corners. Robustness to radiation was simulated using custom model parameters including TID effects, such as mobilities and threshold voltages degradation. The proposed circuit has been tested up to high total radiation dose, i.e., 1 Mrad (Si) performed at three different temperatures (room temperature, 100 °C and 200 °C). The maximum drift of the reference voltage V(REF) depends on the considered temperature and on radiation dose; however, it remains lower than 10% of the mean value of 1.5 V. The typical power dissipation at 2.5 V supply voltage is about 20 μW at room temperature and only 75 μW at a high temperature of 200 °C. To understand the effects caused by the combination of high total ionizing dose and temperature on such voltage reference, the threshold voltages of the used SOI MOSFETs were extracted under different conditions. The evolution of V(REF) and power consumption with temperature and radiation dose can then be explained in terms of the different balance between fixed oxide charge and interface states build-up. The total occupied area including pad-ring is less than 0.09 mm2.

  12. Investigation of temperature dependent threshold voltage variation of Gd2O3/AlGaN/GaN metal-oxide-semiconductor heterostructure

    Directory of Open Access Journals (Sweden)

    Atanu Das

    2012-09-01

    Full Text Available Temperature dependent threshold voltage (Vth variation of GaN/AlGaN/Gd2O3/Ni-Au structure is investigated by capacitance-voltage measurement with temperature varying from 25°C to 150°C. The Vth of the Schottky device without oxide layer is slightly changed with respect to temperature. However, variation of Vth is observed for both as-deposited and annealed device owing to electron capture by the interface traps or bulk traps. The Vth shifts of 0.4V and 3.2V are obtained for as-deposited and annealed device respectively. For annealed device, electron capture process is not only restricted in the interface region but also extended into the crystalline Gd2O3 layer through Frenkel-Poole emission and hooping conduction, resulting in a larger Vth shift. The calculated trap density for as-deposited and annealed device is 3.28×1011∼1.12×1011 eV−1cm−2 and 1.74×1012∼7.33×1011 eV−1cm−2 respectively in measured temperature range. These results indicate that elevated temperature measurement is necessary to characterize GaN/AlGaN heterostructure based devices with oxide as gate dielectric.

  13. Investigation of trap states in Al2O3 InAlN/GaN metal-oxide-semiconductor high-electron-mobility transistors

    Science.gov (United States)

    Zhang, Peng; Zhao, Sheng-Lei; Xue, Jun-Shuai; Zhu, Jie-Jie; Ma, Xiao-Hua; Zhang, Jin-Cheng; Hao, Yue

    2015-12-01

    In this paper the trapping effects in Al2O3/In0.17Al0.83N/GaN MOS-HEMT (here, HEMT stands for high electron mobility transistor) are investigated by frequency-dependent capacitance and conductance analysis. The trap states are found at both the Al2O3/InAlN and InAlN/GaN interface. Trap states in InAlN/GaN heterostructure are determined to have mixed de-trapping mechanisms, emission, and tunneling. Part of the electrons captured in the trap states are likely to tunnel into the two-dimensional electron gas (2DEG) channel under serious band bending and stronger electric field peak caused by high Al content in the InAlN barrier, which explains the opposite voltage dependence of time constant and relation between the time constant and energy of the trap states. Project supported by the Program for National Natural Science Foundation of China (Grant Nos. 61404100 and 61306017).

  14. Depth-Sensitive Raman Investigation of Metal-Oxide-Semiconductor Structures: Absorption as a Tool for Variation of Exciting Light Penetration Depth

    Directory of Open Access Journals (Sweden)

    Paweł Borowicz

    2016-01-01

    Full Text Available Presented work focuses the attention on two regions of MOS structure placed in the vicinity of the semiconductor/dielectric interface, in particular: on part of dielectric layer and thin layer of the substrate. In the presented work the application of absorption as a tool that can vary the absorption depth of excitation light into the semiconductor substrate is discussed. The changes of the absorption depth of visible light allows to obtain Raman signal from places in the substrate placed at different distances from the dielectric/semiconductor interface. The series of Raman spectra obtained from visible excitation in the case of varying absorption depth allowed to analyze the structure of the substrate as a function of distance from the interface. Deep ultraviolet Raman study regarding part of silicon dioxide layer placed directly at the interface is not discussed so far which makes the analysis of the structure of this part of dielectric layer possible. Comparison of reported in this work Raman data with structure of silicon/silicon dioxide interface obtained from other experimental techniques proves the applicability of proposed methodology.

  15. Extraction of carrier mobility and interface trap density in InGaAs metal oxide semiconductor structures using gated Hall method

    Science.gov (United States)

    Chidambaram, Thenappan

    III-V semiconductors are potential candidates to replace Si as a channel material in next generation CMOS integrated circuits owing to their superior carrier mobilities. Low density of states (DOS) and typically high interface and border trap densities (Dit) in high mobility group III-V semiconductors provide difficulties in quantification of Dit near the conduction band edge. The trap response above the threshold voltage of a MOSFET can be very fast, and conventional Dit extraction methods, based on capacitance/conductance response (CV methods) of MOS capacitors at frequencies properties of III-V interfaces is an ambiguity of determination of electron density in the MOSFET channel. Traditional evaluation of carrier density by integration of the C-V curve, gives incorrect values for D it and mobility. Here we employ gated Hall method to quantify the D it spectrum at the high-K oxide/III-V semiconductor interface for buried and surface channel devices using Hall measurement and capacitance-voltage data. Determination of electron density directly from Hall measurements allows for obtaining true mobility values.

  16. Synthesis and characterization of metal oxide semiconductors by a facile co-electroplating-annealing method and formation of ZnO/CuO pn heterojunctions with rectifying behavior

    Science.gov (United States)

    Turkdogan, Sunay; Kilic, Bayram

    2018-01-01

    We have developed a unique growth method and demonstrated the growth of CuO and ZnO semiconductor materials and the fabrication of their pn heterojunctions in ambient atmosphere. The pn heterojunctions were constructed using inherently p-type CuO and inherently n-type ZnO materials. Both p- and n-type semiconductors and pn heterojunctions were prepared using a simple but versatile growth method that relies on the transformation of electroplated Cu and Zn metals into CuO and ZnO semiconductors, respectively and is capable of a large-scale production desired in most of the applications. The structural, chemical, optical and electrical properties of the materials and junctions were investigated using various characterization methods and the results show that our growth method, materials and devices are quite promising to be utilized for various applications including but not limited to solar cells, gas/humidity sensors and photodetectors.

  17. Effects of consecutive irradiation and bias temperature stress in p-channel power vertical double-diffused metal oxide semiconductor transistors

    Science.gov (United States)

    Davidović, Vojkan; Danković, Danijel; Ilić, Aleksandar; Manić, Ivica; Golubović, Snežana; Djorić-Veljković, Snežana; Prijić, Zoran; Prijić, Aneta; Stojadinović, Ninoslav

    2018-04-01

    The mechanisms responsible for the effects of consecutive irradiation and negative bias temperature (NBT) stress in p-channel power vertical double-diffused MOS (VDMOS) transistors are presented in this paper. The investigation was performed in order to clarify the mechanisms responsible for the effects of specific kind of stress in devices previously subjected to the other kind of stress. In addition, it may help in assessing the behaviour of devices subjected to simultaneous irradiation and NBT stressing. It is shown that irradiation of previously NBT stressed devices leads to additional build-up of oxide trapped charge and interface traps, while NBT stress effects in previously irradiated devices depend on gate bias applied during irradiation and on the total dose received. In the cases of low-dose irradiation or irradiation without gate bias, the subsequent NBT stress leads to slight further device degradation. On the other hand, in the cases of devices previously irradiated to high doses or with gate bias applied during irradiation, NBT stress may have a positive role, as it actually anneals a part of radiation-induced degradation.

  18. Magnetic Field Effect in Conjugated Molecules-Based Devices

    Science.gov (United States)

    2017-10-23

    AFRL-AFOSR-JP-TR-2017-0073 Magnetic field effect in conjugated molecules-based devices Tzung-Fang Guo NATIONAL CHENG KUNG UNIVERSITY Final Report 10...Final 3. DATES COVERED (From - To) 22 Jul 2014 to 21 Jul 2017 4. TITLE AND SUBTITLE Magnetic field effect in conjugated molecules-based devices 5a... Magnetic field effect in conjugated molecule-based devices. The final year of the project had a collaboration with Professor Bin Hu at the University

  19. Field-effect detection using phospholipid membranes -Topical Review

    Directory of Open Access Journals (Sweden)

    Chiho Kataoka-Hamai and Yuji Miyahara

    2010-01-01

    Full Text Available The application of field-effect devices to biosensors has become an area of intense research interest. An attractive feature of field-effect sensing is that the binding or reaction of biomolecules can be directly detected from a change in electrical signals. The integration of such field-effect devices into cell membrane mimics may lead to the development of biosensors useful in clinical and biotechnological applications. This review summarizes recent studies on the fabrication and characterization of field-effect devices incorporating model membranes. The incorporation of black lipid membranes and supported lipid monolayers and bilayers into semiconductor devices is described.

  20. High Performance Electronics on Flexible Silicon

    KAUST Repository

    Sevilla, Galo T.

    2016-09-01

    Over the last few years, flexible electronic systems have gained increased attention from researchers around the world because of their potential to create new applications such as flexible displays, flexible energy harvesters, artificial skin, and health monitoring systems that cannot be integrated with conventional wafer based complementary metal oxide semiconductor processes. Most of the current efforts to create flexible high performance devices are based on the use of organic semiconductors. However, inherent material\\'s limitations make them unsuitable for big data processing and high speed communications. The objective of my doctoral dissertation is to develop integration processes that allow the transformation of rigid high performance electronics into flexible ones while maintaining their performance and cost. In this work, two different techniques to transform inorganic complementary metal-oxide-semiconductor electronics into flexible ones have been developed using industry compatible processes. Furthermore, these techniques were used to realize flexible discrete devices and circuits which include metal-oxide-semiconductor field-effect-transistors, the first demonstration of flexible Fin-field-effect-transistors, and metal-oxide-semiconductors-based circuits. Finally, this thesis presents a new technique to package, integrate, and interconnect flexible high performance electronics using low cost additive manufacturing techniques such as 3D printing and inkjet printing. This thesis contains in depth studies on electrical, mechanical, and thermal properties of the fabricated devices.

  1. Novel Organic Field Effect Transistors via Nano-Modification

    National Research Council Canada - National Science Library

    Wen, Ten-Chin; Chou, Wei-Yang; Guo, Tzung-Fang; Wang, Yeong-Her

    2005-01-01

    .... The performance of organic FETs is determined primarily by the field effect mobility of the carriers in the organic semiconductor layers and by the efficiency of injecting and extracting carriers...

  2. The effect of metallization contact resistance on the measurement of the field effect mobility of long-channel unannealed amorphous In–Zn–O thin film transistors

    International Nuclear Information System (INIS)

    Lee, Sunghwan; Park, Hongsik; Paine, David C.

    2012-01-01

    The effect of contact resistance on the measurement of the field effect mobility of compositionally homogeneous channel indium zinc oxide (IZO)/IZO metallization thin film transistors (TFTs) is reported. The TFTs studied in this work operate in depletion mode as n-channel field effect devices with a field effect mobility calculated in the linear regime (μ FE ) of 20 ± 1.9 cm 2 /Vs and similar of 18 ± 1.3 cm 2 /Vs when calculated in the saturation regime (μ FE sat ). These values, however, significantly underestimate the channel mobility since a large part of the applied drain voltage is dropped across the source/drain contact interface. The transmission line method was employed to characterize the contact resistance and it was found that the conducting-IZO/semiconducting-IZO channel contact is highly resistive (specific contact resistance, ρ C > 100 Ωcm 2 ) and, further, this contact resistance is modulated with applied gate voltage. Accounting for the contact resistance (which is large and modulated by gate voltage), the corrected μ FE is shown to be 39 ± 2.6 cm 2 /Vs which is consistent with Hall mobility measurements of high carrier density IZO.

  3. The Physics of Electric Field Effect Thermoelectric Devices

    OpenAIRE

    Sandomirsky, V.; Butenko, A. V.; Levin, R.; Schlesinger, Y.

    2001-01-01

    We describe here a novel approach to the subject of thermoelectric devices. The current best thermoelectrics are based on heavily doped semiconductors or semimetal alloys. We show that utilization of electric field effect or ferroelectric field effect, not only provides a new route to this problem, bypassing the drawbacks of conventional doping, but also offers significantly improved thermoelectric characteristics. We present here model calculation of the thermoelectric figure of merit in thi...

  4. A comparative study of n-channel low temperature poly-Si thin-film transistors with a body terminal or a lightly-doped-drain structure

    Science.gov (United States)

    Wu, Yanwen; Wang, Mingxiang; Wang, Huaisheng; Zhang, Dongli

    2018-02-01

    Hot-carrier (HC) induced degradation is a critical reliability issue of n-channel low temperature poly-Si thin-film transistors (TFTs) in TFT-based circuits. In this work, a kind of four-terminal TFT, which has an additional p+-doped lateral body terminal connecting to the floating channel, is systematically compared to conventional n-channel TFT and lightly-doped-drain (LDD) TFT. We demonstrate that the four-terminal TFT can provide similar advantages to that of the LDD TFT such as kink current suppression and DC HC degradation immunity, much superior immunity to the dynamic HC degradation, but without any tradeoffs in device performance and process complexity of the LDD TFT. It has high performance, as well as excellent reliability under both DC and AC conditions.

  5. Tunnel field-effect transistors with germanium/strained-silicon hetero-junctions for low power applications

    Energy Technology Data Exchange (ETDEWEB)

    Kim, Minsoo, E-mail: minsoo@mosfet.t.u-tokyo.ac.jp; Kim, Younghyun; Yokoyama, Masafumi; Nakane, Ryosho; Kim, SangHyeon; Takenaka, Mitsuru; Takagi, Shinichi

    2014-04-30

    We have studied a simple structure n-channel tunnel field-effect transistor with a pure-Ge/strained-Si hetero-junction. The device operation was demonstrated for the devices fabricated by combining epitaxially-grown Ge on strained-silicon-on-insulator substrates. Atomic-layer-deposition-Al{sub 2}O{sub 3}-based gate stacks were formed with electron cyclotron resonance plasma post oxidation to ensure the high quality metal–oxide–semiconductor interface between the high-k insulator and Ge. While the gate leakage current and drain current saturation are well controlled, relatively higher minimum subthreshold swing of 125 mV/dec and lower I{sub ON}/I{sub OFF} ratio of 10{sup 3}–10{sup 4} were obtained. It is expected that these device characteristics can be improved by further process optimization. - Highlights: • Layer by layer growth of Ge • Uniform interface between Ge and the insulator • Gate leakage current and drain current saturation seem to be well controlled. • The output characteristics show good saturation.

  6. Tunnel field-effect transistors with germanium/strained-silicon hetero-junctions for low power applications

    International Nuclear Information System (INIS)

    Kim, Minsoo; Kim, Younghyun; Yokoyama, Masafumi; Nakane, Ryosho; Kim, SangHyeon; Takenaka, Mitsuru; Takagi, Shinichi

    2014-01-01

    We have studied a simple structure n-channel tunnel field-effect transistor with a pure-Ge/strained-Si hetero-junction. The device operation was demonstrated for the devices fabricated by combining epitaxially-grown Ge on strained-silicon-on-insulator substrates. Atomic-layer-deposition-Al 2 O 3 -based gate stacks were formed with electron cyclotron resonance plasma post oxidation to ensure the high quality metal–oxide–semiconductor interface between the high-k insulator and Ge. While the gate leakage current and drain current saturation are well controlled, relatively higher minimum subthreshold swing of 125 mV/dec and lower I ON /I OFF ratio of 10 3 –10 4 were obtained. It is expected that these device characteristics can be improved by further process optimization. - Highlights: • Layer by layer growth of Ge • Uniform interface between Ge and the insulator • Gate leakage current and drain current saturation seem to be well controlled. • The output characteristics show good saturation

  7. Polarity and air-stability transitions in field-effect transistors based on fullerenes with different solubilizing groups.

    Science.gov (United States)

    Yu, Hojeong; Cho, Han-Hee; Cho, Chul-Hee; Kim, Ki-Hyun; Kim, Dong Yeong; Kim, Bumjoon J; Oh, Joon Hak

    2013-06-12

    A series of o-xylene and indene fullerene derivatives with varying frontier molecular orbital energy levels were utilized for assessing the impact of the number of solubilizing groups on the electrical performance of fullerene-based organic-field-effect transistors (OFETs). The charge-carrier polarity was found to be strongly dependent upon the energy levels of fullerene derivatives. The o-xylene C60 monoadduct (OXCMA) and indene C60 monoadduct (ICMA) exhibited unipolar n-channel behaviors with high electron mobilities, whereas the bis- and trisadducts of indene and o-xylene C60 derivatives showed ambipolar charge transport. The OXCMA OFETs fabricated by solution shearing and molecular n-type doping showed an electron mobility of up to 2.28 cm(2) V(-1) s(-1), which is one of the highest electron mobilities obtained from solution-processed fullerene thin-film devices. Our findings systematically demonstrate the relationship between the energy level and charge-carrier polarity and provide insight into molecular design and processing strategies toward high-performance fullerene-based OFETs.

  8. In-situ SiN{sub x}/InN structures for InN field-effect transistors

    Energy Technology Data Exchange (ETDEWEB)

    Zervos, Ch., E-mail: hzervos@physics.uoc.gr; Georgakilas, A. [Microelectronics Research Group (MRG), Institute of Electronic Structure and Laser (IESL), Foundation for Research and Technology-Hellas - FORTH, P.O. Box 1385, GR-70013 Heraklion, Crete (Greece); Department of Physics, University of Crete, P.O. Box 2208, GR-71003 Heraklion, Crete (Greece); Adikimenakis, A.; Kostopoulos, A.; Kayambaki, M.; Tsagaraki, K.; Konstantinidis, G. [Microelectronics Research Group (MRG), Institute of Electronic Structure and Laser (IESL), Foundation for Research and Technology-Hellas - FORTH, P.O. Box 1385, GR-70013 Heraklion, Crete (Greece); Beleniotis, P. [Department of Physics, University of Crete, P.O. Box 2208, GR-71003 Heraklion, Crete (Greece)

    2016-04-04

    Critical aspects of InN channel field-effect transistors (FETs) have been investigated. SiN{sub x} dielectric layers were deposited in-situ, in the molecular beam epitaxy system, on the surface of 2 nm InN layers grown on GaN (0001) buffer layers. Metal-insulator-semiconductor Ni/SiN{sub x}/InN capacitors were analyzed by capacitance-voltage (C-V) and current-voltage measurements and were used as gates in InN FET transistors (MISFETs). Comparison of the experimental C-V results with self-consistent Schrödinger-Poisson calculations indicates the presence of a positive charge at the SiN{sub x}/InN interface of Q{sub if} ≈ 4.4 – 4.8 × 10{sup 13 }cm{sup −2}, assuming complete InN strain relaxation. Operation of InN MISFETs was demonstrated, but their performance was limited by a catastrophic breakdown at drain-source voltages above 2.5–3.0 V, the low electron mobility, and high series resistances of the structures.

  9. In-situ thermal annealing of on-membrane silicon-on-insulator semiconductor-based devices after high gamma dose irradiation.

    Science.gov (United States)

    Amor, S; André, N; Kilchytska, V; Tounsi, F; Mezghani, B; Gérard, P; Ali, Z; Udrea, F; Flandre, D; Francis, L A

    2017-05-05

    In this paper, we investigate the recovery of some semiconductor-based components, such as N/P-type field-effect transistors (FETs) and a complementary metal-oxide-semiconductor (CMOS) inverter, after being exposed to a high total dose of gamma ray radiation. The employed method consists mainly of a rapid, low power and in situ annealing mitigation technique by silicon-on-insulator micro-hotplates. Due to the ionizing effect of the gamma irradiation, the threshold voltages showed an average shift of -580 mV for N-channel transistors, and -360 mV for P-MOSFETs. A 4 min double-cycle annealing of components with a heater temperature up to 465 °C, corresponding to a maximum power of 38 mW, ensured partial recovery but was not sufficient for full recovery. The degradation was completely recovered after the use of a built-in high temperature annealing process, up to 975 °C for 8 min corresponding to a maximum power of 112 mW, which restored the normal operating characteristics for all devices after their irradiation.

  10. Amphoteric Behavior of Impurities in GaN Film Grown on Si Substrate

    Science.gov (United States)

    Cho, Hyun-Ick; Lee, Dong-Sik; Lee, Heon-Bok; Hahm, Sung-Ho; Lee, Jung-Hee

    2007-05-01

    Hall measurement presented that an unintentionally doped uniform and crack-free GaN film grown on n-type (111)-oriented Si substrate with high temperature-grown relatively thin AlN single and multiple buffer layer shows p-type conductivity. The position of valence band maximum at the surface of the film measured by the synchrotron radiation photoemission spectroscopy is below Fermi level at 1.09 eV due to band bending at the surface, which is indicative for the p-type nature of the grown film. The n-channel metal-oxide-semiconductor field effect transistor (MOSFET) fabricated on the GaN layer exhibited normally-off mode operation. This cannot be achieved if the GaN layer is not p-type. It is believed that the spatial coordination of auto-doped Si atoms, out-diffused from the substrate, or carbon complexes from metal-organic (MO) precursor favorably occupy the substitutional nitrogen site of the GaN film when the film is under tensile strain during the growth, which clearly explains that the p-type conduction is originated from the stress dependent amphoteric nature of Si atom and/or carbon complex in GaN.

  11. Validation of a Portable Low-Power Deep Brain Stimulation Device Through Anxiolytic Effects in a Laboratory Rat Model.

    Science.gov (United States)

    Kouzani, Abbas Z; Kale, Rajas P; Zarate-Garza, Pablo Patricio; Berk, Michael; Walder, Ken; Tye, Susannah J

    2017-09-01

    Deep brain stimulation (DBS) devices deliver electrical pulses to neural tissue through an electrode. To study the mechanisms and therapeutic benefits of deep brain stimulation, murine preclinical research is necessary. However, conducting naturalistic long-term, uninterrupted animal behavioral experiments can be difficult with bench-top systems. The reduction of size, weight, power consumption, and cost of DBS devices can assist the progress of this research in animal studies. A low power, low weight, miniature DBS device is presented in this paper. This device consists of electronic hardware and software components including a low-power microcontroller, an adjustable current source, an n-channel metal-oxide-semiconductor field-effect transistor, a coin-cell battery, electrode wires and a software program to operate the device. Evaluation of the performance of the device in terms of battery lifetime and device functionality through bench and in vivo tests was conducted. The bench test revealed that this device can deliver continuous stimulation current pulses of strength [Formula: see text], width [Formula: see text], and frequency 130 Hz for over 22 days. The in vivo tests demonstrated that chronic stimulation of the nucleus accumbens (NAc) with this device significantly increased psychomotor activity, together with a dramatic reduction in anxiety-like behavior in the elevated zero-maze test.

  12. Reversibly Bistable Flexible Electronics

    KAUST Repository

    Alfaraj, Nasir

    2015-05-01

    Introducing the notion of transformational silicon electronics has paved the way for integrating various applications with silicon-based, modern, high-performance electronic circuits that are mechanically flexible and optically semitransparent. While maintaining large-scale production and prototyping rapidity, this flexible and translucent scheme demonstrates the potential to transform conventionally stiff electronic devices into thin and foldable ones without compromising long-term performance and reliability. In this work, we report on the fabrication and characterization of reversibly bistable flexible electronic switches that utilize flexible n-channel metal-oxide-semiconductor field-effect transistors. The transistors are fabricated initially on rigid (100) silicon substrates before they are peeled off. They can be used to control flexible batches of light-emitting diodes, demonstrating both the relative ease of scaling at minimum cost and maximum reliability and the feasibility of integration. The peeled-off silicon fabric is about 25 µm thick. The fabricated devices are transferred to a reversibly bistable flexible platform through which, for example, a flexible smartphone can be wrapped around a user’s wrist and can also be set back to its original mechanical position. Buckling and cyclic bending of such host platforms brings a completely new dimension to the development of flexible electronics, especially rollable displays.

  13. Impacts of gate bias and its variation on gamma-ray irradiation resistance of SiC MOSFETs

    Energy Technology Data Exchange (ETDEWEB)

    Murata, Koichi; Mitomo, Satoshi; Matsuda, Takuma; Yokoseki, Takashi [Saitama University, Sakuraku (Japan); National Institutes for Quantum and Radiological Science and Technology (QST), Takasaki (Japan); Makino, Takahiro; Onoda, Shinobu; Takeyama, Akinori; Ohshima, Takeshi [National Institutes for Quantum and Radiological Science and Technology (QST), Takasaki (Japan); Okubo, Shuichi; Tanaka, Yuki; Kandori, Mikio; Yoshie, Toru [Sanken Electric Co., Ltd., Niiza, Saitama (Japan); Hijikata, Yasuto [Saitama University, Sakuraku (Japan)

    2017-04-15

    Gamma-ray irradiation into vertical type n-channel hexagonal (4H)-silicon carbide (SiC) metal-oxide-semiconductor field effect transistors (MOSFETs) was performed under various gate biases. The threshold voltage for the MOSFETs irradiated with a constant positive gate bias showed a large negative shift, and the shift slightly recovered above 100 kGy. For MOSFETs with non- and a negative constant biases, no significant change in threshold voltage, V{sub th}, was observed up to 400 kGy. By changing the gate bias from positive bias to either negative or non-bias, the V{sub th} significantly recovered from the large negative voltage shift induced by 50 kGy irradiation with positive gate bias after only 10 kGy irradiation with either negative or zero bias. It indicates that the positive charges generated in the gate oxide near the oxide-SiC interface due to irradiation were removed or recombined instantly by the irradiation under zero or negative biases. (copyright 2016 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim)

  14. Dopingless ferroelectric tunnel FET architecture for the improvement of performance of dopingless n-channel tunnel FETs

    Science.gov (United States)

    Lahgere, Avinash; Panchore, Meena; Singh, Jawar

    2016-08-01

    In this paper, we propose a novel tunnel field-effect transistor (TFET) based on charge plasma (CP) and negative capacitance (NC) for enhanced ON-current and steep subthreshold swing (SS). It is shown that the replacement of standard insulator for gate stack with ferroelectric (Fe) insulator yields NC and high electric field at the tunneling junction. Similarly, use of dopingless silicon nanowire with CP has a genuine advantage in process engineering. Therefore, combination of both technology boosters (CP and NC) in the proposed device enable low thermal budget, process variation immunity, and excellent electrical characteristics in contrast with its counterpart dopingless (DL) TFET (DL-TFET). An optimized device accomplishes an impressive 10× improvement in on-current, 100× reduced leakage current, 3× more transconductance (gm), and on-off current ratio of ∼1011 as compared to DL-TFET.

  15. G(sup 4)FET Implementations of Some Logic Circuits

    Science.gov (United States)

    Mojarradi, Mohammad; Akarvardar, Kerem; Cristoleveanu, Sorin; Gentil, Paul; Blalock, Benjamin; Chen, Suhan

    2009-01-01

    Some logic circuits have been built and demonstrated to work substantially as intended, all as part of a continuing effort to exploit the high degrees of design flexibility and functionality of the electronic devices known as G(sup 4)FETs and described below. These logic circuits are intended to serve as prototypes of more complex advanced programmable-logicdevice-type integrated circuits, including field-programmable gate arrays (FPGAs). In comparison with prior FPGAs, these advanced FPGAs could be much more efficient because the functionality of G(sup 4)FETs is such that fewer discrete components are needed to perform a given logic function in G(sup 4)FET circuitry than are needed perform the same logic function in conventional transistor-based circuitry. The underlying concept of using G(sup 4)FETs as building blocks of programmable logic circuitry was also described, from a different perspective, in G(sup 4)FETs as Universal and Programmable Logic Gates (NPO-41698), NASA Tech Briefs, Vol. 31, No. 7 (July 2007), page 44. A G(sup 4)FET can be characterized as an accumulation-mode silicon-on-insulator (SOI) metal oxide/semiconductor field-effect transistor (MOSFET) featuring two junction field-effect transistor (JFET) gates. The structure of a G(sup 4)FET (see Figure 1) is the same as that of a p-channel inversion-mode SOI MOSFET with two body contacts on each side of the channel. The top gate (G1), the substrate emulating a back gate (G2), and the junction gates (JG1 and JG2) can be biased independently of each other and, hence, each can be used to independently control some aspects of the conduction characteristics of the transistor. The independence of the actions of the four gates is what affords the enhanced functionality and design flexibility of G(sup 4)FETs. The present G(sup 4)FET logic circuits include an adjustable-threshold inverter, a real-time-reconfigurable logic gate, and a dynamic random-access memory (DRAM) cell (see Figure 2). The configuration

  16. Nanowire Tunnel Field Effect Transistors: Prospects and Pitfalls

    OpenAIRE

    Sylvia, Somaia Sarwat

    2014-01-01

    The tunnel field effect transistor (TFET) has the potential to operate at lower voltages and lower power than the field effect transistor (FET). The TFET can circumvent the fundamental thermal limit of the inverse subthreshold slope (S) by exploiting interband tunneling of non-equilibrium "cold" carriers. The conduction mechanism in the TFET is governed by band-to-band tunneling which limits the drive current. TFETs built with III-V materials like InAs and InSb can produce enough tunneling cu...

  17. Strontium titanate resistance modulation by ferroelectric field effect

    CERN Document Server

    Marré, D; Bellingeri, E; Pallecchi, I; Pellegrino, L; Siri, A S

    2003-01-01

    Among perovskite oxides strontium titanate (STO) SrTiO sub 3 undergoes a metal-insulator transition at very low carrier concentration and exhibits high mobility values at low temperature. We exploited such electrical properties and the structural compatibility of perovskite oxide materials in realizing ferroelectric field effect epitaxial heterostructures. By pulsed laser deposition, we grew patterned field effect devices, consisting of lanthanum doped STO and Pb(Zr,Ti)O sub 3. Such devices showed a resistance modulation up to 20%, consistent with geometrical parameters and carrier concentration of the semiconducting channel.

  18. High mobility polymer gated organic field effect transistor using zinc ...

    Indian Academy of Sciences (India)

    Mater. Sci., Vol. 37, No. 1, February 2014, pp. 95–99. c Indian Academy of Sciences. High mobility polymer gated organic field effect transistor using zinc phthalocyanine. K R RAJESH. ∗. , V KANNAN, M R KIM, Y S CHAE and J K RHEE. Millimeter- Wave Innovation Technology Research Centre (MINT), Dongguk University,.

  19. Ambipolar light-emitting organic field-effect transistor

    NARCIS (Netherlands)

    Rost, Constance; Karg, Siegfried; Riess, Walter; Loi, Maria Antonietta; Murgia, Mauro; Muccini, Michele

    2004-01-01

    We demonstrate a light-emitting organic field-effect transistor (OFET) with pronounced ambipolar current characteristics. The ambipolar transport layer is a coevaporated thin film of α-quinquethiophene (α-5T) as hole-transport material and N,N'-ditridecylperylene-3,4,9,10-tetracarboxylic diimide

  20. Bimolecular recombination in ambipolar organic field effect transistors

    NARCIS (Netherlands)

    Charrier, D.S.H.; Vries, T. de; Mathijssen, S.G.J.; Geluk, E.-J.; Smits, E.C.P.; Kemerink, M.; Janssen, R.A.J.

    2009-01-01

    In ambipolar organic field effect transistors (OFET) the shape of the channel potential is intimately related to the recombination zone width W, and hence to the electron–hole recombination strength. Experimentally, the recombination profile can be assessed by scanning Kelvin probe microscopy

  1. Electronic properties of germanane field-effect transistors

    NARCIS (Netherlands)

    Madhushankar, B.N.; Kaverzin, A.; Giousis, T.; Potsi, G.; Gournis, D.; Rudolf, P.; Blake, G.R.; van der Wal, C.H.; van Wees, B.J.

    2017-01-01

    A new two dimensional (2D) material—germanane—has been synthesised recently with promising electrical and optical properties. In this paper we report the first realisation of germanane field-effect transistors fabricated from multilayer single crystal flakes. Our germanane devices show transport in

  2. High mobility polymer gated organic field effect transistor using zinc ...

    Indian Academy of Sciences (India)

    Organic semiconductor; field effect transistor; phthalocyanine; high mobility. Abstract. Organic thin film transistors were fabricated using evaporated zinc phthalocyanine as the active layer. Parylene film prepared by chemical vapour deposition was used as the organic gate insulator. The annealing of the samples was ...

  3. Single-molecule probes in organic field-effect transistors

    NARCIS (Netherlands)

    Nicolet, Aurélien Armel Louis

    2007-01-01

    The goal of this thesis is to study charge transport phenomena in organic materials. This is done optically by means of single-molecule spectroscopy in a field-effect transistor based on a molecular crystal. We present (in Chapter 2) a fundamental requirement for single-molecule spectroscopy

  4. Physics of organic ferroelectric field-effect transistors

    NARCIS (Netherlands)

    Brondijk, J.J.; Asadi, K.; Blom, P.W.M.; Leeuw, D.M. de

    2012-01-01

    Most of the envisaged applications of organic electronics require a nonvolatile memory that can be programmed, erased, and read electrically. Ferroelectric field-effect transistors (FeFET) are especially suitable due to the nondestructive read-out and low power consumption. Here, an analytical model

  5. Field-effect pH Control in Nanochannels

    NARCIS (Netherlands)

    Veenhuis, R.B.H.; van der Wouden, E.J.; van Nieuwkasteele, Jan William; van den Berg, Albert; Eijkel, Jan C.T.; Kim, Tae Song; Lee, Yoon-Sik; Chung, Taek-Dong; Jeon, Noo Li; Lee, Sang-Hoon; Suh, Kaph-Yang; Choo, Jaebum; Kim, Yong-Kweon

    2009-01-01

    We demonstrate a novel capacitive method to change the pH in nanochannels. The device employs metal electrodes outside an insulating channel wall to change the electrical double layer potential by the field effect (‘voltage gating’). We demonstrate that this potential change is accompanied by a

  6. Nanoscaled biological gated field effect transistors for cytogenetic analysis

    DEFF Research Database (Denmark)

    Kwasny, Dorota; Dimaki, Maria; Andersen, Karsten Brandt

    2014-01-01

    Cytogenetic analysis is the study of chromosome structure and function, and is often used in cancer diagnosis, as many chromosome abnormalities are linked to the onset of cancer. A novel label free detection method for chromosomal translocation analysis using nanoscaled field effect transistors...

  7. Time-reversal symmetry breaking by ac field: Effect of ...

    Indian Academy of Sciences (India)

    Time-reversal symmetry breaking by ac field: Effect of commensurability in the frequency domain. V E KRAVTSOV. Present address: The Abdus Salam International Centre for Theoretical Physics, P.O. Box 586, 34100. Trieste, Italy. Landau Institute for Theoretical Physics, 2 Kosygina Street, 117940 Moscow, Russia.

  8. Unraveling the mechanism of ultraviolet-induced optical gating in Zn1-x Mg x O nanocrystal solid solution field effect transistors

    Science.gov (United States)

    Kim, Youngjun; Cho, Seongeun; Park, Byoungnam

    2018-03-01

    We report ultraviolet (UV)-induced optical gating in a Zn1-x Mg x O nanocrystal solid solution (NCSS) field effect transistor (FET) through a systematic study in which UV-induced charge transport properties are probed as a function of Mg composition. Change in the electrical properties of Zn1-x Mg x O NCSS associated with electronic traps is investigated by field effect-modulated current-voltage characteristic curves in the dark and under illumination. Under UV illumination, significant threshold voltage shift to a more negative value in an n-channel Zn1-x Mg x O NCSS FET is observed. Importantly, as the Mg composition increases, the effect of UV illumination on the threshold voltage shift is alleviated. We found that threshold voltage shift as a function of Mg composition in the dark and under illumination is due to difference in the deep trap density in the Zn1-x Mg x O NCSS. This is supported by Mg composition dependent photoluminescence intensity in the visible range and reduced FET mobility with Mg addition. The presence of the deep traps and the corresponding trap energy levels in the Zn1-x Mg x O NCSS are ensured by photoelectron spectroscopy in air.

  9. Source-Coupled, N-Channel, JFET-Based Digital Logic Gate Structure Using Resistive Level Shifters

    Science.gov (United States)

    Krasowski, Michael J.

    2011-01-01

    A circuit topography is used to create usable, digital logic gates using N (negatively doped) channel junction field effect transistors (JFETs), load resistors, level shifting resistors, and supply rails whose values are based on the DC parametric distributions of these JFETs. This method has direct application to the current state-of-the-art in high-temperature (300 to 500 C and higher) silicon carbide (SiC) device production, and defines an adaptation to the logic gate described in U.S. Patent 7,688,117 in that, by removing the level shifter from the output of the gate structure described in the patent (and applying it to the input of the same gate), a source-coupled gate topography is created. This structure allows for the construction AND/OR (sum of products) arrays that use far fewer transistors and resistors than the same array as constructed from the gates described in the aforementioned patent. This plays a central role when large multiplexer constructs are necessary; for example, as in the construction of memory. This innovation moves the resistive level shifter from the output of the basic gate structure to the front as if the input is now configured as what would be the output of the preceding gate, wherein the output is the two level shifting resistors. The output of this innovation can now be realized as the lone follower transistor with its source node as the gate output. Additionally, one may leave intact the resistive level shifter on the new gate topography. A source-coupled to direct-coupled logic translator will be the result.

  10. Fringe field effects in small rings of large acceptance

    Directory of Open Access Journals (Sweden)

    Martin Berz

    2000-12-01

    Full Text Available Recently there has been renewed interest in the influence of fringe fields on particle dynamics, due to studies that revealed their importance in some cases, as, for example, the proposed Neutrino Factory and muon colliders. In this paper, we present a systematic study of generic fringe field effects. Using as an example a lattice of the proposed Neutrino Factory, we show that fringe fields influence the dynamics of particles at all orders, starting with the linear motion. It is found that the widely used sharp cutoff approximation leads to divergences regardless of the specific fall-off shape of the fields. The results suggest that a careful consideration of fringe field effects in the design stage of small machines for large emittances is always recommended.

  11. Electric-field effects in optically generated spin transport

    Energy Technology Data Exchange (ETDEWEB)

    Miah, M. Idrish [Nanoscale Science and Technology Centre and School of Biomolecular and Physical Sciences, Griffith University, Nathan, Brisbane, QLD 4111 (Australia); Department of Physics, University of Chittagong, Chittagong 4331 (Bangladesh)], E-mail: m.miah@griffith.edu.au

    2009-05-25

    Transport of spin-polarized electrons in semiconductors is studied experimentally. Spins are generated by optical excitation because of the selection rules governing optical transitions from heavy-hole and light-hole states to conduction-band states. Experiments designed for the control of spins in semiconductors investigate the bias-dependent spin transport process and detect the spin-polarized electrons during transport. A strong bias dependence is observed. The electric-field effects on the spin-polarized electron transport are also found to be depended on the excitation photon energy and temperature. Based on a field-dependent spin relaxation mechanism, the electric-field effects in the transport process are discussed.

  12. Field-effect transistor memories based on ferroelectric polymers

    Science.gov (United States)

    Zhang, Yujia; Wang, Haiyang; Zhang, Lei; Chen, Xiaomeng; Guo, Yu; Sun, Huabin; Li, Yun

    2017-11-01

    Field-effect transistors based on ferroelectrics have attracted intensive interests, because of their non-volatile data retention, rewritability, and non-destructive read-out. In particular, polymeric materials that possess ferroelectric properties are promising for the fabrications of memory devices with high performance, low cost, and large-area manufacturing, by virtue of their good solubility, low-temperature processability, and good chemical stability. In this review, we discuss the material characteristics of ferroelectric polymers, providing an update on the current development of ferroelectric field-effect transistors (Fe-FETs) in non-volatile memory applications. Program supported partially by the NSFC (Nos. 61574074, 61774080), NSFJS (No. BK20170075), and the Open Partnership Joint Projects of NSFC-JSPS Bilateral Joint Research Projects (No. 61511140098).

  13. Graphene-based field-effect transistor biosensors

    Science.gov (United States)

    Chen; , Junhong; Mao, Shun; Lu, Ganhua

    2017-06-14

    The disclosure provides a field-effect transistor (FET)-based biosensor and uses thereof. In particular, to FET-based biosensors using thermally reduced graphene-based sheets as a conducting channel decorated with nanoparticle-biomolecule conjugates. The present disclosure also relates to FET-based biosensors using metal nitride/graphene hybrid sheets. The disclosure provides a method for detecting a target biomolecule in a sample using the FET-based biosensor described herein.

  14. Organic field-effect transistors using single crystals.

    Science.gov (United States)

    Hasegawa, Tatsuo; Takeya, Jun

    2009-04-01

    Organic field-effect transistors using small-molecule organic single crystals are developed to investigate fundamental aspects of organic thin-film transistors that have been widely studied for possible future markets for 'plastic electronics'. In reviewing the physics and chemistry of single-crystal organic field-effect transistors (SC-OFETs), the nature of intrinsic charge dynamics is elucidated for the carriers induced at the single crystal surfaces of molecular semiconductors. Materials for SC-OFETs are first reviewed with descriptions of the fabrication methods and the field-effect characteristics. In particular, a benchmark carrier mobility of 20-40 cm 2 Vs -1 , achieved with thin platelets of rubrene single crystals, demonstrates the significance of the SC-OFETs and clarifies material limitations for organic devices. In the latter part of this review, we discuss the physics of microscopic charge transport by using SC-OFETs at metal/semiconductor contacts and along semiconductor/insulator interfaces. Most importantly, Hall effect and electron spin resonance (ESR) measurements reveal that interface charge transport in molecular semiconductors is properly described in terms of band transport and localization by charge traps.

  15. Organic field-effect transistors using single crystals

    Directory of Open Access Journals (Sweden)

    Tatsuo Hasegawa and Jun Takeya

    2009-01-01

    Full Text Available Organic field-effect transistors using small-molecule organic single crystals are developed to investigate fundamental aspects of organic thin-film transistors that have been widely studied for possible future markets for 'plastic electronics'. In reviewing the physics and chemistry of single-crystal organic field-effect transistors (SC-OFETs, the nature of intrinsic charge dynamics is elucidated for the carriers induced at the single crystal surfaces of molecular semiconductors. Materials for SC-OFETs are first reviewed with descriptions of the fabrication methods and the field-effect characteristics. In particular, a benchmark carrier mobility of 20–40 cm2 Vs−1, achieved with thin platelets of rubrene single crystals, demonstrates the significance of the SC-OFETs and clarifies material limitations for organic devices. In the latter part of this review, we discuss the physics of microscopic charge transport by using SC-OFETs at metal/semiconductor contacts and along semiconductor/insulator interfaces. Most importantly, Hall effect and electron spin resonance (ESR measurements reveal that interface charge transport in molecular semiconductors is properly described in terms of band transport and localization by charge traps.

  16. Lead iodide perovskite light-emitting field-effect transistor

    Science.gov (United States)

    Chin, Xin Yu; Cortecchia, Daniele; Yin, Jun; Bruno, Annalisa; Soci, Cesare

    2015-06-01

    Despite the widespread use of solution-processable hybrid organic-inorganic perovskites in photovoltaic and light-emitting applications, determination of their intrinsic charge transport parameters has been elusive due to the variability of film preparation and history-dependent device performance. Here we show that screening effects associated to ionic transport can be effectively eliminated by lowering the operating temperature of methylammonium lead iodide perovskite (CH3NH3PbI3) field-effect transistors. Field-effect carrier mobility is found to increase by almost two orders of magnitude below 200 K, consistent with phonon scattering-limited transport. Under balanced ambipolar carrier injection, gate-dependent electroluminescence is also observed from the transistor channel, with spectra revealing the tetragonal to orthorhombic phase transition. This demonstration of CH3NH3PbI3 light-emitting field-effect transistors provides intrinsic transport parameters to guide materials and solar cell optimization, and will drive the development of new electro-optic device concepts, such as gated light-emitting diodes and lasers operating at room temperature.

  17. Geminate free radical processes and magnetic field effects

    International Nuclear Information System (INIS)

    Eveson, Robert W.

    2000-01-01

    This thesis is concerned with the study of the dynamics of radical pair recombination reactions in solution by flash photolysis Electron Spin Resonance (ESR) and the influence of low static external magnetic fields upon them (MFE). An outline of the concepts of ESR is presented, followed by the theories of Chemically Induced Dynamic Electron Polarisation (CIDEP) of transient radical pairs. This is then followed by a brief review of the flash photolysis ESR apparatus and application of the Bloch equations to solve the equations of time-resolved ESR. Completing the theory section is an overview of the mechanisms by which magnetic fields alter the course of a geminate radical pair reaction in solution. Experimental CIDEP observations of the radical pair produced on photolysis of 1,3-dihydroxypropanone are simulated using polarisation theory and applied to a random-walk diffusion model to find, for the first time, the geminate reaction probability in solutions of varying viscosity. CIDEP spectra of the radical pair formed on photolysis of hydroxypropanone in contrast are not accounted for by current polarisation theory. The discrepancy is due to moderately fast relaxation of the acyl radical, CH 3 CO·, which alters the relative intensities in the ST 0 RPM pattern of the counter radical. Calculations taking into account this now provide an adequate basis for simulation of the spectrum. This method also, in principle, represents a new method for the measurement of phase relaxation times. Concluding the ESR work is a CIDEP study of 2,4,6-trimethylbenzoyl diphenylphosphine oxide. Unusual spin polarisation phenomena are found. The time-resolved optical absorption spectroscopy technique used for detecting low magnetic field effects on neutral radical pair reactions is described. Various improvements to the experiment are discussed which result in the observation of the low field effect for a neutral radical pair produced by Norrish type II chemistry. This is followed by an

  18. Functionalized methanofullerenes used as n-type materials in bulk-heterojunction polymer solar cells and in field-effect transistors.

    Science.gov (United States)

    Yang, Changduk; Kim, Jin Young; Cho, Shinuk; Lee, Jae Kwan; Heeger, Alan J; Wudl, Fred

    2008-05-21

    The synthesis of two well-solubilized [60]methanofullerene derivatives ( p- EHO-PCBM and p- EHO-PCBA) is presented for usage in organic solar cells and in field-effect transistors. The para position of the PCBM's phenyl ring was substituted with a branched alkoxy side chain, which contributes to higher solubility, facilitating synthesis, purification, and processing. We find a small change of the open-circuit voltage ( V oc) as a slight improvement in performance upon application in P3HT/[60]methanofullerene bulk-heterojunction-photovoltaic cells, when compared to PCBM, because of the electron donation of the alkoxy group. In the case of the devices with a TiO x layer, the best power conversion efficiencies (PCE, eta e) is observed in a layered structure of P3HT/ p- EHO-PCBA/TiO x (eta e = 2.6%), which slightly exceeds that of P3HT/PCBM/TiO x (eta e = 2.3%) under conditions reported here. This can be attributed, in part, to the carboxylic acid group in p- EHO-PCBA that leads to an effective interface interaction between the active layer and TiO x phase. In addition, n-channel organic field-effect transistor (OFET) devices were fabricated with thin films of p- EHO-PCBM and p- EHO-PCBA, respectively cast from solution on SiO 2/Si substrates. The values of field-effect mobility (mu) for p- EHO-PCBM and p- EHO-PCBA are 1 x 10 (-2) and 1.6 x 10 (-3) cm (2)/V.s, respectively. The results in this paper demonstrate the effects of a carboxylic acid group and an electron-donating substituent in [60]methanofullerenes as n-type materials with respect to organic solar cells and OFET applications.

  19. Integration of biomolecular logic gates with field-effect transducers

    International Nuclear Information System (INIS)

    Poghossian, A.; Malzahn, K.; Abouzar, M.H.; Mehndiratta, P.; Katz, E.; Schoening, M.J.

    2011-01-01

    Highlights: → Enzyme-based AND/OR logic gates are integrated with a capacitive field-effect sensor. → The AND/OR logic gates compose of multi-enzyme system immobilised on sensor surface. → Logic gates were activated by different combinations of chemical inputs (analytes). → The logic output (pH change) produced by the enzymes was read out by the sensor. - Abstract: The integration of biomolecular logic gates with field-effect devices - the basic element of conventional electronic logic gates and computing - is one of the most attractive and promising approaches for the transformation of biomolecular logic principles into macroscopically useable electrical output signals. In this work, capacitive field-effect EIS (electrolyte-insulator-semiconductor) sensors based on a p-Si-SiO 2 -Ta 2 O 5 structure modified with a multi-enzyme membrane have been used for electronic transduction of biochemical signals processed by enzyme-based OR and AND logic gates. The realised OR logic gate composes of two enzymes (glucose oxidase and esterase) and was activated by ethyl butyrate or/and glucose. The AND logic gate composes of three enzymes (invertase, mutarotase and glucose oxidase) and was activated by two chemical input signals: sucrose and dissolved oxygen. The developed integrated enzyme logic gates produce local pH changes at the EIS sensor surface as a result of biochemical reactions activated by different combinations of chemical input signals, while the pH value of the bulk solution remains unchanged. The pH-induced charge changes at the gate-insulator (Ta 2 O 5 ) surface of the EIS transducer result in an electronic signal corresponding to the logic output produced by the immobilised enzymes. The logic output signals have been read out by means of a constant-capacitance method.

  20. Integration of biomolecular logic gates with field-effect transducers

    Energy Technology Data Exchange (ETDEWEB)

    Poghossian, A., E-mail: a.poghossian@fz-juelich.de [Institute of Nano- and Biotechnologies, Aachen University of Applied Sciences, Campus Juelich, Heinrich-Mussmann-Str. 1, D-52428 Juelich (Germany); Institute of Bio- and Nanosystems, Research Centre Juelich GmbH, D-52425 Juelich (Germany); Malzahn, K. [Institute of Nano- and Biotechnologies, Aachen University of Applied Sciences, Campus Juelich, Heinrich-Mussmann-Str. 1, D-52428 Juelich (Germany); Abouzar, M.H. [Institute of Nano- and Biotechnologies, Aachen University of Applied Sciences, Campus Juelich, Heinrich-Mussmann-Str. 1, D-52428 Juelich (Germany); Institute of Bio- and Nanosystems, Research Centre Juelich GmbH, D-52425 Juelich (Germany); Mehndiratta, P. [Institute of Nano- and Biotechnologies, Aachen University of Applied Sciences, Campus Juelich, Heinrich-Mussmann-Str. 1, D-52428 Juelich (Germany); Katz, E. [Department of Chemistry and Biomolecular Science, NanoBio Laboratory (NABLAB), Clarkson University, Potsdam, NY 13699-5810 (United States); Schoening, M.J. [Institute of Nano- and Biotechnologies, Aachen University of Applied Sciences, Campus Juelich, Heinrich-Mussmann-Str. 1, D-52428 Juelich (Germany); Institute of Bio- and Nanosystems, Research Centre Juelich GmbH, D-52425 Juelich (Germany)

    2011-11-01

    Highlights: > Enzyme-based AND/OR logic gates are integrated with a capacitive field-effect sensor. > The AND/OR logic gates compose of multi-enzyme system immobilised on sensor surface. > Logic gates were activated by different combinations of chemical inputs (analytes). > The logic output (pH change) produced by the enzymes was read out by the sensor. - Abstract: The integration of biomolecular logic gates with field-effect devices - the basic element of conventional electronic logic gates and computing - is one of the most attractive and promising approaches for the transformation of biomolecular logic principles into macroscopically useable electrical output signals. In this work, capacitive field-effect EIS (electrolyte-insulator-semiconductor) sensors based on a p-Si-SiO{sub 2}-Ta{sub 2}O{sub 5} structure modified with a multi-enzyme membrane have been used for electronic transduction of biochemical signals processed by enzyme-based OR and AND logic gates. The realised OR logic gate composes of two enzymes (glucose oxidase and esterase) and was activated by ethyl butyrate or/and glucose. The AND logic gate composes of three enzymes (invertase, mutarotase and glucose oxidase) and was activated by two chemical input signals: sucrose and dissolved oxygen. The developed integrated enzyme logic gates produce local pH changes at the EIS sensor surface as a result of biochemical reactions activated by different combinations of chemical input signals, while the pH value of the bulk solution remains unchanged. The pH-induced charge changes at the gate-insulator (Ta{sub 2}O{sub 5}) surface of the EIS transducer result in an electronic signal corresponding to the logic output produced by the immobilised enzymes. The logic output signals have been read out by means of a constant-capacitance method.

  1. Pauli Spin Blockade and the Ultrasmall Magnetic Field Effect

    KAUST Repository

    Danon, Jeroen

    2013-08-06

    Based on the spin-blockade model for organic magnetoresistance, we present an analytic expression for the polaron-bipolaron transition rate, taking into account the effective nuclear fields on the two sites. We reveal the physics behind the qualitatively different magnetoconductance line shapes observed in experiment, as well as the ultrasmall magnetic field effect (USFE). Since our findings agree in detail with recent experiments, they also indirectly provide support for the spin-blockade interpretation of organic magnetoresistance. In addition, we predict the existence of a similar USFE in semiconductor double quantum dots tuned to the spin-blockade regime.

  2. Recent progress in photoactive organic field-effect transistors

    OpenAIRE

    Wakayama, Yutaka; Hayakawa, Ryoma; Seo, Hoon-Seok

    2014-01-01

    Recent progress in photoactive organic field-effect transistors (OFETs) is reviewed. Photoactive OFETs are divided into light-emitting (LE) and light-receiving (LR) OFETs. In the first part, LE-OFETs are reviewed from the viewpoint of the evolution of device structures. Device performances have improved in the last decade with the evolution of device structures from single-layer unipolar to multi-layer ambipolar transistors. In the second part, various kinds of LR-OFETs are featured. These ar...

  3. Organic semiconductors for organic field-effect transistors

    Directory of Open Access Journals (Sweden)

    Yoshiro Yamashita

    2009-01-01

    Full Text Available The advantages of organic field-effect transistors (OFETs, such as low cost, flexibility and large-area fabrication, have recently attracted much attention due to their electronic applications. Practical transistors require high mobility, large on/off ratio, low threshold voltage and high stability. Development of new organic semiconductors is key to achieving these parameters. Recently, organic semiconductors have been synthesized showing comparable mobilities to amorphous-silicon-based FETs. These materials make OFETs more attractive and their applications have been attempted. New organic semiconductors resulting in high-performance FET devices are described here and the relationship between transistor characteristics and chemical structure is discussed.

  4. Directly grown nanocrystalline diamond field-effect transistor microstructures

    Czech Academy of Sciences Publication Activity Database

    Kozak, Halyna; Kromka, Alexander; Babchenko, Oleg; Rezek, Bohuslav

    2010-01-01

    Roč. 8, č. 3 (2010), s. 482-487 ISSN 1546-198X R&D Projects: GA MŠk(CZ) LC06040; GA AV ČR KAN400100701; GA MŠk LC510; GA AV ČR(CZ) IAAX00100902; GA AV ČR KAN400100652 Institutional research plan: CEZ:AV0Z10100521 Keywords : nanocrystalline diamond * microstructures * atomic force microscopy * surface conductivity * field-effect transistor Subject RIV: BM - Solid Matter Physics ; Magnetism Impact factor: 0.602, year: 2010

  5. Ultrathin regioregular poly(3-hexyl thiophene) field-effect transistors

    DEFF Research Database (Denmark)

    Sandberg, H.G.O.; Frey, G.L.; Shkunov, M.N.

    2002-01-01

    Ultrathin films of regioregular poly(3-hexyl thiophene) (RR-P3HT) were deposited through a dip-coating technique and utilized as the semiconducting film in field-effect transistors (FETs). Proper selection of the substrate and solution concentration enabled the growth of a monolayer-thick RR-P3HT...... film. Atomic force microscopy (AFM), U-V-vis absorption spectroscopy, X-ray reflectivity, and grazing incidence diffraction were used to study the growth mechanism, thickness and orientation of self-organized monolayer thick RR-P3HT films on SiO2 surfaces. Films were found to adopt a Stranski...

  6. Electric field effects on fluorescence of the green fluorescent protein

    Science.gov (United States)

    Nakabayashi, Takakazu; Kinjo, Masataka; Ohta, Nobuhiro

    2008-05-01

    External electric field effects on state energy and photoexcitation dynamics have been examined for a mutant of UV-excited green fluorescent protein (GFPuv5) in a PVA film. The electrofluorescence spectrum of GFPuv5 is reproduced by a linear combination between the fluorescence spectrum and its second derivative spectrum, indicating the field-induced fluorescence quenching and the difference in electric dipole moment between the fluorescent state and the ground state. The direct measurements of the field-induced change in fluorescence decay show that the field-induced quenching results from the field-induced increase in the rate of the non-radiative process from the fluorescent state.

  7. ReS2-based interlayer tunnel field effect transistor

    Science.gov (United States)

    Mohammed, Omar B.; Movva, Hema C. P.; Prasad, Nitin; Valsaraj, Amithraj; Kang, Sangwoo; Corbet, Chris M.; Taniguchi, Takashi; Watanabe, Kenji; Register, Leonard F.; Tutuc, Emanuel; Banerjee, Sanjay K.

    2017-12-01

    In this study, we report the fabrication and characterization of a vertical resonant interlayer tunneling field-effect transistor created using exfoliated, few-layer rhenium disulfide (ReS2) flakes as the electrodes and hexagonal boron nitride as the tunnel barrier. Due to the Γ-point conduction band minimum, the ReS2 based system offers the possibility of resonant interlayer tunneling and associated low-voltage negative differential resistance (NDR) without rotational alignment of the electrode crystal orientations. Substantial NDR is observed, which appears consistent with in-plane crystal momentum conserving tunneling, although considerably broadened by scattering consistent within low mobility ReS2 flakes.

  8. Depth of Field Effects for Interactive Direct Volume Rendering

    KAUST Repository

    Schott, Mathias

    2011-06-01

    In this paper, a method for interactive direct volume rendering is proposed for computing depth of field effects, which previously were shown to aid observers in depth and size perception of synthetically generated images. The presented technique extends those benefits to volume rendering visualizations of 3D scalar fields from CT/MRI scanners or numerical simulations. It is based on incremental filtering and as such does not depend on any precomputation, thus allowing interactive explorations of volumetric data sets via on-the-fly editing of the shading model parameters or (multi-dimensional) transfer functions. © 2011 The Author(s).

  9. Field-effect enhanced triboelectric colloidal quantum dot flexible sensor

    Science.gov (United States)

    Meng, Lingju; Xu, Qiwei; Fan, Shicheng; Dick, Carson R.; Wang, Xihua

    2017-10-01

    Flexible electronics, which is of great importance as fundamental sensor and communication technologies for many internet-of-things applications, has established a huge market encroaching into the trillion-dollar market of solid state electronics. For the capability of being processed by printing or spraying, colloidal quantum dots (CQDs) play an increasingly important role in flexible electronics. Although the electrical properties of CQD thin-films are expected to be stable on flexible substrates, their electrical performance could be tuned for applications in flexible touch sensors. Here, we report CQD touch sensors employing polydimethylsiloxane (PDMS) triboelectric films. The electrical response of touching activity is enhanced by incorporating CQD field-effect transistors into the device architecture. Thanks to the use of the CQD thin film as a current amplifier, the field-effect CQD touch sensor shows a fast response to various touching materials, even being bent to a large curvature. It also shows a much higher output current density compared to a PDMS triboelectric touch sensor.

  10. Recent Advance in Organic Spintronics and Magnetic Field Effect

    Science.gov (United States)

    Valy Vardeny, Z.

    2013-03-01

    In this talk several important advances in the field of Organic Spintronics and magnetic field effect (MFE) of organic films and optoelectronic devices that have occurred during the past two years from the Utah group will be surveyed and discussed. (i) Organic Spintronics: We demonstrated spin organic light emitting diode (spin-OLED) using two FM injecting electrodes, where the electroluminescence depends on the mutual orientation of the electrode magnetization directions. This development has opened up research studies into organic spin-valves (OSV) in the space-charge limited current regime. (ii) Magnetic field effect: We demonstrated that the photoinduced absorption spectrum in organic films (where current is not involved) show pronounced MFE. This unravels the underlying mechanism of the MFE in organic devices, to be more in agreement with the field of MFE in Biochemistry. (iii) Spin effects in organic optoelectronic devices: We demonstrated that certain spin 1/2 radical additives to donor-acceptor blends substantially enhance the power conversion efficiency of organic photovoltaic (OPV) solar cells. This effect shows that studies of spin response and MFE in OPV devices are promising. In collaboration with T. Nguyen, E. Ehrenfreund, B. Gautam, Y. Zhang and T. Basel. Supported by the DOE grant 04ER46109 ; NSF Grant # DMR-1104495 and MSF-MRSEC program DMR-1121252 [2,3].

  11. Liquid Crystals for Organic Field-Effect Transistors

    Science.gov (United States)

    O'Neill, Mary; Kelly, Stephen M.

    Columnar, smectic and lamellar polymeric liquid crystals are widely recognized as very promising charge-transporting organic semiconductors due to their ability to spontaneously self-assemble into highly ordered domains in uniform thin films over large areas. The transport properties of smectic and columnar liquid crystals are discussed in Chaps. 2 (10.1007/978-90-481-2873-0_2) and 3 (10.1007/978-90-481-2873-0_3). Here we examine their application to organic field-effect transistors (OFETs): after a short introduction in Sect. 9.1 we introduce the OFET configuration and show how the mobility is measured in Sect. 9.2. Section 9.3 discusses polymeric liquid crystalline semiconductors in OFETs. We review research that shows that annealing of polymers in a fluid mesophase gives a more ordered microcrystalline morphology on cooling than that kinetically determined by solution processing of the thin film. We also demonstrate the benefits of monodomain alignment and show the application of liquid crystals in light-emitting field-effect transistors. Some columnar and smectic phases are highly ordered with short intermolecular separation to give large π-π coupling. We discuss their use in OFETs in Sects. 9.4, and 9.5 respectively. Section 9.6 summarises the conclusions of the chapter.

  12. Magnetic isotope and magnetic field effects on the DNA synthesis

    Science.gov (United States)

    Buchachenko, Anatoly L.; Orlov, Alexei P.; Kuznetsov, Dmitry A.; Breslavskaya, Natalia N.

    2013-01-01

    Magnetic isotope and magnetic field effects on the rate of DNA synthesis catalysed by polymerases β with isotopic ions 24Mg2+, 25Mg2+ and 26Mg2+ in the catalytic sites were detected. No difference in enzymatic activity was found between polymerases β carrying 24Mg2+ and 26Mg2+ ions with spinless, non-magnetic nuclei 24Mg and 26Mg. However, 25Mg2+ ions with magnetic nucleus 25Mg were shown to suppress enzymatic activity by two to three times with respect to the enzymatic activity of polymerases β with 24Mg2+ and 26Mg2+ ions. Such an isotopic dependence directly indicates that in the DNA synthesis magnetic mass-independent isotope effect functions. Similar effect is exhibited by polymerases β with Zn2+ ions carrying magnetic 67Zn and non-magnetic 64Zn nuclei, respectively. A new, ion–radical mechanism of the DNA synthesis is suggested to explain these effects. Magnetic field dependence of the magnesium-catalysed DNA synthesis is in a perfect agreement with the proposed ion–radical mechanism. It is pointed out that the magnetic isotope and magnetic field effects may be used for medicinal purposes (trans-cranial magnetic treatment of cognitive deceases, cell proliferation, control of the cancer cells, etc). PMID:23851636

  13. Gas Sensors Based on Semiconducting Nanowire Field-Effect Transistors

    Directory of Open Access Journals (Sweden)

    Ping Feng

    2014-09-01

    Full Text Available One-dimensional semiconductor nanostructures are unique sensing materials for the fabrication of gas sensors. In this article, gas sensors based on semiconducting nanowire field-effect transistors (FETs are comprehensively reviewed. Individual nanowires or nanowire network films are usually used as the active detecting channels. In these sensors, a third electrode, which serves as the gate, is used to tune the carrier concentration of the nanowires to realize better sensing performance, including sensitivity, selectivity and response time, etc. The FET parameters can be modulated by the presence of the target gases and their change relate closely to the type and concentration of the gas molecules. In addition, extra controls such as metal decoration, local heating and light irradiation can be combined with the gate electrode to tune the nanowire channel and realize more effective gas sensing. With the help of micro-fabrication techniques, these sensors can be integrated into smart systems. Finally, some challenges for the future investigation and application of nanowire field-effect gas sensors are discussed.

  14. Macroscopic local-field effects on photoabsorption processes

    International Nuclear Information System (INIS)

    Ma Xiaoguang; Gong Yubing; Wang Meishan; Wang Dehua

    2008-01-01

    The influence of the local-field effect on the photoabsorption cross sections of the atoms which are embedded in the macroscopic medium has been studied by a set of alternative expressions in detail. Some notes on the validity of some different local-field models used to study the photoabsorption cross sections of atoms in condensed matter have been given for the first time. Our results indicate that the local fields can have substantial and different influence on the photoabsorption cross section of atoms in condensed matter for different models. Clausius-Mossotti model and Onsager model have proved to be more reasonable to describe the local field in gas, liquid, or even some simple solid, while Glauber-Lewenstein model probably is wrong in these conditions except for the ideal gas. A procedure which can avoid the errors introduced by Kramers-Kronig transformation has been implemented in this work. This procedure can guarantee that the theoretical studies on the local field effects will not be influenced by the integral instability of the Kramers-Kronig transformation

  15. Charge carrier velocity in graphene field-effect transistors

    Science.gov (United States)

    Bonmann, Marlene; Vorobiev, Andrei; Andersson, Michael A.; Stake, Jan

    2017-12-01

    To extend the frequency range of transistors into the terahertz domain, new transistor technologies, materials, and device concepts must be continuously developed. The quality of the interface between the involved materials is a highly critical factor. The presence of impurities can degrade device performance and reliability. In this paper, we present a method that allows the study of the charge carrier velocity in a field-effect transistor vs impurity levels. The charge carrier velocity is found using high-frequency scattering parameter measurements followed by delay time analysis. The limiting factors of the saturation velocity and the effect of impurities are then analysed by applying analytical models of the field-dependent and phonon-limited carrier velocity. As an example, this method is applied to a top-gated graphene field-effect transistor (GFET). We find that the extracted saturation velocity is ca. 1.4 ×107 cm/s and is mainly limited by silicon oxide substrate phonons. Within the considered range of residual charge carrier concentrations, charged impurities do not limit the saturation velocity directly by the phonon mechanism. Instead, the impurities act as traps that emit charge carriers at high fields, preventing the current from saturation and thus limiting power gain of the GFETs. The method described in this work helps to better understand the influence of impurities and clarifies methods of further transistor development. High quality interfaces are required to achieve current saturation via velocity saturation in GFETs.

  16. AlGaN/InGaN Nitride Based Modulation Doped Field Effect Transistor

    National Research Council Canada - National Science Library

    Blair, S

    2003-01-01

    The goal of the proposed work is to investigate the potential advantages of the InGaN channel as a host of the 2DEG and to address the material related problems facing this ternary alloy in the AlGaN...

  17. Field-effect Flow Control in Polymer Microchannel Networks

    Science.gov (United States)

    Sniadecki, Nathan; Lee, Cheng S.; Beamesderfer, Mike; DeVoe, Don L.

    2003-01-01

    A new Bio-MEMS electroosmotic flow (EOF) modulator for plastic microchannel networks has been developed. The EOF modulator uses field-effect flow control (FEFC) to adjust the zeta potential at the Parylene C microchannel wall. By setting a differential EOF pumping rate in two of the three microchannels at a T-intersection with EOF modulators, the induced pressure at the intersection generated pumping in the third, field-free microchannel. The EOF modulators are able to change the magnitude and direction of the pressure pumping by inducing either a negative or positive pressure at the intersection. The flow velocity is tracked by neutralized fluorescent microbeads in the microchannels. The proof-of-concept of the EOF modulator described here may be applied to complex plastic ,microchannel networks where individual microchannel flow rates are addressable by localized induced-pressure pumping.

  18. Understanding noise suppression in heterojunction field-effect transistors

    International Nuclear Information System (INIS)

    Green, F.

    1996-01-01

    Full text: The enhanced transport properties displayed by quantum-well-confined, two-dimensional, electron systems underpin the success of heterojunction, field-effect transistors. At cryogenic temperatures, these devices exhibit impressive mobilities and, as a result, high signal gain and low noise. Conventional wisdom has it that the same favourable conditions also hold for normal room-temperature operation. In that case, however, high mobilities are precluded by abundant electron-phonon scattering. Our recent study of nonequilibrium current noise shows that quantum confinement, not high mobility, is the principal source of noise in these devices; this opens up new and exciting opportunities in low-noise transistor design. As trends in millimetre-wave technology push frequencies beyond 100 GHz, it is essential to develop a genuine understanding of noise processes in heterojunction devices

  19. Numerical Modeling of Electromagnetic Field Effects on the Human Body

    Directory of Open Access Journals (Sweden)

    Zuzana Psenakova

    2006-01-01

    Full Text Available Interactions of electromagnetic field (EMF with environment and with tissue of human beings are still under discussion and many research teams are investigating it. The human simulation models are used for biomedical research in a lot of areas, where it is advantage to replace real human body (tissue by the numerical model. Biological effects of EMF are one of the areas, where numerical models are used with many advantages. On the other side, this research is very specific and it is always quite hard to simulate realistic human tissue. This paper deals with different possibilities of numerical modelling of electromagnetic field effects on the human body (especially calculation of the specific absorption rate (SAR distribution in human body and thermal effect.

  20. Electromechanical field effect transistors based on multilayer phosphorene nanoribbons

    Science.gov (United States)

    Jiang, Z. T.; Lv, Z. T.; Zhang, X. D.

    2017-06-01

    Based on the tight-binding Hamiltonian approach, we demonstrate that the electromechanical field effect transistors (FETs) can be realized by using the multilayer phosphorene nanoribbons (PNRs). The synergistic combination of the electric field and the external strains can establish the on-off switching since the electric field can shift or split the energy band, and the mechanical strains can widen or narrow the band widths. This kind of multilayer PNR FETs, much solider than the monolayer PNR one and more easily biased by different electric fields, has more transport channels consequently leading to the higher on-off current ratio or the higher sensitivity to the electric fields. Meanwhile, the strain-induced band-flattening will be beneficial for improving the flexibility in designing the electromechanical FETs. In addition, such electromechanical FETs can act as strain-controlled FETs or mechanical detectors for detecting the strains, indicating their potential applications in nano- and micro-electromechanical fields.

  1. Recent progress in photoactive organic field-effect transistors

    Directory of Open Access Journals (Sweden)

    Yutaka Wakayama

    2014-04-01

    Full Text Available Recent progress in photoactive organic field-effect transistors (OFETs is reviewed. Photoactive OFETs are divided into light-emitting (LE and light-receiving (LR OFETs. In the first part, LE-OFETs are reviewed from the viewpoint of the evolution of device structures. Device performances have improved in the last decade with the evolution of device structures from single-layer unipolar to multi-layer ambipolar transistors. In the second part, various kinds of LR-OFETs are featured. These are categorized according to their functionalities: phototransistors, non-volatile optical memories, and photochromism-based transistors. For both, various device configurations are introduced: thin-film based transistors for practical applications, single-crystalline transistors to investigate fundamental physics, nanowires, multi-layers, and vertical transistors based on new concepts.

  2. Gas Sensors Based on Polymer Field-Effect Transistors

    Directory of Open Access Journals (Sweden)

    Aifeng Lv

    2017-01-01

    Full Text Available This review focuses on polymer field-effect transistor (PFET based gas sensor with polymer as the sensing layer, which interacts with gas analyte and thus induces the change of source-drain current (ΔISD. Dependent on the sensing layer which can be semiconducting polymer, dielectric layer or conducting polymer gate, the PFET sensors can be subdivided into three types. For each type of sensor, we present the molecular structure of sensing polymer, the gas analyte and the sensing performance. Most importantly, we summarize various analyte–polymer interactions, which help to understand the sensing mechanism in the PFET sensors and can provide possible approaches for the sensor fabrication in the future.

  3. Touching polymer chains by organic field-effect transistors.

    Science.gov (United States)

    Shao, Wei; Dong, Huanli; Wang, Zhigang; Hu, Wenping

    2014-09-17

    Organic field-effect transistors (OFETs) are used to directly "touch" the movement and dynamics of polymer chains, and then determine Tg. As a molecular-level probe, the conducting channel of OFETs exhibits several unique advantages: 1) it directly detects the motion and dynamics of polymer chain at Tg; 2) it allows the measurement of size effects in ultrathin polymer films (even down to 6 nm), which bridges the gap in understanding effects between surface and interface. This facile and reliable determination of Tg of polymer films and the understanding of polymer chain dynamics guide a new prospect for OFETs besides their applications in organic electronics and casting new light on the fundamental understanding of the nature of polymer chain dynamics.

  4. Recent progress in photoactive organic field-effect transistors.

    Science.gov (United States)

    Wakayama, Yutaka; Hayakawa, Ryoma; Seo, Hoon-Seok

    2014-04-01

    Recent progress in photoactive organic field-effect transistors (OFETs) is reviewed. Photoactive OFETs are divided into light-emitting (LE) and light-receiving (LR) OFETs. In the first part, LE-OFETs are reviewed from the viewpoint of the evolution of device structures. Device performances have improved in the last decade with the evolution of device structures from single-layer unipolar to multi-layer ambipolar transistors. In the second part, various kinds of LR-OFETs are featured. These are categorized according to their functionalities: phototransistors, non-volatile optical memories, and photochromism-based transistors. For both, various device configurations are introduced: thin-film based transistors for practical applications, single-crystalline transistors to investigate fundamental physics, nanowires, multi-layers, and vertical transistors based on new concepts.

  5. Deep underground disposal of radioactive wastes: Near field effects

    International Nuclear Information System (INIS)

    1985-01-01

    This report reviews the important near-field effects of the disposal of wastes in deep rock formations. The basic characteristics of waste form, container and package, buffer and backfill materials and potential host-rock types are discussed from the perspective of the performance requirements of the total repository system. Effects of waste emplacement on the separate system components and on the system as a whole are discussed. The effects include interactions between groundwater and brines and the other system components, thermal and thermo-mechanical effects, and chemical and geochemical reactions. Special consideration is given to the radiation field that exists in proximity to the waste containers and also to the coupled effects of different phenomena

  6. Two dimensional analytical model for a reconfigurable field effect transistor

    Science.gov (United States)

    Ranjith, R.; Jayachandran, Remya; Suja, K. J.; Komaragiri, Rama S.

    2018-02-01

    This paper presents two-dimensional potential and current models for a reconfigurable field effect transistor (RFET). Two potential models which describe subthreshold and above-threshold channel potentials are developed by solving two-dimensional (2D) Poisson's equation. In the first potential model, 2D Poisson's equation is solved by considering constant/zero charge density in the channel region of the device to get the subthreshold potential characteristics. In the second model, accumulation charge density is considered to get above-threshold potential characteristics of the device. The proposed models are applicable for the device having lightly doped or intrinsic channel. While obtaining the mathematical model, whole body area is divided into two regions: gated region and un-gated region. The analytical models are compared with technology computer-aided design (TCAD) simulation results and are in complete agreement for different lengths of the gated regions as well as at various supply voltage levels.

  7. Recent Trends in Field-Effect Transistors-Based Immunosensors

    Directory of Open Access Journals (Sweden)

    Ana Carolina Mazarin de Moraes

    2016-10-01

    Full Text Available Immunosensors are analytical platforms that detect specific antigen-antibody interactions and play an important role in a wide range of applications in biomedical clinical diagnosis, food safety, and monitoring contaminants in the environment. Field-effect transistors (FET immunosensors have been developed as promising alternatives to conventional immunoassays, which require complicated processes and long-time data acquisition. The electrical signal of FET-based immunosensors is generated as a result of the antigen-antibody conjugation. FET biosensors present real-time and rapid response, require small sample volume, and exhibit higher sensitivity and selectivity. This review brings an overview on the recent literature of FET-based immunosensors, highlighting a diversity of nanomaterials modified with specific receptors as immunosensing platforms for the ultrasensitive detection of various biomolecules.

  8. A tunable colloidal quantum dot photo field-effect transistor

    KAUST Repository

    Ghosh, Subir

    2011-01-01

    We fabricate and investigate field-effect transistors in which a light-absorbing photogate modulates the flow of current along the channel. The photogate consists of colloidal quantum dots that efficiently transfer photoelectrons to the channel across a charge-separating (type-II) heterointerface, producing a primary and sustained secondary flow that is terminated via electron back-recombination across the interface. We explore colloidal quantum dot sizes corresponding to bandgaps ranging from 730 to 1475 nm and also investigate various stoichiometries of aluminum-doped ZnO (AZO) channel materials. We investigate the role of trap state energies in both the colloidal quantum dot energy film and the AZO channel. © 2011 American Institute of Physics.

  9. Reaching saturation in patterned source vertical organic field effect transistors

    Science.gov (United States)

    Greenman, Michael; Sheleg, Gil; Keum, Chang-min; Zucker, Jonathan; Lussem, Bjorn; Tessler, Nir

    2017-05-01

    Like most of the vertical transistors, the Patterned Source Vertical Organic Field Effect Transistor (PS-VOFET) does not exhibit saturation in the output characteristics. The importance of achieving a good saturation is demonstrated in a vertical organic light emitting transistor; however, this is critical for any application requiring the transistor to act as a current source. Thereafter, a 2D simulation tool was used to explain the physical mechanisms that prevent saturation as well as to suggest ways to overcome them. We found that by isolating the source facet from the drain-source electric field, the PS-VOFET architecture exhibits saturation. The process used for fabricating such saturation-enhancing structure is then described. The new device demonstrated close to an ideal saturation with only 1% change in the drain-source current over a 10 V change in the drain-source voltage.

  10. Near-field effects of asteroid impacts in deep water

    Energy Technology Data Exchange (ETDEWEB)

    Gisler, Galen R [Los Alamos National Laboratory; Weaver, Robert P [Los Alamos National Laboratory; Gittings, Michael L [Los Alamos National Laboratory

    2009-06-11

    Our previous work has shown that ocean impacts of asteroids below 500 m in diameter do not produce devastating long-distance tsunamis. Nevertheless, a significant portion of the ocean lies close enough to land that near-field effects may prove to be the greatest danger from asteroid impacts in the ocean. Crown splashes and central jets that rise up many kilometres into the atmosphere can produce, upon their collapse, highly non-linear breaking waves that could devastate shorelines within a hundred kilometres of the impact site. We present illustrative calculations, in two and three dimensions, of such impacts for a range of asteroid sizes and impact angles. We find that, as for land impacts, the greatest dangers from oceanic impacts are the short-term near-field, and long-term atmospheric effects.

  11. Graphene-graphite oxide field-effect transistors.

    Science.gov (United States)

    Standley, Brian; Mendez, Anthony; Schmidgall, Emma; Bockrath, Marc

    2012-03-14

    Graphene's high mobility and two-dimensional nature make it an attractive material for field-effect transistors. Previous efforts in this area have used bulk gate dielectric materials such as SiO(2) or HfO(2). In contrast, we have studied the use of an ultrathin layered material, graphene's insulating analogue, graphite oxide. We have fabricated transistors comprising single or bilayer graphene channels, graphite oxide gate insulators, and metal top-gates. The graphite oxide layers show relatively minimal leakage at room temperature. The breakdown electric field of graphite oxide was found to be comparable to SiO(2), typically ~1-3 × 10(8) V/m, while its dielectric constant is slightly higher, κ ≈ 4.3. © 2012 American Chemical Society

  12. Field effect in GeTe thin films

    Energy Technology Data Exchange (ETDEWEB)

    Volker, Hanno; Schlockermann, Carl; Krebs, Daniel; Riedel, Joern; Wuttig, Matthias [RWTH Aachen University, I. Physikalisches Institut (IA), Aachen (Germany)

    2010-07-01

    Phase change memory is a promising candidate to replace common memory technologies such as Flash and DRAM due to its fast switching and excellent scaling perspectives. To improve memory density even further, it was proposed to combine the switchable resistor and the cell selection transistor in a single device. Current control by applying gate voltages has been demonstrated in the works of Yin et al. for Ge{sub 2}Sb{sub 2}Te{sub 5}. Recently, switching within a few nanoseconds has been demonstrated on a different material, GeTe. We therefore studied the field effect in thin films of amorphous GeTe. Dedicated transistor devices were prepared, and the transfer characteristics of these devices were measured as a function of temperature and film thickness. Furthermore, time-dependent behavior was observed and analyzed.

  13. Theoretical study of phosphorene tunneling field effect transistors

    Energy Technology Data Exchange (ETDEWEB)

    Chang, Jiwon; Hobbs, Chris [SEMATECH, 257 Fuller Rd #2200, Albany, New York 12203 (United States)

    2015-02-23

    In this work, device performances of tunneling field effect transistors (TFETs) based on phosphorene are explored via self-consistent atomistic quantum transport simulations. Phosphorene is an ultra-thin two-dimensional (2-D) material with a direct band gap suitable for TFETs applications. Our simulation shows that phosphorene TFETs exhibit subthreshold slope below 60 mV/dec and a wide range of on-current depending on the transport direction due to highly anisotropic band structures of phosphorene. By benchmarking with monolayer MoTe{sub 2} TFETs, we predict that phosphorene TFETs oriented in the small effective mass direction can yield much larger on-current at the same on-current/off-current ratio than monolayer MoTe{sub 2} TFETs. It is also observed that a gate underlap structure is required for scaling down phosphorene TFETs in the small effective mass direction to suppress the source-to-drain direct tunneling leakage current.

  14. Top- and side-gated epitaxial graphene field effect transistors

    Energy Technology Data Exchange (ETDEWEB)

    Li, Xuebin; Wu, Xiaosong; Sprinkle, Mike; Ming, Fan; Ruan, Ming; Hu, Yike; De Heer, Walt A. [Georgia Institute of Technology, School of Physics, Atlanta, GA (United States); Berger, Claire [Georgia Institute of Technology, School of Physics, Atlanta, GA (United States); CNRS-Institut Neel, Grenoble (France)

    2010-02-15

    Three types of first generation epitaxial graphene (EG) field effect transistors (FET) are presented and their relative merits are discussed. Graphene is epitaxially grown on both the carbon and silicon faces of hexagonal silicon carbide and patterned with electron beam lithography. The channels have a Hall bar geometry to facilitate magnetoresistance measurements. FETs patterned on the Si-face exhibit off-to-on channel resistance ratios that exceed 30. C-face FETs have lower off-to-on resistance ratios, but their mobilities (up to 5000 cm{sup 2}/Vs) are much larger than that for Si-face transistors. Initial investigations into all-graphene side-gate FET structures are promising. Conductivity (left panel) and transport resistances {rho}{sub xx} and {rho}{sub xy} of a top gate graphene Hall bar on SiC Si-face, showing a sign reversal of the hall coefficient at the resistance peak. (Abstract Copyright [2010], Wiley Periodicals, Inc.)

  15. Vertically aligned carbon nanotube field-effect transistors

    KAUST Repository

    Li, Jingqi

    2012-10-01

    Vertically aligned carbon nanotube field-effect transistors (CNTFETs) have been developed using pure semiconducting carbon nanotubes. The source and drain were vertically stacked, separated by a dielectric, and the carbon nanotubes were placed on the sidewall of the stack to bridge the source and drain. Both the effective gate dielectric and gate electrode were normal to the substrate surface. The channel length is determined by the dielectric thickness between source and drain electrodes, making it easier to fabricate sub-micrometer transistors without using time-consuming electron beam lithography. The transistor area is much smaller than the planar CNTFET due to the vertical arrangement of source and drain and the reduced channel area. © 2012 Elsevier Ltd. All rights reserved.

  16. Intrinsic noise in aggressively scaled field-effect transistors

    International Nuclear Information System (INIS)

    Albareda, G; Jiménez, D; Oriols, X

    2009-01-01

    According to roadmap projections, nanoscale field-effect transistors (FETs) with channel lengths below 30 nm and several gates (for improving their gate control over the source–drain conductance) will come to the market in the next few years. However, few studies deal with the noise performance of these aggressively scaled FETs. In this work, a study of the effect of the intrinsic (thermal and shot) noise of such FETs on the performance of an analog amplifier and a digital inverter is carried out by means of numerical simulations with a powerful Monte Carlo (quantum) simulator. The numerical data indicate important drawbacks in the noise performance of aggressively scaled FETs that could invalidate roadmap projections as regards analog and digital applications

  17. Design and Simulation of Nano Wire FET

    OpenAIRE

    Anil Kumar, M; Kiran, Y N S Sai; Jagadeesh, U; Durga Prakash, M

    2017-01-01

    International audience; As the era of classical planar metal-oxide-semiconductor field-effect transistors (MOSFETs) comes to an end, the semiconductor industry is beginning to adopt 3D device architectures, such as FETs, starting at the 22 nm technology node. Since physical limits such as short channel effect (SCE) and self-heating may dominate, it may be difficult to scale Si FinFET below 10 nm. In this regard, transistors with different materials, geometries, or operating principles may hel...

  18. Fault and Defect Tolerant Computer Architectures: Reliable Computing with Unreliable Devices

    Science.gov (United States)

    2006-08-31

    Metal-Oxide-Semiconductor Field Effect Transistor . 1 MPU Microprocessor Unit . . . . . . . . . . . . . . . . . . 12 MRAM Magnetic Random Access...a modern CMOS FPGA. Another alternative to CMOS SRAM configuration memory is magnetic RAM ( MRAM ). MRAM is based on the magnetic tunnel junction, first...developed by IBM in 1974. MRAM has the potential to combine the high speed of SRAM, the storage density of DRAM, and the nonvolatility of FLASH. MRAM

  19. A simple and controlled single electron transistor based on doping modulation in silicon nanowires

    OpenAIRE

    Hofheinz, M.; Jehl, X.; Sanquer, M.; Molas, G.; Vinet, M.; Deleonibus, S.

    2006-01-01

    A simple and highly reproducible single electron transistor (SET) has been fabricated using gated silicon nanowires. The structure is a metal-oxide-semiconductor field-effect transistor made on silicon-on-insulator thin films. The channel of the transistor is the Coulomb island at low temperature. Two silicon nitride spacers deposited on each side of the gate create a modulation of doping along the nanowire that creates tunnel barriers. Such barriers are fixed and controlled, like in metallic...

  20. Opticondistor by Opcondys, Inc.: A Technical Overview

    Energy Technology Data Exchange (ETDEWEB)

    Beekley, Brian P. [Lawrence Livermore National Lab. (LLNL), Livermore, CA (United States)

    2016-08-15

    The opticondistor (optical transconductance varistor) is a revolutionary new technology that allows for fast switching at extremely high voltages. The technology has been licensed from Lawrence Livermore National Laboratory to Opcondys, Inc. to develop into consumer and industrial products. Compared to existing power semiconductors, such as MOSFET (metal-oxide-semiconductor field-effect transistor) and IGBT (insulated-gate bipolar transistor) units, the opticondistor will provide fast switches at previously unattainable voltages, exceeding 20 kV in a single device.

  1. A Procedure to Determine and Correct for Transmission Line Resistances for Direct Current On-Wafer Measurements

    Science.gov (United States)

    2010-05-01

    device, such as a bipolar junction transistor ( BJT ), a metal oxide semiconductor field effect transistor (MOSFET), or a high electron mobility...VDS_mesh,IDS,[0:.05:.5],’:’); 12 List of Symbols, Abbreviations, and Acronyms BJT bipolar junction transistor DC direct current DUT device... transistor (HEMT), when measured on-wafer, may be measured using two separate power lines with ground-signal-ground (GSG) on-wafer probes. Each power

  2. Towards Modeling the Effects of Lightning Injection on Power MOSFETs

    Science.gov (United States)

    2010-10-01

    an NPN BJT (bi-polar junction transistor ) formed where the n+ source contact is diffused. Fig- ure 8 shows the details of these parasitic components...and analysis of lightning injection on power MOSFET (Metal Oxide Semiconductor Field Effect Transistor ) devices which form an important subset of...ments that are of interest to us for analysis purposes in this paper are the parasitic capacitances. The turn-on of the BJT is undesirable since it

  3. Slowing DNA Translocation in a Nanofluidic Field-Effect Transistor.

    Science.gov (United States)

    Liu, Yifan; Yobas, Levent

    2016-04-26

    Here, we present an experimental demonstration of slowing DNA translocation across a nanochannel by modulating the channel surface charge through an externally applied gate bias. The experiments were performed on a nanofluidic field-effect transistor, which is a monolithic integrated platform featuring a 50 nm-diameter in-plane alumina nanocapillary whose entire length is surrounded by a gate electrode. The field-effect transistor behavior was validated on the gating of ionic conductance and protein transport. The gating of DNA translocation was subsequently studied by measuring discrete current dips associated with single λ-DNA translocation events under a source-to-drain bias of 1 V. The translocation speeds under various gate bias conditions were extracted by fitting event histograms of the measured translocation time to the first passage time distributions obtained from a simple 1D biased diffusion model. A positive gate bias was observed to slow the translocation of single λ-DNA chains markedly; the translocation speed was reduced by an order of magnitude from 18.4 mm/s obtained under a floating gate down to 1.33 mm/s under a positive gate bias of 9 V. Therefore, a dynamic and flexible regulation of the DNA translocation speed, which is vital for single-molecule sequencing, can be achieved on this device by simply tuning the gate bias. The device is realized in a conventional semiconductor microfabrication process without the requirement of advanced lithography, and can be potentially further developed into a compact electronic single-molecule sequencer.

  4. Biomolecular detection using a metal semiconductor field effect transistor

    Science.gov (United States)

    Estephan, Elias; Saab, Marie-Belle; Buzatu, Petre; Aulombard, Roger; Cuisinier, Frédéric J. G.; Gergely, Csilla; Cloitre, Thierry

    2010-04-01

    In this work, our attention was drawn towards developing affinity-based electrical biosensors, using a MESFET (Metal Semiconductor Field Effect Transistor). Semiconductor (SC) surfaces must be prepared before the incubations with biomolecules. The peptides route was adapted to exceed and bypass the limits revealed by other types of surface modification due to the unwanted unspecific interactions. As these peptides reveal specific recognition of materials, then controlled functionalization can be achieved. Peptides were produced by phage display technology using a library of M13 bacteriophage. After several rounds of bio-panning, the phages presenting affinities for GaAs SC were isolated; the DNA of these specific phages were sequenced, and the peptide with the highest affinity was synthesized and biotinylated. To explore the possibility of electrical detection, the MESFET fabricated with the GaAs SC were used to detect the streptavidin via the biotinylated peptide in the presence of the bovine Serum Albumin. After each surface modification step, the IDS (current between the drain and the source) of the transistor was measured and a decrease in the intensity was detected. Furthermore, fluorescent microscopy was used in order to prove the specificity of this peptide and the specific localisation of biomolecules. In conclusion, the feasibility of producing an electrical biosensor using a MESFET has been demonstrated. Controlled placement, specific localization and detection of biomolecules on a MESFET transistor were achieved without covering the drain and the source. This method of functionalization and detection can be of great utility for biosensing application opening a new way for developing bioFETs (Biomolecular Field-Effect Transistor).

  5. Space charge field effect on light emitting from tetracene field-effect transistor under AC electric field

    Energy Technology Data Exchange (ETDEWEB)

    Ohshima, Yuki; Kohn, Hideki; Manaka, Takaaki [Department of Physical Electronics, Tokyo Institute of Technology, 2-12-1, O-okayama, Meguro-ku, Tokyo, 152-8552 (Japan); Iwamoto, Mitsumasa, E-mail: iwamoto@pe.titech.ac.j [Department of Physical Electronics, Tokyo Institute of Technology, 2-12-1, O-okayama, Meguro-ku, Tokyo, 152-8552 (Japan)

    2009-11-30

    By applying square wave AC voltage to the Au source electrode of tetracene based field-effect transistor (FET), electroluminescence (EL) was obtained. The results suggest that electrons and holes were injected alternately from the source electrode and recombined each other, and lead to the EL. This type of EL was localized at the interface between the source electrode and tetracene, and enhanced periodically with two relaxation times in accordance with the applied AC voltage cycle. We modeled the carrier behavior in the FET and explained the decay of EL, taking into account the space charge field contribution. Finally, using an AC voltage superposed on DC bias voltage, it was shown that electron injection was prompted only by space charge field.

  6. SiC Optically Modulated Field-Effect Transistor

    Science.gov (United States)

    Tabib-Azar, Massood

    2009-01-01

    An optically modulated field-effect transistor (OFET) based on a silicon carbide junction field-effect transistor (JFET) is under study as, potentially, a prototype of devices that could be useful for detecting ultraviolet light. The SiC OFET is an experimental device that is one of several devices, including commercial and experimental photodiodes, that were initially evaluated as detectors of ultraviolet light from combustion and that could be incorporated into SiC integrated circuits to be designed to function as combustion sensors. The ultraviolet-detection sensitivity of the photodiodes was found to be less than desired, such that it would be necessary to process their outputs using high-gain amplification circuitry. On the other hand, in principle, the function of the OFET could be characterized as a combination of detection and amplification. In effect, its sensitivity could be considerably greater than that of a photodiode, such that the need for amplification external to the photodetector could be reduced or eliminated. The experimental SiC OFET was made by processes similar to JFET-fabrication processes developed at Glenn Research Center. The gate of the OFET is very long, wide, and thin, relative to the gates of typical prior SiC JFETs. Unlike in prior SiC FETs, the gate is almost completely transparent to near-ultraviolet and visible light. More specifically: The OFET includes a p+ gate layer less than 1/4 m thick, through which photons can be transported efficiently to the p+/p body interface. The gate is relatively long and wide (about 0.5 by 0.5 mm), such that holes generated at the body interface form a depletion layer that modulates the conductivity of the channel between the drain and the source. The exact physical mechanism of modulation of conductivity is a subject of continuing research. It is known that injection of minority charge carriers (in this case, holes) at the interface exerts a strong effect on the channel, resulting in amplification

  7. Nanowire Tunnel Field Effect Transistors: Prospects and Pitfalls

    Science.gov (United States)

    Sylvia, Somaia Sarwat

    The tunnel field effect transistor (TFET) has the potential to operate at lower voltages and lower power than the field effect transistor (FET). The TFET can circumvent the fundamental thermal limit of the inverse subthreshold slope (S) by exploiting interband tunneling of non-equilibrium "cold" carriers. The conduction mechanism in the TFET is governed by band-to-band tunneling which limits the drive current. TFETs built with III-V materials like InAs and InSb can produce enough tunneling current because of their small direct bandgap. Our simulation results show that although they require highly degenerate source doping to support the high electric fields in the tunnel region, the devices achieve minimum inverse subthreshold slopes of 30 mV/dec. In subthreshold, these devices experience both regimes of voltage-controlled tunneling and cold-carrier injection. Numerical results based on a discretized 8-band k.p model are compared to analytical WKB theory. For both regular FETs and TFETs, direct channel tunneling dominates the leakage current when the physical gate length is reduced to 5 nm. Therefore, a survey of materials is performed to determine their ability to suppress the direct tunnel current through a 5 nm barrier. The tunneling effective mass gives the best indication of the relative size of the tunnel currents. Si gives the lowest overall tunnel current for both the conduction and valence band and, therefore, it is the optimum choice for suppressing tunnel current at the 5 nm scale. Our numerical simulation shows that the finite number, random placement, and discrete nature of the dopants in the source of an InAs nanowire (NW) TFET affect both the mean value and the variance of the drive current and the inverse subthreshold slope. The discrete doping model gives an average drive current and an inverse subthreshold slope that are less than those predicted from the homogeneous doping model. The doping density required to achieve a target drive current is

  8. Tailoring Functional Interlayers in Organic Field-Effect Transistor Biosensors.

    Science.gov (United States)

    Magliulo, Maria; Manoli, Kyriaki; Macchia, Eleonora; Palazzo, Gerardo; Torsi, Luisa

    2015-12-09

    This review aims to provide an update on the development involving dielectric/organic semiconductor (OSC) interfaces for the realization of biofunctional organic field-effect transistors (OFETs). Specific focus is given on biointerfaces and recent technological approaches where biological materials serve as interlayers in back-gated OFETs for biosensing applications. Initially, to better understand the effects produced by the presence of biomolecules deposited at the dielectric/OSC interfacial region, the tuning of the dielectric surface properties by means of self-assembled monolayers is discussed. Afterward, emphasis is given to the modification of solid-state dielectric surfaces, in particular inorganic dielectrics, with biological molecules such as peptides and proteins. Special attention is paid on how the presence of an interlayer of biomolecules and bioreceptors underneath the OSC impacts on the charge transport and sensing performance of the device. Moreover, naturally occurring materials, such as carbohydrates and DNA, used directly as bulk gating materials in OFETs are reviewed. The role of metal contact/OSC interface in the overall performance of OFET-based sensors is also discussed. © 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  9. Organic field-effect transistor-based gas sensors.

    Science.gov (United States)

    Zhang, Congcong; Chen, Penglei; Hu, Wenping

    2015-04-21

    Organic field-effect transistors (OFETs) are one of the key components of modern organic electronics. While the past several decades have witnessed huge successes in high-performance OFETs, their sophisticated functionalization with regard to the responses towards external stimulations has also aroused increasing attention and become an important field of general concern. This is promoted by the inherent merits of organic semiconductors, including considerable variety in molecular design, low cost, light weight, mechanical flexibility, and solution processability, as well as by the intrinsic advantages of OFETs including multiparameter accessibility and ease of large-scale manufacturing, which provide OFETs with great potential as portable yet reliable sensors offering high sensitivity, selectivity, and expeditious responses. With special emphases on the works achieved since 2009, this tutorial review focuses on OFET-based gas sensors. The working principles of this type of gas sensors are discussed in detail, the state-of-the-art protocols developed for high-performance gas sensing are highlighted, and the advanced gas discrimination systems in terms of sensory arrays of OFETs are also introduced. This tutorial review intends to provide readers with a deep understanding for the future design of high-quality OFET gas sensors for potential uses.

  10. Low frequency noise in tunneling field effect transistors

    Science.gov (United States)

    Bu, S. T.; Huang, D. M.; Jiao, G. F.; Yu, H. Y.; Li, Ming-Fu

    2017-11-01

    An analytical model is developed for the fluctuation of the electrostatic potential induced by a charged trap in the gate oxide in tunneling field effect transistor (TFET). The model is applied to get the fluctuation of the drain current induced by an interface trap in TFET. A low frequency noise model based on the current transportation through the tunneling and the channel is proposed. The dependency of the normalized power spectra SId/Id2 on the frequency f and the gate bias Vg for TFET is obtained. The noise spectra in TFET are found to be very different from those of conventional MOSFETs, and have the superposition of Lorentzian and 1/f lineshapes with the former associated with tunneling and the later with channel transportation. The potential and current models are compared with TCAD simulation. The calculated IdVg and the noise spectra are also compared with our experimental observations. The results show that the normalized spectra of the current noise due to the tunneling are more significantly affected by Vg than that due to the transportation through the channel. The results also show that the noise from the channel is dominated by the mobility fluctuation rather than the carrier number fluctuation.

  11. Tunnel field-effect transistor with two gated intrinsic regions

    Directory of Open Access Journals (Sweden)

    Y. Zhang

    2014-07-01

    Full Text Available In this paper, we propose and validate (using simulations a novel design of silicon tunnel field-effect transistor (TFET, based on a reverse-biased p+-p-n-n+ structure. 2D device simulation results show that our devices have significant improvements of switching performance compared with more conventional devices based on p-i-n structure. With independent gate voltages applied to two gated intrinsic regions, band-to-band tunneling (BTBT could take place at the p-n junction, and no abrupt degenerate doping profile is required. We developed single-side-gate (SSG structure and double-side-gate (DSG structure. SSG devices with HfO2 gate dielectric have a point subthreshold swing of 9.58 mV/decade, while DSG devices with polysilicon gate electrode material and HfO2 gate dielectric have a point subthreshold swing of 16.39 mV/decade. These DSG devices have ON-current of 0.255 μA/μm, while that is lower for SSG devices. Having two nano-scale independent gates will be quite challenging to realize with good uniformity across the wafer and the improved behavior of our TFET makes it a promising steep-slope switch candidate for further investigations.

  12. Electromechanical field effect transistors based on multilayer phosphorene nanoribbons

    Energy Technology Data Exchange (ETDEWEB)

    Jiang, Z.T., E-mail: jiangzhaotan@hotmail.com; Lv, Z.T.; Zhang, X.D.

    2017-06-21

    Based on the tight-binding Hamiltonian approach, we demonstrate that the electromechanical field effect transistors (FETs) can be realized by using the multilayer phosphorene nanoribbons (PNRs). The synergistic combination of the electric field and the external strains can establish the on–off switching since the electric field can shift or split the energy band, and the mechanical strains can widen or narrow the band widths. This kind of multilayer PNR FETs, much solider than the monolayer PNR one and more easily biased by different electric fields, has more transport channels consequently leading to the higher on–off current ratio or the higher sensitivity to the electric fields. Meanwhile, the strain-induced band-flattening will be beneficial for improving the flexibility in designing the electromechanical FETs. In addition, such electromechanical FETs can act as strain-controlled FETs or mechanical detectors for detecting the strains, indicating their potential applications in nano- and micro-electromechanical fields. - Highlights: • Electromechanical transistors are designed with multilayer phosphorene nanoribbons. • Electromechanical synergistic effect can establish the on–off switching more flexibly. • Multilayer transistors, solider and more easily biased, has more transport channels. • Electromechanical transistors can act as strain-controlled transistors or mechanical detectors.

  13. Cylindrical Field Effect Transistor: A Full Volume Inversion Device

    KAUST Repository

    Fahad, Hossain M.

    2010-12-01

    The increasing demand for high performance as well as low standby power devices has been the main reason for the aggressive scaling of conventional CMOS transistors. Current devices are at the 32nm technology node. However, due to physical limitations as well as increase in short-channel effects, leakage, power dissipation, this scaling trend cannot continue and will eventually hit a barrier. In order to overcome this, alternate device topologies have to be considered altogether. Extensive research on ultra thin body double gate FETs and gate all around nanowire FETs has shown a lot of promise. Under strong inversion, these devices have demonstrated increased performance over their bulk counterparts. This is mainly attributed to full carrier inversion in the body. However, these devices are still limited by lithographic and processing challenges making them unsuitable for commercial production. This thesis explores a unique device structure called the CFET (Cylindrical Field Effect Transistors) which also like the above, relies on complete inversion of carriers in the body/bulk. Using dual gates; an outer and an inner gate, full-volume inversion is possible with benefits such as enhanced drive currents, high Ion/Ioff ratios and reduced short channel effects.

  14. Generalized Magnetic Field Effects in Burgers' Nanofluid Model.

    Directory of Open Access Journals (Sweden)

    M M Rashidi

    Full Text Available Analysis has been conducted to present the generalized magnetic field effects on the flow of a Burgers' nanofluid over an inclined wall. Mathematical modelling for hydro-magnetics reveals that the term "[Formula: see text]" is for the Newtonian model whereas the generalized magnetic field term (as mentioned in Eq 4 is for the Burgers' model which is incorporated in the current analysis to get the real insight of the problem for hydro-magnetics. Brownian motion and thermophoresis phenomenon are presented to analyze the nanofluidics for the non-Newtonian fluid. Mathematical analysis is completed in the presence of non-uniform heat generation/absorption. The constructed set of partial differential system is converted into coupled nonlinear ordinary differential system by employing the suitable transformations. Homotopy approach is employed to construct the analytical solutions which are shown graphically for sundr5y parameters including Deborah numbers, magnetic field, thermophoresis, Brownian motion and non-uniform heat generation/absorption. A comparative study is also presented showing the comparison of present results with an already published data.

  15. Intrinsic Charge Transport in Organic Field-Effect Transistors

    Science.gov (United States)

    Podzorov, Vitaly

    2005-03-01

    Organic field-effect transistors (OFETs) are essential components of modern electronics. Despite the rapid progress of organic electronics, understanding of fundamental aspects of the charge transport in organic devices is still lacking. Recently, the OFETs based on highly ordered organic crystals have been fabricated with innovative techniques that preserve the high quality of single-crystal organic surfaces. This technological progress facilitated the study of transport mechanisms in organic semiconductors [1-4]. It has been demonstrated that the intrinsic polaronic transport, not dominated by disorder, with a remarkably high mobility of ``holes'' μ = 20 cm^2/Vs can be achieved in these devices at room temperature [4]. The signatures of the intrinsic polaronic transport are the anisotropy of the carrier mobility and an increase of μ with cooling. These and other aspects of the charge transport in organic single-crystal FETs will be discussed. Co-authors are Etienne Menard, University of Illinois at Urbana Champaign; Valery Kiryukhin, Rutgers University; John Rogers, University of Illinois at Urbana Champaign; Michael Gershenson, Rutgers University. [1] V. Podzorov et al., Appl. Phys. Lett. 82, 1739 (2003); ibid. 83, 3504 (2003). [2] V. C. Sundar et al., Science 303, 1644 (2004). [3] R. W. I. de Boer et al., Phys. Stat. Sol. (a) 201, 1302 (2004). [4] V. Podzorov et al., Phys. Rev. Lett. 93, 086602 (2004).

  16. Electronic Model of a Ferroelectric Field Effect Transistor

    Science.gov (United States)

    MacLeod, Todd C.; Ho, Fat Duen; Russell, Larry (Technical Monitor)

    2001-01-01

    A pair of electronic models has been developed of a Ferroelectric Field Effect transistor. These models can be used in standard electrical circuit simulation programs to simulate the main characteristics of the FFET. The models use the Schmitt trigger circuit as a basis for their design. One model uses bipolar junction transistors and one uses MOSFET's. Each model has the main characteristics of the FFET, which are the current hysterisis with different gate voltages and decay of the drain current when the gate voltage is off. The drain current from each model has similar values to an actual FFET that was measured experimentally. T'he input and o Output resistance in the models are also similar to that of the FFET. The models are valid for all frequencies below RF levels. No attempt was made to model the high frequency characteristics of the FFET. Each model can be used to design circuits using FFET's with standard electrical simulation packages. These circuits can be used in designing non-volatile memory circuits and logic circuits and is compatible with all SPICE based circuit analysis programs. The models consist of only standard electrical components, such as BJT's, MOSFET's, diodes, resistors, and capacitors. Each model is compared to the experimental data measured from an actual FFET.

  17. A ROIC for Mn(TPP)Cl-DOP-THF-Polyhema PVC membrane modified n-channel Si3N4 ISFET sensitive to histamine.

    Science.gov (United States)

    Samah, N L M A; Lee, Khuan Y; Sulaiman, S A; Jarmin, R

    2017-07-01

    Intolerance of histamine could lead to scombroid poisoning with fatal consequences. Current detection methods for histamine are wet laboratory techniques which employ expensive equipment that depends on skills of seasoned technicians and produces delayed test analysis result. Previous works from our group has established that ISFETs can be adapted for detecting histamine with the use of a novel membrane. However, work to integrate ISFETs with a readout interfacing circuit (ROIC) circuit to display the histamine concentration has not been reported so far. This paper concerns the development of a ROIC specifically to integrate with a Mn(TPP)Cl-DOP-THF-Polyhema PVC membrane modified n-channel Si3N4 ISFET to display the histamine concentration. It embodies the design of constant voltage constant current (CVCC) circuit, amplification circuit and micro-controller based display circuit. A DC millivolt source is used to substitute the membrane modified ISFET as preliminary work. Input is histamine concentration corresponding to the safety level designated by the Food and Drugs Administration (FDA). Results show the CVCC circuit makes the output follows the input and keeps VDS constant. The amplification circuit amplifies the output from the CVCC circuit to the range 2.406-4.888V to integrate with the microcontroller, which is programmed to classify and display the histamine safety level and its corresponding voltage on a LCD panel. The ROIC could be used to produce direct output voltages corresponding to histamine concentrations, for in-situ applications.

  18. Electric field effect in superconductor-ferroelectric structures

    Science.gov (United States)

    Lemanov, V. V.

    1995-01-01

    Electric field effect (the E-effect) in superconductors has been studied since 1960 when Glover and Sherill published their results on a shift of the critical temperature T(sub c) about 0.1 mK in Sn and In thin films under the action Off the field E=300 kV/cm. Stadler was the first to study the effect or spontaneous polarization of ferroelectric substrate on the electric properties of superconductors. He observed that the reversal of polarization of TGS substrate under action of external electric field in Sn-TGS structures induced the T(sub c) shift in Sn about 1.3 mK. Since in this case the effect is determined not by the electric field but by the spontaneous polarization, we may call this effect the P-effect. High-T(sub c) superconductors opened the new possibilities to study the E- and P-effects due to low charge carrier density, as compared to conventional superconductors, and to anomalously small coherence length. Experiments in this field began in many laboratories but a breakthrough was made where a shift in T(sub c) by 50 mK was observed in YBCO thin films. Much higher effects were observed in subsequent studies. The first experiments on the P-effect in high-T(sub c) superconductors were reported elsewhere. In this report we shall give a short description of study on the P-effect in high-T(sub c) superconductors.

  19. Hysteresis in Lanthanide Aluminum Oxides Observed by Fast Pulse CV Measurement

    Directory of Open Access Journals (Sweden)

    Chun Zhao

    2014-10-01

    Full Text Available Oxide materials with large dielectric constants (so-called high-k dielectrics have attracted much attention due to their potential use as gate dielectrics in Metal Oxide Semiconductor Field Effect Transistors (MOSFETs. A novel characterization (pulse capacitance-voltage method was proposed in detail. The pulse capacitance-voltage technique was employed to characterize oxide traps of high-k dielectrics based on the Metal Oxide Semiconductor (MOS capacitor structure. The variation of flat-band voltages of the MOS structure was observed and discussed accordingly. Some interesting trapping/detrapping results related to the lanthanide aluminum oxide traps were identified for possible application in Flash memory technology. After understanding the trapping/detrapping mechanism of the high-k oxides, a solid foundation was prepared for further exploration into charge-trapping non-volatile memory in the future.

  20. Multi-Dimensional Quantum Effect Simulation Using a Density-Gradient Model and Script-Level Programming Techniques

    Science.gov (United States)

    Rafferty, Connor S.; Biegel, Bryan A.; Yu, Zhi-Ping; Ancona, Mario G.; Bude, J.; Dutton, Robert W.; Saini, Subhash (Technical Monitor)

    1998-01-01

    A density-gradient (DG) model is used to calculate quantum-mechanical corrections to classical carrier transport in MOS (Metal Oxide Semiconductor) inversion/accumulation layers. The model is compared to measured data and to a fully self-consistent coupled Schrodinger and Poisson equation (SCSP) solver. Good agreement is demonstrated for MOS capacitors with gate oxide as thin as 21 A. It is then applied to study carrier distribution in ultra short MOSFETs (Metal Oxide Semiconductor Field Effect Transistor) with surface roughness. This work represents the first implementation of the DG formulation on multidimensional unstructured meshes. It was enabled by a powerful scripting approach which provides an easy-to-use and flexible framework for solving the fourth-order PDEs (Partial Differential Equation) of the DG model.

  1. Light Scattering Studies of Organic Field Effect Transistors

    Science.gov (United States)

    Adil, Danish

    Organic semiconductors hold a great promise of enabling new technology based on low cost and flexible electronic devices. While much work has been done in the field of organic semiconductors, the field is still quite immature when compared to that of traditional inorganic based devices. More work is required before the full potential of organic field effect transistors (OFETs), organic light emitting diodes (OLEDs), and organic photovoltaics (OPVs) is realized. Among such work, a further development of diagnostic tools that characterize charge transport and device robustness more efficiently is required. Charge transport in organic semiconductors is limited by the nature of the metal-semiconductor interfaces where charge is injected into the semiconductor film and the semiconductor-dielectric interface where the charge is accumulated and transported. This, combined with that fact that organic semiconductors are especially susceptible to having structural defects induced via oxidation, charge transport induced damage, and metallization results in a situation where a semiconductor film's ability to conduct charge can degrade over time. This degradation manifests itself in the electrical device characteristics of organic based electronic devices. OFETs, for example, may display changes in threshold voltage, lowering of charge carrier mobilities, or a decrease in the On/Off ratio. All these effects sum together to result in degradation in device performance. The work begins with a study where matrix assisted pulsed laser deposition (MAPLE), an alternative organic semiconductor thin film deposition method, is used to fabricate OFETs with improved semiconductor-dielectric interfaces. MAPLE allows for the controlled layer-by-layer growth of the semiconductor film. Devices fabricated using this technique are shown to exhibit desirable characteristics that are otherwise only achievable with additional surface treatments. MAPLE is shown to be viable alternative to other

  2. Use of water vapor for suppressing the growth of unstable low-{kappa} interlayer in HfTiO gate-dielectric Ge metal-oxide-semiconductor capacitors with sub-nanometer capacitance equivalent thickness

    Energy Technology Data Exchange (ETDEWEB)

    Xu, J.P. [Department of Electronic Science and Technology, Huazhong University of Science and Technology, Wuhan, 430074 (China); Zou, X. [School of Electromachine and Architecture Engineering, Jianghan University, Wuhan, 430056 (China); Lai, P.T. [Department of Electrical and Electronic Engineering, University of Hong Kong, Pokfulam Road (Hong Kong)], E-mail: laip@eee.hku.hk; Li, C.X.; Chan, C.L. [Department of Electrical and Electronic Engineering, University of Hong Kong, Pokfulam Road (Hong Kong)

    2009-03-02

    Annealing of high-permittivity HfTiO gate dielectric on Ge substrate in different gases (N{sub 2}, NH{sub 3}, NO and N{sub 2}O) with or without water vapor is investigated. Analysis by transmission electron microscopy indicates that the four wet anneals can greatly suppress the growth of a GeO{sub x} interlayer at the dielectric/Ge interface, and thus decrease interface states, oxide charges and gate leakage current. Moreover, compared with the wet N{sub 2} anneal, the wet NH{sub 3}, NO and N{sub 2}O anneals decrease the equivalent permittivity of the gate dielectric due to the growth of a GeO{sub x}N{sub y} interlayer. Among the eight anneals, the wet N{sub 2} anneal produces the best dielectric performance with an equivalent relative permittivity of 35, capacitance equivalent thickness of 0.81 nm, interface-state density of 6.4 x 10{sup 11} eV{sup -1} cm{sup -2} and gate leakage current of 2.7 x 10{sup -4} A/cm{sup 2} at V{sub g} = 1 V.

  3. Hybrid complementary circuits based on p-channel organic and n-channel metal oxide transistors with balanced carrier mobilities of up to 10 cm2/Vs

    KAUST Repository

    Isakov, Ivan

    2016-12-29

    We report the development of hybrid complementary inverters based on p-channel organic and n-channel metal oxide thin-film transistors (TFTs) both processed from solution at <200 °C. For the organic TFTs, a ternary blend consisting of the small-molecule 2,7-dioctyl[1]benzothieno[3,2-b][1]benzothiophene, the polymer indacenodithiophene-benzothiadiazole (CIDT-BT) and the p-type dopant CF was employed, whereas the isotype InO/ZnO heterojunction was used for the n-channel TFTs. When integrated on the same substrate, p- and n-channel devices exhibited balanced carrier mobilities up to 10 cm/Vs. Hybrid complementary inverters based on these devices show high signal gain (>30 V/V) and wide noise margins (70%). The moderate processing temperatures employed and the achieved level of device performance highlight the tremendous potential of the technology for application in the emerging sector of large-area microelectronics.

  4. High-k shallow traps observed by charge pumping with varying discharging times

    Energy Technology Data Exchange (ETDEWEB)

    Ho, Szu-Han; Chen, Ching-En; Tseng, Tseung-Yuen [Department of Electronics Engineering, National Chiao Tung University, Hsinchu 300, Taiwan (China); Chang, Ting-Chang, E-mail: tcchang@mail.phys.nsysu.edu.tw [Department of Physics, National Sun Yat-Sen University, Kaohsiung 804, Taiwan (China); Advanced Optoelectronics Technology Center, National Cheng Kung University, Tainan, Taiwan (China); Lu, Ying-Hsin; Lo, Wen-Hung; Tsai, Jyun-Yu; Liu, Kuan-Ju [Department of Physics, National Sun Yat-Sen University, Kaohsiung 804, Taiwan (China); Wang, Bin-Wei; Cao, Xi-Xin [Department of Embedded System Engineering, Peking University, Beijing, P.R.China (China); Chen, Hua-Mao [Department of Photonics and Institute of Electro-Optical Engineering, National Chiao Tung University, Hsinchu, Taiwan (China); Cheng, Osbert; Huang, Cheng-Tung; Chen, Tsai-Fu [Device Department, United Microelectronics Corporation, Tainan Science Park, Taiwan (China)

    2013-11-07

    In this paper, we investigate the influence of falling time and base level time on high-k bulk shallow traps measured by charge pumping technique in n-channel metal-oxide-semiconductor field-effect transistors with HfO{sub 2}/metal gate stacks. N{sub T}-V{sub high} {sub level} characteristic curves with different duty ratios indicate that the electron detrapping time dominates the value of N{sub T} for extra contribution of I{sub cp} traps. N{sub T} is the number of traps, and I{sub cp} is charge pumping current. By fitting discharge formula at different temperatures, the results show that extra contribution of I{sub cp} traps at high voltage are in fact high-k bulk shallow traps. This is also verified through a comparison of different interlayer thicknesses and different Ti{sub x}N{sub 1−x} metal gate concentrations. Next, N{sub T}-V{sub high} {sub level} characteristic curves with different falling times (t{sub falling} {sub time}) and base level times (t{sub base} {sub level}) show that extra contribution of I{sub cp} traps decrease with an increase in t{sub falling} {sub time}. By fitting discharge formula for different t{sub falling} {sub time}, the results show that electrons trapped in high-k bulk shallow traps first discharge to the channel and then to source and drain during t{sub falling} {sub time}. This current cannot be measured by the charge pumping technique. Subsequent measurements of N{sub T} by charge pumping technique at t{sub base} {sub level} reveal a remainder of electrons trapped in high-k bulk shallow traps.

  5. Detailed investigation of the conducting channel in poly(3-hexylthiophene) field effect transistors

    NARCIS (Netherlands)

    von Hauff, Elizabeth; Johnen, Fabian; Tunc, Ali Veysel; Govor, Leonid; Parisi, Juergen

    2010-01-01

    In this study, the conducting channel in poly(3-hexylthiophene) (P3HT) organic field effect transistors (OFETs) was investigated. The effect of varying the P3HT layer thickness on the OFET parameters was studied. The threshold voltage and the field effect mobility were determined from both the

  6. CHEMICALLY MODIFIED FIELD-EFFECT TRANSISTORS - POTENTIOMETRIC AG+ SELECTIVITY OF PVC MEMBRANES BASED ON MACROCYCLIC THIOETHERS

    NARCIS (Netherlands)

    BRZOZKA, Z; COBBEN, PLHM; REINHOUDT, DN; EDEMA, JJH; KELLOGG, RM

    1993-01-01

    A chemically modified field-effect transistor (CHEMFET) with satisfactory Ag+ selectivity is described. The potentiometric Ag+ selectivities of CHEMFETs with plasticized PVC membranes based on macrocyclic thioethers have been determined. All the macrocyclic thioethers tested showed silver response

  7. Investigation of the Novel Attributes of a Dual Material Gate Nanoscale Tunnel Field Effect Transistor

    OpenAIRE

    Saurabh, Sneh; Kumar, M. Jagadesh

    2011-01-01

    In this paper, we propose the application of a Dual Material Gate (DMG) in a Tunnel Field Effect Transistor (TFET) to simultaneously optimize the on-current, the off-current and the threshold voltage, and also improve the average subthreshold slope, the nature of the output characteristics and the immunity against the DIBL effects. We demonstrate that if appropriate work-functions are chosen for the gate materials on the source side and the drain side, the tunnel field effect transistor shows...

  8. Highly stable organic polymer field-effect transistor sensor for selective detection in the marine environment

    Science.gov (United States)

    Knopfmacher, Oren; Hammock, Mallory L.; Appleton, Anthony L.; Schwartz, Gregor; Mei, Jianguo; Lei, Ting; Pei, Jian; Bao, Zhenan

    2014-01-01

    In recent decades, the susceptibility to degradation in both ambient and aqueous environments has prevented organic electronics from gaining rapid traction for sensing applications. Here we report an organic field-effect transistor sensor that overcomes this barrier using a solution-processable isoindigo-based polymer semiconductor. More importantly, these organic field-effect transistor sensors are stable in both freshwater and seawater environments over extended periods of time. The organic field-effect transistor sensors are further capable of selectively sensing heavy-metal ions in seawater. This discovery has potential for inexpensive, ink-jet printed, and large-scale environmental monitoring devices that can be deployed in areas once thought of as beyond the scope of organic materials.

  9. Exploring graphene field effect transistor devices to improve spectral resolution of semiconductor radiation detectors

    Energy Technology Data Exchange (ETDEWEB)

    Harrison, Richard Karl [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States); Howell, Stephen Wayne [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States); Martin, Jeffrey B. [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States); Hamilton, Allister B. [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States)

    2013-12-01

    Graphene, a planar, atomically thin form of carbon, has unique electrical and material properties that could enable new high performance semiconductor devices. Graphene could be of specific interest in the development of room-temperature, high-resolution semiconductor radiation spectrometers. Incorporating graphene into a field-effect transistor architecture could provide an extremely high sensitivity readout mechanism for sensing charge carriers in a semiconductor detector, thus enabling the fabrication of a sensitive radiation sensor. In addition, the field effect transistor architecture allows us to sense only a single charge carrier type, such as electrons. This is an advantage for room-temperature semiconductor radiation detectors, which often suffer from significant hole trapping. Here we report on initial efforts towards device fabrication and proof-of-concept testing. This work investigates the use of graphene transferred onto silicon and silicon carbide, and the response of these fabricated graphene field effect transistor devices to stimuli such as light and alpha radiation.

  10. Field-effect-induced transport properties of Zn1-x Mg x O nanocrystal solid solution

    Science.gov (United States)

    Kim, Youngjun; Yang, Heesun; Park, Byoungnam

    2017-07-01

    We report electrical properties of Zn1-x Mg x O nanocrystal solid solution (NCSS) depending on the composition of Mg using a bottom-contact field-effect transistor. In the Zn1-x Mg x O NCSS, as the composition of Mg increases, the field-effect mobility decreases with the threshold voltage shifting to a more positive value. The decrease in the field-effect mobility is attributed to the decrease in the size of the Zn1-x Mg x O NCSS. The increase in the electron trap density in the Zn1-x Mg x O NCSS with the addition of Mg caused a more positive threshold voltage shift. Change in the trap density as a function of Mg composition was demonstrated through comparison of the photoluminescence intensity.

  11. Multi-functional integration of organic field-effect transistors (OFETs): advances and perspectives.

    Science.gov (United States)

    Di, Chong-an; Zhang, Fengjiao; Zhu, Daoben

    2013-01-18

    Multi-functional organic field-effect transistors (OFETs), an emerging focus of organic optoelectronic devices, hold great potential for a variety of applications. This report introduces recent progress on multi-functional OFETs including OFETs based sensors, phototransistors, light-emitting transistors, memory cells, and magnetic field-effect OFETs. Key strategies towards multi- functional integration of OFETs, which involves the exploration of functional materials, interfaces modifications, modulation of condensed structures, optimization of device geometry, and device integration, are summarized. Furthermore, remaining challenges and perspectives are discussed, giving a comprehensive overview of multi-functional OFETs. Copyright © 2013 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  12. Organic field-effect transistor nonvolatile memories utilizing sputtered C nanoparticles as nano-floating-gate

    Energy Technology Data Exchange (ETDEWEB)

    Liu, Jie; Liu, Chang-Hai; She, Xiao-Jian; Sun, Qi-Jun; Gao, Xu; Wang, Sui-Dong, E-mail: wangsd@suda.edu.cn [Institute of Functional Nano and Soft Materials (FUNSOM), Soochow University, Suzhou, Jiangsu 215123 (China)

    2014-10-20

    High-performance organic field-effect transistor nonvolatile memories have been achieved using sputtered C nanoparticles as the nano-floating-gate. The sputtered C nano-floating-gate is prepared with low-cost material and simple process, forming uniform and discrete charge trapping sites covered by a smooth and complete polystyrene layer. The devices show large memory window, excellent retention capability, and programming/reading/erasing/reading endurance. The sputtered C nano-floating-gate can effectively trap both holes and electrons, and it is demonstrated to be suitable for not only p-type but also n-type organic field-effect transistor nonvolatile memories.

  13. Graphene-based field effect transistors for radiation-induced field sensing

    Energy Technology Data Exchange (ETDEWEB)

    Di Gaspare, Alessandra, E-mail: alessandra.digaspare@lnf.infn.it [INFN-Laboratori Nazionali Frascati, Frascati, Rome (Italy); Valletta, Antonio [CNR-Istituto per la Microelettronica e i Microsistemi, TorVergata, Rome (Italy); Fortunato, Guglielmo [CNR-Istituto per la Microelettronica e i Microsistemi, TorVergata, Rome (Italy); INFN-Laboratori Nazionali Frascati, Frascati, Rome (Italy); Larciprete, Rosanna [CNR-Istituto di Sistemi Complessi, TorVergata, Rome (Italy); INFN-Laboratori Nazionali Frascati, Frascati, Rome (Italy); Mariucci, Luigi [CNR-Istituto per la Microelettronica e i Microsistemi, TorVergata, Rome (Italy); INFN-Laboratori Nazionali Frascati, Frascati, Rome (Italy); Notargiacomo, Andrea [CNR-Istituto di Fotonica e Nanotecnologie, Rome (Italy); INFN-Laboratori Nazionali Frascati, Frascati, Rome (Italy); Cimino, Roberto [INFN-Laboratori Nazionali Frascati, Frascati, Rome (Italy); CERN, Geneva (Switzerland)

    2016-07-11

    We propose the implementation of graphene-based field effect transistor (FET) as radiation sensor. In the proposed detector, graphene obtained via chemical vapor deposition is integrated into a Si-based field effect device as the gate readout electrode, able to sense any change in the field distribution induced by ionization in the underneath absorber, because of the strong variation in the graphene conductivity close to the charge neutrality point. Different 2-dimensional layered materials can be envisaged in this kind of device.

  14. Theory of Electric-Field Effects on Electron-Spin-Resonance Hyperfine Couplings

    International Nuclear Information System (INIS)

    Karna, S.P.

    1997-01-01

    A quantum mechanical theory of the effects of a uniform electric field on electron-spin-resonance hyperfine couplings is presented. The electric-field effects are described in terms of perturbation coefficients which can be used to probe the local symmetry as well as the strength of the electric field at paramagnetic sites in a solid. Results are presented for the first-order perturbation coefficients describing the Bloembergen effect (linear electric-field effect on hyperfine coupling tensor) for the O atom and the OH radical. copyright 1997 The American Physical Society

  15. Organic field-effect transistor nonvolatile memories utilizing sputtered C nanoparticles as nano-floating-gate

    International Nuclear Information System (INIS)

    Liu, Jie; Liu, Chang-Hai; She, Xiao-Jian; Sun, Qi-Jun; Gao, Xu; Wang, Sui-Dong

    2014-01-01

    High-performance organic field-effect transistor nonvolatile memories have been achieved using sputtered C nanoparticles as the nano-floating-gate. The sputtered C nano-floating-gate is prepared with low-cost material and simple process, forming uniform and discrete charge trapping sites covered by a smooth and complete polystyrene layer. The devices show large memory window, excellent retention capability, and programming/reading/erasing/reading endurance. The sputtered C nano-floating-gate can effectively trap both holes and electrons, and it is demonstrated to be suitable for not only p-type but also n-type organic field-effect transistor nonvolatile memories.

  16. Wide-bandwidth charge sensitivity with a radio-frequency field-effect transistor

    NARCIS (Netherlands)

    Nishiguchi, K.; Yamaguchi, H.; Fujiwara, A.; Van der Zant, H.S.J.; Steele, G.A.

    2013-01-01

    We demonstrate high-speed charge detection at room temperature with single-electron resolution by using a radio-frequency field-effect transistor (RF-FET). The RF-FET combines a nanometer-scale silicon FET with an impedance-matching circuit composed of an inductor and capacitor. Driving the RF-FET

  17. Device characteristics of polymer dual-gate field-effect transistors

    NARCIS (Netherlands)

    Maddalena, F.; Spijkman, M.; Brondijk, J. J.; Fonteijn, P.; Brouwer, F.; Hummelen, J. C.; de Leeuw, D. M.; Blom, P. W. M.; de Boer, B.

    2008-01-01

    Dual-gate organic field-effect transistors (OFETs) were fabricated by solution processing using different p-type polymer semiconductors and polymer top-dielectric materials on prefabricated substrates with gold source-drain contacts defined by photolithography. The semiconductors and top dielectrics

  18. Ambipolar Cu- and Fe-phthalocyanine single-crystal field-effect transistors

    NARCIS (Netherlands)

    De Boer, R.W.I.; Stassen, A.F.; Craciun, M.F.; Mulder, C.L.; Molinari, A.; Rogge, S.; Morpurgo, A.F.

    2005-01-01

    We report the observation of ambipolar transport in field-effect transistors fabricated on single crystals of copper- and iron-phthalocyanine, using gold as a high work-function metal for the fabrication of source and drain electrodes. In these devices, the room-temperature mobility of holes reaches

  19. Charge transport in dual-gate organic field-effect transistors

    NARCIS (Netherlands)

    Brondijk, J.J.; Spijkman, M.; Torricelli, F.; Blom, P.W.M.; Leeuw, D.M. de

    2012-01-01

    The charge carrier distribution in dual-gate field-effect transistors is investigated as a function of semiconductor thickness. A good agreement with 2-dimensional numerically calculated transfer curves is obtained. For semiconductor thicknesses larger than the accumulation width, two spatially

  20. Thiadiazoloquinoxaline-Fused Naphthalenediimides for n-Type Organic Field-Effect Transistors (OFETs).

    Science.gov (United States)

    Hu, Ben-Lin; Zhang, Ke; An, Cunbin; Pisula, Wojciech; Baumgarten, Martin

    2017-12-01

    Thiadiazoloquinoxaline-fused naphthalenediimides (TQ-f-NDIs) are designed and synthesized. They show high electron affinities (EAs) of ∼4.5 eV. Organic field-effect transistor (OFET) devices, fabricated by dip-coating, provided maximum high electron mobilities of 0.03 cm 2 /(V·s) with an on/off ratio of 2 × 10 5 .

  1. Gate-bias assisted charge injection in organic field-effect transistors

    NARCIS (Netherlands)

    Brondijk, J. J.; Torricelli, F.; Smits, E. C. P.; Blom, P. W. M.; de Leeuw, D. M.

    The charge injection barriers in organic field-effect transistors (OFETs) seem to be far less critical as compared to organic light-emitting diodes (OLEDs). Counter intuitively, we show that the origin is image-force lowering of the barrier due to the gate bias at the source contact, although the

  2. N-type self-assembled monolayer field-effect transistors

    NARCIS (Netherlands)

    Ringk, A.; Li, X.; Gholamrezaie, F.; Smits, E.C.P.; Neuhold, A.; Moser, A.; Gelinck, G.H.; Resel, R.; Leeuw, D.M. de; Strohriegl, P.

    2012-01-01

    Within this work we present the synthesis and applications of a novel material designed for n-type self-assembled monolayer field-effect transistors (SAMFETs). Our novel perylene bisimide based molecule was obtained in six steps and is functionalized with a phosphonic acid linker which enables a

  3. Near-Infrared Light-Emitting Ambipolar Organic Field-Effect Transistors

    NARCIS (Netherlands)

    Smits, E.C.P.; Setayesh, S.; Anthopoulos, T.D.; Buechel, M.; Nijssen, W.; Coehoorn, R.; Blom, P.W.M.; Leeuw, D.M. de

    2006-01-01

    Recent years have seen tremendous advances in the area of organic-based optoelectronic devices and several applications previously envisioned are now reaching the stage of commercial exploitation.[1] Organic field-effect transistors (OFETs) are among these devices and can be arguably viewed as a

  4. Gate-bias assisted charge injection in organic field-effect transistors

    NARCIS (Netherlands)

    Brondijk, J.J.; Torricelli, F.; Smits, E.C.P.; Blom, P.W.M.; Leeuw, D.M. de

    2012-01-01

    The charge injection barriers in organic field-effect transistors (OFETs) seem to be far less critical as compared to organic light-emitting diodes (OLEDs). Counter intuitively, we show that the origin is image-force lowering of the barrier due to the gate bias at the source contact, although the

  5. Supported lipid bilayer on nanocrystalline diamond: dual optical and field-effect sensor for membrane disruption

    Czech Academy of Sciences Publication Activity Database

    Ang, P.K.; Loh, K.P.; Wohland, T.; Nesládek, Miloš; Van Hove, E.

    2009-01-01

    Roč. 19, č. 1 (2009), s. 109-116 ISSN 1616-301X Institutional research plan: CEZ:AV0Z10100520 Keywords : nanocrystalline diamond * biocompatibility * supported lipid bilayers * biosensors * solution gate field effect transistor Subject RIV: BM - Solid Matter Physics ; Magnetism Impact factor: 6.990, year: 2009

  6. The ion-sensitive field effect transistor in rapid acid-base titrations

    NARCIS (Netherlands)

    Bos, M.; Bergveld, Piet; van Veen-Blaauw, A.M.W.

    1979-01-01

    Ion-sensitive field effect transistors (ISFETs) are used as the pH sensor in rapid acid—base titrations. Titration speeds at least five times greater than those with glass electrodes are possible for accuracies better than ±1%.

  7. Intrinsic hydrogen-terminated diamond as ion-sensitive field effect transistor

    Czech Academy of Sciences Publication Activity Database

    Rezek, Bohuslav; Shin, D.; Watanabe, H.; Nebel, C.E.

    2007-01-01

    Roč. 122, - (2007), s. 596-599 ISSN 0925-4005 Institutional research plan: CEZ:AV0Z10100521 Keywords : diamond film * surface electronic properties * field effect transistor * pH sensor * semiconductor-electrolyte interface Subject RIV: BM - Solid Matter Physics ; Magnetism Impact factor: 2.934, year: 2007

  8. All-(111) surface silicon nanowire field effect transistor devices: Effects of surface preparations

    NARCIS (Netherlands)

    Masood, M.N.; Carlen, Edwin; van den Berg, Albert

    2014-01-01

    Etching/hydrogen termination of All-(111) surface silicon nanowire field effect (SiNW-FET) devices developed by conventional photolithography and plane dependent wet etchings is studied with X-ray photoelectron spectroscopy (XPS), scanning electron microscopy (SEM), atomic force microscopy (AFM) and

  9. Magnetic field effects on geminate reactions. Study of anthraquinone - hydrogen donors systems

    International Nuclear Information System (INIS)

    Vidal, Marie-Helene

    1987-01-01

    This study is devoted to magnetic field effects on chemical reactions which involve a radical pair with correlated spins (radical in a 'cage'). In the first part, the radical pair theory is described: mechanisms of singlet-triplet mixing, the different interactions inside the pair and a quantum mechanical treatment of the radical pair. The details of the experimental method (nanosecond laser flash photolysis) are reported in the second part. In the third part are shown experimental results obtained on Anthraquinone (AQ) - Hydrogen donors systems: - There is no magnetic field effect in homogeneous solution even at a high viscosity. The absorption spectra of the different reaction intermediates are obtained. - However a magnetic field effect is put forward when AQ is introduced in SDS micelles which are hydrogen donors. The absorption spectrum of the AQH · . semi-quinone radical in 'cage' is shown and a mechanism is proposed for its disappearance to generate the AQH-S and AQH 2 species. - The addition of 9, 10 Dihydroanthracene (DH2) inside the micelle near AQ induces an increase of the magnetic field effect by creation of (AQH · . - DH · . ) pairs which diffuse slowly. - Fixed radical pairs in a protein matrix were studied in reaction centers of photosynthetic bacteria: in that case, the half effect field is shifted to low fields when compared to the previously described systems. (author) [fr

  10. Study of field effect mobility in PCBM films and P3HT : PCBM blends

    NARCIS (Netherlands)

    von Hauff, E; Dyakonov, Vladimir; Parisi, R

    We report on field effect mobility measurements in methanofullerene [6,6]-phenyl C61C61-butyric acid methyl ester (PCBM) films and in blends of poly(3-hexylthiophene) (P3HT) and PCBM, identical to those used in polymer solar cells. Electron mobilities in the order of 10-3cm2/Vs were found in the

  11. Microstructure-mobility correlation in self-organised, conjugated polymer field-effect transistors

    DEFF Research Database (Denmark)

    Sirringhaus, H.; Brown, P.J.; Friend, R.H.

    2000-01-01

    We have investigated the correlation between polymer microstructure and charge carrier mobility in high-mobility, self-organised field-effect transistors of poly-3-hexyl-thiophene (P3HT). Two different preferential orientations of the microcrystalline P3HT domains with respect to the substrate have...

  12. Field effect measurements on charge carrier mobilities in various polymer-fullerene blend compositions

    NARCIS (Netherlands)

    von Hauff, E; Parisi, J.; Dyakonov, Vladimir

    2006-01-01

    In this study we investigated materials typically used in polymer photovoltaics. Field effect measurements were performed in order to determine the hole mobilities in the conjugated polymer poly(3-hexylthiophene) (P3HT) and the electron mobilities in the methanofullerene[6,6]-phenyl C61-butyric acid

  13. Shaping the Educational Policy Field: "Cross-Field Effects" in the Chinese Context

    Science.gov (United States)

    Yu, Hui

    2018-01-01

    This paper theorises how politics, economy and migrant population policies influence educational policy, utilising Bourdieusian theoretical resources to analyse the Chinese context. It develops the work of Lingard and Rawolle on cross-field effects and produces an updated three-step analytical framework. Taking the policy issue of the schooling of…

  14. Proton migration mechanism for operational instabilities in organic field-effect transistors

    NARCIS (Netherlands)

    Sharma, A.; Mathijssen, S.G.J.; Smits, E.C.P.; Kemerink, M.; Leeuw, D.M. de; Bobbert, P.A.

    2010-01-01

    Organic field-effect transistors exhibit operational instabilities involving a shift of the threshold gate voltage when a gate bias is applied. For a constant gate bias the threshold voltage shifts toward the applied gate bias voltage, an effect known as the bias-stress effect. Here, we report on a

  15. IC Compatible Wafer Level Fabrication of Silicon Nanowire Field Effect Transistors for Biosensing Applications

    NARCIS (Netherlands)

    Moh, T.S.Y.

    2013-01-01

    In biosensing, nano-devices such as Silicon Nanowire Field Effect Transistors (SiNW FETs) are promising components/sensors for ultra-high sensitive detection, especially when samples are low in concentration or a limited volume is available. Current processing of SiNW FETs often relies on expensive

  16. Monolithic junction field-effect transistor charge preamplifier for calorimetry at high luminosity hadron colliders

    International Nuclear Information System (INIS)

    Radeka, V.; Rescia, S.; Rehn, L.A.; Manfredi, P.F.; Speziali, V.

    1991-11-01

    The outstanding noise and radiation hardness characteristics of epitaxial-channel junction field-effect transistors (JFET) suggest that a monolithic preamplifier based upon them may be able to meet the strict specifications for calorimetry at high luminosity colliders. Results obtained so far with a buried layer planar technology, among them an entire monolithic charge-sensitive preamplifier, are described

  17. The Influence of Morphology on High-Performance Polymer Field-Effect Transistors

    DEFF Research Database (Denmark)

    Tsao, Hoi Nok; Cho, Don; Andreasen, Jens Wenzel

    2009-01-01

    The influence of molecular packing on the performance of polymer organic field-effect transistors is illustrated in this work. Both close -stacking distance and long-range order are important for achieving high mobilities. By aligning the polymers from solution, long-range order is induced...

  18. Organic nanofibers integrated by transfer technique in field-effect transistor devices

    DEFF Research Database (Denmark)

    Tavares, Luciana; Kjelstrup-Hansen, Jakob; Thilsing-Hansen, Kasper

    2011-01-01

    The electrical properties of self-assembled organic crystalline nanofibers are studied by integrating these on field-effect transistor platforms using both top and bottom contact configurations. In the staggered geometries, where the nanofibers are sandwiched between the gate and the source-drain...

  19. Graphene electrodes for n-type organic field-effect transistors

    DEFF Research Database (Denmark)

    Henrichsen, Henrik Hartmann; Boggild, P.

    2010-01-01

    field-effect transistor configuration (OFET). Single tip tungsten as well as microscale multi-point probes were used to electrically contact individual devices, making permanent connections unnecessary. The device platform has been tested with a thin film of para-hexaphenylene (p6P...

  20. High Performance Ambipolar Field-Effect Transistor of Random Network Carbon Nanotubes

    NARCIS (Netherlands)

    Bisri, Satria Zulkarnaen; Gao, Jia; Derenskyi, Vladimir; Gomulya, Widianta; Iezhokin, Igor; Gordiichuk, Pavlo; Herrmann, Andreas; Loi, Maria Antonietta

    2012-01-01

    Ambipolar field-effect transistors of random network carbon nanotubes are fabricated from an enriched dispersion utilizing a conjugated polymer as the selective purifying medium. The devices exhibit high mobility values for both holes and electrons (3 cm(2)/V.s) with a high on/off ratio (10(6)). The