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Sample records for n-channel metal-oxide-semiconductor field-effect

  1. Strained silicon/silicon germanium heterojunction n-channel metal oxide semiconductor field effect transistors

    International Nuclear Information System (INIS)

    Olsen, Sarah H.

    2002-01-01

    Investigations into the performance of strained silicon/silicon-germanium (Si/SiGe) n-channel metal-oxide-semiconductor field effect transistors (MOSFETs) have been carried out. Theoretical predictions suggest that use of a strained Si/SiGe material system with advanced material properties compared with conventional silicon allows enhanced MOSFET device performance. This study has therefore investigated the practical feasibility of obtaining superior electrical performance using a Si/SiGe material system. The MOSFET devices consisted of a strained Si surface channel and were fabricated on relaxed SiGe material using a reduced thermal budget process in order to preserve the strain. Two batches of strained Si/SiGe devices fabricated on material grown by differing methods have been analysed and both showed good transistor action. A correlation of electrical and physical device data established that the electrical device behaviour was closely related to the SiGe material quality, which differed depending on growth technique. The cross-wafer variation in the electrical performance of the strained Si/SiGe devices was found to be a function of material quality, thus the viability of Si/SiGe MOSFET technology for commercial applications has been addressed. Of particular importance was the finding that large-scale 'cross-hatching' roughness associated with relaxed SiGe alloys led to degradation in the small-scale roughness at the gate oxide interface, which affects electrical device performance. The fabrication of strained Si MOSFET devices on high quality SiGe material thus enabled significant performance gains to be realised compared with conventional Si control devices. In contrast, the performance of devices fabricated on material with severe cross-hatching roughness was found to be diminished by the nanoscale oxide interface roughness. The effect of device processing on SiGe material with differing as-grown roughness has been carried out and compared with the reactions

  2. Functional integrity of flexible n-channel metal-oxide-semiconductor field-effect transistors on a reversibly bistable platform

    Science.gov (United States)

    Alfaraj, Nasir; Hussain, Aftab M.; Torres Sevilla, Galo A.; Ghoneim, Mohamed T.; Rojas, Jhonathan P.; Aljedaani, Abdulrahman B.; Hussain, Muhammad M.

    2015-10-01

    Flexibility can bring a new dimension to state-of-the-art electronics, such as rollable displays and integrated circuit systems being transformed into more powerful resources. Flexible electronics are typically hosted on polymeric substrates. Such substrates can be bent and rolled up, but cannot be independently fixed at the rigid perpendicular position necessary to realize rollable display-integrated gadgets and electronics. A reversibly bistable material can assume two stable states in a reversible way: flexibly rolled state and independently unbent state. Such materials are used in cycling and biking safety wristbands and a variety of ankle bracelets for orthopedic healthcare. They are often wrapped around an object with high impulsive force loading. Here, we study the effects of cumulative impulsive force loading on thinned (25 μm) flexible silicon-based n-channel metal-oxide-semiconductor field-effect transistor devices housed on a reversibly bistable flexible platform. We found that the transistors have maintained their high performance level up to an accumulated 180 kN of impact force loading. The gate dielectric layers have maintained their reliability, which is evidenced by the low leakage current densities. Also, we observed low variation in the effective electron mobility values, which manifests that the device channels have maintained their carrier transport properties.

  3. A comparison of ionizing radiation and high field stress effects in n-channel power vertical double-diffused metal-oxide-semiconductor field-effect transistors

    International Nuclear Information System (INIS)

    Park, Mun-Soo; Na, Inmook; Wie, Chu R.

    2005-01-01

    n-channel power vertical double-diffused metal-oxide-semiconductor field-effect-transistor (VDMOSFET) devices were subjected to a high electric field stress or to a x-ray radiation. The current-voltage and capacitance-voltage measurements show that the channel-side interface and the drain-side interface are affected differently in the case of high electric field stress, whereas the interfaces are nearly uniformly affected in the case of x-ray radiation. This paper also shows that for the gated diode structure of VDMOSFET, the direct-current current-voltage technique measures only the drain-side interface; the subthreshold current-voltage technique measures only the channel-side interface; and the capacitance-voltage technique measures both interfaces simultaneously and clearly distinguishes the two interfaces. The capacitance-voltage technique is suggested to be a good quantitative method to examine both interface regions by a single measurement

  4. Fabrication and characterization of the normally-off N-channel lateral 4H-SiC metal-oxide-semiconductor field-effect transistors

    Science.gov (United States)

    Qing-Wen, Song; Xiao-Yan, Tang; Yan-Jing, He; Guan-Nan, Tang; Yue-Hu, Wang; Yi-Meng, Zhang; Hui, Guo; Ren-Xu, Jia; Hong-Liang, Lv; Yi-Men, Zhang; Yu-Ming, Zhang

    2016-03-01

    In this paper, the normally-off N-channel lateral 4H-SiC metal-oxide-semiconductor field-effect transistors (MOSFFETs) have been fabricated and characterized. A sandwich- (nitridation-oxidation-nitridation) type process was used to grow the gate dielectric film to obtain high channel mobility. The interface properties of 4H-SiC/SiO2 were examined by the measurement of HF I-V, G-V, and C-V over a range of frequencies. The ideal C-V curve with little hysteresis and the frequency dispersion were observed. As a result, the interface state density near the conduction band edge of 4H-SiC was reduced to 2 × 1011 eV-1·cm-2, the breakdown field of the grown oxides was about 9.8 MV/cm, the median peak field-effect mobility is about 32.5 cm2·V-1·s-1, and the maximum peak field-effect mobility of 38 cm2·V-1·s-1 was achieved in fabricated lateral 4H-SiC MOSFFETs. Projcet supported by the National Natural Science Foundation of China (Grant Nos. 61404098, 61176070, and 61274079), the Doctoral Fund of Ministry of Education of China (Grant Nos. 20110203110010 and 20130203120017), the National Key Basic Research Program of China (Grant No. 2015CB759600), and the Key Specific Projects of Ministry of Education of China (Grant No. 625010101).

  5. Electron-electron scattering-induced channel hot electron injection in nanoscale n-channel metal-oxide-semiconductor field-effect-transistors with high-k/metal gate stacks

    International Nuclear Information System (INIS)

    Tsai, Jyun-Yu; Liu, Kuan-Ju; Lu, Ying-Hsin; Liu, Xi-Wen; Chang, Ting-Chang; Chen, Ching-En; Ho, Szu-Han; Tseng, Tseung-Yuen; Cheng, Osbert; Huang, Cheng-Tung; Lu, Ching-Sen

    2014-01-01

    This work investigates electron-electron scattering (EES)-induced channel hot electron (CHE) injection in nanoscale n-channel metal-oxide-semiconductor field-effect-transistors (n-MOSFETs) with high-k/metal gate stacks. Many groups have proposed new models (i.e., single-particle and multiple-particle process) to well explain the hot carrier degradation in nanoscale devices and all mechanisms focused on Si-H bond dissociation at the Si/SiO 2 interface. However, for high-k dielectric devices, experiment results show that the channel hot carrier trapping in the pre-existing high-k bulk defects is the main degradation mechanism. Therefore, we propose a model of EES-induced CHE injection to illustrate the trapping-dominant mechanism in nanoscale n-MOSFETs with high-k/metal gate stacks.

  6. Scheme for the fabrication of ultrashort channel metal-oxide-semiconductor field-effect transistors

    International Nuclear Information System (INIS)

    Appenzeller, J.; Martel, R.; Solomon, P.; Chan, K.; Avouris, Ph.; Knoch, J.; Benedict, J.; Tanner, M.; Thomas, S.; Wang, K. L.

    2000-01-01

    We present a scheme for the fabrication of ultrashort channel length metal-oxide-semiconductor field-effect transistors (MOSFETs) involving nanolithography and molecular-beam epitaxy. The active channel is undoped and is defined by a combination of nanometer-scale patterning and anisotropic etching of an n ++ layer grown on a silicon on insulator wafer. The method is self-limiting and can produce MOSFET devices with channel lengths of less than 10 nm. Measurements on the first batch of n-MOSFET devices fabricated with this approach show very good output characteristics and good control of short-channel effects. (c) 2000 American Institute of Physics

  7. Characteristics of Superjunction Lateral-Double-Diffusion Metal Oxide Semiconductor Field Effect Transistor and Degradation after Electrical Stress

    Science.gov (United States)

    Lin, Jyh‑Ling; Lin, Ming‑Jang; Lin, Li‑Jheng

    2006-04-01

    The superjunction lateral double diffusion metal oxide semiconductor field effect has recently received considerable attention. Introducing heavily doped p-type strips to the n-type drift region increases the horizontal depletion capability. Consequently, the doping concentration of the drift region is higher and the conduction resistance is lower than those of conventional lateral-double-diffusion metal oxide semiconductor field effect transistors (LDMOSFETs). These characteristics may increase breakdown voltage (\\mathit{BV}) and reduce specific on-resistance (Ron,sp). In this study, we focus on the electrical characteristics of conventional LDMOSFETs on silicon bulk, silicon-on-insulator (SOI) LDMOSFETs and superjunction LDMOSFETs after bias stress. Additionally, the \\mathit{BV} and Ron,sp of superjunction LDMOSFETs with different N/P drift region widths and different dosages are discussed. Simulation tools, including two-dimensional (2-D) TSPREM-4/MEDICI and three-dimensional (3-D) DAVINCI, were employed to determine the device characteristics.

  8. A new metallic oxide semiconductor field effect transistor detector for use of in vivo dosimetry

    International Nuclear Information System (INIS)

    Qi Zhenyu; Deng Xiaowu; Huang Shaomin; Kang Dehua; Anatoly Rosenfeld

    2006-01-01

    Objective: To investigate the application of a recently developed metallic oxide semiconductor field effect transistor (MOSFET) detector for use in vivo dosimetry. Methods: The MOSFET detector was calibrated for X-ray beams of 8 MV and 15 MV, as well as electron beams with energy of 6,8,12 and 18 MeV. The dose linearity of the MOSFET detector was investigated for the doses ranging from 0 up to 50 Gy using 8 MV X-ray beams. Angular effect was evaluated as well in a cylindrical PMMA phantom by changing the beam entrance angle every 15 degree clockwise. The MOSFET detector was then used for a breast cancer patient in vivo dose measurement, after the treatment plan was verified in a water phantom using a NE-2571 ion chamber, in vivo measurements were performed in the first and last treatment, and once per week during the whole treatment. The measured doses were then compared with planning dose to evaluate the accuracy of each treatment. Results: The MOSFET detector represented a good energy response for X-ray beams of 8 MV and 15 MV, and for electron beams with energy of 6 MeV up to 18 MeV. With the 6 V bias, Dose linearity error of the MOSFET detector was within 3.0% up to approximately 50 Gy, which can be significantly reduced to 1% when the detector was calibrated before and after each measurement. The MOSFET response varied within 1.5% for angles from 270 degree to 90 degree. However, maximum error of 10.0% was recorded comparing MOSFET response between forward and backward direction. In vivo measurement for a breast cancer patient using 3DCRT showed that, the average dose deviation between measurement and calculation was 2.8%, and the maximum error was less then 5.0%. Conclusions: The new MOSFET detector, with its advantages of being in size, easy use, good energy response and dose linearity, can be used for in vivo dose measurement. (authors)

  9. Molecular-beam-deposited yttrium-oxide dielectrics in aluminum-gated metal - oxide - semiconductor field-effect transistors: Effective electron mobility

    International Nuclear Information System (INIS)

    Ragnarsson, L.-A degree.; Guha, S.; Copel, M.; Cartier, E.; Bojarczuk, N. A.; Karasinski, J.

    2001-01-01

    We report on high effective mobilities in yttrium-oxide-based n-channel metal - oxide - semiconductor field-effect transistors (MOSFETs) with aluminum gates. The yttrium oxide was grown in ultrahigh vacuum using a reactive atomic-beam-deposition system. Medium-energy ion-scattering studies indicate an oxide with an approximate composition of Y 2 O 3 on top of a thin layer of interfacial SiO 2 . The thickness of this interfacial oxide as well as the effective mobility are found to be dependent on the postgrowth anneal conditions. Optimum conditions result in mobilities approaching that of SiO 2 -based MOSFETs at higher fields with peak mobilities at approximately 210 cm 2 /Vs. [copyright] 2001 American Institute of Physics

  10. Trap state passivation improved hot-carrier instability by zirconium-doping in hafnium oxide in a nanoscale n-metal-oxide semiconductor-field effect transistors with high-k/metal gate

    International Nuclear Information System (INIS)

    Liu, Hsi-Wen; Tsai, Jyun-Yu; Liu, Kuan-Ju; Lu, Ying-Hsin; Chang, Ting-Chang; Chen, Ching-En; Tseng, Tseung-Yuen; Lin, Chien-Yu; Cheng, Osbert; Huang, Cheng-Tung; Ye, Yi-Han

    2016-01-01

    This work investigates the effect on hot carrier degradation (HCD) of doping zirconium into the hafnium oxide high-k layer in the nanoscale high-k/metal gate n-channel metal-oxide-semiconductor field-effect-transistors. Previous n-metal-oxide semiconductor-field effect transistor studies demonstrated that zirconium-doped hafnium oxide reduces charge trapping and improves positive bias temperature instability. In this work, a clear reduction in HCD is observed with zirconium-doped hafnium oxide because channel hot electron (CHE) trapping in pre-existing high-k bulk defects is the main degradation mechanism. However, this reduced HCD became ineffective at ultra-low temperature, since CHE traps in the deeper bulk defects at ultra-low temperature, while zirconium-doping only passivates shallow bulk defects.

  11. The effect of body bias of the metal-oxide-semiconductor field-effect transistor in the resistive network on spatial current distribution in a bio-inspired complementary metal-oxide-semiconductor vision chip

    Science.gov (United States)

    Kong, Jae-Sung; Hyun, Hyo-Young; Seo, Sang-Ho; Shin, Jang-Kyoo

    2008-11-01

    Complementary metal-oxide-semiconductor (CMOS) vision chips for edge detection based on a resistive circuit have recently been developed. These chips help in the creation of neuromorphic systems of a compact size, high speed of operation, and low power dissipation. The output of the vision chip depends predominantly upon the electrical characteristics of the resistive network which consists of a resistive circuit. In this paper, the body effect of the metal-oxide-semiconductor field-effect transistor for current distribution in a resistive circuit is discussed with a simple model. In order to evaluate the model, two 160 × 120 CMOS vision chips have been fabricated using a standard CMOS technology. The experimental results nicely match our prediction.

  12. A novel planar vertical double-diffused metal-oxide-semiconductor field-effect transistor with inhomogeneous floating islands

    Institute of Scientific and Technical Information of China (English)

    Ren Min; Li Ze-Hong; Liu Xiao-Long; Xie Jia-Xiong; Deng Guang-Min; Zhang Bo

    2011-01-01

    A novel planar vertical double-diffused metal-oxide-semiconductor (VDMOS) structure with an ultra-low specific on-resistance (Ron,sp),whose distinctive feature is the use of inhomogeneous floating p-islands in the n-drift region,is proposed.The theoretical limit of its Ron,sp is deduced,the influence of structure parameters on the breakdown voltage (BV) and Ron,sp are investigated,and the optimized results with BV of 83 V and Ron,sp of 54 mΩ.mm2 are obtained.Simulations show that the inhomogencous-floating-islands metal-oxide-semiconductor field-effect transistor (MOSFET)has a superior “Ron,sp/BV” trade-off to the conventional VDMOS (a 38% reduction of Ron,sp with the same BV) and the homogeneous-floating-islands MOSFET (a 10% reduction of Ron,sp with the same BV).The inhomogeneous-floatingislands MOSFET also has a much better body-diode characteristic than the superjunction MOSFET.Its reverse recovery peak current,reverse recovery time and reverse recovery charge are about 50,80 and 40% of those of the superjunction MOSFET,respectively.

  13. A novel planar vertical double-diffused metal-oxide-semiconductor field-effect transistor with inhomogeneous floating islands

    International Nuclear Information System (INIS)

    Ren Min; Li Ze-Hong; Liu Xiao-Long; Xie Jia-Xiong; Deng Guang-Min; Zhang Bo

    2011-01-01

    A novel planar vertical double-diffused metal-oxide-semiconductor (VDMOS) structure with an ultra-low specific on-resistance (R on,sp ), whose distinctive feature is the use of inhomogeneous floating p-islands in the n-drift region, is proposed. The theoretical limit of its R on,sp is deduced, the influence of structure parameters on the breakdown voltage (BV) and R on,sp are investigated, and the optimized results with BV of 83 V and R on,sp of 54 mΩ·mm 2 are obtained. Simulations show that the inhomogeneous-floating-islands metal-oxide-semiconductor field-effect transistor (MOSFET) has a superior 'R on,sp /BV' trade-off to the conventional VDMOS (a 38% reduction of R on,sp with the same BV) and the homogeneous-floating-islands MOSFET (a 10% reduction of R on,sp with the same BV). The inhomogeneous-floating-islands MOSFET also has a much better body-diode characteristic than the superjunction MOSFET. Its reverse recovery peak current, reverse recovery time and reverse recovery charge are about 50, 80 and 40% of those of the superjunction MOSFET, respectively. (interdisciplinary physics and related areas of science and technology)

  14. Semi-classical noise investigation for sub-40nm metal-oxide-semiconductor field-effect transistors

    International Nuclear Information System (INIS)

    Spathis, C.; Birbas, A.; Georgakopoulou, K.

    2015-01-01

    Device white noise levels in short channel Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs) dictate the performance and reliability of high-frequency circuits ranging from high-speed microprocessors to Low-Noise Amplifiers (LNAs) and microwave circuits. Recent experimental noise measurements with very short devices demonstrate the existence of suppressed shot noise, contrary to the predictions of classical channel thermal noise models. In this work we show that, as the dimensions continue to shrink, shot noise has to be considered when the channel resistance becomes comparable to the barrier resistance at the source-channel junction. By adopting a semi-classical approach and taking retrospectively into account transport, short-channel and quantum effects, we investigate the partitioning between shot and thermal noise, and formulate a predictive model that describes the noise characteristics of modern devices

  15. Single photon sources in 4H-SiC metal-oxide-semiconductor field-effect transistors

    Science.gov (United States)

    Abe, Y.; Umeda, T.; Okamoto, M.; Kosugi, R.; Harada, S.; Haruyama, M.; Kada, W.; Hanaizumi, O.; Onoda, S.; Ohshima, T.

    2018-01-01

    We present single photon sources (SPSs) embedded in 4H-SiC metal-oxide-semiconductor field-effect transistors (MOSFETs). They are formed in the SiC/SiO2 interface regions of wet-oxidation C-face 4H-SiC MOSFETs and were not found in other C-face and Si-face MOSFETs. Their bright room-temperature photoluminescence (PL) was observed in the range from 550 to 750 nm and revealed variable multi-peak structures as well as variable peak shifts. We characterized a wide variety of their PL spectra as the inevitable variation of local atomic structures at the interface. Their polarization dependence indicates that they are formed at the SiC side of the interface. We also demonstrate that it is possible to switch on/off the SPSs by a bias voltage of the MOSFET.

  16. Hydrogen-terminated diamond vertical-type metal oxide semiconductor field-effect transistors with a trench gate

    Energy Technology Data Exchange (ETDEWEB)

    Inaba, Masafumi, E-mail: inaba-ma@ruri.waseda.jp; Muta, Tsubasa; Kobayashi, Mikinori; Saito, Toshiki; Shibata, Masanobu; Matsumura, Daisuke; Kudo, Takuya; Hiraiwa, Atsushi [Graduate School of Science and Engineering, Waseda University, 3-4-1 Okubo, Shinjuku, Tokyo 169-8555 (Japan); Kawarada, Hiroshi [Graduate School of Science and Engineering, Waseda University, 3-4-1 Okubo, Shinjuku, Tokyo 169-8555 (Japan); Kagami Memorial Laboratory for Materials Science and Technology, Waseda University, 2-8-26 Nishiwaseda, Shinjuku, Tokyo 169-0051 (Japan)

    2016-07-18

    The hydrogen-terminated diamond surface (C-H diamond) has a two-dimensional hole gas (2DHG) layer independent of the crystal orientation. A 2DHG layer is ubiquitously formed on the C-H diamond surface covered by atomic-layer-deposited-Al{sub 2}O{sub 3}. Using Al{sub 2}O{sub 3} as a gate oxide, C-H diamond metal oxide semiconductor field-effect transistors (MOSFETs) operate in a trench gate structure where the diamond side-wall acts as a channel. MOSFETs with a side-wall channel exhibit equivalent performance to the lateral C-H diamond MOSFET without a side-wall channel. Here, a vertical-type MOSFET with a drain on the bottom is demonstrated in diamond with channel current modulation by the gate and pinch off.

  17. Semi-classical noise investigation for sub-40nm metal-oxide-semiconductor field-effect transistors

    Energy Technology Data Exchange (ETDEWEB)

    Spathis, C., E-mail: cspathis@ece.upatras.gr; Birbas, A.; Georgakopoulou, K. [Department of Electrical and Computer Engineering, University of Patras, Patras 26500 (Greece)

    2015-08-15

    Device white noise levels in short channel Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs) dictate the performance and reliability of high-frequency circuits ranging from high-speed microprocessors to Low-Noise Amplifiers (LNAs) and microwave circuits. Recent experimental noise measurements with very short devices demonstrate the existence of suppressed shot noise, contrary to the predictions of classical channel thermal noise models. In this work we show that, as the dimensions continue to shrink, shot noise has to be considered when the channel resistance becomes comparable to the barrier resistance at the source-channel junction. By adopting a semi-classical approach and taking retrospectively into account transport, short-channel and quantum effects, we investigate the partitioning between shot and thermal noise, and formulate a predictive model that describes the noise characteristics of modern devices.

  18. Effective dose assessment in the maxillofacial region using thermoluminescent (TLD) and metal oxide semiconductor field-effect transistor (MOSFET) dosemeters: a comparative study

    NARCIS (Netherlands)

    Koivisto, J.; Schulze, D.; Wolff, J.E.H.; Rottke, D.

    2014-01-01

    Objectives: The objective of this study was to compare the performance of metal oxide semiconductor field-effect transistor (MOSFET) technology dosemeters with thermoluminescent dosemeters (TLDs) (TLD 100; Thermo Fisher Scientific, Waltham, MA) in the maxillofacial area. Methods: Organ and effective

  19. Characteristics of drain-modulated generation current in n-type metal-oxide-semiconductor field-effect transistor

    International Nuclear Information System (INIS)

    Chen Hai-Feng; Guo Li-Xin; Zheng Pu-Yang; Dong Zhao; Zhang Qian

    2015-01-01

    Drain-modulated generation current I DMG induced by interface traps in an n-type metal-oxide-semiconductor field-effect transistor (nMOSFET) is investigated. The formation of I DMG ascribes to the change of the Si surface potential φ s . This change makes the channel suffer transformation from the inversion state, depletion I state to depletion II state. The simulation result agrees with the experiment in the inversion and depletion I states. In the depletion II state, the theoretical curve goes into saturation, while the experimental curve drops quickly as V D increases. The reason for this unconformity is that the drain-to-gate voltage V DG lessens φ s around the drain corner and controls the falling edge of the I DMG curve. The experiments of gate-modulated generation and recombination currents are also applied to verify the reasonability of the mechanism. Based on this mechanism, a theoretical model of the I DMG falling edge is set up in which I DMG has an exponential attenuation relation with V DG . Finally, the critical fitting coefficient t of the experimental curves is extracted. It is found that t = 80 mV = 3kT/q. This result fully shows the accuracy of the above mechanism. (paper)

  20. Band-to-band tunneling in a carbon nanotube metal-oxide-semiconductor field-effect transistor is dominated by phonon assisted tunneling

    OpenAIRE

    Koswatta, Siyuranga O.; Lundstrom, Mark S.; Nikonov, Dmitri E.

    2007-01-01

    Band-to-band tunneling (BTBT) devices have recently gained a lot of interest due to their potential for reducing power dissipation in integrated circuits. We have performed extensive simulations for the BTBT operation of carbon nanotube metal-oxide-semiconductor field-effect transistors (CNT-MOSFETs) using the non-equilibrium Green's functions formalism for both ballistic and dissipative quantum transport. In comparison with recently reported experimental data (Y. Lu et al, J. Am. Chem. Soc.,...

  1. Verification of the plan dosimetry for high dose rate brachytherapy using metal-oxide-semiconductor field effect transistor detectors

    International Nuclear Information System (INIS)

    Qi Zhenyu; Deng Xiaowu; Huang Shaomin; Lu Jie; Lerch, Michael; Cutajar, Dean; Rosenfeld, Anatoly

    2007-01-01

    The feasibility of a recently designed metal-oxide-semiconductor field effect transistor (MOSFET) dosimetry system for dose verification of high dose rate (HDR) brachytherapy treatment planning was investigated. MOSFET detectors were calibrated with a 0.6 cm 3 NE-2571 Farmer-type ionization chamber in water. Key characteristics of the MOSFET detectors, such as the energy dependence, that will affect phantom measurements with HDR 192 Ir sources were measured. The MOSFET detector was then applied to verify the dosimetric accuracy of HDR brachytherapy treatments in a custom-made water phantom. Three MOSFET detectors were calibrated independently, with the calibration factors ranging from 0.187 to 0.215 cGy/mV. A distance dependent energy response was observed, significant within 2 cm from the source. The new MOSFET detector has a good reproducibility ( 2 =1). It was observed that the MOSFET detectors had a linear response to dose until the threshold voltage reached approximately 24 V for 192 Ir source measurements. Further comparison of phantom measurements using MOSFET detectors with dose calculations by a commercial treatment planning system for computed tomography-based brachytherapy treatment plans showed that the mean relative deviation was 2.2±0.2% for dose points 1 cm away from the source and 2.0±0.1% for dose points located 2 cm away. The percentage deviations between the measured doses and the planned doses were below 5% for all the measurements. The MOSFET detector, with its advantages of small physical size and ease of use, is a reliable tool for quality assurance of HDR brachytherapy. The phantom verification method described here is universal and can be applied to other HDR brachytherapy treatments

  2. A Novel Fully Depleted Air AlN Silicon-on-Insulator Metal-Oxide-Semiconductor Field Effect Transistor

    International Nuclear Information System (INIS)

    Yuan, Yang; Yong, Gao; Peng-Liang, Gong

    2008-01-01

    A novel fully depleted air AlN silicon-on-insulator (SOI) metal-oxide-semiconductor field effect transistor (MOS-FET) is presented, which can eliminate the self-heating effect and solve the problem that the off-state current of SOI MOSFETs increases and the threshold voltage characteristics become worse when employing a high thermal conductivity material as a buried layer. The simulation results reveal that the lattice temperature in normal SOI devices is 75 K higher than the atmosphere temperature, while the lattice temperature is just 4K higher than the atmosphere temperature resulting in less severe self-heating effect in air AlN SOI MOSFETs and AlN SOI MOSFETs. The on-state current of air AlN SOI MOSFETs is similar to the AlN SOI structure, and improves 12.3% more than that of normal SOI MOSFETs. The off-state current of AlN SOI is 6.7 times of normal SOI MOSFETs, while the counterpart of air AlN SOI MOSFETs is lower than that of SOI MOSFETs by two orders of magnitude. The threshold voltage change of air AlN SOI MOSFETs with different drain voltage is much less than that of AlN SOI devices, when the drain voltage is biased at 0.8 V, this difference is 28mV, so the threshold voltage change induced by employing high thermal conductivity material is cured. (condensed matter: electronic structure, electrical, magnetic, and optical properties)

  3. Stress Characterization of 4H-SiC Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) using Raman Spectroscopy and the Finite Element Method.

    Science.gov (United States)

    Yoshikawa, Masanobu; Kosaka, Kenichi; Seki, Hirohumi; Kimoto, Tsunenobu

    2016-07-01

    We measured the depolarized and polarized Raman spectra of a 4H-SiC metal-oxide-semiconductor field-effect transistor (MOSFET) and found that compressive stress of approximately 20 MPa occurs under the source and gate electrodes and tensile stress of approximately 10 MPa occurs between the source and gate electrodes. The experimental result was in close agreement with the result obtained by calculation using the finite element method (FEM). A combination of Raman spectroscopy and FEM provides much data on the stresses in 4H-SiC MOSFET. © The Author(s) 2016.

  4. Homostructured ZnO-based metal-oxide-semiconductor field-effect transistors deposited at low temperature by vapor cooling condensation system

    Energy Technology Data Exchange (ETDEWEB)

    Lin, Tzu-Shun [Institute of Nanotechnology and Microsystems Engineering, National Cheng Kung University, 701 Tainan, Taiwan, ROC (China); Lee, Ching-Ting, E-mail: ctlee@ee.ncku.edu.tw [Institute of Nanotechnology and Microsystems Engineering, National Cheng Kung University, 701 Tainan, Taiwan, ROC (China); Institute of Microelectronics, Department of Electrical Engineering, Advanced Optoelectronic Technology Center, National Cheng Kung University, 701 Tainan, Taiwan, ROC (China)

    2015-11-01

    Highlights: • The vapor cooling condensation system was designed and used to deposit homostructured ZnO-based metal-oxide-semiconductor field-effect transistors. • The resulting homostructured ZnO-based MOSFETs operated at a reverse voltage of −6 V had a very low gate leakage current of 24 nA. • The associated I{sub DSS} and the g{sub m(max)} were 5.64 mA/mm and 1.31 mS/mm, respectively. - Abstract: The vapor cooling condensation system was designed and used to deposit homostructured ZnO-based metal-oxide-semiconductor field-effect transistors (MOSFETs) on sapphire substrates. Owing to the high quality of the deposited, various ZnO films and interfaces, the resulting MOSFETs manifested attractive characteristics, such as the low gate leakage current of 24 nA, the low average interface state density of 2.92 × 10{sup 11} cm{sup −2} eV{sup −1}, and the complete pinch-off performance. The saturation drain–source current, the maximum transconductance, and the gate voltage swing of the resulting homostructured ZnO-based MOSFETs were 5.64 mA/mm, 1.31 mS/mm, and 3.2 V, respectively.

  5. Band-to-band tunneling in a carbon nanotube metal-oxide-semiconductor field-effect transistor is dominated by phonon-assisted tunneling.

    Science.gov (United States)

    Koswatta, Siyuranga O; Lundstrom, Mark S; Nikonov, Dmitri E

    2007-05-01

    Band-to-band tunneling (BTBT) devices have recently gained a lot of interest due to their potential for reducing power dissipation in integrated circuits. We have performed extensive simulations for the BTBT operation of carbon nanotube metal-oxide-semiconductor field-effect transistors (CNT-MOSFETs) using the nonequilibrium Green's function formalism for both ballistic and dissipative quantum transport. In comparison with recently reported experimental data (J. Am. Chem. Soc. 2006, 128, 3518-3519), we have obtained strong evidence that BTBT in CNT-MOSFETs is dominated by optical phonon assisted inelastic transport, which can have important implications on the transistor characteristics. It is shown that, under large biasing conditions, two-phonon scattering may also become important.

  6. A Wide-Range Tunable Level-Keeper Using Vertical Metal-Oxide-Semiconductor Field-Effect Transistors for Current-Reuse Systems

    Science.gov (United States)

    Tanoi, Satoru; Endoh, Tetsuo

    2012-04-01

    A wide-range tunable level-keeper using vertical metal-oxide-semiconductor field-effect transistors (MOSFETs) is proposed for current-reuse analog systems. The design keys for widening tunable range of the operation are a two-path feed-back and a vertical MOSFET with back-bias-effect free. The proposed circuit with the vertical MOSFETs shows the 1.23-V tunable-range of the input level with the 2.4-V internal-supply voltage (VDD) in the simulation. This tunable-range of the proposed circuit is 4.7 times wider than that of the conventional. The achieved current efficiency of the proposed level-keeper is 66% at the 1.2-V output with the 2.4-V VDD. This efficiency of the proposed circuit is twice higher than that of the traditional voltage down converter.

  7. Non-Stoichiometric SixN Metal-Oxide-Semiconductor Field-Effect Transistor for Compact Random Number Generator with 0.3 Mbit/s Generation Rate

    Science.gov (United States)

    Matsumoto, Mari; Ohba, Ryuji; Yasuda, Shin-ichi; Uchida, Ken; Tanamoto, Tetsufumi; Fujita, Shinobu

    2008-08-01

    The demand for random numbers for security applications is increasing. A conventional random number generator using thermal noise can generate unpredictable high-quality random numbers, but the circuit is extremely large because of large amplifier circuit for a small thermal signal. On the other hand, a pseudo-random number generator is small but the quality of randomness is bad. For a small circuit and a high quality of randomness, we purpose a non-stoichiometric SixN metal-oxide-semiconductor field-effect transistor (MOSFET) noise source device. This device generates a very large noise signal without an amplifier circuit. As a result, it is shown that, utilizing a SiN MOSFET, we can attain a compact random number generator with a high generation rate near 1 Mbit/s, which is suitable for almost all security applications.

  8. Multi-frequency inversion-charge pumping for charge separation and mobility analysis in high-k/InGaAs metal-oxide-semiconductor field-effect transistors

    Energy Technology Data Exchange (ETDEWEB)

    Djara, V.; Cherkaoui, K.; Negara, M. A.; Hurley, P. K., E-mail: paul.hurley@tyndall.ie [Tyndall National Institute, University College Cork, Dyke Parade, Cork (Ireland)

    2015-11-28

    An alternative multi-frequency inversion-charge pumping (MFICP) technique was developed to directly separate the inversion charge density (N{sub inv}) from the trapped charge density in high-k/InGaAs metal-oxide-semiconductor field-effect transistors (MOSFETs). This approach relies on the fitting of the frequency response of border traps, obtained from inversion-charge pumping measurements performed over a wide range of frequencies at room temperature on a single MOSFET, using a modified charge trapping model. The obtained model yielded the capture time constant and density of border traps located at energy levels aligned with the InGaAs conduction band. Moreover, the combination of MFICP and pulsed I{sub d}-V{sub g} measurements enabled an accurate effective mobility vs N{sub inv} extraction and analysis. The data obtained using the MFICP approach are consistent with the most recent reports on high-k/InGaAs.

  9. Spin-dependent transport properties of a GaMnAs-based vertical spin metal-oxide-semiconductor field-effect transistor structure

    Energy Technology Data Exchange (ETDEWEB)

    Kanaki, Toshiki, E-mail: kanaki@cryst.t.u-tokyo.ac.jp; Asahara, Hirokatsu; Ohya, Shinobu, E-mail: ohya@cryst.t.u-tokyo.ac.jp; Tanaka, Masaaki, E-mail: masaaki@ee.t.u-tokyo.ac.jp [Department of Electrical Engineering and Information Systems, The University of Tokyo, 7-3-1 Hongo, Bunkyo-ku, Tokyo 113-8656 (Japan)

    2015-12-14

    We fabricate a vertical spin metal-oxide-semiconductor field-effect transistor (spin-MOSFET) structure, which is composed of an epitaxial single-crystal heterostructure with a ferromagnetic-semiconductor GaMnAs source/drain, and investigate its spin-dependent transport properties. We modulate the drain-source current I{sub DS} by ∼±0.5% with a gate-source voltage of ±10.8 V and also modulate I{sub DS} by up to 60% with changing the magnetization configuration of the GaMnAs source/drain at 3.5 K. The magnetoresistance ratio is more than two orders of magnitude higher than that obtained in the previous studies on spin MOSFETs. Our result shows that a vertical structure is one of the hopeful candidates for spin MOSFET when the device size is reduced to a sub-micron or nanometer scale.

  10. Radiation hardness of β-Ga2O3 metal-oxide-semiconductor field-effect transistors against gamma-ray irradiation

    Science.gov (United States)

    Wong, Man Hoi; Takeyama, Akinori; Makino, Takahiro; Ohshima, Takeshi; Sasaki, Kohei; Kuramata, Akito; Yamakoshi, Shigenobu; Higashiwaki, Masataka

    2018-01-01

    The effects of ionizing radiation on β-Ga2O3 metal-oxide-semiconductor field-effect transistors (MOSFETs) were investigated. A gamma-ray tolerance as high as 1.6 MGy(SiO2) was demonstrated for the bulk Ga2O3 channel by virtue of weak radiation effects on the MOSFETs' output current and threshold voltage. The MOSFETs remained functional with insignificant hysteresis in their transfer characteristics after exposure to the maximum cumulative dose. Despite the intrinsic radiation hardness of Ga2O3, radiation-induced gate leakage and drain current dispersion ascribed respectively to dielectric damage and interface charge trapping were found to limit the overall radiation hardness of these devices.

  11. Spin-dependent transport properties of a GaMnAs-based vertical spin metal-oxide-semiconductor field-effect transistor structure

    International Nuclear Information System (INIS)

    Kanaki, Toshiki; Asahara, Hirokatsu; Ohya, Shinobu; Tanaka, Masaaki

    2015-01-01

    We fabricate a vertical spin metal-oxide-semiconductor field-effect transistor (spin-MOSFET) structure, which is composed of an epitaxial single-crystal heterostructure with a ferromagnetic-semiconductor GaMnAs source/drain, and investigate its spin-dependent transport properties. We modulate the drain-source current I DS by ∼±0.5% with a gate-source voltage of ±10.8 V and also modulate I DS by up to 60% with changing the magnetization configuration of the GaMnAs source/drain at 3.5 K. The magnetoresistance ratio is more than two orders of magnitude higher than that obtained in the previous studies on spin MOSFETs. Our result shows that a vertical structure is one of the hopeful candidates for spin MOSFET when the device size is reduced to a sub-micron or nanometer scale

  12. Electrical characterization of Ω-gated uniaxial tensile strained Si nanowire-array metal-oxide-semiconductor field effect transistors with - and channel orientations

    International Nuclear Information System (INIS)

    Habicht, Stefan; Feste, Sebastian; Zhao, Qing-Tai; Buca, Dan; Mantl, Siegfried

    2012-01-01

    Nanowire-array metal-oxide-semiconductor field effect transistors (MOSFETs) were fabricated along and crystal directions on (001) un-/strained silicon-on-insulator substrates. Lateral strain relaxation through patterning was employed to transform biaxial tensile strain into uniaxial tensile strain along the nanowire. Devices feature ideal subthreshold swings and maximum on-current/off-current ratios of 10 11 for n and p-type transistors on both substrates. Electron and hole mobilities were extracted by split C–V method. For p-MOSFETs an increased mobility is observed for channel direction devices compared to devices. The n-MOSFETs showed a 45% increased electron mobility compared to devices. The comparison of strained and unstrained n-MOSFETs along and clearly demonstrates improved electron mobilities for strained channels of both channel orientations.

  13. Dual-Material Gate Approach to Suppression of Random-Dopant-Induced Characteristic Fluctuation in 16 nm Metal-Oxide-Semiconductor Field-Effect-Transistor Devices

    Science.gov (United States)

    Li, Yiming; Lee, Kuo-Fu; Yiu, Chun-Yen; Chiu, Yung-Yueh; Chang, Ru-Wei

    2011-04-01

    In this work, we explore for the first time dual-material gate (DMG) and inverse DMG devices for suppressing the random-dopant (RD)-induced characteristic fluctuation in 16 nm metal-oxide-semiconductor field-effect-transistor (MOSFET) devices. The physical mechanism of suppressing the characteristic fluctuation of DMG devices is observed and discussed. The achieved improvement in suppressing the RD-induced threshold voltage, on-state current, and off-state current fluctuations are 28, 12.3, and 59%, respectively. To further suppress the fluctuations, an approach that combines the DMG method and channel-doping-profile engineering is also advanced and explored. The results of our study show that among the suppression techniques, the use of the DMG device with an inverse lateral asymmetric channel-doping-profile has good immunity to fluctuation.

  14. Near interface traps in SiO{sub 2}/4H-SiC metal-oxide-semiconductor field effect transistors monitored by temperature dependent gate current transient measurements

    Energy Technology Data Exchange (ETDEWEB)

    Fiorenza, Patrick; La Magna, Antonino; Vivona, Marilena; Roccaforte, Fabrizio [Consiglio Nazionale delle Ricerche-Istituto per la Microelettronica e Microsistemi (CNR-IMM), Strada VIII 5, Zona Industriale 95121 Catania (Italy)

    2016-07-04

    This letter reports on the impact of gate oxide trapping states on the conduction mechanisms in SiO{sub 2}/4H-SiC metal-oxide-semiconductor field effect transistors (MOSFETs). The phenomena were studied by gate current transient measurements, performed on n-channel MOSFETs operated in “gate-controlled-diode” configuration. The measurements revealed an anomalous non-steady conduction under negative bias (V{sub G} > |20 V|) through the SiO{sub 2}/4H-SiC interface. The phenomenon was explained by the coexistence of a electron variable range hopping and a hole Fowler-Nordheim (FN) tunnelling. A semi-empirical modified FN model with a time-depended electric field is used to estimate the near interface traps in the gate oxide (N{sub trap} ∼ 2 × 10{sup 11} cm{sup −2}).

  15. Monolithic integration of a silicon nanowire field-effect transistors array on a complementary metal-oxide semiconductor chip for biochemical sensor applications.

    Science.gov (United States)

    Livi, Paolo; Kwiat, Moria; Shadmani, Amir; Pevzner, Alexander; Navarra, Giulio; Rothe, Jörg; Stettler, Alexander; Chen, Yihui; Patolsky, Fernando; Hierlemann, Andreas

    2015-10-06

    We present a monolithic complementary metal-oxide semiconductor (CMOS)-based sensor system comprising an array of silicon nanowire field-effect transistors (FETs) and the signal-conditioning circuitry on the same chip. The silicon nanowires were fabricated by chemical vapor deposition methods and then transferred to the CMOS chip, where Ti/Pd/Ti contacts had been patterned via e-beam lithography. The on-chip circuitry measures the current flowing through each nanowire FET upon applying a constant source-drain voltage. The analog signal is digitized on chip and then transmitted to a receiving unit. The system has been successfully fabricated and tested by acquiring I-V curves of the bare nanowire-based FETs. Furthermore, the sensing capabilities of the complete system have been demonstrated by recording current changes upon nanowire exposure to solutions of different pHs, as well as by detecting different concentrations of Troponin T biomarkers (cTnT) through antibody-functionalized nanowire FETs.

  16. Properties of InGaAs/GaAs metal-oxide-semiconductor heterostructure field-effect transistors modified by surface treatment

    Energy Technology Data Exchange (ETDEWEB)

    Gregušová, D., E-mail: Dagmar.Gregusova@savba.sk [Institute of Electrical Engineering, Slovak Academy of Sciences, Dúbravská cesta 9, Bratislava SK-84104 (Slovakia); Gucmann, F.; Kúdela, R. [Institute of Electrical Engineering, Slovak Academy of Sciences, Dúbravská cesta 9, Bratislava SK-84104 (Slovakia); Mičušík, M. [Polymer Institute of Slovak Academy of Sciences, Dúbravská cesta 9, Bratislava SK-84541 (Slovakia); Stoklas, R.; Válik, L. [Institute of Electrical Engineering, Slovak Academy of Sciences, Dúbravská cesta 9, Bratislava SK-84104 (Slovakia); Greguš, J. [Faculty of Mathematics, Physics and Informatics, Comenius University, Mlynská dolina, Bratislava SK-84248 (Slovakia); Blaho, M. [Institute of Electrical Engineering, Slovak Academy of Sciences, Dúbravská cesta 9, Bratislava SK-84104 (Slovakia); Kordoš, P. [Institute of Electronics and Photonics, Faculty of Electrical Engineering and Information Technology STU, Ilkovičova 3, Bratislava SK-81219 (Slovakia)

    2017-02-15

    Highlights: • AlGaAs/InGaAs/GaAs-based metal oxide semiconductor transistors-MOSHFET. • Thin Al-layer deposited in-situ and oxidize in air – gate insulator. • MOSHFET vs HFET transistor properties, density of traps evaluated. - Abstract: GaAs-based heterostructures exhibit excellent carrier transport properties, mainly the high carrier velocity. An AlGaAs-GaAs heterostructure field-effect transistor (HFET) with an InGaAs channel was prepared using metal-organic chemical vapor deposition (MOVPE). An AlOx layer was formed on the AlGaAs barrier layer by the air-assisted oxidation of a thin Al layer deposited in-situ in an MOVPE reactor immediately after AlGaAs/InGaAs growth. The HFETs and MOSHFETs exhibited a very low trap state density in the order of 10{sup 11} cm{sup −2} eV{sup −1}. Capacitance measurement yielded no significant difference between the HFET and MOSHFET structures. The formation of an AlOx layer modified the surface by partially eliminating surface states that arise from Ga-and As-based native oxides. The presence of an AlOx layer reflected in a reduced gate leakage current, which was evidenced by the two-terminal transistor measurement. Presented preparation procedure and device properties show great potential of AlGaAs/InGaAs-based MOSHFETs.

  17. Study on the drain bias effect on negative bias temperature instability degradation of an ultra-short p-channel metal-oxide-semiconductor field-effect transistor

    International Nuclear Information System (INIS)

    Yan-Rong, Cao; Xiao-Hua, Ma; Yue, Hao; Shi-Gang, Hu

    2010-01-01

    This paper studies the effect of drain bias on ultra-short p-channel metal-oxide-semiconductor field-effect transistor (PMOSFET) degradation during negative bias temperature (NBT) stress. When a relatively large gate voltage is applied, the degradation magnitude is much more than the drain voltage which is the same as the gate voltage supplied, and the time exponent gets larger than that of the NBT instability (NBTI). With decreasing drain voltage, the degradation magnitude and the time exponent all get smaller. At some values of the drain voltage, the degradation magnitude is even smaller than that of NBTI, and when the drain voltage gets small enough, the exhibition of degradation becomes very similar to the NBTI degradation. When a relatively large drain voltage is applied, with decreasing gate voltage, the degradation magnitude gets smaller. However, the time exponent becomes larger. With the help of electric field simulation, this paper concludes that the degradation magnitude is determined by the vertical electric field of the oxide, the amount of hot holes generated by the strong channel lateral electric field at the gate/drain overlap region, and the time exponent is mainly controlled by localized damage caused by the lateral electric field of the oxide in the gate/drain overlap region where hot carriers are produced. (condensed matter: electronic structure, electrical, magnetic, and optical properties)

  18. Characterization of high-sensitivity metal oxide semiconductor field effect transistor dosimeters system and LiF:Mg,Cu,P thermoluminescence dosimeters for use in diagnostic radiology

    International Nuclear Information System (INIS)

    Dong, S.L.; Chu, T.C.; Lan, G.Y.; Wu, T.H.; Lin, Y.C.; Lee, J.S.

    2002-01-01

    Monitoring radiation exposure during diagnostic radiographic procedures has recently become an area of interest. In recent years, the LiF:Mg,Cu,P thermoluminescence dosimeter (TLD-100H) and the highly sensitive metal oxide semiconductor field effect transistor (MOSFET) dosimeter were introduced as good candidates for entrance skin dose measurements in diagnostic radiology. In the present study, the TLD-100H and the MOSFET dosimeters were evaluated for sensitivity, linearity, energy, angular dependence, and post-exposure response. Our results indicate that the TLD-100H dosimeter has excellent linearity within diagnostic energy ranges and its sensitivity variations were under 3% at tube potentials from 40 Vp to 125 kVp. Good linearity was also observed with the MOSFET dosimeter, but in low-dose regions the values are less reliable and were found to be a function of the tube potentials. Both dosimeters also presented predictable angular dependence in this study. Our findings suggest that the TLD-100H dosimeter is more appropriate for low-dose diagnostic procedures such as chest and skull projections. The MOSFET dosimeter system is valuable for entrance skin dose measurement with lumbar spine projections and certain fluoroscopic procedures

  19. Modeling of anisotropic two-dimensional materials monolayer HfS{sub 2} and phosphorene metal-oxide semiconductor field effect transistors

    Energy Technology Data Exchange (ETDEWEB)

    Chang, Jiwon [SEMATECH, 257 Fuller Rd #2200, Albany, New York 12203 (United States)

    2015-06-07

    Ballistic transport characteristics of metal-oxide semiconductor field effect transistors (MOSFETs) based on anisotropic two-dimensional materials monolayer HfS{sub 2} and phosphorene are explored through quantum transport simulations. We focus on the effects of the channel crystal orientation and the channel length scaling on device performances. Especially, the role of degenerate conduction band (CB) valleys in monolayer HfS{sub 2} is comprehensively analyzed. Benchmarking monolayer HfS{sub 2} with phosphorene MOSFETs, we predict that the effect of channel orientation on device performances is much weaker in monolayer HfS{sub 2} than in phosphorene due to the degenerate CB valleys of monolayer HfS{sub 2}. Our simulations also reveal that at 10 nm channel length scale, phosphorene MOSFETs outperform monolayer HfS{sub 2} MOSFETs in terms of the on-state current. However, it is observed that monolayer HfS{sub 2} MOSFETs may offer comparable, but a little bit degraded, device performances as compared with phosphorene MOSFETs at 5 nm channel length.

  20. Effective dose estimation for pediatric upper gastrointestinal examinations using an anthropomorphic phantom set and metal oxide semiconductor field-effect transistor (MOSFET) technology.

    Science.gov (United States)

    Emigh, Brent; Gordon, Christopher L; Connolly, Bairbre L; Falkiner, Michelle; Thomas, Karen E

    2013-09-01

    There is a need for updated radiation dose estimates in pediatric fluoroscopy given the routine use of new dose-saving technologies and increased radiation safety awareness in pediatric imaging. To estimate effective doses for standardized pediatric upper gastrointestinal (UGI) examinations at our institute using direct dose measurement, as well as provide dose-area product (DAP) to effective dose conversion factors to be used for the estimation of UGI effective doses for boys and girls up to 10 years of age at other centers. Metal oxide semiconductor field-effect transistor (MOSFET) dosimeters were placed within four anthropomorphic phantoms representing children ≤10 years of age and exposed to mock UGI examinations using exposures much greater than used clinically to minimize measurement error. Measured effective dose was calculated using ICRP 103 weights and scaled to our institution's standardized clinical UGI (3.6-min fluoroscopy, four spot exposures and four examination beam projections) as determined from patient logs. Results were compared to Monte Carlo simulations and related to fluoroscope-displayed DAP. Measured effective doses for standardized pediatric UGI examinations in our institute ranged from 0.35 to 0.79 mSv in girls and were 3-8% lower for boys. Simulation-derived and measured effective doses were in agreement (percentage differences  0.18). DAP-to-effective dose conversion factors ranged from 6.5 ×10(-4) mSv per Gy-cm(2) to 4.3 × 10(-3) mSv per Gy-cm(2) for girls and were similarly lower for boys. Using modern fluoroscopy equipment, the effective dose associated with the UGI examination in children ≤10 years at our institute is MOSFETs, which were shown to agree with Monte Carlo simulated doses.

  1. An Overview of High-k Oxides on Hydrogenated-Diamond for Metal-Oxide-Semiconductor Capacitors and Field-Effect Transistors

    Directory of Open Access Journals (Sweden)

    Jiangwei Liu

    2018-06-01

    Full Text Available Thanks to its excellent intrinsic properties, diamond is promising for applications of high-power electronic devices, ultraviolet detectors, biosensors, high-temperature tolerant gas sensors, etc. Here, an overview of high-k oxides on hydrogenated-diamond (H-diamond for metal-oxide-semiconductor (MOS capacitors and MOS field-effect transistors (MOSFETs is demonstrated. Fabrication routines for the H-diamond MOS capacitors and MOSFETs, band configurations of oxide/H-diamond heterointerfaces, and electrical properties of the MOS and MOSFETs are summarized and discussed. High-k oxide insulators are deposited using atomic layer deposition (ALD and sputtering deposition (SD techniques. Electrical properties of the H-diamond MOS capacitors with high-k oxides of ALD-Al2O3, ALD-HfO2, ALD-HfO2/ALD-Al2O3 multilayer, SD-HfO2/ALD-HfO2 bilayer, SD-TiO2/ALD-Al2O3 bilayer, and ALD-TiO2/ALD-Al2O3 bilayer are discussed. Analyses for capacitance-voltage characteristics of them show that there are low fixed and trapped charge densities for the ALD-Al2O3/H-diamond and SD-HfO2/ALD-HfO2/H-diamond MOS capacitors. The k value of 27.2 for the ALD-TiO2/ALD-Al2O3 bilayer is larger than those of the other oxide insulators. Drain-source current versus voltage curves show distinct pitch-off and p-type channel characteristics for the ALD-Al2O3/H-diamond, SD-HfO2/ALD-HfO2/H-diamond, and ALD-TiO2/ALD-Al2O3/H-diamond MOSFETs. Understanding of fabrication routines and electrical properties for the high-k oxide/H-diamond MOS electronic devices is meaningful for the fabrication of high-performance H-diamond MOS capacitor and MOSFET gas sensors.

  2. Effective dose estimation for pediatric upper gastrointestinal examinations using an anthropomorphic phantom set and metal oxide semiconductor field-effect transistor (MOSFET) technology

    International Nuclear Information System (INIS)

    Emigh, Brent; Gordon, Christopher L.; Falkiner, Michelle; Thomas, Karen E.; Connolly, Bairbre L.

    2013-01-01

    There is a need for updated radiation dose estimates in pediatric fluoroscopy given the routine use of new dose-saving technologies and increased radiation safety awareness in pediatric imaging. To estimate effective doses for standardized pediatric upper gastrointestinal (UGI) examinations at our institute using direct dose measurement, as well as provide dose-area product (DAP) to effective dose conversion factors to be used for the estimation of UGI effective doses for boys and girls up to 10 years of age at other centers. Metal oxide semiconductor field-effect transistor (MOSFET) dosimeters were placed within four anthropomorphic phantoms representing children ≤10 years of age and exposed to mock UGI examinations using exposures much greater than used clinically to minimize measurement error. Measured effective dose was calculated using ICRP 103 weights and scaled to our institution's standardized clinical UGI (3.6-min fluoroscopy, four spot exposures and four examination beam projections) as determined from patient logs. Results were compared to Monte Carlo simulations and related to fluoroscope-displayed DAP. Measured effective doses for standardized pediatric UGI examinations in our institute ranged from 0.35 to 0.79 mSv in girls and were 3-8% lower for boys. Simulation-derived and measured effective doses were in agreement (percentage differences 0.18). DAP-to-effective dose conversion factors ranged from 6.5 x 10 -4 mSv per Gy-cm 2 to 4.3 x 10 -3 mSv per Gy-cm 2 for girls and were similarly lower for boys. Using modern fluoroscopy equipment, the effective dose associated with the UGI examination in children ≤10 years at our institute is < 1 mSv. Estimations of effective dose associated with pediatric UGI examinations can be made for children up to the age of 10 using the DAP-normalized conversion factors provided in this study. These estimates can be further refined to reflect individual hospital examination protocols through the use of direct organ

  3. Effective dose assessment in the maxillofacial region using thermoluminescent (TLD) and metal oxide semiconductor field-effect transistor (MOSFET) dosemeters: a comparative study.

    Science.gov (United States)

    Koivisto, J; Schulze, D; Wolff, J; Rottke, D

    2014-01-01

    The objective of this study was to compare the performance of metal oxide semiconductor field-effect transistor (MOSFET) technology dosemeters with thermoluminescent dosemeters (TLDs) (TLD 100; Thermo Fisher Scientific, Waltham, MA) in the maxillofacial area. Organ and effective dose measurements were performed using 40 TLD and 20 MOSFET dosemeters that were alternately placed in 20 different locations in 1 anthropomorphic RANDO(®) head phantom (the Phantom Laboratory, Salem, NY). The phantom was exposed to four different CBCT default maxillofacial protocols using small (4 × 5 cm) to full face (20 × 17 cm) fields of view (FOVs). The TLD effective doses ranged between 7.0 and 158.0 µSv and the MOSFET doses between 6.1 and 175.0 µSv. The MOSFET and TLD effective doses acquired using four different (FOV) protocols were as follows: face maxillofacial (FOV 20 × 17 cm) (MOSFET, 83.4 µSv; TLD, 87.6 µSv; -5%); teeth, upper jaw (FOV, 8.5 × 5.0 cm) (MOSFET, 6.1 µSv; TLD, 7.0 µSv; -14%); tooth, mandible and left molar (FOV, 4 × 5 cm) (MOSFET, 10.3 µSv; TLD, 12.3 µSv; -16%) and teeth, both jaws (FOV, 10 × 10 cm) (MOSFET, 175 µSv; TLD, 158 µSv; +11%). The largest variation in organ and effective dose was recorded in the small FOV protocols. Taking into account the uncertainties of both measurement methods and the results of the statistical analysis, the effective doses acquired using MOSFET dosemeters were found to be in good agreement with those obtained using TLD dosemeters. The MOSFET dosemeters constitute a feasible alternative for TLDs for the effective dose assessment of CBCT devices in the maxillofacial region.

  4. Technique for producing highly planar Si/SiO0.64Ge0.36/Si metal-oxide-semiconductor field effect transistor channels

    Science.gov (United States)

    Grasby, T. J.; Parry, C. P.; Phillips, P. J.; McGregor, B. M.; Morris, , R. J. H.; Braithwaite, G.; Whall, T. E.; Parker, E. H. C.; Hammond, R.; Knights, A. P.; Coleman, P. G.

    1999-03-01

    Si/Si0.64Ge0.36/Si heterostructures have been grown at low temperature (450 °C) to avoid the strain-induced roughening observed for growth temperatures of 550 °C and above. The electrical properties of these structures are poor, and thought to be associated with grown-in point defects as indicated in positron annihilation spectroscopy. However, after an in situ annealing procedure (800 °C for 30 min) the electrical properties dramatically improve, giving an optimum 4 K mobility of 2500 cm2 V-1 s-1 for a sheet density of 6.2×1011 cm-2. The low temperature growth yields highly planar interfaces, which are maintained after anneal as evidenced from transmission electron microscopy. This and secondary ion mass spectroscopy measurements demonstrate that the metastably strained alloy layer can endure the in situ anneal procedure necessary for enhanced electrical properties. Further studies have shown that the layers can also withstand a 120 min thermal oxidation at 800 °C, commensurate with metal-oxide-semiconductor device fabrication.

  5. Origin of the performances degradation of two-dimensional-based metal-oxide-semiconductor field effect transistors in the sub-10 nm regime: A first-principles study

    International Nuclear Information System (INIS)

    Lu, Anh Khoa Augustin; Pourtois, Geoffrey; Agarwal, Tarun; Afzalian, Aryan; Radu, Iuliana P.; Houssa, Michel

    2016-01-01

    The impact of the scaling of the channel length on the performances of metal-oxide-semiconductor field effect transistors, based on two-dimensional (2D) channel materials, is theoretically investigated, using density functional theory combined with the non-equilibrium Green's function method. It is found that the scaling of the channel length below 10 nm leads to strong device performance degradations. Our simulations reveal that this degradation is essentially due to the tunneling current flowing between the source and the drain in these aggressively scaled devices. It is shown that this electron tunneling process is modulated by the effective mass of the 2D channel material, and sets the limit of the scaling in future transistor designs

  6. Origin of the performances degradation of two-dimensional-based metal-oxide-semiconductor field effect transistors in the sub-10 nm regime: A first-principles study

    Energy Technology Data Exchange (ETDEWEB)

    Lu, Anh Khoa Augustin [Semiconductor Physics Laboratory, Department of Physics and Astronomy, University of Leuven, Celestijnenlaan 200 D, B-3001 Leuven (Belgium); IMEC, 75 Kapeldreef, B-3001 Leuven (Belgium); Pourtois, Geoffrey [IMEC, 75 Kapeldreef, B-3001 Leuven (Belgium); Department of Chemistry, Plasmant Research Group, University of Antwerp, B-2610 Wilrijk-Antwerp (Belgium); Agarwal, Tarun [IMEC, 75 Kapeldreef, B-3001 Leuven (Belgium); Department of Electrical Engineering, University of Leuven, Kasteelpark Arenberg 10, B-3001 Leuven (Belgium); Afzalian, Aryan [TSMC, Kapeldreef 75, B-3001 Leuven (Belgium); Radu, Iuliana P. [IMEC, 75 Kapeldreef, B-3001 Leuven (Belgium); Houssa, Michel [Semiconductor Physics Laboratory, Department of Physics and Astronomy, University of Leuven, Celestijnenlaan 200 D, B-3001 Leuven (Belgium)

    2016-01-25

    The impact of the scaling of the channel length on the performances of metal-oxide-semiconductor field effect transistors, based on two-dimensional (2D) channel materials, is theoretically investigated, using density functional theory combined with the non-equilibrium Green's function method. It is found that the scaling of the channel length below 10 nm leads to strong device performance degradations. Our simulations reveal that this degradation is essentially due to the tunneling current flowing between the source and the drain in these aggressively scaled devices. It is shown that this electron tunneling process is modulated by the effective mass of the 2D channel material, and sets the limit of the scaling in future transistor designs.

  7. Properties and growth peculiarities of Si{sub 0.30}Ge{sub 0.70} stressor integrated in 14 nm fin-based p-type metal-oxide-semiconductor field-effect transistors

    Energy Technology Data Exchange (ETDEWEB)

    Hikavyy, A., E-mail: Andriy.Hikavyy@imec.be; Rosseel, E.; Kubicek, S.; Mannaert, G.; Favia, P.; Bender, H.; Loo, R.; Horiguchi, N.

    2016-03-01

    Integration of Si{sub 0.30}Ge{sub 0.70} in the Source/Drain (S/D) areas of metal oxide semiconductor transistors built according to 14 nm technological node rules has been shown. SiGe properties and growth peculiarities are presented and elaborated. In order to preserve the fin structures during a pre-epitaxy surface preparation, the H{sub 2} bake pressure had to be increased to 19,998 Pa at 800 °C. Influence of this bake on the Si recess in the S/D areas is presented. Excellent quality of both the raised and the embedded Si{sub 0.30}Ge{sub 0.70} was demonstrated by transmission electron microscopy inspections. Energy-dispersive X-ray spectroscopy measurement showed two stages of SiGe growth for the embedded case: first with a lower Ge content at the beginning of the deposition until the (111) facets are formed, and second with a higher Ge content which is governed by the growth on (111) planes. Nano-beam diffraction analysis showed that SiGe grown in the S/D areas of p-type metal-oxide-semiconductor field-effect transistor is fully elastically relaxed in the direction across the fin and partially strained along the fin. Finally, a strain accumulation effect in the chain of transistors has been observed. - Highlights: • Si{sub 0.30}Ge{sub 0.70} stressor has been implemented in the 14 nm technology node CMOS flow. • Embedded and raised variants have been investigated. • High Si{sub 0.30}Ge{sub 0.70} quality was confirmed. • Si{sub 0.30}Ge{sub 0.70} layer is elastically relaxed across the fin direction. • Partial stress presence and stress accumulation effect were observed.

  8. Large current modulation and tunneling magnetoresistance change by a side-gate electric field in a GaMnAs-based vertical spin metal-oxide-semiconductor field-effect transistor.

    Science.gov (United States)

    Kanaki, Toshiki; Yamasaki, Hiroki; Koyama, Tomohiro; Chiba, Daichi; Ohya, Shinobu; Tanaka, Masaaki

    2018-05-08

    A vertical spin metal-oxide-semiconductor field-effect transistor (spin MOSFET) is a promising low-power device for the post scaling era. Here, using a ferromagnetic-semiconductor GaMnAs-based vertical spin MOSFET with a GaAs channel layer, we demonstrate a large drain-source current I DS modulation by a gate-source voltage V GS with a modulation ratio up to 130%, which is the largest value that has ever been reported for vertical spin field-effect transistors thus far. We find that the electric field effect on indirect tunneling via defect states in the GaAs channel layer is responsible for the large I DS modulation. This device shows a tunneling magnetoresistance (TMR) ratio up to ~7%, which is larger than that of the planar-type spin MOSFETs, indicating that I DS can be controlled by the magnetization configuration. Furthermore, we find that the TMR ratio can be modulated by V GS . This result mainly originates from the electric field modulation of the magnetic anisotropy of the GaMnAs ferromagnetic electrodes as well as the potential modulation of the nonmagnetic semiconductor GaAs channel layer. Our findings provide important progress towards high-performance vertical spin MOSFETs.

  9. The impact of non-uniform channel layer growth on device characteristics in state of the Art Si/SiGe/Si p-metal oxide semiconductor field effect transistors

    International Nuclear Information System (INIS)

    Chang, A.C.K.; Ross, I.M.; Norris, D.J.; Cullis, A.G.; Tang, Y.T.; Cerrina, C.; Evans, A.G.R.

    2006-01-01

    In this study we have highlighted the effect of non-uniform channel layer growth by the direct correlation of the microstructure and electrical characteristics in state-of-the-art pseudomorphic Si/SiGe p-channel metal oxide semiconductor field effect transistor devices fabricated on Si. Two nominally identical sets of devices from adjacent locations of the same wafer were found to have radically different distributions in gate threshold voltages. Due to the close proximity and narrow gate length of the devices, focused ion beam milling was used to prepare a number of thin cross-sections from each of the two regions for subsequent analysis using transmission electron microscopy. It was found that devices from the region giving a very narrow range of gate threshold voltages exhibited a uniform microstructure in general agreement with the intended growth parameters. However, in the second region, which showed a large spread in the gate threshold voltages, profound anomalies in the microstructure were observed. These anomalies consisted of fluctuations in the quality and thickness of the SiGe strained layers. The non-uniform growth of the strained SiGe layer clearly accounted for the poorly controlled threshold voltages of these devices. The results emphasize the importance of good layer growth uniformity to ensure optimum device yield

  10. Assessment of radiation exposure in dental cone-beam computerized tomography with the use of metal-oxide semiconductor field-effect transistor (MOSFET) dosimeters and Monte Carlo simulations.

    Science.gov (United States)

    Koivisto, J; Kiljunen, T; Tapiovaara, M; Wolff, J; Kortesniemi, M

    2012-09-01

    The aims of this study were to assess the organ and effective dose (International Commission on Radiological Protection (ICRP) 103) resulting from dental cone-beam computerized tomography (CBCT) imaging using a novel metal-oxide semiconductor field-effect transistor (MOSFET) dosimeter device, and to assess the reliability of the MOSFET measurements by comparing the results with Monte Carlo PCXMC simulations. Organ dose measurements were performed using 20 MOSFET dosimeters that were embedded in the 8 most radiosensitive organs in the maxillofacial and neck area. The dose-area product (DAP) values attained from CBCT scans were used for PCXMC simulations. The acquired MOSFET doses were then compared with the Monte Carlo simulations. The effective dose measurements using MOSFET dosimeters yielded, using 0.5-cm steps, a value of 153 μSv and the PCXMC simulations resulted in a value of 136 μSv. The MOSFET dosimeters placed in a head phantom gave results similar to Monte Carlo simulations. Minor vertical changes in the positioning of the phantom had a substantial affect on the overall effective dose. Therefore, the MOSFET dosimeters constitute a feasible method for dose assessment of CBCT units in the maxillofacial region. Copyright © 2012 Elsevier Inc. All rights reserved.

  11. Radiation tolerance of Si{sub 1−y}C{sub y} source/drain n-type metal oxide semiconductor field effect transistors with different carbon concentrations

    Energy Technology Data Exchange (ETDEWEB)

    Nakashima, Toshiyuki, E-mail: nakashima_t@cdk.co.jp [Interdisciplinary Graduate School of Agriculture and Engineering, University of Miyazaki, 1-1 Gakuen Kibanadai-nishi, Miyazaki (Japan); Chuo Denshi Kogyo Co., Ltd., 3400 Kohoyama, Matsubase, Uki, Kumamoto (Japan); Asai, Yuki; Hori, Masato; Yoneoka, Masashi; Tsunoda, Isao; Takakura, Kenichiro [Kumamoto National College of Technology, 2659-2 Suya, Koshi, Kumamoto 861-1102 (Japan); Gonzalez, Mireia Bargallo [Institut de Microelectronica de Barcelona (Centre Nacional de Microelectronica — Consejo Superior de Investigaciones Cientificas) Campus UAB, 08193 Bellaterra (Spain); Simoen, Eddy [imec, Kapeldreef 75, B-3001 Leuven (Belgium); Claeys, Cor [imec, Kapeldreef 75, B-3001 Leuven (Belgium); Department of Electrical Engineering, KU Leuven, Kasteelpark Arenberg 10, B-3001 Leuven (Belgium); Yoshino, Kenji [Interdisciplinary Graduate School of Agriculture and Engineering, University of Miyazaki, 1-1 Gakuen Kibanadai-nishi, Miyazaki (Japan)

    2014-04-30

    The 2-MeV electron radiation damage of silicon–carbon source/drain (S/D) n-type metal oxide semiconductor field effect transistors with different carbon (C) concentrations is studied. Before irradiation, an enhancement of the electron mobility with C concentration of the S/D stressors is clearly observed. On the other hand, after electron irradiation, both the threshold voltage shift and the maximum electron mobility degradation are independent on the C concentration for all electron fluences studied. These results indicate that the strain induced electron mobility enhancement due to the C doping is retained after irradiation in the studied devices. - Highlights: • We have investigated the electron irradiation effect of the Si{sub 1−y}C{sub y} S/D n-MOSFETs. • The threshold voltage variations by irradiation are independent on the C doping. • The electron-mobility decreased for all C concentrations by electron irradiation. • The strain induced mobility enhancement effect is retained after irradiation.

  12. Lg = 100 nm In0.7Ga0.3As quantum well metal-oxide semiconductor field-effect transistors with atomic layer deposited beryllium oxide as interfacial layer

    International Nuclear Information System (INIS)

    Koh, D.; Kwon, H. M.; Kim, T.-W.; Veksler, D.; Gilmer, D.; Kirsch, P. D.; Kim, D.-H.; Hudnall, Todd W.; Bielawski, Christopher W.; Maszara, W.; Banerjee, S. K.

    2014-01-01

    In this study, we have fabricated nanometer-scale channel length quantum-well (QW) metal-oxide-semiconductor field effect transistors (MOSFETs) incorporating beryllium oxide (BeO) as an interfacial layer. BeO has high thermal stability, excellent electrical insulating characteristics, and a large band-gap, which make it an attractive candidate for use as a gate dielectric in making MOSFETs. BeO can also act as a good diffusion barrier to oxygen owing to its small atomic bonding length. In this work, we have fabricated In 0.53 Ga 0.47 As MOS capacitors with BeO and Al 2 O 3 and compared their electrical characteristics. As interface passivation layer, BeO/HfO 2 bilayer gate stack presented effective oxide thickness less 1 nm. Furthermore, we have demonstrated In 0.7 Ga 0.3 As QW MOSFETs with a BeO/HfO 2 dielectric, showing a sub-threshold slope of 100 mV/dec, and a transconductance (g m,max ) of 1.1 mS/μm, while displaying low values of gate leakage current. These results highlight the potential of atomic layer deposited BeO for use as a gate dielectric or interface passivation layer for III–V MOSFETs at the 7 nm technology node and/or beyond

  13. Comparison of junctionless and inversion-mode p-type metal-oxide-semiconductor field-effect transistors in presence of hole-phonon interactions

    Energy Technology Data Exchange (ETDEWEB)

    Dib, E., E-mail: elias.dib@for.unipi.it [Dipartimento di Ingegneria dell' Informazione, Università di Pisa, 56122 Pisa (Italy); Carrillo-Nuñez, H. [Integrated Systems Laboratory ETH Zürich, Gloriastrasse 35, 8092 Zürich (Switzerland); Cavassilas, N.; Bescond, M. [IM2NP, UMR CNRS 6242, Bât. IRPHE, Technopôle de Château-Gombert, 13384 Marseille Cedex 13 (France)

    2016-01-28

    Junctionless transistors are being considered as one of the alternatives to conventional metal-oxide field-effect transistors. In this work, it is then presented a simulation study of silicon double-gated p-type junctionless transistors compared with its inversion-mode counterpart. The quantum transport problem is solved within the non-equilibrium Green's function formalism, whereas hole-phonon interactions are tackled by means of the self-consistent Born approximation. Our findings show that junctionless transistors should perform as good as a conventional transistor only for ultra-thin channels, with the disadvantage of requiring higher supply voltages in thicker channel configurations.

  14. Comparison of junctionless and inversion-mode p-type metal-oxide-semiconductor field-effect transistors in presence of hole-phonon interactions

    International Nuclear Information System (INIS)

    Dib, E.; Carrillo-Nuñez, H.; Cavassilas, N.; Bescond, M.

    2016-01-01

    Junctionless transistors are being considered as one of the alternatives to conventional metal-oxide field-effect transistors. In this work, it is then presented a simulation study of silicon double-gated p-type junctionless transistors compared with its inversion-mode counterpart. The quantum transport problem is solved within the non-equilibrium Green's function formalism, whereas hole-phonon interactions are tackled by means of the self-consistent Born approximation. Our findings show that junctionless transistors should perform as good as a conventional transistor only for ultra-thin channels, with the disadvantage of requiring higher supply voltages in thicker channel configurations

  15. Plasma-Induced Damage on the Reliability of Hf-Based High-k/Dual Metal-Gates Complementary Metal Oxide Semiconductor Technology

    International Nuclear Information System (INIS)

    Weng, W.T.; Lin, H.C.; Huang, T.Y.; Lee, Y.J.; Lin, H.C.

    2009-01-01

    This study examines the effects of plasma-induced damage (PID) on Hf-based high-k/dual metal-gates transistors processed with advanced complementary metal-oxide-semiconductor (CMOS) technology. In addition to the gate dielectric degradations, this study demonstrates that thinning the gate dielectric reduces the impact of damage on transistor reliability including the positive bias temperature instability (PBTI) of n-channel metal-oxide-semiconductor field-effect transistors (NMOSFETs) and the negative bias temperature instability (NBTI) of p-channel MOSFETs. This study shows that high-k/metal-gate transistors are more robust against PID than conventional SiO 2 /poly-gate transistors with similar physical thickness. Finally this study proposes a model that successfully explains the observed experimental trends in the presence of PID for high-k/metal-gate CMOS technology.

  16. Ge{sub 0.83}Sn{sub 0.17} p-channel metal-oxide-semiconductor field-effect transistors: Impact of sulfur passivation on gate stack quality

    Energy Technology Data Exchange (ETDEWEB)

    Lei, Dian; Wang, Wei; Gong, Xiao, E-mail: elegong@nus.edu.sg, E-mail: yeo@ieee.org; Liang, Gengchiau; Yeo, Yee-Chia, E-mail: elegong@nus.edu.sg, E-mail: yeo@ieee.org [Department of Electrical and Computer Engineering, National University of Singapore, Singapore 117576 (Singapore); Zhang, Zheng; Pan, Jisheng [Institute of Material Research and Engineering, A*STAR (Agency for Science, Technology and Research), 3 Research Link, Singapore 117602 (Singapore); Tok, Eng-Soon [Department of Physics, National University of Singapore, Singapore 117551 (Singapore)

    2016-01-14

    The effect of room temperature sulfur passivation of the surface of Ge{sub 0.83}Sn{sub 0.17} prior to high-k dielectric (HfO{sub 2}) deposition is investigated. X-ray photoelectron spectroscopy (XPS) was used to examine the chemical bonding at the interface of HfO{sub 2} and Ge{sub 0.83}Sn{sub 0.17}. Sulfur passivation is found to be effective in suppressing the formation of both Ge oxides and Sn oxides. A comparison of XPS results for sulfur-passivated and non-passivated Ge{sub 0.83}Sn{sub 0.17} samples shows that sulfur passivation of the GeSn surface could also suppress the surface segregation of Sn atoms. In addition, sulfur passivation reduces the interface trap density D{sub it} at the high-k dielectric/Ge{sub 0.83}Sn{sub 0.17} interface from the valence band edge to the midgap of Ge{sub 0.83}Sn{sub 0.17}, as compared with a non-passivated control. The impact of the improved D{sub it} is demonstrated in Ge{sub 0.83}Sn{sub 0.17} p-channel metal-oxide-semiconductor field-effect transistors (p-MOSFETs). Ge{sub 0.83}Sn{sub 0.17} p-MOSFETs with sulfur passivation show improved subthreshold swing S, intrinsic transconductance G{sub m,int}, and effective hole mobility μ{sub eff} as compared with the non-passivated control. At a high inversion carrier density N{sub inv} of 1 × 10{sup 13 }cm{sup −2}, sulfur passivation increases μ{sub eff} by 25% in Ge{sub 0.83}Sn{sub 0.17} p-MOSFETs.

  17. Reduction in the interface-states density of metal-oxide-semiconductor field-effect transistors fabricated on high-index Si (114) surfaces by using an external magnetic field

    International Nuclear Information System (INIS)

    Molina, J.; De La Hidalga, J.; Gutierrez, E.

    2014-01-01

    After fabrication of Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) devices on high-index silicon (114) surfaces, their threshold voltage (Vth) and interface-states density (Dit) characteristics were measured under the influence of an externally applied magnetic field of B = 6 μT at room temperature. The electron flow of the MOSFET's channel presents high anisotropy on Si (114), and this effect is enhanced by using an external magnetic field B, applied parallel to the Si (114) surface but perpendicular to the electron flow direction. This special configuration results in the channel electrons experiencing a Lorentzian force which pushes the electrons closer to the Si (114)-SiO 2 interface and therefore to the special morphology of the Si (114) surface. Interestingly, Dit evaluation of n-type MOSFETs fabricated on Si (114) surfaces shows that the Si (114)-SiO 2 interface is of high quality so that Dit as low as ∼10 10  cm −2 ·eV −1 are obtained for MOSFETs with channels aligned at specific orientations. Additionally, using both a small positive Vds ≤ 100 mV and B = 6 μT, the former Dit is reduced by 35% in MOSFETs whose channels are aligned parallel to row-like nanostructures formed atop Si (114) surfaces (channels having a 90° rotation), whereas Dit is increased by 25% in MOSFETs whose channels are aligned perpendicular to these nanostructures (channels having a 0° rotation). From these results, the special morphology of a high-index Si (114) plane having nanochannels on its surface opens the possibility to reduce the electron-trapping characteristics of MOSFET devices having deep-submicron features and operating at very high frequencies

  18. Ultralow power complementary inverter circuits using axially doped p- and n-channel Si nanowire field effect transistors.

    Science.gov (United States)

    Van, Ngoc Huynh; Lee, Jae-Hyun; Whang, Dongmok; Kang, Dae Joon

    2016-06-09

    We have successfully synthesized axially doped p- and n-type regions on a single Si nanowire (NW). Diodes and complementary metal-oxide-semiconductor (CMOS) inverter devices using single axial p- and n-channel Si NW field-effect transistors (FETs) were fabricated. We show that the threshold voltages of both p- and n-channel Si NW FETs can be lowered to nearly zero by effectively controlling the doping concentration. Because of the high performance of the p- and n-type Si NW channel FETs, especially with regard to the low threshold voltage, the fabricated NW CMOS inverters have a low operating voltage (<3 V) while maintaining a high voltage gain (∼6) and ultralow static power dissipation (≤0.3 pW) at an input voltage of ±3 V. This result offers a viable way for the fabrication of a high-performance high-density logic circuit using a low-temperature fabrication process, which makes it suitable for flexible electronics.

  19. SOI N-Channel Field Effect Transistors, CHT-NMOS80, for Extreme Temperatures

    Science.gov (United States)

    Patterson, Richard L.; Hammoud, Almad

    2009-01-01

    high temperature N-channel MOSFET (metal-oxide semiconductor field-effect transistor) device that was manufactured by CISSOID. This high voltage, medium-power transistor is fabricated using SOI processes and is designed for extreme wide temperature applications such as geothermal well logging, aerospace and avionics, and automotive industry. It has a high DC current capability and is specified for operation in the temperature range of -55 C to +225 C

  20. Nanoscale Metal Oxide Semiconductors for Gas Sensing

    Science.gov (United States)

    Hunter, Gary W.; Evans, Laura; Xu, Jennifer C.; VanderWal, Randy L.; Berger, Gordon M.; Kulis, Michael J.

    2011-01-01

    A report describes the fabrication and testing of nanoscale metal oxide semiconductors (MOSs) for gas and chemical sensing. This document examines the relationship between processing approaches and resulting sensor behavior. This is a core question related to a range of applications of nanotechnology and a number of different synthesis methods are discussed: thermal evaporation- condensation (TEC), controlled oxidation, and electrospinning. Advantages and limitations of each technique are listed, providing a processing overview to developers of nanotechnology- based systems. The results of a significant amount of testing and comparison are also described. A comparison is made between SnO2, ZnO, and TiO2 single-crystal nanowires and SnO2 polycrystalline nanofibers for gas sensing. The TECsynthesized single-crystal nanowires offer uniform crystal surfaces, resistance to sintering, and their synthesis may be done apart from the substrate. The TECproduced nanowire response is very low, even at the operating temperature of 200 C. In contrast, the electrospun polycrystalline nanofiber response is high, suggesting that junction potentials are superior to a continuous surface depletion layer as a transduction mechanism for chemisorption. Using a catalyst deposited upon the surface in the form of nanoparticles yields dramatic gains in sensitivity for both nanostructured, one-dimensional forms. For the nanowire materials, the response magnitude and response rate uniformly increase with increasing operating temperature. Such changes are interpreted in terms of accelerated surface diffusional processes, yielding greater access to chemisorbed oxygen species and faster dissociative chemisorption, respectively. Regardless of operating temperature, sensitivity of the nanofibers is a factor of 10 to 100 greater than that of nanowires with the same catalyst for the same test condition. In summary, nanostructure appears critical to governing the reactivity, as measured by electrical

  1. Metal/oxide/semiconductor interface investigated by monoenergetic positrons

    Science.gov (United States)

    Uedono, A.; Tanigawa, S.; Ohji, Y.

    1988-10-01

    Variable-energy positron-beam studies have been carried out for the first time on a metal/oxide/semiconductor (MOS) structure of polycrystalline Si/SiO 2/Si-substrate. We were successful in collecting injected positrons at the SiO 2/Si interface by the application of an electric field between the MOS electrodes.

  2. Positron studies of metal-oxide-semiconductor structures

    Science.gov (United States)

    Au, H. L.; Asoka-Kumar, P.; Nielsen, B.; Lynn, K. G.

    1993-03-01

    Positron annihilation spectroscopy provides a new probe to study the properties of interface traps in metal-oxide semiconductors (MOS). Using positrons, we have examined the behavior of the interface traps as a function of gate bias. We propose a simple model to explain the positron annihilation spectra from the interface region of a MOS capacitor.

  3. Metal oxide semiconductor thin-film transistors for flexible electronics

    Energy Technology Data Exchange (ETDEWEB)

    Petti, Luisa; Vogt, Christian; Büthe, Lars; Cantarella, Giuseppe; Tröster, Gerhard [Electronics Laboratory, Swiss Federal Institute of Technology, Zürich (Switzerland); Münzenrieder, Niko [Electronics Laboratory, Swiss Federal Institute of Technology, Zürich (Switzerland); Sensor Technology Research Centre, University of Sussex, Falmer (United Kingdom); Faber, Hendrik; Bottacchi, Francesca; Anthopoulos, Thomas D. [Department of Physics and Centre for Plastic Electronics, Imperial College London, London (United Kingdom)

    2016-06-15

    The field of flexible electronics has rapidly expanded over the last decades, pioneering novel applications, such as wearable and textile integrated devices, seamless and embedded patch-like systems, soft electronic skins, as well as imperceptible and transient implants. The possibility to revolutionize our daily life with such disruptive appliances has fueled the quest for electronic devices which yield good electrical and mechanical performance and are at the same time light-weight, transparent, conformable, stretchable, and even biodegradable. Flexible metal oxide semiconductor thin-film transistors (TFTs) can fulfill all these requirements and are therefore considered the most promising technology for tomorrow's electronics. This review reflects the establishment of flexible metal oxide semiconductor TFTs, from the development of single devices, large-area circuits, up to entirely integrated systems. First, an introduction on metal oxide semiconductor TFTs is given, where the history of the field is revisited, the TFT configurations and operating principles are presented, and the main issues and technological challenges faced in the area are analyzed. Then, the recent advances achieved for flexible n-type metal oxide semiconductor TFTs manufactured by physical vapor deposition methods and solution-processing techniques are summarized. In particular, the ability of flexible metal oxide semiconductor TFTs to combine low temperature fabrication, high carrier mobility, large frequency operation, extreme mechanical bendability, together with transparency, conformability, stretchability, and water dissolubility is shown. Afterward, a detailed analysis of the most promising metal oxide semiconducting materials developed to realize the state-of-the-art flexible p-type TFTs is given. Next, the recent progresses obtained for flexible metal oxide semiconductor-based electronic circuits, realized with both unipolar and complementary technology, are reported. In

  4. Positive and negative gain exceeding unity magnitude in silicon quantum well metal-oxide-semiconductor transistors

    Science.gov (United States)

    Hu, Gangyi; Wijesinghe, Udumbara; Naquin, Clint; Maggio, Ken; Edwards, H. L.; Lee, Mark

    2017-10-01

    Intrinsic gain (AV) measurements on Si quantum well (QW) n-channel metal-oxide-semiconductor (NMOS) transistors show that these devices can have |AV| > 1 in quantum transport negative transconductance (NTC) operation at room temperature. QW NMOS devices were fabricated using an industrial 45 nm technology node process incorporating ion implanted potential barriers to define a lateral QW in the conduction channel under the gate. While NTC at room temperature arising from transport through gate-controlled QW bound states has been previously established, it was unknown whether the quantum NTC mechanism could support gain magnitude exceeding unity. Bias conditions were found giving both positive and negative AV with |AV| > 1 at room temperature. This result means that QW NMOS devices could be useful in amplifier and oscillator applications.

  5. Bisacenaphthopyrazinoquinoxaline derivatives: Synthesis, physical properties and applications as semiconductors for n-channel field effect transistors

    KAUST Repository

    Tong, Chenhua

    2013-01-01

    Several bisacenaphthopyrazinoquinoxaline (BAPQ) based derivatives 1-3 were synthesized by condensation between the acenaphthenequinones and 1,2,4,5-tetraaminobenzene tetrahydrochloride. Their optical, electrochemical and self-assembling properties are tuned by different substituents. Among them, compound 3 possesses a homogeneously distributed low-lying LUMO due to the peripheral substitution with four cyano groups. The corresponding n-channel field effect transistors showed a field effect electron mobility of 5 × 10-3 cm2 V-1 s-1. © 2013 The Royal Society of Chemistry.

  6. AlGaN channel field effect transistors with graded heterostructure ohmic contacts

    Science.gov (United States)

    Bajaj, Sanyam; Akyol, Fatih; Krishnamoorthy, Sriram; Zhang, Yuewei; Rajan, Siddharth

    2016-09-01

    We report on ultra-wide bandgap (UWBG) Al0.75Ga0.25N channel metal-insulator-semiconductor field-effect transistors (MISFETs) with heterostructure engineered low-resistance ohmic contacts. The low intrinsic electron affinity of AlN (0.6 eV) leads to large Schottky barriers at the metal-AlGaN interface, resulting in highly resistive ohmic contacts. In this work, we use a reverse compositional graded n++ AlGaN contact layer to achieve upward electron affinity grading, leading to a low specific contact resistance (ρsp) of 1.9 × 10-6 Ω cm2 to n-Al0.75Ga0.25N channels (bandgap ˜5.3 eV) with non-alloyed contacts. We also demonstrate UWBG Al0.75Ga0.25N channel MISFET device operation employing the compositional graded n++ ohmic contact layer and 20 nm atomic layer deposited Al2O3 as the gate-dielectric.

  7. Silicon carbide: A unique platform for metal-oxide-semiconductor physics

    Energy Technology Data Exchange (ETDEWEB)

    Liu, Gang [Institute for Advanced Materials, Devices and Nanotechnology, Rutgers University, Piscataway, New Jersey 08854 (United States); Tuttle, Blair R. [Department of Physics and Astronomy, Vanderbilt University, Nashville, Tennessee 37235 (United States); Dhar, Sarit [Department of Physics, Auburn University, Auburn, Alabama 36849 (United States)

    2015-06-15

    A sustainable energy future requires power electronics that can enable significantly higher efficiencies in the generation, distribution, and usage of electrical energy. Silicon carbide (4H-SiC) is one of the most technologically advanced wide bandgap semiconductor that can outperform conventional silicon in terms of power handling, maximum operating temperature, and power conversion efficiency in power modules. While SiC Schottky diode is a mature technology, SiC power Metal Oxide Semiconductor Field Effect Transistors are relatively novel and there is large room for performance improvement. Specifically, major initiatives are under way to improve the inversion channel mobility and gate oxide stability in order to further reduce the on-resistance and enhance the gate reliability. Both problems relate to the defects near the SiO{sub 2}/SiC interface, which have been the focus of intensive studies for more than a decade. Here we review research on the SiC MOS physics and technology, including its brief history, the state-of-art, and the latest progress in this field. We focus on the two main scientific problems, namely, low channel mobility and bias temperature instability. The possible mechanisms behind these issues are discussed at the device physics level as well as the atomic scale, with the support of published physical analysis and theoretical studies results. Some of the most exciting recent progress in interface engineering for improving the channel mobility and fundamental understanding of channel transport is reviewed.

  8. Vertically integrated, three-dimensional nanowire complementary metal-oxide-semiconductor circuits.

    Science.gov (United States)

    Nam, SungWoo; Jiang, Xiaocheng; Xiong, Qihua; Ham, Donhee; Lieber, Charles M

    2009-12-15

    Three-dimensional (3D), multi-transistor-layer, integrated circuits represent an important technological pursuit promising advantages in integration density, operation speed, and power consumption compared with 2D circuits. We report fully functional, 3D integrated complementary metal-oxide-semiconductor (CMOS) circuits based on separate interconnected layers of high-mobility n-type indium arsenide (n-InAs) and p-type germanium/silicon core/shell (p-Ge/Si) nanowire (NW) field-effect transistors (FETs). The DC voltage output (V(out)) versus input (V(in)) response of vertically interconnected CMOS inverters showed sharp switching at close to the ideal value of one-half the supply voltage and, moreover, exhibited substantial DC gain of approximately 45. The gain and the rail-to-rail output switching are consistent with the large noise margin and minimal static power consumption of CMOS. Vertically interconnected, three-stage CMOS ring oscillators were also fabricated by using layer-1 InAs NW n-FETs and layer-2 Ge/Si NW p-FETs. Significantly, measurements of these circuits demonstrated stable, self-sustained oscillations with a maximum frequency of 108 MHz, which represents the highest-frequency integrated circuit based on chemically synthesized nanoscale materials. These results highlight the flexibility of bottom-up assembly of distinct nanoscale materials and suggest substantial promise for 3D integrated circuits.

  9. Analysis of the effect of interface state charges on threshold voltage and transconductance of 6H-SiC N-channel MOSFET

    International Nuclear Information System (INIS)

    Tang Xiaoyan; Zhang Yimen; Zhang Yuming

    2002-01-01

    The effect of interface state charges on the threshold voltage and transconductance of 6H-SiC N-channel metal-oxide semiconductor field-effect transistor (MOSFET) is analyzed based on the non-uniformly distributed interface state density in the band gap and incomplete impurity ionization in silicon carbide. The results show that the nonuniform distribution of interface state density cause not only the increment of the threshold voltage but also the degradation of the transconductance of MOSFET so that it is one of the important factors to influence the characteristics of SiC MOSFET

  10. Laser Doppler perfusion imaging with a complimentary metal oxide semiconductor image sensor

    NARCIS (Netherlands)

    Serov, Alexander; Steenbergen, Wiendelt; de Mul, F.F.M.

    2002-01-01

    We utilized a complimentary metal oxide semiconductor video camera for fast f low imaging with the laser Doppler technique. A single sensor is used for both observation of the area of interest and measurements of the interference signal caused by dynamic light scattering from moving particles inside

  11. Mechanical anomaly impact on metal-oxide-semiconductor capacitors on flexible silicon fabric

    KAUST Repository

    Ghoneim, Mohamed T.; Kutbee, Arwa T.; Ghodsi Nasseri, Seyed Faizelldin; Bersuker, G.; Hussain, Muhammad Mustafa

    2014-01-01

    We report the impact of mechanical anomaly on high-κ/metal-oxide-semiconductor capacitors built on flexible silicon (100) fabric. The mechanical tests include studying the effect of bending radius up to 5 mm minimum bending radius with respect

  12. Cyanated diazatetracene diimides with ultrahigh electron affinity for n-channel field effect transistors

    KAUST Repository

    Ye, Qun

    2013-03-15

    Several diazatetracene diimides with high electron affinity (up to 4.66 eV!) were prepared and well characterized. The LUMO energy level of these electron-deficient molecules was found to be closely related to their material stability. Compound 7 with ultrahigh electron affinity suffered from reduction and hydrolysis in the presence of silica gel or water. The stable compounds 3 and 6 showed n-channel FET behavior with an average electron mobility of 0.002 and 0.005 cm2 V-1 s-1, respectively, using a solution processing method. © 2013 American Chemical Society.

  13. Low-power bacteriorhodopsin-silicon n-channel metal-oxide field-effect transistor photoreceiver.

    Science.gov (United States)

    Shin, Jonghyun; Bhattacharya, Pallab; Yuan, Hao-Chih; Ma, Zhenqiang; Váró, György

    2007-03-01

    A bacteriorhodopsin (bR)-silicon n-channel metal-oxide field-effect transistor (NMOSFET) monolithically integrated photoreceiver is demonstrated. The bR film is selectively formed on an external gate electrode of the transistor by electrophoretic deposition. A modified biasing circuit is incorporated, which helps to match the resistance of the bR film to the input impedance of the NMOSFET and to shift the operating point of the transistor to coincide with the maximum gain. The photoreceiver exhibits a responsivity of 4.7 mA/W.

  14. Mechanical anomaly impact on metal-oxide-semiconductor capacitors on flexible silicon fabric

    KAUST Repository

    Ghoneim, Mohamed T.

    2014-06-09

    We report the impact of mechanical anomaly on high-κ/metal-oxide-semiconductor capacitors built on flexible silicon (100) fabric. The mechanical tests include studying the effect of bending radius up to 5 mm minimum bending radius with respect to breakdown voltage and leakage current of the devices. We also report the effect of continuous mechanical stress on the breakdown voltage over extended periods of times.

  15. Signatures of Quantized Energy States in Solution-Processed Ultrathin Layers of Metal-Oxide Semiconductors and Their Devices

    KAUST Repository

    Labram, John G.; Lin, Yenhung; Zhao, Kui; Li, Ruipeng; Thomas, Stuart R.; Semple, James; Androulidaki, Maria; Sygellou, Lamprini; McLachlan, Martyn A.; Stratakis, Emmanuel; Amassian, Aram; Anthopoulos, Thomas D.

    2015-01-01

    reports of the growth of uniform, ultrathin (<5 nm) metal-oxide semiconductors from solution, however, have potentially opened the door to such phenomena manifesting themselves. Here, a theoretical framework is developed for energy quantization

  16. Incorporating TCNQ into thiophene-fused heptacene for n-channel field effect transistor

    KAUST Repository

    Ye, Qun

    2012-06-01

    Incorporation of electron-deficient tetracyanoquinodimethane (TCNQ) into electron-rich thiophene-fused heptacene was successfully achieved for the purpose of stabilizing longer acenes and generating new n-type organic semiconductors. The heptacene-TCNQ derivative 1 was found to have good stability and an expected electron transporting property. Electron mobility up to 0.01 cm 2 V -1 s -1 has been obtained for this novel material in solution processed organic field effect transistors. © 2012 American Chemical Society.

  17. Pseudo 2-transistor active pixel sensor using an n-well/gate-tied p-channel metal oxide semiconductor field eeffect transistor-type photodetector with built-in transfer gate

    Science.gov (United States)

    Seo, Sang-Ho; Seo, Min-Woong; Kong, Jae-Sung; Shin, Jang-Kyoo; Choi, Pyung

    2008-11-01

    In this paper, a pseudo 2-transistor active pixel sensor (APS) has been designed and fabricated by using an n-well/gate-tied p-channel metal oxide semiconductor field effect transistor (PMOSFET)-type photodetector with built-in transfer gate. The proposed sensor has been fabricated using a 0.35 μm 2-poly 4-metal standard complementary metal oxide semiconductor (CMOS) logic process. The pseudo 2-transistor APS consists of two NMOSFETs and one photodetector which can amplify the generated photocurrent. The area of the pseudo 2-transistor APS is 7.1 × 6.2 μm2. The sensitivity of the proposed pixel is 49 lux/(V·s). By using this pixel, a smaller pixel area and a higher level of sensitivity can be realized when compared with a conventional 3-transistor APS which uses a pn junction photodiode.

  18. Low operating voltage n-channel organic field effect transistors using lithium fluoride/PMMA bilayer gate dielectric

    Energy Technology Data Exchange (ETDEWEB)

    Kumar, S.; Dhar, A., E-mail: adhar@phy.iitkgp.ernet.in

    2015-10-15

    Highlights: • Alternative to chemically crosslinking of PMMA to achieve low leakage in provided. • Effect of LiF in reducing gate leakage through the OFET device is studied. • Effect of gate leakage on transistor performance has been investigated. • Low voltage operable and low temperature processed n-channel OFETs were fabricated. - Abstract: We report low temperature processed, low voltage operable n-channel organic field effect transistors (OFETs) using N,N′-Dioctyl-3,4,9,10-perylenedicarboximide (PTCDI-C{sub 8}) organic semiconductor and poly(methylmethacrylate) (PMMA)/lithium fluoride (LiF) bilayer gate dielectric. We have studied the role of LiF buffer dielectric in effectively reducing the gate leakage through the device and thus obtaining superior performance in contrast to the single layer PMMA dielectric devices. The bilayer OFET devices had a low threshold voltage (V{sub t}) of the order of 5.3 V. The typical values of saturation electron mobility (μ{sub s}), on/off ratio and inverse sub-threshold slope (S) for the range of devices made were estimated to be 2.8 × 10{sup −3} cm{sup 2}/V s, 385, and 3.8 V/decade respectively. Our work thus provides a potential substitution for much complicated process of chemically crosslinking PMMA to achieve low leakage, high capacitance, and thus low operating voltage OFETs.

  19. Positron annihilation studies in the field induced depletion regions of metal-oxide-semiconductor structures

    Science.gov (United States)

    Asoka-Kumar, P.; Leung, T. C.; Lynn, K. G.; Nielsen, B.; Forcier, M. P.; Weinberg, Z. A.; Rubloff, G. W.

    1992-06-01

    The centroid shifts of positron annihilation spectra are reported from the depletion regions of metal-oxide-semiconductor (MOS) capacitors at room temperature and at 35 K. The centroid shift measurement can be explained using the variation of the electric field strength and depletion layer thickness as a function of the applied gate bias. An estimate for the relevant MOS quantities is obtained by fitting the centroid shift versus beam energy data with a steady-state diffusion-annihilation equation and a derivative-gaussian positron implantation profile. Inadequacy of the present analysis scheme is evident from the derived quantities and alternate methods are required for better predictions.

  20. Positron annihilation studies in the field induced depletion regions of metal-oxide-semiconductor structures

    International Nuclear Information System (INIS)

    Asoka-Kumar, P.; Leung, T.C.; Lynn, K.G.; Nielsen, B.; Forcier, M.P.; Weinberg, Z.A.; Rubloff, G.W.

    1992-01-01

    The centroid shifts of positron annihilation spectra are reported from the depletion regions of metal-oxide-semiconductor (MOS) capacitors at room temperature and at 35 K. The centroid shift measurement can be explained using the variation of the electric field strength and depletion layer thickness as a function of the applied gate bias. An estimate for the relevant MOS quantities is obtained by fitting the centroid shift versus beam energy data with a steady-state diffusion-annihilation equation and a derivative-gaussian positron implantation profile. Inadequacy of the present analysis scheme is evident from the derived quantities and alternate methods are required for better predictions

  1. Modelling of Leakage Current Through Double Dielectric Gate Stack in Metal Oxide Semiconductor Capacitor

    International Nuclear Information System (INIS)

    Fatimah A Noor; Mikrajuddin Abdullah; Sukirno; Khairurrijal

    2008-01-01

    In this paper, we have derived analytical expression of leakage current through double barriers in Metal Oxide Semiconductor (MOS) capacitor. Initially, electron transmittance through the MOS capacitor was derived by including the coupling between the transverse and longitudinal energies. The transmittance was then employed to obtain leakage current through the double barrier. In this model, we observed the effect of electron velocity due to the coupling effect and the oxide thickness to the leakage current. The calculated results showed that the leakage current decreases as the electron velocity increases. (author)

  2. Ultrasensitive mass sensor fully integrated with complementary metal-oxide-semiconductor circuitry

    DEFF Research Database (Denmark)

    Forsén, Esko Sebastian; Abadal, G.; Ghatnekar-Nilsson, S.

    2005-01-01

    Nanomechanical resonators have been monolithically integrated on preprocessed complementary metal-oxide-semiconductor (CMOS) chips. Fabricated resonator systems have been designed to have resonance frequencies up to 1.5 MHz. The systems have been characterized in ambient air and vacuum conditions...... and display ultrasensitive mass detection in air. A mass sensitivity of 4 ag/Hz has been determined in air by placing a single glycerine drop, having a measured weight of 57 fg, at the apex of a cantilever and subsequently measuring a frequency shift of 14.8 kHz. CMOS integration enables electrostatic...

  3. Single Event Effects (SEE) for Power Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs)

    Science.gov (United States)

    Lauenstein, Jean-Marie

    2011-01-01

    Single-event gate rupture (SEGR) continues to be a key failure mode in power MOSFETs. (1) SEGR is complex, making rate prediction difficult SEGR mechanism has two main components: (1) Oxide damage-- Reduces field required for rupture (2) Epilayer response -- Creates transient high field across the oxide.

  4. Gate controlled magnetoresistance in a silicon metal-oxide-semiconductor field-effect-transistor

    Czech Academy of Sciences Publication Activity Database

    Ciccarelli, C.; Park, B.G.; Ogawa, S.; Ferguson, A.J.; Wunderlich, Joerg

    2010-01-01

    Roč. 97, č. 8 (2010), 082106/1-082106/3 ISSN 0003-6951 Institutional research plan: CEZ:AV0Z10100521 Keywords : MOSFET Subject RIV: BM - Solid Matter Physics ; Magnetism Impact factor: 3.820, year: 2010

  5. Magnetotransport investigations of the two-dimensional metallic state in silicon metal-oxid-semiconductor structures

    International Nuclear Information System (INIS)

    Prinz, A.

    2002-03-01

    For more than two decades it was the predominant view among the physical community that the every two-dimensional (2D) disordered electron system becomes insulating as the temperature approaches the absolute zero temperature (0 Kelvin or -273.15 o C). Two-dimensional means that the movement of the charge carriers is confined in one direction by a potential so that the carriers can move freely only perpendicular to the confinement. The most famous physical realization of a 2D system is the silicon metal-oxide-semiconductor field effect transistor (Si-MOSFET). It is one of the basic elements of most electronic devices in our daily life. The working principle is very simple. Charges are attracted to the semiconductor-oxide interface by an electric field applied between the metallic gate and the semiconductor, so that a 2D conductive channel is formed. The charge density can be adjusted by the voltage from zero up to 10 13 cm -2 . In 1994 Kravchenko and coworkers made a very important discovery. They studied high mobility Si-MOSFETs and found that for densities below a certain critical value, nc, the resistivity increases as the temperature is decreased below 2 K, whereas for densities above $n c $ the resistivity decreases unexpectedly. The transition from insulating to metallic behavior, known as metal-insulator transition (MIT), was obviously a contradiction to the commonly accepted theories which predict insulating behavior for any density. The insulating behavior is a consequence of the wave properties of electrons which leads to interference in disordered media and thus to enhanced backscattering. In the subsequent years, experimental studies were performed on a variety of 2D systems, which qualitatively showed a similar behavior. All the investigated samples had one thing in common. The interaction energy between the carriers was considerable higher than their mean kinetic energy due to their movement in the 2D plane. Since the electron-electron interaction was

  6. Surface Preparation and Deposited Gate Oxides for Gallium Nitride Based Metal Oxide Semiconductor Devices

    Directory of Open Access Journals (Sweden)

    Paul C. McIntyre

    2012-07-01

    Full Text Available The literature on polar Gallium Nitride (GaN surfaces, surface treatments and gate dielectrics relevant to metal oxide semiconductor devices is reviewed. The significance of the GaN growth technique and growth parameters on the properties of GaN epilayers, the ability to modify GaN surface properties using in situ and ex situ processes and progress on the understanding and performance of GaN metal oxide semiconductor (MOS devices are presented and discussed. Although a reasonably consistent picture is emerging from focused studies on issues covered in each of these topics, future research can achieve a better understanding of the critical oxide-semiconductor interface by probing the connections between these topics. The challenges in analyzing defect concentrations and energies in GaN MOS gate stacks are discussed. Promising gate dielectric deposition techniques such as atomic layer deposition, which is already accepted by the semiconductor industry for silicon CMOS device fabrication, coupled with more advanced physical and electrical characterization methods will likely accelerate the pace of learning required to develop future GaN-based MOS technology.

  7. Functional integrity of flexible n-channel metal–oxide–semiconductor field-effect transistors on a reversibly bistable platform

    Energy Technology Data Exchange (ETDEWEB)

    Alfaraj, Nasir; Hussain, Aftab M.; Torres Sevilla, Galo A.; Ghoneim, Mohamed T.; Rojas, Jhonathan P.; Hussain, Muhammad M., E-mail: MuhammadMustafa.Hussain@kaust.edu.sa [Integrated Nanotechnology Laboratory, Computer, Electrical and Mathematical Sciences and Engineering Division, King Abdullah University of Science and Technology, Thuwal 23955-6900 (Saudi Arabia); Aljedaani, Abdulrahman B. [High-Speed Fluids Imaging Laboratory, Physical Sciences and Engineering Division, King Abdullah University of Science and Technology, Thuwal 23955-6900 (Saudi Arabia)

    2015-10-26

    Flexibility can bring a new dimension to state-of-the-art electronics, such as rollable displays and integrated circuit systems being transformed into more powerful resources. Flexible electronics are typically hosted on polymeric substrates. Such substrates can be bent and rolled up, but cannot be independently fixed at the rigid perpendicular position necessary to realize rollable display-integrated gadgets and electronics. A reversibly bistable material can assume two stable states in a reversible way: flexibly rolled state and independently unbent state. Such materials are used in cycling and biking safety wristbands and a variety of ankle bracelets for orthopedic healthcare. They are often wrapped around an object with high impulsive force loading. Here, we study the effects of cumulative impulsive force loading on thinned (25 μm) flexible silicon-based n-channel metal–oxide–semiconductor field-effect transistor devices housed on a reversibly bistable flexible platform. We found that the transistors have maintained their high performance level up to an accumulated 180 kN of impact force loading. The gate dielectric layers have maintained their reliability, which is evidenced by the low leakage current densities. Also, we observed low variation in the effective electron mobility values, which manifests that the device channels have maintained their carrier transport properties.

  8. Functional integrity of flexible n-channel metal–oxide–semiconductor field-effect transistors on a reversibly bistable platform

    International Nuclear Information System (INIS)

    Alfaraj, Nasir; Hussain, Aftab M.; Torres Sevilla, Galo A.; Ghoneim, Mohamed T.; Rojas, Jhonathan P.; Hussain, Muhammad M.; Aljedaani, Abdulrahman B.

    2015-01-01

    Flexibility can bring a new dimension to state-of-the-art electronics, such as rollable displays and integrated circuit systems being transformed into more powerful resources. Flexible electronics are typically hosted on polymeric substrates. Such substrates can be bent and rolled up, but cannot be independently fixed at the rigid perpendicular position necessary to realize rollable display-integrated gadgets and electronics. A reversibly bistable material can assume two stable states in a reversible way: flexibly rolled state and independently unbent state. Such materials are used in cycling and biking safety wristbands and a variety of ankle bracelets for orthopedic healthcare. They are often wrapped around an object with high impulsive force loading. Here, we study the effects of cumulative impulsive force loading on thinned (25 μm) flexible silicon-based n-channel metal–oxide–semiconductor field-effect transistor devices housed on a reversibly bistable flexible platform. We found that the transistors have maintained their high performance level up to an accumulated 180 kN of impact force loading. The gate dielectric layers have maintained their reliability, which is evidenced by the low leakage current densities. Also, we observed low variation in the effective electron mobility values, which manifests that the device channels have maintained their carrier transport properties

  9. Functional integrity of flexible n-channel metal–oxide–semiconductor field-effect transistors on a reversibly bistable platform

    KAUST Repository

    Alfaraj, Nasir; Hussain, Aftab M.; Torres Sevilla, Galo A.; Ghoneim, Mohamed T.; Rojas, Jhonathan Prieto; Aljedaani, Abdulrahman B.; Hussain, Muhammad Mustafa

    2015-01-01

    Flexibility can bring a new dimension to state-of-the-art electronics, such as rollable displays and integrated circuit systems being transformed into more powerful resources. Flexible electronics are typically hosted on polymeric substrates. Such substrates can be bent and rolled up, but cannot be independently fixed at the rigid perpendicular position necessary to realize rollable display-integrated gadgets and electronics. A reversibly bistable material can assume two stable states in a reversible way: flexibly rolled state and independently unbent state. Such materials are used in cycling and biking safety wristbands and a variety of ankle bracelets for orthopedic healthcare. They are often wrapped around an object with high impulsive force loading. Here, we study the effects of cumulative impulsive force loading on thinned (25 μm) flexible silicon-based n-channel metal–oxide–semiconductor field-effect transistor devices housed on a reversibly bistable flexible platform. We found that the transistors have maintained their high performance level up to an accumulated 180 kN of impact force loading. The gate dielectric layers have maintained their reliability, which is evidenced by the low leakage current densities. Also, we observed low variation in the effective electron mobility values, which manifests that the device channels have maintained their carrier transport properties.

  10. Positron annihilation in a metal-oxide semiconductor studied by using a pulsed monoenergetic positron beam

    Science.gov (United States)

    Uedono, A.; Wei, L.; Tanigawa, S.; Suzuki, R.; Ohgaki, H.; Mikado, T.; Ohji, Y.

    1993-12-01

    The positron annihilation in a metal-oxide semiconductor was studied by using a pulsed monoenergetic positron beam. Lifetime spectra of positrons were measured as a function of incident positron energy for a polycrystalline Si(100 nm)/SiO2(400 nm)/Si specimen. Applying a gate voltage between the polycrystalline Si film and the Si substrate, positrons implanted into the specimen were accumulated at the SiO2/Si interface. From the measurements, it was found that the annihilation probability of ortho-positronium (ortho-Ps) drastically decreased at the SiO2/Si interface. The observed inhibition of the Ps formation was attributed to an interaction between positrons and defects at the SiO2/Si interface.

  11. High-Performance WSe2 Complementary Metal Oxide Semiconductor Technology and Integrated Circuits.

    Science.gov (United States)

    Yu, Lili; Zubair, Ahmad; Santos, Elton J G; Zhang, Xu; Lin, Yuxuan; Zhang, Yuhao; Palacios, Tomás

    2015-08-12

    Because of their extraordinary structural and electrical properties, two-dimensional materials are currently being pursued for applications such as thin-film transistors and integrated circuit. One of the main challenges that still needs to be overcome for these applications is the fabrication of air-stable transistors with industry-compatible complementary metal oxide semiconductor (CMOS) technology. In this work, we experimentally demonstrate a novel high performance air-stable WSe2 CMOS technology with almost ideal voltage transfer characteristic, full logic swing and high noise margin with different supply voltages. More importantly, the inverter shows large voltage gain (∼38) and small static power (picowatts), paving the way for low power electronic system in 2D materials.

  12. Dimensional optimization of nanowire--complementary metal oxide--semiconductor inverter.

    Science.gov (United States)

    Hashim, Yasir; Sidek, Othman

    2013-01-01

    This study is the first to demonstrate dimensional optimization of nanowire-complementary metal-oxide-semiconductor inverter. Noise margins and inflection voltage of transfer characteristics are used as limiting factors in this optimization. Results indicate that optimization depends on both dimensions ratio and digital voltage level (Vdd). Diameter optimization reveals that when Vdd increases, the optimized value of (Dp/Dn) decreases. Channel length optimization results show that when Vdd increases, the optimized value of Ln decreases and that of (Lp/Ln) increases. Dimension ratio optimization reveals that when Vdd increases, the optimized value of Kp/Kn decreases, and silicon nanowire transistor with suitable dimensions (higher Dp and Ln with lower Lp and Dn) can be fabricated.

  13. DNA-decorated carbon-nanotube-based chemical sensors on complementary metal oxide semiconductor circuitry

    International Nuclear Information System (INIS)

    Chen, Chia-Ling; Yang, Chih-Feng; Dokmeci, Mehmet R; Agarwal, Vinay; Sonkusale, Sameer; Kim, Taehoon; Busnaina, Ahmed; Chen, Michelle

    2010-01-01

    We present integration of single-stranded DNA (ss-DNA)-decorated single-walled carbon nanotubes (SWNTs) onto complementary metal oxide semiconductor (CMOS) circuitry as nanoscale chemical sensors. SWNTs were assembled onto CMOS circuitry via a low voltage dielectrophoretic (DEP) process. Besides, bare SWNTs are reported to be sensitive to various chemicals, and functionalization of SWNTs with biomolecular complexes further enhances the sensing specificity and sensitivity. After decorating ss-DNA on SWNTs, we have found that the sensing response of the gas sensor was enhanced (up to ∼ 300% and ∼ 250% for methanol vapor and isopropanol alcohol vapor, respectively) compared with bare SWNTs. The SWNTs coupled with ss-DNA and their integration on CMOS circuitry demonstrates a step towards realizing ultra-sensitive electronic nose applications.

  14. Gate tunneling current and quantum capacitance in metal-oxide-semiconductor devices with graphene gate electrodes

    Science.gov (United States)

    An, Yanbin; Shekhawat, Aniruddh; Behnam, Ashkan; Pop, Eric; Ural, Ant

    2016-11-01

    Metal-oxide-semiconductor (MOS) devices with graphene as the metal gate electrode, silicon dioxide with thicknesses ranging from 5 to 20 nm as the dielectric, and p-type silicon as the semiconductor are fabricated and characterized. It is found that Fowler-Nordheim (F-N) tunneling dominates the gate tunneling current in these devices for oxide thicknesses of 10 nm and larger, whereas for devices with 5 nm oxide, direct tunneling starts to play a role in determining the total gate current. Furthermore, the temperature dependences of the F-N tunneling current for the 10 nm devices are characterized in the temperature range 77-300 K. The F-N coefficients and the effective tunneling barrier height are extracted as a function of temperature. It is found that the effective barrier height decreases with increasing temperature, which is in agreement with the results previously reported for conventional MOS devices with polysilicon or metal gate electrodes. In addition, high frequency capacitance-voltage measurements of these MOS devices are performed, which depict a local capacitance minimum under accumulation for thin oxides. By analyzing the data using numerical calculations based on the modified density of states of graphene in the presence of charged impurities, it is shown that this local minimum is due to the contribution of the quantum capacitance of graphene. Finally, the workfunction of the graphene gate electrode is extracted by determining the flat-band voltage as a function of oxide thickness. These results show that graphene is a promising candidate as the gate electrode in metal-oxide-semiconductor devices.

  15. Characterization of Interface State in Silicon Carbide Metal Oxide Semiconductor Capacitors

    Science.gov (United States)

    Kao, Wei-Chieh

    Silicon carbide (SiC) has always been considered as an excellent material for high temperature and high power devices. Since SiC is the only compound semiconductor whose native oxide is silicon dioxide (SiO2), it puts SiC in a unique position. Although SiC metal oxide semiconductor (MOS) technology has made significant progress in recent years, there are still a number of issues to be overcome before more commercial SiC devices can enter the market. The prevailing issues surrounding SiC MOSFET devices are the low channel mobility, the low quality of the oxide layer and the high interface state density at the SiC/SiO2 interface. Consequently, there is a need for research to be performed in order to have a better understanding of the factors causing the poor SiC/SiO2 interface properties. In this work, we investigated the generation lifetime in SiC materials by using the pulsed metal oxide semiconductor (MOS) capacitor method and measured the interface state density distribution at the SiC/SiO2 interface by using the conductance measurement and the high-low frequency capacitance technique. These measurement techniques have been performed on n-type and p-type SiC MOS capacitors. In the course of our investigation, we observed fast interface states at semiconductor-dielectric interfaces in SiC MOS capacitors that underwent three different interface passivation processes, such states were detected in the nitrided samples but not observed in PSG-passivated samples. This result indicate that the lack of fast states at PSG-passivated interface is one of the main reasons for higher channel mobility in PSG MOSFETs. In addition, the effect of mobile ions in the oxide on the response time of interface states has been investigated. In the last chapter we propose additional methods of investigation that can help elucidate the origin of the particular interface states, enabling a more complete understanding of the SiC/SiO2 material system.

  16. Orientation-Dependent Electronic Structures and Charge Transport Mechanisms in Ultrathin Polymeric n-Channel Field-Effect Transistors

    NARCIS (Netherlands)

    Fabiano, Simone; Yoshida, Hiroyuki; Chen, Zhihua; Facchetti, Antonio; Loi, Maria Antonietta

    2013-01-01

    We investigated the role of metal/organic semiconductor interface morphology on the charge transport mechanisms and energy level alignment of the n-channel semiconductor poly{[N,N'-bis(2-octyldodecyl)-naphthalene-1,4,5,8-bis(dicarboximide)-2,6-diyl]-alt-5,5'-(2,2'-bithiophene)} (P-(NDI2ODT2)).

  17. Enhancing the far-ultraviolet sensitivity of silicon complementary metal oxide semiconductor imaging arrays

    Science.gov (United States)

    Retherford, Kurt D.; Bai, Yibin; Ryu, Kevin K.; Gregory, James A.; Welander, Paul B.; Davis, Michael W.; Greathouse, Thomas K.; Winters, Gregory S.; Suntharalingam, Vyshnavi; Beletic, James W.

    2015-10-01

    We report our progress toward optimizing backside-illuminated silicon P-type intrinsic N-type complementary metal oxide semiconductor devices developed by Teledyne Imaging Sensors (TIS) for far-ultraviolet (UV) planetary science applications. This project was motivated by initial measurements at Southwest Research Institute of the far-UV responsivity of backside-illuminated silicon PIN photodiode test structures, which revealed a promising QE in the 100 to 200 nm range. Our effort to advance the capabilities of thinned silicon wafers capitalizes on recent innovations in molecular beam epitaxy (MBE) doping processes. Key achievements to date include the following: (1) representative silicon test wafers were fabricated by TIS, and set up for MBE processing at MIT Lincoln Laboratory; (2) preliminary far-UV detector QE simulation runs were completed to aid MBE layer design; (3) detector fabrication was completed through the pre-MBE step; and (4) initial testing of the MBE doping process was performed on monitoring wafers, with detailed quality assessments.

  18. Study of SiO2-Si and metal-oxide-semiconductor structures using positrons

    Science.gov (United States)

    Leung, T. C.; Asoka-Kumar, P.; Nielsen, B.; Lynn, K. G.

    1993-01-01

    Studies of SiO2-Si and metal-oxide-semiconductor (MOS) structures using positrons are summarized and a concise picture of the present understanding of positrons in these systems is provided. Positron annihilation line-shape S data are presented as a function of the positron incident energy, gate voltage, and annealing, and are described with a diffusion-annihilation equation for positrons. The data are compared with electrical measurements. Distinct annihilation characteristics were observed at the SiO2-Si interface and have been studied as a function of bias voltage and annealing conditions. The shift of the centroid (peak) of γ-ray energy distributions in the depletion region of the MOS structures was studied as a function of positron energy and gate voltage, and the shifts are explained by the corresponding variations in the strength of the electric field and thickness of the depletion layer. The potential role of the positron annihilation technique as a noncontact, nondestructive, and depth-sensitive characterization tool for the technologically important, deeply buried interface is shown.

  19. Study of SiO2-Si and metal-oxide-semiconductor structures using positrons

    International Nuclear Information System (INIS)

    Leung, T.C.; Asoka-Kumar, P.; Nielsen, B.; Lynn, K.G.

    1993-01-01

    Studies of SiO 2 -Si and metal-oxide-semiconductor (MOS) structures using positrons are summarized and a concise picture of the present understanding of positrons in these systems is provided. Positron annihilation line-shape S data are presented as a function of the positron incident energy, gate voltage, and annealing, and are described with a diffusion-annihilation equation for positrons. The data are compared with electrical measurements. Distinct annihilation characteristics were observed at the SiO 2 -Si interface and have been studied as a function of bias voltage and annealing conditions. The shift of the centroid (peak) of γ-ray energy distributions in the depletion region of the MOS structures was studied as a function of positron energy and gate voltage, and the shifts are explained by the corresponding variations in the strength of the electric field and thickness of the depletion layer. The potential role of the positron annihilation technique as a noncontact, nondestructive, and depth-sensitive characterization tool for the technologically important, deeply buried interface is shown

  20. Deep electron traps in HfO_2-based metal-oxide-semiconductor capacitors

    International Nuclear Information System (INIS)

    Salomone, L. Sambuco; Lipovetzky, J.; Carbonetto, S.H.; García Inza, M.A.; Redin, E.G.; Campabadal, F.

    2016-01-01

    Hafnium oxide (HfO_2) is currently considered to be a good candidate to take part as a component in charge-trapping nonvolatile memories. In this work, the electric field and time dependences of the electron trapping/detrapping processes are studied through a constant capacitance voltage transient technique on metal-oxide-semiconductor capacitors with atomic layer deposited HfO_2 as insulating layer. A tunneling-based model is proposed to reproduce the experimental results, obtaining fair agreement between experiments and simulations. From the fitting procedure, a band of defects is identified, located in the first 1.7 nm from the Si/HfO_2 interface at an energy level E_t = 1.59 eV below the HfO_2 conduction band edge with density N_t = 1.36 × 10"1"9 cm"−"3. A simplified analytical version of the model is proposed in order to ease the fitting procedure for the low applied voltage case considered in this work. - Highlights: • We characterized deep electron trapping/detrapping in HfO_2 structures. • We modeled the experimental results through a tunneling-based model. • We obtained an electron trap energy level of 1.59 eV below conduction band edge. • We obtained a spatial trap distribution extending 1.7 nm within the insulator. • A simplified tunneling front model is able to reproduce the experimental results.

  1. Ionic behavior of organic-inorganic metal halide perovskite based metal-oxide-semiconductor capacitors.

    Science.gov (United States)

    Wang, Yucheng; Zhang, Yuming; Pang, Tiqiang; Xu, Jie; Hu, Ziyang; Zhu, Yuejin; Tang, Xiaoyan; Luan, Suzhen; Jia, Renxu

    2017-05-24

    Organic-inorganic metal halide perovskites are promising semiconductors for optoelectronic applications. Despite the achievements in device performance, the electrical properties of perovskites have stagnated. Ion migration is speculated to be the main contributing factor for the many unusual electrical phenomena in perovskite-based devices. Here, to understand the intrinsic electrical behavior of perovskites, we constructed metal-oxide-semiconductor (MOS) capacitors based on perovskite films and performed capacitance-voltage (C-V) and current-voltage (I-V) measurements of the capacitors. The results provide direct evidence for the mixed ionic-electronic transport behavior within perovskite films. In the dark, there is electrical hysteresis in both the C-V and I-V curves because the mobile negative ions take part in charge transport despite frequency modulation. However, under illumination, the large amount of photoexcited free carriers screens the influence of the mobile ions with a low concentration, which is responsible for the normal C-V properties. Validation of ion migration for the gate-control ability of MOS capacitors is also helpful for the investigation of perovskite MOS transistors and other gate-control photovoltaic devices.

  2. Laser line scan underwater imaging by complementary metal-oxide-semiconductor camera

    Science.gov (United States)

    He, Zhiyi; Luo, Meixing; Song, Xiyu; Wang, Dundong; He, Ning

    2017-12-01

    This work employs the complementary metal-oxide-semiconductor (CMOS) camera to acquire images in a scanning manner for laser line scan (LLS) underwater imaging to alleviate backscatter impact of seawater. Two operating features of the CMOS camera, namely the region of interest (ROI) and rolling shutter, can be utilized to perform image scan without the difficulty of translating the receiver above the target as the traditional LLS imaging systems have. By the dynamically reconfigurable ROI of an industrial CMOS camera, we evenly divided the image into five subareas along the pixel rows and then scanned them by changing the ROI region automatically under the synchronous illumination by the fun beams of the lasers. Another scanning method was explored by the rolling shutter operation of the CMOS camera. The fun beam lasers were turned on/off to illuminate the narrow zones on the target in a good correspondence to the exposure lines during the rolling procedure of the camera's electronic shutter. The frame synchronization between the image scan and the laser beam sweep may be achieved by either the strobe lighting output pulse or the external triggering pulse of the industrial camera. Comparison between the scanning and nonscanning images shows that contrast of the underwater image can be improved by our LLS imaging techniques, with higher stability and feasibility than the mechanically controlled scanning method.

  3. Polycrystalline silicon ring resonator photodiodes in a bulk complementary metal-oxide-semiconductor process.

    Science.gov (United States)

    Mehta, Karan K; Orcutt, Jason S; Shainline, Jeffrey M; Tehar-Zahav, Ofer; Sternberg, Zvi; Meade, Roy; Popović, Miloš A; Ram, Rajeev J

    2014-02-15

    We present measurements on resonant photodetectors utilizing sub-bandgap absorption in polycrystalline silicon ring resonators, in which light is localized in the intrinsic region of a p+/p/i/n/n+ diode. The devices, operating both at λ=1280 and λ=1550  nm and fabricated in a complementary metal-oxide-semiconductor (CMOS) dynamic random-access memory emulation process, exhibit detection quantum efficiencies around 20% and few-gigahertz response bandwidths. We observe this performance at low reverse biases in the range of a few volts and in devices with dark currents below 50 pA at 10 V. These results demonstrate that such photodetector behavior, previously reported by Preston et al. [Opt. Lett. 36, 52 (2011)], is achievable in bulk CMOS processes, with significant improvements with respect to the previous work in quantum efficiency, dark current, linearity, bandwidth, and operating bias due to additional midlevel doping implants and different material deposition. The present work thus offers a robust realization of a fully CMOS-fabricated all-silicon photodetector functional across a wide wavelength range.

  4. High performance high-κ/metal gate complementary metal oxide semiconductor circuit element on flexible silicon

    KAUST Repository

    Sevilla, Galo T.

    2016-02-29

    Thinned silicon based complementary metal oxide semiconductor(CMOS)electronics can be physically flexible. To overcome challenges of limited thinning and damaging of devices originated from back grinding process, we show sequential reactive ion etching of silicon with the assistance from soft polymeric materials to efficiently achieve thinned (40 μm) and flexible (1.5 cm bending radius) silicon based functional CMOSinverters with high-κ/metal gate transistors. Notable advances through this study shows large area of silicon thinning with pre-fabricated high performance elements with ultra-large-scale-integration density (using 90 nm node technology) and then dicing of such large and thinned (seemingly fragile) pieces into smaller pieces using excimer laser. The impact of various mechanical bending and bending cycles show undeterred high performance of flexible siliconCMOSinverters. Future work will include transfer of diced silicon chips to destination site, interconnects, and packaging to obtain fully flexible electronic systems in CMOS compatible way.

  5. Finite Element Analysis of Film Stack Architecture for Complementary Metal-Oxide-Semiconductor Image Sensors.

    Science.gov (United States)

    Wu, Kuo-Tsai; Hwang, Sheng-Jye; Lee, Huei-Huang

    2017-05-02

    Image sensors are the core components of computer, communication, and consumer electronic products. Complementary metal oxide semiconductor (CMOS) image sensors have become the mainstay of image-sensing developments, but are prone to leakage current. In this study, we simulate the CMOS image sensor (CIS) film stacking process by finite element analysis. To elucidate the relationship between the leakage current and stack architecture, we compare the simulated and measured leakage currents in the elements. Based on the analysis results, we further improve the performance by optimizing the architecture of the film stacks or changing the thin-film material. The material parameters are then corrected to improve the accuracy of the simulation results. The simulated and experimental results confirm a positive correlation between measured leakage current and stress. This trend is attributed to the structural defects induced by high stress, which generate leakage. Using this relationship, we can change the structure of the thin-film stack to reduce the leakage current and thereby improve the component life and reliability of the CIS components.

  6. Thermal stability of atomic layer deposited WCxNy electrodes for metal oxide semiconductor devices

    Science.gov (United States)

    Zonensain, Oren; Fadida, Sivan; Fisher, Ilanit; Gao, Juwen; Danek, Michal; Eizenberg, Moshe

    2018-01-01

    This study is a thorough investigation of the chemical, structural, and electrical stability of W based organo-metallic films, grown by atomic layer deposition, for future use as gate electrodes in advanced metal oxide semiconductor structures. In an earlier work, we have shown that high effective work-function (4.7 eV) was produced by nitrogen enriched films (WCxNy) dominated by W-N chemical bonding, and low effective work-function (4.2 eV) was produced by hydrogen plasma resulting in WCx films dominated by W-C chemical bonding. In the current work, we observe, using x-ray diffraction analysis, phase transformation of the tungsten carbide and tungsten nitride phases after 900 °C annealing to the cubic tungsten phase. Nitrogen diffusion is also observed and is analyzed with time-of-flight secondary ion mass spectroscopy. After this 900 °C anneal, WCxNy effective work function tunability is lost and effective work-function values of 4.7-4.8 eV are measured, similar to stable effective work function values measured for PVD TiN up to 900 °C anneal. All the observed changes after annealing are discussed and correlated to the observed change in the effective work function.

  7. A striking performance improvement of fullerene n-channel field-effect transistors via synergistic interfacial modifications

    International Nuclear Information System (INIS)

    Du, Lili; Luo, Xiao; Wen, Zhanwei; Zhang, Jianping; Sun, Lei; Lv, Wenli; Li, Yao; Zhao, Feiyu; Zhong, Junkang; Ren, Qiang; Huang, Fobao; Xia, Hongquan; Peng, Yingquan

    2015-01-01

    For fullerene based n-channel transistors, remarkably improved device characteristics were achieved via charge injection and transport interfacial synergistic modifications using low-cost aluminium source/drain electrodes. Compared with the reference device without any modifications (device A), the as-fabricated transistor (device H) showed a dramatic improvement of saturation mobility from 0.0026 to 0.3078 cm 2 V −1 s −1 with a maximum on–off current ratio of 10 6 and a minimum subthreshold slope of 1.52 V decade −1 . AFM and XRD analysis manifested that the deposited C 60 films on PVA/OTS successive-modified SiO 2 substrate were highly dense polycrystalline and uniform with larger crystalline grain and less grain boundary. A gap state assisted electron injection mechanism was proposed to explicate the enhanced electrical conductivity considering BCP modification for charge injection interface, which has been well corroborated by a diode-based injection experiment and a theoretical calculation of contact resistances. We further demonstrated the application of the concept modification method to enable comparative time-stable operation of fullerene n-channel transistors. Given many key merits, we believed that this general method using multi-interface modifications could be extended to fabricate other n-channel OFETs with superior electrical performance and stability. (paper)

  8. Infrared rectification in a nanoantenna-coupled metal-oxide-semiconductor tunnel diode.

    Science.gov (United States)

    Davids, Paul S; Jarecki, Robert L; Starbuck, Andrew; Burckel, D Bruce; Kadlec, Emil A; Ribaudo, Troy; Shaner, Eric A; Peters, David W

    2015-12-01

    Direct rectification of electromagnetic radiation is a well-established method for wireless power conversion in the microwave region of the spectrum, for which conversion efficiencies in excess of 84% have been demonstrated. Scaling to the infrared or optical part of the spectrum requires ultrafast rectification that can only be obtained by direct tunnelling. Many research groups have looked to plasmonics to overcome antenna-scaling limits and to increase the confinement. Recently, surface plasmons on heavily doped Si surfaces were investigated as a way of extending surface-mode confinement to the thermal infrared region. Here we combine a nanostructured metallic surface with a heavily doped Si infrared-reflective ground plane designed to confine infrared radiation in an active electronic direct-conversion device. The interplay of strong infrared photon-phonon coupling and electromagnetic confinement in nanoscale devices is demonstrated to have a large impact on ultrafast electronic tunnelling in metal-oxide-semiconductor (MOS) structures. Infrared dispersion of SiO2 near a longitudinal optical (LO) phonon mode gives large transverse-field confinement in a nanometre-scale oxide-tunnel gap as the wavelength-dependent permittivity changes from 1 to 0, which leads to enhanced electromagnetic fields at material interfaces and a rectified displacement current that provides a direct conversion of infrared radiation into electric current. The spectral and electrical signatures of the nanoantenna-coupled tunnel diodes are examined under broadband blackbody and quantum-cascade laser (QCL) illumination. In the region near the LO phonon resonance, we obtained a measured photoresponsivity of 2.7 mA W(-1) cm(-2) at -0.1 V.

  9. Effects of oxide traps, interface traps, and ''border traps'' on metal-oxide-semiconductor devices

    International Nuclear Information System (INIS)

    Fleetwood, D.M.; Winokur, P.S.; Reber, R.A. Jr.; Meisenheimer, T.L.; Schwank, J.R.; Shaneyfelt, M.R.; Riewe, L.C.

    1993-01-01

    We have identified several features of the 1/f noise and radiation response of metal-oxide-semiconductor (MOS) devices that are difficult to explain with standard defect models. To address this issue, and in response to ambiguities in the literature, we have developed a revised nomenclature for defects in MOS devices that clearly distinguishes the language used to describe the physical location of defects from that used to describe their electrical response. In this nomenclature, ''oxide traps'' are simply defects in the SiO 2 layer of the MOS structure, and ''interface traps'' are defects at the Si/SiO 2 interface. Nothing is presumed about how either type of defect communicates with the underlying Si. Electrically, ''fixed states'' are defined as trap levels that do not communicate with the Si on the time scale of the measurements, but ''switching states'' can exchange charge with the Si. Fixed states presumably are oxide traps in most types of measurements, but switching states can either be interface traps or near-interfacial oxide traps that can communicate with the Si, i.e., ''border traps'' [D. M. Fleetwood, IEEE Trans. Nucl. Sci. NS-39, 269 (1992)]. The effective density of border traps depends on the time scale and bias conditions of the measurements. We show the revised nomenclature can provide focus to discussions of the buildup and annealing of radiation-induced charge in non-radiation-hardened MOS transistors, and to changes in the 1/f noise of MOS devices through irradiation and elevated-temperature annealing

  10. Low Power Operation of Temperature-Modulated Metal Oxide Semiconductor Gas Sensors

    Directory of Open Access Journals (Sweden)

    Javier Burgués

    2018-01-01

    Full Text Available Mobile applications based on gas sensing present new opportunities for low-cost air quality monitoring, safety, and healthcare. Metal oxide semiconductor (MOX gas sensors represent the most prominent technology for integration into portable devices, such as smartphones and wearables. Traditionally, MOX sensors have been continuously powered to increase the stability of the sensing layer. However, continuous power is not feasible in many battery-operated applications due to power consumption limitations or the intended intermittent device operation. This work benchmarks two low-power, duty-cycling, and on-demand modes against the continuous power one. The duty-cycling mode periodically turns the sensors on and off and represents a trade-off between power consumption and stability. On-demand operation achieves the lowest power consumption by powering the sensors only while taking a measurement. Twelve thermally modulated SB-500-12 (FIS Inc. Jacksonville, FL, USA sensors were exposed to low concentrations of carbon monoxide (0–9 ppm with environmental conditions, such as ambient humidity (15–75% relative humidity and temperature (21–27 °C, varying within the indicated ranges. Partial Least Squares (PLS models were built using calibration data, and the prediction error in external validation samples was evaluated during the two weeks following calibration. We found that on-demand operation produced a deformation of the sensor conductance patterns, which led to an increase in the prediction error by almost a factor of 5 as compared to continuous operation (2.2 versus 0.45 ppm. Applying a 10% duty-cycling operation of 10-min periods reduced this prediction error to a factor of 2 (0.9 versus 0.45 ppm. The proposed duty-cycling powering scheme saved up to 90% energy as compared to the continuous operating mode. This low-power mode may be advantageous for applications that do not require continuous and periodic measurements, and which can tolerate

  11. Low Power Operation of Temperature-Modulated Metal Oxide Semiconductor Gas Sensors.

    Science.gov (United States)

    Burgués, Javier; Marco, Santiago

    2018-01-25

    Mobile applications based on gas sensing present new opportunities for low-cost air quality monitoring, safety, and healthcare. Metal oxide semiconductor (MOX) gas sensors represent the most prominent technology for integration into portable devices, such as smartphones and wearables. Traditionally, MOX sensors have been continuously powered to increase the stability of the sensing layer. However, continuous power is not feasible in many battery-operated applications due to power consumption limitations or the intended intermittent device operation. This work benchmarks two low-power, duty-cycling, and on-demand modes against the continuous power one. The duty-cycling mode periodically turns the sensors on and off and represents a trade-off between power consumption and stability. On-demand operation achieves the lowest power consumption by powering the sensors only while taking a measurement. Twelve thermally modulated SB-500-12 (FIS Inc. Jacksonville, FL, USA) sensors were exposed to low concentrations of carbon monoxide (0-9 ppm) with environmental conditions, such as ambient humidity (15-75% relative humidity) and temperature (21-27 °C), varying within the indicated ranges. Partial Least Squares (PLS) models were built using calibration data, and the prediction error in external validation samples was evaluated during the two weeks following calibration. We found that on-demand operation produced a deformation of the sensor conductance patterns, which led to an increase in the prediction error by almost a factor of 5 as compared to continuous operation (2.2 versus 0.45 ppm). Applying a 10% duty-cycling operation of 10-min periods reduced this prediction error to a factor of 2 (0.9 versus 0.45 ppm). The proposed duty-cycling powering scheme saved up to 90% energy as compared to the continuous operating mode. This low-power mode may be advantageous for applications that do not require continuous and periodic measurements, and which can tolerate slightly higher

  12. Metal-oxide-semiconductor devices based on epitaxial germanium-carbon layers grown directly on silicon substrates by ultra-high-vacuum chemical vapor deposition

    Science.gov (United States)

    Kelly, David Quest

    After the integrated circuit was invented in 1959, complementary metal-oxide-semiconductor (CMOS) technology soon became the mainstay of the semiconductor industry. Silicon-based CMOS has dominated logic technologies for decades. During this time, chip performance has grown at an exponential rate at the cost of higher power consumption and increased process complexity. The performance gains have been made possible through scaling down circuit dimensions by improvements in lithography capabilities. Since scaling cannot continue forever, researchers have vigorously pursued new ways of improving the performance of metal-oxide-semiconductor field-effect transistors (MOSFETs) without having to shrink gate lengths and reduce the gate insulator thickness. Strained silicon, with its ability to boost transistor current by improving the channel mobility, is one of the methods that has already found its way into production. Although not yet in production, high-kappa dielectrics have also drawn wide interest in industry since they allow for the reduction of the electrical oxide thickness of the gate stack without having to reduce the physical thickness of the dielectric. Further out on the horizon is the incorporation of high-mobility materials such as germanium (Ge), silicon-germanium (Si1-xGe x), and the III-V semiconductors. Among the high-mobility materials, Ge has drawn the most attention because it has been shown to be compatible with high-kappa dielectrics and to produce high drive currents compared to Si. Among the most difficult challenges for integrating Ge on Si is finding a suitable method for reducing the number of crystal defects. The use of strain-relaxed Si1- xGex buffers has proven successful for reducing the threading dislocation density in Ge epitaxial layers, but questions remain as to the viability of this method in terms of cost and process complexity. This dissertation presents research on thin germanium-carbon (Ge 1-yCy layers on Si for the fabrication

  13. Chip-scale fluorescence microscope based on a silo-filter complementary metal-oxide semiconductor image sensor.

    Science.gov (United States)

    Ah Lee, Seung; Ou, Xiaoze; Lee, J Eugene; Yang, Changhuei

    2013-06-01

    We demonstrate a silo-filter (SF) complementary metal-oxide semiconductor (CMOS) image sensor for a chip-scale fluorescence microscope. The extruded pixel design with metal walls between neighboring pixels guides fluorescence emission through the thick absorptive filter to the photodiode of a pixel. Our prototype device achieves 13 μm resolution over a wide field of view (4.8 mm × 4.4 mm). We demonstrate bright-field and fluorescence longitudinal imaging of living cells in a compact, low-cost configuration.

  14. Multichannel, time-resolved picosecond laser ultrasound imaging and spectroscopy with custom complementary metal-oxide-semiconductor detector

    International Nuclear Information System (INIS)

    Smith, Richard J.; Light, Roger A.; Johnston, Nicholas S.; Pitter, Mark C.; Somekh, Mike G.; Sharples, Steve D.

    2010-01-01

    This paper presents a multichannel, time-resolved picosecond laser ultrasound system that uses a custom complementary metal-oxide-semiconductor linear array detector. This novel sensor allows parallel phase-sensitive detection of very low contrast modulated signals with performance in each channel comparable to that of a discrete photodiode and a lock-in amplifier. Application of the instrument is demonstrated by parallelizing spatial measurements to produce two-dimensional thickness maps on a layered sample, and spectroscopic parallelization is demonstrated by presenting the measured Brillouin oscillations from a gallium arsenide wafer. This paper demonstrates the significant advantages of our approach to pump probe systems, especially picosecond ultrasonics.

  15. Multichannel, time-resolved picosecond laser ultrasound imaging and spectroscopy with custom complementary metal-oxide-semiconductor detector

    Energy Technology Data Exchange (ETDEWEB)

    Smith, Richard J.; Light, Roger A.; Johnston, Nicholas S.; Pitter, Mark C.; Somekh, Mike G. [Institute of Biophysics, Imaging and Optical Science, University of Nottingham, Nottinghamshire NG7 2RD (United Kingdom); Sharples, Steve D. [Applied Optics Group, Electrical Systems and Optics Research Division, University of Nottingham, Nottinghamshire NG7 2RD (United Kingdom)

    2010-02-15

    This paper presents a multichannel, time-resolved picosecond laser ultrasound system that uses a custom complementary metal-oxide-semiconductor linear array detector. This novel sensor allows parallel phase-sensitive detection of very low contrast modulated signals with performance in each channel comparable to that of a discrete photodiode and a lock-in amplifier. Application of the instrument is demonstrated by parallelizing spatial measurements to produce two-dimensional thickness maps on a layered sample, and spectroscopic parallelization is demonstrated by presenting the measured Brillouin oscillations from a gallium arsenide wafer. This paper demonstrates the significant advantages of our approach to pump probe systems, especially picosecond ultrasonics.

  16. Feigenbaum scenario in the dynamics of a metal-oxide semiconductor heterostructure under harmonic perturbation. Golden mean criticality

    International Nuclear Information System (INIS)

    Cristescu, C.P.; Mereu, B.; Stan, Cristina; Agop, M.

    2009-01-01

    Experimental investigations and theoretical analysis on the dynamics of a metal-oxide semiconductor heterostructure used as nonlinear capacity in a series RLC electric circuit are presented. A harmonic voltage perturbation can induce various nonlinear behaviours, particularly evolution to chaos by period doubling and torus destabilization. In this work we focus on the change in dynamics induced by a sinusoidal driving with constant frequency and variable amplitude. Theoretical treatment based on the microscopic mechanisms involved led us to a dynamic system with a piecewise behaviour. Consequently, a model consisting of a nonlinear oscillator described by a piecewise second order ordinary differential equation is proposed. This kind of treatment is required by the asymmetry in the behaviour of the metal-oxide semiconductor with respect to the polarization of the perturbing voltage. The dynamics of the theoretical model is in good agreement with the experimental results. A connection with El Naschie's E-infinity space-time is established based on the interpretation of our experimental results as evidence of the importance of the golden mean criticality in the microscopic world.

  17. Ratiometric, filter-free optical sensor based on a complementary metal oxide semiconductor buried double junction photodiode.

    Science.gov (United States)

    Yung, Ka Yi; Zhan, Zhiyong; Titus, Albert H; Baker, Gary A; Bright, Frank V

    2015-07-16

    We report a complementary metal oxide semiconductor integrated circuit (CMOS IC) with a buried double junction (BDJ) photodiode that (i) provides a real-time output signal that is related to the intensity ratio at two emission wavelengths and (ii) simultaneously eliminates the need for an optical filter to block Rayleigh scatter. We demonstrate the BDJ platform performance for gaseous NH3 and aqueous pH detection. We also compare the BDJ performance to parallel results obtained by using a slew scanned fluorimeter (SSF). The BDJ results are functionally equivalent to the SSF results without the need for any wavelength filtering or monochromators and the BDJ platform is not prone to errors associated with source intensity fluctuations or sensor signal drift. Copyright © 2015 Elsevier B.V. All rights reserved.

  18. Ultraviolet-visible electroluminescence from metal-oxide-semiconductor devices with CeO2 films on silicon

    International Nuclear Information System (INIS)

    Lv, Chunyan; Zhu, Chen; Wang, Canxing; Li, Dongsheng; Ma, Xiangyang; Yang, Deren

    2015-01-01

    We report on ultraviolet-visible (UV-Vis) electroluminescence (EL) from metal-oxide-semiconductor (MOS) devices with the CeO 2 films annealed at low temperatures. At the same injection current, the UV-Vis EL from the MOS device with the 550 °C-annealed CeO 2 film is much stronger than that from the counterpart with the 450 °C-annealed CeO 2 film. This is due to that the 550 °C-annealed CeO 2 film contains more Ce 3+ ions and oxygen vacancies. It is tentatively proposed that the recombination of the electrons in multiple oxygen-vacancy–related energy levels with the holes in Ce 4f 1 energy band pertaining to Ce 3+ ions leads to the UV-Vis EL

  19. Electrical memory features of ferromagnetic CoFeAlSi nano-particles embedded in metal-oxide-semiconductor matrix

    International Nuclear Information System (INIS)

    Lee, Ja Bin; Kim, Ki Woong; Lee, Jun Seok; An, Gwang Guk; Hong, Jin Pyo

    2011-01-01

    Half-metallic Heusler material Co 2 FeAl 0.5 Si 0.5 (CFAS) nano-particles (NPs) embedded in metal-oxide-semiconductor (MOS) structures with thin HfO 2 tunneling and MgO control oxides were investigated. The CFAS NPs were prepared by rapid thermal annealing. The formation of well-controlled CFAS NPs on thin HfO 2 tunneling oxide was confirmed by atomic force microscopy (AFM). Memory characteristics of CFAS NPs in MOS devices exhibited a large memory window of 4.65 V, as well as good retention and endurance times of 10 5 cycles and 10 9 s, respectively, demonstrating the potential of CFAS NPs as promising candidates for use in charge storage.

  20. Charge-flow structures as polymeric early-warning fire alarm devices. M.S. Thesis; [metal oxide semiconductors

    Science.gov (United States)

    Sechen, C. M.; Senturia, S. D.

    1977-01-01

    The charge-flow transistor (CFT) and its applications for fire detection and gas sensing were investigated. The utility of various thin film polymers as possible sensing materials was determined. One polymer, PAPA, showed promise as a relative humidity sensor; two others, PFI and PSB, were found to be particularly suitable for fire detection. The behavior of the charge-flow capacitor, which is basically a parallel-plate capacitor with a polymer-filled gap in the metallic tip electrode, was successfully modeled as an RC transmission line. Prototype charge-flow transistors were fabricated and tested. The effective threshold voltage of this metal oxide semiconductor was found to be dependent on whether surface or bulk conduction in the thin film was dominant. Fire tests with a PFI-coated CFT indicate good sensitivity to smouldering fires.

  1. Interfacial and electrical properties of HfAlO/GaSb metal-oxide-semiconductor capacitors with sulfur passivation

    International Nuclear Information System (INIS)

    Tan Zhen; Zhao Lian-Feng; Wang Jing; Xu Jun

    2014-01-01

    Interfacial and electrical properties of HfAlO/GaSb metal-oxide-semiconductor capacitors (MOSCAPs) with sulfur passivation were investigated and the chemical mechanisms of the sulfur passivation process were carefully studied. It was shown that the sulfur passivation treatment could reduce the interface trap density D it of the HfAlO/GaSb interface by 35% and reduce the equivalent oxide thickness (EOT) from 8 nm to 4 nm. The improved properties are due to the removal of the native oxide layer, as was proven by x-ray photoelectron spectroscopy measurements and high-resolution cross-sectional transmission electron microscopy (HRXTEM) results. It was also found that GaSb-based MOSCAPs with HfAlO gate dielectrics have interfacial properties superior to those using HfO 2 or Al 2 O 3 dielectric layers. (condensed matter: electronic structure, electrical, magnetic, and optical properties)

  2. Single-electron-occupation metal-oxide-semiconductor quantum dots formed from efficient poly-silicon gate layout

    Energy Technology Data Exchange (ETDEWEB)

    Carroll, Malcolm S.; rochette, sophie; Rudolph, Martin; Roy, A. -M.; Curry, Matthew Jon; Ten Eyck, Gregory A.; Manginell, Ronald P.; Wendt, Joel R.; Pluym, Tammy; Carr, Stephen M; Ward, Daniel Robert; Lilly, Michael; pioro-ladriere, michel

    2017-07-01

    We introduce a silicon metal-oxide-semiconductor quantum dot structure that achieves dot-reservoir tunnel coupling control without a dedicated barrier gate. The elementary structure consists of two accumulation gates separated spatially by a gap, one gate accumulating a reservoir and the other a quantum dot. Control of the tunnel rate between the dot and the reservoir across the gap is demonstrated in the single electron regime by varying the reservoir accumulation gate voltage while compensating with the dot accumulation gate voltage. The method is then applied to a quantum dot connected in series to source and drain reservoirs, enabling transport down to the single electron regime. Finally, tuning of the valley splitting with the dot accumulation gate voltage is observed. This split accumulation gate structure creates silicon quantum dots of similar characteristics to other realizations but with less electrodes, in a single gate stack subtractive fabrication process that is fully compatible with silicon foundry manufacturing.

  3. A 94GHz Temperature Compensated Low Noise Amplifier in 45nm Silicon-on-Insulator Complementary Metal-Oxide Semiconductor (SOI CMOS)

    Science.gov (United States)

    2014-01-01

    ring oscillator based temperature sensor will be designed to compensate for gain variations over temperature. For comparison to a competing solution...Simulated (Green) Capacitance of the GSG Pads ........................ 9 Figure 6: Die Picture and Schematic of the L-2L Coplanar Waveguides...complementary metal-oxide-semiconductor (CMOS) technology. A ring oscillator based temperature sensor was designed to compensate for gain variations

  4. Electrical analysis of high dielectric constant insulator and metal gate metal oxide semiconductor capacitors on flexible bulk mono-crystalline silicon

    KAUST Repository

    Ghoneim, Mohamed T.; Rojas, Jhonathan Prieto; Young, Chadwin D.; Bersuker, Gennadi; Hussain, Muhammad Mustafa

    2015-01-01

    We report on the electrical study of high dielectric constant insulator and metal gate metal oxide semiconductor capacitors (MOSCAPs) on a flexible ultra-thin (25 μm) silicon fabric which is peeled off using a CMOS compatible process from a standard

  5. Plasma-assisted atomic layer deposition of TiN/Al2O3 stacks for metal-oxide-semiconductor capacitor applications

    NARCIS (Netherlands)

    Hoogeland, D.; Jinesh, K.B.; Roozeboom, F.; Besling, W.F.A.; Sanden, van de M.C.M.; Kessels, W.M.M.

    2009-01-01

    By employing plasma-assisted atomic layer deposition, thin films of Al2O3 and TiN are subsequently deposited in a single reactor at a single substrate temperature with the objective of fabricating high-quality TiN/Al2O3 / p-Si metal-oxide-semiconductor capacitors. Transmission electron microscopy

  6. Prediction of total dose effects on sub-micron process metal oxide semiconductor devices

    International Nuclear Information System (INIS)

    Kamimura, Hiroshi; Kato, Masataka.

    1991-01-01

    A method for correcting leakage currents is described to predict the radiation-induced threshold voltage shift of sub-micron MOSFETs. A practical model for predicting the leakage current generated by irradiation is also given on the basis of experimental results on 0.8-μm process MOSFETs. The constants in the threshold voltage shift model are determined from the 'true' I-V characteristic of the MOSFET, which is obtained by correction of leakage currents due to characteristic change of a parasitic transistor. In this way, the threshold voltage shift of the n-channel MOSFET irradiated at a low dose rate of 2 Gy(Si)/h was also calculated by using data from a high dose rate irradiation experiment (100 Gy(Si)/h, 5 h). The calculated result well represented the tendency of measured data on threshold voltage shift. The radiation-induced leakage current was considered to decay approximately in two exponential modes. The constants in this leakage current model were determined from the above high dose rate experiment. The response of leakage current predicted at a low dose rate of 2 Gy(Si)/h approximately agreed with that measured during and after irradiation. (author)

  7. Influence of quantizing magnetic field and Rashba effect on indium arsenide metal-oxide-semiconductor structure accumulation capacitance

    Science.gov (United States)

    Kovchavtsev, A. P.; Aksenov, M. S.; Tsarenko, A. V.; Nastovjak, A. E.; Pogosov, A. G.; Pokhabov, D. A.; Tereshchenko, O. E.; Valisheva, N. A.

    2018-05-01

    The accumulation capacitance oscillations behavior in the n-InAs metal-oxide-semiconductor structures with different densities of the built-in charge (Dbc) and the interface traps (Dit) at temperature 4.2 K in the magnetic field (B) 2-10 T, directed perpendicular to the semiconductor-dielectric interface, is studied. A decrease in the oscillation frequency and an increase in the capacitance oscillation amplitude are observed with the increase in B. At the same time, for a certain surface accumulation band bending, the influence of the Rashba effect, which is expressed in the oscillations decay and breakdown, is traced. The experimental capacitance-voltage curves are in a good agreement with the numeric simulation results of the self-consistent solution of Schrödinger and Poisson equations in the magnetic field, taking into account the quantization, nonparabolicity of dispersion law, and Fermi-Dirac electron statistics, with the allowance for the Rashba effect. The Landau quantum level broadening in a two-dimensional electron gas (Lorentzian-shaped density of states), due to the electron scattering mechanism, linearly depends on the magnetic field. The correlation between the interface electronic properties and the characteristic scattering times was established.

  8. Effect of Water Vapor and Surface Morphology on the Low Temperature Response of Metal Oxide Semiconductor Gas Sensors

    Directory of Open Access Journals (Sweden)

    Konrad Maier

    2015-09-01

    Full Text Available In this work the low temperature response of metal oxide semiconductor gas sensors is analyzed. Important characteristics of this low-temperature response are a pronounced selectivity to acid- and base-forming gases and a large disparity of response and recovery time constants which often leads to an integrator-type of gas response. We show that this kind of sensor performance is related to the trend of semiconductor gas sensors to adsorb water vapor in multi-layer form and that this ability is sensitively influenced by the surface morphology. In particular we show that surface roughness in the nanometer range enhances desorption of water from multi-layer adsorbates, enabling them to respond more swiftly to changes in the ambient humidity. Further experiments reveal that reactive gases, such as NO2 and NH3, which are easily absorbed in the water adsorbate layers, are more easily exchanged across the liquid/air interface when the humidity in the ambient air is high.

  9. Investigation of structural and electrical properties on substrate material for high frequency metal-oxide-semiconductor (MOS) devices

    Science.gov (United States)

    Kumar, M.; Yang, Sung-Hyun; Janardhan Reddy, K.; JagadeeshChandra, S. V.

    2017-04-01

    Hafnium oxide (HfO2) thin films were grown on cleaned P-type Ge and Si substrates by using atomic layer deposition technique (ALD) with thickness of 8 nm. The composition analysis of as-deposited and annealed HfO2 films was characterized by XPS, further electrical measurements; we fabricated the metal-oxide-semiconductor (MOS) devices with Pt electrode. Post deposition annealing in O2 ambient at 500 °C for 30 min was carried out on both Ge and Si devices. Capacitance-voltage (C-V) and conductance-voltage (G-V) curves measured at 1 MHz. The Ge MOS devices showed improved interfacial and electrical properties, high dielectric constant (~19), smaller EOT value (0.7 nm), and smaller D it value as Si MOS devices. The C-V curves shown significantly high accumulation capacitance values from Ge devices, relatively when compare with the Si MOS devices before and after annealing. It could be due to the presence of very thin interfacial layer at HfO2/Ge stacks than HfO2/Si stacks conformed by the HRTEM images. Besides, from current-voltage (I-V) curves of the Ge devices exhibited similar leakage current as Si devices. Therefore, Ge might be a reliable substrate material for structural, electrical and high frequency applications.

  10. Single-electron regime and Pauli spin blockade in a silicon metal-oxide-semiconductor double quantum dot

    Science.gov (United States)

    Rochette, Sophie; Ten Eyck, Gregory A.; Pluym, Tammy; Lilly, Michael P.; Carroll, Malcolm S.; Pioro-Ladrière, Michel

    2015-03-01

    Silicon quantum dots are promising candidates for quantum information processing as spin qubits with long coherence time. We present electrical transport measurements on a silicon metal-oxide-semiconductor (MOS) double quantum dot (DQD). First, Coulomb diamonds measurements demonstrate the one-electron regime at a relatively high temperature of 1.5 K. Then, the 8 mK stability diagram shows Pauli spin blockade with a large singlet-triplet separation of approximatively 0.40 meV, pointing towards a strong lifting of the valley degeneracy. Finally, numerical simulations indicate that by integrating a micro-magnet to those devices, we could achieve fast spin rotations of the order of 30 ns. Those results are part of the recent body of work demonstrating the potential of Si MOS DQD as reliable and long-lived spin qubits that could be ultimately integrated into modern electronic facilities. Sandia National Laboratories is a multi-program laboratory managed and operated by Sandia Corporation, a wholly owned subsidiary of Lockheed Martin Corporation, for the U.S. DOE's National Nuclear Security Administration under Contract DE-AC04-94AL85000.

  11. Metal contact engineering and registration-free fabrication of complementary metal-oxide semiconductor integrated circuits using aligned carbon nanotubes.

    Science.gov (United States)

    Wang, Chuan; Ryu, Koungmin; Badmaev, Alexander; Zhang, Jialu; Zhou, Chongwu

    2011-02-22

    Complementary metal-oxide semiconductor (CMOS) operation is very desirable for logic circuit applications as it offers rail-to-rail swing, larger noise margin, and small static power consumption. However, it remains to be a challenging task for nanotube-based devices. Here in this paper, we report our progress on metal contact engineering for n-type nanotube transistors and CMOS integrated circuits using aligned carbon nanotubes. By using Pd as source/drain contacts for p-type transistors, small work function metal Gd as source/drain contacts for n-type transistors, and evaporated SiO(2) as a passivation layer, we have achieved n-type transistor, PN diode, and integrated CMOS inverter with an air-stable operation. Compared with other nanotube n-doping techniques, such as potassium doping, PEI doping, hydrazine doping, etc., using low work function metal contacts for n-type nanotube devices is not only air stable but also integrated circuit fabrication compatible. Moreover, our aligned nanotube platform for CMOS integrated circuits shows significant advantage over the previously reported individual nanotube platforms with respect to scalability and reproducibility and suggests a practical and realistic approach for nanotube-based CMOS integrated circuit applications.

  12. Signatures of Quantized Energy States in Solution-Processed Ultrathin Layers of Metal-Oxide Semiconductors and Their Devices

    KAUST Repository

    Labram, John G.

    2015-02-13

    Physical phenomena such as energy quantization have to-date been overlooked in solution-processed inorganic semiconducting layers, owing to heterogeneity in layer thickness uniformity unlike some of their vacuum-deposited counterparts. Recent reports of the growth of uniform, ultrathin (<5 nm) metal-oxide semiconductors from solution, however, have potentially opened the door to such phenomena manifesting themselves. Here, a theoretical framework is developed for energy quantization in inorganic semiconductor layers with appreciable surface roughness, as compared to the mean layer thickness, and present experimental evidence of the existence of quantized energy states in spin-cast layers of zinc oxide (ZnO). As-grown ZnO layers are found to be remarkably continuous and uniform with controllable thicknesses in the range 2-24 nm and exhibit a characteristic widening of the energy bandgap with reducing thickness in agreement with theoretical predictions. Using sequentially spin-cast layers of ZnO as the bulk semiconductor and quantum well materials, and gallium oxide or organic self-assembled monolayers as the barrier materials, two terminal electronic devices are demonstrated, the current-voltage characteristics of which resemble closely those of double-barrier resonant-tunneling diodes. As-fabricated all-oxide/hybrid devices exhibit a characteristic negative-differential conductance region with peak-to-valley ratios in the range 2-7.

  13. Impact of process temperature on GaSb metal-oxide-semiconductor interface properties fabricated by ex-situ process

    Energy Technology Data Exchange (ETDEWEB)

    Yokoyama, Masafumi, E-mail: yokoyama@mosfet.t.u-tokyo.ac.jp; Takenaka, Mitsuru; Takagi, Shinichi [Department of Electrical Engineering and Information Systems, The University of Tokyo, Yayoi 2-11-16, Bunkyo, Tokyo 113-0032 (Japan); JST-CREST, Yayoi 2-11-16, Bunkyo, Tokyo 113-0032 (Japan); Asakura, Yuji [Department of Electrical Engineering and Information Systems, The University of Tokyo, Yayoi 2-11-16, Bunkyo, Tokyo 113-0032 (Japan); Yokoyama, Haruki [NTT Photonics Laboratories, NTT Corporation, Atsugi 243-0198 (Japan)

    2014-06-30

    We have studied the impact of process temperature on interface properties of GaSb metal-oxide-semiconductor (MOS) structures fabricated by an ex-situ atomic-layer-deposition (ALD) process. We have found that the ALD temperature strongly affects the Al{sub 2}O{sub 3}/GaSb MOS interface properties. The Al{sub 2}O{sub 3}/GaSb MOS interfaces fabricated at the low ALD temperature of 150 °C have the minimum interface-trap density (D{sub it}) of ∼4.5 × 10{sup 13 }cm{sup −2} eV{sup −1}. We have also found that the post-metalization annealing at temperature higher than 200 °C degrades the Al{sub 2}O{sub 3}/GaSb MOS interface properties. The low-temperature process is preferable in fabricating GaSb MOS interfaces in the ex-situ ALD process to avoid the high-temperature-induced degradations.

  14. Study of the tunnelling initiated leakage current through the carbon nanotube embedded gate oxide in metal oxide semiconductor structures

    International Nuclear Information System (INIS)

    Chakraborty, Gargi; Sarkar, C K; Lu, X B; Dai, J Y

    2008-01-01

    The tunnelling currents through the gate dielectric partly embedded with semiconducting single-wall carbon nanotubes in a silicon metal-oxide-semiconductor (MOS) structure have been investigated. The application of the gate voltage to such an MOS device results in the band bending at the interface of the partly embedded oxide dielectric and the surface of the silicon, initiating tunnelling through the gate oxide responsible for the gate leakage current whenever the thickness of the oxide is scaled. A model for silicon MOS structures, where carbon nanotubes are confined in a narrow layer embedded in the gate dielectric, is proposed to investigate the direct and the Fowler-Nordheim (FN) tunnelling currents of such systems. The idea of embedding such elements in the gate oxide is to assess the possibility for charge storage for memory device applications. Comparing the FN tunnelling onset voltage between the pure gate oxide and the gate oxide embedded with carbon nanotubes, it is found that the onset voltage decreases with the introduction of the nanotubes. The direct tunnelling current has also been studied at very low gate bias, for the thin oxide MOS structure which plays an important role in scaling down the MOS transistors. The FN tunnelling current has also been studied with varying nanotube diameter

  15. Ultrasonic fingerprint sensor using a piezoelectric micromachined ultrasonic transducer array integrated with complementary metal oxide semiconductor electronics

    Energy Technology Data Exchange (ETDEWEB)

    Lu, Y.; Fung, S.; Wang, Q.; Horsley, D. A. [Berkeley Sensor and Actuator Center, University of California, Davis, 1 Shields Avenue, Davis, California 95616 (United States); Tang, H.; Boser, B. E. [Berkeley Sensor and Actuator Center, University of California, Berkeley, California 94720 (United States); Tsai, J. M.; Daneman, M. [InvenSense, Inc., 1745 Technology Drive, San Jose, California 95110 (United States)

    2015-06-29

    This paper presents an ultrasonic fingerprint sensor based on a 24 × 8 array of 22 MHz piezoelectric micromachined ultrasonic transducers (PMUTs) with 100 μm pitch, fully integrated with 180 nm complementary metal oxide semiconductor (CMOS) circuitry through eutectic wafer bonding. Each PMUT is directly bonded to a dedicated CMOS receive amplifier, minimizing electrical parasitics and eliminating the need for through-silicon vias. The array frequency response and vibration mode-shape were characterized using laser Doppler vibrometry and verified via finite element method simulation. The array's acoustic output was measured using a hydrophone to be ∼14 kPa with a 28 V input, in reasonable agreement with predication from analytical calculation. Pulse-echo imaging of a 1D steel grating is demonstrated using electronic scanning of a 20 × 8 sub-array, resulting in 300 mV maximum received amplitude and 5:1 contrast ratio. Because the small size of this array limits the maximum image size, mechanical scanning was used to image a 2D polydimethylsiloxane fingerprint phantom (10 mm × 8 mm) at a 1.2 mm distance from the array.

  16. A Customized Metal Oxide Semiconductor-Based Gas Sensor Array for Onion Quality Evaluation: System Development and Characterization

    Directory of Open Access Journals (Sweden)

    Tharun Konduru

    2015-01-01

    Full Text Available A gas sensor array, consisting of seven Metal Oxide Semiconductor (MOS sensors that are sensitive to a wide range of organic volatile compounds was developed to detect rotten onions during storage. These MOS sensors were enclosed in a specially designed Teflon chamber equipped with a gas delivery system to pump volatiles from the onion samples into the chamber. The electronic circuit mainly comprised a microcontroller, non-volatile memory chip, and trickle-charge real time clock chip, serial communication chip, and parallel LCD panel. User preferences are communicated with the on-board microcontroller through a graphical user interface developed using LabVIEW. The developed gas sensor array was characterized and the discrimination potential was tested by exposing it to three different concentrations of acetone (ketone, acetonitrile (nitrile, ethyl acetate (ester, and ethanol (alcohol. The gas sensor array could differentiate the four chemicals of same concentrations and different concentrations within the chemical with significant difference. Experiment results also showed that the system was able to discriminate two concentrations (196 and 1964 ppm of methlypropyl sulfide and two concentrations (145 and 1452 ppm of 2-nonanone, two key volatile compounds emitted by rotten onions. As a proof of concept, the gas sensor array was able to achieve 89% correct classification of sour skin infected onions. The customized low-cost gas sensor array could be a useful tool to detect onion postharvest diseases in storage.

  17. Temperature Modulation with Specified Detection Point on Metal Oxide Semiconductor Gas Sensors for E-Nose Application

    Directory of Open Access Journals (Sweden)

    Arief SUDARMAJI

    2015-03-01

    Full Text Available Temperature modulation technique, some called dynamic measurement mode, on Metal-Oxide Semiconductor (MOS/MOX gas sensor has been widely observed and employed in many fields. We present its development, a Specified Detection Point (SDP on modulated sensing element of MOS sensor is applied which associated to its temperature modulation, temperature modulation-SDP so-named. We configured the rectangular modulation signal for MOS gas sensors (TGSs and FISs using PSOC CY8C28445-24PVXI (Programmable System on Chip which also functioned as acquisition unit and interface to a computer. Initial responses and selectivity evaluations were performed using statistical tool and Principal Component Analysis (PCA to differ sample gases (Toluene, Ethanol and Ammonia on dynamic chamber measurement under various frequencies (0.25 Hz, 1 Hz, 4 Hz and duty-cycles (25 %, 50 %, 75 %. We found that at lower frequency the response waveform of the sensors becomes more sloping and distinct, and selected modulations successfully increased the selectivity either on singular or array sensors rather than static temperature measurement.

  18. Nonvolatile memory characteristics in metal-oxide-semiconductors containing metal nanoparticles fabricated by using a unique laser irradiation method

    International Nuclear Information System (INIS)

    Yang, JungYup; Yoon, KapSoo; Kim, JuHyung; Choi, WonJun; Do, YoungHo; Kim, ChaeOk; Hong, JinPyo

    2006-01-01

    Metal-oxide-semiconductor (MOS) capacitors with metal nanoparticles (Co NP) were successfully fabricated by utilizing an external laser exposure technique for application of non-volatile memories. Images of high-resolution transmission electron microscopy reveal that the spherically shaped Co NP are clearly embedded in the gate oxide layer. Capacitance-voltage measurements exhibit typical charging and discharging effects with a large flat-band shift. The effects of the tunnel oxide thickness and the different tunnel materials are analyzed using capacitance-voltage and retention characteristics. In addition, the memory characteristics of the NP embedded in a high-permittivity material are investigated because the thickness of conventionally available SiO 2 gates is approaching the quantum tunneling limit as devices are scaled down. Finally, the suitability of NP memory devices for nonvolatile memory applications is also discussed. The present results suggest that our unique laser exposure technique holds promise for the NP formation as floating gate elements in nonvolatile NP memories and that the quality of the tunnel oxide is very important for enhancing the retention properties of nonvolatile memory.

  19. Study of Si/Si, Si/SiO2, and metal-oxide-semiconductor (MOS) using positrons

    International Nuclear Information System (INIS)

    Leung, To Chi.

    1991-01-01

    A variable-energy positron beam is used to study Si/Si, Si/SiO 2 , and metal-oxide-semiconductor (MOS) structures. The capability of depth resolution and the remarkable sensitivity to defects have made the positron annihilation technique a unique tool in detecting open-volume defects in the newly innovated low temperature (300C) molecular-beam-epitaxy (MBE) Si/Si. These two features of the positron beam have further shown its potential role in the study of the Si/SiO 2 . Distinct annihilation characteristics has been observed at the interface and has been studied as a function of the sample growth conditions, annealing (in vacuum), and hydrogen exposure. The MOS structure provides an effective way to study the electrical properties of the Si/SiO 2 interface as a function of applied bias voltage. The annihilation characteristics show a large change as the device condition is changed from accumulation to inversion. The effect of forming gas (FG) anneal is studied using positron annihilation and the result is compared with capacitance-voltage (C-V) measurements. The reduction in the number of interface states is found correlated with the changes in the positron spectra. The present study shows the importance of the positron annihilation technique as a non-contact, non-destructive, and depth-sensitive characterization tool to study the Si-related systems, in particular, the Si/SiO 2 interface which is of crucial importance in semiconductor technology, and fundamental understanding of the defects responsible for degradation of the electrical properties

  20. Practical Use of Metal Oxide Semiconductor Gas Sensors for Measuring Nitrogen Dioxide and Ozone in Urban Environments.

    Science.gov (United States)

    Peterson, Philip J D; Aujla, Amrita; Grant, Kirsty H; Brundle, Alex G; Thompson, Martin R; Vande Hey, Josh; Leigh, Roland J

    2017-07-19

    The potential of inexpensive Metal Oxide Semiconductor (MOS) gas sensors to be used for urban air quality monitoring has been the topic of increasing interest in the last decade. This paper discusses some of the lessons of three years of experience working with such sensors on a novel instrument platform (Small Open General purpose Sensor (SOGS)) in the measurement of atmospheric nitrogen dioxide and ozone concentrations. Analytic methods for increasing long-term accuracy of measurements are discussed, which permit nitrogen dioxide measurements with 95% confidence intervals of 20.0 μ g m - 3 and ozone precision of 26.8 μ g m - 3 , for measurements over a period one month away from calibration, averaged over 18 months of such calibrations. Beyond four months from calibration, sensor drift becomes significant, and accuracy is significantly reduced. Successful calibration schemes are discussed with the use of controlled artificial atmospheres complementing deployment on a reference weather station exposed to the elements. Manufacturing variation in the attributes of individual sensors are examined, an experiment possible due to the instrument being equipped with pairs of sensors of the same kind. Good repeatability (better than 0.7 correlation) between individual sensor elements is shown. The results from sensors that used fans to push air past an internal sensor element are compared with mounting the sensors on the outside of the enclosure, the latter design increasing effective integration time to more than a day. Finally, possible paths forward are suggested for improving the reliability of this promising sensor technology for measuring pollution in an urban environment.

  1. Metal-oxide-semiconductor capacitors and Schottky diodes studied with scanning microwave microscopy at 18 GHz

    Energy Technology Data Exchange (ETDEWEB)

    Kasper, M. [Christian Doppler Laboratory for Nanoscale Methods in Biophysics, Johannes Kepler University of Linz, Gruberstrasse 40, 4020 Linz (Austria); Gramse, G. [Biophysics Institute, Johannes Kepler University of Linz, Gruberstrasse 40, 4020 Linz (Austria); Hoffmann, J. [METAS, National Metrology Institute of Switzerland, Lindenweg 50, 3003 Bern-Wabern (Switzerland); Gaquiere, C. [MC2 technologies, 5 rue du Colibri, 59650 Villeneuve D' ascq (France); Feger, R.; Stelzer, A. [Institute for Communications Engineering and RF-Systems, Johannes Kepler University, Altenberger Str. 69, 4040 Linz (Austria); Smoliner, J. [Vienna University of Technology, Institute for Solid State Electronics, Floragasse 7, 1040 Vienna (Austria); Kienberger, F., E-mail: ferry-kienberger@keysight.com [Keysight Technologies Austria, Measurement Research Lab, Gruberstrasse 40, 4020 Linz (Austria)

    2014-11-14

    We measured the DC and RF impedance characteristics of micrometric metal-oxide-semiconductor (MOS) capacitors and Schottky diodes using scanning microwave microscopy (SMM). The SMM consisting of an atomic force microscopy (AFM) interfaced with a vector network analyser (VNA) was used to measure the reflection S11 coefficient of the metallic MOS and Schottky contact pads at 18 GHz as a function of the tip bias voltage. By controlling the SMM biasing conditions, the AFM tip was used to bias the Schottky contacts between reverse and forward mode. In reverse bias direction, the Schottky contacts showed mostly a change in the imaginary part of the admittance while in forward bias direction the change was mostly in the real part of the admittance. Reference MOS capacitors which are next to the Schottky diodes on the same sample were used to calibrate the SMM S11 data and convert it into capacitance values. Calibrated capacitance between 1–10 fF and 1/C{sup 2} spectroscopy curves were acquired on the different Schottky diodes as a function of the DC bias voltage following a linear behavior. Additionally, measurements were done directly with the AFM-tip in contact with the silicon substrate forming a nanoscale Schottky contact. Similar capacitance-voltage curves were obtained but with smaller values (30–300 aF) due to the corresponding smaller AFM-tip diameter. Calibrated capacitance images of both the MOS and Schottky contacts were acquired with nanoscale resolution at different tip-bias voltages.

  2. Graphene field-effect devices

    Science.gov (United States)

    Echtermeyer, T. J.; Lemme, M. C.; Bolten, J.; Baus, M.; Ramsteiner, M.; Kurz, H.

    2007-09-01

    In this article, graphene is investigated with respect to its electronic properties when introduced into field effect devices (FED). With the exception of manual graphene deposition, conventional top-down CMOS-compatible processes are applied. Few and monolayer graphene sheets are characterized by scanning electron microscopy, atomic force microscopy and Raman spectroscopy. The electrical properties of monolayer graphene sandwiched between two silicon dioxide films are studied. Carrier mobilities in graphene pseudo-MOS structures are compared to those obtained from double-gated Graphene-FEDs and silicon metal-oxide-semiconductor field-effect-transistors (MOSFETs).

  3. Design of nanophotonic, hot-electron solar-blind ultraviolet detectors with a metal-oxide-semiconductor structure

    International Nuclear Information System (INIS)

    Wang, Zhiyuan; Wang, Xiaoxin; Liu, Jifeng

    2014-01-01

    Solar-blind ultraviolet (UV) detection refers to photon detection specifically in the wavelength range of 200 nm–320 nm. Without background noises from solar radiation, it has broad applications from homeland security to environmental monitoring. The most commonly used solid state devices for this application are wide band gap (WBG) semiconductor photodetectors (Eg > 3.5 eV). However, WBG semiconductors are difficult to grow and integrate with Si readout integrated circuits (ROICs). In this paper, we design a nanophotonic metal-oxide-semiconductor structure on Si for solar-blind UV detectors. Instead of using semiconductors as the active absorber, we use Sn nano-grating structures to absorb UV photons and generate hot electrons for internal photoemission across the Sn/SiO 2 interfacial barrier, thereby generating photocurrent between the metal and the n-type Si region upon UV excitation. Moreover, the transported hot electron has an excess kinetic energy >3 eV, large enough to induce impact ionization and generate another free electron in the conduction band of n-Si. This process doubles the quantum efficiency. On the other hand, the large metal/oxide interfacial energy barrier (>3.5 eV) also enables solar-blind UV detection by blocking the less energetic electrons excited by visible photons. With optimized design, ∼75% UV absorption and hot electron excitation can be achieved within the mean free path of ∼20 nm from the metal/oxide interface. This feature greatly enhances hot electron transport across the interfacial barrier to generate photocurrent. The simple geometry of the Sn nano-gratings and the MOS structure make it easy to fabricate and integrate with Si ROICs compared to existing solar-blind UV detection schemes. The presented device structure also breaks through the conventional notion that photon absorption by metal is always a loss in solid-state photodetectors, and it can potentially be extended to other active metal photonic devices. (paper)

  4. Comment on "Performance of a spin based insulated gate field effect transistor" [cond-mat/0603260] [cond-mat/0603260

    OpenAIRE

    Bandyopadhyay, S.; Cahay, M.

    2006-01-01

    In a recent e-print [cond-mat/0603260] Hall and Flatte claim that a particular spin based field effect transistor (SPINFET), which they have analyzed, will have a lower threshold voltage, lower switching energy and lower leakage current than a comparable metal oxide semiconductor field effect transistor (MOSFET). Here, we show that all three claims of HF are invalid.

  5. Electrical analysis of high dielectric constant insulator and metal gate metal oxide semiconductor capacitors on flexible bulk mono-crystalline silicon

    KAUST Repository

    Ghoneim, Mohamed T.

    2015-06-01

    We report on the electrical study of high dielectric constant insulator and metal gate metal oxide semiconductor capacitors (MOSCAPs) on a flexible ultra-thin (25 μm) silicon fabric which is peeled off using a CMOS compatible process from a standard bulk mono-crystalline silicon substrate. A lifetime projection is extracted using statistical analysis of the ramping voltage (Vramp) breakdown and time dependent dielectric breakdown data. The obtained flexible MOSCAPs operational voltages satisfying the 10 years lifetime benchmark are compared to those of the control MOSCAPs, which are not peeled off from the silicon wafer. © 2014 IEEE.

  6. Anomalous output characteristic shift for the n-type lateral diffused metal-oxide-semiconductor transistor with floating P-top layer

    International Nuclear Information System (INIS)

    Liu, Siyang; Zhang, Chunwei; Sun, Weifeng; Su, Wei; Wang, Shaorong; Ma, Shulang; Huang, Yu

    2014-01-01

    Anomalous output characteristic shift of the n-type lateral diffused metal-oxide-semiconductor transistor with floating P-top layer is investigated. It shows that the linear drain current has obvious decrease when the output characteristic of fresh device is measured for two consecutive times. The charge pumping experiments demonstrate that the decrease is not from hot-carrier degradation. The reduction of cross section area for the current flowing, which results from the squeezing of the depletion region surrounding the P-top layer, is responsible for the shift. Consequently, the current capability of this special device should be evaluated by the second measured output characteristic

  7. Anomalous output characteristic shift for the n-type lateral diffused metal-oxide-semiconductor transistor with floating P-top layer

    Energy Technology Data Exchange (ETDEWEB)

    Liu, Siyang; Zhang, Chunwei; Sun, Weifeng, E-mail: swffrog@seu.edu.cn [National ASIC System Engineering Research Center, Southeast University, Nanjing 210096 (China); Su, Wei; Wang, Shaorong; Ma, Shulang; Huang, Yu [CSMC Technologies Corporation, Wuxi 214061 (China)

    2014-04-14

    Anomalous output characteristic shift of the n-type lateral diffused metal-oxide-semiconductor transistor with floating P-top layer is investigated. It shows that the linear drain current has obvious decrease when the output characteristic of fresh device is measured for two consecutive times. The charge pumping experiments demonstrate that the decrease is not from hot-carrier degradation. The reduction of cross section area for the current flowing, which results from the squeezing of the depletion region surrounding the P-top layer, is responsible for the shift. Consequently, the current capability of this special device should be evaluated by the second measured output characteristic.

  8. Performance enhancement in uniaxially tensile stressed GeSn n-channel fin tunneling field-effect transistor: Impact of stress direction

    Science.gov (United States)

    Wang, Hongjuan; Han, Genquan; Jiang, Xiangwei; Liu, Yan; Zhang, Chunfu; Zhang, Jincheng; Hao, Yue

    2017-04-01

    In this work, the boosting effect on the performance of GeSn n-channel fin tunneling FET (nFinTFET) enabled by uniaxial tensile stress is investigated theoretically. As the fin rotates within the (001) plane, the uniaxial tensile stress is always along its direction. The electrical characteristics of tensile-stressed GeSn nFinTFETs with point and line tunneling modes are computed utilizing the technology computer aided design (TCAD) simulator in which the dynamic nonlocal band-to-band tunneling (BTBT) algorithm is employed. In comparison with the relaxed devices, tensile-stressed GeSn nFinTFETs achieve a substantial enhancement in band-to-band tunneling generation rate (G BTBT) and on-state current I ON owing to the reduced bandgap E G induced by the tensile stress. Performance improvement of GeSn nFinTFETs induced by tensile stress demonstrates a strong dependence on channel direction and tunneling modes. Under the same magnitude of stress, line-nFinTFETs obtain a more pronounced I ON enhancement over the transistors with point tunneling mode.

  9. Memory characteristics of Au nanocrystals embedded in metal-oxide-semiconductor structure by using atomic-layer-deposited Al2O3 as control oxide

    International Nuclear Information System (INIS)

    Wang, C.-C.; Chiou, Y.-K.; Chang, C.-H.; Tseng, J.-Y.; Wu, L.-J.; Chen, C.-Y.; Wu, T.-B.

    2007-01-01

    The nonvolatile memory characteristics of metal-oxide-semiconductor (MOS) structures containing Au nanocrystals in the Al 2 O 3 /SiO 2 matrix were studied. In this work, we have demonstrated that the use of Al 2 O 3 as control oxide prepared by atomic-layer-deposition enhances the erase speed of the MOS capacitors. A giant capacitance-voltage hysteresis loop and a very short erase time which is lower than 1 ms can be obtained. Compared with the conventional floating-gate electrically erasable programmable read-only memories, the erase speed was promoted drastically. In addition, very low leakage current and large turn-around voltage resulting from electrons or holes stored in the Au nanocrystals were found in the current-voltage relation of the MOS capacitors

  10. Direct observation of both contact and remote oxygen scavenging of GeO2 in a metal-oxide-semiconductor stack

    International Nuclear Information System (INIS)

    Fadida, S.; Shekhter, P.; Eizenberg, M.; Cvetko, D.; Floreano, L.; Verdini, A.; Nyns, L.; Van Elshocht, S.; Kymissis, I.

    2014-01-01

    In the path to incorporating Ge based metal-oxide-semiconductor into modern nano-electronics, one of the main issues is the oxide-semiconductor interface quality. Here, the reactivity of Ti on Ge stacks and the scavenging effect of Ti were studied using synchrotron X-ray photoelectron spectroscopy measurements, with an in-situ metal deposition and high resolution transmission electron microscopy imaging. Oxygen removal from the Ge surface was observed both in direct contact as well as remotely through an Al 2 O 3 layer. The scavenging effect was studied in situ at room temperature and after annealing. We find that the reactivity of Ti can be utilized for improved scaling of Ge based devices.

  11. Structural and electrical characteristics of high-k/metal gate metal oxide semiconductor capacitors fabricated on flexible, semi-transparent silicon (100) fabric

    KAUST Repository

    Rojas, Jhonathan Prieto

    2013-02-12

    In pursuit of flexible computers with high performance devices, we demonstrate a generic process to fabricate 10 000 metal-oxide-semiconductor capacitors (MOSCAPs) with semiconductor industry\\'s most advanced high-k/metal gate stacks on widely used, inexpensive bulk silicon (100) wafers and then using a combination of iso-/anisotropic etching to release the top portion of the silicon with the already fabricated devices as a mechanically flexible (bending curvature of 133 m−1), optically semi-transparent silicon fabric (1.5 cm × 3 cm × 25 μm). The electrical characteristics show 3.7 nm effective oxide thickness, −0.2 V flat band voltage, and no hysteresis from the fabricated MOSCAPs.

  12. Bimodal gate-dielectric deposition for improved performance of AlGaN/GaN metal-oxide-semiconductor high-electron-mobility transistors

    International Nuclear Information System (INIS)

    Pang Liang; Kim, Kyekyoon

    2012-01-01

    A bimodal deposition scheme combining radiofrequency magnetron sputtering and plasma enhanced chemical vapour deposition (PECVD) is proposed as a means for improving the performance of GaN-based metal-oxide-semiconductor high-electron-mobility transistors (MOSHEMTs). High-density sputtered-SiO 2 is utilized to reduce the gate leakage current and enhance the breakdown voltage while low-density PECVD-SiO 2 is employed to buffer the sputtering damage and further increase the drain current by engineering the stress-induced-polarization. Thus-fabricated MOSHEMT exhibited a low leakage current of 4.21 × 10 -9 A mm -1 and high breakdown voltage of 634 V for a gate-drain distance of 6 µm, demonstrating the promise of bimodal-SiO 2 deposition scheme for the development of GaN-based MOSHEMTs for high-power application. (paper)

  13. Temperature Dependent Electrical Transport in Al/Poly(4-vinyl phenol/p-GaAs Metal-Oxide-Semiconductor by Sol-Gel Spin Coating Method

    Directory of Open Access Journals (Sweden)

    Şadan Özden

    2016-01-01

    Full Text Available Deposition of poly(4-vinyl phenol insulator layer is carried out by applying the spin coating technique onto p-type GaAs substrate so as to create Al/poly(4-vinyl phenol/p-GaAs metal-oxide-semiconductor (MOS structure. Temperature was set to 80–320 K while the current-voltage (I-V characteristics of the structure were examined in the study. Ideality factor (n and barrier height (ϕb values found in the experiment ranged from 3.13 and 0.616 eV (320 K to 11.56 and 0.147 eV (80 K. Comparing the thermionic field emission theory and thermionic emission theory, the temperature dependent ideality factor behavior displayed that thermionic field emission theory is more valid than the latter. The calculated tunneling energy was 96 meV.

  14. First-principles simulations of the leakage current in metal-oxide-semiconductor structures caused by oxygen vacancies in HfO2 high-K gate dielectric

    International Nuclear Information System (INIS)

    Mao, L.F.; Wang, Z.O.

    2008-01-01

    HfO 2 high-K gate dielectric has been used as a new gate dielectric in metal-oxide-semiconductor structures. First-principles simulations are used to study the effects of oxygen vacancies on the tunneling current through the oxide. A level which is nearly 1.25 eV from the bottom of the conduction band is introduced into the bandgap due to the oxygen vacancies. The tunneling current calculations show that the tunneling currents through the gate oxide with different defect density possess the typical characteristic of stress-induced leakage current. Further analysis shows that the location of oxygen vacancies will have a marked effect on the tunneling current. The largest increase in the tunneling current caused by oxygen vacancies comes about at the middle oxide field when defects are located at the middle of the oxide. (copyright 2008 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim) (orig.)

  15. Structural and electrical characteristics of high-k/metal gate metal oxide semiconductor capacitors fabricated on flexible, semi-transparent silicon (100) fabric

    KAUST Repository

    Rojas, Jhonathan Prieto; Hussain, Muhammad Mustafa; Sevilla, Galo T.

    2013-01-01

    In pursuit of flexible computers with high performance devices, we demonstrate a generic process to fabricate 10 000 metal-oxide-semiconductor capacitors (MOSCAPs) with semiconductor industry's most advanced high-k/metal gate stacks on widely used, inexpensive bulk silicon (100) wafers and then using a combination of iso-/anisotropic etching to release the top portion of the silicon with the already fabricated devices as a mechanically flexible (bending curvature of 133 m−1), optically semi-transparent silicon fabric (1.5 cm × 3 cm × 25 μm). The electrical characteristics show 3.7 nm effective oxide thickness, −0.2 V flat band voltage, and no hysteresis from the fabricated MOSCAPs.

  16. Enhancement mode GaN-based multiple-submicron channel array gate-recessed fin metal-oxide-semiconductor high-electron mobility transistors

    Science.gov (United States)

    Lee, Ching-Ting; Wang, Chun-Chi

    2018-04-01

    To study the function of channel width in multiple-submicron channel array, we fabricated the enhancement mode GaN-based gate-recessed fin metal-oxide-semiconductor high-electron mobility transistors (MOS-HEMTs) with a channel width of 450 nm and 195 nm, respectively. In view of the enhanced gate controllability in a narrower fin-channel structure, the transconductance was improved from 115 mS/mm to 151 mS/mm, the unit gain cutoff frequency was improved from 6.2 GHz to 6.8 GHz, and the maximum oscillation frequency was improved from 12.1 GHz to 13.1 GHz of the devices with a channel width of 195 nm, compared with the devices with a channel width of 450 nm.

  17. Wafer-scale laser pantography: Fabrication of n-metal-oxide-semiconductor transistors and small-scale integrated circuits by direct-write laser-induced pyrolytic reactions

    International Nuclear Information System (INIS)

    McWilliams, B.M.; Herman, I.P.; Mitlitsky, F.; Hyde, R.A.; Wood, L.L.

    1983-01-01

    A complete set of processes sufficient for manufacture of n-metal-oxide-semiconductor (n-MOS) transistors by a laser-induced direct-write process has been demonstrated separately, and integrated to yield functional transistors. Gates and interconnects were fabricated of various combinations of n-doped and intrinsic polysilicon, tungsten, and tungsten silicide compounds. Both 0.1-μm and 1-μm-thick gate oxides were micromachined with and without etchant gas, and the exposed p-Si [100] substrate was cleaned and, at times, etched. Diffusion regions were doped by laser-induced pyrolytic decomposition of phosphine followed by laser annealing. Along with the successful manufacture of working n-MOS transistors and a set of elementary digital logic gates, this letter reports the successful use of several laser-induced surface reactions that have not been reported previously

  18. Fluorination of Metal Phthalocyanines: Single-Crystal Growth, Efficient N-Channel Organic Field-Effect Transistors, and Structure-Property Relationships

    Science.gov (United States)

    Jiang, Hui; Ye, Jun; Hu, Peng; Wei, Fengxia; Du, Kezhao; Wang, Ning; Ba, Te; Feng, Shuanglong; Kloc, Christian

    2014-01-01

    The fluorination of p-type metal phthalocyanines produces n-type semiconductors, allowing the design of organic electronic circuits that contain inexpensive heterojunctions made from chemically and thermally stable p- and n-type organic semiconductors. For the evaluation of close to intrinsic transport properties, high-quality centimeter-sized single crystals of F16CuPc, F16CoPc and F16ZnPc have been grown. New crystal structures of F16CuPc, F16CoPc and F16ZnPc have been determined. Organic single-crystal field-effect transistors have been fabricated to study the effects of the central metal atom on their charge transport properties. The F16ZnPc has the highest electron mobility (~1.1 cm2 V−1 s−1). Theoretical calculations indicate that the crystal structure and electronic structure of the central metal atom determine the transport properties of fluorinated metal phthalocyanines. PMID:25524460

  19. Co-integration of nano-scale vertical- and horizontal-channel metal-oxide-semiconductor field-effect transistors for low power CMOS technology.

    Science.gov (United States)

    Sun, Min-Chul; Kim, Garam; Kim, Sang Wan; Kim, Hyun Woo; Kim, Hyungjin; Lee, Jong-Ho; Shin, Hyungcheol; Park, Byung-Gook

    2012-07-01

    In order to extend the conventional low power Si CMOS technology beyond the 20-nm node without SOI substrates, we propose a novel co-integration scheme to build horizontal- and vertical-channel MOSFETs together and verify the idea using TCAD simulations. From the fabrication viewpoint, it is highlighted that this scheme provides additional vertical devices with good scalability by adding a few steps to the conventional CMOS process flow for fin formation. In addition, the benefits of the co-integrated vertical devices are investigated using a TCAD device simulation. From this study, it is confirmed that the vertical device shows improved off-current control and a larger drive current when the body dimension is less than 20 nm, due to the electric field coupling effect at the double-gated channel. Finally, the benefits from the circuit design viewpoint, such as the larger midpoint gain and beta and lower power consumption, are confirmed by the mixed-mode circuit simulation study.

  20. Temperature dependence of frequency dispersion in III–V metal-oxide-semiconductor C-V and the capture/emission process of border traps

    Energy Technology Data Exchange (ETDEWEB)

    Vais, Abhitosh, E-mail: Abhitosh.Vais@imec.be; Martens, Koen; DeMeyer, Kristin [Department of Electrical Engineering, KU Leuven, B-3000 Leuven (Belgium); IMEC, Kapeldreef 75, B-3001 Leuven (Belgium); Lin, Han-Chung; Ivanov, Tsvetan; Collaert, Nadine; Thean, Aaron [IMEC, Kapeldreef 75, B-3001 Leuven (Belgium); Dou, Chunmeng [Frontier Research Center, Tokyo Institute of Technology, Yokohama 226-8502 (Japan); Xie, Qi; Maes, Jan [ASM International, B-3001 Leuven (Belgium); Tang, Fu; Givens, Michael [ASM International, Phoenix, Arizona 85034-7200 (United States); Raskin, Jean-Pierre [Institute of Information and Communication Technologies, Electronics and Applied Mathematics, Universiteé Catholique de Louvain, B-1348 Louvain-la-Neuve (Belgium)

    2015-08-03

    This paper presents a detailed investigation of the temperature dependence of frequency dispersion observed in capacitance-voltage (C-V) measurements of III-V metal-oxide-semiconductor (MOS) devices. The dispersion in the accumulation region of the capacitance data is found to change from 4%–9% (per decade frequency) to ∼0% when the temperature is reduced from 300 K to 4 K in a wide range of MOS capacitors with different gate dielectrics and III-V substrates. We show that such significant temperature dependence of C-V frequency dispersion cannot be due to the temperature dependence of channel electrostatics, i.e., carrier density and surface potential. We also show that the temperature dependence of frequency dispersion, and hence, the capture/emission process of border traps can be modeled by a combination of tunneling and a “temperature-activated” process described by a non-radiative multi-phonon model, instead of a widely believed single-step elastic tunneling process.

  1. Investigation of 'surface donors' in Al2O3/AlGaN/GaN metal-oxide-semiconductor heterostructures: Correlation of electrical, structural, and chemical properties

    Science.gov (United States)

    Ťapajna, M.; Stoklas, R.; Gregušová, D.; Gucmann, F.; Hušeková, K.; Haščík, Š.; Fröhlich, K.; Tóth, L.; Pécz, B.; Brunner, F.; Kuzmík, J.

    2017-12-01

    III-N surface polarization compensating charge referred here to as 'surface donors' (SD) was analyzed in Al2O3/AlGaN/GaN metal-oxide-semiconductor (MOS) heterojunctions using scaled oxide films grown by metal-organic chemical vapor deposition at 600 °C. We systematically investigated impact of HCl pre-treatment prior to oxide deposition and post-deposition annealing (PDA) at 700 °C. SD density was reduced down to 1.9 × 1013 cm-2 by skipping HCl pre-treatment step as compared to 3.3 × 1013 cm-2 for structures with HCl pre-treatment followed by PDA. The nature and origin of SD was then analyzed based on the correlation between electrical, micro-structural, and chemical properties of the Al2O3/GaN interfaces with different SD density (NSD). From the comparison between distributions of interface traps of MOS heterojunction with different NSD, it is demonstrated that SD cannot be attributed to interface trapped charge. Instead, variation in the integrity of the GaOx interlayer confirmed by X-ray photoelectron spectroscopy is well correlated with NSD, indicating SD may be formed by border traps at the Al2O3/GaOx interface.

  2. Accuracy of dielectric-dependent hybrid functionals in the prediction of optoelectronic properties of metal oxide semiconductors: a comprehensive comparison with many-body GW and experiments

    Science.gov (United States)

    Gerosa, M.; E Bottani, C.; Di Valentin, C.; Onida, G.; Pacchioni, G.

    2018-01-01

    Understanding the electronic structure of metal oxide semiconductors is crucial to their numerous technological applications, such as photoelectrochemical water splitting and solar cells. The needed experimental and theoretical knowledge goes beyond that of pristine bulk crystals, and must include the effects of surfaces and interfaces, as well as those due to the presence of intrinsic defects (e.g. oxygen vacancies), or dopants for band engineering. In this review, we present an account of the recent efforts in predicting and understanding the optoelectronic properties of oxides using ab initio theoretical methods. In particular, we discuss the performance of recently developed dielectric-dependent hybrid functionals, providing a comparison against the results of many-body GW calculations, including G 0 W 0 as well as more refined approaches, such as quasiparticle self-consistent GW. We summarize results in the recent literature for the band gap, the band level alignment at surfaces, and optical transition energies in defective oxides, including wide gap oxide semiconductors and transition metal oxides. Correlated transition metal oxides are also discussed. For each method, we describe successes and drawbacks, emphasizing the challenges faced by the development of improved theoretical approaches. The theoretical section is preceded by a critical overview of the main experimental techniques needed to characterize the optoelectronic properties of semiconductors, including absorption and reflection spectroscopy, photoemission, and scanning tunneling spectroscopy (STS).

  3. The Impact of HCl Precleaning and Sulfur Passivation on the Al2O3/Ge Interface in Ge Metal-Oxide-Semiconductor Capacitors

    International Nuclear Information System (INIS)

    Xue Bai-Qing; Chang Hu-Dong; Sun Bing; Wang Sheng-Kai; Liu Hong-Gang

    2012-01-01

    Surface treatment for Ge substrates using hydrogen chlorine cleaning and chemical passivation are investigated on AuTi/Al 2 O 3 /Ge metal-oxide-semiconductor capacitors. After hydrogen chlorine cleaning, a smooth Ge surface almost free from native oxide is demonstrated by atomic force microscopy and x-ray photoelectron spectroscopy observations. Passivation using a hydrogen chlorine solution is found to form a chlorine-terminated surface, while aqueous ammonium sulfide pretreatment results in a surface terminated by Ge-S bonding. Compared with chlorine-passivated samples, the sulfur-passivated ones show less frequency dispersion and better thermal stability based on capacitance-voltage characterizations. The samples with HCl pre-cleaning and (NH 4 ) 2 S passivation show less frequency dispersion than the HF pre-cleaning and (NH 4 ) 2 S passivated ones. The surface treatment process using hydrogen chlorine cleaning followed by aqueous ammonium sulfide passivation demonstrates a promising way to improve gate dielectric/Ge interface quality. (condensed matter: structure, mechanical and thermal properties)

  4. Technology breakthroughs in high performance metal-oxide-semiconductor devices for ultra-high density, low power non-volatile memory applications

    Science.gov (United States)

    Hong, Augustin Jinwoo

    Non-volatile memory devices have attracted much attention because data can be retained without power consumption more than a decade. Therefore, non-volatile memory devices are essential to mobile electronic applications. Among state of the art non-volatile memory devices, NAND flash memory has earned the highest attention because of its ultra-high scalability and therefore its ultra-high storage capacity. However, human desire as well as market competition requires not only larger storage capacity but also lower power consumption for longer battery life time. One way to meet this human desire and extend the benefits of NAND flash memory is finding out new materials for storage layer inside the flash memory, which is called floating gate in the state of the art flash memory device. In this dissertation, we study new materials for the floating gate that can lower down the power consumption and increase the storage capacity at the same time. To this end, we employ various materials such as metal nanodot, metal thin film and graphene incorporating complementary-metal-oxide-semiconductor (CMOS) compatible processes. Experimental results show excellent memory effects at relatively low operating voltages. Detailed physics and analysis on experimental results are discussed. These new materials for data storage can be promising candidates for future non-volatile memory application beyond the state of the art flash technologies.

  5. Capacitance characteristics of metal-oxide-semiconductor capacitors with a single layer of embedded nickel nanoparticles for the application of nonvolatile memory

    International Nuclear Information System (INIS)

    Wei, Li; Ling, Xu; Wei-Ming, Zhao; Hong-Lin, Ding; Zhong-Yuan, Ma; Jun, Xu; Kun-Ji, Chen

    2010-01-01

    This paper reports that metal-oxide-semiconductor (MOS) capacitors with a single layer of Ni nanoparticles were successfully fabricated by using electron-beam evaporation and rapid thermal annealing for application to nonvolatile memory. Experimental scanning electron microscopy images showed that Ni nanoparticles of about 5 nm in diameter were clearly embedded in the SiO 2 layer on p-type Si (100). Capacitance–voltage measurements of the MOS capacitor show large flat-band voltage shifts of 1.8 V, which indicate the presence of charge storage in the nickel nanoparticles. In addition, the charge-retention characteristics of MOS capacitors with Ni nanoparticles were investigated by using capacitance–time measurements. The results showed that there was a decay of the capacitance embedded with Ni nanoparticles for an electron charge after 10 4 s. But only a slight decay of the capacitance originating from hole charging was observed. The present results indicate that this technique is promising for the efficient formation or insertion of metal nanoparticles inside MOS structures. (condensed matter: electronic structure, electrical, magnetic, and optical properties)

  6. Demonstration of AlGaN/GaN metal-oxide-semiconductor high-electron-mobility transistors with silicon-oxy-nitride as the gate insulator

    International Nuclear Information System (INIS)

    Balachander, K.; Arulkumaran, S.; Egawa, T.; Sano, Y.; Baskar, K.

    2005-01-01

    AlGaN/GaN metal-oxide-semiconductor high-electron-mobility transistors (MOSHEMTs) were fabricated with plasma enhanced chemical vapor deposited silicon oxy-nitride (SiON) as an insulating layer. The compositions of SiON thin films were confirmed using X-ray photoelectron spectroscopy. The fabricated MOSHEMTs exhibited a very high saturation current density of 1.1 A/mm coupled with high positive operational gate voltage up to +7 V. The MOSHEMTs also exhibited four orders of low gate leakage current and high forward-on voltage when compared with the conventional HEMTs. The drain current collapse using gate pulse measurements showed only a negligible difference in the saturation current density revealing the drastic improvement in passivation of the surface states due to the high quality of dielectric thin films deposited. Thus, based on the improved direct-current operation, SiON can be considered to be a potential gate oxide comparable with other dielectric insulators

  7. Optimization of Vertical Double-Diffused Metal-Oxide Semiconductor (VDMOS) Power Transistor Structure for Use in High Frequencies and Medical Devices.

    Science.gov (United States)

    Farhadi, Rozita; Farhadi, Bita

    2014-01-01

    Power transistors, such as the vertical, double-diffused, metal-oxide semiconductor (VDMOS), are used extensively in the amplifier circuits of medical devices. The aim of this research was to construct a VDMOS power transistor with an optimized structure to enhance the operation of medical devices. First, boron was implanted in silicon by implanting unclamped inductive switching (UIS) and a Faraday shield. The Faraday shield was implanted in order to replace the gate-field parasitic capacitor on the entry part of the device. Also, implanting the UIS was used in order to decrease the effect of parasitic bipolar junction transistor (BJT) of the VDMOS power transistor. The research tool used in this study was Silvaco software. By decreasing the transistor entry resistance in the optimized VDMOS structure, power losses and noise at the entry of the transistor were decreased, and, by increasing the breakdown voltage, the lifetime of the VDMOS transistor lifetime was increased, which resulted in increasing drain flow and decreasing Ron. This consequently resulted in enhancing the operation of high-frequency medical devices that use transistors, such as Radio Frequency (RF) and electrocardiograph machines.

  8. GaAs metal-oxide-semiconductor based non-volatile flash memory devices with InAs quantum dots as charge storage nodes

    Energy Technology Data Exchange (ETDEWEB)

    Islam, Sk Masiul, E-mail: masiulelt@gmail.com; Chowdhury, Sisir; Sarkar, Krishnendu; Nagabhushan, B.; Banerji, P. [Materials Science Centre, Indian Institute of Technology, Kharagpur 721 302 (India); Chakraborty, S. [Applied Materials Science Division, Saha Institute of Nuclear Physics, 1/AF Bidhannagar, Sector-I, Kolkata 700 064 (India); Mukherjee, Rabibrata [Department of Chemical Engineering, Indian Institute of Technology, Kharagpur 721302 (India)

    2015-06-24

    Ultra-thin InP passivated GaAs metal-oxide-semiconductor based non-volatile flash memory devices were fabricated using InAs quantum dots (QDs) as charge storing elements by metal organic chemical vapor deposition technique to study the efficacy of the QDs as charge storage elements. The grown QDs were embedded between two high-k dielectric such as HfO{sub 2} and ZrO{sub 2}, which were used for tunneling and control oxide layers, respectively. The size and density of the QDs were found to be 5 nm and 1.8×10{sup 11} cm{sup −2}, respectively. The device with a structure Metal/ZrO{sub 2}/InAs QDs/HfO{sub 2}/GaAs/Metal shows maximum memory window equivalent to 6.87 V. The device also exhibits low leakage current density of the order of 10{sup −6} A/cm{sup 2} and reasonably good charge retention characteristics. The low value of leakage current in the fabricated memory device is attributed to the Coulomb blockade effect influenced by quantum confinement as well as reduction of interface trap states by ultra-thin InP passivation on GaAs prior to HfO{sub 2} deposition.

  9. Decrease in effective electron mobility in the channel of a metal-oxide-semiconductor transistor as the gate length is decreased

    International Nuclear Information System (INIS)

    Frantsuzov, A. A.; Boyarkina, N. I.; Popov, V. P.

    2008-01-01

    Effective electron mobility μ eff in channels of metal-oxide-semiconductor transistors with a gate length L in the range of 3.8 to 0.34 μm was measured; the transistors were formed on wafers of the silicon-oninsulator type. It was found that μ eff decreases as L is decreased. It is shown that this decrease can be accounted for by the effect of series resistances of the source and drain only if it is assumed that there is a rapid increase in these resistances as the gate voltage is decreased. This assumption is difficult to substantiate. A more realistic model is suggested; this model accounts for the observed decrease in μ eff as L is decreased. The model implies that zones with a mobility lower than that in the middle part of the channel originate at the edges of the gate. An analysis shows that, in this case, the plot of the dependence of 1/μ eff on 1/L should be linear, which is exactly what is observed experimentally. The use of this plot makes it possible to determine both the electron mobility μ 0 in the middle part of the channel and the quantity A that characterizes the zones with lowered mobility at the gate’s edges.

  10. Determination of bulk and interface density of states in metal oxide semiconductor thin-film transistors by using capacitance-voltage characteristics

    Science.gov (United States)

    Wei, Xixiong; Deng, Wanling; Fang, Jielin; Ma, Xiaoyu; Huang, Junkai

    2017-10-01

    A physical-based straightforward extraction technique for interface and bulk density of states in metal oxide semiconductor thin film transistors (TFTs) is proposed by using the capacitance-voltage (C-V) characteristics. The interface trap density distribution with energy has been extracted from the analysis of capacitance-voltage characteristics. Using the obtained interface state distribution, the bulk trap density has been determined. With this method, for the interface trap density, it is found that deep state density nearing the mid-gap is approximately constant and tail states density increases exponentially with energy; for the bulk trap density, it is a superposition of exponential deep states and exponential tail states. The validity of the extraction is verified by comparisons with the measured current-voltage (I-V) characteristics and the simulation results by the technology computer-aided design (TCAD) model. This extraction method uses non-numerical iteration which is simple, fast and accurate. Therefore, it is very useful for TFT device characterization.

  11. Atomic Layer Deposition of Gallium Oxide Films as Gate Dielectrics in AlGaN/GaN Metal-Oxide-Semiconductor High-Electron-Mobility Transistors.

    Science.gov (United States)

    Shih, Huan-Yu; Chu, Fu-Chuan; Das, Atanu; Lee, Chia-Yu; Chen, Ming-Jang; Lin, Ray-Ming

    2016-12-01

    In this study, films of gallium oxide (Ga2O3) were prepared through remote plasma atomic layer deposition (RP-ALD) using triethylgallium and oxygen plasma. The chemical composition and optical properties of the Ga2O3 thin films were investigated; the saturation growth displayed a linear dependence with respect to the number of ALD cycles. These uniform ALD films exhibited excellent uniformity and smooth Ga2O3-GaN interfaces. An ALD Ga2O3 film was then used as the gate dielectric and surface passivation layer in a metal-oxide-semiconductor high-electron-mobility transistor (MOS-HEMT), which exhibited device performance superior to that of a corresponding conventional Schottky gate HEMT. Under similar bias conditions, the gate leakage currents of the MOS-HEMT were two orders of magnitude lower than those of the conventional HEMT, with the power-added efficiency enhanced by up to 9 %. The subthreshold swing and effective interfacial state density of the MOS-HEMT were 78 mV decade(-1) and 3.62 × 10(11) eV(-1) cm(-2), respectively. The direct-current and radio-frequency performances of the MOS-HEMT device were greater than those of the conventional HEMT. In addition, the flicker noise of the MOS-HEMT was lower than that of the conventional HEMT.

  12. AlGaN/GaN Metal-Oxide-Semiconductor High-Electron-Mobility Transistor with Polarized P(VDF-TrFE) Ferroelectric Polymer Gating

    Science.gov (United States)

    Liu, Xinke; Lu, Youming; Yu, Wenjie; Wu, Jing; He, Jiazhu; Tang, Dan; Liu, Zhihong; Somasuntharam, Pannirselvam; Zhu, Deliang; Liu, Wenjun; Cao, Peijiang; Han, Sun; Chen, Shaojun; Seow Tan, Leng

    2015-01-01

    Effect of a polarized P(VDF-TrFE) ferroelectric polymer gating on AlGaN/GaN metal-oxide-semiconductor high-electron-mobility transistors (MOS-HEMTs) was investigated. The P(VDF-TrFE) gating in the source/drain access regions of AlGaN/GaN MOS-HEMTs was positively polarized (i.e., partially positively charged hydrogen were aligned to the AlGaN surface) by an applied electric field, resulting in a shift-down of the conduction band at the AlGaN/GaN interface. This increases the 2-dimensional electron gas (2-DEG) density in the source/drain access region of the AlGaN/GaN heterostructure, and thereby reduces the source/drain series resistance. Detailed material characterization of the P(VDF-TrFE) ferroelectric film was also carried out using the atomic force microscopy (AFM), X-ray Diffraction (XRD), and ferroelectric hysteresis loop measurement. PMID:26364872

  13. Epitaxial ZnO gate dielectrics deposited by RF sputter for AlGaN/GaN metal-oxide-semiconductor high-electron-mobility transistors

    Science.gov (United States)

    Yoon, Seonno; Lee, Seungmin; Kim, Hyun-Seop; Cha, Ho-Young; Lee, Hi-Deok; Oh, Jungwoo

    2018-01-01

    Radio frequency (RF)-sputtered ZnO gate dielectrics for AlGaN/GaN metal-oxide-semiconductor high-electron-mobility transistors (MOS-HEMTs) were investigated with varying O2/Ar ratios. The ZnO deposited with a low oxygen content of 4.5% showed a high dielectric constant and low interface trap density due to the compensation of oxygen vacancies during the sputtering process. The good capacitance-voltage characteristics of ZnO-on-AlGaN/GaN capacitors resulted from the high crystallinity of oxide at the interface, as investigated by x-ray diffraction and high-resolution transmission electron microscopy. The MOS-HEMTs demonstrated comparable output electrical characteristics with conventional Ni/Au HEMTs but a lower gate leakage current. At a gate voltage of -20 V, the typical gate leakage current for a MOS-HEMT with a gate length of 6 μm and width of 100 μm was found to be as low as 8.2 × 10-7 mA mm-1, which was three orders lower than that of the Ni/Au Schottky gate HEMT. The reduction of the gate leakage current improved the on/off current ratio by three orders of magnitude. These results indicate that RF-sputtered ZnO with a low O2/Ar ratio is a good gate dielectric for high-performance AlGaN/GaN MOS-HEMTs.

  14. Note: A disposable x-ray camera based on mass produced complementary metal-oxide-semiconductor sensors and single-board computers

    Energy Technology Data Exchange (ETDEWEB)

    Hoidn, Oliver R.; Seidler, Gerald T., E-mail: seidler@uw.edu [Physics Department, University of Washington, Seattle, Washington 98195 (United States)

    2015-08-15

    We have integrated mass-produced commercial complementary metal-oxide-semiconductor (CMOS) image sensors and off-the-shelf single-board computers into an x-ray camera platform optimized for acquisition of x-ray spectra and radiographs at energies of 2–6 keV. The CMOS sensor and single-board computer are complemented by custom mounting and interface hardware that can be easily acquired from rapid prototyping services. For single-pixel detection events, i.e., events where the deposited energy from one photon is substantially localized in a single pixel, we establish ∼20% quantum efficiency at 2.6 keV with ∼190 eV resolution and a 100 kHz maximum detection rate. The detector platform’s useful intrinsic energy resolution, 5-μm pixel size, ease of use, and obvious potential for parallelization make it a promising candidate for many applications at synchrotron facilities, in laser-heating plasma physics studies, and in laboratory-based x-ray spectrometry.

  15. Novel Dry-Type Glucose Sensor Based on a Metal-Oxide-Semiconductor Capacitor Structure with Horseradish Peroxidase + Glucose Oxidase Catalyzing Layer

    Science.gov (United States)

    Lin, Jing-Jenn; Wu, You-Lin; Hsu, Po-Yen

    2007-10-01

    In this paper, we present a novel dry-type glucose sensor based on a metal-oxide-semiconductor capacitor (MOSC) structure using SiO2 as a gate dielectric in conjunction with a horseradish peroxidase (HRP) + glucose oxidase (GOD) catalyzing layer. The tested glucose solution was dropped directly onto the window opened on the SiO2 layer, with a coating of HRP + GOD catalyzing layer on top of the gate dielectric. From the capacitance-voltage (C-V) characteristics of the sensor, we found that the glucose solution can induce an inversion layer on the silicon surface causing a gate leakage current flowing along the SiO2 surface. The gate current changes Δ I before and after the drop of glucose solution exhibits a near-linear relationship with increasing glucose concentration. The Δ I sensitivity is about 1.76 nA cm-2 M-1, and the current is quite stable 20 min after the drop of the glucose solution is tested.

  16. Effects of Y incorporation in TaON gate dielectric on electrical performance of GaAs metal-oxide-semiconductor capacitor

    Energy Technology Data Exchange (ETDEWEB)

    Liu, Li Ning; Choi, Hoi Wai; Lai, Pui To [Department of Electrical and Electronic Engineering, The University of Hong Kong (China); Xu, Jing Ping [School of Optical and Electronic Information, Huazhong University of Science and Technology, Wuhan (China)

    2016-09-15

    In this study, GaAs metal-oxide-semiconductor (MOS) capacitors using Y-incorporated TaON as gate dielectric have been investigated. Experimental results show that the sample with a Y/(Y + Ta) atomic ratio of 27.6% exhibits the best device characteristics: high k value (22.9), low interfacestate density (9.0 x 10{sup 11} cm{sup -2} eV{sup -1}), small flatband voltage (1.05 V), small frequency dispersion and low gate leakage current (1.3 x 10{sup -5}A/cm{sup 2} at V{sub fb} + 1 V). These merits should be attributed to the complementary properties of Y{sub 2}O{sub 3} and Ta{sub 2}O{sub 5}:Y can effectively passivate the large amount of oxygen vacancies in Ta{sub 2}O{sub 5}, while the positively-charged oxygen vacancies in Ta{sub 2}O{sub 5} are capable of neutralizing the effects of the negative oxide charges in Y{sub 2}O{sub 3}. This work demonstrates that an appropriate doping of Y content in TaON gate dielectric can effectively improve the electrical performance for GaAs MOS devices. (copyright 2016 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim)

  17. Comparison of modification strategies towards enhanced charge carrier separation and photocatalytic degradation activity of metal oxide semiconductors (TiO2, WO3 and ZnO)

    Science.gov (United States)

    Kumar, S. Girish; Rao, K. S. R. Koteswara

    2017-01-01

    Metal oxide semiconductors (TiO2, WO3 and ZnO) finds unparalleled opportunity in wastewater purification under UV/visible light, largely encouraged by their divergent admirable features like stability, non-toxicity, ease of preparation, suitable band edge positions and facile generation of active oxygen species in the aqueous medium. However, the perennial failings of these photocatalysts emanates from the stumbling blocks like rapid charge carrier recombination and meager visible light response. In this review, tailoring the surface-bulk electronic structure through the calibrated and veritable approaches such as impurity doping, deposition with noble metals, sensitizing with other compounds (dyes, polymers, inorganic complexes and simple chelating ligands), hydrogenation process (annealing under hydrogen atmosphere), electronic integration with other semiconductors, modifying with carbon nanostructures, designing with exposed facets and tailoring with hierarchical morphologies to overcome their critical drawbacks are summarized. Taking into account the materials intrinsic properties, the pros and cons together with similarities and striking differences for each strategy in specific to TiO2, WO3 & ZnO are highlighted. These subtlety enunciates the primacy for improving the structure-electronic properties of metal oxides and credence to its fore in the practical applications. Future research must focus on comparing the performances of ZnO, TiO2 and WO3 in parallel to get insight into their photocatalytic behaviors. Such comparisons not only reveal the changed surface-electronic structure upon various modifications, but also shed light on charge carrier dynamics, free radical generation, structural stability and compatibility for photocatalytic reactions. It is envisioned that these cardinal tactics have profound implications and can be replicated to other semiconductor photocatalysts like CeO2, In2O3, Bi2O3, Fe2O3, BiVO4, AgX, BiOX (X = Cl, Br & I), Bi2WO6, Bi2MoO6

  18. Electroluminescence color tuning between green and red from metal-oxide-semiconductor devices fabricated by spin-coating of rare-earth (terbium + europium) organic compounds on silicon

    Science.gov (United States)

    Matsuda, Toshihiro; Hattori, Fumihiro; Iwata, Hideyuki; Ohzone, Takashi

    2018-04-01

    Color tunable electroluminescence (EL) from metal-oxide-semiconductor devices with the rare-earth elements Tb and Eu is reported. Organic compound liquid sources of (Tb + Ba) and Eu with various Eu/Tb ratios from 0.001 to 0.4 were spin-coated on an n+-Si substrate and annealed to form an oxide insulator layer. The EL spectra had only peaks corresponding to the intrashell Tb3+/Eu3+ transitions in the spectral range from green to red, and the intensity ratio of the peaks was appropriately tuned using the appropriate Eu/Tb ratios in liquid sources. Consequently, the EL emission colors linearly changed from yellowish green to yellowish orange and eventually to reddish orange on the CIE chromaticity diagram. The gate current +I G current also affected the EL colors for the medium-Eu/Tb-ratio device. The structure of the surface insulator films analyzed by cross-sectional transmission electron microscopy (TEM), X-ray diffraction (XRD) analysis, and X-ray photoelectron spectroscopy (XPS) has four layers, namely, (Tb4O7 + Eu2O3), [Tb4O7 + Eu2O3 + (Tb/Eu/Ba)SiO x ], (Tb/Eu/Ba)SiO x , and SiO x -rich oxide. The EL mechanism proposed is that electrons injected from the Si substrate into the SiO x -rich oxide and Tb/Eu/Ba-silicate layers become hot electrons accelerated in a high electric field, and then these hot electrons excite Tb3+ and Eu3+ ions in the Tb4O7/Eu2O3 layers resulting in EL emission from Tb3+ and Eu3+ intrashell transitions.

  19. Comparative analysis of oxide phase formation and its effects on electrical properties of SiO{sub 2}/InSb metal-oxide-semiconductor structures

    Energy Technology Data Exchange (ETDEWEB)

    Lee, Jaeyel [Department of Materials Science and Engineering, Seoul National University, Seoul 151-744 (Korea, Republic of); Park, Sehun [Department of Materials Science and Engineering, Seoul National University, Seoul 151-744 (Korea, Republic of); WCU Hybrid Materials Program, Department of Materials Science and Engineering, Seoul National University, Seoul 151-744 (Korea, Republic of); Kim, Jungsub; Yang, Changjae; Kim, Sujin; Seok, Chulkyun [Department of Materials Science and Engineering, Seoul National University, Seoul 151-744 (Korea, Republic of); Park, Jinsub [Department of Electronic Engineering, Hanyang University, Seoul 133-791 (Korea, Republic of); Yoon, Euijoon, E-mail: eyoon@snu.ac.kr [Department of Materials Science and Engineering, Seoul National University, Seoul 151-744 (Korea, Republic of); WCU Hybrid Materials Program, Department of Materials Science and Engineering, Seoul National University, Seoul 151-744 (Korea, Republic of); Department of Nano Science and Technology, Graduate School of Convergence Science and Technology, Seoul National University, Suwon 443-270 (Korea, Republic of); Energy Semiconductor Research Center, Advanced Institutes of Convergence Technology, Seoul National University, Suwon 443-270 (Korea, Republic of)

    2012-06-01

    We report on the changes in the interfacial phases between SiO{sub 2} and InSb caused by various deposition temperatures and heat treatments. X-ray photoelectron spectroscopy (XPS) and Raman spectroscopy were used to evaluate the relative amount of each phase present at the interface. The effect of interfacial phases on the electrical properties of SiO{sub 2}/InSb metal-oxide-semiconductor (MOS) structures was investigated by capacitance-voltage (C-V) measurements. The amount of both In and Sb oxides increased with the deposition temperature. The amount of interfacial In oxide was larger for all samples, regardless of the deposition and annealing temperatures and times. In particular, the annealed samples contained less than half the amount of Sb oxide compared with the as-deposited samples, indicating a strong interfacial reaction between Sb oxide and the InSb substrate during annealing. The interface trap density sharply increased for deposition temperatures above 240 Degree-Sign C. The C-V measurements and Raman spectroscopy indicated that elemental Sb accumulation due to the interfacial reaction of Sb oxide with InSb substrate was responsible for the increased interfacial trap densities in these SiO{sub 2}/InSb MOS structures. - Highlights: Black-Right-Pointing-Pointer We report the quantitative analysis of interfacial oxides at the SiO{sub 2}/InSb interface. Black-Right-Pointing-Pointer Interfacial oxides were measured quantitatively by X-ray Photoelectron Spectroscopy. Black-Right-Pointing-Pointer As-grown and annealed samples showed different compositions of oxide phases. Black-Right-Pointing-Pointer Considerable reduction of antimony oxide phases was observed during annealing. Black-Right-Pointing-Pointer Interface trap densities at the SiO{sub 2}/InSb interface were calculated.

  20. Damage free Ar ion plasma surface treatment on In{sub 0.53}Ga{sub 0.47}As-on-silicon metal-oxide-semiconductor device

    Energy Technology Data Exchange (ETDEWEB)

    Koh, Donghyi; Shin, Seung Heon; Ahn, Jaehyun; Sonde, Sushant; Banerjee, Sanjay K. [Department of Electrical and Computer Engineering, Microelectronics Research Center, The University of Texas at Austin, 10100 Burnet Road, Austin, Texas 78758 (United States); Kwon, Hyuk-Min [SK Hynix, Icheon, 2091, Gyeongchung-daero, Bubal-eub, Icheon-si, Gyeonggi-do 136-1 (Korea, Republic of); Orzali, Tommaso; Kim, Tae-Woo, E-mail: twkim78@gmail.com [SEMATECH Inc., 257 Fuller Rd #2200, Albany, New York 12203 (United States); Kim, Dae-Hyun [Kyungpook National University, 80, Daehak-ro, Buk-gu, Daegu 702-701 (Korea, Republic of)

    2015-11-02

    In this paper, we investigated the effect of in-situ Ar ion plasma surface pre-treatment in order to improve the interface properties of In{sub 0.53}Ga{sub 0.47}As for high-κ top-gate oxide deposition. X-ray photoelectron spectroscopy (XPS) and metal-oxide-semiconductor capacitors (MOSCAPs) demonstrate that Ar ion treatment removes the native oxide on In{sub 0.53}Ga{sub 0.47}As. The XPS spectra of Ar treated In{sub 0.53}Ga{sub 0.47}As show a decrease in the AsO{sub x} and GaO{sub x} signal intensities, and the MOSCAPs show higher accumulation capacitance (C{sub acc}), along with reduced frequency dispersion. In addition, Ar treatment is found to suppress the interface trap density (D{sub it}), which thereby led to a reduction in the threshold voltage (V{sub th}) degradation during constant voltage stress and relaxation. These results outline the potential of surface treatment for III-V channel metal-oxide-semiconductor devices and application to non-planar device process.

  1. Physical and electrical characteristics of AlGaN/GaN metal-oxide-semiconductor high-electron-mobility transistors with rare earth Er2O3 as a gate dielectric

    International Nuclear Information System (INIS)

    Lin, Ray-Ming; Chu, Fu-Chuan; Das, Atanu; Liao, Sheng-Yu; Chou, Shu-Tsun; Chang, Liann-Be

    2013-01-01

    In this study, the rare earth erbium oxide (Er 2 O 3 ) was deposited using an electron beam onto an AlGaN/GaN heterostructure to fabricate metal-oxide-semiconductor high-electron-mobility transistors (MOS–HEMTs) that exhibited device performance superior to that of a conventional HEMT. Under similar bias conditions, the gate leakage currents of these MOS–HEMT devices were four orders of magnitude lower than those of conventional Schottky gate HEMTs. The measured sub-threshold swing (SS) and the effective trap state density (N t ) of the MOS–HEMT were 125 mV/decade and 4.3 × 10 12 cm −2 , respectively. The dielectric constant of the Er 2 O 3 layer in this study was 14, as determined through capacitance–voltage measurements. In addition, the gate–source reverse breakdown voltage increased from –166 V for the conventional HEMT to –196 V for the Er 2 O 3 MOS–HEMT. - Highlights: ► GaN/AlGaN/Er 2 O 3 metal-oxide semiconductor high electron mobility transistor ► Physical and electrical characteristics are presented. ► Electron beam evaporated Er 2 O 3 with excellent surface roughness ► Device exhibits reduced gate leakage current and improved I ON /I OFF ratio

  2. Manipulating Conduction in Metal Oxide Semiconductors: Mechanism Investigation and Conductance Tuning in Doped Fe2O3 Hematite and Metal/Ga2O3/Metal Heterostructure

    Science.gov (United States)

    Zhao, Bo

    This study aims at understanding the fundamental mechanisms of conduction in several metal oxide semiconductors, namely alpha-Fe2O 3 and beta-Ga2O3, and how it could be tuned to desired values/states to enable a wide range of application. In the first effort, by adding Ti dopant, we successfully turned Fe2O3 from insulating to conductive by fabricated compositionally and structurally well-defined epitaxial alpha-(TixFe1-x)2 O3(0001) films for x ≤ 0.09. All films were grown by oxygen plasma assisted molecular beam epitaxy on Al2O3(0001) sapphire substrate with a buffer layer of Cr2O3 to relax the strain from lattice mismatch. Van der Pauw resistivity and Hall effect measurements reveal carrier concentrations between 1019 and 1020 cm-3 at room temperature and mobilities in the range of 0.1 to 0.6 cm2/V˙s. Such low mobility, unlike conventional band-conduction semiconductor, was attributed to hopping mechanism due to strong electron-phonon interaction in the lattice. More interestingly, conduction mechanism transitions from small-polaron hopping at higher temperatures to variable range hopping at lower temperatures with a transition temperature between 180 to 140 K. Consequently, by adding Ti dopant, conductive Fe 2O3 hematite thin films were achieved with a well-understood conducting mechanism that could guide further device application such as spin transistor and water splitting. In the case of Ga2O3, while having a band gap as high as 5 eV, they are usually conductive for commercially available samples due to unintentional Si doping. However, we discovered the conductance could be repeatedly switched between high resistance state and low resistance state when made into metal/Ga2O3 /metal heterostructure. However, to obtain well controlled switching process with consistent switching voltages and resistances, understanding switching mechanism is the key. In this study, we fabricated resistive switching devices utilizing a Ni/Ga2O3/Ir heterostructure. Bipolar

  3. High performance Si nanowire field-effect-transistors based on a CMOS inverter with tunable threshold voltage.

    Science.gov (United States)

    Van, Ngoc Huynh; Lee, Jae-Hyun; Sohn, Jung Inn; Cha, Seung Nam; Whang, Dongmok; Kim, Jong Min; Kang, Dae Joon

    2014-05-21

    We successfully fabricated nanowire-based complementary metal-oxide semiconductor (NWCMOS) inverter devices by utilizing n- and p-type Si nanowire field-effect-transistors (NWFETs) via a low-temperature fabrication processing technique. We demonstrate that NWCMOS inverter devices can be operated at less than 1 V, a significantly lower voltage than that of typical thin-film based complementary metal-oxide semiconductor (CMOS) inverter devices. This low-voltage operation was accomplished by controlling the threshold voltage of the n-type Si NWFETs through effective management of the nanowire (NW) doping concentration, while realizing high voltage gain (>10) and ultra-low static power dissipation (≤3 pW) for high-performance digital inverter devices. This result offers a viable means of fabricating high-performance, low-operation voltage, and high-density digital logic circuits using a low-temperature fabrication processing technique suitable for next-generation flexible electronics.

  4. Silicon nanotube field effect transistor with core-shell gate stacks for enhanced high-performance operation and area scaling benefits

    KAUST Repository

    Fahad, Hossain M.

    2011-10-12

    We introduce the concept of a silicon nanotube field effect transistor whose unique core-shell gate stacks help achieve full volume inversion by giving a surge in minority carrier concentration in the near vicinity of the ultrathin channel and at the same time rapid roll-off at the source and drain junctions constituting velocity saturation-induced higher drive current-enhanced high performance per device with efficient real estate consumption. The core-shell gate stacks also provide superior short channel effects control than classical planar metal oxide semiconductor field effect transistor (MOSFET) and gate-all-around nanowire FET. The proposed device offers the true potential to be an ideal blend for quantum ballistic transport study of device property control by bottom-up approach and high-density integration compatibility using top-down state-of-the-art complementary metal oxide semiconductor flow. © 2011 American Chemical Society.

  5. Silicon nanotube field effect transistor with core-shell gate stacks for enhanced high-performance operation and area scaling benefits

    KAUST Repository

    Fahad, Hossain M.; Smith, Casey; Rojas, Jhonathan Prieto; Hussain, Muhammad Mustafa

    2011-01-01

    We introduce the concept of a silicon nanotube field effect transistor whose unique core-shell gate stacks help achieve full volume inversion by giving a surge in minority carrier concentration in the near vicinity of the ultrathin channel and at the same time rapid roll-off at the source and drain junctions constituting velocity saturation-induced higher drive current-enhanced high performance per device with efficient real estate consumption. The core-shell gate stacks also provide superior short channel effects control than classical planar metal oxide semiconductor field effect transistor (MOSFET) and gate-all-around nanowire FET. The proposed device offers the true potential to be an ideal blend for quantum ballistic transport study of device property control by bottom-up approach and high-density integration compatibility using top-down state-of-the-art complementary metal oxide semiconductor flow. © 2011 American Chemical Society.

  6. Improved linearity and reliability in GaN metal-oxide-semiconductor high-electron-mobility transistors using nanolaminate La2O3/SiO2 gate dielectric

    Science.gov (United States)

    Hsu, Ching-Hsiang; Shih, Wang-Cheng; Lin, Yueh-Chin; Hsu, Heng-Tung; Hsu, Hisang-Hua; Huang, Yu-Xiang; Lin, Tai-Wei; Wu, Chia-Hsun; Wu, Wen-Hao; Maa, Jer-Shen; Iwai, Hiroshi; Kakushima, Kuniyuki; Chang, Edward Yi

    2016-04-01

    Improved device performance to enable high-linearity power applications has been discussed in this study. We have compared the La2O3/SiO2 AlGaN/GaN metal-oxide-semiconductor high-electron-mobility transistors (MOS-HEMTs) with other La2O3-based (La2O3/HfO2, La2O3/CeO2 and single La2O3) MOS-HEMTs. It was found that forming lanthanum silicate films can not only improve the dielectric quality but also can improve the device characteristics. The improved gate insulation, reliability, and linearity of the 8 nm La2O3/SiO2 MOS-HEMT were demonstrated.

  7. Potential of carbon nanotube field effect transistors for analogue circuits

    KAUST Repository

    Hayat, Khizar

    2013-05-11

    This Letter presents a detailed comparison of carbon nanotube field effect transistors (CNFETs) and metal oxide semiconductor field effect transistors (MOSFETs) with special focus on carbon nanotube FET\\'s potential for implementing analogue circuits in the mm-wave and sub-terahertz range. The latest CNFET lithographic dimensions place it at-par with complementary metal oxide semiconductor in terms of current handling capability, whereas the forecasted improvement in the lithography enables the CNFETs to handle more than twice the current of MOSFETs. The comparison of RF parameters shows superior performance of CNFETs with a g m , f T and f max of 2.7, 2.6 and 4.5 times higher, respectively. MOSFET- and CNFET-based inverter, three-stage ring oscillator and LC oscillator have been designed and compared as well. The CNFET-based inverters are found to be ten times faster, the ring oscillator demonstrates three times higher oscillation frequency and CNFET-based LC oscillator also shows improved performance than its MOSFET counterpart.

  8. Potential of carbon nanotube field effect transistors for analogue circuits

    KAUST Repository

    Hayat, Khizar; Cheema, Hammad; Shamim, Atif

    2013-01-01

    This Letter presents a detailed comparison of carbon nanotube field effect transistors (CNFETs) and metal oxide semiconductor field effect transistors (MOSFETs) with special focus on carbon nanotube FET's potential for implementing analogue circuits in the mm-wave and sub-terahertz range. The latest CNFET lithographic dimensions place it at-par with complementary metal oxide semiconductor in terms of current handling capability, whereas the forecasted improvement in the lithography enables the CNFETs to handle more than twice the current of MOSFETs. The comparison of RF parameters shows superior performance of CNFETs with a g m , f T and f max of 2.7, 2.6 and 4.5 times higher, respectively. MOSFET- and CNFET-based inverter, three-stage ring oscillator and LC oscillator have been designed and compared as well. The CNFET-based inverters are found to be ten times faster, the ring oscillator demonstrates three times higher oscillation frequency and CNFET-based LC oscillator also shows improved performance than its MOSFET counterpart.

  9. Operation of SOI P-Channel Field Effect Transistors, CHT-PMOS30, under Extreme Temperatures

    Science.gov (United States)

    Patterson, Richard; Hammoud, Ahmad

    2009-01-01

    Electronic systems are required to operate under extreme temperatures in NASA planetary exploration and deep space missions. Electronics on-board spacecraft must also tolerate thermal cycling between extreme temperatures. Thermal management means are usually included in today s spacecraft systems to provide adequate temperature for proper operation of the electronics. These measures, which may include heating elements, heat pipes, radiators, etc., however add to the complexity in the design of the system, increases its cost and weight, and affects its performance and reliability. Electronic parts and circuits capable of withstanding and operating under extreme temperatures would reflect in improvement in system s efficiency, reducing cost, and improving overall reliability. Semiconductor chips based on silicon-on-insulator (SOI) technology are designed mainly for high temperature applications and find extensive use in terrestrial well-logging fields. Their inherent design offers advantages over silicon devices in terms of reduced leakage currents, less power consumption, faster switching speeds, and good radiation tolerance. Little is known, however, about their performance at cryogenic temperatures and under wide thermal swings. Experimental investigation on the operation of SOI, N-channel field effect transistors under wide temperature range was reported earlier [1]. This work examines the performance of P-channel devices of these SOI transistors. The electronic part investigated in this work comprised of a Cissoid s CHT-PMOS30, high temperature P-channel MOSFET (metal-oxide semiconductor field-effect transistor) device [2]. This high voltage, medium-power transistor is designed for geothermal well logging applications, aerospace and avionics, and automotive industry, and is specified for operation in the temperature range of -55 C to +225 C. Table I shows some specifications of this transistor [2]. The CHT-PMOS30 device was characterized at various temperatures

  10. Effect of graded InGaN drain region and 'In' fraction in InGaN channel on performances of InGaN tunnel field-effect transistor

    Science.gov (United States)

    Duan, Xiaoling; Zhang, Jincheng; Wang, Shulong; Quan, Rudai; Hao, Yue

    2017-12-01

    An InGaN-based graded drain region tunnel field-effect transistor (GD-TFET) is proposed to suppress the ambipolar behavior. The simulation results with the trade-off between on-state current (Ion) and ambipolar current (Iambipolar) show decreased Iambipolar (1.9 × 10-14 A/μm) in comparison with that of conventional TFETs (2.0 × 10-8 A/μm). Furthermore, GD-TFET with high 'In' fraction InxGa1-xN source-side channel (SC- GD-TFET) is explored and exhibits 5.3 times Ion improvement and 60% average subthreshold swing (SSavg) reduction in comparison with GD-TFET by adjusting 'In' fraction in the InxGa1-xN source-side channel. The improvement is attributed to the confinement of BTBT in the source-side channel by the heterojunction. And then, the optimum value for source-side channel length (Lsc) is researched by DC performances results, which shows it falls into the range between Lsc = 10 nm and 20 nm.

  11. Fabrication and electrical properties of metal-oxide semiconductor capacitors based on polycrystalline p-Cu{sub x}O and HfO{sub 2}/SiO{sub 2} high-{kappa} stack gate dielectrics

    Energy Technology Data Exchange (ETDEWEB)

    Zou Xiao [Department of Electronic Science and Technology, School of Physical Science and Technology, Wuhan University, Wuhan, 430074 (China); Department of Electromachine Engineering, Jianghan University, Wuhan, 430056 (China); Fang Guojia, E-mail: gjfang@whu.edu.c [Department of Electronic Science and Technology, School of Physical Science and Technology, Wuhan University, Wuhan, 430074 (China); Yuan Longyan; Liu Nishuang; Long Hao; Zhao Xingzhong [Department of Electronic Science and Technology, School of Physical Science and Technology, Wuhan University, Wuhan, 430074 (China)

    2010-05-31

    Polycrystalline p-type Cu{sub x}O films were deposited after the growth of HfO{sub 2} dielectric on Si substrate by pulsed laser deposition, and Cu{sub x}O metal-oxide-semiconductor (MOS) capacitors with HfO{sub 2}/SiO{sub 2} stack gate dielectric were primarily fabricated and investigated. X-ray diffraction and X-ray photoelectron spectroscopy were applied to analyze crystalline structure and Cu{sup +}/Cu{sup 2+} ratios of Cu{sub x}O films respectively. SiO{sub 2} interlayer formed between the high-{kappa} dielectric and substrate was estimated by the transmission electron microscope. Results of electrical characteristic measurement indicate that the permittivity of HfO{sub 2} is about 22, and the gate leakage current density of MOS capacitor with 11.3 nm HfO{sub 2}/SiO{sub 2} stack dielectrics is {approx} 10{sup -4} A/cm{sup 2}. Results also show that the annealing in N{sub 2} can improve the quality of Cu{sub x}O/HfO{sub 2} interface and thus reduce the gate leakage density.

  12. Enhanced two dimensional electron gas transport characteristics in Al2O3/AlInN/GaN metal-oxide-semiconductor high-electron-mobility transistors on Si substrate

    International Nuclear Information System (INIS)

    Freedsman, J. J.; Watanabe, A.; Urayama, Y.; Egawa, T.

    2015-01-01

    The authors report on Al 2 O 3 /Al 0.85 In 0.15 N/GaN Metal-Oxide-Semiconductor High-Electron-Mobility Transistor (MOS-HEMT) on Si fabricated by using atomic layer deposited Al 2 O 3 as gate insulator and passivation layer. The MOS-HEMT with the gate length of 2 μm exhibits excellent direct-current (dc) characteristics with a drain current maximum of 1270 mA/mm at a gate bias of 3 V and an off-state breakdown voltage of 180 V for a gate-drain spacing of 4 μm. Also, the 1 μm-gate MOS-HEMT shows good radio-frequency (rf) response such as current gain and maximum oscillation cut-off frequencies of 10 and 34 GHz, respectively. The capacitance-voltage characteristics at 1 MHz revealed significant increase in two-dimensional electron gas (2DEG) density for the MOS-HEMT compared to conventional Schottky barrier HEMTs. Analyses using drain-source conductivity measurements showed improvements in 2DEG transport characteristics for the MOS-HEMT. The enhancements in dc and rf performances of the Al 2 O 3 /Al 0.85 In 0.15 N/GaN MOS-HEMT are attributed to the improvements in 2DEG characteristics

  13. Capacitance-Voltage Characterization of La2O3 Metal-Oxide-Semiconductor Structures on In0.53Ga0.47As Substrate with Different Surface Treatment Methods

    Science.gov (United States)

    Zade, Dariush; Kanda, Takashi; Yamashita, Koji; Kakushima, Kuniyuki; Nohira, Hiroshi; Ahmet, Parhat; Tsutsui, Kazuo; Nishiyama, Akira; Sugii, Nobuyuki; Natori, Kenji; Hattori, Takeo; Iwai, Hiroshi

    2011-10-01

    We studied InGaAs surface treatment using hexamethyldisilazane (HMDS) vapor or (NH4)2S solution after initial oxide removal by hydrofluoric acid. The effect of each treatment on interface properties of La2O3/In0.53Ga0.47As metal-oxide-semiconductor (MOS) capacitor was evaluated. We found that HMDS surface treatment of InGaAs, followed by La2O3 deposition and forming gas annealing reduces the MOS capacitor's interface state density more effectively than (NH4)2S treatment. The comparison of the capacitance-voltage data shows that the HMDS-treated sample reaches a maximum accumulation capacitance of 2.3 µF/cm2 at 1 MHz with roughly 40% less frequency dispersion near accumulation, than the sample treated with (NH4)2S solution. These results suggest that process optimization of HMDS application could lead to further improvement of InGaAs MOS interface, thereby making it a potential routine step for InGaAs surface passivation.

  14. Sub-kT/q subthreshold slope p-metal-oxide-semiconductor field-effect transistors with single-grained Pb(Zr,Ti)O3 featuring a highly reliable negative capacitance

    Science.gov (United States)

    Park, Jae Hyo; Joo, Seung Ki

    2016-03-01

    A reliable on/off switching with an sub-kT/q subthreshold slope (38 mV/dec at room temperature) is experimentally demonstrated with using selectively nucleated laterally crystallized single-grain Pb(Zr,Ti)O3 (PZT) ferroelectric and ZrTiO4 paraelectric thin-film. The combination of ferroelectric and paraelectric thin-film is enabled to form a negative capacitance (NC) at the weak inversion region. However, the PZT grain-boundary easily degrades the NC properties after switching the on/off more than 108 times. It is found that the polarization of PZT is diminished from the path of grain-boundary. Here, we effectively suppress the degradation of NC MOS-FET which did not showed any fatigue even after 108 on/off switching. At the request of the authors this article is retracted due to duplication of figures and significant overlap with other publications by the authors and because of concerns about the accuracy of the description of the devices and materials from which the reported results were obtained. The authors recognize that these represent serious errors and sincerely apologize for any inconvenience they may have caused. The article is retracted from the scientific record with effect from 17 February 2017.

  15. Impact of acceptor concentration on electrical properties and density of interface states of 4H-SiC n-metal-oxide-semiconductor field effect transistors studied by Hall effect

    Czech Academy of Sciences Publication Activity Database

    Ortiz, G.; Strenger, C.; Uhnevionak, V.; Burenkov, A.; Bauer, A.J.; Pichler, P.; Cristiano, F.; Bedel-Pereira, E.; Mortet, Vincent

    2015-01-01

    Roč. 106, č. 6 (2015), "062104-1"-"062104-5" ISSN 0003-6951 Institutional support: RVO:68378271 Keywords : MOSFETs * doping * Hall mobility * conduction bands * epitaxy Subject RIV: BM - Solid Matter Physics ; Magnetism Impact factor: 3.142, year: 2015

  16. Epitaxial Gd2O3 on GaN and AlGaN: a potential candidate for metal oxide semiconductor based transistors on Si for high power application

    Science.gov (United States)

    Ghosh, Kankat; Das, S.; Khiangte, K. R.; Choudhury, N.; Laha, Apurba

    2017-11-01

    We report structural and electrical properties of hexagonal Gd2O3 grown epitaxially on GaN/Si (1 1 1) and AlGaN/GaN/Si(1 1 1) virtual substrates. GaN and AlGaN/GaN heterostructures were grown on Si(1 1 1) substrates by plasma assisted molecular beam epitaxy (PA-MBE), whereas the Gd2O3 layer was grown by the pulsed laser ablation (PLA) technique. Initial structural characterizations show that Gd2O3 grown on III-nitride layers by PLA, exhibit a hexagonal structure with an epitaxial relationship as {{≤ft[ 0 0 0 1 \\right]}G{{d2}{{O}3}}}||{{≤ft[ 0 0 0 1 \\right]}GaN} and {{≤ft[ 1 \\bar{1} 0 0 \\right]}G{{d2}{{O}3}}}||{{≤ft[ 1 \\bar{1} 0 0 \\right]}GaN} . X-ray photoelectron measurements of the valence bands revealed that Gd2O3 exhibits band offsets of 0.97 eV and 0.4 eV, for GaN and Al0.3Ga0.7N, respectively. Electrical measurements such as capacitance-voltage and leakage current characteristics further confirm that epi-Gd2O3 on III-nitrides could be a potential candidate for future metal-oxide-semiconductor (MOS)-based transistors also for high power applications in radio frequency range.

  17. Enhanced two dimensional electron gas transport characteristics in Al{sub 2}O{sub 3}/AlInN/GaN metal-oxide-semiconductor high-electron-mobility transistors on Si substrate

    Energy Technology Data Exchange (ETDEWEB)

    Freedsman, J. J., E-mail: freedy54@gmail.com; Watanabe, A.; Urayama, Y. [Research Center for Nano-Devices and Advanced Materials, Nagoya Institute of Technology, Gokiso-cho, Showa-ku, Nagoya 466 8555 (Japan); Egawa, T., E-mail: egawa.takashi@nitech.ac.jp [Research Center for Nano-Devices and Advanced Materials, Nagoya Institute of Technology, Gokiso-cho, Showa-ku, Nagoya 466 8555 (Japan); Innovation Center for Multi-Business of Nitride Semiconductors, Nagoya Institute of Technology, Gokiso-cho, Showa-ku, Nagoya 466 8555 (Japan)

    2015-09-07

    The authors report on Al{sub 2}O{sub 3}/Al{sub 0.85}In{sub 0.15}N/GaN Metal-Oxide-Semiconductor High-Electron-Mobility Transistor (MOS-HEMT) on Si fabricated by using atomic layer deposited Al{sub 2}O{sub 3} as gate insulator and passivation layer. The MOS-HEMT with the gate length of 2 μm exhibits excellent direct-current (dc) characteristics with a drain current maximum of 1270 mA/mm at a gate bias of 3 V and an off-state breakdown voltage of 180 V for a gate-drain spacing of 4 μm. Also, the 1 μm-gate MOS-HEMT shows good radio-frequency (rf) response such as current gain and maximum oscillation cut-off frequencies of 10 and 34 GHz, respectively. The capacitance-voltage characteristics at 1 MHz revealed significant increase in two-dimensional electron gas (2DEG) density for the MOS-HEMT compared to conventional Schottky barrier HEMTs. Analyses using drain-source conductivity measurements showed improvements in 2DEG transport characteristics for the MOS-HEMT. The enhancements in dc and rf performances of the Al{sub 2}O{sub 3}/Al{sub 0.85}In{sub 0.15}N/GaN MOS-HEMT are attributed to the improvements in 2DEG characteristics.

  18. Bias temperature instability in tunnel field-effect transistors

    Science.gov (United States)

    Mizubayashi, Wataru; Mori, Takahiro; Fukuda, Koichi; Ishikawa, Yuki; Morita, Yukinori; Migita, Shinji; Ota, Hiroyuki; Liu, Yongxun; O'uchi, Shinichi; Tsukada, Junichi; Yamauchi, Hiromi; Matsukawa, Takashi; Masahara, Meishoku; Endo, Kazuhiko

    2017-04-01

    We systematically investigated the bias temperature instability (BTI) of tunnel field-effect transistors (TFETs). The positive BTI and negative BTI mechanisms in TFETs are the same as those in metal-oxide-semiconductor FETs (MOSFETs). In TFETs, although traps are generated in high-k gate dielectrics by the bias stress and/or the interface state is degraded at the interfacial layer/channel interface, the threshold voltage (V th) shift due to BTI degradation is caused by the traps and/or the degradation of the interface state locating the band-to-band tunneling (BTBT) region near the source/gate edge. The BTI lifetime in n- and p-type TFETs is improved by applying a drain bias corresponding to the operation conditions.

  19. Tin - an unlikely ally for silicon field effect transistors?

    KAUST Repository

    Hussain, Aftab M.

    2014-01-13

    We explore the effectiveness of tin (Sn), by alloying it with silicon, to use SiSn as a channel material to extend the performance of silicon based complementary metal oxide semiconductors. Our density functional theory based simulation shows that incorporation of tin reduces the band gap of Si(Sn). We fabricated our device with SiSn channel material using a low cost and scalable thermal diffusion process of tin into silicon. Our high-κ/metal gate based multi-gate-field-effect-transistors using SiSn as channel material show performance enhancement, which is in accordance with the theoretical analysis. © 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  20. Metal oxide semiconductors for dye degradation

    International Nuclear Information System (INIS)

    Adhikari, Sangeeta; Sarkar, Debasish

    2015-01-01

    Highlights: • Hydrothermal synthesis of monoclinic and hexagonal WO 3 nanostructures. • Nanocuboid and nanofiber growth using different structure directing agents. • WO 3 –ZnO nanocomposites for dye degradation under UV and visible light. • High photocatalytic efficiency is achieved by 10 wt% monoclinic WO 3 . • WO 3 assists to trap hole in UV and arrests electron in visible light irradiation. - Abstract: Organic contaminants are a growing threat to the environment that widely demands their degradation by high efficient photocatalysts. Thus, the proposed research work primely focuses on the efficient degradation of methyl orange using designed WO 3 –ZnO photocatalysts under both UV and visible light irradiation. Two different sets of WO 3 nanostructures namely, monoclinic WO 3 (m-WO 3 ) and hexagonal WO 3 (h-WO 3 ) synthesizes in presence of a different structure directing agents. A specific dispersion technique allows the intimate contact of as-synthesized WO 3 and ultra-violet active commercial ZnO photocatalyst in different weight variations. ZnO nanocrystal in presence of an optimum 10 wt% m-WO 3 shows a high degree of photocatalytic activity under both UV and visible light irradiation compared to counterpart h-WO 3 . Symmetrical monoclinic WO 3 assists to trap hole in UV, but electron arresting mechanism predominates in visible irradiation. Coupling of monoclinic nanocuboid WO 3 with ZnO proves to be a promising photocatalyst in both wavelengths.

  1. Metal oxide semiconductors for dye degradation

    Energy Technology Data Exchange (ETDEWEB)

    Adhikari, Sangeeta; Sarkar, Debasish, E-mail: dsarkar@nitrkl.ac.in

    2015-12-15

    Highlights: • Hydrothermal synthesis of monoclinic and hexagonal WO{sub 3} nanostructures. • Nanocuboid and nanofiber growth using different structure directing agents. • WO{sub 3}–ZnO nanocomposites for dye degradation under UV and visible light. • High photocatalytic efficiency is achieved by 10 wt% monoclinic WO{sub 3}. • WO{sub 3} assists to trap hole in UV and arrests electron in visible light irradiation. - Abstract: Organic contaminants are a growing threat to the environment that widely demands their degradation by high efficient photocatalysts. Thus, the proposed research work primely focuses on the efficient degradation of methyl orange using designed WO{sub 3}–ZnO photocatalysts under both UV and visible light irradiation. Two different sets of WO{sub 3} nanostructures namely, monoclinic WO{sub 3} (m-WO{sub 3}) and hexagonal WO{sub 3} (h-WO{sub 3}) synthesizes in presence of a different structure directing agents. A specific dispersion technique allows the intimate contact of as-synthesized WO{sub 3} and ultra-violet active commercial ZnO photocatalyst in different weight variations. ZnO nanocrystal in presence of an optimum 10 wt% m-WO{sub 3} shows a high degree of photocatalytic activity under both UV and visible light irradiation compared to counterpart h-WO{sub 3}. Symmetrical monoclinic WO{sub 3} assists to trap hole in UV, but electron arresting mechanism predominates in visible irradiation. Coupling of monoclinic nanocuboid WO{sub 3} with ZnO proves to be a promising photocatalyst in both wavelengths.

  2. Unbiased metal oxide semiconductor ionising radiation dosemeter

    International Nuclear Information System (INIS)

    Kumurdjian, N.; Sarrabayrouse, G.J.

    1995-01-01

    To assess the application of MOS devices as low dose rate dosemeters, the sensitivity is the major factor although little studies have been performed on that subject. It is studied here, as well as thermal stability and linearity of the response curve. Other advantages are specified such as large measurable dose range, low cost, small size, possibility of integration. (D.L.)

  3. Comparison of modification strategies towards enhanced charge carrier separation and photocatalytic degradation activity of metal oxide semiconductors (TiO{sub 2}, WO{sub 3} and ZnO)

    Energy Technology Data Exchange (ETDEWEB)

    Kumar, S. Girish [Department of Physics, Indian Institute of Science, Bengaluru, 560012 Karnataka (India); Department of Chemistry, School of Engineering and Technology, CMR University, Bengaluru, 562149, Karnataka (India); Rao, K.S.R. Koteswara, E-mail: raoksrk@gmail.com [Department of Physics, Indian Institute of Science, Bengaluru, 560012 Karnataka (India)

    2017-01-01

    Graphical abstract: Semiconductor metal oxides: Modifications, charge carrier dynamics and photocatalysis. - Highlights: • TiO{sub 2}, WO{sub 3} and ZnO based photocatalysis is reviewed. • Advances to improve the efficiency are emphasized. • Differences and similarities in the modifications are highlighted. • Charge carrier dynamics for each strategy are discussed. - Abstract: Metal oxide semiconductors (TiO{sub 2}, WO{sub 3} and ZnO) finds unparalleled opportunity in wastewater purification under UV/visible light, largely encouraged by their divergent admirable features like stability, non-toxicity, ease of preparation, suitable band edge positions and facile generation of active oxygen species in the aqueous medium. However, the perennial failings of these photocatalysts emanates from the stumbling blocks like rapid charge carrier recombination and meager visible light response. In this review, tailoring the surface-bulk electronic structure through the calibrated and veritable approaches such as impurity doping, deposition with noble metals, sensitizing with other compounds (dyes, polymers, inorganic complexes and simple chelating ligands), hydrogenation process (annealing under hydrogen atmosphere), electronic integration with other semiconductors, modifying with carbon nanostructures, designing with exposed facets and tailoring with hierarchical morphologies to overcome their critical drawbacks are summarized. Taking into account the materials intrinsic properties, the pros and cons together with similarities and striking differences for each strategy in specific to TiO{sub 2}, WO{sub 3} & ZnO are highlighted. These subtlety enunciates the primacy for improving the structure-electronic properties of metal oxides and credence to its fore in the practical applications. Future research must focus on comparing the performances of ZnO, TiO{sub 2} and WO{sub 3} in parallel to get insight into their photocatalytic behaviors. Such comparisons not only reveal

  4. Impact of GaN cap on charges in Al₂O₃/(GaN/)AlGaN/GaN metal-oxide-semiconductor heterostructures analyzed by means of capacitance measurements and simulations

    Energy Technology Data Exchange (ETDEWEB)

    Ťapajna, M., E-mail: milan.tapajna@savba.sk; Jurkovič, M.; Válik, L.; Haščík, Š.; Gregušová, D.; Kuzmík, J. [Institute of Electrical Engineering, Slovak Academy of Sciences, Dúbravská cesta 9, 841 04 Bratislava (Slovakia); Brunner, F.; Cho, E.-M. [Ferdinand-Braun-Institut, Leibniz Institut für Höchstfrequenztechnik, Gustav-Kirchhoff-Strasse 4, 12489 Berlin (Germany); Hashizume, T. [Research Center for Integrated Quantum Electronics (RCIQE), Hokkaido University, 060-0814 Sapporo, Japan and JST-CREST, 102-0075 Tokyo (Japan)

    2014-09-14

    Oxide/semiconductor interface trap density (D{sub it}) and net charge of Al₂O₃/(GaN)/AlGaN/GaN metal-oxide-semiconductor high-electron mobility transistor (MOS-HEMT) structures with and without GaN cap were comparatively analyzed using comprehensive capacitance measurements and simulations. D{sub it} distribution was determined in full band gap of the barrier using combination of three complementary capacitance techniques. A remarkably higher D{sub it} (∼5–8 × 10¹²eV⁻¹ cm⁻²) was found at trap energies ranging from EC-0.5 to 1 eV for structure with GaN cap compared to that (D{sub it} ∼ 2–3 × 10¹²eV⁻¹ cm⁻²) where the GaN cap was selectively etched away. D{sub it} distributions were then used for simulation of capacitance-voltage characteristics. A good agreement between experimental and simulated capacitance-voltage characteristics affected by interface traps suggests (i) that very high D{sub it} (>10¹³eV⁻¹ cm⁻²) close to the barrier conduction band edge hampers accumulation of free electron in the barrier layer and (ii) the higher D{sub it} centered about EC-0.6 eV can solely account for the increased C-V hysteresis observed for MOS-HEMT structure with GaN cap. Analysis of the threshold voltage dependence on Al₂O₃ thickness for both MOS-HEMT structures suggests that (i) positive charge, which compensates the surface polarization, is not necessarily formed during the growth of III-N heterostructure, and (ii) its density is similar to the total surface polarization charge of the GaN/AlGaN barrier, rather than surface polarization of the top GaN layer only. Some constraints for the positive surface compensating charge are discussed.

  5. Fringing field effects in negative capacitance field-effect transistors with a ferroelectric gate insulator

    Science.gov (United States)

    Hattori, Junichi; Fukuda, Koichi; Ikegami, Tsutomu; Ota, Hiroyuki; Migita, Shinji; Asai, Hidehiro; Toriumi, Akira

    2018-04-01

    We study the effects of fringing electric fields on the behavior of negative-capacitance (NC) field-effect transistors (FETs) with a silicon-on-insulator body and a gate stack consisting of an oxide film, an internal metal film, a ferroelectric film, and a gate electrode using our own device simulator that can properly handle the complicated relationship between the polarization and the electric field in ferroelectric materials. The behaviors of such NC FETs and the corresponding metal-oxide-semiconductor (MOS) FETs are simulated and compared with each other to evaluate the effects of the NC of the ferroelectric film. Then, the fringing field effects are evaluated by comparing the NC effects in NC FETs with and without gate spacers. The fringing field between the gate stack, especially the internal metal film, and the source/drain region induces more charges at the interface of the film with the ferroelectric film. Accordingly, the function of the NC to modulate the gate voltage and the resulting function to improve the subthreshold swing are enhanced. We also investigate the relationships of these fringing field effects to the drain voltage and four design parameters of NC FETs, i.e., gate length, gate spacer permittivity, internal metal film thickness, and oxide film thickness.

  6. Non-Planar Nano-Scale Fin Field Effect Transistors on Textile, Paper, Wood, Stone, and Vinyl via Soft Material-Enabled Double-Transfer Printing

    KAUST Repository

    Rojas, Jhonathan Prieto; Sevilla, Galo T.; Alfaraj, Nasir; Ghoneim, Mohamed T.; Kutbee, Arwa T.; Sridharan, Ashvitha; Hussain, Muhammad Mustafa

    2015-01-01

    The ability to incorporate rigid but high-performance nano-scale non-planar complementary metal-oxide semiconductor (CMOS) electronics with curvilinear, irregular, or asymmetric shapes and surfaces is an arduous but timely challenge in enabling the production of wearable electronics with an in-situ information-processing ability in the digital world. Therefore, we are demonstrating a soft-material enabled double-transfer-based process to integrate flexible, silicon-based, nano-scale, non-planar, fin-shaped field effect transistors (FinFETs) and planar metal-oxide-semiconductor field effect transistors (MOSFETs) on various asymmetric surfaces to study their compatibility and enhanced applicability in various emerging fields. FinFET devices feature sub-20 nm dimensions and state-of-the-art, high-κ/metal gate stack, showing no performance alteration after the transfer process. A further analysis of the transferred MOSFET devices, featuring 1 μm gate length exhibits ION ~70 μA/μm (VDS = 2 V, VGS = 2 V) and a low sub-threshold swing of around 90 mV/dec, proving that a soft interfacial material can act both as a strong adhesion/interposing layer between devices and final substrate as well as a means to reduce strain, which ultimately helps maintain the device’s performance with insignificant deterioration even at a high bending state.

  7. Nonplanar Nanoscale Fin Field Effect Transistors on Textile, Paper, Wood, Stone, and Vinyl via Soft Material-Enabled Double-Transfer Printing.

    Science.gov (United States)

    Rojas, Jhonathan P; Torres Sevilla, Galo A; Alfaraj, Nasir; Ghoneim, Mohamed T; Kutbee, Arwa T; Sridharan, Ashvitha; Hussain, Muhammad Mustafa

    2015-05-26

    The ability to incorporate rigid but high-performance nanoscale nonplanar complementary metal-oxide semiconductor (CMOS) electronics with curvilinear, irregular, or asymmetric shapes and surfaces is an arduous but timely challenge in enabling the production of wearable electronics with an in situ information-processing ability in the digital world. Therefore, we are demonstrating a soft-material enabled double-transfer-based process to integrate flexible, silicon-based, nanoscale, nonplanar, fin-shaped field effect transistors (FinFETs) and planar metal-oxide-semiconductor field effect transistors (MOSFETs) on various asymmetric surfaces to study their compatibility and enhanced applicability in various emerging fields. FinFET devices feature sub-20 nm dimensions and state-of-the-art, high-κ/metal gate stacks, showing no performance alteration after the transfer process. A further analysis of the transferred MOSFET devices, featuring 1 μm gate length, exhibits an ION value of nearly 70 μA/μm (VDS = 2 V, VGS = 2 V) and a low subthreshold swing of around 90 mV/dec, proving that a soft interfacial material can act both as a strong adhesion/interposing layer between devices and final substrate as well as a means to reduce strain, which ultimately helps maintain the device's performance with insignificant deterioration even at a high bending state.

  8. Non-Planar Nano-Scale Fin Field Effect Transistors on Textile, Paper, Wood, Stone, and Vinyl via Soft Material-Enabled Double-Transfer Printing

    KAUST Repository

    Rojas, Jhonathan Prieto

    2015-05-01

    The ability to incorporate rigid but high-performance nano-scale non-planar complementary metal-oxide semiconductor (CMOS) electronics with curvilinear, irregular, or asymmetric shapes and surfaces is an arduous but timely challenge in enabling the production of wearable electronics with an in-situ information-processing ability in the digital world. Therefore, we are demonstrating a soft-material enabled double-transfer-based process to integrate flexible, silicon-based, nano-scale, non-planar, fin-shaped field effect transistors (FinFETs) and planar metal-oxide-semiconductor field effect transistors (MOSFETs) on various asymmetric surfaces to study their compatibility and enhanced applicability in various emerging fields. FinFET devices feature sub-20 nm dimensions and state-of-the-art, high-κ/metal gate stack, showing no performance alteration after the transfer process. A further analysis of the transferred MOSFET devices, featuring 1 μm gate length exhibits ION ~70 μA/μm (VDS = 2 V, VGS = 2 V) and a low sub-threshold swing of around 90 mV/dec, proving that a soft interfacial material can act both as a strong adhesion/interposing layer between devices and final substrate as well as a means to reduce strain, which ultimately helps maintain the device’s performance with insignificant deterioration even at a high bending state.

  9. Tin - an unlikely ally for silicon field effect transistors?

    KAUST Repository

    Hussain, Aftab M.; Fahad, Hossain M.; Singh, Nirpendra; Sevilla, Galo T.; Schwingenschlö gl, Udo; Hussain, Muhammad Mustafa

    2014-01-01

    We explore the effectiveness of tin (Sn), by alloying it with silicon, to use SiSn as a channel material to extend the performance of silicon based complementary metal oxide semiconductors. Our density functional theory based simulation shows

  10. Device and circuit-level performance of carbon nanotube field-effect transistor with benchmarking against a nano-MOSFET.

    Science.gov (United States)

    Tan, Michael Loong Peng; Lentaris, Georgios; Amaratunga Aj, Gehan

    2012-08-19

    The performance of a semiconducting carbon nanotube (CNT) is assessed and tabulated for parameters against those of a metal-oxide-semiconductor field-effect transistor (MOSFET). Both CNT and MOSFET models considered agree well with the trends in the available experimental data. The results obtained show that nanotubes can significantly reduce the drain-induced barrier lowering effect and subthreshold swing in silicon channel replacement while sustaining smaller channel area at higher current density. Performance metrics of both devices such as current drive strength, current on-off ratio (Ion/Ioff), energy-delay product, and power-delay product for logic gates, namely NAND and NOR, are presented. Design rules used for carbon nanotube field-effect transistors (CNTFETs) are compatible with the 45-nm MOSFET technology. The parasitics associated with interconnects are also incorporated in the model. Interconnects can affect the propagation delay in a CNTFET. Smaller length interconnects result in higher cutoff frequency.

  11. High-performance carbon-nanotube-based complementary field-effect-transistors and integrated circuits with yttrium oxide

    Energy Technology Data Exchange (ETDEWEB)

    Liang, Shibo; Zhang, Zhiyong, E-mail: zyzhang@pku.edu.cn; Si, Jia; Zhong, Donglai; Peng, Lian-Mao, E-mail: lmpeng@pku.edu.cn [Key Laboratory for the Physics and Chemistry of Nanodevices, Department of Electronics, Peking University, Beijing 100871 (China)

    2014-08-11

    High-performance p-type carbon nanotube (CNT) transistors utilizing yttrium oxide as gate dielectric are presented by optimizing oxidization and annealing processes. Complementary metal-oxide-semiconductor (CMOS) field-effect-transistors (FETs) are then fabricated on CNTs, and the p- and n-type devices exhibit symmetrical high performances, especially with low threshold voltage near to zero. The corresponding CMOS CNT inverter is demonstrated to operate at an ultra-low supply voltage down to 0.2 V, while displaying sufficient voltage gain, high noise margin, and low power consumption. Yttrium oxide is proven to be a competitive gate dielectric for constructing high-performance CNT CMOS FETs and integrated circuits.

  12. Silicon junctionless field effect transistors as room temperature terahertz detectors

    Energy Technology Data Exchange (ETDEWEB)

    Marczewski, J., E-mail: jmarcz@ite.waw.pl; Tomaszewski, D.; Zaborowski, M. [Institute of Electron Technology, al. Lotnikow 32/46, 02-668 Warsaw (Poland); Knap, W. [Institute of High Pressure Physics of the Polish Academy of Sciences, ul. Sokolowska 29/37, 01-142 Warsaw (Poland); Laboratory Charles Coulomb, Montpellier University & CNRS, Place E. Bataillon, Montpellier 34095 (France); Zagrajek, P. [Institute of Optoelectronics, Military University of Technology, ul. gen. S. Kaliskiego 2, 00-908 Warsaw (Poland)

    2015-09-14

    Terahertz (THz) radiation detection by junctionless metal-oxide-semiconductor field-effect transistors (JL MOSFETs) was studied and compared with THz detection using conventional MOSFETs. It has been shown that in contrast to the behavior of standard transistors, the junctionless devices have a significant responsivity also in the open channel (low resistance) state. The responsivity for a photolithographically defined JL FET was 70 V/W and the noise equivalent power 460 pW/√Hz. Working in the open channel state may be advantageous for THz wireless and imaging applications because of its low thermal noise and possible high operating speed or large bandwidth. It has been proven that the junctionless MOSFETs can also operate in a zero gate bias mode, which enables simplification of the THz array circuitry. Existing models of THz detection by MOSFETs were considered and it has been demonstrated that the process of detection by these junctionless devices cannot be explained within the framework of the commonly accepted models and therefore requires a new theoretical approach.

  13. n-Channel semiconductor materials design for organic complementary circuits.

    Science.gov (United States)

    Usta, Hakan; Facchetti, Antonio; Marks, Tobin J

    2011-07-19

    Organic semiconductors have unique properties compared to traditional inorganic materials such as amorphous or crystalline silicon. Some important advantages include their adaptability to low-temperature processing on flexible substrates, low cost, amenability to high-speed fabrication, and tunable electronic properties. These features are essential for a variety of next-generation electronic products, including low-power flexible displays, inexpensive radio frequency identification (RFID) tags, and printable sensors, among many other applications. Accordingly, the preparation of new materials based on π-conjugated organic molecules or polymers has been a central scientific and technological research focus over the past decade. Currently, p-channel (hole-transporting) materials are the leading class of organic semiconductors. In contrast, high-performance n-channel (electron-transporting) semiconductors are relatively rare, but they are of great significance for the development of plastic electronic devices such as organic field-effect transistors (OFETs). In this Account, we highlight the advances our team has made toward realizing moderately and highly electron-deficient n-channel oligomers and polymers based on oligothiophene, arylenediimide, and (bis)indenofluorene skeletons. We have synthesized and characterized a "library" of structurally related semiconductors, and we have investigated detailed structure-property relationships through optical, electrochemical, thermal, microstructural (both single-crystal and thin-film), and electrical measurements. Our results reveal highly informative correlations between structural parameters at various length scales and charge transport properties. We first discuss oligothiophenes functionalized with perfluoroalkyl and perfluoroarene substituents, which represent the initial examples of high-performance n-channel semiconductors developed in this project. The OFET characteristics of these compounds are presented with an

  14. Comparison of electron transmittances and tunneling currents in an anisotropic TiNx/HfO2/SiO2/p-Si(100) metal-oxide-semiconductor (MOS) capacitor calculated using exponential- and Airy-wavefunction approaches and a transfer matrix method

    International Nuclear Information System (INIS)

    Noor, Fatimah A.; Abdullah, Mikrajuddin; Sukirno; Khairurrijal

    2010-01-01

    Analytical expressions of electron transmittance and tunneling current in an anisotropic TiN x /HfO 2 /SiO 2 /p-Si(100) metal-oxide-semiconductor (MOS) capacitor were derived by considering the coupling of transverse and longitudinal energies of an electron. Exponential and Airy wavefunctions were utilized to obtain the electron transmittance and the electron tunneling current. A transfer matrix method, as a numerical approach, was used as a benchmark to assess the analytical approaches. It was found that there is a similarity in the transmittances calculated among exponential- and Airy-wavefunction approaches and the TMM at low electron energies. However, for high energies, only the transmittance calculated by using the Airy-wavefunction approach is the same as that evaluated by the TMM. It was also found that only the tunneling currents calculated by using the Airy-wavefunction approach are the same as those obtained under the TMM for all range of oxide voltages. Therefore, a better analytical description for the tunneling phenomenon in the MOS capacitor is given by the Airy-wavefunction approach. Moreover, the tunneling current density decreases as the titanium concentration of the TiN x metal gate increases because the electron effective mass of TiN x decreases with increasing nitrogen concentration. In addition, the mass anisotropy cannot be neglected because the tunneling currents obtained under the isotropic and anisotropic masses are very different. (semiconductor devices)

  15. Reduction of Charge Traps and Stability Enhancement in Solution-Processed Organic Field-Effect Transistors Based on a Blended n-Type Semiconductor.

    Science.gov (United States)

    Campos, Antonio; Riera-Galindo, Sergi; Puigdollers, Joaquim; Mas-Torrent, Marta

    2018-05-09

    Solution-processed n-type organic field-effect transistors (OFETs) are essential elements for developing large-area, low-cost, and all organic logic/complementary circuits. Nonetheless, the development of air-stable n-type organic semiconductors (OSCs) lags behind their p-type counterparts. The trapping of electrons at the semiconductor-dielectric interface leads to a lower performance and operational stability. Herein, we report printed small-molecule n-type OFETs based on a blend with a binder polymer, which enhances the device stability due to the improvement of the semiconductor-dielectric interface quality and a self-encapsulation. Both combined effects prevent the fast deterioration of the OSC. Additionally, a complementary metal-oxide semiconductor-like inverter is fabricated depositing p-type and n-type OSCs simultaneously.

  16. Demonstration of hetero-gate-dielectric tunneling field-effect transistors (HG TFETs).

    Science.gov (United States)

    Choi, Woo Young; Lee, Hyun Kook

    2016-01-01

    The steady scaling-down of semiconductor device for improving performance has been the most important issue among researchers. Recently, as low-power consumption becomes one of the most important requirements, there have been many researches about novel devices for low-power consumption. Though scaling supply voltage is the most effective way for low-power consumption, performance degradation is occurred for metal-oxide-semiconductor field-effect transistors (MOSFETs) when supply voltage is reduced because subthreshold swing (SS) of MOSFETs cannot be lower than 60 mV/dec. Thus, in this thesis, hetero-gate-dielectric tunneling field-effect transistors (HG TFETs) are investigated as one of the most promising alternatives to MOSFETs. By replacing source-side gate insulator with a high- k material, HG TFETs show higher on-current, suppressed ambipolar current and lower SS than conventional TFETs. Device design optimization through simulation was performed and fabrication based on simulation demonstrated that performance of HG TFETs were better than that of conventional TFETs. Especially, enlargement of gate insulator thickness while etching gate insulator at the source side was improved by introducing HF vapor etch process. In addition, the proposed HG TFETs showed higher performance than our previous results by changing structure of sidewall spacer by high- k etching process.

  17. High-temperature complementary metal oxide semiconductors (CMOS)

    International Nuclear Information System (INIS)

    McBrayer, J.D.

    1979-10-01

    Silicon CMOS devices were studied, tested, and evaluated at high temperatures to determine processing, geometric, operating characteristics, and stability parameters. After more than 1000 hours at 300 0 C, most devices showed good stability, reliability, and operating characteristics. Processing and geometric parameters were evaluated and optimization steps discussed

  18. Radiation effects in metal-oxide-semiconductor capacitors

    International Nuclear Information System (INIS)

    Collins, J.L.

    1987-01-01

    The effects of various radiations on commercially made Al-SiO 2 -Si Capacitors (MOSCs) have been investigated. Intrinsic dielectric breakdown in MOSCs has been shown to be a two-stage process dominated by charge injection in a pre-breakdown stage; this is associated with localised high-field injection of carriers from the semiconductor substrate to interfacial and bulk charge traps which, it is proposed, leads to the formation of conducting channels through the dielectric with breakdown occurring as a result of the dissipation of the conduction band energy. A study of radiation-induced dielectric breakdown has revealed the possibility of anomalous hot-electron injection to an excess of bulk oxide traps in the ionization channel produced by very heavily ionizing radiation, which leads to intrinsic breakdown in high-field stressed devices. This is interpreted in terms of a modified model for radiation-induced dielectric breakdown based upon the primary dependence of breakdown on charge injection rather than high-field mechanisms. A detailed investigation of charge trapping and interface state generation due to various radiations has revealed evidence of neutron induced interface states, and the generation of positive oxide charge in devices due to all the radiations tested. The greater the linear energy transfer of the radiation, the greater the magnitude of charge trapped in the oxide and the number of interface states generated. This is interpreted in terms of Si-H and Si-OH bond-breaking at the Si-SiO 2 interface which is enhanced by charge carrier transfer to the interface and by anomalous charge injection to compensate for the excess of charge carriers created by the radiation. (author)

  19. Reduction of leakage current in In{sub 0.53}Ga{sub 0.47}As channel metal-oxide-semiconductor field-effect-transistors using AlAs{sub 0.56}Sb{sub 0.44} confinement layers

    Energy Technology Data Exchange (ETDEWEB)

    Huang, Cheng-Ying, E-mail: cyhuang@ece.ucsb.edu; Lee, Sanghoon; Cohen-Elias, Doron; Law, Jeremy J. M.; Carter, Andrew D.; Rodwell, Mark J. W. [Department of Electrical and Computer Engineering, University of California, Santa Barbara, California 93106 (United States); Chobpattana, Varistha; Stemmer, Susanne [Materials Department, University of California, Santa Barbara, California 93106 (United States); Gossard, Arthur C. [Department of Electrical and Computer Engineering, University of California, Santa Barbara, California 93106 (United States); Materials Department, University of California, Santa Barbara, California 93106 (United States)

    2013-11-11

    We compare the DC characteristics of planar In{sub 0.53}Ga{sub 0.47}As channel MOSFETs using AlAs{sub 0.56}Sb{sub 0.44} barriers to similar MOSFETs using In{sub 0.52}Al{sub 0.48}As barriers. AlAs{sub 0.56}Sb{sub 0.44}, with ∼1.0 eV conduction-band offset to In{sub 0.53}Ga{sub 0.47}As, improves electron confinement within the channel. At gate lengths below 100 nm and V{sub DS} = 0.5 V, the MOSFETs with AlAs{sub 0.56}Sb{sub 0.44} barriers show steeper subthreshold swing (SS) and reduced drain-source leakage current. We attribute the greater leakage observed with the In{sub 0.52}Al{sub 0.48}As barrier to thermionic emission from the N + In{sub 0.53}Ga{sub 0.47}As source over the In{sub 0.53}Ga{sub 0.47}As/In{sub 0.52}Al{sub 0.48}As heterointerface. A 56 nm gate length device with the AlAs{sub 0.56}Sb{sub 0.44} barrier exhibits 1.96 mS/μm peak transconductance and SS = 134 mV/dec at V{sub DS} = 0.5 V.

  20. Band alignments and improved leakage properties of (La2O3)0.5(SiO2)0.5/SiO2/GaN stacks for high-temperature metal-oxide-semiconductor field-effect transistor applications

    Science.gov (United States)

    Gao, L. G.; Xu, B.; Guo, H. X.; Xia, Y. D.; Yin, J.; Liu, Z. G.

    2009-06-01

    The band alignments of (La2O3)0.5(SiO2)0.5(LSO)/GaN and LSO/SiO2/GaN gate dielectric stacks were investigated comparatively by using x-ray photoelectron spectroscopy. The valence band offsets for LSO/GaN stack and LSO/SiO2/GaN stack are 0.88 and 1.69 eV, respectively, while the corresponding conduction band offsets are found to be 1.40 and 1.83 eV, respectively. Measurements of the leakage current density as function of temperature revealed that the LSO/SiO2/GaN stack has much lower leakage current density than that of the LSO/GaN stack, especially at high temperature. It is concluded that the presence of a SiO2 buffer layer increases band offsets and reduces the leakage current density effectively.

  1. Experimental demonstration on the ultra-low source/drain resistance by metal-insulator-semiconductor contact structure in In0.53Ga0.47As field-effect transistors

    Directory of Open Access Journals (Sweden)

    M.-H. Liao

    2013-09-01

    Full Text Available In this work, we demonstrate the ultra-low contact resistivity of 6.7 × 10−9 Ω/cm2 by inserting 0.6-nm-ZnO between Al and InGaAs(Si: 1.5 × 1019 cm−3. The metal-insulator-semiconductor tunneling diode with 0.6-nm-ZnO exhibits nearly zero (0.03 eV barrier height. We apply this contact structure on the source/drain of implant-free In0.53Ga0.47As quantum-well metal-oxide-semiconductor field- effect transistors. The excellent on-state performance such as saturation drain current of 3 × 10−4 A/μm and peak transconductance of 1250 μS/μm is obtained which is attributed to the ultra-low source/drain resistance of 190 Ω-μm.

  2. Large current MOSFET on photonic silicon-on-insulator wafers and its monolithic integration with a thermo-optic 2 × 2 Mach-Zehnder switch.

    Science.gov (United States)

    Cong, G W; Matsukawa, T; Chiba, T; Tadokoro, H; Yanagihara, M; Ohno, M; Kawashima, H; Kuwatsuka, H; Igarashi, Y; Masahara, M; Ishikawa, H

    2013-03-25

    n-channel body-tied partially depleted metal-oxide-semiconductor field-effect transistors (MOSFETs) were fabricated for large current applications on a silicon-on-insulator wafer with photonics-oriented specifications. The MOSFET can drive an electrical current as large as 20 mA. We monolithically integrated this MOSFET with a 2 × 2 Mach-Zehnder interferometer optical switch having thermo-optic phase shifters. The static and dynamic performances of the integrated device are experimentally evaluated.

  3. Inexpensive and fast pathogenic bacteria screening using field-effect transistors.

    Science.gov (United States)

    Formisano, Nello; Bhalla, Nikhil; Heeran, Mel; Reyes Martinez, Juana; Sarkar, Amrita; Laabei, Maisem; Jolly, Pawan; Bowen, Chris R; Taylor, John T; Flitsch, Sabine; Estrela, Pedro

    2016-11-15

    While pathogenic bacteria contribute to a large number of globally important diseases and infections, current clinical diagnosis is based on processes that often involve culturing which can be time-consuming. Therefore, innovative, simple, rapid and low-cost solutions to effectively reduce the burden of bacterial infections are urgently needed. Here we demonstrate a label-free sensor for fast bacterial detection based on metal-oxide-semiconductor field-effect transistors (MOSFETs). The electric charge of bacteria binding to the glycosylated gates of a MOSFET enables quantification in a straightforward manner. We show that the limit of quantitation is 1.9×10(5) CFU/mL with this simple device, which is more than 10,000-times lower than is achieved with electrochemical impedance spectroscopy (EIS) and matrix-assisted laser desorption ionisation time-of-flight mass spectrometry (MALDI-ToF) on the same modified surfaces. Moreover, the measurements are extremely fast and the sensor can be mass produced at trivial cost as a tool for initial screening of pathogens. Copyright © 2016 Elsevier B.V. All rights reserved.

  4. 2D negative capacitance field-effect transistor with organic ferroelectrics

    Science.gov (United States)

    Zhang, Heng; Chen, Yan; Ding, Shijin; Wang, Jianlu; Bao, Wenzhong; Zhang, David Wei; Zhou, Peng

    2018-06-01

    In the past fifty years, complementary metal-oxide-semiconductor integrated circuits have undergone significant development, but Moore’s law will soon come to an end. In order to break through the physical limit of Moore’s law, 2D materials have been widely used in many electronic devices because of their high mobility and excellent mechanical flexibility. And the emergence of a negative capacitance field-effect transistor (NCFET) could not only break the thermal limit of conventional devices, but reduce the operating voltage and power consumption. This paper demonstrates a 2D NCFET that treats molybdenum disulfide as a channel material and organic P(VDF-TrFE) as a gate dielectric directly. This represents a new attempt to prepare NCFETs and produce flexible electronic devices. It exhibits a 106 on-/off-current ratio. And the minimum subthreshold swing (SS) of the 21 mV/decade and average SS of the 44 mV/decade in four orders of magnitude of drain current can also be observed at room temperature of 300 K.

  5. Stepwise cyanation of naphthalene diimide for n-channel field-effect transistors

    KAUST Repository

    Chang, Jingjing

    2012-06-15

    Stepwise cyanation of tetrabromonaphthalenediimide (NDI) 1 gave a series of cyanated NDIs 2-5 with the monocyanated NDI 2 and dicyanated NDI 3 isolated. The tri- and tetracyano- NDIs 4 and 5 show intrinsic instability toward moisture because of their extremely low-lying LUMO energy levels. The partially cyanated intermediates can be utilized as air-stable n-type semiconductors with OFET electron mobility up to 0.05 cm 2 V -1 s -1. © 2012 American Chemical Society.

  6. Monte Carlo simulations of spin transport in a strained nanoscale InGaAs field effect transistor

    Science.gov (United States)

    Thorpe, B.; Kalna, K.; Langbein, F. C.; Schirmer, S.

    2017-12-01

    Spin-based logic devices could operate at a very high speed with a very low energy consumption and hold significant promise for quantum information processing and metrology. We develop a spintronic device simulator by combining an in-house developed, experimentally verified, ensemble self-consistent Monte Carlo device simulator with spin transport based on a Bloch equation model and a spin-orbit interaction Hamiltonian accounting for Dresselhaus and Rashba couplings. It is employed to simulate a spin field effect transistor operating under externally applied voltages on a gate and a drain. In particular, we simulate electron spin transport in a 25 nm gate length In0.7Ga0.3As metal-oxide-semiconductor field-effect transistor with a CMOS compatible architecture. We observe a non-uniform decay of the net magnetization between the source and the gate and a magnetization recovery effect due to spin refocusing induced by a high electric field between the gate and the drain. We demonstrate a coherent control of the polarization vector of the drain current via the source-drain and gate voltages, and show that the magnetization of the drain current can be increased twofold by the strain induced into the channel.

  7. AlGaN Channel Transistors for Power Management and Distribution

    Science.gov (United States)

    VanHove, James M.

    1996-01-01

    Contained within is the Final report of a Phase 1 SBIR program to develop AlGaN channel junction field effect transistors (JFET). The report summarizes our work to design, deposit, and fabricate JFETS using molecular beam epitaxy growth AlGaN. Nitride growth is described using a RF atomic nitrogen plasma source. Processing steps needed to fabricate the device such as ohmic source-drain contacts, reactive ion etching, gate formation, and air bride fabrication are documented. SEM photographs of fabricated power FETS are shown. Recommendations are made to continue the effort in a Phase 2 Program.

  8. Band-to-band tunneling field effect transistor for low power logic and memory applications: Design, fabrication and characterization

    Science.gov (United States)

    Mookerjea, Saurabh A.

    Over the past decade the microprocessor clock frequency has hit a plateau. The main reason for this has been the inability to follow constant electric field scaling, which requires the transistor supply voltage to be scaled down as the transistor dimensions are reduced. Scaling the supply voltage down reduces the dynamic power quadratically but increases the static leakage power exponentially due to non-scalability of threshold voltage of the transistor, which is required to maintain the same ON state performance. This limitation in supply voltage scaling is directly related to MOSFET's (Metal Oxide Semiconductor Field Effect Transistor) sub-threshold slope (SS) limitation of 60 mV/dec at room temperature. Thus novel device design/materials are required that would allow the transistor to switch with sub-threshold slopes steeper than 60 mV/dec at room temperature, thus facilitating supply voltage scaling. Recently, a new class of devices known as super-steep slope (SSswitching behavior of TFET is studied through mixed-mode numerical simulations. The significance of correct benchmarking methodology to estimate the effective drive current and capacitance in TFET is highlighted and compared with MOSFET. This is followed by the fabrication details of homo-junction TFET. Analysis of the electrical characteristics of homo-junction TFET gives key insight into its device operation and identifies the critical factors that impact its performance. In order to boost the ON current, the design and fabrication of hetero-junction TFET is also presented.

  9. MoS2 /Rubrene van der Waals Heterostructure: Toward Ambipolar Field-Effect Transistors and Inverter Circuits.

    Science.gov (United States)

    He, Xuexia; Chow, WaiLeong; Liu, Fucai; Tay, BengKang; Liu, Zheng

    2017-01-01

    2D transition metal dichalcogenides are promising channel materials for the next-generation electronic device. Here, vertically 2D heterostructures, so called van der Waals solids, are constructed using inorganic molybdenum sulfide (MoS 2 ) few layers and organic crystal - 5,6,11,12-tetraphenylnaphthacene (rubrene). In this work, ambipolar field-effect transistors are successfully achieved based on MoS 2 and rubrene crystals with the well balanced electron and hole mobilities of 1.27 and 0.36 cm 2 V -1 s -1 , respectively. The ambipolar behavior is explained based on the band alignment of MoS 2 and rubrene. Furthermore, being a building block, the MoS 2 /rubrene ambipolar transistors are used to fabricate CMOS (complementary metal oxide semiconductor) inverters that show good performance with a gain of 2.3 at a switching threshold voltage of -26 V. This work paves a way to the novel organic/inorganic ultrathin heterostructure based flexible electronics and optoelectronic devices. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  10. Enhanced Device and Circuit-Level Performance Benchmarking of Graphene Nanoribbon Field-Effect Transistor against a Nano-MOSFET with Interconnects

    Directory of Open Access Journals (Sweden)

    Huei Chaeng Chin

    2014-01-01

    Full Text Available Comparative benchmarking of a graphene nanoribbon field-effect transistor (GNRFET and a nanoscale metal-oxide-semiconductor field-effect transistor (nano-MOSFET for applications in ultralarge-scale integration (ULSI is reported. GNRFET is found to be distinctly superior in the circuit-level architecture. The remarkable transport properties of GNR propel it into an alternative technology to circumvent the limitations imposed by the silicon-based electronics. Budding GNRFET, using the circuit-level modeling software SPICE, exhibits enriched performance for digital logic gates in 16 nm process technology. The assessment of these performance metrics includes energy-delay product (EDP and power-delay product (PDP of inverter and NOR and NAND gates, forming the building blocks for ULSI. The evaluation of EDP and PDP is carried out for an interconnect length that ranges up to 100 μm. An analysis, based on the drain and gate current-voltage (Id-Vd and Id-Vg, for subthreshold swing (SS, drain-induced barrier lowering (DIBL, and current on/off ratio for circuit implementation is given. GNRFET can overcome the short-channel effects that are prevalent in sub-100 nm Si MOSFET. GNRFET provides reduced EDP and PDP one order of magnitude that is lower than that of a MOSFET. Even though the GNRFET is energy efficient, the circuit performance of the device is limited by the interconnect capacitances.

  11. Photosensitive N channel MOSFET device on silicon on sapphire substrate

    International Nuclear Information System (INIS)

    Le Goascoz, V.; Borel, J.

    1975-01-01

    An anomalous behavior of the N channel output current characteristic in a SOS MOSFET with a floating bulk is described. Such a phenomenon can be used in a photosensitive device with internal gain. Such devices can be used on SOS substrates to achieve integrated circuits with high insulating voltages and data transmission by optical means [fr

  12. Simulation study of 14-nm-gate III-V trigate field effect transistor devices with In1−xGaxAs channel capping layer

    Directory of Open Access Journals (Sweden)

    Cheng-Hao Huang

    2015-06-01

    Full Text Available In this work, we study characteristics of 14-nm-gate InGaAs-based trigate MOSFET (metal-oxide-semiconductor field effect transistor devices with a channel capping layer. The impacts of thickness and gallium (Ga concentration of the channel capping layer on the device characteristic are firstly simulated and optimized by using three-dimensional quantum-mechanically corrected device simulation. Devices with In1−xGaxAs/In0.53Ga0.47As channels have the large driving current owing to small energy band gap and low alloy scattering at the channel surface. By simultaneously considering various physical and switching properties, a 4-nm-thick In0.68Ga0.32As channel capping layer can be adopted for advanced applications. Under the optimized channel parameters, we further examine the effects of channel fin angle and the work-function fluctuation (WKF resulting from nano-sized metal grains of NiSi gate on the characteristic degradation and variability. To maintain the device characteristics and achieve the minimal variation induced by WKF, the physical findings of this study indicate a critical channel fin angle of 85o is needed for the device with an averaged grain size of NiSi below 4x4 nm2.

  13. Dual-Mode Gas Sensor Composed of a Silicon Nanoribbon Field Effect Transistor and a Bulk Acoustic Wave Resonator: A Case Study in Freons

    Directory of Open Access Journals (Sweden)

    Ye Chang

    2018-01-01

    Full Text Available In this paper, we develop a novel dual-mode gas sensor system which comprises a silicon nanoribbon field effect transistor (Si-NR FET and a film bulk acoustic resonator (FBAR. We investigate their sensing characteristics using polar and nonpolar organic compounds, and demonstrate that polarity has a significant effect on the response of the Si-NR FET sensor, and only a minor effect on the FBAR sensor. In this dual-mode system, qualitative discrimination can be achieved by analyzing polarity with the Si-NR FET and quantitative concentration information can be obtained using a polymer-coated FBAR with a detection limit at the ppm level. The complementary performance of the sensing elements provides higher analytical efficiency. Additionally, a dual mixture of two types of freons (CFC-113 and HCFC-141b is further analyzed with the dual-mode gas sensor. Owing to the small size and complementary metal-oxide semiconductor (CMOS-compatibility of the system, the dual-mode gas sensor shows potential as a portable integrated sensing system for the analysis of gas mixtures in the future.

  14. Processes in N-channel MOSFETs during postirradiation thermal annealing

    International Nuclear Information System (INIS)

    Pejovic, M.; Jaksic, A.; Ristic, G.; Baljosevic, B.

    1997-01-01

    The processes during postirradiation thermal annealing of γ-ray irradiated n-channel MOSFETs with both wet and dry gate oxides are investigated. For both analysed technologies, a so-called ''latent'' interface trap buildup is observed, followed at very late annealing times by the decrease in the interface-trap density. A model is proposed that successfully accounts for the experimental results. Implications of observed effects for total dose hardness assurance test methods implementation are discussed. (author)

  15. N Channel JFET Based Digital Logic Gate Structure

    Science.gov (United States)

    Krasowski, Michael J (Inventor)

    2013-01-01

    An apparatus is provided that includes a first field effect transistor with a source tied to zero volts and a drain tied to voltage drain drain (Vdd) through a first resistor. The apparatus also includes a first node configured to tie a second resistor to a third resistor and connect to an input of a gate of the first field effect transistor in order for the first field effect transistor to receive a signal. The apparatus also includes a second field effect transistor configured as a unity gain buffer having a drain tied to Vdd and an uncommitted source.

  16. The impact of uniaxial stress on subband structure and mobility of strain Si NMOSFETs

    International Nuclear Information System (INIS)

    Chang, S.T.; Liao, S.H.; Lin, C.-Y.

    2008-01-01

    An effect of stress distortion on the conduction band structure was derived by k.p method considering a second order perturbation. From k.p conduction band calculations, stress-induced band edge split and the change of effective mass are quantitatively evaluated. The physical reasons of warped subband structure and abnormal mobility enhancement by uniaxial stress are investigated. Variation rates of experimental electron mobility in the silicon n-channel metal-oxide-semiconductor field-effect-transistors under a [110] uniaxial stress as a function of channel direction is theoretically studied

  17. The comparison of gamma-radiation and electrical stress influences on oxide and interface defects in power VDMOSFET

    Directory of Open Access Journals (Sweden)

    Đorić-Veljković Snežana M.

    2013-01-01

    Full Text Available The behaviour of oxide and interface defects in n-channel power vertical double-diffused metal-oxide-semiconductor field-effect transistors, firstly degraded by the gamma-irradiation and electric field and subsequently recovered and annealed, is presented. By analyzing the transfer characteristic shifts, the changes of threshold voltage and underlying changes of gate oxide and interface trap densities during the stress (recovery, annealing of investigated devices, it is shown that these two types of stress influence differently on the gate oxide and the SiO2-Si interface. [Projekat Ministarstva nauke Republike Srbije, br. OI171026

  18. Climate Change and Closure of Thyborøn Channel

    DEFF Research Database (Denmark)

    Larsen, Torben

    The matter of Thyborøn Channel is the culmination of the coastal engineering in Denmark. Many hundreds of man-years have been spent by engineers and scientists on the planning and evaluation of the complex of problems briefly outlined in the following. After having been separated for more than 70...... of the consequences of the global warming and the rising sea level........ In general, the public conceives the channel as a preservation-worthy piece of nature but the inconvenient truth is that the channel exists only because of human intervention in the nature. At suggestion of Jørgen Bülow Beck and the author the matter was reopened in 2005 because of the discussion...

  19. Ultracompact, High-Speed Field-Effect Optical Modulators (Research Topic 4.2 Optoelectronics)

    Science.gov (United States)

    2017-11-29

    surface charge for a given gate voltage. Third, two MIC structures are designed back-to-back to double the field-induced charge, simultaneously on top...metal-oxide-semiconductor structure, inversion (of carriers into holes), is less likely to occur. Figure 1. Illustration of the working modes of the...between the two gold layers. See Fig. 2(a). Two MIM plasmonic waveguides simultaneously exist in our modulator. The left side one is an Au-HfO2-ITO

  20. Trap density of states in n-channel organic transistors: variable temperature characteristics and band transport

    International Nuclear Information System (INIS)

    Cho, Joung-min; Akiyama, Yuto; Kakinuma, Tomoyuki; Mori, Takehiko

    2013-01-01

    We have investigated trap density of states (trap DOS) in n-channel organic field-effect transistors based on N,N ’-bis(cyclohexyl)naphthalene diimide (Cy-NDI) and dimethyldicyanoquinonediimine (DMDCNQI). A new method is proposed to extract trap DOS from the Arrhenius plot of the temperature-dependent transconductance. Double exponential trap DOS are observed, in which Cy-NDI has considerable deep states, by contrast, DMDCNQI has substantial tail states. In addition, numerical simulation of the transistor characteristics has been conducted by assuming an exponential trap distribution and the interface approximation. Temperature dependence of transfer characteristics are well reproduced only using several parameters, and the trap DOS obtained from the simulated characteristics are in good agreement with the assumed trap DOS, indicating that our analysis is self-consistent. Although the experimentally obtained Meyer-Neldel temperature is related to the trap distribution width, the simulation satisfies the Meyer-Neldel rule only very phenomenologically. The simulation also reveals that the subthreshold swing is not always a good indicator of the total trap amount, because it also largely depends on the trap distribution width. Finally, band transport is explored from the simulation having a small number of traps. A crossing point of the transfer curves and negative activation energy above a certain gate voltage are observed in the simulated characteristics, where the critical V G above which band transport is realized is determined by the sum of the trapped and free charge states below the conduction band edge

  1. N-channel thin-film transistors based on 1,4,5,8-naphthalene tetracarboxylic dianhydride with ultrathin polymer gate buffer layer

    International Nuclear Information System (INIS)

    Tanida, Shinji; Noda, Kei; Kawabata, Hiroshi; Matsushige, Kazumi

    2009-01-01

    N-channel operation of thin-film transistors based on 1,4,5,8-naphthalene tetracarboxylic dianhydride (NTCDA) with a 9-nm-thick poly(methyl methacrylate) (PMMA) gate buffer layer was examined. The uniform coverage of the ultrathin PMMA layer on an SiO 2 gate insulator, verified by X-ray reflectivity measurement, caused the increase of electron field-effect mobility because of the suppression of electron traps existing on the SiO 2 surface. In addition, air stability for n-channel operation of the NTCDA transistor was also improved by the PMMA layer which possibly prevented the adsorption of ambient water molecules onto the SiO 2 surface.

  2. CMOS Active-Pixel Image Sensor With Simple Floating Gates

    Science.gov (United States)

    Fossum, Eric R.; Nakamura, Junichi; Kemeny, Sabrina E.

    1996-01-01

    Experimental complementary metal-oxide/semiconductor (CMOS) active-pixel image sensor integrated circuit features simple floating-gate structure, with metal-oxide/semiconductor field-effect transistor (MOSFET) as active circuit element in each pixel. Provides flexibility of readout modes, no kTC noise, and relatively simple structure suitable for high-density arrays. Features desirable for "smart sensor" applications.

  3. Design and Analysis of CMOS-Compatible III-V Compound Electron-Hole Bilayer Tunneling Field-Effect Transistor for Ultra-Low-Power Applications.

    Science.gov (United States)

    Kim, Sung Yoon; Seo, Jae Hwa; Yoon, Young Jun; Lee, Ho-Young; Lee, Seong Min; Cho, Seongjae; Kang, In Man

    2015-10-01

    In this work, we design and analyze complementary metal-oxide-semiconductor (CMOS)-compatible III-V compound electron-hole bilayer (EHB) tunneling field-effect transistors (TFETs) by using two-dimensional (2D) technology computer-aided design (TCAD) simulations. A recently proposed EHB TFET exploits a bias-induced band-to-band tunneling (BTBT) across the electron-hole bilayer by an electric field from the top and bottom gates. This is in contrast to conventional planar p(+)-p(-)-n TFETs, which utilize BTBT across the source-to-channel junction. We applied III-V compound semiconductor materials to the EHB TFETs in order to enhance the current drivability and switching performance. Devices based on various compound semiconductor materials have been designed and analyzed in terms of their primary DC characteristics. In addition, the operational principles were validated by close examination of the electron concentrations and energy-band diagrams under various operation conditions. The simulation results of the optimally designed In0.533Ga0.47As EHB TFET show outstanding performance, with an on-state current (Ion) of 249.5 μA/μm, subthreshold swing (S) of 11.4 mV/dec, and threshold voltage (Vth) of 50 mV at VDS = 0.5 V. Based on the DC-optimized InGaAs EHB TFET, the CMOS inverter circuit was simulated in views of static and dynamic behaviors of the p-channel device with exchanges between top and bottom gates or between source and drain electrodes maintaining the device structure.

  4. Remote interfacial dipole scattering and electron mobility degradation in Ge field-effect transistors with GeO x /Al2O3 gate dielectrics

    Science.gov (United States)

    Wang, Xiaolei; Xiang, Jinjuan; Wang, Shengkai; Wang, Wenwu; Zhao, Chao; Ye, Tianchun; Xiong, Yuhua; Zhang, Jing

    2016-06-01

    Remote Coulomb scattering (RCS) on electron mobility degradation is investigated experimentally in Ge-based metal-oxide-semiconductor field-effect-transistors (MOSFETs) with GeO x /Al2O3 gate stacks. It is found that the mobility increases with greater GeO x thickness (7.8-20.8 Å). The physical origin of this mobility dependence on GeO x thickness is explored. The following factors are excluded: Coulomb scattering due to interfacial traps at GeO x /Ge, phonon scattering, and surface roughness scattering. Therefore, the RCS from charges in gate stacks is studied. The charge distributions in GeO x /Al2O3 gate stacks are evaluated experimentally. The bulk charges in Al2O3 and GeO x are found to be negligible. The density of the interfacial charge is  +3.2  ×  1012 cm-2 at the GeO x /Ge interface and  -2.3  ×  1012 cm-2 at the Al2O3/GeO x interface. The electric dipole at the Al2O3/GeO x interface is found to be  +0.15 V, which corresponds to an areal charge density of 1.9  ×  1013 cm-2. The origin of this mobility dependence on GeO x thickness is attributed to the RCS due to the electric dipole at the Al2O3/GeO x interface. This remote dipole scattering is found to play a significant role in mobility degradation. The discovery of this new scattering mechanism indicates that the engineering of the Al2O3/GeO x interface is key for mobility enhancement and device performance improvement. These results are helpful for understanding and engineering Ge mobility enhancement.

  5. Impedance Characterization of the Capacitive field-Effect pH-Sensor Based on a thin-Layer Hafnium Oxide Formed by Atomic Layer Deposition

    Directory of Open Access Journals (Sweden)

    Michael LEE

    2014-05-01

    Full Text Available As a sensing element, silicon dioxide (SiO2 has been applied within ion-sensitive field effect transistors (ISFET. However, a requirement of increasing pH-sensitivity and stability has observed an increased number of insulating materials that obtain high-k gate being applied as FETs. The increased high-k gate reduces the required metal oxide layer and, thus, the fabrication of thin hafnium oxide (HfO2 layers by atomic layer deposition (ALD has grown with interest in recent years. This metal oxide presents advantageous characteristics that can be beneficial for the advancements within miniaturization of complementary metal oxide semiconductor (CMOS technology. In this article, we describe a process for fabrication of HfO2 based on ALD by applying water (H2O as the oxygen precursor. As a first, electrochemical impedance spectroscopy (EIS measurements were performed with varying pH (2-10 to demonstrate the sensitivity of HfO2 as a potential pH sensing material. The Nyquist plot demonstrates a high clear shift of the polarization resistance (Rp between pH 6-10 (R2 = 0.9986, Y = 3,054X + 12,100. At acidic conditions (between pH 2-10, the Rp change was small due to the unmodified oxide gate (R2 = 0.9655, Y = 2,104X + 4,250. These preliminary results demonstrate the HfO2 substrate functioned within basic to neutral conditions and establishes a great potential for applying HfO2 as a dielectric material for future pH measuring FET sensors.

  6. Functionalization and Characterization of Nanomaterial Gated Field-Effect Transistor-Based Biosensors and the Design of a Multi-Analyte Implantable Biosensing Platform

    Science.gov (United States)

    Croce, Robert A., Jr.

    Advances in semiconductor research and complementary-metal-oxide semiconductor fabrication allow for the design and implementation of miniaturized metabolic monitoring systems, as well as advanced biosensor design. The first part of this dissertation will focus on the design and fabrication of nanomaterial (single-walled carbon nanotube and quantum dot) gated field-effect transistors configured as protein sensors. These novel device structures have been functionalized with single-stranded DNA aptamers, and have shown sensor operation towards the protein Thrombin. Such advanced transistor-based sensing schemes present considerable advantages over traditional sensing methodologies in view of its miniaturization, low cost, and facile fabrication, paving the way for the ultimate realization of a multi-analyte lab-on-chip. The second part of this dissertation focuses on the design and fabrication of a needle-implantable glucose sensing platform which is based solely on photovoltaic powering and optical communication. By employing these powering and communication schemes, this design negates the need for bulky on-chip RF-based transmitters and batteries in an effort to attain extreme miniaturization required for needle-implantable/extractable applications. A complete single-sensor system coupled with a miniaturized amperometric glucose sensor has been demonstrated to exhibit reality of this technology. Furthermore, an optical selection scheme of multiple potentiostats for four different analytes (glucose, lactate, O 2 and CO2) as well as the optical transmission of sensor data has been designed for multi-analyte applications. The last part of this dissertation will focus on the development of a computational model for the amperometric glucose sensors employed in the aforementioned implantable platform. This model has been applied to single-layer single-enzyme systems, as well as multi-layer (single enzyme) systems utilizing glucose flux limiting layer-by-layer assembled

  7. Adsorption smoke detector made of thin-film metal-oxide semiconductor sensor

    International Nuclear Information System (INIS)

    Adamian, A.Z.; Adamian, Z.N.; Aroutiounian, V.M.

    2001-01-01

    Based on results of investigations of the thin-film smoke sensors made of Bi 2 O 3 , irresponsive to a change in relative humidity of the environment, an absorption smoke detector processing circuit, where investigated sensor is used as a sensitive element, is proposed. It is shown that such smoke detector is able to function reliably under conditions of high relative humidity of the environment (up to 100%) and it considerably exceeds the known smoke detectors by the sensitivity threshold

  8. Electronic defect levels in continuous wave laser annealed silicon metal oxide semiconductor devices

    Science.gov (United States)

    Cervera, M.; Garcia, B. J.; Martinez, J.; Garrido, J.; Piqueras, J.

    1988-09-01

    The effect of laser treatment on the bulk and interface states of the Si-SiO2 structure has been investigated. The annealing was performed prior to the gate metallization using a continuous wave Ar+ laser. For low laser powers the interface state density seems to decrease slightly in comparison with untreated samples. However, for the highest irradiating laser powers a new bulk level at 0.41 eV above the valence band with concentrations up to 1015 cm-3 arises probably due to the electrical activation of the oxygen diluted in the Czochralski silicon. Later postmetallization annealings reduce the interface state density to values in the 1010 cm-2 eV-1 range but leave the concentration of the 0.41-eV center nearly unchanged.

  9. Defect-driven interfacial electronic structures at an organic/metal-oxide semiconductor heterojunction.

    Science.gov (United States)

    Winget, Paul; Schirra, Laura K; Cornil, David; Li, Hong; Coropceanu, Veaceslav; Ndione, Paul F; Sigdel, Ajaya K; Ginley, David S; Berry, Joseph J; Shim, Jaewon; Kim, Hyungchui; Kippelen, Bernard; Brédas, Jean-Luc; Monti, Oliver L A

    2014-07-16

    The electronic structure of the hybrid interface between ZnO and the prototypical organic semiconductor PTCDI is investigated via a combination of ultraviolet and X-ray photoelectron spectroscopy (UPS/XPS) and density functional theory (DFT) calculations. The interfacial electronic interactions lead to a large interface dipole due to substantial charge transfer from ZnO to 3,4,9,10-perylenetetracarboxylicdiimide (PTCDI), which can be properly described only when accounting for surface defects that confer ZnO its n-type properties. © 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  10. Electrosprayed Metal Oxide Semiconductor Films for Sensitive and Selective Detection of Hydrogen Sulfide

    Directory of Open Access Journals (Sweden)

    Maryam Siadat

    2009-11-01

    Full Text Available Semiconductor metal oxide films of copper-doped tin oxide (Cu-SnO2, tungsten oxide (WO3 and indium oxide (In2O3 were deposited on a platinum coated alumina substrate employing the electrostatic spray deposition technique (ESD. The morphology studied with scanning electron microscopy (SEM and atomic force microscopy (AFM shows porous homogeneous films comprising uniformly distributed aggregates of nano particles. The X-ray diffraction technique (XRD proves the formation of crystalline phases with no impurities. Besides, the Raman cartographies provided information about the structural homogeneity. Some of the films are highly sensitive to low concentrations of H2S (10 ppm at low operating temperatures (100 and 200 °C and the best response in terms of Rair/Rgas is given by Cu-SnO2 films (2500 followed by WO3 (1200 and In2O3 (75. Moreover, all the films exhibit no cross-sensitivity to other reducing (SO2 or oxidizing (NO2 gases.

  11. Composite metal oxide semiconductor based photodiodes for solar panel tracking applications

    Energy Technology Data Exchange (ETDEWEB)

    Al-Ghamdi, Ahmed A., E-mail: aghamdi90@hotmail.com [Department of Physics, Faculty of Science, King Abdulaziz University, Jeddah (Saudi Arabia); Dere, A. [Department of Physics, Faculty of Science, Firat University, Elazig (Turkey); Tataroğlu, A. [Department of Physics, Faculty of Science, Gazi University, Ankara (Turkey); Arif, Bilal [Department of Physics, Faculty of Science, Firat University, Elazig (Turkey); Yakuphanoglu, F. [Department of Physics, Faculty of Science, King Abdulaziz University, Jeddah (Saudi Arabia); Department of Physics, Faculty of Science, Firat University, Elazig (Turkey); El-Tantawy, Farid [Department of Physics, Faculty of Science, Suez Canal University, Ismailia (Egypt); Farooq, W.A. [Physics and Astronomy Department, College of Science, King Saud University, Riyadh (Saudi Arabia)

    2015-11-25

    The Zn{sub 1−x}Al{sub x}O:Cu{sub 2}O composite films were synthesized by the sol gel method to fabricate photodiodes. The transparent metal oxide Zn{sub 1−x}Al{sub x}O:Cu{sub 2}O thin films were grown on p-Si substrates by spin coating technique. Electrical characterization of the p-Si/AZO:Cu{sub 2}O photodiodes was performed by current–voltage and capacitance–conductance–voltage characteristics under dark and various illumination conditions. The transient photocurrent of the diodes increases with increase in illumination intensity. The photoconducting mechanism of the diodes is controlled by the continuous distribution of trap levels. The photocapacitance and photoconductivity of the diodes are decreased with increasing Cu{sub 2}O content. The series resistance–voltage behavior confirms the presence of the interface states in the interface of the diodes. The photoresponse properties of the diodes indicate that the p-Si/Zn{sub 1−x}Al{sub x}O–Cu{sub 2}O diodes can be used as a photosensor in solar panel tracking applications. - Highlights: • Zn{sub 1−x}Al{sub x}O:Cu{sub 2}O composite films were synthesized by the sol gel method. • p-Si/Zn{sub 1−x}Al{sub x}O–Cu{sub 2}O diodes were fabricated. • p-Si/Zn{sub 1−x}Al{sub x}O–Cu{sub 2}O diodes can be used in the optoelectronic applications.

  12. Development of a Silicon Metal-Oxide-Semiconductor-Based Qubit Using Spin Exchange Interactions Alone

    Science.gov (United States)

    2016-03-31

    technology fields: Student Metrics This section only applies to graduating undergraduates supported by this agreement in this reporting period The number...QD device, around a Coulomb peak, shows 1/f power spectra density for the intrinsic gate noise. The noise amplitude reduces continuously as the

  13. Adsorption smoke detector made of thin-film metal-oxide semiconductor sensor

    CERN Document Server

    Adamian, A Z; Aroutiounian, V M

    2001-01-01

    Based on results of investigations of the thin-film smoke sensors made of Bi sub 2 O sub 3 , irresponsive to a change in relative humidity of the environment, an absorption smoke detector processing circuit, where investigated sensor is used as a sensitive element, is proposed. It is shown that such smoke detector is able to function reliably under conditions of high relative humidity of the environment (up to 100%) and it considerably exceeds the known smoke detectors by the sensitivity threshold.

  14. Chemistry integrated circuit: chemical system on a complementary metal oxide semiconductor integrated circuit.

    Science.gov (United States)

    Nakazato, Kazuo

    2014-03-28

    By integrating chemical reactions on a large-scale integration (LSI) chip, new types of device can be created. For biomedical applications, monolithically integrated sensor arrays for potentiometric, amperometric and impedimetric sensing of biomolecules have been developed. The potentiometric sensor array detects pH and redox reaction as a statistical distribution of fluctuations in time and space. For the amperometric sensor array, a microelectrode structure for measuring multiple currents at high speed has been proposed. The impedimetric sensor array is designed to measure impedance up to 10 MHz. The multimodal sensor array will enable synthetic analysis and make it possible to standardize biosensor chips. Another approach is to create new functional devices by integrating molecular systems with LSI chips, for example image sensors that incorporate biological materials with a sensor array. The quantum yield of the photoelectric conversion of photosynthesis is 100%, which is extremely difficult to achieve by artificial means. In a recently developed process, a molecular wire is plugged directly into a biological photosynthetic system to efficiently conduct electrons to a gold electrode. A single photon can be detected at room temperature using such a system combined with a molecular single-electron transistor.

  15. Numerical Simulation of Tunneling Current in an Anisotropic Metal-Oxide-Semiconductor Capacitor

    Directory of Open Access Journals (Sweden)

    Khairurrijal khairurrijal

    2012-09-01

    Full Text Available In this paper, we have developed a model of the tunneling currents through a high-k dielectric stack in MOS capacitors with anisotropic masses. The transmittance was numerically calculated by employing a transfer matrix method and including longitudinal-transverse kinetic energy coupling which is represented by an electron phase velocity in the gate. The transmittance was then applied to calculate tunneling currents in TiN/HfSiOxN/SiO2/p-Si MOS capacitors. The calculated results show that as the gate electron velocity increases, the transmittance decreases and therefore the tunneling current reduces. The tunneling current becomes lower as the effective oxide thickness (EOT of HfSiOxN layer increases. When the incident electron passed through the barriers in the normal incident to the interface, the electron tunneling process becomes easier. It was also shown that the tunneling current was independent of the substrate orientation. Moreover, the model could be used in designing high speed MOS devices with low tunneling currents.

  16. Atomic origin of high-temperature electron trapping in metal-oxide-semiconductor devices

    Energy Technology Data Exchange (ETDEWEB)

    Shen, Xiao, E-mail: xiao.shen@vanderbilt.edu [Department of Physics and Astronomy, Vanderbilt University, Nashville, Tennessee 37235 (United States); Dhar, Sarit [Department of Physics, Auburn University, Auburn, Alabama 36849 (United States); Pantelides, Sokrates T. [Department of Physics and Astronomy, Vanderbilt University, Nashville, Tennessee 37235 (United States); Department of Electrical Engineering and Computer Science, Vanderbilt University, Nashville, Tennessee 37235 (United States); Materials Science and Technology Division, Oak Ridge National Laboratory, Oak Ridge, Tennessee 37831 (United States)

    2015-04-06

    MOSFETs based on wide-band-gap semiconductors are suitable for operation at high temperature, at which additional atomic-scale processes that are benign at lower temperatures can get activated, resulting in device degradation. Recently, significant enhancement of electron trapping was observed under positive bias in SiC MOSFETs at temperatures higher than 150 °C. Here, we report first-principles calculations showing that the enhanced electron trapping is associated with thermally activated capturing of a second electron by an oxygen vacancy in SiO{sub 2} by which the vacancy transforms into a structure that comprises one Si dangling bond and a bond between a five-fold and a four-fold Si atoms. The results suggest a key role of oxygen vacancies and their structural reconfigurations in the reliability of high-temperature MOS devices.

  17. Low Temperature Processed Complementary Metal Oxide Semiconductor (CMOS) Device by Oxidation Effect from Capping Layer

    KAUST Repository

    Wang, Zhenwei

    2015-04-20

    In this report, both p- and n-type tin oxide thin-film transistors (TFTs) were simultaneously achieved using single-step deposition of the tin oxide channel layer. The tuning of charge carrier polarity in the tin oxide channel is achieved by selectively depositing a copper oxide capping layer on top of tin oxide, which serves as an oxygen source, providing additional oxygen to form an n-type tin dioxide phase. The oxidation process can be realized by annealing at temperature as low as 190°C in air, which is significantly lower than the temperature generally required to form tin dioxide. Based on this approach, CMOS inverters based entirely on tin oxide TFTs were fabricated. Our method provides a solution to lower the process temperature for tin dioxide phase, which facilitates the application of this transparent oxide semiconductor in emerging electronic devices field.

  18. High performance high-κ/metal gate complementary metal oxide semiconductor circuit element on flexible silicon

    KAUST Repository

    Sevilla, Galo T.; Almuslem, A. S.; Gumus, Abdurrahman; Hussain, Aftab M.; Hussain, Aftab M.; Cruz, Melvin; Hussain, Muhammad Mustafa

    2016-01-01

    shows large area of silicon thinning with pre-fabricated high performance elements with ultra-large-scale-integration density (using 90 nm node technology) and then dicing of such large and thinned (seemingly fragile) pieces into smaller pieces using

  19. Electron transport properties of indium oxide - indium nitride metal-oxide-semiconductor heterostructures

    International Nuclear Information System (INIS)

    Wang, C.Y.; Hauguth, S.; Polyakov, V.; Schwierz, F.; Cimalla, V.; Kups, T.; Himmerlich, M.; Schaefer, J.A.; Krischok, S.; Ambacher, O.; Morales, F.M.; Lozano, J.G.; Gonzalez, D.; Lebedev, V.

    2008-01-01

    The structural, chemical and electron transport properties of In 2 O 3 /InN heterostructures and oxidized InN epilayers are reported. It is shown that the accumulation of electrons at the InN surface can be manipulated by the formation of a thin surface oxide layer. The epitaxial In 2 O 3 /InN heterojunctions show an increase in the electron concentration due to the increasing band banding at the heterointerface. The oxidation of InN results in improved transport properties and in a reduction of the sheet carrier concentration of the InN epilayer very likely caused by a passivation of surface donors. (copyright 2008 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim) (orig.)

  20. Magnetic state dependent transient lateral photovoltaic effect in patterned ferromagnetic metal-oxide-semiconductor films

    Directory of Open Access Journals (Sweden)

    Isidoro Martinez

    2015-11-01

    Full Text Available We investigate the influence of an external magnetic field on the magnitude and dephasing of the transient lateral photovoltaic effect (T-LPE in lithographically patterned Co lines of widths of a few microns grown over naturally passivated p-type Si(100. The T-LPE peak-to-peak magnitude and dephasing, measured by lock-in or through the characteristic time of laser OFF exponential relaxation, exhibit a notable influence of the magnetization direction of the ferromagnetic overlayer. We show experimentally and by numerical simulations that the T-LPE magnitude is determined by the Co anisotropic magnetoresistance. On the other hand, the magnetic field dependence of the dephasing could be described by the influence of the Lorentz force acting perpendiculary to both the Co magnetization and the photocarrier drift directions. Our findings could stimulate the development of fast position sensitive detectors with magnetically tuned magnitude and phase responses.

  1. Complementary metal-oxide semiconductor compatible source of single photons at near-visible wavelengths

    Science.gov (United States)

    Cernansky, Robert; Martini, Francesco; Politi, Alberto

    2018-02-01

    We demonstrate on chip generation of correlated pairs of photons in the near-visible spectrum using a CMOS compatible PECVD Silicon Nitride photonic device. Photons are generated via spontaneous four wave mixing enhanced by a ring resonator with high quality Q-factor of 320,000 resulting in a generation rate of 950,000 $\\frac{pairs}{mW}$. The high brightness of this source offers the opportunity to expand photonic quantum technologies over a broad wavelength range and provides a path to develop fully integrated quantum chips working at room temperature.

  2. Characterization study of an intensified complementary metal-oxide-semiconductor active pixel sensor

    Science.gov (United States)

    Griffiths, J. A.; Chen, D.; Turchetta, R.; Royle, G. J.

    2011-03-01

    An intensified CMOS active pixel sensor (APS) has been constructed for operation in low-light-level applications: a high-gain, fast-light decay image intensifier has been coupled via a fiber optic stud to a prototype "VANILLA" APS, developed by the UK based MI3 consortium. The sensor is capable of high frame rates and sparse readout. This paper presents a study of the performance parameters of the intensified VANILLA APS system over a range of image intensifier gain levels when uniformly illuminated with 520 nm green light. Mean-variance analysis shows the APS saturating around 3050 Digital Units (DU), with the maximum variance increasing with increasing image intensifier gain. The system's quantum efficiency varies in an exponential manner from 260 at an intensifier gain of 7.45 × 103 to 1.6 at a gain of 3.93 × 101. The usable dynamic range of the system is 60 dB for intensifier gains below 1.8 × 103, dropping to around 40 dB at high gains. The conclusion is that the system shows suitability for the desired application.

  3. Low Temperature Processed Complementary Metal Oxide Semiconductor (CMOS) Device by Oxidation Effect from Capping Layer

    KAUST Repository

    Wang, Zhenwei; Al-Jawhari, Hala A.; Nayak, Pradipta K.; Caraveo-Frescas, J. A.; Wei, Nini; Hedhili, Mohamed N.; Alshareef, Husam N.

    2015-01-01

    , which is significantly lower than the temperature generally required to form tin dioxide. Based on this approach, CMOS inverters based entirely on tin oxide TFTs were fabricated. Our method provides a solution to lower the process temperature for tin

  4. High permittivity materials for oxide gate stack in Ge-based metal oxide semiconductor capacitors

    Energy Technology Data Exchange (ETDEWEB)

    Molle, Alessandro, E-mail: alessandro.molle@mdm.infm.i [Laboratorio Nazionale MDM, CNR-INFM, via C. Olivetti 2, 20041 Agrate Brianza, Milano (Italy); Baldovino, Silvia [Laboratorio Nazionale MDM, CNR-INFM, via C. Olivetti 2, 20041 Agrate Brianza, Milano (Italy); Dipartimento di Scienza dei Materiali, Universita degli Studi di Milano Bicocca, Milano (Italy); Spiga, Sabina [Laboratorio Nazionale MDM, CNR-INFM, via C. Olivetti 2, 20041 Agrate Brianza, Milano (Italy); Fanciulli, Marco [Laboratorio Nazionale MDM, CNR-INFM, via C. Olivetti 2, 20041 Agrate Brianza, Milano (Italy); Dipartimento di Scienza dei Materiali, Universita degli Studi di Milano Bicocca, Milano (Italy)

    2010-01-01

    In the effort to ultimately shrink the size of logic devices towards a post-Si era, the integration of Ge as alternative channel material for high-speed p-MOSFET devices and the concomitant coupling with high permittivity dielectrics (high-k) as gate oxides is currently a key-challenge in microelectronics. However, the Ge option still suffers from a number of unresolved drawbacks and open issues mainly related to the thermodynamic and electrical compatibility of Ge substrates with high-k gate stack. Strictly speaking, two main concerns can be emphasized. On one side is the dilemma on which chemical/physical passivation is more suitable to minimize the unavoidable presence of electrically active defects at the oxide/semiconductor interface. On the other side, overcoming the SiO{sub 2} gate stack opens the route to a number of potentially outperforming high-k oxides. Two deposition approaches were here separately adopted to investigate the high-k oxide growth on Ge substrates, the molecular beam deposition (MBD) of Gd{sub 2}O{sub 3} and the atomic layer deposition (ALD) of HfO{sub 2}. In the MBD framework epitaxial and amorphous Gd{sub 2}O{sub 3} films were grown onto GeO{sub 2}-passivated Ge substrates. In this case, Ge passivation was achieved by exploiting the Ge{sup 4+} bonding state in GeO{sub 2} ultra-thin interface layers intentionally deposited in between Ge and the high-k oxide by means of atomic oxygen exposure to Ge. The composition of the interface layer has been characterized as a function of the oxidation temperature and evidence of Ge dangling bonds at the GeO{sub 2}/Ge interface has been reported. Finally, the electrical response of MOS capacitors incorporating Gd{sub 2}O{sub 3} and GeO{sub 2}-passivated Ge substrates has been checked by capacitance-voltage measurements. On the other hand, the structural and electrical properties of HfO{sub 2} films grown by ALD on Ge by using different oxygen precursors, i.e. H{sub 2}O, Hf(O{sup t}Bu){sub 2}(mmp){sub 2}, and O{sub 3}, were compared. Exploiting O{sub 3} as oxidizing precursor in the ALD of HfO{sub 2} is shown to play a beneficial role in efficiently improving the electrical quality of the high-k/Ge interface through the pronounced formation of a GeO{sub 2}-like interface layer. In both cases, carefully engineering the chemical nature of the interface by the deliberate deposition of interface passivation layers or by the proper choice of ALD precursors turns out to be a key-step to couple high-k materials with Ge.

  5. Analysis of the capability to effectively design complementary metal oxide semiconductor integrated circuits

    Science.gov (United States)

    McConkey, M. L.

    1984-12-01

    A complete CMOS/BULK design cycle has been implemented and fully tested to evaluate its effectiveness and a viable set of computer-aided design tools for the layout, verification, and simulation of CMOS/BULK integrated circuits. This design cycle is good for p-well, n-well, or twin-well structures, although current fabrication technique available limit this to p-well only. BANE, an integrated layout program from Stanford, is at the center of this design cycle and was shown to be simple to use in the layout of CMOS integrated circuits (it can be also used to layout NMOS integrated circuits). A flowchart was developed showing the design cycle from initial layout, through design verification, and to circuit simulation using NETLIST, PRESIM, and RNL from the University of Washington. A CMOS/BULK library was designed and includes logic gates that were designed and completely tested by following this flowchart. Also designed was an arithmetic logic unit as a more complex test of the CMOS/BULK design cycle.

  6. Irradiation of: MOS field effect structures effect of the radiation dose

    International Nuclear Information System (INIS)

    Leray, J.L.

    1989-01-01

    The radiation effects on the structure and the operation of a metal-oxide semiconductor (MOS) are studied. The phenomenology of the radiation damage is analyzed as a function of the accumulated radiation dose and the time. The chronology of the phenomena which takes place in the oxide and the radiation transient phases in MOS structures are discussed. The equivalence of different radiations on SiO2 and other semiconductors is analyzed. The models applied to the study of the radiation permanent effects are reviewed [fr

  7. High-performance III-V MOSFET with nano-stacked high-k gate dielectric and 3D fin-shaped structure.

    Science.gov (United States)

    Chen, Szu-Hung; Liao, Wen-Shiang; Yang, Hsin-Chia; Wang, Shea-Jue; Liaw, Yue-Gie; Wang, Hao; Gu, Haoshuang; Wang, Mu-Chun

    2012-08-01

    A three-dimensional (3D) fin-shaped field-effect transistor structure based on III-V metal-oxide-semiconductor field-effect transistor (MOSFET) fabrication has been demonstrated using a submicron GaAs fin as the high-mobility channel. The fin-shaped channel has a thickness-to-width ratio (TFin/WFin) equal to 1. The nano-stacked high-k Al2O3 dielectric was adopted as a gate insulator in forming a metal-oxide-semiconductor structure to suppress gate leakage. The 3D III-V MOSFET exhibits outstanding gate controllability and shows a high Ion/Ioff ratio > 105 and a low subthreshold swing of 80 mV/decade. Compared to a conventional Schottky gate metal-semiconductor field-effect transistor or planar III-V MOSFETs, the III-V MOSFET in this work exhibits a significant performance improvement and is promising for future development of high-performance n-channel devices based on III-V materials.

  8. Molecular materials for organic field-effect transistors

    International Nuclear Information System (INIS)

    Mori, T

    2008-01-01

    Organic field-effect transistors are important applications of thin films of molecular materials. A variety of materials have been explored for improving the performance of organic transistors. The materials are conventionally classified as p-channel and n-channel, but not only the performance but also even the carrier polarity is greatly dependent on the combinations of organic semiconductors and electrode materials. In this review, particular emphasis is laid on multi-sulfur compounds such as tetrathiafulvalenes and metal dithiolates. These compounds are components of highly conducting materials such as organic superconductors, but are also used in organic transistors. The charge-transfer complexes are used in organic transistors as active layers as well as electrodes. (topical review)

  9. Organic tunnel field effect transistors

    KAUST Repository

    Tietze, Max Lutz; Lussem, Bjorn; Liu, Shiyi

    2017-01-01

    Various examples are provided for organic tunnel field effect transistors (OTFET), and methods thereof. In one example, an OTFET includes a first intrinsic layer (i-layer) of organic semiconductor material disposed over a gate insulating layer

  10. Calculating Second-Order Effects in MOSFET's

    Science.gov (United States)

    Benumof, Reuben; Zoutendyk, John A.; Coss, James R.

    1990-01-01

    Collection of mathematical models includes second-order effects in n-channel, enhancement-mode, metal-oxide-semiconductor field-effect transistors (MOSFET's). When dimensions of circuit elements relatively large, effects neglected safely. However, as very-large-scale integration of microelectronic circuits leads to MOSFET's shorter or narrower than 2 micrometer, effects become significant in design and operation. Such computer programs as widely-used "Simulation Program With Integrated Circuit Emphasis, Version 2" (SPICE 2) include many of these effects. In second-order models of n-channel, enhancement-mode MOSFET, first-order gate-depletion region diminished by triangular-cross-section deletions on end and augmented by circular-wedge-cross-section bulges on sides.

  11. Tunneling field effect transistor technology

    CERN Document Server

    Chan, Mansun

    2016-01-01

    This book provides a single-source reference to the state-of-the art in tunneling field effect transistors (TFETs). Readers will learn the TFETs physics from advanced atomistic simulations, the TFETs fabrication process and the important roles that TFETs will play in enabling integrated circuit designs for power efficiency. · Provides comprehensive reference to tunneling field effect transistors (TFETs); · Covers all aspects of TFETs, from device process to modeling and applications; · Enables design of power-efficient integrated circuits, with low power consumption TFETs.

  12. AlN metal-semiconductor field-effect transistors using Si-ion implantation

    Science.gov (United States)

    Okumura, Hironori; Suihkonen, Sami; Lemettinen, Jori; Uedono, Akira; Zhang, Yuhao; Piedra, Daniel; Palacios, Tomás

    2018-04-01

    We report on the electrical characterization of Si-ion implanted AlN layers and the first demonstration of metal-semiconductor field-effect transistors (MESFETs) with an ion-implanted AlN channel. The ion-implanted AlN layers with Si dose of 5 × 1014 cm-2 exhibit n-type characteristics after thermal annealing at 1230 °C. The ion-implanted AlN MESFETs provide good drain current saturation and stable pinch-off operation even at 250 °C. The off-state breakdown voltage is 2370 V for drain-to-gate spacing of 25 µm. These results show the great potential of AlN-channel transistors for high-temperature and high-power applications.

  13. Structured-gate organic field-effect transistors

    International Nuclear Information System (INIS)

    Aljada, Muhsen; Pandey, Ajay K; Velusamy, Marappan; Burn, Paul L; Meredith, Paul; Namdas, Ebinazar B

    2012-01-01

    We report the fabrication and electrical characteristics of structured-gate organic field-effect transistors consisting of a gate electrode patterned with three-dimensional pillars. The pillar gate electrode was over-coated with a gate dielectric (SiO 2 ) and solution processed organic semiconductors producing both unipolar p-type and bipolar behaviour. We show that this new structured-gate architecture delivers higher source-drain currents, higher gate capacitance per unit equivalent linear channel area, and enhanced charge injection (electrons and/or holes) versus the conventional planar structure in all modes of operation. For the bipolar field-effect transistor (FET) the maximum source-drain current enhancements in p- and n-channel mode were >600% and 28%, respectively, leading to p and n charge mobilities with the same order of magnitude. Thus, we have demonstrated that it is possible to use the FET architecture to manipulate and match carrier mobilities of material combinations where one charge carrier is normally dominant. Mobility matching is advantageous for creating organic logic circuit elements such as inverters and amplifiers. Hence, the method represents a facile and generic strategy for improving the performance of standard organic semiconductors as well as new materials and blends. (paper)

  14. Structured-gate organic field-effect transistors

    Science.gov (United States)

    Aljada, Muhsen; Pandey, Ajay K.; Velusamy, Marappan; Burn, Paul L.; Meredith, Paul; Namdas, Ebinazar B.

    2012-06-01

    We report the fabrication and electrical characteristics of structured-gate organic field-effect transistors consisting of a gate electrode patterned with three-dimensional pillars. The pillar gate electrode was over-coated with a gate dielectric (SiO2) and solution processed organic semiconductors producing both unipolar p-type and bipolar behaviour. We show that this new structured-gate architecture delivers higher source-drain currents, higher gate capacitance per unit equivalent linear channel area, and enhanced charge injection (electrons and/or holes) versus the conventional planar structure in all modes of operation. For the bipolar field-effect transistor (FET) the maximum source-drain current enhancements in p- and n-channel mode were >600% and 28%, respectively, leading to p and n charge mobilities with the same order of magnitude. Thus, we have demonstrated that it is possible to use the FET architecture to manipulate and match carrier mobilities of material combinations where one charge carrier is normally dominant. Mobility matching is advantageous for creating organic logic circuit elements such as inverters and amplifiers. Hence, the method represents a facile and generic strategy for improving the performance of standard organic semiconductors as well as new materials and blends.

  15. Indium Sulfide and Indium Oxide Thin Films Spin-Coated from Triethylammonium Indium Thioacetate Precursor for n-Channel Thin Film Transistor

    Energy Technology Data Exchange (ETDEWEB)

    Tung, Duy Dao; Jeong, Hyun Dam [Chonnam Natioal University, Gwangju (Korea, Republic of)

    2014-09-15

    The In{sub 2}S{sub 3} thin films of tetragonal structure and In{sub 2}O{sub 3} films of cubic structure were synthesized by a spin coating method from the organometallic compound precursor triethylammonium indium thioacetate ([(Et){sub 3}NH]+ [In(SCOCH{sub 3}){sub 4}]''-; TEA-InTAA). In order to determine the electron mobility of the spin-coated TEA-InTAA films, thin film transistors (TFTs) with an inverted structure using a gate dielectric of thermal oxide (SiO{sub 2}) was fabricated. These devices exhibited n-channel TFT characteristics with a field-effect electron mobility of 10.1 cm''2 V''-1s''-1 at a curing temperature of 500 o C, indicating that the semiconducting thin film material is applicable for use in low-cost, solution-processed printable electronics.

  16. Temperature dependent IDS–VGS characteristics of an N-channel Si tunneling field-effect transistor with a germanium source on Si(110) substrate

    International Nuclear Information System (INIS)

    Liu Yan; Yan Jing; Wang Hongjuan; Han Genquan

    2014-01-01

    We fabricated n-type Si-based TFETs with a Ge source on Si(110) substrate. The temperature dependent I DS –V GS characteristics of a TFET formed on Si(110) are investigated in the temperature range of 210 to 300 K. A study of the temperature dependence of I Leakage indicates that I Leakage is mainly dominated by the Shockley-Read-Hall (SRH) generation—recombination current of the n + drain—Si substrate junction. I ON increases monotonically with temperature, which is attributed to a reduction of the bandgap at the tunneling junction and an enhancement of band-to-band tunneling rate. The subthreshold swing S for trap assisted tunneling (TAT) current and band-to-band tunneling (BTBT) current shows the different temperature dependence. The subthreshold swing S for the TAT current degrades with temperature, while the S for BTBT current is temperature independent. (semiconductor devices)

  17. Pronounced Side Chain Effects in Triple Bond-Conjugated Polymers Containing Naphthalene Diimides for n-Channel Organic Field-Effect Transistors

    KAUST Repository

    Nam, Sungho

    2018-03-23

    Three triple bond-conjugated naphthalene diimide (NDI) copolymers, poly{[N,N′-bis(2-R1)-naphthalene-1,4,5,8-bis(dicarboximide)-2,6-diyl]-alt-[(2,5-bis(2-R2)-1,4-phenylene)bis(ethyn-2,1-diyl)]} (PNDIR1-R2), were synthesized via Sonogashira coupling polymerization with varying alkyl side chains at the nitrogen atoms of the imide ring and 2,5-positions of the 1,4-diethynylbenzene moiety. Considering their identical polymer backbone structures, the side chains were found to have a strong influence on the surface morphology/nanostructure, thus playing a critical role in charge-transporting properties of the three NDI-based copolymers. Among the polymers, the one with an octyldodecyl (OD) chain at the nitrogen atoms of imide ring and a hexadecyloxy (HO) chain at the 2,5-positions of 1,4-diethynylbenzene, P(NDIOD-HO), exhibited the highest electron mobility of 0.016 cm2 V–1 s–1, as compared to NDI-based copolymers with an ethylhexyl chain at the 2,5-positions of 1,4-diethynylbenzene. The enhanced charge mobility in the P(NDIOD-HO) layers is attributed to the well-aligned nano-fiber-like surface morphology and highly ordered packing structure with a dominant edge-on orientation, thus enabling efficient in-plane charge transport. Our results on the molecular structure–charge transport property relationship in these materials may provide an insight into novel design of n-type conjugated polymers for applications in the organic electronics of the future.

  18. Pronounced Side Chain Effects in Triple Bond-Conjugated Polymers Containing Naphthalene Diimides for n-Channel Organic Field-Effect Transistors

    KAUST Repository

    Nam, Sungho; Hahm, Suk Gyu; Khim, Dongyoon; Kim, Hwajeong; Sajoto, Tissa; Ree, Moonhor; Marder, Seth R.; Anthopoulos, Thomas D.; Bradley, Donal D.C.; Kim, Youngkyoo

    2018-01-01

    on the surface morphology/nanostructure, thus playing a critical role in charge-transporting properties of the three NDI-based copolymers. Among the polymers, the one with an octyldodecyl (OD) chain at the nitrogen atoms of imide ring and a hexadecyloxy (HO

  19. Characterizing effects of radiation on forward and reverse saturation characteristics of N-channel devices

    International Nuclear Information System (INIS)

    Jaafar Ali, M.N.; Bhuva, B.; Kerns, S.; Maher, M.; Lawrence, R.

    1999-01-01

    The forward and reverse characteristics of an N-channel device during the saturation mode of operation are used to determine the extent of damage non-uniformity along the channel. The non-uniformity at low total dose exposures is caused by bulk oxide trap. At higher doses, non-uniformity are dominated by interface traps. The unmatched forward and reverse characteristics will be a major problem for memory circuits for advanced technologies. (authors)

  20. Investigation of defect-induced abnormal body current in fin field-effect-transistors

    International Nuclear Information System (INIS)

    Liu, Kuan-Ju; Tsai, Jyun-Yu; Lu, Ying-Hsin; Liu, Xi-Wen; Chang, Ting-Chang; Chen, Ching-En; Yang, Ren-Ya; Cheng, Osbert; Huang, Cheng-Tung

    2015-01-01

    This letter investigates the mechanism of abnormal body current at the linear region in n-channel high-k/metal gate stack fin field effect transistors. Unlike body current, which is generated by impact ionization at high drain voltages, abnormal body current was found to increase with decreasing drain voltages. Notably, the unusual body leakage only occurs in three-dimensional structure devices. Based on measurements under different operation conditions, the abnormal body current can be attributed to fin surface defect-induced leakage current, and the mechanism is electron tunneling to the fin via the defects, resulting in holes left at the body terminal

  1. Silicon nanowire-based tunneling field-effect transistors on flexible plastic substrates.

    Science.gov (United States)

    Lee, Myeongwon; Koo, Jamin; Chung, Eun-Ae; Jeong, Dong-Young; Koo, Yong-Seo; Kim, Sangsig

    2009-11-11

    A technique to implement silicon nanowire (SiNW)-based tunneling field-effect transistors (TFETs) on flexible plastic substrates is developed for the first time. The p-i-n configured Si NWs are obtained from an Si wafer using a conventional top-down CMOS-compatible technology, and they are then transferred onto the plastic substrate. Based on gate-controlled band-to-band tunneling (BTBT) as their working principle, the SiNW-based TFETs show normal p-channel switching behavior with a threshold voltage of -1.86 V and a subthreshold swing of 827 mV/dec. In addition, ambipolar conduction is observed due to the presence of the BTBT between the heavily doped p+ drain and n+ channel regions, indicating that our TFETs can operate in the n-channel mode as well. Furthermore, the BTBT generation rates for both the p-channel and n-channel operating modes are nearly independent of the bending state (strain = 0.8%) of the plastic substrate.

  2. Silicon nanowire-based tunneling field-effect transistors on flexible plastic substrates

    International Nuclear Information System (INIS)

    Lee, Myeongwon; Koo, Jamin; Chung, Eun-Ae; Jeong, Dong-Young; Kim, Sangsig; Koo, Yong-Seo

    2009-01-01

    A technique to implement silicon nanowire (SiNW)-based tunneling field-effect transistors (TFETs) on flexible plastic substrates is developed for the first time. The p-i-n configured Si NWs are obtained from an Si wafer using a conventional top-down CMOS-compatible technology, and they are then transferred onto the plastic substrate. Based on gate-controlled band-to-band tunneling (BTBT) as their working principle, the SiNW-based TFETs show normal p-channel switching behavior with a threshold voltage of -1.86 V and a subthreshold swing of 827 mV/dec. In addition, ambipolar conduction is observed due to the presence of the BTBT between the heavily doped p + drain and n + channel regions, indicating that our TFETs can operate in the n-channel mode as well. Furthermore, the BTBT generation rates for both the p-channel and n-channel operating modes are nearly independent of the bending state (strain = 0.8%) of the plastic substrate.

  3. Charge injection engineering of ambipolar field-effect transistors for high-performance organic complementary circuits.

    Science.gov (United States)

    Baeg, Kang-Jun; Kim, Juhwan; Khim, Dongyoon; Caironi, Mario; Kim, Dong-Yu; You, In-Kyu; Quinn, Jordan R; Facchetti, Antonio; Noh, Yong-Young

    2011-08-01

    Ambipolar π-conjugated polymers may provide inexpensive large-area manufacturing of complementary integrated circuits (CICs) without requiring micro-patterning of the individual p- and n-channel semiconductors. However, current-generation ambipolar semiconductor-based CICs suffer from higher static power consumption, low operation frequencies, and degraded noise margins compared to complementary logics based on unipolar p- and n-channel organic field-effect transistors (OFETs). Here, we demonstrate a simple methodology to control charge injection and transport in ambipolar OFETs via engineering of the electrical contacts. Solution-processed caesium (Cs) salts, as electron-injection and hole-blocking layers at the interface between semiconductors and charge injection electrodes, significantly decrease the gold (Au) work function (∼4.1 eV) compared to that of a pristine Au electrode (∼4.7 eV). By controlling the electrode surface chemistry, excellent p-channel (hole mobility ∼0.1-0.6 cm(2)/(Vs)) and n-channel (electron mobility ∼0.1-0.3 cm(2)/(Vs)) OFET characteristics with the same semiconductor are demonstrated. Most importantly, in these OFETs the counterpart charge carrier currents are highly suppressed for depletion mode operation (I(off) 0.1-0.2 mA). Thus, high-performance, truly complementary inverters (high gain >50 and high noise margin >75% of ideal value) and ring oscillators (oscillation frequency ∼12 kHz) based on a solution-processed ambipolar polymer are demonstrated.

  4. Ambipolar phosphorene field effect transistor.

    Science.gov (United States)

    Das, Saptarshi; Demarteau, Marcel; Roelofs, Andreas

    2014-11-25

    In this article, we demonstrate enhanced electron and hole transport in few-layer phosphorene field effect transistors (FETs) using titanium as the source/drain contact electrode and 20 nm SiO2 as the back gate dielectric. The field effect mobility values were extracted to be ∼38 cm(2)/Vs for electrons and ∼172 cm(2)/Vs for the holes. On the basis of our experimental data, we also comprehensively discuss how the contact resistances arising due to the Schottky barriers at the source and the drain end effect the different regime of the device characteristics and ultimately limit the ON state performance. We also propose and implement a novel technique for extracting the transport gap as well as the Schottky barrier height at the metal-phosphorene contact interface from the ambipolar transfer characteristics of the phosphorene FETs. This robust technique is applicable to any ultrathin body semiconductor which demonstrates symmetric ambipolar conduction. Finally, we demonstrate a high gain, high noise margin, chemical doping free, and fully complementary logic inverter based on ambipolar phosphorene FETs.

  5. Comparison between the effects of positive noncatastrophic HMB ESD stress in n-channel and p-channel power MOSFET's

    Science.gov (United States)

    Zupac, Dragan; Kosier, Steven L.; Schrimpf, Ronald D.; Galloway, Kenneth F.; Baum, Keith W.

    1991-10-01

    The effect of noncatastrophic positive human body model (HBM) electrostatic discharge (ESD) stress on n-channel power MOSFETs is radically different from that on p-channel MOSFETs. In n-channel transistors, the stress causes negative shifts of the current-voltage characteristics indicative of positive charge trapping in the gate oxide. In p-channel transistors, the stress increases the drain-to-source leakage current, probably due to localized avalanche electron injection from the p-doped drain.

  6. MCT/MOSFET Switch

    Science.gov (United States)

    Rippel, Wally E.

    1990-01-01

    Metal-oxide/semiconductor-controlled thyristor (MCT) and metal-oxide/semiconductor field-effect transistor (MOSFET) connected in switching circuit to obtain better performance. Offers high utilization of silicon, low forward voltage drop during "on" period of operating cycle, fast turnon and turnoff, and large turnoff safe operating area. Includes ability to operate at high temperatures, high static blocking voltage, and ease of drive.

  7. Magnetic field effects in proteins

    Science.gov (United States)

    Jones, Alex R.

    2016-06-01

    Many animals can sense the geomagnetic field, which appears to aid in behaviours such as migration. The influence of man-made magnetic fields on biology, however, is potentially more sinister, with adverse health effects being claimed from exposure to fields from mobile phones or high voltage power lines. Do these phenomena have a common, biophysical origin, and is it even plausible that such weak fields can profoundly impact noisy biological systems? Radical pair intermediates are widespread in protein reaction mechanisms, and the radical pair mechanism has risen to prominence as perhaps the most plausible means by which even very weak fields might impact biology. In this New Views article, I will discuss the literature over the past 40 years that has investigated the topic of magnetic field effects in proteins. The lack of reproducible results has cast a shadow over the area. However, magnetic field and spin effects have proven to be useful mechanistic tools for radical mechanism in biology. Moreover, if a magnetic effect on a radical pair mechanism in a protein were to influence a biological system, the conditions necessary for it to do so appear increasing unlikely to have come about by chance.

  8. Organic tunnel field effect transistors

    KAUST Repository

    Tietze, Max Lutz

    2017-06-29

    Various examples are provided for organic tunnel field effect transistors (OTFET), and methods thereof. In one example, an OTFET includes a first intrinsic layer (i-layer) of organic semiconductor material disposed over a gate insulating layer; source (or drain) contact stacks disposed on portions of the first i-layer; a second i-layer of organic semiconductor material disposed on the first i-layer surrounding the source (or drain) contact stacks; an n-doped organic semiconductor layer disposed on the second i-layer; and a drain (or source) contact layer disposed on the n-doped organic semiconductor layer. The source (or drain) contact stacks can include a p-doped injection layer, a source (or drain) contact layer, and a contact insulating layer. In another example, a method includes disposing a first i-layer over a gate insulating layer; forming source or drain contact stacks; and disposing a second i-layer, an n-doped organic semiconductor layer, and a drain or source contact.

  9. Investigation of InP/InGaAs metamorphic co-integrated complementary doping-channel field-effect transistors for logic application

    Science.gov (United States)

    Tsai, Jung-Hui

    2014-01-01

    DC performance of InP/InGaAs metamorphic co-integrated complementary doping-channel field-effect transistors (DCFETs) grown on a low-cost GaAs substrate is first demonstrated. In the complementary DCFETs, the n-channel device was fabricated on the InxGa1-xP metamorphic linearly graded buffer layer and the p-channel field-effect transistor was stacked on the top of the n-channel device. Particularly, the saturation voltage of the n-channel device is substantially reduced to decrease the VOL and VIH values attributed that two-dimensional electron gas is formed and could be modulated in the n-InGaAs channel. Experimentally, a maximum extrinsic transconductance of 215 (17) mS/mm and a maximum saturation current density of 43 (-27) mA/mm are obtained in the n-channel (p-channel) device. Furthermore, the noise margins NMH and NML are up to 0.842 and 0.330 V at a supply voltage of 1.5 V in the complementary logic inverter application.

  10. Model of hot-carrier induced degradation in ultra-deep sub-micrometer nMOSFET

    International Nuclear Information System (INIS)

    Lei Xiao-Yi; Liu Hong-Xia; Zhang Yue; Ma Xiao-Hua; Hao Yue

    2014-01-01

    The degradation produced by hot carrier (HC) in ultra-deep sub-micron n-channel metal oxide semiconductor field effect transistor (nMOSFET) has been analyzed in this paper. The generation of negatively charged interface states is the predominant mechanism for the ultra-deep sub-micron nMOSFET. According to our lifetime model of p-channel MOFET (pMOFET) that was reported in a previous publication, a lifetime prediction model for nMOSFET is presented and the parameters in the model are extracted. For the first time, the lifetime models of nMOFET and pMOSFET are unified. In addition, the model can precisely predict the lifetime of the ultra-deep sub-micron nMOSFET and pMOSFET. (condensed matter: electronic structure, electrical, magnetic, and optical properties)

  11. Performance of a 100V Half-Bridge MOSFET Driver, Type MIC4103, Over a Wide Temperature Range

    Science.gov (United States)

    Patterson, Richard L.; Hammoud, Ahmad

    2011-01-01

    The operation of a high frequency, high voltage MOSFET (metal-oxide semiconductor field-effect transistors) driver was investigated over a wide temperature regime that extended beyond its specified range. The Micrel MIC4103 is a 100V, non-inverting, dual driver that is designed to independently drive both high-side and low-side N-channel MOSFETs. It features fast propagation delay times and can drive 1000 pF load with 10ns rise times and 6 ns fall times [1]. The device consumes very little power, has supply under-voltage protection, and is rated for a -40 C to +125 C junction temperature range. The floating high-side driver of the chip can sustain boost voltages up to 100 V. Table I shows some of the device manufacturer s specification.

  12. A New Method for Negative Bias Temperature Instability Assessment in P-Channel Metal Oxide Semiconductor Transistors

    Science.gov (United States)

    Djezzar, Boualem; Tahi, Hakim; Benabdelmoumene, Abdelmadjid; Chenouf, Amel; Kribes, Youcef

    2012-11-01

    In this paper, we present a new method, named on the fly oxide trap (OTFOT), to extract the bias temperature instability (BTI) in MOS transistors. The OTFOT method is based on charge pumping technique (CP) at low and high frequencies. We emphasize on the theoretical-based concept, giving a clear insight on the easy-use of the OTFOT methodology and demonstrating its viability to characterize the negative BTI (NBTI). Using alternatively high and low frequencies, OTFOT method separates the interface-traps (ΔNit) and border-trap (ΔNbt) (switching oxide-trap) densities independently and also their contributions to the threshold voltage shift (ΔVth), without needing additional methods. The experimental results, from two experimental scenarios, showing the extraction of NBTI-induced shifts caused by interface- and oxide-trap increases are also presented. In the first scenario, all stresses are performed on the same transistor. It exhibits an artifact value of exponent n. In the second scenario, each voltage stress is applied only on one transistor. Its results show an average n of 0.16, 0.05, and 0.11 for NBTI-induced ΔNit, ΔNbt, ΔVth, respectively. Therefore, OTFOT method can contribute to further understand the behavior of the NBTI degradation, especially through the threshold voltage shift components such as ΔVit and ΔVot caused by interface-trap and border-trap, respectively.

  13. A hybrid magnetic/complementary metal oxide semiconductor three-context memory bit cell for non-volatile circuit design

    International Nuclear Information System (INIS)

    Jovanović, B.; Brum, R. M.; Torres, L.

    2014-01-01

    After decades of continued scaling to the beat of Moore's law, it now appears that conventional silicon based devices are approaching their physical limits. In today's deep-submicron nodes, a number of short-channel and quantum effects are emerging that affect the manufacturing process, as well as, the functionality of the microelectronic systems-on-chip. Spintronics devices that exploit both the intrinsic spin of the electron and its associated magnetic moment, in addition to its fundamental electronic charge, are promising solutions to circumvent these scaling threats. Being compatible with the CMOS technology, such devices offer a promising synergy of radiation immunity, infinite endurance, non-volatility, increased density, etc. In this paper, we present a hybrid (magnetic/CMOS) cell that is able to store and process data both electrically and magnetically. The cell is based on perpendicular spin-transfer torque magnetic tunnel junctions (STT-MTJs) and is suitable for use in magnetic random access memories and reprogrammable computing (non-volatile registers, processor cache memories, magnetic field-programmable gate arrays, etc). To demonstrate the potential our hybrid cell, we physically implemented a small hybrid memory block using 45 nm × 45 nm round MTJs for the magnetic part and 28 nm fully depleted silicon on insulator (FD-SOI) technology for the CMOS part. We also report the cells measured performances in terms of area, robustness, read/write speed and energy consumption

  14. Design of 5.8 GHz Integrated Antenna on 180nm Complementary Metal Oxide Semiconductor (CMOS) Technology

    Science.gov (United States)

    Razak, A. H. A.; Shamsuddin, M. I. A.; Idros, M. F. M.; Halim, A. K.; Ahmad, A.; Junid, S. A. M. Al

    2018-03-01

    This project discusses the design and simulation performances of integrated loop antenna. Antenna is one of the main parts in any wireless radio frequency integrated circuit (RFIC). Naturally, antenna is the bulk in any RFIC design. Thus, this project aims to implement an integrated antenna on a single chip making the end product more compact. This project targets 5.8 GHz as the operating frequency of the integrated antenna for a transceiver module based on Silterra CMOS 180nm technology. The simulation of the antenna was done by using High Frequency Structure Simulator (HFSS). This software is industrial standard software that been used to simulate all electromagnetic effect including antenna simulation. This software has ability to simulate frequency at range of 100 MHz to 4 THz. The simulation set up in 3 dimension structure with driven terminal. The designed antenna has 1400um of diameter and placed on top metal layer. Loop configuration of the antenna has been chosen as the antenna design. From the configuration, it is able to make the chip more compact. The simulation shows that the antenna has single frequency band at center frequency 5.8 GHz with -48.93dB. The antenna radiation patterns shows, the antenna radiate at omnidirectional. From the simulation result, it could be concluded that the antenna have a good radiation pattern and propagation for wireless communication.

  15. Thin film complementary metal oxide semiconductor (CMOS) device using a single-step deposition of the channel layer

    KAUST Repository

    Nayak, Pradipta K.; Caraveo-Frescas, J. A.; Wang, Zhenwei; Hedhili, Mohamed N.; Wang, Q. X.; Alshareef, Husam N.

    2014-01-01

    We report, for the first time, the use of a single step deposition of semiconductor channel layer to simultaneously achieve both n-and p-type transport in transparent oxide thin film transistors (TFTs). This effect is achieved by controlling

  16. Single Event Upset Rate Estimates for a 16-K CMOS (Complementary Metal Oxide Semiconductor) SRAM (Static Random Access Memory).

    Science.gov (United States)

    1986-09-30

    4 . ~**..ft.. ft . - - - ft SI TABLES 9 I. SA32~40 Single Event Upset Test, 1140-MeV Krypton, 9/l8/8~4. . .. .. .. .. .. .16 II. CRUP Simulation...cosmic ray interaction analysis described in the remainder of this report were calculated using the CRUP computer code 3 modified for funneling. The... CRUP code requires, as inputs, the size of a depletion region specified as a retangular parallel piped with dimensions a 9 b S c, the effective funnel

  17. A complementary metal-oxide-semiconductor compatible monocantilever 12-point probe for conductivity measurements on the nanoscale

    DEFF Research Database (Denmark)

    Gammelgaard, Lauge; Bøggild, Peter; Wells, J.W.

    2008-01-01

    and a probe pitch of 500 nm. In-air four-point measurements have been performed on indium tin oxide, ruthenium, and titanium-tungsten, showing good agreement with values obtained by other four-point probes. In-vacuum four-point resistance measurements have been performed on clean Bi(111) using different probe...... spacings. The results show the expected behavior for bulk Bi, indicating that the contribution of electronic surface states to the transport properties is very small. (C) 2008 American Institute of Physics....

  18. An ultrasensitive method of real time pH monitoring with complementary metal oxide semiconductor image sensor.

    Science.gov (United States)

    Devadhasan, Jasmine Pramila; Kim, Sanghyo

    2015-02-09

    CMOS sensors are becoming a powerful tool in the biological and chemical field. In this work, we introduce a new approach on quantifying various pH solutions with a CMOS image sensor. The CMOS image sensor based pH measurement produces high-accuracy analysis, making it a truly portable and user friendly system. pH indicator blended hydrogel matrix was fabricated as a thin film to the accurate color development. A distinct color change of red, green and blue (RGB) develops in the hydrogel film by applying various pH solutions (pH 1-14). The semi-quantitative pH evolution was acquired by visual read out. Further, CMOS image sensor absorbs the RGB color intensity of the film and hue value converted into digital numbers with the aid of an analog-to-digital converter (ADC) to determine the pH ranges of solutions. Chromaticity diagram and Euclidean distance represent the RGB color space and differentiation of pH ranges, respectively. This technique is applicable to sense the various toxic chemicals and chemical vapors by situ sensing. Ultimately, the entire approach can be integrated into smartphone and operable with the user friendly manner. Copyright © 2014 Elsevier B.V. All rights reserved.

  19. Design and evaluation of basic standard encryption algorithm modules using nanosized complementary metal oxide semiconductor molecular circuits

    Science.gov (United States)

    Masoumi, Massoud; Raissi, Farshid; Ahmadian, Mahmoud; Keshavarzi, Parviz

    2006-01-01

    We are proposing that the recently proposed semiconductor-nanowire-molecular architecture (CMOL) is an optimum platform to realize encryption algorithms. The basic modules for the advanced encryption standard algorithm (Rijndael) have been designed using CMOL architecture. The performance of this design has been evaluated with respect to chip area and speed. It is observed that CMOL provides considerable improvement over implementation with regular CMOS architecture even with a 20% defect rate. Pseudo-optimum gate placement and routing are provided for Rijndael building blocks and the possibility of designing high speed, attack tolerant and long key encryptions are discussed.

  20. Synthesis Methods, Microscopy Characterization and Device Integration of Nanoscale Metal Oxide Semiconductors for Gas Sensing in Aerospace Applications

    Science.gov (United States)

    VanderWal, Randy L.; Berger, Gordon M.; Kulis, Michael J.; Hunter, Gary W.; Xu, Jennifer C.; Evans, Laura J.

    2009-01-01

    A comparison is made between SnO2, ZnO, and TiO2 single-crystal nanowires and SnO2 polycrystalline nanofibers for gas sensing. Both nanostructures possess a one-dimensional morphology. Different synthesis methods are used to produce these materials: thermal evaporation-condensation (TEC), controlled oxidation, and electrospinning. Advantages and limitations of each technique are listed. Practical issues associated with harvesting, purification, and integration of these materials into sensing devices are detailed. For comparison to the nascent form, these sensing materials are surface coated with Pd and Pt nanoparticles. Gas sensing tests, with respect to H2, are conducted at ambient and elevated temperatures. Comparative normalized responses and time constants for the catalyst and noncatalyst systems provide a basis for identification of the superior metal-oxide nanostructure and catalyst combination. With temperature-dependent data, Arrhenius analyses are made to determine an activation energy for the catalyst-assisted systems.

  1. Influence of semiconductor barrier tunneling on the current-voltage characteristics of tunnel metal-oxide-semiconductor diodes

    DEFF Research Database (Denmark)

    Nielsen, Otto M.

    1983-01-01

    of multistep tunneling recombination current and injected minority carrier diffusion current. This can explain the observed values of the diode quality factor n. The results also show that the voltage drop across the oxide Vox is increased with increased NA, with the result that the lowering of the minority...... carrier diode current Jmin is greater than in the usual theory. The conclusion drawn is that the increase in Vox and lowering of Jmin is due to multistep tunneling of majority carriers through the semiconductor barrier. Journal of Applied Physics is copyrighted by The American Institute of Physics.......Current–voltage characteristics have been examined for Al–SiO2–pSi diodes with an interfacial oxide thickness of delta[approximately-equal-to]20 Å. The diodes were fabricated on and oriented substrates with an impurity concentration in the range of NA=1014–1016 cm−3. The results show that for low...

  2. Modeling the dark current histogram induced by gold contamination in complementary-metal-oxide-semiconductor image sensors

    Energy Technology Data Exchange (ETDEWEB)

    Domengie, F., E-mail: florian.domengie@st.com; Morin, P. [STMicroelectronics Crolles 2 (SAS), 850 Rue Jean Monnet, 38926 Crolles Cedex (France); Bauza, D. [CNRS, IMEP-LAHC - Grenoble INP, Minatec: 3, rue Parvis Louis Néel, CS 50257, 38016 Grenoble Cedex 1 (France)

    2015-07-14

    We propose a model for dark current induced by metallic contamination in a CMOS image sensor. Based on Shockley-Read-Hall kinetics, the expression of dark current proposed accounts for the electric field enhanced emission factor due to the Poole-Frenkel barrier lowering and phonon-assisted tunneling mechanisms. To that aim, we considered the distribution of the electric field magnitude and metal atoms in the depth of the pixel. Poisson statistics were used to estimate the random distribution of metal atoms in each pixel for a given contamination dose. Then, we performed a Monte-Carlo-based simulation for each pixel to set the number of metal atoms the pixel contained and the enhancement factor each atom underwent, and obtained a histogram of the number of pixels versus dark current for the full sensor. Excellent agreement with the dark current histogram measured on an ion-implanted gold-contaminated imager has been achieved, in particular, for the description of the distribution tails due to the pixel regions in which the contaminant atoms undergo a large electric field. The agreement remains very good when increasing the temperature by 15 °C. We demonstrated that the amplification of the dark current generated for the typical electric fields encountered in the CMOS image sensors, which depends on the nature of the metal contaminant, may become very large at high electric field. The electron and hole emissions and the resulting enhancement factor are described as a function of the trap characteristics, electric field, and temperature.

  3. Thin film complementary metal oxide semiconductor (CMOS) device using a single-step deposition of the channel layer

    KAUST Repository

    Nayak, Pradipta K.

    2014-04-14

    We report, for the first time, the use of a single step deposition of semiconductor channel layer to simultaneously achieve both n-and p-type transport in transparent oxide thin film transistors (TFTs). This effect is achieved by controlling the concentration of hydroxyl groups (OH-groups) in the underlying gate dielectrics. The semiconducting tin oxide layer was deposited at room temperature, and the maximum device fabrication temperature was 350C. Both n and p-type TFTs showed fairly comparable performance. A functional CMOS inverter was fabricated using this novel scheme, indicating the potential use of our approach for various practical applications.

  4. A hybrid magnetic/complementary metal oxide semiconductor three-context memory bit cell for non-volatile circuit design

    Energy Technology Data Exchange (ETDEWEB)

    Jovanović, B., E-mail: bojan.jovanovic@lirmm.fr, E-mail: lionel.torres@lirmm.fr; Brum, R. M.; Torres, L. [LIRMM—University of Montpellier 2/UMR CNRS 5506, 161 Rue Ada, 34095 Montpellier (France)

    2014-04-07

    After decades of continued scaling to the beat of Moore's law, it now appears that conventional silicon based devices are approaching their physical limits. In today's deep-submicron nodes, a number of short-channel and quantum effects are emerging that affect the manufacturing process, as well as, the functionality of the microelectronic systems-on-chip. Spintronics devices that exploit both the intrinsic spin of the electron and its associated magnetic moment, in addition to its fundamental electronic charge, are promising solutions to circumvent these scaling threats. Being compatible with the CMOS technology, such devices offer a promising synergy of radiation immunity, infinite endurance, non-volatility, increased density, etc. In this paper, we present a hybrid (magnetic/CMOS) cell that is able to store and process data both electrically and magnetically. The cell is based on perpendicular spin-transfer torque magnetic tunnel junctions (STT-MTJs) and is suitable for use in magnetic random access memories and reprogrammable computing (non-volatile registers, processor cache memories, magnetic field-programmable gate arrays, etc). To demonstrate the potential our hybrid cell, we physically implemented a small hybrid memory block using 45 nm × 45 nm round MTJs for the magnetic part and 28 nm fully depleted silicon on insulator (FD-SOI) technology for the CMOS part. We also report the cells measured performances in terms of area, robustness, read/write speed and energy consumption.

  5. Simulating single-event burnout of n-channel power MOSFET's

    International Nuclear Information System (INIS)

    Johnson, G.H.; Hohl, J.H.; Schrimpf, R.D.; Galloway, K.F.

    1993-01-01

    Heavy ions are ubiquitous in a space environment. Single-event burnout of power MOSFET's is a sudden catastrophic failure mechanism that is initiated by the passage of a heavy ion through the device structure. The passage of the heavy ion generates a current filament that locally turns on a parasitic n-p-n transistor inherent to the power MOSFET. Subsequent high currents and high voltage in the device induce second breakdown of the parasitic bipolar transistor and hence meltdown of the device. This paper presents a model that can be used for simulating the burnout mechanism in order to gain insight into the significant device parameters that most influence the single-event burnout susceptibility of n-channel power MOSFET's

  6. A fully integrated, monolithic, cryogenic charge sensitive preamplifier using N-channel JFETs and polysilicon resistors

    International Nuclear Information System (INIS)

    Jung, T.S.; Guckel, H.; Seefeldt, J.; Ott, G.; Ahn, Y.C.

    1994-01-01

    In this paper, an integrated charge preamplifier to be used with small (10--30 mm 2 ) Si(Li) and Ge(Li) X-ray detectors is described. The preamplifier is designed to operate at cryogenic temperatures (∼100 K to 160 K) for the best performance. An N-channel JFET process technology for integrated charge sensitive preamplifiers has been developed. The process integrates multiple pinch-off voltage JFETs fabricated in an n-type epitaxial layer on a low resistivity p-type substrate. The process also incorporates polysilicon resistors integrated on the same die as the JFETs. The optimized polysilicon resistors exhibit 1/f noise nearly as good as metal film resistors at the same current. Results for integrated amplifier are discussed

  7. Investigation of capacitance voltage characteristics of strained Si/SiGe n-channel MODFET varactor

    Science.gov (United States)

    Elogail, Y.; Kasper, E.; Gunzer, F.; Shaker, A.; Schulze, J.

    2016-06-01

    This work is concerned with the investigation of Capacitance-Voltage (CV) behavior of n-channel Si/SiGe MODFET varactors. This investigation provides a valuable insight into the high frequency response of the device under test and its dependence on design parameters; especially regarding the modulation layer doping concentration. The heterostructure under consideration is much more complicated than conventional MOS varactor with respect to non-uniform doping, energy band offsets and the pn-junction in series. Subsequently, CV characterization has never been applied to such MODFET varactor structure. Experimental CV measurements have shown a non-monotonic behavior with a transition point minimum and higher saturation levels on both sides, in contradiction to the conventional high frequency MOS characteristics. This behavior was confirmed qualitatively using simulations. Moreover, we explain some fundamental capacitance properties of the structure, which provide already very interesting perceptions of the MODFET varactor operation, modeling and possible applications using the obtained stimulating results.

  8. Flexible ambipolar organic field-effect transistors with reverse-offset-printed silver electrodes for a complementary inverter.

    Science.gov (United States)

    Park, Junsu; Kim, Minseok; Yeom, Seung-Won; Ha, Hyeon Jun; Song, Hyenggun; Min Jhon, Young; Kim, Yun-Hi; Ju, Byeong-Kwon

    2016-06-03

    We report ambipolar organic field-effect transistors and complementary inverter circuits with reverse-offset-printed (ROP) Ag electrodes fabricated on a flexible substrate. A diketopyrrolopyrrole-based co-polymer (PDPP-TAT) was used as the semiconductor and poly(methyl methacrylate) was used as the gate insulator. Considerable improvement is observed in the n-channel electrical characteristics by inserting a cesium carbonate (Cs2CO3) as the electron-injection/hole-blocking layer at the interface between the semiconductors and the electrodes. The saturation mobility values are 0.35 cm(2) V(-1) s(-1) for the p-channel and 0.027 cm(2) V(-1) s(-1) for the n-channel. A complementary inverter is demonstrated based on the ROP process, and it is selectively controlled by the insertion of Cs2CO3 onto the n-channel region via thermal evaporation. Moreover, the devices show stable operation during the mechanical bending test using tensile strains ranging from 0.05% to 0.5%. The results confirm that these devices have great potential for use in flexible and inexpensive integrated circuits over a large area.

  9. Silicon nanowire-based tunneling field-effect transistors on flexible plastic substrates

    Energy Technology Data Exchange (ETDEWEB)

    Lee, Myeongwon; Koo, Jamin; Chung, Eun-Ae; Jeong, Dong-Young; Kim, Sangsig [Department of Electrical Engineering and Institute for Nano Science, Korea University, 5-1, Anam-Dong, Seongbuk-Gu, Seoul 136-701 (Korea, Republic of); Koo, Yong-Seo, E-mail: sangsig@korea.ac.k [Department of Electrical Engineering, Seokyeong University, 16-1, Jungneung-dong, Seongbuk-gu, Seoul 136-704 (Korea, Republic of)

    2009-11-11

    A technique to implement silicon nanowire (SiNW)-based tunneling field-effect transistors (TFETs) on flexible plastic substrates is developed for the first time. The p-i-n configured Si NWs are obtained from an Si wafer using a conventional top-down CMOS-compatible technology, and they are then transferred onto the plastic substrate. Based on gate-controlled band-to-band tunneling (BTBT) as their working principle, the SiNW-based TFETs show normal p-channel switching behavior with a threshold voltage of -1.86 V and a subthreshold swing of 827 mV/dec. In addition, ambipolar conduction is observed due to the presence of the BTBT between the heavily doped p{sup +} drain and n{sup +} channel regions, indicating that our TFETs can operate in the n-channel mode as well. Furthermore, the BTBT generation rates for both the p-channel and n-channel operating modes are nearly independent of the bending state (strain = 0.8%) of the plastic substrate.

  10. Radiation dose response of N channel MOSFET submitted to filtered X-ray photon beam

    Science.gov (United States)

    Gonçalves Filho, Luiz C.; Monte, David S.; Barros, Fabio R.; Santos, Luiz A. P.

    2018-01-01

    MOSFET can operate as a radiation detector mainly in high-energy photon beams, which are normally used in cancer treatments. In general, such an electronic device can work as a dosimeter from threshold voltage shift measurements. The purpose of this article is to show a new way for measuring the dose-response of MOSFETs when they are under X-ray beams generated from 100kV potential range, which is normally used in diagnostic radiology. Basically, the method consists of measuring the MOSFET drain current as a function of the radiation dose. For this the type of device, it has to be biased with a high value resistor aiming to see a substantial change in the drain current after it has been irradiated with an amount of radiation dose. Two types of N channel device were used in the experiment: a signal transistor and a power transistor. The delivered dose to the device was varied and the electrical curves were plotted. Also, a sensitivity analysis of the power MOSFET response was made, by varying the tube potential of about 20%. The results show that both types of devices have responses very similar, the shift in the electrical curve is proportional to the radiation dose. Unlike the power MOSFET, the signal transistor does not provide a linear function between the dose rate and its drain current. We also have observed that the variation in the tube potential of the X-ray equipment produces a very similar dose-response.

  11. Silicon-on-insulator field effect transistor with improved body ties for rad-hard applications

    Science.gov (United States)

    Schwank, James R.; Shaneyfelt, Marty R.; Draper, Bruce L.; Dodd, Paul E.

    2001-01-01

    A silicon-on-insulator (SOI) field-effect transistor (FET) and a method for making the same are disclosed. The SOI FET is characterized by a source which extends only partially (e.g. about half-way) through the active layer wherein the transistor is formed. Additionally, a minimal-area body tie contact is provided with a short-circuit electrical connection to the source for reducing floating body effects. The body tie contact improves the electrical characteristics of the transistor and also provides an improved single-event-upset (SEU) radiation hardness of the device for terrestrial and space applications. The SOI FET also provides an improvement in total-dose radiation hardness as compared to conventional SOI transistors fabricated without a specially prepared hardened buried oxide layer. Complementary n-channel and p-channel SOI FETs can be fabricated according to the present invention to form integrated circuits (ICs) for commercial and military applications.

  12. Graphene Field Effect Transistor for Radiation Detection

    Science.gov (United States)

    Li, Mary J. (Inventor); Chen, Zhihong (Inventor)

    2016-01-01

    The present invention relates to a graphene field effect transistor-based radiation sensor for use in a variety of radiation detection applications, including manned spaceflight missions. The sensing mechanism of the radiation sensor is based on the high sensitivity of graphene in the local change of electric field that can result from the interaction of ionizing radiation with a gated undoped silicon absorber serving as the supporting substrate in the graphene field effect transistor. The radiation sensor has low power and high sensitivity, a flexible structure, and a wide temperature range, and can be used in a variety of applications, particularly in space missions for human exploration.

  13. AlGaN/GaN field effect transistors for power electronics—Effect of finite GaN layer thickness on thermal characteristics

    Energy Technology Data Exchange (ETDEWEB)

    Hodges, C., E-mail: chris.hodges@bristol.ac.uk; Anaya Calvo, J.; Kuball, M. [H. H. Wills Physics Laboratory, University of Bristol, Bristol BS8 1TL (United Kingdom); Stoffels, S.; Marcon, D. [IMEC, Kapeldreef 75, B3001 Leuven (Belgium)

    2013-11-11

    AlGaN/GaN heterostructure field effect transistors with a 150 nm thick GaN channel within stacked Al{sub x}Ga{sub 1−x}N layers were investigated using Raman thermography. By fitting a thermal simulation to the measured temperatures, the thermal conductivity of the GaN channel was determined to be 60 W m{sup −1} K{sup −1}, over 50% less than typical GaN epilayers, causing an increased peak channel temperature. This agrees with a nanoscale model. A low thermal conductivity AlGaN buffer means the GaN spreads heat; its properties are important for device thermal characteristics. When designing power devices with thin GaN layers, as well as electrical considerations, the reduced channel thermal conductivity must be considered.

  14. Epitaxial growth of In-rich InGaN on yttria-stabilized zirconia and its application to metal–insulator–semiconductor field-effect transistors

    Energy Technology Data Exchange (ETDEWEB)

    Kobayashi, Atsushi; Lye, Khe Shin; Ueno, Kohei [Institute of Industrial Science, The University of Tokyo, Tokyo 153-8505 (Japan); Ohta, Jitsuo [Institute of Industrial Science, The University of Tokyo, Tokyo 153-8505 (Japan); PRESTO, Japan Science and Technology Agency, Saitama 332-0012 (Japan); Fujioka, Hiroshi, E-mail: hfujioka@iis.u-tokyo.ac.jp [Institute of Industrial Science, The University of Tokyo, Tokyo 153-8505 (Japan); ACCEL, Japan Science and Technology Agency, Tokyo 102-0076 (Japan)

    2016-08-28

    We grew In-rich In{sub x}Ga{sub 1-x}N films on yttria-stabilized zirconia (YSZ) substrates at low temperatures by pulsed sputtering deposition. It was found that single-crystal In{sub x}Ga{sub 1-x}N (0.63 ≤ x ≤ 0.82) films can be prepared without significant compositional fluctuations at growth temperatures below 500 °C. It was also found that the electrical properties of InGaN are strongly dependent on In composition, growth temperature, and film polarity. N-channel operation of the metal–insulator–semiconductor field-effect transistor (MISFET) with an ultrathin InGaN channel on the YSZ substrates was successfully demonstrated. These results indicate that an InGaN-based MISFET is a promising device for next-generation high-speed electronics.

  15. Fringing-field effects in acceleration columns

    International Nuclear Information System (INIS)

    Yavor, M.I.; Weick, H.; Wollnik, H.

    1999-01-01

    Fringing-field effects in acceleration columns are investigated, based on the fringing-field integral method. Transfer matrices at the effective boundaries of the acceleration column are obtained, as well as the general transfer matrix of the region separating two homogeneous electrostatic fields with different field strengths. The accuracy of the fringing-field integral method is investigated

  16. Transport properties of field-effect transistor with Langmuir-Blodgett films of C60 dendrimer and estimation of impurity levels

    Science.gov (United States)

    Kawasaki, Naoko; Nagano, Takayuki; Kubozono, Yoshihiro; Sako, Yuuki; Morimoto, Yu; Takaguchi, Yutaka; Fujiwara, Akihiko; Chu, Chih-Chien; Imae, Toyoko

    2007-12-01

    Field-effect transistor (FET) device has been fabricated with Langmuir-Blodgett films of C60 dendrimer. The device showed n-channel normally off characteristics with the field-effect mobility of 2.7×10-3cm2V-1s-1 at 300K, whose value is twice as high as that (1.4×10-3cm2V-1s-1) for the FET with spin-coated films of C60 dendrimer. This originates from the formation of ordered π-conduction network of C60 moieties. From the temperature dependence of field-effect mobility, a structural phase transition has been observed at around 300K. Furthermore, the density of states for impurity levels was estimated in the Langmuir-Blodgett films.

  17. Nanowire field effect transistors principles and applications

    CERN Document Server

    Jeong, Yoon-Ha

    2014-01-01

    “Nanowire Field Effect Transistor: Basic Principles and Applications” places an emphasis on the application aspects of nanowire field effect transistors (NWFET). Device physics and electronics are discussed in a compact manner, together with the p-n junction diode and MOSFET, the former as an essential element in NWFET and the latter as a general background of the FET. During this discussion, the photo-diode, solar cell, LED, LD, DRAM, flash EEPROM and sensors are highlighted to pave the way for similar applications of NWFET. Modeling is discussed in close analogy and comparison with MOSFETs. Contributors focus on processing, electrostatic discharge (ESD) and application of NWFET. This includes coverage of solar and memory cells, biological and chemical sensors, displays and atomic scale light emitting diodes. Appropriate for scientists and engineers interested in acquiring a working knowledge of NWFET as well as graduate students specializing in this subject.

  18. Interlayer tunnel field-effect transistor (ITFET): physics, fabrication and applications

    Science.gov (United States)

    Kang, Sangwoo; Mou, Xuehao; Fallahazad, Babak; Prasad, Nitin; Wu, Xian; Valsaraj, Amithraj; Movva, Hema C. P.; Kim, Kyounghwan; Tutuc, Emanuel; Register, Leonard F.; Banerjee, Sanjay K.

    2017-09-01

    The scaling challenges of complementary metal oxide semiconductors (CMOS) are increasing with the pace of scaling showing marked signs of slowing down. This slowing has brought about a widespread search for an alternative beyond-CMOS device concept. While the charge tunneling phenomenon has been known for almost a century, and tunneling based transistors have been studied in the past few decades, its possibilities are being re-examined with the emergence of a new class of two-dimensional (2D) materials. By stacking varying 2D materials together, with two electrode layers sandwiching a tunnel dielectric layer, it could be possible to make vertical tunnel transistors without the limitations that have plagued such devices implemented within other material systems. When the two electrode layers are of the same material, under certain conditions, one can achieve resonant tunneling between the two layers, manifesting as negative differential resistance (NDR) in the interlayer current-voltage characteristics. We call this type of device an interlayer tunnel FET (ITFET). We review the basic operation principles of this device, experimental and theoretical studies, and benchmark simulation results for several digital logic gates based on a compact model that we developed. The results are placed in the context of work going on in other groups.

  19. A high-performance complementary inverter based on transition metal dichalcogenide field-effect transistors.

    Science.gov (United States)

    Cho, Ah-Jin; Park, Kee Chan; Kwon, Jang-Yeon

    2015-01-01

    For several years, graphene has been the focus of much attention due to its peculiar characteristics, and it is now considered to be a representative 2-dimensional (2D) material. Even though many research groups have studied on the graphene, its intrinsic nature of a zero band-gap, limits its use in practical applications, particularly in logic circuits. Recently, transition metal dichalcogenides (TMDs), which are another type of 2D material, have drawn attention due to the advantage of having a sizable band-gap and a high mobility. Here, we report on the design of a complementary inverter, one of the most basic logic elements, which is based on a MoS2 n-type transistor and a WSe2 p-type transistor. The advantages provided by the complementary metal-oxide-semiconductor (CMOS) configuration and the high-performance TMD channels allow us to fabricate a TMD complementary inverter that has a high-gain of 13.7. This work demonstrates the operation of the MoS2 n-FET and WSe2 p-FET on the same substrate, and the electrical performance of the CMOS inverter, which is based on a different driving current, is also measured.

  20. Classic and Quantum Capacitances in Bernal Bilayer and Trilayer Graphene Field Effect Transistor

    Directory of Open Access Journals (Sweden)

    Hatef Sadeghi

    2013-01-01

    Full Text Available Our focus in this study is on characterizing the capacitance voltage (C-V behavior of Bernal stacking bilayer graphene (BG and trilayer graphene (TG as the channel of FET devices. The analytical models of quantum capacitance (QC of BG and TG are presented. Although QC is smaller than the classic capacitance in conventional devices, its contribution to the total metal oxide semiconductor capacitor in graphene-based FET devices becomes significant in the nanoscale. Our calculation shows that QC increases with gate voltage in both BG and TG and decreases with temperature with some fluctuations. However, in bilayer graphene the fluctuation is higher due to its tunable band structure with external electric fields. In similar temperature and size, QC in metal oxide BG is higher than metal oxide TG configuration. Moreover, in both BG and TG, total capacitance is more affected by classic capacitance as the distance between gate electrode and channel increases. However, QC is more dominant when the channel becomes thinner into the nanoscale, and therefore we mostly deal with quantum capacitance in top gate in contrast with bottom gate that the classic capacitance is dominant.

  1. Imaging using long range dipolar field effects

    International Nuclear Information System (INIS)

    Gutteridge, Sarah

    2002-01-01

    The work in this thesis has been undertaken by the author, except where indicated in reference, within the Magnetic Resonance Centre, at the University of Nottingham during the period from October 1998 to March 2001. This thesis details the different characteristics of the long range dipolar field and its application to magnetic resonance imaging. The long range dipolar field is usually neglected in nuclear magnetic resonance experiments, as molecular tumbling decouples its effect at short distances. However, in highly polarised samples residual long range components have a significant effect on the evolution of the magnetisation, giving rise to multiple spin echoes and unexpected quantum coherences. Three applications utilising these dipolar field effects are documented in this thesis. The first demonstrates the spatial sensitivity of the signal generated via dipolar field effects in structured liquid state samples. The second utilises the signal produced by the dipolar field to create proton spin density maps. These maps directly yield an absolute value for the water content of the sample that is unaffected by relaxation and any RF inhomogeneity or calibration errors in the radio frequency pulses applied. It has also been suggested that the signal generated by dipolar field effects may provide novel contrast in functional magnetic resonance imaging. In the third application, the effects of microscopic susceptibility variation on the signal are studied and the relaxation rate of the signal is compared to that of a conventional spin echo. (author)

  2. Two-dimensional numerical simulation of the effect of single event burnout for n-channel VDMOSFET

    International Nuclear Information System (INIS)

    Guo Hongxia; Chen Yusheng; Wang Wei; Zhao Jinlong; Zhang Yimen; Zhou Hui

    2004-01-01

    2D MEDICI simulator is used to investigate the effect of Single Event Burnout (SEB) for n-channel power VDMOSFETs. The simulation results are consistent with experimental results which have been published. The simulation results are of great interest for a better understanding of the occurrence of events. The effects of the minority carrier lifetime in the base region, the base width and the emitter doping density on SEB susceptibility are verified. Some hardening solutions to SEB are provided. The work shows that the 2D simulator MEDICI is an useful tool for burnout prediction and for the evaluation of hardening solutions. (authors)

  3. Towards accurate simulation of fringe field effects

    International Nuclear Information System (INIS)

    Berz, M.; Erdelyi, B.; Makino, K.

    2001-01-01

    In this paper, we study various fringe field effects. Previously, we showed the large impact that fringe fields can have on certain lattice scenarios of the proposed Neutrino Factory. Besides the linear design of the lattice, the effects depend strongly on the details of the field fall off. Various scenarios are compared. Furthermore, in the absence of detailed information, we study the effects for the LHC, a case where the fringe fields are known, and try to draw some conclusions for Neutrino Factory lattices

  4. Oxidation and crystal field effects in uranium

    Energy Technology Data Exchange (ETDEWEB)

    Tobin, J. G. [Lawrence Livermore National Lab. (LLNL), Livermore, CA (United States); Booth, C. H. [Lawrence Berkeley National Lab. (LBNL), Berkeley, CA (United States); Shuh, D. K. [Lawrence Berkeley National Lab. (LBNL), Berkeley, CA (United States); van der Laan, G. [Diamond Light Source, Didcot (United Kingdom); Sokaras, D. [Stanford Synchrotron Radiation Lightsource, Stanford, CA (United States); Weng, T. -C. [Stanford Synchrotron Radiation Lightsource, Stanford, CA (United States); Yu, S. W. [Lawrence Livermore National Lab. (LLNL), Livermore, CA (United States); Bagus, P. S. [Univ. of North Texas, Denton, TX (United States); Tyliszczak, T. [Lawrence Berkeley National Lab. (LBNL), Berkeley, CA (United States); Nordlund, D. [Stanford Synchrotron Radiation Lightsource, Stanford, CA (United States)

    2015-07-06

    An extensive investigation of oxidation in uranium has been pursued. This includes the utilization of soft x-ray absorption spectroscopy, hard x-ray absorption near-edge structure, resonant (hard) x-ray emission spectroscopy, cluster calculations, and a branching ratio analysis founded on atomic theory. The samples utilized were uranium dioxide (UO2), uranium trioxide (UO3), and uranium tetrafluoride (UF4). As a result, a discussion of the role of non-spherical perturbations, i.e., crystal or ligand field effects, will be presented.

  5. Enhanced stability of thin film transistors with double-stacked amorphous IWO/IWO:N channel layer

    Science.gov (United States)

    Lin, Dong; Pi, Shubin; Yang, Jianwen; Tiwari, Nidhi; Ren, Jinhua; Zhang, Qun; Liu, Po-Tsun; Shieh, Han-Ping

    2018-06-01

    In this work, bottom-gate top-contact thin film transistors with double-stacked amorphous IWO/IWO:N channel layer were fabricated. Herein, amorphous IWO and N-doped IWO were deposited as front and back channel layers, respectively, by radio-frequency magnetron sputtering. The electrical characteristics of the bi-layer-channel thin film transistors (TFTs) were examined and compared with those of single-layer-channel (i.e., amorphous IWO or IWO:N) TFTs. It was demonstrated to exhibit a high mobility of 27.2 cm2 V‑1 s‑1 and an on/off current ratio of 107. Compared to the single peers, bi-layer a-IWO/IWO:N TFTs showed smaller hysteresis and higher stability under negative bias stress and negative bias temperature stress. The enhanced performance could be attributed to its unique double-stacked channel configuration, which successfully combined the merits of the TFTs with IWO and IWO:N channels. The underlying IWO thin film provided percolation paths for electron transport, meanwhile, the top IWO:N layer reduced the bulk trap densities. In addition, the IWO channel/gate insulator interface had reduced defects, and IWO:N back channel surface was insensitive to the ambient atmosphere. Overall, the proposed bi-layer a-IWO/IWO:N TFTs show potential for practical applications due to its possibly long-term serviceability.

  6. High-performance PbS quantum dot vertical field-effect phototransistor using graphene as a transparent electrode

    Science.gov (United States)

    Che, Yongli; Zhang, Yating; Cao, Xiaolong; Song, Xiaoxian; Zhang, Haiting; Cao, Mingxuan; Dai, Haitao; Yang, Junbo; Zhang, Guizhong; Yao, Jianquan

    2016-12-01

    Solution processed photoactive PbS quantum dots (QDs) were used as channel in high-performance near-infrared vertical field-effect phototransistor (VFEpT) where monolayer graphene embedded as transparent electrode. In this vertical architecture, the PbS QD channel was sandwiched and naturally protected between the drain and source electrodes, which made the device ultrashort channel length (110 nm) simply the thickness of the channel layer. The VFEpT exhibited ambipolar operation with high mobilities of μe = 3.5 cm2/V s in n-channel operation and μh = 3.3 cm2/V s in p-channel operation at low operation voltages. By using the photoactive PbS QDs as channel material, the VFEpT exhibited good photoresponse properties with a responsivity of 4.2 × 102 A/W, an external quantum efficiency of 6.4 × 104% and a photodetectivity of 2.1 × 109 Jones at the light irradiance of 36 mW/cm2. Additionally, the VFEpT showed excellent on/off switching with good stability and reproducibility and fast response speed with a short rise time of 12 ms in n-channel operation and 10.6 ms in p-channel operation. These high mobilities, good photoresponse properties and simplistic fabrication of our VFEpTs provided a facile route to the high-performance inorganic photodetectors.

  7. Magnetic field effects in hybrid perovskite devices

    Science.gov (United States)

    Zhang, C.; Sun, D.; Sheng, C.-X.; Zhai, Y. X.; Mielczarek, K.; Zakhidov, A.; Vardeny, Z. V.

    2015-05-01

    Magnetic field effects have been a successful tool for studying carrier dynamics in organic semiconductors as the weak spin-orbit coupling in these materials gives rise to long spin relaxation times. As the spin-orbit coupling is strong in organic-inorganic hybrid perovskites, which are promising materials for photovoltaic and light-emitting applications, magnetic field effects are expected to be negligible in these optoelectronic devices. We measured significant magneto-photocurrent, magneto-electroluminescence and magneto-photoluminescence responses in hybrid perovskite devices and thin films, where the amplitude and shape are correlated to each other through the electron-hole lifetime, which depends on the perovskite film morphology. We attribute these responses to magnetic-field-induced spin-mixing of the photogenerated electron-hole pairs with different g-factors--the Δg model. We validate this model by measuring large Δg (~ 0.65) using field-induced circularly polarized photoluminescence, and electron-hole pair lifetime using picosecond pump-probe spectroscopy.

  8. Deformable Organic Nanowire Field-Effect Transistors.

    Science.gov (United States)

    Lee, Yeongjun; Oh, Jin Young; Kim, Taeho Roy; Gu, Xiaodan; Kim, Yeongin; Wang, Ging-Ji Nathan; Wu, Hung-Chin; Pfattner, Raphael; To, John W F; Katsumata, Toru; Son, Donghee; Kang, Jiheong; Matthews, James R; Niu, Weijun; He, Mingqian; Sinclair, Robert; Cui, Yi; Tok, Jeffery B-H; Lee, Tae-Woo; Bao, Zhenan

    2018-02-01

    Deformable electronic devices that are impervious to mechanical influence when mounted on surfaces of dynamically changing soft matters have great potential for next-generation implantable bioelectronic devices. Here, deformable field-effect transistors (FETs) composed of single organic nanowires (NWs) as the semiconductor are presented. The NWs are composed of fused thiophene diketopyrrolopyrrole based polymer semiconductor and high-molecular-weight polyethylene oxide as both the molecular binder and deformability enhancer. The obtained transistors show high field-effect mobility >8 cm 2 V -1 s -1 with poly(vinylidenefluoride-co-trifluoroethylene) polymer dielectric and can easily be deformed by applied strains (both 100% tensile and compressive strains). The electrical reliability and mechanical durability of the NWs can be significantly enhanced by forming serpentine-like structures of the NWs. Remarkably, the fully deformable NW FETs withstand 3D volume changes (>1700% and reverting back to original state) of a rubber balloon with constant current output, on the surface of which it is attached. The deformable transistors can robustly operate without noticeable degradation on a mechanically dynamic soft matter surface, e.g., a pulsating balloon (pulse rate: 40 min -1 (0.67 Hz) and 40% volume expansion) that mimics a beating heart, which underscores its potential for future biomedical applications. © 2018 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  9. Perspective analysis of tri gate germanium tunneling field-effect transistor with dopant segregation region at source/drain

    Science.gov (United States)

    Liu, Liang-kui; Shi, Cheng; Zhang, Yi-bo; Sun, Lei

    2017-04-01

    A tri gate Ge-based tunneling field-effect transistor (TFET) has been numerically studied with technology computer aided design (TCAD) tools. Dopant segregated Schottky source/drain is applied to the device structure design (DS-TFET). The characteristics of the DS-TFET are compared and analyzed comprehensively. It is found that the performance of n-channel tri gate DS-TFET with a positive bias is insensitive to the dopant concentration and barrier height at n-type drain, and that the dopant concentration and barrier height at a p-type source considerably affect the device performance. The domination of electron current in the entire BTBT current of this device accounts for this phenomenon and the tri-gate DS-TFET is proved to have a higher performance than its dual-gate counterpart.

  10. Field-effect P-N junction

    Science.gov (United States)

    Regan, William; Zettl, Alexander

    2015-05-05

    This disclosure provides systems, methods, and apparatus related to field-effect p-n junctions. In one aspect, a device includes an ohmic contact, a semiconductor layer disposed on the ohmic contact, at least one rectifying contact disposed on the semiconductor layer, a gate including a layer disposed on the at least one rectifying contact and the semiconductor layer and a gate contact disposed on the layer. A lateral width of the rectifying contact is less than a semiconductor depletion width of the semiconductor layer. The gate contact is electrically connected to the ohmic contact to create a self-gating feedback loop that is configured to maintain a gate electric field of the gate.

  11. Field Effect Microparticle Generation for Cell Microencapsulation.

    Science.gov (United States)

    Hsu, Brend Ray-Sea; Fu, Shin-Huei

    2017-01-01

    The diameter and sphericity of alginate-poly-L-lysine-alginate microcapsules, determined by the size and the shape of calcium alginate microspheres, affect their in vivo durability and biocompatibility and the results of transplantation. The commonly used air-jet spray method generates microspheres with a wider variation in diameter, larger sphere morphology, and evenly distributed encapsulated cells. In order to overcome these drawbacks, we designed a field effect microparticle generator to create a stable electric field to prepare microparticles with a smaller diameter and more uniform morphology. Using this electric field microparticle generator the encapsulated cells will be located at the periphery of the microspheres, and thus the supply of oxygen and nutrients for the encapsulated cells will be improved compared with the centrally located encapsulated cells in the air-jet spray method.

  12. An accurate mobility model for the I-V characteristics of n-channel enhancement-mode MOSFETs with single-channel boron implantation

    International Nuclear Information System (INIS)

    Chingyuan Wu; Yeongwen Daih

    1985-01-01

    In this paper an analytical mobility model is developed for the I-V characteristics of n-channel enhancement-mode MOSFETs, in which the effects of the two-dimensional electric fields in the surface inversion channel and the parasitic resistances due to contact and interconnection are included. Most importantly, the developed mobility model easily takes the device structure and process into consideration. In order to demonstrate the capabilities of the developed model, the structure- and process-oriented parameters in the present mobility model are calculated explicitly for an n-channel enhancement-mode MOSFET with single-channel boron implantation. Moreover, n-channel MOSFETs with different channel lengths fabricated in a production line by using a set of test keys have been characterized and the measured mobilities have been compared to the model. Excellent agreement has been obtained for all ranges of the fabricated channel lengths, which strongly support the accuracy of the model. (author)

  13. Characterization of a vertically movable gate field effect transistor using a silicon-on-insulator wafer

    Science.gov (United States)

    Song, In-Hyouk; Forfang, William B. D.; Cole, Bryan; You, Byoung Hee

    2014-10-01

    The vertically movable gate field effect transistor (VMGFET) is a FET-based sensing element, whose gate moves in a vertical direction over the channel. A VMGFET gate covers the region between source and drain. A 1 μm thick air layer separates the gate and the substrate of the VMGFET. A novel fabrication process to form a VMGFET using a silicon-on-insulator (SOI) wafer provides minimal internal stress of the gate structure. The enhancement-type n-channel VMGFET is fabricated with the threshold voltage of 2.32 V in steady state. A non-inverting amplifier is designed and integrated on a printable circuit board (PCB) to characterize device sensitivity and mechanical properties. The VMGFET is mechanically coupled to a speaker membrane to apply mechanical vibration. The oscillated drain current of FET are monitored and sampled with NI LabVIEW. The frequency of the output signal correlates with that of the input stimulus. The resonance frequency of the fabricated VMGFET is measured to be 1.11 kHz. The device sensitivity linearly increases by 0.106 mV/g Hz in the range of 150 Hz and 1 kHz.

  14. Characterization of a vertically movable gate field effect transistor using a silicon-on-insulator wafer

    International Nuclear Information System (INIS)

    Song, In-Hyouk; Forfang, William B D; Cole, Bryan; Hee You, Byoung

    2014-01-01

    The vertically movable gate field effect transistor (VMGFET) is a FET-based sensing element, whose gate moves in a vertical direction over the channel. A VMGFET gate covers the region between source and drain. A 1 μm thick air layer separates the gate and the substrate of the VMGFET. A novel fabrication process to form a VMGFET using a silicon-on-insulator (SOI) wafer provides minimal internal stress of the gate structure. The enhancement-type n-channel VMGFET is fabricated with the threshold voltage of 2.32 V in steady state. A non-inverting amplifier is designed and integrated on a printable circuit board (PCB) to characterize device sensitivity and mechanical properties. The VMGFET is mechanically coupled to a speaker membrane to apply mechanical vibration. The oscillated drain current of FET are monitored and sampled with NI LabVIEW. The frequency of the output signal correlates with that of the input stimulus. The resonance frequency of the fabricated VMGFET is measured to be 1.11 kHz. The device sensitivity linearly increases by 0.106 mV/g Hz in the range of 150 Hz and 1 kHz. (paper)

  15. Room Temperature Silicene Field-Effect Transistors

    Science.gov (United States)

    Akinwande, Deji

    Silicene, a buckled Si analogue of graphene, holds significant promise for future electronics beyond traditional CMOS. In our predefined experiments via encapsulated delamination with native electrodes approach, silicene devices exhibit an ambipolar charge transport behavior, corroborating theories on Dirac band in Ag-free silicene. Monolayer silicene device has extracted field-effect mobility within the theoretical expectation and ON/OFF ratio greater than monolayer graphene, while multilayer silicene devices show decreased mobility and gate modulation. Air-stability of silicene devices depends on the number of layers of silicene and intrinsic material structure determined by growth temperature. Few or multi-layer silicene devices maintain their ambipolar behavior for days in contrast to minutes time scale for monolayer counterparts under similar conditions. Multilayer silicene grown at different temperatures below 300oC possess different intrinsic structures and yield different electrical property and air-stability. This work suggests a practical prospect to enable more air-stable silicene devices with layer and growth condition control, which can be leveraged for other air-sensitive 2D materials. In addition, we describe quantum and classical transistor device concepts based on silicene and related buckled materials that exploit the 2D topological insulating phenomenon. The transistor device physics offer the potential for ballistic transport that is robust against scattering and can be employed for both charge and spin transport. This work was supported by the ARO.

  16. Water soluble nano-scale transient material germanium oxide for zero toxic waste based environmentally benign nano-manufacturing

    KAUST Repository

    Almuslem, A. S.

    2017-02-14

    In the recent past, with the advent of transient electronics for mostly implantable and secured electronic applications, the whole field effect transistor structure has been dissolved in a variety of chemicals. Here, we show simple water soluble nano-scale (sub-10 nm) germanium oxide (GeO) as the dissolvable component to remove the functional structures of metal oxide semiconductor devices and then reuse the expensive germanium substrate again for functional device fabrication. This way, in addition to transiency, we also show an environmentally friendly manufacturing process for a complementary metal oxide semiconductor (CMOS) technology. Every year, trillions of complementary metal oxide semiconductor (CMOS) electronics are manufactured and billions are disposed, which extend the harmful impact to our environment. Therefore, this is a key study to show a pragmatic approach for water soluble high performance electronics for environmentally friendly manufacturing and bioresorbable electronic applications.

  17. Fabrication of assembled ZnO/TiO2 heterojunction thin film transistors using solution processing technique

    Science.gov (United States)

    Liau, Leo Chau-Kuang; Lin, Yun-Guo

    2015-01-01

    Ceramic-based metal-oxide-semiconductor (MOS) field-effect thin film transistors (TFTs), which were assembled by ZnO and TiO2 heterojunction films coated using solution processing technique, were fabricated and characterized. The fabrication of the device began with the preparation of ZnO and TiO2 films by spin coating. The ZnO and TiO2 films that were stacked together and annealed at 450 °C were characterized as a p-n junction diode. Two types of the devices, p-channel and n-channel TFTs, were produced using different assemblies of ZnO and TiO2 films. Results show that the p-channel TFTs (p-TFTs) and n-channel TFTs (n-TFTs) using the assemblies of ZnO and TiO2 films were demonstrated by source-drain current vs. drain voltage (IDS-VDS) measurements. Several electronic properties of the p- and n- TFTs, such as threshold voltage (Vth), on-off ratio, channel mobility, and subthreshold swing (SS), were determined by current-voltage (I-V) data analysis. The ZnO/TiO2-based TFTs can be produced using solution processing technique and an assembly approach.

  18. Durability-enhanced two-dimensional hole gas of C-H diamond surface for complementary power inverter applications.

    Science.gov (United States)

    Kawarada, Hiroshi; Yamada, Tetsuya; Xu, Dechen; Tsuboi, Hidetoshi; Kitabayashi, Yuya; Matsumura, Daisuke; Shibata, Masanobu; Kudo, Takuya; Inaba, Masafumi; Hiraiwa, Atsushi

    2017-02-20

    Complementary power field effect transistors (FETs) based on wide bandgap materials not only provide high-voltage switching capability with the reduction of on-resistance and switching losses, but also enable a smart inverter system by the dramatic simplification of external circuits. However, p-channel power FETs with equivalent performance to those of n-channel FETs are not obtained in any wide bandgap material other than diamond. Here we show that a breakdown voltage of more than 1600 V has been obtained in a diamond metal-oxide-semiconductor (MOS) FET with a p-channel based on a two-dimensional hole gas (2DHG). Atomic layer deposited (ALD) Al 2 O 3 induces the 2DHG ubiquitously on a hydrogen-terminated (C-H) diamond surface and also acts as both gate insulator and passivation layer. The high voltage performance is equivalent to that of state-of-the-art SiC planar n-channel FETs and AlGaN/GaN FETs. The drain current density in the on-state is also comparable to that of these two FETs with similar device size and V B .

  19. A novel charge pump drive circuit for power MOSFETs

    International Nuclear Information System (INIS)

    Wang Songlin; Zhou Bo; Wang Hui; Guo Wangrui; Ye Qiang

    2010-01-01

    Novel improved power metal oxide semiconductor field effect transistor (MOSFET) drive circuits are introduced. An anti-deadlock block is used in the P-channel power MOSFET drive circuit to avoid deadlocks and improve the transient response. An additional charging path is added to the N-channel power MOSFET drive circuit to enhance its drive capability and improve the transient response. The entire circuit is designed in a 0.6 μm BCD process and simulated with Cadence Spectre. Compared with traditional power MOSFET drive circuits, the simulation results show that improved P-channel power MOSFET drive circuit makes the rise time reduced from 60 to 14 ns, the fall time reduced from 240 to 30 ns, and its power dissipation reduced from 2 to 1 mW, while the improved N-channel power MOSFET drive circuit makes the rise time reduced from 360 to 27 ns and its power dissipation reduced from 1.1 to 0.8 mW. (semiconductor integrated circuits)

  20. High-current and low acceleration voltage arsenic ion implanted polysilicon-gate and source-drain electrode Si mos transistor

    International Nuclear Information System (INIS)

    Saito, Yasuyuki; Sugimura, Yoshiro; Sugihara, Michiyuki

    1993-01-01

    The fabrication process of high current arsenic (As) ion implanted polysilicon (Si) gate and source drain (SD) electrode Si n-channel metal oxide-semiconductor field effect transistor (MOSFET) was examined. Poly Si film n-type doping was performed by using high current (typical current: 2mA) and relatively low acceleration voltage (40keV) As ion implantation technique (Lintott series 3). It was observed that high dose As implanted poly Si films as is show refractoriness against radical fluorine excited by microwave. Using GCA MANN4800 (m/c ID No.2, resist: OFPR) mask pattern printing technique, the high current As ion implantation technique and radical fluorine gas phase etching (Chemical dry etching: CDE) technique, the n-channel Poly Si gate (ρs = ≅100Ω/□) enhancement MQSFETs(ρs source drain = ≅50Ω/□, SiO 2 gate=380 angstrom) with off-leak-less were obtained on 3 inch Czochralski grown 2Ωcm boron doped p type wafers (Osaka titanium). By the same process, a 8 bit single chip μ-processor with 26MHz full operation was performed

  1. Electric Field Effects in RUS Measurements

    Energy Technology Data Exchange (ETDEWEB)

    Darling, Timothy W [Los Alamos National Laboratory; Ten Cate, James A [Los Alamos National Laboratory; Allured, Bradley [UNIV NEVADA, RENO; Carpenter, Michael A [CAMBRIDGE UNIV. UK

    2009-09-21

    Much of the power of the Resonant Ultrasound Spectroscopy (RUS) technique is the ability to make mechanical resonance measurements while the environment of the sample is changed. Temperature and magnetic field are important examples. Due to the common use of piezoelectric transducers near the sample, applied electric fields introduce complications, but many materials have technologically interesting responses to applied static and RF electric fields. Non-contact optical, buffered, or shielded transducers permit the application of charge and externally applied electric fields while making RUS measurements. For conducting samples, in vacuum, charging produces a small negative pressure in the volume of the material - a state rarely explored. At very high charges we influence the electron density near the surface so the propagation of surface waves and their resonances may give us a handle on the relationship of electron density to bond strength and elasticity. Our preliminary results indicate a charge sign dependent effect, but we are studying a number of possible other effects induced by charging. In dielectric materials, external electric fields influence the strain response, particularly in ferroelectrics. Experiments to study this connection at phase transformations are planned. The fact that many geological samples contain single crystal quartz suggests a possible use of the piezoelectric response to drive vibrations using applied RF fields. In polycrystals, averaging of strains in randomly oriented crystals implies using the 'statistical residual' strain as the drive. The ability to excite vibrations in quartzite polycrystals and arenites is explored. We present results of experimental and theoretical approaches to electric field effects using RUS methods.

  2. Modeling quantization effects in field effect transistors

    International Nuclear Information System (INIS)

    Troger, C.

    2001-06-01

    Numerical simulation in the field of semiconductor device development advanced to a valuable, cost-effective and flexible facility. The most widely used simulators are based on classical models, as they need to satisfy time and memory constraints. To improve the performance of field effect transistors such as MOSFETs and HEMTs these devices are continuously scaled down in their dimensions. Consequently the characteristics of such devices are getting more and more determined by quantum mechanical effects arising from strong transversal fields in the channel. In this work an approach based on a two-dimensional electron gas is used to describe the confinement of the carriers. Quantization is considered in one direction only. For the derivation of a one-dimensional Schroedinger equation in the effective mass framework a non-parabolic correction for the energy dispersion due to Kane is included. For each subband a non-parabolic dispersion relation characterized by subband masses and subband non-parabolicity coefficients is introduced and the parameters are calculated via perturbation theory. The method described in this work has been implemented in a software tool that performs a self-consistent solution of Schroedinger- and Poisson-equation for a one-dimensional cut through a MOS structure or heterostructure. The calculation of the carrier densities is performed assuming Fermi-Dirac statistics. In the case of a MOS structure a metal or a polysilicon gate is considered and an arbitrary gate bulk voltage can be applied. This allows investigating quantum mechanical effects in capacity calculations, to compare the simulated data with measured CV curves and to evaluate the results obtained with a quantum mechanical correction for the classical electron density. The behavior of the defined subband parameters is compared to the value of the mass and the non-parabolicity coefficient from the model due to Kane. Finally the presented characterization of the subbands is applied

  3. Direct coupled amplifiers using field effect transistors

    Energy Technology Data Exchange (ETDEWEB)

    Fowler, E P [Control and Instrumentation Division, Atomic Energy Establishment, Winfrith, Dorchester, Dorset (United Kingdom)

    1964-03-15

    The concept of the uni-polar field effect transistor (P.E.T.) was known before the invention of the bi-polar transistor but it is only recently that they have been made commercially. Being produced as yet only in small quantities, their price imposes a restriction on use to circuits where their peculiar properties can be exploited to the full. One such application is described here where the combination of low voltage drift and relatively low input leakage current are necessarily used together. One of the instruments used to control nuclear reactors has a logarithmic response to the mean output current from a polarised ionisation chamber. The logarithmic signal is then differentiated electrically, the result being displayed on a meter calibrated to show the reactor divergence or doubling time. If displayed in doubling time the scale is calibrated reciprocally. Because of the wide range obtained in the logarithmic section and the limited supply voltage, an output of 1 volt per decade change in ionisation current is used. Differentiating this gives a current of 1.5 x 10{sup -8} A for p.s.D. (20 sec. doubling time) in the differentiating amplifier. To overcome some of the problems of noise due to statistical variations in input current, the circuit design necessitates a resistive path to ground at the amplifier input of 20 M.ohms. A schematic diagram is shown. 1. It is evident that a zero drift of 1% can be caused by a leakage current of 1.5 x 10{sup -10} A or an offset voltage of 3 mV at the amplifier input. Although the presently used electrometer valve is satisfactory from the point of view of grid current, there have been sudden changes in grid to grid voltage (the valve is a double triode) of up to 10 m.V. It has been found that a pair of F.E.T's. can be used to replace the electrometer valve so long as care is taken in correct balance of the two devices. An investigation has been made into the characteristics of some fourteen devices to see whether those with

  4. Ultra-low power high temperature and radiation hard complementary metal-oxide-semiconductor (CMOS) silicon-on-insulator (SOI) voltage reference.

    Science.gov (United States)

    Boufouss, El Hafed; Francis, Laurent A; Kilchytska, Valeriya; Gérard, Pierre; Simon, Pascal; Flandre, Denis

    2013-12-13

    This paper presents an ultra-low power CMOS voltage reference circuit which is robust under biomedical extreme conditions, such as high temperature and high total ionized dose (TID) radiation. To achieve such performances, the voltage reference is designed in a suitable 130 nm Silicon-on-Insulator (SOI) industrial technology and is optimized to work in the subthreshold regime of the transistors. The design simulations have been performed over the temperature range of -40-200 °C and for different process corners. Robustness to radiation was simulated using custom model parameters including TID effects, such as mobilities and threshold voltages degradation. The proposed circuit has been tested up to high total radiation dose, i.e., 1 Mrad (Si) performed at three different temperatures (room temperature, 100 °C and 200 °C). The maximum drift of the reference voltage V(REF) depends on the considered temperature and on radiation dose; however, it remains lower than 10% of the mean value of 1.5 V. The typical power dissipation at 2.5 V supply voltage is about 20 μW at room temperature and only 75 μW at a high temperature of 200 °C. To understand the effects caused by the combination of high total ionizing dose and temperature on such voltage reference, the threshold voltages of the used SOI MOSFETs were extracted under different conditions. The evolution of V(REF) and power consumption with temperature and radiation dose can then be explained in terms of the different balance between fixed oxide charge and interface states build-up. The total occupied area including pad-ring is less than 0.09 mm2.

  5. Synthesis and characterization of metal oxide semiconductors by a facile co-electroplating-annealing method and formation of ZnO/CuO pn heterojunctions with rectifying behavior

    Science.gov (United States)

    Turkdogan, Sunay; Kilic, Bayram

    2018-01-01

    We have developed a unique growth method and demonstrated the growth of CuO and ZnO semiconductor materials and the fabrication of their pn heterojunctions in ambient atmosphere. The pn heterojunctions were constructed using inherently p-type CuO and inherently n-type ZnO materials. Both p- and n-type semiconductors and pn heterojunctions were prepared using a simple but versatile growth method that relies on the transformation of electroplated Cu and Zn metals into CuO and ZnO semiconductors, respectively and is capable of a large-scale production desired in most of the applications. The structural, chemical, optical and electrical properties of the materials and junctions were investigated using various characterization methods and the results show that our growth method, materials and devices are quite promising to be utilized for various applications including but not limited to solar cells, gas/humidity sensors and photodetectors.

  6. Electrical characterization of 4H-SiC metal-oxide-semiconductor structure with Al2O3 stacking layers as dielectric

    Science.gov (United States)

    Chang, P. K.; Hwu, J. G.

    2018-02-01

    Interface defects and oxide bulk traps conventionally play important roles in the electrical performance of SiC MOS device. Introducing the Al2O3 stack grown by repeated anodization of Al films can notably lower the leakage current in comparison to the SiO2 structure, and enhance the minority carrier response at low frequency when the number of Al2O3 layers increase. In addition, the interface quality is not deteriorated by the stacking of Al2O3 layers because the stacked Al2O3 structure grown by anodization possesses good uniformity. In this work, the capacitance equivalent thickness (CET) of stacking Al2O3 will be up to 19.5 nm and the oxidation process can be carried out at room temperature. For the Al2O3 gate stack with CET 19.5 nm on n-SiC substrate, the leakage current at 2 V is 2.76 × 10-10 A/cm2, the interface trap density at the flatband voltage is 3.01 × 1011 eV-1 cm-2, and the effective breakdown field is 11.8 MV/cm. Frequency dispersion and breakdown characteristics may thus be improved as a result of the reduction in trap density. The Al2O3 stacking layers are capable of maintaining the leakage current as low as possible even after constant voltage stress test, which will further ameliorate reliability characteristics.

  7. Improving the electrical properties of lanthanum silicate films on ge metal oxide semiconductor capacitors by adopting interfacial barrier and capping layers.

    Science.gov (United States)

    Choi, Yu Jin; Lim, Hajin; Lee, Suhyeong; Suh, Sungin; Kim, Joon Rae; Jung, Hyung-Suk; Park, Sanghyun; Lee, Jong Ho; Kim, Seong Gyeong; Hwang, Cheol Seong; Kim, HyeongJoon

    2014-05-28

    The electrical properties of La-silicate films grown by atomic layer deposition (ALD) on Ge substrates with different film configurations, such as various Si concentrations, Al2O3 interfacial passivation layers, and SiO2 capping layers, were examined. La-silicate thin films were deposited using alternating injections of the La[N{Si(CH3)3}2]3 precursor with O3 as the La and O precursors, respectively, at a substrate temperature of 310 °C. The Si concentration in the La-silicate films was further controlled by adding ALD cycles of SiO2. For comparison, La2O3 films were also grown using [La((i)PrCp)3] and O3 as the La precursor and oxygen source, respectively, at the identical substrate temperature. The capacitance-voltage (C-V) hysteresis decreased with an increasing Si concentration in the La-silicate films, although the films showed a slight increase in the capacitance equivalent oxide thickness. The adoption of Al2O3 at the interface as a passivation layer resulted in lower C-V hysteresis and a low leakage current density. The C-V hysteresis voltages of the La-silicate films with Al2O3 passivation and SiO2 capping layers was significantly decreased to ∼0.1 V, whereas the single layer La-silicate film showed a hysteresis voltage as large as ∼1.0 V.

  8. Effects of series and parallel resistances on the C-V characteristics of silicon-based metal oxide semiconductor (MOS) devices

    Science.gov (United States)

    Omar, Rejaiba; Mohamed, Ben Amar; Adel, Matoussi

    2015-04-01

    This paper investigates the electrical behavior of the Al/SiO2/Si MOS structure. We have used the complex admittance method to develop an analytical model of total capacitance applied to our proposed equivalent circuit. The charge density, surface potential, semiconductor capacitance, flatband and threshold voltages have been determined by resolving the Poisson transport equations. This modeling is used to predict in particular the effects of frequency, parallel and series resistance on the capacitance-voltage characteristic. Results show that the variation of both frequency and parallel resistance causes strong dispersion of the C-V curves in the inversion regime. It also reveals that the series resistance influences the shape of C-V curves essentially in accumulation and inversion modes. A significant decrease of the accumulation capacitance is observed when R s increases in the range 200-50000 Ω. The degradation of the C-V magnitude is found to be more pronounced when the series resistance depends on the substrate doping density. When R s varies in the range 100 Ω-50 kΩ, it shows a decrease in the flatband voltage from -1.40 to -1.26 V and an increase in the threshold voltage negatively from -0.28 to -0.74 V, respectively. Good agreement has been observed between simulated and measured C-V curves obtained at high frequency. This study is necessary to control the adverse effects that disrupt the operation of the MOS structure in different regimes and optimizes the efficiency of such electronic device before manufacturing.

  9. Contribution to the study of metal-oxide-semiconductor devices with optical access. In2O3-SiO2-Si structure

    International Nuclear Information System (INIS)

    Thenoz, Yves.

    1974-01-01

    A general study of the fabrication of the structure In 2 O 3 /SiO 2 /Si was made encompassing the problems posed during the realization of these structures. The sputtering study enabled the influence of the main parameters on layer properties to be determined. The decisive importance of clean conditions throughout fabrication (especially during sputtering) on the properties of In 2 O 3 layers and on those of the structure and its stability was revealed. However, the problem of ageing of the structure were not investigated. Finally, the construction of MOS capacitors and transistors showed that In 2 O 3 /SiO 2 /Si structures can be used in MOS circuits [fr

  10. Controlling the interface charge density in GaN-based metal-oxide-semiconductor heterostructures by plasma oxidation of metal layers

    International Nuclear Information System (INIS)

    Hahn, Herwig; Kalisch, Holger; Vescan, Andrei; Pécz, Béla; Kovács, András; Heuken, Michael

    2015-01-01

    In recent years, investigating and engineering the oxide-semiconductor interface in GaN-based devices has come into focus. This has been driven by a large effort to increase the gate robustness and to obtain enhancement mode transistors. Since it has been shown that deep interface states act as fixed interface charge in the typical transistor operating regime, it appears desirable to intentionally incorporate negative interface charge, and thus, to allow for a positive shift in threshold voltage of transistors to realise enhancement mode behaviour. A rather new approach to obtain such negative charge is the plasma-oxidation of thin metal layers. In this study, we present transmission electron microscopy and energy dispersive X-ray spectroscopy analysis as well as electrical data for Al-, Ti-, and Zr-based thin oxide films on a GaN-based heterostructure. It is shown that the plasma-oxidised layers have a polycrystalline morphology. An interfacial amorphous oxide layer is only detectable in the case of Zr. In addition, all films exhibit net negative charge with varying densities. The Zr layer is providing a negative interface charge density of more than 1 × 10 13  cm –2 allowing to considerably shift the threshold voltage to more positive values

  11. Fabrication and operation methods of a one-time programmable (OTP) nonvolatile memory (NVM) based on a metal-oxide-semiconductor structure

    International Nuclear Information System (INIS)

    Cho, Seongjae; Lee, Junghoon; Jung, Sunghun; Park, Sehwan; Park, Byunggook

    2011-01-01

    In this paper, a novel one-time programmable (OTP) nonvolatile memory (NVM) device and its array based on a metal-insulator-semiconductor (MIS) structure is proposed. The Iindividual memory device has a vertical channel of a silicon diode. Historically, OTP memories were widely used for read-only-memories (ROMs), in which the most basic system architecture model was to store central processing unit (CPU) instructions. By grafting the nanoscale fabrication technology and novel structuring onto the concept of the OTP memory, innovative high-density NVM appliances for mobile storage media may be possible. The program operation is performed by breaking down the thin oxide layer between the pn diode structure and the wordline (WL). The programmed state can be identified by an operation that reads the leakage currents through the broken oxide. Since the proposed OTP NVM is based on neither a transistor structure nor a charge storing mechanism, it is highly reliable and functional for realizing the ultra-large scale integration. The operation physics and the fabrication processes are also explained in detail.

  12. Charge transport in amorphous InGaZnO thin-film transistors

    NARCIS (Netherlands)

    Germs, W.C.; Adriaans, W.H.; Tripathi, A.K.; Roelofs, W.S.C.; Cobb, B.; Janssen, R.A.J.; Gelinck, G.H.; Kemerink, M.

    2012-01-01

    We investigate the mechanism of charge transport in indium gallium zinc oxide (a-IGZO), an amorphous metal-oxide semiconductor. We measured the field-effect mobility and the Seebeck coefficient (S=ΔV/ΔT) of a-IGZO in thin-film transistors as a function of charge-carrier density for different

  13. Charge transport in amorphous InGaZnO thin film transistors

    NARCIS (Netherlands)

    Germs, W.C.; Adriaans, W.H.; Tripathi, A.K.; Roelofs, W.S.C.; Cobb, B.; Janssen, R.A.J.; Gelinck, G.H.; Kemerink, M.

    2012-01-01

    We investigate the mechanism of charge transport in indium gallium zinc oxide (a-IGZO), an amorphous metal-oxide semiconductor. We measured the field-effect mobility and the Seebeck coefficient (S=¿V/¿T) of a-IGZO in thin-film transistors as a function of charge-carrier density for different

  14. Numerical method for a 2D drift diffusion model arising in strained n ...

    Indian Academy of Sciences (India)

    Abstract. This paper reports the calculation of electron transport in metal oxide semiconductor field effects transistors (MOSFETs) with biaxially tensile strained silicon channel. The calculation is formulated based on two-dimensional drift diffusion model (DDM) including strain effects. The carrier mobility dependence on the ...

  15. Numerical method for a 2D drift diffusion model arising in strained n ...

    Indian Academy of Sciences (India)

    This paper reports the calculation of electron transport in metal oxide semiconductor field effects transistors (MOSFETs) with biaxially tensile strained silicon channel. The calculation is formulated based on two-dimensional drift diffusion model (DDM) including strain effects. The carrier mobility dependence on the lateral and ...

  16. Short-channel drain current model for asymmetric heavily/lightly ...

    Indian Academy of Sciences (India)

    The paper presents a drain current model for double gate metal oxide semiconductor field effect transistors (DG MOSFETs) based on a new velocity saturation model that accounts for short-channel velocity saturation effect independently in the front and the back gate controlled channels under asymmetric front and back ...

  17. Miniature semiconductor detectors for in vivo dosimetry

    International Nuclear Information System (INIS)

    Rosenfeld, A. B.; Cutajar, D.; Lerch, M. L. F.; Takacs, G.; Cornelius, I. M.; Yudelev, M.; Zaider, M.

    2006-01-01

    Silicon mini-semiconductor detectors are found in wide applications for in vivo personal dosimetry and dosimetry and Micro-dosimetry of different radiation oncology modalities. These applications are based on integral and spectroscopy modes of metal oxide semiconductor field effect transistor and silicon p-n junction detectors. The advantages and limitations of each are discussed. (authors)

  18. Oxide Thin-Film Electronics using All-MXene Electrical Contacts

    KAUST Repository

    Wang, Zhenwei; Kim, Hyunho; Alshareef, Husam N.

    2018-01-01

    show balanced performance, including field-effect mobilities of 2.61 and 2.01 cm2 V−1 s−1 and switching ratios of 3.6 × 106 and 1.1 × 103, respectively. Further, complementary metal oxide semiconductor (CMOS) inverters are demonstrated. The CMOS

  19. Submicron Silicon MOSFET

    Science.gov (United States)

    Daud, T.

    1986-01-01

    Process for making metal-oxide/semiconductor field-effect transistors (MOSFET's) results in gate-channel lengths of only few hundred angstroms about 100 times as small as state-of-the-art devices. Gates must be shortened to develop faster MOSFET's; proposed fabrication process used to study effects of size reduction in MOS devices and eventually to build practical threedimensional structures.

  20. Automated System Tests High-Power MOSFET's

    Science.gov (United States)

    Huston, Steven W.; Wendt, Isabel O.

    1994-01-01

    Computer-controlled system tests metal-oxide/semiconductor field-effect transistors (MOSFET's) at high voltages and currents. Measures seven parameters characterizing performance of MOSFET, with view toward obtaining early indication MOSFET defective. Use of test system prior to installation of power MOSFET in high-power circuit saves time and money.

  1. Driver Circuit For High-Power MOSFET's

    Science.gov (United States)

    Letzer, Kevin A.

    1991-01-01

    Driver circuit generates rapid-voltage-transition pulses needed to switch high-power metal oxide/semiconductor field-effect transistor (MOSFET) modules rapidly between full "on" and full "off". Rapid switching reduces time of overlap between appreciable current through and appreciable voltage across such modules, thereby increasing power efficiency.

  2. Dc-To-Dc Converter Uses Reverse Conduction Of MOSFET's

    Science.gov (United States)

    Gruber, Robert P.; Gott, Robert W.

    1991-01-01

    In modified high-power, phase-controlled, full-bridge, pulse-width-modulated dc-to-dc converters, switching devices power metal oxide/semiconductor field-effect transistors (MOSFET's). Decreases dissipation of power during switching by eliminating approximately 0.7-V forward voltage drop in anti-parallel diodes. Energy-conversion efficiency increased.

  3. Characterization of MOSFET dosimeters for low-dose measurements in maxillofacial anthropomorphic phantoms

    NARCIS (Netherlands)

    Koivisto, J.H.; Wolff, J.E.; Kiljunen, T.; Schulze, D.; Kortesniemi, M.

    2015-01-01

    The aims of this study were to characterize reinforced metal-oxide-semiconductor field-effect transistor (MOSFET) dosimeters to assess the measurement uncertainty, single exposure low-dose limit with acceptable accuracy, and the number of exposures required to attain the corresponding limit of the

  4. Reliability Assessment of SiC Power MOSFETs From The End User's Perspective

    DEFF Research Database (Denmark)

    Karaventzas, Vasilios Dimitris; Nawaz, Muhammad; Iannuzzo, Francesco

    2016-01-01

    The reliability of commercial Silicon Carbide (SiC) Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs) is investigated, and comparative assessment is performed under various test environments. The MOSFETs are tested both regarding the electrical properties of the dies and the packaging...

  5. Analyzing Single-Event Gate Ruptures In Power MOSFET's

    Science.gov (United States)

    Zoutendyk, John A.

    1993-01-01

    Susceptibilities of power metal-oxide/semiconductor field-effect transistors (MOSFET's) to single-event gate ruptures analyzed by exposing devices to beams of energetic bromine ions while applying appropriate bias voltages to source, gate, and drain terminals and measuring current flowing into or out of each terminal.

  6. MOSFET analog memory circuit achieves long duration signal storage

    Science.gov (United States)

    1966-01-01

    Memory circuit maintains the signal voltage at the output of an analog signal amplifier when the input signal is interrupted or removed. The circuit uses MOSFET /Metal Oxide Semiconductor Field Effect Transistor/ devices as voltage-controlled switches, triggered by an external voltage-sensing device.

  7. Progress in MOSFET double-layer metalization

    Science.gov (United States)

    Gassaway, J. D.; Trotter, J. D.; Wade, T. E.

    1980-01-01

    Report describes one-year research effort in VLSL fabrication. Four activities are described: theoretical study of two-dimensional diffusion in SOS (silicon-on-sapphire); setup of sputtering system, furnaces, and photolithography equipment; experiments on double layer metal; and investigation of two-dimensional modeling of MOSFET's (metal-oxide-semiconductor field-effect transistors).

  8. Response Of A MOSFET To A Cosmic Ray

    Science.gov (United States)

    Benumof, Reuben; Zoutendyk, John A.

    1988-01-01

    Theoretical paper discusses response of enhancement-mode metal oxide/semiconductor field-effect transistor to cosmic-ray ion that passes perpendicularly through gate-oxide layers. Even if ion causes no permanent damage, temporary increase of electrical conductivity along track of ion large enough and long enough to cause change in logic state in logic circuit containing MOSFET.

  9. Advanced p-MOSFET Ionizing-Radiation Dosimeter

    Science.gov (United States)

    Buehler, Martin G.; Blaes, Brent R.

    1994-01-01

    Circuit measures total dose of ionizing radiation in terms of shift in threshold gate voltage of doped-channel metal oxide/semiconductor field-effect transistor (p-MOSFET). Drain current set at temperature-independent point to increase accuracy in determination of radiation dose.

  10. Field-effect detection using phospholipid membranes -Topical Review

    Directory of Open Access Journals (Sweden)

    Chiho Kataoka-Hamai and Yuji Miyahara

    2010-01-01

    Full Text Available The application of field-effect devices to biosensors has become an area of intense research interest. An attractive feature of field-effect sensing is that the binding or reaction of biomolecules can be directly detected from a change in electrical signals. The integration of such field-effect devices into cell membrane mimics may lead to the development of biosensors useful in clinical and biotechnological applications. This review summarizes recent studies on the fabrication and characterization of field-effect devices incorporating model membranes. The incorporation of black lipid membranes and supported lipid monolayers and bilayers into semiconductor devices is described.

  11. CMOS-compatible silicon nanowire field-effect transistors for ultrasensitive and label-free microRNAs sensing.

    Science.gov (United States)

    Lu, Na; Gao, Anran; Dai, Pengfei; Song, Shiping; Fan, Chunhai; Wang, Yuelin; Li, Tie

    2014-05-28

    MicroRNAs (miRNAs) have been regarded as promising biomarkers for the diagnosis and prognosis of early-stage cancer as their expression levels are associated with different types of human cancers. However, it is a challenge to produce low-cost miRNA sensors, as well as retain a high sensitivity, both of which are essential factors that must be considered in fabricating nanoscale biosensors and in future biomedical applications. To address such challenges, we develop a complementary metal oxide semiconductor (CMOS)-compatible SiNW-FET biosensor fabricated by an anisotropic wet etching technology with self-limitation which provides a much lower manufacturing cost and an ultrahigh sensitivity. This nanosensor shows a rapid (< 1 minute) detection of miR-21 and miR-205, with a low limit of detection (LOD) of 1 zeptomole (ca. 600 copies), as well as an excellent discrimination for single-nucleotide mismatched sequences of tumor-associated miRNAs. To investigate its applicability in real settings, we have detected miRNAs in total RNA extracted from lung cancer cells as well as human serum samples using the nanosensors, which demonstrates their potential use in identifying clinical samples for early diagnosis of cancer. © 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  12. Nanometer size field effect transistors for terahertz detectors

    International Nuclear Information System (INIS)

    Knap, W; Rumyantsev, S; Coquillat, D; Dyakonova, N; Teppe, F; Vitiello, M S; Tredicucci, A; Blin, S; Shur, M; Nagatsuma, T

    2013-01-01

    Nanometer size field effect transistors can operate as efficient resonant or broadband terahertz detectors, mixers, phase shifters and frequency multipliers at frequencies far beyond their fundamental cut-off frequency. This work is an overview of some recent results concerning the application of nanometer scale field effect transistors for the detection of terahertz radiation. (paper)

  13. High mobility polymer gated organic field effect transistor using zinc ...

    Indian Academy of Sciences (India)

    Organic thin film transistors were fabricated using evaporated zinc phthalocyanine as the active layer. Parylene film ... At room temperature, these transistors exhibit p-type conductivity with field-effect ... Keywords. Organic semiconductor; field effect transistor; phthalocyanine; high mobility. ... The evaporation rate was kept at ...

  14. A reliable and controllable graphene doping method compatible with current CMOS technology and the demonstration of its device applications

    Science.gov (United States)

    Kim, Seonyeong; Shin, Somyeong; Kim, Taekwang; Du, Hyewon; Song, Minho; Kim, Ki Soo; Cho, Seungmin; Lee, Sang Wook; Seo, Sunae

    2017-04-01

    The modulation of charge carrier concentration allows us to tune the Fermi level (E F) of graphene thanks to the low electronic density of states near the E F. The introduced metal oxide thin films as well as the modified transfer process can elaborately maneuver the amounts of charge carrier concentration in graphene. The self-encapsulation provides a solution to overcome the stability issues of metal oxide hole dopants. We have manipulated systematic graphene p-n junction structures for electronic or photonic application-compatible doping methods with current semiconducting process technology. We have demonstrated the anticipated transport properties on the designed heterojunction devices with non-destructive doping methods. This mitigates the device architecture limitation imposed in previously known doping methods. Furthermore, we employed E F-modulated graphene source/drain (S/D) electrodes in a low dimensional transition metal dichalcogenide field effect transistor (TMDFET). We have succeeded in fulfilling n-type, ambipolar, or p-type field effect transistors (FETs) by moving around only the graphene work function. Besides, the graphene/transition metal dichalcogenide (TMD) junction in either both p- and n-type transistor reveals linear voltage dependence with the enhanced contact resistance. We accomplished the complete conversion of p-/n-channel transistors with S/D tunable electrodes. The E F modulation using metal oxide facilitates graphene to access state-of-the-art complimentary-metal-oxide-semiconductor (CMOS) technology.

  15. The effect of metallization contact resistance on the measurement of the field effect mobility of long-channel unannealed amorphous In–Zn–O thin film transistors

    International Nuclear Information System (INIS)

    Lee, Sunghwan; Park, Hongsik; Paine, David C.

    2012-01-01

    The effect of contact resistance on the measurement of the field effect mobility of compositionally homogeneous channel indium zinc oxide (IZO)/IZO metallization thin film transistors (TFTs) is reported. The TFTs studied in this work operate in depletion mode as n-channel field effect devices with a field effect mobility calculated in the linear regime (μ FE ) of 20 ± 1.9 cm 2 /Vs and similar of 18 ± 1.3 cm 2 /Vs when calculated in the saturation regime (μ FE sat ). These values, however, significantly underestimate the channel mobility since a large part of the applied drain voltage is dropped across the source/drain contact interface. The transmission line method was employed to characterize the contact resistance and it was found that the conducting-IZO/semiconducting-IZO channel contact is highly resistive (specific contact resistance, ρ C > 100 Ωcm 2 ) and, further, this contact resistance is modulated with applied gate voltage. Accounting for the contact resistance (which is large and modulated by gate voltage), the corrected μ FE is shown to be 39 ± 2.6 cm 2 /Vs which is consistent with Hall mobility measurements of high carrier density IZO.

  16. Cylindrical Field Effect Transistor: A Full Volume Inversion Device

    KAUST Repository

    Fahad, Hossain M.

    2010-01-01

    inversion in the body. However, these devices are still limited by lithographic and processing challenges making them unsuitable for commercial production. This thesis explores a unique device structure called the CFET (Cylindrical Field Effect Transistors

  17. Vertically aligned carbon nanotube field-effect transistors

    KAUST Repository

    Li, Jingqi; Zhao, Chao; Wang, Qingxiao; Zhang, Qiang; Wang, Zhihong; Zhang, Xixiang; Abutaha, Anas I.; Alshareef, Husam N.

    2012-01-01

    Vertically aligned carbon nanotube field-effect transistors (CNTFETs) have been developed using pure semiconducting carbon nanotubes. The source and drain were vertically stacked, separated by a dielectric, and the carbon nanotubes were placed

  18. Progresses in organic field-effect transistors and molecular electronics

    Institute of Scientific and Technical Information of China (English)

    Wu Weiping; Xu Wei; Hu Wenping; Liu Yunqi; Zhu Daoben

    2006-01-01

    In the past years,organic semiconductors have been extensively investigated as electronic materials for organic field-effect transistors (OFETs).In this review,we briefly summarize the current status of organic field-effect transistors including materials design,device physics,molecular electronics and the applications of carbon nanotubes in molecular electronics.Future prospects and investigations required to improve the OFET performance are also involved.

  19. High Performance Electronics on Flexible Silicon

    KAUST Repository

    Sevilla, Galo T.

    2016-09-01

    Over the last few years, flexible electronic systems have gained increased attention from researchers around the world because of their potential to create new applications such as flexible displays, flexible energy harvesters, artificial skin, and health monitoring systems that cannot be integrated with conventional wafer based complementary metal oxide semiconductor processes. Most of the current efforts to create flexible high performance devices are based on the use of organic semiconductors. However, inherent material\\'s limitations make them unsuitable for big data processing and high speed communications. The objective of my doctoral dissertation is to develop integration processes that allow the transformation of rigid high performance electronics into flexible ones while maintaining their performance and cost. In this work, two different techniques to transform inorganic complementary metal-oxide-semiconductor electronics into flexible ones have been developed using industry compatible processes. Furthermore, these techniques were used to realize flexible discrete devices and circuits which include metal-oxide-semiconductor field-effect-transistors, the first demonstration of flexible Fin-field-effect-transistors, and metal-oxide-semiconductors-based circuits. Finally, this thesis presents a new technique to package, integrate, and interconnect flexible high performance electronics using low cost additive manufacturing techniques such as 3D printing and inkjet printing. This thesis contains in depth studies on electrical, mechanical, and thermal properties of the fabricated devices.

  20. Tunnel field-effect transistors with germanium/strained-silicon hetero-junctions for low power applications

    Energy Technology Data Exchange (ETDEWEB)

    Kim, Minsoo, E-mail: minsoo@mosfet.t.u-tokyo.ac.jp; Kim, Younghyun; Yokoyama, Masafumi; Nakane, Ryosho; Kim, SangHyeon; Takenaka, Mitsuru; Takagi, Shinichi

    2014-04-30

    We have studied a simple structure n-channel tunnel field-effect transistor with a pure-Ge/strained-Si hetero-junction. The device operation was demonstrated for the devices fabricated by combining epitaxially-grown Ge on strained-silicon-on-insulator substrates. Atomic-layer-deposition-Al{sub 2}O{sub 3}-based gate stacks were formed with electron cyclotron resonance plasma post oxidation to ensure the high quality metal–oxide–semiconductor interface between the high-k insulator and Ge. While the gate leakage current and drain current saturation are well controlled, relatively higher minimum subthreshold swing of 125 mV/dec and lower I{sub ON}/I{sub OFF} ratio of 10{sup 3}–10{sup 4} were obtained. It is expected that these device characteristics can be improved by further process optimization. - Highlights: • Layer by layer growth of Ge • Uniform interface between Ge and the insulator • Gate leakage current and drain current saturation seem to be well controlled. • The output characteristics show good saturation.

  1. Tunnel field-effect transistors with germanium/strained-silicon hetero-junctions for low power applications

    International Nuclear Information System (INIS)

    Kim, Minsoo; Kim, Younghyun; Yokoyama, Masafumi; Nakane, Ryosho; Kim, SangHyeon; Takenaka, Mitsuru; Takagi, Shinichi

    2014-01-01

    We have studied a simple structure n-channel tunnel field-effect transistor with a pure-Ge/strained-Si hetero-junction. The device operation was demonstrated for the devices fabricated by combining epitaxially-grown Ge on strained-silicon-on-insulator substrates. Atomic-layer-deposition-Al 2 O 3 -based gate stacks were formed with electron cyclotron resonance plasma post oxidation to ensure the high quality metal–oxide–semiconductor interface between the high-k insulator and Ge. While the gate leakage current and drain current saturation are well controlled, relatively higher minimum subthreshold swing of 125 mV/dec and lower I ON /I OFF ratio of 10 3 –10 4 were obtained. It is expected that these device characteristics can be improved by further process optimization. - Highlights: • Layer by layer growth of Ge • Uniform interface between Ge and the insulator • Gate leakage current and drain current saturation seem to be well controlled. • The output characteristics show good saturation

  2. In-situ SiN{sub x}/InN structures for InN field-effect transistors

    Energy Technology Data Exchange (ETDEWEB)

    Zervos, Ch., E-mail: hzervos@physics.uoc.gr; Georgakilas, A. [Microelectronics Research Group (MRG), Institute of Electronic Structure and Laser (IESL), Foundation for Research and Technology-Hellas - FORTH, P.O. Box 1385, GR-70013 Heraklion, Crete (Greece); Department of Physics, University of Crete, P.O. Box 2208, GR-71003 Heraklion, Crete (Greece); Adikimenakis, A.; Kostopoulos, A.; Kayambaki, M.; Tsagaraki, K.; Konstantinidis, G. [Microelectronics Research Group (MRG), Institute of Electronic Structure and Laser (IESL), Foundation for Research and Technology-Hellas - FORTH, P.O. Box 1385, GR-70013 Heraklion, Crete (Greece); Beleniotis, P. [Department of Physics, University of Crete, P.O. Box 2208, GR-71003 Heraklion, Crete (Greece)

    2016-04-04

    Critical aspects of InN channel field-effect transistors (FETs) have been investigated. SiN{sub x} dielectric layers were deposited in-situ, in the molecular beam epitaxy system, on the surface of 2 nm InN layers grown on GaN (0001) buffer layers. Metal-insulator-semiconductor Ni/SiN{sub x}/InN capacitors were analyzed by capacitance-voltage (C-V) and current-voltage measurements and were used as gates in InN FET transistors (MISFETs). Comparison of the experimental C-V results with self-consistent Schrödinger-Poisson calculations indicates the presence of a positive charge at the SiN{sub x}/InN interface of Q{sub if} ≈ 4.4 – 4.8 × 10{sup 13 }cm{sup −2}, assuming complete InN strain relaxation. Operation of InN MISFETs was demonstrated, but their performance was limited by a catastrophic breakdown at drain-source voltages above 2.5–3.0 V, the low electron mobility, and high series resistances of the structures.

  3. Impacts of gate bias and its variation on gamma-ray irradiation resistance of SiC MOSFETs

    Energy Technology Data Exchange (ETDEWEB)

    Murata, Koichi; Mitomo, Satoshi; Matsuda, Takuma; Yokoseki, Takashi [Saitama University, Sakuraku (Japan); National Institutes for Quantum and Radiological Science and Technology (QST), Takasaki (Japan); Makino, Takahiro; Onoda, Shinobu; Takeyama, Akinori; Ohshima, Takeshi [National Institutes for Quantum and Radiological Science and Technology (QST), Takasaki (Japan); Okubo, Shuichi; Tanaka, Yuki; Kandori, Mikio; Yoshie, Toru [Sanken Electric Co., Ltd., Niiza, Saitama (Japan); Hijikata, Yasuto [Saitama University, Sakuraku (Japan)

    2017-04-15

    Gamma-ray irradiation into vertical type n-channel hexagonal (4H)-silicon carbide (SiC) metal-oxide-semiconductor field effect transistors (MOSFETs) was performed under various gate biases. The threshold voltage for the MOSFETs irradiated with a constant positive gate bias showed a large negative shift, and the shift slightly recovered above 100 kGy. For MOSFETs with non- and a negative constant biases, no significant change in threshold voltage, V{sub th}, was observed up to 400 kGy. By changing the gate bias from positive bias to either negative or non-bias, the V{sub th} significantly recovered from the large negative voltage shift induced by 50 kGy irradiation with positive gate bias after only 10 kGy irradiation with either negative or zero bias. It indicates that the positive charges generated in the gate oxide near the oxide-SiC interface due to irradiation were removed or recombined instantly by the irradiation under zero or negative biases. (copyright 2016 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim)

  4. Reversibly Bistable Flexible Electronics

    KAUST Repository

    Alfaraj, Nasir

    2015-05-01

    Introducing the notion of transformational silicon electronics has paved the way for integrating various applications with silicon-based, modern, high-performance electronic circuits that are mechanically flexible and optically semitransparent. While maintaining large-scale production and prototyping rapidity, this flexible and translucent scheme demonstrates the potential to transform conventionally stiff electronic devices into thin and foldable ones without compromising long-term performance and reliability. In this work, we report on the fabrication and characterization of reversibly bistable flexible electronic switches that utilize flexible n-channel metal-oxide-semiconductor field-effect transistors. The transistors are fabricated initially on rigid (100) silicon substrates before they are peeled off. They can be used to control flexible batches of light-emitting diodes, demonstrating both the relative ease of scaling at minimum cost and maximum reliability and the feasibility of integration. The peeled-off silicon fabric is about 25 µm thick. The fabricated devices are transferred to a reversibly bistable flexible platform through which, for example, a flexible smartphone can be wrapped around a user’s wrist and can also be set back to its original mechanical position. Buckling and cyclic bending of such host platforms brings a completely new dimension to the development of flexible electronics, especially rollable displays.

  5. Swift heavy-ion induced trap generation and mixing at Si/SiO{sub 2} interface in depletion n-MOS

    Energy Technology Data Exchange (ETDEWEB)

    Shinde, N. [Ecotopia Science Institute, Division of Energy Science, Nagoya University, Nagoya 464-8603 (Japan) and Department of Physics, University of Pune, Pune 411 007 (India)]. E-mail: nss@nucl.nagoya-u.ac.jp; Bhoraskar, V.N. [Department of Physics, University of Pune, Pune 411 007 (India); Dhole, S.D. [Department of Physics, University of Pune, Pune 411 007 (India)

    2006-01-15

    Large channel depletion n-channel MOSFET (Metal oxide semiconductor field effect transistor) is a basic Si-SiO{sub 2} structure to understand irradiation-induced modifications. The contribution of interface and oxide states denoted as {delta}N {sub IT} and {delta}N {sub OT}, respectively, was separated out by using I {sub D}-V {sub DS}, I {sub D}-V {sub GS} measurements. The threshold voltage shift {delta}V {sub T} (V {sub T-irrad} - V {sub T-virgin}) increased for all ions (50 MeV Li, B, F, P and Ni) over the fluence of 2 x 10{sup 11}-2 x 10{sup 13} ions/cm{sup 2}. The increase in {delta}N {sub IT} was associated to trap generation at Si-SiO{sub 2} interface, but a small change in {delta}N {sub OT} indicate less charge trapping in oxide. The electronic energy loss S {sub e} induced increase in {delta}N {sub IT} is not adequate to explain the large shift in threshold voltage. A rough estimate shows that the channel width, W should decrease by 40% for a large increase in {delta}N {sub IT}. Thus, the possible factor affecting reduction of W may be ion beam mixing induced broadening of Si-SiO{sub 2} interface.

  6. Drain Current Modulation of a Single Drain MOSFET by Lorentz Force for Magnetic Sensing Application.

    Science.gov (United States)

    Chatterjee, Prasenjit; Chow, Hwang-Cherng; Feng, Wu-Shiung

    2016-08-30

    This paper reports a detailed analysis of the drain current modulation of a single-drain normal-gate n channel metal-oxide semiconductor field effect transistor (n-MOSFET) under an on-chip magnetic field. A single-drain n-MOSFET has been fabricated and placed in the center of a square-shaped metal loop which generates the on-chip magnetic field. The proposed device designed is much smaller in size with respect to the metal loop, which ensures that the generated magnetic field is approximately uniform. The change of drain current and change of bulk current per micron device width has been measured. The result shows that the difference drain current is about 145 µA for the maximum applied magnetic field. Such changes occur from the applied Lorentz force to push out the carriers from the channel. Based on the drain current difference, the change in effective mobility has been detected up to 4.227%. Furthermore, a detailed investigation reveals that the device behavior is quite different in subthreshold and saturation region. A change of 50.24 µA bulk current has also been measured. Finally, the device has been verified for use as a magnetic sensor with sensitivity 4.084% (29.6 T(-1)), which is very effective as compared to other previously reported works for a single device.

  7. Synchrotron X-ray irradiation effects on the device characteristics and the resistance to hot-carrier damage of MOSFETs with 4 nm thick gate oxides

    International Nuclear Information System (INIS)

    Tanaka, Yuusuke; Tanabe, Akira; Suzuki, Katsumi

    1998-01-01

    The effects of synchrotron x-ray irradiation on the device characteristics and hot-carrier resistance of n- and p-channel metal oxide semiconductor field effect transistors (MOSFETs) with 4 nm thick gate oxides are investigated. In p-channel MOSFETs, device characteristics were significantly affected by the x-ray irradiation but completely recovered after annealing, while the device characteristics in n-channel MOSFETs were not noticeably affected by the irradiation. This difference appears to be due to a difference in interface-state generation. In p-channel MOSFETs, defects caused by boron-ion penetration through the gate oxides may be sensitive to x-ray irradiation, causing the generation of many interface states. These interface states are completely eliminated after annealing in hydrogen gas. The effects of irradiation on the resistance to hot-carrier degradation in annealed 4 nm thick gate-oxide MOSFETs were negligible even at an x-ray dose of 6,000 mJ/cm 2

  8. High-k shallow traps observed by charge pumping with varying discharging times

    International Nuclear Information System (INIS)

    Ho, Szu-Han; Chen, Ching-En; Tseng, Tseung-Yuen; Chang, Ting-Chang; Lu, Ying-Hsin; Lo, Wen-Hung; Tsai, Jyun-Yu; Liu, Kuan-Ju; Wang, Bin-Wei; Cao, Xi-Xin; Chen, Hua-Mao; Cheng, Osbert; Huang, Cheng-Tung; Chen, Tsai-Fu

    2013-01-01

    In this paper, we investigate the influence of falling time and base level time on high-k bulk shallow traps measured by charge pumping technique in n-channel metal-oxide-semiconductor field-effect transistors with HfO 2 /metal gate stacks. N T -V high level characteristic curves with different duty ratios indicate that the electron detrapping time dominates the value of N T for extra contribution of I cp traps. N T is the number of traps, and I cp is charge pumping current. By fitting discharge formula at different temperatures, the results show that extra contribution of I cp traps at high voltage are in fact high-k bulk shallow traps. This is also verified through a comparison of different interlayer thicknesses and different Ti x N 1−x metal gate concentrations. Next, N T -V high level characteristic curves with different falling times (t falling time ) and base level times (t base level ) show that extra contribution of I cp traps decrease with an increase in t falling time . By fitting discharge formula for different t falling time , the results show that electrons trapped in high-k bulk shallow traps first discharge to the channel and then to source and drain during t falling time . This current cannot be measured by the charge pumping technique. Subsequent measurements of N T by charge pumping technique at t base level reveal a remainder of electrons trapped in high-k bulk shallow traps

  9. Validation of a Portable Low-Power Deep Brain Stimulation Device Through Anxiolytic Effects in a Laboratory Rat Model.

    Science.gov (United States)

    Kouzani, Abbas Z; Kale, Rajas P; Zarate-Garza, Pablo Patricio; Berk, Michael; Walder, Ken; Tye, Susannah J

    2017-09-01

    Deep brain stimulation (DBS) devices deliver electrical pulses to neural tissue through an electrode. To study the mechanisms and therapeutic benefits of deep brain stimulation, murine preclinical research is necessary. However, conducting naturalistic long-term, uninterrupted animal behavioral experiments can be difficult with bench-top systems. The reduction of size, weight, power consumption, and cost of DBS devices can assist the progress of this research in animal studies. A low power, low weight, miniature DBS device is presented in this paper. This device consists of electronic hardware and software components including a low-power microcontroller, an adjustable current source, an n-channel metal-oxide-semiconductor field-effect transistor, a coin-cell battery, electrode wires and a software program to operate the device. Evaluation of the performance of the device in terms of battery lifetime and device functionality through bench and in vivo tests was conducted. The bench test revealed that this device can deliver continuous stimulation current pulses of strength [Formula: see text], width [Formula: see text], and frequency 130 Hz for over 22 days. The in vivo tests demonstrated that chronic stimulation of the nucleus accumbens (NAc) with this device significantly increased psychomotor activity, together with a dramatic reduction in anxiety-like behavior in the elevated zero-maze test.

  10. G(sup 4)FET Implementations of Some Logic Circuits

    Science.gov (United States)

    Mojarradi, Mohammad; Akarvardar, Kerem; Cristoleveanu, Sorin; Gentil, Paul; Blalock, Benjamin; Chen, Suhan

    2009-01-01

    Some logic circuits have been built and demonstrated to work substantially as intended, all as part of a continuing effort to exploit the high degrees of design flexibility and functionality of the electronic devices known as G(sup 4)FETs and described below. These logic circuits are intended to serve as prototypes of more complex advanced programmable-logicdevice-type integrated circuits, including field-programmable gate arrays (FPGAs). In comparison with prior FPGAs, these advanced FPGAs could be much more efficient because the functionality of G(sup 4)FETs is such that fewer discrete components are needed to perform a given logic function in G(sup 4)FET circuitry than are needed perform the same logic function in conventional transistor-based circuitry. The underlying concept of using G(sup 4)FETs as building blocks of programmable logic circuitry was also described, from a different perspective, in G(sup 4)FETs as Universal and Programmable Logic Gates (NPO-41698), NASA Tech Briefs, Vol. 31, No. 7 (July 2007), page 44. A G(sup 4)FET can be characterized as an accumulation-mode silicon-on-insulator (SOI) metal oxide/semiconductor field-effect transistor (MOSFET) featuring two junction field-effect transistor (JFET) gates. The structure of a G(sup 4)FET (see Figure 1) is the same as that of a p-channel inversion-mode SOI MOSFET with two body contacts on each side of the channel. The top gate (G1), the substrate emulating a back gate (G2), and the junction gates (JG1 and JG2) can be biased independently of each other and, hence, each can be used to independently control some aspects of the conduction characteristics of the transistor. The independence of the actions of the four gates is what affords the enhanced functionality and design flexibility of G(sup 4)FETs. The present G(sup 4)FET logic circuits include an adjustable-threshold inverter, a real-time-reconfigurable logic gate, and a dynamic random-access memory (DRAM) cell (see Figure 2). The configuration

  11. Single event burnout sensitivity of embedded field effect transistors

    International Nuclear Information System (INIS)

    Koga, R.; Crain, S.H.; Crawford, K.B.; Yu, P.; Gordon, M.J.

    1999-01-01

    Observations of single event burnout (SEB) in embedded field effect transistors are reported. Both SEB and other single event effects are presented for several pulse width modulation and high frequency devices. The microscope has been employed to locate and to investigate the damaged areas. A model of the damage mechanism based on the results so obtained is described

  12. Bimolecular recombination in ambipolar organic field effect transistors

    NARCIS (Netherlands)

    Charrier, D.S.H.; Vries, T. de; Mathijssen, S.G.J.; Geluk, E.-J.; Smits, E.C.P.; Kemerink, M.; Janssen, R.A.J.

    2009-01-01

    In ambipolar organic field effect transistors (OFET) the shape of the channel potential is intimately related to the recombination zone width W, and hence to the electron–hole recombination strength. Experimentally, the recombination profile can be assessed by scanning Kelvin probe microscopy

  13. Durable chemical sensors based on field-effect transistors

    NARCIS (Netherlands)

    Reinhoudt, David

    1995-01-01

    The design of durable chemical sensors based on field-effect transistors (FETs) is described. After modification of an ion-sensitive FET (ISFET) with a polysiloxane membrane matrix, it is possible to attach all electroactive components covalently. Preliminary results of measurements with a

  14. Bimolecular recombination in ambipolar organic field effect transistors

    NARCIS (Netherlands)

    Charrier, D. S. H.; de Vries, T.; Mathijssen, S. G. J.; Geluk, E. -J.; Smits, E. C. P.; Kemerink, M.; Janssen, R. A. J.

    In ambipolar organic field effect transistors (OFET) the shape of the channel potential is intimately related to the recombination zone width W, and hence to the electron-hole recombination strength. Experimentally, the recombination profile can be assessed by scanning Kelvin probe microscopy

  15. Relating hysteresis and electrochemistry in graphene field effect transistors

    NARCIS (Netherlands)

    Veligura, Alina; Zomer, Paul J.; Vera-Marun, Ivan J.; Jozsa, Csaba; Gordiichuk, Pavlo I.; van Wees, Bart J.

    2011-01-01

    Hysteresis and commonly observed p-doping of graphene based field effect transistors (FETs) have been discussed in reports over the last few years. However, the interpretation of experimental works differs; and the mechanism behind the appearance of the hysteresis and the role of charge transfer

  16. Charge transport in disordered organic field-effect transistors

    NARCIS (Netherlands)

    Tanase, Cristina; Blom, Paul W.M.; Meijer, Eduard J.; Leeuw, Dago M. de; Jabbour, GE; Carter, SA; Kido, J; Lee, ST; Sariciftci, NS

    2002-01-01

    The transport properties of poly(2,5-thienylene vinylene) (PTV) field-effect transistors (FET) have been investigated as a function of temperature under controlled atmosphere. In a disordered semiconductor as PTV the charge carrier mobility, dominated by hopping between localized states, is

  17. Single event burnout sensitivity of embedded field effect transistors

    Energy Technology Data Exchange (ETDEWEB)

    Koga, R.; Crain, S.H.; Crawford, K.B.; Yu, P.; Gordon, M.J.

    1999-12-01

    Observations of single event burnout (SEB) in embedded field effect transistors are reported. Both SEB and other single event effects are presented for several pulse width modulation and high frequency devices. The microscope has been employed to locate and to investigate the damaged areas. A model of the damage mechanism based on the results so obtained is described.

  18. Nanoscaled biological gated field effect transistors for cytogenetic analysis

    DEFF Research Database (Denmark)

    Kwasny, Dorota; Dimaki, Maria; Andersen, Karsten Brandt

    2014-01-01

    Cytogenetic analysis is the study of chromosome structure and function, and is often used in cancer diagnosis, as many chromosome abnormalities are linked to the onset of cancer. A novel label free detection method for chromosomal translocation analysis using nanoscaled field effect transistors...

  19. Ambipolar charge transport in organic field-effect transistors

    NARCIS (Netherlands)

    Smits, E.C.P.; Anthopoulos, T.D.; Setayesh, S.; Veenendaal, van E.; Coehoorn, R.; Blom, P.W.M.; Boer, de B.; Leeuw, de D.M.

    2006-01-01

    A model describing charge transport in disordered ambipolar organic field-effect transistors is presented. The basis of this model is the variable-range hopping in an exponential density of states developed for disordered unipolar organic transistors. We show that the model can be used to calculate

  20. Field-effect pH Control in Nanochannels

    NARCIS (Netherlands)

    Veenhuis, R.B.H.; van der Wouden, E.J.; van Nieuwkasteele, Jan William; van den Berg, Albert; Eijkel, Jan C.T.; Kim, Tae Song; Lee, Yoon-Sik; Chung, Taek-Dong; Jeon, Noo Li; Lee, Sang-Hoon; Suh, Kaph-Yang; Choo, Jaebum; Kim, Yong-Kweon

    2009-01-01

    We demonstrate a novel capacitive method to change the pH in nanochannels. The device employs metal electrodes outside an insulating channel wall to change the electrical double layer potential by the field effect (‘voltage gating’). We demonstrate that this potential change is accompanied by a

  1. Electric-field effects in optically generated spin transport

    International Nuclear Information System (INIS)

    Miah, M. Idrish

    2009-01-01

    Transport of spin-polarized electrons in semiconductors is studied experimentally. Spins are generated by optical excitation because of the selection rules governing optical transitions from heavy-hole and light-hole states to conduction-band states. Experiments designed for the control of spins in semiconductors investigate the bias-dependent spin transport process and detect the spin-polarized electrons during transport. A strong bias dependence is observed. The electric-field effects on the spin-polarized electron transport are also found to be depended on the excitation photon energy and temperature. Based on a field-dependent spin relaxation mechanism, the electric-field effects in the transport process are discussed.

  2. Electric-field effects in optically generated spin transport

    Energy Technology Data Exchange (ETDEWEB)

    Miah, M. Idrish [Nanoscale Science and Technology Centre and School of Biomolecular and Physical Sciences, Griffith University, Nathan, Brisbane, QLD 4111 (Australia); Department of Physics, University of Chittagong, Chittagong 4331 (Bangladesh)], E-mail: m.miah@griffith.edu.au

    2009-05-25

    Transport of spin-polarized electrons in semiconductors is studied experimentally. Spins are generated by optical excitation because of the selection rules governing optical transitions from heavy-hole and light-hole states to conduction-band states. Experiments designed for the control of spins in semiconductors investigate the bias-dependent spin transport process and detect the spin-polarized electrons during transport. A strong bias dependence is observed. The electric-field effects on the spin-polarized electron transport are also found to be depended on the excitation photon energy and temperature. Based on a field-dependent spin relaxation mechanism, the electric-field effects in the transport process are discussed.

  3. Fringe field effects in small rings of large acceptance

    Directory of Open Access Journals (Sweden)

    Martin Berz

    2000-12-01

    Full Text Available Recently there has been renewed interest in the influence of fringe fields on particle dynamics, due to studies that revealed their importance in some cases, as, for example, the proposed Neutrino Factory and muon colliders. In this paper, we present a systematic study of generic fringe field effects. Using as an example a lattice of the proposed Neutrino Factory, we show that fringe fields influence the dynamics of particles at all orders, starting with the linear motion. It is found that the widely used sharp cutoff approximation leads to divergences regardless of the specific fall-off shape of the fields. The results suggest that a careful consideration of fringe field effects in the design stage of small machines for large emittances is always recommended.

  4. Field-effect transistor memories based on ferroelectric polymers

    Science.gov (United States)

    Zhang, Yujia; Wang, Haiyang; Zhang, Lei; Chen, Xiaomeng; Guo, Yu; Sun, Huabin; Li, Yun

    2017-11-01

    Field-effect transistors based on ferroelectrics have attracted intensive interests, because of their non-volatile data retention, rewritability, and non-destructive read-out. In particular, polymeric materials that possess ferroelectric properties are promising for the fabrications of memory devices with high performance, low cost, and large-area manufacturing, by virtue of their good solubility, low-temperature processability, and good chemical stability. In this review, we discuss the material characteristics of ferroelectric polymers, providing an update on the current development of ferroelectric field-effect transistors (Fe-FETs) in non-volatile memory applications. Program supported partially by the NSFC (Nos. 61574074, 61774080), NSFJS (No. BK20170075), and the Open Partnership Joint Projects of NSFC-JSPS Bilateral Joint Research Projects (No. 61511140098).

  5. Diffusion affected magnetic field effect in exciplex fluorescence

    International Nuclear Information System (INIS)

    Burshtein, Anatoly I.; Ivanov, Anatoly I.

    2014-01-01

    The fluorescence of the exciplex, 1 [D +δ A −δ ], formed at contact of photoexcited acceptor 1 A * with an electron donor 1 D, is known to be very sensitive to an external magnetic field, reducing the spin conversion efficiency in the resulting geminate radical ion pair, 1,3 [D + …A − ]. The relative increase of the exciplex fluorescence in the highest magnetic field compared to the lowest one, known as the magnetic field effect, crucially depends on the viscosity of the solvent. This phenomenon first studied experimentally is at first reproduced here theoretically. The magnetic field effect is shown to vanish in both limits of high and low solvent diffusivity reaching a maximum in between. It is also very sensitive to the solvent dielectric constant and to the exciplex and radical-ion pair conversion rates

  6. Diffusion affected magnetic field effect in exciplex fluorescence

    Energy Technology Data Exchange (ETDEWEB)

    Burshtein, Anatoly I. [Weizmann Institute of Science, Rehovot 76100 (Israel); Ivanov, Anatoly I., E-mail: Anatoly.Ivanov@volsu.ru [Volgograd State University, University Avenue, 100, Volgograd 400062 (Russian Federation)

    2014-07-14

    The fluorescence of the exciplex, {sup 1}[D{sup +δ}A{sup −δ}], formed at contact of photoexcited acceptor {sup 1}A{sup *} with an electron donor {sup 1}D, is known to be very sensitive to an external magnetic field, reducing the spin conversion efficiency in the resulting geminate radical ion pair, {sup 1,3}[D{sup +}…A{sup −}]. The relative increase of the exciplex fluorescence in the highest magnetic field compared to the lowest one, known as the magnetic field effect, crucially depends on the viscosity of the solvent. This phenomenon first studied experimentally is at first reproduced here theoretically. The magnetic field effect is shown to vanish in both limits of high and low solvent diffusivity reaching a maximum in between. It is also very sensitive to the solvent dielectric constant and to the exciplex and radical-ion pair conversion rates.

  7. Diffusion affected magnetic field effect in exciplex fluorescence

    Science.gov (United States)

    Burshtein, Anatoly I.; Ivanov, Anatoly I.

    2014-07-01

    The fluorescence of the exciplex, 1[D+δA-δ], formed at contact of photoexcited acceptor 1A* with an electron donor 1D, is known to be very sensitive to an external magnetic field, reducing the spin conversion efficiency in the resulting geminate radical ion pair, 1, 3[D+…A-]. The relative increase of the exciplex fluorescence in the highest magnetic field compared to the lowest one, known as the magnetic field effect, crucially depends on the viscosity of the solvent. This phenomenon first studied experimentally is at first reproduced here theoretically. The magnetic field effect is shown to vanish in both limits of high and low solvent diffusivity reaching a maximum in between. It is also very sensitive to the solvent dielectric constant and to the exciplex and radical-ion pair conversion rates.

  8. Magnetic Field Effect in Conjugated Molecules-Based Devices

    Science.gov (United States)

    2017-10-23

    line shapes of magnetoconductance curves for diodes of pentacene:fullerene charge transfer complexes” Org . Electron. 15, 3076 (2014). (AOARD-14-4012...2. “The origins in the transformation of ambipolar to n-type pentacene-based organic field-effect transistors” Org . Electron. 15, 1759 (2014...shell nanoparticles doped PEDOT:PSS hole-transporter. Org . Electron. : Phys. Mater. Appl. 33, 221-226 (2016). 5. Huang, X., Wang, K. Yi, C., Meng, T

  9. Intrinsic graphene field effect transistor on amorphous carbon films

    OpenAIRE

    Tinchev, Savcho

    2013-01-01

    Fabrication of graphene field effect transistor is described which uses an intrinsic graphene on the surface of as deposited hydrogenated amorphous carbon films. Ambipolar characteristic has been demonstrated typical for graphene devices, which changes to unipolar characteristic if the surface graphene was etched in oxygen plasma. Because amorphous carbon films can be growth easily, with unlimited dimensions and no transfer of graphene is necessary, this can open new perspective for graphene ...

  10. Experimental realization of a silicon spin field-effect transistor

    OpenAIRE

    Huang, Biqin; Monsma, Douwe J.; Appelbaum, Ian

    2007-01-01

    A longitudinal electric field is used to control the transit time (through an undoped silicon vertical channel) of spin-polarized electrons precessing in a perpendicular magnetic field. Since an applied voltage determines the final spin direction at the spin detector and hence the output collector current, this comprises a spin field-effect transistor. An improved hot-electron spin injector providing ~115% magnetocurrent, corresponding to at least ~38% electron current spin polarization after...

  11. New Materials for Gas Sensitive Field-Effect Device Studies

    OpenAIRE

    Salomonsson, Anette

    2005-01-01

    Gas sensor control is potentially one of the most important techniques of tomorrow for the environment. All over the world cars are preferred for transportation, and accordingly the number of cars increases, unfortunately, together with pollutants. Boilers and powerplants are other sources of pollutants to the environment. Metal-Insulator-Silicon Carbide (MISiC) Field-effect sensors in car applications and boilers have the potential to reduce the amount of pollutants. These devices are sensit...

  12. Graphene-based field-effect transistor biosensors

    Science.gov (United States)

    Chen; , Junhong; Mao, Shun; Lu, Ganhua

    2017-06-14

    The disclosure provides a field-effect transistor (FET)-based biosensor and uses thereof. In particular, to FET-based biosensors using thermally reduced graphene-based sheets as a conducting channel decorated with nanoparticle-biomolecule conjugates. The present disclosure also relates to FET-based biosensors using metal nitride/graphene hybrid sheets. The disclosure provides a method for detecting a target biomolecule in a sample using the FET-based biosensor described herein.

  13. Field effects and ictal synchronization: insights from in homine observations.

    Directory of Open Access Journals (Sweden)

    Shennan Aibel Weiss

    2013-12-01

    Full Text Available It has been well established in animal models that electrical fields generated during inter-ictal and ictal discharges are strong enough in intensity to influence action potential firing threshold and synchronization. We discuss recently published data from microelectrode array recordings of human neocortical seizures and what they imply about the possible role of field effects in neuronal synchronization. We have identified two distinct seizure territories that cannot be easily distinguished by traditional EEG analysis. The ictal core exhibits synchronized neuronal burst firing, while the surrounding ictal penumbra exhibits asynchronous and relatively sparse neuronal activity. In the ictal core large amplitude rhythmic ictal discharges produce large electric fields that correspond with relatively synchronous neuronal firing. In the penumbra rhythmic ictal discharges are smaller in amplitude, but large enough to influence spike timing, yet neuronal synchrony is not observed. These in homine observations are in accord with decades of animal studies supporting a role of field effects in neuronal synchronization during seizures, yet also highlight how field effects may be negated in the presence of strong synaptic inhibition in the penumbra.

  14. Ultrathin regioregular poly(3-hexyl thiophene) field-effect transistors

    DEFF Research Database (Denmark)

    Sandberg, H.G.O.; Frey, G.L.; Shkunov, M.N.

    2002-01-01

    Ultrathin films of regioregular poly(3-hexyl thiophene) (RR-P3HT) were deposited through a dip-coating technique and utilized as the semiconducting film in field-effect transistors (FETs). Proper selection of the substrate and solution concentration enabled the growth of a monolayer-thick RR-P3HT...... film. Atomic force microscopy (AFM), U-V-vis absorption spectroscopy, X-ray reflectivity, and grazing incidence diffraction were used to study the growth mechanism, thickness and orientation of self-organized monolayer thick RR-P3HT films on SiO2 surfaces. Films were found to adopt a Stranski......-Krastanov-type growth mode with formation of a very stable first monolayer. X-ray measurements show that the direction of pi-stacking in the films (the (010) direction) is parallel to the substrate, which is the preferred orientation for high field-effect carrier mobilities. The field-effect mobilities in all ultrathin...

  15. Organic field-effect transistors using single crystals

    International Nuclear Information System (INIS)

    Hasegawa, Tatsuo; Takeya, Jun

    2009-01-01

    Organic field-effect transistors using small-molecule organic single crystals are developed to investigate fundamental aspects of organic thin-film transistors that have been widely studied for possible future markets for 'plastic electronics'. In reviewing the physics and chemistry of single-crystal organic field-effect transistors (SC-OFETs), the nature of intrinsic charge dynamics is elucidated for the carriers induced at the single crystal surfaces of molecular semiconductors. Materials for SC-OFETs are first reviewed with descriptions of the fabrication methods and the field-effect characteristics. In particular, a benchmark carrier mobility of 20-40 cm 2 Vs -1 , achieved with thin platelets of rubrene single crystals, demonstrates the significance of the SC-OFETs and clarifies material limitations for organic devices. In the latter part of this review, we discuss the physics of microscopic charge transport by using SC-OFETs at metal/semiconductor contacts and along semiconductor/insulator interfaces. Most importantly, Hall effect and electron spin resonance (ESR) measurements reveal that interface charge transport in molecular semiconductors is properly described in terms of band transport and localization by charge traps. (topical review)

  16. Irradiation of graphene field effect transistors with highly charged ions

    Energy Technology Data Exchange (ETDEWEB)

    Ernst, P.; Kozubek, R.; Madauß, L.; Sonntag, J.; Lorke, A.; Schleberger, M., E-mail: marika.schleberger@uni-due.de

    2016-09-01

    In this work, graphene field-effect transistors are used to detect defects due to irradiation with slow, highly charged ions. In order to avoid contamination effects, a dedicated ultra-high vacuum set up has been designed and installed for the in situ cleaning and electrical characterization of graphene field-effect transistors during irradiation. To investigate the electrical and structural modifications of irradiated graphene field-effect transistors, their transfer characteristics as well as the corresponding Raman spectra are analyzed as a function of ion fluence for two different charge states. The irradiation experiments show a decreasing mobility with increasing fluences. The mobility reduction scales with the potential energy of the ions. In comparison to Raman spectroscopy, the transport properties of graphene show an extremely high sensitivity with respect to ion irradiation: a significant drop of the mobility is observed already at fluences below 15 ions/μm{sup 2}, which is more than one order of magnitude lower than what is required for Raman spectroscopy.

  17. Organic field-effect transistors using single crystals

    Directory of Open Access Journals (Sweden)

    Tatsuo Hasegawa and Jun Takeya

    2009-01-01

    Full Text Available Organic field-effect transistors using small-molecule organic single crystals are developed to investigate fundamental aspects of organic thin-film transistors that have been widely studied for possible future markets for 'plastic electronics'. In reviewing the physics and chemistry of single-crystal organic field-effect transistors (SC-OFETs, the nature of intrinsic charge dynamics is elucidated for the carriers induced at the single crystal surfaces of molecular semiconductors. Materials for SC-OFETs are first reviewed with descriptions of the fabrication methods and the field-effect characteristics. In particular, a benchmark carrier mobility of 20–40 cm2 Vs−1, achieved with thin platelets of rubrene single crystals, demonstrates the significance of the SC-OFETs and clarifies material limitations for organic devices. In the latter part of this review, we discuss the physics of microscopic charge transport by using SC-OFETs at metal/semiconductor contacts and along semiconductor/insulator interfaces. Most importantly, Hall effect and electron spin resonance (ESR measurements reveal that interface charge transport in molecular semiconductors is properly described in terms of band transport and localization by charge traps.

  18. Geminate free radical processes and magnetic field effects

    International Nuclear Information System (INIS)

    Eveson, Robert W.

    2000-01-01

    This thesis is concerned with the study of the dynamics of radical pair recombination reactions in solution by flash photolysis Electron Spin Resonance (ESR) and the influence of low static external magnetic fields upon them (MFE). An outline of the concepts of ESR is presented, followed by the theories of Chemically Induced Dynamic Electron Polarisation (CIDEP) of transient radical pairs. This is then followed by a brief review of the flash photolysis ESR apparatus and application of the Bloch equations to solve the equations of time-resolved ESR. Completing the theory section is an overview of the mechanisms by which magnetic fields alter the course of a geminate radical pair reaction in solution. Experimental CIDEP observations of the radical pair produced on photolysis of 1,3-dihydroxypropanone are simulated using polarisation theory and applied to a random-walk diffusion model to find, for the first time, the geminate reaction probability in solutions of varying viscosity. CIDEP spectra of the radical pair formed on photolysis of hydroxypropanone in contrast are not accounted for by current polarisation theory. The discrepancy is due to moderately fast relaxation of the acyl radical, CH 3 CO·, which alters the relative intensities in the ST 0 RPM pattern of the counter radical. Calculations taking into account this now provide an adequate basis for simulation of the spectrum. This method also, in principle, represents a new method for the measurement of phase relaxation times. Concluding the ESR work is a CIDEP study of 2,4,6-trimethylbenzoyl diphenylphosphine oxide. Unusual spin polarisation phenomena are found. The time-resolved optical absorption spectroscopy technique used for detecting low magnetic field effects on neutral radical pair reactions is described. Various improvements to the experiment are discussed which result in the observation of the low field effect for a neutral radical pair produced by Norrish type II chemistry. This is followed by an

  19. Integration of biomolecular logic gates with field-effect transducers

    Energy Technology Data Exchange (ETDEWEB)

    Poghossian, A., E-mail: a.poghossian@fz-juelich.de [Institute of Nano- and Biotechnologies, Aachen University of Applied Sciences, Campus Juelich, Heinrich-Mussmann-Str. 1, D-52428 Juelich (Germany); Institute of Bio- and Nanosystems, Research Centre Juelich GmbH, D-52425 Juelich (Germany); Malzahn, K. [Institute of Nano- and Biotechnologies, Aachen University of Applied Sciences, Campus Juelich, Heinrich-Mussmann-Str. 1, D-52428 Juelich (Germany); Abouzar, M.H. [Institute of Nano- and Biotechnologies, Aachen University of Applied Sciences, Campus Juelich, Heinrich-Mussmann-Str. 1, D-52428 Juelich (Germany); Institute of Bio- and Nanosystems, Research Centre Juelich GmbH, D-52425 Juelich (Germany); Mehndiratta, P. [Institute of Nano- and Biotechnologies, Aachen University of Applied Sciences, Campus Juelich, Heinrich-Mussmann-Str. 1, D-52428 Juelich (Germany); Katz, E. [Department of Chemistry and Biomolecular Science, NanoBio Laboratory (NABLAB), Clarkson University, Potsdam, NY 13699-5810 (United States); Schoening, M.J. [Institute of Nano- and Biotechnologies, Aachen University of Applied Sciences, Campus Juelich, Heinrich-Mussmann-Str. 1, D-52428 Juelich (Germany); Institute of Bio- and Nanosystems, Research Centre Juelich GmbH, D-52425 Juelich (Germany)

    2011-11-01

    Highlights: > Enzyme-based AND/OR logic gates are integrated with a capacitive field-effect sensor. > The AND/OR logic gates compose of multi-enzyme system immobilised on sensor surface. > Logic gates were activated by different combinations of chemical inputs (analytes). > The logic output (pH change) produced by the enzymes was read out by the sensor. - Abstract: The integration of biomolecular logic gates with field-effect devices - the basic element of conventional electronic logic gates and computing - is one of the most attractive and promising approaches for the transformation of biomolecular logic principles into macroscopically useable electrical output signals. In this work, capacitive field-effect EIS (electrolyte-insulator-semiconductor) sensors based on a p-Si-SiO{sub 2}-Ta{sub 2}O{sub 5} structure modified with a multi-enzyme membrane have been used for electronic transduction of biochemical signals processed by enzyme-based OR and AND logic gates. The realised OR logic gate composes of two enzymes (glucose oxidase and esterase) and was activated by ethyl butyrate or/and glucose. The AND logic gate composes of three enzymes (invertase, mutarotase and glucose oxidase) and was activated by two chemical input signals: sucrose and dissolved oxygen. The developed integrated enzyme logic gates produce local pH changes at the EIS sensor surface as a result of biochemical reactions activated by different combinations of chemical input signals, while the pH value of the bulk solution remains unchanged. The pH-induced charge changes at the gate-insulator (Ta{sub 2}O{sub 5}) surface of the EIS transducer result in an electronic signal corresponding to the logic output produced by the immobilised enzymes. The logic output signals have been read out by means of a constant-capacitance method.

  20. Integration of biomolecular logic gates with field-effect transducers

    International Nuclear Information System (INIS)

    Poghossian, A.; Malzahn, K.; Abouzar, M.H.; Mehndiratta, P.; Katz, E.; Schoening, M.J.

    2011-01-01

    Highlights: → Enzyme-based AND/OR logic gates are integrated with a capacitive field-effect sensor. → The AND/OR logic gates compose of multi-enzyme system immobilised on sensor surface. → Logic gates were activated by different combinations of chemical inputs (analytes). → The logic output (pH change) produced by the enzymes was read out by the sensor. - Abstract: The integration of biomolecular logic gates with field-effect devices - the basic element of conventional electronic logic gates and computing - is one of the most attractive and promising approaches for the transformation of biomolecular logic principles into macroscopically useable electrical output signals. In this work, capacitive field-effect EIS (electrolyte-insulator-semiconductor) sensors based on a p-Si-SiO 2 -Ta 2 O 5 structure modified with a multi-enzyme membrane have been used for electronic transduction of biochemical signals processed by enzyme-based OR and AND logic gates. The realised OR logic gate composes of two enzymes (glucose oxidase and esterase) and was activated by ethyl butyrate or/and glucose. The AND logic gate composes of three enzymes (invertase, mutarotase and glucose oxidase) and was activated by two chemical input signals: sucrose and dissolved oxygen. The developed integrated enzyme logic gates produce local pH changes at the EIS sensor surface as a result of biochemical reactions activated by different combinations of chemical input signals, while the pH value of the bulk solution remains unchanged. The pH-induced charge changes at the gate-insulator (Ta 2 O 5 ) surface of the EIS transducer result in an electronic signal corresponding to the logic output produced by the immobilised enzymes. The logic output signals have been read out by means of a constant-capacitance method.

  1. Depth of Field Effects for Interactive Direct Volume Rendering

    KAUST Repository

    Schott, Mathias; Pascal Grosset, A.V.; Martin, Tobias; Pegoraro, Vincent; Smith, Sean T.; Hansen, Charles D.

    2011-01-01

    In this paper, a method for interactive direct volume rendering is proposed for computing depth of field effects, which previously were shown to aid observers in depth and size perception of synthetically generated images. The presented technique extends those benefits to volume rendering visualizations of 3D scalar fields from CT/MRI scanners or numerical simulations. It is based on incremental filtering and as such does not depend on any precomputation, thus allowing interactive explorations of volumetric data sets via on-the-fly editing of the shading model parameters or (multi-dimensional) transfer functions. © 2011 The Author(s).

  2. Pauli Spin Blockade and the Ultrasmall Magnetic Field Effect

    KAUST Repository

    Danon, Jeroen

    2013-08-06

    Based on the spin-blockade model for organic magnetoresistance, we present an analytic expression for the polaron-bipolaron transition rate, taking into account the effective nuclear fields on the two sites. We reveal the physics behind the qualitatively different magnetoconductance line shapes observed in experiment, as well as the ultrasmall magnetic field effect (USFE). Since our findings agree in detail with recent experiments, they also indirectly provide support for the spin-blockade interpretation of organic magnetoresistance. In addition, we predict the existence of a similar USFE in semiconductor double quantum dots tuned to the spin-blockade regime.

  3. Uniformity of fully gravure printed organic field-effect transistors

    International Nuclear Information System (INIS)

    Hambsch, M.; Reuter, K.; Stanel, M.; Schmidt, G.; Kempa, H.; Fuegmann, U.; Hahn, U.; Huebler, A.C.

    2010-01-01

    Fully mass-printed organic field-effect transistors were made completely by means of gravure printing. Therefore a special printing layout was developed in order to avoid register problems in print direction. Upon using this layout, contact pads for source-drain electrodes of the transistors are printed together with the gate electrodes in one and the same printing run. More than 50,000 transistors have been produced and by random tests a yield of approximately 75% has been determined. The principle suitability of the gravure printed transistors for integrated circuits has been shown by the realization of ring oscillators.

  4. Local field effects and metamaterials based on colloidal quantum dots

    International Nuclear Information System (INIS)

    Porvatkina, O V; Tishchenko, A A; Strikhanov, M N

    2015-01-01

    Metamaterials are composite structures that exhibit interesting and unusual properties, e.g. negative refractive index. In this article we consider metamaterials based on colloidal quantum dots (CQDs). We investigate these structures taking into account the local field effects and theoretically analyze expressions for permittivity and permeability of metamaterials based on CdSe CQDs. We obtain inequality describing the conditions when material with definite concentration of CQDs is metamaterial. Also we investigate how the values of dielectric polarizability and magnetic polarizability of CQDs depend on the dots radius and properties the material the quantum dots are made of. (paper)

  5. Pauli Spin Blockade and the Ultrasmall Magnetic Field Effect

    KAUST Repository

    Danon, Jeroen; Wang, Xuhui; Manchon, Aurelien

    2013-01-01

    Based on the spin-blockade model for organic magnetoresistance, we present an analytic expression for the polaron-bipolaron transition rate, taking into account the effective nuclear fields on the two sites. We reveal the physics behind the qualitatively different magnetoconductance line shapes observed in experiment, as well as the ultrasmall magnetic field effect (USFE). Since our findings agree in detail with recent experiments, they also indirectly provide support for the spin-blockade interpretation of organic magnetoresistance. In addition, we predict the existence of a similar USFE in semiconductor double quantum dots tuned to the spin-blockade regime.

  6. Error correcting circuit design with carbon nanotube field effect transistors

    Science.gov (United States)

    Liu, Xiaoqiang; Cai, Li; Yang, Xiaokuo; Liu, Baojun; Liu, Zhongyong

    2018-03-01

    In this work, a parallel error correcting circuit based on (7, 4) Hamming code is designed and implemented with carbon nanotube field effect transistors, and its function is validated by simulation in HSpice with the Stanford model. A grouping method which is able to correct multiple bit errors in 16-bit and 32-bit application is proposed, and its error correction capability is analyzed. Performance of circuits implemented with CNTFETs and traditional MOSFETs respectively is also compared, and the former shows a 34.4% decrement of layout area and a 56.9% decrement of power consumption.

  7. Organic semiconductors for organic field-effect transistors

    International Nuclear Information System (INIS)

    Yamashita, Yoshiro

    2009-01-01

    The advantages of organic field-effect transistors (OFETs), such as low cost, flexibility and large-area fabrication, have recently attracted much attention due to their electronic applications. Practical transistors require high mobility, large on/off ratio, low threshold voltage and high stability. Development of new organic semiconductors is key to achieving these parameters. Recently, organic semiconductors have been synthesized showing comparable mobilities to amorphous-silicon-based FETs. These materials make OFETs more attractive and their applications have been attempted. New organic semiconductors resulting in high-performance FET devices are described here and the relationship between transistor characteristics and chemical structure is discussed. (topical review)

  8. Depth of Field Effects for Interactive Direct Volume Rendering

    KAUST Repository

    Schott, Mathias

    2011-06-01

    In this paper, a method for interactive direct volume rendering is proposed for computing depth of field effects, which previously were shown to aid observers in depth and size perception of synthetically generated images. The presented technique extends those benefits to volume rendering visualizations of 3D scalar fields from CT/MRI scanners or numerical simulations. It is based on incremental filtering and as such does not depend on any precomputation, thus allowing interactive explorations of volumetric data sets via on-the-fly editing of the shading model parameters or (multi-dimensional) transfer functions. © 2011 The Author(s).

  9. Magnetic field effect on indole exciplexes: an anomalous dielectric dependence

    International Nuclear Information System (INIS)

    Sengupta, Tamal; Basu, Samita

    2004-01-01

    Individual exciplex formation between various aromatic hydrocarbons, anthracene, pyrene, all-s-trans-1,4-diphenylbuta-1,3-diene and a heteroaromatic amine, 1,2-dimethylindole, was investigated by steady-state fluorescence and magnetic field effect (MFE). A comparative study was carried out with two other exciplex systems 9-cyanophenanthrene-1,2-dimethylindole and 9-cyanophenanthrene-N-methylindole. The extent of charge transfer and dielectric dependence of MFE reveals the potential role of specific interactions related to exciplex geometry

  10. Organic semiconductors for organic field-effect transistors

    Directory of Open Access Journals (Sweden)

    Yoshiro Yamashita

    2009-01-01

    Full Text Available The advantages of organic field-effect transistors (OFETs, such as low cost, flexibility and large-area fabrication, have recently attracted much attention due to their electronic applications. Practical transistors require high mobility, large on/off ratio, low threshold voltage and high stability. Development of new organic semiconductors is key to achieving these parameters. Recently, organic semiconductors have been synthesized showing comparable mobilities to amorphous-silicon-based FETs. These materials make OFETs more attractive and their applications have been attempted. New organic semiconductors resulting in high-performance FET devices are described here and the relationship between transistor characteristics and chemical structure is discussed.

  11. AlGaN/InGaN Nitride Based Modulation Doped Field Effect Transistor

    National Research Council Canada - National Science Library

    Blair, S

    2003-01-01

    The goal of the proposed work is to investigate the potential advantages of the InGaN channel as a host of the 2DEG and to address the material related problems facing this ternary alloy in the AlGaN...

  12. Field-effect enhanced triboelectric colloidal quantum dot flexible sensor

    Science.gov (United States)

    Meng, Lingju; Xu, Qiwei; Fan, Shicheng; Dick, Carson R.; Wang, Xihua

    2017-10-01

    Flexible electronics, which is of great importance as fundamental sensor and communication technologies for many internet-of-things applications, has established a huge market encroaching into the trillion-dollar market of solid state electronics. For the capability of being processed by printing or spraying, colloidal quantum dots (CQDs) play an increasingly important role in flexible electronics. Although the electrical properties of CQD thin-films are expected to be stable on flexible substrates, their electrical performance could be tuned for applications in flexible touch sensors. Here, we report CQD touch sensors employing polydimethylsiloxane (PDMS) triboelectric films. The electrical response of touching activity is enhanced by incorporating CQD field-effect transistors into the device architecture. Thanks to the use of the CQD thin film as a current amplifier, the field-effect CQD touch sensor shows a fast response to various touching materials, even being bent to a large curvature. It also shows a much higher output current density compared to a PDMS triboelectric touch sensor.

  13. Graphene field effect transistor without an energy gap.

    Science.gov (United States)

    Jang, Min Seok; Kim, Hyungjun; Son, Young-Woo; Atwater, Harry A; Goddard, William A

    2013-05-28

    Graphene is a room temperature ballistic electron conductor and also a very good thermal conductor. Thus, it has been regarded as an ideal material for postsilicon electronic applications. A major complication is that the relativistic massless electrons in pristine graphene exhibit unimpeded Klein tunneling penetration through gate potential barriers. Thus, previous efforts to realize a field effect transistor for logic applications have assumed that introduction of a band gap in graphene is a prerequisite. Unfortunately, extrinsic treatments designed to open a band gap seriously degrade device quality, yielding very low mobility and uncontrolled on/off current ratios. To solve this dilemma, we propose a gating mechanism that leads to a hundredfold enhancement in on/off transmittance ratio for normally incident electrons without any band gap engineering. Thus, our saw-shaped geometry gate potential (in place of the conventional bar-shaped geometry) leads to switching to an off state while retaining the ultrahigh electron mobility in the on state. In particular, we report that an on/off transmittance ratio of 130 is achievable for a sawtooth gate with a gate length of 80 nm. Our switching mechanism demonstrates that intrinsic graphene can be used in designing logic devices without serious alteration of the conventional field effect transistor architecture. This suggests a new variable for the optimization of the graphene-based device--geometry of the gate electrode.

  14. Gas Sensors Based on Semiconducting Nanowire Field-Effect Transistors

    Directory of Open Access Journals (Sweden)

    Ping Feng

    2014-09-01

    Full Text Available One-dimensional semiconductor nanostructures are unique sensing materials for the fabrication of gas sensors. In this article, gas sensors based on semiconducting nanowire field-effect transistors (FETs are comprehensively reviewed. Individual nanowires or nanowire network films are usually used as the active detecting channels. In these sensors, a third electrode, which serves as the gate, is used to tune the carrier concentration of the nanowires to realize better sensing performance, including sensitivity, selectivity and response time, etc. The FET parameters can be modulated by the presence of the target gases and their change relate closely to the type and concentration of the gas molecules. In addition, extra controls such as metal decoration, local heating and light irradiation can be combined with the gate electrode to tune the nanowire channel and realize more effective gas sensing. With the help of micro-fabrication techniques, these sensors can be integrated into smart systems. Finally, some challenges for the future investigation and application of nanowire field-effect gas sensors are discussed.

  15. Macroscopic local-field effects on photoabsorption processes

    International Nuclear Information System (INIS)

    Ma Xiaoguang; Gong Yubing; Wang Meishan; Wang Dehua

    2008-01-01

    The influence of the local-field effect on the photoabsorption cross sections of the atoms which are embedded in the macroscopic medium has been studied by a set of alternative expressions in detail. Some notes on the validity of some different local-field models used to study the photoabsorption cross sections of atoms in condensed matter have been given for the first time. Our results indicate that the local fields can have substantial and different influence on the photoabsorption cross section of atoms in condensed matter for different models. Clausius-Mossotti model and Onsager model have proved to be more reasonable to describe the local field in gas, liquid, or even some simple solid, while Glauber-Lewenstein model probably is wrong in these conditions except for the ideal gas. A procedure which can avoid the errors introduced by Kramers-Kronig transformation has been implemented in this work. This procedure can guarantee that the theoretical studies on the local field effects will not be influenced by the integral instability of the Kramers-Kronig transformation

  16. Recent Advance in Organic Spintronics and Magnetic Field Effect

    Science.gov (United States)

    Valy Vardeny, Z.

    2013-03-01

    In this talk several important advances in the field of Organic Spintronics and magnetic field effect (MFE) of organic films and optoelectronic devices that have occurred during the past two years from the Utah group will be surveyed and discussed. (i) Organic Spintronics: We demonstrated spin organic light emitting diode (spin-OLED) using two FM injecting electrodes, where the electroluminescence depends on the mutual orientation of the electrode magnetization directions. This development has opened up research studies into organic spin-valves (OSV) in the space-charge limited current regime. (ii) Magnetic field effect: We demonstrated that the photoinduced absorption spectrum in organic films (where current is not involved) show pronounced MFE. This unravels the underlying mechanism of the MFE in organic devices, to be more in agreement with the field of MFE in Biochemistry. (iii) Spin effects in organic optoelectronic devices: We demonstrated that certain spin 1/2 radical additives to donor-acceptor blends substantially enhance the power conversion efficiency of organic photovoltaic (OPV) solar cells. This effect shows that studies of spin response and MFE in OPV devices are promising. In collaboration with T. Nguyen, E. Ehrenfreund, B. Gautam, Y. Zhang and T. Basel. Supported by the DOE grant 04ER46109 ; NSF Grant # DMR-1104495 and MSF-MRSEC program DMR-1121252 [2,3].

  17. A tunable colloidal quantum dot photo field-effect transistor

    KAUST Repository

    Ghosh, Subir; Hoogland, Sjoerd; Sukhovatkin, Vlad; Levina, Larissa; Sargent, Edward H.

    2011-01-01

    We fabricate and investigate field-effect transistors in which a light-absorbing photogate modulates the flow of current along the channel. The photogate consists of colloidal quantum dots that efficiently transfer photoelectrons to the channel across a charge-separating (type-II) heterointerface, producing a primary and sustained secondary flow that is terminated via electron back-recombination across the interface. We explore colloidal quantum dot sizes corresponding to bandgaps ranging from 730 to 1475 nm and also investigate various stoichiometries of aluminum-doped ZnO (AZO) channel materials. We investigate the role of trap state energies in both the colloidal quantum dot energy film and the AZO channel. © 2011 American Institute of Physics.

  18. Two dimensional analytical model for a reconfigurable field effect transistor

    Science.gov (United States)

    Ranjith, R.; Jayachandran, Remya; Suja, K. J.; Komaragiri, Rama S.

    2018-02-01

    This paper presents two-dimensional potential and current models for a reconfigurable field effect transistor (RFET). Two potential models which describe subthreshold and above-threshold channel potentials are developed by solving two-dimensional (2D) Poisson's equation. In the first potential model, 2D Poisson's equation is solved by considering constant/zero charge density in the channel region of the device to get the subthreshold potential characteristics. In the second model, accumulation charge density is considered to get above-threshold potential characteristics of the device. The proposed models are applicable for the device having lightly doped or intrinsic channel. While obtaining the mathematical model, whole body area is divided into two regions: gated region and un-gated region. The analytical models are compared with technology computer-aided design (TCAD) simulation results and are in complete agreement for different lengths of the gated regions as well as at various supply voltage levels.

  19. Phosphorus oxide gate dielectric for black phosphorus field effect transistors

    Science.gov (United States)

    Dickerson, W.; Tayari, V.; Fakih, I.; Korinek, A.; Caporali, M.; Serrano-Ruiz, M.; Peruzzini, M.; Heun, S.; Botton, G. A.; Szkopek, T.

    2018-04-01

    The environmental stability of the layered semiconductor black phosphorus (bP) remains a challenge. Passivation of the bP surface with phosphorus oxide, POx, grown by a reactive ion etch with oxygen plasma is known to improve photoluminescence efficiency of exfoliated bP flakes. We apply phosphorus oxide passivation in the fabrication of bP field effect transistors using a gate stack consisting of a POx layer grown by reactive ion etching followed by atomic layer deposition of Al2O3. We observe room temperature top-gate mobilities of 115 cm2 V-1 s-1 in ambient conditions, which we attribute to the low defect density of the bP/POx interface.

  20. Highly air stable passivation of graphene based field effect devices.

    Science.gov (United States)

    Sagade, Abhay A; Neumaier, Daniel; Schall, Daniel; Otto, Martin; Pesquera, Amaia; Centeno, Alba; Elorza, Amaia Zurutuza; Kurz, Heinrich

    2015-02-28

    The sensitivity of graphene based devices to surface adsorbates and charge traps at the graphene/dielectric interface requires proper device passivation in order to operate them reproducibly under ambient conditions. Here we report on the use of atomic layer deposited aluminum oxide as passivation layer on graphene field effect devices (GFETs). We show that successful passivation produce hysteresis free DC characteristics, low doping level GFETs stable over weeks though operated and stored in ambient atmosphere. This is achieved by selecting proper seed layer prior to deposition of encapsulation layer. The passivated devices are also demonstrated to be robust towards the exposure to chemicals and heat treatments, typically used during device fabrication. Additionally, the passivation of high stability and reproducible characteristics is also shown for functional devices like integrated graphene based inverters.

  1. Graphene-graphite oxide field-effect transistors.

    Science.gov (United States)

    Standley, Brian; Mendez, Anthony; Schmidgall, Emma; Bockrath, Marc

    2012-03-14

    Graphene's high mobility and two-dimensional nature make it an attractive material for field-effect transistors. Previous efforts in this area have used bulk gate dielectric materials such as SiO(2) or HfO(2). In contrast, we have studied the use of an ultrathin layered material, graphene's insulating analogue, graphite oxide. We have fabricated transistors comprising single or bilayer graphene channels, graphite oxide gate insulators, and metal top-gates. The graphite oxide layers show relatively minimal leakage at room temperature. The breakdown electric field of graphite oxide was found to be comparable to SiO(2), typically ~1-3 × 10(8) V/m, while its dielectric constant is slightly higher, κ ≈ 4.3. © 2012 American Chemical Society

  2. Intrinsic noise in aggressively scaled field-effect transistors

    International Nuclear Information System (INIS)

    Albareda, G; Jiménez, D; Oriols, X

    2009-01-01

    According to roadmap projections, nanoscale field-effect transistors (FETs) with channel lengths below 30 nm and several gates (for improving their gate control over the source–drain conductance) will come to the market in the next few years. However, few studies deal with the noise performance of these aggressively scaled FETs. In this work, a study of the effect of the intrinsic (thermal and shot) noise of such FETs on the performance of an analog amplifier and a digital inverter is carried out by means of numerical simulations with a powerful Monte Carlo (quantum) simulator. The numerical data indicate important drawbacks in the noise performance of aggressively scaled FETs that could invalidate roadmap projections as regards analog and digital applications

  3. Field-effect Flow Control in Polymer Microchannel Networks

    Science.gov (United States)

    Sniadecki, Nathan; Lee, Cheng S.; Beamesderfer, Mike; DeVoe, Don L.

    2003-01-01

    A new Bio-MEMS electroosmotic flow (EOF) modulator for plastic microchannel networks has been developed. The EOF modulator uses field-effect flow control (FEFC) to adjust the zeta potential at the Parylene C microchannel wall. By setting a differential EOF pumping rate in two of the three microchannels at a T-intersection with EOF modulators, the induced pressure at the intersection generated pumping in the third, field-free microchannel. The EOF modulators are able to change the magnitude and direction of the pressure pumping by inducing either a negative or positive pressure at the intersection. The flow velocity is tracked by neutralized fluorescent microbeads in the microchannels. The proof-of-concept of the EOF modulator described here may be applied to complex plastic ,microchannel networks where individual microchannel flow rates are addressable by localized induced-pressure pumping.

  4. Near-field effects of asteroid impacts in deep water

    Energy Technology Data Exchange (ETDEWEB)

    Gisler, Galen R [Los Alamos National Laboratory; Weaver, Robert P [Los Alamos National Laboratory; Gittings, Michael L [Los Alamos National Laboratory

    2009-06-11

    Our previous work has shown that ocean impacts of asteroids below 500 m in diameter do not produce devastating long-distance tsunamis. Nevertheless, a significant portion of the ocean lies close enough to land that near-field effects may prove to be the greatest danger from asteroid impacts in the ocean. Crown splashes and central jets that rise up many kilometres into the atmosphere can produce, upon their collapse, highly non-linear breaking waves that could devastate shorelines within a hundred kilometres of the impact site. We present illustrative calculations, in two and three dimensions, of such impacts for a range of asteroid sizes and impact angles. We find that, as for land impacts, the greatest dangers from oceanic impacts are the short-term near-field, and long-term atmospheric effects.

  5. Field emission current from a junction field-effect transistor

    International Nuclear Information System (INIS)

    Monshipouri, Mahta; Abdi, Yaser

    2015-01-01

    Fabrication of a titanium dioxide/carbon nanotube (TiO 2 /CNT)-based transistor is reported. The transistor can be considered as a combination of a field emission transistor and a junction field-effect transistor. Using direct current plasma-enhanced chemical vapor deposition (DC-PECVD) technique, CNTs were grown on a p-typed (100)-oriented silicon substrate. The CNTs were then covered by TiO 2 nanoparticles 2–5 nm in size, using an atmospheric pressure CVD technique. In this device, TiO 2 /CNT junction is responsible for controlling the emission current. High on/off-current ratio and proper gate control are the most important advantages of device. A model based on Fowler–Nordheim equation is utilized for calculation of the emission current and the results are compared with experimental data. The effect of TiO 2 /CNT hetero-structure is also investigated, and well modeled

  6. Deep underground disposal of radioactive wastes: Near field effects

    International Nuclear Information System (INIS)

    1985-01-01

    This report reviews the important near-field effects of the disposal of wastes in deep rock formations. The basic characteristics of waste form, container and package, buffer and backfill materials and potential host-rock types are discussed from the perspective of the performance requirements of the total repository system. Effects of waste emplacement on the separate system components and on the system as a whole are discussed. The effects include interactions between groundwater and brines and the other system components, thermal and thermo-mechanical effects, and chemical and geochemical reactions. Special consideration is given to the radiation field that exists in proximity to the waste containers and also to the coupled effects of different phenomena

  7. Simulating realistic implementations of spin field effect transistor

    Science.gov (United States)

    Gao, Yunfei; Lundstrom, Mark S.; Nikonov, Dmitri E.

    2011-04-01

    The spin field effect transistor (spinFET), consisting of two ferromagnetic source/drain contacts and a Si channel, is predicted to have outstanding device and circuit performance. We carry out a rigorous numerical simulation of the spinFET based on the nonequilibrium Green's function formalism self-consistently coupled with a Poisson solver to produce the device I-V characteristics. Good agreement with the recent experiments in terms of spin injection, spin transport, and the magnetoresistance ratio (MR) is obtained. We include factors crucial for realistic devices: tunneling through a dielectric barrier, and spin relaxation at the interface and in the channel. Using these simulations, we suggest ways of optimizing the device. We propose that by choosing the right contact material and inserting tunnel oxide barriers between the source/drain and channel to filter different spins, the MR can be restored to ˜2000%, which would be beneficial to the reconfigurable logic circuit application.

  8. Recent progress in photoactive organic field-effect transistors.

    Science.gov (United States)

    Wakayama, Yutaka; Hayakawa, Ryoma; Seo, Hoon-Seok

    2014-04-01

    Recent progress in photoactive organic field-effect transistors (OFETs) is reviewed. Photoactive OFETs are divided into light-emitting (LE) and light-receiving (LR) OFETs. In the first part, LE-OFETs are reviewed from the viewpoint of the evolution of device structures. Device performances have improved in the last decade with the evolution of device structures from single-layer unipolar to multi-layer ambipolar transistors. In the second part, various kinds of LR-OFETs are featured. These are categorized according to their functionalities: phototransistors, non-volatile optical memories, and photochromism-based transistors. For both, various device configurations are introduced: thin-film based transistors for practical applications, single-crystalline transistors to investigate fundamental physics, nanowires, multi-layers, and vertical transistors based on new concepts.

  9. Theoretical study of phosphorene tunneling field effect transistors

    International Nuclear Information System (INIS)

    Chang, Jiwon; Hobbs, Chris

    2015-01-01

    In this work, device performances of tunneling field effect transistors (TFETs) based on phosphorene are explored via self-consistent atomistic quantum transport simulations. Phosphorene is an ultra-thin two-dimensional (2-D) material with a direct band gap suitable for TFETs applications. Our simulation shows that phosphorene TFETs exhibit subthreshold slope below 60 mV/dec and a wide range of on-current depending on the transport direction due to highly anisotropic band structures of phosphorene. By benchmarking with monolayer MoTe 2 TFETs, we predict that phosphorene TFETs oriented in the small effective mass direction can yield much larger on-current at the same on-current/off-current ratio than monolayer MoTe 2 TFETs. It is also observed that a gate underlap structure is required for scaling down phosphorene TFETs in the small effective mass direction to suppress the source-to-drain direct tunneling leakage current

  10. Theoretical study of phosphorene tunneling field effect transistors

    Energy Technology Data Exchange (ETDEWEB)

    Chang, Jiwon; Hobbs, Chris [SEMATECH, 257 Fuller Rd #2200, Albany, New York 12203 (United States)

    2015-02-23

    In this work, device performances of tunneling field effect transistors (TFETs) based on phosphorene are explored via self-consistent atomistic quantum transport simulations. Phosphorene is an ultra-thin two-dimensional (2-D) material with a direct band gap suitable for TFETs applications. Our simulation shows that phosphorene TFETs exhibit subthreshold slope below 60 mV/dec and a wide range of on-current depending on the transport direction due to highly anisotropic band structures of phosphorene. By benchmarking with monolayer MoTe{sub 2} TFETs, we predict that phosphorene TFETs oriented in the small effective mass direction can yield much larger on-current at the same on-current/off-current ratio than monolayer MoTe{sub 2} TFETs. It is also observed that a gate underlap structure is required for scaling down phosphorene TFETs in the small effective mass direction to suppress the source-to-drain direct tunneling leakage current.

  11. Strong crystal field effect in ? - optical absorption study

    Science.gov (United States)

    Gajek, Z.; Krupa, J. C.

    1998-12-01

    =-1 Results of optical absorption measurements in polarized light on tetravalent neptunium diluted in a 0953-8984/10/50/021/img6 single crystal are reported. The recorded spectra are complex, pointing to the presence of an 0953-8984/10/50/021/img7 impurity. The electronic transitions assigned to the 0953-8984/10/50/021/img8 ion are interpreted in terms of the usual model, following the actual understanding of the neptunium electronic structure and independent theoretical predictions. R.m.s. deviations of the order of 0953-8984/10/50/021/img9 have been obtained for 42 levels fitted with 11 free parameters. The crystal field effect resulting from the fitting is considerably larger than that observed for the uranium ion in the same host.

  12. Understanding noise suppression in heterojunction field-effect transistors

    International Nuclear Information System (INIS)

    Green, F.

    1996-01-01

    Full text: The enhanced transport properties displayed by quantum-well-confined, two-dimensional, electron systems underpin the success of heterojunction, field-effect transistors. At cryogenic temperatures, these devices exhibit impressive mobilities and, as a result, high signal gain and low noise. Conventional wisdom has it that the same favourable conditions also hold for normal room-temperature operation. In that case, however, high mobilities are precluded by abundant electron-phonon scattering. Our recent study of nonequilibrium current noise shows that quantum confinement, not high mobility, is the principal source of noise in these devices; this opens up new and exciting opportunities in low-noise transistor design. As trends in millimetre-wave technology push frequencies beyond 100 GHz, it is essential to develop a genuine understanding of noise processes in heterojunction devices

  13. Recent progress in photoactive organic field-effect transistors

    International Nuclear Information System (INIS)

    Wakayama, Yutaka; Hayakawa, Ryoma; Seo, Hoon-Seok

    2014-01-01

    Recent progress in photoactive organic field-effect transistors (OFETs) is reviewed. Photoactive OFETs are divided into light-emitting (LE) and light-receiving (LR) OFETs. In the first part, LE-OFETs are reviewed from the viewpoint of the evolution of device structures. Device performances have improved in the last decade with the evolution of device structures from single-layer unipolar to multi-layer ambipolar transistors. In the second part, various kinds of LR-OFETs are featured. These are categorized according to their functionalities: phototransistors, non-volatile optical memories, and photochromism-based transistors. For both, various device configurations are introduced: thin-film based transistors for practical applications, single-crystalline transistors to investigate fundamental physics, nanowires, multi-layers, and vertical transistors based on new concepts. (review)

  14. Vertically aligned carbon nanotube field-effect transistors

    KAUST Repository

    Li, Jingqi

    2012-10-01

    Vertically aligned carbon nanotube field-effect transistors (CNTFETs) have been developed using pure semiconducting carbon nanotubes. The source and drain were vertically stacked, separated by a dielectric, and the carbon nanotubes were placed on the sidewall of the stack to bridge the source and drain. Both the effective gate dielectric and gate electrode were normal to the substrate surface. The channel length is determined by the dielectric thickness between source and drain electrodes, making it easier to fabricate sub-micrometer transistors without using time-consuming electron beam lithography. The transistor area is much smaller than the planar CNTFET due to the vertical arrangement of source and drain and the reduced channel area. © 2012 Elsevier Ltd. All rights reserved.

  15. Biomolecular detection using a metal semiconductor field effect transistor

    Science.gov (United States)

    Estephan, Elias; Saab, Marie-Belle; Buzatu, Petre; Aulombard, Roger; Cuisinier, Frédéric J. G.; Gergely, Csilla; Cloitre, Thierry

    2010-04-01

    In this work, our attention was drawn towards developing affinity-based electrical biosensors, using a MESFET (Metal Semiconductor Field Effect Transistor). Semiconductor (SC) surfaces must be prepared before the incubations with biomolecules. The peptides route was adapted to exceed and bypass the limits revealed by other types of surface modification due to the unwanted unspecific interactions. As these peptides reveal specific recognition of materials, then controlled functionalization can be achieved. Peptides were produced by phage display technology using a library of M13 bacteriophage. After several rounds of bio-panning, the phages presenting affinities for GaAs SC were isolated; the DNA of these specific phages were sequenced, and the peptide with the highest affinity was synthesized and biotinylated. To explore the possibility of electrical detection, the MESFET fabricated with the GaAs SC were used to detect the streptavidin via the biotinylated peptide in the presence of the bovine Serum Albumin. After each surface modification step, the IDS (current between the drain and the source) of the transistor was measured and a decrease in the intensity was detected. Furthermore, fluorescent microscopy was used in order to prove the specificity of this peptide and the specific localisation of biomolecules. In conclusion, the feasibility of producing an electrical biosensor using a MESFET has been demonstrated. Controlled placement, specific localization and detection of biomolecules on a MESFET transistor were achieved without covering the drain and the source. This method of functionalization and detection can be of great utility for biosensing application opening a new way for developing bioFETs (Biomolecular Field-Effect Transistor).

  16. Observation of Deep Traps Responsible for Current Collapse in GaN Metal-Semiconductor Field-Effect Transistors

    National Research Council Canada - National Science Library

    Klein, P. B; Freitas, Jr., J. A; Binari, S. C; Wickenden, A. E

    1999-01-01

    ... of current collapse to determine the photoionization spectra of the traps involved. In the n-channel device investigated, the two electron traps observed were found to be very deep and strongly coupled to the lattice...

  17. Effect of 50 and 80 MeV phosphorous ions on the contribution of interface and oxide state density in n-channel MOSFETs

    Energy Technology Data Exchange (ETDEWEB)

    Shinde, N.S.; Dhole, S.D.; Kanjilal, D.; Bhoraskar, V.N. E-mail: vnb@physics.unipune.ernet.in

    1999-07-02

    n-channel depletion MOS devices were irradiated with 50 and 80 MeV phosphorous ions, with different fluences varying in the range from 10{sup 11} to 10{sup 13} ions/cm{sup 2}. The pre and post irradiation I-V characteristics were measured and the corresponding threshold shift {delta}V{sub TH} was estimated. In both the cases, the drain current I{sub D} and the threshold voltage V{sub TH} were found to decrease with the ion fluence. The increase in the threshold voltage shift {delta}V{sub TH} with the ion fluence, was greater for the devices irradiated with 80 MeV ions than those irradiated with 50 MeV ions. The interface and oxide state densities were determined through the subthreshold voltage measurements. To separate the contributions of oxide and interface states towards the threshold voltage shift, the ion irradiated MOS devices were annealed at 150 deg. C. The threshold shift during annealing initially decreased and later increased with increasing annealing period. The rate of change of the interface states during annealing was higher than that of the oxide states. It was also found that depletion mode (normally ON) MOSFETs switched operation to enhancement mode (normally OFF)

  18. A comparison of 4 MeV Proton and Co-60 gamma irradiation induced degradation in the electrical characteristics of N-channel MOSFETs

    Energy Technology Data Exchange (ETDEWEB)

    Anjum, Arshiya; Vinayakprasanna, N.H.; Pradeep, T.M. [Department of Studies in Physics, University of Mysore, Manasagangotri, Mysore 570006 (India); Pushpa, N. [Department of PG Studies in Physics, JSS College, Ooty Road, Mysore 570025 (India); Krishna, J.B.M. [IUC-DAE CSR, Kolkota 700098 (India); Gnana Prakash, A.P., E-mail: gnanaprakash@physics.uni-mysore.ac.in [Department of Studies in Physics, University of Mysore, Manasagangotri, Mysore 570006 (India)

    2016-07-15

    N-channel depletion MOSFETs were irradiated with 4 MeV Proton and Co-60 gamma radiation in the dose range of 100 krad(Si) to 100 Mrad(Si). The electrical characteristics of MOSFET such as threshold voltage (V{sub th}), density of interface trapped charges (ΔN{sub it}), density of oxide trapped charges (ΔN{sub ot}), transconductance (g{sub m}), mobility (μ), leakage current (I{sub L}) and drain saturation current (I{sub D} {sub Sat}) were studied as a function of dose. A considerable increase in ΔN{sub it} and ΔN{sub ot} and decrease in V{sub th,}g{sub m}, μ, and I{sub D} {sub Sat} was observed after irradiation. The results of 4 MeV Proton irradiation were compared with that of Co-60 gamma radiation and it is found that the degradation is more for the devices irradiated with 4 MeV Protons when compared with the Co-60 gamma radiation. This indicates that Protons induce more trapped charges in the field oxide region when compared to the gamma radiation.

  19. A ROIC for Mn(TPP)Cl-DOP-THF-Polyhema PVC membrane modified n-channel Si3N4 ISFET sensitive to histamine.

    Science.gov (United States)

    Samah, N L M A; Lee, Khuan Y; Sulaiman, S A; Jarmin, R

    2017-07-01

    Intolerance of histamine could lead to scombroid poisoning with fatal consequences. Current detection methods for histamine are wet laboratory techniques which employ expensive equipment that depends on skills of seasoned technicians and produces delayed test analysis result. Previous works from our group has established that ISFETs can be adapted for detecting histamine with the use of a novel membrane. However, work to integrate ISFETs with a readout interfacing circuit (ROIC) circuit to display the histamine concentration has not been reported so far. This paper concerns the development of a ROIC specifically to integrate with a Mn(TPP)Cl-DOP-THF-Polyhema PVC membrane modified n-channel Si3N4 ISFET to display the histamine concentration. It embodies the design of constant voltage constant current (CVCC) circuit, amplification circuit and micro-controller based display circuit. A DC millivolt source is used to substitute the membrane modified ISFET as preliminary work. Input is histamine concentration corresponding to the safety level designated by the Food and Drugs Administration (FDA). Results show the CVCC circuit makes the output follows the input and keeps VDS constant. The amplification circuit amplifies the output from the CVCC circuit to the range 2.406-4.888V to integrate with the microcontroller, which is programmed to classify and display the histamine safety level and its corresponding voltage on a LCD panel. The ROIC could be used to produce direct output voltages corresponding to histamine concentrations, for in-situ applications.

  20. Low Power and High Sensitivity MOSFET-Based Pressure Sensor

    International Nuclear Information System (INIS)

    Zhang Zhao-Hua; Ren Tian-Ling; Zhang Yan-Hong; Han Rui-Rui; Liu Li-Tian

    2012-01-01

    Based on the metal-oxide-semiconductor field effect transistor (MOSFET) stress sensitive phenomenon, a low power MOSFET pressure sensor is proposed. Compared with the traditional piezoresistive pressure sensor, the present pressure sensor displays high performances on sensitivity and power consumption. The sensitivity of the MOSFET sensor is raised by 87%, meanwhile the power consumption is decreased by 20%. (cross-disciplinary physics and related areas of science and technology)

  1. Development of optimized detector/spectrophotometer technology for low background space astronomy missions

    Science.gov (United States)

    Jones, B.

    1985-01-01

    This program was directed towards a better understanding of some of the important factors in the performance of infrared detector arrays at low background conditions appropriate for space astronomy. The arrays were manufactured by Aerojet Electrosystems Corporation, Azusa. Two arrays, both bismuth doped silicon, were investigated: an AMCID 32x32 Engineering mosiac Si:Bi accumulation mode charge injection device detector array and a metal oxide semiconductor/field effect transistor (MOS-FET) switched array of 16x32 pixels.

  2. Structural and Electrical Analysis of Various MOSFET Designs

    OpenAIRE

    Pallavi Choudhary; Tarun Kapoor

    2015-01-01

    Invention of Transistor is the foundation of electronics industry. Metal Oxide Semiconductor Field Effect Transistor (MOSFET) has been the key to the development of nano electronics technology. This paper offers a brief review of some of the most popular MOSFET structure designs. The scaling down of planar bulk MOSFET proposed by the Moore’s Law has been saturated due to short channel effects and DIBL. Due to this alternative approaches has been considered to overcome the problems...

  3. Investigations of Tunneling for Field Effect Transistors

    OpenAIRE

    Matheu, Peter

    2012-01-01

    Over 40 years of scaling dimensions for new and continuing product cycles has introduced new challenges for transistor design. As the end of the technology roadmap for semiconductors approaches, new device structures are being investigated as possible replacements for traditional metal-oxide-semiconductor field effect transistors (MOSFETs). Band-to-band tunneling (BTBT) in semiconductors, often viewed as an adverse effect of short channel lengths in MOSFETs, has been discussed as a promising ...

  4. Latest progress in gallium-oxide electronic devices

    Science.gov (United States)

    Higashiwaki, Masataka; Wong, Man Hoi; Konishi, Keita; Nakata, Yoshiaki; Lin, Chia-Hung; Kamimura, Takafumi; Ravikiran, Lingaparthi; Sasaki, Kohei; Goto, Ken; Takeyama, Akinori; Makino, Takahiro; Ohshima, Takeshi; Kuramata, Akito; Yamakoshi, Shigenobu; Murakami, Hisashi; Kumagai, Yoshinao

    2018-02-01

    Gallium oxide (Ga2O3) has emerged as a new competitor to SiC and GaN in the race toward next-generation power switching and harsh environment electronics by virtue of the excellent material properties and the relative ease of mass wafer production. In this proceedings paper, an overview of our recent development progress of Ga2O3 metal-oxide-semiconductor field-effect transistors and Schottky barrier diodes will be reported.

  5. Evaluation of SEGR threshold in power MOSFETs

    International Nuclear Information System (INIS)

    Allenspach, M.; Brews, J.R.; Mouret, I.; Schrimpf, R.D.; Galloway, K.F.

    1994-01-01

    Bias values, determined experimentally to result in single-event gate rupture (SEGR) in power metal oxide semiconductor field effect transistors (MOSFETs), are used in 2-D device simulations, incorporating the experimental geometry. The simulations indicate that very short time oxide field transients occur for ion strikes when V DS ≠ 0V. These transients can affect SEGR through hole trapping and redistribution in the oxide

  6. MOSFET Electric-Charge Sensor

    Science.gov (United States)

    Robinson, Paul A., Jr.

    1988-01-01

    Charged-particle probe compact and consumes little power. Proposed modification enables metal oxide/semiconductor field-effect transistor (MOSFET) to act as detector of static electric charges or energetic charged particles. Thickened gate insulation acts as control structure. During measurements metal gate allowed to "float" to potential of charge accumulated in insulation. Stack of modified MOSFET'S constitutes detector of energetic charged particles. Each gate "floats" to potential induced by charged-particle beam penetrating its layer.

  7. MOSFET and MOS capacitor responses to ionizing radiation

    Science.gov (United States)

    Benedetto, J. M.; Boesch, H. E., Jr.

    1984-01-01

    The ionizing radiation responses of metal oxide semiconductor (MOS) field-effect transistors (FETs) and MOS capacitors are compared. It is shown that the radiation-induced threshold voltage shift correlates closely with the shift in the MOS capacitor inversion voltage. The radiation-induced interface-state density of the MOSFETs and MOS capacitors was determined by several techniques. It is shown that the presence of 'slow' states can interfere with the interface-state measurements.

  8. SiC Optically Modulated Field-Effect Transistor

    Science.gov (United States)

    Tabib-Azar, Massood

    2009-01-01

    An optically modulated field-effect transistor (OFET) based on a silicon carbide junction field-effect transistor (JFET) is under study as, potentially, a prototype of devices that could be useful for detecting ultraviolet light. The SiC OFET is an experimental device that is one of several devices, including commercial and experimental photodiodes, that were initially evaluated as detectors of ultraviolet light from combustion and that could be incorporated into SiC integrated circuits to be designed to function as combustion sensors. The ultraviolet-detection sensitivity of the photodiodes was found to be less than desired, such that it would be necessary to process their outputs using high-gain amplification circuitry. On the other hand, in principle, the function of the OFET could be characterized as a combination of detection and amplification. In effect, its sensitivity could be considerably greater than that of a photodiode, such that the need for amplification external to the photodetector could be reduced or eliminated. The experimental SiC OFET was made by processes similar to JFET-fabrication processes developed at Glenn Research Center. The gate of the OFET is very long, wide, and thin, relative to the gates of typical prior SiC JFETs. Unlike in prior SiC FETs, the gate is almost completely transparent to near-ultraviolet and visible light. More specifically: The OFET includes a p+ gate layer less than 1/4 m thick, through which photons can be transported efficiently to the p+/p body interface. The gate is relatively long and wide (about 0.5 by 0.5 mm), such that holes generated at the body interface form a depletion layer that modulates the conductivity of the channel between the drain and the source. The exact physical mechanism of modulation of conductivity is a subject of continuing research. It is known that injection of minority charge carriers (in this case, holes) at the interface exerts a strong effect on the channel, resulting in amplification

  9. Tunnel field-effect transistor with two gated intrinsic regions

    Directory of Open Access Journals (Sweden)

    Y. Zhang

    2014-07-01

    Full Text Available In this paper, we propose and validate (using simulations a novel design of silicon tunnel field-effect transistor (TFET, based on a reverse-biased p+-p-n-n+ structure. 2D device simulation results show that our devices have significant improvements of switching performance compared with more conventional devices based on p-i-n structure. With independent gate voltages applied to two gated intrinsic regions, band-to-band tunneling (BTBT could take place at the p-n junction, and no abrupt degenerate doping profile is required. We developed single-side-gate (SSG structure and double-side-gate (DSG structure. SSG devices with HfO2 gate dielectric have a point subthreshold swing of 9.58 mV/decade, while DSG devices with polysilicon gate electrode material and HfO2 gate dielectric have a point subthreshold swing of 16.39 mV/decade. These DSG devices have ON-current of 0.255 μA/μm, while that is lower for SSG devices. Having two nano-scale independent gates will be quite challenging to realize with good uniformity across the wafer and the improved behavior of our TFET makes it a promising steep-slope switch candidate for further investigations.

  10. Graphene field-effect transistor application for flow sensing

    Directory of Open Access Journals (Sweden)

    Łuszczek Maciej

    2017-01-01

    Full Text Available Microflow sensors offer great potential for applications in microfluidics and lab-on-a-chip systems. However, thermal-based sensors, which are commonly used in modern flow sensing technology, are mainly made of materials with positive temperature coefficients (PTC and suffer from a self-heating effect and slow response time. Therefore, the design of novel devices and careful selection of materials are required to improve the overall flow sensor performance. In this work we propose graphene field-effect transistor (GFET to be used as microflow sensor. Temperature distribution in graphene channel was simulated and the analysis of heat convection was performed to establish the relation between the fluidic flow velocity and the temperature gradient. It was shown that the negative temperature coefficient (NTC of graphene could enable the self-protection of the device and should minimize sensing error from currentinduced heating. It was also argued that the planar design of the GFET sensor makes it suitable for the real application due to supposed mechanical stability of such a construction.

  11. Fin field effect transistor directionality impacts printing of implantation shapes

    Science.gov (United States)

    Wang, Xiren; Granik, Yuri

    2018-01-01

    In modern integrated circuit (IC) fabrication processes, the photoresist receives considerable illumination energy that is reflected by underlying topography during optical lithography of implantation layers. Bottom antireflective coating (BARC) is helpful to mitigate the reflection. Often, however, BARC is not used, because its removal is technically challenging, in addition to its relatively high economic cost. Furthermore, the advanced technology nodes, such as 14/10-nm nodes, have introduced fin field effect transistor (FinFET), which makes reflection from nonuniform silicon substrates exceptionally complicated. Therefore, modeling reflection from topography becomes obligatory to accurately predict printing of implantation shapes. Typically, FinFET is always fixed in one direction in realistic designs. However, the same implantation rectangle may be oriented in either horizontal or vertical direction. Then, there are two types of relations between the critical dimension (CD) and FinFET, namely a parallel-to and a perpendicular-to relation. We examine the fin directionality impact on CD. We found that this impact may be considerable in some cases. We use our in-house rigorous optical topography simulator to reveal underlining physical reasons. One of the major causes of the CD differences is that in the parallel orientation, the solid sidewalls of the fins conduct considerable light reflections unlike for the perpendicular orientation. This finding can aid the compact modeling in optical proximity correction of implantation masks.

  12. Cylindrical Field Effect Transistor: A Full Volume Inversion Device

    KAUST Repository

    Fahad, Hossain M.

    2010-12-01

    The increasing demand for high performance as well as low standby power devices has been the main reason for the aggressive scaling of conventional CMOS transistors. Current devices are at the 32nm technology node. However, due to physical limitations as well as increase in short-channel effects, leakage, power dissipation, this scaling trend cannot continue and will eventually hit a barrier. In order to overcome this, alternate device topologies have to be considered altogether. Extensive research on ultra thin body double gate FETs and gate all around nanowire FETs has shown a lot of promise. Under strong inversion, these devices have demonstrated increased performance over their bulk counterparts. This is mainly attributed to full carrier inversion in the body. However, these devices are still limited by lithographic and processing challenges making them unsuitable for commercial production. This thesis explores a unique device structure called the CFET (Cylindrical Field Effect Transistors) which also like the above, relies on complete inversion of carriers in the body/bulk. Using dual gates; an outer and an inner gate, full-volume inversion is possible with benefits such as enhanced drive currents, high Ion/Ioff ratios and reduced short channel effects.

  13. Graphene Channel Liquid Container Field Effect Transistor as ph Sensor

    International Nuclear Information System (INIS)

    Li, X.; Shi, J.; Pang, J.; Liu, W.; Wang, X.; Liu, H.

    2014-01-01

    Graphene channel liquid container field effect transistor ph sensor with interdigital micro trench for liquid ion testing is presented. Growth morphology and ph sensing property of continuous few-layer graphene (FLG) and quasi-continuous monolayer graphene (MG) channels are compared. The experiment results show that the source-to-drain current of the graphene channel FET has a significant and fast response after adsorption of the measured molecule and ion at the room temperature; at the same time, the FLG response time is less than 4 s. The resolution of MG (0.01) on ph value is one order of magnitude higher than that of FLG (0.1). The reason is that with fewer defects, the MG is more likely to adsorb measured molecule and ion, and the molecules and ions can make the transport property change. The output sensitivities of MG are from 34.5% to 57.4% when the ph value is between 7 and 8, while sensitivity of FLG is 4.75% when the Ph=6. The sensor fabrication combines traditional silicon technique and flexible electronic technology and provides an easy way to develop graphene-based electrolyte gas sensor or even biological sensors.

  14. Field emission current from a junction field-effect transistor

    Energy Technology Data Exchange (ETDEWEB)

    Monshipouri, Mahta; Abdi, Yaser, E-mail: y.abdi@ut.ac.ir [University of Tehran, Nano-Physics Research Laboratory, Department of Physics (Iran, Islamic Republic of)

    2015-04-15

    Fabrication of a titanium dioxide/carbon nanotube (TiO{sub 2}/CNT)-based transistor is reported. The transistor can be considered as a combination of a field emission transistor and a junction field-effect transistor. Using direct current plasma-enhanced chemical vapor deposition (DC-PECVD) technique, CNTs were grown on a p-typed (100)-oriented silicon substrate. The CNTs were then covered by TiO{sub 2} nanoparticles 2–5 nm in size, using an atmospheric pressure CVD technique. In this device, TiO{sub 2}/CNT junction is responsible for controlling the emission current. High on/off-current ratio and proper gate control are the most important advantages of device. A model based on Fowler–Nordheim equation is utilized for calculation of the emission current and the results are compared with experimental data. The effect of TiO{sub 2}/CNT hetero-structure is also investigated, and well modeled.

  15. RNA Detection Based on Graphene Field-Effect Transistor Biosensor

    Directory of Open Access Journals (Sweden)

    Meng Tian

    2018-01-01

    Full Text Available Graphene has attracted much attention in biosensing applications due to its unique properties. In this paper, the monolayer graphene was grown by chemical vapor deposition (CVD method. Using the graphene as the electric channel, we have fabricated a graphene field-effect transistor (G-FET biosensor that can be used for label-free detection of RNA. Compared with conventional method, the G-FET RNA biosensor can be run in low cost, be time-saving, and be miniaturized for RNA measurement. The sensors show high performance and achieve the RNA detection sensitivity as low as 0.1 fM, which is two orders of magnitude lower than the previously reports. Moreover, the G-FET biosensor can readily distinguish target RNA from noncomplementary RNA, showing high selectivity for RNA detection. The developed G-FET RNA biosensor with high sensitivity, fast analysis speed, and simple operation may provide a new feasible direction for RNA research and biosensing.

  16. Ballistic Spin Field Effect Transistor Based on Silicon Nanowires

    Science.gov (United States)

    Osintsev, Dmitri; Sverdlov, Viktor; Stanojevic, Zlatan; Selberherr, Siegfried

    2011-03-01

    We investigate the properties of ballistic spin field-effect transistors build on silicon nanowires. An accurate description of the conduction band based on the k . p} model is necessary in thin and narrow silicon nanostructures. The subband effective mass and subband splitting dependence on the nanowire dimensions is analyzed and used in the transport calculations. The spin transistor is formed by sandwiching the nanowire between two ferromagnetic metallic contacts. Delta-function barriers at the interfaces between the contacts and the silicon channel are introduced. The major contribution to the electric field-dependent spin-orbit interaction in confined silicon systems is due to the interface-induced inversion asymmetry which is of the Dresselhaus type. We study the current and conductance through the system for the contacts being in parallel and anti-parallel configurations. Differences between the [100] and [110] orientated structures are investigated in details. This work is supported by the European Research Council through the grant #247056 MOSILSPIN.

  17. Intrinsic Charge Transport in Organic Field-Effect Transistors

    Science.gov (United States)

    Podzorov, Vitaly

    2005-03-01

    Organic field-effect transistors (OFETs) are essential components of modern electronics. Despite the rapid progress of organic electronics, understanding of fundamental aspects of the charge transport in organic devices is still lacking. Recently, the OFETs based on highly ordered organic crystals have been fabricated with innovative techniques that preserve the high quality of single-crystal organic surfaces. This technological progress facilitated the study of transport mechanisms in organic semiconductors [1-4]. It has been demonstrated that the intrinsic polaronic transport, not dominated by disorder, with a remarkably high mobility of ``holes'' μ = 20 cm^2/Vs can be achieved in these devices at room temperature [4]. The signatures of the intrinsic polaronic transport are the anisotropy of the carrier mobility and an increase of μ with cooling. These and other aspects of the charge transport in organic single-crystal FETs will be discussed. Co-authors are Etienne Menard, University of Illinois at Urbana Champaign; Valery Kiryukhin, Rutgers University; John Rogers, University of Illinois at Urbana Champaign; Michael Gershenson, Rutgers University. [1] V. Podzorov et al., Appl. Phys. Lett. 82, 1739 (2003); ibid. 83, 3504 (2003). [2] V. C. Sundar et al., Science 303, 1644 (2004). [3] R. W. I. de Boer et al., Phys. Stat. Sol. (a) 201, 1302 (2004). [4] V. Podzorov et al., Phys. Rev. Lett. 93, 086602 (2004).

  18. Ultrashort Channel Length Black Phosphorus Field-Effect Transistors.

    Science.gov (United States)

    Miao, Jinshui; Zhang, Suoming; Cai, Le; Scherr, Martin; Wang, Chuan

    2015-09-22

    This paper reports high-performance top-gated black phosphorus (BP) field-effect transistors with channel lengths down to 20 nm fabricated using a facile angle evaporation process. By controlling the evaporation angle, the channel length of the transistors can be reproducibly controlled to be anywhere between 20 and 70 nm. The as-fabricated 20 nm top-gated BP transistors exhibit respectable on-state current (174 μA/μm) and transconductance (70 μS/μm) at a VDS of 0.1 V. Due to the use of two-dimensional BP as the channel material, the transistors exhibit relatively small short channel effects, preserving a decent on-off current ratio of 10(2) even at an extremely small channel length of 20 nm. Additionally, unlike the unencapsulated BP devices, which are known to be chemically unstable in ambient conditions, the top-gated BP transistors passivated by the Al2O3 gate dielectric layer remain stable without noticeable degradation in device performance after being stored in ambient conditions for more than 1 week. This work demonstrates the great promise of atomically thin BP for applications in ultimately scaled transistors.

  19. Balanced Ambipolar Organic Field-Effect Transistors by Polymer Preaggregation.

    Science.gov (United States)

    Janasz, Lukasz; Luczak, Adam; Marszalek, Tomasz; Dupont, Bertrand G R; Jung, Jaroslaw; Ulanski, Jacek; Pisula, Wojciech

    2017-06-21

    Ambipolar organic field-effect transistors (OFETs) based on heterojunction active films still suffer from an imbalance in the transport of electrons and holes. This problem is related to an uncontrolled phase separation between the donor and acceptor organic semiconductors in the thin films. In this work, we have developed a concept to improve the phase separation in heterojunction transistors to enhance their ambipolar performance. This concept is based on preaggregation of the donor polymer, in this case poly(3-hexylthiophene) (P3HT), before solution mixing with the small-molecular-weight acceptor, phenyl-C61-butyric acid methyl ester (PCBM). The resulting heterojunction transistor morphology consists of self-assembled P3HT fibers embedded in a PCBM matrix, ensuring balanced mobilities reaching 0.01 cm 2 /V s for both holes and electrons. These are the highest mobility values reported so far for ambipolar OFETs based on P3HT/PCBM blends. Preaggregation of the conjugated polymer before fabricating binary blends can be regarded as a general concept for a wider range of semiconducting systems applicable in organic electronic devices.

  20. Electromechanical field effect transistors based on multilayer phosphorene nanoribbons

    Energy Technology Data Exchange (ETDEWEB)

    Jiang, Z.T., E-mail: jiangzhaotan@hotmail.com; Lv, Z.T.; Zhang, X.D.

    2017-06-21

    Based on the tight-binding Hamiltonian approach, we demonstrate that the electromechanical field effect transistors (FETs) can be realized by using the multilayer phosphorene nanoribbons (PNRs). The synergistic combination of the electric field and the external strains can establish the on–off switching since the electric field can shift or split the energy band, and the mechanical strains can widen or narrow the band widths. This kind of multilayer PNR FETs, much solider than the monolayer PNR one and more easily biased by different electric fields, has more transport channels consequently leading to the higher on–off current ratio or the higher sensitivity to the electric fields. Meanwhile, the strain-induced band-flattening will be beneficial for improving the flexibility in designing the electromechanical FETs. In addition, such electromechanical FETs can act as strain-controlled FETs or mechanical detectors for detecting the strains, indicating their potential applications in nano- and micro-electromechanical fields. - Highlights: • Electromechanical transistors are designed with multilayer phosphorene nanoribbons. • Electromechanical synergistic effect can establish the on–off switching more flexibly. • Multilayer transistors, solider and more easily biased, has more transport channels. • Electromechanical transistors can act as strain-controlled transistors or mechanical detectors.

  1. STRONG FIELD EFFECTS ON PULSAR ARRIVAL TIMES: GENERAL ORIENTATIONS

    International Nuclear Information System (INIS)

    Wang Yan; Creighton, Teviet; Price, Richard H.; Jenet, Frederick A.

    2009-01-01

    A pulsar beam passing close to a black hole can provide a probe of very strong gravitational fields even if the pulsar itself is not in a strong field region. In the case that the spin of the hole can be ignored, we have previously shown that all strong field effects on the beam can be understood in terms of two 'universal' functions: F(φ in ) and T(φ in ) of the angle of beam emission φ in ; these functions are universal in that they depend only on a single parameter, the pulsar/black hole distance from which the beam is emitted. Here we apply this formalism to general pulsar-hole-observer geometries, with arbitrary alignment of the pulsar spin axis and arbitrary pulsar beam direction and angular width. We show that the analysis of the observational problem has two distinct elements: (1) the computation of the location and trajectory of an observer-dependent 'keyhole' direction of emission in which a signal can be received by the observer; and (2) the determination of an annulus that represents the set of directions containing beam energy. Examples of each are given along with an example of a specific observational scenario.

  2. Crystalline Organic Pigment-Based Field-Effect Transistors.

    Science.gov (United States)

    Zhang, Haichang; Deng, Ruonan; Wang, Jing; Li, Xiang; Chen, Yu-Ming; Liu, Kewei; Taubert, Clinton J; Cheng, Stephen Z D; Zhu, Yu

    2017-07-05

    Three conjugated pigment molecules with fused hydrogen bonds, 3,7-diphenylpyrrolo[2,3-f]indole-2,6(1H,5H)-dione (BDP), (E)-6,6'-dibromo-[3,3'-biindolinylidene]-2,2'-dione (IIDG), and 3,6-di(thiophen-2-yl)-2,5-dihydropyrrolo-[3,4-c]pyrrole-1,4-dione (TDPP), were studied in this work. The insoluble pigment molecules were functionalized with tert-butoxylcarbonyl (t-Boc) groups to form soluble pigment precursors (BDP-Boc, IIDG-Boc, and TDPP-Boc) with latent hydrogen bonding. The single crystals of soluble pigment precursors were obtained. Upon simple thermal annealing, the t-Boc groups were removed and the soluble pigment precursor molecules with latent hydrogen bonding were converted into the original pigment molecules with fused hydrogen bonding. Structural analysis indicated that the highly crystalline soluble precursors were directly converted into highly crystalline insoluble pigments, which are usually only achievable by gas-phase routes like physical vapor transport. The distinct crystal structure after the thermal annealing treatment suggests that fused hydrogen bonding is pivotal for the rearrangement of molecules to form a new crystal in solid state, which leads to over 2 orders of magnitude enhancement in charge mobility in organic field-effect transistor (OFET) devices. This work demonstrated that crystalline OFET devices with insoluble pigment molecules can be fabricated by their soluble precursors. The results indicated that a variety of commercially available conjugated pigments could be potential active materials for high-performance OFETs.

  3. Active pixel sensor with intra-pixel charge transfer

    Science.gov (United States)

    Fossum, Eric R. (Inventor); Mendis, Sunetra (Inventor); Kemeny, Sabrina E. (Inventor)

    2004-01-01

    An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node.

  4. Active pixel sensor having intra-pixel charge transfer with analog-to-digital converter

    Science.gov (United States)

    Fossum, Eric R. (Inventor); Mendis, Sunetra K. (Inventor); Pain, Bedabrata (Inventor); Nixon, Robert H. (Inventor); Zhou, Zhimin (Inventor)

    2003-01-01

    An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node and an analog-to-digital converter formed in the substrate connected to the output of the readout circuit.

  5. Multi-Dimensional Quantum Effect Simulation Using a Density-Gradient Model and Script-Level Programming Techniques

    Science.gov (United States)

    Rafferty, Connor S.; Biegel, Bryan A.; Yu, Zhi-Ping; Ancona, Mario G.; Bude, J.; Dutton, Robert W.; Saini, Subhash (Technical Monitor)

    1998-01-01

    A density-gradient (DG) model is used to calculate quantum-mechanical corrections to classical carrier transport in MOS (Metal Oxide Semiconductor) inversion/accumulation layers. The model is compared to measured data and to a fully self-consistent coupled Schrodinger and Poisson equation (SCSP) solver. Good agreement is demonstrated for MOS capacitors with gate oxide as thin as 21 A. It is then applied to study carrier distribution in ultra short MOSFETs (Metal Oxide Semiconductor Field Effect Transistor) with surface roughness. This work represents the first implementation of the DG formulation on multidimensional unstructured meshes. It was enabled by a powerful scripting approach which provides an easy-to-use and flexible framework for solving the fourth-order PDEs (Partial Differential Equation) of the DG model.

  6. Hysteresis in Lanthanide Aluminum Oxides Observed by Fast Pulse CV Measurement

    Directory of Open Access Journals (Sweden)

    Chun Zhao

    2014-10-01

    Full Text Available Oxide materials with large dielectric constants (so-called high-k dielectrics have attracted much attention due to their potential use as gate dielectrics in Metal Oxide Semiconductor Field Effect Transistors (MOSFETs. A novel characterization (pulse capacitance-voltage method was proposed in detail. The pulse capacitance-voltage technique was employed to characterize oxide traps of high-k dielectrics based on the Metal Oxide Semiconductor (MOS capacitor structure. The variation of flat-band voltages of the MOS structure was observed and discussed accordingly. Some interesting trapping/detrapping results related to the lanthanide aluminum oxide traps were identified for possible application in Flash memory technology. After understanding the trapping/detrapping mechanism of the high-k oxides, a solid foundation was prepared for further exploration into charge-trapping non-volatile memory in the future.

  7. Hybrid complementary circuits based on p-channel organic and n-channel metal oxide transistors with balanced carrier mobilities of up to 10 cm2/Vs

    KAUST Repository

    Isakov, Ivan

    2016-12-29

    We report the development of hybrid complementary inverters based on p-channel organic and n-channel metal oxide thin-film transistors (TFTs) both processed from solution at <200 °C. For the organic TFTs, a ternary blend consisting of the small-molecule 2,7-dioctyl[1]benzothieno[3,2-b][1]benzothiophene, the polymer indacenodithiophene-benzothiadiazole (CIDT-BT) and the p-type dopant CF was employed, whereas the isotype InO/ZnO heterojunction was used for the n-channel TFTs. When integrated on the same substrate, p- and n-channel devices exhibited balanced carrier mobilities up to 10 cm/Vs. Hybrid complementary inverters based on these devices show high signal gain (>30 V/V) and wide noise margins (70%). The moderate processing temperatures employed and the achieved level of device performance highlight the tremendous potential of the technology for application in the emerging sector of large-area microelectronics.

  8. Hybrid complementary circuits based on p-channel organic and n-channel metal oxide transistors with balanced carrier mobilities of up to 10 cm2/Vs

    KAUST Repository

    Isakov, Ivan; Paterson, Alexandra F.; Solomeshch, Olga; Tessler, Nir; Zhang, Qiang; Li, Jun; Zhang, Xixiang; Fei, Zhuping; Heeney, Martin; Anthopoulos, Thomas D.

    2016-01-01

    We report the development of hybrid complementary inverters based on p-channel organic and n-channel metal oxide thin-film transistors (TFTs) both processed from solution at <200 °C. For the organic TFTs, a ternary blend consisting of the small-molecule 2,7-dioctyl[1]benzothieno[3,2-b][1]benzothiophene, the polymer indacenodithiophene-benzothiadiazole (CIDT-BT) and the p-type dopant CF was employed, whereas the isotype InO/ZnO heterojunction was used for the n-channel TFTs. When integrated on the same substrate, p- and n-channel devices exhibited balanced carrier mobilities up to 10 cm/Vs. Hybrid complementary inverters based on these devices show high signal gain (>30 V/V) and wide noise margins (70%). The moderate processing temperatures employed and the achieved level of device performance highlight the tremendous potential of the technology for application in the emerging sector of large-area microelectronics.

  9. DIRECT TUNNELLING AND MOSFET BORDER TRAPS

    Directory of Open Access Journals (Sweden)

    Vladimir Drach

    2015-09-01

    Full Text Available The border traps, in particular slow border traps, are being investigated in metal-oxide-semiconductor structures, utilizing n-channel MOSFET as a test sample. The industrial process technology of test samples manufacturing is described. The automated experimental setup is discussed, the implementation of the experimental setup had made it possible to complete the entire set of measurements. The schematic diagram of automated experimental setup is shown. The charging time characteristic of the ID-VG shift reveals that the charging process is a direct tunnelling process and highly bias dependent.

  10. Generation of uniaxial tensile strain of over 1% on a Ge substrate for short-channel strained Ge n-type Metal–Insulator–Semiconductor Field-Effect Transistors with SiGe stressors

    International Nuclear Information System (INIS)

    Moriyama, Yoshihiko; Kamimuta, Yuuichi; Ikeda, Keiji; Tezuka, Tsutomu

    2012-01-01

    Tensile strain of over 1% in Ge stripes sandwiched between a pair of SiGe source-drain stressors was demonstrated. The Metal–Oxide–Semiconductor Field-Effect Transistor (MOSFET)-like structures were fabricated on a (001)-Ge substrate having SiO 2 dummy-gate stripes with widths down to 26 nm. Recess-regions adjacent to the dummy-gate stripes were formed by an anisotropic wet etching technique. A damage-free and well-controlled anisotropic wet etching process is developed in order to avoid plasma-induced damage during a conventional Reactive-ion Etching process. The SiGe stressors were epitaxially grown on the recesses to simulate strained Ge n-channel Metal–Insulator–Semiconductor Field-Effect Transistors (MISFETs) having high electron mobility. A micro-Raman spectroscopy measurement revealed tensile strain in the narrow Ge regions which became higher for narrower regions. Tensile strain of up to 1.2% was evaluated from the measurement under an assumption of uniaxial strain configuration. These results strongly suggest that higher electron mobility than the upper limit for a Si-MOSFET is obtainable in short-channel strained Ge-nMISFETs with the embedded SiGe stressors.

  11. Light Scattering Studies of Organic Field Effect Transistors

    Science.gov (United States)

    Adil, Danish

    Organic semiconductors hold a great promise of enabling new technology based on low cost and flexible electronic devices. While much work has been done in the field of organic semiconductors, the field is still quite immature when compared to that of traditional inorganic based devices. More work is required before the full potential of organic field effect transistors (OFETs), organic light emitting diodes (OLEDs), and organic photovoltaics (OPVs) is realized. Among such work, a further development of diagnostic tools that characterize charge transport and device robustness more efficiently is required. Charge transport in organic semiconductors is limited by the nature of the metal-semiconductor interfaces where charge is injected into the semiconductor film and the semiconductor-dielectric interface where the charge is accumulated and transported. This, combined with that fact that organic semiconductors are especially susceptible to having structural defects induced via oxidation, charge transport induced damage, and metallization results in a situation where a semiconductor film's ability to conduct charge can degrade over time. This degradation manifests itself in the electrical device characteristics of organic based electronic devices. OFETs, for example, may display changes in threshold voltage, lowering of charge carrier mobilities, or a decrease in the On/Off ratio. All these effects sum together to result in degradation in device performance. The work begins with a study where matrix assisted pulsed laser deposition (MAPLE), an alternative organic semiconductor thin film deposition method, is used to fabricate OFETs with improved semiconductor-dielectric interfaces. MAPLE allows for the controlled layer-by-layer growth of the semiconductor film. Devices fabricated using this technique are shown to exhibit desirable characteristics that are otherwise only achievable with additional surface treatments. MAPLE is shown to be viable alternative to other

  12. Nanowire field-effect transistors for gas sensor applications

    Science.gov (United States)

    Constantinou, Marios

    Sensing BTEX (Benzene, Ethylbenzene, Toluene, Xylene) pollutants is of utmost importance to reduce health risk and ensure public safety. The lack of sensitivity and selectivity of the current gas sensors and the limited number of available technologies in the field of BTEX-sensing raises the demand for the development of high-performance gas sensors for BTEX applications. The scope of this thesis is the fabrication and characterisation of high-quality field-effect transistors (FETs), with functionalised silicon nanowires (SiNWs), for the selective sensing of benzene vs. other BTEX gases. This research addresses three main challenges in SiNW FET-sensor device development: i) controllable and reproducible assembly of high-quality SiNWs for FET sensor devices using the method of dielectrophoresis (DEP), ii) almost complete elimination of harmful hysteresis effect in the SiNW FET current-voltage characteristics induced by surface states using DMF solvent, iii) selective sensing of benzene with up to ppb range of sensitivity using calix[4]arene-derivatives. It is experimentally demonstrated that frequency-controlled DEP is a powerful tool for the selection and collection of semiconducting SiNWs with advanced electrical and morphological properties, from a poly-disperse as-synthesised NWs. The DEP assembly method also leads to a controllable and reproducible fabrication of high-quality NW-based FETs. The results highlight the superiority of DEP, performed at high signal frequencies (5-20 MHz) to selectively assemble only high-quality NWs which can respond to such high DEP frequencies. The SiNW FETs, with NWs collected at high DEP frequencies, have high mobility (≈50 cm2 V-1 s-1), low sub-threshold-swing (≈1.26 V/decade), high on-current (up to 3 mA) and high on/off ratio (106-107). The DEP NW selection is also demonstrated using an industrially scalable method, to allow establishing of NW response characteristics to different DEP frequencies in a very short time

  13. Use of water vapor for suppressing the growth of unstable low-{kappa} interlayer in HfTiO gate-dielectric Ge metal-oxide-semiconductor capacitors with sub-nanometer capacitance equivalent thickness

    Energy Technology Data Exchange (ETDEWEB)

    Xu, J.P. [Department of Electronic Science and Technology, Huazhong University of Science and Technology, Wuhan, 430074 (China); Zou, X. [School of Electromachine and Architecture Engineering, Jianghan University, Wuhan, 430056 (China); Lai, P.T. [Department of Electrical and Electronic Engineering, University of Hong Kong, Pokfulam Road (Hong Kong)], E-mail: laip@eee.hku.hk; Li, C.X.; Chan, C.L. [Department of Electrical and Electronic Engineering, University of Hong Kong, Pokfulam Road (Hong Kong)

    2009-03-02

    Annealing of high-permittivity HfTiO gate dielectric on Ge substrate in different gases (N{sub 2}, NH{sub 3}, NO and N{sub 2}O) with or without water vapor is investigated. Analysis by transmission electron microscopy indicates that the four wet anneals can greatly suppress the growth of a GeO{sub x} interlayer at the dielectric/Ge interface, and thus decrease interface states, oxide charges and gate leakage current. Moreover, compared with the wet N{sub 2} anneal, the wet NH{sub 3}, NO and N{sub 2}O anneals decrease the equivalent permittivity of the gate dielectric due to the growth of a GeO{sub x}N{sub y} interlayer. Among the eight anneals, the wet N{sub 2} anneal produces the best dielectric performance with an equivalent relative permittivity of 35, capacitance equivalent thickness of 0.81 nm, interface-state density of 6.4 x 10{sup 11} eV{sup -1} cm{sup -2} and gate leakage current of 2.7 x 10{sup -4} A/cm{sup 2} at V{sub g} = 1 V.

  14. Use of water vapor for suppressing the growth of unstable low-κ interlayer in HfTiO gate-dielectric Ge metal-oxide-semiconductor capacitors with sub-nanometer capacitance equivalent thickness

    International Nuclear Information System (INIS)

    Xu, J.P.; Zou, X.; Lai, P.T.; Li, C.X.; Chan, C.L.

    2009-01-01

    Annealing of high-permittivity HfTiO gate dielectric on Ge substrate in different gases (N 2 , NH 3 , NO and N 2 O) with or without water vapor is investigated. Analysis by transmission electron microscopy indicates that the four wet anneals can greatly suppress the growth of a GeO x interlayer at the dielectric/Ge interface, and thus decrease interface states, oxide charges and gate leakage current. Moreover, compared with the wet N 2 anneal, the wet NH 3 , NO and N 2 O anneals decrease the equivalent permittivity of the gate dielectric due to the growth of a GeO x N y interlayer. Among the eight anneals, the wet N 2 anneal produces the best dielectric performance with an equivalent relative permittivity of 35, capacitance equivalent thickness of 0.81 nm, interface-state density of 6.4 x 10 11 eV -1 cm -2 and gate leakage current of 2.7 x 10 -4 A/cm 2 at V g = 1 V

  15. Passivation of defect states in Si and Si/SiO2 interface states by cyanide treatment: improvement of characteristics of pin-junction amorphous Si and crystalline Si-based metal-oxide-semiconductor junction solar cells

    International Nuclear Information System (INIS)

    Fujiwara, N.; Fujinaga, T.; Niinobe, D.; Maida, O.; Takahashi, M.; Kobayashi, H.

    2003-01-01

    Defect states in Si can be passivated by cyanide treatment which simply involves immersion of Si materials in KCN solutions, followed by rinse. When the cyanide treatment is applied to pin-junction amorphous Si [a-Si] solar cells, the initial conversion efficiency increases. When the crown-ether cyanide treatment using a KCN solution of xylene containing 18-crown-6 is performed on i-a-Si films, decreases in the photo- and dark current densities with the irradiation time are prevented. The cyanide treatment can also passivate interface states present at Si/SiO 2 interfaces, leading to an increase in the conversion efficiency of 2 / Si (100)> solar cells.. Si-CN bonds formed by the reaction of defect states with cyanide ions have a high bond energy of about 4.5 eV and hence heat treatment at 800 0 C does not rupture the bonds, making thermal stability of the cyanide treatment.. When the cyanide treatment is applied to ultrathin SiO 2 /Si structure, the leakage current density is markedly decreased (Authors)

  16. Research of the voltage and current stabilization processes by using the silicon field-effect transistor

    International Nuclear Information System (INIS)

    Karimov, A.V.; Yodgorova, D.M.; Kamanov, B.M.; Giyasova, F.A.; Yakudov, A.A.

    2012-01-01

    The silicon field-effect transistors were investigated to use in circuits for stabilization of current and voltage. As in gallium arsenide field-effect transistors, in silicon field-effect transistors with p-n-junction a new mechanism of saturation of the drain current is experimentally found out due to both transverse and longitudinal compression of channel by additional resistance between the source and the gate of the transistor. The criteria for evaluating the coefficients of stabilization of transient current suppressors and voltage stabilizator based on the field-effect transistor are considered. (authors)

  17. High-k shallow traps observed by charge pumping with varying discharging times

    Energy Technology Data Exchange (ETDEWEB)

    Ho, Szu-Han; Chen, Ching-En; Tseng, Tseung-Yuen [Department of Electronics Engineering, National Chiao Tung University, Hsinchu 300, Taiwan (China); Chang, Ting-Chang, E-mail: tcchang@mail.phys.nsysu.edu.tw [Department of Physics, National Sun Yat-Sen University, Kaohsiung 804, Taiwan (China); Advanced Optoelectronics Technology Center, National Cheng Kung University, Tainan, Taiwan (China); Lu, Ying-Hsin; Lo, Wen-Hung; Tsai, Jyun-Yu; Liu, Kuan-Ju [Department of Physics, National Sun Yat-Sen University, Kaohsiung 804, Taiwan (China); Wang, Bin-Wei; Cao, Xi-Xin [Department of Embedded System Engineering, Peking University, Beijing, P.R.China (China); Chen, Hua-Mao [Department of Photonics and Institute of Electro-Optical Engineering, National Chiao Tung University, Hsinchu, Taiwan (China); Cheng, Osbert; Huang, Cheng-Tung; Chen, Tsai-Fu [Device Department, United Microelectronics Corporation, Tainan Science Park, Taiwan (China)

    2013-11-07

    In this paper, we investigate the influence of falling time and base level time on high-k bulk shallow traps measured by charge pumping technique in n-channel metal-oxide-semiconductor field-effect transistors with HfO{sub 2}/metal gate stacks. N{sub T}-V{sub high} {sub level} characteristic curves with different duty ratios indicate that the electron detrapping time dominates the value of N{sub T} for extra contribution of I{sub cp} traps. N{sub T} is the number of traps, and I{sub cp} is charge pumping current. By fitting discharge formula at different temperatures, the results show that extra contribution of I{sub cp} traps at high voltage are in fact high-k bulk shallow traps. This is also verified through a comparison of different interlayer thicknesses and different Ti{sub x}N{sub 1−x} metal gate concentrations. Next, N{sub T}-V{sub high} {sub level} characteristic curves with different falling times (t{sub falling} {sub time}) and base level times (t{sub base} {sub level}) show that extra contribution of I{sub cp} traps decrease with an increase in t{sub falling} {sub time}. By fitting discharge formula for different t{sub falling} {sub time}, the results show that electrons trapped in high-k bulk shallow traps first discharge to the channel and then to source and drain during t{sub falling} {sub time}. This current cannot be measured by the charge pumping technique. Subsequent measurements of N{sub T} by charge pumping technique at t{sub base} {sub level} reveal a remainder of electrons trapped in high-k bulk shallow traps.

  18. Modeling of bias-induced changes of organic field-effect transistor characteristics

    NARCIS (Netherlands)

    Sharma, A.

    2011-01-01

    Organic semiconductors offer exciting possibilities in developing new types of solar cells, photodetectors, light emitting diodes and field-effect transistors. Important advantages of organic semiconducting materials over their inorganic counterparts are their chemical tunability, their low weight,

  19. Low Temperature Noise and Electrical Characterization of the Company Heterojunction Field-Effect Transistor

    Science.gov (United States)

    Cunningham, Thomas J.; Gee, Russell C.; Fossum, Eric R.; Baier, Steven M.

    1993-01-01

    This paper discusses the electrical properties of the complementary heterojunction field-effect transistor (CHFET) at 4K, including the gate leakage current, the subthreshold transconductance, and the input-referred noise voltage.

  20. Diazaisoindigo bithiophene and terthiophene copolymers for application in field-effect transistors and solar cells

    KAUST Repository

    Yue, Wan; Li, Cheng; Tian, Xuelin; Li, Weiwei; Neophytou, Marios; Chen, Hu; Du, Weiyuan; Jellett, Cameron; Chen, Hung-Yang; Onwubiko, Ada; McCulloch, Iain

    2017-01-01

    Two donor–acceptor conjugated polymers with azaisoindigo as acceptor units and bithiophene and terthiophene as donor units have been synthesized by Stille polymerization. These two polymers have been successfully applied in field-effect transistors