Study on the drain bias effect on negative bias temperature instability degradation of an ultra-short p-channel metal-oxide-semiconductor field-effect transistor

International Nuclear Information System (INIS)

Yan-Rong, Cao; Xiao-Hua, Ma; Yue, Hao; Shi-Gang, Hu

2010-01-01

This paper studies the effect of drain bias on ultra-short p-channel metal-oxide-semiconductor field-effect transistor (PMOSFET) degradation during negative bias temperature (NBT) stress. When a relatively large gate voltage is applied, the degradation magnitude is much more than the drain voltage which is the same as the gate voltage supplied, and the time exponent gets larger than that of the NBT instability (NBTI). With decreasing drain voltage, the degradation magnitude and the time exponent all get smaller. At some values of the drain voltage, the degradation magnitude is even smaller than that of NBTI, and when the drain voltage gets small enough, the exhibition of degradation becomes very similar to the NBTI degradation. When a relatively large drain voltage is applied, with decreasing gate voltage, the degradation magnitude gets smaller. However, the time exponent becomes larger. With the help of electric field simulation, this paper concludes that the degradation magnitude is determined by the vertical electric field of the oxide, the amount of hot holes generated by the strong channel lateral electric field at the gate/drain overlap region, and the time exponent is mainly controlled by localized damage caused by the lateral electric field of the oxide in the gate/drain overlap region where hot carriers are produced. (condensed matter: electronic structure, electrical, magnetic, and optical properties)

Enhancement mode GaN-based multiple-submicron channel array gate-recessed fin metal-oxide-semiconductor high-electron mobility transistors

Science.gov (United States)

Lee, Ching-Ting; Wang, Chun-Chi

2018-04-01

To study the function of channel width in multiple-submicron channel array, we fabricated the enhancement mode GaN-based gate-recessed fin metal-oxide-semiconductor high-electron mobility transistors (MOS-HEMTs) with a channel width of 450 nm and 195 nm, respectively. In view of the enhanced gate controllability in a narrower fin-channel structure, the transconductance was improved from 115 mS/mm to 151 mS/mm, the unit gain cutoff frequency was improved from 6.2 GHz to 6.8 GHz, and the maximum oscillation frequency was improved from 12.1 GHz to 13.1 GHz of the devices with a channel width of 195 nm, compared with the devices with a channel width of 450 nm.

The effect of body bias of the metal-oxide-semiconductor field-effect transistor in the resistive network on spatial current distribution in a bio-inspired complementary metal-oxide-semiconductor vision chip

Science.gov (United States)

Kong, Jae-Sung; Hyun, Hyo-Young; Seo, Sang-Ho; Shin, Jang-Kyoo

2008-11-01

Complementary metal-oxide-semiconductor (CMOS) vision chips for edge detection based on a resistive circuit have recently been developed. These chips help in the creation of neuromorphic systems of a compact size, high speed of operation, and low power dissipation. The output of the vision chip depends predominantly upon the electrical characteristics of the resistive network which consists of a resistive circuit. In this paper, the body effect of the metal-oxide-semiconductor field-effect transistor for current distribution in a resistive circuit is discussed with a simple model. In order to evaluate the model, two 160 × 120 CMOS vision chips have been fabricated using a standard CMOS technology. The experimental results nicely match our prediction.

Large current modulation and tunneling magnetoresistance change by a side-gate electric field in a GaMnAs-based vertical spin metal-oxide-semiconductor field-effect transistor.

Science.gov (United States)

Kanaki, Toshiki; Yamasaki, Hiroki; Koyama, Tomohiro; Chiba, Daichi; Ohya, Shinobu; Tanaka, Masaaki

2018-05-08

A vertical spin metal-oxide-semiconductor field-effect transistor (spin MOSFET) is a promising low-power device for the post scaling era. Here, using a ferromagnetic-semiconductor GaMnAs-based vertical spin MOSFET with a GaAs channel layer, we demonstrate a large drain-source current I DS modulation by a gate-source voltage V GS with a modulation ratio up to 130%, which is the largest value that has ever been reported for vertical spin field-effect transistors thus far. We find that the electric field effect on indirect tunneling via defect states in the GaAs channel layer is responsible for the large I DS modulation. This device shows a tunneling magnetoresistance (TMR) ratio up to ~7%, which is larger than that of the planar-type spin MOSFETs, indicating that I DS can be controlled by the magnetization configuration. Furthermore, we find that the TMR ratio can be modulated by V GS . This result mainly originates from the electric field modulation of the magnetic anisotropy of the GaMnAs ferromagnetic electrodes as well as the potential modulation of the nonmagnetic semiconductor GaAs channel layer. Our findings provide important progress towards high-performance vertical spin MOSFETs.

Homostructured ZnO-based metal-oxide-semiconductor field-effect transistors deposited at low temperature by vapor cooling condensation system

Energy Technology Data Exchange (ETDEWEB)

Lin, Tzu-Shun [Institute of Nanotechnology and Microsystems Engineering, National Cheng Kung University, 701 Tainan, Taiwan, ROC (China); Lee, Ching-Ting, E-mail: ctlee@ee.ncku.edu.tw [Institute of Nanotechnology and Microsystems Engineering, National Cheng Kung University, 701 Tainan, Taiwan, ROC (China); Institute of Microelectronics, Department of Electrical Engineering, Advanced Optoelectronic Technology Center, National Cheng Kung University, 701 Tainan, Taiwan, ROC (China)

2015-11-01

Highlights: • The vapor cooling condensation system was designed and used to deposit homostructured ZnO-based metal-oxide-semiconductor field-effect transistors. • The resulting homostructured ZnO-based MOSFETs operated at a reverse voltage of −6 V had a very low gate leakage current of 24 nA. • The associated I{sub DSS} and the g{sub m(max)} were 5.64 mA/mm and 1.31 mS/mm, respectively. - Abstract: The vapor cooling condensation system was designed and used to deposit homostructured ZnO-based metal-oxide-semiconductor field-effect transistors (MOSFETs) on sapphire substrates. Owing to the high quality of the deposited, various ZnO films and interfaces, the resulting MOSFETs manifested attractive characteristics, such as the low gate leakage current of 24 nA, the low average interface state density of 2.92 × 10{sup 11} cm{sup −2} eV{sup −1}, and the complete pinch-off performance. The saturation drain–source current, the maximum transconductance, and the gate voltage swing of the resulting homostructured ZnO-based MOSFETs were 5.64 mA/mm, 1.31 mS/mm, and 3.2 V, respectively.

A novel planar vertical double-diffused metal-oxide-semiconductor field-effect transistor with inhomogeneous floating islands

Institute of Scientific and Technical Information of China (English)

Ren Min; Li Ze-Hong; Liu Xiao-Long; Xie Jia-Xiong; Deng Guang-Min; Zhang Bo

2011-01-01

A novel planar vertical double-diffused metal-oxide-semiconductor (VDMOS) structure with an ultra-low specific on-resistance (Ron,sp),whose distinctive feature is the use of inhomogeneous floating p-islands in the n-drift region,is proposed.The theoretical limit of its Ron,sp is deduced,the influence of structure parameters on the breakdown voltage (BV) and Ron,sp are investigated,and the optimized results with BV of 83 V and Ron,sp of 54 mΩ.mm2 are obtained.Simulations show that the inhomogencous-floating-islands metal-oxide-semiconductor field-effect transistor (MOSFET)has a superior “Ron,sp/BV” trade-off to the conventional VDMOS (a 38％ reduction of Ron,sp with the same BV) and the homogeneous-floating-islands MOSFET (a 10％ reduction of Ron,sp with the same BV).The inhomogeneous-floatingislands MOSFET also has a much better body-diode characteristic than the superjunction MOSFET.Its reverse recovery peak current,reverse recovery time and reverse recovery charge are about 50,80 and 40％ of those of the superjunction MOSFET,respectively.

Radiation hardness of β-Ga2O3 metal-oxide-semiconductor field-effect transistors against gamma-ray irradiation

Science.gov (United States)

Wong, Man Hoi; Takeyama, Akinori; Makino, Takahiro; Ohshima, Takeshi; Sasaki, Kohei; Kuramata, Akito; Yamakoshi, Shigenobu; Higashiwaki, Masataka

2018-01-01

The effects of ionizing radiation on β-Ga2O3 metal-oxide-semiconductor field-effect transistors (MOSFETs) were investigated. A gamma-ray tolerance as high as 1.6 MGy(SiO2) was demonstrated for the bulk Ga2O3 channel by virtue of weak radiation effects on the MOSFETs' output current and threshold voltage. The MOSFETs remained functional with insignificant hysteresis in their transfer characteristics after exposure to the maximum cumulative dose. Despite the intrinsic radiation hardness of Ga2O3, radiation-induced gate leakage and drain current dispersion ascribed respectively to dielectric damage and interface charge trapping were found to limit the overall radiation hardness of these devices.

Near interface traps in SiO{sub 2}/4H-SiC metal-oxide-semiconductor field effect transistors monitored by temperature dependent gate current transient measurements

Energy Technology Data Exchange (ETDEWEB)

Fiorenza, Patrick; La Magna, Antonino; Vivona, Marilena; Roccaforte, Fabrizio [Consiglio Nazionale delle Ricerche-Istituto per la Microelettronica e Microsistemi (CNR-IMM), Strada VIII 5, Zona Industriale 95121 Catania (Italy)

2016-07-04

This letter reports on the impact of gate oxide trapping states on the conduction mechanisms in SiO{sub 2}/4H-SiC metal-oxide-semiconductor field effect transistors (MOSFETs). The phenomena were studied by gate current transient measurements, performed on n-channel MOSFETs operated in “gate-controlled-diode” configuration. The measurements revealed an anomalous non-steady conduction under negative bias (V{sub G} > |20 V|) through the SiO{sub 2}/4H-SiC interface. The phenomenon was explained by the coexistence of a electron variable range hopping and a hole Fowler-Nordheim (FN) tunnelling. A semi-empirical modified FN model with a time-depended electric field is used to estimate the near interface traps in the gate oxide (N{sub trap} ∼ 2 × 10{sup 11} cm{sup −2}).

A Novel Fully Depleted Air AlN Silicon-on-Insulator Metal-Oxide-Semiconductor Field Effect Transistor

International Nuclear Information System (INIS)

Yuan, Yang; Yong, Gao; Peng-Liang, Gong

2008-01-01

A novel fully depleted air AlN silicon-on-insulator (SOI) metal-oxide-semiconductor field effect transistor (MOS-FET) is presented, which can eliminate the self-heating effect and solve the problem that the off-state current of SOI MOSFETs increases and the threshold voltage characteristics become worse when employing a high thermal conductivity material as a buried layer. The simulation results reveal that the lattice temperature in normal SOI devices is 75 K higher than the atmosphere temperature, while the lattice temperature is just 4K higher than the atmosphere temperature resulting in less severe self-heating effect in air AlN SOI MOSFETs and AlN SOI MOSFETs. The on-state current of air AlN SOI MOSFETs is similar to the AlN SOI structure, and improves 12.3% more than that of normal SOI MOSFETs. The off-state current of AlN SOI is 6.7 times of normal SOI MOSFETs, while the counterpart of air AlN SOI MOSFETs is lower than that of SOI MOSFETs by two orders of magnitude. The threshold voltage change of air AlN SOI MOSFETs with different drain voltage is much less than that of AlN SOI devices, when the drain voltage is biased at 0.8 V, this difference is 28mV, so the threshold voltage change induced by employing high thermal conductivity material is cured. (condensed matter: electronic structure, electrical, magnetic, and optical properties)

Modeling of anisotropic two-dimensional materials monolayer HfS{sub 2} and phosphorene metal-oxide semiconductor field effect transistors

Energy Technology Data Exchange (ETDEWEB)

Chang, Jiwon [SEMATECH, 257 Fuller Rd #2200, Albany, New York 12203 (United States)

2015-06-07

Ballistic transport characteristics of metal-oxide semiconductor field effect transistors (MOSFETs) based on anisotropic two-dimensional materials monolayer HfS{sub 2} and phosphorene are explored through quantum transport simulations. We focus on the effects of the channel crystal orientation and the channel length scaling on device performances. Especially, the role of degenerate conduction band (CB) valleys in monolayer HfS{sub 2} is comprehensively analyzed. Benchmarking monolayer HfS{sub 2} with phosphorene MOSFETs, we predict that the effect of channel orientation on device performances is much weaker in monolayer HfS{sub 2} than in phosphorene due to the degenerate CB valleys of monolayer HfS{sub 2}. Our simulations also reveal that at 10 nm channel length scale, phosphorene MOSFETs outperform monolayer HfS{sub 2} MOSFETs in terms of the on-state current. However, it is observed that monolayer HfS{sub 2} MOSFETs may offer comparable, but a little bit degraded, device performances as compared with phosphorene MOSFETs at 5 nm channel length.

A novel planar vertical double-diffused metal-oxide-semiconductor field-effect transistor with inhomogeneous floating islands

International Nuclear Information System (INIS)

Ren Min; Li Ze-Hong; Liu Xiao-Long; Xie Jia-Xiong; Deng Guang-Min; Zhang Bo

2011-01-01

A novel planar vertical double-diffused metal-oxide-semiconductor (VDMOS) structure with an ultra-low specific on-resistance (R on,sp ), whose distinctive feature is the use of inhomogeneous floating p-islands in the n-drift region, is proposed. The theoretical limit of its R on,sp is deduced, the influence of structure parameters on the breakdown voltage (BV) and R on,sp are investigated, and the optimized results with BV of 83 V and R on,sp of 54 mΩ·mm 2 are obtained. Simulations show that the inhomogeneous-floating-islands metal-oxide-semiconductor field-effect transistor (MOSFET) has a superior 'R on,sp /BV' trade-off to the conventional VDMOS (a 38% reduction of R on,sp with the same BV) and the homogeneous-floating-islands MOSFET (a 10% reduction of R on,sp with the same BV). The inhomogeneous-floating-islands MOSFET also has a much better body-diode characteristic than the superjunction MOSFET. Its reverse recovery peak current, reverse recovery time and reverse recovery charge are about 50, 80 and 40% of those of the superjunction MOSFET, respectively. (interdisciplinary physics and related areas of science and technology)

Low Temperature Processed Complementary Metal Oxide Semiconductor (CMOS) Device by Oxidation Effect from Capping Layer

KAUST Repository

Wang, Zhenwei

2015-04-20

In this report, both p- and n-type tin oxide thin-film transistors (TFTs) were simultaneously achieved using single-step deposition of the tin oxide channel layer. The tuning of charge carrier polarity in the tin oxide channel is achieved by selectively depositing a copper oxide capping layer on top of tin oxide, which serves as an oxygen source, providing additional oxygen to form an n-type tin dioxide phase. The oxidation process can be realized by annealing at temperature as low as 190°C in air, which is significantly lower than the temperature generally required to form tin dioxide. Based on this approach, CMOS inverters based entirely on tin oxide TFTs were fabricated. Our method provides a solution to lower the process temperature for tin dioxide phase, which facilitates the application of this transparent oxide semiconductor in emerging electronic devices field.

Metal oxide semiconductor thin-film transistors for flexible electronics

Energy Technology Data Exchange (ETDEWEB)

Petti, Luisa; Vogt, Christian; Büthe, Lars; Cantarella, Giuseppe; Tröster, Gerhard [Electronics Laboratory, Swiss Federal Institute of Technology, Zürich (Switzerland); Münzenrieder, Niko [Electronics Laboratory, Swiss Federal Institute of Technology, Zürich (Switzerland); Sensor Technology Research Centre, University of Sussex, Falmer (United Kingdom); Faber, Hendrik; Bottacchi, Francesca; Anthopoulos, Thomas D. [Department of Physics and Centre for Plastic Electronics, Imperial College London, London (United Kingdom)

2016-06-15

The field of flexible electronics has rapidly expanded over the last decades, pioneering novel applications, such as wearable and textile integrated devices, seamless and embedded patch-like systems, soft electronic skins, as well as imperceptible and transient implants. The possibility to revolutionize our daily life with such disruptive appliances has fueled the quest for electronic devices which yield good electrical and mechanical performance and are at the same time light-weight, transparent, conformable, stretchable, and even biodegradable. Flexible metal oxide semiconductor thin-film transistors (TFTs) can fulfill all these requirements and are therefore considered the most promising technology for tomorrow's electronics. This review reflects the establishment of flexible metal oxide semiconductor TFTs, from the development of single devices, large-area circuits, up to entirely integrated systems. First, an introduction on metal oxide semiconductor TFTs is given, where the history of the field is revisited, the TFT configurations and operating principles are presented, and the main issues and technological challenges faced in the area are analyzed. Then, the recent advances achieved for flexible n-type metal oxide semiconductor TFTs manufactured by physical vapor deposition methods and solution-processing techniques are summarized. In particular, the ability of flexible metal oxide semiconductor TFTs to combine low temperature fabrication, high carrier mobility, large frequency operation, extreme mechanical bendability, together with transparency, conformability, stretchability, and water dissolubility is shown. Afterward, a detailed analysis of the most promising metal oxide semiconducting materials developed to realize the state-of-the-art flexible p-type TFTs is given. Next, the recent progresses obtained for flexible metal oxide semiconductor-based electronic circuits, realized with both unipolar and complementary technology, are reported. In

Effects of quantum coupling on the performance of metal-oxide ...

Indian Academy of Sciences (India)

LING-FENG MAO. School of Electronics & Information Engineering, Soochow University, ... Quantum coupling; metal-oxide-semiconductor field transistors. ... effects of the barrier height reduction caused by the channel electron velocity due to.

Ge{sub 0.83}Sn{sub 0.17} p-channel metal-oxide-semiconductor field-effect transistors: Impact of sulfur passivation on gate stack quality

Energy Technology Data Exchange (ETDEWEB)

Lei, Dian; Wang, Wei; Gong, Xiao, E-mail: elegong@nus.edu.sg, E-mail: yeo@ieee.org; Liang, Gengchiau; Yeo, Yee-Chia, E-mail: elegong@nus.edu.sg, E-mail: yeo@ieee.org [Department of Electrical and Computer Engineering, National University of Singapore, Singapore 117576 (Singapore); Zhang, Zheng; Pan, Jisheng [Institute of Material Research and Engineering, A*STAR (Agency for Science, Technology and Research), 3 Research Link, Singapore 117602 (Singapore); Tok, Eng-Soon [Department of Physics, National University of Singapore, Singapore 117551 (Singapore)

2016-01-14

The effect of room temperature sulfur passivation of the surface of Ge{sub 0.83}Sn{sub 0.17} prior to high-k dielectric (HfO{sub 2}) deposition is investigated. X-ray photoelectron spectroscopy (XPS) was used to examine the chemical bonding at the interface of HfO{sub 2} and Ge{sub 0.83}Sn{sub 0.17}. Sulfur passivation is found to be effective in suppressing the formation of both Ge oxides and Sn oxides. A comparison of XPS results for sulfur-passivated and non-passivated Ge{sub 0.83}Sn{sub 0.17} samples shows that sulfur passivation of the GeSn surface could also suppress the surface segregation of Sn atoms. In addition, sulfur passivation reduces the interface trap density D{sub it} at the high-k dielectric/Ge{sub 0.83}Sn{sub 0.17} interface from the valence band edge to the midgap of Ge{sub 0.83}Sn{sub 0.17}, as compared with a non-passivated control. The impact of the improved D{sub it} is demonstrated in Ge{sub 0.83}Sn{sub 0.17} p-channel metal-oxide-semiconductor field-effect transistors (p-MOSFETs). Ge{sub 0.83}Sn{sub 0.17} p-MOSFETs with sulfur passivation show improved subthreshold swing S, intrinsic transconductance G{sub m,int}, and effective hole mobility μ{sub eff} as compared with the non-passivated control. At a high inversion carrier density N{sub inv} of 1 × 10{sup 13 }cm{sup −2}, sulfur passivation increases μ{sub eff} by 25% in Ge{sub 0.83}Sn{sub 0.17} p-MOSFETs.

Effective dose assessment in the maxillofacial region using thermoluminescent (TLD) and metal oxide semiconductor field-effect transistor (MOSFET) dosemeters: a comparative study

NARCIS (Netherlands)

Koivisto, J.; Schulze, D.; Wolff, J.E.H.; Rottke, D.

2014-01-01

Objectives: The objective of this study was to compare the performance of metal oxide semiconductor field-effect transistor (MOSFET) technology dosemeters with thermoluminescent dosemeters (TLDs) (TLD 100; Thermo Fisher Scientific, Waltham, MA) in the maxillofacial area. Methods: Organ and effective

Thin film complementary metal oxide semiconductor (CMOS) device using a single-step deposition of the channel layer

KAUST Repository

Nayak, Pradipta K.; Caraveo-Frescas, J. A.; Wang, Zhenwei; Hedhili, Mohamed N.; Wang, Q. X.; Alshareef, Husam N.

2014-01-01

We report, for the first time, the use of a single step deposition of semiconductor channel layer to simultaneously achieve both n-and p-type transport in transparent oxide thin film transistors (TFTs). This effect is achieved by controlling

Polymer/metal oxide hybrid dielectrics for low voltage field-effect transistors with solution-processed, high-mobility semiconductors

Energy Technology Data Exchange (ETDEWEB)

Held, Martin; Schießl, Stefan P.; Gannott, Florentina [Department of Materials Science and Engineering, Friedrich-Alexander-Universität Erlangen-Nürnberg, Erlangen D-91058 (Germany); Institute for Physical Chemistry, Universität Heidelberg, Heidelberg D-69120 (Germany); Miehler, Dominik [Department of Materials Science and Engineering, Friedrich-Alexander-Universität Erlangen-Nürnberg, Erlangen D-91058 (Germany); Zaumseil, Jana, E-mail: zaumseil@uni-heidelberg.de [Institute for Physical Chemistry, Universität Heidelberg, Heidelberg D-69120 (Germany)

2015-08-24

Transistors for future flexible organic light-emitting diode (OLED) display backplanes should operate at low voltages and be able to sustain high currents over long times without degradation. Hence, high capacitance dielectrics with low surface trap densities are required that are compatible with solution-processable high-mobility semiconductors. Here, we combine poly(methyl methacrylate) (PMMA) and atomic layer deposition hafnium oxide (HfO{sub x}) into a bilayer hybrid dielectric for field-effect transistors with a donor-acceptor polymer (DPPT-TT) or single-walled carbon nanotubes (SWNTs) as the semiconductor and demonstrate substantially improved device performances for both. The ultra-thin PMMA layer ensures a low density of trap states at the semiconductor-dielectric interface while the metal oxide layer provides high capacitance, low gate leakage and superior barrier properties. Transistors with these thin (≤70 nm), high capacitance (100–300 nF/cm{sup 2}) hybrid dielectrics enable low operating voltages (<5 V), balanced charge carrier mobilities and low threshold voltages. Moreover, the hybrid layers substantially improve the bias stress stability of the transistors compared to those with pure PMMA and HfO{sub x} dielectrics.

Non-Stoichiometric SixN Metal-Oxide-Semiconductor Field-Effect Transistor for Compact Random Number Generator with 0.3 Mbit/s Generation Rate

Science.gov (United States)

Matsumoto, Mari; Ohba, Ryuji; Yasuda, Shin-ichi; Uchida, Ken; Tanamoto, Tetsufumi; Fujita, Shinobu

2008-08-01

The demand for random numbers for security applications is increasing. A conventional random number generator using thermal noise can generate unpredictable high-quality random numbers, but the circuit is extremely large because of large amplifier circuit for a small thermal signal. On the other hand, a pseudo-random number generator is small but the quality of randomness is bad. For a small circuit and a high quality of randomness, we purpose a non-stoichiometric SixN metal-oxide-semiconductor field-effect transistor (MOSFET) noise source device. This device generates a very large noise signal without an amplifier circuit. As a result, it is shown that, utilizing a SiN MOSFET, we can attain a compact random number generator with a high generation rate near 1 Mbit/s, which is suitable for almost all security applications.

AlGaN channel field effect transistors with graded heterostructure ohmic contacts

Science.gov (United States)

Bajaj, Sanyam; Akyol, Fatih; Krishnamoorthy, Sriram; Zhang, Yuewei; Rajan, Siddharth

2016-09-01

We report on ultra-wide bandgap (UWBG) Al0.75Ga0.25N channel metal-insulator-semiconductor field-effect transistors (MISFETs) with heterostructure engineered low-resistance ohmic contacts. The low intrinsic electron affinity of AlN (0.6 eV) leads to large Schottky barriers at the metal-AlGaN interface, resulting in highly resistive ohmic contacts. In this work, we use a reverse compositional graded n++ AlGaN contact layer to achieve upward electron affinity grading, leading to a low specific contact resistance (ρsp) of 1.9 × 10-6 Ω cm2 to n-Al0.75Ga0.25N channels (bandgap ˜5.3 eV) with non-alloyed contacts. We also demonstrate UWBG Al0.75Ga0.25N channel MISFET device operation employing the compositional graded n++ ohmic contact layer and 20 nm atomic layer deposited Al2O3 as the gate-dielectric.

Ultralow power complementary inverter circuits using axially doped p- and n-channel Si nanowire field effect transistors.

Science.gov (United States)

Van, Ngoc Huynh; Lee, Jae-Hyun; Whang, Dongmok; Kang, Dae Joon

2016-06-09

We have successfully synthesized axially doped p- and n-type regions on a single Si nanowire (NW). Diodes and complementary metal-oxide-semiconductor (CMOS) inverter devices using single axial p- and n-channel Si NW field-effect transistors (FETs) were fabricated. We show that the threshold voltages of both p- and n-channel Si NW FETs can be lowered to nearly zero by effectively controlling the doping concentration. Because of the high performance of the p- and n-type Si NW channel FETs, especially with regard to the low threshold voltage, the fabricated NW CMOS inverters have a low operating voltage (<3 V) while maintaining a high voltage gain (∼6) and ultralow static power dissipation (≤0.3 pW) at an input voltage of ±3 V. This result offers a viable way for the fabrication of a high-performance high-density logic circuit using a low-temperature fabrication process, which makes it suitable for flexible electronics.

Origin of the performances degradation of two-dimensional-based metal-oxide-semiconductor field effect transistors in the sub-10 nm regime: A first-principles study

Energy Technology Data Exchange (ETDEWEB)

Lu, Anh Khoa Augustin [Semiconductor Physics Laboratory, Department of Physics and Astronomy, University of Leuven, Celestijnenlaan 200 D, B-3001 Leuven (Belgium); IMEC, 75 Kapeldreef, B-3001 Leuven (Belgium); Pourtois, Geoffrey [IMEC, 75 Kapeldreef, B-3001 Leuven (Belgium); Department of Chemistry, Plasmant Research Group, University of Antwerp, B-2610 Wilrijk-Antwerp (Belgium); Agarwal, Tarun [IMEC, 75 Kapeldreef, B-3001 Leuven (Belgium); Department of Electrical Engineering, University of Leuven, Kasteelpark Arenberg 10, B-3001 Leuven (Belgium); Afzalian, Aryan [TSMC, Kapeldreef 75, B-3001 Leuven (Belgium); Radu, Iuliana P. [IMEC, 75 Kapeldreef, B-3001 Leuven (Belgium); Houssa, Michel [Semiconductor Physics Laboratory, Department of Physics and Astronomy, University of Leuven, Celestijnenlaan 200 D, B-3001 Leuven (Belgium)

2016-01-25

The impact of the scaling of the channel length on the performances of metal-oxide-semiconductor field effect transistors, based on two-dimensional (2D) channel materials, is theoretically investigated, using density functional theory combined with the non-equilibrium Green's function method. It is found that the scaling of the channel length below 10 nm leads to strong device performance degradations. Our simulations reveal that this degradation is essentially due to the tunneling current flowing between the source and the drain in these aggressively scaled devices. It is shown that this electron tunneling process is modulated by the effective mass of the 2D channel material, and sets the limit of the scaling in future transistor designs.

Origin of the performances degradation of two-dimensional-based metal-oxide-semiconductor field effect transistors in the sub-10 nm regime: A first-principles study

International Nuclear Information System (INIS)

Lu, Anh Khoa Augustin; Pourtois, Geoffrey; Agarwal, Tarun; Afzalian, Aryan; Radu, Iuliana P.; Houssa, Michel

2016-01-01

The impact of the scaling of the channel length on the performances of metal-oxide-semiconductor field effect transistors, based on two-dimensional (2D) channel materials, is theoretically investigated, using density functional theory combined with the non-equilibrium Green's function method. It is found that the scaling of the channel length below 10 nm leads to strong device performance degradations. Our simulations reveal that this degradation is essentially due to the tunneling current flowing between the source and the drain in these aggressively scaled devices. It is shown that this electron tunneling process is modulated by the effective mass of the 2D channel material, and sets the limit of the scaling in future transistor designs

Influence of quantizing magnetic field and Rashba effect on indium arsenide metal-oxide-semiconductor structure accumulation capacitance

Science.gov (United States)

Kovchavtsev, A. P.; Aksenov, M. S.; Tsarenko, A. V.; Nastovjak, A. E.; Pogosov, A. G.; Pokhabov, D. A.; Tereshchenko, O. E.; Valisheva, N. A.

2018-05-01

The accumulation capacitance oscillations behavior in the n-InAs metal-oxide-semiconductor structures with different densities of the built-in charge (Dbc) and the interface traps (Dit) at temperature 4.2 K in the magnetic field (B) 2-10 T, directed perpendicular to the semiconductor-dielectric interface, is studied. A decrease in the oscillation frequency and an increase in the capacitance oscillation amplitude are observed with the increase in B. At the same time, for a certain surface accumulation band bending, the influence of the Rashba effect, which is expressed in the oscillations decay and breakdown, is traced. The experimental capacitance-voltage curves are in a good agreement with the numeric simulation results of the self-consistent solution of Schrödinger and Poisson equations in the magnetic field, taking into account the quantization, nonparabolicity of dispersion law, and Fermi-Dirac electron statistics, with the allowance for the Rashba effect. The Landau quantum level broadening in a two-dimensional electron gas (Lorentzian-shaped density of states), due to the electron scattering mechanism, linearly depends on the magnetic field. The correlation between the interface electronic properties and the characteristic scattering times was established.

Properties of InGaAs/GaAs metal-oxide-semiconductor heterostructure field-effect transistors modified by surface treatment

Energy Technology Data Exchange (ETDEWEB)

Gregušová, D., E-mail: Dagmar.Gregusova@savba.sk [Institute of Electrical Engineering, Slovak Academy of Sciences, Dúbravská cesta 9, Bratislava SK-84104 (Slovakia); Gucmann, F.; Kúdela, R. [Institute of Electrical Engineering, Slovak Academy of Sciences, Dúbravská cesta 9, Bratislava SK-84104 (Slovakia); Mičušík, M. [Polymer Institute of Slovak Academy of Sciences, Dúbravská cesta 9, Bratislava SK-84541 (Slovakia); Stoklas, R.; Válik, L. [Institute of Electrical Engineering, Slovak Academy of Sciences, Dúbravská cesta 9, Bratislava SK-84104 (Slovakia); Greguš, J. [Faculty of Mathematics, Physics and Informatics, Comenius University, Mlynská dolina, Bratislava SK-84248 (Slovakia); Blaho, M. [Institute of Electrical Engineering, Slovak Academy of Sciences, Dúbravská cesta 9, Bratislava SK-84104 (Slovakia); Kordoš, P. [Institute of Electronics and Photonics, Faculty of Electrical Engineering and Information Technology STU, Ilkovičova 3, Bratislava SK-81219 (Slovakia)

2017-02-15

Highlights: • AlGaAs/InGaAs/GaAs-based metal oxide semiconductor transistors-MOSHFET. • Thin Al-layer deposited in-situ and oxidize in air – gate insulator. • MOSHFET vs HFET transistor properties, density of traps evaluated. - Abstract: GaAs-based heterostructures exhibit excellent carrier transport properties, mainly the high carrier velocity. An AlGaAs-GaAs heterostructure field-effect transistor (HFET) with an InGaAs channel was prepared using metal-organic chemical vapor deposition (MOVPE). An AlOx layer was formed on the AlGaAs barrier layer by the air-assisted oxidation of a thin Al layer deposited in-situ in an MOVPE reactor immediately after AlGaAs/InGaAs growth. The HFETs and MOSHFETs exhibited a very low trap state density in the order of 10{sup 11} cm{sup −2} eV{sup −1}. Capacitance measurement yielded no significant difference between the HFET and MOSHFET structures. The formation of an AlOx layer modified the surface by partially eliminating surface states that arise from Ga-and As-based native oxides. The presence of an AlOx layer reflected in a reduced gate leakage current, which was evidenced by the two-terminal transistor measurement. Presented preparation procedure and device properties show great potential of AlGaAs/InGaAs-based MOSHFETs.

Dual-Material Gate Approach to Suppression of Random-Dopant-Induced Characteristic Fluctuation in 16 nm Metal-Oxide-Semiconductor Field-Effect-Transistor Devices

Science.gov (United States)

Li, Yiming; Lee, Kuo-Fu; Yiu, Chun-Yen; Chiu, Yung-Yueh; Chang, Ru-Wei

2011-04-01

In this work, we explore for the first time dual-material gate (DMG) and inverse DMG devices for suppressing the random-dopant (RD)-induced characteristic fluctuation in 16 nm metal-oxide-semiconductor field-effect-transistor (MOSFET) devices. The physical mechanism of suppressing the characteristic fluctuation of DMG devices is observed and discussed. The achieved improvement in suppressing the RD-induced threshold voltage, on-state current, and off-state current fluctuations are 28, 12.3, and 59%, respectively. To further suppress the fluctuations, an approach that combines the DMG method and channel-doping-profile engineering is also advanced and explored. The results of our study show that among the suppression techniques, the use of the DMG device with an inverse lateral asymmetric channel-doping-profile has good immunity to fluctuation.

Silicon carbide: A unique platform for metal-oxide-semiconductor physics

Energy Technology Data Exchange (ETDEWEB)

Liu, Gang [Institute for Advanced Materials, Devices and Nanotechnology, Rutgers University, Piscataway, New Jersey 08854 (United States); Tuttle, Blair R. [Department of Physics and Astronomy, Vanderbilt University, Nashville, Tennessee 37235 (United States); Dhar, Sarit [Department of Physics, Auburn University, Auburn, Alabama 36849 (United States)

2015-06-15

A sustainable energy future requires power electronics that can enable significantly higher efficiencies in the generation, distribution, and usage of electrical energy. Silicon carbide (4H-SiC) is one of the most technologically advanced wide bandgap semiconductor that can outperform conventional silicon in terms of power handling, maximum operating temperature, and power conversion efficiency in power modules. While SiC Schottky diode is a mature technology, SiC power Metal Oxide Semiconductor Field Effect Transistors are relatively novel and there is large room for performance improvement. Specifically, major initiatives are under way to improve the inversion channel mobility and gate oxide stability in order to further reduce the on-resistance and enhance the gate reliability. Both problems relate to the defects near the SiO{sub 2}/SiC interface, which have been the focus of intensive studies for more than a decade. Here we review research on the SiC MOS physics and technology, including its brief history, the state-of-art, and the latest progress in this field. We focus on the two main scientific problems, namely, low channel mobility and bias temperature instability. The possible mechanisms behind these issues are discussed at the device physics level as well as the atomic scale, with the support of published physical analysis and theoretical studies results. Some of the most exciting recent progress in interface engineering for improving the channel mobility and fundamental understanding of channel transport is reviewed.

Dual passivation of intrinsic defects at the compound semiconductor/oxide interface using an oxidant and a reductant.

Science.gov (United States)

Kent, Tyler; Chagarov, Evgeniy; Edmonds, Mary; Droopad, Ravi; Kummel, Andrew C

2015-05-26

Studies have shown that metal oxide semiconductor field-effect transistors fabricated utilizing compound semiconductors as the channel are limited in their electrical performance. This is attributed to imperfections at the semiconductor/oxide interface which cause electronic trap states, resulting in inefficient modulation of the Fermi level. The physical origin of these states is still debated mainly because of the difficulty in assigning a particular electronic state to a specific physical defect. To gain insight into the exact source of the electronic trap states, density functional theory was employed to model the intrinsic physical defects on the InGaAs (2 × 4) surface and to model the effective passivation of these defects by utilizing both an oxidant and a reductant to eliminate metallic bonds and dangling-bond-induced strain at the interface. Scanning tunneling microscopy and spectroscopy were employed to experimentally determine the physical and electronic defects and to verify the effectiveness of dual passivation with an oxidant and a reductant. While subsurface chemisorption of oxidants on compound semiconductor substrates can be detrimental, it has been shown theoretically and experimentally that oxidants are critical to removing metallic defects at oxide/compound semiconductor interfaces present in nanoscale channels, oxides, and other nanostructures.

Reduction in the interface-states density of metal-oxide-semiconductor field-effect transistors fabricated on high-index Si (114) surfaces by using an external magnetic field

International Nuclear Information System (INIS)

Molina, J.; De La Hidalga, J.; Gutierrez, E.

2014-01-01

After fabrication of Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) devices on high-index silicon (114) surfaces, their threshold voltage (Vth) and interface-states density (Dit) characteristics were measured under the influence of an externally applied magnetic field of B = 6 μT at room temperature. The electron flow of the MOSFET's channel presents high anisotropy on Si (114), and this effect is enhanced by using an external magnetic field B, applied parallel to the Si (114) surface but perpendicular to the electron flow direction. This special configuration results in the channel electrons experiencing a Lorentzian force which pushes the electrons closer to the Si (114)-SiO 2 interface and therefore to the special morphology of the Si (114) surface. Interestingly, Dit evaluation of n-type MOSFETs fabricated on Si (114) surfaces shows that the Si (114)-SiO 2 interface is of high quality so that Dit as low as ∼10 10  cm −2 ·eV −1 are obtained for MOSFETs with channels aligned at specific orientations. Additionally, using both a small positive Vds ≤ 100 mV and B = 6 μT, the former Dit is reduced by 35% in MOSFETs whose channels are aligned parallel to row-like nanostructures formed atop Si (114) surfaces (channels having a 90° rotation), whereas Dit is increased by 25% in MOSFETs whose channels are aligned perpendicular to these nanostructures (channels having a 0° rotation). From these results, the special morphology of a high-index Si (114) plane having nanochannels on its surface opens the possibility to reduce the electron-trapping characteristics of MOSFET devices having deep-submicron features and operating at very high frequencies

Radiation effects in metal-oxide-semiconductor capacitors

International Nuclear Information System (INIS)

Collins, J.L.

1987-01-01

The effects of various radiations on commercially made Al-SiO 2 -Si Capacitors (MOSCs) have been investigated. Intrinsic dielectric breakdown in MOSCs has been shown to be a two-stage process dominated by charge injection in a pre-breakdown stage; this is associated with localised high-field injection of carriers from the semiconductor substrate to interfacial and bulk charge traps which, it is proposed, leads to the formation of conducting channels through the dielectric with breakdown occurring as a result of the dissipation of the conduction band energy. A study of radiation-induced dielectric breakdown has revealed the possibility of anomalous hot-electron injection to an excess of bulk oxide traps in the ionization channel produced by very heavily ionizing radiation, which leads to intrinsic breakdown in high-field stressed devices. This is interpreted in terms of a modified model for radiation-induced dielectric breakdown based upon the primary dependence of breakdown on charge injection rather than high-field mechanisms. A detailed investigation of charge trapping and interface state generation due to various radiations has revealed evidence of neutron induced interface states, and the generation of positive oxide charge in devices due to all the radiations tested. The greater the linear energy transfer of the radiation, the greater the magnitude of charge trapped in the oxide and the number of interface states generated. This is interpreted in terms of Si-H and Si-OH bond-breaking at the Si-SiO 2 interface which is enhanced by charge carrier transfer to the interface and by anomalous charge injection to compensate for the excess of charge carriers created by the radiation. (author)

Single photon sources in 4H-SiC metal-oxide-semiconductor field-effect transistors

Science.gov (United States)

Abe, Y.; Umeda, T.; Okamoto, M.; Kosugi, R.; Harada, S.; Haruyama, M.; Kada, W.; Hanaizumi, O.; Onoda, S.; Ohshima, T.

2018-01-01

We present single photon sources (SPSs) embedded in 4H-SiC metal-oxide-semiconductor field-effect transistors (MOSFETs). They are formed in the SiC/SiO2 interface regions of wet-oxidation C-face 4H-SiC MOSFETs and were not found in other C-face and Si-face MOSFETs. Their bright room-temperature photoluminescence (PL) was observed in the range from 550 to 750 nm and revealed variable multi-peak structures as well as variable peak shifts. We characterized a wide variety of their PL spectra as the inevitable variation of local atomic structures at the interface. Their polarization dependence indicates that they are formed at the SiC side of the interface. We also demonstrate that it is possible to switch on/off the SPSs by a bias voltage of the MOSFET.

The impact of non-uniform channel layer growth on device characteristics in state of the Art Si/SiGe/Si p-metal oxide semiconductor field effect transistors

International Nuclear Information System (INIS)

Chang, A.C.K.; Ross, I.M.; Norris, D.J.; Cullis, A.G.; Tang, Y.T.; Cerrina, C.; Evans, A.G.R.

2006-01-01

In this study we have highlighted the effect of non-uniform channel layer growth by the direct correlation of the microstructure and electrical characteristics in state-of-the-art pseudomorphic Si/SiGe p-channel metal oxide semiconductor field effect transistor devices fabricated on Si. Two nominally identical sets of devices from adjacent locations of the same wafer were found to have radically different distributions in gate threshold voltages. Due to the close proximity and narrow gate length of the devices, focused ion beam milling was used to prepare a number of thin cross-sections from each of the two regions for subsequent analysis using transmission electron microscopy. It was found that devices from the region giving a very narrow range of gate threshold voltages exhibited a uniform microstructure in general agreement with the intended growth parameters. However, in the second region, which showed a large spread in the gate threshold voltages, profound anomalies in the microstructure were observed. These anomalies consisted of fluctuations in the quality and thickness of the SiGe strained layers. The non-uniform growth of the strained SiGe layer clearly accounted for the poorly controlled threshold voltages of these devices. The results emphasize the importance of good layer growth uniformity to ensure optimum device yield

Characterization of Interface State in Silicon Carbide Metal Oxide Semiconductor Capacitors

Science.gov (United States)

Kao, Wei-Chieh

Silicon carbide (SiC) has always been considered as an excellent material for high temperature and high power devices. Since SiC is the only compound semiconductor whose native oxide is silicon dioxide (SiO2), it puts SiC in a unique position. Although SiC metal oxide semiconductor (MOS) technology has made significant progress in recent years, there are still a number of issues to be overcome before more commercial SiC devices can enter the market. The prevailing issues surrounding SiC MOSFET devices are the low channel mobility, the low quality of the oxide layer and the high interface state density at the SiC/SiO2 interface. Consequently, there is a need for research to be performed in order to have a better understanding of the factors causing the poor SiC/SiO2 interface properties. In this work, we investigated the generation lifetime in SiC materials by using the pulsed metal oxide semiconductor (MOS) capacitor method and measured the interface state density distribution at the SiC/SiO2 interface by using the conductance measurement and the high-low frequency capacitance technique. These measurement techniques have been performed on n-type and p-type SiC MOS capacitors. In the course of our investigation, we observed fast interface states at semiconductor-dielectric interfaces in SiC MOS capacitors that underwent three different interface passivation processes, such states were detected in the nitrided samples but not observed in PSG-passivated samples. This result indicate that the lack of fast states at PSG-passivated interface is one of the main reasons for higher channel mobility in PSG MOSFETs. In addition, the effect of mobile ions in the oxide on the response time of interface states has been investigated. In the last chapter we propose additional methods of investigation that can help elucidate the origin of the particular interface states, enabling a more complete understanding of the SiC/SiO2 material system.

An Overview of High-k Oxides on Hydrogenated-Diamond for Metal-Oxide-Semiconductor Capacitors and Field-Effect Transistors

Directory of Open Access Journals (Sweden)

Jiangwei Liu

2018-06-01

Full Text Available Thanks to its excellent intrinsic properties, diamond is promising for applications of high-power electronic devices, ultraviolet detectors, biosensors, high-temperature tolerant gas sensors, etc. Here, an overview of high-k oxides on hydrogenated-diamond (H-diamond for metal-oxide-semiconductor (MOS capacitors and MOS field-effect transistors (MOSFETs is demonstrated. Fabrication routines for the H-diamond MOS capacitors and MOSFETs, band configurations of oxide/H-diamond heterointerfaces, and electrical properties of the MOS and MOSFETs are summarized and discussed. High-k oxide insulators are deposited using atomic layer deposition (ALD and sputtering deposition (SD techniques. Electrical properties of the H-diamond MOS capacitors with high-k oxides of ALD-Al2O3, ALD-HfO2, ALD-HfO2/ALD-Al2O3 multilayer, SD-HfO2/ALD-HfO2 bilayer, SD-TiO2/ALD-Al2O3 bilayer, and ALD-TiO2/ALD-Al2O3 bilayer are discussed. Analyses for capacitance-voltage characteristics of them show that there are low fixed and trapped charge densities for the ALD-Al2O3/H-diamond and SD-HfO2/ALD-HfO2/H-diamond MOS capacitors. The k value of 27.2 for the ALD-TiO2/ALD-Al2O3 bilayer is larger than those of the other oxide insulators. Drain-source current versus voltage curves show distinct pitch-off and p-type channel characteristics for the ALD-Al2O3/H-diamond, SD-HfO2/ALD-HfO2/H-diamond, and ALD-TiO2/ALD-Al2O3/H-diamond MOSFETs. Understanding of fabrication routines and electrical properties for the high-k oxide/H-diamond MOS electronic devices is meaningful for the fabrication of high-performance H-diamond MOS capacitor and MOSFET gas sensors.

Thin film complementary metal oxide semiconductor (CMOS) device using a single-step deposition of the channel layer

KAUST Repository

Nayak, Pradipta K.

2014-04-14

We report, for the first time, the use of a single step deposition of semiconductor channel layer to simultaneously achieve both n-and p-type transport in transparent oxide thin film transistors (TFTs). This effect is achieved by controlling the concentration of hydroxyl groups (OH-groups) in the underlying gate dielectrics. The semiconducting tin oxide layer was deposited at room temperature, and the maximum device fabrication temperature was 350C. Both n and p-type TFTs showed fairly comparable performance. A functional CMOS inverter was fabricated using this novel scheme, indicating the potential use of our approach for various practical applications.

Radiation tolerance of Si{sub 1−y}C{sub y} source/drain n-type metal oxide semiconductor field effect transistors with different carbon concentrations

Energy Technology Data Exchange (ETDEWEB)

Nakashima, Toshiyuki, E-mail: nakashima_t@cdk.co.jp [Interdisciplinary Graduate School of Agriculture and Engineering, University of Miyazaki, 1-1 Gakuen Kibanadai-nishi, Miyazaki (Japan); Chuo Denshi Kogyo Co., Ltd., 3400 Kohoyama, Matsubase, Uki, Kumamoto (Japan); Asai, Yuki; Hori, Masato; Yoneoka, Masashi; Tsunoda, Isao; Takakura, Kenichiro [Kumamoto National College of Technology, 2659-2 Suya, Koshi, Kumamoto 861-1102 (Japan); Gonzalez, Mireia Bargallo [Institut de Microelectronica de Barcelona (Centre Nacional de Microelectronica — Consejo Superior de Investigaciones Cientificas) Campus UAB, 08193 Bellaterra (Spain); Simoen, Eddy [imec, Kapeldreef 75, B-3001 Leuven (Belgium); Claeys, Cor [imec, Kapeldreef 75, B-3001 Leuven (Belgium); Department of Electrical Engineering, KU Leuven, Kasteelpark Arenberg 10, B-3001 Leuven (Belgium); Yoshino, Kenji [Interdisciplinary Graduate School of Agriculture and Engineering, University of Miyazaki, 1-1 Gakuen Kibanadai-nishi, Miyazaki (Japan)

2014-04-30

The 2-MeV electron radiation damage of silicon–carbon source/drain (S/D) n-type metal oxide semiconductor field effect transistors with different carbon (C) concentrations is studied. Before irradiation, an enhancement of the electron mobility with C concentration of the S/D stressors is clearly observed. On the other hand, after electron irradiation, both the threshold voltage shift and the maximum electron mobility degradation are independent on the C concentration for all electron fluences studied. These results indicate that the strain induced electron mobility enhancement due to the C doping is retained after irradiation in the studied devices. - Highlights: • We have investigated the electron irradiation effect of the Si{sub 1−y}C{sub y} S/D n-MOSFETs. • The threshold voltage variations by irradiation are independent on the C doping. • The electron-mobility decreased for all C concentrations by electron irradiation. • The strain induced mobility enhancement effect is retained after irradiation.

Reduction of Charge Traps and Stability Enhancement in Solution-Processed Organic Field-Effect Transistors Based on a Blended n-Type Semiconductor.

Science.gov (United States)

Campos, Antonio; Riera-Galindo, Sergi; Puigdollers, Joaquim; Mas-Torrent, Marta

2018-05-09

Solution-processed n-type organic field-effect transistors (OFETs) are essential elements for developing large-area, low-cost, and all organic logic/complementary circuits. Nonetheless, the development of air-stable n-type organic semiconductors (OSCs) lags behind their p-type counterparts. The trapping of electrons at the semiconductor-dielectric interface leads to a lower performance and operational stability. Herein, we report printed small-molecule n-type OFETs based on a blend with a binder polymer, which enhances the device stability due to the improvement of the semiconductor-dielectric interface quality and a self-encapsulation. Both combined effects prevent the fast deterioration of the OSC. Additionally, a complementary metal-oxide semiconductor-like inverter is fabricated depositing p-type and n-type OSCs simultaneously.

Band-to-band tunneling in a carbon nanotube metal-oxide-semiconductor field-effect transistor is dominated by phonon assisted tunneling

OpenAIRE

Koswatta, Siyuranga O.; Lundstrom, Mark S.; Nikonov, Dmitri E.

2007-01-01

Band-to-band tunneling (BTBT) devices have recently gained a lot of interest due to their potential for reducing power dissipation in integrated circuits. We have performed extensive simulations for the BTBT operation of carbon nanotube metal-oxide-semiconductor field-effect transistors (CNT-MOSFETs) using the non-equilibrium Green's functions formalism for both ballistic and dissipative quantum transport. In comparison with recently reported experimental data (Y. Lu et al, J. Am. Chem. Soc.,...

Emission channeling with short-lived isotopes lattice location of impurities in semiconductors and oxides

CERN Multimedia

We propose to perform emission channeling lattice location experiments in a number of semiconductor and oxide systems of technological relevance: \\\\- The lattice location of the transition metal probes $^{56}$Mn ($\\textit{t}_{1/2}$=2.6 h), $^{59}$Fe (45 d), $^{61}$Co (1.6 h) and $^{65}$Ni (2.5 h) is to be investigated in materials of interest as dilute magnetic semiconductors, such as GaMnAs, GaMnN, GaFeN, AlGaN, SiC, and in a number of oxides that are candidates for “single ion ferromagnetism”, in particular SrTiO$_3$ and LiNbO$_3$.\\\\- The topic of $\\textit{p}$-type doping of nitride semiconductors shall be addressed by studying the lattice sites of the acceptor dopants Mg and Be in GaN and AlN using the short-lived probes $^{27}$Mg (9.5 min) and $^{11}$Be (13.8 s). The aim is to reach a lattice location precision around 0.05 Å in order to provide critical tests for recent theoretical models which e.g. have predicted displacements of the Mg atom from the ideal substitutional Ga and Al sites of the order...

Fluorination of Metal Phthalocyanines: Single-Crystal Growth, Efficient N-Channel Organic Field-Effect Transistors, and Structure-Property Relationships

Science.gov (United States)

Jiang, Hui; Ye, Jun; Hu, Peng; Wei, Fengxia; Du, Kezhao; Wang, Ning; Ba, Te; Feng, Shuanglong; Kloc, Christian

2014-01-01

The fluorination of p-type metal phthalocyanines produces n-type semiconductors, allowing the design of organic electronic circuits that contain inexpensive heterojunctions made from chemically and thermally stable p- and n-type organic semiconductors. For the evaluation of close to intrinsic transport properties, high-quality centimeter-sized single crystals of F16CuPc, F16CoPc and F16ZnPc have been grown. New crystal structures of F16CuPc, F16CoPc and F16ZnPc have been determined. Organic single-crystal field-effect transistors have been fabricated to study the effects of the central metal atom on their charge transport properties. The F16ZnPc has the highest electron mobility (~1.1 cm2 V−1 s−1). Theoretical calculations indicate that the crystal structure and electronic structure of the central metal atom determine the transport properties of fluorinated metal phthalocyanines. PMID:25524460

Surface Preparation and Deposited Gate Oxides for Gallium Nitride Based Metal Oxide Semiconductor Devices

Directory of Open Access Journals (Sweden)

Paul C. McIntyre

2012-07-01

Full Text Available The literature on polar Gallium Nitride (GaN surfaces, surface treatments and gate dielectrics relevant to metal oxide semiconductor devices is reviewed. The significance of the GaN growth technique and growth parameters on the properties of GaN epilayers, the ability to modify GaN surface properties using in situ and ex situ processes and progress on the understanding and performance of GaN metal oxide semiconductor (MOS devices are presented and discussed. Although a reasonably consistent picture is emerging from focused studies on issues covered in each of these topics, future research can achieve a better understanding of the critical oxide-semiconductor interface by probing the connections between these topics. The challenges in analyzing defect concentrations and energies in GaN MOS gate stacks are discussed. Promising gate dielectric deposition techniques such as atomic layer deposition, which is already accepted by the semiconductor industry for silicon CMOS device fabrication, coupled with more advanced physical and electrical characterization methods will likely accelerate the pace of learning required to develop future GaN-based MOS technology.

Low-frequency noise in AlTiO/AlGaN/GaN metal-insulator-semiconductor heterojunction field-effect transistors

Energy Technology Data Exchange (ETDEWEB)

Le, Son Phuong; Ui, Toshimasa; Nguyen, Tuan Quy; Shih, Hong-An; Suzuki, Toshi-kazu, E-mail: tosikazu@jaist.ac.jp [Center for Nano Materials and Technology, Japan Advanced Institute of Science and Technology (JAIST), 1-1 Asahidai, Nomi, Ishikawa 923-1292 (Japan)

2016-05-28

Using aluminum titanium oxide (AlTiO, an alloy of Al{sub 2}O{sub 3} and TiO{sub 2}) as a high-k gate insulator, we fabricated and investigated AlTiO/AlGaN/GaN metal-insulator-semiconductor heterojunction field-effect transistors. From current low-frequency noise (LFN) characterization, we find Lorentzian spectra near the threshold voltage, in addition to 1/f spectra for the well-above-threshold regime. The Lorentzian spectra are attributed to electron trapping/detrapping with two specific time constants, ∼25 ms and ∼3 ms, which are independent of the gate length and the gate voltage, corresponding to two trap level depths of 0.5–0.7 eV with a 0.06 eV difference in the AlTiO insulator. In addition, gate leakage currents are analyzed and attributed to the Poole-Frenkel mechanism due to traps in the AlTiO insulator, where the extracted trap level depth is consistent with the Lorentzian LFN.

n-Channel semiconductor materials design for organic complementary circuits.

Science.gov (United States)

Usta, Hakan; Facchetti, Antonio; Marks, Tobin J

2011-07-19

Organic semiconductors have unique properties compared to traditional inorganic materials such as amorphous or crystalline silicon. Some important advantages include their adaptability to low-temperature processing on flexible substrates, low cost, amenability to high-speed fabrication, and tunable electronic properties. These features are essential for a variety of next-generation electronic products, including low-power flexible displays, inexpensive radio frequency identification (RFID) tags, and printable sensors, among many other applications. Accordingly, the preparation of new materials based on π-conjugated organic molecules or polymers has been a central scientific and technological research focus over the past decade. Currently, p-channel (hole-transporting) materials are the leading class of organic semiconductors. In contrast, high-performance n-channel (electron-transporting) semiconductors are relatively rare, but they are of great significance for the development of plastic electronic devices such as organic field-effect transistors (OFETs). In this Account, we highlight the advances our team has made toward realizing moderately and highly electron-deficient n-channel oligomers and polymers based on oligothiophene, arylenediimide, and (bis)indenofluorene skeletons. We have synthesized and characterized a "library" of structurally related semiconductors, and we have investigated detailed structure-property relationships through optical, electrochemical, thermal, microstructural (both single-crystal and thin-film), and electrical measurements. Our results reveal highly informative correlations between structural parameters at various length scales and charge transport properties. We first discuss oligothiophenes functionalized with perfluoroalkyl and perfluoroarene substituents, which represent the initial examples of high-performance n-channel semiconductors developed in this project. The OFET characteristics of these compounds are presented with an

Decrease in effective electron mobility in the channel of a metal-oxide-semiconductor transistor as the gate length is decreased

International Nuclear Information System (INIS)

Frantsuzov, A. A.; Boyarkina, N. I.; Popov, V. P.

2008-01-01

Effective electron mobility μ eff in channels of metal-oxide-semiconductor transistors with a gate length L in the range of 3.8 to 0.34 μm was measured; the transistors were formed on wafers of the silicon-oninsulator type. It was found that μ eff decreases as L is decreased. It is shown that this decrease can be accounted for by the effect of series resistances of the source and drain only if it is assumed that there is a rapid increase in these resistances as the gate voltage is decreased. This assumption is difficult to substantiate. A more realistic model is suggested; this model accounts for the observed decrease in μ eff as L is decreased. The model implies that zones with a mobility lower than that in the middle part of the channel originate at the edges of the gate. An analysis shows that, in this case, the plot of the dependence of 1/μ eff on 1/L should be linear, which is exactly what is observed experimentally. The use of this plot makes it possible to determine both the electron mobility μ 0 in the middle part of the channel and the quantity A that characterizes the zones with lowered mobility at the gate’s edges.

Spin-dependent transport properties of a GaMnAs-based vertical spin metal-oxide-semiconductor field-effect transistor structure

Energy Technology Data Exchange (ETDEWEB)

Kanaki, Toshiki, E-mail: kanaki@cryst.t.u-tokyo.ac.jp; Asahara, Hirokatsu; Ohya, Shinobu, E-mail: ohya@cryst.t.u-tokyo.ac.jp; Tanaka, Masaaki, E-mail: masaaki@ee.t.u-tokyo.ac.jp [Department of Electrical Engineering and Information Systems, The University of Tokyo, 7-3-1 Hongo, Bunkyo-ku, Tokyo 113-8656 (Japan)

2015-12-14

We fabricate a vertical spin metal-oxide-semiconductor field-effect transistor (spin-MOSFET) structure, which is composed of an epitaxial single-crystal heterostructure with a ferromagnetic-semiconductor GaMnAs source/drain, and investigate its spin-dependent transport properties. We modulate the drain-source current I{sub DS} by ∼±0.5% with a gate-source voltage of ±10.8 V and also modulate I{sub DS} by up to 60% with changing the magnetization configuration of the GaMnAs source/drain at 3.5 K. The magnetoresistance ratio is more than two orders of magnitude higher than that obtained in the previous studies on spin MOSFETs. Our result shows that a vertical structure is one of the hopeful candidates for spin MOSFET when the device size is reduced to a sub-micron or nanometer scale.

Spin-dependent transport properties of a GaMnAs-based vertical spin metal-oxide-semiconductor field-effect transistor structure

International Nuclear Information System (INIS)

Kanaki, Toshiki; Asahara, Hirokatsu; Ohya, Shinobu; Tanaka, Masaaki

2015-01-01

We fabricate a vertical spin metal-oxide-semiconductor field-effect transistor (spin-MOSFET) structure, which is composed of an epitaxial single-crystal heterostructure with a ferromagnetic-semiconductor GaMnAs source/drain, and investigate its spin-dependent transport properties. We modulate the drain-source current I DS by ∼±0.5% with a gate-source voltage of ±10.8 V and also modulate I DS by up to 60% with changing the magnetization configuration of the GaMnAs source/drain at 3.5 K. The magnetoresistance ratio is more than two orders of magnitude higher than that obtained in the previous studies on spin MOSFETs. Our result shows that a vertical structure is one of the hopeful candidates for spin MOSFET when the device size is reduced to a sub-micron or nanometer scale

AlGaN/GaN Metal-Oxide-Semiconductor High-Electron-Mobility Transistor with Polarized P(VDF-TrFE) Ferroelectric Polymer Gating

Science.gov (United States)

Liu, Xinke; Lu, Youming; Yu, Wenjie; Wu, Jing; He, Jiazhu; Tang, Dan; Liu, Zhihong; Somasuntharam, Pannirselvam; Zhu, Deliang; Liu, Wenjun; Cao, Peijiang; Han, Sun; Chen, Shaojun; Seow Tan, Leng

2015-01-01

Effect of a polarized P(VDF-TrFE) ferroelectric polymer gating on AlGaN/GaN metal-oxide-semiconductor high-electron-mobility transistors (MOS-HEMTs) was investigated. The P(VDF-TrFE) gating in the source/drain access regions of AlGaN/GaN MOS-HEMTs was positively polarized (i.e., partially positively charged hydrogen were aligned to the AlGaN surface) by an applied electric field, resulting in a shift-down of the conduction band at the AlGaN/GaN interface. This increases the 2-dimensional electron gas (2-DEG) density in the source/drain access region of the AlGaN/GaN heterostructure, and thereby reduces the source/drain series resistance. Detailed material characterization of the P(VDF-TrFE) ferroelectric film was also carried out using the atomic force microscopy (AFM), X-ray Diffraction (XRD), and ferroelectric hysteresis loop measurement. PMID:26364872

Metal/oxide/semiconductor interface investigated by monoenergetic positrons

Science.gov (United States)

Uedono, A.; Tanigawa, S.; Ohji, Y.

1988-10-01

Variable-energy positron-beam studies have been carried out for the first time on a metal/oxide/semiconductor (MOS) structure of polycrystalline Si/SiO 2/Si-substrate. We were successful in collecting injected positrons at the SiO 2/Si interface by the application of an electric field between the MOS electrodes.

Synthesis, Characterization, and Ultrafast Dynamics of Metal, Metal Oxide, and Semiconductor Nanomaterials

OpenAIRE

Wheeler, Damon Andreas

2013-01-01

SYNTHESIS, CHARACTERIZATION, AND ULTRAFAST DYNAMICS OF METAL, METAL OXIDE, AND SEMICONDUCTOR NANOMATERIALSABSTRACTThe optical properties of each of the three main classes of inorganic nanomaterials, metals, metal oxides, and semiconductors differ greatly due to the intrinsically different nature of the materials. These optical properties are among the most fascinating and useful aspects of nanomaterials with applications spanning cancer treatment, sensors, lasers, and solar cells. One techn...

Spintronic effects in metallic, semiconductor, metal-oxide and metal-semiconductor heterostructures

Energy Technology Data Exchange (ETDEWEB)

Bratkovsky, A M [Hewlett-Packard Laboratories, 1501 Page Mill Road, MS 1123, Palo Alto, CA 94304 (United States)

2008-02-15

Spintronics is a rapidly growing field focusing on phenomena and related devices essentially dependent on spin transport. Some of them are already an established part of microelectronics. We review recent theoretical and experimental advances in achieving large spin injection efficiency (polarization of current) and accumulated spin polarization. These include tunnel and giant magnetoresistance, spin-torque and spin-orbit effects on electron transport in various heterostructures. We give a microscopic description of spin tunneling through oxide and modified Schottky barriers between a ferromagnet (FM) and a semiconductor (S). It is shown that in such FM-S junctions electrons with a certain spin projection can be efficiently injected into (or extracted from) S, while electrons with the opposite spin can accumulate in S near the interface. The criterion for efficient injection is opposite to a known Rashba criterion, since the barrier should be rather transparent. In degenerate semiconductors, extraction of spin can proceed at low temperatures. We mention a few novel spin-valve ultrafast devices with small dissipated power: a magnetic sensor, a spin transistor, an amplifier, a frequency multiplier, a square-law detector and a source of polarized radiation. We also discuss effects related to spin-orbital interactions, such as the spin Hall effect (SHE) and a recently predicted positive magnetoresistance accompanying SHE. Some esoteric devices such as 'spinFET', interacting spin logic and spin-based quantum computing are discussed and problems with their realization are highlighted. We demonstrate that the so-called 'ferroelectric tunnel junctions' are unlikely to provide additional functionality because in all realistic situations the ferroelectric barrier would be split into domains by the depolarizing field.

Spintronic effects in metallic, semiconductor, metal-oxide and metal-semiconductor heterostructures

International Nuclear Information System (INIS)

Bratkovsky, A M

2008-01-01

Spintronics is a rapidly growing field focusing on phenomena and related devices essentially dependent on spin transport. Some of them are already an established part of microelectronics. We review recent theoretical and experimental advances in achieving large spin injection efficiency (polarization of current) and accumulated spin polarization. These include tunnel and giant magnetoresistance, spin-torque and spin-orbit effects on electron transport in various heterostructures. We give a microscopic description of spin tunneling through oxide and modified Schottky barriers between a ferromagnet (FM) and a semiconductor (S). It is shown that in such FM-S junctions electrons with a certain spin projection can be efficiently injected into (or extracted from) S, while electrons with the opposite spin can accumulate in S near the interface. The criterion for efficient injection is opposite to a known Rashba criterion, since the barrier should be rather transparent. In degenerate semiconductors, extraction of spin can proceed at low temperatures. We mention a few novel spin-valve ultrafast devices with small dissipated power: a magnetic sensor, a spin transistor, an amplifier, a frequency multiplier, a square-law detector and a source of polarized radiation. We also discuss effects related to spin-orbital interactions, such as the spin Hall effect (SHE) and a recently predicted positive magnetoresistance accompanying SHE. Some esoteric devices such as 'spinFET', interacting spin logic and spin-based quantum computing are discussed and problems with their realization are highlighted. We demonstrate that the so-called 'ferroelectric tunnel junctions' are unlikely to provide additional functionality because in all realistic situations the ferroelectric barrier would be split into domains by the depolarizing field

Spintronic effects in metallic, semiconductor, metal oxide and metal semiconductor heterostructures

Science.gov (United States)

Bratkovsky, A. M.

2008-02-01

Spintronics is a rapidly growing field focusing on phenomena and related devices essentially dependent on spin transport. Some of them are already an established part of microelectronics. We review recent theoretical and experimental advances in achieving large spin injection efficiency (polarization of current) and accumulated spin polarization. These include tunnel and giant magnetoresistance, spin-torque and spin-orbit effects on electron transport in various heterostructures. We give a microscopic description of spin tunneling through oxide and modified Schottky barriers between a ferromagnet (FM) and a semiconductor (S). It is shown that in such FM-S junctions electrons with a certain spin projection can be efficiently injected into (or extracted from) S, while electrons with the opposite spin can accumulate in S near the interface. The criterion for efficient injection is opposite to a known Rashba criterion, since the barrier should be rather transparent. In degenerate semiconductors, extraction of spin can proceed at low temperatures. We mention a few novel spin-valve ultrafast devices with small dissipated power: a magnetic sensor, a spin transistor, an amplifier, a frequency multiplier, a square-law detector and a source of polarized radiation. We also discuss effects related to spin-orbital interactions, such as the spin Hall effect (SHE) and a recently predicted positive magnetoresistance accompanying SHE. Some esoteric devices such as 'spinFET', interacting spin logic and spin-based quantum computing are discussed and problems with their realization are highlighted. We demonstrate that the so-called 'ferroelectric tunnel junctions' are unlikely to provide additional functionality because in all realistic situations the ferroelectric barrier would be split into domains by the depolarizing field.

Orientation-Dependent Electronic Structures and Charge Transport Mechanisms in Ultrathin Polymeric n-Channel Field-Effect Transistors

NARCIS (Netherlands)

Fabiano, Simone; Yoshida, Hiroyuki; Chen, Zhihua; Facchetti, Antonio; Loi, Maria Antonietta

2013-01-01

We investigated the role of metal/organic semiconductor interface morphology on the charge transport mechanisms and energy level alignment of the n-channel semiconductor poly{[N,N'-bis(2-octyldodecyl)-naphthalene-1,4,5,8-bis(dicarboximide)-2,6-diyl]-alt-5,5'-(2,2'-bithiophene)} (P-(NDI2ODT2)).

Multi-frequency inversion-charge pumping for charge separation and mobility analysis in high-k/InGaAs metal-oxide-semiconductor field-effect transistors

Energy Technology Data Exchange (ETDEWEB)

Djara, V.; Cherkaoui, K.; Negara, M. A.; Hurley, P. K., E-mail: paul.hurley@tyndall.ie [Tyndall National Institute, University College Cork, Dyke Parade, Cork (Ireland)

2015-11-28

An alternative multi-frequency inversion-charge pumping (MFICP) technique was developed to directly separate the inversion charge density (N{sub inv}) from the trapped charge density in high-k/InGaAs metal-oxide-semiconductor field-effect transistors (MOSFETs). This approach relies on the fitting of the frequency response of border traps, obtained from inversion-charge pumping measurements performed over a wide range of frequencies at room temperature on a single MOSFET, using a modified charge trapping model. The obtained model yielded the capture time constant and density of border traps located at energy levels aligned with the InGaAs conduction band. Moreover, the combination of MFICP and pulsed I{sub d}-V{sub g} measurements enabled an accurate effective mobility vs N{sub inv} extraction and analysis. The data obtained using the MFICP approach are consistent with the most recent reports on high-k/InGaAs.

Gate tunneling current and quantum capacitance in metal-oxide-semiconductor devices with graphene gate electrodes

Science.gov (United States)

An, Yanbin; Shekhawat, Aniruddh; Behnam, Ashkan; Pop, Eric; Ural, Ant

2016-11-01

Metal-oxide-semiconductor (MOS) devices with graphene as the metal gate electrode, silicon dioxide with thicknesses ranging from 5 to 20 nm as the dielectric, and p-type silicon as the semiconductor are fabricated and characterized. It is found that Fowler-Nordheim (F-N) tunneling dominates the gate tunneling current in these devices for oxide thicknesses of 10 nm and larger, whereas for devices with 5 nm oxide, direct tunneling starts to play a role in determining the total gate current. Furthermore, the temperature dependences of the F-N tunneling current for the 10 nm devices are characterized in the temperature range 77-300 K. The F-N coefficients and the effective tunneling barrier height are extracted as a function of temperature. It is found that the effective barrier height decreases with increasing temperature, which is in agreement with the results previously reported for conventional MOS devices with polysilicon or metal gate electrodes. In addition, high frequency capacitance-voltage measurements of these MOS devices are performed, which depict a local capacitance minimum under accumulation for thin oxides. By analyzing the data using numerical calculations based on the modified density of states of graphene in the presence of charged impurities, it is shown that this local minimum is due to the contribution of the quantum capacitance of graphene. Finally, the workfunction of the graphene gate electrode is extracted by determining the flat-band voltage as a function of oxide thickness. These results show that graphene is a promising candidate as the gate electrode in metal-oxide-semiconductor devices.

A Wide-Range Tunable Level-Keeper Using Vertical Metal-Oxide-Semiconductor Field-Effect Transistors for Current-Reuse Systems

Science.gov (United States)

Tanoi, Satoru; Endoh, Tetsuo

2012-04-01

A wide-range tunable level-keeper using vertical metal-oxide-semiconductor field-effect transistors (MOSFETs) is proposed for current-reuse analog systems. The design keys for widening tunable range of the operation are a two-path feed-back and a vertical MOSFET with back-bias-effect free. The proposed circuit with the vertical MOSFETs shows the 1.23-V tunable-range of the input level with the 2.4-V internal-supply voltage (VDD) in the simulation. This tunable-range of the proposed circuit is 4.7 times wider than that of the conventional. The achieved current efficiency of the proposed level-keeper is 66% at the 1.2-V output with the 2.4-V VDD. This efficiency of the proposed circuit is twice higher than that of the traditional voltage down converter.

Lg = 100 nm In0.7Ga0.3As quantum well metal-oxide semiconductor field-effect transistors with atomic layer deposited beryllium oxide as interfacial layer

International Nuclear Information System (INIS)

Koh, D.; Kwon, H. M.; Kim, T.-W.; Veksler, D.; Gilmer, D.; Kirsch, P. D.; Kim, D.-H.; Hudnall, Todd W.; Bielawski, Christopher W.; Maszara, W.; Banerjee, S. K.

2014-01-01

In this study, we have fabricated nanometer-scale channel length quantum-well (QW) metal-oxide-semiconductor field effect transistors (MOSFETs) incorporating beryllium oxide (BeO) as an interfacial layer. BeO has high thermal stability, excellent electrical insulating characteristics, and a large band-gap, which make it an attractive candidate for use as a gate dielectric in making MOSFETs. BeO can also act as a good diffusion barrier to oxygen owing to its small atomic bonding length. In this work, we have fabricated In 0.53 Ga 0.47 As MOS capacitors with BeO and Al 2 O 3 and compared their electrical characteristics. As interface passivation layer, BeO/HfO 2 bilayer gate stack presented effective oxide thickness less 1 nm. Furthermore, we have demonstrated In 0.7 Ga 0.3 As QW MOSFETs with a BeO/HfO 2 dielectric, showing a sub-threshold slope of 100 mV/dec, and a transconductance (g m,max ) of 1.1 mS/μm, while displaying low values of gate leakage current. These results highlight the potential of atomic layer deposited BeO for use as a gate dielectric or interface passivation layer for III–V MOSFETs at the 7 nm technology node and/or beyond

Comparison of junctionless and inversion-mode p-type metal-oxide-semiconductor field-effect transistors in presence of hole-phonon interactions

Energy Technology Data Exchange (ETDEWEB)

Dib, E., E-mail: elias.dib@for.unipi.it [Dipartimento di Ingegneria dell' Informazione, Università di Pisa, 56122 Pisa (Italy); Carrillo-Nuñez, H. [Integrated Systems Laboratory ETH Zürich, Gloriastrasse 35, 8092 Zürich (Switzerland); Cavassilas, N.; Bescond, M. [IM2NP, UMR CNRS 6242, Bât. IRPHE, Technopôle de Château-Gombert, 13384 Marseille Cedex 13 (France)

2016-01-28

Junctionless transistors are being considered as one of the alternatives to conventional metal-oxide field-effect transistors. In this work, it is then presented a simulation study of silicon double-gated p-type junctionless transistors compared with its inversion-mode counterpart. The quantum transport problem is solved within the non-equilibrium Green's function formalism, whereas hole-phonon interactions are tackled by means of the self-consistent Born approximation. Our findings show that junctionless transistors should perform as good as a conventional transistor only for ultra-thin channels, with the disadvantage of requiring higher supply voltages in thicker channel configurations.

Comparison of junctionless and inversion-mode p-type metal-oxide-semiconductor field-effect transistors in presence of hole-phonon interactions

International Nuclear Information System (INIS)

Dib, E.; Carrillo-Nuñez, H.; Cavassilas, N.; Bescond, M.

2016-01-01

Junctionless transistors are being considered as one of the alternatives to conventional metal-oxide field-effect transistors. In this work, it is then presented a simulation study of silicon double-gated p-type junctionless transistors compared with its inversion-mode counterpart. The quantum transport problem is solved within the non-equilibrium Green's function formalism, whereas hole-phonon interactions are tackled by means of the self-consistent Born approximation. Our findings show that junctionless transistors should perform as good as a conventional transistor only for ultra-thin channels, with the disadvantage of requiring higher supply voltages in thicker channel configurations

Ge1−xSix on Ge-based n-type metal–oxide semiconductor field-effect transistors by device simulation combined with high-order stress–piezoresistive relationships

International Nuclear Information System (INIS)

Lee, Chang-Chun; Hsieh, Chia-Ping; Huang, Pei-Chen; Cheng, Sen-Wen; Liao, Ming-Han

2016-01-01

The considerably high carrier mobility of Ge makes Ge-based channels a promising candidate for enhancing the performance of next-generation devices. The n-type metal–oxide semiconductor field-effect transistor (nMOSFET) is fabricated by introducing the epitaxial growth of high-quality Ge-rich Ge 1−x Si x alloys in source/drain (S/D) regions. However, the short channel effect is rarely considered in the performance analysis of Ge-based devices. In this study, the gate-width dependence of a 20 nm Ge-based nMOSFET on electron mobility is investigated. This investigation uses simulated fabrication procedures combined with the relationship of the interaction between stress components and piezoresistive coefficients at high-order terms. Ge 1−x Si x alloys, namely, Ge 0.96 Si 0.04 , Ge 0.93 Si 0.07 , and Ge 0.86 Si 0.14 , are individually tested and embedded into the S/D region of the proposed device layout and are used in the model of stress estimation. Moreover, a 1.0 GPa tensile contact etching stop layer (CESL) is induced to explore the effect of bi-axial stress on device geometry and subsequent mobility variation. Gate widths ranging from 30 nm to 4 μm are examined. Results show a significant change in stress when the width is < 300 nm. This phenomenon becomes notable when the Si in the Ge 1−x Si x alloy is increased. The stress contours of the Ge channel confirm the high stress components induced by the Ge 0.86 Si 0.14 stressor within the device channel. Furthermore, the stresses (S yy ) of the channel in the transverse direction become tensile when CESL is introduced. Furthermore, when pure S/D Ge 1−x Si x alloys are used, a maximum mobility gain of 28.6% occurs with an ~ 70 nm gate width. A 58.4% increase in mobility gain is obtained when a 1.0 GPa CESL is loaded. However, results indicate that gate width is extended to 200 nm at this point. - Highlights: • A 20 nm Ge-based n-channel metal–oxide semiconductor field-effect transistor is investigated

Functional integrity of flexible n-channel metal–oxide–semiconductor field-effect transistors on a reversibly bistable platform

Energy Technology Data Exchange (ETDEWEB)

Alfaraj, Nasir; Hussain, Aftab M.; Torres Sevilla, Galo A.; Ghoneim, Mohamed T.; Rojas, Jhonathan P.; Hussain, Muhammad M., E-mail: MuhammadMustafa.Hussain@kaust.edu.sa [Integrated Nanotechnology Laboratory, Computer, Electrical and Mathematical Sciences and Engineering Division, King Abdullah University of Science and Technology, Thuwal 23955-6900 (Saudi Arabia); Aljedaani, Abdulrahman B. [High-Speed Fluids Imaging Laboratory, Physical Sciences and Engineering Division, King Abdullah University of Science and Technology, Thuwal 23955-6900 (Saudi Arabia)

2015-10-26

Flexibility can bring a new dimension to state-of-the-art electronics, such as rollable displays and integrated circuit systems being transformed into more powerful resources. Flexible electronics are typically hosted on polymeric substrates. Such substrates can be bent and rolled up, but cannot be independently fixed at the rigid perpendicular position necessary to realize rollable display-integrated gadgets and electronics. A reversibly bistable material can assume two stable states in a reversible way: flexibly rolled state and independently unbent state. Such materials are used in cycling and biking safety wristbands and a variety of ankle bracelets for orthopedic healthcare. They are often wrapped around an object with high impulsive force loading. Here, we study the effects of cumulative impulsive force loading on thinned (25 μm) flexible silicon-based n-channel metal–oxide–semiconductor field-effect transistor devices housed on a reversibly bistable flexible platform. We found that the transistors have maintained their high performance level up to an accumulated 180 kN of impact force loading. The gate dielectric layers have maintained their reliability, which is evidenced by the low leakage current densities. Also, we observed low variation in the effective electron mobility values, which manifests that the device channels have maintained their carrier transport properties.

Functional integrity of flexible n-channel metal–oxide–semiconductor field-effect transistors on a reversibly bistable platform

International Nuclear Information System (INIS)

Alfaraj, Nasir; Hussain, Aftab M.; Torres Sevilla, Galo A.; Ghoneim, Mohamed T.; Rojas, Jhonathan P.; Hussain, Muhammad M.; Aljedaani, Abdulrahman B.

2015-01-01

Flexibility can bring a new dimension to state-of-the-art electronics, such as rollable displays and integrated circuit systems being transformed into more powerful resources. Flexible electronics are typically hosted on polymeric substrates. Such substrates can be bent and rolled up, but cannot be independently fixed at the rigid perpendicular position necessary to realize rollable display-integrated gadgets and electronics. A reversibly bistable material can assume two stable states in a reversible way: flexibly rolled state and independently unbent state. Such materials are used in cycling and biking safety wristbands and a variety of ankle bracelets for orthopedic healthcare. They are often wrapped around an object with high impulsive force loading. Here, we study the effects of cumulative impulsive force loading on thinned (25 μm) flexible silicon-based n-channel metal–oxide–semiconductor field-effect transistor devices housed on a reversibly bistable flexible platform. We found that the transistors have maintained their high performance level up to an accumulated 180 kN of impact force loading. The gate dielectric layers have maintained their reliability, which is evidenced by the low leakage current densities. Also, we observed low variation in the effective electron mobility values, which manifests that the device channels have maintained their carrier transport properties

Functional integrity of flexible n-channel metal–oxide–semiconductor field-effect transistors on a reversibly bistable platform

KAUST Repository

Alfaraj, Nasir; Hussain, Aftab M.; Torres Sevilla, Galo A.; Ghoneim, Mohamed T.; Rojas, Jhonathan Prieto; Aljedaani, Abdulrahman B.; Hussain, Muhammad Mustafa

2015-01-01

Flexibility can bring a new dimension to state-of-the-art electronics, such as rollable displays and integrated circuit systems being transformed into more powerful resources. Flexible electronics are typically hosted on polymeric substrates. Such substrates can be bent and rolled up, but cannot be independently fixed at the rigid perpendicular position necessary to realize rollable display-integrated gadgets and electronics. A reversibly bistable material can assume two stable states in a reversible way: flexibly rolled state and independently unbent state. Such materials are used in cycling and biking safety wristbands and a variety of ankle bracelets for orthopedic healthcare. They are often wrapped around an object with high impulsive force loading. Here, we study the effects of cumulative impulsive force loading on thinned (25 μm) flexible silicon-based n-channel metal–oxide–semiconductor field-effect transistor devices housed on a reversibly bistable flexible platform. We found that the transistors have maintained their high performance level up to an accumulated 180 kN of impact force loading. The gate dielectric layers have maintained their reliability, which is evidenced by the low leakage current densities. Also, we observed low variation in the effective electron mobility values, which manifests that the device channels have maintained their carrier transport properties.

Electrostatic analysis of n-doped SrTiO3 metal-insulator-semiconductor systems

International Nuclear Information System (INIS)

Kamerbeek, A. M.; Banerjee, T.; Hueting, R. J. E.

2015-01-01

Electron doped SrTiO 3 , a complex-oxide semiconductor, possesses novel electronic properties due to its strong temperature and electric-field dependent permittivity. Due to the high permittivity, metal/n-SrTiO 3 systems show reasonably strong rectification even when SrTiO 3 is degenerately doped. Our experiments show that the insertion of a sub nanometer layer of AlO x in between the metal and n-SrTiO 3 interface leads to a dramatic reduction of the Schottky barrier height (from around 0.90 V to 0.25 V). This reduces the interface resistivity by 4 orders of magnitude. The derived electrostatic analysis of the metal-insulator-semiconductor (n-SrTiO 3 ) system is consistent with this trend. When compared with a Si based MIS system, the change is much larger and mainly governed by the high permittivity of SrTiO 3 . The non-linear permittivity of n-SrTiO 3 leads to unconventional properties such as a temperature dependent surface potential non-existent for semiconductors with linear permittivity such as Si. This allows tuning of the interfacial band alignment, and consequently the Schottky barrier height, in a much more drastic way than in conventional semiconductors

Method of making a self-aligned schottky metal semi-conductor field effect transistor with buried source and drain

International Nuclear Information System (INIS)

Bol, I.

1984-01-01

A semi-conductor structure and particularly a high speed VLSI Self-Aligned Schottky Metal Semi-Conductor Field Effect Transistor with buried source and drain, fabricated by the ion implantation of source and drain areas at a predetermined range of depths followed by very localized laser annealing to electrically reactivate the amorphous buried source and drain areas thereby providing effective vertical separation of the channel from the buried source and drain respectively. Accordingly, spatial separations between the self-aligned gate-to-drain, and gate-to-source can be relatively very closely controlled by varying the doping intensity and duration of the implantation thereby reducing the series resistance and increasing the operating speed

Analysis of the effect of interface state charges on threshold voltage and transconductance of 6H-SiC N-channel MOSFET

International Nuclear Information System (INIS)

Tang Xiaoyan; Zhang Yimen; Zhang Yuming

2002-01-01

The effect of interface state charges on the threshold voltage and transconductance of 6H-SiC N-channel metal-oxide semiconductor field-effect transistor (MOSFET) is analyzed based on the non-uniformly distributed interface state density in the band gap and incomplete impurity ionization in silicon carbide. The results show that the nonuniform distribution of interface state density cause not only the increment of the threshold voltage but also the degradation of the transconductance of MOSFET so that it is one of the important factors to influence the characteristics of SiC MOSFET

Mechanisms of current flow in metal-semiconductor ohmic contacts

International Nuclear Information System (INIS)

Blank, T. V.; Gol'dberg, Yu. A.

2007-01-01

Published data on the properties of metal-semiconductor ohmic contacts and mechanisms of current flow in these contacts (thermionic emission, field emission, thermal-field emission, and also current flow through metal shunts) are reviewed. Theoretical dependences of the resistance of an ohmic contact on temperature and the charge-carrier concentration in a semiconductor were compared with experimental data on ohmic contacts to II-VI semiconductors (ZnSe, ZnO), III-V semiconductors (GaN, AlN, InN, GaAs, GaP, InP), Group IV semiconductors (SiC, diamond), and alloys of these semiconductors. In ohmic contacts based on lightly doped semiconductors, the main mechanism of current flow is thermionic emission with the metal-semiconductor potential barrier height equal to 0.1-0.2 eV. In ohmic contacts based on heavily doped semiconductors, the current flow is effected owing to the field emission, while the metal-semiconductor potential barrier height is equal to 0.3-0.5 eV. In alloyed In contacts to GaP and GaN, a mechanism of current flow that is not characteristic of Schottky diodes (current flow through metal shunts formed by deposition of metal atoms onto dislocations or other imperfections in semiconductors) is observed

Magnetotransport investigations of the two-dimensional metallic state in silicon metal-oxid-semiconductor structures

International Nuclear Information System (INIS)

Prinz, A.

2002-03-01

For more than two decades it was the predominant view among the physical community that the every two-dimensional (2D) disordered electron system becomes insulating as the temperature approaches the absolute zero temperature (0 Kelvin or -273.15 o C). Two-dimensional means that the movement of the charge carriers is confined in one direction by a potential so that the carriers can move freely only perpendicular to the confinement. The most famous physical realization of a 2D system is the silicon metal-oxide-semiconductor field effect transistor (Si-MOSFET). It is one of the basic elements of most electronic devices in our daily life. The working principle is very simple. Charges are attracted to the semiconductor-oxide interface by an electric field applied between the metallic gate and the semiconductor, so that a 2D conductive channel is formed. The charge density can be adjusted by the voltage from zero up to 10 13 cm -2 . In 1994 Kravchenko and coworkers made a very important discovery. They studied high mobility Si-MOSFETs and found that for densities below a certain critical value, nc, the resistivity increases as the temperature is decreased below 2 K, whereas for densities above $n c $ the resistivity decreases unexpectedly. The transition from insulating to metallic behavior, known as metal-insulator transition (MIT), was obviously a contradiction to the commonly accepted theories which predict insulating behavior for any density. The insulating behavior is a consequence of the wave properties of electrons which leads to interference in disordered media and thus to enhanced backscattering. In the subsequent years, experimental studies were performed on a variety of 2D systems, which qualitatively showed a similar behavior. All the investigated samples had one thing in common. The interaction energy between the carriers was considerable higher than their mean kinetic energy due to their movement in the 2D plane. Since the electron-electron interaction was

Band-to-band tunneling in a carbon nanotube metal-oxide-semiconductor field-effect transistor is dominated by phonon-assisted tunneling.

Science.gov (United States)

Koswatta, Siyuranga O; Lundstrom, Mark S; Nikonov, Dmitri E

2007-05-01

Band-to-band tunneling (BTBT) devices have recently gained a lot of interest due to their potential for reducing power dissipation in integrated circuits. We have performed extensive simulations for the BTBT operation of carbon nanotube metal-oxide-semiconductor field-effect transistors (CNT-MOSFETs) using the nonequilibrium Green's function formalism for both ballistic and dissipative quantum transport. In comparison with recently reported experimental data (J. Am. Chem. Soc. 2006, 128, 3518-3519), we have obtained strong evidence that BTBT in CNT-MOSFETs is dominated by optical phonon assisted inelastic transport, which can have important implications on the transistor characteristics. It is shown that, under large biasing conditions, two-phonon scattering may also become important.

Stress Characterization of 4H-SiC Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) using Raman Spectroscopy and the Finite Element Method.

Science.gov (United States)

Yoshikawa, Masanobu; Kosaka, Kenichi; Seki, Hirohumi; Kimoto, Tsunenobu

2016-07-01

We measured the depolarized and polarized Raman spectra of a 4H-SiC metal-oxide-semiconductor field-effect transistor (MOSFET) and found that compressive stress of approximately 20 MPa occurs under the source and gate electrodes and tensile stress of approximately 10 MPa occurs between the source and gate electrodes. The experimental result was in close agreement with the result obtained by calculation using the finite element method (FEM). A combination of Raman spectroscopy and FEM provides much data on the stresses in 4H-SiC MOSFET. © The Author(s) 2016.

Strained Si channel NMOSFETs using a stress field with Si1-yC y source and drain stressors

International Nuclear Information System (INIS)

Chang, S.T.; Tasi, H.-S.; Kung, C.Y.

2006-01-01

The strain field in the silicon channel of a metal-oxide-semiconductor transistor with silicon-carbon alloy source and drain stressors was evaluated using the commercial process simulator FLOOPS-ISE TM . The physical origin of the strain components in the transistor channel region was explained. The magnitude and distribution of the strain components, and their dependence on device design parameters such as the spacing L G between the silicon-carbon alloy stressors, the carbon mole fraction in the stressors and stressor depth were investigated. Reducing the stressor spacing L G or increasing the carbon mole fraction in the stressors and stressor depth increases the magnitude of the vertical compressive stress and the lateral tensile stress in the portion of the N channel region where the inversion charge resides. This is beneficial for improving the electron mobility in n-channel metal-oxide-semiconductor transistors. A simple guiding principle for an optimum combination of the above-mentioned device design parameters in terms of mobility enhancement, drain current enhancement and the tradeoff consideration for junction leakage current degradation

Plasma-assisted atomic layer deposition of TiN/Al2O3 stacks for metal-oxide-semiconductor capacitor applications

NARCIS (Netherlands)

Hoogeland, D.; Jinesh, K.B.; Roozeboom, F.; Besling, W.F.A.; Sanden, van de M.C.M.; Kessels, W.M.M.

2009-01-01

By employing plasma-assisted atomic layer deposition, thin films of Al2O3 and TiN are subsequently deposited in a single reactor at a single substrate temperature with the objective of fabricating high-quality TiN/Al2O3 / p-Si metal-oxide-semiconductor capacitors. Transmission electron microscopy

Quasi-Two-Dimensional h-BN/β-Ga2O3 Heterostructure Metal-Insulator-Semiconductor Field-Effect Transistor.

Science.gov (United States)

Kim, Janghyuk; Mastro, Michael A; Tadjer, Marko J; Kim, Jihyun

2017-06-28

β-gallium oxide (β-Ga 2 O 3 ) and hexagonal boron nitride (h-BN) heterostructure-based quasi-two-dimensional metal-insulator-semiconductor field-effect transistors (MISFETs) were demonstrated by integrating mechanical exfoliation of (quasi)-two-dimensional materials with a dry transfer process, wherein nanothin flakes of β-Ga 2 O 3 and h-BN were utilized as the channel and gate dielectric, respectively, of the MISFET. The h-BN dielectric, which has an extraordinarily flat and clean surface, provides a minimal density of charged impurities on the interface between β-Ga 2 O 3 and h-BN, resulting in superior device performances (maximum transconductance, on/off ratio, subthreshold swing, and threshold voltage) compared to those of the conventional back-gated configurations. Also, double-gating of the fabricated device was demonstrated by biasing both top and bottom gates, achieving the modulation of the threshold voltage. This heterostructured wide-band-gap nanodevice shows a new route toward stable and high-power nanoelectronic devices.

Ge{sub 1−x}Si{sub x} on Ge-based n-type metal–oxide semiconductor field-effect transistors by device simulation combined with high-order stress–piezoresistive relationships

Energy Technology Data Exchange (ETDEWEB)

Lee, Chang-Chun, E-mail: changchunlee@cycu.edu.tw [Department of Mechanical Engineering, Chung Yuan Christian University 200, Chung Pei Rd., Chungli City, Taoyuan County 32023, Taiwan, ROC (China); Hsieh, Chia-Ping [Department of Mechanical Engineering, National Taiwan University, No. 1, Sec. 4, Roosevelt Road, Taipei 10617, Taiwan, ROC (China); Huang, Pei-Chen; Cheng, Sen-Wen [Department of Mechanical Engineering, Chung Yuan Christian University 200, Chung Pei Rd., Chungli City, Taoyuan County 32023, Taiwan, ROC (China); Liao, Ming-Han [Department of Mechanical Engineering, National Taiwan University, No. 1, Sec. 4, Roosevelt Road, Taipei 10617, Taiwan, ROC (China)

2016-03-01

The considerably high carrier mobility of Ge makes Ge-based channels a promising candidate for enhancing the performance of next-generation devices. The n-type metal–oxide semiconductor field-effect transistor (nMOSFET) is fabricated by introducing the epitaxial growth of high-quality Ge-rich Ge{sub 1−x}Si{sub x} alloys in source/drain (S/D) regions. However, the short channel effect is rarely considered in the performance analysis of Ge-based devices. In this study, the gate-width dependence of a 20 nm Ge-based nMOSFET on electron mobility is investigated. This investigation uses simulated fabrication procedures combined with the relationship of the interaction between stress components and piezoresistive coefficients at high-order terms. Ge{sub 1−x}Si{sub x} alloys, namely, Ge{sub 0.96}Si{sub 0.04}, Ge{sub 0.93}Si{sub 0.07}, and Ge{sub 0.86}Si{sub 0.14}, are individually tested and embedded into the S/D region of the proposed device layout and are used in the model of stress estimation. Moreover, a 1.0 GPa tensile contact etching stop layer (CESL) is induced to explore the effect of bi-axial stress on device geometry and subsequent mobility variation. Gate widths ranging from 30 nm to 4 μm are examined. Results show a significant change in stress when the width is < 300 nm. This phenomenon becomes notable when the Si in the Ge{sub 1−x}Si{sub x} alloy is increased. The stress contours of the Ge channel confirm the high stress components induced by the Ge{sub 0.86}Si{sub 0.14} stressor within the device channel. Furthermore, the stresses (S{sub yy}) of the channel in the transverse direction become tensile when CESL is introduced. Furthermore, when pure S/D Ge{sub 1−x}Si{sub x} alloys are used, a maximum mobility gain of 28.6% occurs with an ~ 70 nm gate width. A 58.4% increase in mobility gain is obtained when a 1.0 GPa CESL is loaded. However, results indicate that gate width is extended to 200 nm at this point. - Highlights: • A 20 nm Ge-based n-channel

Field isolation for GaN MOSFETs on AlGaN/GaN heterostructure with boron ion implantation

International Nuclear Information System (INIS)

Jiang, Y; Wang, Q P; Wang, D J; Tamai, K; Li, L A; Ao, J-P; Ohno, Y; Shinkai, S; Miyashita, T; Motoyama, S-I

2014-01-01

We report the investigation of boron ion implantation as a device field isolation process for GaN metal-oxide-semiconductor field-effect transistors (MOSFETs) on AlGaN/GaN heterostructure. In the mesa isolation region of a bar-type MOSFET, a parasitic MOS-channel existed and widened the designed channel width, which would result in an overestimated mobility compared with a ring-type MOSFET. After boron ions implantation in the isolation region, the overestimation of field-effect mobility of bar-type MOSFETs was eliminated. The sub-threshold characteristics and on-state drain current of the bar-type MOSFETs coincide with the ring-type devices. Long-channel ring-type MOSFETs, with and without ion implantation, were fabricated on the recess region to evaluate the sub-threshold characteristics. The MOSFETs with boron ions implanted into the recess region showed a low drain current up to the gate bias of 10V. The result indicated that boron ion implantation prevented the formation of parasitic MOS-channel in the isolation region and achieved field isolation. The current–voltage characteristics of MOSFETs with the normal recess condition demonstrated no degradation of device performance after boron ions implanted into the isolation region. Boron ion implantation by further optimization can be a field isolation method for GaN MOSFETs. (paper)

Positive and negative gain exceeding unity magnitude in silicon quantum well metal-oxide-semiconductor transistors

Science.gov (United States)

Hu, Gangyi; Wijesinghe, Udumbara; Naquin, Clint; Maggio, Ken; Edwards, H. L.; Lee, Mark

2017-10-01

Intrinsic gain (AV) measurements on Si quantum well (QW) n-channel metal-oxide-semiconductor (NMOS) transistors show that these devices can have |AV| > 1 in quantum transport negative transconductance (NTC) operation at room temperature. QW NMOS devices were fabricated using an industrial 45 nm technology node process incorporating ion implanted potential barriers to define a lateral QW in the conduction channel under the gate. While NTC at room temperature arising from transport through gate-controlled QW bound states has been previously established, it was unknown whether the quantum NTC mechanism could support gain magnitude exceeding unity. Bias conditions were found giving both positive and negative AV with |AV| > 1 at room temperature. This result means that QW NMOS devices could be useful in amplifier and oscillator applications.

Positron annihilation studies in the field induced depletion regions of metal-oxide-semiconductor structures

Science.gov (United States)

Asoka-Kumar, P.; Leung, T. C.; Lynn, K. G.; Nielsen, B.; Forcier, M. P.; Weinberg, Z. A.; Rubloff, G. W.

1992-06-01

The centroid shifts of positron annihilation spectra are reported from the depletion regions of metal-oxide-semiconductor (MOS) capacitors at room temperature and at 35 K. The centroid shift measurement can be explained using the variation of the electric field strength and depletion layer thickness as a function of the applied gate bias. An estimate for the relevant MOS quantities is obtained by fitting the centroid shift versus beam energy data with a steady-state diffusion-annihilation equation and a derivative-gaussian positron implantation profile. Inadequacy of the present analysis scheme is evident from the derived quantities and alternate methods are required for better predictions.

Positron annihilation studies in the field induced depletion regions of metal-oxide-semiconductor structures

International Nuclear Information System (INIS)

Asoka-Kumar, P.; Leung, T.C.; Lynn, K.G.; Nielsen, B.; Forcier, M.P.; Weinberg, Z.A.; Rubloff, G.W.

1992-01-01

The centroid shifts of positron annihilation spectra are reported from the depletion regions of metal-oxide-semiconductor (MOS) capacitors at room temperature and at 35 K. The centroid shift measurement can be explained using the variation of the electric field strength and depletion layer thickness as a function of the applied gate bias. An estimate for the relevant MOS quantities is obtained by fitting the centroid shift versus beam energy data with a steady-state diffusion-annihilation equation and a derivative-gaussian positron implantation profile. Inadequacy of the present analysis scheme is evident from the derived quantities and alternate methods are required for better predictions

Amphoteric oxide semiconductors for energy conversion devices: a tutorial review.

Science.gov (United States)

Singh, Kalpana; Nowotny, Janusz; Thangadurai, Venkataraman

2013-03-07

In this tutorial review, we discuss the defect chemistry of selected amphoteric oxide semiconductors in conjunction with their significant impact on the development of renewable and sustainable solid state energy conversion devices. The effect of electronic defect disorders in semiconductors appears to control the overall performance of several solid-state ionic devices that include oxide ion conducting solid oxide fuel cells (O-SOFCs), proton conducting solid oxide fuel cells (H-SOFCs), batteries, solar cells, and chemical (gas) sensors. Thus, the present study aims to assess the advances made in typical n- and p-type metal oxide semiconductors with respect to their use in ionic devices. The present paper briefly outlines the key challenges in the development of n- and p-type materials for various applications and also tries to present the state-of-the-art of defect disorders in technologically related semiconductors such as TiO(2), and perovskite-like and fluorite-type structure metal oxides.

Si3N4/Si/In0.05Ga0.95As/n endash GaAs metal endash insulator endash semiconductor devices

International Nuclear Information System (INIS)

Park, D.; Li, D.; Tao, M.; Fan, Z.; Botchkarev, A.E.; Mohammad, S.N.; Morkoc, H.

1997-01-01

We report a novel metal endash insulator endash semiconductor (MIS) structure exhibiting a pseudomorphic In 0.05 Ga 0.95 As layer on GaAs with interface state densities in the low 10 11 eV -1 cm -2 . The structure was grown by a combination of molecular beam epitaxy and chemical vapor deposition methods. The hysteresis and frequency dispersion of the MIS capacitor were lower than 100 mV, some of them as low as 30 mV under a field swing of about ±1.3 MV/cm. The 150-Angstrom-thick In 0.05 Ga 0.95 As channel between Si and GaAs is found to bring about a change in the minority carrier recombination behavior of the GaAs channel, in the same way as done by In 0.53 Ga 0.47 As channel MIS structures. Self-aligned gate depletion mode In 0.05 Ga 0.95 As metal endash insulator endash semiconductor field-effect transistors having 3 μm gate lengths exhibited field-effect bulk mobility of 1400 cm 2 /Vs and transconductances of about 170 mS/mm. copyright 1997 American Institute of Physics

Controlling the interface charge density in GaN-based metal-oxide-semiconductor heterostructures by plasma oxidation of metal layers

International Nuclear Information System (INIS)

Hahn, Herwig; Kalisch, Holger; Vescan, Andrei; Pécz, Béla; Kovács, András; Heuken, Michael

2015-01-01

In recent years, investigating and engineering the oxide-semiconductor interface in GaN-based devices has come into focus. This has been driven by a large effort to increase the gate robustness and to obtain enhancement mode transistors. Since it has been shown that deep interface states act as fixed interface charge in the typical transistor operating regime, it appears desirable to intentionally incorporate negative interface charge, and thus, to allow for a positive shift in threshold voltage of transistors to realise enhancement mode behaviour. A rather new approach to obtain such negative charge is the plasma-oxidation of thin metal layers. In this study, we present transmission electron microscopy and energy dispersive X-ray spectroscopy analysis as well as electrical data for Al-, Ti-, and Zr-based thin oxide films on a GaN-based heterostructure. It is shown that the plasma-oxidised layers have a polycrystalline morphology. An interfacial amorphous oxide layer is only detectable in the case of Zr. In addition, all films exhibit net negative charge with varying densities. The Zr layer is providing a negative interface charge density of more than 1 × 10 13  cm –2 allowing to considerably shift the threshold voltage to more positive values

Effect of AlN growth temperature on trap densities of in-situ metal-organic chemical vapor deposition grown AlN/AlGaN/GaN metal-insulator-semiconductor heterostructure field-effect transistors

Directory of Open Access Journals (Sweden)

Joseph J. Freedsman

2012-06-01

Full Text Available The trapping properties of in-situ metal-organic chemical vapor deposition (MOCVD grown AlN/AlGaN/GaN metal-insulator-semiconductor heterostructure field-effect transistors (MIS-HFETs with AlN layers grown at 600 and 700 °C has been quantitatively analyzed by frequency dependent parallel conductance technique. Both the devices exhibited two kinds of traps densities, due to AlN (DT-AlN and AlGaN layers (DT-AlGaN respectively. The MIS-HFET grown at 600 °C showed a minimum DT-AlN and DT-AlGaN of 1.1 x 1011 and 1.2 x 1010 cm-2eV-1 at energy levels (ET -0.47 and -0.36 eV. Further, the gate-lag measurements on these devices revealed less degradation ∼ ≤ 5% in drain current density (Ids-max. Meanwhile, MIS-HFET grown at 700 °C had more degradation in Ids-max ∼26 %, due to high DT-AlN and DT-AlGaN of 3.4 x 1012 and 5 x 1011 cm-2eV-1 positioned around similar ET. The results shows MIS-HFET grown at 600 °C had better device characteristics with trap densities one order of magnitude lower than MIS-HFET grown at 700 °C.

Physical and electrical characteristics of AlGaN/GaN metal-oxide-semiconductor high-electron-mobility transistors with rare earth Er2O3 as a gate dielectric

International Nuclear Information System (INIS)

Lin, Ray-Ming; Chu, Fu-Chuan; Das, Atanu; Liao, Sheng-Yu; Chou, Shu-Tsun; Chang, Liann-Be

2013-01-01

In this study, the rare earth erbium oxide (Er 2 O 3 ) was deposited using an electron beam onto an AlGaN/GaN heterostructure to fabricate metal-oxide-semiconductor high-electron-mobility transistors (MOS–HEMTs) that exhibited device performance superior to that of a conventional HEMT. Under similar bias conditions, the gate leakage currents of these MOS–HEMT devices were four orders of magnitude lower than those of conventional Schottky gate HEMTs. The measured sub-threshold swing (SS) and the effective trap state density (N t ) of the MOS–HEMT were 125 mV/decade and 4.3 × 10 12 cm −2 , respectively. The dielectric constant of the Er 2 O 3 layer in this study was 14, as determined through capacitance–voltage measurements. In addition, the gate–source reverse breakdown voltage increased from –166 V for the conventional HEMT to –196 V for the Er 2 O 3 MOS–HEMT. - Highlights: ► GaN/AlGaN/Er 2 O 3 metal-oxide semiconductor high electron mobility transistor ► Physical and electrical characteristics are presented. ► Electron beam evaporated Er 2 O 3 with excellent surface roughness ► Device exhibits reduced gate leakage current and improved I ON /I OFF ratio

Technique for producing highly planar Si/SiO0.64Ge0.36/Si metal-oxide-semiconductor field effect transistor channels

Science.gov (United States)

Grasby, T. J.; Parry, C. P.; Phillips, P. J.; McGregor, B. M.; Morris, , R. J. H.; Braithwaite, G.; Whall, T. E.; Parker, E. H. C.; Hammond, R.; Knights, A. P.; Coleman, P. G.

1999-03-01

Si/Si0.64Ge0.36/Si heterostructures have been grown at low temperature (450 °C) to avoid the strain-induced roughening observed for growth temperatures of 550 °C and above. The electrical properties of these structures are poor, and thought to be associated with grown-in point defects as indicated in positron annihilation spectroscopy. However, after an in situ annealing procedure (800 °C for 30 min) the electrical properties dramatically improve, giving an optimum 4 K mobility of 2500 cm2 V-1 s-1 for a sheet density of 6.2×1011 cm-2. The low temperature growth yields highly planar interfaces, which are maintained after anneal as evidenced from transmission electron microscopy. This and secondary ion mass spectroscopy measurements demonstrate that the metastably strained alloy layer can endure the in situ anneal procedure necessary for enhanced electrical properties. Further studies have shown that the layers can also withstand a 120 min thermal oxidation at 800 °C, commensurate with metal-oxide-semiconductor device fabrication.

Dimensional optimization of nanowire--complementary metal oxide--semiconductor inverter.

Science.gov (United States)

Hashim, Yasir; Sidek, Othman

2013-01-01

This study is the first to demonstrate dimensional optimization of nanowire-complementary metal-oxide-semiconductor inverter. Noise margins and inflection voltage of transfer characteristics are used as limiting factors in this optimization. Results indicate that optimization depends on both dimensions ratio and digital voltage level (Vdd). Diameter optimization reveals that when Vdd increases, the optimized value of (Dp/Dn) decreases. Channel length optimization results show that when Vdd increases, the optimized value of Ln decreases and that of (Lp/Ln) increases. Dimension ratio optimization reveals that when Vdd increases, the optimized value of Kp/Kn decreases, and silicon nanowire transistor with suitable dimensions (higher Dp and Ln with lower Lp and Dn) can be fabricated.

Extraordinary Magnetoresistance Effect in Semiconductor/Metal Hybrid Structure

KAUST Repository

Sun, Jian

2013-06-27

In this dissertation, the extraordinary magnetoresistance (EMR) effect in semiconductor/metal hybrid structures is studied to improve the performance in sensing applications. Using two-dimensional finite element simulations, the geometric dependence of the output sensitivity, which is a more relevant parameter for EMR sensors than the magnetoresistance (MR), is studied. The results show that the optimal geometry in this case is different from the geometry reported before, where the MR ratio was optimized. A device consisting of a semiconductor bar with length/width ratio of 5~10 and having only 2 contacts is found to exhibit the highest sensitivity. A newly developed three-dimensional finite element model is employed to investigate parameters that have been neglected with the two dimensional simulations utilized so far, i.e., thickness of metal shunt and arbitrary semiconductor/metal interface. The simulations show the influence of those parameters on the sensitivity is up to 10 %. The model also enables exploring the EMR effect in planar magnetic fields. In case of a bar device, the sensitivity to planar fields is about 15 % to 20 % of the one to perpendicular fields. 5 A “top-contacted” structure is proposed to reduce the complexity of fabrication, where neither patterning of the semiconductor nor precise alignment is required. A comparison of the new structure with a conventionally fabricated device shows that a similar magnetic field resolution of 24 nT/√Hz is obtained. A new 3-contact device is developed improving the poor low-field sensitivity observed in conventional EMR devices, resulting from its parabolic magnetoresistance response. The 3-contact device provides a considerable boost of the low field response by combining the Hall effect with the EMR effect, resulting in an increase of the output sensitivity by 5 times at 0.01 T compared to a 2-contact device. The results of this dissertation provide new insights into the optimization of EMR devices

Generation of uniaxial tensile strain of over 1% on a Ge substrate for short-channel strained Ge n-type Metal–Insulator–Semiconductor Field-Effect Transistors with SiGe stressors

International Nuclear Information System (INIS)

Moriyama, Yoshihiko; Kamimuta, Yuuichi; Ikeda, Keiji; Tezuka, Tsutomu

2012-01-01

Tensile strain of over 1% in Ge stripes sandwiched between a pair of SiGe source-drain stressors was demonstrated. The Metal–Oxide–Semiconductor Field-Effect Transistor (MOSFET)-like structures were fabricated on a (001)-Ge substrate having SiO 2 dummy-gate stripes with widths down to 26 nm. Recess-regions adjacent to the dummy-gate stripes were formed by an anisotropic wet etching technique. A damage-free and well-controlled anisotropic wet etching process is developed in order to avoid plasma-induced damage during a conventional Reactive-ion Etching process. The SiGe stressors were epitaxially grown on the recesses to simulate strained Ge n-channel Metal–Insulator–Semiconductor Field-Effect Transistors (MISFETs) having high electron mobility. A micro-Raman spectroscopy measurement revealed tensile strain in the narrow Ge regions which became higher for narrower regions. Tensile strain of up to 1.2% was evaluated from the measurement under an assumption of uniaxial strain configuration. These results strongly suggest that higher electron mobility than the upper limit for a Si-MOSFET is obtainable in short-channel strained Ge-nMISFETs with the embedded SiGe stressors.

Bisacenaphthopyrazinoquinoxaline derivatives: Synthesis, physical properties and applications as semiconductors for n-channel field effect transistors

KAUST Repository

Tong, Chenhua

2013-01-01

Several bisacenaphthopyrazinoquinoxaline (BAPQ) based derivatives 1-3 were synthesized by condensation between the acenaphthenequinones and 1,2,4,5-tetraaminobenzene tetrahydrochloride. Their optical, electrochemical and self-assembling properties are tuned by different substituents. Among them, compound 3 possesses a homogeneously distributed low-lying LUMO due to the peripheral substitution with four cyano groups. The corresponding n-channel field effect transistors showed a field effect electron mobility of 5 × 10-3 cm2 V-1 s-1. © 2013 The Royal Society of Chemistry.

Photochemical Hydrogen Doping Induced Embedded Two-Dimensional Metallic Channel Formation in InGaZnO at Room Temperature.

Science.gov (United States)

Kim, Myeong-Ho; Lee, Young-Ahn; Kim, Jinseo; Park, Jucheol; Ahn, Seungbae; Jeon, Ki-Joon; Kim, Jeong Won; Choi, Duck-Kyun; Seo, Hyungtak

2015-10-27

The photochemical tunability of the charge-transport mechanism in metal-oxide semiconductors is of great interest since it may offer a facile but effective semiconductor-to-metal transition, which results from photochemically modified electronic structures for various oxide-based device applications. This might provide a feasible hydrogen (H)-radical doping to realize the effectively H-doped metal oxides, which has not been achieved by thermal and ion-implantation technique in a reliable and controllable way. In this study, we report a photochemical conversion of InGaZnO (IGZO) semiconductor to a transparent conductor via hydrogen doping to the local nanocrystallites formed at the IGZO/glass interface at room temperature. In contrast to thermal or ionic hydrogen doping, ultraviolet exposure of the IGZO surface promotes a photochemical reaction with H radical incorporation to surface metal-OH layer formation and bulk H-doping which acts as a tunable and stable highly doped n-type doping channel and turns IGZO to a transparent conductor. This results in the total conversion of carrier conduction property to the level of metallic conduction with sheet resistance of ∼16 Ω/□, room temperature Hall mobility of 11.8 cm(2) V(-1) sec(-1), the carrier concentration at ∼10(20) cm(-3) without any loss of optical transparency. We demonstrated successful applications of photochemically highly n-doped metal oxide via optical dose control to transparent conductor with excellent chemical and optical doping stability.

Positron studies of metal-oxide-semiconductor structures

Science.gov (United States)

Au, H. L.; Asoka-Kumar, P.; Nielsen, B.; Lynn, K. G.

1993-03-01

Positron annihilation spectroscopy provides a new probe to study the properties of interface traps in metal-oxide semiconductors (MOS). Using positrons, we have examined the behavior of the interface traps as a function of gate bias. We propose a simple model to explain the positron annihilation spectra from the interface region of a MOS capacitor.

Short-channel drain current model for asymmetric heavily/lightly ...

Indian Academy of Sciences (India)

The paper presents a drain current model for double gate metal oxide semiconductor field effect transistors (DG MOSFETs) based on a new velocity saturation model that accounts for short-channel velocity saturation effect independently in the front and the back gate controlled channels under asymmetric front and back ...

Mechanical anomaly impact on metal-oxide-semiconductor capacitors on flexible silicon fabric

KAUST Repository

Ghoneim, Mohamed T.; Kutbee, Arwa T.; Ghodsi Nasseri, Seyed Faizelldin; Bersuker, G.; Hussain, Muhammad Mustafa

2014-01-01

We report the impact of mechanical anomaly on high-κ/metal-oxide-semiconductor capacitors built on flexible silicon (100) fabric. The mechanical tests include studying the effect of bending radius up to 5 mm minimum bending radius with respect

Semiconductor-metal transition induced by giant Stark effect in blue phosphorene nanoribbons

Energy Technology Data Exchange (ETDEWEB)

Xiong, Peng-Yu; Chen, Shi-Zhang; Zhou, Wu-Xing; Chen, Ke-Qiu, E-mail: keqiuchen@hnu.edu.cn

2017-06-28

The electronic structures and transport properties in monolayer blue phosphorene nanoribbons (BPNRs) with transverse electric field have been studied by using density functional theory and nonequilibrium Green's functions method. The results show that the band gaps of BPNRs with both armchair and zigzag edges are linearly decreased with the increasing of the strength of transverse electric field. A semiconductor-metal transition occurs when the electric field strength reaches to 5 V/nm. The Stark coefficient presents a linear dependency on BPNRs widths, and the slopes of both zBPNRs and aBPNRs are 0.41 and 0.54, respectively, which shows a giant Stark effect occurs. Our studies show that the semiconductor-metal transition originates from the giant Stark effect. - Highlights: • The electronic transport in blue phosphorene nanoribbons. • Semiconductor-metal transition can be observed. • The semiconductor-metal transition originates from the giant Stark effect.

Vertically integrated, three-dimensional nanowire complementary metal-oxide-semiconductor circuits.

Science.gov (United States)

Nam, SungWoo; Jiang, Xiaocheng; Xiong, Qihua; Ham, Donhee; Lieber, Charles M

2009-12-15

Three-dimensional (3D), multi-transistor-layer, integrated circuits represent an important technological pursuit promising advantages in integration density, operation speed, and power consumption compared with 2D circuits. We report fully functional, 3D integrated complementary metal-oxide-semiconductor (CMOS) circuits based on separate interconnected layers of high-mobility n-type indium arsenide (n-InAs) and p-type germanium/silicon core/shell (p-Ge/Si) nanowire (NW) field-effect transistors (FETs). The DC voltage output (V(out)) versus input (V(in)) response of vertically interconnected CMOS inverters showed sharp switching at close to the ideal value of one-half the supply voltage and, moreover, exhibited substantial DC gain of approximately 45. The gain and the rail-to-rail output switching are consistent with the large noise margin and minimal static power consumption of CMOS. Vertically interconnected, three-stage CMOS ring oscillators were also fabricated by using layer-1 InAs NW n-FETs and layer-2 Ge/Si NW p-FETs. Significantly, measurements of these circuits demonstrated stable, self-sustained oscillations with a maximum frequency of 108 MHz, which represents the highest-frequency integrated circuit based on chemically synthesized nanoscale materials. These results highlight the flexibility of bottom-up assembly of distinct nanoscale materials and suggest substantial promise for 3D integrated circuits.

Large spin-valve effect in a lateral spin-valve device based on ferromagnetic semiconductor GaMnAs

Science.gov (United States)

Asahara, Hirokatsu; Kanaki, Toshiki; Ohya, Shinobu; Tanaka, Masaaki

2018-03-01

We investigate the spin-dependent transport properties of a lateral spin-valve device based on the ferromagnetic semiconductor GaMnAs. This device is composed of a GaMnAs channel layer grown on GaAs with a narrow trench across the channel. Its current-voltage characteristics show tunneling behavior. Large magnetoresistance (MR) ratios of more than ˜10% are obtained. These values are much larger than those (˜0.1%) reported for lateral-type spin metal-oxide-semiconductor field-effect transistors. The magnetic field direction dependence of the MR curve differs from that of the anisotropic magnetoresistance of GaMnAs, which confirms that the MR signal originates from the spin-valve effect between the GaMnAs electrodes.

The effect of metallization contact resistance on the measurement of the field effect mobility of long-channel unannealed amorphous In–Zn–O thin film transistors

International Nuclear Information System (INIS)

Lee, Sunghwan; Park, Hongsik; Paine, David C.

2012-01-01

The effect of contact resistance on the measurement of the field effect mobility of compositionally homogeneous channel indium zinc oxide (IZO)/IZO metallization thin film transistors (TFTs) is reported. The TFTs studied in this work operate in depletion mode as n-channel field effect devices with a field effect mobility calculated in the linear regime (μ FE ) of 20 ± 1.9 cm 2 /Vs and similar of 18 ± 1.3 cm 2 /Vs when calculated in the saturation regime (μ FE sat ). These values, however, significantly underestimate the channel mobility since a large part of the applied drain voltage is dropped across the source/drain contact interface. The transmission line method was employed to characterize the contact resistance and it was found that the conducting-IZO/semiconducting-IZO channel contact is highly resistive (specific contact resistance, ρ C > 100 Ωcm 2 ) and, further, this contact resistance is modulated with applied gate voltage. Accounting for the contact resistance (which is large and modulated by gate voltage), the corrected μ FE is shown to be 39 ± 2.6 cm 2 /Vs which is consistent with Hall mobility measurements of high carrier density IZO.

Tin - an unlikely ally for silicon field effect transistors?

KAUST Repository

Hussain, Aftab M.

2014-01-13

We explore the effectiveness of tin (Sn), by alloying it with silicon, to use SiSn as a channel material to extend the performance of silicon based complementary metal oxide semiconductors. Our density functional theory based simulation shows that incorporation of tin reduces the band gap of Si(Sn). We fabricated our device with SiSn channel material using a low cost and scalable thermal diffusion process of tin into silicon. Our high-κ/metal gate based multi-gate-field-effect-transistors using SiSn as channel material show performance enhancement, which is in accordance with the theoretical analysis. © 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Chip-scale fluorescence microscope based on a silo-filter complementary metal-oxide semiconductor image sensor.

Science.gov (United States)

Ah Lee, Seung; Ou, Xiaoze; Lee, J Eugene; Yang, Changhuei

2013-06-01

We demonstrate a silo-filter (SF) complementary metal-oxide semiconductor (CMOS) image sensor for a chip-scale fluorescence microscope. The extruded pixel design with metal walls between neighboring pixels guides fluorescence emission through the thick absorptive filter to the photodiode of a pixel. Our prototype device achieves 13 μm resolution over a wide field of view (4.8 mm × 4.4 mm). We demonstrate bright-field and fluorescence longitudinal imaging of living cells in a compact, low-cost configuration.

Monolithic integration of a silicon nanowire field-effect transistors array on a complementary metal-oxide semiconductor chip for biochemical sensor applications.

Science.gov (United States)

Livi, Paolo; Kwiat, Moria; Shadmani, Amir; Pevzner, Alexander; Navarra, Giulio; Rothe, Jörg; Stettler, Alexander; Chen, Yihui; Patolsky, Fernando; Hierlemann, Andreas

2015-10-06

We present a monolithic complementary metal-oxide semiconductor (CMOS)-based sensor system comprising an array of silicon nanowire field-effect transistors (FETs) and the signal-conditioning circuitry on the same chip. The silicon nanowires were fabricated by chemical vapor deposition methods and then transferred to the CMOS chip, where Ti/Pd/Ti contacts had been patterned via e-beam lithography. The on-chip circuitry measures the current flowing through each nanowire FET upon applying a constant source-drain voltage. The analog signal is digitized on chip and then transmitted to a receiving unit. The system has been successfully fabricated and tested by acquiring I-V curves of the bare nanowire-based FETs. Furthermore, the sensing capabilities of the complete system have been demonstrated by recording current changes upon nanowire exposure to solutions of different pHs, as well as by detecting different concentrations of Troponin T biomarkers (cTnT) through antibody-functionalized nanowire FETs.

Design of nanophotonic, hot-electron solar-blind ultraviolet detectors with a metal-oxide-semiconductor structure

International Nuclear Information System (INIS)

Wang, Zhiyuan; Wang, Xiaoxin; Liu, Jifeng

2014-01-01

Solar-blind ultraviolet (UV) detection refers to photon detection specifically in the wavelength range of 200 nm–320 nm. Without background noises from solar radiation, it has broad applications from homeland security to environmental monitoring. The most commonly used solid state devices for this application are wide band gap (WBG) semiconductor photodetectors (Eg > 3.5 eV). However, WBG semiconductors are difficult to grow and integrate with Si readout integrated circuits (ROICs). In this paper, we design a nanophotonic metal-oxide-semiconductor structure on Si for solar-blind UV detectors. Instead of using semiconductors as the active absorber, we use Sn nano-grating structures to absorb UV photons and generate hot electrons for internal photoemission across the Sn/SiO 2 interfacial barrier, thereby generating photocurrent between the metal and the n-type Si region upon UV excitation. Moreover, the transported hot electron has an excess kinetic energy >3 eV, large enough to induce impact ionization and generate another free electron in the conduction band of n-Si. This process doubles the quantum efficiency. On the other hand, the large metal/oxide interfacial energy barrier (>3.5 eV) also enables solar-blind UV detection by blocking the less energetic electrons excited by visible photons. With optimized design, ∼75% UV absorption and hot electron excitation can be achieved within the mean free path of ∼20 nm from the metal/oxide interface. This feature greatly enhances hot electron transport across the interfacial barrier to generate photocurrent. The simple geometry of the Sn nano-gratings and the MOS structure make it easy to fabricate and integrate with Si ROICs compared to existing solar-blind UV detection schemes. The presented device structure also breaks through the conventional notion that photon absorption by metal is always a loss in solid-state photodetectors, and it can potentially be extended to other active metal photonic devices. (paper)

Coffee-Ring Defined Short Channels for Inkjet-Printed Metal Oxide Thin-Film Transistors.

Science.gov (United States)

Li, Yuzhi; Lan, Linfeng; Xiao, Peng; Sun, Sheng; Lin, Zhenguo; Song, Wei; Song, Erlong; Gao, Peixiong; Wu, Weijing; Peng, Junbiao

2016-08-03

Short-channel electronic devices several micrometers in length are difficult to implement by direct inkjet printing due to the limitation of position accuracy of the common inkjet printer system and the spread of functional ink on substrates. In this report, metal oxide thin-film transistors (TFTs) with channel lengths of 3.5 ± 0.7 μm were successfully fabricated with a common inkjet printer without any photolithography steps. Hydrophobic CYTOP coffee stripes, made by inkjet-printing and plasma-treating processes, were utilized to define the channel area of TFTs with channel lengths as short as ∼3.5 μm by dewetting the inks of the source/drain (S/D) precursors. Furthermore, by introduction of an ultrathin layer of PVA to modify the S/D surfaces, the spreading of precursor ink of the InOx semiconductor layer was well-controlled. The inkjet-printed short-channel TFTs exhibited a maximum mobility of 4.9 cm(2) V(-1) s(-1) and an on/off ratio of larger than 10(9). This approach of fabricating short-channel TFTs by inkjet printing will promote the large-area fabrication of short-channel TFTs in a cost-effective manner.

Transparent Oxide Semiconductors for Emerging Electronics

KAUST Repository

Caraveo-Frescas, Jesus Alfonso

2013-11-01

Transparent oxide electronics have emerged as promising materials to shape the future of electronics. While several n-type oxides have been already studied and demonstrated feasibility to be used as active materials in thin film transistors, high performance p-type oxides have remained elusive. This dissertation is devoted to the study of transparent p-type oxide semiconductor tin monoxide and its use in the fabrication of field effect devices. A complete study on the deposition of tin monoxide thin films by direct current reactive magnetron sputtering is performed. Carrier density, carrier mobility and conductivity are studied over a set of deposition conditions where p-type conduction is observed. Density functional theory simulations are performed in order to elucidate the effect of native defects on carrier mobility. The findings on the electrical properties of SnO thin films are then translated to the fabrication of thin films transistors. The low processing temperature of tin monoxide thin films below 200 oC is shown advantageous for the fabrication of fully transparent and flexible thin film transistors. After careful device engineering, including post deposition annealing temperature, gate dielectric material, semiconductor thickness and source and drain electrodes material, thin film transistors with record device performance are demonstrated, achieving a field effect mobility >6.7 cm2V-1s-1. Device performance is further improved to reach a field effect mobility of 10.8 cm2V-1s-1 in SnO nanowire field effect transistors fabricated from the sputtered SnO thin films and patterned by electron beam lithography. Downscaling device dimension to nano scale is shown beneficial for SnO field effect devices not only by achieving a higher hole mobility but enhancing the overall device performance including better threshold voltage, subthreshold swing and lower number of interfacial defects. Use of p-type semiconductors in nonvolatile memory applications is then

Damage free Ar ion plasma surface treatment on In{sub 0.53}Ga{sub 0.47}As-on-silicon metal-oxide-semiconductor device

Energy Technology Data Exchange (ETDEWEB)

Koh, Donghyi; Shin, Seung Heon; Ahn, Jaehyun; Sonde, Sushant; Banerjee, Sanjay K. [Department of Electrical and Computer Engineering, Microelectronics Research Center, The University of Texas at Austin, 10100 Burnet Road, Austin, Texas 78758 (United States); Kwon, Hyuk-Min [SK Hynix, Icheon, 2091, Gyeongchung-daero, Bubal-eub, Icheon-si, Gyeonggi-do 136-1 (Korea, Republic of); Orzali, Tommaso; Kim, Tae-Woo, E-mail: twkim78@gmail.com [SEMATECH Inc., 257 Fuller Rd #2200, Albany, New York 12203 (United States); Kim, Dae-Hyun [Kyungpook National University, 80, Daehak-ro, Buk-gu, Daegu 702-701 (Korea, Republic of)

2015-11-02

In this paper, we investigated the effect of in-situ Ar ion plasma surface pre-treatment in order to improve the interface properties of In{sub 0.53}Ga{sub 0.47}As for high-κ top-gate oxide deposition. X-ray photoelectron spectroscopy (XPS) and metal-oxide-semiconductor capacitors (MOSCAPs) demonstrate that Ar ion treatment removes the native oxide on In{sub 0.53}Ga{sub 0.47}As. The XPS spectra of Ar treated In{sub 0.53}Ga{sub 0.47}As show a decrease in the AsO{sub x} and GaO{sub x} signal intensities, and the MOSCAPs show higher accumulation capacitance (C{sub acc}), along with reduced frequency dispersion. In addition, Ar treatment is found to suppress the interface trap density (D{sub it}), which thereby led to a reduction in the threshold voltage (V{sub th}) degradation during constant voltage stress and relaxation. These results outline the potential of surface treatment for III-V channel metal-oxide-semiconductor devices and application to non-planar device process.

Effects of radiation and temperature on gallium nitride (GaN) metal-semiconductor-metal ultraviolet photodetectors

Science.gov (United States)

Chiamori, Heather C.; Angadi, Chetan; Suria, Ateeq; Shankar, Ashwin; Hou, Minmin; Bhattacharya, Sharmila; Senesky, Debbie G.

2014-06-01

The development of radiation-hardened, temperature-tolerant materials, sensors and electronics will enable lightweight space sub-systems (reduced packaging requirements) with increased operation lifetimes in extreme harsh environments such as those encountered during space exploration. Gallium nitride (GaN) is a ceramic, semiconductor material stable within high-radiation, high-temperature and chemically corrosive environments due to its wide bandgap (3.4 eV). These material properties can be leveraged for ultraviolet (UV) wavelength photodetection. In this paper, current results of GaN metal-semiconductor-metal (MSM) UV photodetectors behavior after irradiation up to 50 krad and temperatures of 15°C to 150°C is presented. These initial results indicate that GaN-based sensors can provide robust operation within extreme harsh environments. Future directions for GaN-based photodetector technology for down-hole, automotive and space exploration applications are also discussed.

Synchrotron X-ray irradiation effects on the device characteristics and the resistance to hot-carrier damage of MOSFETs with 4 nm thick gate oxides

International Nuclear Information System (INIS)

Tanaka, Yuusuke; Tanabe, Akira; Suzuki, Katsumi

1998-01-01

The effects of synchrotron x-ray irradiation on the device characteristics and hot-carrier resistance of n- and p-channel metal oxide semiconductor field effect transistors (MOSFETs) with 4 nm thick gate oxides are investigated. In p-channel MOSFETs, device characteristics were significantly affected by the x-ray irradiation but completely recovered after annealing, while the device characteristics in n-channel MOSFETs were not noticeably affected by the irradiation. This difference appears to be due to a difference in interface-state generation. In p-channel MOSFETs, defects caused by boron-ion penetration through the gate oxides may be sensitive to x-ray irradiation, causing the generation of many interface states. These interface states are completely eliminated after annealing in hydrogen gas. The effects of irradiation on the resistance to hot-carrier degradation in annealed 4 nm thick gate-oxide MOSFETs were negligible even at an x-ray dose of 6,000 mJ/cm 2

Biomolecular detection using a metal semiconductor field effect transistor

Science.gov (United States)

Estephan, Elias; Saab, Marie-Belle; Buzatu, Petre; Aulombard, Roger; Cuisinier, Frédéric J. G.; Gergely, Csilla; Cloitre, Thierry

2010-04-01

In this work, our attention was drawn towards developing affinity-based electrical biosensors, using a MESFET (Metal Semiconductor Field Effect Transistor). Semiconductor (SC) surfaces must be prepared before the incubations with biomolecules. The peptides route was adapted to exceed and bypass the limits revealed by other types of surface modification due to the unwanted unspecific interactions. As these peptides reveal specific recognition of materials, then controlled functionalization can be achieved. Peptides were produced by phage display technology using a library of M13 bacteriophage. After several rounds of bio-panning, the phages presenting affinities for GaAs SC were isolated; the DNA of these specific phages were sequenced, and the peptide with the highest affinity was synthesized and biotinylated. To explore the possibility of electrical detection, the MESFET fabricated with the GaAs SC were used to detect the streptavidin via the biotinylated peptide in the presence of the bovine Serum Albumin. After each surface modification step, the IDS (current between the drain and the source) of the transistor was measured and a decrease in the intensity was detected. Furthermore, fluorescent microscopy was used in order to prove the specificity of this peptide and the specific localisation of biomolecules. In conclusion, the feasibility of producing an electrical biosensor using a MESFET has been demonstrated. Controlled placement, specific localization and detection of biomolecules on a MESFET transistor were achieved without covering the drain and the source. This method of functionalization and detection can be of great utility for biosensing application opening a new way for developing bioFETs (Biomolecular Field-Effect Transistor).

Development of n-type polymer semiconductors for organic field-effect transistors

International Nuclear Information System (INIS)

Choi, Jongwan; Kim, Nakjoong; Song, Heeseok; Kim, Felix Sunjoo

2015-01-01

We review herein the development of unipolar n-type polymer semiconductors in organic field-effect transistors, which would enable large-scale deployment of printed electronics in combination with a fast-growing area of p-type counterparts. After discussing general features of electron transport in organic semiconductors, various π-conjugated polymers that are capable of transporting electrons are selected and summarized to outline the design principles for enhancing electron mobility and stability in air. The n-type polymer semiconductors with high electron mobility and good stability in air share common features of low-lying frontier molecular orbital energy levels achieved by design. In this review, materials are listed in roughly chronological order of the appearance of the key building blocks, such as various arylene diimides, or structural characteristics, including nitrile and fluorinated groups, in order to present the progress in the area of n-type polymers. (paper)

Review of recent developments in amorphous oxide semiconductor thin-film transistor devices

International Nuclear Information System (INIS)

Park, Joon Seok; Maeng, Wan-Joo; Kim, Hyun-Suk; Park, Jin-Seong

2012-01-01

The present article is a review of the recent progress and major trends in the field of thin-film transistor (TFT) research involving the use of amorphous oxide semiconductors (AOS). First, an overview is provided on how electrical performance may be enhanced by the adoption of specific device structures and process schemes, the combination of various oxide semiconductor materials, and the appropriate selection of gate dielectrics and electrode metals in contact with the semiconductor. As metal oxide TFT devices are excellent candidates for switching or driving transistors in next generation active matrix liquid crystal displays (AMLCD) or active matrix organic light emitting diode (AMOLED) displays, the major parameters of interest in the electrical characteristics involve the field effect mobility (μ FE ), threshold voltage (V th ), and subthreshold swing (SS). A study of the stability of amorphous oxide TFT devices is presented next. Switching or driving transistors in AMLCD or AMOLED displays inevitably involves voltage bias or constant current stress upon prolonged operation, and in this regard many research groups have examined and proposed device degradation mechanisms under various stress conditions. The most recent studies involve stress experiments in the presence of visible light irradiating the semiconductor, and different degradation mechanisms have been proposed with respect to photon radiation. The last part of this review consists of a description of methods other than conventional vacuum deposition techniques regarding the formation of oxide semiconductor films, along with some potential application fields including flexible displays and information storage.

Black Phosphorus-Zinc Oxide Nanomaterial Heterojunction for p-n Diode and Junction Field-Effect Transistor.

Science.gov (United States)

Jeon, Pyo Jin; Lee, Young Tack; Lim, June Yeong; Kim, Jin Sung; Hwang, Do Kyung; Im, Seongil

2016-02-10

Black phosphorus (BP) nanosheet is two-dimensional (2D) semiconductor with distinct band gap and attracting recent attention from researches because it has some similarity to gapless 2D semiconductor graphene in the following two aspects: single element (P) for its composition and quite high mobilities depending on its fabrication conditions. Apart from several electronic applications reported with BP nanosheet, here we report for the first time BP nanosheet-ZnO nanowire 2D-1D heterojunction applications for p-n diodes and BP-gated junction field effect transistors (JFETs) with n-ZnO channel on glass. For these nanodevices, we take advantages of the mechanical flexibility of p-type conducting of BP and van der Waals junction interface between BP and ZnO. As a result, our BP-ZnO nanodimension p-n diode displays a high ON/OFF ratio of ∼10(4) in static rectification and shows kilohertz dynamic rectification as well while ZnO nanowire channel JFET operations are nicely demonstrated by BP gate switching in both electrostatics and kilohertz dynamics.

Long Channel Carbon Nanotube as an Alternative to Nanoscale Silicon Channels in Scaled MOSFETs

Directory of Open Access Journals (Sweden)

Michael Loong Peng Tan

2013-01-01

Full Text Available Long channel carbon nanotube transistor (CNT can be used to overcome the high electric field effects in nanoscale length silicon channel. When maximum electric field is reduced, the gate of a field-effect transistor (FET is able to gain control of the channel at varying drain bias. The device performance of a zigzag CNTFET with the same unit area as a nanoscale silicon metal-oxide semiconductor field-effect transistor (MOSFET channel is assessed qualitatively. The drain characteristic of CNTFET and MOSFET device models as well as fabricated CNTFET device are explored over a wide range of drain and gate biases. The results obtained show that long channel nanotubes can significantly reduce the drain-induced barrier lowering (DIBL effects in silicon MOSFET while sustaining the same unit area at higher current density.

Mechanical anomaly impact on metal-oxide-semiconductor capacitors on flexible silicon fabric

KAUST Repository

Ghoneim, Mohamed T.

2014-06-09

We report the impact of mechanical anomaly on high-κ/metal-oxide-semiconductor capacitors built on flexible silicon (100) fabric. The mechanical tests include studying the effect of bending radius up to 5 mm minimum bending radius with respect to breakdown voltage and leakage current of the devices. We also report the effect of continuous mechanical stress on the breakdown voltage over extended periods of times.

Silicon nanotube field effect transistor with core-shell gate stacks for enhanced high-performance operation and area scaling benefits

KAUST Repository

Fahad, Hossain M.; Smith, Casey; Rojas, Jhonathan Prieto; Hussain, Muhammad Mustafa

2011-01-01

We introduce the concept of a silicon nanotube field effect transistor whose unique core-shell gate stacks help achieve full volume inversion by giving a surge in minority carrier concentration in the near vicinity of the ultrathin channel and at the same time rapid roll-off at the source and drain junctions constituting velocity saturation-induced higher drive current-enhanced high performance per device with efficient real estate consumption. The core-shell gate stacks also provide superior short channel effects control than classical planar metal oxide semiconductor field effect transistor (MOSFET) and gate-all-around nanowire FET. The proposed device offers the true potential to be an ideal blend for quantum ballistic transport study of device property control by bottom-up approach and high-density integration compatibility using top-down state-of-the-art complementary metal oxide semiconductor flow. © 2011 American Chemical Society.

Silicon nanotube field effect transistor with core-shell gate stacks for enhanced high-performance operation and area scaling benefits

KAUST Repository

Fahad, Hossain M.

2011-10-12

We introduce the concept of a silicon nanotube field effect transistor whose unique core-shell gate stacks help achieve full volume inversion by giving a surge in minority carrier concentration in the near vicinity of the ultrathin channel and at the same time rapid roll-off at the source and drain junctions constituting velocity saturation-induced higher drive current-enhanced high performance per device with efficient real estate consumption. The core-shell gate stacks also provide superior short channel effects control than classical planar metal oxide semiconductor field effect transistor (MOSFET) and gate-all-around nanowire FET. The proposed device offers the true potential to be an ideal blend for quantum ballistic transport study of device property control by bottom-up approach and high-density integration compatibility using top-down state-of-the-art complementary metal oxide semiconductor flow. © 2011 American Chemical Society.

High-performance carbon-nanotube-based complementary field-effect-transistors and integrated circuits with yttrium oxide

Energy Technology Data Exchange (ETDEWEB)

Liang, Shibo; Zhang, Zhiyong, E-mail: zyzhang@pku.edu.cn; Si, Jia; Zhong, Donglai; Peng, Lian-Mao, E-mail: lmpeng@pku.edu.cn [Key Laboratory for the Physics and Chemistry of Nanodevices, Department of Electronics, Peking University, Beijing 100871 (China)

2014-08-11

High-performance p-type carbon nanotube (CNT) transistors utilizing yttrium oxide as gate dielectric are presented by optimizing oxidization and annealing processes. Complementary metal-oxide-semiconductor (CMOS) field-effect-transistors (FETs) are then fabricated on CNTs, and the p- and n-type devices exhibit symmetrical high performances, especially with low threshold voltage near to zero. The corresponding CMOS CNT inverter is demonstrated to operate at an ultra-low supply voltage down to 0.2 V, while displaying sufficient voltage gain, high noise margin, and low power consumption. Yttrium oxide is proven to be a competitive gate dielectric for constructing high-performance CNT CMOS FETs and integrated circuits.

Study on effective MOSFET channel length extracted from gate capacitance

Science.gov (United States)

Tsuji, Katsuhiro; Terada, Kazuo; Fujisaka, Hisato

2018-01-01

The effective channel length (L GCM) of metal-oxide-semiconductor field-effect transistors (MOSFETs) is extracted from the gate capacitances of actual-size MOSFETs, which are measured by charge-injection-induced-error-free charge-based capacitance measurement (CIEF CBCM). To accurately evaluate the capacitances between the gate and the channel of test MOSFETs, the parasitic capacitances are removed by using test MOSFETs having various channel sizes and a source/drain reference device. A strong linear relationship between the gate-channel capacitance and the design channel length is obtained, from which L GCM is extracted. It is found that L GCM is slightly less than the effective channel length (L CRM) extracted from the measured MOSFET drain current. The reason for this is discussed, and it is found that the capacitance between the gate electrode and the source and drain regions affects this extraction.

Improvements in DC Current-Ioltage (I-V) Characteristics of n-GaN Schottky Diode using Metal Overlap Edge Termination

International Nuclear Information System (INIS)

Munir, T.; Aziz, A. A.; Abdullah, M. J.; Ain, M. F.

2010-01-01

Practical design of GaN Schottky diodes incorporating a field plate necessitates an understanding of how the addition of such plate affects the diode performance. In this paper, we investigated the effects on DC current-voltage (I-V) characteristics of n-GaN schottky diode by incorporating metal overlap edge termination. The thickness of the oxide film varies from 0.001 to 1 micron. Two-dimensional Atlas/Blaze simulations revealed that severe electric field crowding across the metal semiconductor contact will cause reliability concern and limit device breakdown voltage. DC current-voltage (I-V) measurements indicate that the forward currents are higher for thinner oxide film schottky diodes with metal overlap edge termination than those of unterminated schottky diodes. The forward current increased due to formation of an accumulation layer underneath the oxide layer. Extending the field plate to beyond periphery regions of schottky contact does not result in any significant increase in forward current. The new techniques of ramp oxide metal overlap edge termination have been implemented to increase the forward current of n-GaN schottky diode. In reverse bias, breakdown voltage increased with edge termination oxide up to a certain limit of oxide thickness.

Graphene-graphite oxide field-effect transistors.

Science.gov (United States)

Standley, Brian; Mendez, Anthony; Schmidgall, Emma; Bockrath, Marc

2012-03-14

Graphene's high mobility and two-dimensional nature make it an attractive material for field-effect transistors. Previous efforts in this area have used bulk gate dielectric materials such as SiO(2) or HfO(2). In contrast, we have studied the use of an ultrathin layered material, graphene's insulating analogue, graphite oxide. We have fabricated transistors comprising single or bilayer graphene channels, graphite oxide gate insulators, and metal top-gates. The graphite oxide layers show relatively minimal leakage at room temperature. The breakdown electric field of graphite oxide was found to be comparable to SiO(2), typically ~1-3 × 10(8) V/m, while its dielectric constant is slightly higher, κ ≈ 4.3. © 2012 American Chemical Society

Poole Frenkel current and Schottky emission in SiN gate dielectric in AlGaN/GaN metal insulator semiconductor heterostructure field effect transistors

Science.gov (United States)

Hanna, Mina J.; Zhao, Han; Lee, Jack C.

2012-10-01

We analyze the anomalous I-V behavior in SiN prepared by plasma enhanced chemical vapor deposition for use as a gate insulator in AlGaN/GaN metal insulator semiconductor heterostructure filed effect transistors (HFETs). We observe leakage current across the dielectric with opposite polarity with respect to the applied electric field once the voltage sweep reaches a level below a determined threshold. This is observed as the absolute minimum of the leakage current does not occur at minimum voltage level (0 V) but occurs earlier in the sweep interval. Curve-fitting analysis suggests that the charge-transport mechanism in this region is Poole-Frenkel current, followed by Schottky emission due to band bending. Despite the current anomaly, the sample devices have shown a notable reduction of leakage current of over 2 to 6 order of magnitudes compared to the standard Schottky HFET. We show that higher pressures and higher silane concentrations produce better films manifesting less trapping. This conforms to our results that we reported in earlier publications. We found that higher chamber pressure achieves higher sheet carrier concentration that was found to be strongly dependent on the trapped space charge at the SiN/GaN interface. This would suggest that a lower chamber pressure induces more trap states into the SiN/GaN interface.

Miniature semiconductor detectors for in vivo dosimetry

International Nuclear Information System (INIS)

Rosenfeld, A. B.; Cutajar, D.; Lerch, M. L. F.; Takacs, G.; Cornelius, I. M.; Yudelev, M.; Zaider, M.

2006-01-01

Silicon mini-semiconductor detectors are found in wide applications for in vivo personal dosimetry and dosimetry and Micro-dosimetry of different radiation oncology modalities. These applications are based on integral and spectroscopy modes of metal oxide semiconductor field effect transistor and silicon p-n junction detectors. The advantages and limitations of each are discussed. (authors)

Charge-Transfer-Induced p-Type Channel in MoS2 Flake Field Effect Transistors.

Science.gov (United States)

Min, Sung-Wook; Yoon, Minho; Yang, Sung Jin; Ko, Kyeong Rok; Im, Seongil

2018-01-31

The two-dimensional transition-metal dichalcogenide semiconductor MoS 2 has received extensive attention for decades because of its outstanding electrical and mechanical properties for next-generation devices. One weakness of MoS 2 , however, is that it shows only n-type conduction, revealing its limitations for homogeneous PN diodes and complementary inverters. Here, we introduce a charge-transfer method to modify the conduction property of MoS 2 from n- to p-type. We initially deposited an n-type InGaZnO (IGZO) film on top of the MoS 2 flake so that electron charges might be transferred from MoS 2 to IGZO during air ambient annealing. As a result, electron charges were depleted in MoS 2 . Such charge depletion lowered the MoS 2 Fermi level, which makes hole conduction favorable in MoS 2 when optimum source/drain electrodes with a high work function are selected. Our IGZO-supported MoS 2 flake field effect transistors (FETs) clearly display channel-type conversion from n- to p-channel in this way. Under short- and long-annealing conditions, n- and p-channel MoS 2 FETs are achieved, respectively, and a low-voltage complementary inverter is demonstrated using both channels in a single MoS 2 flake.

SOI N-Channel Field Effect Transistors, CHT-NMOS80, for Extreme Temperatures

Science.gov (United States)

Patterson, Richard L.; Hammoud, Almad

2009-01-01

high temperature N-channel MOSFET (metal-oxide semiconductor field-effect transistor) device that was manufactured by CISSOID. This high voltage, medium-power transistor is fabricated using SOI processes and is designed for extreme wide temperature applications such as geothermal well logging, aerospace and avionics, and automotive industry. It has a high DC current capability and is specified for operation in the temperature range of -55 C to +225 C

Rapid Transition of the Hole Rashba Effect from Strong Field Dependence to Saturation in Semiconductor Nanowires

Science.gov (United States)

Luo, Jun-Wei; Li, Shu-Shen; Zunger, Alex

2017-09-01

The electric field manipulation of the Rashba spin-orbit coupling effects provides a route to electrically control spins, constituting the foundation of the field of semiconductor spintronics. In general, the strength of the Rashba effects depends linearly on the applied electric field and is significant only for heavy-atom materials with large intrinsic spin-orbit interaction under high electric fields. Here, we illustrate in 1D semiconductor nanowires an anomalous field dependence of the hole (but not electron) Rashba effect (HRE). (i) At low fields, the strength of the HRE exhibits a steep increase with the field so that even low fields can be used for device switching. (ii) At higher fields, the HRE undergoes a rapid transition to saturation with a giant strength even for light-atom materials such as Si (exceeding 100 meV Å). (iii) The nanowire-size dependence of the saturation HRE is rather weak for light-atom Si, so size fluctuations would have a limited effect; this is a key requirement for scalability of Rashba-field-based spintronic devices. These three features offer Si nanowires as a promising platform for the realization of scalable complementary metal-oxide-semiconductor compatible spintronic devices.

Recent Advances of Solution-Processed Metal Oxide Thin-Film Transistors.

Science.gov (United States)

Xu, Wangying; Li, Hao; Xu, Jian-Bin; Wang, Lei

2018-03-06

Solution-processed metal oxide thin-film transistors (TFTs) are considered as one of the most promising transistor technologies for future large-area flexible electronics. This review surveys the recent advances in solution-based oxide TFTs, including n-type oxide semiconductors, oxide dielectrics and p-type oxide semiconductors. Firstly, we provide an introduction on oxide TFTs and the TFT configurations and operating principles. Secondly, we present the recent progress in solution-processed n-type transistors, with a special focus on low-temperature and large-area solution processed approaches as well as novel non-display applications. Thirdly, we give a detailed analysis of the state-of-the-art solution-processed oxide dielectrics for low-voltage electronics. Fourthly, we discuss the recent progress in solution-based p-type oxide semiconductors, which will enable the highly desirable future low-cost large-area complementary circuits. Finally, we draw the conclusions and outline the perspectives over the research field.

A new metallic oxide semiconductor field effect transistor detector for use of in vivo dosimetry

International Nuclear Information System (INIS)

Qi Zhenyu; Deng Xiaowu; Huang Shaomin; Kang Dehua; Anatoly Rosenfeld

2006-01-01

Objective: To investigate the application of a recently developed metallic oxide semiconductor field effect transistor (MOSFET) detector for use in vivo dosimetry. Methods: The MOSFET detector was calibrated for X-ray beams of 8 MV and 15 MV, as well as electron beams with energy of 6,8,12 and 18 MeV. The dose linearity of the MOSFET detector was investigated for the doses ranging from 0 up to 50 Gy using 8 MV X-ray beams. Angular effect was evaluated as well in a cylindrical PMMA phantom by changing the beam entrance angle every 15 degree clockwise. The MOSFET detector was then used for a breast cancer patient in vivo dose measurement, after the treatment plan was verified in a water phantom using a NE-2571 ion chamber, in vivo measurements were performed in the first and last treatment, and once per week during the whole treatment. The measured doses were then compared with planning dose to evaluate the accuracy of each treatment. Results: The MOSFET detector represented a good energy response for X-ray beams of 8 MV and 15 MV, and for electron beams with energy of 6 MeV up to 18 MeV. With the 6 V bias, Dose linearity error of the MOSFET detector was within 3.0% up to approximately 50 Gy, which can be significantly reduced to 1% when the detector was calibrated before and after each measurement. The MOSFET response varied within 1.5% for angles from 270 degree to 90 degree. However, maximum error of 10.0% was recorded comparing MOSFET response between forward and backward direction. In vivo measurement for a breast cancer patient using 3DCRT showed that, the average dose deviation between measurement and calculation was 2.8%, and the maximum error was less then 5.0%. Conclusions: The new MOSFET detector, with its advantages of being in size, easy use, good energy response and dose linearity, can be used for in vivo dose measurement. (authors)

The fabrication of carbon nanotube field-effect transistors with semiconductors as the source and drain contact materials.

Science.gov (United States)

Xiao, Z; Camino, F E

2009-04-01

Sb(2)Te(3) and Bi(2)Te(2)Se semiconductor materials were used as the source and drain contact materials in the fabrication of carbon nanotube field-effect transistors (CNTFETs). Ultra-purified single-walled carbon nanotubes (SWCNTs) were ultrasonically dispersed in N-methyl pyrrolidone solvent. Dielectrophoresis was used to deposit and align SWCNTs for fabrication of CNTFETs. The Sb(2)Te(3)- and Bi(2)Te(2)Se-based CNTFETs demonstrate p-type metal-oxide-silicon-like I-V curves with high on/off drain-source current ratio at large drain-source voltages and good saturation of drain-source current with increasing drain-source voltage. The fabrication process developed is novel and has general meaning, and could be used for the fabrication of SWCNT-based integrated devices and systems with semiconductor contact materials.

Determination of Insulator-to-Semiconductor Transition in Sol-Gel Oxide Semiconductors Using Derivative Spectroscopy.

Science.gov (United States)

Lee, Woobin; Choi, Seungbeom; Kim, Kyung Tae; Kang, Jingu; Park, Sung Kyu; Kim, Yong-Hoon

2015-12-23

We report a derivative spectroscopic method for determining insulator-to-semiconductor transition during sol-gel metal-oxide semiconductor formation. When an as-spun sol-gel precursor film is photochemically activated and changes to semiconducting state, the light absorption characteristics of the metal-oxide film is considerable changed particularly in the ultraviolet region. As a result, a peak is generated in the first-order derivatives of light absorption ( A' ) vs. wavelength (λ) plots, and by tracing the peak center shift and peak intensity, transition from insulating-to-semiconducting state of the film can be monitored. The peak generation and peak center shift are described based on photon-energy-dependent absorption coefficient of metal-oxide films. We discuss detailed analysis method for metal-oxide semiconductor films and its application in thin-film transistor fabrication. We believe this derivative spectroscopy based determination can be beneficial for a non-destructive and a rapid monitoring of the insulator-to-semiconductor transition in sol-gel oxide semiconductor formation.

Recent Developments in p-Type Oxide Semiconductor Materials and Devices

KAUST Repository

Wang, Zhenwei

2016-02-16

The development of transparent p-type oxide semiconductors with good performance may be a true enabler for a variety of applications where transparency, power efficiency, and greater circuit complexity are needed. Such applications include transparent electronics, displays, sensors, photovoltaics, memristors, and electrochromics. Hence, here, recent developments in materials and devices based on p-type oxide semiconductors are reviewed, including ternary Cu-bearing oxides, binary copper oxides, tin monoxide, spinel oxides, and nickel oxides. The crystal and electronic structures of these materials are discussed, along with approaches to enhance valence-band dispersion to reduce effective mass and increase mobility. Strategies to reduce interfacial defects, off-state current, and material instability are suggested. Furthermore, it is shown that promising progress has been made in the performance of various types of devices based on p-type oxides. Several innovative approaches exist to fabricate transparent complementary metal oxide semiconductor (CMOS) devices, including novel device fabrication schemes and utilization of surface chemistry effects, resulting in good inverter gains. However, despite recent developments, p-type oxides still lag in performance behind their n-type counterparts, which have entered volume production in the display market. Recent successes along with the hurdles that stand in the way of commercial success of p-type oxide semiconductors are presented.

Recent Developments in p-Type Oxide Semiconductor Materials and Devices

KAUST Repository

Wang, Zhenwei; Nayak, Pradipta K.; Caraveo-Frescas, Jesus Alfonso; Alshareef, Husam N.

2016-01-01

The development of transparent p-type oxide semiconductors with good performance may be a true enabler for a variety of applications where transparency, power efficiency, and greater circuit complexity are needed. Such applications include transparent electronics, displays, sensors, photovoltaics, memristors, and electrochromics. Hence, here, recent developments in materials and devices based on p-type oxide semiconductors are reviewed, including ternary Cu-bearing oxides, binary copper oxides, tin monoxide, spinel oxides, and nickel oxides. The crystal and electronic structures of these materials are discussed, along with approaches to enhance valence-band dispersion to reduce effective mass and increase mobility. Strategies to reduce interfacial defects, off-state current, and material instability are suggested. Furthermore, it is shown that promising progress has been made in the performance of various types of devices based on p-type oxides. Several innovative approaches exist to fabricate transparent complementary metal oxide semiconductor (CMOS) devices, including novel device fabrication schemes and utilization of surface chemistry effects, resulting in good inverter gains. However, despite recent developments, p-type oxides still lag in performance behind their n-type counterparts, which have entered volume production in the display market. Recent successes along with the hurdles that stand in the way of commercial success of p-type oxide semiconductors are presented.

Radiation-Induced Short Channel (RISCE) and Narrow Channel (RINCE) Effects in 65 and 130 nm MOSFETs

CERN Document Server

Faccio, F; Cornale, D; Paccagnella, A; Gerardin, S

2015-01-01

The behavior of transistors in commercial-grade complementary metal-oxide semiconductor technologies in the 65 and 130 nm nodes has been explored up to a total ionizing dose of 1 Grad. The large dose tolerance of the thin gate oxide is confirmed, but defects in the spacer and STI oxides have a strong effect on the performance of the transistors. A radiation-induced short channel effect is traced to charge trapping in the spacers used for drain engineering, while a radiation-induced narrow channel effect is due to defect generation in the lateral isolation oxide (STI). These strongly degrade the electrical characteristics of short and narrow channel transistors at high doses, and their magnitude depends on the applied bias and temperature during irradiation in a complex way.

Solar hydrogen production with semiconductor metal oxides: new directions in experiment and theory

DEFF Research Database (Denmark)

Valdes, Alvaro; Brillet, Jeremie; Graetzel, Michael

2012-01-01

An overview of a collaborative experimental and theoretical effort toward efficient hydrogen production via photoelectrochemical splitting of water into di-hydrogen and di-oxygen is presented here. We present state-of-the-art experimental studies using hematite and TiO2 functionalized with gold n...... nanoparticles as photoanode materials, and theoretical studies on electro and photo-catalysis of water on a range of metal oxide semiconductor materials, including recently developed implementation of self-interaction corrected energy functionals....

Electron dynamics in metals and semiconductors in strong THz fields

DEFF Research Database (Denmark)

Jepsen, Peter Uhd

2017-01-01

Semiconductors and metals respond to strong electric fields in a highly nonlinear fashion. Using single-cycle THz field transients it is possible to investigate this response in regimes not accessible by transport-based measurements. Extremely high fields can be applied without material damage...

Bimodal gate-dielectric deposition for improved performance of AlGaN/GaN metal-oxide-semiconductor high-electron-mobility transistors

International Nuclear Information System (INIS)

Pang Liang; Kim, Kyekyoon

2012-01-01

A bimodal deposition scheme combining radiofrequency magnetron sputtering and plasma enhanced chemical vapour deposition (PECVD) is proposed as a means for improving the performance of GaN-based metal-oxide-semiconductor high-electron-mobility transistors (MOSHEMTs). High-density sputtered-SiO 2 is utilized to reduce the gate leakage current and enhance the breakdown voltage while low-density PECVD-SiO 2 is employed to buffer the sputtering damage and further increase the drain current by engineering the stress-induced-polarization. Thus-fabricated MOSHEMT exhibited a low leakage current of 4.21 × 10 -9 A mm -1 and high breakdown voltage of 634 V for a gate-drain distance of 6 µm, demonstrating the promise of bimodal-SiO 2 deposition scheme for the development of GaN-based MOSHEMTs for high-power application. (paper)

Single Event Effects (SEE) for Power Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs)

Science.gov (United States)

Lauenstein, Jean-Marie

2011-01-01

Single-event gate rupture (SEGR) continues to be a key failure mode in power MOSFETs. (1) SEGR is complex, making rate prediction difficult SEGR mechanism has two main components: (1) Oxide damage-- Reduces field required for rupture (2) Epilayer response -- Creates transient high field across the oxide.

Bias temperature instability in tunnel field-effect transistors

Science.gov (United States)

Mizubayashi, Wataru; Mori, Takahiro; Fukuda, Koichi; Ishikawa, Yuki; Morita, Yukinori; Migita, Shinji; Ota, Hiroyuki; Liu, Yongxun; O'uchi, Shinichi; Tsukada, Junichi; Yamauchi, Hiromi; Matsukawa, Takashi; Masahara, Meishoku; Endo, Kazuhiko

2017-04-01

We systematically investigated the bias temperature instability (BTI) of tunnel field-effect transistors (TFETs). The positive BTI and negative BTI mechanisms in TFETs are the same as those in metal-oxide-semiconductor FETs (MOSFETs). In TFETs, although traps are generated in high-k gate dielectrics by the bias stress and/or the interface state is degraded at the interfacial layer/channel interface, the threshold voltage (V th) shift due to BTI degradation is caused by the traps and/or the degradation of the interface state locating the band-to-band tunneling (BTBT) region near the source/gate edge. The BTI lifetime in n- and p-type TFETs is improved by applying a drain bias corresponding to the operation conditions.

Investigation of 'surface donors' in Al2O3/AlGaN/GaN metal-oxide-semiconductor heterostructures: Correlation of electrical, structural, and chemical properties

Science.gov (United States)

Ťapajna, M.; Stoklas, R.; Gregušová, D.; Gucmann, F.; Hušeková, K.; Haščík, Š.; Fröhlich, K.; Tóth, L.; Pécz, B.; Brunner, F.; Kuzmík, J.

2017-12-01

III-N surface polarization compensating charge referred here to as 'surface donors' (SD) was analyzed in Al2O3/AlGaN/GaN metal-oxide-semiconductor (MOS) heterojunctions using scaled oxide films grown by metal-organic chemical vapor deposition at 600 °C. We systematically investigated impact of HCl pre-treatment prior to oxide deposition and post-deposition annealing (PDA) at 700 °C. SD density was reduced down to 1.9 × 1013 cm-2 by skipping HCl pre-treatment step as compared to 3.3 × 1013 cm-2 for structures with HCl pre-treatment followed by PDA. The nature and origin of SD was then analyzed based on the correlation between electrical, micro-structural, and chemical properties of the Al2O3/GaN interfaces with different SD density (NSD). From the comparison between distributions of interface traps of MOS heterojunction with different NSD, it is demonstrated that SD cannot be attributed to interface trapped charge. Instead, variation in the integrity of the GaOx interlayer confirmed by X-ray photoelectron spectroscopy is well correlated with NSD, indicating SD may be formed by border traps at the Al2O3/GaOx interface.

Structural and electrical characteristics of high-k/metal gate metal oxide semiconductor capacitors fabricated on flexible, semi-transparent silicon (100) fabric

KAUST Repository

Rojas, Jhonathan Prieto

2013-02-12

In pursuit of flexible computers with high performance devices, we demonstrate a generic process to fabricate 10 000 metal-oxide-semiconductor capacitors (MOSCAPs) with semiconductor industry\\'s most advanced high-k/metal gate stacks on widely used, inexpensive bulk silicon (100) wafers and then using a combination of iso-/anisotropic etching to release the top portion of the silicon with the already fabricated devices as a mechanically flexible (bending curvature of 133 m−1), optically semi-transparent silicon fabric (1.5 cm × 3 cm × 25 μm). The electrical characteristics show 3.7 nm effective oxide thickness, −0.2 V flat band voltage, and no hysteresis from the fabricated MOSCAPs.

Structural and electrical characteristics of high-k/metal gate metal oxide semiconductor capacitors fabricated on flexible, semi-transparent silicon (100) fabric

KAUST Repository

Rojas, Jhonathan Prieto; Hussain, Muhammad Mustafa; Sevilla, Galo T.

2013-01-01

In pursuit of flexible computers with high performance devices, we demonstrate a generic process to fabricate 10 000 metal-oxide-semiconductor capacitors (MOSCAPs) with semiconductor industry's most advanced high-k/metal gate stacks on widely used, inexpensive bulk silicon (100) wafers and then using a combination of iso-/anisotropic etching to release the top portion of the silicon with the already fabricated devices as a mechanically flexible (bending curvature of 133 m−1), optically semi-transparent silicon fabric (1.5 cm × 3 cm × 25 μm). The electrical characteristics show 3.7 nm effective oxide thickness, −0.2 V flat band voltage, and no hysteresis from the fabricated MOSCAPs.

Epitaxial growth of In-rich InGaN on yttria-stabilized zirconia and its application to metal–insulator–semiconductor field-effect transistors

Energy Technology Data Exchange (ETDEWEB)

Kobayashi, Atsushi; Lye, Khe Shin; Ueno, Kohei [Institute of Industrial Science, The University of Tokyo, Tokyo 153-8505 (Japan); Ohta, Jitsuo [Institute of Industrial Science, The University of Tokyo, Tokyo 153-8505 (Japan); PRESTO, Japan Science and Technology Agency, Saitama 332-0012 (Japan); Fujioka, Hiroshi, E-mail: hfujioka@iis.u-tokyo.ac.jp [Institute of Industrial Science, The University of Tokyo, Tokyo 153-8505 (Japan); ACCEL, Japan Science and Technology Agency, Tokyo 102-0076 (Japan)

2016-08-28

We grew In-rich In{sub x}Ga{sub 1-x}N films on yttria-stabilized zirconia (YSZ) substrates at low temperatures by pulsed sputtering deposition. It was found that single-crystal In{sub x}Ga{sub 1-x}N (0.63 ≤ x ≤ 0.82) films can be prepared without significant compositional fluctuations at growth temperatures below 500 °C. It was also found that the electrical properties of InGaN are strongly dependent on In composition, growth temperature, and film polarity. N-channel operation of the metal–insulator–semiconductor field-effect transistor (MISFET) with an ultrathin InGaN channel on the YSZ substrates was successfully demonstrated. These results indicate that an InGaN-based MISFET is a promising device for next-generation high-speed electronics.

Demonstration of AlGaN/GaN metal-oxide-semiconductor high-electron-mobility transistors with silicon-oxy-nitride as the gate insulator

International Nuclear Information System (INIS)

Balachander, K.; Arulkumaran, S.; Egawa, T.; Sano, Y.; Baskar, K.

2005-01-01

AlGaN/GaN metal-oxide-semiconductor high-electron-mobility transistors (MOSHEMTs) were fabricated with plasma enhanced chemical vapor deposited silicon oxy-nitride (SiON) as an insulating layer. The compositions of SiON thin films were confirmed using X-ray photoelectron spectroscopy. The fabricated MOSHEMTs exhibited a very high saturation current density of 1.1 A/mm coupled with high positive operational gate voltage up to +7 V. The MOSHEMTs also exhibited four orders of low gate leakage current and high forward-on voltage when compared with the conventional HEMTs. The drain current collapse using gate pulse measurements showed only a negligible difference in the saturation current density revealing the drastic improvement in passivation of the surface states due to the high quality of dielectric thin films deposited. Thus, based on the improved direct-current operation, SiON can be considered to be a potential gate oxide comparable with other dielectric insulators

Pr-O-Al-N dielectrics for metal insulator semiconductor stacks

Energy Technology Data Exchange (ETDEWEB)

Henkel, Karsten; Torche, Mohamed; Sohal, Rakesh; Karavaev, Konstantin; Burkov, Yevgen; Schwiertz, Carola; Schmeisser, Dieter [Brandenburg University of Technology, Chair of Applied Physics and Sensors, K.-Wachsmann-Allee 1, 03046 Cottbus (Germany)

2011-02-15

This work focuses on praseodymium oxide films as a high-k material on silicon and silicon carbide (SiC) in metal insulator semiconductor samples. The electrical results are correlated to spectroscopic findings on this material system. Strong interfacial reactions between the praseodymium oxide and the semiconductor as well as silicon inter-diffusion into the high-k material are observed. The importance of a buffer layer is discussed and its optimisation is addressed, too. In particular the improvement of the performance by the introduction of an aluminium oxynitride buffer layer, which acts as an inter-diffusion barrier and reduces the leakage current, the interface state density and the equivalent oxide thickness is demonstrated. (Copyright copyright 2011 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim)

Simulation study of 14-nm-gate III-V trigate field effect transistor devices with In1−xGaxAs channel capping layer

Directory of Open Access Journals (Sweden)

Cheng-Hao Huang

2015-06-01

Full Text Available In this work, we study characteristics of 14-nm-gate InGaAs-based trigate MOSFET (metal-oxide-semiconductor field effect transistor devices with a channel capping layer. The impacts of thickness and gallium (Ga concentration of the channel capping layer on the device characteristic are firstly simulated and optimized by using three-dimensional quantum-mechanically corrected device simulation. Devices with In1−xGaxAs/In0.53Ga0.47As channels have the large driving current owing to small energy band gap and low alloy scattering at the channel surface. By simultaneously considering various physical and switching properties, a 4-nm-thick In0.68Ga0.32As channel capping layer can be adopted for advanced applications. Under the optimized channel parameters, we further examine the effects of channel fin angle and the work-function fluctuation (WKF resulting from nano-sized metal grains of NiSi gate on the characteristic degradation and variability. To maintain the device characteristics and achieve the minimal variation induced by WKF, the physical findings of this study indicate a critical channel fin angle of 85o is needed for the device with an averaged grain size of NiSi below 4x4 nm2.

Properties and growth peculiarities of Si{sub 0.30}Ge{sub 0.70} stressor integrated in 14 nm fin-based p-type metal-oxide-semiconductor field-effect transistors

Energy Technology Data Exchange (ETDEWEB)

Hikavyy, A., E-mail: Andriy.Hikavyy@imec.be; Rosseel, E.; Kubicek, S.; Mannaert, G.; Favia, P.; Bender, H.; Loo, R.; Horiguchi, N.

2016-03-01

Integration of Si{sub 0.30}Ge{sub 0.70} in the Source/Drain (S/D) areas of metal oxide semiconductor transistors built according to 14 nm technological node rules has been shown. SiGe properties and growth peculiarities are presented and elaborated. In order to preserve the fin structures during a pre-epitaxy surface preparation, the H{sub 2} bake pressure had to be increased to 19,998 Pa at 800 °C. Influence of this bake on the Si recess in the S/D areas is presented. Excellent quality of both the raised and the embedded Si{sub 0.30}Ge{sub 0.70} was demonstrated by transmission electron microscopy inspections. Energy-dispersive X-ray spectroscopy measurement showed two stages of SiGe growth for the embedded case: first with a lower Ge content at the beginning of the deposition until the (111) facets are formed, and second with a higher Ge content which is governed by the growth on (111) planes. Nano-beam diffraction analysis showed that SiGe grown in the S/D areas of p-type metal-oxide-semiconductor field-effect transistor is fully elastically relaxed in the direction across the fin and partially strained along the fin. Finally, a strain accumulation effect in the chain of transistors has been observed. - Highlights: • Si{sub 0.30}Ge{sub 0.70} stressor has been implemented in the 14 nm technology node CMOS flow. • Embedded and raised variants have been investigated. • High Si{sub 0.30}Ge{sub 0.70} quality was confirmed. • Si{sub 0.30}Ge{sub 0.70} layer is elastically relaxed across the fin direction. • Partial stress presence and stress accumulation effect were observed.

Investigations of Tunneling for Field Effect Transistors

OpenAIRE

Matheu, Peter

2012-01-01

Over 40 years of scaling dimensions for new and continuing product cycles has introduced new challenges for transistor design. As the end of the technology roadmap for semiconductors approaches, new device structures are being investigated as possible replacements for traditional metal-oxide-semiconductor field effect transistors (MOSFETs). Band-to-band tunneling (BTBT) in semiconductors, often viewed as an adverse effect of short channel lengths in MOSFETs, has been discussed as a promising ...

Experimental demonstration on the ultra-low source/drain resistance by metal-insulator-semiconductor contact structure in In0.53Ga0.47As field-effect transistors

Directory of Open Access Journals (Sweden)

M.-H. Liao

2013-09-01

Full Text Available In this work, we demonstrate the ultra-low contact resistivity of 6.7 × 10−9 Ω/cm2 by inserting 0.6-nm-ZnO between Al and InGaAs(Si: 1.5 × 1019 cm−3. The metal-insulator-semiconductor tunneling diode with 0.6-nm-ZnO exhibits nearly zero (0.03 eV barrier height. We apply this contact structure on the source/drain of implant-free In0.53Ga0.47As quantum-well metal-oxide-semiconductor field- effect transistors. The excellent on-state performance such as saturation drain current of 3 × 10−4 A/μm and peak transconductance of 1250 μS/μm is obtained which is attributed to the ultra-low source/drain resistance of 190 Ω-μm.

Direct observation of both contact and remote oxygen scavenging of GeO2 in a metal-oxide-semiconductor stack

International Nuclear Information System (INIS)

Fadida, S.; Shekhter, P.; Eizenberg, M.; Cvetko, D.; Floreano, L.; Verdini, A.; Nyns, L.; Van Elshocht, S.; Kymissis, I.

2014-01-01

In the path to incorporating Ge based metal-oxide-semiconductor into modern nano-electronics, one of the main issues is the oxide-semiconductor interface quality. Here, the reactivity of Ti on Ge stacks and the scavenging effect of Ti were studied using synchrotron X-ray photoelectron spectroscopy measurements, with an in-situ metal deposition and high resolution transmission electron microscopy imaging. Oxygen removal from the Ge surface was observed both in direct contact as well as remotely through an Al 2 O 3 layer. The scavenging effect was studied in situ at room temperature and after annealing. We find that the reactivity of Ti can be utilized for improved scaling of Ge based devices.

Atomic Layer Deposition of Gallium Oxide Films as Gate Dielectrics in AlGaN/GaN Metal-Oxide-Semiconductor High-Electron-Mobility Transistors.

Science.gov (United States)

Shih, Huan-Yu; Chu, Fu-Chuan; Das, Atanu; Lee, Chia-Yu; Chen, Ming-Jang; Lin, Ray-Ming

2016-12-01

In this study, films of gallium oxide (Ga2O3) were prepared through remote plasma atomic layer deposition (RP-ALD) using triethylgallium and oxygen plasma. The chemical composition and optical properties of the Ga2O3 thin films were investigated; the saturation growth displayed a linear dependence with respect to the number of ALD cycles. These uniform ALD films exhibited excellent uniformity and smooth Ga2O3-GaN interfaces. An ALD Ga2O3 film was then used as the gate dielectric and surface passivation layer in a metal-oxide-semiconductor high-electron-mobility transistor (MOS-HEMT), which exhibited device performance superior to that of a corresponding conventional Schottky gate HEMT. Under similar bias conditions, the gate leakage currents of the MOS-HEMT were two orders of magnitude lower than those of the conventional HEMT, with the power-added efficiency enhanced by up to 9 %. The subthreshold swing and effective interfacial state density of the MOS-HEMT were 78 mV decade(-1) and 3.62 × 10(11) eV(-1) cm(-2), respectively. The direct-current and radio-frequency performances of the MOS-HEMT device were greater than those of the conventional HEMT. In addition, the flicker noise of the MOS-HEMT was lower than that of the conventional HEMT.

Wafer-scale laser pantography: Fabrication of n-metal-oxide-semiconductor transistors and small-scale integrated circuits by direct-write laser-induced pyrolytic reactions

International Nuclear Information System (INIS)

McWilliams, B.M.; Herman, I.P.; Mitlitsky, F.; Hyde, R.A.; Wood, L.L.

1983-01-01

A complete set of processes sufficient for manufacture of n-metal-oxide-semiconductor (n-MOS) transistors by a laser-induced direct-write process has been demonstrated separately, and integrated to yield functional transistors. Gates and interconnects were fabricated of various combinations of n-doped and intrinsic polysilicon, tungsten, and tungsten silicide compounds. Both 0.1-μm and 1-μm-thick gate oxides were micromachined with and without etchant gas, and the exposed p-Si [100] substrate was cleaned and, at times, etched. Diffusion regions were doped by laser-induced pyrolytic decomposition of phosphine followed by laser annealing. Along with the successful manufacture of working n-MOS transistors and a set of elementary digital logic gates, this letter reports the successful use of several laser-induced surface reactions that have not been reported previously

Modelling of Leakage Current Through Double Dielectric Gate Stack in Metal Oxide Semiconductor Capacitor

International Nuclear Information System (INIS)

Fatimah A Noor; Mikrajuddin Abdullah; Sukirno; Khairurrijal

2008-01-01

In this paper, we have derived analytical expression of leakage current through double barriers in Metal Oxide Semiconductor (MOS) capacitor. Initially, electron transmittance through the MOS capacitor was derived by including the coupling between the transverse and longitudinal energies. The transmittance was then employed to obtain leakage current through the double barrier. In this model, we observed the effect of electron velocity due to the coupling effect and the oxide thickness to the leakage current. The calculated results showed that the leakage current decreases as the electron velocity increases. (author)

The comparison of gamma-radiation and electrical stress influences on oxide and interface defects in power VDMOSFET

Directory of Open Access Journals (Sweden)

Đorić-Veljković Snežana M.

2013-01-01

Full Text Available The behaviour of oxide and interface defects in n-channel power vertical double-diffused metal-oxide-semiconductor field-effect transistors, firstly degraded by the gamma-irradiation and electric field and subsequently recovered and annealed, is presented. By analyzing the transfer characteristic shifts, the changes of threshold voltage and underlying changes of gate oxide and interface trap densities during the stress (recovery, annealing of investigated devices, it is shown that these two types of stress influence differently on the gate oxide and the SiO2-Si interface. [Projekat Ministarstva nauke Republike Srbije, br. OI171026

Anomalous output characteristic shift for the n-type lateral diffused metal-oxide-semiconductor transistor with floating P-top layer

International Nuclear Information System (INIS)

Liu, Siyang; Zhang, Chunwei; Sun, Weifeng; Su, Wei; Wang, Shaorong; Ma, Shulang; Huang, Yu

2014-01-01

Anomalous output characteristic shift of the n-type lateral diffused metal-oxide-semiconductor transistor with floating P-top layer is investigated. It shows that the linear drain current has obvious decrease when the output characteristic of fresh device is measured for two consecutive times. The charge pumping experiments demonstrate that the decrease is not from hot-carrier degradation. The reduction of cross section area for the current flowing, which results from the squeezing of the depletion region surrounding the P-top layer, is responsible for the shift. Consequently, the current capability of this special device should be evaluated by the second measured output characteristic

Anomalous output characteristic shift for the n-type lateral diffused metal-oxide-semiconductor transistor with floating P-top layer

Energy Technology Data Exchange (ETDEWEB)

Liu, Siyang; Zhang, Chunwei; Sun, Weifeng, E-mail: swffrog@seu.edu.cn [National ASIC System Engineering Research Center, Southeast University, Nanjing 210096 (China); Su, Wei; Wang, Shaorong; Ma, Shulang; Huang, Yu [CSMC Technologies Corporation, Wuxi 214061 (China)

2014-04-14

Anomalous output characteristic shift of the n-type lateral diffused metal-oxide-semiconductor transistor with floating P-top layer is investigated. It shows that the linear drain current has obvious decrease when the output characteristic of fresh device is measured for two consecutive times. The charge pumping experiments demonstrate that the decrease is not from hot-carrier degradation. The reduction of cross section area for the current flowing, which results from the squeezing of the depletion region surrounding the P-top layer, is responsible for the shift. Consequently, the current capability of this special device should be evaluated by the second measured output characteristic.

In-situ SiN{sub x}/InN structures for InN field-effect transistors

Energy Technology Data Exchange (ETDEWEB)

Zervos, Ch., E-mail: hzervos@physics.uoc.gr; Georgakilas, A. [Microelectronics Research Group (MRG), Institute of Electronic Structure and Laser (IESL), Foundation for Research and Technology-Hellas - FORTH, P.O. Box 1385, GR-70013 Heraklion, Crete (Greece); Department of Physics, University of Crete, P.O. Box 2208, GR-71003 Heraklion, Crete (Greece); Adikimenakis, A.; Kostopoulos, A.; Kayambaki, M.; Tsagaraki, K.; Konstantinidis, G. [Microelectronics Research Group (MRG), Institute of Electronic Structure and Laser (IESL), Foundation for Research and Technology-Hellas - FORTH, P.O. Box 1385, GR-70013 Heraklion, Crete (Greece); Beleniotis, P. [Department of Physics, University of Crete, P.O. Box 2208, GR-71003 Heraklion, Crete (Greece)

2016-04-04

Critical aspects of InN channel field-effect transistors (FETs) have been investigated. SiN{sub x} dielectric layers were deposited in-situ, in the molecular beam epitaxy system, on the surface of 2 nm InN layers grown on GaN (0001) buffer layers. Metal-insulator-semiconductor Ni/SiN{sub x}/InN capacitors were analyzed by capacitance-voltage (C-V) and current-voltage measurements and were used as gates in InN FET transistors (MISFETs). Comparison of the experimental C-V results with self-consistent Schrödinger-Poisson calculations indicates the presence of a positive charge at the SiN{sub x}/InN interface of Q{sub if} ≈ 4.4 – 4.8 × 10{sup 13 }cm{sup −2}, assuming complete InN strain relaxation. Operation of InN MISFETs was demonstrated, but their performance was limited by a catastrophic breakdown at drain-source voltages above 2.5–3.0 V, the low electron mobility, and high series resistances of the structures.

Solution-Processed Donor-Acceptor Polymer Nanowire Network Semiconductors For High-Performance Field-Effect Transistors

Science.gov (United States)

Lei, Yanlian; Deng, Ping; Li, Jun; Lin, Ming; Zhu, Furong; Ng, Tsz-Wai; Lee, Chun-Sing; Ong, Beng S.

2016-01-01

Organic field-effect transistors (OFETs) represent a low-cost transistor technology for creating next-generation large-area, flexible and ultra-low-cost electronics. Conjugated electron donor-acceptor (D-A) polymers have surfaced as ideal channel semiconductor candidates for OFETs. However, high-molecular weight (MW) D-A polymer semiconductors, which offer high field-effect mobility, generally suffer from processing complications due to limited solubility. Conversely, the readily soluble, low-MW D-A polymers give low mobility. We report herein a facile solution process which transformed a lower-MW, low-mobility diketopyrrolopyrrole-dithienylthieno[3,2-b]thiophene (I) into a high crystalline order and high-mobility semiconductor for OFETs applications. The process involved solution fabrication of a channel semiconductor film from a lower-MW (I) and polystyrene blends. With the help of cooperative shifting motion of polystyrene chain segments, (I) readily self-assembled and crystallized out in the polystyrene matrix as an interpenetrating, nanowire semiconductor network, providing significantly enhanced mobility (over 8 cm2V−1s−1), on/off ratio (107), and other desirable field-effect properties that meet impactful OFET application requirements. PMID:27091315

Effects of oxide traps, interface traps, and ''border traps'' on metal-oxide-semiconductor devices

International Nuclear Information System (INIS)

Fleetwood, D.M.; Winokur, P.S.; Reber, R.A. Jr.; Meisenheimer, T.L.; Schwank, J.R.; Shaneyfelt, M.R.; Riewe, L.C.

1993-01-01

We have identified several features of the 1/f noise and radiation response of metal-oxide-semiconductor (MOS) devices that are difficult to explain with standard defect models. To address this issue, and in response to ambiguities in the literature, we have developed a revised nomenclature for defects in MOS devices that clearly distinguishes the language used to describe the physical location of defects from that used to describe their electrical response. In this nomenclature, ''oxide traps'' are simply defects in the SiO 2 layer of the MOS structure, and ''interface traps'' are defects at the Si/SiO 2 interface. Nothing is presumed about how either type of defect communicates with the underlying Si. Electrically, ''fixed states'' are defined as trap levels that do not communicate with the Si on the time scale of the measurements, but ''switching states'' can exchange charge with the Si. Fixed states presumably are oxide traps in most types of measurements, but switching states can either be interface traps or near-interfacial oxide traps that can communicate with the Si, i.e., ''border traps'' [D. M. Fleetwood, IEEE Trans. Nucl. Sci. NS-39, 269 (1992)]. The effective density of border traps depends on the time scale and bias conditions of the measurements. We show the revised nomenclature can provide focus to discussions of the buildup and annealing of radiation-induced charge in non-radiation-hardened MOS transistors, and to changes in the 1/f noise of MOS devices through irradiation and elevated-temperature annealing

An Ultrathin Single Crystalline Relaxor Ferroelectric Integrated on a High Mobility Semiconductor

Energy Technology Data Exchange (ETDEWEB)

Moghadam, Reza M. [Department; Xiao, Zhiyong [Department; Ahmadi-Majlan, Kamyar [Department; Grimley, Everett D. [Department; Bowden, Mark [Environmental; amp, Biological Sciences Directorate, Pacific Northwest National Laboratory, Richland, Washington 99352, United States; Ong, Phuong-Vu [Physical; amp, Computational Sciences Directorate, Pacific Northwest National Laboratory, Richland, Washington 99352, United States; Chambers, Scott A. [Physical; amp, Computational Sciences Directorate, Pacific Northwest National Laboratory, Richland, Washington 99352, United States; Lebeau, James M. [Department; Hong, Xia [Department; Sushko, Peter V. [Physical; amp, Computational Sciences Directorate, Pacific Northwest National Laboratory, Richland, Washington 99352, United States; Ngai, Joseph H. [Department

2017-09-13

The epitaxial growth of multifunctional oxides on semiconductors has opened a pathway to introduce new functionalities to semiconductor device technologies. In particular, ferroelectric materials integrated on semiconductors could lead to low-power field-effect devices that can be used for logic or memory. Essential to realizing such field-effect devices is the development of ferroelectric metal-oxide-semiconductor (MOS) capacitors, in which the polarization of a ferroelectric gate is coupled to the surface potential of a semiconducting channel. Here we demonstrate that ferroelectric MOS capacitors can be realized using single crystalline SrZrxTi1-xO3 (x= 0.7) that has been epitaxially grown on Ge. We find that the ferroelectric properties of SrZrxTi1-xO3 are exceptionally robust, as gate layers as thin as 5 nm give rise to hysteretic capacitance-voltage characteristics that are 2 V in width. The development of ferroelectric MOS capacitors with gate thicknesses that are technologically relevant opens a pathway to realize scalable ferroelectric field-effect devices.

Method to induce a conductivity type in a semiconductor

International Nuclear Information System (INIS)

Aboaf, J.A.; Sedgwick, T.O.

1977-01-01

The invention deals with a method in which one can produce a region of a desired type of conductivity in a semiconductor as is required for, e.g., field effect transistors. A metal oxide layer combination consisting of several metal oxides is thus deposited on the semiconductor. This is carried out according to the invention in a non-oxidizing atmosphere at temperatures at which the metal oxides do not diffuse into the semiconductor. The sign and degree of the induced conductivity type is adjusted by dosed depositing of the individual metal oxides related to one another. The gaseous metal oxides due to heating, mixed with a non-oxidizing gas are added in compounds to the semiconductor heated to depositing temperature. These compounds decompose at the depositing temperature into the metal oxide and a gaseous residual component. The semiconductor consists of silicon, and nitrogen is used as carrier gas; when depositing aluminium oxide, gaseous aluminium isopropoxide is added; when depositing silicon dioxide, gaseous tetra-ethyl orthosilicate. (ORU) [de

AlN and Al oxy-nitride gate dielectrics for reliable gate stacks on Ge and InGaAs channels

Energy Technology Data Exchange (ETDEWEB)

Guo, Y.; Li, H.; Robertson, J. [Engineering Department, Cambridge University, Cambridge CB2 1PZ (United Kingdom)

2016-05-28

AlN and Al oxy-nitride dielectric layers are proposed instead of Al{sub 2}O{sub 3} as a component of the gate dielectric stacks on higher mobility channels in metal oxide field effect transistors to improve their positive bias stress instability reliability. It is calculated that the gap states of nitrogen vacancies in AlN lie further away in energy from the semiconductor band gap than those of oxygen vacancies in Al{sub 2}O{sub 3}, and thus AlN might be less susceptible to charge trapping and have a better reliability performance. The unfavourable defect energy level distribution in amorphous Al{sub 2}O{sub 3} is attributed to its larger coordination disorder compared to the more symmetrically bonded AlN. Al oxy-nitride is also predicted to have less tendency for charge trapping.

Printing Semiconductor-Insulator Polymer Bilayers for High-Performance Coplanar Field-Effect Transistors.

Science.gov (United States)

Bu, Laju; Hu, Mengxing; Lu, Wanlong; Wang, Ziyu; Lu, Guanghao

2018-01-01

Source-semiconductor-drain coplanar transistors with an organic semiconductor layer located within the same plane of source/drain electrodes are attractive for next-generation electronics, because they could be used to reduce material consumption, minimize parasitic leakage current, avoid cross-talk among different devices, and simplify the fabrication process of circuits. Here, a one-step, drop-casting-like printing method to realize a coplanar transistor using a model semiconductor/insulator [poly(3-hexylthiophene) (P3HT)/polystyrene (PS)] blend is developed. By manipulating the solution dewetting dynamics on the metal electrode and SiO 2 dielectric, the solution within the channel region is selectively confined, and thus make the top surface of source/drain electrodes completely free of polymers. Subsequently, during solvent evaporation, vertical phase separation between P3HT and PS leads to a semiconductor-insulator bilayer structure, contributing to an improved transistor performance. Moreover, this coplanar transistor with semiconductor-insulator bilayer structure is an ideal system for injecting charges into the insulator via gate-stress, and the thus-formed PS electret layer acts as a "nonuniform floating gate" to tune the threshold voltage and effective mobility of the transistors. Effective field-effect mobility higher than 1 cm 2 V -1 s -1 with an on/off ratio > 10 7 is realized, and the performances are comparable to those of commercial amorphous silicon transistors. This coplanar transistor simplifies the fabrication process of corresponding circuits. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Valorization of GaN based metal-organic chemical vapor deposition dust a semiconductor power device industry waste through mechanochemical oxidation and leaching: A sustainable green process.

Science.gov (United States)

Swain, Basudev; Mishra, Chinmayee; Lee, Chan Gi; Park, Kyung-Soo; Lee, Kun-Jae

2015-07-01

Dust generated during metal organic vapor deposition (MOCVD) process of GaN based semiconductor power device industry contains significant amounts of gallium and indium. These semiconductor power device industry wastes contain gallium as GaN and Ga0.97N0.9O0.09 is a concern for the environment which can add value through recycling. In the present study, this waste is recycled through mechanochemical oxidation and leaching. For quantitative recovery of gallium, two different mechanochemical oxidation leaching process flow sheets are proposed. In one process, first the Ga0.97N0.9O0.09 of the MOCVD dust is leached at the optimum condition. Subsequently, the leach residue is mechanochemically treated, followed by oxidative annealing and finally re-leached. In the second process, the MOCVD waste dust is mechanochemically treated, followed by oxidative annealing and finally leached. Both of these treatment processes are competitive with each other, appropriate for gallium leaching and treatment of the waste MOCVD dust. Without mechanochemical oxidation, 40.11 and 1.86 w/w% of gallium and Indium are leached using 4M HCl, 100°C and pulp density of 100 kg/m(3,) respectively. After mechanochemical oxidation, both these processes achieved 90 w/w% of gallium and 1.86 w/w% of indium leaching at their optimum condition. Copyright © 2015 Elsevier Inc. All rights reserved.

Effective dose assessment in the maxillofacial region using thermoluminescent (TLD) and metal oxide semiconductor field-effect transistor (MOSFET) dosemeters: a comparative study.

Science.gov (United States)

Koivisto, J; Schulze, D; Wolff, J; Rottke, D

2014-01-01

The objective of this study was to compare the performance of metal oxide semiconductor field-effect transistor (MOSFET) technology dosemeters with thermoluminescent dosemeters (TLDs) (TLD 100; Thermo Fisher Scientific, Waltham, MA) in the maxillofacial area. Organ and effective dose measurements were performed using 40 TLD and 20 MOSFET dosemeters that were alternately placed in 20 different locations in 1 anthropomorphic RANDO(®) head phantom (the Phantom Laboratory, Salem, NY). The phantom was exposed to four different CBCT default maxillofacial protocols using small (4 × 5 cm) to full face (20 × 17 cm) fields of view (FOVs). The TLD effective doses ranged between 7.0 and 158.0 µSv and the MOSFET doses between 6.1 and 175.0 µSv. The MOSFET and TLD effective doses acquired using four different (FOV) protocols were as follows: face maxillofacial (FOV 20 × 17 cm) (MOSFET, 83.4 µSv; TLD, 87.6 µSv; -5%); teeth, upper jaw (FOV, 8.5 × 5.0 cm) (MOSFET, 6.1 µSv; TLD, 7.0 µSv; -14%); tooth, mandible and left molar (FOV, 4 × 5 cm) (MOSFET, 10.3 µSv; TLD, 12.3 µSv; -16%) and teeth, both jaws (FOV, 10 × 10 cm) (MOSFET, 175 µSv; TLD, 158 µSv; +11%). The largest variation in organ and effective dose was recorded in the small FOV protocols. Taking into account the uncertainties of both measurement methods and the results of the statistical analysis, the effective doses acquired using MOSFET dosemeters were found to be in good agreement with those obtained using TLD dosemeters. The MOSFET dosemeters constitute a feasible alternative for TLDs for the effective dose assessment of CBCT devices in the maxillofacial region.

Metal contact engineering and registration-free fabrication of complementary metal-oxide semiconductor integrated circuits using aligned carbon nanotubes.

Science.gov (United States)

Wang, Chuan; Ryu, Koungmin; Badmaev, Alexander; Zhang, Jialu; Zhou, Chongwu

2011-02-22

Complementary metal-oxide semiconductor (CMOS) operation is very desirable for logic circuit applications as it offers rail-to-rail swing, larger noise margin, and small static power consumption. However, it remains to be a challenging task for nanotube-based devices. Here in this paper, we report our progress on metal contact engineering for n-type nanotube transistors and CMOS integrated circuits using aligned carbon nanotubes. By using Pd as source/drain contacts for p-type transistors, small work function metal Gd as source/drain contacts for n-type transistors, and evaporated SiO(2) as a passivation layer, we have achieved n-type transistor, PN diode, and integrated CMOS inverter with an air-stable operation. Compared with other nanotube n-doping techniques, such as potassium doping, PEI doping, hydrazine doping, etc., using low work function metal contacts for n-type nanotube devices is not only air stable but also integrated circuit fabrication compatible. Moreover, our aligned nanotube platform for CMOS integrated circuits shows significant advantage over the previously reported individual nanotube platforms with respect to scalability and reproducibility and suggests a practical and realistic approach for nanotube-based CMOS integrated circuit applications.

Multichannel, time-resolved picosecond laser ultrasound imaging and spectroscopy with custom complementary metal-oxide-semiconductor detector

International Nuclear Information System (INIS)

Smith, Richard J.; Light, Roger A.; Johnston, Nicholas S.; Pitter, Mark C.; Somekh, Mike G.; Sharples, Steve D.

2010-01-01

This paper presents a multichannel, time-resolved picosecond laser ultrasound system that uses a custom complementary metal-oxide-semiconductor linear array detector. This novel sensor allows parallel phase-sensitive detection of very low contrast modulated signals with performance in each channel comparable to that of a discrete photodiode and a lock-in amplifier. Application of the instrument is demonstrated by parallelizing spatial measurements to produce two-dimensional thickness maps on a layered sample, and spectroscopic parallelization is demonstrated by presenting the measured Brillouin oscillations from a gallium arsenide wafer. This paper demonstrates the significant advantages of our approach to pump probe systems, especially picosecond ultrasonics.

Multichannel, time-resolved picosecond laser ultrasound imaging and spectroscopy with custom complementary metal-oxide-semiconductor detector

Energy Technology Data Exchange (ETDEWEB)

Smith, Richard J.; Light, Roger A.; Johnston, Nicholas S.; Pitter, Mark C.; Somekh, Mike G. [Institute of Biophysics, Imaging and Optical Science, University of Nottingham, Nottinghamshire NG7 2RD (United Kingdom); Sharples, Steve D. [Applied Optics Group, Electrical Systems and Optics Research Division, University of Nottingham, Nottinghamshire NG7 2RD (United Kingdom)

2010-02-15

This paper presents a multichannel, time-resolved picosecond laser ultrasound system that uses a custom complementary metal-oxide-semiconductor linear array detector. This novel sensor allows parallel phase-sensitive detection of very low contrast modulated signals with performance in each channel comparable to that of a discrete photodiode and a lock-in amplifier. Application of the instrument is demonstrated by parallelizing spatial measurements to produce two-dimensional thickness maps on a layered sample, and spectroscopic parallelization is demonstrated by presenting the measured Brillouin oscillations from a gallium arsenide wafer. This paper demonstrates the significant advantages of our approach to pump probe systems, especially picosecond ultrasonics.

Thermal stability of atomic layer deposited WCxNy electrodes for metal oxide semiconductor devices

Science.gov (United States)

Zonensain, Oren; Fadida, Sivan; Fisher, Ilanit; Gao, Juwen; Danek, Michal; Eizenberg, Moshe

2018-01-01

This study is a thorough investigation of the chemical, structural, and electrical stability of W based organo-metallic films, grown by atomic layer deposition, for future use as gate electrodes in advanced metal oxide semiconductor structures. In an earlier work, we have shown that high effective work-function (4.7 eV) was produced by nitrogen enriched films (WCxNy) dominated by W-N chemical bonding, and low effective work-function (4.2 eV) was produced by hydrogen plasma resulting in WCx films dominated by W-C chemical bonding. In the current work, we observe, using x-ray diffraction analysis, phase transformation of the tungsten carbide and tungsten nitride phases after 900 °C annealing to the cubic tungsten phase. Nitrogen diffusion is also observed and is analyzed with time-of-flight secondary ion mass spectroscopy. After this 900 °C anneal, WCxNy effective work function tunability is lost and effective work-function values of 4.7-4.8 eV are measured, similar to stable effective work function values measured for PVD TiN up to 900 °C anneal. All the observed changes after annealing are discussed and correlated to the observed change in the effective work function.

Metal-oxide-semiconductor devices based on epitaxial germanium-carbon layers grown directly on silicon substrates by ultra-high-vacuum chemical vapor deposition

Science.gov (United States)

Kelly, David Quest

After the integrated circuit was invented in 1959, complementary metal-oxide-semiconductor (CMOS) technology soon became the mainstay of the semiconductor industry. Silicon-based CMOS has dominated logic technologies for decades. During this time, chip performance has grown at an exponential rate at the cost of higher power consumption and increased process complexity. The performance gains have been made possible through scaling down circuit dimensions by improvements in lithography capabilities. Since scaling cannot continue forever, researchers have vigorously pursued new ways of improving the performance of metal-oxide-semiconductor field-effect transistors (MOSFETs) without having to shrink gate lengths and reduce the gate insulator thickness. Strained silicon, with its ability to boost transistor current by improving the channel mobility, is one of the methods that has already found its way into production. Although not yet in production, high-kappa dielectrics have also drawn wide interest in industry since they allow for the reduction of the electrical oxide thickness of the gate stack without having to reduce the physical thickness of the dielectric. Further out on the horizon is the incorporation of high-mobility materials such as germanium (Ge), silicon-germanium (Si1-xGe x), and the III-V semiconductors. Among the high-mobility materials, Ge has drawn the most attention because it has been shown to be compatible with high-kappa dielectrics and to produce high drive currents compared to Si. Among the most difficult challenges for integrating Ge on Si is finding a suitable method for reducing the number of crystal defects. The use of strain-relaxed Si1- xGex buffers has proven successful for reducing the threading dislocation density in Ge epitaxial layers, but questions remain as to the viability of this method in terms of cost and process complexity. This dissertation presents research on thin germanium-carbon (Ge 1-yCy layers on Si for the fabrication

Co-integration of nano-scale vertical- and horizontal-channel metal-oxide-semiconductor field-effect transistors for low power CMOS technology.

Science.gov (United States)

Sun, Min-Chul; Kim, Garam; Kim, Sang Wan; Kim, Hyun Woo; Kim, Hyungjin; Lee, Jong-Ho; Shin, Hyungcheol; Park, Byung-Gook

2012-07-01

In order to extend the conventional low power Si CMOS technology beyond the 20-nm node without SOI substrates, we propose a novel co-integration scheme to build horizontal- and vertical-channel MOSFETs together and verify the idea using TCAD simulations. From the fabrication viewpoint, it is highlighted that this scheme provides additional vertical devices with good scalability by adding a few steps to the conventional CMOS process flow for fin formation. In addition, the benefits of the co-integrated vertical devices are investigated using a TCAD device simulation. From this study, it is confirmed that the vertical device shows improved off-current control and a larger drive current when the body dimension is less than 20 nm, due to the electric field coupling effect at the double-gated channel. Finally, the benefits from the circuit design viewpoint, such as the larger midpoint gain and beta and lower power consumption, are confirmed by the mixed-mode circuit simulation study.

Extraordinary Magnetoresistance in Semiconductor/Metal Hybrids: A Review

Science.gov (United States)

Sun, Jian; Kosel, Jürgen

2013-01-01

The Extraordinary Magnetoresistance (EMR) effect is a change in the resistance of a device upon the application of a magnetic field in hybrid structures, consisting of a semiconductor and a metal. The underlying principle of this phenomenon is a change of the current path in the hybrid structure upon application of a magnetic field, due to the Lorentz force. Specifically, the ratio of current, flowing through the highly conducting metal and the poorly conducting semiconductor, changes. The main factors for the device’s performance are: the device geometry, the conductivity of the metal and semiconductor, and the mobility of carriers in the semiconductor. Since the discovery of the EMR effect, much effort has been devoted to utilize its promising potential. In this review, a comprehensive overview of the research on the EMR effect and EMR devices is provided. Different geometries of EMR devices are compared with respect to MR ratio and output sensitivity, and the criteria of material selection for high-performance devices are discussed. PMID:28809321

Tin - an unlikely ally for silicon field effect transistors?

KAUST Repository

Hussain, Aftab M.; Fahad, Hossain M.; Singh, Nirpendra; Sevilla, Galo T.; Schwingenschlö gl, Udo; Hussain, Muhammad Mustafa

2014-01-01

We explore the effectiveness of tin (Sn), by alloying it with silicon, to use SiSn as a channel material to extend the performance of silicon based complementary metal oxide semiconductors. Our density functional theory based simulation shows

Effective dose estimation for pediatric upper gastrointestinal examinations using an anthropomorphic phantom set and metal oxide semiconductor field-effect transistor (MOSFET) technology.

Science.gov (United States)

Emigh, Brent; Gordon, Christopher L; Connolly, Bairbre L; Falkiner, Michelle; Thomas, Karen E

2013-09-01

There is a need for updated radiation dose estimates in pediatric fluoroscopy given the routine use of new dose-saving technologies and increased radiation safety awareness in pediatric imaging. To estimate effective doses for standardized pediatric upper gastrointestinal (UGI) examinations at our institute using direct dose measurement, as well as provide dose-area product (DAP) to effective dose conversion factors to be used for the estimation of UGI effective doses for boys and girls up to 10 years of age at other centers. Metal oxide semiconductor field-effect transistor (MOSFET) dosimeters were placed within four anthropomorphic phantoms representing children ≤10 years of age and exposed to mock UGI examinations using exposures much greater than used clinically to minimize measurement error. Measured effective dose was calculated using ICRP 103 weights and scaled to our institution's standardized clinical UGI (3.6-min fluoroscopy, four spot exposures and four examination beam projections) as determined from patient logs. Results were compared to Monte Carlo simulations and related to fluoroscope-displayed DAP. Measured effective doses for standardized pediatric UGI examinations in our institute ranged from 0.35 to 0.79 mSv in girls and were 3-8% lower for boys. Simulation-derived and measured effective doses were in agreement (percentage differences  0.18). DAP-to-effective dose conversion factors ranged from 6.5 ×10(-4) mSv per Gy-cm(2) to 4.3 × 10(-3) mSv per Gy-cm(2) for girls and were similarly lower for boys. Using modern fluoroscopy equipment, the effective dose associated with the UGI examination in children ≤10 years at our institute is MOSFETs, which were shown to agree with Monte Carlo simulated doses.

High-performance III-V MOSFET with nano-stacked high-k gate dielectric and 3D fin-shaped structure.

Science.gov (United States)

Chen, Szu-Hung; Liao, Wen-Shiang; Yang, Hsin-Chia; Wang, Shea-Jue; Liaw, Yue-Gie; Wang, Hao; Gu, Haoshuang; Wang, Mu-Chun

2012-08-01

A three-dimensional (3D) fin-shaped field-effect transistor structure based on III-V metal-oxide-semiconductor field-effect transistor (MOSFET) fabrication has been demonstrated using a submicron GaAs fin as the high-mobility channel. The fin-shaped channel has a thickness-to-width ratio (TFin/WFin) equal to 1. The nano-stacked high-k Al2O3 dielectric was adopted as a gate insulator in forming a metal-oxide-semiconductor structure to suppress gate leakage. The 3D III-V MOSFET exhibits outstanding gate controllability and shows a high Ion/Ioff ratio > 105 and a low subthreshold swing of 80 mV/decade. Compared to a conventional Schottky gate metal-semiconductor field-effect transistor or planar III-V MOSFETs, the III-V MOSFET in this work exhibits a significant performance improvement and is promising for future development of high-performance n-channel devices based on III-V materials.

Laser Doppler perfusion imaging with a complimentary metal oxide semiconductor image sensor

NARCIS (Netherlands)

Serov, Alexander; Steenbergen, Wiendelt; de Mul, F.F.M.

2002-01-01

We utilized a complimentary metal oxide semiconductor video camera for fast f low imaging with the laser Doppler technique. A single sensor is used for both observation of the area of interest and measurements of the interference signal caused by dynamic light scattering from moving particles inside

Hybrid complementary circuits based on p-channel organic and n-channel metal oxide transistors with balanced carrier mobilities of up to 10 cm2/Vs

KAUST Repository

Isakov, Ivan

2016-12-29

We report the development of hybrid complementary inverters based on p-channel organic and n-channel metal oxide thin-film transistors (TFTs) both processed from solution at <200 °C. For the organic TFTs, a ternary blend consisting of the small-molecule 2,7-dioctyl[1]benzothieno[3,2-b][1]benzothiophene, the polymer indacenodithiophene-benzothiadiazole (CIDT-BT) and the p-type dopant CF was employed, whereas the isotype InO/ZnO heterojunction was used for the n-channel TFTs. When integrated on the same substrate, p- and n-channel devices exhibited balanced carrier mobilities up to 10 cm/Vs. Hybrid complementary inverters based on these devices show high signal gain (>30 V/V) and wide noise margins (70%). The moderate processing temperatures employed and the achieved level of device performance highlight the tremendous potential of the technology for application in the emerging sector of large-area microelectronics.

Hybrid complementary circuits based on p-channel organic and n-channel metal oxide transistors with balanced carrier mobilities of up to 10 cm2/Vs

KAUST Repository

Isakov, Ivan; Paterson, Alexandra F.; Solomeshch, Olga; Tessler, Nir; Zhang, Qiang; Li, Jun; Zhang, Xixiang; Fei, Zhuping; Heeney, Martin; Anthopoulos, Thomas D.

2016-01-01

We report the development of hybrid complementary inverters based on p-channel organic and n-channel metal oxide thin-film transistors (TFTs) both processed from solution at <200 °C. For the organic TFTs, a ternary blend consisting of the small-molecule 2,7-dioctyl[1]benzothieno[3,2-b][1]benzothiophene, the polymer indacenodithiophene-benzothiadiazole (CIDT-BT) and the p-type dopant CF was employed, whereas the isotype InO/ZnO heterojunction was used for the n-channel TFTs. When integrated on the same substrate, p- and n-channel devices exhibited balanced carrier mobilities up to 10 cm/Vs. Hybrid complementary inverters based on these devices show high signal gain (>30 V/V) and wide noise margins (70%). The moderate processing temperatures employed and the achieved level of device performance highlight the tremendous potential of the technology for application in the emerging sector of large-area microelectronics.

Long-term research in Japan: amorphous metals, metal oxide varistors, high-power semiconductors and superconducting generators

Energy Technology Data Exchange (ETDEWEB)

Hane, G.J.; Yorozu, M.; Sogabe, T.; Suzuki, S.

1985-04-01

The review revealed that significant activity is under way in the research of amorphous metals, but that little fundamental work is being pursued on metal oxide varistors and high-power semiconductors. Also, the investigation of long-term research program plans for superconducting generators reveals that activity is at a low level, pending the recommendations of a study currently being conducted through Japan's Central Electric Power Council.

Verification of the plan dosimetry for high dose rate brachytherapy using metal-oxide-semiconductor field effect transistor detectors

International Nuclear Information System (INIS)

Qi Zhenyu; Deng Xiaowu; Huang Shaomin; Lu Jie; Lerch, Michael; Cutajar, Dean; Rosenfeld, Anatoly

2007-01-01

The feasibility of a recently designed metal-oxide-semiconductor field effect transistor (MOSFET) dosimetry system for dose verification of high dose rate (HDR) brachytherapy treatment planning was investigated. MOSFET detectors were calibrated with a 0.6 cm 3 NE-2571 Farmer-type ionization chamber in water. Key characteristics of the MOSFET detectors, such as the energy dependence, that will affect phantom measurements with HDR 192 Ir sources were measured. The MOSFET detector was then applied to verify the dosimetric accuracy of HDR brachytherapy treatments in a custom-made water phantom. Three MOSFET detectors were calibrated independently, with the calibration factors ranging from 0.187 to 0.215 cGy/mV. A distance dependent energy response was observed, significant within 2 cm from the source. The new MOSFET detector has a good reproducibility ( 2 =1). It was observed that the MOSFET detectors had a linear response to dose until the threshold voltage reached approximately 24 V for 192 Ir source measurements. Further comparison of phantom measurements using MOSFET detectors with dose calculations by a commercial treatment planning system for computed tomography-based brachytherapy treatment plans showed that the mean relative deviation was 2.2±0.2% for dose points 1 cm away from the source and 2.0±0.1% for dose points located 2 cm away. The percentage deviations between the measured doses and the planned doses were below 5% for all the measurements. The MOSFET detector, with its advantages of small physical size and ease of use, is a reliable tool for quality assurance of HDR brachytherapy. The phantom verification method described here is universal and can be applied to other HDR brachytherapy treatments

Unipolar resistive switching in metal oxide/organic semiconductor non-volatile memories as a critical phenomenon

International Nuclear Information System (INIS)

Bory, Benjamin F.; Meskers, Stefan C. J.; Rocha, Paulo R. F.; Gomes, Henrique L.; Leeuw, Dago M. de

2015-01-01

Diodes incorporating a bilayer of an organic semiconductor and a wide bandgap metal oxide can show unipolar, non-volatile memory behavior after electroforming. The prolonged bias voltage stress induces defects in the metal oxide with an areal density exceeding 10 17  m −2 . We explain the electrical bistability by the coexistence of two thermodynamically stable phases at the interface between an organic semiconductor and metal oxide. One phase contains mainly ionized defects and has a low work function, while the other phase has mainly neutral defects and a high work function. In the diodes, domains of the phase with a low work function constitute current filaments. The phase composition and critical temperature are derived from a 2D Ising model as a function of chemical potential. The model predicts filamentary conduction exhibiting a negative differential resistance and nonvolatile memory behavior. The model is expected to be generally applicable to any bilayer system that shows unipolar resistive switching

Electrical analysis of high dielectric constant insulator and metal gate metal oxide semiconductor capacitors on flexible bulk mono-crystalline silicon

KAUST Repository

Ghoneim, Mohamed T.; Rojas, Jhonathan Prieto; Young, Chadwin D.; Bersuker, Gennadi; Hussain, Muhammad Mustafa

2015-01-01

We report on the electrical study of high dielectric constant insulator and metal gate metal oxide semiconductor capacitors (MOSCAPs) on a flexible ultra-thin (25 μm) silicon fabric which is peeled off using a CMOS compatible process from a standard

Microbially-mediated method for synthesis of non-oxide semiconductor nanoparticles

Energy Technology Data Exchange (ETDEWEB)

Phelps, Tommy J.; Lauf, Robert J.; Moon, Ji-Won; Rondinone, Adam Justin; Love, Lonnie J.; Duty, Chad Edward; Madden, Andrew Stephen; Li, Yiliang; Ivanov, Ilia N.; Rawn, Claudia Jeanette

2017-09-19

The invention is directed to a method for producing non-oxide semiconductor nanoparticles, the method comprising: (a) subjecting a combination of reaction components to conditions conducive to microbially-mediated formation of non-oxide semiconductor nanoparticles, wherein said combination of reaction components comprises i) anaerobic microbes, ii) a culture medium suitable for sustaining said anaerobic microbes, iii) a metal component comprising at least one type of metal ion, iv) a non-metal component comprising at least one non-metal selected from the group consisting of S, Se, Te, and As, and v) one or more electron donors that provide donatable electrons to said anaerobic microbes during consumption of the electron donor by said anaerobic microbes; and (b) isolating said non-oxide semiconductor nanoparticles, which contain at least one of said metal ions and at least one of said non-metals. The invention is also directed to non-oxide semiconductor nanoparticle compositions produced as above and having distinctive properties.

Microbially-mediated method for synthesis of non-oxide semiconductor nanoparticles

Science.gov (United States)

Phelps, Tommy J.; Lauf, Robert J.; Moon, Ji Won; Rondinone, Adam J.; Love, Lonnie J.; Duty, Chad Edward; Madden, Andrew Stephen; Li, Yiliang; Ivanov, Ilia N.; Rawn, Claudia Jeanette

2014-06-24

The invention is directed to a method for producing non-oxide semiconductor nanoparticles, the method comprising: (a) subjecting a combination of reaction components to conditions conducive to microbially-mediated formation of non-oxide semiconductor nanoparticles, wherein said combination of reaction components comprises i) anaerobic microbes, ii) a culture medium suitable for sustaining said anaerobic microbes, iii) a metal component comprising at least one type of metal ion, iv) a non-metal component containing at least one non-metal selected from the group consisting of S, Se, Te, and As, and v) one or more electron donors that provide donatable electrons to said anaerobic microbes during consumption of the electron donor by said anaerobic microbes; and (b) isolating said non-oxide semiconductor nanoparticles, which contain at least one of said metal ions and at least one of said non-metals. The invention is also directed to non-oxide semiconductor nanoparticle compositions produced as above and having distinctive properties.

Nonvolatile memory characteristics in metal-oxide-semiconductors containing metal nanoparticles fabricated by using a unique laser irradiation method

International Nuclear Information System (INIS)

Yang, JungYup; Yoon, KapSoo; Kim, JuHyung; Choi, WonJun; Do, YoungHo; Kim, ChaeOk; Hong, JinPyo

2006-01-01

Metal-oxide-semiconductor (MOS) capacitors with metal nanoparticles (Co NP) were successfully fabricated by utilizing an external laser exposure technique for application of non-volatile memories. Images of high-resolution transmission electron microscopy reveal that the spherically shaped Co NP are clearly embedded in the gate oxide layer. Capacitance-voltage measurements exhibit typical charging and discharging effects with a large flat-band shift. The effects of the tunnel oxide thickness and the different tunnel materials are analyzed using capacitance-voltage and retention characteristics. In addition, the memory characteristics of the NP embedded in a high-permittivity material are investigated because the thickness of conventionally available SiO 2 gates is approaching the quantum tunneling limit as devices are scaled down. Finally, the suitability of NP memory devices for nonvolatile memory applications is also discussed. The present results suggest that our unique laser exposure technique holds promise for the NP formation as floating gate elements in nonvolatile NP memories and that the quality of the tunnel oxide is very important for enhancing the retention properties of nonvolatile memory.

Epitaxial ZnO gate dielectrics deposited by RF sputter for AlGaN/GaN metal-oxide-semiconductor high-electron-mobility transistors

Science.gov (United States)

Yoon, Seonno; Lee, Seungmin; Kim, Hyun-Seop; Cha, Ho-Young; Lee, Hi-Deok; Oh, Jungwoo

2018-01-01

Radio frequency (RF)-sputtered ZnO gate dielectrics for AlGaN/GaN metal-oxide-semiconductor high-electron-mobility transistors (MOS-HEMTs) were investigated with varying O2/Ar ratios. The ZnO deposited with a low oxygen content of 4.5% showed a high dielectric constant and low interface trap density due to the compensation of oxygen vacancies during the sputtering process. The good capacitance-voltage characteristics of ZnO-on-AlGaN/GaN capacitors resulted from the high crystallinity of oxide at the interface, as investigated by x-ray diffraction and high-resolution transmission electron microscopy. The MOS-HEMTs demonstrated comparable output electrical characteristics with conventional Ni/Au HEMTs but a lower gate leakage current. At a gate voltage of -20 V, the typical gate leakage current for a MOS-HEMT with a gate length of 6 μm and width of 100 μm was found to be as low as 8.2 × 10-7 mA mm-1, which was three orders lower than that of the Ni/Au Schottky gate HEMT. The reduction of the gate leakage current improved the on/off current ratio by three orders of magnitude. These results indicate that RF-sputtered ZnO with a low O2/Ar ratio is a good gate dielectric for high-performance AlGaN/GaN MOS-HEMTs.

High-performance all-printed amorphous oxide FETs and logics with electronically compatible electrode/ channel interface.

Science.gov (United States)

Sharma, Bhupendra Kumar; Stoesser, Anna; Mondal, Sandeep Kumar; Garlapati, Suresh K; Fawey, Mohammed H; Chakravadhanula, Venkata Sai Kiran; Kruk, Robert; Hahn, Horst; Dasgupta, Subho

2018-06-12

Oxide semiconductors typically show superior device performance compared to amorphous silicon or organic counterparts, especially, when they are physical vapor deposited. However, it is not easy to reproduce identical device characteristics when the oxide field-effect transistors (FETs) are solution-processed/ printed; the level of complexity further intensifies with the need to print the passive elements as well. Here, we developed a protocol for designing the most electronically compatible electrode/ channel interface based on the judicious material selection. Exploiting this newly developed fabrication schemes, we are now able to demonstrate high-performance all-printed FETs and logic circuits using amorphous indium-gallium-zinc oxide (a-IGZO) semiconductor, indium tin oxide (ITO) as electrodes and composite solid polymer electrolyte as the gate insulator. Interestingly, all-printed FETs demonstrate an optimal electrical performance in terms of threshold voltages and device mobility and may very well be compared with devices fabricated using sputtered ITO electrodes. This observation originates from the selection of electrode/ channel materials from the same transparent semiconductor oxide family, resulting in the formation of In-Sn-Zn-O (ITZO) based diffused a-IGZO/ ITO interface that controls doping density while ensuring high electrical performance. Compressive spectroscopic studies reveal that Sn doping mediated excellent band alignment of IGZO with ITO electrodes is responsible for the excellent device performance observed. All-printed n-MOS based logic circuits have also been demonstrated towards new-generation portable electronics.

Extraordinary magnetoresistance in semiconductor/metal hybrids: A review

KAUST Repository

Sun, J.

2013-02-13

The Extraordinary Magnetoresistance (EMR) effect is a change in the resistance of a device upon the application of a magnetic field in hybrid structures, consisting of a semiconductor and a metal. The underlying principle of this phenomenon is a change of the current path in the hybrid structure upon application of a magnetic field, due to the Lorentz force. Specifically, the ratio of current, flowing through the highly conducting metal and the poorly conducting semiconductor, changes. The main factors for the device\\'s performance are: the device geometry, the conductivity of the metal and semiconductor, and the mobility of carriers in the semiconductor. Since the discovery of the EMR effect, much effort has been devoted to utilize its promising potential. In this review, a comprehensive overview of the research on the EMR effect and EMR devices is provided. Different geometries of EMR devices are compared with respect to MR ratio and output sensitivity, and the criteria of material selection for high-performance devices are discussed. 2013 by the authors.

Extraordinary Magnetoresistance in Semiconductor/Metal Hybrids: A Review

Directory of Open Access Journals (Sweden)

Jürgen Kosel

2013-02-01

Full Text Available The Extraordinary Magnetoresistance (EMR effect is a change in the resistance of a device upon the application of a magnetic field in hybrid structures, consisting of a semiconductor and a metal. The underlying principle of this phenomenon is a change of the current path in the hybrid structure upon application of a magnetic field, due to the Lorentz force. Specifically, the ratio of current, flowing through the highly conducting metal and the poorly conducting semiconductor, changes. The main factors for the device’s performance are: the device geometry, the conductivity of the metal and semiconductor, and the mobility of carriers in the semiconductor. Since the discovery of the EMR effect, much effort has been devoted to utilize its promising potential. In this review, a comprehensive overview of the research on the EMR effect and EMR devices is provided. Different geometries of EMR devices are compared with respect to MR ratio and output sensitivity, and the criteria of material selection for high-performance devices are discussed.

Coulomb blockade based field-effect transistors exploiting stripe-shaped channel geometries of self-assembled metal nanoparticles.

Science.gov (United States)

Lehmann, Hauke; Willing, Svenja; Möller, Sandra; Volkmann, Mirjam; Klinke, Christian

2016-08-14

Metallic nanoparticles offer possibilities to build basic electric devices with new functionality and improved performance. Due to the small volume and the resulting low self-capacitance, each single nanoparticle exhibits a high charging energy. Thus, a Coulomb-energy gap emerges during transport experiments that can be shifted by electric fields, allowing for charge transport whenever energy levels of neighboring particles match. Hence, the state of the device changes sequentially between conducting and non-conducting instead of just one transition from conducting to pinch-off as in semiconductors. To exploit this behavior for field-effect transistors, it is necessary to use uniform nanoparticles in ordered arrays separated by well-defined tunnel barriers. In this work, CoPt nanoparticles with a narrow size distribution are synthesized by colloidal chemistry. These particles are deposited via the scalable Langmuir-Blodgett technique as ordered, homogeneous monolayers onto Si/SiO2 substrates with pre-patterned gold electrodes. The resulting nanoparticle arrays are limited to stripes of adjustable lengths and widths. In such a defined channel with a limited number of conduction paths the current can be controlled precisely by a gate voltage. Clearly pronounced Coulomb oscillations are observed up to temperatures of 150 K. Using such systems as field-effect transistors yields unprecedented oscillating current modulations with on/off-ratios of around 70%.

Bipolar resistive switching in metal-insulator-semiconductor nanostructures based on silicon nitride and silicon oxide

Science.gov (United States)

Koryazhkina, M. N.; Tikhov, S. V.; Mikhaylov, A. N.; Belov, A. I.; Korolev, D. S.; Antonov, I. N.; Karzanov, V. V.; Gorshkov, O. N.; Tetelbaum, D. I.; Karakolis, P.; Dimitrakis, P.

2018-03-01

Bipolar resistive switching in metal-insulator-semiconductor (MIS) capacitor-like structures with an inert Au top electrode and a Si3N4 insulator nanolayer (6 nm thick) has been observed. The effect of a highly doped n +-Si substrate and a SiO2 interlayer (2 nm) is revealed in the changes in the semiconductor space charge region and small-signal parameters of parallel and serial equivalent circuit models measured in the high- and low-resistive capacitor states, as well as under laser illumination. The increase in conductivity of the semiconductor capacitor plate significantly reduces the charging and discharging times of capacitor-like structures.

Effective carrier sweepout in a silicon waveguide by a metal-semiconductor-metal structure

DEFF Research Database (Denmark)

Ding, Yunhong; Hu, Hao; Ou, Haiyan

2015-01-01

We demonstrate effective carrier depletion by metal-semiconductor-metal junctions for a silicon waveguide. Photo-generated carriers are efficiently swept out by applying bias voltages, and a shortest carrier lifetime of only 55 ps is demonstrated.......We demonstrate effective carrier depletion by metal-semiconductor-metal junctions for a silicon waveguide. Photo-generated carriers are efficiently swept out by applying bias voltages, and a shortest carrier lifetime of only 55 ps is demonstrated....

Hysteresis phenomena at metal-semiconductor phase transformation in vanadium oxides

International Nuclear Information System (INIS)

Lanskaya, T.G.; Merkulov, I.A.; Chudnovski , F.A.

1978-01-01

The hysteresis phenomena during the metal-semiconductor phase transformation (MSPT) in vanadium oxides are investigated. It is shown experimentally that the hysteresis effects during MSPT in vanadium oxides are associated not only with the martensite nature of the transformation, but also with activation processes. It is shown that the hysteresis phenomena during MSPT may be described by the distribution function of microregions of the crystal in the phase transformation temperature T 0 and the coercive temperature Tsub(c). An experimental method for constructing this distribution function was worked out. An analysis of the experimental data shows that finely dispersed films are characterized by a wide range of values of T 0 and Tsub(c) (55 deg C 0 <65 deg C, 6 deg C< Tsub(c)<12 deg C). The peculiarities of the optical recording of information on monocrystal and finely dispersed films are considered

Recent progress in high performance and reliable n-type transition metal oxide-based thin film transistors

International Nuclear Information System (INIS)

Yeon Kwon, Jang; Kyeong Jeong, Jae

2015-01-01

This review gives an overview of the recent progress in vacuum-based n-type transition metal oxide (TMO) thin film transistors (TFTs). Several excellent review papers regarding metal oxide TFTs in terms of fundamental electron structure, device process and reliability have been published. In particular, the required field-effect mobility of TMO TFTs has been increasing rapidly to meet the demands of the ultra-high-resolution, large panel size and three dimensional visual effects as a megatrend of flat panel displays, such as liquid crystal displays, organic light emitting diodes and flexible displays. In this regard, the effects of the TMO composition on the performance of the resulting oxide TFTs has been reviewed, and classified into binary, ternary and quaternary composition systems. In addition, the new strategic approaches including zinc oxynitride materials, double channel structures, and composite structures have been proposed recently, and were not covered in detail in previous review papers. Special attention is given to the advanced device architecture of TMO TFTs, such as back-channel-etch and self-aligned coplanar structure, which is a key technology because of their advantages including low cost fabrication, high driving speed and unwanted visual artifact-free high quality imaging. The integration process and related issues, such as etching, post treatment, low ohmic contact and Cu interconnection, required for realizing these advanced architectures are also discussed. (invited review)

Low operating voltage n-channel organic field effect transistors using lithium fluoride/PMMA bilayer gate dielectric

Energy Technology Data Exchange (ETDEWEB)

Kumar, S.; Dhar, A., E-mail: adhar@phy.iitkgp.ernet.in

2015-10-15

Highlights: • Alternative to chemically crosslinking of PMMA to achieve low leakage in provided. • Effect of LiF in reducing gate leakage through the OFET device is studied. • Effect of gate leakage on transistor performance has been investigated. • Low voltage operable and low temperature processed n-channel OFETs were fabricated. - Abstract: We report low temperature processed, low voltage operable n-channel organic field effect transistors (OFETs) using N,N′-Dioctyl-3,4,9,10-perylenedicarboximide (PTCDI-C{sub 8}) organic semiconductor and poly(methylmethacrylate) (PMMA)/lithium fluoride (LiF) bilayer gate dielectric. We have studied the role of LiF buffer dielectric in effectively reducing the gate leakage through the device and thus obtaining superior performance in contrast to the single layer PMMA dielectric devices. The bilayer OFET devices had a low threshold voltage (V{sub t}) of the order of 5.3 V. The typical values of saturation electron mobility (μ{sub s}), on/off ratio and inverse sub-threshold slope (S) for the range of devices made were estimated to be 2.8 × 10{sup −3} cm{sup 2}/V s, 385, and 3.8 V/decade respectively. Our work thus provides a potential substitution for much complicated process of chemically crosslinking PMMA to achieve low leakage, high capacitance, and thus low operating voltage OFETs.

Velocity overshoot decay mechanisms in compound semiconductor field-effect transistors with a submicron characteristic length

International Nuclear Information System (INIS)

Jyegal, Jang

2015-01-01

Velocity overshoot is a critically important nonstationary effect utilized for the enhanced performance of submicron field-effect devices fabricated with high-electron-mobility compound semiconductors. However, the physical mechanisms of velocity overshoot decay dynamics in the devices are not known in detail. Therefore, a numerical analysis is conducted typically for a submicron GaAs metal-semiconductor field-effect transistor in order to elucidate the physical mechanisms. It is found that there exist three different mechanisms, depending on device bias conditions. Specifically, at large drain biases corresponding to the saturation drain current (dc) region, the velocity overshoot suddenly begins to drop very sensitively due to the onset of a rapid decrease of the momentum relaxation time, not the mobility, arising from the effect of velocity-randomizing intervalley scattering. It then continues to drop rapidly and decays completely by severe mobility reduction due to intervalley scattering. On the other hand, at small drain biases corresponding to the linear dc region, the velocity overshoot suddenly begins to drop very sensitively due to the onset of a rapid increase of thermal energy diffusion by electrons in the channel of the gate. It then continues to drop rapidly for a certain channel distance due to the increasing thermal energy diffusion effect, and later completely decays by a sharply decreasing electric field. Moreover, at drain biases close to a dc saturation voltage, the mechanism is a mixture of the above two bias conditions. It is suggested that a large secondary-valley energy separation is essential to increase the performance of submicron devices

Ionic behavior of organic-inorganic metal halide perovskite based metal-oxide-semiconductor capacitors.

Science.gov (United States)

Wang, Yucheng; Zhang, Yuming; Pang, Tiqiang; Xu, Jie; Hu, Ziyang; Zhu, Yuejin; Tang, Xiaoyan; Luan, Suzhen; Jia, Renxu

2017-05-24

Organic-inorganic metal halide perovskites are promising semiconductors for optoelectronic applications. Despite the achievements in device performance, the electrical properties of perovskites have stagnated. Ion migration is speculated to be the main contributing factor for the many unusual electrical phenomena in perovskite-based devices. Here, to understand the intrinsic electrical behavior of perovskites, we constructed metal-oxide-semiconductor (MOS) capacitors based on perovskite films and performed capacitance-voltage (C-V) and current-voltage (I-V) measurements of the capacitors. The results provide direct evidence for the mixed ionic-electronic transport behavior within perovskite films. In the dark, there is electrical hysteresis in both the C-V and I-V curves because the mobile negative ions take part in charge transport despite frequency modulation. However, under illumination, the large amount of photoexcited free carriers screens the influence of the mobile ions with a low concentration, which is responsible for the normal C-V properties. Validation of ion migration for the gate-control ability of MOS capacitors is also helpful for the investigation of perovskite MOS transistors and other gate-control photovoltaic devices.

Group IIB-VIA semiconductor oxide cluster ions

Science.gov (United States)

Jayasekharan, Thankan

2018-05-01

Metal oxide cluster ions, MnOm± (M = Zn, Cd) and HgnOm- of various stoichiometry have been generated from solid IIB-VIA semiconductor oxides targets, (ZnO(s), CdO(s), and HgO(s)) by using pulse laser desorption ionization time of flight mass spectrometry with a laser of λ = 355 nm. Analysis of mass spectral data indicates the formation of stoichiometric cluster ions viz., (ZnO)n=1-30+ and (CdO)n=1-40+ along with -O bound anions, (ZnO)n=1-30O-, (CdO)n=1-40O- and (HgO)n=1-36O- from their respective solids. Further, metal oxoanions such as ZnOn=2,3-, CdOn=2,3,6-, and HgOn=2,3,6,7- have also been noted signifying the higher coordination ability of both Cd and Hg with O/O2/O3 species.

Temperature dependent electrical characterisation of Pt/HfO{sub 2}/n-GaN metal-insulator-semiconductor (MIS) Schottky diodes

Energy Technology Data Exchange (ETDEWEB)

Shetty, Arjun, E-mail: arjun@ece.iisc.ernet.in; Vinoy, K. J. [Electrical Communication Engineering, Indian Institute of Science, Bangalore, India 560012 (India); Roul, Basanta; Mukundan, Shruti; Mohan, Lokesh; Chandan, Greeshma; Krupanidhi, S. B. [Materials Research Centre, Indian Institute of Science, Bangalore, India 560012 (India)

2015-09-15

This paper reports an improvement in Pt/n-GaN metal-semiconductor (MS) Schottky diode characteristics by the introduction of a layer of HfO{sub 2} (5 nm) between the metal and semiconductor interface. The resulting Pt/HfO{sub 2}/n-GaN metal-insulator-semiconductor (MIS) Schottky diode showed an increase in rectification ratio from 35.9 to 98.9(@ 2V), increase in barrier height (0.52 eV to 0.63eV) and a reduction in ideality factor (2.1 to 1.3) as compared to the MS Schottky. Epitaxial n-type GaN films of thickness 300nm were grown using plasma assisted molecular beam epitaxy (PAMBE). The crystalline and optical qualities of the films were confirmed using high resolution X-ray diffraction and photoluminescence measurements. Metal-semiconductor (Pt/n-GaN) and metal-insulator-semiconductor (Pt/HfO{sub 2}/n-GaN) Schottky diodes were fabricated. To gain further understanding of the Pt/HfO{sub 2}/GaN interface, I-V characterisation was carried out on the MIS Schottky diode over a temperature range of 150 K to 370 K. The barrier height was found to increase (0.3 eV to 0.79 eV) and the ideality factor decreased (3.6 to 1.2) with increase in temperature from 150 K to 370 K. This temperature dependence was attributed to the inhomogeneous nature of the contact and the explanation was validated by fitting the experimental data into a Gaussian distribution of barrier heights.

Calculating Second-Order Effects in MOSFET's

Science.gov (United States)

Benumof, Reuben; Zoutendyk, John A.; Coss, James R.

1990-01-01

Collection of mathematical models includes second-order effects in n-channel, enhancement-mode, metal-oxide-semiconductor field-effect transistors (MOSFET's). When dimensions of circuit elements relatively large, effects neglected safely. However, as very-large-scale integration of microelectronic circuits leads to MOSFET's shorter or narrower than 2 micrometer, effects become significant in design and operation. Such computer programs as widely-used "Simulation Program With Integrated Circuit Emphasis, Version 2" (SPICE 2) include many of these effects. In second-order models of n-channel, enhancement-mode MOSFET, first-order gate-depletion region diminished by triangular-cross-section deletions on end and augmented by circular-wedge-cross-section bulges on sides.

Effective dose estimation for pediatric upper gastrointestinal examinations using an anthropomorphic phantom set and metal oxide semiconductor field-effect transistor (MOSFET) technology

International Nuclear Information System (INIS)

Emigh, Brent; Gordon, Christopher L.; Falkiner, Michelle; Thomas, Karen E.; Connolly, Bairbre L.

2013-01-01

There is a need for updated radiation dose estimates in pediatric fluoroscopy given the routine use of new dose-saving technologies and increased radiation safety awareness in pediatric imaging. To estimate effective doses for standardized pediatric upper gastrointestinal (UGI) examinations at our institute using direct dose measurement, as well as provide dose-area product (DAP) to effective dose conversion factors to be used for the estimation of UGI effective doses for boys and girls up to 10 years of age at other centers. Metal oxide semiconductor field-effect transistor (MOSFET) dosimeters were placed within four anthropomorphic phantoms representing children ≤10 years of age and exposed to mock UGI examinations using exposures much greater than used clinically to minimize measurement error. Measured effective dose was calculated using ICRP 103 weights and scaled to our institution's standardized clinical UGI (3.6-min fluoroscopy, four spot exposures and four examination beam projections) as determined from patient logs. Results were compared to Monte Carlo simulations and related to fluoroscope-displayed DAP. Measured effective doses for standardized pediatric UGI examinations in our institute ranged from 0.35 to 0.79 mSv in girls and were 3-8% lower for boys. Simulation-derived and measured effective doses were in agreement (percentage differences 0.18). DAP-to-effective dose conversion factors ranged from 6.5 x 10 -4 mSv per Gy-cm 2 to 4.3 x 10 -3 mSv per Gy-cm 2 for girls and were similarly lower for boys. Using modern fluoroscopy equipment, the effective dose associated with the UGI examination in children ≤10 years at our institute is < 1 mSv. Estimations of effective dose associated with pediatric UGI examinations can be made for children up to the age of 10 using the DAP-normalized conversion factors provided in this study. These estimates can be further refined to reflect individual hospital examination protocols through the use of direct organ

Deep electron traps in HfO_2-based metal-oxide-semiconductor capacitors

International Nuclear Information System (INIS)

Salomone, L. Sambuco; Lipovetzky, J.; Carbonetto, S.H.; García Inza, M.A.; Redin, E.G.; Campabadal, F.

2016-01-01

Hafnium oxide (HfO_2) is currently considered to be a good candidate to take part as a component in charge-trapping nonvolatile memories. In this work, the electric field and time dependences of the electron trapping/detrapping processes are studied through a constant capacitance voltage transient technique on metal-oxide-semiconductor capacitors with atomic layer deposited HfO_2 as insulating layer. A tunneling-based model is proposed to reproduce the experimental results, obtaining fair agreement between experiments and simulations. From the fitting procedure, a band of defects is identified, located in the first 1.7 nm from the Si/HfO_2 interface at an energy level E_t = 1.59 eV below the HfO_2 conduction band edge with density N_t = 1.36 × 10"1"9 cm"−"3. A simplified analytical version of the model is proposed in order to ease the fitting procedure for the low applied voltage case considered in this work. - Highlights: • We characterized deep electron trapping/detrapping in HfO_2 structures. • We modeled the experimental results through a tunneling-based model. • We obtained an electron trap energy level of 1.59 eV below conduction band edge. • We obtained a spatial trap distribution extending 1.7 nm within the insulator. • A simplified tunneling front model is able to reproduce the experimental results.

Drain-induced barrier lowering effect for short channel dual material gate 4H silicon carbide metal—semiconductor field-effect transistor

Science.gov (United States)

Zhang, Xian-Jun; Yang, Yin-Tang; Duan, Bao-Xing; Chai, Chang-Chun; Song, Kun; Chen, Bin

2012-09-01

Sub-threshold characteristics of the dual material gate 4H-SiC MESFET (DMGFET) are investigated and the analytical models to describe the drain-induced barrier lowering (DIBL) effect are derived by solving one- and two-dimensional Poisson's equations. Using these models, we calculate the bottom potential of the channel and the threshold voltage shift, which characterize the drain-induced barrier lowering (DIBL) effect. The calculated results reveal that the dual material gate (DMG) structure alleviates the deterioration of the threshold voltage and thus suppresses the DIBL effect due to the introduced step function, which originates from the work function difference of the two gate materials when compared with the conventional single material gate metal—semiconductor field-effect transistor (SMGFET).

Drain-induced barrier lowering effect for short channel dual material gate 4H silicon carbide metal—semiconductor field-effect transistor

International Nuclear Information System (INIS)

Zhang Xian-Jun; Yang Yin-Tang; Duan Bao-Xing; Chai Chang-Chun; Song Kun; Chen Bin

2012-01-01

Sub-threshold characteristics of the dual material gate 4H-SiC MESFET (DMGFET) are investigated and the analytical models to describe the drain-induced barrier lowering (DIBL) effect are derived by solving one- and two-dimensional Poisson's equations. Using these models, we calculate the bottom potential of the channel and the threshold voltage shift, which characterize the drain-induced barrier lowering (DIBL) effect. The calculated results reveal that the dual material gate (DMG) structure alleviates the deterioration of the threshold voltage and thus suppresses the DIBL effect due to the introduced step function, which originates from the work function difference of the two gate materials when compared with the conventional single material gate metal—semiconductor field-effect transistor (SMGFET)

A comprehensive study of charge trapping in organic field-effect devices with promising semiconductors and different contact metals by displacement current measurements

International Nuclear Information System (INIS)

Bisoyi, Sibani; Tiwari, Shree Prakash; Rödel, Reinhold; Zschieschang, Ute; Klauk, Hagen; Kang, Myeong Jin; Takimiya, Kazuo

2016-01-01

A systematic and comprehensive study on the charge-carrier injection and trapping behavior was performed using displacement current measurements in long-channel capacitors based on four promising small-molecule organic semiconductors (pentacene, DNTT, C 10 -DNTT and DPh-DNTT). In thin-film transistors, these semiconductors showed charge-carrier mobilities ranging from 1.0 to 7.8 cm 2 V −1 s −1 . The number of charges injected into and extracted from the semiconductor and the density of charges trapped in the device during each measurement were calculated from the displacement current characteristics and it was found that the density of trapped charges is very similar in all devices and of the order 10 12 cm −2 , despite the fact that the four semiconductors show significantly different charge-carrier mobilities. The choice of the contact metal (Au, Ag, Cu, Pd) was also found to have no significant effect on the trapping behavior. (paper)

Physicochemical and Electrophysical Properties of Metal/Semiconductor Containing Nanostructured Composites

Science.gov (United States)

Gerasimov, G. N.; Gromov, V. F.; Trakhtenberg, L. I.

2018-06-01

The properties of nanostructured composites based on metal oxides and metal-polymer materials are analyzed, along with ways of preparing them. The effect the interaction between metal and semiconductor nanoparticles has on the conductivity, photoconductivity, catalytic activity, and magnetic, dielectric, and sensor properties of nanocomposites is discussed. It is shown that as a result of this interaction, a material can acquire properties that do not exist in systems of isolated particles. The transfer of electrons between metal particles of different sizes in polymeric matrices leads to specific dielectric losses, and to an increase in the rate and a change in the direction of chemical reactions catalyzed by these particles. The interaction between metal-oxide semiconductor particles results in the electronic and chemical sensitization of sensor effects in nanostructured composite materials. Studies on creating molecular machines (Brownian motors), devices for magnetic recording of information, and high-temperature superconductors based on nanostructured systems are reviewed.

Emission channeling studies on transition-metal doped GaN and ZnO: Cation versus anion substitution

CERN Document Server

AUTHOR|(CDS)2070176; Wahl, Ulrich; Martins Correia, Joao; Amorim, Lígia; Silva, Daniel; Decoster, Stefan; Castro Ribeiro Da Silva, Manuel; Temst, Kristiaan; Vantomme, André

2014-01-01

The magnetic and electric properties of impurities in semiconductors are strongly dependent on the lattice sites which they occupy. While the majority site can often be predicted based on chemical similarities with the host elements and is usually simple to confirm experimentally, minority sites are far more complicated to predict, detect and identify. We have carried out extensive beta− emission channeling studies on the lattice location of transition metal impurities in wide-gap dilute magnetic semiconductors, namely Co and Mn in GaN and ZnO, making use of radioactive 61Co and 56Mn implanted at the ISOLDE facility at CERN. In addition to the majority occupation of cation (Ga, Zn) sites, we located significant fractions (of the order of 20%) of the Co and Mn impurities in anion (N, O) sites, which are virtually unaffected by thermal annealing up to 900 °C. Here, we present the beta− emission channeling experiments on 61Co-implanted GaN. We discuss these results in the context of our recent reports of mi...

Operation of SOI P-Channel Field Effect Transistors, CHT-PMOS30, under Extreme Temperatures

Science.gov (United States)

Patterson, Richard; Hammoud, Ahmad

2009-01-01

Electronic systems are required to operate under extreme temperatures in NASA planetary exploration and deep space missions. Electronics on-board spacecraft must also tolerate thermal cycling between extreme temperatures. Thermal management means are usually included in today s spacecraft systems to provide adequate temperature for proper operation of the electronics. These measures, which may include heating elements, heat pipes, radiators, etc., however add to the complexity in the design of the system, increases its cost and weight, and affects its performance and reliability. Electronic parts and circuits capable of withstanding and operating under extreme temperatures would reflect in improvement in system s efficiency, reducing cost, and improving overall reliability. Semiconductor chips based on silicon-on-insulator (SOI) technology are designed mainly for high temperature applications and find extensive use in terrestrial well-logging fields. Their inherent design offers advantages over silicon devices in terms of reduced leakage currents, less power consumption, faster switching speeds, and good radiation tolerance. Little is known, however, about their performance at cryogenic temperatures and under wide thermal swings. Experimental investigation on the operation of SOI, N-channel field effect transistors under wide temperature range was reported earlier [1]. This work examines the performance of P-channel devices of these SOI transistors. The electronic part investigated in this work comprised of a Cissoid s CHT-PMOS30, high temperature P-channel MOSFET (metal-oxide semiconductor field-effect transistor) device [2]. This high voltage, medium-power transistor is designed for geothermal well logging applications, aerospace and avionics, and automotive industry, and is specified for operation in the temperature range of -55 C to +225 C. Table I shows some specifications of this transistor [2]. The CHT-PMOS30 device was characterized at various temperatures

Valorization of GaN based metal-organic chemical vapor deposition dust a semiconductor power device industry waste through mechanochemical oxidation and leaching: A sustainable green process

Energy Technology Data Exchange (ETDEWEB)

Swain, Basudev, E-mail: Swain@iae.re.kr [Institute for Advanced Engineering (IAE), Advanced Materials & Processing Center, Yongin-Si 449-863 (Korea, Republic of); Mishra, Chinmayee; Lee, Chan Gi; Park, Kyung-Soo [Institute for Advanced Engineering (IAE), Advanced Materials & Processing Center, Yongin-Si 449-863 (Korea, Republic of); Lee, Kun-Jae [Department of Energy Engineering, Dankook University, Cheonan 330-714 (Korea, Republic of)

2015-07-15

Dust generated during metal organic vapor deposition (MOCVD) process of GaN based semiconductor power device industry contains significant amounts of gallium and indium. These semiconductor power device industry wastes contain gallium as GaN and Ga{sub 0.97}N{sub 0.9}O{sub 0.09} is a concern for the environment which can add value through recycling. In the present study, this waste is recycled through mechanochemical oxidation and leaching. For quantitative recovery of gallium, two different mechanochemical oxidation leaching process flow sheets are proposed. In one process, first the Ga{sub 0.97}N{sub 0.9}O{sub 0.09} of the MOCVD dust is leached at the optimum condition. Subsequently, the leach residue is mechanochemically treated, followed by oxidative annealing and finally re-leached. In the second process, the MOCVD waste dust is mechanochemically treated, followed by oxidative annealing and finally leached. Both of these treatment processes are competitive with each other, appropriate for gallium leaching and treatment of the waste MOCVD dust. Without mechanochemical oxidation, 40.11 and 1.86 w/w% of gallium and Indium are leached using 4 M HCl, 100 °C and pulp density of 100 kg/m{sup 3,} respectively. After mechanochemical oxidation, both these processes achieved 90 w/w% of gallium and 1.86 w/w% of indium leaching at their optimum condition. - Highlights: • Waste MOCVD dust is treated through mechanochemical leaching. • GaN is hardly leached, and converted to NaGaO{sub 2} through ball milling and annealing. • Process for gallium recovery from waste MOCVD dust has been developed. • Thermal analysis and phase properties of GaN to Ga{sub 2}O{sub 3} and GaN to NaGaO{sub 2} is revealed. • Solid-state chemistry involved in this process is reported.

Dopant distributions in n-MOSFET structure observed by atom probe tomography

International Nuclear Information System (INIS)

Inoue, K.; Yano, F.; Nishida, A.; Takamizawa, H.; Tsunomura, T.; Nagai, Y.; Hasegawa, M.

2009-01-01

The dopant distributions in an n-type metal-oxide-semiconductor field effect transistor (MOSFET) structure were analyzed by atom probe tomography. The dopant distributions of As, P, and B atoms in a MOSFET structure (gate, gate oxide, channel, source/drain extension, and halo) were obtained. P atoms were segregated at the interface between the poly-Si gate and the gate oxide, and on the grain boundaries of the poly-Si gate, which had an elongated grain structure along the gate height direction. The concentration of B atoms was enriched near the edge of the source/drain extension where the As atoms were implanted.

Dopant distributions in n-MOSFET structure observed by atom probe tomography.

Science.gov (United States)

Inoue, K; Yano, F; Nishida, A; Takamizawa, H; Tsunomura, T; Nagai, Y; Hasegawa, M

2009-11-01

The dopant distributions in an n-type metal-oxide-semiconductor field effect transistor (MOSFET) structure were analyzed by atom probe tomography. The dopant distributions of As, P, and B atoms in a MOSFET structure (gate, gate oxide, channel, source/drain extension, and halo) were obtained. P atoms were segregated at the interface between the poly-Si gate and the gate oxide, and on the grain boundaries of the poly-Si gate, which had an elongated grain structure along the gate height direction. The concentration of B atoms was enriched near the edge of the source/drain extension where the As atoms were implanted.

Infrared rectification in a nanoantenna-coupled metal-oxide-semiconductor tunnel diode.

Science.gov (United States)

Davids, Paul S; Jarecki, Robert L; Starbuck, Andrew; Burckel, D Bruce; Kadlec, Emil A; Ribaudo, Troy; Shaner, Eric A; Peters, David W

2015-12-01

Direct rectification of electromagnetic radiation is a well-established method for wireless power conversion in the microwave region of the spectrum, for which conversion efficiencies in excess of 84% have been demonstrated. Scaling to the infrared or optical part of the spectrum requires ultrafast rectification that can only be obtained by direct tunnelling. Many research groups have looked to plasmonics to overcome antenna-scaling limits and to increase the confinement. Recently, surface plasmons on heavily doped Si surfaces were investigated as a way of extending surface-mode confinement to the thermal infrared region. Here we combine a nanostructured metallic surface with a heavily doped Si infrared-reflective ground plane designed to confine infrared radiation in an active electronic direct-conversion device. The interplay of strong infrared photon-phonon coupling and electromagnetic confinement in nanoscale devices is demonstrated to have a large impact on ultrafast electronic tunnelling in metal-oxide-semiconductor (MOS) structures. Infrared dispersion of SiO2 near a longitudinal optical (LO) phonon mode gives large transverse-field confinement in a nanometre-scale oxide-tunnel gap as the wavelength-dependent permittivity changes from 1 to 0, which leads to enhanced electromagnetic fields at material interfaces and a rectified displacement current that provides a direct conversion of infrared radiation into electric current. The spectral and electrical signatures of the nanoantenna-coupled tunnel diodes are examined under broadband blackbody and quantum-cascade laser (QCL) illumination. In the region near the LO phonon resonance, we obtained a measured photoresponsivity of 2.7 mA W(-1) cm(-2) at -0.1 V.

Assessment of radiation exposure in dental cone-beam computerized tomography with the use of metal-oxide semiconductor field-effect transistor (MOSFET) dosimeters and Monte Carlo simulations.

Science.gov (United States)

Koivisto, J; Kiljunen, T; Tapiovaara, M; Wolff, J; Kortesniemi, M

2012-09-01

The aims of this study were to assess the organ and effective dose (International Commission on Radiological Protection (ICRP) 103) resulting from dental cone-beam computerized tomography (CBCT) imaging using a novel metal-oxide semiconductor field-effect transistor (MOSFET) dosimeter device, and to assess the reliability of the MOSFET measurements by comparing the results with Monte Carlo PCXMC simulations. Organ dose measurements were performed using 20 MOSFET dosimeters that were embedded in the 8 most radiosensitive organs in the maxillofacial and neck area. The dose-area product (DAP) values attained from CBCT scans were used for PCXMC simulations. The acquired MOSFET doses were then compared with the Monte Carlo simulations. The effective dose measurements using MOSFET dosimeters yielded, using 0.5-cm steps, a value of 153 μSv and the PCXMC simulations resulted in a value of 136 μSv. The MOSFET dosimeters placed in a head phantom gave results similar to Monte Carlo simulations. Minor vertical changes in the positioning of the phantom had a substantial affect on the overall effective dose. Therefore, the MOSFET dosimeters constitute a feasible method for dose assessment of CBCT units in the maxillofacial region. Copyright © 2012 Elsevier Inc. All rights reserved.

Numerical method for a 2D drift diffusion model arising in strained n ...

Indian Academy of Sciences (India)

Abstract. This paper reports the calculation of electron transport in metal oxide semiconductor field effects transistors (MOSFETs) with biaxially tensile strained silicon channel. The calculation is formulated based on two-dimensional drift diffusion model (DDM) including strain effects. The carrier mobility dependence on the ...

Studies on the InAlN/InGaN/InAlN/InGaN double channel heterostructures with low sheet resistance

Science.gov (United States)

Zhang, Yachao; Wang, Zhizhe; Xu, Shengrui; Chen, Dazheng; Bao, Weimin; Zhang, Jinfeng; Zhang, Jincheng; Hao, Yue

2017-11-01

High quality InAlN/InGaN/InAlN/InGaN double channel heterostructures were proposed and grown by metal organic chemical vapor deposition. Benefiting from the adoption of the pulsed growth method and Two-Step AlN interlayer, the material quality and interface characteristics of the double channel heterostructures are satisfactory. The results of the temperature-dependent Hall effect measurement indicated that the transport properties of the double channel heterostructures were superior to those of the traditional single channel heterostructures in the whole test temperature range. Meanwhile, the sheet resistance of the double channel heterostructures reached 218.5 Ω/□ at 300 K, which is the record of InGaN-based heterostructures. The good transport properties of the InGaN double channel heterostructures are beneficial to improve the performance of the microwave power devices based on nitride semiconductors.

Tunneling emission of electrons from semiconductors' valence bands in high electric fields

International Nuclear Information System (INIS)

Kalganov, V. D.; Mileshkina, N. V.; Ostroumova, E. V.

2006-01-01

Tunneling emission currents of electrons from semiconductors to vacuum (needle-shaped GaAs photodetectors) and to a metal (silicon metal-insulator-semiconductor diodes with a tunneling-transparent insulator layer) are studied in high and ultrahigh electric fields. It is shown that, in semiconductors with the n-type conductivity, the major contribution to the emission current is made by the tunneling emission of electrons from the valence band of the semiconductor, rather than from the conduction band

Characterization of high-sensitivity metal oxide semiconductor field effect transistor dosimeters system and LiF:Mg,Cu,P thermoluminescence dosimeters for use in diagnostic radiology

International Nuclear Information System (INIS)

Dong, S.L.; Chu, T.C.; Lan, G.Y.; Wu, T.H.; Lin, Y.C.; Lee, J.S.

2002-01-01

Monitoring radiation exposure during diagnostic radiographic procedures has recently become an area of interest. In recent years, the LiF:Mg,Cu,P thermoluminescence dosimeter (TLD-100H) and the highly sensitive metal oxide semiconductor field effect transistor (MOSFET) dosimeter were introduced as good candidates for entrance skin dose measurements in diagnostic radiology. In the present study, the TLD-100H and the MOSFET dosimeters were evaluated for sensitivity, linearity, energy, angular dependence, and post-exposure response. Our results indicate that the TLD-100H dosimeter has excellent linearity within diagnostic energy ranges and its sensitivity variations were under 3% at tube potentials from 40 Vp to 125 kVp. Good linearity was also observed with the MOSFET dosimeter, but in low-dose regions the values are less reliable and were found to be a function of the tube potentials. Both dosimeters also presented predictable angular dependence in this study. Our findings suggest that the TLD-100H dosimeter is more appropriate for low-dose diagnostic procedures such as chest and skull projections. The MOSFET dosimeter system is valuable for entrance skin dose measurement with lumbar spine projections and certain fluoroscopic procedures

Impact of GaN cap on charges in Al₂O₃/(GaN/)AlGaN/GaN metal-oxide-semiconductor heterostructures analyzed by means of capacitance measurements and simulations

Energy Technology Data Exchange (ETDEWEB)

Ťapajna, M., E-mail: milan.tapajna@savba.sk; Jurkovič, M.; Válik, L.; Haščík, Š.; Gregušová, D.; Kuzmík, J. [Institute of Electrical Engineering, Slovak Academy of Sciences, Dúbravská cesta 9, 841 04 Bratislava (Slovakia); Brunner, F.; Cho, E.-M. [Ferdinand-Braun-Institut, Leibniz Institut für Höchstfrequenztechnik, Gustav-Kirchhoff-Strasse 4, 12489 Berlin (Germany); Hashizume, T. [Research Center for Integrated Quantum Electronics (RCIQE), Hokkaido University, 060-0814 Sapporo, Japan and JST-CREST, 102-0075 Tokyo (Japan)

2014-09-14

Oxide/semiconductor interface trap density (D{sub it}) and net charge of Al₂O₃/(GaN)/AlGaN/GaN metal-oxide-semiconductor high-electron mobility transistor (MOS-HEMT) structures with and without GaN cap were comparatively analyzed using comprehensive capacitance measurements and simulations. D{sub it} distribution was determined in full band gap of the barrier using combination of three complementary capacitance techniques. A remarkably higher D{sub it} (∼5–8 × 10¹²eV⁻¹ cm⁻²) was found at trap energies ranging from E_C-0.5 to 1 eV for structure with GaN cap compared to that (D{sub it} ∼ 2–3 × 10¹²eV⁻¹ cm⁻²) where the GaN cap was selectively etched away. D{sub it} distributions were then used for simulation of capacitance-voltage characteristics. A good agreement between experimental and simulated capacitance-voltage characteristics affected by interface traps suggests (i) that very high D{sub it} (>10¹³eV⁻¹ cm⁻²) close to the barrier conduction band edge hampers accumulation of free electron in the barrier layer and (ii) the higher D{sub it} centered about E_C-0.6 eV can solely account for the increased C-V hysteresis observed for MOS-HEMT structure with GaN cap. Analysis of the threshold voltage dependence on Al₂O₃ thickness for both MOS-HEMT structures suggests that (i) positive charge, which compensates the surface polarization, is not necessarily formed during the growth of III-N heterostructure, and (ii) its density is similar to the total surface polarization charge of the GaN/AlGaN barrier, rather than surface polarization of the top GaN layer only. Some constraints for the positive surface compensating charge are discussed.

Impact of a drain field plate on the breakdown characteristics of AlInN/GaN MOSHEMT

Science.gov (United States)

Jena, Kanjalochan; Swain, Raghunandan; Lenka, T. R.

2015-11-01

In this paper, a novel AlInN/GaN metal oxide semiconductor high electron mobility transistor (MOSHEMT) employing the drain field plate technique is proposed and the effect of a drain field plate on the breakdown voltage (BV) is investigated. A reduction of the peak electric field is required to achieve AlInN/GaN MOSHEMTs with a high BV. The proposed AlInN/GaN MOSHEMT with both gate and drain field plates simultaneously reduces the electric field concentration at the gate and the drain edge by decreasing the potential gradient along the channel for the 2 dimensional electron gas (2DEG). The reduction in the peak electric field at the drain edge of the proposed device leads to a 57% increase in BV compared with the BV for an AlInN/GaN MOSHEMT with a gate field plate only. A significantly higher BV can be achieved by optimizing the gate-to-drain distance (L gd ), the length of the drain field plate (L dfp ) and the thickness of the SiN passivation layer thickness (T SiN ). A detailed breakdown analysis of the device was carried out using Silvaco Technology Computer Aided Design (TCAD). The detailed numerical simulations were done by using the non-local energy balance (EB) transport model, which was calibrated with the previously published experimental results. The results showed a great potential for applications of the drain-field-plated AlInN/GaN MOSHEMT to deliver high currents and high powers in microwave technologies.

Investigation of piezoresistive effect in p-channel metal–oxide–semiconductor field-effect transistors fabricated on circular silicon-on-insulator diaphragms using cost-effective minimal-fab process

Science.gov (United States)

Liu, Yongxun; Tanaka, Hiroyuki; Umeyama, Norio; Koga, Kazuhiro; Khumpuang, Sommawan; Nagao, Masayoshi; Matsukawa, Takashi; Hara, Shiro

2018-06-01

P-channel metal–oxide–semiconductor field-effect transistors (PMOSFETs) with the 〈110〉 or 〈100〉 channel direction have been successfully fabricated on circular silicon-on-insulator (SOI) diaphragms using a cost-effective minimal-fab process, and their electrical characteristics have been systematically investigated before and after the SOI diaphragm formation. It was found that almost the same subthreshold slope (S-slope) and threshold voltage (V t) are observed in the fabricated PMOSFETs before and after the SOI diaphragm formation, and they are independent of the channel direction. On the other hand, significant variations in drain current were observed in the fabricated PMOSFETs with the 〈110〉 channel direction after the SOI diaphragm formation owing to the residual mechanical stress-induced piezoresistive effect. It was also confirmed that electrical characteristics of the fabricated PMOSFETs with the 〈100〉 channel direction are almost the same before and after the SOI diaphragm formation, i.e., not sensitive to the mechanical stress. Moreover, the drain current variations at different directions of mechanical stress and current flow were systematically investigated and discussed.

Metal/Semiconductor and Transparent Conductor/Semiconductor Heterojunctions in High Efficient Photoelectric Devices: Progress and Features

Directory of Open Access Journals (Sweden)

M. Melvin David Kumar

2014-01-01

Full Text Available Metal/semiconductor and transparent conductive oxide (TCO/semiconductor heterojunctions have emerged as an effective modality in the fabrication of photoelectric devices. This review is following a recent shift toward the engineering of TCO layers and structured Si substrates, incorporating metal nanoparticles for the development of next-generation photoelectric devices. Beneficial progress which helps to increase the efficiency and reduce the cost, has been sequenced based on efficient technologies involved in making novel substrates, TCO layers, and electrodes. The electrical and optical properties of indium tin oxide (ITO and aluminum doped zinc oxide (AZO thin films can be enhanced by structuring the surface of TCO layers. The TCO layers embedded with Ag nanoparticles are used to enhance the plasmonic light trapping effect in order to increase the energy harvesting nature of photoelectric devices. Si nanopillar structures which are fabricated by photolithography-free technique are used to increase light-active surface region. The importance of the structure and area of front electrodes and the effect of temperature at the junction are the value added discussions in this review.

Photo-assisted local oxidation of GaN using an atomic force microscope

International Nuclear Information System (INIS)

Hwang, J S; Hu, Z S; Lu, T Y; Chen, L W; Chen, S W; Lin, T Y; Hsiao, C-L; Chen, K-H; Chen, L-C

2006-01-01

This paper introduces a photo-assisted atomic force microscope (AFM) local oxidation technique which is capable of producing highly smooth oxide patterns with heights reaching several tens of nanometres on both n- and p-types of GaN (and in principle on most semiconductors) without the use of chemicals. The novel methodology relies on UV illumination of the surface of the substrate during conventional AFM local oxidation. A low 1.2 V threshold voltage for n-type GaN was obtained, which can be explained by UV photo-generation of excess electron-hole pairs in the substrate near the junction, thereby reducing the electric field required to drive carrier flow through the tip-sample Schottky barrier. It was demonstrated that the presence or absence of light alone was sufficient to switch the growth of the oxide on or off. The photo-assisted AFM oxidation technique is of immediate interest to the semiconductor industry for the fabrication of GaN-based complementary metal-oxide-semiconductor devices and nanodevices, improves chances for AFM-type data storage, and presents new degrees of freedom for process control technique

Numerical method for a 2D drift diffusion model arising in strained n ...

Indian Academy of Sciences (India)

This paper reports the calculation of electron transport in metal oxide semiconductor field effects transistors (MOSFETs) with biaxially tensile strained silicon channel. The calculation is formulated based on two-dimensional drift diffusion model (DDM) including strain effects. The carrier mobility dependence on the lateral and ...

Bio Organic-Semiconductor Field-Effect Transistor (BioFET) Based on Deoxyribonucleic Acid (DNA) Gate Dielectric

Science.gov (United States)

2010-03-31

floating gate devices and metal-insulator-oxide-semiconductor (MIOS) devices. First attempts to use polarizable gate insulators in combination with...bulk of the semiconductor (ii) Due to the polarizable gate dielectric (iii) dipole polarization and (iv)electret effect due to mobile ions in the...characterization was carried out under an argon environment inside the glove box. An Agilent model E5273A with a two source-measurement unit instrument was

P-type Oxide Semiconductors for Transparent & Energy Efficient Electronics

KAUST Repository

Wang, Zhenwei

2018-03-11

Emerging transparent semiconducting oxide (TSO) materials have achieved their initial commercial success in the display industry. Due to the advanced electrical performance, TSOs have been adopted either to improve the performance of traditional displays or to demonstrate the novel transparent and flexible displays. However, due to the lack of feasible p-type TSOs, the applications of TSOs is limited to unipolar (n-type TSOs) based devices. Compared with the prosperous n-type TSOs, the performance of p-type counterparts is lag behind. However, after years of discovery, several p-type TSOs are confirmed with promising performance, for example, tin monoxide (SnO). By using p-type SnO, excellent transistor field-effect mobility of 6.7 cm2 V-1 s-1 has been achieved. Motivated by this encouraging performance, this dissertation is devoted to further evaluate the feasibility of integrating p-type SnO in p-n junctions and complementary metal oxide semiconductor (CMOS) devices. CMOS inverters are fabricated using p-type SnO and in-situ formed n-type tin dioxide (SnO2). The semiconductors are simultaneously sputtered, which simplifies the process of CMOS inverters. The in-situ formation of SnO2 phase is achieved by selectively sputtering additional capping layer, which serves as oxygen source and helps to balance the process temperature for both types of semiconductors. Oxides based p-n junctions are demonstrated between p-type SnO and n-type SnO2 by magnetron sputtering method. Diode operating ideality factor of 3.4 and rectification ratio of 103 are achieved. A large temperature induced knee voltage shift of 20 mV oC-1 is observed, and explained by the large band gap and shallow states in SnO, which allows minor adjustment of band structure in response to the temperature change. Finally, p-type SnO is used to demonstrating the hybrid van der Waals heterojunctions (vdWHs) with two-dimensional molybdenum disulfide (2D MoS2) by mechanical exfoliation. The hybrid vdWHs show

Field-effect P-N junction

Science.gov (United States)

Regan, William; Zettl, Alexander

2015-05-05

This disclosure provides systems, methods, and apparatus related to field-effect p-n junctions. In one aspect, a device includes an ohmic contact, a semiconductor layer disposed on the ohmic contact, at least one rectifying contact disposed on the semiconductor layer, a gate including a layer disposed on the at least one rectifying contact and the semiconductor layer and a gate contact disposed on the layer. A lateral width of the rectifying contact is less than a semiconductor depletion width of the semiconductor layer. The gate contact is electrically connected to the ohmic contact to create a self-gating feedback loop that is configured to maintain a gate electric field of the gate.

Low dielectric constant-based organic field-effect transistors and metal-insulator-semiconductor capacitors

Science.gov (United States)

Ukah, Ndubuisi Benjamin

This thesis describes a study of PFB and pentacene-based organic field-effect transistors (OFET) and metal-insulator-semiconductor (MIS) capacitors with low dielectric constant (k) poly(methyl methacrylate) (PMMA), poly(4-vinyl phenol) (PVP) and cross-linked PVP (c-PVP) gate dielectrics. A physical method -- matrix assisted pulsed laser evaporation (MAPLE) -- of fabricating all-polymer field-effect transistors and MIS capacitors that circumvents inherent polymer dissolution and solvent-selectivity problems, is demonstrated. Pentacene-based OFETs incorporating PMMA and PVP gate dielectrics usually have high operating voltages related to the thickness of the dielectric layer. Reduced PMMA layer thickness (≤ 70 nm) was obtained by dissolving the PMMA in propylene carbonate (PC). The resulting pentacene-based transistors exhibited very low operating voltage (below -3 V), minimal hysteresis in their transfer characteristics, and decent electrical performance. Also low voltage (within -2 V) operation using thin (≤ 80 nm) low-k and hydrophilic PVP and c-PVP dielectric layers obtained via dissolution in high dipole moment and high-k solvents -- PC and dimethyl sulfoxide (DMSO), is demonstrated to be a robust means of achieving improved electrical characteristics and high operational stability in OFETs incorporating PVP and c-PVP dielectrics.

Fringing field effects in negative capacitance field-effect transistors with a ferroelectric gate insulator

Science.gov (United States)

Hattori, Junichi; Fukuda, Koichi; Ikegami, Tsutomu; Ota, Hiroyuki; Migita, Shinji; Asai, Hidehiro; Toriumi, Akira

2018-04-01

We study the effects of fringing electric fields on the behavior of negative-capacitance (NC) field-effect transistors (FETs) with a silicon-on-insulator body and a gate stack consisting of an oxide film, an internal metal film, a ferroelectric film, and a gate electrode using our own device simulator that can properly handle the complicated relationship between the polarization and the electric field in ferroelectric materials. The behaviors of such NC FETs and the corresponding metal-oxide-semiconductor (MOS) FETs are simulated and compared with each other to evaluate the effects of the NC of the ferroelectric film. Then, the fringing field effects are evaluated by comparing the NC effects in NC FETs with and without gate spacers. The fringing field between the gate stack, especially the internal metal film, and the source/drain region induces more charges at the interface of the film with the ferroelectric film. Accordingly, the function of the NC to modulate the gate voltage and the resulting function to improve the subthreshold swing are enhanced. We also investigate the relationships of these fringing field effects to the drain voltage and four design parameters of NC FETs, i.e., gate length, gate spacer permittivity, internal metal film thickness, and oxide film thickness.

A unique metal-semiconductor interface and resultant electron transfer phenomenon

OpenAIRE

Taft, S. L.

2012-01-01

An unusual electron transfer phenomenon has been identified from an n-type semiconductor to Schottky metal particles, the result of a unique metal semiconductor interface that results when the metal particles are grown from the semiconductor substrate. The unique interface acts as a one-way (rectifying) open gateway and was first identified in reduced rutile polycrystalline titanium dioxide (an n-type semiconductor) to Group VIII (noble) metal particles. The interface significantly affects th...

High performance Si nanowire field-effect-transistors based on a CMOS inverter with tunable threshold voltage.

Science.gov (United States)

Van, Ngoc Huynh; Lee, Jae-Hyun; Sohn, Jung Inn; Cha, Seung Nam; Whang, Dongmok; Kim, Jong Min; Kang, Dae Joon

2014-05-21

We successfully fabricated nanowire-based complementary metal-oxide semiconductor (NWCMOS) inverter devices by utilizing n- and p-type Si nanowire field-effect-transistors (NWFETs) via a low-temperature fabrication processing technique. We demonstrate that NWCMOS inverter devices can be operated at less than 1 V, a significantly lower voltage than that of typical thin-film based complementary metal-oxide semiconductor (CMOS) inverter devices. This low-voltage operation was accomplished by controlling the threshold voltage of the n-type Si NWFETs through effective management of the nanowire (NW) doping concentration, while realizing high voltage gain (>10) and ultra-low static power dissipation (≤3 pW) for high-performance digital inverter devices. This result offers a viable means of fabricating high-performance, low-operation voltage, and high-density digital logic circuits using a low-temperature fabrication processing technique suitable for next-generation flexible electronics.

Model of hot-carrier induced degradation in ultra-deep sub-micrometer nMOSFET

International Nuclear Information System (INIS)

Lei Xiao-Yi; Liu Hong-Xia; Zhang Yue; Ma Xiao-Hua; Hao Yue

2014-01-01

The degradation produced by hot carrier (HC) in ultra-deep sub-micron n-channel metal oxide semiconductor field effect transistor (nMOSFET) has been analyzed in this paper. The generation of negatively charged interface states is the predominant mechanism for the ultra-deep sub-micron nMOSFET. According to our lifetime model of p-channel MOFET (pMOFET) that was reported in a previous publication, a lifetime prediction model for nMOSFET is presented and the parameters in the model are extracted. For the first time, the lifetime models of nMOFET and pMOSFET are unified. In addition, the model can precisely predict the lifetime of the ultra-deep sub-micron nMOSFET and pMOSFET. (condensed matter: electronic structure, electrical, magnetic, and optical properties)

Effects of surface plasma treatment on threshold voltage hysteresis and instability in metal-insulator-semiconductor (MIS) AlGaN/GaN heterostructure HEMTs

Science.gov (United States)

Zaidi, Z. H.; Lee, K. B.; Roberts, J. W.; Guiney, I.; Qian, H.; Jiang, S.; Cheong, J. S.; Li, P.; Wallis, D. J.; Humphreys, C. J.; Chalker, P. R.; Houston, P. A.

2018-05-01

In a bid to understand the commonly observed hysteresis in the threshold voltage (VTH) in AlGaN/GaN metal-insulator-semiconductor high electron mobility transistors during forward gate bias stress, we have analyzed a series of measurements on devices with no surface treatment and with two different plasma treatments before the in-situ Al2O3 deposition. The observed changes between samples were quasi-equilibrium VTH, forward bias related VTH hysteresis, and electrical response to reverse bias stress. To explain these effects, a disorder induced gap state model, combined with a discrete level donor, at the dielectric/semiconductor interface was employed. Technology Computer-Aided Design modeling demonstrated the possible differences in the interface state distributions that could give a consistent explanation for the observations.

The effect of a magnetic field on heat transfer in a slotted channel

International Nuclear Information System (INIS)

Evtushenko, I.A.; Hua, T.Q.; Kirillov, I.R.; Reed, Claude B.; Sidorenkov, S.S.

1995-01-01

The results of numerical and experimental studies of liquid metal heat transfer in slotted channels in a transverse magnetic field are presented. Test results showed an improvement in heat transfer in a straight channel at low and moderate interaction parameter N. The Nusselt number at small N (around 120) was up to twofold higher than in turbulent flow without a magnetic field, the Peclet number being equal. This effect of heat transfer enhancement is caused by the generation and development of large-scale velocity fluctuations close to the heated wall area. Qualitative and quantitative correlations between heat transfer and velocity fluctuation characteristics are presented. (orig.)

Neutron and gamma irradiation effects on power semiconductor switches

International Nuclear Information System (INIS)

Schwarze, G.E.; Frasca, A.J.

1990-01-01

The performance characteristics of high power semiconductor switches subjected to high levels of neutron fluence and gamma dose must be known by the designer of the power conditioning, control and transmission subsystem of space nuclear power systems. Location and the allowable shielding mass budget will determine the level of radiation tolerance required by the switches to meet performance and reliability requirements. Neutron and gamma ray interactions with semiconductor materials and how these interactions affect the electrical and switching characteristics of solid state power switches is discussed. The experimental measurement system and radiation facilities are described. Experimental data showing the effects of neutron and gamma irradiation on the performance characteristics are given for power-type NPN bipolar junction transistors (BJTs), and metal-oxide-semiconductor field effect transistors (MOSFETs)

First-principles simulations of the leakage current in metal-oxide-semiconductor structures caused by oxygen vacancies in HfO2 high-K gate dielectric

International Nuclear Information System (INIS)

Mao, L.F.; Wang, Z.O.

2008-01-01

HfO 2 high-K gate dielectric has been used as a new gate dielectric in metal-oxide-semiconductor structures. First-principles simulations are used to study the effects of oxygen vacancies on the tunneling current through the oxide. A level which is nearly 1.25 eV from the bottom of the conduction band is introduced into the bandgap due to the oxygen vacancies. The tunneling current calculations show that the tunneling currents through the gate oxide with different defect density possess the typical characteristic of stress-induced leakage current. Further analysis shows that the location of oxygen vacancies will have a marked effect on the tunneling current. The largest increase in the tunneling current caused by oxygen vacancies comes about at the middle oxide field when defects are located at the middle of the oxide. (copyright 2008 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim) (orig.)

Molecular materials for organic field-effect transistors

International Nuclear Information System (INIS)

Mori, T

2008-01-01

Organic field-effect transistors are important applications of thin films of molecular materials. A variety of materials have been explored for improving the performance of organic transistors. The materials are conventionally classified as p-channel and n-channel, but not only the performance but also even the carrier polarity is greatly dependent on the combinations of organic semiconductors and electrode materials. In this review, particular emphasis is laid on multi-sulfur compounds such as tetrathiafulvalenes and metal dithiolates. These compounds are components of highly conducting materials such as organic superconductors, but are also used in organic transistors. The charge-transfer complexes are used in organic transistors as active layers as well as electrodes. (topical review)

Improved linearity and reliability in GaN metal-oxide-semiconductor high-electron-mobility transistors using nanolaminate La2O3/SiO2 gate dielectric

Science.gov (United States)

Hsu, Ching-Hsiang; Shih, Wang-Cheng; Lin, Yueh-Chin; Hsu, Heng-Tung; Hsu, Hisang-Hua; Huang, Yu-Xiang; Lin, Tai-Wei; Wu, Chia-Hsun; Wu, Wen-Hao; Maa, Jer-Shen; Iwai, Hiroshi; Kakushima, Kuniyuki; Chang, Edward Yi

2016-04-01

Improved device performance to enable high-linearity power applications has been discussed in this study. We have compared the La2O3/SiO2 AlGaN/GaN metal-oxide-semiconductor high-electron-mobility transistors (MOS-HEMTs) with other La2O3-based (La2O3/HfO2, La2O3/CeO2 and single La2O3) MOS-HEMTs. It was found that forming lanthanum silicate films can not only improve the dielectric quality but also can improve the device characteristics. The improved gate insulation, reliability, and linearity of the 8 nm La2O3/SiO2 MOS-HEMT were demonstrated.

Metal-semiconductor, composite radiation detectors

International Nuclear Information System (INIS)

Orvis, W.J.; Yee, J.H.; Fuess, D.

1992-12-01

In 1989, Naruse and Hatayama of Toshiba published a design for an increased efficiency x-ray detector. The design increased the efficiency of a semiconductor detector by interspersing layers of high-z metal within it. Semiconductors such as silicon make good, high-resolution radiation detectors, but they have low efficiency because they are low-z materials (z = 14). High-z metals, on the other hand, are good absorbers of high-energy photons. By interspersing high-z metal layers with semiconductor layers, Naruse and Hatayama combined the high absorption efficiency of the high-z metals with the good detection capabilities of a semiconductor. This project is an attempt to use the same design to produce a high-efficiency, room temperature gamma ray detector. By their nature, gamma rays require thicker metal layers to efficiently absorb them. These thicker layers change the behavior of the detector by reducing the resolution, compared to a solid state detector, and shifting the photopeak by a predictable amount. During the last year, the authors have procured and tested a commercial device with operating characteristics similar to those of a single layer of the composite device. They have modeled the radiation transport in a multi-layered device, to verify the initial calculations of layer thickness and composition. They have modeled the electrostatic field in different device designs to locate and remove high-field regions that can cause device breakdown. They have fabricated 14 single layer prototypes

Synergistic effects of semiconductor substrate and noble metal nano-particles on SERS effect both theoretical and experimental aspects

Science.gov (United States)

Yang, Chen; Liang, Pei; Tang, Lisha; Zhou, Yongfeng; Cao, Yanting; Wu, Yanxiong; Zhang, De; Dong, Qianmin; Huang, Jie; He, Peng

2018-04-01

As a means of chemical identification and analysis, Surface enhanced Raman spectroscopy (SERS), with the advantages of high sensitivity and selectivity, non-destructive, high repeatability and in situ detection etc., has important significance in the field of composition detection, environmental science, biological medicine etc. Physical model of coupling effect between different semiconductor substrates and noble metal particles were investigated by using 3D-FDTD method. Mechanism and the effects of excitation wavelength, particle spacing and semiconductor substrate types on the SERS effect were discussed. The results showed that the optimal excitation wavelengths of three noble metals of Ag, Au, Cu, were located at 510, 600 and 630 nm, respectively; SERS effect of Ag, Au, Cu increases with the decreasing of the inter distance of particles, while the distance of the NPs reaches the critical value of 3 nm, the strength of SERS effect will be greatly enhanced. For the four different types of substrate of Ge, Si, SiO2 (glass) and Al2O3, the SERS effect of Ag on SiO2 > Ge > Al2O3 > Si. For Au and Cu nanoparticles, the SERS effect of them on oxide substrate is stronger than that on non-oxide substrate. In order to verify FDTD simulations, taking silver nanoparticles as an example, and silver nanoparticles prepared by chemical method were spinning coating on the four different substrates with R6G as probe molecules. The results show that the experimental results are consistent with FDTD theoretical simulations, and the SERS enhancement effect of Ag-SiO2 substrate is best. The results of this study have important theoretical significance to explain the variations of SERS enhancement on different noble metals, which is also an important guide for the preparation of SERS substrates, especially for the microfluidics. The better Raman effect can be realized by choosing proper substrate type, particle spacing and excitation wavelength, result in expanding the depth and width

The role of metallic impurities in oxide semiconductors: first-principles calculations and PAC experiments

Energy Technology Data Exchange (ETDEWEB)

Errico, L.A.; Fabricius, G.; Renteria, M. [Departamento de Fisica, Facultad de Ciencias Exactas, Universidad Nacional de La Plata, CC 67, 1900 La Plata (Argentina)

2004-08-01

We report an ab-initio comparative study of the electric-field-gradient tensor (EFG) and structural relaxations introduced by acceptor (Cd) and donor (Ta) impurities when they replace cations in a series of binary oxides: TiO{sub 2}, SnO{sub 2}, and In{sub 2}O{sub 3}. Calculations were performed with the Full-Potential Linearized-Augmented Plane Waves method that allows us to treat the electronic structure and the atomic relaxations in a fully self-consistent way. We considered different charge states for each impurity and studied the dependence on these charge states of the electronic properties and the structural relaxations. Our results are compared with available data coming from PAC experiments and previous calculations, allowing us to obtain a new insight on the role that metal impurities play in oxide semiconductors. It is clear from our results that simple models can not describe the measured EFGs at impurities in oxides even approximately. (copyright 2004 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim) (orig.)

Signatures of Quantized Energy States in Solution-Processed Ultrathin Layers of Metal-Oxide Semiconductors and Their Devices

KAUST Repository

Labram, John G.; Lin, Yenhung; Zhao, Kui; Li, Ruipeng; Thomas, Stuart R.; Semple, James; Androulidaki, Maria; Sygellou, Lamprini; McLachlan, Martyn A.; Stratakis, Emmanuel; Amassian, Aram; Anthopoulos, Thomas D.

2015-01-01

reports of the growth of uniform, ultrathin (<5 nm) metal-oxide semiconductors from solution, however, have potentially opened the door to such phenomena manifesting themselves. Here, a theoretical framework is developed for energy quantization

Incorporating TCNQ into thiophene-fused heptacene for n-channel field effect transistor

KAUST Repository

Ye, Qun

2012-06-01

Incorporation of electron-deficient tetracyanoquinodimethane (TCNQ) into electron-rich thiophene-fused heptacene was successfully achieved for the purpose of stabilizing longer acenes and generating new n-type organic semiconductors. The heptacene-TCNQ derivative 1 was found to have good stability and an expected electron transporting property. Electron mobility up to 0.01 cm 2 V -1 s -1 has been obtained for this novel material in solution processed organic field effect transistors. © 2012 American Chemical Society.

High performance printed oxide field-effect transistors processed using photonic curing

Science.gov (United States)

Garlapati, Suresh Kumar; Cadilha Marques, Gabriel; Gebauer, Julia Susanne; Dehm, Simone; Bruns, Michael; Winterer, Markus; Baradaran Tahoori, Mehdi; Aghassi-Hagmann, Jasmin; Hahn, Horst; Dasgupta, Subho

2018-06-01

Oxide semiconductors are highly promising candidates for the most awaited, next-generation electronics, namely, printed electronics. As a fabrication route for the solution-processed/printed oxide semiconductors, photonic curing is becoming increasingly popular, as compared to the conventional thermal curing method; the former offers numerous advantages over the latter, such as low process temperatures and short exposure time and thereby, high throughput compatibility. Here, using dissimilar photonic curing concepts (UV–visible light and UV-laser), we demonstrate facile fabrication of high performance In2O3 field-effect transistors (FETs). Beside the processing related issues (temperature, time etc.), the other known limitation of oxide electronics is the lack of high performance p-type semiconductors, which can be bypassed using unipolar logics from high mobility n-type semiconductors alone. Interestingly, here we have found that our chosen distinct photonic curing methods can offer a large variation in threshold voltage, when they are fabricated from the same precursor ink. Consequently, both depletion and enhancement-mode devices have been achieved which can be used as the pull-up and pull-down transistors in unipolar inverters. The present device fabrication recipe demonstrates fast processing of low operation voltage, high performance FETs with large threshold voltage tunability.

Hydrogen Sensors Using Nitride-Based Semiconductor Diodes: The Role of Metal/Semiconductor Interfaces

Directory of Open Access Journals (Sweden)

Yoshihiro Irokawa

2011-01-01

Full Text Available In this paper, I review my recent results in investigating hydrogen sensors using nitride-based semiconductor diodes, focusing on the interaction mechanism of hydrogen with the devices. Firstly, effects of interfacial modification in the devices on hydrogen detection sensitivity are discussed. Surface defects of GaN under Schottky electrodes do not play a critical role in hydrogen sensing characteristics. However, dielectric layers inserted in metal/semiconductor interfaces are found to cause dramatic changes in hydrogen sensing performance, implying that chemical selectivity to hydrogen could be realized. The capacitance-voltage (C-V characteristics reveal that the work function change in the Schottky metal is not responsible mechanism for hydrogen sensitivity. The interface between the metal and the semiconductor plays a critical role in the interaction of hydrogen with semiconductor devises. Secondly, low-frequency C-V characterization is employed to investigate the interaction mechanism of hydrogen with diodes. As a result, it is suggested that the formation of a metal/semiconductor interfacial polarization could be attributed to hydrogen-related dipoles. In addition, using low-frequency C-V characterization leads to clear detection of 100 ppm hydrogen even at room temperature where it is hard to detect hydrogen by using conventional current-voltage (I-V characterization, suggesting that low-frequency C-V method would be effective in detecting very low hydrogen concentrations.

Aspect Ratio Model for Radiation-Tolerant Dummy Gate-Assisted n-MOSFET Layout.

Science.gov (United States)

Lee, Min Su; Lee, Hee Chul

2014-01-01

In order to acquire radiation-tolerant characteristics in integrated circuits, a dummy gate-assisted n-type metal oxide semiconductor field effect transistor (DGA n-MOSFET) layout was adopted. The DGA n-MOSFET has a different channel shape compared with the standard n-MOSFET. The standard n-MOSFET has a rectangular channel shape, whereas the DGA n-MOSFET has an extended rectangular shape at the edge of the source and drain, which affects its aspect ratio. In order to increase its practical use, a new aspect ratio model is proposed for the DGA n-MOSFET and this model is evaluated through three-dimensional simulations and measurements of the fabricated devices. The proposed aspect ratio model for the DGA n-MOSFET exhibits good agreement with the simulation and measurement results.

Ultrasensitive mass sensor fully integrated with complementary metal-oxide-semiconductor circuitry

DEFF Research Database (Denmark)

Forsén, Esko Sebastian; Abadal, G.; Ghatnekar-Nilsson, S.

2005-01-01

Nanomechanical resonators have been monolithically integrated on preprocessed complementary metal-oxide-semiconductor (CMOS) chips. Fabricated resonator systems have been designed to have resonance frequencies up to 1.5 MHz. The systems have been characterized in ambient air and vacuum conditions...... and display ultrasensitive mass detection in air. A mass sensitivity of 4 ag/Hz has been determined in air by placing a single glycerine drop, having a measured weight of 57 fg, at the apex of a cantilever and subsequently measuring a frequency shift of 14.8 kHz. CMOS integration enables electrostatic...

Diamond logic inverter with enhancement-mode metal-insulator-semiconductor field effect transistor

Energy Technology Data Exchange (ETDEWEB)

Liu, J. W., E-mail: liu.jiangwei@nims.go.jp [International Center for Young Scientists (ICYS), National Institute for Materials Science (NIMS), 1-1 Namiki, Tsukuba, Ibaraki 305-0044 (Japan); Liao, M. Y.; Imura, M. [Optical and Electronic Materials Unit, NIMS, 1-1 Namiki, Tsukuba, Ibaraki 305-0044 (Japan); Watanabe, E.; Oosato, H. [Nanofabrication Platform, NIMS, 1-2-1 Sengen, Tsukuba, Ibaraki 305-0047 (Japan); Koide, Y., E-mail: koide.yasuo@nims.go.jp [Optical and Electronic Materials Unit, NIMS, 1-1 Namiki, Tsukuba, Ibaraki 305-0044 (Japan); Nanofabrication Platform, NIMS, 1-2-1 Sengen, Tsukuba, Ibaraki 305-0047 (Japan); Center of Materials Research for Low Carbon Emission, NIMS, 1-1 Namiki, Tsukuba, Ibaraki 305-0044 (Japan)

2014-08-25

A diamond logic inverter is demonstrated using an enhancement-mode hydrogenated-diamond metal-insulator-semiconductor field effect transistor (MISFET) coupled with a load resistor. The gate insulator has a bilayer structure of a sputtering-deposited LaAlO{sub 3} layer and a thin atomic-layer-deposited Al{sub 2}O{sub 3} buffer layer. The source-drain current maximum, extrinsic transconductance, and threshold voltage of the MISFET are measured to be −40.7 mA·mm{sup −1}, 13.2 ± 0.1 mS·mm{sup −1}, and −3.1 ± 0.1 V, respectively. The logic inverters show distinct inversion (NOT-gate) characteristics for input voltages ranging from 4.0 to −10.0 V. With increasing the load resistance, the gain of the logic inverter increases from 5.6 to as large as 19.4. The pulse response against the high and low input voltages shows the inversion response with the low and high output voltages.

A high-performance complementary inverter based on transition metal dichalcogenide field-effect transistors.

Science.gov (United States)

Cho, Ah-Jin; Park, Kee Chan; Kwon, Jang-Yeon

2015-01-01

For several years, graphene has been the focus of much attention due to its peculiar characteristics, and it is now considered to be a representative 2-dimensional (2D) material. Even though many research groups have studied on the graphene, its intrinsic nature of a zero band-gap, limits its use in practical applications, particularly in logic circuits. Recently, transition metal dichalcogenides (TMDs), which are another type of 2D material, have drawn attention due to the advantage of having a sizable band-gap and a high mobility. Here, we report on the design of a complementary inverter, one of the most basic logic elements, which is based on a MoS2 n-type transistor and a WSe2 p-type transistor. The advantages provided by the complementary metal-oxide-semiconductor (CMOS) configuration and the high-performance TMD channels allow us to fabricate a TMD complementary inverter that has a high-gain of 13.7. This work demonstrates the operation of the MoS2 n-FET and WSe2 p-FET on the same substrate, and the electrical performance of the CMOS inverter, which is based on a different driving current, is also measured.

Accuracy of dielectric-dependent hybrid functionals in the prediction of optoelectronic properties of metal oxide semiconductors: a comprehensive comparison with many-body GW and experiments

Science.gov (United States)

Gerosa, M.; E Bottani, C.; Di Valentin, C.; Onida, G.; Pacchioni, G.

2018-01-01

Understanding the electronic structure of metal oxide semiconductors is crucial to their numerous technological applications, such as photoelectrochemical water splitting and solar cells. The needed experimental and theoretical knowledge goes beyond that of pristine bulk crystals, and must include the effects of surfaces and interfaces, as well as those due to the presence of intrinsic defects (e.g. oxygen vacancies), or dopants for band engineering. In this review, we present an account of the recent efforts in predicting and understanding the optoelectronic properties of oxides using ab initio theoretical methods. In particular, we discuss the performance of recently developed dielectric-dependent hybrid functionals, providing a comparison against the results of many-body GW calculations, including G 0 W 0 as well as more refined approaches, such as quasiparticle self-consistent GW. We summarize results in the recent literature for the band gap, the band level alignment at surfaces, and optical transition energies in defective oxides, including wide gap oxide semiconductors and transition metal oxides. Correlated transition metal oxides are also discussed. For each method, we describe successes and drawbacks, emphasizing the challenges faced by the development of improved theoretical approaches. The theoretical section is preceded by a critical overview of the main experimental techniques needed to characterize the optoelectronic properties of semiconductors, including absorption and reflection spectroscopy, photoemission, and scanning tunneling spectroscopy (STS).

Temperature Dependent Electrical Transport in Al/Poly(4-vinyl phenol/p-GaAs Metal-Oxide-Semiconductor by Sol-Gel Spin Coating Method

Directory of Open Access Journals (Sweden)

Şadan Özden

2016-01-01

Full Text Available Deposition of poly(4-vinyl phenol insulator layer is carried out by applying the spin coating technique onto p-type GaAs substrate so as to create Al/poly(4-vinyl phenol/p-GaAs metal-oxide-semiconductor (MOS structure. Temperature was set to 80–320 K while the current-voltage (I-V characteristics of the structure were examined in the study. Ideality factor (n and barrier height (ϕb values found in the experiment ranged from 3.13 and 0.616 eV (320 K to 11.56 and 0.147 eV (80 K. Comparing the thermionic field emission theory and thermionic emission theory, the temperature dependent ideality factor behavior displayed that thermionic field emission theory is more valid than the latter. The calculated tunneling energy was 96 meV.

Amorphous Oxide Thin Film Transistors with Nitrogen-Doped Hetero-Structure Channel Layers

Directory of Open Access Journals (Sweden)

Haiting Xie

2017-10-01

Full Text Available The nitrogen-doped amorphous oxide semiconductor (AOS thinfilm transistors (TFTs with double-stacked channel layers (DSCL were prepared and characterized. The DSCL structure was composed of nitrogen-doped amorphous InGaZnO and InZnO films (a-IGZO:N/a-IZO:N or a-IZO:N/a-IGZO:N and gave the corresponding TFT devices large field-effect mobility due to the presence of double conduction channels. The a-IZO:N/a-IGZO:N TFTs, in particular, showed even better electrical performance (µFE = 15.0 cm2・V−1・s−1, SS = 0.5 V/dec, VTH = 1.5 V, ION/IOFF = 1.1 × 108 and stability (VTH shift of 1.5, −0.5 and −2.5 V for positive bias-stress, negative bias-stress, and thermal stress tests, respectively than the a-IGZO:N/a-IZO:N TFTs. Based on the X-ray photoemission spectroscopy measurements and energy band analysis, we assumed that the optimized interface trap states, the less ambient gas adsorption, and the better suppression of oxygen vacancies in the a-IZO:N/a-IGZO:N hetero-structures might explain the better behavior of the corresponding TFTs.

Promotion effect of monovalent metals (K and Cs) on the GaAs (110) surface oxidation

International Nuclear Information System (INIS)

Valeri, S.; Sberveglieri, P.; Angeli, E.

1987-01-01

The effect of thin (∼ 1 monolayer) overlayers of low electronegativity metals (Cs and K) on the RT oxidation behaviour of GaAs(110) cleavage surface is studied. This study was with Auger and Photoemission spectroscopies. Attention has been focused on the core-valence-valence and Auger lineshapes on the Ga and As 3d peaks. Presence of the alkali metal enhances the GaAs (110) oxidation rate several orders of magnitude above the clean surface value has been found. The range 0-100 Langmuir is investigated in detail. The oxidation process of the GaAs(110) surface in the presence of both K and Cs overlayer follows a multi-step kinetic and reaches a saturation at exposure lower than 100 Langmuir. Both Ga and As atoms are involved in the oxygen bonding. The metal enhanced semiconductor oxidation is generally reported to be a process involving predominantly the semiconductor surface atoms. However in the Cs - and K - GaAs case, an involvement of the alkali metal atoms too, reflected in the shape modification of their Auger line has been found. The promotion effect of K and Cs is discussed in terms of their low electronegativity and in comparison with the results recently reported in the literature for the other low electronegativity metals

A metallic metal oxide (Ti5O9)-metal oxide (TiO2) nanocomposite as the heterojunction to enhance visible-light photocatalytic activity.

Science.gov (United States)

Li, L H; Deng, Z X; Xiao, J X; Yang, G W

2015-01-26

Coupling titanium dioxide (TiO2) with other semiconductors is a popular method to extend the optical response range of TiO2 and improve its photon quantum efficiency, as coupled semiconductors can increase the separation rate of photoinduced charge carriers in photocatalysts. Differing from normal semiconductors, metallic oxides have no energy gap separating occupied and unoccupied levels, but they can excite electrons between bands to create a high carrier mobility to facilitate kinetic charge separation. Here, we propose the first metallic metal oxide-metal oxide (Ti5O9-TiO2) nanocomposite as a heterojunction for enhancing the visible-light photocatalytic activity of TiO2 nanoparticles and we demonstrate that this hybridized TiO2-Ti5O9 nanostructure possesses an excellent visible-light photocatalytic performance in the process of photodegrading dyes. The TiO2-Ti5O9 nanocomposites are synthesized in one step using laser ablation in liquid under ambient conditions. The as-synthesized nanocomposites show strong visible-light absorption in the range of 300-800 nm and high visible-light photocatalytic activity in the oxidation of rhodamine B. They also exhibit excellent cycling stability in the photodegrading process. A working mechanism for the metallic metal oxide-metal oxide nanocomposite in the visible-light photocatalytic process is proposed based on first-principle calculations of Ti5O9. This study suggests that metallic metal oxides can be regarded as partners for metal oxide photocatalysts in the construction of heterojunctions to improve photocatalytic activity.

Metal-core@metal oxide-shell nanomaterials for gas-sensing applications: a review

Energy Technology Data Exchange (ETDEWEB)

Mirzaei, A.; Janghorban, K.; Hashemi, B. [Shiraz University, Department of Materials Science and Engineering (Iran, Islamic Republic of); Neri, G., E-mail: gneri@unime.it [University of Messina, Department of Electronic Engineering, Chemistry and Industrial Engineering (Italy)

2015-09-15

With an ever-increasing number of applications in many advanced fields, gas sensors are becoming indispensable devices in our daily life. Among different types of gas sensors, conductometric metal oxide semiconductor (MOS) gas sensors are found to be the most appealing for advanced applications in the automotive, biomedical, environmental, and safety sectors because of the their high sensitivity, reduced size, and low cost. To improve their sensing characteristics, new metal oxide-based nanostructures have thus been proposed in recent years as sensing materials. In this review, we extensively review gas-sensing properties of core@ shell nanocomposites in which metals as the core and metal oxides as the shell structure, both of nanometer sizes, are assembled into a single metal@metal oxide core–shell. These nanostructures not only combine the properties of both noble metals and metal oxides, but also bring unique synergetic functions in comparison with single-component materials. Up-dated achievements in the synthesis and characterization of metal@metal oxide core–shell nanostructures as well as their use in MOS sensors are here reported with the main objective of providing an overview about their gas-sensing properties.

Control of Ambipolar Transport in SnO Thin-Film Transistors by Back-Channel Surface Passivation for High Performance Complementary-like Inverters.

Science.gov (United States)

Luo, Hao; Liang, Lingyan; Cao, Hongtao; Dai, Mingzhi; Lu, Yicheng; Wang, Mei

2015-08-12

For ultrathin semiconductor channels, the surface and interface nature are vital and often dominate the bulk properties to govern the field-effect behaviors. High-performance thin-film transistors (TFTs) rely on the well-defined interface between the channel and gate dielectric, featuring negligible charge trap states and high-speed carrier transport with minimum carrier scattering characters. The passivation process on the back-channel surface of the bottom-gate TFTs is indispensable for suppressing the surface states and blocking the interactions between the semiconductor channel and the surrounding atmosphere. We report a dielectric layer for passivation of the back-channel surface of 20 nm thick tin monoxide (SnO) TFTs to achieve ambipolar operation and complementary metal oxide semiconductor (CMOS) like logic devices. This chemical passivation reduces the subgap states of the ultrathin channel, which offers an opportunity to facilitate the Fermi level shifting upward upon changing the polarity of the gate voltage. With the advent of n-type inversion along with the pristine p-type conduction, it is now possible to realize ambipolar operation using only one channel layer. The CMOS-like logic inverters based on ambipolar SnO TFTs were also demonstrated. Large inverter voltage gains (>100) in combination with wide noise margins are achieved due to high and balanced electron and hole mobilities. The passivation also improves the long-term stability of the devices. The ability to simultaneously achieve field-effect inversion, electrical stability, and logic function in those devices can open up possibilities for the conventional back-channel surface passivation in the CMOS-like electronics.

Electric-Field-Driven Dual Vacancies Evolution in Ultrathin Nanosheets Realizing Reversible Semiconductor to Half-Metal Transition.

Science.gov (United States)

Lyu, Mengjie; Liu, Youwen; Zhi, Yuduo; Xiao, Chong; Gu, Bingchuan; Hua, Xuemin; Fan, Shaojuan; Lin, Yue; Bai, Wei; Tong, Wei; Zou, Youming; Pan, Bicai; Ye, Bangjiao; Xie, Yi

2015-12-02

Fabricating a flexible room-temperature ferromagnetic resistive-switching random access memory (RRAM) device is of fundamental importance to integrate nonvolatile memory and spintronics both in theory and practice for modern information technology and has the potential to bring about revolutionary new foldable information-storage devices. Here, we show that a relatively low operating voltage (+1.4 V/-1.5 V, the corresponding electric field is around 20,000 V/cm) drives the dual vacancies evolution in ultrathin SnO2 nanosheets at room temperature, which causes the reversible transition between semiconductor and half-metal, accompanyied by an abrupt conductivity change up to 10(3) times, exhibiting room-temperature ferromagnetism in two resistance states. Positron annihilation spectroscopy and electron spin resonance results show that the Sn/O dual vacancies in the ultrathin SnO2 nanosheets evolve to isolated Sn vacancy under electric field, accounting for the switching behavior of SnO2 ultrathin nanosheets; on the other hand, the different defect types correspond to different conduction natures, realizing the transition between semiconductor and half-metal. Our result represents a crucial step to create new a information-storage device realizing the reversible transition between semiconductor and half-metal with flexibility and room-temperature ferromagnetism at low energy consumption. The as-obtained half-metal in the low-resistance state broadens the application of the device in spintronics and the semiconductor to half-metal transition on the basis of defects evolution and also opens up a new avenue for exploring random access memory mechanisms and finding new half-metals for spintronics.

Performance analysis of SOI MOSFET with rectangular recessed channel

Science.gov (United States)

Singh, M.; Mishra, S.; Mohanty, S. S.; Mishra, G. P.

2016-03-01

In this paper a two dimensional (2D) rectangular recessed channel-silicon on insulator metal oxide semiconductor field effect transistor (RRC-SOI MOSFET), using the concept of groove between source and drain regions, which is one of the channel engineering technique to suppress the short channel effect (SCE). This suppression is mainly due to corner potential barrier of the groove and the simulation is carried out by using ATLAS 2D device simulator. To have further improvement of SCE in RRC-SOI MOSFET, three more devices are designed by using dual material gate (DMG) and gate dielectric technique, which results in formation of devices i.e. DMRRC-SOI,MLSMRRC-SOI, MLDMRRC-SOI MOSFET. The effect of different structures of RRC-SOI on AC and RF parameters are investigated and the importance of these devices over RRC MOSFET regarding short channel effect is analyzed.

Effect of surface states on electrical characteristic of metal - insulator - semiconductor (MIS) diodes

International Nuclear Information System (INIS)

Altindal, S.; Doekme, I.; Tataroglu, A.; Sahingoez, R.

2002-01-01

The current-voltage (I-V) characteristics of Metal-Insulator-Semiconductor (MIS) Schottky barrier diodes which is consider distribution of interface states in equilibrium with semiconductor were determined at two (low and high) temperature. The interface states were responsible for non-ideal behavior of the forward I-V characteristic of diodes. Both diodes (n and p type Si) showed non-ideal behavior with an ideality factor 1.6 and 1.85 respectively at room temperature. The higher values of n-type Si were attributed to an order of magnitude higher density of interface states in the both diodes. The effect of an interfacial insulator layer between the metal and semiconductor are also studied. The high density of interface states also caused a reduction in the barrier height of the MIS diode. It is shown that by using Norde function at low and high temperature, barrier height □ b , series resistance R s and ideality factor n can be determined even in the case 1 s obtained from Norde function strongly depend on temperature, and decrease with increasing temperature. In addition, the potential barrier height increases with increasing temperature. The mean density of interface states N ss decreases with increasing temperature. Particularly at low temperature the I-V characteristics are controlled by interface states density

100% spin accumulation in non-half-metallic ferromagnet-semiconductor junctions

International Nuclear Information System (INIS)

Petukhov, A G; Niggemann, J; Smelyanskiy, V N; Osipov, V V

2007-01-01

We show that the spin polarization of electron density in non-magnetic degenerate semiconductors can achieve 100%. The effect of 100% spin accumulation does not require a half-metallic ferromagnetic contact and can be realized in ferromagnet-semiconductor FM-n + -n junctions even at moderate spin selectivity of the FM-n + contact when the electrons with spin 'up' are extracted from n semiconductor through the heavily doped n + layer into the ferromagnet and the electrons with spin 'down' are accumulated near the n + -n interface. We derived a general equation relating spin polarization of the current to that of the electron density in non-magnetic semiconductors. We found that the effect of complete spin polarization is achieved near the n + -n interface when the concentration of the spin 'up' electrons tends to zero in this region while the diffusion current of these electrons remains finite

Extraordinary magnetoresistance in semiconductor/metal hybrids: A review

KAUST Repository

Sun, J.; Kosel, Jü rgen

2013-01-01

The Extraordinary Magnetoresistance (EMR) effect is a change in the resistance of a device upon the application of a magnetic field in hybrid structures, consisting of a semiconductor and a metal. The underlying principle of this phenomenon is a

Semiconductor analysis with a channeled helium microbeam

International Nuclear Information System (INIS)

Ingarfield, S.A.; McKenzie, C.D.; Short, K.T.; Williams, J.S.

1981-01-01

This paper describes the use of a channeled helium microbeam for analysis of damage and dopant distributions in semiconductors. Practical difficulties and potential problems associated with the channeling of microbeams in semiconductors have been examined. In particular, the following factors have been characterised: i) the effect of both convergence of focused beam and beam scanning on the quality of channeling; ii) damage produced by the probe ions; and iii) local beam heating effects arising from high current densities. Acceptable channeling has been obtained (minimum yield approaching 4%) under a variety of focusing and scanning conditions which are suitable for analysis of device structures. The capabilities of the technique are demonstrated by monitoring variations in local damage and impurity depth distributions across a narrow (<2mm) region of an ion implanted silicon wafer

Effect of thermal oxidation treatment on pH sensitivity of AlGaN/GaN heterostructure ion-sensitive field-effect transistors

Energy Technology Data Exchange (ETDEWEB)

Wang, Lei; Bu, Yuyu [Institute of Science and Technology, Tokushima University, Tokushima 770-8506 (Japan); Li, Liuan, E-mail: liliuan@mail.sysu.edu.cn [School of Electronics and Information Technology, Sun Yat-Sen University, Guangzhou 510275 (China); Ao, Jin-Ping, E-mail: jpao@ee.tokushima-u.ac.jp [Institute of Science and Technology, Tokushima University, Tokushima 770-8506 (Japan)

2017-07-31

Highlights: • AlGaN/GaN ISFETs were fabricated and evaluated with thermal oxidation treatment. • Sensitivity was improved to 57.7 mV/pH after 700 °C treatment. • Sensitivity became poor after 800 °C treatment. • The pure α-Al{sub 2}O{sub 3} crystal phase generated on the surface of the 700 °C treatment sample. • Ga{sub 2}O{sub 3} phase content in the metal oxide layer increased after 800 °C treatment. - Abstract: In this article, AlGaN/GaN heterostructure ion-sensitive field-effect transistors (ISFETs) were prepared and evaluated by thermal oxidation treatment on the AlGaN surface. The ISFETs were fabricated on the AlGaN/GaN heterostructure and then thermally oxidized with dry oxygen in 600, 700, and 800 °C, respectively. It indicates that the performance of the AlGaN/GaN heterostructure ISFETs, such as noise and sensitivity, has been improved owing to the thermal oxidation treatment process at different temperatures. The X-ray photoelectron spectroscopy (XPS) and X-ray diffraction (XRD) results indicate that after thermal oxidation treatment at different temperatures, hydroxide who possesses high surface state density will transfer to oxide owing to the higher chemical stability of the latter. Moreover, a crystalline α-Al{sub 2}O{sub 3} phase generated at 700 °C can not only provide a relatively smooth surface, but also improve the sensitivity to 57.7 mV/pH for the AlGaN/GaN heterostructure ISFETs, which is very close to the Nernstian limit.

On-chip growth of semiconductor metal oxide nanowires for gas sensors: A review

Directory of Open Access Journals (Sweden)

Chu Manh Hung

2017-09-01

Full Text Available Semiconductor metal oxide nanowires (SMO-NWs show great potential for novel gas sensor applications because of their distinct properties, such as a high surface area to volume aspect ratio, high crystallinity and perfect pathway for electron transfer (length of NW. SMO-NW sensors can be configured as resistors or field-effect transistors for gas detection and different configurations, such as a single NW, multiple NWs, and networked NW films, have been established. Surface-functionalizing NWs with catalyst elements and self-heating NWs provide additional advantages for highly selective and low-power consumption gas sensors. However, an appropriate design of SMO-NWs is of practical importance in enhancing the gas-sensing performance of SMO-NW sensors. The on-chip growth of SMO-NWs possesses many advantages which can thus be effectively used for the large-scale fabrication of SMO-NW sensors with improved gas response and stability. This review aims to provide up-to-date information on the on-chip fabrication of SnO2, ZnO, WO3, CuO, and other SMO-NW sensors. It also discusses a variety of promising approaches that help advance the on-chip fabrication of SMO-NW-based gas sensors and other NW-based devices.

Comparative study on nitridation and oxidation plasma interface treatment for AlGaN/GaN MIS-HEMTs with AlN gate dielectric

Science.gov (United States)

Zhu, Jie-Jie; Ma, Xiao-Hua; Hou, Bin; Chen, Li-Xiang; Zhu, Qing; Hao, Yue

2017-02-01

This paper demonstrated the comparative study on interface engineering of AlN/AlGaN/GaN metal-insulator-semiconductor high-electron-mobility transistors (MIS-HEMTs) by using plasma interface pre-treatment in various ambient gases. The 15 nm AlN gate dielectric grown by plasma-enhanced atomic layer deposition significantly suppressed the gate leakage current by about two orders of magnitude and increased the peak field-effect mobility by more than 50%. NH3/N2 nitridation plasma treatment (NPT) was used to remove the 3 nm poor-quality interfacial oxide layer and N2O/N2 oxidation plasma treatment (OPT) to improve the quality of interfacial layer, both resulting in improved dielectric/barrier interface quality, positive threshold voltage (V th) shift larger than 0.9 V, and negligible dispersion. In comparison, however, NPT led to further decrease in interface charges by 3.38 × 1012 cm-2 and an extra positive V th shift of 1.3 V. Analysis with fat field-effect transistors showed that NPT resulted in better sub-threshold characteristics and transconductance linearity for MIS-HEMTs compared with OPT. The comparative study suggested that direct removing the poor interfacial oxide layer by nitridation plasma was superior to improving the quality of interfacial layer by oxidation plasma for the interface engineering of GaN-based MIS-HEMTs.

Rocksalt nitride metal/semiconductor superlattices: A new class of artificially structured materials

Science.gov (United States)

Saha, Bivas; Shakouri, Ali; Sands, Timothy D.

2018-06-01

Artificially structured materials in the form of superlattice heterostructures enable the search for exotic new physics and novel device functionalities, and serve as tools to push the fundamentals of scientific and engineering knowledge. Semiconductor heterostructures are the most celebrated and widely studied artificially structured materials, having led to the development of quantum well lasers, quantum cascade lasers, measurements of the fractional quantum Hall effect, and numerous other scientific concepts and practical device technologies. However, combining metals with semiconductors at the atomic scale to develop metal/semiconductor superlattices and heterostructures has remained a profoundly difficult scientific and engineering challenge. Though the potential applications of metal/semiconductor heterostructures could range from energy conversion to photonic computing to high-temperature electronics, materials challenges primarily had severely limited progress in this pursuit until very recently. In this article, we detail the progress that has taken place over the last decade to overcome the materials engineering challenges to grow high quality epitaxial, nominally single crystalline metal/semiconductor superlattices based on transition metal nitrides (TMN). The epitaxial rocksalt TiN/(Al,Sc)N metamaterials are the first pseudomorphic metal/semiconductor superlattices to the best of our knowledge, and their physical properties promise a new era in superlattice physics and device engineering.

Classic and Quantum Capacitances in Bernal Bilayer and Trilayer Graphene Field Effect Transistor

Directory of Open Access Journals (Sweden)

Hatef Sadeghi

2013-01-01

Full Text Available Our focus in this study is on characterizing the capacitance voltage (C-V behavior of Bernal stacking bilayer graphene (BG and trilayer graphene (TG as the channel of FET devices. The analytical models of quantum capacitance (QC of BG and TG are presented. Although QC is smaller than the classic capacitance in conventional devices, its contribution to the total metal oxide semiconductor capacitor in graphene-based FET devices becomes significant in the nanoscale. Our calculation shows that QC increases with gate voltage in both BG and TG and decreases with temperature with some fluctuations. However, in bilayer graphene the fluctuation is higher due to its tunable band structure with external electric fields. In similar temperature and size, QC in metal oxide BG is higher than metal oxide TG configuration. Moreover, in both BG and TG, total capacitance is more affected by classic capacitance as the distance between gate electrode and channel increases. However, QC is more dominant when the channel becomes thinner into the nanoscale, and therefore we mostly deal with quantum capacitance in top gate in contrast with bottom gate that the classic capacitance is dominant.

Mechanistic analysis of temperature-dependent current conduction through thin tunnel oxide in n+-polySi/SiO2/n+-Si structures

Science.gov (United States)

Samanta, Piyas

2017-09-01

We present a detailed investigation on temperature-dependent current conduction through thin tunnel oxides grown on degenerately doped n-type silicon (n+-Si) under positive bias ( VG ) on heavily doped n-type polycrystalline silicon (n+-polySi) gate in metal-oxide-semiconductor devices. The leakage current measured between 298 and 573 K and at oxide fields ranging from 6 to 10 MV/cm is primarily attributed to Poole-Frenkel (PF) emission of trapped electrons from the neutral electron traps located in the silicon dioxide (SiO2) band gap in addition to Fowler-Nordheim (FN) tunneling of electrons from n+-Si acting as the drain node in FLOating gate Tunnel OXide Electrically Erasable Programmable Read-Only Memory devices. Process-induced neutral electron traps are located at 0.18 eV and 0.9 eV below the SiO2 conduction band. Throughout the temperature range studied here, PF emission current IPF dominates FN electron tunneling current IFN at oxide electric fields Eox between 6 and 10 MV/cm. A physics based new analytical formula has been developed for FN tunneling of electrons from the accumulation layer of degenerate semiconductors at a wide range of temperatures incorporating the image force barrier rounding effect. FN tunneling has been formulated in the framework of Wentzel-Kramers-Brilloiun taking into account the correction factor due to abrupt variation of the energy barrier at the cathode/oxide interface. The effect of interfacial and near-interfacial trapped-oxide charges on FN tunneling has also been investigated in detail at positive VG . The mechanism of leakage current conduction through SiO2 films plays a crucial role in simulation of time-dependent dielectric breakdown of the memory devices and to precisely predict the normal operating field or applied floating gate (FG) voltage for lifetime projection of the devices. In addition, we present theoretical results showing the effect of drain doping concentration on the FG leakage current.

First-principles calculation of electric field gradients in metals, semiconductors, and insulators

Energy Technology Data Exchange (ETDEWEB)

Zwanziger, J.W. [Dalhousie Univ, Dept Chem, Halifax, NS (Canada); Dalhousie Univ, Inst Res Mat, Halifax, NS (Canada); Torrent, M. [CEA Bruyeres-le-Chatel, Dept Phys Theor and Appl, Bruyeres 91 (France)

2008-07-01

A scheme for computing electric field gradients within the projector augmented wave (PAW) formalism of density functional theory is presented. On the basis of earlier work (M. Profeta, F. Mauri, C.J. Pickard, J. Am. Chem. Soc. 125, 541, 2003) the present implementation handles metallic cases as well as insulators and semiconductors with equal efficiency. Details of the implementation, as well as applications and the discussion of the limitations of the PAW method for computing electric field gradients are presented. (authors)

Electrical memory features of ferromagnetic CoFeAlSi nano-particles embedded in metal-oxide-semiconductor matrix

International Nuclear Information System (INIS)

Lee, Ja Bin; Kim, Ki Woong; Lee, Jun Seok; An, Gwang Guk; Hong, Jin Pyo

2011-01-01

Half-metallic Heusler material Co 2 FeAl 0.5 Si 0.5 (CFAS) nano-particles (NPs) embedded in metal-oxide-semiconductor (MOS) structures with thin HfO 2 tunneling and MgO control oxides were investigated. The CFAS NPs were prepared by rapid thermal annealing. The formation of well-controlled CFAS NPs on thin HfO 2 tunneling oxide was confirmed by atomic force microscopy (AFM). Memory characteristics of CFAS NPs in MOS devices exhibited a large memory window of 4.65 V, as well as good retention and endurance times of 10 5 cycles and 10 9 s, respectively, demonstrating the potential of CFAS NPs as promising candidates for use in charge storage.

Highly stable copper oxide composite as an effective photocathode for water splitting via a facile electrochemical synthesis strategy

KAUST Repository

Zhang, Zhonghai; Wang, Peng

2012-01-01

focused on n-type metal oxide semiconductors as photoanodes, whereas studies of p-type metal oxide semiconductors as photocathodes where hydrogen is generated are scarce. In this paper, highly efficient and stable copper oxide composite photocathode

Polycrystalline silicon ring resonator photodiodes in a bulk complementary metal-oxide-semiconductor process.

Science.gov (United States)

Mehta, Karan K; Orcutt, Jason S; Shainline, Jeffrey M; Tehar-Zahav, Ofer; Sternberg, Zvi; Meade, Roy; Popović, Miloš A; Ram, Rajeev J

2014-02-15

We present measurements on resonant photodetectors utilizing sub-bandgap absorption in polycrystalline silicon ring resonators, in which light is localized in the intrinsic region of a p+/p/i/n/n+ diode. The devices, operating both at λ=1280 and λ=1550  nm and fabricated in a complementary metal-oxide-semiconductor (CMOS) dynamic random-access memory emulation process, exhibit detection quantum efficiencies around 20% and few-gigahertz response bandwidths. We observe this performance at low reverse biases in the range of a few volts and in devices with dark currents below 50 pA at 10 V. These results demonstrate that such photodetector behavior, previously reported by Preston et al. [Opt. Lett. 36, 52 (2011)], is achievable in bulk CMOS processes, with significant improvements with respect to the previous work in quantum efficiency, dark current, linearity, bandwidth, and operating bias due to additional midlevel doping implants and different material deposition. The present work thus offers a robust realization of a fully CMOS-fabricated all-silicon photodetector functional across a wide wavelength range.

Fermi level dependent native defect formation: Consequences for metal-semiconductor and semiconductor-semiconductor interfaces

International Nuclear Information System (INIS)

Walukiewicz, W.

1988-02-01

The amphoteric native defect model of the Schottky barrier formation is used to analyze the Fermi level pinning at metal/semiconductor interfaces for submonolayer metal coverages. It is assumed that the energy required for defect generation is released in the process of surface back-relaxation. Model calculations for metal/GaAs interfaces show a weak dependence of the Fermi level pinning on the thickness of metal deposited at room temperature. This weak dependence indicates a strong dependence of the defect formation energy on the Fermi level, a unique feature of amphoteric native defects. This result is in very good agreement with experimental data. It is shown that a very distinct asymmetry in the Fermi level pinning on p- and n-type GaAs observed at liquid nitrogen temperatures can be understood in terms of much different recombination rates for amphoteric native defects in those two types of materials. Also, it is demonstrated that the Fermi level stabilization energy, a central concept of the amphoteric defect system, plays a fundamental role in other phenomena in semiconductors such as semiconductor/semiconductor heterointerface intermixing and saturation of free carrier concentration. 33 refs., 6 figs

Heavy-ion-induced, gate-rupture in power MOSFETs

International Nuclear Information System (INIS)

Fischer, T.A.

1987-01-01

A new, heavy-ion-induced, burnout mechanism has been experimentally observed in power metal-oxide-semiconductor field-effect transistors (MOSFETs). This mechanism occurs when a heavy, charged particle passes through the gate oxide region of n- or p-channel devices having sufficient gate-to-source or gate-to-drain bias. The gate-rupture leads to significant permanent degradation of the device. A proposed failure mechanism is discussed and experimentally verified. In addition, the absolute immunity of p-channel devices to heavy-ion-induced, semiconductor burnout is demonstrated and discussed along with new, non-destructive, burnout testing methods

Interface Schottky barrier engineering via strain in metal-semiconductor composites

Science.gov (United States)

Ma, Xiangchao; Dai, Ying; Yu, Lin; Huang, Baibiao

2016-01-01

The interfacial carrier transfer property, which is dominated by the interface Schottky barrier height (SBH), plays a crucial role in determining the performance of metal-semiconductor heterostructures in a variety of applications. Therefore, artificially controlling the interface SBH is of great importance for their industrial applications. As a model system, the Au/TiO2 (001) heterostructure is studied using first-principles calculations and the tight-binding method in the present study. Our investigation demonstrates that strain can be an effective way to decrease the interface SBH and that the n-type SBH can be more effectively decreased than the p-type SBH. Astonishingly, strain affects the interface SBH mainly by changing the intrinsic properties of Au and TiO2, whereas the interfacial potential alignment is almost independent of strain due to two opposite effects, which are induced by strain at the interfacial region. These observed trends can be understood on the basis of the general free-electron gas model of typical metals, the tight-binding theory and the crystal-field theory, which suggest that similar trends may be generalized for many other metal-semiconductor heterostructures. Given the commonness and tunability of strain in typical heterostructures, we anticipate that the tunability of the interface SBH with strain described here can provide an alternative effective way for realizing more efficient applications of relevant heterostructures.The interfacial carrier transfer property, which is dominated by the interface Schottky barrier height (SBH), plays a crucial role in determining the performance of metal-semiconductor heterostructures in a variety of applications. Therefore, artificially controlling the interface SBH is of great importance for their industrial applications. As a model system, the Au/TiO2 (001) heterostructure is studied using first-principles calculations and the tight-binding method in the present study. Our investigation

Graphene field-effect devices

Science.gov (United States)

Echtermeyer, T. J.; Lemme, M. C.; Bolten, J.; Baus, M.; Ramsteiner, M.; Kurz, H.

2007-09-01

In this article, graphene is investigated with respect to its electronic properties when introduced into field effect devices (FED). With the exception of manual graphene deposition, conventional top-down CMOS-compatible processes are applied. Few and monolayer graphene sheets are characterized by scanning electron microscopy, atomic force microscopy and Raman spectroscopy. The electrical properties of monolayer graphene sandwiched between two silicon dioxide films are studied. Carrier mobilities in graphene pseudo-MOS structures are compared to those obtained from double-gated Graphene-FEDs and silicon metal-oxide-semiconductor field-effect-transistors (MOSFETs).

Electrosprayed Metal Oxide Semiconductor Films for Sensitive and Selective Detection of Hydrogen Sulfide

Directory of Open Access Journals (Sweden)

Maryam Siadat

2009-11-01

Full Text Available Semiconductor metal oxide films of copper-doped tin oxide (Cu-SnO2, tungsten oxide (WO3 and indium oxide (In2O3 were deposited on a platinum coated alumina substrate employing the electrostatic spray deposition technique (ESD. The morphology studied with scanning electron microscopy (SEM and atomic force microscopy (AFM shows porous homogeneous films comprising uniformly distributed aggregates of nano particles. The X-ray diffraction technique (XRD proves the formation of crystalline phases with no impurities. Besides, the Raman cartographies provided information about the structural homogeneity. Some of the films are highly sensitive to low concentrations of H2S (10 ppm at low operating temperatures (100 and 200 °C and the best response in terms of Rair/Rgas is given by Cu-SnO2 films (2500 followed by WO3 (1200 and In2O3 (75. Moreover, all the films exhibit no cross-sensitivity to other reducing (SO2 or oxidizing (NO2 gases.

The competing oxide and sub-oxide formation in metal-oxide molecular beam epitaxy

International Nuclear Information System (INIS)

Vogt, Patrick; Bierwagen, Oliver

2015-01-01

The hetero-epitaxial growth of the n-type semiconducting oxides β-Ga 2 O 3 , In 2 O 3 , and SnO 2 on c- and r-plane sapphire was performed by plasma-assisted molecular beam epitaxy. The growth-rate and desorbing flux from the substrate were measured in-situ under various oxygen to metal ratios by laser reflectometry and quadrupole mass spectrometry, respectively. These measurements clarified the role of volatile sub-oxide formation (Ga 2 O, In 2 O, and SnO) during growth, the sub-oxide stoichiometry, and the efficiency of oxide formation for the three oxides. As a result, the formation of the sub-oxides decreased the growth-rate under metal-rich growth conditions and resulted in etching of the oxide film by supplying only metal flux. The flux ratio for the exclusive formation of the sub-oxide (e.g., the p-type semiconductor SnO) was determined, and the efficiency of oxide formation was found to be the highest for SnO 2 , somewhat lower for In 2 O 3 , and the lowest for Ga 2 O 3 . Our findings can be generalized to further oxides that possess related sub-oxides

A Unified Channel Charges Expression for Analytic MOSFET Modeling

Directory of Open Access Journals (Sweden)

Hugues Murray

2012-01-01

Full Text Available Based on a 1D Poissons equation resolution, we present an analytic model of inversion charges allowing calculation of the drain current and transconductance in the Metal Oxide Semiconductor Field Effect Transistor. The drain current and transconductance are described by analytical functions including mobility corrections and short channel effects (CLM, DIBL. The comparison with the Pao-Sah integral shows excellent accuracy of the model in all inversion modes from strong to weak inversion in submicronics MOSFET. All calculations are encoded with a simple C program and give instantaneous results that provide an efficient tool for microelectronics users.

Influence of semiconductor/metal interface geometry in an EMR sensor

KAUST Repository

Sun, Jian

2013-02-01

The extraordinary magnetoresistance (EMR) is well known to be strongly dependent on geometric parameters. While the influence of the aspect ratios of the metal and semiconductor areas has been thoroughly investigated, the geometry of the semiconductor/metal interface has been neglected so far. However, from a fabrication point of view, this part plays a crucial role. In this paper, the performance of a bar-type hybrid EMR sensor is investigated by means of finite element method and experiments with respect to the hybrid interface geometry. A 3-D model has been developed, which simulates the EMR effect in case of fields in different directions. The semiconductor/metal interface has been investigated in terms of different layer thicknesses and overlaps. The results show that those parameters can cause a change in the output sensitivity of 2%-10%. In order to maintain a high sensitivity and keep the fabrication relatively simple and at low cost, a device with a thin metal shunt having a large overlap on the top of the semiconductor bar would provide the best solution. © 2001-2012 IEEE.

Binary copper oxide semiconductors: From materials towards devices

Energy Technology Data Exchange (ETDEWEB)

Meyer, B.K.; Polity, A.; Reppin, D.; Becker, M.; Hering, P.; Klar, P.J.; Sander, T.; Reindl, C.; Benz, J.; Eickhoff, M.; Heiliger, C.; Heinemann, M. [1. Physics Institute, Justus-Liebig University of Giessen (Germany); Blaesing, J.; Krost, A. [Institute of Experimental Physics (IEP), Otto-von-Guericke University Magdeburg (Germany); Shokovets, S. [Institute of Physics, Ilmenau University of Technology (Germany); Mueller, C.; Ronning, C. [Institute of Solid State Physics, Friedrich Schiller University Jena (Germany)

2012-08-15

Copper-oxide compound semiconductors provide a unique possibility to tune the optical and electronic properties from insulating to metallic conduction, from bandgap energies of 2.1 eV to the infrared at 1.40 eV, i.e., right into the middle of the efficiency maximum for solar-cell applications. Three distinctly different phases, Cu{sub 2}O, Cu{sub 4}O{sub 3}, and CuO, of this binary semiconductor can be prepared by thin-film deposition techniques, which differ in the oxidation state of copper. Their material properties as far as they are known by experiment or predicted by theory are reviewed. They are supplemented by new experimental results from thin-film growth and characterization, both will be critically discussed and summarized. With respect to devices the focus is on solar-cell performances based on Cu{sub 2}O. It is demonstrated by photoelectron spectroscopy (XPS) that the heterojunction system p-Cu{sub 2}O/n-AlGaN is much more promising for the application as efficient solar cells than that of p-Cu{sub 2}O/n-ZnO heterojunction devices that have been favored up to now. (Copyright copyright 2012 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim)

Optically induced bistable states in metal/tunnel-oxide/semiconductor /MTOS/ junctions

Science.gov (United States)

Lai, S. K.; Dressendorfer, P. V.; Ma, T. P.; Barker, R. C.

1981-01-01

A new switching phenomenon in metal-oxide semiconductor tunnel junction has been discovered. With a sufficiently large negative bias applied to the electrode, incident visible light of intensity greater than about 1 microW/sq cm causes the reverse-biased junction to switch from a low-current to a high-current state. It is believed that hot-electron-induced impact ionization provides the positive feedback necessary for switching, and causes the junction to remain in its high-current state after the optical excitation is removed. The junction may be switched back to the low-current state electrically. The basic junction characteristics have been measured, and a simple model for the switching phenomenon has been developed.

Interface States in AlGaN/GaN Metal-Insulator-Semiconductor High Electron Mobility Transistors

International Nuclear Information System (INIS)

Feng Qian; Du Kai; Li Yu-Kun; Shi Peng; Feng Qing

2013-01-01

Frequency-dependent capacitance and conductance measurements are performed on AlGaN/GaN high electron mobility transistors (HEMTs) and NbAlO/AlGaN/GaN metal-insulator-semiconductor HEMTs (MISHEMTs) to extract density and time constants of the trap states at NbAlO/AlGaN interface and gate/AlGaN interface with the gate-voltage biased into the accumulation region and that at the AlGaN/GaN interface with the gate-voltage biased into the depletion region in different circuit models. The measurement results indicate that the trap density at NbAlO/AlGaN interface is about one order lower than that at gate/AlGaN interface while the trap density at AlGaN/GaN interface is in the same order, so the NbAlO film can passivate the AlGaN surface effectively, which is consistent with the current collapse results

Metal semiconductor contacts and devices

CERN Document Server

Cohen, Simon S; Einspruch, Norman G

1986-01-01

VLSI Electronics Microstructure Science, Volume 13: Metal-Semiconductor Contacts and Devices presents the physics, technology, and applications of metal-semiconductor barriers in digital integrated circuits. The emphasis is placed on the interplay among the theory, processing, and characterization techniques in the development of practical metal-semiconductor contacts and devices.This volume contains chapters that are devoted to the discussion of the physics of metal-semiconductor interfaces and its basic phenomena; fabrication procedures; and interface characterization techniques, particularl

Enhancing the far-ultraviolet sensitivity of silicon complementary metal oxide semiconductor imaging arrays

Science.gov (United States)

Retherford, Kurt D.; Bai, Yibin; Ryu, Kevin K.; Gregory, James A.; Welander, Paul B.; Davis, Michael W.; Greathouse, Thomas K.; Winters, Gregory S.; Suntharalingam, Vyshnavi; Beletic, James W.

2015-10-01

We report our progress toward optimizing backside-illuminated silicon P-type intrinsic N-type complementary metal oxide semiconductor devices developed by Teledyne Imaging Sensors (TIS) for far-ultraviolet (UV) planetary science applications. This project was motivated by initial measurements at Southwest Research Institute of the far-UV responsivity of backside-illuminated silicon PIN photodiode test structures, which revealed a promising QE in the 100 to 200 nm range. Our effort to advance the capabilities of thinned silicon wafers capitalizes on recent innovations in molecular beam epitaxy (MBE) doping processes. Key achievements to date include the following: (1) representative silicon test wafers were fabricated by TIS, and set up for MBE processing at MIT Lincoln Laboratory; (2) preliminary far-UV detector QE simulation runs were completed to aid MBE layer design; (3) detector fabrication was completed through the pre-MBE step; and (4) initial testing of the MBE doping process was performed on monitoring wafers, with detailed quality assessments.

Charge-flow structures as polymeric early-warning fire alarm devices. M.S. Thesis; [metal oxide semiconductors

Science.gov (United States)

Sechen, C. M.; Senturia, S. D.

1977-01-01

The charge-flow transistor (CFT) and its applications for fire detection and gas sensing were investigated. The utility of various thin film polymers as possible sensing materials was determined. One polymer, PAPA, showed promise as a relative humidity sensor; two others, PFI and PSB, were found to be particularly suitable for fire detection. The behavior of the charge-flow capacitor, which is basically a parallel-plate capacitor with a polymer-filled gap in the metallic tip electrode, was successfully modeled as an RC transmission line. Prototype charge-flow transistors were fabricated and tested. The effective threshold voltage of this metal oxide semiconductor was found to be dependent on whether surface or bulk conduction in the thin film was dominant. Fire tests with a PFI-coated CFT indicate good sensitivity to smouldering fires.

Ohmic metallization technology for wide band-gap semiconductors

International Nuclear Information System (INIS)

Iliadis, A.A.; Vispute, R.D.; Venkatesan, T.; Jones, K.A.

2002-01-01

Ohmic contact metallizations on p-type 6H-SiC and n-type ZnO using a novel approach of focused ion beam (FIB) surface-modification and direct-write metal deposition will be reviewed, and the properties of such focused ion beam assisted non-annealed contacts will be reported. The process uses a Ga focused ion beam to modify the surface of the semiconductor with different doses, and then introduces an organometallic compound in the Ga ion beam, to effect the direct-write deposition of a metal on the modified surface. Contact resistance measurements by the transmission line method produced values in the low 10 -4 Ω cm 2 range for surface-modified and direct-write Pt and W non-annealed contacts, and mid 10 -5 Ω cm 2 range for surface-modified and pulse laser deposited TiN contacts. An optimum Ga surface-modification dosage window is determined, within which the current transport mechanism of these contacts was found to proceed mainly by tunneling through the metal-modified-semiconductor interface layer

Device and circuit-level performance of carbon nanotube field-effect transistor with benchmarking against a nano-MOSFET.

Science.gov (United States)

Tan, Michael Loong Peng; Lentaris, Georgios; Amaratunga Aj, Gehan

2012-08-19

The performance of a semiconducting carbon nanotube (CNT) is assessed and tabulated for parameters against those of a metal-oxide-semiconductor field-effect transistor (MOSFET). Both CNT and MOSFET models considered agree well with the trends in the available experimental data. The results obtained show that nanotubes can significantly reduce the drain-induced barrier lowering effect and subthreshold swing in silicon channel replacement while sustaining smaller channel area at higher current density. Performance metrics of both devices such as current drive strength, current on-off ratio (Ion/Ioff), energy-delay product, and power-delay product for logic gates, namely NAND and NOR, are presented. Design rules used for carbon nanotube field-effect transistors (CNTFETs) are compatible with the 45-nm MOSFET technology. The parasitics associated with interconnects are also incorporated in the model. Interconnects can affect the propagation delay in a CNTFET. Smaller length interconnects result in higher cutoff frequency.

Effect of Water Vapor and Surface Morphology on the Low Temperature Response of Metal Oxide Semiconductor Gas Sensors

Directory of Open Access Journals (Sweden)

Konrad Maier

2015-09-01

Full Text Available In this work the low temperature response of metal oxide semiconductor gas sensors is analyzed. Important characteristics of this low-temperature response are a pronounced selectivity to acid- and base-forming gases and a large disparity of response and recovery time constants which often leads to an integrator-type of gas response. We show that this kind of sensor performance is related to the trend of semiconductor gas sensors to adsorb water vapor in multi-layer form and that this ability is sensitively influenced by the surface morphology. In particular we show that surface roughness in the nanometer range enhances desorption of water from multi-layer adsorbates, enabling them to respond more swiftly to changes in the ambient humidity. Further experiments reveal that reactive gases, such as NO2 and NH3, which are easily absorbed in the water adsorbate layers, are more easily exchanged across the liquid/air interface when the humidity in the ambient air is high.

Ambipolar Small-Molecule:Polymer Blend Semiconductors for Solution-Processable Organic Field-Effect Transistors.

Science.gov (United States)

Kang, Minji; Hwang, Hansu; Park, Won-Tae; Khim, Dongyoon; Yeo, Jun-Seok; Kim, Yunseul; Kim, Yeon-Ju; Noh, Yong-Young; Kim, Dong-Yu

2017-01-25

We report on the fabrication of an organic thin-film semiconductor formed using a blend solution of soluble ambipolar small molecules and an insulating polymer binder that exhibits vertical phase separation and uniform film formation. The semiconductor thin films are produced in a single step from a mixture containing a small molecular semiconductor, namely, quinoidal biselenophene (QBS), and a binder polymer, namely, poly(2-vinylnaphthalene) (PVN). Organic field-effect transistors (OFETs) based on QBS/PVN blend semiconductor are then assembled using top-gate/bottom-contact device configuration, which achieve almost four times higher mobility than the neat QBS semiconductor. Depth profile via secondary ion mass spectrometry and atomic force microscopy images indicate that the QBS domains in the films made from the blend are evenly distributed with a smooth morphology at the bottom of the PVN layer. Bias stress test and variable-temperature measurements on QBS-based OFETs reveal that the QBS/PVN blend semiconductor remarkably reduces the number of trap sites at the gate dielectric/semiconductor interface and the activation energy in the transistor channel. This work provides a one-step solution processing technique, which makes use of soluble ambipolar small molecules to form a thin-film semiconductor for application in high-performance OFETs.

Influence of the channel electric field distribution on the polarization Coulomb field scattering in AlGaN/AlN/GaN heterostructure field-effect transistors

Directory of Open Access Journals (Sweden)

Yingxia Yu

2013-09-01

Full Text Available Using the Quasi-Two-Dimensional (quasi-2D model, the current-voltage (I-V characteristics of AlGaN/AlN/GaN heterostructure field-effect transistors (HFETs with different gate length were simulated based on the measured capacitance-voltage (C-V characteristics and I-V characteristics. By analyzing the simulation results, we found that the different polarization charge distribution generated by the different channel electric field distribution can result in different polarization Coulomb field scattering, and the difference of the electron mobility mostly caused by the polarization Coulomb field scattering can reach up to 1829.9 cm2/V·s for the prepared AlGaN/AlN/GaN HFET. In addition, it was also found that when the two-dimension electron gas (2DEG sheet density is modulated by the drain-source bias, the electron mobility appears peak with the variation of the 2DEG sheet density, and the ratio of gate length to drain-source distance is smaller, the 2DEG sheet density corresponding to the peak point is higher.

Signatures of Quantized Energy States in Solution-Processed Ultrathin Layers of Metal-Oxide Semiconductors and Their Devices

KAUST Repository

Labram, John G.

2015-02-13

Physical phenomena such as energy quantization have to-date been overlooked in solution-processed inorganic semiconducting layers, owing to heterogeneity in layer thickness uniformity unlike some of their vacuum-deposited counterparts. Recent reports of the growth of uniform, ultrathin (<5 nm) metal-oxide semiconductors from solution, however, have potentially opened the door to such phenomena manifesting themselves. Here, a theoretical framework is developed for energy quantization in inorganic semiconductor layers with appreciable surface roughness, as compared to the mean layer thickness, and present experimental evidence of the existence of quantized energy states in spin-cast layers of zinc oxide (ZnO). As-grown ZnO layers are found to be remarkably continuous and uniform with controllable thicknesses in the range 2-24 nm and exhibit a characteristic widening of the energy bandgap with reducing thickness in agreement with theoretical predictions. Using sequentially spin-cast layers of ZnO as the bulk semiconductor and quantum well materials, and gallium oxide or organic self-assembled monolayers as the barrier materials, two terminal electronic devices are demonstrated, the current-voltage characteristics of which resemble closely those of double-barrier resonant-tunneling diodes. As-fabricated all-oxide/hybrid devices exhibit a characteristic negative-differential conductance region with peak-to-valley ratios in the range 2-7.

Analysis of the thickness-dependent electrical characteristics in pentacene field-effect devices

International Nuclear Information System (INIS)

Kim, Dongwook; Shin, Hyunji; Choi, Jongsun; Zhang, Xue; Park, Jiho; Baang, Sungkeun; Park, Jaehoon

2014-01-01

In this paper, we report on the important relationship among the capacitance-voltage (C - V) characteristics of metal-insulator-semiconductor (MIS) capacitors, the output currents of pentacene based organic field-effect transistors (OFETs), and the semiconductor layer's thickness. The effect of the semiconductor layer's thickness on the effective channel capacitance, when the MIS capacitors are fully accumulated with sufficient negative bias, was observed to be directly correlated with the magnitude of the saturated output current. The variation in accumulation capacitance of MIS capacitors due to changes in layer thickness is shown to indicate the existence of a channel capacitance. This determines the output currents in the saturation region. Furthermore, the accumulation capacitance appears to decrease notably when the thickness of the pentacene layer is reduced below 20 nm.

Analysis of the thickness-dependent electrical characteristics in pentacene field-effect devices

Energy Technology Data Exchange (ETDEWEB)

Kim, Dongwook; Shin, Hyunji; Choi, Jongsun [Hongik University, Seoul (Korea, Republic of); Zhang, Xue; Park, Jiho; Baang, Sungkeun; Park, Jaehoon [Hallym University, Chuncheon (Korea, Republic of)

2014-07-15

In this paper, we report on the important relationship among the capacitance-voltage (C - V) characteristics of metal-insulator-semiconductor (MIS) capacitors, the output currents of pentacene based organic field-effect transistors (OFETs), and the semiconductor layer's thickness. The effect of the semiconductor layer's thickness on the effective channel capacitance, when the MIS capacitors are fully accumulated with sufficient negative bias, was observed to be directly correlated with the magnitude of the saturated output current. The variation in accumulation capacitance of MIS capacitors due to changes in layer thickness is shown to indicate the existence of a channel capacitance. This determines the output currents in the saturation region. Furthermore, the accumulation capacitance appears to decrease notably when the thickness of the pentacene layer is reduced below 20 nm.

Feigenbaum scenario in the dynamics of a metal-oxide semiconductor heterostructure under harmonic perturbation. Golden mean criticality

International Nuclear Information System (INIS)

Cristescu, C.P.; Mereu, B.; Stan, Cristina; Agop, M.

2009-01-01

Experimental investigations and theoretical analysis on the dynamics of a metal-oxide semiconductor heterostructure used as nonlinear capacity in a series RLC electric circuit are presented. A harmonic voltage perturbation can induce various nonlinear behaviours, particularly evolution to chaos by period doubling and torus destabilization. In this work we focus on the change in dynamics induced by a sinusoidal driving with constant frequency and variable amplitude. Theoretical treatment based on the microscopic mechanisms involved led us to a dynamic system with a piecewise behaviour. Consequently, a model consisting of a nonlinear oscillator described by a piecewise second order ordinary differential equation is proposed. This kind of treatment is required by the asymmetry in the behaviour of the metal-oxide semiconductor with respect to the polarization of the perturbing voltage. The dynamics of the theoretical model is in good agreement with the experimental results. A connection with El Naschie's E-infinity space-time is established based on the interpretation of our experimental results as evidence of the importance of the golden mean criticality in the microscopic world.

Static characteristics and short channel effect in enhancement-mode AlN/GaN/AlN N-polar MISFET with self-aligned source/drain regions

International Nuclear Information System (INIS)

Li Bin; Wei Lan; Wen Cai

2014-01-01

This paper aims to simulate the I–V static characteristic of the enhancement-mode (E-mode) N-polar GaN metal—insulator—semiconductor field effect transistor (MISFET) with self-aligned source/drain regions. Firstly, with SILVACO TCAD device simulation, the drain—source current as a function of the gate—source voltage is calculated and the dependence of the drain—source current on the drain—source voltage in the case of different gate—source voltages for the device with a 0.62 μm gate length is investigated. Secondly, a comparison is made with the experimental report. Lastly, the transfer characteristic with different gate lengths and different buffer layers has been performed. The results show that the simulation is in accord with the experiment at the gate length of 0.62 μm and the short channel effect becomes pronounced as gate length decreases. The E-mode will not be held below a 100 nm gate length unless both transversal scaling and vertical scaling are being carried out simultaneously. (semiconductor devices)

Performance analysis of SOI MOSFET with rectangular recessed channel

International Nuclear Information System (INIS)

Singh, M; Mishra, G P; Mishra, S; Mohanty, S S

2016-01-01

In this paper a two dimensional (2D) rectangular recessed channel–silicon on insulator metal oxide semiconductor field effect transistor (RRC-SOI MOSFET), using the concept of groove between source and drain regions, which is one of the channel engineering technique to suppress the short channel effect (SCE). This suppression is mainly due to corner potential barrier of the groove and the simulation is carried out by using ATLAS 2D device simulator. To have further improvement of SCE in RRC-SOI MOSFET, three more devices are designed by using dual material gate (DMG) and gate dielectric technique, which results in formation of devices i.e. DMRRC-SOI,MLSMRRC-SOI, MLDMRRC-SOI MOSFET. The effect of different structures of RRC-SOI on AC and RF parameters are investigated and the importance of these devices over RRC MOSFET regarding short channel effect is analyzed. (paper)

Neutron and gamma irradiation effects on power semiconductor switches

Science.gov (United States)

Schwarze, G. E.; Frasca, A. J.

1990-01-01

The performance characteristics of high power semiconductor switches subjected to high levels of neutron fluence and gamma dose must be known by the designer of the power conditioning, control and transmission subsystem of space nuclear power systems. Location and the allowable shielding mass budget will determine the level of radiation tolerance required by the switches to meet performance and reliability requirements. Neutron and gamma ray interactions with semiconductor materials and how these interactions affect the electrical and switching characteristics of solid state power switches is discussed. The experimental measurement system and radiation facilities are described. Experimental data showing the effects of neutron and gamma irradiation on the performance characteristics are given for power-type NPN Bipolar Junction Transistors (BJTs), and Metal-Oxide-Semiconductor Field Effect Transistors (MOSFETs). BJTs show a rapid decrease in gain, blocking voltage, and storage time for neutron irradiation, and MOSFETs show a rapid decrease in the gate threshold voltage for gamma irradiation.

Metal-semiconductor interface in extreme temperature conditions

International Nuclear Information System (INIS)

Bulat, L.P.; Erofeeva, I.A.; Vorobiev, Yu.V.; Gonzalez-Hernandez, J.

2008-01-01

We present an investigation of electrons' and phonons' temperatures in the volume of a semiconductor (or metal) sample and at the interface between metal and semiconductor. Two types of mismatch between electrons' and phonons' temperatures take place: at metal-semiconductor interfaces and in the volume of the sample. The temperature mismatch leads to nonlinear terms in expressions for heat and electricity transport. The nonlinear effects should be taken into consideration in the study of electrical and heat transport in composites and in electronic chips

Electrical analysis of high dielectric constant insulator and metal gate metal oxide semiconductor capacitors on flexible bulk mono-crystalline silicon

KAUST Repository

Ghoneim, Mohamed T.

2015-06-01

We report on the electrical study of high dielectric constant insulator and metal gate metal oxide semiconductor capacitors (MOSCAPs) on a flexible ultra-thin (25 μm) silicon fabric which is peeled off using a CMOS compatible process from a standard bulk mono-crystalline silicon substrate. A lifetime projection is extracted using statistical analysis of the ramping voltage (Vramp) breakdown and time dependent dielectric breakdown data. The obtained flexible MOSCAPs operational voltages satisfying the 10 years lifetime benchmark are compared to those of the control MOSCAPs, which are not peeled off from the silicon wafer. © 2014 IEEE.

Highly stable and imperceptible electronics utilizing photoactivated heterogeneous sol-gel metal-oxide dielectrics and semiconductors.

Science.gov (United States)

Jo, Jeong-Wan; Kim, Jaekyun; Kim, Kyung-Tae; Kang, Jin-Gu; Kim, Myung-Gil; Kim, Kwang-Ho; Ko, Hyungduk; Kim, Jiwan; Kim, Yong-Hoon; Park, Sung Kyu

2015-02-18

Incorporation of Zr into an AlOx matrix generates an intrinsically activated ZAO surface enabling the formation of a stable semiconducting IGZO film and good interfacial properties. Photochemically annealed metal-oxide devices and circuits with the optimized sol-gel ZAO dielectric and IGZO semiconductor layers demonstrate the high performance and electrically/mechanically stable operation of flexible electronics fabricated via a low-temperature solution process. © 2015 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Metal-insulator-semiconductor photodetectors.

Science.gov (United States)

Lin, Chu-Hsuan; Liu, Chee Wee

2010-01-01

The major radiation of the sun can be roughly divided into three regions: ultraviolet, visible, and infrared light. Detection in these three regions is important to human beings. The metal-insulator-semiconductor photodetector, with a simpler process than the pn-junction photodetector and a lower dark current than the MSM photodetector, has been developed for light detection in these three regions. Ideal UV photodetectors with high UV-to-visible rejection ratio could be demonstrated with III-V metal-insulator-semiconductor UV photodetectors. The visible-light detection and near-infrared optical communications have been implemented with Si and Ge metal-insulator-semiconductor photodetectors. For mid- and long-wavelength infrared detection, metal-insulator-semiconductor SiGe/Si quantum dot infrared photodetectors have been developed, and the detection spectrum covers atmospheric transmission windows.

Metal-Insulator-Semiconductor Photodetectors

Directory of Open Access Journals (Sweden)

Chu-Hsuan Lin

2010-09-01

Full Text Available The major radiation of the Sun can be roughly divided into three regions: ultraviolet, visible, and infrared light. Detection in these three regions is important to human beings. The metal-insulator-semiconductor photodetector, with a simpler process than the pn-junction photodetector and a lower dark current than the MSM photodetector, has been developed for light detection in these three regions. Ideal UV photodetectors with high UV-to-visible rejection ratio could be demonstrated with III-V metal-insulator-semiconductor UV photodetectors. The visible-light detection and near-infrared optical communications have been implemented with Si and Ge metal-insulator-semiconductor photodetectors. For mid- and long-wavelength infrared detection, metal-insulator-semiconductor SiGe/Si quantum dot infrared photodetectors have been developed, and the detection spectrum covers atmospheric transmission windows.

Fluorinated copper-phthalocyanine-based n-type organic field-effect transistors with a polycarbonate gate insulator

International Nuclear Information System (INIS)

Sethuraman, Kunjithapatham; Kumar, Palanisamy; Santhakumar, Kannappan; Ochiai, Shizuyasu; Shin, Paikkyun

2012-01-01

Fluorinated copper-phthalocyanine (F 16 CuPc) thin films were prepared by using a vacuum evaporation technique and were applied to n-type organic field-effect transistors (OFETs) as active channel layers combined with a spin-coated polycarbonate thin-film gate insulator. The output characteristics of the resulting n-type OFET devices with bottom-gate/bottom-contact structures were investigated to evaluate the performances such as the field effect mobility (μ FE ), the on/off current ratio (I on/off ), and the threshold voltage (V th ). A relatively high field effect mobility of 6.0 x 10 -3 cm 2 /Vs was obtained for the n-type semiconductor under atmospheric conditions with an on/off current ratio of 1 x 10 4 and a threshold voltage of 5 V. The electron mobility of the n-type semiconductor was found to depend strongly on the growth temperature of the F 16 CuPc thin films. X-ray diffraction profiles showed that the crystallinity and the orientation of the F 16 CuPc on a polycarbonate thin film were enhanced with increasing growth temperature. Atomic force microscopy studies revealed various surface morphologies of the active layer. The field effect mobility of the F 16 CuPc-OFET was closely related to the crystallinity and the orientation of the F 16 CuPc thin film.

High performance high-κ/metal gate complementary metal oxide semiconductor circuit element on flexible silicon

KAUST Repository

Sevilla, Galo T.

2016-02-29

Thinned silicon based complementary metal oxide semiconductor(CMOS)electronics can be physically flexible. To overcome challenges of limited thinning and damaging of devices originated from back grinding process, we show sequential reactive ion etching of silicon with the assistance from soft polymeric materials to efficiently achieve thinned (40 μm) and flexible (1.5 cm bending radius) silicon based functional CMOSinverters with high-κ/metal gate transistors. Notable advances through this study shows large area of silicon thinning with pre-fabricated high performance elements with ultra-large-scale-integration density (using 90 nm node technology) and then dicing of such large and thinned (seemingly fragile) pieces into smaller pieces using excimer laser. The impact of various mechanical bending and bending cycles show undeterred high performance of flexible siliconCMOSinverters. Future work will include transfer of diced silicon chips to destination site, interconnects, and packaging to obtain fully flexible electronic systems in CMOS compatible way.

Analysis of gate underlap channel double gate MOS transistor for electrical detection of bio-molecules

Science.gov (United States)

Ajay; Narang, Rakhi; Saxena, Manoj; Gupta, Mridula

2015-12-01

In this paper, an analytical model for gate drain underlap channel Double-Gate Metal-Oxide-Semiconductor Field-Effect Transistor (DG-MOSFET) for label free electrical detection of biomolecules has been proposed. The conformal mapping technique has been used to derive the expressions for surface potential, lateral electric field, energy bands (i.e. conduction and valence band) and threshold voltage (Vth). Subsequently a full drain current model to analyze the sensitivity of the biosensor has been developed. The shift in the threshold voltage and drain current (after the biomolecules interaction with the gate underlap channel region of the MOS transistor) has been used as a sensing metric. All the characteristic trends have been verified through ATLAS (SILVACO) device simulation results.

Effects of Y incorporation in TaON gate dielectric on electrical performance of GaAs metal-oxide-semiconductor capacitor

Energy Technology Data Exchange (ETDEWEB)

Liu, Li Ning; Choi, Hoi Wai; Lai, Pui To [Department of Electrical and Electronic Engineering, The University of Hong Kong (China); Xu, Jing Ping [School of Optical and Electronic Information, Huazhong University of Science and Technology, Wuhan (China)

2016-09-15

In this study, GaAs metal-oxide-semiconductor (MOS) capacitors using Y-incorporated TaON as gate dielectric have been investigated. Experimental results show that the sample with a Y/(Y + Ta) atomic ratio of 27.6% exhibits the best device characteristics: high k value (22.9), low interfacestate density (9.0 x 10{sup 11} cm{sup -2} eV{sup -1}), small flatband voltage (1.05 V), small frequency dispersion and low gate leakage current (1.3 x 10{sup -5}A/cm{sup 2} at V{sub fb} + 1 V). These merits should be attributed to the complementary properties of Y{sub 2}O{sub 3} and Ta{sub 2}O{sub 5}:Y can effectively passivate the large amount of oxygen vacancies in Ta{sub 2}O{sub 5}, while the positively-charged oxygen vacancies in Ta{sub 2}O{sub 5} are capable of neutralizing the effects of the negative oxide charges in Y{sub 2}O{sub 3}. This work demonstrates that an appropriate doping of Y content in TaON gate dielectric can effectively improve the electrical performance for GaAs MOS devices. (copyright 2016 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim)

Design and Analysis of CMOS-Compatible III-V Compound Electron-Hole Bilayer Tunneling Field-Effect Transistor for Ultra-Low-Power Applications.

Science.gov (United States)

Kim, Sung Yoon; Seo, Jae Hwa; Yoon, Young Jun; Lee, Ho-Young; Lee, Seong Min; Cho, Seongjae; Kang, In Man

2015-10-01

In this work, we design and analyze complementary metal-oxide-semiconductor (CMOS)-compatible III-V compound electron-hole bilayer (EHB) tunneling field-effect transistors (TFETs) by using two-dimensional (2D) technology computer-aided design (TCAD) simulations. A recently proposed EHB TFET exploits a bias-induced band-to-band tunneling (BTBT) across the electron-hole bilayer by an electric field from the top and bottom gates. This is in contrast to conventional planar p(+)-p(-)-n TFETs, which utilize BTBT across the source-to-channel junction. We applied III-V compound semiconductor materials to the EHB TFETs in order to enhance the current drivability and switching performance. Devices based on various compound semiconductor materials have been designed and analyzed in terms of their primary DC characteristics. In addition, the operational principles were validated by close examination of the electron concentrations and energy-band diagrams under various operation conditions. The simulation results of the optimally designed In0.533Ga0.47As EHB TFET show outstanding performance, with an on-state current (Ion) of 249.5 μA/μm, subthreshold swing (S) of 11.4 mV/dec, and threshold voltage (Vth) of 50 mV at VDS = 0.5 V. Based on the DC-optimized InGaAs EHB TFET, the CMOS inverter circuit was simulated in views of static and dynamic behaviors of the p-channel device with exchanges between top and bottom gates or between source and drain electrodes maintaining the device structure.

In0.15Ga0.85N visible-light metal-semiconductor-metal photodetector with GaN interlayers deposited by pulsed NH3

Science.gov (United States)

Wang, Hongxia; Zhang, Xiaohan; Wang, Hailong; Lv, Zesheng; Li, Yongxian; Li, Bin; Yan, Huan; Qiu, Xinjia; Jiang, Hao

2018-05-01

InGaN visible-light metal-semiconductor-metal photodetectors with GaN interlayers deposited by pulsed NH3 were fabricated and characterized. By periodically inserting the GaN thin interlayers, the surface morphology of InGaN active layer is improved and the phase separation is suppressed. At 5 V bias, the dark current reduced from 7.0 × 10-11 A to 7.0 × 10-13 A by inserting the interlayers. A peak responsivity of 85.0 mA/W was measured at 420 nm and 5 V bias, corresponding to an external quantum efficiency of 25.1%. The insertion of GaN interlayers also lead to a sharper spectral response cutoff.

Neutron, gamma ray and post-irradiation thermal annealing effects on power semiconductor switches

Science.gov (United States)

Schwarze, G. E.; Frasca, A. J.

1991-01-01

The effects of neutron and gamma rays on the electrical and switching characteristics of power semiconductor switches must be known and understood by the designer of the power conditioning, control, and transmission subsystem of space nuclear power systems. The SP-100 radiation requirements at 25 m from the nuclear source are a neutron fluence of 10(exp 13) n/sq cm and a gamma dose of 0.5 Mrads. Experimental data showing the effects of neutrons and gamma rays on the performance characteristics of power-type NPN Bipolar Junction Transistors (BJTs), Metal-Oxide-Semiconductor Field Effect Transistors (MOSFETs), and Static Induction Transistors (SITs) are presented. These three types of devices were tested at radiation levels which met or exceeded the SP-100 requirements. For the SP-100 radiation requirements, the BJTs were found to be most sensitive to neutrons, the MOSFETs were most sensitive to gamma rays, and the SITs were only slightly sensitive to neutrons. Post-irradiation thermal anneals at 300 K and up to 425 K were done on these devices and the effectiveness of these anneals are also discussed.

Hall effect mobility for SiC MOSFETs with increasing dose of nitrogen implantation into channel region

Science.gov (United States)

Noguchi, Munetaka; Iwamatsu, Toshiaki; Amishiro, Hiroyuki; Watanabe, Hiroshi; Kita, Koji; Yamakawa, Satoshi

2018-04-01

The Hall effect mobility (μHall) of the Si-face 4H-SiC metal–oxide–semiconductor field effect transistor (MOSFET) with a nitrogen (N)-implanted channel region was investigated by increasing the N dose. The μHall in the channel region was systematically examined regarding channel structures, that is, the surface and buried channels. It was experimentally demonstrated that increasing the N dose results in an improvement in μHall in the channel region due to the formation of the buried channel. However, further increase in N dose was found to decrease the μHall in the channel region, owing to the decrease in the electron mobility in the N-implanted bulk region.

AlGaN/GaN metal-insulator-semiconductor high electron mobility transistors with reduced leakage current and enhanced breakdown voltage using aluminum ion implantation

Energy Technology Data Exchange (ETDEWEB)

Sun, Shichuang [Wuhan National Laboratory for Optoelectronics, Huazhong University of Science and Technology, Wuhan 430074 (China); Key Laboratory of Nanodevices and Applications, Suzhou Institute of Nano-Tech and Nano-Bionics, CAS, Suzhou 215123 (China); Fu, Kai, E-mail: kfu2009@sinano.ac.cn, E-mail: cqchen@mail.hust.edu.cn; Yu, Guohao; Zhang, Zhili; Song, Liang; Deng, Xuguang; Li, Shuiming; Sun, Qian; Cai, Yong; Zhang, Baoshun [Key Laboratory of Nanodevices and Applications, Suzhou Institute of Nano-Tech and Nano-Bionics, CAS, Suzhou 215123 (China); Qi, Zhiqiang; Dai, Jiangnan; Chen, Changqing, E-mail: kfu2009@sinano.ac.cn, E-mail: cqchen@mail.hust.edu.cn [Wuhan National Laboratory for Optoelectronics, Huazhong University of Science and Technology, Wuhan 430074 (China)

2016-01-04

This letter has studied the performance of AlGaN/GaN metal-insulator-semiconductor high electron mobility transistors on silicon substrate with GaN buffer treated by aluminum ion implantation for insulating followed by a channel regrown by metal–organic chemical vapor deposition. For samples with Al ion implantation of multiple energies of 140 keV (dose: 1.4 × 10{sup 14} cm{sup −2}) and 90 keV (dose: 1 × 10{sup 14} cm{sup −2}), the OFF-state leakage current is decreased by more than 3 orders and the breakdown voltage is enhanced by nearly 6 times compared to the samples without Al ion implantation. Besides, little degradation of electrical properties of the 2D electron gas channel is observed where the maximum drain current I{sub DSmax} at a gate voltage of 3 V was 701 mA/mm and the maximum transconductance g{sub mmax} was 83 mS/mm.

Memory characteristics of an MOS capacitor structure with double-layer semiconductor and metal heterogeneous nanocrystals

International Nuclear Information System (INIS)

Ni Henan; Wu Liangcai; Song Zhitang; Hui Chun

2009-01-01

An MOS (metal oxide semiconductor) capacitor structure with double-layer heterogeneous nanocrystals consisting of semiconductor and metal embedded in a gate oxide for nonvolatile memory applications has been fabricated and characterized. By combining vacuum electron-beam co-evaporated Si nanocrystals and self-assembled Ni nanocrystals in a SiO 2 matrix, an MOS capacitor with double-layer heterogeneous nanocrystals can have larger charge storage capacity and improved retention characteristics compared to one with single-layer nanocrystals. The upper metal nanocrystals as an additional charge trap layer enable the direct tunneling mechanism to enhance the flat voltage shift and prolong the retention time. (semiconductor devices)

Assembly of phosphonic acids on GaN and AlGaN

Energy Technology Data Exchange (ETDEWEB)

Simpkins, B S; Stine, R; Theodore, N D; Pehrsson, P E [Chemistry Division, Naval Research Laboratory, Washington DC (United States); Hong, S [Thomas Jefferson High School, McClean, VA (United States); Maekinen, A J [Optical Sciences Division, Naval Research Laboratory, Washington, DC (United States); Mastro, M A; Eddy, C R Jr [Electronics Science and Technology Division, Naval Research Laboratory, Washington, DC (United States)

2010-01-13

Self-assembled monolayers of octadecylphosphonic acid and 16-phosphonohexadecanoic acid (PHDA) were formed on the semiconductor substrates gallium nitride (GaN) and aluminium gallium nitride (AlGaN). The presence of the molecular layers was verified through x-ray photoelectron spectroscopy and ultraviolet photoelectron spectroscopy. Structural information was acquired with infrared spectroscopy which verified the bonding orientation of the carboxyl-containing PHDA. The impact of the molecular layers on the channel conductivity and the surface electronic structure of an AlGaN/GaN heterostructure was measured. Our results indicate that pinning of the surface Fermi level prohibits modification of the channel conductivity by the layer. However, a surface dipole of {approx}0.8 eV is present and associated with both phosphonic acid layers. These results are of direct relevance to field-effect-based biochemical sensors and metal-semiconductor contact formation for this system and provide a fundamental basis for further applications of GaN and AlGaN technology in the fields of biosensing and microelectronics.

Lattice Location of Radioactive Probes in Semiconductors and Metals by Electron and Positron Channelling

CERN Multimedia

2002-01-01

The channelling effect of decay-electrons and positrons is used for the localization of radioactive impurities implanted into single crystals. Because of the low implantation doses and the variety of different isotopes available at ISOLDE, this technique is especially suited for applications in semiconducting materials. \\\\ \\\\ Channelling measurements in Si, GaAs and GaP implanted with In-, Cd- and Xe-isotopes have demonstrated that impurity lattice sites can be studied directly after implantation without any annealing. The electron-channelling technique can be ideally combined with hyperfine interaction techniques like Moessbauer s This was shown for the formation of In-vacancy complexes in ion-implanted Ni. \\\\ \\\\ We intend to continue the lattice location measurements in semiconductors implanted with various radioactive impurities of Cd, In, Sn, Sb and Te.

Size-dependent nonlocal effects in plasmonic semiconductor particles

DEFF Research Database (Denmark)

Maack, Johan Rosenkrantz; Mortensen, N. Asger; Wubs, Martijn

2017-01-01

Localized surface plasmons (LSP) in semiconductor particles are expected to exhibit spatial nonlocal response effects as the geometry enters the nanometer scale. To investigate these nonlocal effects, we apply the hydrodynamic model to nanospheres of two different semiconductor materials: intrinsic...... InSb and n-doped GaAs. Our results show that the semiconductors indeed display nonlocal effects, and that these effects are even more pronounced than in metals. In a 150 nm InSb particle at 300 K, the LSP frequency is blueshifted 35%, which is orders of magnitude larger than the blueshift in a metal...... particle of the same size. This property, together with their tunability, makes semiconductors a promising platform for experiments in nonlocal effects. Copyright (C)EPLA, 2017...

Study of SiO2-Si and metal-oxide-semiconductor structures using positrons

Science.gov (United States)

Leung, T. C.; Asoka-Kumar, P.; Nielsen, B.; Lynn, K. G.

1993-01-01

Studies of SiO2-Si and metal-oxide-semiconductor (MOS) structures using positrons are summarized and a concise picture of the present understanding of positrons in these systems is provided. Positron annihilation line-shape S data are presented as a function of the positron incident energy, gate voltage, and annealing, and are described with a diffusion-annihilation equation for positrons. The data are compared with electrical measurements. Distinct annihilation characteristics were observed at the SiO2-Si interface and have been studied as a function of bias voltage and annealing conditions. The shift of the centroid (peak) of γ-ray energy distributions in the depletion region of the MOS structures was studied as a function of positron energy and gate voltage, and the shifts are explained by the corresponding variations in the strength of the electric field and thickness of the depletion layer. The potential role of the positron annihilation technique as a noncontact, nondestructive, and depth-sensitive characterization tool for the technologically important, deeply buried interface is shown.

Study of SiO2-Si and metal-oxide-semiconductor structures using positrons

International Nuclear Information System (INIS)

Leung, T.C.; Asoka-Kumar, P.; Nielsen, B.; Lynn, K.G.

1993-01-01

Studies of SiO 2 -Si and metal-oxide-semiconductor (MOS) structures using positrons are summarized and a concise picture of the present understanding of positrons in these systems is provided. Positron annihilation line-shape S data are presented as a function of the positron incident energy, gate voltage, and annealing, and are described with a diffusion-annihilation equation for positrons. The data are compared with electrical measurements. Distinct annihilation characteristics were observed at the SiO 2 -Si interface and have been studied as a function of bias voltage and annealing conditions. The shift of the centroid (peak) of γ-ray energy distributions in the depletion region of the MOS structures was studied as a function of positron energy and gate voltage, and the shifts are explained by the corresponding variations in the strength of the electric field and thickness of the depletion layer. The potential role of the positron annihilation technique as a noncontact, nondestructive, and depth-sensitive characterization tool for the technologically important, deeply buried interface is shown

AlGaN/GaN double-channel HEMT

International Nuclear Information System (INIS)

Quan Si; Hao Yue; Ma Xiaohua; Zheng Pengtian; Xie Yuanbin

2010-01-01

The fabrication of AlGaN/GaN double-channel high electron mobility transistors on sapphire substrates is reported. Two carrier channels are formed in an AlGaN/GaN/AlGaN/GaN multilayer structure. The DC performance of the resulting double-channel HEMT shows a wider high transconductance region compared with single-channel HEMT. Simulations provide an explanation for the influence of the double-channel on the high transconductance region. The buffer trap is suggested to be related to the wide region of high transconductance. The RF characteristics are also studied. (semiconductor devices)

Enhanced electrical properties of oxide semiconductor thin-film transistors with high conductivity thin layer insertion for the channel region

Energy Technology Data Exchange (ETDEWEB)

Nguyen, Cam Phu Thi; Raja, Jayapal; Kim, Sunbo; Jang, Kyungsoo; Le, Anh Huy Tuan; Lee, Youn-Jung; Yi, Junsin, E-mail: junsin@skku.edu

2017-02-28

Highlights: • The characteristics of thin film transistors using double active layers are examined. • Electrical characteristics have been improved for the double active layers devices. • The total trap density can be decreased by insert-ion of ultrathin ITO film. - Abstract: This study examined the performance and the stability of indium tin zinc oxide (ITZO) thin film transistors (TFTs) by inserting an ultra-thin indium tin oxide (ITO) layer at the active/insulator interface. The electrical properties of the double channel device (ITO thickness of 5 nm) were improved in comparison with the single channel ITZO or ITO devices. The TFT characteristics of the device with an ITO thickness of less than 5 nm were degraded due to the formation of an island-like morphology and the carriers scattering at the active/insulator interface. The 5 nm-thick ITO inserted ITZO TFTs (optimal condition) exhibited a superior field effect mobility (∼95 cm{sup 2}/V·s) compared with the ITZO-only TFTs (∼34 cm{sup 2}/V·s). The best characteristics of the TFT devices with double channel layer are due to the lowest surface roughness (0.14 nm) and contact angle (50.1°) that result in the highest hydrophicility, and the most effective adhesion at the surface. Furthermore, the threshold voltage shifts for the ITO/ITZO double layer device decreased to 0.80 and −2.39 V compared with 6.10 and −6.79 V (for the ITZO only device) under positive and negative bias stress, respectively. The falling rates of E{sub A} were 0.38 eV/V and 0.54 eV/V for the ITZO and ITO/ITZO bi-layer devices, respectively. The faster falling rate of the double channel devices suggests that the trap density, including interface trap and semiconductor bulk trap, can be decreased by the ion insertion of a very thin ITO film into the ITZO/SiO{sub 2} reference device. These results demonstrate that the double active layer TFT can potentially be applied to the flat panel display.

Fabrication and operation methods of a one-time programmable (OTP) nonvolatile memory (NVM) based on a metal-oxide-semiconductor structure

International Nuclear Information System (INIS)

Cho, Seongjae; Lee, Junghoon; Jung, Sunghun; Park, Sehwan; Park, Byunggook

2011-01-01

In this paper, a novel one-time programmable (OTP) nonvolatile memory (NVM) device and its array based on a metal-insulator-semiconductor (MIS) structure is proposed. The Iindividual memory device has a vertical channel of a silicon diode. Historically, OTP memories were widely used for read-only-memories (ROMs), in which the most basic system architecture model was to store central processing unit (CPU) instructions. By grafting the nanoscale fabrication technology and novel structuring onto the concept of the OTP memory, innovative high-density NVM appliances for mobile storage media may be possible. The program operation is performed by breaking down the thin oxide layer between the pn diode structure and the wordline (WL). The programmed state can be identified by an operation that reads the leakage currents through the broken oxide. Since the proposed OTP NVM is based on neither a transistor structure nor a charge storing mechanism, it is highly reliable and functional for realizing the ultra-large scale integration. The operation physics and the fabrication processes are also explained in detail.

Metal mobilisation in hydrothermal sediments at the TAG Hydrothermal Field (MAR, 26°N)

Science.gov (United States)

Dutrieux, A. M.; Lichtschlag, A.; Martins, S.; Barriga, F. J.; Petersen, S.; Murton, B. J.

2017-12-01

Metalliferous sediments in the vicinity of hydrothermal systems are enriched in base metals, but few studies have addressed their potential as mineral resources. These metalliferous sediments have been accumulated by different processes and reflect modifications of the primary mineral deposits by: oxidation of the chimney materials, in situ precipitation of low-temperature minerals and mass wasting. To understand the post-formation processes in metalliferous sediments, we investigated sub-seafloor metal mobilisation in different geological environments. This presentation focuses on the TAG Hydrothermal Field (Mid-Atlantic Ridge, 26°N) and explores sediment and pore water compositions using ICP-MS and ICP-OES. We use reactive transport modelling to interpret the degree of metal remobilisation and to identify the most important geochemical reactions in the different sediments. The pore water concentrations measured in sediments above inactive sulphide mounds present constant major elements composition that indicates this environment is dominated by complete exchange with seawater. The sediments, that are mainly composed of hematite and goethite formed during the oxidation of sulphides, have low Cu concentrations (sediments and capped by more recent sediment slumping. In the depositionary channels, pore waters show metal concentrations affected by diagenesis and redox-sensitive metals are released at depth (e.g. Mn2+ and Cu2+). The leaching of the primary sulphides (e.g. deprecated grains of chalcopyrite), and metal mobilisation lead to an enrichment of Cu and Zn at shallower depth. Here, some stratigraphic horizons scavenge metallic cations back into solid phases and form Mn-oxide crusts between 30 and 60 cm, in which Cu concentrations also increase. Our results demonstrate that metal mobilisation differs depending on the geological environment and their related accumulation processes, causing the absence of Cu on the top of inactive hydrothermal mounds but enriched

Organic-inorganic hybrid materials as semiconducting channels in thin-film field-effect transistors

Science.gov (United States)

Kagan; Mitzi; Dimitrakopoulos

1999-10-29

Organic-inorganic hybrid materials promise both the superior carrier mobility of inorganic semiconductors and the processability of organic materials. A thin-film field-effect transistor having an organic-inorganic hybrid material as the semiconducting channel was demonstrated. Hybrids based on the perovskite structure crystallize from solution to form oriented molecular-scale composites of alternating organic and inorganic sheets. Spin-coated thin films of the semiconducting perovskite (C(6)H(5)C(2)H(4)NH(3))(2)SnI(4) form the conducting channel, with field-effect mobilities of 0.6 square centimeters per volt-second and current modulation greater than 10(4). Molecular engineering of the organic and inorganic components of the hybrids is expected to further improve device performance for low-cost thin-film transistors.

Near-field effects and energy transfer in hybrid metal-oxide nanostructures.

Science.gov (United States)

Herr, Ulrich; Kuerbanjiang, Balati; Benel, Cahit; Papageorgiou, Giorgos; Goncalves, Manuel; Boneberg, Johannes; Leiderer, Paul; Ziemann, Paul; Marek, Peter; Hahn, Horst

2013-01-01

One of the big challenges of the 21st century is the utilization of nanotechnology for energy technology. Nanoscale structures may provide novel functionality, which has been demonstrated most convincingly by successful applications such as dye-sensitized solar cells introduced by M. Grätzel. Applications in energy technology are based on the transfer and conversion of energy. Following the example of photosynthesis, this requires a combination of light harvesting, transfer of energy to a reaction center, and conversion to other forms of energy by charge separation and transfer. This may be achieved by utilizing hybrid nanostructures, which combine metallic and nonmetallic components. Metallic nanostructures can interact strongly with light. Plasmonic excitations of such structures can cause local enhancement of the electrical field, which has been utilized in spectroscopy for many years. On the other hand, the excited states in metallic structures decay over very short lifetimes. Longer lifetimes of excited states occur in nonmetallic nanostructures, which makes them attractive for further energy transfer before recombination or relaxation sets in. Therefore, the combination of metallic nanostructures with nonmetallic materials is of great interest. We report investigations of hybrid nanostructured model systems that consist of a combination of metallic nanoantennas (fabricated by nanosphere lithography, NSL) and oxide nanoparticles. The oxide particles were doped with rare-earth (RE) ions, which show a large shift between absorption and emission wavelengths, allowing us to investigate the energy-transfer processes in detail. The main focus is on TiO2 nanoparticles doped with Eu(3+), since the material is interesting for applications such as the generation of hydrogen by photocatalytic splitting of water molecules. We use high-resolution techniques such as confocal fluorescence microscopy for the investigation of energy-transfer processes. The experiments are

Potential of carbon nanotube field effect transistors for analogue circuits

KAUST Repository

Hayat, Khizar; Cheema, Hammad; Shamim, Atif

2013-01-01

This Letter presents a detailed comparison of carbon nanotube field effect transistors (CNFETs) and metal oxide semiconductor field effect transistors (MOSFETs) with special focus on carbon nanotube FET's potential for implementing analogue circuits in the mm-wave and sub-terahertz range. The latest CNFET lithographic dimensions place it at-par with complementary metal oxide semiconductor in terms of current handling capability, whereas the forecasted improvement in the lithography enables the CNFETs to handle more than twice the current of MOSFETs. The comparison of RF parameters shows superior performance of CNFETs with a g m , f T and f max of 2.7, 2.6 and 4.5 times higher, respectively. MOSFET- and CNFET-based inverter, three-stage ring oscillator and LC oscillator have been designed and compared as well. The CNFET-based inverters are found to be ten times faster, the ring oscillator demonstrates three times higher oscillation frequency and CNFET-based LC oscillator also shows improved performance than its MOSFET counterpart.

Potential of carbon nanotube field effect transistors for analogue circuits

KAUST Repository

Hayat, Khizar

2013-05-11

This Letter presents a detailed comparison of carbon nanotube field effect transistors (CNFETs) and metal oxide semiconductor field effect transistors (MOSFETs) with special focus on carbon nanotube FET\\'s potential for implementing analogue circuits in the mm-wave and sub-terahertz range. The latest CNFET lithographic dimensions place it at-par with complementary metal oxide semiconductor in terms of current handling capability, whereas the forecasted improvement in the lithography enables the CNFETs to handle more than twice the current of MOSFETs. The comparison of RF parameters shows superior performance of CNFETs with a g m , f T and f max of 2.7, 2.6 and 4.5 times higher, respectively. MOSFET- and CNFET-based inverter, three-stage ring oscillator and LC oscillator have been designed and compared as well. The CNFET-based inverters are found to be ten times faster, the ring oscillator demonstrates three times higher oscillation frequency and CNFET-based LC oscillator also shows improved performance than its MOSFET counterpart.

Interface Trap Profiles in 4H- and 6H-SiC MOS Capacitors with Nitrogen- and Phosphorus-Doped Gate Oxides

Science.gov (United States)

Jiao, C.; Ahyi, A. C.; Dhar, S.; Morisette, D.; Myers-Ward, R.

2017-04-01

We report results on the interface trap density ( D it) of 4H- and 6H-SiC metal-oxide-semiconductor (MOS) capacitors with different interface chemistries. In addition to pure dry oxidation, we studied interfaces formed by annealing thermal oxides in NO or POCl3. The D it profiles, determined by the C- ψ s method, show that, although the as-oxidized 4H-SiC/SiO2 interface has a much higher D it profile than 6H-SiC/SiO2, after postoxidation annealing (POA), both polytypes maintain comparable D it near the conduction band edge for the gate oxides incorporated with nitrogen or phosphorus. Unlike most conventional C- V- or G- ω-based methods, the C- ψ s method is not limited by the maximum probe frequency, therefore taking into account the "fast traps" detected in previous work on 4H-SiC. The results indicate that such fast traps exist near the band edge of 6H-SiC also. For both polytypes, we show that the total interface trap density ( N it) integrated from the C- ψ s method is several times that obtained from the high-low method. The results suggest that the detected fast traps have a detrimental effect on electron transport in metal-oxide-semiconductor field-effect transistor (MOSFET) channels.

Exploring SiSn as a performance enhancing semiconductor: A theoretical and experimental approach

KAUST Repository

Hussain, Aftab M.

2014-12-14

We present a novel semiconducting alloy, silicon-tin (SiSn), as channel material for complementary metal oxide semiconductor (CMOS) circuit applications. The material has been studied theoretically using first principles analysis as well as experimentally by fabricating MOSFETs. Our study suggests that the alloy offers interesting possibilities in the realm of silicon band gap tuning. We have explored diffusion of tin (Sn) into the industry\\'s most widely used substrate, silicon (100), as it is the most cost effective, scalable and CMOS compatible way of obtaining SiSn. Our theoretical model predicts a higher mobility for p-channel SiSn MOSFETs, due to a lower effective mass of the holes, which has been experimentally validated using the fabricated MOSFETs. We report an increase of 13.6% in the average field effect hole mobility for SiSn devices compared to silicon control devices.

Comparative analysis of oxide phase formation and its effects on electrical properties of SiO{sub 2}/InSb metal-oxide-semiconductor structures

Energy Technology Data Exchange (ETDEWEB)

Lee, Jaeyel [Department of Materials Science and Engineering, Seoul National University, Seoul 151-744 (Korea, Republic of); Park, Sehun [Department of Materials Science and Engineering, Seoul National University, Seoul 151-744 (Korea, Republic of); WCU Hybrid Materials Program, Department of Materials Science and Engineering, Seoul National University, Seoul 151-744 (Korea, Republic of); Kim, Jungsub; Yang, Changjae; Kim, Sujin; Seok, Chulkyun [Department of Materials Science and Engineering, Seoul National University, Seoul 151-744 (Korea, Republic of); Park, Jinsub [Department of Electronic Engineering, Hanyang University, Seoul 133-791 (Korea, Republic of); Yoon, Euijoon, E-mail: eyoon@snu.ac.kr [Department of Materials Science and Engineering, Seoul National University, Seoul 151-744 (Korea, Republic of); WCU Hybrid Materials Program, Department of Materials Science and Engineering, Seoul National University, Seoul 151-744 (Korea, Republic of); Department of Nano Science and Technology, Graduate School of Convergence Science and Technology, Seoul National University, Suwon 443-270 (Korea, Republic of); Energy Semiconductor Research Center, Advanced Institutes of Convergence Technology, Seoul National University, Suwon 443-270 (Korea, Republic of)

2012-06-01

We report on the changes in the interfacial phases between SiO{sub 2} and InSb caused by various deposition temperatures and heat treatments. X-ray photoelectron spectroscopy (XPS) and Raman spectroscopy were used to evaluate the relative amount of each phase present at the interface. The effect of interfacial phases on the electrical properties of SiO{sub 2}/InSb metal-oxide-semiconductor (MOS) structures was investigated by capacitance-voltage (C-V) measurements. The amount of both In and Sb oxides increased with the deposition temperature. The amount of interfacial In oxide was larger for all samples, regardless of the deposition and annealing temperatures and times. In particular, the annealed samples contained less than half the amount of Sb oxide compared with the as-deposited samples, indicating a strong interfacial reaction between Sb oxide and the InSb substrate during annealing. The interface trap density sharply increased for deposition temperatures above 240 Degree-Sign C. The C-V measurements and Raman spectroscopy indicated that elemental Sb accumulation due to the interfacial reaction of Sb oxide with InSb substrate was responsible for the increased interfacial trap densities in these SiO{sub 2}/InSb MOS structures. - Highlights: Black-Right-Pointing-Pointer We report the quantitative analysis of interfacial oxides at the SiO{sub 2}/InSb interface. Black-Right-Pointing-Pointer Interfacial oxides were measured quantitatively by X-ray Photoelectron Spectroscopy. Black-Right-Pointing-Pointer As-grown and annealed samples showed different compositions of oxide phases. Black-Right-Pointing-Pointer Considerable reduction of antimony oxide phases was observed during annealing. Black-Right-Pointing-Pointer Interface trap densities at the SiO{sub 2}/InSb interface were calculated.

Field-induced resistance switching at metal/perovskite manganese oxide interface

International Nuclear Information System (INIS)

Ohkubo, I.; Tsubouchi, K.; Harada, T.; Kumigashira, H.; Itaka, K.; Matsumoto, Y.; Ohnishi, T.; Lippmaa, M.; Koinuma, H.; Oshima, M.

2008-01-01

Planar type metal/insulator/metal structures composed of an epitaxial perovskite manganese oxide layer and various metal electrodes were prepared for electric-field-induced resistance switching. Only the electrode pairs including Al show good resistance switching and the switching ratio reaches its maximum of 1000. This resistance switching occurs around the interface between Al electrodes and epitaxial perovskite manganese oxide thin films

High-Performance WSe2 Complementary Metal Oxide Semiconductor Technology and Integrated Circuits.

Science.gov (United States)

Yu, Lili; Zubair, Ahmad; Santos, Elton J G; Zhang, Xu; Lin, Yuxuan; Zhang, Yuhao; Palacios, Tomás

2015-08-12

Because of their extraordinary structural and electrical properties, two-dimensional materials are currently being pursued for applications such as thin-film transistors and integrated circuit. One of the main challenges that still needs to be overcome for these applications is the fabrication of air-stable transistors with industry-compatible complementary metal oxide semiconductor (CMOS) technology. In this work, we experimentally demonstrate a novel high performance air-stable WSe2 CMOS technology with almost ideal voltage transfer characteristic, full logic swing and high noise margin with different supply voltages. More importantly, the inverter shows large voltage gain (∼38) and small static power (picowatts), paving the way for low power electronic system in 2D materials.

Latest progress in gallium-oxide electronic devices

Science.gov (United States)

Higashiwaki, Masataka; Wong, Man Hoi; Konishi, Keita; Nakata, Yoshiaki; Lin, Chia-Hung; Kamimura, Takafumi; Ravikiran, Lingaparthi; Sasaki, Kohei; Goto, Ken; Takeyama, Akinori; Makino, Takahiro; Ohshima, Takeshi; Kuramata, Akito; Yamakoshi, Shigenobu; Murakami, Hisashi; Kumagai, Yoshinao

2018-02-01

Gallium oxide (Ga2O3) has emerged as a new competitor to SiC and GaN in the race toward next-generation power switching and harsh environment electronics by virtue of the excellent material properties and the relative ease of mass wafer production. In this proceedings paper, an overview of our recent development progress of Ga2O3 metal-oxide-semiconductor field-effect transistors and Schottky barrier diodes will be reported.

Fabrication of smooth patterned structures of refractory metals, semiconductors, and oxides via template stripping.

Science.gov (United States)

Park, Jong Hyuk; Nagpal, Prashant; McPeak, Kevin M; Lindquist, Nathan C; Oh, Sang-Hyun; Norris, David J

2013-10-09

The template-stripping method can yield smooth patterned films without surface contamination. However, the process is typically limited to coinage metals such as silver and gold because other materials cannot be readily stripped from silicon templates due to strong adhesion. Herein, we report a more general template-stripping method that is applicable to a larger variety of materials, including refractory metals, semiconductors, and oxides. To address the adhesion issue, we introduce a thin gold layer between the template and the deposited materials. After peeling off the combined film from the template, the gold layer can be selectively removed via wet etching to reveal a smooth patterned structure of the desired material. Further, we demonstrate template-stripped multilayer structures that have potential applications for photovoltaics and solar absorbers. An entire patterned device, which can include a transparent conductor, semiconductor absorber, and back contact, can be fabricated. Since our approach can also produce many copies of the patterned structure with high fidelity by reusing the template, a low-cost and high-throughput process in micro- and nanofabrication is provided that is useful for electronics, plasmonics, and nanophotonics.

Metal oxide, Group V-VI chalcogenides and GaN/AlGaN photodetectors

Science.gov (United States)

Hasan, Md. Rezaul

In this work, a simple, low-cost and catalyst free one-step solution processing of onedimensional Sb2S3 nanostructures on polyimide substrates was done. This structure demonstrated its potential application as a photoconductor in the UV and visible regime. Using-field emission scanning electron microscopy (SEM), grazing incidence X-Ray diffraction, Raman spectra and transmission electron microscopy measurements, it was shown that the Sb 2S3 films have high crystallinity, uniform morphology and nearstoichiometric composition. Further, using tauc plot, it was found that the films have a direct bandgap of 1.67 eV. MSM photodetectors, fabricated using these films showed a clear photo response in both UV as well as visible wavelength. These devices showed UV on/off ratio as high as 160 under the light intensity of 30 mW/cm2 and a small rise time and fall time of 44 ms 28 ms respectively. The effect of geometry of metal pad and bonding wire orientation of a multi-channel FET on the coupling of THz radiation was studied. The spatial variation images were taken by raster scan with the resolution of 0.07 mm steps in both x and y directions. An effective gate bias, where the effect of noise is minimum and photoresponse is maximum, was used for imaging. By applying VGS =-2.8V and VDS =380mV, the images were taken for all different combinations of activated bonding wires and metal pads. It was observed that, effect of bonding wire orientation is negligible for the large source pad as the radiation is coupled basically between drain and gate pad. Effect of drain bonding wire on coupling depends on the maximum width or diameter of metal pad and the incoming wavelength. In this work, Position of activated Drain pad and orientation of respective bonding wire defined the image tilting angle. Voltage drop across the shorting metal between drain pads, also played a role in increasing the asymmetry by selectively exciting a certain portion of FET Channels more than the other portion

Enhanced two dimensional electron gas transport characteristics in Al2O3/AlInN/GaN metal-oxide-semiconductor high-electron-mobility transistors on Si substrate

International Nuclear Information System (INIS)

Freedsman, J. J.; Watanabe, A.; Urayama, Y.; Egawa, T.

2015-01-01

The authors report on Al 2 O 3 /Al 0.85 In 0.15 N/GaN Metal-Oxide-Semiconductor High-Electron-Mobility Transistor (MOS-HEMT) on Si fabricated by using atomic layer deposited Al 2 O 3 as gate insulator and passivation layer. The MOS-HEMT with the gate length of 2 μm exhibits excellent direct-current (dc) characteristics with a drain current maximum of 1270 mA/mm at a gate bias of 3 V and an off-state breakdown voltage of 180 V for a gate-drain spacing of 4 μm. Also, the 1 μm-gate MOS-HEMT shows good radio-frequency (rf) response such as current gain and maximum oscillation cut-off frequencies of 10 and 34 GHz, respectively. The capacitance-voltage characteristics at 1 MHz revealed significant increase in two-dimensional electron gas (2DEG) density for the MOS-HEMT compared to conventional Schottky barrier HEMTs. Analyses using drain-source conductivity measurements showed improvements in 2DEG transport characteristics for the MOS-HEMT. The enhancements in dc and rf performances of the Al 2 O 3 /Al 0.85 In 0.15 N/GaN MOS-HEMT are attributed to the improvements in 2DEG characteristics

Semiconductor to metallic transition in bulk accumulated amorphous indium-gallium-zinc-oxide dual gate thin-film transistor

Directory of Open Access Journals (Sweden)

Minkyu Chun

2015-05-01

Full Text Available We investigated the effects of top gate voltage (VTG and temperature (in the range of 25 to 70 oC on dual-gate (DG back-channel-etched (BCE amorphous-indium-gallium-zinc-oxide (a-IGZO thin film transistors (TFTs characteristics. The increment of VTG from -20V to +20V, decreases the threshold voltage (VTH from 19.6V to 3.8V and increases the electron density to 8.8 x 1018cm−3. Temperature dependent field-effect mobility in saturation regime, extracted from bottom gate sweep, show a critical dependency on VTG. At VTG of 20V, the mobility decreases from 19.1 to 15.4 cm2/V ⋅ s with increasing temperature, showing a metallic conduction. On the other hand, at VTG of - 20V, the mobility increases from 6.4 to 7.5cm2/V ⋅ s with increasing temperature. Since the top gate bias controls the position of Fermi level, the temperature dependent mobility shows metallic conduction when the Fermi level is above the conduction band edge, by applying high positive bias to the top gate.

Empirical study of the metal-nitride-oxide-semiconductor device characteristics deduced from a microscopic model of memory traps

International Nuclear Information System (INIS)

Ngai, K.L.; Hsia, Y.

1982-01-01

A graded-nitride gate dielectric metal-nitride-oxide-semiconductor (MNOS) memory transistor exhibiting superior device characteristics is presented and analyzed based on a qualitative microscopic model of the memory traps. The model is further reviewed to interpret some generic properties of the MNOS memory transistors including memory window, erase-write speed, and the retention-endurance characteristic features

Generic process for preparing a crystalline oxide upon a group IV semiconductor substrate

Science.gov (United States)

McKee, Rodney A.; Walker, Frederick J.; Chisholm, Matthew F.

2000-01-01

A process for growing a crystalline oxide epitaxially upon the surface of a Group IV semiconductor, as well as a structure constructed by the process, is described. The semiconductor can be germanium or silicon, and the crystalline oxide can generally be represented by the formula (AO).sub.n (A'BO.sub.3).sub.m in which "n" and "m" are non-negative integer repeats of planes of the alkaline earth oxides or the alkaline earth-containing perovskite oxides. With atomic level control of interfacial thermodynamics in a multicomponent semiconductor/oxide system, a highly perfect interface between a semiconductor and a crystalline oxide can be obtained.

Oxide bipolar electronics: materials, devices and circuits

International Nuclear Information System (INIS)

Grundmann, Marius; Klüpfel, Fabian; Karsthof, Robert; Schlupp, Peter; Schein, Friedrich-Leonhard; Splith, Daniel; Yang, Chang; Bitter, Sofie; Von Wenckstern, Holger

2016-01-01

We present the history of, and the latest progress in, the field of bipolar oxide thin film devices. As such we consider primarily pn-junctions in which at least one of the materials is a metal oxide semiconductor. A wide range of n-type and p-type oxides has been explored for the formation of such bipolar diodes. Since most oxide semiconductors are unipolar, challenges and opportunities exist with regard to the formation of heterojunction diodes and band lineups. Recently, various approaches have led to devices with high rectification, namely p-type ZnCo 2 O 4 and NiO on n-type ZnO and amorphous zinc-tin-oxide. Subsequent bipolar devices and applications such as photodetectors, solar cells, junction field-effect transistors and integrated circuits like inverters and ring oscillators are discussed. The tremendous progress shows that bipolar oxide electronics has evolved from the exploration of various materials and heterostructures to the demonstration of functioning integrated circuits. Therefore a viable, facile and high performance technology is ready for further exploitation and performance optimization. (topical review)

Organic semiconductors for organic field-effect transistors

International Nuclear Information System (INIS)

Yamashita, Yoshiro

2009-01-01

The advantages of organic field-effect transistors (OFETs), such as low cost, flexibility and large-area fabrication, have recently attracted much attention due to their electronic applications. Practical transistors require high mobility, large on/off ratio, low threshold voltage and high stability. Development of new organic semiconductors is key to achieving these parameters. Recently, organic semiconductors have been synthesized showing comparable mobilities to amorphous-silicon-based FETs. These materials make OFETs more attractive and their applications have been attempted. New organic semiconductors resulting in high-performance FET devices are described here and the relationship between transistor characteristics and chemical structure is discussed. (topical review)

Organic semiconductors for organic field-effect transistors

Directory of Open Access Journals (Sweden)

Yoshiro Yamashita

2009-01-01

Full Text Available The advantages of organic field-effect transistors (OFETs, such as low cost, flexibility and large-area fabrication, have recently attracted much attention due to their electronic applications. Practical transistors require high mobility, large on/off ratio, low threshold voltage and high stability. Development of new organic semiconductors is key to achieving these parameters. Recently, organic semiconductors have been synthesized showing comparable mobilities to amorphous-silicon-based FETs. These materials make OFETs more attractive and their applications have been attempted. New organic semiconductors resulting in high-performance FET devices are described here and the relationship between transistor characteristics and chemical structure is discussed.

Nanoscale Metal Oxide Semiconductors for Gas Sensing

Science.gov (United States)

Hunter, Gary W.; Evans, Laura; Xu, Jennifer C.; VanderWal, Randy L.; Berger, Gordon M.; Kulis, Michael J.

2011-01-01

A report describes the fabrication and testing of nanoscale metal oxide semiconductors (MOSs) for gas and chemical sensing. This document examines the relationship between processing approaches and resulting sensor behavior. This is a core question related to a range of applications of nanotechnology and a number of different synthesis methods are discussed: thermal evaporation- condensation (TEC), controlled oxidation, and electrospinning. Advantages and limitations of each technique are listed, providing a processing overview to developers of nanotechnology- based systems. The results of a significant amount of testing and comparison are also described. A comparison is made between SnO2, ZnO, and TiO2 single-crystal nanowires and SnO2 polycrystalline nanofibers for gas sensing. The TECsynthesized single-crystal nanowires offer uniform crystal surfaces, resistance to sintering, and their synthesis may be done apart from the substrate. The TECproduced nanowire response is very low, even at the operating temperature of 200 C. In contrast, the electrospun polycrystalline nanofiber response is high, suggesting that junction potentials are superior to a continuous surface depletion layer as a transduction mechanism for chemisorption. Using a catalyst deposited upon the surface in the form of nanoparticles yields dramatic gains in sensitivity for both nanostructured, one-dimensional forms. For the nanowire materials, the response magnitude and response rate uniformly increase with increasing operating temperature. Such changes are interpreted in terms of accelerated surface diffusional processes, yielding greater access to chemisorbed oxygen species and faster dissociative chemisorption, respectively. Regardless of operating temperature, sensitivity of the nanofibers is a factor of 10 to 100 greater than that of nanowires with the same catalyst for the same test condition. In summary, nanostructure appears critical to governing the reactivity, as measured by electrical

On the Integration of Wide Band-gap Semiconductors in Single Phase Boost PFC Converters

DEFF Research Database (Denmark)

Hernandez Botella, Juan Carlos

Power semiconductor technology has dominated the evolution of switched mode power supplies (SMPS). Advances in silicon (Si) technology, as the introduction of metal oxide field effect transistor (MOSFET), isolated gate bipolar transistors (IGBT), superjunction vertical structures and Schottky...... diodes, or the introduction of silicon carbide (SiC) diodes, provided large steps in miniaturization and efficiency improvement of switched mode power converters. Gallium nitride (GaN) and SiC semiconductor devices have already been around for some years. The first one proliferated due to the necessity...... of high frequency operation in optoelectronics applications. On the other hand, Schottky SiC power diodes were introduced in 2001 as an alternative to eliminate reverse recovery issues in Si rectifiers. Wide band-gap semiconductors offer an increased electrical field strength and electron mobility...

Structure and magnetism of transition-metal implanted dilute magnetic semiconductors

CERN Document Server

Pereira, Lino; Temst, K; Araújo, JP; Wahl, U

The discovery of a dilute magnetic semiconductor (DMS) in which ferromagnetism is carrier-mediated and persists above room temperature is a critical step towards the development of semiconductor-based spintronics. Among the many types of DMS materials which have been investigated, the current research interest can be narrowed down to two main classes of materials: (1) narrow-gap III-V semiconductors, mostly GaAs and InAs, doped with Mn; (2) wide-gap oxides and nitrides doped with 3d transition metals, mostly Mn- and Co-doped ZnO and Mn-doped GaN. With a number of interesting functionalities deriving from the carrier-mediated ferromagnetism and demonstrated in various proof-of-concept devices, Mn-doped GaAs has become, among DMS materials, one of the best candidates for technological application. However, despite major developments over the last 15 years, the maximum Curie temperature (185 K) remains well below room temperature. On the other hand, wide-gap DMS materials appear to exhibit ferromagnetic behavior...

Modulation of the effective work function of a TiN metal gate for NMOS requisition with Al incorporation

International Nuclear Information System (INIS)

Han Kai; Ma Xueli; Yang Hong; Wang Wenwu

2013-01-01

The effect of Al incorporation on the effective work function (EWF) of TiN metal gate was systematically investigated. Metal—oxide—semiconductor (MOS) capacitors with W/TiN/Al/TiN gate stacks were used to fulfill this purpose. Different thickness ratios of Al to TiN and different post metal annealing (PMA) conditions were employed. Significant shift of work function towards to Si conduction band was observed, which was suitable for NMOS and the magnitude of shift depends on the processing conditions. (semiconductor technology)

Swift heavy-ion induced trap generation and mixing at Si/SiO{sub 2} interface in depletion n-MOS

Energy Technology Data Exchange (ETDEWEB)

Shinde, N. [Ecotopia Science Institute, Division of Energy Science, Nagoya University, Nagoya 464-8603 (Japan) and Department of Physics, University of Pune, Pune 411 007 (India)]. E-mail: nss@nucl.nagoya-u.ac.jp; Bhoraskar, V.N. [Department of Physics, University of Pune, Pune 411 007 (India); Dhole, S.D. [Department of Physics, University of Pune, Pune 411 007 (India)

2006-01-15

Large channel depletion n-channel MOSFET (Metal oxide semiconductor field effect transistor) is a basic Si-SiO{sub 2} structure to understand irradiation-induced modifications. The contribution of interface and oxide states denoted as {delta}N {sub IT} and {delta}N {sub OT}, respectively, was separated out by using I {sub D}-V {sub DS}, I {sub D}-V {sub GS} measurements. The threshold voltage shift {delta}V {sub T} (V {sub T-irrad} - V {sub T-virgin}) increased for all ions (50 MeV Li, B, F, P and Ni) over the fluence of 2 x 10{sup 11}-2 x 10{sup 13} ions/cm{sup 2}. The increase in {delta}N {sub IT} was associated to trap generation at Si-SiO{sub 2} interface, but a small change in {delta}N {sub OT} indicate less charge trapping in oxide. The electronic energy loss S {sub e} induced increase in {delta}N {sub IT} is not adequate to explain the large shift in threshold voltage. A rough estimate shows that the channel width, W should decrease by 40% for a large increase in {delta}N {sub IT}. Thus, the possible factor affecting reduction of W may be ion beam mixing induced broadening of Si-SiO{sub 2} interface.

N-doping of organic semiconductors by bis-metallosandwich compounds

Science.gov (United States)

Barlow, Stephen; Qi, Yabing; Kahn, Antoine; Marder, Seth; Kim, Sang Bok; Mohapatra, Swagat K.; Guo, Song

2016-01-05

The various inventions disclosed, described, and/or claimed herein relate to the field of methods for n-doping organic semiconductors with certain bis-metallosandwich compounds, the doped compositions produced, and the uses of the doped compositions in organic electronic devices. Metals can be manganese, rhenium, iron, ruthenium, osmium, rhodium, or iridium. Stable and efficient doping can be achieved.

Using a Semiconductor-to-Metal Transition to Control Optical Transmission through Subwavelength Hole Arrays

Directory of Open Access Journals (Sweden)

E. U. Donev

2008-01-01

Full Text Available We describe a simple configuration in which the extraordinary optical transmission effect through subwavelength hole arrays in noble-metal films can be switched by the semiconductor-to-metal transition in an underlying thin film of vanadium dioxide. In these experiments, the transition is brought about by thermal heating of the bilayer film. The surprising reverse hysteretic behavior of the transmission through the subwavelength holes in the vanadium oxide suggest that this modulation is accomplished by a dielectric-matching condition rather than plasmon coupling through the bilayer film. The results of this switching, including the wavelength dependence, are qualitatively reproduced by a transfer matrix model. The prospects for effecting a similar modulation on a much faster time scale by using ultrafast laser pulses to trigger the semiconductor-to-metal transition are also discussed.

Epitaxial Gd2O3 on GaN and AlGaN: a potential candidate for metal oxide semiconductor based transistors on Si for high power application

Science.gov (United States)

Ghosh, Kankat; Das, S.; Khiangte, K. R.; Choudhury, N.; Laha, Apurba

2017-11-01

We report structural and electrical properties of hexagonal Gd2O3 grown epitaxially on GaN/Si (1 1 1) and AlGaN/GaN/Si(1 1 1) virtual substrates. GaN and AlGaN/GaN heterostructures were grown on Si(1 1 1) substrates by plasma assisted molecular beam epitaxy (PA-MBE), whereas the Gd2O3 layer was grown by the pulsed laser ablation (PLA) technique. Initial structural characterizations show that Gd2O3 grown on III-nitride layers by PLA, exhibit a hexagonal structure with an epitaxial relationship as {{≤ft[ 0 0 0 1 \\right]}G{{d2}{{O}3}}}||{{≤ft[ 0 0 0 1 \\right]}GaN} and {{≤ft[ 1 \\bar{1} 0 0 \\right]}G{{d2}{{O}3}}}||{{≤ft[ 1 \\bar{1} 0 0 \\right]}GaN} . X-ray photoelectron measurements of the valence bands revealed that Gd2O3 exhibits band offsets of 0.97 eV and 0.4 eV, for GaN and Al0.3Ga0.7N, respectively. Electrical measurements such as capacitance-voltage and leakage current characteristics further confirm that epi-Gd2O3 on III-nitrides could be a potential candidate for future metal-oxide-semiconductor (MOS)-based transistors also for high power applications in radio frequency range.

Growth and Filling Regularities of Filamentary Channels in Non-Metallic Inorganic Coatings Under Anodic Oxidation of Valve Metals. Mathematical Modeling

Science.gov (United States)

Mamaev, A. I.; Mamaeva, V. A.; Kolenchin, N. F.; Chubenko, A. K.; Kovalskaya, Ya. B.; Dolgova, Yu. N.; Beletskaya, E. Yu.

2015-12-01

Theoretical models are developed for growth and filling processes in filamentary channels of nanostructured non-metallic coatings produced by anodizing and microplasma oxidation. Graphical concentration distributions are obtained for channel-reacting anions, cations, and sparingly soluble reaction products depending on the time of electric current transmission and the length of the filamentary channel. Graphical distributions of the front moving velocity for the sparingly soluble compound are presented. The resulting model representation increases the understanding of the anodic process nature and can be used for a description and prediction of porous anodic film growth and filling. It is shown that the character of the filamentary channel growth and filling causes a variety of processes determining the textured metal - nonmetallic inorganic coating phase boundary formation.

Exploring SiSn as a performance enhancing semiconductor: A theoretical and experimental approach

KAUST Repository

Hussain, Aftab M.; Singh, Nirpendra; Fahad, Hossain M.; Rader, Kelly; Schwingenschlö gl, Udo; Hussain, Muhammad Mustafa

2014-01-01

We present a novel semiconducting alloy, silicon-tin (SiSn), as channel material for complementary metal oxide semiconductor (CMOS) circuit applications. The material has been studied theoretically using first principles analysis as well

Electric-field controlled ferromagnetism in MnGe magnetic quantum dots

Directory of Open Access Journals (Sweden)

Faxian Xiu

2011-03-01

Full Text Available Electric-field control of ferromagnetism in magnetic semiconductors at room temperature has been actively pursued as one of the important approaches to realize practical spintronics and non-volatile logic devices. While Mn-doped III-V semiconductors were considered as potential candidates for achieving this controllability, the search for an ideal material with high Curie temperature (Tc>300 K and controllable ferromagnetism at room temperature has continued for nearly a decade. Among various dilute magnetic semiconductors (DMSs, materials derived from group IV elements such as Si and Ge are the ideal candidates for such materials due to their excellent compatibility with the conventional complementary metal-oxide-semiconductor (CMOS technology. Here, we review recent reports on the development of high-Curie temperature Mn0.05Ge0.95 quantum dots (QDs and successfully demonstrate electric-field control of ferromagnetism in the Mn0.05Ge0.95 quantum dots up to 300 K. Upon the application of gate-bias to a metal-oxide-semiconductor (MOS capacitor, the ferromagnetism of the channel layer (i.e. the Mn0.05Ge0.95 quantum dots was modulated as a function of the hole concentration. Finally, a theoretical model based upon the formation of magnetic polarons has been proposed to explain the observed field controlled ferromagnetism.

Comparison between the effects of positive noncatastrophic HMB ESD stress in n-channel and p-channel power MOSFET's

Science.gov (United States)

Zupac, Dragan; Kosier, Steven L.; Schrimpf, Ronald D.; Galloway, Kenneth F.; Baum, Keith W.

1991-10-01

The effect of noncatastrophic positive human body model (HBM) electrostatic discharge (ESD) stress on n-channel power MOSFETs is radically different from that on p-channel MOSFETs. In n-channel transistors, the stress causes negative shifts of the current-voltage characteristics indicative of positive charge trapping in the gate oxide. In p-channel transistors, the stress increases the drain-to-source leakage current, probably due to localized avalanche electron injection from the p-doped drain.

Investigation of high mobility pseudomorphic SiGe p-channels in Si MOSFETS at low and high electric fields

International Nuclear Information System (INIS)

Palmer, Martin John

2001-01-01

Silicon Metal-Oxide-Semiconductor Field Effect Transistors (MOSFETs) for high speed, high current applications are rapidly approaching the physical and financial limits of the technology. This opens opportunities for the incorporation of materials with intrinsically better transport characteristics. An alloy of silicon and germanium is one such material that is gaining much recognition as the active component of MOSFETs and as the secondary structures (such as the gate electrode). This work examines a batch of buried channel Si 0.64 Ge 0.36 p-MOSFETs, with a minimum effective length of 0.35 μm, under different bias conditions and at different temperatures. High current and transconductance enhancements are apparent at long gate lengths. The carrier mobility is up to a factor of 2.5 times that of silicon at room temperature and 7.5 times at 4 K. A clear trend of decreasing peak mobility with decreasing silicon cap thickness is evident. Simulations show that scattering caused by the roughness of the SiO 2 /Si interface dominates, rather than alloy scattering or Si/SiGe roughness, even for a buried channel. This scattering increases with the proximity of the carriers to the interface. An increase of interface trap density with decreasing cap thickness, demonstrates that segregated germanium exists some distance into the cap and interferes with the oxidation process. This will increase scattering through increased SiO 2 /Si roughness and increased trapped charge. The short channel, high field results are comparable or slightly worse than those of silicon due to lower saturation drift velocity. However, fitting to a drift-diffusion model shows an apparent increase in saturation velocity for short channels, especially at low temperatures. This effect correlates with the low field mobility and is greater for devices containing SiGe. This is an indication of velocity overshoot, which may enhance the performance of SiGe MOSFETs at deep submicron gate lengths. (author)

Ion channeling study of defects in multicomponent semiconductor compounds

International Nuclear Information System (INIS)

Turos, A.; Nowicki, L.; Stonert, A.

2002-01-01

Compound semiconductor crystals are of great technological importance as basic materials for production of modern opto- and microelectronic devices. Ion implantation is one of the principal techniques for heterostructures processing. This paper reports the results of the study of defect formation and transformation in binary and ternary semiconductor compounds subjected to ion implantation with ions of different mass and energy. The principal analytical technique was He-ion channeling. The following materials were studied: GaN and InGaN epitaxial layers. First the semi empirical method of channeling spectra analysis for ion implanted multicomponent single crystal was developed. This method was later complemented by the more sophisticated method based on the Monte Carlo simulation of channeling spectra. Next, the damage buildup in different crystals and epitaxial layers as a function of the implantation dose was studied for N, Mg, Te, and Kr ions. The influence of the substrate temperature on the defect transformations was studied for GaN epitaxial layers implanted with Mg ions. Special attention was devoted to the study of growth conditions of InGaN/GaN/sapphire heterostructures, which are important component of the future blue laser diodes. In-atom segregation and tetragonal distortion of the epitaxial layer were observed and characterized. Next problem studied was the incorporation of hydrogen atoms in GaAs and GaN. Elastic recoil detection (ERDA) and nuclear reaction analysis (NRA) were applied for the purpose. (author)

Atomic Layer Deposited Thin Films for Dielectrics, Semiconductor Passivation, and Solid Oxide Fuel Cells