WorldWideScience

Sample records for lensfree on-chip imaging

  1. High throughput on-chip analysis of high-energy charged particle tracks using lensfree imaging

    Energy Technology Data Exchange (ETDEWEB)

    Luo, Wei; Shabbir, Faizan; Gong, Chao; Gulec, Cagatay; Pigeon, Jeremy; Shaw, Jessica; Greenbaum, Alon; Tochitsky, Sergei; Joshi, Chandrashekhar [Electrical Engineering Department, University of California, Los Angeles, California 90095 (United States); Ozcan, Aydogan, E-mail: ozcan@ucla.edu [Electrical Engineering Department, University of California, Los Angeles, California 90095 (United States); Bioengineering Department, University of California, Los Angeles, California 90095 (United States); California NanoSystems Institute (CNSI), University of California, Los Angeles, California 90095 (United States)

    2015-04-13

    We demonstrate a high-throughput charged particle analysis platform, which is based on lensfree on-chip microscopy for rapid ion track analysis using allyl diglycol carbonate, i.e., CR-39 plastic polymer as the sensing medium. By adopting a wide-area opto-electronic image sensor together with a source-shifting based pixel super-resolution technique, a large CR-39 sample volume (i.e., 4 cm × 4 cm × 0.1 cm) can be imaged in less than 1 min using a compact lensfree on-chip microscope, which detects partially coherent in-line holograms of the ion tracks recorded within the CR-39 detector. After the image capture, using highly parallelized reconstruction and ion track analysis algorithms running on graphics processing units, we reconstruct and analyze the entire volume of a CR-39 detector within ∼1.5 min. This significant reduction in the entire imaging and ion track analysis time not only increases our throughput but also allows us to perform time-resolved analysis of the etching process to monitor and optimize the growth of ion tracks during etching. This computational lensfree imaging platform can provide a much higher throughput and more cost-effective alternative to traditional lens-based scanning optical microscopes for ion track analysis using CR-39 and other passive high energy particle detectors.

  2. Wide-field synovial fluid imaging using polarized lens-free on-chip microscopy for point-of-care diagnostics of gout (Conference Presentation)

    Science.gov (United States)

    Zhang, Yibo; Lee, Seung Yoon; Zhang, Yun; Furst, Daniel; Fitzgerald, John; Ozcan, Aydogan

    2016-03-01

    Gout and pseudogout are forms of crystal arthropathy caused by monosodium urate (MSU) and calcium pyrophosphate dehydrate (CPPD) crystals in the joint, respectively, that can result in painful joints. Detecting the unique-shaped, birefringent MSU/CPPD crystals in a synovial fluid sample using a compensated polarizing microscope has been the gold-standard for diagnosis since the 1960's. However, this can be time-consuming and inaccurate, especially if there are only few crystals in the fluid. The high-cost and bulkiness of conventional microscopes can also be limiting for point-of-care diagnosis. Lens-free on-chip microscopy based on digital holography routinely achieves high-throughput and high-resolution imaging in a cost-effective and field-portable design. Here we demonstrate, for the first time, polarized lens-free on-chip imaging of MSU and CPPD crystals over a wide field-of-view (FOV ~ 20.5 mm2, i.e., gout and pseudogout. Circularly polarizer partially-coherent light is used to illuminate the synovial fluid sample on a glass slide, after which a quarter-wave-plate and an angle-mismatched linear polarizer are used to analyze the transmitted light. Two lens-free holograms of the MSU/CPPD sample are taken, with the sample rotated by 90°, to rule out any non-birefringent objects within the specimen. A phase-recovery algorithm is also used to improve the reconstruction quality, and digital pseudo-coloring is utilized to match the color and contrast of the lens-free image to that of a gold-standard microscope image to ease the examination by a rheumatologist or a laboratory technician, and to facilitate computerized analysis.

  3. Laser Light-field Fusion for Wide-field Lensfree On-chip Phase Contrast Microscopy of Nanoparticles

    Science.gov (United States)

    Kazemzadeh, Farnoud; Wong, Alexander

    2016-12-01

    Wide-field lensfree on-chip microscopy, which leverages holography principles to capture interferometric light-field encodings without lenses, is an emerging imaging modality with widespread interest given the large field-of-view compared to lens-based techniques. In this study, we introduce the idea of laser light-field fusion for lensfree on-chip phase contrast microscopy for detecting nanoparticles, where interferometric laser light-field encodings acquired using a lensfree, on-chip setup with laser pulsations at different wavelengths are fused to produce marker-free phase contrast images of particles at the nanometer scale. As a proof of concept, we demonstrate, for the first time, a wide-field lensfree on-chip instrument successfully detecting 300 nm particles across a large field-of-view of ~30 mm2 without any specialized or intricate sample preparation, or the use of synthetic aperture- or shift-based techniques.

  4. Rapid, portable and cost-effective yeast cell viability and concentration analysis using lensfree on-chip microscopy and machine learning

    KAUST Repository

    Feizi, Alborz

    2016-09-24

    Monitoring yeast cell viability and concentration is important in brewing, baking and biofuel production. However, existing methods of measuring viability and concentration are relatively bulky, tedious and expensive. Here we demonstrate a compact and cost-effective automatic yeast analysis platform (AYAP), which can rapidly measure cell concentration and viability. AYAP is based on digital in-line holography and on-chip microscopy and rapidly images a large field-of-view of 22.5 mm2. This lens-free microscope weighs 70 g and utilizes a partially-coherent illumination source and an opto-electronic image sensor chip. A touch-screen user interface based on a tablet-PC is developed to reconstruct the holographic shadows captured by the image sensor chip and use a support vector machine (SVM) model to automatically classify live and dead cells in a yeast sample stained with methylene blue. In order to quantify its accuracy, we varied the viability and concentration of the cells and compared AYAP\\'s performance with a fluorescence exclusion staining based gold-standard using regression analysis. The results agree very well with this gold-standard method and no significant difference was observed between the two methods within a concentration range of 1.4 × 105 to 1.4 × 106 cells per mL, providing a dynamic range suitable for various applications. This lensfree computational imaging technology that is coupled with machine learning algorithms would be useful for cost-effective and rapid quantification of cell viability and density even in field and resource-poor settings.

  5. Rapid, portable and cost-effective yeast cell viability and concentration analysis using lensfree on-chip microscopy and machine learning.

    Science.gov (United States)

    Feizi, Alborz; Zhang, Yibo; Greenbaum, Alon; Guziak, Alex; Luong, Michelle; Chan, Raymond Yan Lok; Berg, Brandon; Ozkan, Haydar; Luo, Wei; Wu, Michael; Wu, Yichen; Ozcan, Aydogan

    2016-11-01

    Monitoring yeast cell viability and concentration is important in brewing, baking and biofuel production. However, existing methods of measuring viability and concentration are relatively bulky, tedious and expensive. Here we demonstrate a compact and cost-effective automatic yeast analysis platform (AYAP), which can rapidly measure cell concentration and viability. AYAP is based on digital in-line holography and on-chip microscopy and rapidly images a large field-of-view of 22.5 mm 2 . This lens-free microscope weighs 70 g and utilizes a partially-coherent illumination source and an opto-electronic image sensor chip. A touch-screen user interface based on a tablet-PC is developed to reconstruct the holographic shadows captured by the image sensor chip and use a support vector machine (SVM) model to automatically classify live and dead cells in a yeast sample stained with methylene blue. In order to quantify its accuracy, we varied the viability and concentration of the cells and compared AYAP's performance with a fluorescence exclusion staining based gold-standard using regression analysis. The results agree very well with this gold-standard method and no significant difference was observed between the two methods within a concentration range of 1.4 × 10 5 to 1.4 × 10 6 cells per mL, providing a dynamic range suitable for various applications. This lensfree computational imaging technology that is coupled with machine learning algorithms would be useful for cost-effective and rapid quantification of cell viability and density even in field and resource-poor settings.

  6. Lens-free imaging of magnetic particles in DNA assays.

    Science.gov (United States)

    Colle, Frederik; Vercruysse, Dries; Peeters, Sara; Liu, Chengxun; Stakenborg, Tim; Lagae, Liesbet; Del-Favero, Jurgen

    2013-11-07

    We present a novel opto-magnetic system for the fast and sensitive detection of nucleic acids. The system is based on a lens-free imaging approach resulting in a compact and cheap optical readout of surface hybridized DNA fragments. In our system magnetic particles are attracted towards the detection surface thereby completing the labeling step in less than 1 min. An optimized surface functionalization combined with magnetic manipulation was used to remove all nonspecifically bound magnetic particles from the detection surface. A lens-free image of the specifically bound magnetic particles on the detection surface was recorded by a CMOS imager. This recorded interference pattern was reconstructed in software, to represent the particle image at the focal distance, using little computational power. As a result we were able to detect DNA concentrations down to 10 pM with single particle sensitivity. The possibility of integrated sample preparation by manipulation of magnetic particles, combined with the cheap and highly compact lens-free detection makes our system an ideal candidate for point-of-care diagnostic applications.

  7. Whole slide imaging of unstained tissue using lensfree microscopy

    Science.gov (United States)

    Morel, Sophie Nhu An; Hervé, Lionel; Bordy, Thomas; Cioni, Olivier; Delon, Antoine; Fromentin, Catherine; Dinten, Jean-Marc; Allier, Cédric

    2016-04-01

    Pathologist examination of tissue slides provides insightful information about a patient's disease. Traditional analysis of tissue slides is performed under a binocular microscope, which requires staining of the sample and delays the examination. We present a simple cost-effective lensfree imaging method to record 2-4μm resolution wide-field (10 mm2 to 6 cm2) images of unstained tissue slides. The sample processing time is reduced as there is no need for staining. A wide field of view (10 mm2) lensfree hologram is recorded in a single shot and the image is reconstructed in 2s providing a very fast acquisition chain. The acquisition is multispectral, i.e. multiple holograms are recorded simultaneously at three different wavelengths, and a dedicated holographic reconstruction algorithm is used to retrieve both amplitude and phase. Whole tissue slides imaging is obtained by recording 130 holograms with X-Y translation stages and by computing the mosaic of a 25 x 25 mm2 reconstructed image. The reconstructed phase provides a phase-contrast-like image of the unstained specimen, revealing structures of healthy and diseased tissue. Slides from various organs can be reconstructed, e.g. lung, colon, ganglion, etc. To our knowledge, our method is the first technique that enables fast wide-field lensfree imaging of such unlabeled dense samples. This technique is much cheaper and compact than a conventional phase contrast microscope and could be made portable. In sum, we present a new methodology that could quickly provide useful information when a rapid diagnosis is needed, such as tumor margin identification on frozen section biopsies during surgery.

  8. Fusion of lens-free microscopy and mobile-phone microscopy images for high-color-accuracy and high-resolution pathology imaging

    Science.gov (United States)

    Zhang, Yibo; Wu, Yichen; Zhang, Yun; Ozcan, Aydogan

    2017-03-01

    Digital pathology and telepathology require imaging tools with high-throughput, high-resolution and accurate color reproduction. Lens-free on-chip microscopy based on digital in-line holography is a promising technique towards these needs, as it offers a wide field of view (FOV >20 mm2) and high resolution with a compact, low-cost and portable setup. Color imaging has been previously demonstrated by combining reconstructed images at three discrete wavelengths in the red, green and blue parts of the visible spectrum, i.e., the RGB combination method. However, this RGB combination method is subject to color distortions. To improve the color performance of lens-free microscopy for pathology imaging, here we present a wavelet-based color fusion imaging framework, termed "digital color fusion microscopy" (DCFM), which digitally fuses together a grayscale lens-free microscope image taken at a single wavelength and a low-resolution and low-magnification color-calibrated image taken by a lens-based microscope, which can simply be a mobile phone based cost-effective microscope. We show that the imaging results of an H&E stained breast cancer tissue slide with the DCFM technique come very close to a color-calibrated microscope using a 40x objective lens with 0.75 NA. Quantitative comparison showed 2-fold reduction in the mean color distance using the DCFM method compared to the RGB combination method, while also preserving the high-resolution features of the lens-free microscope. Due to the cost-effective and field-portable nature of both lens-free and mobile-phone microscopy techniques, their combination through the DCFM framework could be useful for digital pathology and telepathology applications, in low-resource and point-of-care settings.

  9. Automated Micro-Object Detection for Mobile Diagnostics Using Lens-Free Imaging Technology

    Directory of Open Access Journals (Sweden)

    Mohendra Roy

    2016-05-01

    Full Text Available Lens-free imaging technology has been extensively used recently for microparticle and biological cell analysis because of its high throughput, low cost, and simple and compact arrangement. However, this technology still lacks a dedicated and automated detection system. In this paper, we describe a custom-developed automated micro-object detection method for a lens-free imaging system. In our previous work (Roy et al., we developed a lens-free imaging system using low-cost components. This system was used to generate and capture the diffraction patterns of micro-objects and a global threshold was used to locate the diffraction patterns. In this work we used the same setup to develop an improved automated detection and analysis algorithm based on adaptive threshold and clustering of signals. For this purpose images from the lens-free system were then used to understand the features and characteristics of the diffraction patterns of several types of samples. On the basis of this information, we custom-developed an automated algorithm for the lens-free imaging system. Next, all the lens-free images were processed using this custom-developed automated algorithm. The performance of this approach was evaluated by comparing the counting results with standard optical microscope results. We evaluated the counting results for polystyrene microbeads, red blood cells, and HepG2, HeLa, and MCF7 cells. The comparison shows good agreement between the systems, with a correlation coefficient of 0.91 and linearity slope of 0.877. We also evaluated the automated size profiles of the microparticle samples. This Wi-Fi-enabled lens-free imaging system, along with the dedicated software, possesses great potential for telemedicine applications in resource-limited settings.

  10. 3D imaging of optically cleared tissue using a simplified CLARITY method and on-chip microscopy

    KAUST Repository

    Zhang, Yibo; Shin, Yoonjung; Sung, Kevin; Yang, Sam; Chen, Harrison; Wang, Hongda; Teng, Da; Rivenson, Yair; Kulkarni, Rajan P.; Ozcan, Aydogan

    2017-01-01

    High-throughput sectioning and optical imaging of tissue samples using traditional immunohistochemical techniques can be costly and inaccessible in resource-limited areas. We demonstrate three-dimensional (3D) imaging and phenotyping in optically transparent tissue using lens-free holographic on-chip microscopy as a low-cost, simple, and high-throughput alternative to conventional approaches. The tissue sample is passively cleared using a simplified CLARITY method and stained using 3,3′-diaminobenzidine to target cells of interest, enabling bright-field optical imaging and 3D sectioning of thick samples. The lens-free computational microscope uses pixel super-resolution and multi-height phase recovery algorithms to digitally refocus throughout the cleared tissue and obtain a 3D stack of complex-valued images of the sample, containing both phase and amplitude information. We optimized the tissue-clearing and imaging system by finding the optimal illumination wavelength, tissue thickness, sample preparation parameters, and the number of heights of the lens-free image acquisition and implemented a sparsity-based denoising algorithm to maximize the imaging volume and minimize the amount of the acquired data while also preserving the contrast-to-noise ratio of the reconstructed images. As a proof of concept, we achieved 3D imaging of neurons in a 200-μm-thick cleared mouse brain tissue over a wide field of view of 20.5 mm2. The lens-free microscope also achieved more than an order-of-magnitude reduction in raw data compared to a conventional scanning optical microscope imaging the same sample volume. Being low cost, simple, high-throughput, and data-efficient, we believe that this CLARITY-enabled computational tissue imaging technique could find numerous applications in biomedical diagnosis and research in low-resource settings.

  11. 3D imaging of optically cleared tissue using a simplified CLARITY method and on-chip microscopy

    KAUST Repository

    Zhang, Yibo

    2017-08-12

    High-throughput sectioning and optical imaging of tissue samples using traditional immunohistochemical techniques can be costly and inaccessible in resource-limited areas. We demonstrate three-dimensional (3D) imaging and phenotyping in optically transparent tissue using lens-free holographic on-chip microscopy as a low-cost, simple, and high-throughput alternative to conventional approaches. The tissue sample is passively cleared using a simplified CLARITY method and stained using 3,3′-diaminobenzidine to target cells of interest, enabling bright-field optical imaging and 3D sectioning of thick samples. The lens-free computational microscope uses pixel super-resolution and multi-height phase recovery algorithms to digitally refocus throughout the cleared tissue and obtain a 3D stack of complex-valued images of the sample, containing both phase and amplitude information. We optimized the tissue-clearing and imaging system by finding the optimal illumination wavelength, tissue thickness, sample preparation parameters, and the number of heights of the lens-free image acquisition and implemented a sparsity-based denoising algorithm to maximize the imaging volume and minimize the amount of the acquired data while also preserving the contrast-to-noise ratio of the reconstructed images. As a proof of concept, we achieved 3D imaging of neurons in a 200-μm-thick cleared mouse brain tissue over a wide field of view of 20.5 mm2. The lens-free microscope also achieved more than an order-of-magnitude reduction in raw data compared to a conventional scanning optical microscope imaging the same sample volume. Being low cost, simple, high-throughput, and data-efficient, we believe that this CLARITY-enabled computational tissue imaging technique could find numerous applications in biomedical diagnosis and research in low-resource settings.

  12. Optimized computational imaging methods for small-target sensing in lens-free holographic microscopy

    Science.gov (United States)

    Xiong, Zhen; Engle, Isaiah; Garan, Jacob; Melzer, Jeffrey E.; McLeod, Euan

    2018-02-01

    Lens-free holographic microscopy is a promising diagnostic approach because it is cost-effective, compact, and suitable for point-of-care applications, while providing high resolution together with an ultra-large field-of-view. It has been applied to biomedical sensing, where larger targets like eukaryotic cells, bacteria, or viruses can be directly imaged without labels, and smaller targets like proteins or DNA strands can be detected via scattering labels like micro- or nano-spheres. Automated image processing routines can count objects and infer target concentrations. In these sensing applications, sensitivity and specificity are critically affected by image resolution and signal-to-noise ratio (SNR). Pixel super-resolution approaches have been shown to boost resolution and SNR by synthesizing a high-resolution image from multiple, partially redundant, low-resolution images. However, there are several computational methods that can be used to synthesize the high-resolution image, and previously, it has been unclear which methods work best for the particular case of small-particle sensing. Here, we quantify the SNR achieved in small-particle sensing using regularized gradient-descent optimization method, where the regularization is based on cardinal-neighbor differences, Bayer-pattern noise reduction, or sparsity in the image. In particular, we find that gradient-descent with sparsity-based regularization works best for small-particle sensing. These computational approaches were evaluated on images acquired using a lens-free microscope that we assembled from an off-the-shelf LED array and color image sensor. Compared to other lens-free imaging systems, our hardware integration, calibration, and sample preparation are particularly simple. We believe our results will help to enable the best performance in lens-free holographic sensing.

  13. Giga-pixel lensfree holographic microscopy and tomography using color image sensors.

    Directory of Open Access Journals (Sweden)

    Serhan O Isikman

    Full Text Available We report Giga-pixel lensfree holographic microscopy and tomography using color sensor-arrays such as CMOS imagers that exhibit Bayer color filter patterns. Without physically removing these color filters coated on the sensor chip, we synthesize pixel super-resolved lensfree holograms, which are then reconstructed to achieve ~350 nm lateral resolution, corresponding to a numerical aperture of ~0.8, across a field-of-view of ~20.5 mm(2. This constitutes a digital image with ~0.7 Billion effective pixels in both amplitude and phase channels (i.e., ~1.4 Giga-pixels total. Furthermore, by changing the illumination angle (e.g., ± 50° and scanning a partially-coherent light source across two orthogonal axes, super-resolved images of the same specimen from different viewing angles are created, which are then digitally combined to synthesize tomographic images of the object. Using this dual-axis lensfree tomographic imager running on a color sensor-chip, we achieve a 3D spatial resolution of ~0.35 µm × 0.35 µm × ~2 µm, in x, y and z, respectively, creating an effective voxel size of ~0.03 µm(3 across a sample volume of ~5 mm(3, which is equivalent to >150 Billion voxels. We demonstrate the proof-of-concept of this lensfree optical tomographic microscopy platform on a color CMOS image sensor by creating tomograms of micro-particles as well as a wild-type C. elegans nematode.

  14. Rapid, portable and cost-effective yeast cell viability and concentration analysis using lensfree on-chip microscopy and machine learning

    KAUST Repository

    Feizi, Alborz; Zhang, Yibo; Greenbaum, Alon; Guziak, Alex; Luong, Michelle; Chan, Raymond Yan Lok; Berg, Brandon; Ozkan, Haydar; Luo, Wei; Wu, Michael; Wu, Yichen; Ozcan, Aydogan

    2016-01-01

    and cost-effective automatic yeast analysis platform (AYAP), which can rapidly measure cell concentration and viability. AYAP is based on digital in-line holography and on-chip microscopy and rapidly images a large field-of-view of 22.5 mm2. This lens

  15. Lensfree diffractive tomography for the imaging of 3D cell cultures

    Science.gov (United States)

    Berdeu, Anthony; Momey, Fabien; Dinten, Jean-Marc; Gidrol, Xavier; Picollet-D'hahan, Nathalie; Allier, Cédric

    2017-02-01

    New microscopes are needed to help reaching the full potential of 3D organoid culture studies by gathering large quantitative and systematic data over extended periods of time while preserving the integrity of the living sample. In order to reconstruct large volumes while preserving the ability to catch every single cell, we propose new imaging platforms based on lens-free microscopy, a technic which is addressing these needs in the context of 2D cell culture, providing label-free and non-phototoxic acquisition of large datasets. We built lens-free diffractive tomography setups performing multi-angle acquisitions of 3D organoid cultures embedded in Matrigel and developed dedicated 3D holographic reconstruction algorithms based on the Fourier diffraction theorem. Nonetheless, holographic setups do not record the phase of the incident wave front and the biological samples in Petri dish strongly limit the angular coverage. These limitations introduce numerous artefacts in the sample reconstruction. We developed several methods to overcome them, such as multi-wavelength imaging or iterative phase retrieval. The most promising technic currently developed is based on a regularised inverse problem approach directly applied on the 3D volume to reconstruct. 3D reconstructions were performed on several complex samples such as 3D networks or spheroids embedded in capsules with large reconstructed volumes up to 25 mm3 while still being able to identify single cells. To our knowledge, this is the first time that such an inverse problem approach is implemented in the context of lens-free diffractive tomography enabling to reconstruct large fully 3D volumes of unstained biological samples.

  16. Lensfree microscopy on a cellphone

    Science.gov (United States)

    Tseng, Derek; Mudanyali, Onur; Oztoprak, Cetin; Isikman, Serhan O.; Sencan, Ikbal; Yaglidere, Oguzhan; Ozcan, Aydogan

    2010-01-01

    We demonstrate lensfree digital microscopy on a cellphone. This compact and light-weight holographic microscope installed on a cellphone does not utilize any lenses, lasers or other bulky optical components and it may offer a cost-effective tool for telemedicine applications to address various global health challenges. Weighing ~38 grams (cellphone where the samples are loaded from the side, and are vertically illuminated by a simple light-emitting diode (LED). This incoherent LED light is then scattered from each micro-object to coherently interfere with the background light, creating the lensfree hologram of each object on the detector array of the cellphone. These holographic signatures captured by the cellphone permit reconstruction of microscopic images of the objects through rapid digital processing. We report the performance of this lensfree cellphone microscope by imaging various sized micro-particles, as well as red blood cells, white blood cells, platelets and a waterborne parasite (Giardia lamblia). PMID:20445943

  17. Wide-field imaging of birefringent synovial fluid crystals using lens-free polarized microscopy for gout diagnosis

    Science.gov (United States)

    Zhang, Yibo; Lee, Seung Yoon Celine; Zhang, Yun; Furst, Daniel; Fitzgerald, John; Ozcan, Aydogan

    2016-06-01

    Gout is a form of crystal arthropathy where monosodium urate (MSU) crystals deposit and elicit inflammation in a joint. Diagnosis of gout relies on identification of MSU crystals under a compensated polarized light microscope (CPLM) in synovial fluid aspirated from the patient’s joint. The detection of MSU crystals by optical microscopy is enhanced by their birefringent properties. However, CPLM partially suffers from the high-cost and bulkiness of conventional lens-based microscopy, and its relatively small field-of-view (FOV) limits the efficiency and accuracy of gout diagnosis. Here we present a lens-free polarized microscope which adopts a novel differential and angle-mismatched polarizing optical design achieving wide-field and high-resolution holographic imaging of birefringent objects with a color contrast similar to that of a standard CPLM. The performance of this computational polarization microscope is validated by imaging MSU crystals made from a gout patient’s tophus and steroid crystals used as negative control. This lens-free polarized microscope, with its wide FOV (>20 mm2), cost-effectiveness and field-portability, can significantly improve the efficiency and accuracy of gout diagnosis, reduce costs, and can be deployed even at the point-of-care and in resource-limited clinical settings.

  18. Rapid immuno-analytical system physically integrated with lens-free CMOS image sensor for food-borne pathogens.

    Science.gov (United States)

    Jeon, Jin-Woo; Kim, Jee-Hyun; Lee, Jong-Mook; Lee, Won-Ho; Lee, Do-Young; Paek, Se-Hwan

    2014-02-15

    To realize an inexpensive, pocket-sized immunosensor system, a rapid test devise based on cross-flow immuno-chromatography was physically combined with a lens-free CMOS image sensor (CIS), which was then applied to the detection of the food-borne pathogen, Salmonella typhimurium (S. typhimurium). Two CISs, each retaining 1.3 mega pixel array, were mounted on a printed circuit board to fabricate a disposable sensing module, being connectable with a signal detection system. For the bacterial analysis, a cellulose membrane-based immunosensing platform, ELISA-on-a-chip (EOC), was employed, being integrated with the CIS module, and the antigen-antibody reaction sites were aligned with the respective sensor. In such sensor construction, the chemiluminescent signals produced from the EOC are transferred directly into the sensors and are converted to electric signals on the detector. The EOC-CIS integrated sensor was capable of detecting a traceable amount of the bacterium (4.22 × 10(3)CFU/mL), nearly comparable to that adopting a sophisticated detector such as cooled-charge-coupled device, while having greatly reduced dimensions and cost. Upon coupling with immuno-magnetic separation, the sensor showed an additional 67-fold enhancement in the detection limit. Furthermore, a real sample test was carried out for fish muscles inoculated with a sample of 3.3CFU S. typhimurium per 10 g, which was able to be detected earlier than 6h after the onset of pre-enrichment by culture. © 2013 Elsevier B.V. All rights reserved.

  19. 3D on-chip microscopy of optically cleared tissue

    Science.gov (United States)

    Zhang, Yibo; Shin, Yoonjung; Sung, Kevin; Yang, Sam; Chen, Harrison; Wang, Hongda; Teng, Da; Rivenson, Yair; Kulkarni, Rajan P.; Ozcan, Aydogan

    2018-02-01

    Traditional pathology relies on tissue biopsy, micro-sectioning, immunohistochemistry and microscopic imaging, which are relatively expensive and labor-intensive, and therefore are less accessible in resource-limited areas. Low-cost tissue clearing techniques, such as the simplified CLARITY method (SCM), are promising to potentially reduce the cost of disease diagnosis by providing 3D imaging and phenotyping of thicker tissue samples with simpler preparation steps. However, the mainstream imaging approach for cleared tissue, fluorescence microscopy, suffers from high-cost, photobleaching and signal fading. As an alternative approach to fluorescence, here we demonstrate 3D imaging of SCMcleared tissue using on-chip holography, which is based on pixel-super-resolution and multi-height phase recovery algorithms to digitally compute the sample's amplitude and phase images at various z-slices/depths through the sample. The tissue clearing procedures and the lens-free imaging system were jointly optimized to find the best illumination wavelength, tissue thickness, staining solution pH, and the number of hologram heights to maximize the imaged tissue volume, minimize the amount of acquired data, while maintaining a high contrast-to-noise ratio for the imaged cells. After this optimization, we achieved 3D imaging of a 200-μm thick cleared mouse brain tissue over a field-of-view of based microscope (20× 0.75NA). Moreover, the lens-free microscope achieves an order-of-magnitude better data efficiency compared to its lens-based counterparts for volumetric imaging of samples. The presented low-cost and high-throughput lens-free tissue imaging technique enabled by CLARITY can be used in various biomedical applications in low-resource-settings.

  20. Optical and Electric Multifunctional CMOS Image Sensors for On-Chip Biosensing Applications

    Directory of Open Access Journals (Sweden)

    Kiyotaka Sasagawa

    2010-12-01

    Full Text Available In this review, the concept, design, performance, and a functional demonstration of multifunctional complementary metal-oxide-semiconductor (CMOS image sensors dedicated to on-chip biosensing applications are described. We developed a sensor architecture that allows flexible configuration of a sensing pixel array consisting of optical and electric sensing pixels, and designed multifunctional CMOS image sensors that can sense light intensity and electric potential or apply a voltage to an on-chip measurement target. We describe the sensors’ architecture on the basis of the type of electric measurement or imaging functionalities.

  1. Laser Doppler Blood Flow Imaging Using a CMOS Imaging Sensor with On-Chip Signal Processing

    Directory of Open Access Journals (Sweden)

    Cally Gill

    2013-09-01

    Full Text Available The first fully integrated 2D CMOS imaging sensor with on-chip signal processing for applications in laser Doppler blood flow (LDBF imaging has been designed and tested. To obtain a space efficient design over 64 × 64 pixels means that standard processing electronics used off-chip cannot be implemented. Therefore the analog signal processing at each pixel is a tailored design for LDBF signals with balanced optimization for signal-to-noise ratio and silicon area. This custom made sensor offers key advantages over conventional sensors, viz. the analog signal processing at the pixel level carries out signal normalization; the AC amplification in combination with an anti-aliasing filter allows analog-to-digital conversion with a low number of bits; low resource implementation of the digital processor enables on-chip processing and the data bottleneck that exists between the detector and processing electronics has been overcome. The sensor demonstrates good agreement with simulation at each design stage. The measured optical performance of the sensor is demonstrated using modulated light signals and in vivo blood flow experiments. Images showing blood flow changes with arterial occlusion and an inflammatory response to a histamine skin-prick demonstrate that the sensor array is capable of detecting blood flow signals from tissue.

  2. Laser doppler blood flow imaging using a CMOS imaging sensor with on-chip signal processing.

    Science.gov (United States)

    He, Diwei; Nguyen, Hoang C; Hayes-Gill, Barrie R; Zhu, Yiqun; Crowe, John A; Gill, Cally; Clough, Geraldine F; Morgan, Stephen P

    2013-09-18

    The first fully integrated 2D CMOS imaging sensor with on-chip signal processing for applications in laser Doppler blood flow (LDBF) imaging has been designed and tested. To obtain a space efficient design over 64 × 64 pixels means that standard processing electronics used off-chip cannot be implemented. Therefore the analog signal processing at each pixel is a tailored design for LDBF signals with balanced optimization for signal-to-noise ratio and silicon area. This custom made sensor offers key advantages over conventional sensors, viz. the analog signal processing at the pixel level carries out signal normalization; the AC amplification in combination with an anti-aliasing filter allows analog-to-digital conversion with a low number of bits; low resource implementation of the digital processor enables on-chip processing and the data bottleneck that exists between the detector and processing electronics has been overcome. The sensor demonstrates good agreement with simulation at each design stage. The measured optical performance of the sensor is demonstrated using modulated light signals and in vivo blood flow experiments. Images showing blood flow changes with arterial occlusion and an inflammatory response to a histamine skin-prick demonstrate that the sensor array is capable of detecting blood flow signals from tissue.

  3. Computational On-Chip Imaging of Nanoparticles and Biomolecules using Ultraviolet Light

    KAUST Repository

    Daloglu, Mustafa Ugur; Ray, Aniruddha; Gorocs, Zoltan; Xiong, Matthew; Malik, Ravinder; Bitan, Gal; McLeod, Euan; Ozcan, Aydogan

    2017-01-01

    wavelength (UV) of 266 nm. The increased forward scattering from nanoscale objects at this short wavelength has enabled us to detect individual sub-30 nm nanoparticles over a large field-of-view of >16 mm2 using an on-chip imaging platform, where the sample

  4. Magnetically engineered smart thin films: toward lab-on-chip ultra-sensitive molecular imaging.

    Science.gov (United States)

    Hassan, Muhammad A; Saqib, Mudassara; Shaikh, Haseeb; Ahmad, Nasir M; Elaissari, Abdelhamid

    2013-03-01

    Magnetically responsive engineered smart thin films of nanoferrites as contrast agent are employed to develop surface based magnetic resonance imaging to acquire simple yet fast molecular imaging. The work presented here can be of significant potential for future lab-on-chip point-of-care diagnostics from the whole blood pool on almost any substrates to reduce or even prevent clinical studies involve a living organism to enhance the non-invasive imaging to advance the '3Rs' of work in animals-replacement, refinement and reduction.

  5. Computational On-Chip Imaging of Nanoparticles and Biomolecules using Ultraviolet Light

    KAUST Repository

    Daloglu, Mustafa Ugur

    2017-03-09

    Significant progress in characterization of nanoparticles and biomolecules was enabled by the development of advanced imaging equipment with extreme spatial-resolution and sensitivity. To perform some of these analyses outside of well-resourced laboratories, it is necessary to create robust and cost-effective alternatives to existing high-end laboratory-bound imaging and sensing equipment. Towards this aim, we have designed a holographic on-chip microscope operating at an ultraviolet illumination wavelength (UV) of 266 nm. The increased forward scattering from nanoscale objects at this short wavelength has enabled us to detect individual sub-30 nm nanoparticles over a large field-of-view of >16 mm2 using an on-chip imaging platform, where the sample is placed at ≤0.5 mm away from the active area of an opto-electronic sensor-array, without any lenses in between. The strong absorption of this UV wavelength by biomolecules including nucleic acids and proteins has further enabled high-contrast imaging of nanoscopic aggregates of biomolecules, e.g., of enzyme Cu/Zn-superoxide dismutase, abnormal aggregation of which is linked to amyotrophic lateral sclerosis (ALS) - a fatal neurodegenerative disease. This UV-based wide-field computational imaging platform could be valuable for numerous applications in biomedical sciences and environmental monitoring, including disease diagnostics, viral load measurements as well as air- and water-quality assessment.

  6. Computational On-Chip Imaging of Nanoparticles and Biomolecules using Ultraviolet Light.

    Science.gov (United States)

    Daloglu, Mustafa Ugur; Ray, Aniruddha; Gorocs, Zoltan; Xiong, Matthew; Malik, Ravinder; Bitan, Gal; McLeod, Euan; Ozcan, Aydogan

    2017-03-09

    Significant progress in characterization of nanoparticles and biomolecules was enabled by the development of advanced imaging equipment with extreme spatial-resolution and sensitivity. To perform some of these analyses outside of well-resourced laboratories, it is necessary to create robust and cost-effective alternatives to existing high-end laboratory-bound imaging and sensing equipment. Towards this aim, we have designed a holographic on-chip microscope operating at an ultraviolet illumination wavelength (UV) of 266 nm. The increased forward scattering from nanoscale objects at this short wavelength has enabled us to detect individual sub-30 nm nanoparticles over a large field-of-view of >16 mm 2 using an on-chip imaging platform, where the sample is placed at ≤0.5 mm away from the active area of an opto-electronic sensor-array, without any lenses in between. The strong absorption of this UV wavelength by biomolecules including nucleic acids and proteins has further enabled high-contrast imaging of nanoscopic aggregates of biomolecules, e.g., of enzyme Cu/Zn-superoxide dismutase, abnormal aggregation of which is linked to amyotrophic lateral sclerosis (ALS) - a fatal neurodegenerative disease. This UV-based wide-field computational imaging platform could be valuable for numerous applications in biomedical sciences and environmental monitoring, including disease diagnostics, viral load measurements as well as air- and water-quality assessment.

  7. Reducing weight precision of convolutional neural networks towards large-scale on-chip image recognition

    Science.gov (United States)

    Ji, Zhengping; Ovsiannikov, Ilia; Wang, Yibing; Shi, Lilong; Zhang, Qiang

    2015-05-01

    In this paper, we develop a server-client quantization scheme to reduce bit resolution of deep learning architecture, i.e., Convolutional Neural Networks, for image recognition tasks. Low bit resolution is an important factor in bringing the deep learning neural network into hardware implementation, which directly determines the cost and power consumption. We aim to reduce the bit resolution of the network without sacrificing its performance. To this end, we design a new quantization algorithm called supervised iterative quantization to reduce the bit resolution of learned network weights. In the training stage, the supervised iterative quantization is conducted via two steps on server - apply k-means based adaptive quantization on learned network weights and retrain the network based on quantized weights. These two steps are alternated until the convergence criterion is met. In this testing stage, the network configuration and low-bit weights are loaded to the client hardware device to recognize coming input in real time, where optimized but expensive quantization becomes infeasible. Considering this, we adopt a uniform quantization for the inputs and internal network responses (called feature maps) to maintain low on-chip expenses. The Convolutional Neural Network with reduced weight and input/response precision is demonstrated in recognizing two types of images: one is hand-written digit images and the other is real-life images in office scenarios. Both results show that the new network is able to achieve the performance of the neural network with full bit resolution, even though in the new network the bit resolution of both weight and input are significantly reduced, e.g., from 64 bits to 4-5 bits.

  8. An Ultra-Low Power CMOS Image Sensor with On-Chip Energy Harvesting and Power Management Capability

    Directory of Open Access Journals (Sweden)

    Ismail Cevik

    2015-03-01

    Full Text Available An ultra-low power CMOS image sensor with on-chip energy harvesting and power management capability is introduced in this paper. The photodiode pixel array can not only capture images but also harvest solar energy. As such, the CMOS image sensor chip is able to switch between imaging and harvesting modes towards self-power operation. Moreover, an on-chip maximum power point tracking (MPPT-based power management system (PMS is designed for the dual-mode image sensor to further improve the energy efficiency. A new isolated P-well energy harvesting and imaging (EHI pixel with very high fill factor is introduced. Several ultra-low power design techniques such as reset and select boosting techniques have been utilized to maintain a wide pixel dynamic range. The chip was designed and fabricated in a 1.8 V, 1P6M 0.18 µm CMOS process. Total power consumption of the imager is 6.53 µW for a 96 × 96 pixel array with 1 V supply and 5 fps frame rate. Up to 30 μW of power could be generated by the new EHI pixels. The PMS is capable of providing 3× the power required during imaging mode with 50% efficiency allowing energy autonomous operation with a 72.5% duty cycle.

  9. An ultra-low power CMOS image sensor with on-chip energy harvesting and power management capability.

    Science.gov (United States)

    Cevik, Ismail; Huang, Xiwei; Yu, Hao; Yan, Mei; Ay, Suat U

    2015-03-06

    An ultra-low power CMOS image sensor with on-chip energy harvesting and power management capability is introduced in this paper. The photodiode pixel array can not only capture images but also harvest solar energy. As such, the CMOS image sensor chip is able to switch between imaging and harvesting modes towards self-power operation. Moreover, an on-chip maximum power point tracking (MPPT)-based power management system (PMS) is designed for the dual-mode image sensor to further improve the energy efficiency. A new isolated P-well energy harvesting and imaging (EHI) pixel with very high fill factor is introduced. Several ultra-low power design techniques such as reset and select boosting techniques have been utilized to maintain a wide pixel dynamic range. The chip was designed and fabricated in a 1.8 V, 1P6M 0.18 µm CMOS process. Total power consumption of the imager is 6.53 µW for a 96 × 96 pixel array with 1 V supply and 5 fps frame rate. Up to 30 μW of power could be generated by the new EHI pixels. The PMS is capable of providing 3× the power required during imaging mode with 50% efficiency allowing energy autonomous operation with a 72.5% duty cycle.

  10. Development of on-chip multi-imaging flow cytometry for identification of imaging biomarkers of clustered circulating tumor cells.

    Directory of Open Access Journals (Sweden)

    Hyonchol Kim

    Full Text Available An on-chip multi-imaging flow cytometry system has been developed to obtain morphometric parameters of cell clusters such as cell number, perimeter, total cross-sectional area, number of nuclei and size of clusters as "imaging biomarkers", with simultaneous acquisition and analysis of both bright-field (BF and fluorescent (FL images at 200 frames per second (fps; by using this system, we examined the effectiveness of using imaging biomarkers for the identification of clustered circulating tumor cells (CTCs. Sample blood of rats in which a prostate cancer cell line (MAT-LyLu had been pre-implanted was applied to a microchannel on a disposable microchip after staining the nuclei using fluorescent dye for their visualization, and the acquired images were measured and compared with those of healthy rats. In terms of the results, clustered cells having (1 cell area larger than 200 µm2 and (2 nucleus area larger than 90 µm2 were specifically observed in cancer cell-implanted blood, but were not observed in healthy rats. In addition, (3 clusters having more than 3 nuclei were specific for cancer-implanted blood and (4 a ratio between the actual perimeter and the perimeter calculated from the obtained area, which reflects a shape distorted from ideal roundness, of less than 0.90 was specific for all clusters having more than 3 nuclei and was also specific for cancer-implanted blood. The collected clusters larger than 300 µm2 were examined by quantitative gene copy number assay, and were identified as being CTCs. These results indicate the usefulness of the imaging biomarkers for characterizing clusters, and all of the four examined imaging biomarkers-cluster area, nuclei area, nuclei number, and ratio of perimeter-can identify clustered CTCs in blood with the same level of preciseness using multi-imaging cytometry.

  11. Applications of holographic on-chip microscopy (Conference Presentation)

    Science.gov (United States)

    Ozcan, Aydogan

    2017-02-01

    My research focuses on the use of computation/algorithms to create new optical microscopy, sensing, and diagnostic techniques, significantly improving existing tools for probing micro- and nano-objects while also simplifying the designs of these analysis tools. In this presentation, I will introduce a set of computational microscopes which use lens-free on-chip imaging to replace traditional lenses with holographic reconstruction algorithms. Basically, 3D images of specimens are reconstructed from their "shadows" providing considerably improved field-of-view (FOV) and depth-of-field, thus enabling large sample volumes to be rapidly imaged, even at nanoscale. These new computational microscopes routinely generate benefit of this technology is that it lends itself to field-portable and cost-effective designs which easily integrate with smartphones to conduct giga-pixel tele-pathology and microscopy even in resource-poor and remote settings where traditional techniques are difficult to implement and sustain, thus opening the door to various telemedicine applications in global health. Through the development of similar computational imagers, I will also report the discovery of new 3D swimming patterns observed in human and animal sperm. One of this newly discovered and extremely rare motion is in the form of "chiral ribbons" where the planar swings of the sperm head occur on an osculating plane creating in some cases a helical ribbon and in some others a twisted ribbon. Shedding light onto the statistics and biophysics of various micro-swimmers' 3D motion, these results provide an important example of how biomedical imaging significantly benefits from emerging computational algorithms/theories, revolutionizing existing tools for observing various micro- and nano-scale phenomena in innovative, high-throughput, and yet cost-effective ways.

  12. Towards on-chip integration of brain imaging photodetectors using standard CMOS process.

    Science.gov (United States)

    Kamrani, Ehsan; Lesage, Frederic; Sawan, Mohamad

    2013-01-01

    The main effects of on-chip integration on the performance and efficiency of silicon avalanche photodiode (SiAPD) and photodetector front-end is addressed in this paper based on the simulation and fabrication experiments. Two different silicon APDs are fabricated separately and also integrated with a transimpedance amplifier (TIA) front-end using standard CMOS technology. SiAPDs are designed in p+/n-well structure with guard rings realized in different shapes. The TIA front-end has been designed using distributed-gain concept combined with resistive-feedback and common-gate topology to reach low-noise and high gain-bandwidth product (GBW) characteristics. The integrated SiAPDs show higher signal-to-noise ratio (SNR), sensitivity and detection efficiency comparing to the separate SiAPDs. The integration does not show a significant effect on the gain and preserves the low power consumption. Using APDs with p-well guard-ring is preferred due to the higher observed efficiency after integration.

  13. A System-on-Chip Solution for Point-of-Care Ultrasound Imaging Systems: Architecture and ASIC Implementation.

    Science.gov (United States)

    Kang, Jeeun; Yoon, Changhan; Lee, Jaejin; Kye, Sang-Bum; Lee, Yongbae; Chang, Jin Ho; Kim, Gi-Duck; Yoo, Yangmo; Song, Tai-kyong

    2016-04-01

    In this paper, we present a novel system-on-chip (SOC) solution for a portable ultrasound imaging system (PUS) for point-of-care applications. The PUS-SOC includes all of the signal processing modules (i.e., the transmit and dynamic receive beamformer modules, mid- and back-end processors, and color Doppler processors) as well as an efficient architecture for hardware-based imaging methods (e.g., dynamic delay calculation, multi-beamforming, and coded excitation and compression). The PUS-SOC was fabricated using a UMC 130-nm NAND process and has 16.8 GFLOPS of computing power with a total equivalent gate count of 12.1 million, which is comparable to a Pentium-4 CPU. The size and power consumption of the PUS-SOC are 27×27 mm(2) and 1.2 W, respectively. Based on the PUS-SOC, a prototype hand-held US imaging system was implemented. Phantom experiments demonstrated that the PUS-SOC can provide appropriate image quality for point-of-care applications with a compact PDA size ( 200×120×45 mm(3)) and 3 hours of battery life.

  14. Imaging through scattering microfluidic channels by digital holography for information recovery in lab on chip.

    Science.gov (United States)

    Bianco, V; Paturzo, M; Gennari, O; Finizio, A; Ferraro, P

    2013-10-07

    We tackle the problem of information recovery and imaging through scattering microfluidic chips by means of digital holography (DH). In many cases the chip can become opalescent due to residual deposits settling down the inner channel faces, biofilm formation, scattering particle uptake by the channel cladding or its damaging by corrosive substances, or even by condensing effect on the exterior channels walls. In these cases white-light imaging is severely degraded and no information is obtainable at all about the flowing samples. Here we investigate the problem of counting and estimating velocity of cells flowing inside a scattering chip. Moreover we propose and test a method based on the recording of multiple digital holograms to retrieve improved phase-contrast images despite the strong scattering effect. This method helps, thanks to DH, to recover information which, otherwise, would be completely lost.

  15. Dynamic quantitative analysis of adherent cell cultures by means of lens-free video microscopy

    Science.gov (United States)

    Allier, C.; Vincent, R.; Navarro, F.; Menneteau, M.; Ghenim, L.; Gidrol, X.; Bordy, T.; Hervé, L.; Cioni, O.; Bardin, S.; Bornens, M.; Usson, Y.; Morales, S.

    2018-02-01

    We present our implementation of lens-free video microscopy setup for the monitoring of adherent cell cultures. We use a multi-wavelength LED illumination together with a dedicated holographic reconstruction algorithm that allows for an efficient removal of twin images from the reconstructed phase image for densities up to those of confluent cell cultures (>500 cells/mm2). We thereby demonstrate that lens-free video microscopy, with a large field of view ( 30 mm2) can enable us to capture the images of thousands of cells simultaneously and directly inside the incubator. It is then possible to trace and quantify single cells along several cell cycles. We thus prove that lens-free microscopy is a quantitative phase imaging technique enabling estimation of several metrics at the single cell level as a function of time, for example the area, dry mass, maximum thickness, major axis length and aspect ratio of each cell. Combined with cell tracking, it is then possible to extract important parameters such as the initial cell dry mass (just after cell division), the final cell dry mass (just before cell division), the average cell growth rate, and the cell cycle duration. As an example, we discuss the monitoring of a HeLa cell cultures which provided us with a data-set featuring more than 10 000 cell cycle tracks and more than 2x106 cell morphological measurements in a single time-lapse.

  16. On-chip integrated functional near infra-red spectroscopy (fNIRS) photoreceiver for portable brain imaging

    Science.gov (United States)

    Kamrani, Ehsan

    Optical brain imaging using functional near infra-red spectroscopy (fNIRS) offers a direct and noninvasive tool for monitoring of blood oxygenation. fNIRS is a noninvasive, safe, minimally intrusive, and high temporal-resolution technique for real-time and long-term brain imaging. It allows detecting both fast-neuronal and slow-hemodynamic signals. Besides the significant advantages of fNIRS systems, they still suffer from few drawbacks including low spatial-resolution, moderately high-level noise and high-sensitivity to movement. In order to overcome the limitations of currently available non-portable fNIRS systems, we have introduced a new low-power, miniaturized on-chip photodetector front-end intended for portable fNIRS systems. It includes silicon avalanche photodiode (SiAPD), Transimpedance amplifier (TIA), and Quench- Reset circuitry implemented using standard CMOS technologies to operate in both linear and Geiger modes. So it can be applied for both continuous-wave fNIRS (CW-fNIRS) and also single-photon counting applications. Several SiAPDs have been implemented in novel structures and shapes (Rectangular, Octagonal, Dual, Nested, Netted, Quadratic and Hexadecagonal) using different premature edge breakdown prevention techniques. The main characteristics of the SiAPDs are validated and the impact of each parameter and the device simulators (TCAD, COMSOL, etc.) have been studied based on the simulation and measurement results. Proposed techniques exhibit SiAPDs with high avalanche-gain (up to 119), low breakdown-voltage (around 12V) and high photon-detection efficiency (up to 72% in NIR region) in additional to a low dark-count rate (down to 30Hz at 1V excess bias voltage). Three new high gain-bandwidth product (GBW) and low-noise TIAs are introduced and implemented based on distributed-gain concept, logarithmic-amplification and automatic noise-rejection and have been applied in linear-mode of operation. The implemented TIAs offer a power

  17. 3D+time acquisitions of 3D cell culture by means of lens-free tomographic microscopy

    Science.gov (United States)

    Berdeu, Anthony; Laperrousaz, Bastien; Bordy, Thomas; Morales, S.; Gidrol, Xavier; Picollet-D'hahan, Nathalie; Allier, Cédric

    2018-02-01

    We propose a three-dimensional (3D) imaging platform based on lens-free microscopy to perform multi-angle acquisitions on 3D cell cultures embedded in extracellular matrix (ECM). We developed algorithms based on the Fourier diffraction theorem to perform fully 3D reconstructions of biological samples and we adapted the lens-free microscope to incubator conditions. Here we demonstrate for the first time, 3D+time lens-free acquisitions of 3D cell culture over 8 days directly into the incubator. The 3D reconstructed volume is as large as 5 mm3 and provides a unique way to observe in the same 3D cell culture experiment multiple cell migration strategies. Namely, in a 3D cell culture of prostate epithelial cells embedded within a Matrigel® matrix, we are able to distinguish single cell 'leaders', migration of cell clusters, migration of large aggregates of cells, and also close-gap and large-scale branching. In addition, we observe long-scale 3D deformations of the ECM that modify the geometry of the 3D cell culture. Interestingly, we also observed the opposite, i.e. we found that large aggregates of cells may deform the ECM by generating traction forces over very long distances. In sum we put forward a novel 3D lens-free microscopy tomographic technique to study the single and collective cell migrations, the cell-to-cell interactions and the cell-to-matrix interactions.

  18. Multiocular image sensor with on-chip beam-splitter and inner meta-micro-lens for single-main-lens stereo camera.

    Science.gov (United States)

    Koyama, Shinzo; Onozawa, Kazutoshi; Tanaka, Keisuke; Saito, Shigeru; Kourkouss, Sahim Mohamed; Kato, Yoshihisa

    2016-08-08

    We developed multiocular 1/3-inch 2.75-μm-pixel-size 2.1M- pixel image sensors by co-design of both on-chip beam-splitter and 100-nm-width 800-nm-depth patterned inner meta-micro-lens for single-main-lens stereo camera systems. A camera with the multiocular image sensor can capture horizontally one-dimensional light filed by both the on-chip beam-splitter horizontally dividing ray according to incident angle, and the inner meta-micro-lens collecting the divided ray into pixel with small optical loss. Cross-talks between adjacent light field images of a fabricated binocular image sensor and of a quad-ocular image sensor are as low as 6% and 7% respectively. With the selection of two images from one-dimensional light filed images, a selective baseline for stereo vision is realized to view close objects with single-main-lens. In addition, by adding multiple light field images with different ratios, baseline distance can be tuned within an aperture of a main lens. We suggest the electrically selective or tunable baseline stereo vision to reduce 3D fatigue of viewers.

  19. Sparsity-Based Pixel Super Resolution for Lens-Free Digital In-line Holography.

    Science.gov (United States)

    Song, Jun; Leon Swisher, Christine; Im, Hyungsoon; Jeong, Sangmoo; Pathania, Divya; Iwamoto, Yoshiko; Pivovarov, Misha; Weissleder, Ralph; Lee, Hakho

    2016-04-21

    Lens-free digital in-line holography (LDIH) is a promising technology for portable, wide field-of-view imaging. Its resolution, however, is limited by the inherent pixel size of an imaging device. Here we present a new computational approach to achieve sub-pixel resolution for LDIH. The developed method is a sparsity-based reconstruction with the capability to handle the non-linear nature of LDIH. We systematically characterized the algorithm through simulation and LDIH imaging studies. The method achieved the spatial resolution down to one-third of the pixel size, while requiring only single-frame imaging without any hardware modifications. This new approach can be used as a general framework to enhance the resolution in nonlinear holographic systems.

  20. Image sensor pixel with on-chip high extinction ratio polarizer based on 65-nm standard CMOS technology.

    Science.gov (United States)

    Sasagawa, Kiyotaka; Shishido, Sanshiro; Ando, Keisuke; Matsuoka, Hitoshi; Noda, Toshihiko; Tokuda, Takashi; Kakiuchi, Kiyomi; Ohta, Jun

    2013-05-06

    In this study, we demonstrate a polarization sensitive pixel for a complementary metal-oxide-semiconductor (CMOS) image sensor based on 65-nm standard CMOS technology. Using such a deep-submicron CMOS technology, it is possible to design fine metal patterns smaller than the wavelengths of visible light by using a metal wire layer. We designed and fabricated a metal wire grid polarizer on a 20 × 20 μm(2) pixel for image sensor. An extinction ratio of 19.7 dB was observed at a wavelength 750 nm.

  1. Fully Automated On-Chip Imaging Flow Cytometry System with Disposable Contamination-Free Plastic Re-Cultivation Chip

    Directory of Open Access Journals (Sweden)

    Tomoyuki Kaneko

    2011-06-01

    Full Text Available We have developed a novel imaging cytometry system using a poly(methyl methacrylate (PMMA based microfluidic chip. The system was contamination-free, because sample suspensions contacted only with a flammable PMMA chip and no other component of the system. The transparency and low-fluorescence of PMMA was suitable for microscopic imaging of cells flowing through microchannels on the chip. Sample particles flowing through microchannels on the chip were discriminated by an image-recognition unit with a high-speed camera in real time at the rate of 200 event/s, e.g., microparticles 2.5 μm and 3.0 μm in diameter were differentiated with an error rate of less than 2%. Desired cells were separated automatically from other cells by electrophoretic or dielectrophoretic force one by one with a separation efficiency of 90%. Cells in suspension with fluorescent dye were separated using the same kind of microfluidic chip. Sample of 5 μL with 1 × 106 particle/mL was processed within 40 min. Separated cells could be cultured on the microfluidic chip without contamination. The whole operation of sample handling was automated using 3D micropipetting system. These results showed that the novel imaging flow cytometry system is practically applicable for biological research and clinical diagnostics.

  2. Dynamics of cell and tissue growth acquired by means of extended field of view lensfree microscopy.

    Science.gov (United States)

    Momey, F; Coutard, J-G; Bordy, T; Navarro, F; Menneteau, M; Dinten, J-M; Allier, C

    2016-02-01

    In this paper, we discuss a new methodology based on lensfree imaging to perform wound healing assay with unprecedented statistics. Our video lensfree microscopy setup is a simple device featuring only a CMOS sensor and a semi coherent illumination system. Yet it is a powerful mean for the real-time monitoring of cultivated cells. It presents several key advantages, e.g. integration into standard incubator, compatibility with standard cell culture protocol, simplicity and ease of use. It can perform the follow-up in a large field of view (25 mm(2)) of several crucial parameters during the culture of cells i.e. their motility, their proliferation rate or their death. Consequently the setup can gather large statistics both in space and time. Here we uses this facility in the context of wound healing assay to perform label-free measurements of the velocities of the fronts of proliferation of the cell layer as a function of time by means of particle image velocimetry (PIV) processing. However, for such tissue growth experiments, the field of view of 25 mm(2) remains not sufficient and results can be biased depending on the position of the device with respect to the recipient of the cell culture. Hence, to conduct exhaustive wound healing assays, we propose to enlarge the field of view up to 10 cm(2) through a raster scan, by moving the source/sensor with respect to the Petri dish. We have performed acquisitions of wound healing assay (keratinocytes HaCaT) both in real-time (25 mm(2)) and in final point (10 cm(2)) to assess the combination of velocimetry measurements and final point wide field imaging. In the future, we aim at combining directly our extended field of view acquisitions (>10 cm(2)) with real time ability inside the incubator.

  3. Tunable on chip optofluidic laser

    DEFF Research Database (Denmark)

    Bakal, Avraham; Vannahme, Christoph; Kristensen, Anders

    2016-01-01

    On chip tunable laser is demonstrated by realizing a microfluidic droplet array. The periodicity is controlled by the pressure applied to two separate inlets, allowing to tune the lasing frequency over a broad spectral range.......On chip tunable laser is demonstrated by realizing a microfluidic droplet array. The periodicity is controlled by the pressure applied to two separate inlets, allowing to tune the lasing frequency over a broad spectral range....

  4. Integrated immunoassay using tuneable surface acoustic waves and lensfree detection.

    Science.gov (United States)

    Bourquin, Yannyk; Reboud, Julien; Wilson, Rab; Zhang, Yi; Cooper, Jonathan M

    2011-08-21

    The diagnosis of infectious diseases in the Developing World is technologically challenging requiring complex biological assays with a high analytical performance, at minimal cost. By using an opto-acoustic immunoassay technology, integrating components commonly used in mobile phone technologies, including surface acoustic wave (SAW) transducers to provide pressure driven flow and a CMOS camera to enable lensfree detection technique, we demonstrate the potential to produce such an assay. To achieve this, antibody functionalised microparticles were manipulated on a low-cost disposable cartridge using the surface acoustic waves and were then detected optically. Our results show that the biomarker, interferon-γ, used for the diagnosis of diseases such as latent tuberculosis, can be detected at pM concentrations, within a few minutes (giving high sensitivity at a minimal cost). This journal is © The Royal Society of Chemistry 2011

  5. Unconventional methods of imaging: computational microscopy and compact implementations

    Science.gov (United States)

    McLeod, Euan; Ozcan, Aydogan

    2016-07-01

    In the past two decades or so, there has been a renaissance of optical microscopy research and development. Much work has been done in an effort to improve the resolution and sensitivity of microscopes, while at the same time to introduce new imaging modalities, and make existing imaging systems more efficient and more accessible. In this review, we look at two particular aspects of this renaissance: computational imaging techniques and compact imaging platforms. In many cases, these aspects go hand-in-hand because the use of computational techniques can simplify the demands placed on optical hardware in obtaining a desired imaging performance. In the first main section, we cover lens-based computational imaging, in particular, light-field microscopy, structured illumination, synthetic aperture, Fourier ptychography, and compressive imaging. In the second main section, we review lensfree holographic on-chip imaging, including how images are reconstructed, phase recovery techniques, and integration with smart substrates for more advanced imaging tasks. In the third main section we describe how these and other microscopy modalities have been implemented in compact and field-portable devices, often based around smartphones. Finally, we conclude with some comments about opportunities and demand for better results, and where we believe the field is heading.

  6. Yeast viability and concentration analysis using lens-free computational microscopy and machine learning

    Science.gov (United States)

    Feizi, Alborz; Zhang, Yibo; Greenbaum, Alon; Guziak, Alex; Luong, Michelle; Chan, Raymond Yan Lok; Berg, Brandon; Ozkan, Haydar; Luo, Wei; Wu, Michael; Wu, Yichen; Ozcan, Aydogan

    2017-03-01

    Research laboratories and the industry rely on yeast viability and concentration measurements to adjust fermentation parameters such as pH, temperature, and pressure. Beer-brewing processes as well as biofuel production can especially utilize a cost-effective and portable way of obtaining data on cell viability and concentration. However, current methods of analysis are relatively costly and tedious. Here, we demonstrate a rapid, portable, and cost-effective platform for imaging and measuring viability and concentration of yeast cells. Our platform features a lens-free microscope that weighs 70 g and has dimensions of 12 × 4 × 4 cm. A partially-coherent illumination source (a light-emitting-diode), a band-pass optical filter, and a multimode optical fiber are used to illuminate the sample. The yeast sample is directly placed on a complementary metal-oxide semiconductor (CMOS) image sensor chip, which captures an in-line hologram of the sample over a large field-of-view of >20 mm2. The hologram is transferred to a touch-screen interface, where a trained Support Vector Machine model classifies yeast cells stained with methylene blue as live or dead and measures cell viability as well as concentration. We tested the accuracy of our platform against manual counting of live and dead cells using fluorescent exclusion staining and a bench-top fluorescence microscope. Our regression analysis showed no significant difference between the two methods within a concentration range of 1.4 × 105 to 1.4 × 106 cells/mL. This compact and cost-effective yeast analysis platform will enable automatic quantification of yeast viability and concentration in field settings and resource-limited environments.

  7. Lens-free microscopy of cerebrospinal fluid for the laboratory diagnosis of meningitis

    Science.gov (United States)

    Delacroix, Robin; Morel, Sophie Nhu An; Hervé, Lionel; Bordy, Thomas; Blandin, Pierre; Dinten, Jean-Marc; Drancourt, Michel; Allier, Cédric

    2018-02-01

    The cytology of the cerebrospinal fluid is traditionally performed by an operator (physician, biologist) by means of a conventional light microscope. The operator visually counts the leukocytes (white blood cells) present in a sample of cerebrospinal fluid (10 μl). It is a tedious job and the result is operator-dependent. Here in order to circumvent the limitations of manual counting, we approach the question of numeration of erythrocytes and leukocytes for the cytological diagnosis of meningitis by means of lens-free microscopy. In a first step, a prospective counts of leukocytes was performed by five different operators using conventional optical microscopy. The visual counting yielded an overall 16.7% misclassification of 72 cerebrospinal fluid specimens in meningitis/non-meningitis categories using a 10 leukocyte/μL cut-off. In a second step, the lens-free microscopy algorithm was adapted step-by-step for counting cerebrospinal fluid cells and discriminating leukocytes from erythrocytes. The optimization of the automatic lens-free counting was based on the prospective analysis of 215 cerebrospinal fluid specimens. The optimized algorithm yielded a 100% sensitivity and a 86% specificity compared to confirmed diagnostics. In a third step, a blind lens-free microscopic analysis of 116 cerebrospinal fluid specimens, including six cases of microbiology confirmed infectious meningitis, yielded a 100% sensitivity and a 79% specificity. Adapted lens-free microscopy is thus emerging as an operator-independent technique for the rapid numeration of leukocytes and erythrocytes in cerebrospinal fluid. In particular, this technique is well suited to the rapid diagnosis of meningitis at point-of-care laboratories.

  8. Statistical Analysis of the Random Telegraph Noise in a 1.1 μm Pixel, 8.3 MP CMOS Image Sensor Using On-Chip Time Constant Extraction Method.

    Science.gov (United States)

    Chao, Calvin Yi-Ping; Tu, Honyih; Wu, Thomas Meng-Hsiu; Chou, Kuo-Yu; Yeh, Shang-Fu; Yin, Chin; Lee, Chih-Lin

    2017-11-23

    A study of the random telegraph noise (RTN) of a 1.1 μm pitch, 8.3 Mpixel CMOS image sensor (CIS) fabricated in a 45 nm backside-illumination (BSI) technology is presented in this paper. A noise decomposition scheme is used to pinpoint the noise source. The long tail of the random noise (RN) distribution is directly linked to the RTN from the pixel source follower (SF). The full 8.3 Mpixels are classified into four categories according to the observed RTN histogram peaks. A theoretical formula describing the RTN as a function of the time difference between the two phases of the correlated double sampling (CDS) is derived and validated by measured data. An on-chip time constant extraction method is developed and applied to the RTN analysis. The effects of readout circuit bandwidth on the settling ratios of the RTN histograms are investigated and successfully accounted for in a simulation using a RTN behavior model.

  9. Micro-electro-fluidic grids for nematodes: a lens-less, image-sensor-less approach for on-chip tracking of nematode locomotion.

    Science.gov (United States)

    Liu, Peng; Martin, Richard J; Dong, Liang

    2013-02-21

    This paper reports on the development of a lens-less and image-sensor-less micro-electro-fluidic (MEF) approach for real-time monitoring of the locomotion of microscopic nematodes. The technology showed promise for overcoming the constraint of the limited field of view of conventional optical microscopy, with relatively low cost, good spatial resolution, and high portability. The core of the device was microelectrode grids formed by orthogonally arranging two identical arrays of microelectrode lines. The two microelectrode arrays were spaced by a microfluidic chamber containing a liquid medium of interest. As a nematode (e.g., Caenorhabditis elegans) moved inside the chamber, the invasion of part of its body into some intersection regions between the microelectrodes caused changes in the electrical resistance of these intersection regions. The worm's presence at, or absence from, a detection unit was determined by a comparison between the measured resistance variation of this unit and a pre-defined threshold resistance variation. An electronic readout circuit was designed to address all the detection units and read out their individual electrical resistances. By this means, it was possible to obtain the electrical resistance profile of the whole MEF grid, and thus, the physical pattern of the swimming nematode. We studied the influence of a worm's body on the resistance of an addressed unit. We also investigated how the full-frame scanning and readout rates of the electronic circuit and the dimensions of a detection unit posed an impact on the spatial resolution of the reconstructed images of the nematode. Other important issues, such as the manufacturing-induced initial non-uniformity of the grids and the electrotaxic behaviour of nematodes, were also studied. A drug resistance screening experiment was conducted by using the grids with a good resolution of 30 × 30 μm(2). The phenotypic differences in the locomotion behaviours (e.g., moving speed and oscillation

  10. Photonic network-on-chip design

    CERN Document Server

    Bergman, Keren; Biberman, Aleksandr; Chan, Johnnie; Hendry, Gilbert

    2013-01-01

    This book provides a comprehensive synthesis of the theory and practice of photonic devices for networks-on-chip. It outlines the issues in designing photonic network-on-chip architectures for future many-core high performance chip multiprocessors. The discussion is built from the bottom up: starting with the design and implementation of key photonic devices and building blocks, reviewing networking and network-on-chip theory and existing research, and finishing with describing various architectures, their characteristics, and the impact they will have on a computing system. After acquainting

  11. On-chip power delivery and management

    CERN Document Server

    Vaisband, Inna P; Popovich, Mikhail; Mezhiba, Andrey V; Köse, Selçuk; Friedman, Eby G

    2016-01-01

    This book describes methods for distributing power in high speed, high complexity integrated circuits with power levels exceeding many tens of watts and power supplies below a volt. It provides a broad and cohesive treatment of power delivery and management systems and related design problems, including both circuit network models and design techniques for on-chip decoupling capacitors, providing insight and intuition into the behavior and design of on-chip power distribution systems. Organized into subareas to provide a more intuitive flow to the reader, this fourth edition adds more than a hundred pages of new content, including inductance models for interdigitated structures, design strategies for multi-layer power grids, advanced methods for efficient power grid design and analysis, and methodologies for simultaneously placing on-chip multiple power supplies and decoupling capacitors. The emphasis of this additional material is on managing the complexity of on-chip power distribution networks.

  12. SVM classifier on chip for melanoma detection.

    Science.gov (United States)

    Afifi, Shereen; GholamHosseini, Hamid; Sinha, Roopak

    2017-07-01

    Support Vector Machine (SVM) is a common classifier used for efficient classification with high accuracy. SVM shows high accuracy for classifying melanoma (skin cancer) clinical images within computer-aided diagnosis systems used by skin cancer specialists to detect melanoma early and save lives. We aim to develop a medical low-cost handheld device that runs a real-time embedded SVM-based diagnosis system for use in primary care for early detection of melanoma. In this paper, an optimized SVM classifier is implemented onto a recent FPGA platform using the latest design methodology to be embedded into the proposed device for realizing online efficient melanoma detection on a single system on chip/device. The hardware implementation results demonstrate a high classification accuracy of 97.9% and a significant acceleration factor of 26 from equivalent software implementation on an embedded processor, with 34% of resources utilization and 2 watts for power consumption. Consequently, the implemented system meets crucial embedded systems constraints of high performance and low cost, resources utilization and power consumption, while achieving high classification accuracy.

  13. Variation Tolerant On-Chip Interconnects

    CERN Document Server

    Nigussie, Ethiopia Enideg

    2012-01-01

    This book presents design techniques, analysis and implementation of high performance and power efficient, variation tolerant on-chip interconnects.  Given the design paradigm shift to multi-core, interconnect-centric designs and the increase in sources of variability and their impact in sub-100nm technologies, this book will be an invaluable reference for anyone concerned with the design of next generation, high-performance electronics systems. Provides comprehensive, circuit-level explanation of high-performance, energy-efficient, variation-tolerant on-chip interconnect; Describes design techniques to mitigate problems caused by variation; Includes techniques for design and implementation of self-timed on-chip interconnect, delay variation insensitive communication protocols, high speed signaling techniques and circuits, bit-width independent completion detection and process, voltage and temperature variation tolerance.                          

  14. Cytostretch, an Organ-on-Chip Platform

    NARCIS (Netherlands)

    Gaio, N.; van Meer, B.; Quiros Solano, W.F.; Bergers, L.; van de Stolpe, A; Mummery, CL; Sarro, P.M.; Dekker, R.

    2016-01-01

    Organ-on-Chips (OOCs) are micro-fabricated devices which are used to culture cells in order to mimic functional units of human organs. The devices are designed to simulate the physiological environment of tissues in vivo. Cells in some types of OOCs can be stimulated in situ by electrical and/or

  15. On-chip mode division multiplexing technologies

    DEFF Research Database (Denmark)

    Ding, Yunhong; Frellsen, Louise Floor; Guan, Xiaowei

    2016-01-01

    Space division multiplexing (SDM) is currently widely investigated in order to provide enhanced capacity thanks to the utilization of space as a new degree of multiplexing freedom in both optical fiber communication and on-chip interconnects. Basic components allowing the processing of spatial...... photonic integrated circuit mode (de) multiplexer for few-mode fibers (FMFs)....

  16. CMOS On-Chip Optoelectronic Neural Interface Device with Integrated Light Source for Optogenetics

    International Nuclear Information System (INIS)

    Sawadsaringkarn, Y; Kimura, H; Maezawa, Y; Nakajima, A; Kobayashi, T; Sasagawa, K; Noda, T; Tokuda, T; Ohta, J

    2012-01-01

    A novel optoelectronic neural interface device is proposed for target applications in optogenetics for neural science. The device consists of a light emitting diode (LED) array implemented on a CMOS image sensor for on-chip local light stimulation. In this study, we designed a suitable CMOS image sensor equipped with on-chip electrodes to drive the LEDs, and developed a device structure and packaging process for LED integration. The prototype device produced an illumination intensity of approximately 1 mW with a driving current of 2.0 mA, which is expected to be sufficient to activate channelrhodopsin (ChR2). We also demonstrated the functions of light stimulation and on-chip imaging using a brain slice from a mouse as a target sample.

  17. Microengineered physiological biomimicry: organs-on-chips.

    Science.gov (United States)

    Huh, Dongeun; Torisawa, Yu-suke; Hamilton, Geraldine A; Kim, Hyun Jung; Ingber, Donald E

    2012-06-21

    Microscale engineering technologies provide unprecedented opportunities to create cell culture microenvironments that go beyond current three-dimensional in vitro models by recapitulating the critical tissue-tissue interfaces, spatiotemporal chemical gradients, and dynamic mechanical microenvironments of living organs. Here we review recent advances in this field made over the past two years that are focused on the development of 'Organs-on-Chips' in which living cells are cultured within microfluidic devices that have been microengineered to reconstitute tissue arrangements observed in living organs in order to study physiology in an organ-specific context and to develop specialized in vitro disease models. We discuss the potential of organs-on-chips as alternatives to conventional cell culture models and animal testing for pharmaceutical and toxicology applications. We also explore challenges that lie ahead if this field is to fulfil its promise to transform the future of drug development and chemical safety testing.

  18. On-Chip Microwave Quantum Hall Circulator

    Directory of Open Access Journals (Sweden)

    A. C. Mahoney

    2017-01-01

    Full Text Available Circulators are nonreciprocal circuit elements that are integral to technologies including radar systems, microwave communication transceivers, and the readout of quantum information devices. Their nonreciprocity arises from the interference of microwaves over the centimeter scale of the signal wavelength, in the presence of bulky magnetic media that breaks time-reversal symmetry. Here, we realize a completely passive on-chip microwave circulator with size 1/1000th the wavelength by exploiting the chiral, “slow-light” response of a two-dimensional electron gas in the quantum Hall regime. For an integrated GaAs device with 330  μm diameter and about 1-GHz center frequency, a nonreciprocity of 25 dB is observed over a 50-MHz bandwidth. Furthermore, the nonreciprocity can be dynamically tuned by varying the voltage at the port, an aspect that may enable reconfigurable passive routing of microwave signals on chip.

  19. Routing algorithms in networks-on-chip

    CERN Document Server

    Daneshtalab, Masoud

    2014-01-01

    This book provides a single-source reference to routing algorithms for Networks-on-Chip (NoCs), as well as in-depth discussions of advanced solutions applied to current and next generation, many core NoC-based Systems-on-Chip (SoCs). After a basic introduction to the NoC design paradigm and architectures, routing algorithms for NoC architectures are presented and discussed at all abstraction levels, from the algorithmic level to actual implementation.  Coverage emphasizes the role played by the routing algorithm and is organized around key problems affecting current and next generation, many-core SoCs. A selection of routing algorithms is included, specifically designed to address key issues faced by designers in the ultra-deep sub-micron (UDSM) era, including performance improvement, power, energy, and thermal issues, fault tolerance and reliability.   ·         Provides a comprehensive overview of routing algorithms for Networks-on-Chip and NoC-based, manycore systems; ·         Describe...

  20. On-chip antenna: Practical design and characterization considerations

    KAUST Repository

    Shamim, Atif; Salama, Khaled N.; Sedky, S.; Soliman, E. A.

    2012-01-01

    This paper highlights the challenges of an emergent field, namely, on-chip antenna design. Consistent with the RF System-on-Chip (SoC) concept, co-design strategy for circuits and on-chip antennas is described. A number of design and layout issues, arising from the highly integrated nature of this kind of systems, are discussed. The characterization difficulties related to on-chip antennas radiation properties are also highlighted. Finally, a novel on-wafer test fixture is proposed to measure the gain and radiation pattern of the on-chip antennas in the anechoic chamber.

  1. On-chip antenna: Practical design and characterization considerations

    KAUST Repository

    Shamim, Atif

    2012-07-28

    This paper highlights the challenges of an emergent field, namely, on-chip antenna design. Consistent with the RF System-on-Chip (SoC) concept, co-design strategy for circuits and on-chip antennas is described. A number of design and layout issues, arising from the highly integrated nature of this kind of systems, are discussed. The characterization difficulties related to on-chip antennas radiation properties are also highlighted. Finally, a novel on-wafer test fixture is proposed to measure the gain and radiation pattern of the on-chip antennas in the anechoic chamber.

  2. Computer System Design System-on-Chip

    CERN Document Server

    Flynn, Michael J

    2011-01-01

    The next generation of computer system designers will be less concerned about details of processors and memories, and more concerned about the elements of a system tailored to particular applications. These designers will have a fundamental knowledge of processors and other elements in the system, but the success of their design will depend on the skills in making system-level tradeoffs that optimize the cost, performance and other attributes to meet application requirements. This book provides a new treatment of computer system design, particularly for System-on-Chip (SOC), which addresses th

  3. On-chip digital power supply control for system-on-chip applications

    NARCIS (Netherlands)

    Meijer, M.; Pineda de Gyvez, J.; Otten, R.H.J.M.

    2005-01-01

    The authors presented an on-chip, fully-digital, power-supply control system. The scheme consists of two independent control loops that regulate power supply variations due to semiconductor process spread, temperature, and chip's workload. Smart power-switches working as linear voltage regulators

  4. Various on-chip sensors with microfluidics for biological applications.

    Science.gov (United States)

    Lee, Hun; Xu, Linfeng; Koh, Domin; Nyayapathi, Nikhila; Oh, Kwang W

    2014-09-12

    In this paper, we review recent advances in on-chip sensors integrated with microfluidics for biological applications. Since the 1990s, much research has concentrated on developing a sensing system using optical phenomena such as surface plasmon resonance (SPR) and surface-enhanced Raman scattering (SERS) to improve the sensitivity of the device. The sensing performance can be significantly enhanced with the use of microfluidic chips to provide effective liquid manipulation and greater flexibility. We describe an optical image sensor with a simpler platform for better performance over a larger field of view (FOV) and greater depth of field (DOF). As a new trend, we review consumer electronics such as smart phones, tablets, Google glasses, etc. which are being incorporated in point-of-care (POC) testing systems. In addition, we discuss in detail the current optical sensing system integrated with a microfluidic chip.

  5. Various On-Chip Sensors with Microfluidics for Biological Applications

    Directory of Open Access Journals (Sweden)

    Hun Lee

    2014-09-01

    Full Text Available In this paper, we review recent advances in on-chip sensors integrated with microfluidics for biological applications. Since the 1990s, much research has concentrated on developing a sensing system using optical phenomena such as surface plasmon resonance (SPR and surface-enhanced Raman scattering (SERS to improve the sensitivity of the device. The sensing performance can be significantly enhanced with the use of microfluidic chips to provide effective liquid manipulation and greater flexibility. We describe an optical image sensor with a simpler platform for better performance over a larger field of view (FOV and greater depth of field (DOF. As a new trend, we review consumer electronics such as smart phones, tablets, Google glasses, etc. which are being incorporated in point-of-care (POC testing systems. In addition, we discuss in detail the current optical sensing system integrated with a microfluidic chip.

  6. On-chip photonic particle sensor

    Science.gov (United States)

    Singh, Robin; Ma, Danhao; Agarwal, Anu; Anthony, Brian

    2018-02-01

    We propose an on-chip photonic particle sensor design that can perform particle sizing and counting for various environmental applications. The sensor is based on micro photonic ring resonators that are able to detect the presence of the free space particles through the interaction with their evanescent electric field tail. The sensor can characterize a wide range of the particle size ranging from a few nano meters to micron ( 1 micron). The photonic platform offers high sensitivity, compactness, fast response of the device. Further, FDTD simulations are performed to analyze different particle-light interactions. Such a compact and portable platform, packaged with integrated photonic circuit provides a useful sensing modality in space shuttle and environmental applications.

  7. On-Chip Bondwire Magnetics with Ferrite-Epoxy Glob Coating for Power Systems on Chip

    Directory of Open Access Journals (Sweden)

    Jian Lu

    2008-01-01

    Full Text Available A novel concept of on-chip bondwire inductors and transformers with ferrite epoxy glob coating is proposed to offer a cost effective approach realizing power systems on chip (SOC. We have investigated the concept both experimentally and with finite element modeling. A Q factor of 30–40 is experimentally demonstrated for the bondwire inductors which represents an improvement by a factor of 3–30 over the state-of-the-art MEMS micromachined inductors. Transformer parameters including self- and mutual inductance and coupling factors are extracted from both modeled and measured S-parameters. More importantly, the bondwire magnetic components can be easily integrated into SOC manufacturing processes with minimal changes and open enormous possibilities for realizing cost-effective, high-current, high-efficiency power SOCs.

  8. Energy Model of Networks-on-Chip and a Bus

    NARCIS (Netherlands)

    Wolkotte, P.T.; Smit, Gerardus Johannes Maria; Kavaldjiev, N.K.; Becker, Jens E.; Becker, Jürgen; Nurmi, J.; Takala, J.; Hamalainen, T.D.

    2005-01-01

    A Network-on-Chip (NoC) is an energy-efficient onchip communication architecture for Multi-Processor Systemon-Chip (MPSoC) architectures. In earlier papers we proposed two Network-on-Chip architectures based on packet-switching and circuit-switching. In this paper we derive an energy model for both

  9. Modelling, Synthesis, and Configuration of Networks-on-Chips

    DEFF Research Database (Denmark)

    Stuart, Matthias Bo

    This thesis presents three contributions in two different areas of network-on-chip and system-on-chip research: Application modelling and identifying and solving different optimization problems related to two specific network-on-chip architectures. The contribution related to application modelling...... is an analytical method for deriving the worst-case traffic pattern caused by an application and the cache-coherence protocol in a cache-coherent shared-memory system. The contributions related to network-on-chip optimization problems consist of two parts: The development and evaluation of six heuristics...... for solving the network synthesis problem in the MANGO network-on-chip, and the identification and formalization of the ReNoC configuration problem together with three heuristics for solving it....

  10. On-chip particle trapping and manipulation

    Science.gov (United States)

    Leake, Kaelyn Danielle

    The ability to control and manipulate the world around us is human nature. Humans and our ancestors have used tools for millions of years. Only in recent years have we been able to control objects at such small levels. In order to understand the world around us it is frequently necessary to interact with the biological world. Optical trapping and manipulation offer a non-invasive way to move, sort and interact with particles and cells to see how they react to the world around them. Optical tweezers are ideal in their abilities but they require large, non-portable, and expensive setups limiting how and where we can use them. A cheap portable platform is required in order to have optical manipulation reach its full potential. On-chip technology offers a great solution to this challenge. We focused on the Liquid-Core Anti-Resonant Reflecting Optical Waveguide (liquid-core ARROW) for our work. The ARROW is an ideal platform, which has anti-resonant layers which allow light to be guided in liquids, allowing for particles to easily be manipulated. It is manufactured using standard silicon manufacturing techniques making it easy to produce. The planner design makes it easy to integrate with other technologies. Initially I worked to improve the ARROW chip by reducing the intersection losses and by reducing the fluorescence and background on the ARROW chip. The ARROW chip has already been used to trap and push particles along its channel but here I introduce several new methods of particle trapping and manipulation on the ARROW chip. Traditional two beam traps use two counter propagating beams. A trapping scheme that uses two orthogonal beams which counter to first instinct allow for trapping at their intersection is introduced. This scheme is thoroughly predicted and analyzed using realistic conditions. Simulations of this method were done using a program which looks at both the fluidics and optical sources to model complex situations. These simulations were also used to

  11. Biosensors-on-chip: a topical review

    International Nuclear Information System (INIS)

    Chen, Sensen; Shamsi, Mohtashim H

    2017-01-01

    This review will examine the integration of two fields that are currently at the forefront of science, i.e. biosensors and microfluidics. As a lab-on-a-chip (LOC) technology, microfluidics has been enriched by the integration of various detection tools for analyte detection and quantitation. The application of such microfluidic platforms is greatly increased in the area of biosensors geared towards point-of-care diagnostics. Together, the merger of microfluidics and biosensors has generated miniaturized devices for sample processing and sensitive detection with quantitation. We believe that microfluidic biosensors (biosensors-on-chip) are essential for developing robust and cost effective point-of-care diagnostics. This review is relevant to a variety of disciplines, such as medical science, clinical diagnostics, LOC technologies including MEMs/NEMs, and analytical science. Specifically, this review will appeal to scientists working in the two overlapping fields of biosensors and microfluidics, and will also help new scientists to find their directions in developing point-of-care devices. (topical review)

  12. Cytostretch, an Organ-on-Chip Platform

    Directory of Open Access Journals (Sweden)

    Nikolas Gaio

    2016-07-01

    Full Text Available Organ-on-Chips (OOCs are micro-fabricated devices which are used to culture cells in order to mimic functional units of human organs. The devices are designed to simulate the physiological environment of tissues in vivo. Cells in some types of OOCs can be stimulated in situ by electrical and/or mechanical actuators. These actuations can mimic physiological conditions in real tissue and may include fluid or air flow, or cyclic stretch and strain as they occur in the lung and heart. These conditions similarly affect cultured cells and may influence their ability to respond appropriately to physiological or pathological stimuli. To date, most focus has been on devices specifically designed to culture just one functional unit of a specific organ: lung alveoli, kidney nephrons or blood vessels, for example. In contrast, the modular Cytostretch membrane platform described here allows OOCs to be customized to different OOC applications. The platform utilizes silicon-based micro-fabrication techniques that allow low-cost, high-volume manufacturing. We describe the platform concept and its modules developed to date. Membrane variants include membranes with (i through-membrane pores that allow biological signaling molecules to pass between two different tissue compartments; (ii a stretchable micro-electrode array for electrical monitoring and stimulation; (iii micro-patterning to promote cell alignment; and (iv strain gauges to measure changes in substrate stress. This paper presents the fabrication and the proof of functionality for each module of the Cytostretch membrane. The assessment of each additional module demonstrate that a wide range of OOCs can be achieved.

  13. Crosstalk in modern on-chip interconnects a FDTD approach

    CERN Document Server

    Kaushik, B K; Patnaik, Amalendu

    2016-01-01

    The book provides accurate FDTD models for on-chip interconnects, covering most recent advancements in materials and design. Furthermore, depending on the geometry and physical configurations, different electrical equivalent models for CNT and GNR based interconnects are presented. Based on the electrical equivalent models the performance comparison among the Cu, CNT and GNR-based interconnects are also discussed in the book. The proposed models are validated with the HSPICE simulations. The book introduces the current research scenario in the modeling of on-chip interconnects. It presents the structure, properties, and characteristics of graphene based on-chip interconnects and the FDTD modeling of Cu based on-chip interconnects. The model considers the non-linear effects of CMOS driver as well as the transmission line effects of interconnect line that includes coupling capacitance and mutual inductance effects. In a more realistic manner, the proposed model includes the effect of width-dependent MFP of the ...

  14. Error Control for Network-on-Chip Links

    CERN Document Server

    Fu, Bo

    2012-01-01

    As technology scales into nanoscale regime, it is impossible to guarantee the perfect hardware design. Moreover, if the requirement of 100% correctness in hardware can be relaxed, the cost of manufacturing, verification, and testing will be significantly reduced. Many approaches have been proposed to address the reliability problem of on-chip communications. This book focuses on the use of error control codes (ECCs) to improve on-chip interconnect reliability. Coverage includes detailed description of key issues in NOC error control faced by circuit and system designers, as well as practical error control techniques to minimize the impact of these errors on system performance. Provides a detailed background on the state of error control methods for on-chip interconnects; Describes the use of more complex concatenated codes such as Hamming Product Codes with Type-II HARQ, while emphasizing integration techniques for on-chip interconnect links; Examines energy-efficient techniques for integrating multiple error...

  15. Reliability, Availability and Serviceability of Networks-on-Chip

    CERN Document Server

    Cota, Érika; Soares Lubaszewski, Marcelo

    2012-01-01

    This book presents an overview of the issues related to the test, diagnosis and fault-tolerance of Network on Chip-based systems. It is the first book dedicated to the quality aspects of NoC-based systems and will serve as an invaluable reference to the problems, challenges, solutions, and trade-offs related to designing and implementing state-of-the-art, on-chip communication architectures.

  16. A CMOS Gm-C complex filter with on-chip automatic tuning for wireless sensor network application

    International Nuclear Information System (INIS)

    Wan Chuanchuan; Li Zhiqun; Hou Ningbing

    2011-01-01

    A G m -C complex filter with on-chip automatic tuning for wireless sensor networks is designed and implemented using 0.18 μm CMOS process. This filter is synthesized from a low-pass 5th-order Chebyshev RLC ladder filter prototype by means of capacitors and fully balanced transconductors. A conventional phase-locked loop is used to realize the on-chip automatic tuning for both center frequency and bandwidth control. The filter is centered at 2 MHz with a bandwidth of 2.4 MHz. The measured results show that the filter provides more than 45 dB image rejection while the ripple in the pass-band is less than 1.2 dB. The complete filter including on-chip tuning circuit consumes 4.9 mA with 1.8 V single supply voltage. (semiconductor integrated circuits)

  17. On-chip steering of entangled photons in nonlinear photonic crystals.

    Science.gov (United States)

    Leng, H Y; Yu, X Q; Gong, Y X; Xu, P; Xie, Z D; Jin, H; Zhang, C; Zhu, S N

    2011-08-16

    One promising technique for working toward practical photonic quantum technologies is to implement multiple operations on a monolithic chip, thereby improving stability, scalability and miniaturization. The on-chip spatial control of entangled photons will certainly benefit numerous applications, including quantum imaging, quantum lithography, quantum metrology and quantum computation. However, external optical elements are usually required to spatially control the entangled photons. Here we present the first experimental demonstration of on-chip spatial control of entangled photons, based on a domain-engineered nonlinear photonic crystal. We manipulate the entangled photons using the inherent properties of the crystal during the parametric downconversion, demonstrating two-photon focusing and beam-splitting from a periodically poled lithium tantalate crystal with a parabolic phase profile. These experimental results indicate that versatile and precise spatial control of entangled photons is achievable. Because they may be operated independent of any bulk optical elements, domain-engineered nonlinear photonic crystals may prove to be a valuable ingredient in on-chip integrated quantum optics.

  18. Towards a Generic and Adaptive System-On-Chip Controller for Space Exploration Instrumentation

    Science.gov (United States)

    Iturbe, Xabier; Keymeulen, Didier; Yiu, Patrick; Berisford, Dan; Hand, Kevin; Carlson, Robert; Ozer, Emre

    2015-01-01

    This paper introduces one of the first efforts conducted at NASA’s Jet Propulsion Laboratory (JPL) to develop a generic System-on-Chip (SoC) platform to control science instruments that are proposed for future NASA missions. The SoC platform is named APEX-SoC, where APEX stands for Advanced Processor for space Exploration, and is based on a hybrid Xilinx Zynq that combines an FPGA and an ARM Cortex-A9 dual-core processor on a single chip. The Zynq implements a generic and customizable on-chip infrastructure that can be reused with a variety of instruments, and it has been coupled with a set of off-chip components that are necessary to deal with the different instruments. We have taken JPL’s Compositional InfraRed Imaging Spectrometer (CIRIS), which is proposed for NASA icy moons missions, as a use-case scenario to demonstrate that the entire data processing, control and interface of an instrument can be implemented on a single device using the on-chip infrastructure described in this paper. We show that the performance results achieved in this preliminary version of the instrumentation controller are sufficient to fulfill the science requirements demanded to the CIRIS instrument in future NASA missions, such as Europa.

  19. Effect of on-chip filter on Coulomb blockade thermometer

    International Nuclear Information System (INIS)

    Roschier, L; Penttilä, J S; Gunnarsson, D; Prunnila, M; Meschke, M; Savin, A

    2012-01-01

    Coulomb Blockade Thermometer (CBT) is a primary thermometer based on electric conductance of normal tunnel junction arrays. One limitation for CBT use at the lowest temperatures has been due to environmental noise heating. To improve on this limitation, we have done measurements on CBT sensors fabricated with different on-chip filtering structures in a dilution refrigerator with a base temperature of 10 mK. The CBT sensors were produced with a wafer scale tunnel junction process. We present how the different on-chip filtering schemes affect the limiting saturation temperatures and show that CBT sensors with proper on-chip filtering work at temperatures below 20 mK and are tolerant to noisy environment.

  20. Designing network on-chip architectures in the nanoscale era

    CERN Document Server

    Flich, Jose

    2010-01-01

    Going beyond isolated research ideas and design experiences, Designing Network On-Chip Architectures in the Nanoscale Era covers the foundations and design methods of network on-chip (NoC) technology. The contributors draw on their own lessons learned to provide strong practical guidance on various design issues.Exploring the design process of the network, the first part of the book focuses on basic aspects of switch architecture and design, topology selection, and routing implementation. In the second part, contributors discuss their experiences in the industry, offering a roadmap to recent p

  1. Design of Networks-on-Chip for Real-Time Multi-Processor Systems-on-Chip

    DEFF Research Database (Denmark)

    Sparsø, Jens

    2012-01-01

    This paper addresses the design of networks-on-chips for use in multi-processor systems-on-chips - the hardware platforms used in embedded systems. These platforms typically have to guarantee real-time properties, and as the network is a shared resource, it has to provide service guarantees...... (bandwidth and/or latency) to different communication flows. The paper reviews some past work in this field and the lessons learned, and the paper discusses ongoing research conducted as part of the project "Time-predictable Multi-Core Architecture for Embedded Systems" (T-CREST), supported by the European...

  2. Lensless Imaging for Battlefield On-Chip Blood Diagnostics

    Science.gov (United States)

    2010-12-06

    USAID, Department of State, and NIKE , 2010 • Bill & Melinda Gates Foundation, Grand Challenges Explorations Award, 2010 • National Geographic Emerging...A. Ozcan, “Telemedicine Microscopy toward Smart Global Health Systems” National Geographic Explorers Symposium, 9 June 2010, Washington DC 13. A

  3. Computational Sensing of Staphylococcus aureus on Contact Lenses Using 3D Imaging of Curved Surfaces and Machine Learning.

    Science.gov (United States)

    Veli, Muhammed; Ozcan, Aydogan

    2018-03-27

    We present a cost-effective and portable platform based on contact lenses for noninvasively detecting Staphylococcus aureus, which is part of the human ocular microbiome and resides on the cornea and conjunctiva. Using S. aureus-specific antibodies and a surface chemistry protocol that is compatible with human tears, contact lenses are designed to specifically capture S. aureus. After the bacteria capture on the lens and right before its imaging, the captured bacteria are tagged with surface-functionalized polystyrene microparticles. These microbeads provide sufficient signal-to-noise ratio for the quantification of the captured bacteria on the contact lens, without any fluorescent labels, by 3D imaging of the curved surface of each lens using only one hologram taken with a lens-free on-chip microscope. After the 3D surface of the contact lens is computationally reconstructed using rotational field transformations and holographic digital focusing, a machine learning algorithm is employed to automatically count the number of beads on the lens surface, revealing the count of the captured bacteria. To demonstrate its proof-of-concept, we created a field-portable and cost-effective holographic microscope, which weighs 77 g, controlled by a laptop. Using daily contact lenses that are spiked with bacteria, we demonstrated that this computational sensing platform provides a detection limit of ∼16 bacteria/μL. This contact-lens-based wearable sensor can be broadly applicable to detect various bacteria, viruses, and analytes in tears using a cost-effective and portable computational imager that might be used even at home by consumers.

  4. Power and Thermal Management of System-on-Chip

    DEFF Research Database (Denmark)

    Liu, Wei

    , are necessary at the chip design level. In this work, we investigate the power and thermal management of System-on- Chips (SoCs). Thermal analysis is performed in a SPICE simulation approach based on the electrical-thermal analogy. We investigate the impact of inter- connects on heat distribution...

  5. Exploration within the Network-on-Chip Paradigm

    NARCIS (Netherlands)

    Wolkotte, P.T.

    2009-01-01

    A general purpose processor used to consist of a single processing core, which performed and controlled all tasks on the chip. Its functionality and maximum clock frequency grew steadily over the years. Due to the continuous increase of the number of transistors available on-chip and the operational

  6. Design of an on-chip reflectance map

    NARCIS (Netherlands)

    Terwisscha van Scheltinga, Jeroen; Smit, Jaap; Bosma, Marco

    1995-01-01

    A reflectance map design is described which uses a minimal amount of memory for the table, in order to be applicable as an on-chip shader. The shader is designed for use with the volumetric super resolution hardware, which performs shading at supersampled locations. However, the design may be used

  7. Nano lab-on-chip systems for biomedical and environmental ...

    African Journals Online (AJOL)

    In recent years, nano lab-on-chip (NLOC) has emerged as a powerful tool for biosensing and an active area of research particularly in DNA genetic and genetic related investigations. Compared with conventional sensing techniques, distinctive advantages of using NLOC for biomedicine and other related area include ...

  8. On-chip integrated lasers for biophotonic applications

    DEFF Research Database (Denmark)

    Mappes, Timo; Wienhold, Tobias; Bog, Uwe

    Meeting the need of biomedical users, we develop disposable Lab-on-a-Chip systems based on commercially available polymers. We are combining passive microfluidics with active optical elements on-chip by integrating multiple solid-state and liquid-core lasers. While covering a wide range of laser ...

  9. Comparison of a Ring On-Chip Network and a Code-Division Multiple-Access On-Chip Network

    Directory of Open Access Journals (Sweden)

    Xin Wang

    2007-01-01

    Full Text Available Two network-on-chip (NoC designs are examined and compared in this paper. One design applies a bidirectional ring connection scheme, while the other design applies a code-division multiple-access (CDMA connection scheme. Both of the designs apply globally asynchronous locally synchronous (GALS scheme in order to deal with the issue of transferring data in a multiple-clock-domain environment of an on-chip system. The two NoC designs are compared with each other by their network structures, data transfer principles, network node structures, and their asynchronous designs. Both the synchronous and the asynchronous designs of the two on-chip networks are realized using a hardware-description language (HDL in order to make the entire designs suit the commonly used synchronous design tools and flow. The performance estimation and comparison of the two NoC designs which are based on the HDL realizations are addressed. By comparing the two NoC designs, the advantages and disadvantages of applying direct connection and CDMA connection schemes in an on-chip communication network are discussed.

  10. On-chip Mach-Zehnder interferometer for OCT systems

    Science.gov (United States)

    van Leeuwen, Ton G.; Akca, Imran B.; Angelou, Nikolaos; Weiss, Nicolas; Hoekman, Marcel; Leinse, Arne; Heideman, Rene G.

    2018-04-01

    By using integrated optics, it is possible to reduce the size and cost of a bulky optical coherence tomography (OCT) system. One of the OCT components that can be implemented on-chip is the interferometer. In this work, we present the design and characterization of a Mach-Zehnder interferometer consisting of the wavelength-independent splitters and an on-chip reference arm. The Si3N4 was chosen as the material platform as it can provide low losses while keeping the device size small. The device was characterized by using a home-built swept source OCT system. A sensitivity value of 83 dB, an axial resolution of 15.2 μm (in air) and a depth range of 2.5 mm (in air) were all obtained.

  11. On-chip dual comb source for spectroscopy

    OpenAIRE

    Dutt, Avik; Joshi, Chaitanya; Ji, Xingchen; Cardenas, Jaime; Okawachi, Yoshitomo; Luke, Kevin; Gaeta, Alexander L.; Lipson, Michal

    2016-01-01

    Dual-comb spectroscopy is a powerful technique for real-time, broadband optical sampling of molecular spectra which requires no moving components. Recent developments with microresonator-based platforms have enabled frequency combs at the chip scale. However, the need to precisely match the resonance wavelengths of distinct high-quality-factor microcavities has hindered the development of an on-chip dual comb source. Here, we report the first simultaneous generation of two microresonator comb...

  12. DANoC: An Efficient Algorithm and Hardware Codesign of Deep Neural Networks on Chip.

    Science.gov (United States)

    Zhou, Xichuan; Li, Shengli; Tang, Fang; Hu, Shengdong; Lin, Zhi; Zhang, Lei

    2017-07-18

    Deep neural networks (NNs) are the state-of-the-art models for understanding the content of images and videos. However, implementing deep NNs in embedded systems is a challenging task, e.g., a typical deep belief network could exhaust gigabytes of memory and result in bandwidth and computational bottlenecks. To address this challenge, this paper presents an algorithm and hardware codesign for efficient deep neural computation. A hardware-oriented deep learning algorithm, named the deep adaptive network, is proposed to explore the sparsity of neural connections. By adaptively removing the majority of neural connections and robustly representing the reserved connections using binary integers, the proposed algorithm could save up to 99.9% memory utility and computational resources without undermining classification accuracy. An efficient sparse-mapping-memory-based hardware architecture is proposed to fully take advantage of the algorithmic optimization. Different from traditional Von Neumann architecture, the deep-adaptive network on chip (DANoC) brings communication and computation in close proximity to avoid power-hungry parameter transfers between on-board memory and on-chip computational units. Experiments over different image classification benchmarks show that the DANoC system achieves competitively high accuracy and efficiency comparing with the state-of-the-art approaches.

  13. On-chip Magnetic Separation and Cell Encapsulation in Droplets

    Science.gov (United States)

    Chen, A.; Byvank, T.; Bharde, A.; Miller, B. L.; Chalmers, J. J.; Sooryakumar, R.; Chang, W.-J.; Bashir, R.

    2012-02-01

    The demand for high-throughput single cell assays is gaining importance because of the heterogeneity of many cell suspensions, even after significant initial sorting. These suspensions may display cell-to-cell variability at the gene expression level that could impact single cell functional genomics, cancer, stem-cell research and drug screening. The on-chip monitoring of individual cells in an isolated environment could prevent cross-contamination, provide high recovery yield and ability to study biological traits at a single cell level These advantages of on-chip biological experiments contrast to conventional methods, which require bulk samples that provide only averaged information on cell metabolism. We report on a device that integrates microfluidic technology with a magnetic tweezers array to combine the functionality of separation and encapsulation of objects such as immunomagnetically labeled cells or magnetic beads into pico-liter droplets on the same chip. The ability to control the separation throughput that is independent of the hydrodynamic droplet generation rate allows the encapsulation efficiency to be optimized. The device can potentially be integrated with on-chip labeling and/or bio-detection to become a powerful single-cell analysis device.

  14. On-chip microsystems in silicon: opportunities and limitations

    Science.gov (United States)

    Wolffenbuttel, R. F.

    1996-03-01

    Integrated on-chip micro-instrumentation systems in silicon are complete data acquisition systems on a single chip. This concept has appeared to be the ultimate solution in many applications, as it enables in principle the metamorphosis of a basic sensing element, affected with many shortcomings, into an on-chip data acquisition unit that provides an output digital data stream in a standard format not corrupted by sensor non-idealities. Market acceptance would be maximum, as no special knowledge about the internal operation is required, self-test and self-calibration can be included and the dimensions are not different from those of the integrated circuit. The various aspects that are relevant in estimating the constraints for successful implementation of the integrated silicon smart sensor will be outlined in comparison with the properties of more conventional sensor fabrication technologies. It will be shown that the acceptance of on-chip functional integration in an application depends primarily on the added value in terms of improved specification or functionality that the resulting device provides in that application. The economic viability is therefore decisive rather than the technological constraints. This is in contrast to the traditional technology push prevailing in sensor research over market pull mechanisms.

  15. An Energy-Efficient Reconfigurable Circuit Switched Network-on-Chip

    NARCIS (Netherlands)

    Wolkotte, P.T.; Smit, Gerardus Johannes Maria; Rauwerda, G.K.; Smit, L.T.

    Network-on-Chip (NoC) is an energy-efficient on-chip communication architecture for multi-tile System-on-Chip (SoC) architectures. The SoC architecture, including its run-time software, can replace inflexible ASICs for future ambient systems. These ambient systems have to be flexible as well as

  16. Microfluidic organ-on-chip technology for blood-brain barrier research

    NARCIS (Netherlands)

    van der Helm, Marieke Willemijn; van der Meer, Andries Dirk; Eijkel, Jan C.T.; van den Berg, Albert; Segerink, Loes Irene

    2016-01-01

    Organs-on-chips are a new class of microengineered laboratory models that combine several of the advantages of current in vivo and in vitro models. In this review, we summarize the advances that have been made in the development of organ-on-chip models of the blood-brain barrier (BBBs-on-chips) and

  17. An FPGA design flow for reconfigurable network-based multi-processor systems on chip

    NARCIS (Netherlands)

    Kumar, A.; Hansson, M.A; Huisken, J.; Corporaal, H.

    2007-01-01

    Multi-processor systems on chip (MPSoC) platforms are becoming increasingly more heterogeneous and are shifting towards a more communication-centric methodology. Networks on chip (NoC) have emerged as the design paradigm for scalable on-chip communication architectures. As the system complexity

  18. High-performance, scalable optical network-on-chip architectures

    Science.gov (United States)

    Tan, Xianfang

    The rapid advance of technology enables a large number of processing cores to be integrated into a single chip which is called a Chip Multiprocessor (CMP) or a Multiprocessor System-on-Chip (MPSoC) design. The on-chip interconnection network, which is the communication infrastructure for these processing cores, plays a central role in a many-core system. With the continuously increasing complexity of many-core systems, traditional metallic wired electronic networks-on-chip (NoC) became a bottleneck because of the unbearable latency in data transmission and extremely high energy consumption on chip. Optical networks-on-chip (ONoC) has been proposed as a promising alternative paradigm for electronic NoC with the benefits of optical signaling communication such as extremely high bandwidth, negligible latency, and low power consumption. This dissertation focus on the design of high-performance and scalable ONoC architectures and the contributions are highlighted as follow: 1. A micro-ring resonator (MRR)-based Generic Wavelength-routed Optical Router (GWOR) is proposed. A method for developing any sized GWOR is introduced. GWOR is a scalable non-blocking ONoC architecture with simple structure, low cost and high power efficiency compared to existing ONoC designs. 2. To expand the bandwidth and improve the fault tolerance of the GWOR, a redundant GWOR architecture is designed by cascading different type of GWORs into one network. 3. The redundant GWOR built with MRR-based comb switches is proposed. Comb switches can expand the bandwidth while keep the topology of GWOR unchanged by replacing the general MRRs with comb switches. 4. A butterfly fat tree (BFT)-based hybrid optoelectronic NoC (HONoC) architecture is developed in which GWORs are used for global communication and electronic routers are used for local communication. The proposed HONoC uses less numbers of electronic routers and links than its counterpart of electronic BFT-based NoC. It takes the advantages of

  19. 60 GHz system-on-chip (SoC) with built-in memory and an on-chip antenna

    KAUST Repository

    Ghaffar, Farhan A.; Arsalan, Muhammad; Cheema, Hammad; Salama, Khaled N.; Shamim, Atif

    2014-01-01

    A novel 60 GHz transmitter SoC with an on-chip antenna and integrated memory in CMOS 65 nm technology is presented in this paper. This highly integrated transmitter design can support a data rate of 2 GBPS with a transmission range of 1 m. The transmitter consists of a fundamental frequency 60 GHz PLL which covers the complete ISM band. The modulator following the PLL can support both BPSK and OOK modulation schemes. Both stored data on the integrated memory or directly from an external source can be transmitted. A tapered slot on chip antenna is integrated with the power amplifier to complete the front end of the transmitter design. Size of the complete transmitter with on-chip antenna is only 1.96 mm × 1.96 mm. The core circuits consume less than 100 mW of power. The high data rate capability of the design makes it extremely suitable for bandwidth hungry applications such as unencrypted HD video streaming and transmission.

  20. 60 GHz system-on-chip (SoC) with built-in memory and an on-chip antenna

    KAUST Repository

    Ghaffar, Farhan A.

    2014-04-01

    A novel 60 GHz transmitter SoC with an on-chip antenna and integrated memory in CMOS 65 nm technology is presented in this paper. This highly integrated transmitter design can support a data rate of 2 GBPS with a transmission range of 1 m. The transmitter consists of a fundamental frequency 60 GHz PLL which covers the complete ISM band. The modulator following the PLL can support both BPSK and OOK modulation schemes. Both stored data on the integrated memory or directly from an external source can be transmitted. A tapered slot on chip antenna is integrated with the power amplifier to complete the front end of the transmitter design. Size of the complete transmitter with on-chip antenna is only 1.96 mm × 1.96 mm. The core circuits consume less than 100 mW of power. The high data rate capability of the design makes it extremely suitable for bandwidth hungry applications such as unencrypted HD video streaming and transmission.

  1. A VLSI System-on-Chip for Particle Detectors

    CERN Document Server

    AUTHOR|(CDS)2078019

    In this thesis I present a System-on-Chip (SoC) I designed to oer a self- contained, compact data acquisition platform for micromegas detector mon- itoring. I carried on my work within the RD-51 collab oration of CERN. With a companion ADC, my architecture is capable to acquire the signal from a detector electro de, pro cess the data and p erform monitoring tests. The SoC is built around on a custom 8-bit micropro cessor with internal mem- ory resources and emb eds the p eripherals to b e interf...

  2. Custom Topology Generation for Network-on-Chip

    DEFF Research Database (Denmark)

    Stuart, Matthias Bo; Sparsø, Jens

    2007-01-01

    This paper compares simulated annealing and tabu search for generating custom topologies for applications with periodic behaviour executing on a network-on-chip. The approach differs from previous work by starting from a fixed mapping of IP-cores to routers and performing design space exploration...... around an initial topology. The tabu search has been modified from its normally encountered form to allow easier escaping from local minima. A number of synthetic benchmarks are used for tuning the parameters of both heuristics and for testing the quality of the solutions each heuristic produces...

  3. On-chip photonic interconnects a computer architect's perspective

    CERN Document Server

    Nitta, Christopher J; Akella, Venkatesh

    2013-01-01

    As the number of cores on a chip continues to climb, architects will need to address both bandwidth and power consumption issues related to the interconnection network. Electrical interconnects are not likely to scale well to a large number of processors for energy efficiency reasons, and the problem is compounded by the fact that there is a fixed total power budget for a die, dictated by the amount of heat that can be dissipated without special (and expensive) cooling and packaging techniques. Thus, there is a need to seek alternatives to electrical signaling for on-chip interconnection appli

  4. A Time-predictable Memory Network-on-Chip

    DEFF Research Database (Denmark)

    Schoeberl, Martin; Chong, David VH; Puffitsch, Wolfgang

    2014-01-01

    To derive safe bounds on worst-case execution times (WCETs), all components of a computer system need to be time-predictable: the processor pipeline, the caches, the memory controller, and memory arbitration on a multicore processor. This paper presents a solution for time-predictable memory...... arbitration and access for chip-multiprocessors. The memory network-on-chip is organized as a tree with time-division multiplexing (TDM) of accesses to the shared memory. The TDM based arbitration completely decouples processor cores and allows WCET analysis of the memory accesses on individual cores without...

  5. Multicore systems on-chip practical software/hardware design

    CERN Document Server

    Abdallah, Abderazek Ben

    2013-01-01

    System on chips designs have evolved from fairly simple unicore, single memory designs to complex heterogeneous multicore SoC architectures consisting of a large number of IP blocks on the same silicon. To meet high computational demands posed by latest consumer electronic devices, most current systems are based on such paradigm, which represents a real revolution in many aspects in computing.The attraction of multicore processing for power reduction is compelling. By splitting a set of tasks among multiple processor cores, the operating frequency necessary for each core can be reduced, allowi

  6. System on chip module configured for event-driven architecture

    Science.gov (United States)

    Robbins, Kevin; Brady, Charles E.; Ashlock, Tad A.

    2017-10-17

    A system on chip (SoC) module is described herein, wherein the SoC modules comprise a processor subsystem and a hardware logic subsystem. The processor subsystem and hardware logic subsystem are in communication with one another, and transmit event messages between one another. The processor subsystem executes software actors, while the hardware logic subsystem includes hardware actors, the software actors and hardware actors conform to an event-driven architecture, such that the software actors receive and generate event messages and the hardware actors receive and generate event messages.

  7. Advancing Software Development for a Multiprocessor System-on-Chip

    Directory of Open Access Journals (Sweden)

    Stephen Bique

    2007-06-01

    Full Text Available A low-level language is the right tool to develop applications for some embedded systems. Notwithstanding, a high-level language provides a proper environment to develop the programming tools. The target device is a system-on-chip consisting of an array of processors with only local communication. Applications include typical streaming applications for digital signal processing. We describe the hardware model and stress the advantages of a flexible device. We introduce IDEA, a graphical integrated development environment for an array. A proper foundation for software development is a UML and standard programming abstractions in object-oriented languages.

  8. A CMOS G{sub m}-C complex filter with on-chip automatic tuning for wireless sensor network application

    Energy Technology Data Exchange (ETDEWEB)

    Wan Chuanchuan; Li Zhiqun; Hou Ningbing, E-mail: zhiqunli@seu.edu.cn [Institute of RF- and OE-ICs, Southeast University, Nanjing 210096 (China)

    2011-05-15

    A G{sub m}-C complex filter with on-chip automatic tuning for wireless sensor networks is designed and implemented using 0.18 {mu}m CMOS process. This filter is synthesized from a low-pass 5th-order Chebyshev RLC ladder filter prototype by means of capacitors and fully balanced transconductors. A conventional phase-locked loop is used to realize the on-chip automatic tuning for both center frequency and bandwidth control. The filter is centered at 2 MHz with a bandwidth of 2.4 MHz. The measured results show that the filter provides more than 45 dB image rejection while the ripple in the pass-band is less than 1.2 dB. The complete filter including on-chip tuning circuit consumes 4.9 mA with 1.8 V single supply voltage. (semiconductor integrated circuits)

  9. Self-powered integrated systems-on-chip (energy chip)

    KAUST Repository

    Hussain, Muhammad Mustafa

    2010-04-23

    In today\\'s world, consumer driven technology wants more portable electronic gadgets to be developed, and the next big thing in line is self-powered handheld devices. Therefore to reduce the power consumption as well as to supply sufficient power to run those devices, several critical technical challenges need to be overcome: a. Nanofabrication of macro/micro systems which incorporates the direct benefit of light weight (thus portability), low power consumption, faster response, higher sensitivity and batch production (low cost). b. Integration of advanced nano-materials to meet the performance/cost benefit trend. Nano-materials may offer new functionalities that were previously underutilized in the macro/micro dimension. c. Energy efficiency to reduce power consumption and to supply enough power to meet that low power demand. We present a pragmatic perspective on a self-powered integrated System on Chip (SoC). We envision the integrated device will have two objectives: low power consumption/dissipation and on-chip power generation for implementation into handheld or remote technologies for defense, space, harsh environments and medical applications. This paper provides insight on materials choices, intelligent circuit design, and CMOS compatible integration.

  10. 3D Printing of Organs-On-Chips

    Science.gov (United States)

    Yi, Hee-Gyeong; Lee, Hyungseok; Cho, Dong-Woo

    2017-01-01

    Organ-on-a-chip engineering aims to create artificial living organs that mimic the complex and physiological responses of real organs, in order to test drugs by precisely manipulating the cells and their microenvironments. To achieve this, the artificial organs should to be microfabricated with an extracellular matrix (ECM) and various types of cells, and should recapitulate morphogenesis, cell differentiation, and functions according to the native organ. A promising strategy is 3D printing, which precisely controls the spatial distribution and layer-by-layer assembly of cells, ECMs, and other biomaterials. Owing to this unique advantage, integration of 3D printing into organ-on-a-chip engineering can facilitate the creation of micro-organs with heterogeneity, a desired 3D cellular arrangement, tissue-specific functions, or even cyclic movement within a microfluidic device. Moreover, fully 3D-printed organs-on-chips more easily incorporate other mechanical and electrical components with the chips, and can be commercialized via automated massive production. Herein, we discuss the recent advances and the potential of 3D cell-printing technology in engineering organs-on-chips, and provides the future perspectives of this technology to establish the highly reliable and useful drug-screening platforms. PMID:28952489

  11. 3D Printing of Organs-On-Chips.

    Science.gov (United States)

    Yi, Hee-Gyeong; Lee, Hyungseok; Cho, Dong-Woo

    2017-01-25

    Organ-on-a-chip engineering aims to create artificial living organs that mimic the complex and physiological responses of real organs, in order to test drugs by precisely manipulating the cells and their microenvironments. To achieve this, the artificial organs should to be microfabricated with an extracellular matrix (ECM) and various types of cells, and should recapitulate morphogenesis, cell differentiation, and functions according to the native organ. A promising strategy is 3D printing, which precisely controls the spatial distribution and layer-by-layer assembly of cells, ECMs, and other biomaterials. Owing to this unique advantage, integration of 3D printing into organ-on-a-chip engineering can facilitate the creation of micro-organs with heterogeneity, a desired 3D cellular arrangement, tissue-specific functions, or even cyclic movement within a microfluidic device. Moreover, fully 3D-printed organs-on-chips more easily incorporate other mechanical and electrical components with the chips, and can be commercialized via automated massive production. Herein, we discuss the recent advances and the potential of 3D cell-printing technology in engineering organs-on-chips, and provides the future perspectives of this technology to establish the highly reliable and useful drug-screening platforms.

  12. 3D Printing of Organs-On-Chips

    Directory of Open Access Journals (Sweden)

    Hee-Gyeong Yi

    2017-01-01

    Full Text Available Organ-on-a-chip engineering aims to create artificial living organs that mimic the complex and physiological responses of real organs, in order to test drugs by precisely manipulating the cells and their microenvironments. To achieve this, the artificial organs should to be microfabricated with an extracellular matrix (ECM and various types of cells, and should recapitulate morphogenesis, cell differentiation, and functions according to the native organ. A promising strategy is 3D printing, which precisely controls the spatial distribution and layer-by-layer assembly of cells, ECMs, and other biomaterials. Owing to this unique advantage, integration of 3D printing into organ-on-a-chip engineering can facilitate the creation of micro-organs with heterogeneity, a desired 3D cellular arrangement, tissue-specific functions, or even cyclic movement within a microfluidic device. Moreover, fully 3D-printed organs-on-chips more easily incorporate other mechanical and electrical components with the chips, and can be commercialized via automated massive production. Herein, we discuss the recent advances and the potential of 3D cell-printing technology in engineering organs-on-chips, and provides the future perspectives of this technology to establish the highly reliable and useful drug-screening platforms.

  13. A Miniaturized On-Chip Colorimeter for Detecting NPK Elements.

    Science.gov (United States)

    Liu, Rui-Tao; Tao, Lu-Qi; Liu, Bo; Tian, Xiang-Guang; Mohammad, Mohammad Ali; Yang, Yi; Ren, Tian-Ling

    2016-08-04

    Recently, precision agriculture has become a globally attractive topic. As one of the most important factors, the soil nutrients play an important role in estimating the development of precision agriculture. Detecting the content of nitrogen, phosphorus and potassium (NPK) elements more efficiently is one of the key issues. In this paper, a novel chip-level colorimeter was fabricated to detect the NPK elements for the first time. A light source-microchannel photodetector in a sandwich structure was designed to realize on-chip detection. Compared with a commercial colorimeter, all key parts are based on MEMS (Micro-Electro-Mechanical System) technology so that the volume of this on-chip colorimeter can be minimized. Besides, less error and high precision are achieved. The cost of this colorimeter is two orders of magnitude less than that of a commercial one. All these advantages enable a low-cost and high-precision sensing operation in a monitoring network. The colorimeter developed herein has bright prospects for environmental and biological applications.

  14. Self-powered integrated systems-on-chip (energy chip)

    Science.gov (United States)

    Hussain, M. M.; Fahad, H.; Rojas, J.; Hasan, M.; Talukdar, A.; Oommen, J.; Mink, J.

    2010-04-01

    In today's world, consumer driven technology wants more portable electronic gadgets to be developed, and the next big thing in line is self-powered handheld devices. Therefore to reduce the power consumption as well as to supply sufficient power to run those devices, several critical technical challenges need to be overcome: a. Nanofabrication of macro/micro systems which incorporates the direct benefit of light weight (thus portability), low power consumption, faster response, higher sensitivity and batch production (low cost). b. Integration of advanced nano-materials to meet the performance/cost benefit trend. Nano-materials may offer new functionalities that were previously underutilized in the macro/micro dimension. c. Energy efficiency to reduce power consumption and to supply enough power to meet that low power demand. We present a pragmatic perspective on a self-powered integrated System on Chip (SoC). We envision the integrated device will have two objectives: low power consumption/dissipation and on-chip power generation for implementation into handheld or remote technologies for defense, space, harsh environments and medical applications. This paper provides insight on materials choices, intelligent circuit design, and CMOS compatible integration.

  15. On-Chip Correlator for Passive Wireless SAW Multisensor Systems

    Directory of Open Access Journals (Sweden)

    Liqiang Xie

    2016-01-01

    Full Text Available For decoding the asynchronous superposition of response signals from different sensors, it is a challenge to achieve correlation in a code division multiplexing (CDM based passive wireless surface acoustic wave (SAW multisensor system. Therefore, an on-chip correlator scheme is developed in this paper. In contrast to conventional CDM-based systems, this novel scheme enables the correlations to be operated at the SAW sensors, instead of the reader. Thus, the response signals arriving at the reader are the result of cross-correlation on the chips. It is then easy for the reader to distinguish the sensor that is matched with the interrogating signal. The operation principle, signal analysis, and simulation of the novel scheme are described in the paper. The simulation results show the response signals from the correlations of the sensors. A clear spike pulse is presented in the response signals, when a sensor code is matched with the interrogating code. Simulations verify the feasibility of the on-chip correlator concept.

  16. On-chip enucleation of an oocyte by untethered microrobots

    International Nuclear Information System (INIS)

    Ichikawa, Akihiko; Sakuma, Shinya; Sugita, Masakuni; Shoda, Tatsuro; Tamakoshi, Takahiro; Arai, Fumihito; Akagi, Satoshi

    2014-01-01

    We propose a novel on-chip enucleation of an oocyte with zona pellucida by using a combination of untethered microrobots. To achieve enucleation within the closed space of a microfluidic chip, two microrobots, a microknife and a microgripper were integrated into the microfluidic chip. These microrobots were actuated by an external magnetic force produced by permanent magnets placed on the robotic stage. The tip of the microknife was designed by considering the biological geometric feature of an oocyte, i.e. the oocyte has a polar body in maturation stage II. Moreover, the microknife was fabricated by using grayscale lithography, which allows fabrication of three-dimensional microstructures. The microgripper has a gripping function that is independent of the driving mechanism. On-chip enucleation was demonstrated, and the enucleated oocytes are spherical, indicating that the cell membrane of the oocytes remained intact. To confirm successful enucleation using this method, we investigated the viability of oocytes after enucleation. The results show that the production rate, i.e. the ratio between the number of oocytes that reach the blastocyst stage and the number of bovine oocytes after nucleus transfer, is 100%. The technique will contribute to complex cell manipulation such as cell surgery in lab-on-a-chip devices. (paper)

  17. Parametric dense stereovision implementation on a system-on chip (SoC).

    Science.gov (United States)

    Gardel, Alfredo; Montejo, Pablo; García, Jorge; Bravo, Ignacio; Lázaro, José L

    2012-01-01

    This paper proposes a novel hardware implementation of a dense recovery of stereovision 3D measurements. Traditionally 3D stereo systems have imposed the maximum number of stereo correspondences, introducing a large restriction on artificial vision algorithms. The proposed system-on-chip (SoC) provides great performance and efficiency, with a scalable architecture available for many different situations, addressing real time processing of stereo image flow. Using double buffering techniques properly combined with pipelined processing, the use of reconfigurable hardware achieves a parametrisable SoC which gives the designer the opportunity to decide its right dimension and features. The proposed architecture does not need any external memory because the processing is done as image flow arrives. Our SoC provides 3D data directly without the storage of whole stereo images. Our goal is to obtain high processing speed while maintaining the accuracy of 3D data using minimum resources. Configurable parameters may be controlled by later/parallel stages of the vision algorithm executed on an embedded processor. Considering hardware FPGA clock of 100 MHz, image flows up to 50 frames per second (fps) of dense stereo maps of more than 30,000 depth points could be obtained considering 2 Mpix images, with a minimum initial latency. The implementation of computer vision algorithms on reconfigurable hardware, explicitly low level processing, opens up the prospect of its use in autonomous systems, and they can act as a coprocessor to reconstruct 3D images with high density information in real time.

  18. Gain-Enhanced On-Chip Antenna Utilizing Artificial Magnetic Conductor Reflecting Surface at 94 GHz

    KAUST Repository

    Nafe, Mahmoud

    2015-08-04

    Nowadays, there is a growing demand for high frequency-bandwidth mm-wave (30-300 GHz) electronic wireless transceiver systems to support applications such as high data-rate wireless communication and high resolution imaging. Such mm-wave systems are becoming more feasible due to the extreme transistor downscaling in silicon-based integrated circuits, which enabled densely-integrated high-speed elec- tronics operating up to more than 100 GHz with low fabrication cost. To further enhance system integrability, it is required to implement all wireless system compo- nents on the chip. Presently, the last major barrier to true System-on-Chip (SoC) realization is the antenna implementation on the silicon chip. Although at mm-wave frequencies the antenna size becomes small enough to fit on chip, the antenna performance is greatly deteriorated due the high conductivity and high relative permittivity of the silicon substrate. The negative e↵ects of the silicon substrate could be avoided by using a metallic reflecting surface on top of silicon, which e↵ectively isolates the antenna from the silicon. However, this approach has the shortcoming of having to implement the antenna on the usually very thin silicon oxide layer of a typical CMOS fabrication process (10’s of μm). This forces the antenna to be in a very close proximity (less than one hundredth of a wavelength) to the reflecting surface. In this regime, the use of conventional metallic reflecting surface for silicon shielding has severe e↵ects on the antenna performance as it tends to reduce the antenna radiation resistance resulting in most of the energy being absorbed rather than radiated. In this work, the use of specially patterned reflecting surfaces for improving on- chip antenna performance is investigated. By using a periodic metallic surface on top of a grounded substrate, the structure can mimic the behavior of a perfect mag- netic conductor, hence called Artificial Magnetic Conductor (AMC) surface

  19. Structural characteristics of carbon nanofibers for on-chip interconnect applications

    International Nuclear Information System (INIS)

    Ominami, Yusuke; Ngo, Quoc; Austin, Alexander J.; Yoong, Hans; Yang, Cary Y.; Cassell, Alan M.; Cruden, Brett A.; Li Jun; Meyyappan, M.

    2005-01-01

    In this letter, we compare the structures of plasma-enhanced chemical vapor deposition of Ni-catalyzed and Pd-catalyzed carbon nanofibers (CNFs) synthesized for on-chip interconnect applications with scanning transmission electron microscopy (STEM). The Ni-catalyzed CNF has a conventional fiberlike structure and many graphitic layers that are almost parallel to the substrate at the CNF base. In contrast, the Pd-catalyzed CNF has a multiwall nanotubelike structure on the sidewall spanning the entire CNF. The microstructure observed in the Pd-catalyzed fibers at the CNF-metal interface has the potential to lower contact resistance significantly, as our electrical measurements using current-sensing atomic force microscopy indicate. A structural model is presented based on STEM image analysis

  20. Synthesis of on-chip control circuits for mVLSI biochips

    DEFF Research Database (Denmark)

    Potluri, Seetal; Schneider, Alexander Rüdiger; Hørslev-Petersen, Martin

    2017-01-01

    them to laboratory environments. To address this issue, researchers have proposed methods to reduce the number of offchip pressure sources, through integration of on-chip pneumatic control logic circuits fabricated using three-layer monolithic membrane valve technology. Traditionally, mVLSI biochip......-chip control circuit design and (iii) the integration of on-chip control in the placement and routing design tasks. In this paper we present a design methodology for logic synthesis and physical synthesis of mVLSI biochips that use on-chip control. We show how the proposed methodology can be successfully...... applied to generate biochip layouts with integrated on-chip pneumatic control....

  1. Lab-on-chip components for molecular detection

    Science.gov (United States)

    Adam, Tijjani; Dhahi, Th S.; Mohammed, Mohammed; Hashim, U.; Noriman, N. Z.; Dahham, Omar S.

    2017-09-01

    We successfully fabricated Lab on chip components and integrated for possible use in biomedical application. The sensor was fabricated by using conventional photolithography method integrated with PDMS micro channels for smooth delivery of sample to the sensing domain. The sensor was silanized and aminated with 3-Aminopropyl triethoxysilane (APTES) to functionalize the surface with biomolecules and create molecular binding chemistry. The resulting Si-O-Si- components were functionalized with oligonucleotides probe of HPV, which interacted with the single stranded HPV DNA target to create a field across on the device. The fabrication, immobilization and hybridization processes were characterized with current voltage (I-V) characterization (KEITHLEY, 6487). The sensor show selectivity for the HPV DNA target in a linear range from concentration 0.1 nM to 1 µM. This strategy presented a simple, rapid and sensitive platform for HPV detection and would become a powerful tool for pathogenic microorganisms screening in clinical diagnosis.

  2. Network on chip master control board for neutron acquisition

    International Nuclear Information System (INIS)

    Ruiz-Martinez, E.; Mary, T.; Mutti, P.; Ratel, J.; Rey, F.

    2012-01-01

    The acquisition master control board is designed to assemble the various acquisition modes in use at the Institut Laue-Langevin (ILL). The main goal is to make the card common for all the ILL's instruments in a simple, modular and open way, giving the possibility to add new functionalities in order to follow the evolving demand. It has been necessary to define a central element to provide synchronization to the rest of the units. The backbone of the proposed acquisition control system is the denominated master acquisition board. The master board consists on a VME64X configurable high density I/O connection carrier board based on the latest Xilinx Virtex-6T FPGA. The internal architecture of the FPGA is designed as a Network on Chip (NoC) approach. The complete system also includes a display board and n histogram modules for live display of the data from the detectors. (authors)

  3. On-chip RF-to-optical transducer

    DEFF Research Database (Denmark)

    Simonsen, Anders; Tsaturyan, Yeghishe; Seis, Yannick

    2016-01-01

    these diverse systems, plus technologies that utilize them, and the mature toolbox of optical techniques that routinely operates at the quantum limit. In a previous work [1], we demonstrated such a bridge by realizing simultaneous coupling between an electronic LC circuit and a quantum-noise limited optical...... noise temperatures far below the actual temperature of the mechanical element. On-chip integration of the electrical, mechanical and optical elements is necessary for an implementation of the transduction scheme that is viable for commercial applications. Reliable assembly of a strongly coupled...... electromechanical device, and inclusion of an optical cavity for enhanced optical readout, are key features of the new platform. Both can be achieved with standard cleanroom fabrication techniques. We will furthermore present ongoing work to couple our transducer to an RF or microwave antenna, for low...

  4. Near-Field, On-Chip Optical Brownian Ratchets.

    Science.gov (United States)

    Wu, Shao-Hua; Huang, Ningfeng; Jaquay, Eric; Povinelli, Michelle L

    2016-08-10

    Nanoparticles in aqueous solution are subject to collisions with solvent molecules, resulting in random, Brownian motion. By breaking the spatiotemporal symmetry of the system, the motion can be rectified. In nature, Brownian ratchets leverage thermal fluctuations to provide directional motion of proteins and enzymes. In man-made systems, Brownian ratchets have been used for nanoparticle sorting and manipulation. Implementations based on optical traps provide a high degree of tunability along with precise spatiotemporal control. Here, we demonstrate an optical Brownian ratchet based on the near-field traps of an asymmetrically patterned photonic crystal. The system yields over 25 times greater trap stiffness than conventional optical tweezers. Our technique opens up new possibilities for particle manipulation in a microfluidic, lab-on-chip environment.

  5. Cache-aware network-on-chip for chip multiprocessors

    Science.gov (United States)

    Tatas, Konstantinos; Kyriacou, Costas; Dekoulis, George; Demetriou, Demetris; Avraam, Costas; Christou, Anastasia

    2009-05-01

    This paper presents the hardware prototype of a Network-on-Chip (NoC) for a chip multiprocessor that provides support for cache coherence, cache prefetching and cache-aware thread scheduling. A NoC with support to these cache related mechanisms can assist in improving systems performance by reducing the cache miss ratio. The presented multi-core system employs the Data-Driven Multithreading (DDM) model of execution. In DDM thread scheduling is done according to data availability, thus the system is aware of the threads to be executed in the near future. This characteristic of the DDM model allows for cache aware thread scheduling and cache prefetching. The NoC prototype is a crossbar switch with output buffering that can support a cache-aware 4-node chip multiprocessor. The prototype is built on the Xilinx ML506 board equipped with a Xilinx Virtex-5 FPGA.

  6. A Hardware Framework for on-Chip FPGA Acceleration

    DEFF Research Database (Denmark)

    Lomuscio, Andrea; Cardarilli, Gian Carlo; Nannarelli, Alberto

    2016-01-01

    In this work, we present a new framework to dynamically load hardware accelerators on reconfigurable platforms (FPGAs). Provided a library of application-specific processors, we load on-the-fly the specific processor in the FPGA, and we transfer the execution from the CPU to the FPGA-based accele......In this work, we present a new framework to dynamically load hardware accelerators on reconfigurable platforms (FPGAs). Provided a library of application-specific processors, we load on-the-fly the specific processor in the FPGA, and we transfer the execution from the CPU to the FPGA......-based accelerator. Results show that significant speed-up can be obtained by the proposed acceleration framework on system-on-chips where reconfigurable fabric is placed next to the CPUs. The speed-up is due to both the intrinsic acceleration in the application-specific processors, and to the increased parallelism....

  7. On-chip generation of heralded photon-number states

    Science.gov (United States)

    Vergyris, Panagiotis; Meany, Thomas; Lunghi, Tommaso; Sauder, Gregory; Downes, James; Steel, M. J.; Withford, Michael J.; Alibart, Olivier; Tanzilli, Sébastien

    2016-10-01

    Beyond the use of genuine monolithic integrated optical platforms, we report here a hybrid strategy enabling on-chip generation of configurable heralded two-photon states. More specifically, we combine two different fabrication techniques, i.e., non-linear waveguides on lithium niobate for efficient photon-pair generation and femtosecond-laser-direct-written waveguides on glass for photon manipulation. Through real-time device manipulation capabilities, a variety of path-coded heralded two-photon states can be produced, ranging from product to entangled states. Those states are engineered with high levels of purity, assessed by fidelities of 99.5 ± 8% and 95.0 ± 8%, respectively, obtained via quantum interferometric measurements. Our strategy therefore stands as a milestone for further exploiting entanglement-based protocols, relying on engineered quantum states, and enabled by scalable and compatible photonic circuits.

  8. On-Chip generation of polymer microcapsules through droplet coalescence

    Science.gov (United States)

    Eqbal, Md Danish; Gundabala, Venkat; Gundabala lab Team

    Alginate microbeads and microcapsules have numerous applications in drug delivery, tissue engineering and other biomedical areas due to their unique properties. Microcapsules with liquid core are of particular interest in the area of cell encapsulation. Various methods such as coacervation, emulsification, micro-nozzle, etc. exist for the generation of microbeads and microcapsules. However, these methods have several drawbacks like coagulation, non-uniformity, and polydispersity. In this work we present a method for complete on chip generation of alginate microcapsules (single core as well as double core) through the use of droplet merging technique. For this purpose, a combined Coflow and T-junction configuration is implemented in a hybrid glass-PDMS (Polydimethylsiloxane) microfluidic device. Efficient generation is achieved through precise matching of the generation rates of the coalescing drops. Through this approach, microcapsules with intact single and double (liquid) cores surrounded by alginate shell have been successfully generated and characterized.

  9. Endocrine system on chip for a diabetes treatment model.

    Science.gov (United States)

    Nguyen, Dao Thi Thuy; van Noort, Danny; Jeong, In-Kyung; Park, Sungsu

    2017-02-21

    The endocrine system is a collection of glands producing hormones which, among others, regulates metabolism, growth and development. One important group of endocrine diseases is diabetes, which is caused by a deficiency or diminished effectiveness of endogenous insulin. By using a microfluidic perfused 3D cell-culture chip, we developed an 'endocrine system on chip' to potentially be able to screen drugs for the treatment of diabetes by measuring insulin release over time. Insulin-secreting β-cells are located in the pancreas, while L-cells, located in the small intestines, stimulate insulin secretion. Thus, we constructed a co-culture of intestinal-pancreatic cells to measure the effect of glucose on the production of glucagon-like peptide-1 (GLP-1) from the L-cell line (GLUTag) and insulin from the pancreatic β-cell line (INS-1). After three days of culture, both cell lines formed aggregates, exhibited 3D cell morphology, and showed good viability (>95%). We separately measured the dynamic profile of GLP-1 and insulin release at glucose concentrations of 0.5 and 20 mM, as well as the combined effect of GLP-1 on insulin production at these glucose concentrations. In response to glucose stimuli, GLUTag and INS-1 cells produced higher amounts of GLP-1 and insulin, respectively, compared to a static 2D cell culture. INS-1 combined with GLUTag cells exhibited an even higher insulin production in response to glucose stimulation. At higher glucose concentrations, the diabetes model on chip showed faster saturation of the insulin level. Our results suggest that the endocrine system developed in this study is a useful tool for observing dynamical changes in endocrine hormones (GLP-1 and insulin) in a glucose-dependent environment. Moreover, it can potentially be used to screen GLP-1 analogues and natural insulin and GLP-1 stimulants for diabetes treatment.

  10. Silicon Nanophotonics for Many-Core On-Chip Networks

    Science.gov (United States)

    Mohamed, Moustafa

    Number of cores in many-core architectures are scaling to unprecedented levels requiring ever increasing communication capacity. Traditionally, architects follow the path of higher throughput at the expense of latency. This trend has evolved into being problematic for performance in many-core architectures. Moreover, the trends of power consumption is increasing with system scaling mandating nontraditional solutions. Nanophotonics can address these problems, offering benefits in the three frontiers of many-core processor design: Latency, bandwidth, and power. Nanophotonics leverage circuit-switching flow control allowing low latency; in addition, the power consumption of optical links is significantly lower compared to their electrical counterparts at intermediate and long links. Finally, through wave division multiplexing, we can keep the high bandwidth trends without sacrificing the throughput. This thesis focuses on realizing nanophotonics for communication in many-core architectures at different design levels considering reliability challenges that our fabrication and measurements reveal. First, we study how to design on-chip networks for low latency, low power, and high bandwidth by exploiting the full potential of nanophotonics. The design process considers device level limitations and capabilities on one hand, and system level demands in terms of power and performance on the other hand. The design involves the choice of devices, designing the optical link, the topology, the arbitration technique, and the routing mechanism. Next, we address the problem of reliability in on-chip networks. Reliability not only degrades performance but can block communication. Hence, we propose a reliability-aware design flow and present a reliability management technique based on this flow to address reliability in the system. In the proposed flow reliability is modeled and analyzed for at the device, architecture, and system level. Our reliability management technique is

  11. Optimizing the on-chip communication architecture of low power Systems-on-Chip in Deep Sub-Micron technology

    OpenAIRE

    Leroy, Anthony

    2006-01-01

    Ce mémoire traite des systèmes intégrés sur puce (System-on-Chip) à faible consommation d'énergie tels que ceux qui seront utilisés dans les équipements portables de future génération (ordinateurs de poche (PDA), téléphones mobiles). S'agissant d'équipements alimentés par des batteries, la consommation énergétique est un problème critique. Ces plateformes contiendront probablement une douzaine de coeurs de processeur et une quantité importante de mémoire embarquée. Une architecture de communi...

  12. A scalable single-chip multi-processor architecture with on-chip RTOS kernel

    NARCIS (Netherlands)

    Theelen, B.D.; Verschueren, A.C.; Reyes Suarez, V.V.; Stevens, M.P.J.; Nunez, A.

    2003-01-01

    Now that system-on-chip technology is emerging, single-chip multi-processors are becoming feasible. A key problem of designing such systems is the complexity of their on-chip interconnects and memory architecture. It is furthermore unclear at what level software should be integrated. An example of a

  13. On-chip network interfaces supporting automatic burst write creation, posted writes and read prefetch

    NARCIS (Netherlands)

    Stefan, R.; Windt, de J.; Goossens, K.G.W.

    2010-01-01

    Networks-on-Chip are seen as a scalable solution for facilitating the development of Systems-on-Chip with an increasing number of IP cores. Many studies already address the implementation details of such networks and a large effort has been invested in optimizing the routing strategy and the

  14. Avoiding Message-Dependent Deadlock in Network-Based Systems on Chip

    NARCIS (Netherlands)

    Hansson, A.; Goossens, K.; Rãdulescu, A.

    2007-01-01

    Networks on chip (NoCs) are an essential component of systems on chip (SoCs) and much research is devoted to deadlock avoidance in NoCs. Prior work focuses on the router network while protocol interactions between NoC and intellectual property (IP) modules are not considered. These interactions

  15. Co-design of on-chip antennas and circuits for a UNII band monolithic transceiver

    KAUST Repository

    Shamim, Atif; Arsalan, Muhammad; Roy, L; Salama, Khaled N.

    2012-01-01

    with two on-chip antennas. Both antennas are characterized for their radiation properties through an on-wafer custom measurement setup. The strategy to co-design on-chip antennas with circuits, resultant trade-offs and measurement challenges have also been

  16. A survey of research and practices of network-on-chip

    DEFF Research Database (Denmark)

    Bjerregaard, Tobias; Mahadevan, Shankar

    2006-01-01

    The scaling of microchip technologies has enabled large scale systems-on-chip (SoC). Network-on-chip (NoC) research addresses global communication in SoC, involving (i) a move from computation-centric to communication-centric design and (ii) the implementation of scalable communication structures...

  17. On-chip photonic integrated circuit structures for millimeter and terahertz wave signal generation

    NARCIS (Netherlands)

    Gordón, C.; Guzmán, R. C.; Corral, V.; Carpintero, G.; Leijtens, X.

    2015-01-01

    We present two different on-chip photonic integrated circuit (PIC) structures for continuous-wave generation of millimeter and terahertz waves, each one using a different approach. One approach is the optical heterodyne method, using an on-chip arrayed waveguide grating laser (OC-AWGL) which is

  18. An FPGA bridge preserving traffing quality of service for on-chip network-based systems

    NARCIS (Netherlands)

    Nejad, A.B.; Escudero Martinez, M.; Goossens, K.G.W.

    2011-01-01

    FPGA prototyping of recent large Systems on Chip (SoCs) is very challenging due to the resource limitation of a single FPGA. Moreover, having external access to SoCs for verification and debug purposes is essential. In this paper, we suggest to partition a network-on-chip (NoC) based system into

  19. On-chip graphene electrode, methods of making, and methods of use

    KAUST Repository

    Nayak, Pranati

    2018-01-25

    Embodiments of the present disclosure provide a device including an on-chip electrode platform including one or more three dimensional laser scribed graphene electrodes, methods of making the on-chip electrode platform, methods of analyzing (e.g., detecting, quantifying, and the like) chemicals and biochemicals, and the like.

  20. Microfluidic organ-on-chip technology for blood-brain barrier research.

    Science.gov (United States)

    van der Helm, Marinke W; van der Meer, Andries D; Eijkel, Jan C T; van den Berg, Albert; Segerink, Loes I

    2016-01-01

    Organs-on-chips are a new class of microengineered laboratory models that combine several of the advantages of current in vivo and in vitro models. In this review, we summarize the advances that have been made in the development of organ-on-chip models of the blood-brain barrier (BBBs-on-chips) and the challenges that are still ahead. The BBB is formed by specialized endothelial cells and separates blood from brain tissue. It protects the brain from harmful compounds from the blood and provides homeostasis for optimal neuronal function [corrected]. Studying BBB function and dysfunction is important for drug development and biomedical research. Microfluidic BBBs-on-chips enable real-time study of (human) cells in an engineered physiological microenvironment, for example incorporating small geometries and fluid flow as well as sensors. Examples of BBBs-on-chips in literature already show the potential of more realistic microenvironments and the study of organ-level functions. A key challenge in the field of BBB-on-chip development is the current lack of standardized quantification of parameters such as barrier permeability and shear stress. This limits the potential for direct comparison of the performance of different BBB-on-chip models to each other and existing models. We give recommendations for further standardization in model characterization and conclude that the rapidly emerging field of BBB-on-chip models holds great promise for further studies in BBB biology and drug development.

  1. Parametric Dense Stereovision Implementation on a System-on Chip (SoC

    Directory of Open Access Journals (Sweden)

    Pablo Montejo

    2012-02-01

    Full Text Available This paper proposes a novel hardware implementation of a dense recovery of stereovision 3D measurements. Traditionally 3D stereo systems have imposed the maximum number of stereo correspondences, introducing a large restriction on artificial vision algorithms. The proposed system-on-chip (SoC provides great performance and efficiency, with a scalable architecture available for many different situations, addressing real time processing of stereo image flow. Using double buffering techniques properly combined with pipelined processing, the use of reconfigurable hardware achieves a parametrisable SoC which gives the designer the opportunity to decide its right dimension and features. The proposed architecture does not need any external memory because the processing is done as image flow arrives. Our SoC provides 3D data directly without the storage of whole stereo images. Our goal is to obtain high processing speed while maintaining the accuracy of 3D data using minimum resources. Configurable parameters may be controlled by later/parallel stages of the vision algorithm executed on an embedded processor. Considering hardware FPGA clock of 100 MHz, image flows up to 50 frames per second (fps of dense stereo maps of more than 30,000 depth points could be obtained considering 2 Mpix images, with a minimum initial latency. The implementation of computer vision algorithms on reconfigurable hardware, explicitly low level processing, opens up the prospect of its use in autonomous systems, and they can act as a coprocessor to reconstruct 3D images with high density information in real time.

  2. On-chip dual-comb source for spectroscopy.

    Science.gov (United States)

    Dutt, Avik; Joshi, Chaitanya; Ji, Xingchen; Cardenas, Jaime; Okawachi, Yoshitomo; Luke, Kevin; Gaeta, Alexander L; Lipson, Michal

    2018-03-01

    Dual-comb spectroscopy is a powerful technique for real-time, broadband optical sampling of molecular spectra, which requires no moving components. Recent developments with microresonator-based platforms have enabled frequency combs at the chip scale. However, the need to precisely match the resonance wavelengths of distinct high quality-factor microcavities has hindered the development of on-chip dual combs. We report the simultaneous generation of two microresonator combs on the same chip from a single laser, drastically reducing experimental complexity. We demonstrate broadband optical spectra spanning 51 THz and low-noise operation of both combs by deterministically tuning into soliton mode-locked states using integrated microheaters, resulting in narrow (lasers or microwave oscillators. We demonstrate high signal-to-noise ratio absorption spectroscopy spanning 170 nm using the dual-comb source over a 20-μs acquisition time. Our device paves the way for compact and robust spectrometers at nanosecond time scales enabled by large beat-note spacings (>1 GHz).

  3. Multimedia Terminal System-on-Chip Design and Simulation

    Directory of Open Access Journals (Sweden)

    Barbieri Ivano

    2005-01-01

    Full Text Available This paper proposes a design approach based on integrated architectural and system-on-chip (SoC simulations. The main idea is to have an efficient framework for the design and the evaluation of multimedia terminals, allowing a fast system simulation with a definable degree of accuracy. The design approach includes the simulation of very long instruction word (VLIW digital signal processors (DSPs, the utilization of a device multiplexing the media streams, and the emulation of the real-time media acquisition. This methodology allows the evaluation of both the multimedia algorithm implementations and the hardware platform, giving feedback on the complete SoC including the interaction between modules and conflicts in accessing either the bus or shared resources. An instruction set architecture (ISA simulator and an SoC simulation environment compose the integrated framework. In order to validate this approach, the evaluation of an audio-video multiprocessor terminal is presented, and the complete simulation test results are reported.

  4. A multilevel Lab on chip platform for DNA analysis.

    Science.gov (United States)

    Marasso, Simone Luigi; Giuri, Eros; Canavese, Giancarlo; Castagna, Riccardo; Quaglio, Marzia; Ferrante, Ivan; Perrone, Denis; Cocuzza, Matteo

    2011-02-01

    Lab-on-chips (LOCs) are critical systems that have been introduced to speed up and reduce the cost of traditional, laborious and extensive analyses in biological and biomedical fields. These ambitious and challenging issues ask for multi-disciplinary competences that range from engineering to biology. Starting from the aim to integrate microarray technology and microfluidic devices, a complex multilevel analysis platform has been designed, fabricated and tested (All rights reserved-IT Patent number TO2009A000915). This LOC successfully manages to interface microfluidic channels with standard DNA microarray glass slides, in order to implement a complete biological protocol. Typical Micro Electro Mechanical Systems (MEMS) materials and process technologies were employed. A silicon/glass microfluidic chip and a Polydimethylsiloxane (PDMS) reaction chamber were fabricated and interfaced with a standard microarray glass slide. In order to have a high disposable system all micro-elements were passive and an external apparatus provided fluidic driving and thermal control. The major microfluidic and handling problems were investigated and innovative solutions were found. Finally, an entirely automated DNA hybridization protocol was successfully tested with a significant reduction in analysis time and reagent consumption with respect to a conventional protocol.

  5. On-chip microwave circulators using quantum Hall plasmonics

    Science.gov (United States)

    Mahoney, Alice; Colless, James; Pauka, Sebastian; Hornibrook, John; Doherty, Andrew; Reilly, David; Peeters, Lucas; Fox, Eli; Goldhaber-Gordon, David; Kou, Xuefeng; Pan, Lei; Wang, Kang; Watson, John; Gardner, Geoffrey; Manfra, Michael

    Circulators are directional circuit elements integral to technologies including radar systems, microwave communication transceivers and the readout of quantum information devices. Their non-reciprocity commonly arises from the interference of microwaves over the centimetre-scale of the signal wavelength in the presence of bulky magnetic media that breaks time-reversal symmetry. We present a completely passive on-chip microwave circulator with size 1/1000th the wavelength by exploiting the chiral, `slow-light' response of a GaAs/AlGaAs 2-dimensional electron gas in the quantum Hall regime. Further, by implementing this circulator design on a thin film of a magnetic topological insulator (Cr0.12(Bi0.26Sb0.62)2Te3), we show that similar non-reciprocity can be achieved at zero magnetic field. This additional mode of operation serves as a non-invasive probe of edge states in the quantum anomalous Hall effect, while also extending the possibility for integration with superconducting devices.

  6. An electrochemical pumping system for on-chip gradient generation.

    Science.gov (United States)

    Xie, Jun; Miao, Yunan; Shih, Jason; He, Qing; Liu, Jun; Tai, Yu-Chong; Lee, Terry D

    2004-07-01

    Within the context of microfluidic systems, it has been difficult to devise pumping systems that can deliver adequate flow rates at high pressure for applications such as HPLC. An on-chip electrochemical pumping system based on electrolysis that offers certain advantages over designs that utilize electroosmotic driven flow has been fabricated and tested. The pump was fabricated on both silicon and glass substrates using photolithography. The electrolysis electrodes were formed from either platinum or gold, and SU8, an epoxy-based photoresist, was used to form the pump chambers. A glass cover plate and a poly(dimethylsiloxane) (PDMS) gasket were used to seal the chambers. Filling of the chambers was accomplished by using a syringe to inject liquid via filling ports, which were later sealed using a glass cover plate. The current supplied to the electrodes controlled the rate of gas formation and, thus, the resulting fluid flow rate. At low backpressures, flow rates >1 microL/min have been demonstrated using polymer electrospray nozzle, we have confirmed the successful generation of a solvent gradient via a mass spectrometer.

  7. Hardware implementation of on -chip learning using re configurable FPGAS

    International Nuclear Information System (INIS)

    Kelash, H.M.; Sorour, H.S; Mahmoud, I.I.; Zaki, M; Haggag, S.S.

    2009-01-01

    The multilayer perceptron (MLP) is a neural network model that is being widely applied in the solving of diverse problems. A supervised training is necessary before the use of the neural network.A highly popular learning algorithm called back-propagation is used to train this neural network model. Once trained, the MLP can be used to solve classification problems. An interesting method to increase the performance of the model is by using hardware implementations. The hardware can do the arithmetical operations much faster than software. In this paper, a design and implementation of the sequential mode (stochastic mode) of backpropagation algorithm with on-chip learning using field programmable gate arrays (FPGA) is presented, a pipelined adaptation of the on-line back propagation algorithm (BP) is shown.The hardware implementation of forward stage, backward stage and update weight of backpropagation algorithm is also presented. This implementation is based on a SIMD parallel architecture of the forward propagation the diagnosis of the multi-purpose research reactor of Egypt accidents is used to test the proposed system

  8. On-chip skin color detection using a triple-well CMOS process

    Science.gov (United States)

    Boussaid, Farid; Chai, Douglas; Bouzerdoum, Abdesselam

    2004-03-01

    In this paper, a current-mode VLSI architecture enabling on read-out skin detection without the need for any on-chip memory elements is proposed. An important feature of the proposed architecture is that it removes the need for demosaicing. Color separation is achieved using the strong wavelength dependence of the absorption coefficient in silicon. This wavelength dependence causes a very shallow absorption of blue light and enables red light to penetrate deeply in silicon. A triple-well process, allowing a P-well to be placed inside an N-well, is chosen to fabricate three vertically integrated photodiodes acting as the RGB color detector for each pixel. Pixels of an input RGB image are classified as skin or non-skin pixels using a statistical skin color model, chosen to offer an acceptable trade-off between skin detection performance and implementation complexity. A single processing unit is used to classify all pixels of the input RGB image. This results in reduced mismatch and also in an increased pixel fill-factor. Furthermore, the proposed current-mode architecture is programmable, allowing external control of all classifier parameters to compensate for mismatch and changing lighting conditions.

  9. Computational sensing of herpes simplex virus using a cost-effective on-chip microscope

    KAUST Repository

    Ray, Aniruddha

    2017-07-03

    Caused by the herpes simplex virus (HSV), herpes is a viral infection that is one of the most widespread diseases worldwide. Here we present a computational sensing technique for specific detection of HSV using both viral immuno-specificity and the physical size range of the viruses. This label-free approach involves a compact and cost-effective holographic on-chip microscope and a surface-functionalized glass substrate prepared to specifically capture the target viruses. To enhance the optical signatures of individual viruses and increase their signal-to-noise ratio, self-assembled polyethylene glycol based nanolenses are rapidly formed around each virus particle captured on the substrate using a portable interface. Holographic shadows of specifically captured viruses that are surrounded by these self-assembled nanolenses are then reconstructed, and the phase image is used for automated quantification of the size of each particle within our large field-of-view, ~30 mm2. The combination of viral immuno-specificity due to surface functionalization and the physical size measurements enabled by holographic imaging is used to sensitively detect and enumerate HSV particles using our compact and cost-effective platform. This computational sensing technique can find numerous uses in global health related applications in resource-limited environments.

  10. Co-design of on-chip antennas and circuits for a UNII band monolithic transceiver

    KAUST Repository

    Shamim, Atif

    2012-07-28

    The surge of highly integrated and multifunction wireless devices has necessitated the designers to think outside the box for solutions that are unconventional. The new trends have provided the impetus for low cost and compact RF System-on-Chip (SoC) approaches [1]. The major advantages of SoC are miniaturization and cost reduction. A major bottleneck to the true realization of monolithic RF SoC transceivers is the implementation of on-chip antennas with circuitry. Though complete integrated transceivers with on-chip antennas have been demonstrated, these designs are generally for high frequencies. Moreover, they either use non-standard CMOS processes or additional fabrication steps to enhance the antenna efficiency, which in turn adds to the cost of the system [2-3]. Another challenge related to the on-chip antennas is the characterization of their radiation properties. Most of the recently reported work (summarized in Table I) shows that very few on-chip antennas are characterized. Our previous work [4], demonstrated a Phase Lock Loop (PLL) based transmitter (TX) with an on-chip antenna. However, the radiation from the on-chip antenna experienced strong interference due to 1) some active circuitry on one side of the chip and 2) the PCB used to mount the chip in the anechoic chamber. This paper presents, for the first time, a complete 5.2 GHz (UNII band) transceiver with separate TX and receiver (RX) antennas. To the author\\'s best knowledge, its size of 3 mm2 is the smallest reported for a UNII band transceiver with two on-chip antennas. Both antennas are characterized for their radiation properties through an on-wafer custom measurement setup. The strategy to co-design on-chip antennas with circuits, resultant trade-offs and measurement challenges have also been discussed. © 2010 IEEE.

  11. Design and FPGA-implementation of multilayer neural networks with on-chip learning

    International Nuclear Information System (INIS)

    Haggag, S.S.M.Y

    2008-01-01

    Artificial Neural Networks (ANN) is used in many applications in the industry because of their parallel structure, high speed, and their ability to give easy solution to complicated problems. For example identifying the orange and apple in the sorting machine with neural network is easier than using image processing techniques to do the same thing. There are different software for designing, training, and testing the ANN, but in order to use the ANN in the industry, it should be implemented on hardware outside the computer. Neural networks are artificial systems inspired on the brain's cognitive behavior, which can learn tasks with some degree of complexity, such as signal processing, diagnosis, robotics, image processing, and pattern recognition. Many applications demand a high computing power and the traditional software implementation are not sufficient.This thesis presents design and FPGA implementation of Multilayer Neural Networks with On-chip learning in re-configurable hardware. Hardware implementation of neural network algorithm is very interesting due their high performance and they can easily be made parallel. The architecture proposed herein takes advantage of distinct data paths for the forward and backward propagation stages and a pipelined adaptation of the on- line backpropagation algorithm to significantly improve the performance of the learning phase. The architecture is easily scalable and able to cope with arbitrary network sizes with the same hardware. The implementation is targeted diagnosis of the Research Reactor accidents to avoid the risk of occurrence of a nuclear accident. The proposed designed circuits are implemented using Xilinx FPGA Chip XC40150xv and occupied 73% of Chip CLBs. It achieved 10.8 μs to take decision in the forward propagation compared with current software implemented of RPS which take 24 ms. The results show that the proposed architecture leads to significant speed up comparing to high end software solutions. On-chip

  12. Improved On-Chip Measurement of Delay in an FPGA or ASIC

    Science.gov (United States)

    Chen, Yuan; Burke, Gary; Sheldon, Douglas

    2007-01-01

    An improved design has been devised for on-chip-circuitry for measuring the delay through a chain of combinational logic elements in a field-programmable gate array (FPGA) or application-specific integrated circuit (ASIC). In the improved design, the delay chain does not include input and output buffers and is not configured as an oscillator. Instead, the delay chain is made part of the signal chain of an on-chip pulse generator. The duration of the pulse is measured on-chip and taken to equal the delay.

  13. A system-level multiprocessor system-on-chip modeling framework

    DEFF Research Database (Denmark)

    Virk, Kashif Munir; Madsen, Jan

    2004-01-01

    We present a system-level modeling framework to model system-on-chips (SoC) consisting of heterogeneous multiprocessors and network-on-chip communication structures in order to enable the developers of today's SoC designs to take advantage of the flexibility and scalability of network-on-chip and...... SoC design. We show how a hand-held multimedia terminal, consisting of JPEG, MP3 and GSM applications, can be modeled as a multiprocessor SoC in our framework....

  14. Essential issues in SOC design designing complex systems-on-chip

    CERN Document Server

    Lin, Youn-long Steve

    2007-01-01

    Covers issues related to system-on-chip (SoC) design. This book covers IP development, verification, integration, chip implementation, testing and software. It contains valuable academic and industrial examples for those involved with the design of complex SOCs.

  15. Implementation of Guaranteed Services in the MANGO Clockless Network-on-Chip

    DEFF Research Database (Denmark)

    Bjerregaard, Tobias; Sparsø, Jens

    2006-01-01

    (clockless implementation, standard socket access points, and guaranteed communication services) make MANGO suitable for a modular SoC design flow is explained. Among the advantages of using clockless circuit techniques are inherent global timing closure, low forward latency in pipelines, and zero dynamic......Shared, segmented, on-chip interconnection networks, known as networks-on-chip (NoC), may become the preferred way of interconnecting intellectual property (IP) cores in future giga-scale system-on-chip (SoC) designs. A NoC can provide the required communication bandwidth while accommodating...... the effects of scaling microchip technologies. Equally important, a NoC facilitates a truly modular and scalable design flow. The MANGO (message-passing asynchronous network-on-chip providing guaranteed services over open core protocol (OCP) interfaces) NoC is presented, and how its key characteristics...

  16. Direct quantification of transendothelial electrical resistance in organs-on-chips

    NARCIS (Netherlands)

    van der Helm, Marieke Willemijn; Odijk, Mathieu; Frimat, Jean-Philippe; van der Meer, Andries Dirk; Eijkel, Jan C.T.; van den Berg, Albert; Segerink, Loes Irene

    2016-01-01

    Measuring transendothelial or transepithelial electrical resistance (TEER) is a widely used method to monitor cellular barrier tightness in organs-on-chips. Unfortunately, integrated electrodes close to the cellular barrier hamper visual inspection of the cells or require specialized cleanroom

  17. Optical chromatography using a photonic crystal fiber with on-chip fluorescence excitation

    CSIR Research Space (South Africa)

    Ashok, AC

    2010-03-01

    Full Text Available The authors describe the realization of integrated optical chromatography, in conjunction with on-chip fluorescence excitation, in a monolithically fabricated poly-dimethylsiloxane (PDMS) microfluidic chip. The unique endlessly-single-mode guiding...

  18. On-chip RF-to-optical transducer (Conference Presentation)

    Science.gov (United States)

    Simonsen, Anders; Tsaturyan, Yeghishe; Seis, Yannick; Schmid, Silvan; Schliesser, Albert; Polzik, Eugene S.

    2016-04-01

    Recent advances in the fabrication of nano- and micromechanical elements enable the realization of high-quality mechanical resonators with masses so small that the forces from optical photons can have a significant impact on their motion. This facilitates a strong interaction between mechanical motion and light, or phonons and photons. This interaction is the corner stone of the field of optomechanics and allows, for example, for ultrasensitive detection and manipulation of mechanical motion using laser light. Remarkably, today these techniques can be extended into the quantum regime, in which fundamental fluctuations of light and mechanics govern the system's behavior. Micromechanical elements can also interact strongly with other physical systems, which is the central aspect of many micro-electro-mechanical based sensors. Micromechanical elements can therefore act as a bridge between these diverse systems, plus technologies that utilize them, and the mature toolbox of optical techniques that routinely operates at the quantum limit. In a previous work [1], we demonstrated such a bridge by realizing simultaneous coupling between an electronic LC circuit and a quantum-noise limited optical interferometer. The coupling was mediated by a mechanical oscillator forming a mechanically compliant capacitor biased with a DC voltage. The latter enhances the electromechanical interaction all the way to the strong coupling regime. That scheme allowed optical detection of electronic signals with effective noise temperatures far below the actual temperature of the mechanical element. On-chip integration of the electrical, mechanical and optical elements is necessary for an implementation of the transduction scheme that is viable for commercial applications. Reliable assembly of a strongly coupled electromechanical device, and inclusion of an optical cavity for enhanced optical readout, are key features of the new platform. Both can be achieved with standard cleanroom fabrication

  19. Runtime adaptive multi-processor system-on-chip: RAMPSoC

    OpenAIRE

    Göhringer, D.; Hübner, M.; Schatz, V.; Becker, J.

    2008-01-01

    Current trends in high performance computing show, that the usage of multiprocessor systems on chip are one approach for the requirements of computing intensive applications. The multiprocessor system on chip (MPSoC) approaches often provide a static and homogeneous infrastructure of networked microprocessor on the chip die. A novel idea in this research area is to introduce the dynamic adaptivity of reconfigurable hardware in order to provide a flexible heterogeneous set of processing elemen...

  20. On-Chip Method to Measure Mechanical Characteristics of a Single Cell by Using Moiré Fringe

    Directory of Open Access Journals (Sweden)

    Hirotaka Sugiura

    2015-06-01

    Full Text Available We propose a method to characterize the mechanical properties of cells using a robot-integrated microfluidic chip (robochip and microscopy. The microfluidic chip is designed to apply the specified deformations to a single detached cell using an on-chip actuator probe. The reaction force is simultaneously measured using an on-chip force sensor composed of a hollow folded beam and probe structure. In order to measure the cellular characteristics in further detail, a sub-pixel level of resolution of probe position is required. Therefore, we utilize the phase detection of moiré fringe. Using this method, the experimental resolution of the probe position reaches 42 nm. This is approximately ten times smaller than the optical wavelength, which is the limit of sharp imaging with a microscope. Calibration of the force sensor is also important in accurately measuring cellular reaction forces. We calibrated the spring constant from the frequency response, by the proposed sensing method of the probe position. As a representative of mechanical characteristics, we measured the elastic modulus of Madin-Darby Cannie Kidney (MDCK cells. In spite of the rigid spring constant, the resolution and sensitivity were twice that achieved in our previous study. Unique cellular characteristics can be elucidated by the improvements in sensing resolution and accuracy.

  1. Object Recognition System-on-Chip Using the Support Vector Machines

    Directory of Open Access Journals (Sweden)

    Houzet Dominique

    2005-01-01

    Full Text Available The first aim of this work is to propose the design of a system-on-chip (SoC platform dedicated to digital image and signal processing, which is tuned to implement efficiently multiply-and-accumulate (MAC vector/matrix operations. The second aim of this work is to implement a recent promising neural network method, namely, the support vector machine (SVM used for real-time object recognition, in order to build a vision machine. With such a reconfigurable and programmable SoC platform, it is possible to implement any SVM function dedicated to any object recognition problem. The final aim is to obtain an automatic reconfiguration of the SoC platform, based on the results of the learning phase on an objects' database, which makes it possible to recognize practically any object without manual programming. Recognition can be of any kind that is from image to signal data. Such a system is a general-purpose automatic classifier. Many applications can be considered as a classification problem, but are usually treated specifically in order to optimize the cost of the implemented solution. The cost of our approach is more important than a dedicated one, but in a near future, hundreds of millions of gates will be common and affordable compared to the design cost. What we are proposing here is a general-purpose classification neural network implemented on a reconfigurable SoC platform. The first version presented here is limited in size and thus in object recognition performances, but can be easily upgraded according to technology improvements.

  2. A Low-Power Integrated Humidity CMOS Sensor by Printing-on-Chip Technology

    Directory of Open Access Journals (Sweden)

    Chang-Hung Lee

    2014-05-01

    Full Text Available A low-power, wide-dynamic-range integrated humidity sensing chip is implemented using a printable polymer sensing material with an on-chip pulse-width-modulation interface circuit. By using the inkjet printing technique, poly(3,4-ethylene-dioxythiophene/polystyrene sulfonate that has humidity sensing features can be printed onto the top metal layer of a 0.35 μm CMOS IC. The developed printing-on-chip humidity sensor achieves a heterogeneous three dimensional sensor system-on-chip architecture. The humidity sensing of the implemented printing-on-chip sensor system is experimentally tested. The sensor shows a sensitivity of 0.98% to humidity in the atmosphere. The maximum dynamic range of the readout circuit is 9.8 MΩ, which can be further tuned by the frequency of input signal to fit the requirement of the resistance of printed sensor. The power consumption keeps only 154 μW. This printing-on-chip sensor provides a practical solution to fulfill an ultra-small integrated sensor for the applications in miniaturized sensing systems.

  3. A low-power integrated humidity CMOS sensor by printing-on-chip technology.

    Science.gov (United States)

    Lee, Chang-Hung; Chuang, Wen-Yu; Cowan, Melissa A; Wu, Wen-Jung; Lin, Chih-Ting

    2014-05-23

    A low-power, wide-dynamic-range integrated humidity sensing chip is implemented using a printable polymer sensing material with an on-chip pulse-width-modulation interface circuit. By using the inkjet printing technique, poly(3,4-ethylene-dioxythiophene)/polystyrene sulfonate that has humidity sensing features can be printed onto the top metal layer of a 0.35 μm CMOS IC. The developed printing-on-chip humidity sensor achieves a heterogeneous three dimensional sensor system-on-chip architecture. The humidity sensing of the implemented printing-on-chip sensor system is experimentally tested. The sensor shows a sensitivity of 0.98% to humidity in the atmosphere. The maximum dynamic range of the readout circuit is 9.8 MΩ, which can be further tuned by the frequency of input signal to fit the requirement of the resistance of printed sensor. The power consumption keeps only 154 μW. This printing-on-chip sensor provides a practical solution to fulfill an ultra-small integrated sensor for the applications in miniaturized sensing systems.

  4. A Review of Some Superconducting Technologies for AtLAST: Parametric Amplifiers, Kinetic Inductance Detectors, and On-Chip Spectrometers

    Science.gov (United States)

    Noroozian, Omid

    2018-01-01

    The current state of the art for some superconducting technologies will be reviewed in the context of a future single-dish submillimeter telescope called AtLAST. The technologies reviews include: 1) Kinetic Inductance Detectors (KIDs), which have now been demonstrated in large-format kilo-pixel arrays with photon background-limited sensitivity suitable for large field of view cameras for wide-field imaging. 2) Parametric amplifiers - specifically the Traveling-Wave Kinetic Inductance (TKIP) amplifier - which has enormous potential to increase sensitivity, bandwidth, and mapping speed of heterodyne receivers, and 3) On-chip spectrometers, which combined with sensitive direct detectors such as KIDs or TESs could be used as Multi-Object Spectrometers on the AtLAST focal plane, and could provide low-medium resolution spectroscopy of 100 objects at a time in each field of view.

  5. Antennas for Terahertz Applications: Focal Plane Arrays and On-chip Non-contact Measurement Probes

    Science.gov (United States)

    Trichopoulos, Georgios C.

    . Additionally, a butterfly-shaped antenna layout is introduced that enables broadband imaging. The alternative design presented here, allows for video-rate imaging in the 0.6--1.2 THz band and maintains a small antenna footprint, resulting in densely packed FPAs. In both antenna designs, we optimize the impedance matching between the antennas and the integrated electronic devices, thus achieving optimum responsivity levels for high sensitivity and low noise performance. Subsequently, we present the design details of the first THz camera and the first THz camera images captured. With the realized THz camera, imaging of concealed objects is achieved with space. Thus, the hybrid electromagnetic model allows fast and accurate design of THz antennas and modeling of the complete THz imaging system. Finally, motivated by the novel THz antenna layouts and the quasioptical techniques, we developed a novel non-contact probe measurement method for on-chip device characterization. In the THz regime, traditional contact probes are too small and fragile, thus inhibiting accurate and reliable circuit measurements. By integrating the device under test (DUT) with THz antennas that act as the measurement probes, we may couple the incident and reflected signal from and to the network analyzer without residing to any physical connection.

  6. On-chip spin-controlled orbital angular momentum directional coupling

    Science.gov (United States)

    Xie, Zhenwei; Lei, Ting; Si, Guangyuan; Du, Luping; Lin, Jiao; Min, Changjun; Yuan, Xiaocong

    2018-01-01

    Optical vortex beams have many potential applications in the particle trapping, quantum encoding, optical orbital angular momentum (OAM) communications and interconnects. However, the on-chip compact OAM detection is still a big challenge. Based on a holographic configuration and a spin-dependent structure design, we propose and demonstrate an on-chip spin-controlled OAM-mode directional coupler, which can couple the OAM signal to different directions due to its topological charge. While the directional coupling function can be switched on/off by altering the spin of incident beam. Both simulation and experimental measurements verify the validity of the proposed approach. This work would benefit the on-chip OAM devices for optical communications and high dimensional quantum coding/decoding in the future.

  7. Low-cost low-power UHF RFID tag with on-chip antenna

    Energy Technology Data Exchange (ETDEWEB)

    Xi Jingtian; Yan Na; Che Wenyi; Xu Conghui; Wang Xiao; Yang Yuqing; Jian Hongyan; Min Hao, E-mail: jtxi@fudan.edu.c [State Key Laboratory of ASIC and System, Auto-ID Laboratory, Fudan University, Shanghai 201203 (China)

    2009-07-15

    This paper presents an EPC Class 1 Generation 2 compatible tag with on-chip antenna implemented in the SMIC 0.18 {mu}m standard CMOS process. The UHF tag chip includes an RF/analog front-end, a digital baseband, and a 640-bit EEPROM memory. The on-chip antenna is optimized based on a novel parasitic-aware model. The rectifier is optimized to achieve a power conversion efficiency up to 40% by applying a self-bias feedback and threshold compensation techniques. A good match between the tag circuits and the on-chip antenna is realized by adjusting the rectifier input impedance. Measurements show that the presented tag can achieve a communication range of 1 cm with 1 W reader output power using a 1 x 1 cm{sup 2} single-turn loop reader antenna.

  8. A Performance Analytical Strategy for Network-on-Chip Router with Input Buffer Architecture

    Directory of Open Access Journals (Sweden)

    WANG, J.

    2012-11-01

    Full Text Available In this paper, a performance analytical strategy is proposed for Network-on-Chip router with input buffer architecture. First, an analytical model is developed based on semi-Markov process. For the non-work-conserving router with small buffer size, the model can be used to analyze the schedule delay and the average service time for each buffer when given the related parameters. Then, the packet average delay in router is calculated by using the model. Finally, we validate the effectiveness of our strategy by simulation. By comparing our analytical results to simulation results, we show that our strategy successfully captures the Network-on-Chip router performance and it performs better than the state-of-art technology. Therefore, our strategy can be used as an efficiency performance analytical tool for Network-on-Chip design.

  9. Scalable Motion Estimation Processor Core for Multimedia System-on-Chip Applications

    Science.gov (United States)

    Lai, Yeong-Kang; Hsieh, Tian-En; Chen, Lien-Fei

    2007-04-01

    In this paper, we describe a high-throughput and scalable motion estimation processor architecture for multimedia system-on-chip applications. The number of processing elements (PEs) is scalable according to the variable algorithm parameters and the performance required for different applications. Using the PE rings efficiently and an intelligent memory-interleaving organization, the efficiency of the architecture can be increased. Moreover, using efficient on-chip memories and a data management technique can effectively decrease the power consumption and memory bandwidth. Techniques for reducing the number of interconnections and external memory accesses are also presented. Our results demonstrate that the proposed scalable PE-ringed architecture is a flexible and high-performance processor core in multimedia system-on-chip applications.

  10. Applications of geological labs on chip for CO_2 storage issues

    International Nuclear Information System (INIS)

    Morais, Sandy

    2016-01-01

    CO_2 geological storage in deep saline aquifers represents a mediation solution for reducing the anthropogenic CO_2 emissions. Consequently, this kind of storage requires adequate scientific knowledge to evaluate injection scenarios, estimate reservoir capacity and assess leakage risks. In this context, we have developed and used high pressure/high temperature micro-fluidic tools to investigate the different mechanisms associated with CO_2 geological storage in deep saline aquifers. The silicon-Pyrex 2D porous networks (Geological Labs On Chips) can replicate the reservoir p,T conditions (25 ≤ T ≤ 50 C, 50 ≤ p ≤ 10 MPa), geological and topological properties. This thesis manuscript first highlights the strategies developed during this work to fabricate the GLoCs and to access to global characteristics of our porous media such as porosity and permeability, which are later compared to numerical modelling results. The carbon dioxide detection in GLoCs mimicking p,T conditions of geological reservoirs by using the direct integration of optical fiber for IR spectroscopy is presented. I then detail the strategies for following the dissolution of carbonates in GLoCs with X-rays laminography experiments.Then, the manuscript focuses on the use of GLoCs to investigate each CO_2 trapping mechanism at the pore scale. The direct optical visualization and image processing allow us to follow the evolution of the injected CO_2/aqueous phase within the reservoir, including displacement mechanisms and pore saturation levels. Eventually, I present the ongoing works such as experiments with reactive brines and hydrates formations in porous media [fr

  11. Globally Stable Microresonator Turing Pattern Formation for Coherent High-Power THz Radiation On-Chip

    Science.gov (United States)

    Huang, Shu-Wei; Yang, Jinghui; Yang, Shang-Hua; Yu, Mingbin; Kwong, Dim-Lee; Zelevinsky, T.; Jarrahi, Mona; Wong, Chee Wei

    2017-10-01

    In nonlinear microresonators driven by continuous-wave (cw) lasers, Turing patterns have been studied in the formalism of the Lugiato-Lefever equation with emphasis on their high coherence and exceptional robustness against perturbations. Destabilization of Turing patterns and the transition to spatiotemporal chaos, however, limit the available energy carried in the Turing rolls and prevent further harvest of their high coherence and robustness to noise. Here, we report a novel scheme to circumvent such destabilization, by incorporating the effect of local mode hybridizations, and we attain globally stable Turing pattern formation in chip-scale nonlinear oscillators with significantly enlarged parameter space, achieving a record-high power-conversion efficiency of 45% and an elevated peak-to-valley contrast of 100. The stationary Turing pattern is discretely tunable across 430 GHz on a THz carrier, with a fractional frequency sideband nonuniformity measured at 7.3 ×10-14 . We demonstrate the simultaneous microwave and optical coherence of the Turing rolls at different evolution stages through ultrafast optical correlation techniques. The free-running Turing-roll coherence, 9 kHz in 200 ms and 160 kHz in 20 minutes, is transferred onto a plasmonic photomixer for one of the highest-power THz coherent generations at room temperature, with 1.1% optical-to-THz power conversion. Its long-term stability can be further improved by more than 2 orders of magnitude, reaching an Allan deviation of 6 ×10-10 at 100 s, with a simple computer-aided slow feedback control. The demonstrated on-chip coherent high-power Turing-THz system is promising to find applications in astrophysics, medical imaging, and wireless communications.

  12. On-chip generation of high-dimensional entangled quantum states and their coherent control.

    Science.gov (United States)

    Kues, Michael; Reimer, Christian; Roztocki, Piotr; Cortés, Luis Romero; Sciara, Stefania; Wetzel, Benjamin; Zhang, Yanbing; Cino, Alfonso; Chu, Sai T; Little, Brent E; Moss, David J; Caspani, Lucia; Azaña, José; Morandotti, Roberto

    2017-06-28

    Optical quantum states based on entangled photons are essential for solving questions in fundamental physics and are at the heart of quantum information science. Specifically, the realization of high-dimensional states (D-level quantum systems, that is, qudits, with D > 2) and their control are necessary for fundamental investigations of quantum mechanics, for increasing the sensitivity of quantum imaging schemes, for improving the robustness and key rate of quantum communication protocols, for enabling a richer variety of quantum simulations, and for achieving more efficient and error-tolerant quantum computation. Integrated photonics has recently become a leading platform for the compact, cost-efficient, and stable generation and processing of non-classical optical states. However, so far, integrated entangled quantum sources have been limited to qubits (D = 2). Here we demonstrate on-chip generation of entangled qudit states, where the photons are created in a coherent superposition of multiple high-purity frequency modes. In particular, we confirm the realization of a quantum system with at least one hundred dimensions, formed by two entangled qudits with D = 10. Furthermore, using state-of-the-art, yet off-the-shelf telecommunications components, we introduce a coherent manipulation platform with which to control frequency-entangled states, capable of performing deterministic high-dimensional gate operations. We validate this platform by measuring Bell inequality violations and performing quantum state tomography. Our work enables the generation and processing of high-dimensional quantum states in a single spatial mode.

  13. Advanced Technology for Ultra-Low Power System-on-Chip (SoC)

    Science.gov (United States)

    2017-06-01

    was proposed for lower power applications with Ioff=10pA/μm and VDD=0.5V. In this project, the optimized structure shows great potential in both Lg...AFRL-RY-WP-TR-2017-0115 ADVANCED TECHNOLOGY FOR ULTRA-LOW POWER SYSTEM-ON-CHIP (SoC) Jason Woo, Weicong Li, and Peng Lu University of California...September 2015 – 31 March 2017 4. TITLE AND SUBTITLE ADVANCED TECHNOLOGY FOR ULTRA-LOW POWER SYSTEM-ON- CHIP (SoC) 5a. CONTRACT NUMBER FA8650-15-1-7574 5b

  14. CMOS capacitive sensors for lab-on-chip applications a multidisciplinary approach

    CERN Document Server

    Ghafar-Zadeh, Ebrahim

    2010-01-01

    The main components of CMOS capacitive biosensors including sensing electrodes, bio-functionalized sensing layer, interface circuitries and microfluidic packaging are verbosely explained in chapters 2-6 after a brief introduction on CMOS based LoCs in Chapter 1. CMOS Capacitive Sensors for Lab-on-Chip Applications is written in a simple pedagogical way. It emphasises practical aspects of fully integrated CMOS biosensors rather than mathematical calculations and theoretical details. By using CMOS Capacitive Sensors for Lab-on-Chip Applications, the reader will have circuit design methodologies,

  15. Autonomic networking-on-chip bio-inspired specification, development, and verification

    CERN Document Server

    Cong-Vinh, Phan

    2011-01-01

    Despite the growing mainstream importance and unique advantages of autonomic networking-on-chip (ANoC) technology, Autonomic Networking-On-Chip: Bio-Inspired Specification, Development, and Verification is among the first books to evaluate research results on formalizing this emerging NoC paradigm, which was inspired by the human nervous system. The FIRST Book to Assess Research Results, Opportunities, & Trends in ""BioChipNets"" The third book in the Embedded Multi-Core Systems series from CRC Press, this is an advanced technical guide and reference composed of contributions from prominent re

  16. Fabrication and characterization of on-chip optical nonlinear chalcogenide nanofiber devices.

    Science.gov (United States)

    Zhang, Qiming; Li, Ming; Hao, Qiang; Deng, Dinghuan; Zhou, Hui; Zeng, Heping; Zhan, Li; Wu, Xiang; Liu, Liying; Xu, Lei

    2010-11-15

    Chalcogenide (As(2)S(3)) nanofibers as narrow as 200 nm in diameter are drawn by the fiber pulling method, are successfully embedded in SU8 polymer, and form on-chip waveguides and high-Q microknot resonators (Q = 3.9 × 10(4)) with smooth cleaved end faces. Resonance tuning of resonators is realized by localized laser irradiation. Strong supercontinuum generation with a bandwidth of 500 nm is achieved in a 7-cm-long on-chip chalcogenide waveguide. Our result provides a method for the development of compact, high-optical-quality, and robust photonic devices.

  17. Self-Powered Functional Device Using On-Chip Power Generation

    KAUST Repository

    Hussain, Muhammad Mustafa

    2012-01-26

    An apparatus, system, and method for a self-powered device using on-chip power generation. In some embodiments, the apparatus includes a substrate, a power generation module on the substrate, and a power storage module on the substrate. The power generation module may include a thermoelectric generator made of bismuth telluride.

  18. MEMS-based wavelength and orbital angular momentum demultiplexer for on-chip applications

    DEFF Research Database (Denmark)

    Lyubopytov, Vladimir; Porfirev, Alexey P.; Gurbatov, Stanislav O.

    2017-01-01

    Summary form only given. We demonstrate a new tunable MEMS-based WDM&OAM Fabry-Pérot filter for simultaneous wavelength (WDM) and Orbital Angular Momentum (OAM) (de)multiplexing. The WDM&OAM filter is suitable for dense on-chip integration and dedicated for the next generation of optical...

  19. A Network Traffic Generator Model for Fast Network-on-Chip Simulation

    DEFF Research Database (Denmark)

    Mahadevan, Shankar; Angiolini, Frederico; Storgaard, Michael

    2005-01-01

    For Systems-on-Chip (SoCs) development, a predominant part of the design time is the simulation time. Performance evaluation and design space exploration of such systems in bit- and cycle-true fashion is becoming prohibitive. We propose a traffic generation (TG) model that provides a fast...

  20. Standardized and modular microfluidic platform for fast lab on chip system development

    NARCIS (Netherlands)

    Dekker, Stefan; van den Berg, Albert; Odijk, Mathieu; Lee, Abraham; DeVoe, Don

    2017-01-01

    This paper reports a modular microfluidic system with standardized parts, enabling rapid prototyping of lab on chip systems. Herewith contributing to the technology transfer from academy to industry. The use of standardized parts also makes it possible to design a microfluidic systems in a top down

  1. Two-Dimensional Programmable Manipulation of Magnetic Nanoparticles on-Chip

    DEFF Research Database (Denmark)

    Sarella, Anandakumar; Torti, Andrea; Donolato, Marco

    2014-01-01

    A novel device is designed for on-chip selective trap and two-dimensional remote manipulation of single and multiple fluid-borne magnetic particles using field controlled magnetic domain walls in circular nanostructures. The combination of different ring-shaped nanostructures and field sequences ...

  2. A low-cost 2D fluorescence detection system for mm sized beads on-chip

    NARCIS (Netherlands)

    Segerink, Loes Irene; Koster, Maarten J.; Sprenkels, A.J.; van den Berg, Albert

    2012-01-01

    In this paper we describe a compact fluorescence detection system for on-chip analysis of beads, comprising a low-cost optical HD-DVD pickup. The complete system consists of a fluorescence detection unit, a control unit and a microfluidic chip containing microchannels and optical markers. With these

  3. On-chip COMA cache-coherence protocol for microgrids of microthreaded cores

    NARCIS (Netherlands)

    Zhang, L.; Jesshope, C.

    2008-01-01

    This paper describes an on-chip COMA cache coherency protocol to support the microthread model of concurrent program composition. The model gives a sound basis for building multi-core computers as it captures concurrency, abstracts communication and identifies resources, such as processor groups

  4. Advanced Nanofabrication Process Development for Self-Powered System-on-Chip

    KAUST Repository

    Rojas, Jhonathan Prieto

    2010-01-01

    In summary, by using a novel sustainable energy component and scalable nano-patterning for logic and computing module, this work has successfully collected the essential base knowledge and joined two different elements that synergistically will contribute for the future implementation of a Self-Powered System-on-Chip.

  5. DAEDALUS: System-Level Design Methodology for Streaming Multiprocessor Embedded Systems on Chips

    NARCIS (Netherlands)

    Stefanov, T.; Pimentel, A.; Nikolov, H.; Ha, S.; Teich, J.

    2017-01-01

    The complexity of modern embedded systems, which are increasingly based on heterogeneous multiprocessor system-on-chip (MPSoC) architectures, has led to the emergence of system-level design. To cope with this design complexity, system-level design aims at raising the abstraction level of the design

  6. Global On-Chip Differential Interconnects with Optimally-Placed Twists

    NARCIS (Netherlands)

    Mensink, E.; Schinkel, Daniel; Klumperink, Eric A.M.; van Tuijl, Adrianus Johannes Maria; Nauta, Bram

    2005-01-01

    Global on-chip communication is receiving quite some attention as global interconnects are rapidly becoming a speed, power and reliability bottleneck for digital CMOS systems. Recently, we proposed a bus-transceiver test chip in 0.13 μm CMOS using 10 mm long uninterrupted differential interconnects

  7. Self-Powered Functional Device Using On-Chip Power Generation

    KAUST Repository

    Hussain, Muhammad Mustafa

    2012-01-01

    An apparatus, system, and method for a self-powered device using on-chip power generation. In some embodiments, the apparatus includes a substrate, a power generation module on the substrate, and a power storage module on the substrate. The power generation module may include a thermoelectric generator made of bismuth telluride.

  8. On-Chip Manipulation of Protein-Coated Magnetic Beads via Domain-Wall Conduits

    DEFF Research Database (Denmark)

    Donolato, Marco; Vavassori, Paolo; Gobbi, Marco

    2010-01-01

    Geometrically constrained magnetic domain walls (DWs) in magnetic nanowires can be manipulated at the nanometer scale. The inhomogeneous magnetic stray field generated by a DW can capture a magnetic nanoparticle in solution. On-chip nanomanipulation of individual magnetic beads coated with proteins...

  9. On-chip single photon filtering and multiplexing in hybrid quantum photonic circuits.

    Science.gov (United States)

    Elshaari, Ali W; Zadeh, Iman Esmaeil; Fognini, Andreas; Reimer, Michael E; Dalacu, Dan; Poole, Philip J; Zwiller, Val; Jöns, Klaus D

    2017-08-30

    Quantum light plays a pivotal role in modern science and future photonic applications. Since the advent of integrated quantum nanophotonics different material platforms based on III-V nanostructures-, colour centers-, and nonlinear waveguides as on-chip light sources have been investigated. Each platform has unique advantages and limitations; however, all implementations face major challenges with filtering of individual quantum states, scalable integration, deterministic multiplexing of selected quantum emitters, and on-chip excitation suppression. Here we overcome all of these challenges with a hybrid and scalable approach, where single III-V quantum emitters are positioned and deterministically integrated in a complementary metal-oxide-semiconductor-compatible photonic circuit. We demonstrate reconfigurable on-chip single-photon filtering and wavelength division multiplexing with a foot print one million times smaller than similar table-top approaches, while offering excitation suppression of more than 95 dB and efficient routing of single photons over a bandwidth of 40 nm. Our work marks an important step to harvest quantum optical technologies' full potential.Combining different integration platforms on the same chip is currently one of the main challenges for quantum technologies. Here, Elshaari et al. show III-V Quantum Dots embedded in nanowires operating in a CMOS compatible circuit, with controlled on-chip filtering and tunable routing.

  10. Power Efficient Gigabit Communication Over Capacitively Driven RC-Limited On-Chip Interconnects

    NARCIS (Netherlands)

    Mensink, E.; Schinkel, Daniel; Klumperink, Eric A.M.; van Tuijl, Adrianus Johannes Maria; Nauta, Bram

    2010-01-01

    Abstract—This paper presents a set of circuit techniques to achieve high data rate point-to-point communication over long on-chip RC-limited wire-pairs. The ideal line termination impedances for a flat transfer function with linear phase (pure delay) are derived, using an s-parameter wire-pair

  11. Synthesis and Layout of an Asynchronous Network-on-Chip using Standard EDA Tools

    DEFF Research Database (Denmark)

    Müller, Christoph; Kasapaki, Evangelia; Sørensen, Rasmus Bo

    2014-01-01

    is the key role that clock signals play in specifying time-constraints for the synthesis. In this paper explain how we handled the synthesis and layout of an asynchronous network-on-chip for a multi-core platform. Focus is on the design process while the actual NOC-design and its performance are presented...

  12. A Statically Scheduled Time-Division-Multiplexed Network-on-Chip for Real-Time Systems

    DEFF Research Database (Denmark)

    Schoeberl, Martin; Brandner, Florian; Sparsø, Jens

    2012-01-01

    This paper explores the design of a circuit-switched network-on-chip (NoC) based on time-division-multiplexing (TDM) for use in hard real-time systems. Previous work has primarily considered application-specific systems. The work presented here targets general-purpose hardware platforms. We...

  13. Heat management in integrated circuits on-chip and system-level monitoring and cooling

    CERN Document Server

    Ogrenci-Memik, Seda

    2016-01-01

    This essential overview covers the subject of thermal monitoring and management in integrated circuits. Specifically, it focuses on devices and materials that are intimately integrated on-chip (as opposed to in-package or on-board) for the purposes of thermal monitoring and thermal management.

  14. An On-Chip interconnect and protocol stack for multiple communication paradigms and programming models

    NARCIS (Netherlands)

    Hansson, A.; Goossens, Kees

    2009-01-01

    A growing number of applications, with diverse requirements, are integrated on the same System on Chip (SoC) in the form of hardware and software Intellectual Property (IP). The diverse requirements, coupled with the IPs being developed by unrelated design teams, lead to multiple communication

  15. An on-chip interconnect and protocol stack for multiple communication paradigms and programming models

    NARCIS (Netherlands)

    Hansson, M.A.; Goossens, K.G.W.

    2009-01-01

    A growing number of applications, with diverse requirements, are integrated on the same System on Chip (SoC) in the form of hardware and software Intellectual Property (IP). The diverse requirements, coupled with the IPs being developed by unrelated design teams, lead to multiple communication

  16. Integrated lab-on-chip biosensing systems based on magnetic particle actuation : a comprehensive review

    NARCIS (Netherlands)

    Reenen, van A.; Jong, de A.M.; Toonder, den J.M.J.; Prins, M.W.J.

    2014-01-01

    The demand for easy to use and cost effective medical technologies inspires scientists to develop inno-vative lab-on-chip technologies for in-vitro diagnostic testing. To fulfill the medical needs, the tests should be rapid, sensitive, quantitative, miniaturizable, and need to integrate all steps

  17. Dynamic magnetic particle actuation for integrated lab-on-chip biosensing

    NARCIS (Netherlands)

    Jong, de A.M.; Reenen, van A.; Prins, M.W.J.

    2014-01-01

    The demand for easy to use and cost effective medical technologies inspires scientists to develop innovative lab-on-chip technologies for in-vitro diagnostic testing. We study the use of magnetic particles actuated by magnetic fields to perform different microfluidic handling steps of an integrated

  18. Vertical Integration of System-on-Chip Concepts in the Digital Design Curriculum

    Science.gov (United States)

    Tang, Ying; Head, L. M.; Ramachandran, R. P.; Chatman, L. M.

    2011-01-01

    The rapid evolution of System-on-Chip (SoC) challenges academic curricula to keep pace with multidisciplinary/interdisciplinary system thinking. This paper presents a curricular prototype that cuts across artificial course boundaries and provides a meaningful exploration of diverse facets of SoC design. Specifically, experimental contents of a…

  19. Cache aware mapping of streaming apllications on a multiprocessor system-on-chip

    NARCIS (Netherlands)

    Moonen, A.J.M.; Bekooij, M.J.G.; Berg, van den R.M.J.; Meerbergen, van J.; Sciuto, D.; Peng, Z.

    2008-01-01

    Efficient use of the memory hierarchy is critical for achieving high performance in a multiprocessor system- on-chip. An external memory that is shared between processors is a bottleneck in current and future systems. Cache misses and a large cache miss penalty contribute to a low processor

  20. On-chip measurement of the Brownian relaxation frequency of magnetic beads using magnetic tunneling junctions

    DEFF Research Database (Denmark)

    Donolato, M.; Sogne, E.; Dalslet, Bjarke Thomas

    2011-01-01

    We demonstrate the detection of the Brownian relaxation frequency of 250 nm diameter magnetic beads using a lab-on-chip platform based on current lines for exciting the beads with alternating magnetic fields and highly sensitive magnetic tunnel junction (MTJ) sensors with a superparamagnetic free...

  1. Nanotechnology and the Developing World: Lab-on-Chip Technology for Health and Environmental Applications

    Science.gov (United States)

    Mehta, Michael D.

    2008-01-01

    This article argues that advances in nanotechnology in general, and lab-on-chip technology in particular, have the potential to benefit the developing world in its quest to control risks to human health and the environment. Based on the "risk society" thesis of Ulrich Beck, it is argued that the developed world must realign its science and…

  2. Technology for On-Chip Qubit Control with Microfabricated Surface Ion Traps

    Energy Technology Data Exchange (ETDEWEB)

    Highstrete, Clark [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States). Quantum Information Sciences Dept.; Scott, Sean Michael [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States). RF/Optoelectronics Dept.; Nordquist, Christopher D. [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States). RF/Optoelectronics Dept.; Sterk, Jonathan David [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States). Photonic Microsystem Technologies Dept.; Maunz, Peter Lukas Wilhelm [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States). Photonic Microsystem Technologies Dept.; Tigges, Christopher P. [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States). Photonic Microsystem Technologies Dept.; Blain, Matthew Glenn [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States). Photonic Microsystem Technologies Dept.; Heller, Edwin J. [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States). Microsystems Integration Dept.; Stevens, James E. [Sandia National Lab. (SNL-NM), Albuquerque, NM (United States). MESAFab Operations 2 Dept.

    2013-11-01

    Trapped atomic ions are a leading physical system for quantum information processing. However, scalability and operational fidelity remain limiting technical issues often associated with optical qubit control. One promising approach is to develop on-chip microwave electronic control of ion qubits based on the atomic hyperfine interaction. This project developed expertise and capabilities at Sandia toward on-chip electronic qubit control in a scalable architecture. The project developed a foundation of laboratory capabilities, including trapping the 171Yb+ hyperfine ion qubit and developing an experimental microwave coherent control capability. Additionally, the project investigated the integration of microwave device elements with surface ion traps utilizing Sandia’s state-of-the-art MEMS microfabrication processing. This effort culminated in a device design for a multi-purpose ion trap experimental platform for investigating on-chip microwave qubit control, laying the groundwork for further funded R&D to develop on-chip microwave qubit control in an architecture that is suitable to engineering development.

  3. On-chip generation and control of the vortex beam

    Energy Technology Data Exchange (ETDEWEB)

    Liu, Aiping; Wang, Qin [College of Telecommunications and Information Engineering, Nanjing University of Posts and Telecommunications, Nanjing, Jiangsu 210000, China and Key Lab of Broadband Wireless Communication and Sensor Network Technology, Nanjing University of Posts and Telecommunications, Ministry of Education, Nanjing 210003 (China); Zou, Chang-Ling, E-mail: clzou321@ustc.edu.cn [Key Laboratory of Quantum Information, University of Science and Technology of China, CAS, Hefei, Anhui 230026, China and Synergetic Innovation Center of Quantum Information and Quantum Physics, University of Science and Technology of China, Hefei, Anhui 230026 (China); Department of Electric Engineering, Yale University, New Haven, Connecticut 06511 (United States); Ren, Xifeng, E-mail: renxf@ustc.edu.cn; Guo, Guang-Can [Key Laboratory of Quantum Information, University of Science and Technology of China, CAS, Hefei, Anhui 230026, China and Synergetic Innovation Center of Quantum Information and Quantum Physics, University of Science and Technology of China, Hefei, Anhui 230026 (China)

    2016-05-02

    A method to generate and control the amplitude and phase distributions of an optical vortex beam is proposed. By introducing a holographic grating on the top of a dielectric waveguide, the free space vortex beam and the in-plane guiding wave can be converted to each other. This microscale holographic grating is very robust against the variation of geometry parameters. The designed vortex beam generator can produce the target beam with a fidelity up to 0.93, and the working bandwidth is about 175 nm with the fidelity larger than 0.80. In addition, a multiple generator composed of two holographic gratings on two parallel waveguides is studied, which can perform an effective and flexible modulation on the vortex beam by controlling the phase of the input light. Our work opens an available avenue towards the integrated orbital angular momentum devices with multiple degrees of optical freedom, which can be used for optical tweezers, micronano imaging, information processing, and so on.

  4. Organs-on-Chips in Drug Development: The Importance of Involving Stakeholders in Early Health Technology Assessment

    NARCIS (Netherlands)

    Middelkamp, Heleen H.T.; van der Meer, Andries Dirk; Hummel, J. Marjan; Stamatialis, Dimitrios; Mummery, Christine Lindsay; Passier, Petrus Christianus Johannes Josephus; IJzerman, Maarten Joost

    2016-01-01

    Organs-on-chips are three-dimensional, microfluidic cell culture systems that simulate the function of tissues and organ subunits. Organ-on-chip systems are expected to contribute to drug candidate screening and the reduction of animal tests in preclinical drug development and may increase

  5. Low-Noise CMOS Circuits for On-Chip Signal Processing in Focal-Plane Arrays

    Science.gov (United States)

    Pain, Bedabrata

    The performance of focal-plane arrays can be significantly enhanced through the use of on-chip signal processing. Novel, in-pixel, on-focal-plane, analog signal-processing circuits for high-performance imaging are presented in this thesis. The presence of a high background-radiation is a major impediment for infrared focal-plane array design. An in-pixel, background-suppression scheme, using dynamic analog current memory circuit, is described. The scheme also suppresses spatial noise that results from response non-uniformities of photo-detectors, leading to background limited infrared detector readout performance. Two new, low-power, compact, current memory circuits, optimized for operation at ultra-low current levels required in infrared-detection, are presented. The first one is a self-cascading current memory that increases the output impedance, and the second one is a novel, switch feed-through reducing current memory, implemented using error-current feedback. This circuit can operate with a residual absolute -error of less than 0.1%. The storage-time of the memory is long enough to also find applications in neural network circuits. In addition, a voltage-mode, accurate, low-offset, low-power, high-uniformity, random-access sample-and-hold cell, implemented using a CCD with feedback, is also presented for use in background-suppression and neural network applications. A new, low noise, ultra-low level signal readout technique, implemented by individually counting photo-electrons within the detection pixel, is presented. The output of each unit-cell is a digital word corresponding to the intensity of the photon flux, and the readout is noise free. This technique requires the use of unit-cell amplifiers that feature ultra-high-gain, low-power, self-biasing capability and noise in sub-electron levels. Both single-input and differential-input implementations of such amplifiers are investigated. A noise analysis technique is presented for analyzing sampled

  6. ASIC design of a digital fuzzy system on chip for medical diagnostic applications.

    Science.gov (United States)

    Roy Chowdhury, Shubhajit; Roy, Aniruddha; Saha, Hiranmay

    2011-04-01

    The paper presents the ASIC design of a digital fuzzy logic circuit for medical diagnostic applications. The system on chip under consideration uses fuzzifier, memory and defuzzifier for fuzzifying the patient data, storing the membership function values and defuzzifying the membership function values to get the output decision. The proposed circuit uses triangular trapezoidal membership functions for fuzzification patients' data. For minimizing the transistor count, the proposed circuit uses 3T XOR gates and 8T adders for its design. The entire work has been carried out using TSMC 0.35 µm CMOS process. Post layout TSPICE simulation of the whole circuit indicates a delay of 31.27 ns and the average power dissipation of the system on chip is 123.49 mW which indicates a less delay and less power dissipation than the comparable embedded systems reported earlier.

  7. Debugging systems-on-chip communication-centric and abstraction-based techniques

    CERN Document Server

    Vermeulen, Bart

    2014-01-01

    This book describes an approach and supporting infrastructure to facilitate debugging the silicon implementation of a System-on-Chip (SOC), allowing its associated product to be introduced into the market more quickly.  Readers learn step-by-step the key requirements for debugging a modern, silicon SOC implementation, nine factors that complicate this debugging task, and a new debug approach that addresses these requirements and complicating factors.  The authors’ novel communication-centric, scan-based, abstraction-based, run/stop-based (CSAR) debug approach is discussed in detail, showing how it helps to meet debug requirements and address the nine, previously identified factors that complicate debugging silicon implementations of SOCs. The authors also derive the debug infrastructure requirements to support debugging of a silicon implementation of an SOC with their CSAR debug approach. This debug infrastructure consists of a generic on-chip debug architecture, a configurable automated design-for-debug ...

  8. On-Chip SDM Switching for Unicast, Multicast and Traffic Grooming in Data Center Networks

    DEFF Research Database (Denmark)

    Kamchevska, Valerija; Ding, Yunhong; Dalgaard, Kjeld

    2017-01-01

    This paper reports on the use of a novel photonic integrated circuit that facilitates multicast and grooming in an optical data center architecture. The circuit allows for on-chip spatial multiplexing and demultiplexing as well as fiber core switching. Using this device, we experimentally verify...... that multicast and/or grooming can be successfully performed along the full range of output ports, for different group size and different power ratio. Moreover, we experimentally demonstrate SDM transmission and 5 Tbit/s switching using the on-chip fiber switch with integrated fan-in/fan-out devices and achieve...... errorfree performance (BER≤10-9) for a network scenario including simultaneous unicast/multicast switching and traffic grooming....

  9. Core-shell magnetic nanoparticles for on-chip RF inductors

    KAUST Repository

    Koh, Kisik

    2013-01-01

    FeNi3 based core-shell magnetic nanoparticles are demonstrated as the magnetic core material for on-chip, radio frequency (RF) inductors. FeNi3 nanoparticles with 50-150 nm in diameter with 15-20 nm-thick SiO2 coating are chemically synthesized and deposited on a planar inductor as the magnetic core to enhance both inductance (L) and quality factor (Q) of the inductor. Experimentally, the ferromagnetic resonant frequency of the on-chip inductors based on FeNi3 core-shell nanoparticles has been shown to be over several GHz. A post-CMOS process has been developed to integrate the magnetic nanoparticles to a planar inductor and inductance enhancements up to 50% of the original magnitude with slightly enhanced Q-factor up to 1 GHz have been achieved. © 2013 IEEE.

  10. Pattern manipulation via on-chip phase modulation between orbital angular momentum beams

    International Nuclear Information System (INIS)

    Li, Huanlu; Strain, Michael J.; Meriggi, Laura; Sorel, Marc; Chen, Lifeng; Zhu, Jiangbo; Cicek, Kenan; Wang, Jianwei; Thompson, Mark G.; Cai, Xinlun; Yu, Siyuan

    2015-01-01

    An integrated approach to thermal modulation of relative phase between two optical vortices with opposite chirality has been demonstrated on a silicon-on-insulator substrate. The device consists of a silicon-integrated optical vortex emitter and a phase controlled 3 dB coupler. The relative phase between two optical vortices can be actively modulated on chip by applying a voltage on the integrated heater. The phase shift is shown to be linearly proportional to applied electrical power, and the rotation angle of the interference pattern is observed to be inversely proportional to topological charge. This scheme can be used in lab-on-chip, communications and sensing applications. It can be intentionally implemented with other modulation elements to achieve more complicated applications

  11. VLSI Design of SVM-Based Seizure Detection System With On-Chip Learning Capability.

    Science.gov (United States)

    Feng, Lichen; Li, Zunchao; Wang, Yuanfa

    2018-02-01

    Portable automatic seizure detection system is very convenient for epilepsy patients to carry. In order to make the system on-chip trainable with high efficiency and attain high detection accuracy, this paper presents a very large scale integration (VLSI) design based on the nonlinear support vector machine (SVM). The proposed design mainly consists of a feature extraction (FE) module and an SVM module. The FE module performs the three-level Daubechies discrete wavelet transform to fit the physiological bands of the electroencephalogram (EEG) signal and extracts the time-frequency domain features reflecting the nonstationary signal properties. The SVM module integrates the modified sequential minimal optimization algorithm with the table-driven-based Gaussian kernel to enable efficient on-chip learning. The presented design is verified on an Altera Cyclone II field-programmable gate array and tested using the two publicly available EEG datasets. Experiment results show that the designed VLSI system improves the detection accuracy and training efficiency.

  12. System-Level Design Methodologies for Networked Multiprocessor Systems-on-Chip

    DEFF Research Database (Denmark)

    Virk, Kashif Munir

    2008-01-01

    is the first such attempt in the published literature. The second part of the thesis deals with the issues related to the development of system-level design methodologies for networked multiprocessor systems-on-chip at various levels of design abstraction with special focus on the modeling and design...... at the system-level. The multiprocessor modeling framework is then extended to include models of networked multiprocessor systems-on-chip which is then employed to model wireless sensor networks both at the sensor node level as well as the wireless network level. In the third and the final part, the thesis...... to the transaction-level model. The thesis, as a whole makes contributions by describing a design methodology for networked multiprocessor embedded systems at three layers of abstraction from system-level through transaction-level to the cycle accurate level as well as demonstrating it practically by implementing...

  13. Modeling, analysis and optimization of network-on-chip communication architectures

    CERN Document Server

    Ogras, Umit Y

    2013-01-01

    Traditionally, design space exploration for Systems-on-Chip (SoCs) has focused on the computational aspects of the problem at hand. However, as the number of components on a single chip and their performance continue to increase, the communication architecture plays a major role in the area, performance and energy consumption of the overall system. As a result, a shift from computation-based to communication-based design becomes mandatory. Towards this end, network-on-chip (NoC) communication architectures have emerged recently as a promising alternative to classical bus and point-to-point communication architectures. This book explores outstanding research problems related to modeling, analysis and optimization of NoC communication architectures. More precisely, we present novel design methodologies, software tools and FPGA prototypes to aid the design of application-specific NoCs.

  14. Bioprinting and Organ-on-Chip Applications Towards Personalized Medicine for Bone Diseases.

    Science.gov (United States)

    Arrigoni, Chiara; Gilardi, Mara; Bersini, Simone; Candrian, Christian; Moretti, Matteo

    2017-06-01

    The skeleton supports and confers structure to the whole body but several pathological and traumatic conditions affect the bone tissue. Most of those pathological conditions are specific and different among different patients, such as bone defects due to traumatic injuries or bone remodeling alterations due to congenital diseases. In this context, the development of personalized therapies would be highly desirable. In recent years the advent of innovative techniques like bioprinting and microfluidic organ-on-chip raised hopes of achieving key tools helping the application of personalized therapies for bone diseases. In this review we will illustrate the latest progresses in the bioprinting of personalized bone grafts and generation of patient-specific bone-on-chip devices, describing current approaches and limitations and possible future improvements for more effective personalized bone grafts and disease models.

  15. On-chip high-voltage generator design design methodology for charge pumps

    CERN Document Server

    Tanzawa, Toru

    2016-01-01

    This book provides various design techniques for switched-capacitor on-chip high-voltage generators, including charge pump circuits, regulators, level shifters, references, and oscillators.  Readers will see these techniques applied to system design in order to address the challenge of how the on-chip high-voltage generator is designed for Flash memories, LCD drivers, and other semiconductor devices to optimize the entire circuit area and power efficiency with a low voltage supply, while minimizing the cost.  This new edition includes a variety of useful updates, including coverage of power efficiency and comprehensive optimization methodologies for DC-DC voltage multipliers, modeling of extremely low voltage Dickson charge pumps, and modeling and optimum design of AC-DC switched-capacitor multipliers for energy harvesting and power transfer for RFID.

  16. A Fully Integrated Humidity Sensor System-on-Chip Fabricated by Micro-Stamping Technology

    Science.gov (United States)

    Huang, Che-Wei; Huang, Yu-Jie; Lu, Shey-Shi; Lin, Chih-Ting

    2012-01-01

    A fully integrated humidity sensor chip was designed, implemented, and tested. Utilizing the micro-stamping technology, the pseudo-3D sensor system-on-chip (SSoC) architecture can be implemented by stacking sensing materials directly on the top of a CMOS-fabricated chip. The fabricated sensor system-on-chip (2.28 mm × 2.48 mm) integrated a humidity sensor, an interface circuit, a digital controller, and an On-Off Keying (OOK) wireless transceiver. With low power consumption, i.e., 750 μW without RF operation, the sensitivity of developed sensor chip was experimentally verified in the relative humidity (RH) range from 32% to 60%. The response time of the chip was also experimentally verified to be within 5 seconds from RH 36% to RH 64%. As a consequence, the implemented humidity SSoC paves the way toward the an ultra-small sensor system for various applications.

  17. Widely Tunable On-Chip Microwave Circulator for Superconducting Quantum Circuits

    Science.gov (United States)

    Chapman, Benjamin J.; Rosenthal, Eric I.; Kerckhoff, Joseph; Moores, Bradley A.; Vale, Leila R.; Mates, J. A. B.; Hilton, Gene C.; Lalumière, Kevin; Blais, Alexandre; Lehnert, K. W.

    2017-10-01

    We report on the design and performance of an on-chip microwave circulator with a widely (GHz) tunable operation frequency. Nonreciprocity is created with a combination of frequency conversion and delay, and requires neither permanent magnets nor microwave bias tones, allowing on-chip integration with other superconducting circuits without the need for high-bandwidth control lines. Isolation in the device exceeds 20 dB over a bandwidth of tens of MHz, and its insertion loss is small, reaching as low as 0.9 dB at select operation frequencies. Furthermore, the device is linear with respect to input power for signal powers up to hundreds of fW (≈103 circulating photons), and the direction of circulation can be dynamically reconfigured. We demonstrate its operation at a selection of frequencies between 4 and 6 GHz.

  18. On-chip integration of a superconducting microwave circulator and a Josephson parametric amplifier

    Science.gov (United States)

    Rosenthal, Eric I.; Chapman, Benjamin J.; Moores, Bradley A.; Kerckhoff, Joseph; Malnou, Maxime; Palken, D. A.; Mates, J. A. B.; Hilton, G. C.; Vale, L. R.; Ullom, J. N.; Lehnert, K. W.

    Recent progress in microwave amplification based on parametric processes in superconducting circuits has revolutionized the measurement of feeble microwave signals. These devices, which operate near the quantum limit, are routinely used in ultralow temperature cryostats to: readout superconducting qubits, search for axionic dark matter, and characterize astrophysical sensors. However, these amplifiers often require ferrite circulators to separate incoming and outgoing traveling waves. For this reason, measurement efficiency and scalability are limited. In order to facilitate the routing of quantum signals we have created a superconducting, on-chip microwave circulator without permanent magnets. We integrate our circulator on-chip with a Josephson parametric amplifier for the purpose of near quantum-limited directional amplification. In this talk I will present a design overview and preliminary measurements.

  19. Recent advances in graphene-based planar micro-supercapacitors for on-chip energy storage

    Institute of Scientific and Technical Information of China (English)

    Zhong-Shuai Wu; Xinliang Feng; Hui-Ming Cheng

    2014-01-01

    The current development trend towards miniaturized portable electronic devices has signiicantly increased the demand for ultrathin, lexible and sustainable on-chip micro-supercapacitors that have enormous potential to complement, or even to replace, micro-bateries and electrolytic capacitors. In this regard,graphene-based micro-supercapacitors with a planar geometry are promising micro-electrochemical energy-storage devices that can take full advantage of planar coniguration and unique features of graphene.his review summarizes the latest advances in on-chip graphene-based planar interdigital micro-supercapacitors, from the history of their development, representative graphene-based materials(graphene sheets, graphene quantum dots and graphene hybrids) for their manufacture, typical microfabrication strategies(photolithography techniques, electrochemical methods, laser writing, etc.),electrolyte(aqueous, organic, ionic and gel), to device coniguration(symmetric and asymmetric). Finally,the perspectives and possible development directions of future graphene-based micro-supercapacitors are briely discussed.

  20. On-chip nanofluidic integration of acoustic sensors towards high Q in liquid

    Science.gov (United States)

    Liang, Ji; Liu, Zifeng; Zhang, Hongxiang; Liu, Bohua; Zhang, Menglun; Zhang, Hao; Pang, Wei

    2017-11-01

    This paper reports an on-chip acoustic sensor comprising a piston-mode film bulk acoustic resonator and a monolithically integrated nanochannel. The resonator with the channel exhibits a resonance frequency (f) of 2.5 GHz and a quality (Q) factor of 436 in deionized water. The f × Q product is as high as 1.1 × 1012, which is the highest among all the acoustic wave sensors in the liquid phase. The sensor consumes 2 pl liquid volume and thus greatly saves the precious assays in biomedical testing. The Q factor is investigated, and real-time viscosity tests of glucose solution are demonstrated. The highly miniaturized and integrated sensor is capable to be arrayed with readout-circuitry, which opens an avenue for portable applications and lab-on-chip systems.

  1. Sequential and selective localized optical heating in water via on-chip dielectric nanopatterning.

    Science.gov (United States)

    Morsy, Ahmed M; Biswas, Roshni; Povinelli, Michelle L

    2017-07-24

    We study the use of nanopatterned silicon membranes to obtain optically-induced heating in water. We show that by varying the detuning between an absorptive optical resonance of the patterned membrane and an illumination laser, both the magnitude and response time of the temperature rise can be controlled. This allows for either sequential or selective heating of different patterned areas on chip. We obtain a steady-state temperature of approximately 100 °C for a 805.5nm CW laser power density of 66 µW/μm 2 and observe microbubble formation. The ability to spatially and temporally control temperature on the microscale should enable the study of heat-induced effects in a variety of chemical and biological lab-on-chip applications.

  2. On-chip electrochromic micro display for a disposable bio-sensor chip

    Science.gov (United States)

    Zhu, Yanjun; Tsukamoto, Takashiro; Tanaka, Shuji

    2017-12-01

    This paper reports an on-chip electrochromic micro display made of polyaniline (PANi) which can be easily made on a CMOS chip. Micro-patterned PANi thin films were selectively deposited on pre-patterned microelectrodes by using electrodeposition. The optimum conditions for deposition and electrochromism were investigated. An 8-pixel on-chip micro display was made on a Si chip. The color of each PANi film could be independently but simultaneously controlled, which means any 1-byte digital data could be displayed on the display. The PANi display had a response time as fast as about 100 ms, which means the transfer data rate was as fast as 80 bits per second.

  3. Soft error evaluation and vulnerability analysis in Xilinx Zynq-7010 system-on chip

    Energy Technology Data Exchange (ETDEWEB)

    Du, Xuecheng; He, Chaohui; Liu, Shuhuan, E-mail: liushuhuan@mail.xjtu.edu.cn; Zhang, Yao; Li, Yonghong; Xiong, Ceng; Tan, Pengkang

    2016-09-21

    Radiation-induced soft errors are an increasingly important threat to the reliability of modern electronic systems. In order to evaluate system-on chip's reliability and soft error, the fault tree analysis method was used in this work. The system fault tree was constructed based on Xilinx Zynq-7010 All Programmable SoC. Moreover, the soft error rates of different components in Zynq-7010 SoC were tested by americium-241 alpha radiation source. Furthermore, some parameters that used to evaluate the system's reliability and safety were calculated using Isograph Reliability Workbench 11.0, such as failure rate, unavailability and mean time to failure (MTTF). According to fault tree analysis for system-on chip, the critical blocks and system reliability were evaluated through the qualitative and quantitative analysis.

  4. Pattern manipulation via on-chip phase modulation between orbital angular momentum beams

    Energy Technology Data Exchange (ETDEWEB)

    Li, Huanlu [Department of Electrical and Electronic Engineering, University of Bristol, University Walk, Bristol BS8 1TR (United Kingdom); School of Engineering, University of Glasgow, Rankine Building, Oakfield Avenue, Glasgow G12 8LP (United Kingdom); Strain, Michael J. [School of Engineering, University of Glasgow, Rankine Building, Oakfield Avenue, Glasgow G12 8LP (United Kingdom); Wolfson Centre, Institute of Photonics, University of Strathclyde, 106 Rottenrow East, Glasgow G4 0NW (United Kingdom); Meriggi, Laura; Sorel, Marc [School of Engineering, University of Glasgow, Rankine Building, Oakfield Avenue, Glasgow G12 8LP (United Kingdom); Chen, Lifeng; Zhu, Jiangbo; Cicek, Kenan [Department of Electrical and Electronic Engineering, University of Bristol, University Walk, Bristol BS8 1TR (United Kingdom); Wang, Jianwei; Thompson, Mark G. [Centre for Quantum Photonics, H. H. Wills Physics Laboratory and Department of Electrical and Electronic Engineering, University of Bristol, Bristol BS8 1UB (United Kingdom); Cai, Xinlun, E-mail: caixlun5@mail.sysu.edu.cn [Centre for Quantum Photonics, H. H. Wills Physics Laboratory and Department of Electrical and Electronic Engineering, University of Bristol, Bristol BS8 1UB (United Kingdom); State Key Laboratory of Optoelectronic Materials and Technologies and School of Physics and Engineering, Sun Yat-sen University, Guangzhou 510275 (China); Yu, Siyuan, E-mail: s.yu@bristol.ac.uk [Department of Electrical and Electronic Engineering, University of Bristol, University Walk, Bristol BS8 1TR (United Kingdom); State Key Laboratory of Optoelectronic Materials and Technologies and School of Physics and Engineering, Sun Yat-sen University, Guangzhou 510275 (China)

    2015-08-03

    An integrated approach to thermal modulation of relative phase between two optical vortices with opposite chirality has been demonstrated on a silicon-on-insulator substrate. The device consists of a silicon-integrated optical vortex emitter and a phase controlled 3 dB coupler. The relative phase between two optical vortices can be actively modulated on chip by applying a voltage on the integrated heater. The phase shift is shown to be linearly proportional to applied electrical power, and the rotation angle of the interference pattern is observed to be inversely proportional to topological charge. This scheme can be used in lab-on-chip, communications and sensing applications. It can be intentionally implemented with other modulation elements to achieve more complicated applications.

  5. Laser subtractive-additive-welding microfabrication for Lab-On-Chip (LOC) applications

    Science.gov (United States)

    Jonušauskas, Linas; RekštytÄ--, Sima; Buivydas, Ričardas; Butkus, Simas; Paipulas, Domas; Gadonas, Roaldas; Juodkazis, Saulius; Malinauskas, Mangirdas

    2017-02-01

    An approach employing ultrafast laser hybrid microfabrication combining ablation, 3D nanolithography and welding is proposed for the realization of Lab-On-Chip (LOC) device. The same laser setup is shown to be suitable for fabricating microgrooves in glass slabs, polymerization of fine meshes inside them, and, lastly, sealing the whole chip with cover glass into one monolithic piece. The created micro fluidic device proved its particle sorting function by separating 1 μm and 10 μm polystyrene spheres from a mixture. Next, a lens adapter for a cell phone's camera was manufactured via thermal extrusion 3D printing technique which allowed to achieve sufficient magnification to clearly resolve <10 μm features. All together shows fs-laser microfabrication technology as a flexible and versatile tool for study and manufacturing of Lab-On-Chip devices.

  6. On-chip signal amplification of magnetic bead-based immunoassay by aviating magnetic bead chains.

    Science.gov (United States)

    Jalal, Uddin M; Jin, Gyeong Jun; Eom, Kyu Shik; Kim, Min Ho; Shim, Joon S

    2017-11-06

    In this work, a Lab-on-a-Chip (LOC) platform is used to electromagnetically actuate magnetic bead chains for an enhanced immunoassay. Custom-made electromagnets generate a magnetic field to form, rotate, lift and lower the magnetic bead chains (MBCs). The cost-effective, disposable LOC platform was made with a polymer substrate and an on-chip electrochemical sensor patterned via the screen-printing process. The movement of the MBCs is controlled to improve the electrochemical signal up to 230% when detecting beta-type human chorionic gonadotropin (β-hCG). Thus, the proposed on-chip MBC-based immunoassay is applicable for rapid, qualitative electrochemical point-of-care (POC) analysis. Copyright © 2017 Elsevier B.V. All rights reserved.

  7. Non-Magnetic On-Chip Resonant Acousto-Optic Isolator at 780 nm

    Science.gov (United States)

    2017-08-04

    actuator on a piezoelectric substrate. We fabricated the device using only CMOS-compatible dielectric materials with the assistance of e- beam...on-chip, without the use of magnetic fields or magneto-optical materials. Our technical approach was to employ momentum-conservation in photon-phonon...interactions to break the propagation symmetry of light using a unidirectional acoustic pump. This acoustic wave was transduced using an RF-driven SAW

  8. On-chip photonic memory elements employing phase-change materials.

    Science.gov (United States)

    Rios, Carlos; Hosseini, Peiman; Wright, C David; Bhaskaran, Harish; Pernice, Wolfram H P

    2014-03-05

    Phase-change materials integrated into nanophotonic circuits provide a flexible way to realize tunable optical components. Relying on the enormous refractive-index contrast between the amorphous and crystalline states, such materials are promising candidates for on-chip photonic memories. Nonvolatile memory operation employing arrays of microring resonators is demonstrated as a route toward all-photonic chipscale information processing. © 2013 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  9. A passive on-chip, superconducting circulator using rings of tunnel junctions

    OpenAIRE

    Müller, Clemens; Guan, Shengwei; Vogt, Nicolas; Cole, Jared H.; Stace, Thomas M.

    2017-01-01

    We present the design of a passive, on-chip microwave circulator based on a ring of superconducting tunnel junctions. We investigate two distinct physical realisations, based on either Josephson junctions (JJ) or quantum phase slip elements (QPS), with microwave ports coupled either capacitively (JJ) or inductively (QPS) to the ring structure. A constant bias applied to the center of the ring provides the symmetry breaking (effective) magnetic field, and no microwave or rf bias is required. W...

  10. An integrated lab-on-chip for rapid identification and simultaneous differentiation of tropical pathogens.

    Directory of Open Access Journals (Sweden)

    Jeslin J L Tan

    Full Text Available Tropical pathogens often cause febrile illnesses in humans and are responsible for considerable morbidity and mortality. The similarities in clinical symptoms provoked by these pathogens make diagnosis difficult. Thus, early, rapid and accurate diagnosis will be crucial in patient management and in the control of these diseases. In this study, a microfluidic lab-on-chip integrating multiplex molecular amplification and DNA microarray hybridization was developed for simultaneous detection and species differentiation of 26 globally important tropical pathogens. The analytical performance of the lab-on-chip for each pathogen ranged from 102 to 103 DNA or RNA copies. Assay performance was further verified with human whole blood spiked with Plasmodium falciparum and Chikungunya virus that yielded a range of detection from 200 to 4×105 parasites, and from 250 to 4×107 PFU respectively. This lab-on-chip was subsequently assessed and evaluated using 170 retrospective patient specimens in Singapore and Thailand. The lab-on-chip had a detection sensitivity of 83.1% and a specificity of 100% for P. falciparum; a sensitivity of 91.3% and a specificity of 99.3% for P. vivax; a positive 90.0% agreement and a specificity of 100% for Chikungunya virus; and a positive 85.0% agreement and a specificity of 100% for Dengue virus serotype 3 with reference methods conducted on the samples. Results suggested the practicality of an amplification microarray-based approach in a field setting for high-throughput detection and identification of tropical pathogens.

  11. Experimental realization of an on-chip all-optical analogue to electromagnetically induced transparency.

    Science.gov (United States)

    Xu, Qianfan; Sandhu, Sunil; Povinelli, Michelle L; Shakya, Jagat; Fan, Shanhui; Lipson, Michal

    2006-03-31

    We provide the first experimental observation of structure tuning of the electromagnetically induced transparency-like spectrum in integrated on-chip optical resonator systems. The system consists of coupled silicon ring resonators with 10 microm diameter on silicon, where the coherent interference between the two coupled resonators is tuned. We measured a transparency-resonance mode with a quality factor of 11,800.

  12. Advances in piezoelectric thin films for acoustic biosensors, acoustofluidics and lab-on-chip applications

    OpenAIRE

    Fu, Yong Qing; Luo, Jack; Nguyen, Nam-Trung; Walton, Anthony; Flewitt, Andrew; Zu, Xiao-Tao; Li, Yifan; McHale, Glen; Matthews, Allan; Iborra, Enrique; Du, Hejun; Milne, William

    2017-01-01

    Recently, piezoelectric thin films including zinc oxide (ZnO) and aluminium nitride (AlN) have found a broad range of lab-on-chip applications such as biosensing, particle/cell concentrating, sorting/patterning, pumping, mixing, nebulisation and jetting. Integrated acoustic wave sensing/microfluidic devices have been fabricated by depositing these piezoelectric films onto a number of substrates such as silicon, ceramics, diamond, quartz, glass, and more recently also polymer, metallic foils a...

  13. Legal Protection on IP Cores for System-on-Chip Designs

    Science.gov (United States)

    Kinoshita, Takahiko

    The current semiconductor industry has shifted from vertical integrated model to horizontal specialization model in term of integrated circuit manufacturing. In this circumstance, IP cores as solutions for System-on-Chip (SoC) have become increasingly important for semiconductor business. This paper examines to what extent IP cores of SoC effectively can be protected by current intellectual property system including integrated circuit layout design law, patent law, design law, copyright law and unfair competition prevention act.

  14. Evaluation of on-chip micro antennas for in vivo dosimetry application

    International Nuclear Information System (INIS)

    Villani, Giulio; Bose, Rajiv; Gabrielli, Alessandro

    2011-01-01

    The design, fabrication and evaluation of a set of micro antennas (ANTs) on chip is described. The size of the ANTs is 2 and has been chosen with a view to the development of a monolithic implantable sensor for in vivo dosimetry which is the ultimate focus of this project. Three different designs are currently being investigated, with a view to evaluate their RF performances in the communication-standard Medical Implant Communication Service (MICS) frequency band.

  15. Active 2D materials for on-chip nanophotonics and quantum optics

    Directory of Open Access Journals (Sweden)

    Shiue Ren-Jye

    2017-03-01

    Full Text Available Two-dimensional materials have emerged as promising candidates to augment existing optical networks for metrology, sensing, and telecommunication, both in the classical and quantum mechanical regimes. Here, we review the development of several on-chip photonic components ranging from electro-optic modulators, photodetectors, bolometers, and light sources that are essential building blocks for a fully integrated nanophotonic and quantum photonic circuit.

  16. On-chip sample preparation for complete blood count from raw blood.

    Science.gov (United States)

    Nguyen, John; Wei, Yuan; Zheng, Yi; Wang, Chen; Sun, Yu

    2015-03-21

    This paper describes a monolithic microfluidic device capable of on-chip sample preparation for both RBC and WBC measurements from whole blood. For the first time, on-chip sample processing (e.g. dilution, lysis, and filtration) and downstream single cell measurement were fully integrated to enable sample preparation and single cell analysis from whole blood on a single device. The device consists of two parallel sub-systems that perform sample processing and electrical measurements for measuring RBC and WBC parameters. The system provides a modular environment capable of handling solutions of various viscosities by adjusting the length of channels and precisely controlling mixing ratios, and features a new 'offset' filter configuration for increased duration of device operation. RBC concentration, mean corpuscular volume (MCV), cell distribution width, WBC concentration and differential are determined by electrical impedance measurement. Experimental characterization of over 100,000 cells from 10 patient blood samples validated the system's capability for performing on-chip raw blood processing and measurement.

  17. On-chip photonic microsystem for optical signal processing based on silicon and silicon nitride platforms

    Science.gov (United States)

    Li, Yu; Li, Jiachen; Yu, Hongchen; Yu, Hai; Chen, Hongwei; Yang, Sigang; Chen, Minghua

    2018-04-01

    The explosive growth of data centers, cloud computing and various smart devices is limited by the current state of microelectronics, both in terms of speed and heat generation. Benefiting from the large bandwidth, promising low power consumption and passive calculation capability, experts believe that the integrated photonics-based signal processing and transmission technologies can break the bottleneck of microelectronics technology. In recent years, integrated photonics has become increasingly reliable and access to the advanced fabrication process has been offered by various foundries. In this paper, we review our recent works on the integrated optical signal processing system. We study three different kinds of on-chip signal processors and use these devices to build microsystems for the fields of microwave photonics, optical communications and spectrum sensing. The microwave photonics front receiver was demonstrated with a signal processing range of a full-band (L-band to W-band). A fully integrated microwave photonics transceiver without the on-chip laser was realized on silicon photonics covering the signal frequency of up 10 GHz. An all-optical orthogonal frequency division multiplexing (OFDM) de-multiplier was also demonstrated and used for an OFDM communication system with the rate of 64 Gbps. Finally, we show our work on the monolithic integrated spectrometer with a high resolution of about 20 pm at the central wavelength of 1550 nm. These proposed on-chip signal processing systems potential applications in the fields of radar, 5G wireless communication, wearable devices and optical access networks.

  18. On-chip plasmon-induced transparency based on plasmonic coupled nanocavities.

    Science.gov (United States)

    Zhu, Yu; Hu, Xiaoyong; Yang, Hong; Gong, Qihuang

    2014-01-17

    On-chip plasmon-induced transparency offers the possibility of realization of ultrahigh-speed information processing chips. Unfortunately, little experimental progress has been made to date because it is difficult to obtain on-chip plasmon-induced transparency using only a single meta-molecule in plasmonic circuits. Here, we report a simple and efficient strategy to realize on-chip plasmon-induced transparency in a nanoscale U-shaped plasmonic waveguide side-coupled nanocavity pair. High tunability in the transparency window is achieved by covering the pair with different organic polymer layers. It is possible to realize ultrafast all-optical tunability based on pump light-induced refractive index change of a graphene cover layer. Compared with previous reports, the overall feature size of the plasmonic nanostructure is reduced by more than three orders of magnitude, while ultrahigh tunability of the transparency window is maintained. This work also provides a superior platform for the study of the various physical effects and phenomena of nonlinear optics and quantum optics.

  19. Blood cleaner on-chip design for artificial human kidney manipulation

    Directory of Open Access Journals (Sweden)

    Suwanpayak N

    2011-05-01

    Full Text Available N Suwanpayak1, MA Jalil2, MS Aziz3, FD Ismail3, J Ali3, PP Yupapin11Nanoscale Science and Engineering Research Alliance (N'SERA, Advanced Research Center for Photonics, Faculty of Science, King Mongkut's Institute of Technology, Ladkrabang, Bangkok, Thailand; 2Ibnu Sina Institute of Fundamental Science Studies (IIS, 3Institute of Advanced Photonics Science, Nanotechnology Research Alliance, Universiti Teknologi Malaysia, Johor Bahru, MalaysiaAbstract: A novel design of a blood cleaner on-chip using an optical waveguide known as a PANDA ring resonator is proposed. By controlling some suitable parameters, the optical vortices (gradient optical fields/wells can be generated and used to form the trapping tools in the same way as optical tweezers. In operation, the trapping force is formed by the combination between the gradient field and scattering photons by using the intense optical vortices generated within the PANDA ring resonator. This can be used for blood waste trapping and moves dynamically within the blood cleaner on-chip system (artificial kidney, and is performed within the wavelength routers. Finally, the blood quality test is exploited by the external probe before sending to the destination. The advantage of the proposed kidney on-chip system is that the unwanted substances can be trapped and filtered from the artificial kidney, which can be available for blood cleaning applications.Keywords: optical trapping, blood dialysis, blood cleaner, human kidney manipulation

  20. Electromagnetic design methods in systems-on-chip: integrated filters for wireless CMOS RFICs

    International Nuclear Information System (INIS)

    Contopanagos, Harry

    2005-01-01

    We present general methods for designing on-chip CMOS passives and utilizing these integrated elements to design on-chip CMOS filters for wireless communications. These methods rely on full-wave electromagnetic numerical calculations that capture all the physics of the underlying foundry technologies. This is especially crucial for deep sub-micron CMOS technologies as it is important to capture the physical effects of finite (and mediocre) Q-factors limited by material losses and constraints on expensive die area, low self-resonance frequencies and dual parasitics that are particularly prevalent in deep sub-micron CMOS processes (65 nm-0.18 μm. We use these integrated elements in an ideal synthesis of a Bluetooth/WLAN pass-band filter in single-ended or differential architectures, and show the significant deviations of the on-chip filter response from the ideal one. We identify which elements in the filter circuit need to maximize their Q-factors and which Q-factors do not affect the filter performance. This saves die area, and predicts the FET parameters (especially transconductances) and negative-resistance FET topologies that have to be integrated in the filter to restore its performance. (invited paper)

  1. Gain-Enhanced On-Chip Antenna Utilizing Artificial Magnetic Conductor Reflecting Surface at 94 GHz

    KAUST Repository

    Nafe, Mahmoud

    2015-01-01

    In this work, the use of specially patterned reflecting surfaces for improving on- chip antenna performance is investigated. By using a periodic metallic surface on top of a grounded substrate, the structure can mimic the behavior of a perfect mag- netic conductor, hence called Artificial Magnetic Conductor (AMC) surface. Unlike conventional ground plane reflecting surfaces, AMC surfaces generally enhance the radiation and impedance characteristics of close-by antennas. Based on this property, a ring-based AMC reflecting surface has been designed in the oxide layer for on-chip antennas operating at 94 GHz. Furthermore, a folded dipole antenna with its associ- ated planar feeding structures has been optimized and integrated with the developed ring-based AMC surface. The proposed design is then fabricated at KAUST clean- room facilities. Prototype characterization showed very promising results with good correlation to simulations, with the antenna exhibiting an impedance bandwidth of 10% (90-100 GHz) and peak gain of -1.4 dBi, which is the highest gain reported for on-chip antennas at this frequency band without the use of any external o↵-chip components or post-fabrication steps.

  2. Design of a CMOS integrated on-chip oscilloscope for spin wave characterization

    Directory of Open Access Journals (Sweden)

    Eugen Egel

    2017-05-01

    Full Text Available Spin waves can perform some optically-inspired computing algorithms, e.g. the Fourier transform, directly than it is done with the CMOS logic. This article describes a new approach for on-chip characterization of spin wave based devices. The readout circuitry for the spin waves is simulated with 65-nm CMOS technology models. Commonly used circuits for Radio Frequency (RF receivers are implemented to detect a sinusoidal ultra-wideband (5-50 GHz signal with an amplitude of at least 15 μV picked up by a loop antenna. First, the RF signal is amplified by a Low Noise Amplifier (LNA. Then, it is down-converted by a mixer to Intermediate Frequency (IF. Finally, an Operational Amplifier (OpAmp brings the IF signal to higher voltages (50-300 mV. The estimated power consumption and the required area of the readout circuit is approximately 55.5 mW and 0.168 mm2, respectively. The proposed On-Chip Oscilloscope (OCO is highly suitable for on-chip spin wave characterization regarding the frequency, amplitude change and phase information. It offers an integrated low power alternative to current spin wave detecting systems.

  3. On-chip growth of semiconductor metal oxide nanowires for gas sensors: A review

    Directory of Open Access Journals (Sweden)

    Chu Manh Hung

    2017-09-01

    Full Text Available Semiconductor metal oxide nanowires (SMO-NWs show great potential for novel gas sensor applications because of their distinct properties, such as a high surface area to volume aspect ratio, high crystallinity and perfect pathway for electron transfer (length of NW. SMO-NW sensors can be configured as resistors or field-effect transistors for gas detection and different configurations, such as a single NW, multiple NWs, and networked NW films, have been established. Surface-functionalizing NWs with catalyst elements and self-heating NWs provide additional advantages for highly selective and low-power consumption gas sensors. However, an appropriate design of SMO-NWs is of practical importance in enhancing the gas-sensing performance of SMO-NW sensors. The on-chip growth of SMO-NWs possesses many advantages which can thus be effectively used for the large-scale fabrication of SMO-NW sensors with improved gas response and stability. This review aims to provide up-to-date information on the on-chip fabrication of SnO2, ZnO, WO3, CuO, and other SMO-NW sensors. It also discusses a variety of promising approaches that help advance the on-chip fabrication of SMO-NW-based gas sensors and other NW-based devices.

  4. Electromagnetic design methods in systems-on-chip: integrated filters for wireless CMOS RFICs

    Energy Technology Data Exchange (ETDEWEB)

    Contopanagos, Harry [Institute for Microelectronics, NCSR ' Demokritos' , PO Box 60228, GR-153 10 Aghia Paraskevi, Athens (Greece)

    2005-01-01

    We present general methods for designing on-chip CMOS passives and utilizing these integrated elements to design on-chip CMOS filters for wireless communications. These methods rely on full-wave electromagnetic numerical calculations that capture all the physics of the underlying foundry technologies. This is especially crucial for deep sub-micron CMOS technologies as it is important to capture the physical effects of finite (and mediocre) Q-factors limited by material losses and constraints on expensive die area, low self-resonance frequencies and dual parasitics that are particularly prevalent in deep sub-micron CMOS processes (65 nm-0.18 {mu}m. We use these integrated elements in an ideal synthesis of a Bluetooth/WLAN pass-band filter in single-ended or differential architectures, and show the significant deviations of the on-chip filter response from the ideal one. We identify which elements in the filter circuit need to maximize their Q-factors and which Q-factors do not affect the filter performance. This saves die area, and predicts the FET parameters (especially transconductances) and negative-resistance FET topologies that have to be integrated in the filter to restore its performance. (invited paper)

  5. Integration of microcoils for on-chip immunosensors based on magnetic nanoparticles capture

    Directory of Open Access Journals (Sweden)

    Olivier Lefebvre

    2017-04-01

    Full Text Available Immunoassays using magnetic nanoparticles (MNP are generally performed under the control of permanent magnet close to the micro-tube of reaction. Using a magnet gives a powerful method for driving MNP but remains unreliable or insufficient for a fully integrated immunoassay on lab-on-chip. The aim of this study is to develop a novel lab-on-chip concept for high efficient immunoassays to detect ovalbumin (Biodefense model molecule with microcoils employed for trapping MNP during the biofunctionalization steps. The objectives are essentially to optimize their efficiency for biological recognition by assuring a better bioactivity (antibodies-ovalbumin, and detect small concentrations of the targeted protein (~10 pg/mL. In this work, we studied the response of immunoassays complex function of ovalbumin concentration. The impact of MNP diameter in the biografting protocol was studied and permitted to choose a convenient MNP size for efficient biorecognition. We realized different immunoassays by controlling MNP in test tube and in microfluidic device using a permanent magnet. The comparison between these two experiments allows us to highlight an improvement of the limit of detection in microfluidic conditions by controlling MNP trapping with a magnet. Keywords: Bacteria, Lab-on-chip, ELISA, Magnetic nanoparticles, Ovalbumin, Microcoils, Fluorescent microscopy

  6. Manually operatable on-chip bistable pneumatic microstructures for microfluidic manipulations.

    Science.gov (United States)

    Chen, Arnold; Pan, Tingrui

    2014-09-07

    Bistable microvalves are of particular interest because of their distinct nature of requiring energy consumption only during the transition between the open and closed states. This characteristic can be highly advantageous in reducing the number of external inputs and the complexity of control circuitries since microfluidic devices as contemporary lab-on-a-chip platforms are transferring from research settings to low-resource environments with high integrability and a small form factor. In this paper, we first present manually operatable, on-chip bistable pneumatic microstructures (BPMs) for microfluidic manipulation. The structural design and operation of the BPM devices can be readily integrated into any pneumatically powered microfluidic network consisting of pneumatic and fluidic channels. It is mainly composed of a vacuum activation chamber (VAC) and a pressure release chamber (PRC), of which users have direct control through finger pressing to switch either to the bistable vacuum state (VS) or the atmospheric state (AS). We have integrated multiple BPM devices into a 4-to-1 microfluidic multiplexor to demonstrate on-chip digital flow switching from different sources. Furthermore, we have shown its clinical relevance in a point-of-care diagnostic chip that processes blood samples to identify the distinct blood types (A/B/O) on-chip.

  7. A Router Architecture for Connection-Oriented Service Guarantees in the MANGO Clockless Network-on-Chip

    DEFF Research Database (Denmark)

    Bjerregaard, Tobias; Sparsø, Jens

    2005-01-01

    On-chip networks for future system-on-chip designs need simple, high performance implementations. In order to promote system-level integrity, guaranteed services (GS) need to be provided. We propose a network-on-chip (NoC) router architecture to support this, and demonstrate with a CMOS standard...... cell design. Our implementation is based on clockless circuit techniques, and thus inherently supports a modular, GALS-oriented design flow. Our router exploits virtual channels to provide connection-oriented GS, as well as connection-less best-effort (BE) routing. The architecture is highly flexible...

  8. Adaptive Code Division Multiple Access Protocol for Wireless Network-on-Chip Architectures

    Science.gov (United States)

    Vijayakumaran, Vineeth

    Massive levels of integration following Moore's Law ushered in a paradigm shift in the way on-chip interconnections were designed. With higher and higher number of cores on the same die traditional bus based interconnections are no longer a scalable communication infrastructure. On-chip networks were proposed enabled a scalable plug-and-play mechanism for interconnecting hundreds of cores on the same chip. Wired interconnects between the cores in a traditional Network-on-Chip (NoC) system, becomes a bottleneck with increase in the number of cores thereby increasing the latency and energy to transmit signals over them. Hence, there has been many alternative emerging interconnect technologies proposed, namely, 3D, photonic and multi-band RF interconnects. Although they provide better connectivity, higher speed and higher bandwidth compared to wired interconnects; they also face challenges with heat dissipation and manufacturing difficulties. On-chip wireless interconnects is one other alternative proposed which doesn't need physical interconnection layout as data travels over the wireless medium. They are integrated into a hybrid NOC architecture consisting of both wired and wireless links, which provides higher bandwidth, lower latency, lesser area overhead and reduced energy dissipation in communication. However, as the bandwidth of the wireless channels is limited, an efficient media access control (MAC) scheme is required to enhance the utilization of the available bandwidth. This thesis proposes using a multiple access mechanism such as Code Division Multiple Access (CDMA) to enable multiple transmitter-receiver pairs to send data over the wireless channel simultaneously. It will be shown that such a hybrid wireless NoC with an efficient CDMA based MAC protocol can significantly increase the performance of the system while lowering the energy dissipation in data transfer. In this work it is shown that the wireless NoC with the proposed CDMA based MAC protocol

  9. Dynamic On-Chip micro Temperature and Flow Sensor for miniaturized lab-on-a-chip instruments

    Data.gov (United States)

    National Aeronautics and Space Administration — The purpose of this project is to design, fabricate, and characterize a Dynamic On-Chip Flow and Temperature Sensor (DOCFlaTS) to mature and enable miniaturized...

  10. On-Chip Hardware for Cell Monitoring: Contact Imaging and Notch Filtering

    Science.gov (United States)

    2005-07-07

    a polymer carrier. Spectrophotometer chosen and purchased for testing optical filters and materials. Characterization and comparison of fabricated...reproducibility of behavior. Multi-level SU8 process developed. Optimization of actuator for closing vial lids and development of lid sealing technology is...bending angles characterized as a function of temperature in NaDBS solution. " Photopatternable polymers are a viable interim packaging solution; through

  11. An On-Chip Learning Neuromorphic Autoencoder With Current-Mode Transposable Memory Read and Virtual Lookup Table.

    Science.gov (United States)

    Cho, Hwasuk; Son, Hyunwoo; Seong, Kihwan; Kim, Byungsub; Park, Hong-June; Sim, Jae-Yoon

    2018-02-01

    This paper presents an IC implementation of on-chip learning neuromorphic autoencoder unit in a form of rate-based spiking neural network. With a current-mode signaling scheme embedded in a 500 × 500 6b SRAM-based memory, the proposed architecture achieves simultaneous processing of multiplications and accumulations. In addition, a transposable memory read for both forward and backward propagations and a virtual lookup table are also proposed to perform an unsupervised learning of restricted Boltzmann machine. The IC is fabricated using 28-nm CMOS process and is verified in a three-layer network of encoder-decoder pair for training and recovery of images with two-dimensional pixels. With a dataset of 50 digits, the IC shows a normalized root mean square error of 0.078. Measured energy efficiencies are 4.46 pJ per synaptic operation for inference and 19.26 pJ per synaptic weight update for learning, respectively. The learning performance is also estimated by simulations if the proposed hardware architecture is extended to apply to a batch training of 60 000 MNIST datasets.

  12. On-chip immunoelectrophoresis of extracellular vesicles released from human breast cancer cells.

    Directory of Open Access Journals (Sweden)

    Takanori Akagi

    Full Text Available Extracellular vesicles (EVs including exosomes and microvesicles have attracted considerable attention in the fields of cell biology and medicine. For a better understanding of EVs and further exploration of their applications, the development of analytical methods for biological nanovesicles has been required. In particular, considering the heterogeneity of EVs, methods capable of measuring individual vesicles are desired. Here, we report that on-chip immunoelectrophoresis can provide a useful method for the differential protein expression profiling of individual EVs. Electrophoresis experiments were performed on EVs collected from the culture supernatant of MDA-MB-231 human breast cancer cells using a measurement platform comprising a microcapillary electrophoresis chip and a laser dark-field microimaging system. The zeta potential distribution of EVs that reacted with an anti-human CD63 (exosome and microvesicle marker antibody showed a marked positive shift as compared with that for the normal immunoglobulin G (IgG isotype control. Thus, on-chip immunoelectrophoresis could sensitively detect the over-expression of CD63 glycoproteins on EVs. Moreover, to explore the applicability of on-chip immunoelectrophoresis to cancer diagnosis, EVs collected from the blood of a mouse tumor model were analyzed by this method. By comparing the zeta potential distributions of EVs after their immunochemical reaction with normal IgG, and the anti-human CD63 and anti-human CD44 (cancer stem cell marker antibodies, EVs of tumor origin circulating in blood were differentially detected in the real sample. The result indicates that the present method is potentially applicable to liquid biopsy, a promising approach to the low-invasive diagnosis of cancer.

  13. A Lab-on-Chip Design for Miniature Autonomous Bio-Chemoprospecting Planetary Rovers

    Science.gov (United States)

    Santoli, S.

    The performance of the so-called ` Lab-on-Chip ' devices, featuring micrometre size components and employed at present for carrying out in a very fast and economic way the extremely high number of sequence determinations required in genomic analyses, can be largely improved as to further size reduction, decrease of power consumption and reaction efficiency through development of nanofluidics and of nano-to-micro inte- grated systems. As is shown, such new technologies would lead to robotic, fully autonomous, microwatt consumption and complete ` laboratory on a chip ' units for accurate, fast and cost-effective astrobiological and planetary exploration missions. The theory and the manufacturing technologies for the ` active chip ' of a miniature bio/chemoprospecting planetary rover working on micro- and nanofluidics are investigated. The chip would include micro- and nanoreactors, integrated MEMS (MicroElectroMechanical System) components, nanoelectronics and an intracavity nanolaser for highly accurate and fast chemical analysis as an application of such recently introduced solid state devices. Nano-reactors would be able to strongly speed up reaction kinetics as a result of increased frequency of reactive collisions. The reaction dynamics may also be altered with respect to standard macroscopic reactors. A built-in miniature telemetering unit would connect a network of other similar rovers and a central, ground-based or orbiting control unit for data collection and transmission to an Earth-based unit through a powerful antenna. The development of the ` Lab-on-Chip ' concept for space applications would affect the economy of space exploration missions, as the rover's ` Lab-on-Chip ' development would link space missions with the ever growing terrestrial market and business concerning such devices, largely employed in modern genomics and bioinformatics, so that it would allow the recoupment of space mission costs.

  14. All-Digital Time-Domain CMOS Smart Temperature Sensor with On-Chip Linearity Enhancement.

    Science.gov (United States)

    Chen, Chun-Chi; Chen, Chao-Lieh; Lin, Yi

    2016-01-30

    This paper proposes the first all-digital on-chip linearity enhancement technique for improving the accuracy of the time-domain complementary metal-oxide semiconductor (CMOS) smart temperature sensor. To facilitate on-chip application and intellectual property reuse, an all-digital time-domain smart temperature sensor was implemented using 90 nm Field Programmable Gate Arrays (FPGAs). Although the inverter-based temperature sensor has a smaller circuit area and lower complexity, two-point calibration must be used to achieve an acceptable inaccuracy. With the help of a calibration circuit, the influence of process variations was reduced greatly for one-point calibration support, reducing the test costs and time. However, the sensor response still exhibited a large curvature, which substantially affected the accuracy of the sensor. Thus, an on-chip linearity-enhanced circuit is proposed to linearize the curve and achieve a new linearity-enhanced output. The sensor was implemented on eight different Xilinx FPGA using 118 slices per sensor in each FPGA to demonstrate the benefits of the linearization. Compared with the unlinearized version, the maximal inaccuracy of the linearized version decreased from 5 °C to 2.5 °C after one-point calibration in a range of -20 °C to 100 °C. The sensor consumed 95 μW using 1 kSa/s. The proposed linearity enhancement technique significantly improves temperature sensing accuracy, avoiding costly curvature compensation while it is fully synthesizable for future Very Large Scale Integration (VLSI) system.

  15. An Efficient Radio Access Control Mechanism for Wireless Network-On-Chip Architectures

    Directory of Open Access Journals (Sweden)

    Maurizio Palesi

    2015-03-01

    Full Text Available Modern systems-on-chip (SoCs today contain hundreds of cores, and this number is predicted to reach the thousands by the year 2020. As the number of communicating elements increases, there is a need for an efficient, scalable and reliable communication infrastructure. As technology geometries shrink to the deep submicron regime, however, the communication delay and power consumption of global interconnections become the major bottleneck. The network-on-chip (NoC design paradigm, based on a modular packet-switched mechanism, can address many of the on-chip communication issues, such as the performance limitations of long interconnects and integration of large number of cores on a chip. Recently, new communication technologies based on the NoC concept have emerged with the aim of improving the scalability limitations of conventional NoC-based architectures. Among them, wireless NoCs (WiNoCs use the radio medium for reducing the performance and energy penalties of long-range and multi-hop communications. As the radio medium can be accessed by a single transmitter at a time, a radio access control mechanism (RACM is needed. In this paper, we present a novel RACM, which allows one to improve both the performance and energy figures of the WiNoC. Experiments, carried out on both synthetic and real traffic scenarios, have shown the effectiveness of the proposed RACM. On average, a 30% reduction in communication delay and a 25% energy savings have been observed when the proposed RACM is applied to a known WiNoC architecture.

  16. Multi-angle lensless digital holography for depth resolved imaging on a chip

    Science.gov (United States)

    Su, Ting-Wei; Isikman, Serhan O.; Bishara, Waheb; Tseng, Derek; Erlinger, Anthony; Ozcan, Aydogan

    2010-01-01

    A multi-angle lensfree holographic imaging platform that can accurately characterize both the axial and lateral positions of cells located within multi-layered micro-channels is introduced. In this platform, lensfree digital holograms of the micro-objects on the chip are recorded at different illumination angles using partially coherent illumination. These digital holograms start to shift laterally on the sensor plane as the illumination angle of the source is tilted. Since the exact amount of this lateral shift of each object hologram can be calculated with an accuracy that beats the diffraction limit of light, the height of each cell from the substrate can be determined over a large field of view without the use of any lenses. We demonstrate the proof of concept of this multi-angle lensless imaging platform by using light emitting diodes to characterize various sized microparticles located on a chip with sub-micron axial and lateral localization over ~60 mm2 field of view. Furthermore, we successfully apply this lensless imaging approach to simultaneously characterize blood samples located at multi-layered micro-channels in terms of the counts, individual thicknesses and the volumes of the cells at each layer. Because this platform does not require any lenses, lasers or other bulky optical/mechanical components, it provides a compact and high-throughput alternative to conventional approaches for cytometry and diagnostics applications involving lab on a chip systems. PMID:20588819

  17. Wake on LAN over Internet as web service system on chip

    OpenAIRE

    Maciá Pérez, Francisco; Gil Martínez-Abarca, Juan Antonio; Ramos Morillo, Héctor; Mora Gimeno, Francisco José; Marcos Jorquera, Diego; Gilart Iglesias, Virgilio

    2009-01-01

    In this paper we introduce a System on Chip (SoC) designed to run a particular Web Service (WS) in an Application-Specific Integrated Circuit (ASIC). The system has been designed devoid of processor and software and conceived as a hardware pattern for a trouble-free design of network services offered as WS in Service-Oriented Architecture (SOA). Therefore, the chip is not only able to act as SOAP Service Provider but, it is also capable of registering the service on its own in an external Bro...

  18. On-chip magnetic bead-based DNA melting curve analysis using a magnetoresistive sensor

    DEFF Research Database (Denmark)

    Rizzi, Giovanni; Østerberg, Frederik Westergaard; Henriksen, Anders Dahl

    2014-01-01

    We present real-time measurements of DNA melting curves in a chip-based system that detects the amount of surface-bound magnetic beads using magnetoresistive magnetic field sensors. The sensors detect the difference between the amount of beads bound to the top and bottom sensor branches....... The beads are magnetized by the field arising from the bias current passed through the sensors. We demonstrate the first on-chip measurements of the melting of DNA hybrids upon a ramping of the temperature. This overcomes the limitation of using a single washing condition at constant temperature. Moreover...

  19. Support for Programming Models in Network-on-Chip-based Many-core Systems

    DEFF Research Database (Denmark)

    Rasmussen, Morten Sleth

    This thesis addresses aspects of support for programming models in Network-on- Chip-based many-core architectures. The main focus is to consider architectural support for a plethora of programming models in a single system. The thesis has three main parts. The first part considers parallelization...... models to be supported by a single architecture. The architecture features a specialized network interface processor which allows extensive configurability of the memory system. Based on this architecture, a detailed implementation of the cache coherent shared memory programming model is presented...

  20. A simple clockless Network-on-Chip for a commercial audio DSP chip

    DEFF Research Database (Denmark)

    Stensgaard, Mikkel Bystrup; Bjerregaard, Tobias; Sparsø, Jens

    2006-01-01

    We design a very small, packet-switched, clockless Network-on-Chip (NoC) as a replacement for the existing crossbar-based communication infrastructure in a commercial audio DSP chip. Both solutions are laid out in a 0.18 um process, and compared in terms of area, power consumption and routing...... to the existing crossbar, it allows all blocks to communicate. The total wire length is decreased by 22% which eases the layout process and makes the design less prone to routing congestion. Not least, the communicating blocks are decoupled by means of the NoC, providing a Globally-Asynchronous, Locally...

  1. An acoustic on-chip goniometer for room temperature macromolecular crystallography.

    Science.gov (United States)

    Burton, C G; Axford, D; Edwards, A M J; Gildea, R J; Morris, R H; Newton, M I; Orville, A M; Prince, M; Topham, P D; Docker, P T

    2017-12-05

    This paper describes the design, development and successful use of an on-chip goniometer for room-temperature macromolecular crystallography via acoustically induced rotations. We present for the first time a low cost, rate-tunable, acoustic actuator for gradual in-fluid sample reorientation about varying axes and its utilisation for protein structure determination on a synchrotron beamline. The device enables the efficient collection of diffraction data via a rotation method from a sample within a surface confined droplet. This method facilitates efficient macromolecular structural data acquisition in fluid environments for dynamical studies.

  2. Amplification of biological targets via on-chip culture for biosensing

    Science.gov (United States)

    Harper, Jason C.; Edwards, Thayne L.; Carson, Bryan; Finley, Melissa; Arndt, William

    2018-01-02

    The present invention, in part, relates to methods and apparatuses for on-chip amplification and/or detection of various targets, including biological targets and any amplifiable targets. In some examples, the microculture apparatus includes a single-use, normally-closed fluidic valve that is initially maintained in the closed position by a valve element bonded to an adhesive coating. The valve is opened using a magnetic force. The valve element includes a magnetic material or metal. Such apparatuses and methods are useful for in-field or real-time detection of targets, especially in limited resource settings.

  3. Identification of microfluidic two-phase flow patterns in lab-on-chip devices.

    Science.gov (United States)

    Yang, Zhaochu; Dong, Tao; Halvorsen, Einar

    2014-01-01

    This work describes a capacitive sensor for identification of microfluidic two-phase flow in lab-on-chip devices. With interdigital electrodes and thin insulation layer utilized, this sensor is capable of being integrated with the microsystems easily. Transducing principle and design considerations are presented with respect to the microfluidic gas/liquid flow patterns. Numerical simulation results verify the operational principle. And the factors affecting the performance of the sensor are discussed. Besides, a feasible process flow for the fabrication is also proposed.

  4. On-chip spectroscopy with thermally tuned high-Q photonic crystal cavities

    Energy Technology Data Exchange (ETDEWEB)

    Liapis, Andreas C., E-mail: andreas.liapis@gmail.com; Gao, Boshen; Siddiqui, Mahmudur R. [The Institute of Optics, University of Rochester, Rochester, New York 14627 (United States); Shi, Zhimin [Department of Physics, University of South Florida, Tampa, Florida 33620 (United States); Boyd, Robert W. [The Institute of Optics, University of Rochester, Rochester, New York 14627 (United States); Department of Physics and School of Electrical Engineering and Computer Science, University of Ottawa, Ottawa, Ontario K1N 6N5 (Canada)

    2016-01-11

    Spectroscopic methods are a sensitive way to determine the chemical composition of potentially hazardous materials. Here, we demonstrate that thermally tuned high-Q photonic crystal cavities can be used as a compact high-resolution on-chip spectrometer. We have used such a chip-scale spectrometer to measure the absorption spectra of both acetylene and hydrogen cyanide in the 1550 nm spectral band and show that we can discriminate between the two chemical species even though the two materials have spectral features in the same spectral region. Our results pave the way for the development of chip-size chemical sensors that can detect toxic substances.

  5. On-chip optical filter comprising Fabri-Perot resonator structure and spectrometer

    Energy Technology Data Exchange (ETDEWEB)

    Han, Seunghoon; Horie, Yu; Faraon, Andrei; Arbabi, Amir

    2018-04-10

    An on-chip optical filter having Fabri-Perot resonators and a spectrometer may include a first sub-wavelength grating (SWG) reflecting layer and a second SWG reflecting layer facing each other. A plurality of Fabri-Perot resonators are formed by the first SWG reflecting layer and the second SWG reflecting layer facing each other. Each of the Fabri-Perot resonators may transmit light corresponding to a resonance wavelength of the Fabri-Perot resonator. The resonance wavelengths of the Fabri-Perot resonators may be determined according to duty cycles of grating patterns.

  6. Interfacing Hardware Accelerators to a Time-Division Multiplexing Network-on-Chip

    DEFF Research Database (Denmark)

    Pezzarossa, Luca; Sørensen, Rasmus Bo; Schoeberl, Martin

    2015-01-01

    This paper addresses the integration of stateless hardware accelerators into time-predictable multi-core platforms based on time-division multiplexing networks-on-chip. Stateless hardware accelerators, like floating-point units, are typically attached as co-processors to individual processors in ...... implementation. The design evaluation is carried out using the open source T-CREST multi-core platform implemented on an Altera Cyclone IV FPGA. The size of the proposed design, including a floating-point accelerator, is about two-thirds of a processor....

  7. A novel compact model for on-chip stacked transformers in RF-CMOS technology

    Science.gov (United States)

    Jun, Liu; Jincai, Wen; Qian, Zhao; Lingling, Sun

    2013-08-01

    A novel compact model for on-chip stacked transformers is presented. The proposed model topology gives a clear distinction to the eddy current, resistive and capacitive losses of the primary and secondary coils in the substrate. A method to analytically determine the non-ideal parasitics between the primary coil and substrate is provided. The model is further verified by the excellent match between the measured and simulated S -parameters on the extracted parameters for a 1 : 1 stacked transformer manufactured in a commercial RF-CMOS technology.

  8. Embedded 3D Graphics Core for FPGA-based System-on-Chip Applications

    DEFF Research Database (Denmark)

    Holten-Lund, Hans Erik

    2005-01-01

    This paper presents a 3D graphics accelerator core for an FPGA based system, and illustrates how to build a System-on-Chip containing a Xilinx MicroBlaze soft-core CPU and our 3D graphics accelerator core. The system is capable of running uClinux and hardware accelerated 3D graphics applications......, and the video display which periodically reads from memory to display the final rendered graphics. The graphics core uses internal scratch-pad memory to reduce its external bandwidth requirement, this is achieved by implementing a tile-based rendering algorithm. Reduced external bandwidth means that the power...

  9. CMOS Image Sensors: Electronic Camera On A Chip

    Science.gov (United States)

    Fossum, E. R.

    1995-01-01

    Recent advancements in CMOS image sensor technology are reviewed, including both passive pixel sensors and active pixel sensors. On- chip analog to digital converters and on-chip timing and control circuits permit realization of an electronic camera-on-a-chip. Highly miniaturized imaging systems based on CMOS image sensor technology are emerging as a competitor to charge-coupled devices for low cost uses.

  10. Marker Pen Lithography for Flexible and Curvilinear On-Chip Energy Storage

    KAUST Repository

    Jiang, Qiu

    2015-07-14

    On-chip energy storage using microsupercapacitors can serve the dual role of supplementing batteries for pulse power delivery, and replacement of bulky electrolytic capacitors in ac-line filtering applications. Despite complexity and processing costs, microfabrication techniques are being employed in fabricating a great variety of microsupercapacitor devices. Here, a simple, cost-effective, and versatile strategy is proposed to fabricate flexible and curvilinear microsupercapacitors (MSCs). The protocol involves writing sacrificial ink patterns using commercial marker pens on rigid, flexible, and curvilinear substrates. It is shown that this process can be used in both lift-off and etching modes, and the possibility of multistack design of active materials using simple pen lithography is demonstrated. As a prototype, this method is used to produce conducting polymer MSCs involving both poly(3,4-ethylenedioxythiophene), polyaniline, and metal oxide (MnO2) electrode materials. Typical values of energy density in the range of 5-11 mWh cm-3 at power densities of 1-6 W cm-3 are achieved, which is comparable to thin film batteries and superior to the carbon and metal oxide based microsupercapacitors reported in the literature. The simplicity and broad scope of this innovative strategy can open up new avenues for easy and scalable fabrication of a wide variety of on-chip energy storage devices. © 2015 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim.

  11. Looking to the future of organs-on-chips: interview with Professor John Wikswo.

    Science.gov (United States)

    Wikswo, John P

    2017-06-01

    John Wikswo talks to Francesca Lake, Managing Editor: John is the founding Director of the Vanderbilt Institute for Integrative Biosystems Research and Education (VIIBRE). He is also the Gordon A Cain University Professor; a B learned Professor of Living State Physics; and a Professor of Biomedical Engineering, Molecular Physiology and Biophysics, and Physics. John earned his PhD in physics at Stanford University (CA, USA). After serving as a Research Fellow in Cardiology at Stanford, he joined the Department of Physics and Astronomy at Vanderbilt University (TN, USA), where he went on to make the first measurement of the magnetic field of an isolated nerve. He founded VIIBRE at Vanderbilt in 2001 in order to foster and enhance interdisciplinary research in the biophysical sciences, bioengineering and medicine. VIIBRE efforts have led to the development of devices integral to organ-on-chip research. He is focusing on the neurovascular unit-on-a-chip, heart-on-a-chip, a missing organ microformulator, and microfluidic pumps and valves to control and analyze organs-on-chips.

  12. Network Partitioning Domain Knowledge Multiobjective Application Mapping for Large-Scale Network-on-Chip

    Directory of Open Access Journals (Sweden)

    Yin Zhen Tei

    2014-01-01

    Full Text Available This paper proposes a multiobjective application mapping technique targeted for large-scale network-on-chip (NoC. As the number of intellectual property (IP cores in multiprocessor system-on-chip (MPSoC increases, NoC application mapping to find optimum core-to-topology mapping becomes more challenging. Besides, the conflicting cost and performance trade-off makes multiobjective application mapping techniques even more complex. This paper proposes an application mapping technique that incorporates domain knowledge into genetic algorithm (GA. The initial population of GA is initialized with network partitioning (NP while the crossover operator is guided with knowledge on communication demands. NP reduces the large-scale application mapping complexity and provides GA with a potential mapping search space. The proposed genetic operator is compared with state-of-the-art genetic operators in terms of solution quality. In this work, multiobjective optimization of energy and thermal-balance is considered. Through simulation, knowledge-based initial mapping shows significant improvement in Pareto front compared to random initial mapping that is widely used. The proposed knowledge-based crossover also shows better Pareto front compared to state-of-the-art knowledge-based crossover.

  13. HARDWARE IMPLEMENTATION OF PIPELINE BASED ROUTER DESIGN FOR ON-CHIP NETWORK

    Directory of Open Access Journals (Sweden)

    U. Saravanakumar

    2012-12-01

    Full Text Available As the feature size is continuously decreasing and integration density is increasing, interconnections have become a dominating factor in determining the overall quality of a chip. Due to the limited scalability of system bus, it cannot meet the requirement of current System-on-Chip (SoC implementations where only a limited number of functional units can be supported. Long global wires also cause many design problems, such as routing congestion, noise coupling, and difficult timing closure. Network-on-Chip (NoC architectures have been proposed to be an alternative to solve the above problems by using a packet-based communication network. In this paper, the Circuit-Switched (CS Router was designed and analysed the various parameters such as power, timing and area. The CS router has taken more number of cycles to transfer the data from source to destination. So the pipelining concept was implemented by adding registers in the CS router architecture. The proposed architecture increases the speed of operation and reduces the critical path of the circuit. The router has been implemented using Verilog HDL. The parameters area, power and timing were calculated in 130 nm CMOS technology using Synopsys tool with nominal operating voltage of 1V and packet size is 39 bits. Finally power, area and time of these two routers have been analysed and compared.

  14. On-Chip Laser-Power Delivery System for Dielectric Laser Accelerators

    Science.gov (United States)

    Hughes, Tyler W.; Tan, Si; Zhao, Zhexin; Sapra, Neil V.; Leedle, Kenneth J.; Deng, Huiyang; Miao, Yu; Black, Dylan S.; Solgaard, Olav; Harris, James S.; Vuckovic, Jelena; Byer, Robert L.; Fan, Shanhui; England, R. Joel; Lee, Yun Jo; Qi, Minghao

    2018-05-01

    We propose an on-chip optical-power delivery system for dielectric laser accelerators based on a fractal "tree-network" dielectric waveguide geometry. This system replaces experimentally demanding free-space manipulations of the driving laser beam with chip-integrated techniques based on precise nanofabrication, enabling access to orders-of-magnitude increases in the interaction length and total energy gain for these miniature accelerators. Based on computational modeling, in the relativistic regime, our laser delivery system is estimated to provide 21 keV of energy gain over an acceleration length of 192 μ m with a single laser input, corresponding to a 108-MV/m acceleration gradient. The system may achieve 1 MeV of energy gain over a distance of less than 1 cm by sequentially illuminating 49 identical structures. These findings are verified by detailed numerical simulation and modeling of the subcomponents, and we provide a discussion of the main constraints, challenges, and relevant parameters with regard to on-chip laser coupling for dielectric laser accelerators.

  15. Implantable Biomedical Signal Monitoring Using RF Energy Harvestingand On-Chip Antenna

    Directory of Open Access Journals (Sweden)

    Jiann-Shiun Yuan

    2015-08-01

    Full Text Available This paper presents the design of an energy harvesting wireless and battery-less silicon-on-chip (SoC device that can be implanted in the human body to monitor certain health conditions. The proposed architecture has been designed on TSMC 0.18μm CMOS ICs and is an integrated system with a rectenna (antenna and rectifier and transmitting circuit, all on a single chip powered by an external transmitter and that is small enough to be inserted in the human eye, heart or brain. The transmitting and receiving antennas operate in the 5.8- GHz ISM band and have a -10dB gain. The distinguishing feature of this design is the rectenna that comprises of a singlestage diode connected NMOS rectifier and a 3-D on-chip antenna that occupies only 2.5 × 1 × 2.8 mm3 of chip area and has the ability to communicate within proximity of 5 cm while giving 10% efficiency. The external source is a reader that powers up the RF rectifier in the implantable chip triggering it to start sending data back to the reader enabling an efficient method of health evaluation for the patient.

  16. Marker Pen Lithography for Flexible and Curvilinear On-Chip Energy Storage

    KAUST Repository

    Jiang, Qiu; Kurra, Narendra; Alshareef, Husam N.

    2015-01-01

    On-chip energy storage using microsupercapacitors can serve the dual role of supplementing batteries for pulse power delivery, and replacement of bulky electrolytic capacitors in ac-line filtering applications. Despite complexity and processing costs, microfabrication techniques are being employed in fabricating a great variety of microsupercapacitor devices. Here, a simple, cost-effective, and versatile strategy is proposed to fabricate flexible and curvilinear microsupercapacitors (MSCs). The protocol involves writing sacrificial ink patterns using commercial marker pens on rigid, flexible, and curvilinear substrates. It is shown that this process can be used in both lift-off and etching modes, and the possibility of multistack design of active materials using simple pen lithography is demonstrated. As a prototype, this method is used to produce conducting polymer MSCs involving both poly(3,4-ethylenedioxythiophene), polyaniline, and metal oxide (MnO2) electrode materials. Typical values of energy density in the range of 5-11 mWh cm-3 at power densities of 1-6 W cm-3 are achieved, which is comparable to thin film batteries and superior to the carbon and metal oxide based microsupercapacitors reported in the literature. The simplicity and broad scope of this innovative strategy can open up new avenues for easy and scalable fabrication of a wide variety of on-chip energy storage devices. © 2015 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim.

  17. Improved color metrics in solid-state lighting via utilization of on-chip quantum dots

    Science.gov (United States)

    Mangum, Benjamin D.; Landes, Tiemo S.; Theobald, Brian R.; Kurtin, Juanita N.

    2017-02-01

    While Quantum Dots (QDs) have found commercial success in display applications, there are currently no widely available solid state lighting products making use of QD nanotechnology. In order to have real-world success in today's lighting market, QDs must be capable of being placed in on-chip configurations, as remote phosphor configurations are typically much more expensive. Here we demonstrate solid-state lighting devices made with on-chip QDs. These devices show robust reliability under both dry and wet high stress conditions. High color quality lighting metrics can easily be achieved using these narrow, tunable QD downconverters: CRI values of Ra > 90 as well as R9 values > 80 are readily available when combining QDs with green phosphors. Furthermore, we show that QDs afford a 15% increase in overall efficiency compared to traditional phosphor downconverted SSL devices. The fundamental limit of QD linewidth is examined through single particle QD emission studies. Using standard Cd-based QD synthesis, it is found that single particle linewidths of 20 nm FWHM represent a lower limit to the narrowness of QD emission in the near term.

  18. A Fully Integrated Humidity Sensor System-on-Chip Fabricated by Micro-Stamping Technology

    Directory of Open Access Journals (Sweden)

    Chih-Ting Lin

    2012-08-01

    Full Text Available A fully integrated humidity sensor chip was designed, implemented, and tested. Utilizing the micro-stamping technology, the pseudo-3D sensor system-on-chip (SSoC architecture can be implemented by stacking sensing materials directly on the top of a CMOS-fabricated chip. The fabricated sensor system-on-chip (2.28 mm × 2.48 mm integrated a humidity sensor, an interface circuit, a digital controller, and an On-Off Keying (OOK wireless transceiver. With low power consumption, i.e., 750 μW without RF operation, the sensitivity of developed sensor chip was experimentally verified in the relative humidity (RH range from 32% to 60%. The response time of the chip was also experimentally verified to be within 5 seconds from RH 36% to RH 64%. As a consequence, the implemented humidity SSoC paves the way toward the an ultra-small sensor system for various applications.

  19. An Implantable Cardiovascular Pressure Monitoring System with On-Chip Antenna and RF Energy Harvesting

    Directory of Open Access Journals (Sweden)

    Yu-Chun Liu

    2015-08-01

    Full Text Available An implantable wireless system with on-chip antenna for cardiovascular pressure monitor is studied. The implantable device is operated in a batteryless manner, powered by an external radio frequency (RF power source. The received RF power level can be sensed and wirelessly transmitted along with blood pressure signal for feedback control of the external RF power. The integrated electronic system, consisting of a capacitance-to-voltage converter, an adaptive RF powering system, an RF transmitter and digital control circuitry, is simulated using a TSMC 0.18 μm CMOS technology. The implanted RF transmitter circuit is combined with a low power voltage-controlled oscillator resonating at 5.8 GHz and a power amplifier. For the design, the simulation model is setup using ADS and HFSS software. The dimension of the antenna is 1 × 0.6 × 4.8 mm3 with a 1 × 0.6 mm2 on-chip circuit which is small enough to place in human carotid artery.

  20. Six-port optical switch for cluster-mesh photonic network-on-chip

    Science.gov (United States)

    Jia, Hao; Zhou, Ting; Zhao, Yunchou; Xia, Yuhao; Dai, Jincheng; Zhang, Lei; Ding, Jianfeng; Fu, Xin; Yang, Lin

    2018-05-01

    Photonic network-on-chip for high-performance multi-core processors has attracted substantial interest in recent years as it offers a systematic method to meet the demand of large bandwidth, low latency and low power dissipation. In this paper we demonstrate a non-blocking six-port optical switch for cluster-mesh photonic network-on-chip. The architecture is constructed by substituting three optical switching units of typical Spanke-Benes network to optical waveguide crossings. Compared with Spanke-Benes network, the number of optical switching units is reduced by 20%, while the connectivity of routing path is maintained. By this way the footprint and power consumption can be reduced at the expense of sacrificing the network latency performance in some cases. The device is realized by 12 thermally tuned silicon Mach-Zehnder optical switching units. Its theoretical spectral responses are evaluated by establishing a numerical model. The experimental spectral responses are also characterized, which indicates that the optical signal-to-noise ratios of the optical switch are larger than 13.5 dB in the wavelength range from 1525 nm to 1565 nm. Data transmission experiment with the data rate of 32 Gbps is implemented for each optical link.

  1. Embedded memory design for multi-core and systems on chip

    CERN Document Server

    Mohammad, Baker

    2014-01-01

    This book describes the various tradeoffs systems designers face when designing embedded memory.  Readers designing multi-core systems and systems on chip will benefit from the discussion of different topics from memory architecture, array organization, circuit design techniques and design for test.  The presentation enables a multi-disciplinary approach to chip design, which bridges the gap between the architecture level and circuit level, in order to address yield, reliability and power-related issues for embedded memory.  ·         Provides a comprehensive overview of embedded memory design and associated challenges and choices; ·         Explains tradeoffs and dependencies across different disciplines involved with multi-core and system on chip memory design; ·         Includes detailed discussion of memory hierarchy and its impact on energy and performance; ·         Uses real product examples to demonstrate embedded memory design flow from architecture, to circuit ...

  2. Source-synchronous networks-on-chip circuit and architectural interconnect modeling

    CERN Document Server

    Mandal, Ayan; Mahapatra, Rabi

    2014-01-01

    This book describes novel methods for network-on-chip (NoC) design, using source-synchronous high-speed resonant clocks.  The authors discuss NoCs from the bottom up, providing circuit level details, before providing architectural simulations. As a result, readers will get a complete picture of how a NoC can be designed and optimized.  Using the methods described in this book, readers are enabled to design NoCs that are 5X better than existing approaches in terms of latency and throughput and can also sustain a significantly greater amount of traffic.   • Describes novel methods for high-speed network-on-chip (NoC) design; • Enables readers to understand NoC design from both circuit and architectural levels; • Provides circuit-level details of the NoC (including clocking, router design), along with a high-speed, resonant clocking style which is used in the NoC; • Includes architectural simulations of the NoC, demonstrating significantly superior performance over the state-of-the-art.

  3. A full on-chip CMOS low-dropout voltage regulator with VCCS compensation

    Energy Technology Data Exchange (ETDEWEB)

    Gao Leisheng; Zhou Yumei; Wu Bin; Jiang Jianhua, E-mail: gaoleisheng@ime.ac.c [Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029 (China)

    2010-08-15

    A full on-chip CMOS low-dropout (LDO) voltage regulator with high PSR is presented. Instead of relying on the zero generated by the load capacitor and its equivalent series resistance, the proposed LDO generates a zero by voltage-controlled current sources for stability. The compensating capacitor for the proposed scheme is only 0.18 pF, which is much smaller than the capacitor of the conventional compensation scheme. The full on-chip LDO was fabricated in commercial 0.35 {mu}m CMOS technology. The active chip area of the LDO (including the bandgap voltage reference) is 400 x 270 {mu}m{sup 2}. Experimental results show that the PSR of the LDO is -58.7 dB at a frequency of 10 Hz and -20 dB at a frequency of 1 MHz. The proposed LDO is capable of sourcing an output current up to 50 mA. (semiconductor integrated circuits)

  4. A full on-chip CMOS low-dropout voltage regulator with VCCS compensation

    International Nuclear Information System (INIS)

    Gao Leisheng; Zhou Yumei; Wu Bin; Jiang Jianhua

    2010-01-01

    A full on-chip CMOS low-dropout (LDO) voltage regulator with high PSR is presented. Instead of relying on the zero generated by the load capacitor and its equivalent series resistance, the proposed LDO generates a zero by voltage-controlled current sources for stability. The compensating capacitor for the proposed scheme is only 0.18 pF, which is much smaller than the capacitor of the conventional compensation scheme. The full on-chip LDO was fabricated in commercial 0.35 μm CMOS technology. The active chip area of the LDO (including the bandgap voltage reference) is 400 x 270 μm 2 . Experimental results show that the PSR of the LDO is -58.7 dB at a frequency of 10 Hz and -20 dB at a frequency of 1 MHz. The proposed LDO is capable of sourcing an output current up to 50 mA. (semiconductor integrated circuits)

  5. On-chip real-time single-copy polymerase chain reaction in picoliter droplets

    Energy Technology Data Exchange (ETDEWEB)

    Beer, N R; Hindson, B; Wheeler, E; Hall, S B; Rose, K A; Kennedy, I; Colston, B

    2007-04-20

    The first lab-on-chip system for picoliter droplet generation and PCR amplification with real-time fluorescence detection has performed PCR in isolated droplets at volumes 10{sup 6} smaller than commercial real-time PCR systems. The system utilized a shearing T-junction in a silicon device to generate a stream of monodisperse picoliter droplets that were isolated from the microfluidic channel walls and each other by the oil phase carrier. An off-chip valving system stopped the droplets on-chip, allowing them to be thermal cycled through the PCR protocol without droplet motion. With this system a 10-pL droplet, encapsulating less than one copy of viral genomic DNA through Poisson statistics, showed real-time PCR amplification curves with a cycle threshold of {approx}18, twenty cycles earlier than commercial instruments. This combination of the established real-time PCR assay with digital microfluidics is ideal for isolating single-copy nucleic acids in a complex environment.

  6. Priming nanoparticle-guided diagnostics and therapeutics towards human organs-on-chips microphysiological system

    Science.gov (United States)

    Choi, Jin-Ha; Lee, Jaewon; Shin, Woojung; Choi, Jeong-Woo; Kim, Hyun Jung

    2016-10-01

    Nanotechnology and bioengineering have converged over the past decades, by which the application of multi-functional nanoparticles (NPs) has been emerged in clinical and biomedical fields. The NPs primed to detect disease-specific biomarkers or to deliver biopharmaceutical compounds have beena validated in conventional in vitro culture models including two dimensional (2D) cell cultures or 3D organoid models. However, a lack of experimental models that have strong human physiological relevance has hampered accurate validation of the safety and functionality of NPs. Alternatively, biomimetic human "Organs-on-Chips" microphysiological systems have recapitulated the mechanically dynamic 3D tissue interface of human organ microenvironment, in which the transport, cytotoxicity, biocompatibility, and therapeutic efficacy of NPs and their conjugates may be more accurately validated. Finally, integration of NP-guided diagnostic detection and targeted nanotherapeutics in conjunction with human organs-on-chips can provide a novel avenue to accelerate the NP-based drug development process as well as the rapid detection of cellular secretomes associated with pathophysiological processes.

  7. Diatomite Photonic Crystals for Facile On-Chip Chromatography and Sensing of Harmful Ingredients from Food.

    Science.gov (United States)

    Kong, Xianming; Yu, Qian; Li, Erwen; Wang, Rui; Liu, Qing; Wang, Alan X

    2018-03-31

    Diatomaceous earth-otherwise called diatomite-is essentially composed of hydrated biosilica with periodic nanopores. Diatomite is derived from fossilized remains of diatom frustules and possesses photonic-crystal features. In this paper, diatomite simultaneously functions as the matrix of the chromatography plate and the substrate for surface-enhanced Raman scattering (SERS), by which the photonic crystal-features could enhance the optical field intensity. The on-chip separation performance of the device was confirmed by separating and detecting industrial dye (Sudan I) in an artificial aqueous mixture containing 4-mercaptobenzoic acid (MBA), where concentrated plasmonic Au colloid was casted onto the analyte spot for SERS measurement. The plasmonic-photonic hybrid mode between the Au nanoparticles (NP) and the diatomite layer could supply nearly 10 times the increment of SERS signal (MBA) intensity compared to the common silica gel chromatography plate. Furthermore, this lab-on-a-chip photonic crystal device was employed for food safety sensing in real samples and successfully monitored histamine in salmon and tuna. This on-chip food sensor can be used as a cheap, robust, and portable sensing platform for monitoring for histamine or other harmful ingredients at trace levels in food products.

  8. Small-scale, self-propagating combustion realized with on-chip porous silicon.

    Science.gov (United States)

    Piekiel, Nicholas W; Morris, Christopher J

    2015-05-13

    For small-scale energy applications, energetic materials represent a high energy density source that, in certain cases, can be accessed with a very small amount of energy input. Recent advances in microprocessing techniques allow for the implementation of a porous silicon energetic material onto a crystalline silicon wafer at the microscale; however, combustion at a small length scale remains to be fully investigated, particularly with regards to the limitations of increased relative heat loss during combustion. The present study explores the critical dimensions of an on-chip porous silicon energetic material (porous silicon + sodium perchlorate (NaClO4)) required to propagate combustion. We etched ∼97 μm wide and ∼45 μm deep porous silicon channels that burned at a steady rate of 4.6 m/s, remaining steady across 90° changes in direction. In an effort to minimize the potential on-chip footprint for energetic porous silicon, we also explored the minimum spacing between porous silicon channels. We demonstrated independent burning of porous silicon channels at a spacing of 0.5 m on a chip surface area of 1.65 cm(2). Smaller porous silicon channels of ∼28 μm wide and ∼14 μm deep were also utilized. These samples propagated combustion, but at times, did so unsteadily. This result may suggest that we are approaching a critical length scale for self-propagating combustion in a porous silicon energetic material.

  9. Diatomite Photonic Crystals for Facile On-Chip Chromatography and Sensing of Harmful Ingredients from Food

    Directory of Open Access Journals (Sweden)

    Xianming Kong

    2018-03-01

    Full Text Available Diatomaceous earth—otherwise called diatomite—is essentially composed of hydrated biosilica with periodic nanopores. Diatomite is derived from fossilized remains of diatom frustules and possesses photonic-crystal features. In this paper, diatomite simultaneously functions as the matrix of the chromatography plate and the substrate for surface-enhanced Raman scattering (SERS, by which the photonic crystal-features could enhance the optical field intensity. The on-chip separation performance of the device was confirmed by separating and detecting industrial dye (Sudan I in an artificial aqueous mixture containing 4-mercaptobenzoic acid (MBA, where concentrated plasmonic Au colloid was casted onto the analyte spot for SERS measurement. The plasmonic-photonic hybrid mode between the Au nanoparticles (NP and the diatomite layer could supply nearly 10 times the increment of SERS signal (MBA intensity compared to the common silica gel chromatography plate. Furthermore, this lab-on-a-chip photonic crystal device was employed for food safety sensing in real samples and successfully monitored histamine in salmon and tuna. This on-chip food sensor can be used as a cheap, robust, and portable sensing platform for monitoring for histamine or other harmful ingredients at trace levels in food products.

  10. A high-speed on-chip pseudo-random binary sequence generator for multi-tone phase calibration

    Science.gov (United States)

    Gommé, Liesbeth; Vandersteen, Gerd; Rolain, Yves

    2011-07-01

    An on-chip reference generator is conceived by adopting the technique of decimating a pseudo-random binary sequence (PRBS) signal in parallel sequences. This is of great benefit when high-speed generation of PRBS and PRBS-derived signals is the objective. The design implemented standard CMOS logic is available in commercial libraries to provide the logic functions for the generator. The design allows the user to select the periodicity of the PRBS and the PRBS-derived signals. The characterization of the on-chip generator marks its performance and reveals promising specifications.

  11. A high-speed on-chip pseudo-random binary sequence generator for multi-tone phase calibration

    International Nuclear Information System (INIS)

    Gommé, Liesbeth; Vandersteen, Gerd; Rolain, Yves

    2011-01-01

    An on-chip reference generator is conceived by adopting the technique of decimating a pseudo-random binary sequence (PRBS) signal in parallel sequences. This is of great benefit when high-speed generation of PRBS and PRBS-derived signals is the objective. The design implemented standard CMOS logic is available in commercial libraries to provide the logic functions for the generator. The design allows the user to select the periodicity of the PRBS and the PRBS-derived signals. The characterization of the on-chip generator marks its performance and reveals promising specifications

  12. An Asynchronous Time-Division-Multiplexed Network-on-Chip for Real-Time Systems

    DEFF Research Database (Denmark)

    Kasapaki, Evangelia

    is an important part of the T-CREST paltform and used in a number of configurations. The flexible timing organization of Argo combines asynchronous routers with mesochronous NIs, which are connected to individually clocked cores, supporting a GALS system organization. The mesochronous NIs operate at the same......Multi-processor architectures using networks-on-chip (NOCs) for communication are becoming the standard approach in the development of embedded systems and general purpose platforms. Typically, multi-processor platforms follow a globally asynchronous locally synchronous (GALS) timing organization....... This thesis focuses on the design of Argo, a NOC targeted at hard real-time multi-processor platforms with a GALS timing organization. To support real-time communication, NOCs establish end-to-end connections and provide latency and throughput guarantees for these connections. Argo uses time division...

  13. On-chip plasmonic cavity-enhanced spontaneous emission rate at the zero-phonon line

    DEFF Research Database (Denmark)

    Siampour, Hamidreza; Kumar, Shailesh; Bozhevolnyi, Sergey I.

    Highly confined surface plasmon polariton (SPP) modes can be utilized to enhance light-matter interaction at the single emitter level of quantum optical systems [1-4]. Dielectric-loaded SPP waveguides (DLSPPWs) confine SPPs laterally with relatively low propagation loss, enabling to benefit both ...... and an up to 42-fold spontaneous emission rate enhancement at the zero-phonon line (a ∼7-fold resonance enhancement in addition to a ∼6-fold broadband enhancement) is achieved, revealing the potential of our approach for on-chip realization of quantum-optical networks....... from a large Purcell factor and from a large radiative efficiency (low quenching rates) [1, 2]. In this work, we present a DLSPPW-based Bragg cavity resonator to direct emission from a single diamond nitrogen vacancy (NV) center into the zero-phonon line (Fig. 1). A quality factor of ∼70 for the cavity...

  14. Gain Enhanced On-Chip Folded Dipole Antenna Utilizing Artificial Magnetic Conductor at 94 GHz

    KAUST Repository

    Nafe, Mahmoud; Syed, Ahad; Shamim, Atif

    2017-01-01

    On-chip antennas suffer from low gain values and distorted radiation patterns due to lossy and high permittivity Si substrate. An ideal solution would be to isolate the lossy Si substrate from the antenna through a Perfect Electric Conductor (PEC) ground plane, however the typical CMOS stack up which has multiple metal layers embedded in a thin oxide layer does not permit this. In this work, an Artificial Magnetic Conductor (AMC) reflecting surface has been utilized to isolate the Si substrate from the antenna. Contrary to the previous reports, the AMC structure is completely embedded in the thin oxide layer with the ground plane above the Si substrate. In this approach, the AMC surface acts for the first time as both a reflector and a silicon shield. As a result the antenna radiation pattern is not distorted and its gain is improved by 8 dB. The fabricated prototype demonstrates good impedance and radiation characteristics.

  15. Gain Enhanced On-Chip Folded Dipole Antenna Utilizing Artificial Magnetic Conductor at 94 GHz

    KAUST Repository

    Nafe, Mahmoud

    2017-09-05

    On-chip antennas suffer from low gain values and distorted radiation patterns due to lossy and high permittivity Si substrate. An ideal solution would be to isolate the lossy Si substrate from the antenna through a Perfect Electric Conductor (PEC) ground plane, however the typical CMOS stack up which has multiple metal layers embedded in a thin oxide layer does not permit this. In this work, an Artificial Magnetic Conductor (AMC) reflecting surface has been utilized to isolate the Si substrate from the antenna. Contrary to the previous reports, the AMC structure is completely embedded in the thin oxide layer with the ground plane above the Si substrate. In this approach, the AMC surface acts for the first time as both a reflector and a silicon shield. As a result the antenna radiation pattern is not distorted and its gain is improved by 8 dB. The fabricated prototype demonstrates good impedance and radiation characteristics.

  16. A viable on-chip FPGA configuration memory scrubbing approach for CBM-ToF

    Energy Technology Data Exchange (ETDEWEB)

    Oancea, Andrei-Dumitru; Stuellein, Christian; Manz, Sebastian; Gebelein, Jano; Kebschull, Udo [Infrastruktur und Rechnersysteme in der Informationsverarbeitung (IRI), Goethe-Universitaet, Senckenberganlage 31, 60325 Frankfurt am Main (Germany); Collaboration: CBM-Collaboration

    2015-07-01

    The ToF Detector of the CBM Experiment will be equipped with FPGA-based read-out boards (ROBs). These ROBs will be operated in a radiation environment, and therefore need a mitigation mechanism against soft errors in the SRAM-based configuration memories of the FPGAs. The proposed approach combines intrinsic on-chip single upset correction with extrinsic selective frame scrubbing for multiple-bit upsets. The slow control is realized using the GBT-SCA, which is capable of handling interrupts. This enables the new approach of event-driven configuration frame correction. While conventional blind scrubbing leads to a continuous load on the control path, the selective frame scrubbing reduces this load to a minimum. For verification purposes, radiation tests with a proton beam were performed at COSY, Juelich. The occurred soft errors were classified into single and multiple- bit upsets, enabling an estimation of the rate at which extrinsic intervention is necessary.

  17. Design, fabrication, and evaluation of on-chip micro-supercapacitors

    Science.gov (United States)

    Beidaghi, Majid; Chen, Wei; Wang, Chunlei

    2011-06-01

    Development of miniaturized electronic systems has stimulated the demand for miniaturized power sources that can be integrated into such systems. Among the different micro power sources micro electrochemical energy storage and conversion devices are particularly attractive because of their high efficiency and relatively high energy density. Electrochemical micro-capacitors or micro-supercapacitors offer higher power density compared to micro-batteries and micro-fuel cells. In this paper, development of on-chip micro-supercapacitors based on interdigitated C-MEMS electrode microarrays is introduced. C-MEMS electrodes are employed both as electrode material for electric double layer capacitor (EDLC) or as three dimensional (3D) current collectors of EDLC or pseudo-capacitive materials. Recent advancements in fabrication methods of C-MEMS based micro-supercapacitors are discussed and electrochemical properties of C-MEMS electrodes and it composites are reviewed.

  18. Recent advances in design and fabrication of on-chip micro-supercapacitors

    Science.gov (United States)

    Beidaghi, Majid; Wang, Chunlei

    2012-06-01

    Recent development in miniaturized electronic devices has increased the demand for power sources that are sufficiently compact and can potentially be integrated on a chip with other electronic components. Miniaturized electrochemical capacitors (EC) or micro-supercapacitors have great potential to complement or replace batteries and electrolytic capacitors in a variety of applications. Recently, we have developed several types of micro-supercapacitors with different structural designs and active materials. Carbon-Microelectromechanical Systems (C-MEMS) with three dimensional (3D) interdigital structures are employed both as electrode material for electric double layer capacitor (EDLC) or as three dimensional (3D) current collectors of pseudo-capacitive materials. More recently, we have also developed microsupercapacitor based on hybrid graphene and carbon nanotube interdigital structures. In this paper, the recent advances in design and fabrication of on-chip micro-supercapacitors are reviewed.

  19. A Very Low Cost BCH Decoder for High Immunity of On-Chip Memories

    Science.gov (United States)

    Seo, Haejun; Han, Sehwan; Heo, Yoonseok; Cho, Taewon

    BCH(Bose-Chaudhuri-Hoquenbhem) code, a type of block codes-cyclic codes, has very strong error-correcting ability which is vital for performing the error protection on the memory system. BCH code has many kinds of dual algorithms, PGZ(Pererson-Gorenstein-Zierler) algorithm out of them is advantageous in view of correcting the errors through the simple calculation in t value. However, this is problematic when this becomes 0 (divided by zero) in case ν ≠ t. In this paper, the circuit would be simplified by suggesting the multi-mode hardware architecture in preparation that v were 0~3. First, production cost would be less thanks to the smaller number of gates. Second, lessening power consumption could lengthen the recharging period. The very low cost and simple datapath make our design a good choice in small-footprint SoC(System on Chip) as ECC(Error Correction Code/Circuit) in memory system.

  20. Comprehensive Study of Microgel Electrode for On-Chip Electrophoretic Cell Sorting

    Science.gov (United States)

    Hattori, Akihiro; Yasuda, Kenji

    2010-06-01

    We have developed an on-chip cell sorting system and microgel electrode for applying electrostatic force in microfluidic pathways in the chip. The advantages of agarose electrodes are 1) current-driven electrostatic force generation, 2) stability against pH change and chemicals, and 3) no bubble formation caused by electrolysis. We examined the carrier ion type and concentration dependence of microgel electrode impedance, and found that CoCl2 has less than 1/10 of the impedance from NaCl, and the reduction of the impedance of NaCl gel electrode was plateaued at 0.5 M. The structure control of the microgel electrode exploiting the surface tension of sol-state agarose was also introduced. The addition of 1% (w/v) trehalose into the microgel electrode allowed the frozen storage of the microgel electrode chip. The experimental results demonstrate the potential of our system and microgel electrode for practical applications in microfluidic chips.

  1. On-Chip High-Finesse Fabry-Perot Microcavities for Optical Sensing and Quantum Information

    Directory of Open Access Journals (Sweden)

    Mohammad H. Bitarafan

    2017-07-01

    Full Text Available For applications in sensing and cavity-based quantum computing and metrology, open-access Fabry-Perot cavities—with an air or vacuum gap between a pair of high reflectance mirrors—offer important advantages compared to other types of microcavities. For example, they are inherently tunable using MEMS-based actuation strategies, and they enable atomic emitters or target analytes to be located at high field regions of the optical mode. Integration of curved-mirror Fabry-Perot cavities on chips containing electronic, optoelectronic, and optomechanical elements is a topic of emerging importance. Micro-fabrication techniques can be used to create mirrors with small radius-of-curvature, which is a prerequisite for cavities to support stable, small-volume modes. We review recent progress towards chip-based implementation of such cavities, and highlight their potential to address applications in sensing and cavity quantum electrodynamics.

  2. A System on Chip approach to enhanced learning in interdisciplinary robotics

    DEFF Research Database (Denmark)

    Sørensen, Anders Stengaard; Falsig, Simon

    2011-01-01

    the framework in an embedded systems course and various student projects, and have found that it greatly enhance the students abilities to control hardware from software, and dramatically reduce the time spent on software $\\leftrightarrow$ hardware interfacing. As the framework is also scalable, it can support......p, li { white-space: pre-wrap; } To sustain interdisciplinary teaching and learning in the rapidly growing and diversifying field of robotics, we have successfully employed FPGA based System on Chip (SoC) technology to provide abstraction between high level software and low level IO/ and control...... hardware. Our approach is to provides students with a simple FPGA based framework for hardware access, and hardware I/O development, which is independent of computer platform and programming language, and enable the students to add to, or change I/O hardware in accordance with their skills. We have tested...

  3. Advances in Sensors-Centric Microprocessors and System-on-Chip

    Directory of Open Access Journals (Sweden)

    Juan A. Gómez-Pulido

    2012-04-01

    Full Text Available Sensors-based systems are nowadays an extended technology for many markets due to their great potential in the collection of data from the environment and the processing of such data for different purposes. A typical example is the wireless sensor devices, where the outer temperature, humidity, luminosity and many other parameters can be acquired, measured and processed in order to build useful and fascinating applications that contribute to human welfare. In this scenario, the processing architectures of the sensors-based systems play a very important role. The requirements that are necessary for many such applications (real-time processing, low-power consumption, reduced size, reliability, security and many others means that research on advanced architectures of Microprocessors and System-on-Chips (SoC is needed to design and implement a successful product. In this sense, there are many challenges and open questions in this area that need to be addressed. [...

  4. Time-Predictable Communication on a Time-Division Multiplexing Network-on-Chip Multicore

    DEFF Research Database (Denmark)

    Sørensen, Rasmus Bo

    This thesis presents time-predictable inter-core communication on a multicore platform with a time-division multiplexing (TDM) network-on-chip (NoC) for hard real-time systems. The thesis is structured as a collection of papers that contribute within the areas of: reconfigurable TDM NoCs, static...... TDM scheduling, and time-predictable inter-core communication. More specifically, the work presented in this thesis investigates the interaction between hardware and software involved in time-predictable inter-core communication on the multicore platform. The thesis presents: a new generation...... of the Argo NoC network interface (NI) that supports instantaneous reconfiguration, a TDM traffic scheduler that generates virtual circuit (VC) configurations for the Argo NoC, and software functions for two types of intercore communication. The new generation of the Argo NoC adds the capability...

  5. Biosensors in Health Care: The Milestones Achieved in Their Development towards Lab-on-Chip-Analysis

    Directory of Open Access Journals (Sweden)

    Suprava Patel

    2016-01-01

    Full Text Available Immense potentiality of biosensors in medical diagnostics has driven scientists in evolution of biosensor technologies and innovating newer tools in time. The cornerstone of the popularity of biosensors in sensing wide range of biomolecules in medical diagnostics is due to their simplicity in operation, higher sensitivity, ability to perform multiplex analysis, and capability to be integrated with different function by the same chip. There remains a huge challenge to meet the demands of performance and yield to its simplicity and affordability. Ultimate goal stands for providing point-of-care testing facility to the remote areas worldwide, particularly the developing countries. It entails continuous development in technology towards multiplexing ability, fabrication, and miniaturization of biosensor devices so that they can provide lab-on-chip-analysis systems to the community.

  6. A multi-chip data acquisition system based on a heterogeneous system-on-chip platform

    CERN Document Server

    Fiergolski, Adrian

    2017-01-01

    The Control and Readout Inner tracking BOard (CaRIBOu) is a versatile readout system targeting a multitude of detector prototypes. It profits from the heterogeneous platform of the Zynq System-on-Chip (SoC) and integrates in a monolithic device front-end FPGA resources with a back-end software running on a hard-core ARM-based processor. The user-friendly Linux terminal with the pre-installed DAQ software is combined with the efficiency and throughput of a system fully implemented in the FPGA fabric. The paper presents the design of the SoC-based DAQ system and its building blocks. It also shows examples of the achieved functionality for the CLICpix2 readout ASIC.

  7. A Scalable, Timing-Safe, Network-on-Chip Architecture with an Integrated Clock Distribution Method

    DEFF Research Database (Denmark)

    Bjerregaard, Tobias; Stensgaard, Mikkel Bystrup; Sparsø, Jens

    2007-01-01

    Growing system sizes together with increasing performance variability are making globally synchronous operation hard to realize. Mesochronous clocking constitutes a possible solution to the problems faced. The most fundamental of problems faced when communicating between mesochronously clocked re...... is based purely on local observations. It is demonstrated with a 90 nm CMOS standard cell network-on-chip design which implements completely timing-safe, global communication in a modular system......Growing system sizes together with increasing performance variability are making globally synchronous operation hard to realize. Mesochronous clocking constitutes a possible solution to the problems faced. The most fundamental of problems faced when communicating between mesochronously clocked...... regions concerns the possibility of data corruption caused by metastability. This paper presents an integrated communication and mesochronous clocking strategy, which avoids timing related errors while maintaining a globally synchronous system perspective. The architecture is scalable as timing integrity...

  8. On-Chip Single-Plasmon Nanocircuit Driven by a Self-Assembled Quantum Dot.

    Science.gov (United States)

    Wu, Xiaofei; Jiang, Ping; Razinskas, Gary; Huo, Yongheng; Zhang, Hongyi; Kamp, Martin; Rastelli, Armando; Schmidt, Oliver G; Hecht, Bert; Lindfors, Klas; Lippitz, Markus

    2017-07-12

    Quantum photonics holds great promise for future technologies such as secure communication, quantum computation, quantum simulation, and quantum metrology. An outstanding challenge for quantum photonics is to develop scalable miniature circuits that integrate single-photon sources, linear optical components, and detectors on a chip. Plasmonic nanocircuits will play essential roles in such developments. However, for quantum plasmonic circuits, integration of stable, bright, and narrow-band single photon sources in the structure has so far not been reported. Here we present a plasmonic nanocircuit driven by a self-assembled GaAs quantum dot. Through a planar dielectric-plasmonic hybrid waveguide, the quantum dot efficiently excites narrow-band single plasmons that are guided in a two-wire transmission line until they are converted into single photons by an optical antenna. Our work demonstrates the feasibility of fully on-chip plasmonic nanocircuits for quantum optical applications.

  9. Lab-On-Chip Clinorotation System for Live-Cell Microscopy Under Simulated Microgravity

    Science.gov (United States)

    Yew, Alvin G.; Atencia, Javier; Chinn, Ben; Hsieh, Adam H.

    2013-01-01

    Cells in microgravity are subject to mechanical unloading and changes to the surrounding chemical environment. How these factors jointly influence cellular function is not well understood. We can investigate their role using ground-based analogues to spaceflight, where mechanical unloading is simulated through the time-averaged nullification of gravity. The prevailing method for cellular microgravity simulation is to use fluid-filled containers called clinostats. However, conventional clinostats are not designed for temporally tracking cell response, nor are they able to establish dynamic fluid environments. To address these needs, we developed a Clinorotation Time-lapse Microscopy (CTM) system that accommodates lab-on- chip cell culture devices for visualizing time-dependent alterations to cellular behavior. For the purpose of demonstrating CTM, we present preliminary results showing time-dependent differences in cell area between human mesenchymal stem cells (hMSCs) under modeled microgravity and normal gravity.

  10. A Novel Analytical Model for Network-on-Chip using Semi-Markov Process

    Directory of Open Access Journals (Sweden)

    WANG, J.

    2011-02-01

    Full Text Available Network-on-Chip (NoC communication architecture is proposed to resolve the bottleneck of Multi-processor communication in a single chip. In this paper, a performance analytical model using Semi-Markov Process (SMP is presented to obtain the NoC performance. More precisely, given the related parameters, SMP is used to describe the behavior of each channel and the header flit routing time on each channel can be calculated by analyzing the SMP. Then, the average packet latency in NoC can be calculated. The accuracy of our model is illustrated through simulation. Indeed, the experimental results show that the proposed model can be used to obtain NoC performance and it performs better than the state-of-art models. Therefore, our model can be used as a useful tool to guide the NoC design process.

  11. On-chip synthesis of circularly polarized emission of light with integrated photonic circuits.

    Science.gov (United States)

    He, Li; Li, Mo

    2014-05-01

    The helicity of circularly polarized (CP) light plays an important role in the light-matter interaction in magnetic and quantum material systems. Exploiting CP light in integrated photonic circuits could lead to on-chip integration of novel optical helicity-dependent devices for applications ranging from spintronics to quantum optics. In this Letter, we demonstrate a silicon photonic circuit coupled with a 2D grating emitter operating at a telecom wavelength to synthesize vertically emitting, CP light from a quasi-TE waveguide mode. Handedness of the emitted circular polarized light can be thermally controlled with an integrated microheater. The compact device footprint enables a small beam diameter, which is desirable for large-scale integration.

  12. A Wireless Biomedical Signal Interface System-on-Chip for Body Sensor Networks.

    Science.gov (United States)

    Lei Wang; Guang-Zhong Yang; Jin Huang; Jinyong Zhang; Li Yu; Zedong Nie; Cumming, D R S

    2010-04-01

    Recent years have seen the rapid development of biosensor technology, system-on-chip design, wireless technology. and ubiquitous computing. When assembled into an autonomous body sensor network (BSN), the technologies become powerful tools in well-being monitoring, medical diagnostics, and personal connectivity. In this paper, we describe the first demonstration of a fully customized mixed-signal silicon chip that has most of the attributes required for use in a wearable or implantable BSN. Our intellectual-property blocks include low-power analog sensor interface for temperature and pH, a data multiplexing and conversion module, a digital platform based around an 8-b microcontroller, data encoding for spread-spectrum wireless transmission, and a RF section requiring very few off-chip components. The chip has been fully evaluated and tested by connection to external sensors, and it satisfied typical system requirements.

  13. Hybrid FDTD Analysis for Periodic On-Chip Terahertz (THZ) Structures

    Energy Technology Data Exchange (ETDEWEB)

    Hussein, Yasser A.; Spencer, James E.; /SLAC

    2005-06-07

    We present electromagnetic analysis and radiation efficiency calculations for on-chip terahertz (THz) structures based on a hybrid, finite-difference, time-domain (HFDTD) technique. The method employs the FDTD technique to calculate S-parameters for one cell of a periodic structure. The transmission ABCD matrix is then estimated and multiplied by itself n times to obtain the n-cell periodic structure ABCD parameters that are then converted back to S-parameters. Validation of the method is carried out by comparing the results of the hybrid technique with FDTD calculations of the entire periodic structure as well as with HFSS which all agree quite well. This procedure reduces the CPU-time and allows efficient design and optimization of periodic THz radiation sources. Future research will involve coupling of Maxwell's equations with a more detailed, physics-based transport model for higher-order effects.

  14. On-chip detection of gel transition temperature using a novel micro-thermomechanical method.

    Directory of Open Access Journals (Sweden)

    Tsenguun Byambadorj

    Full Text Available We present a new thermomechanical method and a platform to measure the phase transition temperature at microscale. A thin film metal sensor on a membrane simultaneously measures both temperature and mechanical strain of the sample during heating and cooling cycles. This thermomechanical principle of operation is described in detail. Physical hydrogel samples are prepared as a disc-shaped gels (200 μm thick and 1 mm diameter and placed between an on-chip heater and sensor devices. The sol-gel transition temperature of gelatin solution at various concentrations, used as a model physical hydrogel, shows less than 3% deviation from in-depth rheological results. The developed thermomechanical methodology is promising for precise characterization of phase transition temperature of thermogels at microscale.

  15. Variable-Width Datapath for On-Chip Network Static Power Reduction

    Energy Technology Data Exchange (ETDEWEB)

    Michelogiannakis, George; Shalf, John

    2013-11-13

    With the tight power budgets in modern large-scale chips and the unpredictability of application traffic, on-chip network designers are faced with the dilemma of designing for worst- case bandwidth demands and incurring high static power overheads, or designing for an average traffic pattern and risk degrading performance. This paper proposes adaptive bandwidth networks (ABNs) which divide channels and switches into lanes such that the network provides just the bandwidth necessary in each hop. ABNs also activate input virtual channels (VCs) individually and take advantage of drowsy SRAM cells to eliminate false VC activations. In addition, ABNs readily apply to silicon defect tolerance with just the extra cost for detecting faults. For application traffic, ABNs reduce total power consumption by an average of 45percent with comparable performance compared to single-lane power-gated networks, and 33percent compared to multi-network designs.

  16. On-chip, photon-number-resolving, telecommunication-band detectors for scalable photonic information processing

    Energy Technology Data Exchange (ETDEWEB)

    Gerrits, Thomas; Lita, Adriana E.; Calkins, Brice; Tomlin, Nathan A.; Fox, Anna E.; Linares, Antia Lamas; Mirin, Richard P.; Nam, Sae Woo [National Institute of Standards and Technology, Boulder, Colorado, 80305 (United States); Thomas-Peter, Nicholas; Metcalf, Benjamin J.; Spring, Justin B.; Langford, Nathan K.; Walmsley, Ian A. [Clarendon Laboratory, University of Oxford, Parks Road, Oxford OX1 3PU (United Kingdom); Gates, James C.; Smith, Peter G. R. [Optoelectronics Research Centre, University of Southampton, Highfield SO17 1BJ (United Kingdom)

    2011-12-15

    Integration is currently the only feasible route toward scalable photonic quantum processing devices that are sufficiently complex to be genuinely useful in computing, metrology, and simulation. Embedded on-chip detection will be critical to such devices. We demonstrate an integrated photon-number-resolving detector, operating in the telecom band at 1550 nm, employing an evanescently coupled design that allows it to be placed at arbitrary locations within a planar circuit. Up to five photons are resolved in the guided optical mode via absorption from the evanescent field into a tungsten transition-edge sensor. The detection efficiency is 7.2{+-}0.5 %. The polarization sensitivity of the detector is also demonstrated. Detailed modeling of device designs shows a clear and feasible route to reaching high detection efficiencies.

  17. Development of a Surface Micromachined On-Chip Flat Disk Micropump

    Directory of Open Access Journals (Sweden)

    M. I. KILANI

    2009-08-01

    Full Text Available The paper presents research progress in the development of a surface micromachined flat disk micropump which employs the viscous and centrifugal effects acting on a layer of fluid sandwiched between a rotating flat disk and a stationary plate. The pump is fabricated monolithically on-chip using Sandia’s Ultraplanar Multilevel MEMS Technology (SUMMiT™ where an electrostatic comb-drive Torsional Ratcheting Actuator (TRA drives the flat disk through a geared transmission. The paper reviews available analytical models for flow geometries similar to that of the described pump, and presents a set of experiments which depict its performance and possible failure modes. Those experiments highlight future research directions in the development of electrostatically-actuated, CMOS-compatible, surface micromachined pumps.

  18. Application of Butterfly Clos-Network in Network-on-Chip

    Directory of Open Access Journals (Sweden)

    Hui Liu

    2014-01-01

    Full Text Available This paper studied the topology of NoC (Network-on-Chip. By combining the characteristics of the Clos network and butterfly network, a new topology named BFC (Butterfly Clos-network network was proposed. This topology integrates several modules, which belongs to the same layer but different dimensions, into a new module. In the BFC network, a bidirectional link is used to complete information exchange, instead of information exchange between different layers in the original network. During the routing period, other nondestination nodes can be used as middle stages to transfer data packets to complete the routing mission. Therefore, this topology has the characteristic of multistage. Simulation analyses show that BFC inherits the rich path diversity of Clos network, and it has a better performance than butterfly network in throughput and delay in a quite congested traffic pattern.

  19. Micromachined On-Chip Dielectric Resonator Antenna Operating at 60 GHz

    KAUST Repository

    Sallam, Mai

    2015-06-01

    This paper presents a novel cylindrical Dielectric Resonator Antenna (DRA) suitable for millimeter-wave on-chip systems. The antenna was fabricated from a single high resistivity silicon wafer via micromachining technology. The new antenna was characterized using HFSS and experimentally with good agreement been found between the simulations and experiment. The proposed DRA has good radiation characteristics, where its gain and radiation efficiency are 7 dBi and 79.35%, respectively. These properties are reasonably constant over the working frequency bandwidth of the antenna. The return loss bandwidth was 2.23 GHz, which corresponds to 3.78% around 60 GHz. The antenna was primarily a broadside radiator with -15 dB cross polarization level.

  20. Router Designs for an Asynchronous Time-Division-Multiplexed Network-on-Chip

    DEFF Research Database (Denmark)

    Kasapaki, Evangelia; Sparsø, Jens; Sørensen, Rasmus Bo

    2013-01-01

    In this paper we explore the design of an asynchronous router for a time-division-multiplexed (TDM) network-on-chip (NOC) that is being developed for a multi-processor platform for hard real-time systems. TDM inherently requires a common time reference, and existing TDM-based NOC designs are either....... This adds hardware complexity and increases area and power consumption. We propose to use asynchronous routers in order to achieve a simpler, more robust and globally-asynchronous NOC, and this represents an unexplored point in the design space. The paper presents a range of alternative router designs. All...... routers have been synthesized for a 65nm CMOS technology, and the paper reports post-layout figures for area, speed and energy and compares the asynchronous designs with an existing mesochronous clocked router. The results show that an asynchronous router is 2 times smaller, marginally slower...

  1. Programming Cell Adhesion for On-Chip Sequential Boolean Logic Functions.

    Science.gov (United States)

    Qu, Xiangmeng; Wang, Shaopeng; Ge, Zhilei; Wang, Jianbang; Yao, Guangbao; Li, Jiang; Zuo, Xiaolei; Shi, Jiye; Song, Shiping; Wang, Lihua; Li, Li; Pei, Hao; Fan, Chunhai

    2017-08-02

    Programmable remodelling of cell surfaces enables high-precision regulation of cell behavior. In this work, we developed in vitro constructed DNA-based chemical reaction networks (CRNs) to program on-chip cell adhesion. We found that the RGD-functionalized DNA CRNs are entirely noninvasive when interfaced with the fluidic mosaic membrane of living cells. DNA toehold with different lengths could tunably alter the release kinetics of cells, which shows rapid release in minutes with the use of a 6-base toehold. We further demonstrated the realization of Boolean logic functions by using DNA strand displacement reactions, which include multi-input and sequential cell logic gates (AND, OR, XOR, and AND-OR). This study provides a highly generic tool for self-organization of biological systems.

  2. On-Chip High-Finesse Fabry-Perot Microcavities for Optical Sensing and Quantum Information.

    Science.gov (United States)

    Bitarafan, Mohammad H; DeCorby, Ray G

    2017-07-31

    For applications in sensing and cavity-based quantum computing and metrology, open-access Fabry-Perot cavities-with an air or vacuum gap between a pair of high reflectance mirrors-offer important advantages compared to other types of microcavities. For example, they are inherently tunable using MEMS-based actuation strategies, and they enable atomic emitters or target analytes to be located at high field regions of the optical mode. Integration of curved-mirror Fabry-Perot cavities on chips containing electronic, optoelectronic, and optomechanical elements is a topic of emerging importance. Micro-fabrication techniques can be used to create mirrors with small radius-of-curvature, which is a prerequisite for cavities to support stable, small-volume modes. We review recent progress towards chip-based implementation of such cavities, and highlight their potential to address applications in sensing and cavity quantum electrodynamics.

  3. Graphene nanoribbon field effect transistor for nanometer-size on-chip temperature sensor

    Science.gov (United States)

    Banadaki, Yaser M.; Srivastava, Ashok; Sharifi, Safura

    2016-04-01

    Graphene has been extensively investigated as a promising material for various types of high performance sensors due to its large surface-to-volume ratio, remarkably high carrier mobility, high carrier density, high thermal conductivity, extremely high mechanical strength and high signal-to-noise ratio. The power density and the corresponding die temperature can be tremendously high in scaled emerging technology designs, urging the on-chip sensing and controlling of the generated heat in nanometer dimensions. In this paper, we have explored the feasibility of a thin oxide graphene nanoribbon (GNR) as nanometer-size temperature sensor for detecting local on-chip temperature at scaled bias voltages of emerging technology. We have introduced an analytical model for GNR FET for 22nm technology node, which incorporates both thermionic emission of high-energy carriers and band-to-band-tunneling (BTBT) of carriers from drain to channel regions together with different scattering mechanisms due to intrinsic acoustic phonons and optical phonons and line-edge roughness in narrow GNRs. The temperature coefficient of resistivity (TCR) of GNR FET-based temperature sensor shows approximately an order of magnitude higher TCR than large-area graphene FET temperature sensor by accurately choosing of GNR width and bias condition for a temperature set point. At gate bias VGS = 0.55 V, TCR maximizes at room temperature to 2.1×10-2 /K, which is also independent of GNR width, allowing the design of width-free GNR FET for room temperature sensing applications.

  4. Advanced Nanofabrication Process Development for Self-Powered System-on-Chip

    KAUST Repository

    Rojas, Jhonathan Prieto

    2010-11-01

    In this work the development of a Self-Powered System-On-Chip is explored by examining two components of process development in different perspectives. On one side, an energy component is approached from a biochemical standpoint where a Microbial Fuel Cell (MFC) is built with standard microfabrication techniques, displaying a novel electrode based on Carbon Nanotubes (CNTs). The fabrication process involves the formation of a micrometric chamber that hosts an enhanced CNT-based anode. Preliminary results are promising, showing a high current density (113.6mA/m2) compared with other similar cells. Nevertheless many improvements can be done to the main design and further characterization of the anode will give a more complete understanding and bring the device closer to a practical implementation. On a second point of view, nano-patterning through silicon nitride spacer width control is developed, aimed at producing alternative sub-100nm device fabrication with the potential of further scaling thanks to nanowire based structures. These nanostructures are formed from a nano-pattern template, by using a bottom-up fabrication scheme. Uniformity and scalability of the process are demonstrated and its potential described. An estimated area of 0.120μm2 for a 6T-SRAM (Static Random Access Memory) bitcell (6 devices) can be achieved. In summary, by using a novel sustainable energy component and scalable nano-patterning for logic and computing module, this work has successfully collected the essential base knowledge and joined two different elements that synergistically will contribute for the future implementation of a Self-Powered System-on-Chip.

  5. Ultra-fast quantitative imaging using ptychographic iterative engine based digital micro-mirror device

    Science.gov (United States)

    Sun, Aihui; Tian, Xiaolin; Kong, Yan; Jiang, Zhilong; Liu, Fei; Xue, Liang; Wang, Shouyu; Liu, Cheng

    2018-01-01

    As a lensfree imaging technique, ptychographic iterative engine (PIE) method can provide both quantitative sample amplitude and phase distributions avoiding aberration. However, it requires field of view (FoV) scanning often relying on mechanical translation, which not only slows down measuring speed, but also introduces mechanical errors decreasing both resolution and accuracy in retrieved information. In order to achieve high-accurate quantitative imaging with fast speed, digital micromirror device (DMD) is adopted in PIE for large FoV scanning controlled by on/off state coding by DMD. Measurements were implemented using biological samples as well as USAF resolution target, proving high resolution in quantitative imaging using the proposed system. Considering its fast and accurate imaging capability, it is believed the DMD based PIE technique provides a potential solution for medical observation and measurements.

  6. The response of silicon PNCCD sensors with aluminium on-chip filter to visible light, UV- and X-ray radiation

    Energy Technology Data Exchange (ETDEWEB)

    Granato, Stefanie

    2012-10-18

    There are various scientific applications, from astronomical observations to free electron lasers, that make use of X-ray semiconductor detectors like PNCCDs. The PNCCD is a pixelized semiconductor detector for simultaneous X-ray imaging and spectroscopy. For the seven PNCCD cameras of the eROSITA space telescope, a radiation entrance window including an on-chip optical blocking filter has been designed. The blocking filter is a necessity to minimize electron generation by visible light and UV radiation affecting X-ray spectroscopy. A PNCCD with such a blocking filter has not been used so far in astronomy. The following work deals with the analysis of the response of PNCCDs with on-chip filter. This includes the study of photon absorption and emission processes as well as the transport of electrons inside the detector entrance window. Furthermore it comprises the experimental characterization of the detector properties regarding the attenuation of light as well as their X-ray spectral redistribution function and quantum efficiency. With the ability to reveal the involved physical processes, the PNCCD is subject of analysis and measurement device at the same time. In addition to the results of the measurements, simulations of the solid state physics inside the detector are presented. A Geant4 Monte-Carlo code is extended by the treatment of charge loss in the entrance window and is verified by comparison with experimental data. Reproducing the chain of processes from photon absorption to charge collection, this work provides a detailed understanding of the formation of PNCCD spectra. The spectral features observed in the measurements are attributed to their point of origin inside the detector volume and explained by the model. The findings of this work allow high precision analysis of spectra of silicon detectors, e.g. of the eROSITA data, based on the presented detailed spectral response model.

  7. The response of silicon PNCCD sensors with aluminium on-chip filter to visible light, UV- and X-ray radiation

    International Nuclear Information System (INIS)

    Granato, Stefanie

    2012-01-01

    There are various scientific applications, from astronomical observations to free electron lasers, that make use of X-ray semiconductor detectors like PNCCDs. The PNCCD is a pixelized semiconductor detector for simultaneous X-ray imaging and spectroscopy. For the seven PNCCD cameras of the eROSITA space telescope, a radiation entrance window including an on-chip optical blocking filter has been designed. The blocking filter is a necessity to minimize electron generation by visible light and UV radiation affecting X-ray spectroscopy. A PNCCD with such a blocking filter has not been used so far in astronomy. The following work deals with the analysis of the response of PNCCDs with on-chip filter. This includes the study of photon absorption and emission processes as well as the transport of electrons inside the detector entrance window. Furthermore it comprises the experimental characterization of the detector properties regarding the attenuation of light as well as their X-ray spectral redistribution function and quantum efficiency. With the ability to reveal the involved physical processes, the PNCCD is subject of analysis and measurement device at the same time. In addition to the results of the measurements, simulations of the solid state physics inside the detector are presented. A Geant4 Monte-Carlo code is extended by the treatment of charge loss in the entrance window and is verified by comparison with experimental data. Reproducing the chain of processes from photon absorption to charge collection, this work provides a detailed understanding of the formation of PNCCD spectra. The spectral features observed in the measurements are attributed to their point of origin inside the detector volume and explained by the model. The findings of this work allow high precision analysis of spectra of silicon detectors, e.g. of the eROSITA data, based on the presented detailed spectral response model.

  8. A 3Gb/s/ch Transceiver for 10-mm Uninterrupted RC-Limited Global On-Chip Interconnects

    NARCIS (Netherlands)

    Schinkel, Daniel; Mensink, E.; Klumperink, Eric A.M.; van Tuijl, Adrianus Johannes Maria; Nauta, Bram

    2006-01-01

    Abstract—Global on-chip data communication is becoming a concern as the gap between transistor speed and interconnect bandwidth increases with CMOS process scaling. Repeaters can partly bridge this gap, but the classical repeater insertion approach requires a large number of repeaters while the

  9. On-chip active gate bias circuit for MMIC amplifier applications with 100% threshold voltage variation compensation

    NARCIS (Netherlands)

    Hek, A.P. de; Busking, E.B.

    2006-01-01

    In this paper the design and performance of an on-chip active gate bias circuit for application in MMIC amplifiers, which gives 100% compensation for threshold variation and at the same time is insensitive to supply voltage variations, is discussed. Design equations have been given. In addition, the

  10. On-chip microreactor system for the production of nano-emulsion loaded liposomes: towards targeted delivery of lipophilic drugs

    NARCIS (Netherlands)

    Langelaan, M.L.P.; Emmelkamp, J.; Segers, M.J.A.; Lenting, H.B.M.

    2011-01-01

    An on-chip microreactor system for the production of novel nano-biodevices is presented. This nano-biodevice consists of a nano-emulsion loaded with lipophilic drugs, entrapped in liposomes. These nano-biodevices can be equipped with targeting molecules for higher drug efficiency. The microreactor

  11. On-chip patch antenna on InP substrate for short-range wireless communication at 140 GHz

    DEFF Research Database (Denmark)

    Dong, Yunfeng; Johansen, Tom Keinicke; Zhurbenko, Vitaliy

    2017-01-01

    This paper presents the design of an on-chip patch antenna on indium phosphide (InP) substrate for short-range wireless communication at 140 GHz. The antenna shows a simulated gain of 5.3 dBi with 23% bandwidth at 140 GHz and it can be used for either direct chip-to-chip communication or chip...

  12. Fiber free plug and play on-chip scattering cytometer module – for implementation in microfluidic point of care devices

    DEFF Research Database (Denmark)

    Jensen, Thomas Glasdam; Kutter, Jörg Peter

    2010-01-01

    In this paper, we report on recent progress toward the development of a plug and play on-chip cytometer based on light scattering. By developing a device that does not depend on the critical alignment and cumbersome handling of fragile optical fibers, we approach a device that is suitable for non...

  13. Gain enhancement of low profile on-chip dipole antenna via Artificial Magnetic Conductor at 94 GHz

    KAUST Repository

    Nafe, Mahmoud; Syed, Ahad; Shamim, Atif

    2015-01-01

    The bottleneck for realizing high efficiency System-on-Chip is integrating the antenna on the lossy silicon substrate. To shield the antenna from the silicon, a ground plane can be used. However, the ultra-thin oxide does not provide enough

  14. On-chip two-mode division multiplexing using tapered directional coupler-based mode multiplexer and demultiplexer

    DEFF Research Database (Denmark)

    Ding, Yunhong; Xu, Jing; Da Ros, Francesco

    2013-01-01

    ), and large fabrication tolerance (20 nm) are measured. An on-chip mode multiplexing experiment is carried out on the fabricated circuit with non return-to-zero (NRZ) on-off keying (OOK) signals at 40 Gbit/s. The experimental results show clear eye diagrams and moderate power penalty for both TE0 and TE1...

  15. On-chip Detection of Rolling Circle Amplified DNA Molecules from Bacillus Globigii spores and Vibrio Cholerae

    DEFF Research Database (Denmark)

    Østerberg, Frederik Westergaard; Rizzi, Giovanni; Donolato, Marco

    2014-01-01

    For the first time DNA coils formed by rolling circle amplification are quantified on-chip by Brownian relaxation measurements on magnetic nanobeads using a magnetoresistive sensor. No external magnetic fields are required besides the magnetic field arising from the current through the sensor...

  16. On-Chip Scan-Based Test Strategy for a Dependable Many-Core Processor Using a NoC as a Test Access Mechanism

    NARCIS (Netherlands)

    Zhang, X.; Kerkhoff, Hans G.; Vermeulen, Bart

    2010-01-01

    Periodic on-chip scan-based tests have to be applied to a many-core processor SoC to improve its dependability. An infrastructural IP module has been designed and incorporated into the SoC to function as an ATE. This paper introduces the reuse of a Network-on-Chip as a test access mechanism. Since

  17. Mimicking the Kidney: A Key Role in Organ-on-Chip Development

    Directory of Open Access Journals (Sweden)

    Roberto Paoli

    2016-07-01

    Full Text Available Pharmaceutical drug screening and research into diseases call for significant improvement in the effectiveness of current in vitro models. Better models would reduce the likelihood of costly failures at later drug development stages, while limiting or possibly even avoiding the use of animal models. In this regard, promising advances have recently been made by the so-called “organ-on-chip” (OOC technology. By combining cell culture with microfluidics, biomedical researchers have started to develop microengineered models of the functional units of human organs. With the capacity to mimic physiological microenvironments and vascular perfusion, OOC devices allow the reproduction of tissue- and organ-level functions. When considering drug testing, nephrotoxicity is a major cause of attrition during pre-clinical, clinical, and post-approval stages. Renal toxicity accounts for 19% of total dropouts during phase III drug evaluation—more than half the drugs abandoned because of safety concerns. Mimicking the functional unit of the kidney, namely the nephron, is therefore a crucial objective. Here we provide an extensive review of the studies focused on the development of a nephron-on-chip device.

  18. A new ATLAS muon CSC readout system with system on chip technology on ATCA platform

    Science.gov (United States)

    Claus, R.; ATLAS Collaboration

    2016-07-01

    The ATLAS muon Cathode Strip Chamber (CSC) back-end readout system has been upgraded during the LHC 2013-2015 shutdown to be able to handle the higher Level-1 trigger rate of 100 kHz and the higher occupancy at Run 2 luminosity. The readout design is based on the Reconfiguration Cluster Element (RCE) concept for high bandwidth generic DAQ implemented on the ATCA platform. The RCE design is based on the new System on Chip Xilinx Zynq series with a processor-centric architecture with ARM processor embedded in FPGA fabric and high speed I/O resources together with auxiliary memories to form a versatile DAQ building block that can host applications tapping into both software and firmware resources. The Cluster on Board (COB) ATCA carrier hosts RCE mezzanines and an embedded Fulcrum network switch to form an online DAQ processing cluster. More compact firmware solutions on the Zynq for G-link, S-link and TTC allowed the full system of 320 G-links from the 32 chambers to be processed by 6 COBs in one ATCA shelf through software waveform feature extraction to output 32 S-links. The full system was installed in Sept. 2014. We will present the RCE/COB design concept, the firmware and software processing architecture, and the experience from the intense commissioning towards LHC Run 2.

  19. A new ATLAS muon CSC readout system with system on chip technology on ATCA platform

    International Nuclear Information System (INIS)

    Claus, R.

    2016-01-01

    The ATLAS muon Cathode Strip Chamber (CSC) back-end readout system has been upgraded during the LHC 2013–2015 shutdown to be able to handle the higher Level-1 trigger rate of 100 kHz and the higher occupancy at Run 2 luminosity. The readout design is based on the Reconfiguration Cluster Element (RCE) concept for high bandwidth generic DAQ implemented on the ATCA platform. The RCE design is based on the new System on Chip Xilinx Zynq series with a processor-centric architecture with ARM processor embedded in FPGA fabric and high speed I/O resources together with auxiliary memories to form a versatile DAQ building block that can host applications tapping into both software and firmware resources. The Cluster on Board (COB) ATCA carrier hosts RCE mezzanines and an embedded Fulcrum network switch to form an online DAQ processing cluster. More compact firmware solutions on the Zynq for G-link, S-link and TTC allowed the full system of 320 G-links from the 32 chambers to be processed by 6 COBs in one ATCA shelf through software waveform feature extraction to output 32 S-links. The full system was installed in Sept. 2014. We will present the RCE/COB design concept, the firmware and software processing architecture, and the experience from the intense commissioning towards LHC Run 2.

  20. A new ATLAS muon CSC readout system with system on chip technology on ATCA platform

    Science.gov (United States)

    Bartoldus, R.; Claus, R.; Garelli, N.; Herbst, R. T.; Huffer, M.; Iakovidis, G.; Iordanidou, K.; Kwan, K.; Kocian, M.; Lankford, A. J.; Moschovakos, P.; Nelson, A.; Ntekas, K.; Ruckman, L.; Russell, J.; Schernau, M.; Schlenker, S.; Su, D.; Valderanis, C.; Wittgen, M.; Yildiz, S. C.

    2016-01-01

    The ATLAS muon Cathode Strip Chamber (CSC) backend readout system has been upgraded during the LHC 2013-2015 shutdown to be able to handle the higher Level-1 trigger rate of 100 kHz and the higher occupancy at Run-2 luminosity. The readout design is based on the Reconfigurable Cluster Element (RCE) concept for high bandwidth generic DAQ implemented on the Advanced Telecommunication Computing Architecture (ATCA) platform. The RCE design is based on the new System on Chip XILINX ZYNQ series with a processor-centric architecture with ARM processor embedded in FPGA fabric and high speed I/O resources. Together with auxiliary memories, all these components form a versatile DAQ building block that can host applications tapping into both software and firmware resources. The Cluster on Board (COB) ATCA carrier hosts RCE mezzanines and an embedded Fulcrum network switch to form an online DAQ processing cluster. More compact firmware solutions on the ZYNQ for high speed input and output fiberoptic links and TTC allowed the full system of 320 input links from the 32 chambers to be processed by 6 COBs in one ATCA shelf. The full system was installed in September 2014. We will present the RCE/COB design concept, the firmware and software processing architecture, and the experience from the intense commissioning for LHC Run 2.

  1. A new ATLAS muon CSC readout system with system on chip technology on ATCA platform

    International Nuclear Information System (INIS)

    Bartoldus, R.; Claus, R.; Garelli, N.; Herbst, R.T.; Huffer, M.; Kocian, M.; Ruckman, L.; Russell, J.; Su, D.; Wittgen, M.; Iakovidis, G.; Iordanidou, K.; Moschovakos, P.; Ntekas, K.; Kwan, K.; Lankford, A.J.; Nelson, A.; Schernau, M.; Schlenker, S.; Valderanis, C.

    2016-01-01

    The ATLAS muon Cathode Strip Chamber (CSC) backend readout system has been upgraded during the LHC 2013-2015 shutdown to be able to handle the higher Level-1 trigger rate of 100 kHz and the higher occupancy at Run-2 luminosity. The readout design is based on the Reconfigurable Cluster Element (RCE) concept for high bandwidth generic DAQ implemented on the Advanced Telecommunication Computing Architecture (ATCA) platform. The RCE design is based on the new System on Chip XILINX ZYNQ series with a processor-centric architecture with ARM processor embedded in FPGA fabric and high speed I/O resources. Together with auxiliary memories, all these components form a versatile DAQ building block that can host applications tapping into both software and firmware resources. The Cluster on Board (COB) ATCA carrier hosts RCE mezzanines and an embedded Fulcrum network switch to form an online DAQ processing cluster. More compact firmware solutions on the ZYNQ for high speed input and output fiberoptic links and TTC allowed the full system of 320 input links from the 32 chambers to be processed by 6 COBs in one ATCA shelf. The full system was installed in September 2014. We will present the RCE/COB design concept, the firmware and software processing architecture, and the experience from the intense commissioning for LHC Run 2

  2. System on chip thermal vacuum sensor based on standard CMOS process

    International Nuclear Information System (INIS)

    Li Jinfeng; Tang Zhenan; Wang Jiaqi

    2009-01-01

    An on-chip microelectromechanical system was fabricated in a 0.5 μm standard CMOS process for gas pressure detection. The sensor was based on a micro-hotplate (MHP) and had been integrated with a rail to rail operational amplifier and an 8-bit successive approximation register (SAR) A/D converter. A tungsten resistor was manufactured on the MHP as the sensing element, and the sacrificial layer of the sensor was made from polysilicon and etched by surface-micromachining technology. The operational amplifier was configured to make the sensor operate in constant current mode. A digital bit stream was provided as the system output. The measurement results demonstrate that the gas pressure sensitive range of the vacuum sensor extends from 1 to 10 5 Pa. In the gas pressure range from 1 to 100 Pa, the sensitivity of the sensor is 0.23 mV/ Pa, the linearity is 4.95%, and the hysteresis is 8.69%. The operational amplifier can drive 200 ω resistors distortionlessly, and the SAR A/D converter achieves a resolution of 7.4 bit with 100 kHz sample rate. The performance of the operational amplifier and the SAR A/D converter meets the requirements of the sensor system.

  3. Electrical lysis: dynamics revisited and advances in On-chip operation.

    Science.gov (United States)

    Morshed, Bashir; Shams, Maitham; Mussivand, Tofy

    2013-01-01

    Electrical lysis (EL) is the process of breaking the cell membrane to expose the internal contents under an applied high electric field. Lysis is an important phenomenon for cellular analysis, medical treatment, and biofouling control. This paper aims to review, summarize, and analyze recent advancements on EL. Major databases including PubMed, Ei Engineering Village, IEEE Xplore, and Scholars Portal were searched using relevant keywords. More than 50 articles published in English since 1997 are cited in this article. EL has several key advantages compared to other lysis techniques such as chemical, mechanical, sonication, or laser, including rapid speed of operation, ability to control, miniaturization, low cost, and low power requirement. A variety of cell types have been investigated for including protoplasts, E. coli, yeasts, blood cells, and cancer cells. EL has been developed and applied for decontamination, cytology, genetics, single-cell analysis, cancer treatment, and other applications. On-chip EL is a promising technology for multiplexed automated implementation of cell-sample preparation and processing with micro- or nanoliter reagents.

  4. On-Chip Fluorescence Switching System for Constructing a Rewritable Random Access Data Storage Device.

    Science.gov (United States)

    Nguyen, Hoang Hiep; Park, Jeho; Hwang, Seungwoo; Kwon, Oh Seok; Lee, Chang-Soo; Shin, Yong-Beom; Ha, Tai Hwan; Kim, Moonil

    2018-01-10

    We report the development of on-chip fluorescence switching system based on DNA strand displacement and DNA hybridization for the construction of a rewritable and randomly accessible data storage device. In this study, the feasibility and potential effectiveness of our proposed system was evaluated with a series of wet experiments involving 40 bits (5 bytes) of data encoding a 5-charactered text (KRIBB). Also, a flexible data rewriting function was achieved by converting fluorescence signals between "ON" and "OFF" through DNA strand displacement and hybridization events. In addition, the proposed system was successfully validated on a microfluidic chip which could further facilitate the encoding and decoding process of data. To the best of our knowledge, this is the first report on the use of DNA hybridization and DNA strand displacement in the field of data storage devices. Taken together, our results demonstrated that DNA-based fluorescence switching could be applicable to construct a rewritable and randomly accessible data storage device through controllable DNA manipulations.

  5. Decoding Network Structure in On-Chip Integrated Flow Cells with Synchronization of Electrochemical Oscillators

    Science.gov (United States)

    Jia, Yanxin; Kiss, István Z.

    2017-04-01

    The analysis of network interactions among dynamical units and the impact of the coupling on self-organized structures is a challenging task with implications in many biological and engineered systems. We explore the coupling topology that arises through the potential drops in a flow channel in a lab-on-chip device that accommodates chemical reactions on electrode arrays. The networks are revealed by analysis of the synchronization patterns with the use of an oscillatory chemical reaction (nickel electrodissolution) and are further confirmed by direct decoding using phase model analysis. In dual electrode configuration, a variety coupling schemes, (uni- or bidirectional positive or negative) were identified depending on the relative placement of the reference and counter electrodes (e.g., placed at the same or the opposite ends of the flow channel). With three electrodes, the network consists of a superposition of a localized (upstream) and global (all-to-all) coupling. With six electrodes, the unique, position dependent coupling topology resulted spatially organized partial synchronization such that there was a synchrony gradient along the quasi-one-dimensional spatial coordinate. The networked, electrode potential (current) spike generating electrochemical reactions hold potential for construction of an in-situ information processing unit to be used in electrochemical devices in sensors and batteries.

  6. Systems-on-chip approach for real-time simulation of wheel-rail contact laws

    Science.gov (United States)

    Mei, T. X.; Zhou, Y. J.

    2013-04-01

    This paper presents the development of a systems-on-chip approach to speed up the simulation of wheel-rail contact laws, which can be used to reduce the requirement for high-performance computers and enable simulation in real time for the use of hardware-in-loop for experimental studies of the latest vehicle dynamic and control technologies. The wheel-rail contact laws are implemented using a field programmable gate array (FPGA) device with a design that substantially outperforms modern general-purpose PC platforms or fixed architecture digital signal processor devices in terms of processing time, configuration flexibility and cost. In order to utilise the FPGA's parallel-processing capability, the operations in the contact laws algorithms are arranged in a parallel manner and multi-contact patches are tackled simultaneously in the design. The interface between the FPGA device and the host PC is achieved by using a high-throughput and low-latency Ethernet link. The development is based on FASTSIM algorithms, although the design can be adapted and expanded for even more computationally demanding tasks.

  7. Area and Power Modeling for Networks-on-Chip with Layout Awareness

    Directory of Open Access Journals (Sweden)

    Paolo Meloni

    2007-01-01

    Full Text Available Networks-on-Chip (NoCs are emerging as scalable interconnection architectures, designed to support the increasing amount of cores that are integrated onto a silicon die. Compared to traditional interconnects, however, NoCs still lack well established CAD deployment tools to tackle the large amount of available degrees of freedom, starting from the choice of a network topology. “Silicon-aware” optimization tools are now emerging in literature; they select an NoC topology taking into account the tradeoff between performance and hardware cost, that is, area and power consumption. A key requirement for the effectiveness of these tools, however, is the availability of accurate analytical models for power and area. Such models are unfortunately not as available and well understood as those for traditional communication fabrics. Further, simplistic models may turn out to be totally inaccurate when applied to wire dominated architectures; this observation demands at least for a model validation step against placed and routed devices. In this work, given an NoC reference architecture, we present a flow to devise analytical models of area occupation and power consumption of NoC switches, and propose strategies for coefficient characterization which have different tradeoffs in terms of accuracy and of modeling activity effort. The models are parameterized on several architectural, synthesis-related, and traffic variables, resulting in maximum flexibility. We finally assess the accuracy of the models, checking whether they can also be applied to placed and routed NoC blocks.

  8. Optical biosensor based on a silicon nanowire ridge waveguide for lab on chip applications

    International Nuclear Information System (INIS)

    Gamal, Rania; Ismail, Yehea; Swillam, Mohamed A

    2015-01-01

    We propose a novel sensor using a silicon nanowire ridge waveguide (SNRW). This waveguide is comprised of an array of silicon nanowires on an insulator substrate that has the envelope of a ridge waveguide. The SNRW inherently maximizes the overlap between the material-under-test and the incident light wave by introducing voids to the otherwise bulk structure. When a sensing sample is injected, the voids within the SNRW adopt the refractive index of the material-under-test. Hence, the strong contribution of the material-under-test to the overall modal effective index will greatly augment the sensitivity. Additionally, the ridge structure provides a fabrication convenience as it covers the entire substrate, ensuring that the etching process would not damage the substrate. Finite-difference time-domain simulations are conducted and showed that the percentage change in the effective index due to a 1% change in the surrounding environment is more than 170 times the change perceived in an evanescent-detection based bulk silicon ridge waveguide. Moreover, the SNRW proves to be more sensitive than recent other, non-evanescent sensors. In addition, the detection limit for this structure was revealed to be as small as 10 −8 . A compact bimodal waveguide based on SNRW is designed and tested. It delivers high sensitivity values that offer comparable performance to similar low-index light-guiding sensing configurations; however, our proposed structure has much smaller footprints and allows high dense integration for lab-on-chip applications. (paper)

  9. Integration of systems biology with organs-on-chips to humanize therapeutic development

    Science.gov (United States)

    Edington, Collin D.; Cirit, Murat; Chen, Wen Li Kelly; Clark, Amanda M.; Wells, Alan; Trumper, David L.; Griffith, Linda G.

    2017-02-01

    "Mice are not little people" - a refrain becoming louder as the gaps between animal models and human disease become more apparent. At the same time, three emerging approaches are headed toward integration: powerful systems biology analysis of cell-cell and intracellular signaling networks in patient-derived samples; 3D tissue engineered models of human organ systems, often made from stem cells; and micro-fluidic and meso-fluidic devices that enable living systems to be sustained, perturbed and analyzed for weeks in culture. Integration of these rapidly moving fields has the potential to revolutionize development of therapeutics for complex, chronic diseases, including those that have weak genetic bases and substantial contributions from gene-environment interactions. Technical challenges in modeling complex diseases with "organs on chips" approaches include the need for relatively large tissue masses and organ-organ cross talk to capture systemic effects, such that current microfluidic formats often fail to capture the required scale and complexity for interconnected systems. These constraints drive development of new strategies for designing in vitro models, including perfusing organ models, as well as "mesofluidic" pumping and circulation in platforms connecting several organ systems, to achieve the appropriate physiological relevance.

  10. Gradient-free determination of isoelectric points of proteins on chip.

    Science.gov (United States)

    Łapińska, Urszula; Saar, Kadi L; Yates, Emma V; Herling, Therese W; Müller, Thomas; Challa, Pavan K; Dobson, Christopher M; Knowles, Tuomas P J

    2017-08-30

    The isoelectric point (pI) of a protein is a key characteristic that influences its overall electrostatic behaviour. The majority of conventional methods for the determination of the isoelectric point of a molecule rely on the use of spatial gradients in pH, although significant practical challenges are associated with such techniques, notably the difficulty in generating a stable and well controlled pH gradient. Here, we introduce a gradient-free approach, exploiting a microfluidic platform which allows us to perform rapid pH change on chip and probe the electrophoretic mobility of species in a controlled field. In particular, in this approach, the pH of the electrolyte solution is modulated in time rather than in space, as in the case for conventional determinations of the isoelectric point. To demonstrate the general approachability of this platform, we have measured the isoelectric points of representative set of seven proteins, bovine serum albumin, β-lactoglobulin, ribonuclease A, ovalbumin, human transferrin, ubiquitin and myoglobin in microlitre sample volumes. The ability to conduct measurements in free solution thus provides the basis for the rapid determination of isoelectric points of proteins under a wide variety of solution conditions and in small volumes.

  11. Determination of aminoglycoside antibiotics using an on-chip microfluidic device with chemiluminescence detection

    International Nuclear Information System (INIS)

    Sierra-Rodero, M.; Fernandez-Romero, J.M.; Gomez-Hens, A.

    2012-01-01

    We describe an on-chip microflow injection (μFI) approach for the determination of aminoglycoside antibiotics using chemiluminescence (CL) detection. The method is based on the inhibition of the Cu(II)-catalyzed CL reaction of luminol and hydrogen peroxide by the aminoglycosides due to the formation of a complex between the antibiotic and Cu(II). The main features of the method include small sample volumes and a fast response. Syringe pumps were used to insert the sample and the reagents into the microfluidic device. CL was collected using a fiber optic bundle connected to a luminescence detector. All instrumental, hydrodynamic and chemical variables involved in the system were optimized using neomycin as the aminoglycoside model. Inhibition is proportional to the concentration of the antibiotics. The dynamic ranges of the calibration graphs obtained for neomycin, streptomycin and amikacin are 0.3-3.3, 0.9-13.7, and 0.8-8.5 μmol L -1 , and the detection limits are 0.09, 0.28 and 0.24 μmol L -1 , respectively. The precision of the methods, expressed as relative standard deviation, is in the range from 0.8 to 5.0 %. The method was successfully applied to the determination of neomycin in water samples, with recoveries ranging from 80 to 120 %. (author)

  12. A High-Throughput, High-Accuracy System-Level Simulation Framework for System on Chips

    Directory of Open Access Journals (Sweden)

    Guanyi Sun

    2011-01-01

    Full Text Available Today's System-on-Chips (SoCs design is extremely challenging because it involves complicated design tradeoffs and heterogeneous design expertise. To explore the large solution space, system architects have to rely on system-level simulators to identify an optimized SoC architecture. In this paper, we propose a system-level simulation framework, System Performance Simulation Implementation Mechanism, or SPSIM. Based on SystemC TLM2.0, the framework consists of an executable SoC model, a simulation tool chain, and a modeling methodology. Compared with the large body of existing research in this area, this work is aimed at delivering a high simulation throughput and, at the same time, guaranteeing a high accuracy on real industrial applications. Integrating the leading TLM techniques, our simulator can attain a simulation speed that is not slower than that of the hardware execution by a factor of 35 on a set of real-world applications. SPSIM incorporates effective timing models, which can achieve a high accuracy after hardware-based calibration. Experimental results on a set of mobile applications proved that the difference between the simulated and measured results of timing performance is within 10%, which in the past can only be attained by cycle-accurate models.

  13. New movable plate for efficient millimeter wave vertical on-chip antenna

    KAUST Repository

    Marnat, Loic; Carreno, Armando Arpys Arevalo; Conchouso Gonzalez, David; Galicia Martinez, Miguel Angel; Foulds, Ian G.; Shamim, Atif

    2013-01-01

    A new movable plate concept is presented in this paper to realize mm-wave vertical on-chip antennas through MEMS based post-processing steps in a CMOS compatible process. By virtue of its vertical position, the antenna is isolated from the lossy Si substrate and hence performs with a better efficiency as compared to the horizontal position. In addition, the movable plate concept enables polarization diversity by providing both horizontal and vertical polarizations on the same chip. Through a first iteration fractal bowtie antenna design, dual band (60 and 77 GHz) operation is demonstrated in both horizontal and vertical positions without any change in dimensions or use of switches for two different mediums (Si and air). To support the movable plate concept, the transmission line and antenna are designed on a flexible polyamide, where the former has been optimized to operate in the bent position. The design is highly suitable for compact, low cost and efficient SoC solutions. © 1963-2012 IEEE.

  14. A New ATLAS Muon CSC Readout System with System on Chip Technology on ATCA Platform

    CERN Document Server

    AUTHOR|(SzGeCERN)696050; Garelli, N.; Herbst, R.T.; Huffer, M.; Iakovidis, G.; Iordanidou, K.; Kwan, K.; Kocian, M.; Lankford, A.J.; Moschovakos, P.; Nelson, A.; Ntekas, K.; Ruckman, L.; Russell, J.; Schernau, M.; Schlenker, S.; Su, D.; Valderanis, C.; Wittgen, M.; Bartoldus, R.

    2016-01-01

    The ATLAS muon Cathode Strip Chamber (CSC) backend readout system has been upgraded during the LHC 2013-2015 shutdown to be able to handle the higher Level-1 trigger rate of 100 kHz and the higher occupancy at Run 2 luminosity. The readout design is based on the Reconfigurable Cluster Element (RCE) concept for high bandwidth generic DAQ implemented on the Advanced Telecommunication Computing Architecture (ATCA) platform. The RCE design is based on the new System on Chip XILINX ZYNQ series with a processor-centric architecture with ARM processor embedded in FPGA fabric and high speed I/O resources together with auxiliary memories to form a versatile DAQ building block that can host applications tapping into both software and firmware resources. The Cluster on Board (COB) ATCA carrier hosts RCE mezzanines and an embedded Fulcrum network switch to form an online DAQ processing cluster. More compact firmware solutions on the ZYNQ for G-link, S-link and TTC allowed the full system of 320 G-links from the 32 chambe...

  15. A new ATLAS muon CSC readout system with system on chip technology on ATCA platform

    Energy Technology Data Exchange (ETDEWEB)

    Claus, R., E-mail: claus@slac.stanford.edu

    2016-07-11

    The ATLAS muon Cathode Strip Chamber (CSC) back-end readout system has been upgraded during the LHC 2013–2015 shutdown to be able to handle the higher Level-1 trigger rate of 100 kHz and the higher occupancy at Run 2 luminosity. The readout design is based on the Reconfiguration Cluster Element (RCE) concept for high bandwidth generic DAQ implemented on the ATCA platform. The RCE design is based on the new System on Chip Xilinx Zynq series with a processor-centric architecture with ARM processor embedded in FPGA fabric and high speed I/O resources together with auxiliary memories to form a versatile DAQ building block that can host applications tapping into both software and firmware resources. The Cluster on Board (COB) ATCA carrier hosts RCE mezzanines and an embedded Fulcrum network switch to form an online DAQ processing cluster. More compact firmware solutions on the Zynq for G-link, S-link and TTC allowed the full system of 320 G-links from the 32 chambers to be processed by 6 COBs in one ATCA shelf through software waveform feature extraction to output 32 S-links. The full system was installed in Sept. 2014. We will present the RCE/COB design concept, the firmware and software processing architecture, and the experience from the intense commissioning towards LHC Run 2.

  16. A New ATLAS Muon CSC Readout System with System on Chip Technology on ATCA Platform

    CERN Document Server

    ATLAS CSC Collaboration; The ATLAS collaboration

    2016-01-01

    The ATLAS muon Cathode Strip Chamber (CSC) backend readout system has been upgrade during the LHC 2013-2015 shutdown to be able to handle the higher Level-1 trigger rate of 100 kHz and the higher occupancy at Run 2 luminosity. The readout design is based on the Reconfigurable Cluster Element (RCE) concept for high bandwidth generic DAQ implemented on the Advanced Telecommunication Computing Architecture (ATCA) platform. The RCE design is based on the new System on Chip XILINX ZYNQ series with a processor-centric architecture with ARM processor embedded in FPGA fabric and high speed I/O resources together with auxiliary memories to form a versatile DAQ building block that can host applications tapping into both software and firmware resources. The Cluster on Board (COB) ATCA carrier hosts RCE mezzanines and an embedded Fulcrum network switch to form an online DAQ processing cluster. More compact firmware solutions on the ZYNQ for G-link, S-link and TTC allowed the full system of 320 G-links from the 32 chamber...

  17. A New ATLAS Muon CSC Readout System with System on Chip Technology on ATCA Platform

    CERN Document Server

    AUTHOR|(SzGeCERN)664042

    2016-01-01

    The ATLAS muon Cathode Strip Chamber (CSC) back-end readout system has been upgraded during the LHC 2013-2015 shutdown to be able to handle the higher Level-1 trigger rate of 100 kHz and the higher occupancy at Run 2 luminosity. The readout design is based on the Reconfiguration Cluster Element (RCE) concept for high bandwidth generic DAQ implemented on the ATCA platform. The RCE design is based on the new System on Chip Xilinx Zynq series with a processor-centric architecture with ARM processor embedded in FPGA fabric and high speed I/O resources together with auxiliary memories to form a versatile DAQ building block that can host applications tapping into both software and firmware resources. The Cluster on Board (COB) ATCA carrier hosts RCE mezzanines and an embedded Fulcrum network switch to form an online DAQ processing cluster. More compact firmware solutions on the Zynq for G-link, S-link and TTC allowed the full system of 320 G-links from the 32 chambers to be processed by 6 COBs in one ATCA shelf thr...

  18. A New ATLAS Muon CSC Readout System with System on Chip Technology on ATCA Platform

    CERN Document Server

    Claus, Richard; The ATLAS collaboration

    2015-01-01

    The ATLAS muon Cathode Strip Chamber (CSC) backend readout system has been upgraded during the LHC 2013-2015 shutdown to be able to handle the higher Level-1 trigger rate of 100 kHz and the higher occupancy at Run 2 luminosity. The readout design is based on the Reconfiguration Cluster Element (RCE) concept for high bandwidth generic DAQ implemented on the ATCA platform. The RCE design is based on the new System on Chip XILINX ZYNQ series with a processor-centric architecture with ARM processor embedded in FPGA fabric and high speed I/O resources together with auxiliary memories to form a versatile DAQ building block that can host applications tapping into both software and firmware resources. The Cluster on Board (COB) ATCA carrier hosts RCE mezzanines and an embedded Fulcrum network switch to form an online DAQ processing cluster. More compact firmware solutions on the ZYNQ for G-link, S-link and TTC allowed the full system of 320 G-links from the 32 chambers to be processed by 6 COBs in one ATCA shelf thro...

  19. On-chip magnetic bead-based DNA melting curve analysis using a magnetoresistive sensor

    International Nuclear Information System (INIS)

    Rizzi, Giovanni; Østerberg, Frederik W.; Henriksen, Anders D.; Dufva, Martin; Hansen, Mikkel F.

    2015-01-01

    We present real-time measurements of DNA melting curves in a chip-based system that detects the amount of surface-bound magnetic beads using magnetoresistive magnetic field sensors. The sensors detect the difference between the amount of beads bound to the top and bottom sensor branches of the differential sensor geometry. The sensor surfaces are functionalized with wild type (WT) and mutant type (MT) capture probes, differing by a single base insertion (a single nucleotide polymorphism, SNP). Complementary biotinylated targets in suspension couple streptavidin magnetic beads to the sensor surface. The beads are magnetized by the field arising from the bias current passed through the sensors. We demonstrate the first on-chip measurements of the melting of DNA hybrids upon a ramping of the temperature. This overcomes the limitation of using a single washing condition at constant temperature. Moreover, we demonstrate that a single sensor bridge can be used to genotype a SNP. - Highlights: • We apply magnetoresistive sensors to study solid-surface hybridization kinetics of DNA. • We measure DNA melting profiles for perfectly matching DNA duplexes and for a single base mismatch. • We present a procedure to correct for temperature dependencies of the sensor output. • We reliably extract melting temperatures for the DNA hybrids. • We demonstrate direct measurement of differential binding signal for two probes on a single sensor

  20. Introduction to Open Core Protocol Fastpath to System-on-Chip Design

    CERN Document Server

    Schwaderer, W David

    2012-01-01

    This book introduces Open Core Protocol (OCP), not as a conventional hardware communications protocol but as a meta-protocol: a means for describing and capturing the communications requirements of an IP core, and mapping them to a specific set of signals with known semantics.  Readers will learn the capabilities of OCP as a semiconductor hardware interface specification that allows different System-On-Chip (SoC) cores to communicate.  The OCP methodology presented enables intellectual property designers to design core interfaces in standard ways. This facilitates reusing OCP-compliant cores across multiple SoC designs which, in turn, drastically reduces design times, support costs, and overall cost for electronics/SoCs. Provides a comprehensive introduction to Open Core Protocol, which is more accessible than the full specification; Designed as a hands-on, how-to guide to semiconductor design; Includes numerous, real “usage examples” which are not available in the full specification; Integrates coverag...

  1. A new equivalent circuit model for on-chip spiral transformers in CMOS RFICs

    International Nuclear Information System (INIS)

    Wei Jiaju; Wang Zhigong; Li Zhiqun; Tang Lu

    2012-01-01

    A new compact model has been introduced to model on-chip spiral transformers. Unlike conventional models, which are often a compound of two spiral inductor models (i.e., the combination of two coupled Π or 2-Π sub-circuits), our new model only uses 12 elements to model the whole structure in the form of T topology. The new model is based on the physical meaning, and the process of model derivation is also presented. In addition, a simple parameter extraction procedure is proposed to get the elements' values without any fitting and optimization. In this procedure, a new method has been developed for the parameter extraction of the ladder circuit, which is commonly used to represent the skin effect. In order to verify the model's validity and accuracy, we have compared the simulated and measured self-inductance, quality factor, coupling coefficient and insertion loss, and an excellent agreement has been found over a broad frequency range up to the resonant frequency. (semiconductor integrated circuits)

  2. Programmable System-on-Chip (PSoC) Embedded Readout Designs for Liquid Helium Level Sensors.

    Science.gov (United States)

    Parasakthi, C; Gireesan, K; Usha Rani, R; Sheela, O K; Janawadkar, M P

    2014-08-01

    This article reports the development of programmable system-on-chip (PSoC)-based embedded readout designs for liquid helium level sensors using resistive liquid vapor discriminators. The system has been built for the measurement of liquid helium level in a concave-bottomed, helmet-shaped, fiber-reinforced plastic cryostat for magnetoencephalography. This design incorporates three carbon resistors as cost-effective sensors, which are mounted at desired heights inside the cryostat and were used to infer the liquid helium level by measuring their temperature-dependent resistance. Localized electrical heating of the carbon resistors was used to discriminate whether the resistor is immersed in liquid helium or its vapor by exploiting the difference in the heat transfer rates in the two environments. This report describes a single PSoC chip for the design and development of a constant current source to drive the three carbon resistors, a multiplexer to route the sensor outputs to the analog-to-digital converter (ADC), a buffer to avoid loading of the sensors, an ADC for digitizing the data, and a display using liquid crystal display cum light-emitting diode modules. The level sensor readout designed with a single PSoC chip enables cost-effective and reliable measurement system design. © 2014 Society for Laboratory Automation and Screening.

  3. Performance analysis of general purpose and digital signal processor kernels for heterogeneous systems-on-chip

    Directory of Open Access Journals (Sweden)

    T. von Sydow

    2003-01-01

    Full Text Available Various reasons like technology progress, flexibility demands, shortened product cycle time and shortened time to market have brought up the possibility and necessity to integrate different architecture blocks on one heterogeneous System-on-Chip (SoC. Architecture blocks like programmable processor cores (DSP- and GPP-kernels, embedded FPGAs as well as dedicated macros will be integral parts of such a SoC. Especially programmable architecture blocks and associated optimization techniques are discussed in this contribution. Design space exploration and thus the choice which architecture blocks should be integrated in a SoC is a challenging task. Crucial to this exploration is the evaluation of the application domain characteristics and the costs caused by individual architecture blocks integrated on a SoC. An ATE-cost function has been applied to examine the performance of the aforementioned programmable architecture blocks. Therefore, representative discrete devices have been analyzed. Furthermore, several architecture dependent optimization steps and their effects on the cost ratios are presented.

  4. Atmel's New Rad-Hard Sparc V8 Processor 200Mhz & Low Power System on Chip

    Science.gov (United States)

    Ganry, Nicolas; Mantelet, Guy; Parkes, Steve; McClements, Chris

    2014-08-01

    The AT6981 is a new generation of processor designed for critical spaceflight applications, which combines a high-performance SPARC® V8 radiation hard processor, with enough on-chip memory for many aerospace applications and state-of-the-art SpaceWire networking technology from STAR- Dundee. The AT6981 is implemented in Atmel 90nm rad-hard technology, enabling 200 MHz operating speed for the processor with power consumption levels around 1W. This advanced technology allows strong system integration in a SoC with embedded peripherals like CAN, 1553, Ethernet, DDR and embedded memory with 1Mbytes SRAM. The device is ITAR- free and is developed in France by Atmel Aerospace having more than of 30years space experience. This paper describes this new SoC architecture and technical options considered to insure the best performances, the minimum power consumption and high reliability. This device will be available on the market in H2 2014 for evaluation with first flight models targeted end 2015.

  5. On-chip measurements of Brownian relaxation vs. concentration of 40nm magnetic beads

    DEFF Research Database (Denmark)

    Østerberg, Frederik Westergaard; Rizzi, Giovanni; Hansen, Mikkel Fougt

    2012-01-01

    We present on-chip Brownian relaxation measurements on a logarithmic dilution series of 40 nm beads dispersed in water with bead concentrations between 16 mu g/ml and 4000 mu g/ml. The measurements are performed using a planar Hall effect bridge sensor at frequencies up to 1 MHz. No external fields...... are needed as the beads are magnetized by the field generated by the applied sensor bias current. We show that the Brownian relaxation frequency can be extracted from fitting the Cole-Cole model to measurements for bead concentrations of 64 mu g/ml or higher and that the measured dynamic magnetic response...... is proportional to the bead concentration. For bead concentrations higher than or equal to 500 mu g/ml, we extract a hydrodynamic diameter of 47(1) nm for the beads, which is close to the nominal bead size of 40 nm. Furthermore, we study the signal vs. bead concentration at a fixed frequency close to the Brownian...

  6. Lithographically patterned thin activated carbon films as a new technology platform for on-chip devices.

    Science.gov (United States)

    Wei, Lu; Nitta, Naoki; Yushin, Gleb

    2013-08-27

    Continuous, smooth, visibly defect-free, lithographically patterned activated carbon films (ACFs) are prepared on the surface of silicon wafers. Depending on the synthesis conditions, porous ACFs can either remain attached to the initial substrate or be separated and transferred to another dense or porous substrate of interest. Tuning the activation conditions allows one to change the surface area and porosity of the produced carbon films. Here we utilize the developed thin ACF technology to produce prototypes of functional electrical double-layer capacitor devices. The synthesized thin carbon film electrodes demonstrated very high capacitance in excess of 510 F g(-1) (>390 F cm(-3)) at a slow cyclic voltammetry scan rate of 1 mV s(-1) and in excess of 325 F g(-1) (>250 F cm(-3)) in charge-discharge tests at an ultrahigh current density of 45,000 mA g(-1). Good stability was demonstrated after 10,000 galvanostatic charge-discharge cycles. The high values of the specific and volumetric capacitances of the selected ACF electrodes as well as the capacity retention at high current densities demonstrated great potential of the proposed technology for the fabrication of various on-chip devices, such as micro-electrochemical capacitors.

  7. Analog Multilayer Perceptron Circuit with On-chip Learning: Portable Electronic Nose

    Science.gov (United States)

    Pan, Chih-Heng; Tang, Kea-Tiong

    2011-09-01

    This article presents an analog multilayer perceptron (MLP) neural network circuit with on-chip back propagation learning. This low power and small area analog MLP circuit is proposed to implement as a classifier in an electronic nose (E-nose). Comparing with the E-nose using microprocessor or FPGA as a classifier, the E-nose applying analog circuit as a classifier can be faster and much smaller, demonstrate greater power efficiency and be capable of developing a portable E-nose [1]. The system contains four inputs, four hidden neurons, and only one output neuron; this simple structure allows the circuit to have a smaller area and less power consumption. The circuit is fabricated using TSMC 0.18 μm 1P6M CMOS process with 1.8 V supply voltage. The area of this chip is 1.353×1.353 mm2 and the power consumption is 0.54 mW. Post-layout simulations show that the proposed analog MLP circuit can be successively trained to identify three kinds of fruit odors.

  8. Titer on chip: new analytical tool for influenza vaccine potency determination.

    Directory of Open Access Journals (Sweden)

    Laura R Kuck

    Full Text Available Titer on Chip (Flu-ToC is a new technique for quantification of influenza hemagglutinin (HA concentration. In order to evaluate the potential of this new technique, a comparison of Flu-ToC to more conventional methods was conducted using recombinant HA produced in a baculovirus expression system as a test case. Samples from current vaccine strains were collected from four different steps in the manufacturing process. A total of 19 samples were analysed by Flu-ToC (blinded, single radial immunodiffusion (SRID, an enzyme-linked immunosorbent assay (ELISA, and the purity adjusted bicinchoninic acid assay (paBCA. The results indicated reasonable linear correlation between Flu-ToC and SRID, ELISA, and paBCA, with regression slopes of log-log plots being 0.91, 1.03, and 0.91, respectively. The average ratio for HA content measured by Flu-ToC relative to SRID, ELISA, and paBCA was 83%, 147%, and 81%, respectively; indicating nearly equivalent potency determination for Flu-ToC relative to SRID and paBCA. These results, combined with demonstrated multiplexed analysis of all components within a quadrivalent formulation and robust response to HA strains over a wide time period, support the conclusion that Flu-ToC can be used as a reliable and time-saving alternative potency assay for influenza vaccines.

  9. On-Chip Production of Size-Controllable Liquid Metal Microdroplets Using Acoustic Waves.

    Science.gov (United States)

    Tang, Shi-Yang; Ayan, Bugra; Nama, Nitesh; Bian, Yusheng; Lata, James P; Guo, Xiasheng; Huang, Tony Jun

    2016-07-01

    Micro- to nanosized droplets of liquid metals, such as eutectic gallium indium (EGaIn) and Galinstan, have been used for developing a variety of applications in flexible electronics, sensors, catalysts, and drug delivery systems. Currently used methods for producing micro- to nanosized droplets of such liquid metals possess one or several drawbacks, including the lack in ability to control the size of the produced droplets, mass produce droplets, produce smaller droplet sizes, and miniaturize the system. Here, a novel method is introduced using acoustic wave-induced forces for on-chip production of EGaIn liquid-metal microdroplets with controllable size. The size distribution of liquid metal microdroplets is tuned by controlling the interfacial tension of the metal using either electrochemistry or electrocapillarity in the acoustic field. The developed platform is then used for heavy metal ion detection utilizing the produced liquid metal microdroplets as the working electrode. It is also demonstrated that a significant enhancement of the sensing performance is achieved by introducing acoustic streaming during the electrochemical experiments. The demonstrated technique can be used for developing liquid-metal-based systems for a wide range of applications. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  10. Polypyrrole Porous Micro Humidity Sensor Integrated with a Ring Oscillator Circuit on Chip

    Science.gov (United States)

    Yang, Ming-Zhi; Dai, Ching-Liang; Lu, De-Hao

    2010-01-01

    This study presents the design and fabrication of a capacitive micro humidity sensor integrated with a five-stage ring oscillator circuit on chip using the complimentary metal oxide semiconductor (CMOS) process. The area of the humidity sensor chip is about 1 mm2. The humidity sensor consists of a sensing capacitor and a sensing film. The sensing capacitor is constructed from spiral interdigital electrodes that can enhance the sensitivity of the sensor. The sensing film of the sensor is polypyrrole, which is prepared by the chemical polymerization method, and the film has a porous structure. The sensor needs a post-CMOS process to coat the sensing film. The post-CMOS process uses a wet etching to etch the sacrificial layers, and then the polypyrrole is coated on the sensing capacitor. The sensor generates a change in capacitance when the sensing film absorbs or desorbs vapor. The ring oscillator circuit converts the capacitance variation of the sensor into the oscillation frequency output. Experimental results show that the sensitivity of the humidity sensor is about 99 kHz/%RH at 25 °C. PMID:22163459

  11. A Framework for Scalable TSV Assignment and Selection in Three-Dimensional Networks-on-Chips

    Directory of Open Access Journals (Sweden)

    Amir Charif

    2017-01-01

    Full Text Available 3D integration can greatly benefit future many-cores by enabling low-latency three-dimensional Network-on-Chip (3D-NoC topologies. However, due to high cost, low yield, and frequent failures of Through-Silicon Via (TSV, 3D-NoCs are most likely to include only a few vertical connections, resulting in incomplete topologies that pose new challenges in terms of deadlock-free routing and TSV assignment. The routers of such networks require a way to locate the nodes that have vertical connections, commonly known as elevators, and select one of them in order to be able to reach other layers when necessary. In this paper, several alternative TSV selection strategies requiring a constant amount of configurable bits per router are introduced. Each proposed solution consists of a configuration algorithm, which provides each router with the necessary information to locate the elevators, and a routing algorithm, which uses this information at runtime to route packets to an elevator. Our algorithms are compared by simulation to highlight the advantages and disadvantages of each solution under various scenarios, and hardware synthesis results demonstrate the scalability of the proposed approach and its suitability for cost-oriented designs.

  12. Fully parallel write/read in resistive synaptic array for accelerating on-chip learning

    Science.gov (United States)

    Gao, Ligang; Wang, I.-Ting; Chen, Pai-Yu; Vrudhula, Sarma; Seo, Jae-sun; Cao, Yu; Hou, Tuo-Hung; Yu, Shimeng

    2015-11-01

    A neuro-inspired computing paradigm beyond the von Neumann architecture is emerging and it generally takes advantage of massive parallelism and is aimed at complex tasks that involve intelligence and learning. The cross-point array architecture with synaptic devices has been proposed for on-chip implementation of the weighted sum and weight update in the learning algorithms. In this work, forming-free, silicon-process-compatible Ta/TaO x /TiO2/Ti synaptic devices are fabricated, in which >200 levels of conductance states could be continuously tuned by identical programming pulses. In order to demonstrate the advantages of parallelism of the cross-point array architecture, a novel fully parallel write scheme is designed and experimentally demonstrated in a small-scale crossbar array to accelerate the weight update in the training process, at a speed that is independent of the array size. Compared to the conventional row-by-row write scheme, it achieves >30× speed-up and >30× improvement in energy efficiency as projected in a large-scale array. If realistic synaptic device characteristics such as device variations are taken into an array-level simulation, the proposed array architecture is able to achieve ∼95% recognition accuracy of MNIST handwritten digits, which is close to the accuracy achieved by software using the ideal sparse coding algorithm.

  13. Performance of an on-chip superconducting circulator for quantum microwave systems

    Science.gov (United States)

    Chapman, Benjamin; Rosenthal, Eric; Moores, Bradley; Kerckhoff, Joseph; Mates, J. A. B.; Hilton, G. C.; Vale, L. R.; Ullom, J. N.; LalumíEre, Kevin; Blais, Alexandre; Lehnert, K. W.

    Microwave circulators enforce a single propagation direction for signals in an electrical network. Unfortunately, commercial circulators are bulky, lossy, and cannot be integrated close to superconducting circuits because they require strong ( kOe) magnetic fields produced by permanent magnets. Here we report on the performance of an on-chip, active circulator for superconducting microwave circuits, which uses no permanent magnets. Non-reciprocity is achieved by actively modulating reactive elements around 100 MHz, giving roughly a factor of 50 in the separation between signal and control frequencies, which facilitates filtering. The circulator's active components are dynamically tunable inductors constructed with arrays of dc-SQUIDs in series. Array inductance is tuned by varying the magnetic flux through the SQUIDs with fields weaker than 1 Oe. Although the instantaneous bandwidth of the device is narrow, the operation frequency is tunable between 4 and 8 GHz. This presentation will describe the device's theory of operation and compare its measured performance to design goals. This work is supported by the ARO under contract W911NF-14-1-0079 and the National Science Foundation under Grant Number 1125844.

  14. A UHF RFID system with on-chip-antenna tag for short range communication

    International Nuclear Information System (INIS)

    Peng Qi; Zhang Chun; Zhao Xijin; Wang Zhihua

    2015-01-01

    A UHF RF identification system based on the 0.18 μm CMOS process has been developed for short range and harsh size requirement applications, which is composed of a fully integrated tag and a special reader. The whole tag chip with the antenna takes up an area of 0.36 mm 2 , which is smaller than other reported tags with an on-chip antenna (OCA) using the standard CMOS process. A self-defined protocol is proposed to reduce the power consumption, and minimize the size of the tag. The specialized SOC reader system consists of the RF transceiver, digital baseband, MCU and host interface. Its power consumption is about 500 mW. Measurement results show that the system's reading range is 2 mm with 20 dBm reader output power. With an inductive antenna printed on a paper substrate around the OCA tag, the reading range can be extended from several centimeters to meters, depending on the shape and size of the inductive antenna. (paper)

  15. On-chip ultra-thin layer chromatography and surface enhanced Raman spectroscopy.

    Science.gov (United States)

    Chen, Jing; Abell, Justin; Huang, Yao-wen; Zhao, Yiping

    2012-09-07

    We demonstrate that silver nanorod (AgNR) array substrates can be used for on-chip separation and detection of chemical mixtures by combining ultra-thin layer chromatography (UTLC) and surface enhanced Raman spectroscopy (SERS). The UTLC-SERS plate consists of an AgNR array fabricated by oblique angle deposition. The capability of the AgNR substrates to separate the different compounds in a mixture was explored using a mixture of four dyes and a mixture of melamine and Rhodamine 6G at varied concentrations with different mobile phase solvents. After UTLC separation, spatially-resolved SERS spectra were collected along the mobile phase development direction and the intensities of specific SERS peaks from each component were used to generate chromatograms. The AgNR substrates demonstrate the potential for separating the test dyes with plate heights as low as 9.6 μm. The limits of detection are between 10(-5)-10(-6) M. Furthermore, we show that the coupling of UTLC with SERS improves the SERS detection specificity, as small amounts of target analytes can be separated from the interfering background components.

  16. Magnetic actuator for the control and mixing of magnetic bead-based reactions on-chip.

    Science.gov (United States)

    Berenguel-Alonso, Miguel; Granados, Xavier; Faraudo, Jordi; Alonso-Chamarro, Julián; Puyol, Mar

    2014-10-01

    While magnetic bead (MB)-based bioassays have been implemented in integrated devices, their handling on-chip is normally either not optimal--i.e. only trapping is achieved, with aggregation of the beads--or requires complex actuator systems. Herein, we describe a simple and low-cost magnetic actuator to trap and move MBs within a microfluidic chamber in order to enhance the mixing of a MB-based reaction. The magnetic actuator consists of a CD-shaped plastic unit with an arrangement of embedded magnets which, when rotating, generate the mixing. The magnetic actuator has been used to enhance the amplification reaction of an enzyme-linked fluorescence immunoassay to detect Escherichia coli O157:H7 whole cells, an enterohemorrhagic strain, which have caused several outbreaks in food and water samples. A 2.7-fold sensitivity enhancement was attained with a detection limit of 603 colony-forming units (CFU) /mL, when employing the magnetic actuator.

  17. New movable plate for efficient millimeter wave vertical on-chip antenna

    KAUST Repository

    Marnat, Loic

    2013-04-01

    A new movable plate concept is presented in this paper to realize mm-wave vertical on-chip antennas through MEMS based post-processing steps in a CMOS compatible process. By virtue of its vertical position, the antenna is isolated from the lossy Si substrate and hence performs with a better efficiency as compared to the horizontal position. In addition, the movable plate concept enables polarization diversity by providing both horizontal and vertical polarizations on the same chip. Through a first iteration fractal bowtie antenna design, dual band (60 and 77 GHz) operation is demonstrated in both horizontal and vertical positions without any change in dimensions or use of switches for two different mediums (Si and air). To support the movable plate concept, the transmission line and antenna are designed on a flexible polyamide, where the former has been optimized to operate in the bent position. The design is highly suitable for compact, low cost and efficient SoC solutions. © 1963-2012 IEEE.

  18. Improving lumen maintenance by nanopore array dispersed quantum dots for on-chip light emitting diodes

    Science.gov (United States)

    Chen, Quan; Yang, Fan; Wan, Renzhuo; Fang, Dong

    2017-12-01

    The temperature stability of quantum dots (QDs), which is crucial for integrating into high power light-emitting diodes (LEDs) in the on-chip configuration, needs to be further improved. In this letter, we report warm white LEDs, where CdSe/ZnS nanoparticles were incorporated into a porous anodic alumina (PAA) matrix with a chain structure by the self-assembly method. Experiments demonstrate that the QD concentration range in toluene solvent from 1% mg/μl to 1.2% mg/μl in combination with the PAA matrix shows the best luminous property. To verify the reliability of the as-prepared device, a comparison experiment was conducted. It indicates excellent lumen maintenance of the light source and less chromaticity coordinate shift under accelerated life testing conditions. Experiments also prove that optical depreciation was only up to 4.6% of its initial value after the 1500 h aging test at the junction temperature of 76 °C.

  19. An Impedance-Based Mold Sensor with on-Chip Optical Reference

    Directory of Open Access Journals (Sweden)

    Poornachandra Papireddy Vinayaka

    2016-09-01

    Full Text Available A new miniaturized sensor system with an internal optical reference for the detection of mold growth is presented. The sensor chip comprises a reaction chamber provided with a culture medium that promotes the growth of mold species from mold spores. The mold detection is performed by measuring impedance changes with integrated electrodes fabricated inside the reaction chamber. The impedance change in the culture medium is caused by shifts in the pH (i.e., from 5.5 to 8 as the mold grows. In order to determine the absolute pH value without the need for calibration, a methyl red indicator dye has been added to the culture medium. It changes the color of the medium as the pH passes specific values. This colorimetric principle now acts as a reference measurement. It also allows the sensitivity of the impedance sensor to be established in terms of impedance change per pH unit. Major mold species that are involved in the contamination of food, paper and indoor environments, like Fusarium oxysporum, Fusarium incarnatum, Eurotium amstelodami, Aspergillus penicillioides and Aspergillus restrictus, have been successfully analyzed on-chip.

  20. Polypyrrole Porous Micro Humidity Sensor Integrated with a Ring Oscillator Circuit on Chip

    Directory of Open Access Journals (Sweden)

    De-Hao Lu

    2010-11-01

    Full Text Available This study presents the design and fabrication of a capacitive micro humidity sensor integrated with a five-stage ring oscillator circuit on chip using the complimentary metal oxide semiconductor (CMOS process. The area of the humidity sensor chip is about 1 mm2. The humidity sensor consists of a sensing capacitor and a sensing film. The sensing capacitor is constructed from spiral interdigital electrodes that can enhance the sensitivity of the sensor. The sensing film of the sensor is polypyrrole, which is prepared by the chemical polymerization method, and the film has a porous structure. The sensor needs a post-CMOS process to coat the sensing film. The post-CMOS process uses a wet etching to etch the sacrificial layers, and then the polypyrrole is coated on the sensing capacitor. The sensor generates a change in capacitance when the sensing film absorbs or desorbs vapor. The ring oscillator circuit converts the capacitance variation of the sensor into the oscillation frequency output. Experimental results show that the sensitivity of the humidity sensor is about 99 kHz/%RH at 25 °C.

  1. On-Chip Neural Data Compression Based On Compressed Sensing With Sparse Sensing Matrices.

    Science.gov (United States)

    Zhao, Wenfeng; Sun, Biao; Wu, Tong; Yang, Zhi

    2018-02-01

    On-chip neural data compression is an enabling technique for wireless neural interfaces that suffer from insufficient bandwidth and power budgets to transmit the raw data. The data compression algorithm and its implementation should be power and area efficient and functionally reliable over different datasets. Compressed sensing is an emerging technique that has been applied to compress various neurophysiological data. However, the state-of-the-art compressed sensing (CS) encoders leverage random but dense binary measurement matrices, which incur substantial implementation costs on both power and area that could offset the benefits from the reduced wireless data rate. In this paper, we propose two CS encoder designs based on sparse measurement matrices that could lead to efficient hardware implementation. Specifically, two different approaches for the construction of sparse measurement matrices, i.e., the deterministic quasi-cyclic array code (QCAC) matrix and -sparse random binary matrix [-SRBM] are exploited. We demonstrate that the proposed CS encoders lead to comparable recovery performance. And efficient VLSI architecture designs are proposed for QCAC-CS and -SRBM encoders with reduced area and total power consumption.

  2. Superconducting Switch for Fast On-Chip Routing of Quantum Microwave Fields

    Science.gov (United States)

    Pechal, M.; Besse, J.-C.; Mondal, M.; Oppliger, M.; Gasparinetti, S.; Wallraff, A.

    2016-08-01

    A switch capable of routing microwave signals at cryogenic temperatures is a desirable component for state-of-the-art experiments in many fields of applied physics, including but not limited to quantum-information processing, communication, and basic research in engineered quantum systems. Conventional mechanical switches provide low insertion loss but disturb operation of dilution cryostats and the associated experiments by heat dissipation. Switches based on semiconductors or microelectromechanical systems have a lower thermal budget but are not readily integrated with current superconducting circuits. Here we design and test an on-chip switch built by combining tunable transmission-line resonators with microwave beam splitters. The device is superconducting and as such dissipates a negligible amount of heat. It is compatible with current superconducting circuit fabrication techniques, operates with a bandwidth exceeding 100 MHz, is capable of handling photon fluxes on the order of 1 05 μ s-1 , equivalent to powers exceeding -90 dBm , and can be switched within approximately 6-8 ns. We successfully demonstrate operation of the device in the quantum regime by integrating it on a chip with a single-photon source and using it to route nonclassical itinerant microwave fields at the single-photon level.

  3. On-Chip Sorting of Long Semiconducting Carbon Nanotubes for Multiple Transistors along an Identical Array.

    Science.gov (United States)

    Otsuka, Keigo; Inoue, Taiki; Maeda, Etsuo; Kometani, Reo; Chiashi, Shohei; Maruyama, Shigeo

    2017-11-28

    Ballistic transport and sub-10 nm channel lengths have been achieved in transistors containing one single-walled carbon nanotube (SWNT). To fill the gap between single-tube transistors and high-performance logic circuits for the replacement of silicon, large-area, high-density, and purely semiconducting (s-) SWNT arrays are highly desired. Here we demonstrate the fabrication of multiple transistors along a purely semiconducting SWNT array via an on-chip purification method. Water- and polymer-assisted burning from site-controlled nanogaps is developed for the reliable full-length removal of metallic SWNTs with the damage to s-SWNTs minimized even in high-density arrays. All the transistors with various channel lengths show large on-state current and excellent switching behavior in the off-state. Since our method potentially provides pure s-SWNT arrays over a large area with negligible damage, numerous transistors with arbitrary dimensions could be fabricated using a conventional semiconductor process, leading to SWNT-based logic, high-speed communication, and other next-generation electronic devices.

  4. On-chip bio-analyte detection utilizing the velocity of magnetic microparticles in a fluid

    KAUST Repository

    Giouroudi, Ioanna

    2011-03-22

    A biosensing principle utilizing the motion of suspended magnetic microparticles in a microfluidic system is presented. The system utilizes the innovative concept of the velocity dependence of magnetic microparticles (MPs) due to their volumetric change when analyte is attached to their surface via antibody–antigen binding. When the magnetic microparticles are attracted by a magnetic field within a microfluidic channel their velocity depends on the presence of analyte. Specifically, their velocity decreases drastically when the magnetic microparticles are covered by (nonmagnetic) analyte (LMPs) due to the increased drag force in the opposite direction to that of the magnetic force. Experiments were carried out as a proof of concept. A promising 52% decrease in the velocity of the LMPs in comparison to that of the MPs was measured when both of them were accelerated inside a microfluidic channel using an external permanent magnet. The presented biosensing methodology offers a compact and integrated solution for a new kind of on-chip analysis with potentially high sensitivity and shorter acquisition time than conventional laboratory based systems.

  5. Ultracompact on-chip photothermal power monitor based on silicon hybrid plasmonic waveguides

    Directory of Open Access Journals (Sweden)

    Wu Hao

    2017-01-01

    Full Text Available We propose and demonstrate an ultracompact on-chip photothermal power monitor based on a silicon hybrid plasmonic waveguide (HPWG, which consists of a metal strip, a silicon core, and a silicon oxide (SiO2 insulator layer between them. When light injected to an HPWG is absorbed by the metal strip, the temperature increases and the resistance of the metal strip changes accordingly due to the photothermal and thermal resistance effects of the metal. Therefore, the optical power variation can be monitored by measuring the resistance of the metal strip on the HPWG. To obtain the electrical signal for the resistance measurement conveniently, a Wheatstone bridge circuit is monolithically integrated with the HPWG on the same chip. As the HPWG has nanoscale light confinement, the present power monitor is as short as ~3 μm, which is the smallest photothermal power monitor reported until now. The compactness helps to improve the thermal efficiency and the response speed. For the present power monitor fabricated with simple fabrication processes, the measured responsivity is as high as about 17.7 mV/mW at a bias voltage of 2 V and the power dynamic range is as large as 35 dB.

  6. An On-Chip RBC Deformability Checker Significantly Improves Velocity-Deformation Correlation

    Directory of Open Access Journals (Sweden)

    Chia-Hung Dylan Tsai

    2016-10-01

    Full Text Available An on-chip deformability checker is proposed to improve the velocity–deformation correlation for red blood cell (RBC evaluation. RBC deformability has been found related to human diseases, and can be evaluated based on RBC velocity through a microfluidic constriction as in conventional approaches. The correlation between transit velocity and amount of deformation provides statistical information of RBC deformability. However, such correlations are usually only moderate, or even weak, in practical evaluations due to limited range of RBC deformation. To solve this issue, we implemented three constrictions of different width in the proposed checker, so that three different deformation regions can be applied to RBCs. By considering cell responses from the three regions as a whole, we practically extend the range of cell deformation in the evaluation, and could resolve the issue about the limited range of RBC deformation. RBCs from five volunteer subjects were tested using the proposed checker. The results show that the correlation between cell deformation and transit velocity is significantly improved by the proposed deformability checker. The absolute values of the correlation coefficients are increased from an average of 0.54 to 0.92. The effects of cell size, shape and orientation to the evaluation are discussed according to the experimental results. The proposed checker is expected to be useful for RBC evaluation in medical practices.

  7. On-chip mitochondrial assay microfluidic devices and protein nanopore/nanotube hybrid transistor

    Science.gov (United States)

    Lim, Taesun

    Tremendous efforts to understand the cause, mechanism of development and the way to treat various diseases as well as an early diagnosis have been made so far and people are still working hardly on these researches. Even now, countless people are suffering from diseases such as Alzhemer's disease, Parkinson's disease, diabetes and cancer without knowing clues to cure their diseases completely. Generally speaking, we still have a long way to go through to comprehensively figure out these our long-lasting homeworks. One of possible solutions is to merge current advanced technology and science together to find a powerful synergetic effect for a specific purpose that can be tailored depending on user's need. Here this research tried to put nanotechnology and biological science together to find a way to resolve current challenges by developing a new generation of the analytical sensing device. Mitochondrial functions and biological roles in regulating life and death control will be discussed indicating mitochondrion is a crucial organism to monitor to obtain important information regarding degenerative diseases and aging process. On-chip mitochondrial functional assay microsensor that could facilitate the mitochondrial evaluation will be extensively demonstrated and discussed in both technical and biological perspectives. The novel fusion technological approach will be demonstrated by combining artificial cell membrane with carbon nanotube electronics to interrogate interactions between biomolecules and electronic circuitries. In addition, molecular dynamics at the cell membrane could be investigated closely which can help understand the cell-cell communication and the regulation of ion transport.

  8. Fishing on chips: up-and-coming technological advances in analysis of zebrafish and Xenopus embryos.

    Science.gov (United States)

    Zhu, Feng; Skommer, Joanna; Huang, Yushi; Akagi, Jin; Adams, Dany; Levin, Michael; Hall, Chris J; Crosier, Philip S; Wlodkowic, Donald

    2014-11-01

    Biotests performed on small vertebrate model organisms provide significant investigative advantages as compared with bioassays that employ cell lines, isolated primary cells, or tissue samples. The main advantage offered by whole-organism approaches is that the effects under study occur in the context of intact physiological milieu, with all its intercellular and multisystem interactions. The gap between the high-throughput cell-based in vitro assays and low-throughput, disproportionally expensive and ethically controversial mammal in vivo tests can be closed by small model organisms such as zebrafish or Xenopus. The optical transparency of their tissues, the ease of genetic manipulation and straightforward husbandry, explain the growing popularity of these model organisms. Nevertheless, despite the potential for miniaturization, automation and subsequent increase in throughput of experimental setups, the manipulation, dispensing and analysis of living fish and frog embryos remain labor-intensive. Recently, a new generation of miniaturized chip-based devices have been developed for zebrafish and Xenopus embryo on-chip culture and experimentation. In this work, we review the critical developments in the field of Lab-on-a-Chip devices designed to alleviate the limits of traditional platforms for studies on zebrafish and clawed frog embryo and larvae. © 2014 International Society for Advancement of Cytometry. © 2014 International Society for Advancement of Cytometry.

  9. Design and Characterization of CMOS On-Chip Antennas for 60 GHz Communications

    Directory of Open Access Journals (Sweden)

    D.Titz

    2012-04-01

    Full Text Available In this paper, we present the design and the measurement of two antennas realized on a 130nm CMOS process. They both radiate in the 60 GHz band and are dedicated to Wireless Personal Area Network (WPAN applications. The antennas are manufactured within the frame of a multi-wafer project with several surrounding microelectronic circuits. The first antenna is an Inverted-F antenna (IFA. It has a maximum gain of -8 dBi and a -10 dB matching bandwidth of 20%. The second radiator is a meandered dipole. It has a maximum gain of -14 dBi and a -10 dB matching bandwidth of 10%. The challenging measurement of their reflection coefficient and their gain radiation pattern are presented. Simulated versus measured curves are analyzed. We especially demonstrate the necessity to take into account the closest microelectronic circuits of the antennas for accurate modeling of the radiating performance of 60 GHz on-chip dies.

  10. Ultrahigh-speed Si-integrated on-chip laser with tailored dynamic characteristics

    DEFF Research Database (Denmark)

    Park, Gyeong Cheol; Xue, Weiqi; Piels, Molly

    2016-01-01

    -pumped compact optical feedback structure can be realised, which together tailor the frequency response function for achieving a very high speed at low injection currents. Furthermore, light can be emitted laterally into a Si waveguide. From an 1.54-μm optically-pumped laser, a 3-dB frequency of 27 GHz...... was obtained at a pumping level corresponding to sub-mA. Using measured 3-dB frequen-cies and calculated equivalent currents, the modulation current efficiency factor (MCEF) is estimated to be 42.1 GHz/mA(1/2), which is superior among microcavity lasers. This shows a high potential for a very high speed at low......For on-chip interconnects, an ideal light source should have an ultralow energy consumption per bandwidth (operating en-ergy) as well as sufficient output power for error-free detection. Nanocavity lasers have been considered the most ideal for smaller operating energy. However, they have...

  11. Fully parallel write/read in resistive synaptic array for accelerating on-chip learning

    International Nuclear Information System (INIS)

    Gao, Ligang; Chen, Pai-Yu; Seo, Jae-sun; Cao, Yu; Yu, Shimeng; Wang, I-Ting; Hou, Tuo-Hung; Vrudhula, Sarma

    2015-01-01

    A neuro-inspired computing paradigm beyond the von Neumann architecture is emerging and it generally takes advantage of massive parallelism and is aimed at complex tasks that involve intelligence and learning. The cross-point array architecture with synaptic devices has been proposed for on-chip implementation of the weighted sum and weight update in the learning algorithms. In this work, forming-free, silicon-process-compatible Ta/TaO_x/TiO_2/Ti synaptic devices are fabricated, in which >200 levels of conductance states could be continuously tuned by identical programming pulses. In order to demonstrate the advantages of parallelism of the cross-point array architecture, a novel fully parallel write scheme is designed and experimentally demonstrated in a small-scale crossbar array to accelerate the weight update in the training process, at a speed that is independent of the array size. Compared to the conventional row-by-row write scheme, it achieves >30× speed-up and >30× improvement in energy efficiency as projected in a large-scale array. If realistic synaptic device characteristics such as device variations are taken into an array-level simulation, the proposed array architecture is able to achieve ∼95% recognition accuracy of MNIST handwritten digits, which is close to the accuracy achieved by software using the ideal sparse coding algorithm. (paper)

  12. The system power control unit based on the on-chip wireless communication system.

    Science.gov (United States)

    Li, Tiefeng; Ma, Caiwen; Li, WenHua

    2013-01-01

    Currently, the on-chip wireless communication system (OWCS) includes 2nd-generation (2G), 3rd-generation (3G), and long-term evolution (LTE) communication subsystems. To improve the power consumption of OWCS, a typical architecture design of system power control unit (SPCU) is given in this paper, which can not only make a 2G, a 3G, and an LTE subsystems enter sleep mode, but it can also wake them up from sleep mode via the interrupt. During the sleep mode period, either the real-time sleep timer or the global system for mobile (GSM) communication sleep timer can be used individually to arouse the corresponding subsystem. Compared to previous sole voltage supplies on the OWCS, a 2G, a 3G, or an LTE subsystem can be independently configured with three different voltages and frequencies in normal work mode. In the meantime, the voltage supply monitor, which is an important part in the SPCU, can significantly guard the voltage of OWCS in real time. Finally, the SPCU may implement dynamic voltage and frequency scaling (DVFS) for a 2G, a 3G, or an LTE subsystem, which is automatically accomplished by the hardware.

  13. The System Power Control Unit Based on the On-Chip Wireless Communication System

    Directory of Open Access Journals (Sweden)

    Tiefeng Li

    2013-01-01

    Full Text Available Currently, the on-chip wireless communication system (OWCS includes 2nd-generation (2G, 3rd-generation (3G, and long-term evolution (LTE communication subsystems. To improve the power consumption of OWCS, a typical architecture design of system power control unit (SPCU is given in this paper, which can not only make a 2G, a 3G, and an LTE subsystems enter sleep mode, but it can also wake them up from sleep mode via the interrupt. During the sleep mode period, either the real-time sleep timer or the global system for mobile (GSM communication sleep timer can be used individually to arouse the corresponding subsystem. Compared to previous sole voltage supplies on the OWCS, a 2G, a 3G, or an LTE subsystem can be independently configured with three different voltages and frequencies in normal work mode. In the meantime, the voltage supply monitor, which is an important part in the SPCU, can significantly guard the voltage of OWCS in real time. Finally, the SPCU may implement dynamic voltage and frequency scaling (DVFS for a 2G, a 3G, or an LTE subsystem, which is automatically accomplished by the hardware.

  14. Gain enhancement of low profile on-chip dipole antenna via Artificial Magnetic Conductor at 94 GHz

    KAUST Repository

    Nafe, Mahmoud

    2015-04-13

    The bottleneck for realizing high efficiency System-on-Chip is integrating the antenna on the lossy silicon substrate. To shield the antenna from the silicon, a ground plane can be used. However, the ultra-thin oxide does not provide enough separation between the antenna and the ground plane. In this work, we demonstrate one of the highest reported gains to date for low profile 94 GHz on-chip dipole antenna while the ground plane is in the lowest metal in the oxide (M1). This is achieved by optimizing an Artificial Magnetic Conductor (AMC) structure midway the antenna and M1. The dipole antenna without the AMC has a gain of − 11 dBi while with the AMC structure a gain of + 4.8 dBi and hence achieving a gain enhancement of + 15.8 dB.

  15. A thin film approach for SiC-derived graphene as an on-chip electrode for supercapacitors

    Science.gov (United States)

    Ahmed, Mohsin; Khawaja, Mohamad; Notarianni, Marco; Wang, Bei; Goding, Dayle; Gupta, Bharati; Boeckl, John J.; Takshi, Arash; Motta, Nunzio; Saddow, Stephen E.; Iacopi, Francesca

    2015-10-01

    We designed a nickel-assisted process to obtain graphene with sheet resistance as low as 80 Ω square-1 from silicon carbide films on Si wafers with highly enhanced surface area. The silicon carbide film acts as both a template and source of graphitic carbon, while, simultaneously, the nickel induces porosity on the surface of the film by forming silicides during the annealing process which are subsequently removed. As stand-alone electrodes in supercapacitors, these transfer-free graphene-on-chip samples show a typical double-layer supercapacitive behaviour with gravimetric capacitance of up to 65 F g-1. This work is the first attempt to produce graphene with high surface area from silicon carbide thin films for energy storage at the wafer-level and may open numerous opportunities for on-chip integrated energy storage applications.

  16. Semipolar III–nitride quantum well waveguide photodetector integrated with laser diode for on-chip photonic system

    KAUST Repository

    Shen, Chao

    2017-02-28

    A high-performance waveguide photodetector (WPD) integrated with a laser diode (LD) sharing the single InGaN/GaN quantum well active region is demonstrated on a semipolar GaN substrate. The photocurrent of the integrated WPD is effectively tuned by the emitted optical power from the LD. The responsivity ranges from 0.018 to 0.051 A/W with increasing reverse bias from 0 to 10 V. The WPD shows a large 3 dB modulation bandwidth of 230 MHz. The integrated device, being used for power monitoring and on-chip communication, paves the way towards the eventual realization of a III–nitride on-chip photonic system.

  17. A thin film approach for SiC-derived graphene as an on-chip electrode for supercapacitors

    International Nuclear Information System (INIS)

    Ahmed, Mohsin; Wang, Bei; Goding, Dayle; Iacopi, Francesca; Khawaja, Mohamad; Notarianni, Marco; Takshi, Arash; Saddow, Stephen E; Gupta, Bharati; Motta, Nunzio; Boeckl, John J

    2015-01-01

    We designed a nickel-assisted process to obtain graphene with sheet resistance as low as 80 Ω square −1 from silicon carbide films on Si wafers with highly enhanced surface area. The silicon carbide film acts as both a template and source of graphitic carbon, while, simultaneously, the nickel induces porosity on the surface of the film by forming silicides during the annealing process which are subsequently removed. As stand-alone electrodes in supercapacitors, these transfer-free graphene-on-chip samples show a typical double-layer supercapacitive behaviour with gravimetric capacitance of up to 65 F g −1 . This work is the first attempt to produce graphene with high surface area from silicon carbide thin films for energy storage at the wafer-level and may open numerous opportunities for on-chip integrated energy storage applications. (paper)

  18. A deterministic guide for material and mode dependence of on-chip electro-optic modulator performance

    Science.gov (United States)

    Amin, Rubab; Suer, Can; Ma, Zhizhen; Sarpkaya, Ibrahim; Khurgin, Jacob B.; Agarwal, Ritesh; Sorger, Volker J.

    2017-10-01

    Electro-optic modulation is a key function in optical data communication and possible future optical computing engines. The performance of modulators intricately depends on the interaction between the actively modulated material and the propagating waveguide mode. While high-performing modulators were demonstrated before, the approaches were taken as ad-hoc. Here we show the first systematic investigation to incorporate a holistic analysis for high-performance and ultra-compact electro-optic modulators on-chip. We show that intricate interplay between active modulation material and optical mode plays a key role in the device operation. Based on physical tradeoffs such as index modulation, loss, optical confinement factors and slow-light effects, we find that bias-material-mode regions exist where high phase modulation and high loss (absorption) modulation is found. This work paves the way for a holistic design rule of electro-optic modulators for on-chip integration.

  19. Wide-field optical detection of nanoparticles using on-chip microscopy and self-assembled nanolenses

    Science.gov (United States)

    Mudanyali, Onur; McLeod, Euan; Luo, Wei; Greenbaum, Alon; Coskun, Ahmet F.; Hennequin, Yves; Allier, Cédric P.; Ozcan, Aydogan

    2013-03-01

    The direct observation of nanoscale objects is a challenging task for optical microscopy because the scattering from an individual nanoparticle is typically weak at optical wavelengths. Electron microscopy therefore remains one of the gold standard visualization methods for nanoparticles, despite its high cost, limited throughput and restricted field-of-view. Here, we describe a high-throughput, on-chip detection scheme that uses biocompatible wetting films to self-assemble aspheric liquid nanolenses around individual nanoparticles to enhance the contrast between the scattered and background light. We model the effect of the nanolens as a spatial phase mask centred on the particle and show that the holographic diffraction pattern of this effective phase mask allows detection of sub-100 nm particles across a large field-of-view of >20 mm2. As a proof-of-concept demonstration, we report on-chip detection of individual polystyrene nanoparticles, adenoviruses and influenza A (H1N1) viral particles.

  20. Multilayer on-chip stacked Fresnel zone plates: Hard x-ray fabrication and soft x-ray simulations

    Energy Technology Data Exchange (ETDEWEB)

    Li, Kenan; Wojcik, Michael J.; Ocola, Leonidas E.; Divan, Ralu; Jacobsen, Chris

    2015-11-01

    Fresnel zone plates are widely used as x-ray nanofocusing optics. To achieve high spatial resolution combined with good focusing efficiency, high aspect ratio nanolithography is required, and one way to achieve that is through multiple e-beam lithography writing steps to achieve on-chip stacking. A two-step writing process producing 50 nm finest zone width at a zone thickness of 1.14 µm for possible hard x-ray applications is shown here. The authors also consider in simulations the case of soft x-ray focusing where the zone thickness might exceed the depth of focus. In this case, the authors compare on-chip stacking with, and without, adjustment of zone positions and show that the offset zones lead to improved focusing efficiency. The simulations were carried out using a multislice propagation method employing Hankel transforms.

  1. Semipolar III–nitride quantum well waveguide photodetector integrated with laser diode for on-chip photonic system

    KAUST Repository

    Shen, Chao; Lee, Changmin; Stegenburgs, Edgars; Lerma, Jorge Holguin; Ng, Tien Khee; Nakamura, Shuji; DenBaars, Steven P.; Alyamani, Ahmed Y.; El-Desouki, Munir M.; Ooi, Boon S.

    2017-01-01

    A high-performance waveguide photodetector (WPD) integrated with a laser diode (LD) sharing the single InGaN/GaN quantum well active region is demonstrated on a semipolar GaN substrate. The photocurrent of the integrated WPD is effectively tuned by the emitted optical power from the LD. The responsivity ranges from 0.018 to 0.051 A/W with increasing reverse bias from 0 to 10 V. The WPD shows a large 3 dB modulation bandwidth of 230 MHz. The integrated device, being used for power monitoring and on-chip communication, paves the way towards the eventual realization of a III–nitride on-chip photonic system.

  2. Coupling of erbium dopants to yttrium orthosilicate photonic crystal cavities for on-chip optical quantum memories

    Energy Technology Data Exchange (ETDEWEB)

    Miyazono, Evan; Zhong, Tian; Craiciu, Ioana; Kindem, Jonathan M.; Faraon, Andrei, E-mail: faraon@caltech.edu [T. J. Watson Laboratory of Applied Physics, California Institute of Technology, 1200 E California Blvd, Pasadena, California 91125 (United States)

    2016-01-04

    Erbium dopants in crystals exhibit highly coherent optical transitions well suited for solid-state optical quantum memories operating in the telecom band. Here, we demonstrate coupling of erbium dopant ions in yttrium orthosilicate to a photonic crystal cavity fabricated directly in the host crystal using focused ion beam milling. The coupling leads to reduction of the photoluminescence lifetime and enhancement of the optical depth in microns-long devices, which will enable on-chip quantum memories.

  3. Efficient On-chip Optical Microresonator for Optical Comb Generation: Design and Fabrication

    Science.gov (United States)

    Han, Kyunghun

    An optical frequency comb is a series of equally spaced frequency components. It has gained much attention since Nobel physics prize was awarded John L. Hall and Theodor W. Hansch for their contribution to the optical frequency comb technique in 2005. The optical frequency comb has been extensively studied because of its precision as a tool for spectroscopy, and is now widely used in bio- and chemical sensors, optical clocks, mode-locked dark pulse generation, soliton generation, and optical communication. Recently, thanks to the developments in nanotechnology, the optical frequency comb generation is made possible at a chip-scale level with microresonators. However, because the threshold power of the optical frequency comb generation is beyond the capability of the on-chip laser source, efficient microresonator is required. Here, we demonstrate an ultra-compact and highly efficient strip-slot direct mode coupler, aiming to achieve slotted silicon microresonator cladded with nonlinear polymer Poly-DDMEBT in SOI platform. As an application of the strip-slot direct mode coupling, a double slot fiber-to-chip edge coupler is demonstrated showing 2 dB insertion loss reduction compared to the conventional single tip edge coupler. For silicon nitride platform, we investigated evanescent wave coupling of microresonator, focusing on bus waveguide geometry optimization. The optimized waveguide width offers an efficient excitation of a fundamental mode in the resonator waveguide. This investigation can benefit low threshold comb generation by enhancing the extinction ratio. We experimentally demonstrated the high Q-factor micro-ring resonator with intrinsic Q of 12.6 million as well as the single FSR comb generation with 63 mW.

  4. A Spacecraft Housekeeping System-on-Chip in a Radiation Hardened Structured ASIC

    Science.gov (United States)

    Suarez, George; DuMonthier, Jeffrey J.; Sheikh, Salman S.; Powell, Wesley A.; King, Robyn L.

    2012-01-01

    Housekeeping systems are essential to health monitoring of spacecraft and instruments. Typically, sensors are distributed across various sub-systems and data is collected using components such as analog-to-digital converters, analog multiplexers and amplifiers. In most cases programmable devices are used to implement the data acquisition control and storage, and the interface to higher level systems. Such discrete implementations require additional size, weight, power and interconnect complexity versus an integrated circuit solution, as well as the qualification of multiple parts. Although commercial devices are readily available, they are not suitable for space applications due the radiation tolerance and qualification requirements. The Housekeeping System-o n-A-Chip (HKSOC) is a low power, radiation hardened integrated solution suitable for spacecraft and instrument control and data collection. A prototype has been designed and includes a wide variety of functions including a 16-channel analog front-end for driving and reading sensors, analog-to-digital and digital-to-analog converters, on-chip temperature sensor, power supply current sense circuits, general purpose comparators and amplifiers, a 32-bit processor, digital I/O, pulse-width modulation (PWM) generators, timers and I2C master and slave serial interfaces. In addition, the device can operate in a bypass mode where the processor is disabled and external logic is used to control the analog and mixed signal functions. The device is suitable for stand-alone or distributed systems where multiple chips can be deployed across different sub-systems as intelligent nodes with computing and processing capabilities.

  5. On-Chip Microfluidic Components for In Situ Analysis, Separation, and Detection of Amino Acids

    Science.gov (United States)

    Zheng, Yun; Getty, Stephanie; Dworkin, Jason; Balvin, Manuel; Kotecki, Carl

    2013-01-01

    The Astrobiology Analytical Laboratory at GSFC has identified amino acids in meteorites and returned cometary samples by using liquid chromatography-electrospray ionization time-of-flight mass spectrometry (LCMS). These organic species are key markers for life, having the property of chirality that can be used to distinguish biological from non-biological amino acids. One of the critical components in the benchtop instrument is liquid chromatography (LC) analytical column. The commercial LC analytical column is an over- 250-mm-long and 4.6-mm-diameter stainless steel tube filled with functionized microbeads as stationary phase to separate the molecular species based on their chemistry. Miniaturization of this technique for spaceflight is compelling for future payloads for landed missions targeting astrobiology objectives. A commercial liquid chromatography analytical column consists of an inert cylindrical tube filled with a stationary phase, i.e., microbeads, that has been functionalized with a targeted chemistry. When analyte is sent through the column by a pressurized carrier fluid (typically a methanol/ water mixture), compounds are separated in time due to differences in chemical interactions with the stationary phase. Different species of analyte molecules will interact more strongly with the column chemistry, and will therefore take longer to traverse the column. In this way, the column will separate molecular species based on their chemistry. A lab-on-chip liquid analysis tool was developed. The microfluidic analytical column is capable of chromatographically separating biologically relevant classes of molecules based on their chemistry. For this analytical column, fabrication, low leak rate, and stationary phase incorporation of a serpentine microchannel were demonstrated that mimic the dimensions of a commercial LC column within a 5 10 1 mm chip. The microchannel in the chip has a 75- micrometer-diameter oval-shaped cross section. The serpentine

  6. SuperSpec, The On-Chip Spectrometer: Improved NEP and Antenna Performance

    Science.gov (United States)

    Wheeler, Jordan; Hailey-Dunsheath, S.; Shirokoff, E.; Barry, P. S.; Bradford, C. M.; Chapman, S.; Che, G.; Doyle, S.; Glenn, J.; Gordon, S.; Hollister, M.; Kovács, A.; LeDuc, H. G.; Mauskopf, P.; McGeehan, R.; McKenney, C.; Reck, T.; Redford, J.; Ross, C.; Shiu, C.; Tucker, C.; Turner, J.; Walker, S.; Zmuidzinas, J.

    2018-05-01

    SuperSpec is a new technology for mm and sub-mm spectroscopy. It is an on-chip spectrometer being developed for multi-object, moderate-resolution (R˜ 300 ), large bandwidth survey spectroscopy of high-redshift galaxies for the 1 mm atmospheric window. This band accesses the CO ladder in the redshift range of z = 0-4 and the [CII] 158 μm line from redshift z = 5-9. SuperSpec employs a novel architecture in which detectors are coupled to a series of resonant filters along a single microwave feedline instead of using dispersive optics. This construction allows for the creation of a full spectrometer occupying only ˜ 10 cm^2 of silicon, a reduction in size of several orders of magnitude when compared to standard grating spectrometers. This small profile enables the production of future multi-beam spectroscopic instruments envisioned for the millimeter band to measure the redshifts of dusty galaxies efficiently. The SuperSpec collaboration is currently pushing toward the deployment of a SuperSpec demonstration instrument in fall of 2018. The progress with the latest SuperSpec prototype devices is presented; reporting increased responsivity via a reduced inductor volume (2.6 μm^3 ) and the incorporation of a new broadband antenna. A detector NEP of 3-4 × 10^{-18} W/Hz^{0.5} is obtained, sufficient for background-limited observation on mountaintop sites. In addition, beam maps and efficiency measurements of a new wide-band dual bow-tie slot antenna are shown.

  7. Bubble-free on-chip continuous-flow polymerase chain reaction: concept and application.

    Science.gov (United States)

    Wu, Wenming; Kang, Kyung-Tae; Lee, Nae Yoon

    2011-06-07

    Bubble formation inside a microscale channel is a significant problem in general microfluidic experiments. The problem becomes especially crucial when performing a polymerase chain reaction (PCR) on a chip which is subject to repetitive temperature changes. In this paper, we propose a bubble-free sample injection scheme applicable for continuous-flow PCR inside a glass/PDMS hybrid microfluidic chip, and attempt to provide a theoretical basis concerning bubble formation and elimination. Highly viscous paraffin oil plugs are employed in both the anterior and posterior ends of a sample plug, completely encapsulating the sample and eliminating possible nucleation sites for bubbles. In this way, internal channel pressure is increased, and vaporization of the sample is prevented, suppressing bubble formation. Use of an oil plug in the posterior end of the sample plug aids in maintaining a stable flow of a sample at a constant rate inside a heated microchannel throughout the entire reaction, as compared to using an air plug. By adopting the proposed sample injection scheme, we demonstrate various practical applications. On-chip continuous-flow PCR is performed employing genomic DNA extracted from a clinical single hair root sample, and its D1S80 locus is successfully amplified. Also, chip reusability is assessed using a plasmid vector. A single chip is used up to 10 times repeatedly without being destroyed, maintaining almost equal intensities of the resulting amplicons after each run, ensuring the reliability and reproducibility of the proposed sample injection scheme. In addition, the use of a commercially-available and highly cost-effective hot plate as a potential candidate for the heating source is investigated.

  8. Excimer laser micropatterning of freestanding thermo-responsive hydrogel layers for cells-on-chip applications

    International Nuclear Information System (INIS)

    Santaniello, Tommaso; Milani, Paolo; Lenardi, Cristina; Martello, Federico; Tocchio, Alessandro; Gassa, Federico; Webb, Patrick

    2012-01-01

    We report a novel reliable and repeatable technologic manufacturing protocol for the realization of micro-patterned freestanding hydrogel layers based on thermo-responsive poly-(N-isopropyl)acrylamide (PNIPAAm), which have potential to be employed as temperature-triggered smart surfaces for cells-on-chip applications. PNIPAAm-based films with controlled mechanical properties and different thicknesses (100–300 µm thickness) were prepared by injection compression moulding at room temperature. A 9 × 9 array of 20 µm diameter through-holes is machined by means of the KrF excimer laser on dry PNIPAAm films which are physically attached to flat polyvinyl chloride (PVC) substrates. Machining parameters, such as fluence and number of shots, are optimized in order to achieve highly resolved features. Micro-structured freestanding films are then easily obtained after hydrogels are detached from PVC by gradually promoting the film swelling in ethanol. In the PNIPAAm water-swollen state, the machined holes’ diameter approaches a slight larger value (30 µm) according to the measured hydrogel swelling ratio. Thermo-responsive behaviour and through-hole tapering characterization are carried out by metrology measurements using an optical inverted and confocal microscope setup, respectively. After the temperature of freestanding films is raised above 32 °C, we observe that the shrinkage of the whole through-hole array occurs, thus reducing the holes’ diameter to less than a half its original size (about 15 µm) as a consequence of the film dehydration. Different holes’ diameters (10 and 30 µm) are also obtained on dry hydrogel employing suitable projection masks, showing similar shrinking behaviour when hydrated and undergone thermo-response tests. Thermo-responsive PNIPAAm-based freestanding layers could then be integrated with other suitable micro-fabricated thermoplastic components in order to preliminary test their feasibility in operating as temperature

  9. Selection of aptamers specific for glycated hemoglobin and total hemoglobin using on-chip SELEX.

    Science.gov (United States)

    Lin, Hsin-I; Wu, Ching-Chu; Yang, Ching-Hsuan; Chang, Ko-Wei; Lee, Gwo-Bin; Shiesh, Shu-Chu

    2015-01-21

    Blood glycated hemoglobin (HbA1c) levels reflecting average glucose concentrations over the past three months are fundamental for the diagnosis, monitoring, and risk assessment of diabetes. It has been hypothesized that aptamers, which are single-stranded DNAs or RNAs that demonstrate high affinity to a large variety of molecules ranging from small drugs, metabolites, or proteins, could be used for the measurement of HbA1c. Aptamers are selected through an in vitro process called systematic evolution of ligands by exponential enrichment (SELEX), and they can be chemically synthesized with high reproducibility at relatively low costs. This study therefore aimed to select HbA1c- and hemoglobin (Hb)-specific single-stranded DNA aptamers using an on-chip SELEX protocol. A microfluidic SELEX chip was developed to continuously and automatically carry out multiple rounds of SELEX to screen specific aptamers for HbA1c and Hb. HbA1c and Hb were first coated onto magnetic beads. Following several rounds of selection and enrichment with a randomized 40-mer DNA library, specific oligonucleotides were selected. The binding specificity and affinity were assessed by competitive and binding assays. Using the developed microfluidic system, the incubation and partitioning times were greatly decreased, and the entire process was shortened dramatically. Both HbA1c- and Hb-specific aptamers selected by the microfluidic system showed high specificity and affinity (dissociation constant, Kd = 7.6 ± 3.0 nM and 7.3 ± 2.2 nM for HbA1c and Hb, respectively). With further refinements in the assay, these aptamers may replace the conventional antibodies for in vitro diagnostics applications in the near future.

  10. Designing area optimized application-specific network-on-chip architectures while providing hard QoS guarantees.

    Directory of Open Access Journals (Sweden)

    Sajid Gul Khawaja

    Full Text Available With the increase of transistors' density, popularity of System on Chip (SoC has increased exponentially. As a communication module for SoC, Network on Chip (NoC framework has been adapted as its backbone. In this paper, we propose a methodology for designing area-optimized application specific NoC while providing hard Quality of Service (QoS guarantees for real time flows. The novelty of the proposed system lies in derivation of a Mixed Integer Linear Programming model which is then used to generate a resource optimal Network on Chip (NoC topology and architecture while considering traffic and QoS requirements. We also present the micro-architectural design features used for enabling traffic and latency guarantees and discuss how the solution adapts for dynamic variations in the application traffic. The paper highlights the effectiveness of proposed method by generating resource efficient NoC solutions for both industrial and benchmark applications. The area-optimized results are generated in few seconds by proposed technique, without resorting to heuristics, even for an application with 48 traffic flows.

  11. A piezo-ring-on-chip microfluidic device for simple and low-cost mass spectrometry interfacing.

    Science.gov (United States)

    Tsao, Chia-Wen; Lei, I-Chao; Chen, Pi-Yu; Yang, Yu-Liang

    2018-02-12

    Mass spectrometry (MS) interfacing technology provides the means for incorporating microfluidic processing with post MS analysis. In this study, we propose a simple piezo-ring-on-chip microfluidic device for the controlled spraying of MALDI-MS targets. This device uses a low-cost, commercially-available ring-shaped piezoelectric acoustic atomizer (piezo-ring) directly integrated into a polydimethylsiloxane microfluidic device to spray the sample onto the MS target substrate. The piezo-ring-on-chip microfluidic device's design, fabrication, and actuation, and its pulsatile pumping effects were evaluated. The spraying performance was examined by depositing organic matrix samples onto the MS target substrate by using both an automatic linear motion motor, and manual deposition. Matrix-assisted laser desorption/ionization mass spectrometry (MALDI-MS) was performed to analyze the peptide samples on the MALDI target substrates. Using our technique, model peptides with 10 -6 M concentration can be successfully detected. The results also indicate that the piezo-ring-on-chip approach forms finer matrix crystals and presents better MS signal uniformity with little sample consumption compared to the conventional pipetting method.

  12. Real time hybridization studies by resonant waveguide gratings using nanopattern imaging for Single Nucleotide Polymorphism detection

    KAUST Repository

    Bougot-Robin, Kristelle; Kodzius, Rimantas; Yue, Weisheng; Chen, Longqing; Li, Shunbo; Zhang, Xixiang; Bé nisty, Henri; Wen, Weijia

    2013-01-01

    2D imaging of biochips is particularly interesting for multiplex biosensing. Resonant properties allow label-free detection using the change of refractive index at the chip surface. We demonstrate a new principle of Scanning Of Resonance on Chip

  13. Compressive Sensing Based Bio-Inspired Shape Feature Detection CMOS Imager

    Science.gov (United States)

    Duong, Tuan A. (Inventor)

    2015-01-01

    A CMOS imager integrated circuit using compressive sensing and bio-inspired detection is presented which integrates novel functions and algorithms within a novel hardware architecture enabling efficient on-chip implementation.

  14. Microgels produced using microfluidic on-chip polymer blending for controlled released of VEGF encoding lentivectors.

    Science.gov (United States)

    Madrigal, Justin L; Sharma, Shonit N; Campbell, Kevin T; Stilhano, Roberta S; Gijsbers, Rik; Silva, Eduardo A

    2018-03-15

    Alginate hydrogels are widely used as delivery vehicles due to their ability to encapsulate and release a wide range of cargos in a gentle and biocompatible manner. The release of encapsulated therapeutic cargos can be promoted or stunted by adjusting the hydrogel physiochemical properties. However, the release from such systems is often skewed towards burst-release or lengthy retention. To address this, we hypothesized that the overall magnitude of burst release could be adjusted by combining microgels with distinct properties and release behavior. Microgel suspensions were generated using a process we have termed on-chip polymer blending to yield composite suspensions of a range of microgel formulations. In this manner, we studied how alginate percentage and degradation relate to the release of lentivectors. Whereas changes in alginate percentage had a minimal impact on lentivector release, microgel degradation led to a 3-fold increase, and near complete release, over 10 days. Furthermore, by controlling the amount of degradable alginate present within microgels the relative rate of release can be adjusted. A degradable formulation of microgels was used to deliver vascular endothelial growth factor (VEGF)-encoding lentivectors in the chick chorioallantoic membrane (CAM) assay and yielded a proangiogenic response in comparison to the same lentivectors delivered in suspension. The utility of blended microgel suspensions may provide an especially appealing platform for the delivery of lentivectors or similarly sized therapeutics. Genetic therapeutics hold considerable potential for the treatment of diseases and disorders including ischemic cardiovascular diseases. To realize this potential, genetic vectors must be precisely and efficiently delivered to targeted regions of the body. However, conventional methods of delivery do not provide sufficient spatial and temporal control. Here, we demonstrate how alginate microgels provide a basis for developing systems for

  15. Electro-mechanical control of an on-chip optical beam splitter containing an embedded quantum emitter

    Science.gov (United States)

    Bishop, Z. K.; Foster, A. P.; Royall, B.; Bentham, C.; Clarke, E.; Skolnick, M. S.; Wilson, L. R.

    2018-05-01

    We demonstrate electro-mechanical control of an on-chip GaAs optical beam splitter containing a quantum dot single-photon source. The beam splitter consists of two nanobeam waveguides, which form a directional coupler (DC). The splitting ratio of the DC is controlled by varying the out-of-plane separation of the two waveguides using electro-mechanical actuation. We reversibly tune the beam splitter between an initial state, with emission into both output arms, and a final state with photons emitted into a single output arm. The device represents a compact and scalable tuning approach for use in III-V semiconductor integrated quantum optical circuits.

  16. Electro-mechanical control of an on-chip optical beam splitter containing an embedded quantum emitter.

    Science.gov (United States)

    Bishop, Z K; Foster, A P; Royall, B; Bentham, C; Clarke, E; Skolnick, M S; Wilson, L R

    2018-05-01

    We demonstrate electro-mechanical control of an on-chip GaAs optical beam splitter containing a quantum dot single-photon source. The beam splitter consists of two nanobeam waveguides, which form a directional coupler (DC). The splitting ratio of the DC is controlled by varying the out-of-plane separation of the two waveguides using electromechanical actuation. We reversibly tune the beam splitter between an initial state, with emission into both output arms, and a final state with photons emitted into a single output arm. The device represents a compact and scalable tuning approach for use in III-V semiconductor integrated quantum optical circuits.

  17. Embedded software design and programming of multiprocessor system-on-chip simulink and system C case studies

    CERN Document Server

    Popovici, Katalin; Jerraya, Ahmed A; Wolf, Marilyn

    2010-01-01

    Current multimedia and telecom applications require complex, heterogeneous multiprocessor system on chip (MPSoC) architectures with specific communication infrastructure in order to achieve the required performance. Heterogeneous MPSoC includes different types of processing units (DSP, microcontroller, ASIP) and different communication schemes (fast links, non standard memory organization and access).Programming an MPSoC requires the generation of efficient software running on MPSoC from a high level environment, by using the characteristics of the architecture. This task is known to be tediou

  18. Design of the ANTARES LCM-DAQ board test bench using a FPGA-based system-on-chip approach

    Energy Technology Data Exchange (ETDEWEB)

    Anvar, S. [CEA Saclay, DAPNIA/SEDI, 91191 Gif-sur-Yvette Cedex (France); Kestener, P. [CEA Saclay, DAPNIA/SEDI, 91191 Gif-sur-Yvette Cedex (France)]. E-mail: pierre.kestener@cea.fr; Le Provost, H. [CEA Saclay, DAPNIA/SEDI, 91191 Gif-sur-Yvette Cedex (France)

    2006-11-15

    The System-on-Chip (SoC) approach consists in using state-of-the-art FPGA devices with embedded RISC processor cores, high-speed differential LVDS links and ready-to-use multi-gigabit transceivers allowing development of compact systems with substantial number of IO channels. Required performances are obtained through a subtle separation of tasks between closely cooperating programmable hardware logic and user-friendly software environment. We report about our experience in using the SoC approach for designing the production test bench of the off-shore readout system for the ANTARES neutrino experiment.

  19. On-chip food safety monitoring: multi-analyte screening with imaging surface plasmon resonance-based biosensor

    NARCIS (Netherlands)

    Rebe, S.

    2010-01-01

    Food safety is an increasing health concern, recognised and promoted by many
    institutions across the globe. Food products can be contaminated with pathogenic
    microorganisms, environmental pollutants, veterinary drug residues, allergens and toxins.
    Public health concerns which have

  20. Slow Light Based On-Chip High Resolution Fourier Transform Spectrometer For Geostationary Imaging of Atmospheric Greenhouse Gases, Phase I

    Data.gov (United States)

    National Aeronautics and Space Administration — Fourier transform spectroscopy (FTS) in infrared wavelength range is an effective measure for global greenhouse gas monitoring. However, conventional FTS instruments...

  1. Package-friendly piezoresistive pressure sensors with on-chip integrated packaging-stress-suppressed suspension (PS3) technology

    International Nuclear Information System (INIS)

    Wang, Jiachou; Li, Xinxin

    2013-01-01

    An on-chip integrated packaging-stress-suppressed suspension (PS 3 ) technology for a packaging-stress-free pressure sensor is proposed and developed. With a MIS (microholes interetch and sealing) micromachining process implemented only from the front-side of a single-side polished (1 1 1) silicon wafer, a compact cantilever-shaped PS 3 is on-chip integrated surrounding a piezoresistive pressure-sensing structure to provide a packaging-process/substrate-friendly method for low-cost but high-performance sensor applications. With the MIS process, the chip size of the PS 3 -enclosed pressure sensor is as small as 0.8 mm × 0.8 mm. Compared with a normal pressure sensor without PS 3 (but with an identical pressure-sensing structure), the proposed pressure sensor has the same sensitivity of 0.046 mV kPa −1 (3.3 V) −1 . However, without using the thermal compensation technique, a temperature coefficient of offset of only 0.016% °C −1 FS is noted for the sensor with PS 3 , which is about 15 times better than that for the sensor without PS 3 . Featuring effective isolation and elimination of the influence from packaging stress, the PS 3 technique is promising to be widely used for packaging-friendly mechanical sensors. (paper)

  2. A Low-Power and Low-Voltage Power Management Strategy for On-Chip Micro Solar Cells

    Directory of Open Access Journals (Sweden)

    Ismail Cevik

    2015-01-01

    Full Text Available Fundamental characteristics of on-chip micro solar cell (MSC structures were investigated in this study. Several MSC structures using different layers in three different CMOS processes were designed and fabricated. Effects of PN junction structure and process technology on solar cell performance were measured. Parameters for low-power and low-voltage implementation of power management strategy and boost converter based circuits utilizing fractional voltage maximum power point tracking (FVMPPT algorithm were determined. The FVMPPT algorithm works based on the fraction between the maximum power point operation voltage and the open circuit voltage of the solar cell structure. This ratio is typically between 0.72 and 0.78 for commercially available poly crystalline silicon solar cells that produce several watts of power under typical daylight illumination. Measurements showed that the fractional voltage ratio is much higher and fairly constant between 0.82 and 0.85 for on-chip mono crystalline silicon micro solar cell structures that produce micro watts of power. Mono crystalline silicon solar cell structures were observed to result in better power fill factor (PFF that is higher than 74% indicating a higher energy harvesting efficiency.

  3. Scalable fabrication of high-power graphene micro-supercapacitors for flexible and on-chip energy storage

    Science.gov (United States)

    El-Kady, Maher F.; Kaner, Richard B.

    2013-02-01

    The rapid development of miniaturized electronic devices has increased the demand for compact on-chip energy storage. Microscale supercapacitors have great potential to complement or replace batteries and electrolytic capacitors in a variety of applications. However, conventional micro-fabrication techniques have proven to be cumbersome in building cost-effective micro-devices, thus limiting their widespread application. Here we demonstrate a scalable fabrication of graphene micro-supercapacitors over large areas by direct laser writing on graphite oxide films using a standard LightScribe DVD burner. More than 100 micro-supercapacitors can be produced on a single disc in 30 min or less. The devices are built on flexible substrates for flexible electronics and on-chip uses that can be integrated with MEMS or CMOS in a single chip. Remarkably, miniaturizing the devices to the microscale results in enhanced charge-storage capacity and rate capability. These micro-supercapacitors demonstrate a power density of ~200 W cm-3, which is among the highest values achieved for any supercapacitor.

  4. On-chip supercapacitors with ultrahigh volumetric performance based on electrochemically co-deposited CuO/polypyrrole nanosheet arrays

    Science.gov (United States)

    Qian, Tao; Zhou, Jinqiu; Xu, Na; Yang, Tingzhou; Shen, Xiaowei; Liu, Xuejun; Wu, Shishan; Yan, Chenglin

    2015-10-01

    We introduce a new method for fabricating unique on-chip supercapacitors based on CuO/polypyrrole core/shell nanosheet arrays by means of direct electrochemical co-deposition on interdigital-like electrodes. The prepared all-solid-state device demonstrates exceptionally high specific capacitance of 1275.5 F cm-3 (˜40 times larger than that of CuO-only supercapacitors) and high-energy-density of 28.35 mWh cm-3, which are both significantly greater than other solid-state supercapacitors. More importantly, the device maintains approximately 100% capacity retention at 2.5 A cm-3 after 3000 cycles. The in situ co-deposition of CuO/polypyrrole nanosheets on interdigital substrate enables effective charge transport, electrode fabrication integrity, and device integration. Because of their high energy, power density, and stable cycling stability, these newly developed on-chip supercapacitors permit fast, reliable applications in portable and miniaturized electronic devices.

  5. Electrochemical behavior of high performance on-chip porous carbon films for micro-supercapacitors applications in organic electrolytes

    Science.gov (United States)

    Brousse, K.; Huang, P.; Pinaud, S.; Respaud, M.; Daffos, B.; Chaudret, B.; Lethien, C.; Taberna, P. L.; Simon, P.

    2016-10-01

    Carbide derived carbons (CDCs) are promising materials for preparing integrated micro-supercapacitors, as on-chip CDC films are prepared via a process fully compatible with current silicon-based device technology. These films show good adherence on the substrate and high capacitance thanks to their unique nanoporous structure which can be fine-tuned by adjusting the synthesis parameters during chlorination of the metallic carbide precursor. The carbon porosity is mostly related to the synthesis temperature whereas the thickness of the films depends on the chlorination duration. Increasing the pore size allows the adsorption of large solvated ions from organic electrolytes and leads to higher energy densities. Here, we investigated the electrochemical behavior and performance of on-chip TiC-CDC in ionic liquid solvent mixtures of 1-ethyl-3-methylimidazolium tetrafluoroborate (EMIBF4) diluted in either acetonitrile or propylene carbonate via cyclic voltammetry and electrochemical impedance spectroscopy. Thin CDC films exhibited typical capacitive signature and achieved 169 F cm-3 in both electrolytes; 65% of the capacitance was still delivered at 1 V s-1. While increasing the thickness of the films, EMI+ transport limitation was observed in more viscous PC-based electrolyte. Nevertheless, the energy density reached 90 μW h cm-2 in 2M EMIBF4/ACN, confirming the interest of these CDC films for micro-supercapacitors applications.

  6. On-chip supercapacitors with ultrahigh volumetric performance based on electrochemically co-deposited CuO/polypyrrole nanosheet arrays.

    Science.gov (United States)

    Qian, Tao; Zhou, Jinqiu; Xu, Na; Yang, Tingzhou; Shen, Xiaowei; Liu, Xuejun; Wu, Shishan; Yan, Chenglin

    2015-10-23

    We introduce a new method for fabricating unique on-chip supercapacitors based on CuO/polypyrrole core/shell nanosheet arrays by means of direct electrochemical co-deposition on interdigital-like electrodes. The prepared all-solid-state device demonstrates exceptionally high specific capacitance of 1275.5 F cm(-3) (∼40 times larger than that of CuO-only supercapacitors) and high-energy-density of 28.35 mWh cm(-3), which are both significantly greater than other solid-state supercapacitors. More importantly, the device maintains approximately 100% capacity retention at 2.5 A cm(-3) after 3000 cycles. The in situ co-deposition of CuO/polypyrrole nanosheets on interdigital substrate enables effective charge transport, electrode fabrication integrity, and device integration. Because of their high energy, power density, and stable cycling stability, these newly developed on-chip supercapacitors permit fast, reliable applications in portable and miniaturized electronic devices.

  7. Plasmonic nanoparticles-decorated diatomite biosilica: extending the horizon of on-chip chromatography and label-free biosensing.

    Science.gov (United States)

    Kong, Xianming; Li, Erwen; Squire, Kenny; Liu, Ye; Wu, Bo; Cheng, Li-Jing; Wang, Alan X

    2017-11-01

    Diatomite consists of fossilized remains of ancient diatoms and is a type of naturally abundant photonic crystal biosilica with multiple unique physical and chemical functionalities. In this paper, we explored the fluidic properties of diatomite as the matrix for on-chip chromatography and, simultaneously, the photonic crystal effects to enhance the plasmonic resonances of metallic nanoparticles for surface-enhanced Raman scattering (SERS) biosensing. The plasmonic nanoparticle-decorated diatomite biosilica provides a lab-on-a-chip capability to separate and detect small molecules from mixture samples with ultra-high detection sensitivity down to 1 ppm. We demonstrate the significant potential for biomedical applications by screening toxins in real biofluid, achieving simultaneous label-free biosensing of phenethylamine and miR21cDNA in human plasma with unprecedented sensitivity and specificity. To the best of our knowledge, this is the first time demonstration to detect target molecules from real biofluids by on-chip chromatography-SERS techniques. © 2017 Wiley-VCH Verlag GmbH & Co. KGaA, Weinheim.

  8. On-chip supercapacitors with ultrahigh volumetric performance based on electrochemically co-deposited CuO/polypyrrole nanosheet arrays

    International Nuclear Information System (INIS)

    Qian, Tao; Zhou, Jinqiu; Xu, Na; Yang, Tingzhou; Shen, Xiaowei; Liu, Xuejun; Yan, Chenglin; Wu, Shishan

    2015-01-01

    We introduce a new method for fabricating unique on-chip supercapacitors based on CuO/polypyrrole core/shell nanosheet arrays by means of direct electrochemical co-deposition on interdigital-like electrodes. The prepared all-solid-state device demonstrates exceptionally high specific capacitance of 1275.5 F cm"−"3 (∼40 times larger than that of CuO-only supercapacitors) and high-energy-density of 28.35 mWh cm"−"3, which are both significantly greater than other solid-state supercapacitors. More importantly, the device maintains approximately 100% capacity retention at 2.5 A cm"−"3 after 3000 cycles. The in situ co-deposition of CuO/polypyrrole nanosheets on interdigital substrate enables effective charge transport, electrode fabrication integrity, and device integration. Because of their high energy, power density, and stable cycling stability, these newly developed on-chip supercapacitors permit fast, reliable applications in portable and miniaturized electronic devices. (paper)

  9. Design of a 40-nm CMOS integrated on-chip oscilloscope for 5-50 GHz spin wave characterization

    Science.gov (United States)

    Egel, Eugen; Csaba, György; Dietz, Andreas; Breitkreutz-von Gamm, Stephan; Russer, Johannes; Russer, Peter; Kreupl, Franz; Becherer, Markus

    2018-05-01

    Spin wave (SW) devices are receiving growing attention in research as a strong candidate for low power applications in the beyond-CMOS era. All SW applications would require an efficient, low power, on-chip read-out circuitry. Thus, we provide a concept for an on-chip oscilloscope (OCO) allowing parallel detection of the SWs at different frequencies. The readout system is designed in 40-nm CMOS technology and is capable of SW device characterization. First, the SWs are picked up by near field loop antennas, placed below yttrium iron garnet (YIG) film, and amplified by a low noise amplifier (LNA). Second, a mixer down-converts the radio frequency (RF) signal of 5 - 50 GHz to lower intermediate frequencies (IF) around 10 - 50 MHz. Finally, the IF signal can be digitized and analyzed regarding the frequency, amplitude and phase variation of the SWs. The power consumption and chip area of the whole OCO are estimated to 166.4 mW and 1.31 mm2, respectively.

  10. Full on-chip and area-efficient CMOS LDO with zero to maximum load stability using adaptive frequency compensation

    Energy Technology Data Exchange (ETDEWEB)

    Ma Haifeng; Zhou Feng, E-mail: fengzhou@fudan.edu.c [State Key Laboratory of ASIC and System, Fudan University, Shanghai 201203 (China)

    2010-01-15

    A full on-chip and area-efficient low-dropout linear regulator (LDO) is presented. By using the proposed adaptive frequency compensation (AFC) technique, full on-chip integration is achieved without compromising the LDO's stability in the full output current range. Meanwhile, the use of a compact pass transistor (the compact pass transistor serves as the gain fast roll-off output stage in the AFC technique) has enabled the LDO to be very area-efficient. The proposed LDO is implemented in standard 0.35 {mu}m CMOS technology and occupies an active area as small as 220 x 320 {mu}m{sup 2}, which is a reduction to 58% compared to state-of-the-art designs using technologies with the same feature size. Measurement results show that the LDO can deliver 0-60 mA output current with 54 {mu}A quiescent current consumption and the regulated output voltage is 1.8 V with an input voltage range from 2 to 3.3 V. (semiconductor integrated circuits)

  11. Combining SDM-Based Circuit Switching with Packet Switching in a Router for On-Chip Networks

    Directory of Open Access Journals (Sweden)

    Angelo Kuti Lusala

    2012-01-01

    Full Text Available A Hybrid router architecture for Networks-on-Chip “NoC” is presented, it combines Spatial Division Multiplexing “SDM” based circuit switching and packet switching in order to efficiently and separately handle both streaming and best-effort traffic generated in real-time applications. Furthermore the SDM technique is combined with Time Division Multiplexing “TDM” technique in the circuit switching part in order to increase path diversity, thus improving throughput while sharing communication resources among multiple connections. Combining these two techniques allows mitigating the poor resource usage inherent to circuit switching. In this way Quality of Service “QoS” is easily provided for the streaming traffic through the circuit-switched sub-router while the packet-switched sub-router handles best-effort traffic. The proposed hybrid router architectures were synthesized, placed and routed on an FPGA. Results show that a practicable Network-on-Chip “NoC” can be built using the proposed router architectures. 7 × 7 mesh NoCs were simulated in SystemC. Simulation results show that the probability of establishing paths through the NoC increases with the number of sub-channels and has its highest value when combining SDM with TDM, thereby significantly reducing contention in the NoC.

  12. Development of a lab-on-chip electrochemical biosensor for water quality analysis based on microalgal photosynthesis.

    Science.gov (United States)

    Tsopela, A; Laborde, A; Salvagnac, L; Ventalon, V; Bedel-Pereira, E; Séguy, I; Temple-Boyer, P; Juneau, P; Izquierdo, R; Launay, J

    2016-05-15

    The present work was dedicated to the development of a lab-on-chip device for water toxicity analysis and more particularly herbicide detection in water. It consists in a portable system for on-site detection composed of three-electrode electrochemical microcells, integrated on a fluidic platform constructed on a glass substrate. The final goal is to yield a system that gives the possibility of conducting double, complementary detection: electrochemical and optical and therefore all materials used for the fabrication of the lab-on-chip platform were selected in order to obtain a device compatible with optical technology. The basic detection principle consisted in electrochemically monitoring disturbances in metabolic photosynthetic activities of algae induced by the presence of Diuron herbicide. Algal response, evaluated through oxygen (O2) monitoring through photosynthesis was different for each herbicide concentration in the examined sample. A concentration-dependent inhibition effect of the herbicide on photosynthesis was demonstrated. Herbicide detection was achieved through a range (blank - 1 µM Diuron herbicide solution) covering the limit of maximum acceptable concentration imposed by Canadian government (0.64 µM), using a halogen white light source for the stimulation of algal photosynthetic apparatus. Superior sensitivity results (limit of detection of around 0.1 µM) were obtained with an organic light emitting diode (OLED), having an emission spectrum adapted to algal absorption spectrum and assembled on the final system. Copyright © 2015 Elsevier B.V. All rights reserved.

  13. Full on-chip and area-efficient CMOS LDO with zero to maximum load stability using adaptive frequency compensation

    International Nuclear Information System (INIS)

    Ma Haifeng; Zhou Feng

    2010-01-01

    A full on-chip and area-efficient low-dropout linear regulator (LDO) is presented. By using the proposed adaptive frequency compensation (AFC) technique, full on-chip integration is achieved without compromising the LDO's stability in the full output current range. Meanwhile, the use of a compact pass transistor (the compact pass transistor serves as the gain fast roll-off output stage in the AFC technique) has enabled the LDO to be very area-efficient. The proposed LDO is implemented in standard 0.35 μm CMOS technology and occupies an active area as small as 220 x 320 μm 2 , which is a reduction to 58% compared to state-of-the-art designs using technologies with the same feature size. Measurement results show that the LDO can deliver 0-60 mA output current with 54 μA quiescent current consumption and the regulated output voltage is 1.8 V with an input voltage range from 2 to 3.3 V. (semiconductor integrated circuits)

  14. On-chip fabrication of alkali-metal vapor cells utilizing an alkali-metal source tablet

    International Nuclear Information System (INIS)

    Tsujimoto, K; Hirai, Y; Sugano, K; Tsuchiya, T; Tabata, O; Ban, K; Mizutani, N

    2013-01-01

    We describe a novel on-chip microfabrication technique for the alkali-metal vapor cell of an optically pumped atomic magnetometer (OPAM), utilizing an alkali-metal source tablet (AMST). The newly proposed AMST is a millimeter-sized piece of porous alumina whose considerable surface area holds deposited alkali-metal chloride (KCl) and barium azide (BaN 6 ), source materials that effectively produce alkali-metal vapor at less than 400 °C. Our experiments indicated that the most effective pore size of the AMST is between 60 and 170 µm. The thickness of an insulating glass spacer holding the AMST was designed to confine generated alkali metal to the interior of the vapor cell during its production, and an integrated silicon heater was designed to seal the device using a glass frit, melted at an optimum temperature range of 460–490 °C that was determined by finite element method thermal simulation. The proposed design and AMST were used to successfully fabricate a K cell that was then operated as an OPAM with a measured sensitivity of 50 pT. These results demonstrate that the proposed concept for on-chip microfabrication of alkali-metal vapor cells may lead to effective replacement of conventional glassworking approaches. (paper)

  15. Lab-on-chip system combining a microfluidic-ELISA with an array of amorphous silicon photosensors for the detection of celiac disease epitopes

    Directory of Open Access Journals (Sweden)

    Francesca Costantini

    2015-12-01

    Full Text Available This work presents a lab-on-chip system, which combines a glass-polydimethilsiloxane microfluidic network and an array of amorphous silicon photosensors for the diagnosis and follow-up of Celiac disease. The microfluidic chip implements an on-chip enzyme-linked immunosorbent assay (ELISA, relying on a sandwich immunoassay between antibodies against gliadin peptides (GPs and a secondary antibody marked with horseradish peroxidase (Ig-HRP. This enzyme catalyzes a chemiluminescent reaction, whose light intensity is detected by the amorphous silicon photosensors and transduced into an electrical signal that can be processed to recognize the presence of antibodies against GPs in the serum of people affected by Celiac syndrome.The correct operation of the developed lab-on-chip has been demonstrated using rabbit serum in the microfluidic ELISA. In particular, optimizing the dilution factors of both sera and Ig-HRP samples in the flowing solutions, the specific and non-specific antibodies against GPs can be successfully distinguished, showing the suitability of the presented device to effectively screen celiac disease epitopes. Keywords: Lab-on-chip, Celiac disease, Microfluidics, On-chip detection, ELISA, Amorphous silicon photosensors

  16. Nanofabrication for On-Chip Optical Levitation, Atom-Trapping, and Superconducting Quantum Circuits

    Science.gov (United States)

    Norte, Richard Alexander

    Researchers have spent decades refining and improving their methods for fabricating smaller, finer-tuned, higher-quality nanoscale optical elements with the goal of making more sensitive and accurate measurements of the world around them using optics. Quantum optics has been a well-established tool of choice in making these increasingly sensitive measurements which have repeatedly pushed the limits on the accuracy of measurement set forth by quantum mechanics. A recent development in quantum optics has been a creative integration of robust, high-quality, and well-established macroscopic experimental systems with highly-engineerable on-chip nanoscale oscillators fabricated in cleanrooms. However, merging large systems with nanoscale oscillators often require them to have extremely high aspect-ratios, which make them extremely delicate and difficult to fabricate with an experimentally reasonable repeatability, yield and high quality. In this work we give an overview of our research, which focused on microscopic oscillators which are coupled with macroscopic optical cavities towards the goal of cooling them to their motional ground state in room temperature environments. The quality factor of a mechanical resonator is an important figure of merit for various sensing applications and observing quantum behavior. We demonstrated a technique for pushing the quality factor of a micromechanical resonator beyond conventional material and fabrication limits by using an optical field to stiffen and trap a particular motional mode of a nanoscale oscillator. Optical forces increase the oscillation frequency by storing most of the mechanical energy in a nearly loss-less optical potential, thereby strongly diluting the effects of material dissipation. By placing a 130 nm thick SiO2 pendulum in an optical standing wave, we achieve an increase in the pendulum center-of-mass frequency from 6.2 to 145 kHz. The corresponding quality factor increases 50-fold from its intrinsic value to

  17. Smart CMOS image sensor for lightning detection and imaging.

    Science.gov (United States)

    Rolando, Sébastien; Goiffon, Vincent; Magnan, Pierre; Corbière, Franck; Molina, Romain; Tulet, Michel; Bréart-de-Boisanger, Michel; Saint-Pé, Olivier; Guiry, Saïprasad; Larnaudie, Franck; Leone, Bruno; Perez-Cuevas, Leticia; Zayer, Igor

    2013-03-01

    We present a CMOS image sensor dedicated to lightning detection and imaging. The detector has been designed to evaluate the potentiality of an on-chip lightning detection solution based on a smart sensor. This evaluation is performed in the frame of the predevelopment phase of the lightning detector that will be implemented in the Meteosat Third Generation Imager satellite for the European Space Agency. The lightning detection process is performed by a smart detector combining an in-pixel frame-to-frame difference comparison with an adjustable threshold and on-chip digital processing allowing an efficient localization of a faint lightning pulse on the entire large format array at a frequency of 1 kHz. A CMOS prototype sensor with a 256×256 pixel array and a 60 μm pixel pitch has been fabricated using a 0.35 μm 2P 5M technology and tested to validate the selected detection approach.

  18. Computational sensing of herpes simplex virus using a cost-effective on-chip microscope

    KAUST Repository

    Ray, Aniruddha; Daloglu, Mustafa Ugur; Ho, Joslynn; Torres, Avee; Mcleod, Euan; Ozcan, Aydogan

    2017-01-01

    of specifically captured viruses that are surrounded by these self-assembled nanolenses are then reconstructed, and the phase image is used for automated quantification of the size of each particle within our large field-of-view, ~30 mm2. The combination of viral

  19. Diseño e Implementación de un Multiprocessor Systems-on-Chip (MPSoC Interconectado por una Networks-on-Chip (NoC

    Directory of Open Access Journals (Sweden)

    Wilson Mauricio Chicaiza

    2013-11-01

    Full Text Available En el presente documento se presenta una breve caracterización de los medios de comunicación empleados en arquitecturas multiprocesadas. Esta caracterización tiene como objetivo principal el mostrar un nuevo modelo de comunicación basado en conmutación de paquetes a los cuales se les denomina como Networks-On-Chip (NoC. Esta publicación muestra una arquitectura de red llamada NoC Hermes, la cual fue interconectada a un Multiprocessor-Systems-on-Chip (MPSoC compuesto de cuatro procesadores MicroBlaze. Está conexión se la realizó gracias al diseño y desarrollo de una Interfaz de Red generada en código VHDL. Por medio de la Interfaz de Red se consiguió que los procesadores MicroBlaze interactúen con los Switches de Hermes a fin de crear una arquitectura multiprocesada interconectada por una NoC. Con el motivo de realizar comparaciones también se creó otra arquitectura de multiprocesadores interconectados por buses. Para ambas arquitecturas se desarrolló una aplicación de Esteganografía enla que existe multiprocesamiento de dos procesadores trabajando simultáneamente. Lamentablemente sobre dicha aplicación no fue posible medir directamente la latencia y el consumo de energía, razón por la cual se utilizó simuladores que permitieron estimar dichas mediciones.

  20. A Reconfigurable and Biologically Inspired Paradigm for Computation Using Network-On-Chip and Spiking Neural Networks

    Directory of Open Access Journals (Sweden)

    Jim Harkin

    2009-01-01

    Full Text Available FPGA devices have emerged as a popular platform for the rapid prototyping of biological Spiking Neural Networks (SNNs applications, offering the key requirement of reconfigurability. However, FPGAs do not efficiently realise the biologically plausible neuron and synaptic models of SNNs, and current FPGA routing structures cannot accommodate the high levels of interneuron connectivity inherent in complex SNNs. This paper highlights and discusses the current challenges of implementing scalable SNNs on reconfigurable FPGAs. The paper proposes a novel field programmable neural network architecture (EMBRACE, incorporating low-power analogue spiking neurons, interconnected using a Network-on-Chip architecture. Results on the evaluation of the EMBRACE architecture using the XOR benchmark problem are presented, and the performance of the architecture is discussed. The paper also discusses the adaptability of the EMBRACE architecture in supporting fault tolerant computing.

  1. Note: A silicon-on-insulator microelectromechanical systems probe scanner for on-chip atomic force microscopy

    Energy Technology Data Exchange (ETDEWEB)

    Fowler, Anthony G.; Maroufi, Mohammad; Moheimani, S. O. Reza, E-mail: Reza.Moheimani@newcastle.edu.au [School of Electrical Engineering and Computer Science, University of Newcastle, Callaghan, NSW 2308 (Australia)

    2015-04-15

    A new microelectromechanical systems-based 2-degree-of-freedom (DoF) scanner with an integrated cantilever for on-chip atomic force microscopy (AFM) is presented. The silicon cantilever features a layer of piezoelectric material to facilitate its use for tapping mode AFM and enable simultaneous deflection sensing. Electrostatic actuators and electrothermal sensors are used to accurately position the cantilever within the x-y plane. Experimental testing shows that the cantilever is able to be scanned over a 10 μm × 10 μm window and that the cantilever achieves a peak-to-peak deflection greater than 400 nm when excited at its resonance frequency of approximately 62 kHz.

  2. Analysis of single-cell differences by use of an on-chip microculture system and optical trapping.

    Science.gov (United States)

    Wakamoto, Y; Inoue, I; Moriguchi, H; Yasuda, K

    2001-09-01

    A method is described for continuous observation of isolated single cells that enables genetically identical cells to be compared; it uses an on-chip microculture system and optical tweezers. Photolithography is used to construct microchambers with 5-microm-high walls made of thick photoresist (SU-8) on the surface of a glass slide. These microchambers are connected by a channel through which cells are transported, by means of optical tweezers, from a cultivation microchamber to an analysis microchamber, or from the analysis microchamber to a waste microchamber. The microchambers are covered with a semi-permeable membrane to separate them from nutrient medium circulating through a "cover chamber" above. Differential analysis of isolated direct descendants of single cells showed that this system could be used to compare genetically identical cells under contamination-free conditions. It should thus help in the clarification of heterogeneous phenomena, for example unequal cell division and cell differentiation.

  3. Test scheduling optimization for 3D network-on-chip based on cloud evolutionary algorithm of Pareto multi-objective

    Science.gov (United States)

    Xu, Chuanpei; Niu, Junhao; Ling, Jing; Wang, Suyan

    2018-03-01

    In this paper, we present a parallel test strategy for bandwidth division multiplexing under the test access mechanism bandwidth constraint. The Pareto solution set is combined with a cloud evolutionary algorithm to optimize the test time and power consumption of a three-dimensional network-on-chip (3D NoC). In the proposed method, all individuals in the population are sorted in non-dominated order and allocated to the corresponding level. Individuals with extreme and similar characteristics are then removed. To increase the diversity of the population and prevent the algorithm from becoming stuck around local optima, a competition strategy is designed for the individuals. Finally, we adopt an elite reservation strategy and update the individuals according to the cloud model. Experimental results show that the proposed algorithm converges to the optimal Pareto solution set rapidly and accurately. This not only obtains the shortest test time, but also optimizes the power consumption of the 3D NoC.

  4. On-chip measurements of Brownian relaxation of magnetic beads with diameters from 10 nm to 250 nm

    DEFF Research Database (Denmark)

    Østerberg, Frederik Westergaard; Rizzi, Giovanni; Hansen, Mikkel Fougt

    2013-01-01

    We demonstrate the use of planar Hall effect magnetoresistive sensors for AC susceptibility measurements of magnetic beads with frequencies ranging from DC to 1 MHz. This wide frequency range allows for measuring Brownian relaxation of magnetic beads with diameters ranging from 10 nm to 250 nm....... Brownian relaxation is measured for six different magnetic bead types and their hydrodynamic diameters are determined. The hydrodynamic diameters are found to be within 40% of the nominal bead diameters. We discuss the applicability of the different bead types for volume-based biosensing with respect...... to sedimentation, magnetic trapping, and signal per bead. Among the investigated beads, we conclude that the beads with a nominal diameter of 80 nm are best suited for future on-chip volume-based biosensing experiments using planar Hall effect sensors....

  5. A Novel Mu Rhythm-based Brain Computer Interface Design that uses a Programmable System on Chip.

    Science.gov (United States)

    Joshi, Rohan; Saraswat, Prateek; Gajendran, Rudhram

    2012-01-01

    This paper describes the system design of a portable and economical mu rhythm based Brain Computer Interface which employs Cypress Semiconductors Programmable System on Chip (PSoC). By carrying out essential processing on the PSoC, the use of an extra computer is eliminated, resulting in considerable cost savings. Microsoft Visual Studio 2005 and PSoC Designer 5.01 are employed in developing the software for the system, the hardware being custom designed. In order to test the usability of the BCI, preliminary testing is carried out by training three subjects who were able to demonstrate control over their electroencephalogram by moving a cursor present at the center of the screen towards the indicated direction with an average accuracy greater than 70% and a bit communication rate of up to 7 bits/min.

  6. Capacitance variation induced by microfluidic two-phase flow across insulated interdigital electrodes in lab-on-chip devices.

    Science.gov (United States)

    Dong, Tao; Barbosa, Cátia

    2015-01-26

    Microfluidic two-phase flow detection has attracted plenty of interest in various areas of biology, medicine and chemistry. This work presents a capacitive sensor using insulated interdigital electrodes (IDEs) to detect the presence of droplets in a microchannel. This droplet sensor is composed of a glass substrate, patterned gold electrodes and an insulation layer. A polydimethylsiloxane (PDMS) cover bonded to the multilayered structure forms a microchannel. Capacitance variation induced by the droplet passage was thoroughly investigated with both simulation and experimental work. Olive oil and deionized water were employed as the working fluids in the experiments to demonstrate the droplet sensor. The results show a good sensitivity of the droplet with the appropriate measurement connection. This capacitive droplet sensor is promising to be integrated into a lab-on-chip device for in situ monitoring/counting of droplets or bubbles.

  7. Development and applications of a multi-purpose digital controller with a System-on-Chip FPGA for accelerators

    Energy Technology Data Exchange (ETDEWEB)

    Kurimoto, Yoshinori, E-mail: kurimoto@post.j-parc.jp [High Energy Accelerator Research Organization (KEK), Ibaraki 319-1195 (Japan); Nakamura, Keigo [Department of Physics, Kyoto University, Kyoto 606-8502 (Japan)

    2016-12-21

    J-PARC Main Ring (MR) is a high intensity proton synchrotron which accelerates protons from 3 GeV to 30 GeV. It has operated at a beam intensity of 390 kW and an upgrade toward the megawatt rating is scheduled. For higher beam intensity, some of the accelerator components require more intelligent and complicated functions. To consolidate such functions among various components, we developed multi-purpose digital boards using a System-on-Chip Field-Programmable Gated Array (SoC FPGA). In this paper, we describe the details of our developed boards as well as their possible applications. As an application of the boards, we have successfully performed the measurement of the betatron amplitude function during beam acceleration in J-PARC MR. The experimental setup and results of the measurement are also described in detail.

  8. A dual-unit pressure sensor for on-chip self-compensation of zero-point temperature drift

    International Nuclear Information System (INIS)

    Wang, Jiachou; Li, Xinxin

    2014-01-01

    A novel dual-unit piezoresistive pressure sensor, consisting of a sensing unit and a dummy unit, is proposed and developed for on-chip self-compensation for zero-point temperature drift. With an MIS (microholes inter-etch and sealing) process implemented only from the front side of single (1 1 1) silicon wafers, a pressure sensitive unit and another identically structured pressure insensitive dummy unit are compactly integrated on-chip to eliminate unbalance factors induced zero-point temperature-drift by mutual compensation between the two units. Besides, both units are physically suspended from silicon substrate to further suppress packaging-stress induced temperature drift. A simultaneously processes ventilation hole-channel structure is connected with the pressure reference cavity of the dummy unit to make it insensitive to detected pressure. In spite of the additional dummy unit, the sensor chip dimensions are still as small as 1.2 mm × 1.2 mm × 0.4 mm. The proposed dual-unit sensor is fabricated and tested, with the tested sensitivity being 0.104 mV kPa −1 3.3 V −1 , nonlinearity of less than 0.08% · FSO and overall accuracy error of ± 0.18% · FSO. Without using any extra compensation method, the sensor features an ultra-low temperature coefficient of offset (TCO) of 0.002% °C −1 · FSO that is much better than the performance of conventional pressure sensors. The highly stable and small-sized sensors are promising for low cost production and applications. (paper)

  9. All-MXene (2D titanium carbide) solid-state microsupercapacitors for on-chip energy storage

    KAUST Repository

    Peng, You-Yu

    2016-08-01

    On-chip energy storage is a rapidly evolving research topic, opening doors for integration of batteries and supercapacitors at microscales on rigid and flexible platforms. Recently, a new class of two-dimensional (2D) transition metal carbides and nitrides (so-called MXenes) has shown great promise in electrochemical energy storage applications. Here, we report the fabrication of all-MXene (Ti3C2Tx) solid-state interdigital microsupercapacitors by employing a solution spray-coating, followed by a photoresist-free direct laser cutting method. Our prototype devices consisted of two layers of Ti3C2Tx with two different flake sizes. The bottom layer was stacked large-size MXene flakes (typical lateral dimensions of 3-6 μm) serving mainly as current collectors. The top layer was made of small-size MXene flakes (~1 μm) with a large number of defects and edges as the electroactive layer responsible for energy storage. Compared to Ti3C2Tx micro-supercapacitors with platinum current collectors, the all-MXene devices exhibited much lower contact resistance, higher capacitances and better rate-capabilities. The areal and volumetric capacitances of ~27 mF cm-2 and ~337 F cm-3, respectively, at a scan rate of 20 mV s-1 were achieved. The devices also demonstrated their excellent cyclic stability, with 100% capacitance retention after 10,000 cycles at a scan rate of 50 mV s-1. This study opens up a plethora of possible designs for high-performance on-chip devices employing different chemistries, flake sizes and morphologies of MXenes and their heterostructures.

  10. On-chip hybrid photonic-plasmonic light concentrator for nanofocusing in an integrated silicon photonics platform.

    Science.gov (United States)

    Luo, Ye; Chamanzar, Maysamreza; Apuzzo, Aniello; Salas-Montiel, Rafael; Nguyen, Kim Ngoc; Blaize, Sylvain; Adibi, Ali

    2015-02-11

    The enhancement and confinement of electromagnetic radiation to nanometer scale have improved the performances and decreased the dimensions of optical sources and detectors for several applications including spectroscopy, medical applications, and quantum information. Realization of on-chip nanofocusing devices compatible with silicon photonics platform adds a key functionality and provides opportunities for sensing, trapping, on-chip signal processing, and communications. Here, we discuss the design, fabrication, and experimental demonstration of light nanofocusing in a hybrid plasmonic-photonic nanotaper structure. We discuss the physical mechanisms behind the operation of this device, the coupling mechanisms, and how to engineer the energy transfer from a propagating guided mode to a trapped plasmonic mode at the apex of the plasmonic nanotaper with minimal radiation loss. Optical near-field measurements and Fourier modal analysis carried out using a near-field scanning optical microscope (NSOM) show a tight nanofocusing of light in this structure to an extremely small spot of 0.00563(λ/(2n(rmax)))(3) confined in 3D and an exquisite power input conversion of 92%. Our experiments also verify the mode selectivity of the device (low transmission of a TM-like input mode and high transmission of a TE-like input mode). A large field concentration factor (FCF) of about 4.9 is estimated from our NSOM measurement with a radius of curvature of about 20 nm at the apex of the nanotaper. The agreement between our theory and experimental results reveals helpful insights about the operation mechanism of the device, the interplay of the modes, and the gradual power transfer to the nanotaper apex.

  11. All-MXene (2D titanium carbide) solid-state microsupercapacitors for on-chip energy storage

    KAUST Repository

    Peng, You-Yu; Akuzum, Bilen; Kurra, Narendra; Zhao, Meng-Qiang; Alhabeb, Mohamed; Anasori, Babak; Kumbur, Emin Caglan; Alshareef, Husam N.; Ger, Ming-Der; Gogotsi, Yury

    2016-01-01

    On-chip energy storage is a rapidly evolving research topic, opening doors for integration of batteries and supercapacitors at microscales on rigid and flexible platforms. Recently, a new class of two-dimensional (2D) transition metal carbides and nitrides (so-called MXenes) has shown great promise in electrochemical energy storage applications. Here, we report the fabrication of all-MXene (Ti3C2Tx) solid-state interdigital microsupercapacitors by employing a solution spray-coating, followed by a photoresist-free direct laser cutting method. Our prototype devices consisted of two layers of Ti3C2Tx with two different flake sizes. The bottom layer was stacked large-size MXene flakes (typical lateral dimensions of 3-6 μm) serving mainly as current collectors. The top layer was made of small-size MXene flakes (~1 μm) with a large number of defects and edges as the electroactive layer responsible for energy storage. Compared to Ti3C2Tx micro-supercapacitors with platinum current collectors, the all-MXene devices exhibited much lower contact resistance, higher capacitances and better rate-capabilities. The areal and volumetric capacitances of ~27 mF cm-2 and ~337 F cm-3, respectively, at a scan rate of 20 mV s-1 were achieved. The devices also demonstrated their excellent cyclic stability, with 100% capacitance retention after 10,000 cycles at a scan rate of 50 mV s-1. This study opens up a plethora of possible designs for high-performance on-chip devices employing different chemistries, flake sizes and morphologies of MXenes and their heterostructures.

  12. Ring resonator-based on-chip modulation transformer for high-performance phase-modulated microwave photonic links.

    Science.gov (United States)

    Zhuang, Leimeng; Taddei, Caterina; Hoekman, Marcel; Leinse, Arne; Heideman, René; van Dijk, Paulus; Roeloffzen, Chris

    2013-11-04

    In this paper, we propose and experimentally demonstrate a novel wideband on-chip photonic modulation transformer for phase-modulated microwave photonic links. The proposed device is able to transform phase-modulated optical signals into intensity-modulated versions (or vice versa) with nearly zero conversion of laser phase noise to intensity noise. It is constructed using waveguide-based ring resonators, which features simple architecture, stable operation, and easy reconfigurability. Beyond the stand-alone functionality, the proposed device can also be integrated with other functional building blocks of photonic integrated circuits (PICs) to create on-chip complex microwave photonic signal processors. As an application example, a PIC consisting of two such modulation transformers and a notch filter has been designed and realized in TriPleX(TM) waveguide technology. The realized device uses a 2 × 2 splitting circuit and 3 ring resonators with a free spectral range of 25 GHz, which are all equipped with continuous tuning elements. The device can perform phase-to-intensity modulation transform and carrier suppression simultaneously, which enables high-performance phase-modulated microwave photonics links (PM-MPLs). Associated with the bias-free and low-complexity advantages of the phase modulators, a single-fiber-span PM-MPL with a RF bandwidth of 12 GHz (3 dB-suppression band 6 to 18 GHz) has been demonstrated comprising the proposed PIC, where the achieved spurious-free dynamic range performance is comparable to that of Class-AB MPLs using low-biased Mach-Zehnder modulators.

  13. A unified approach to mapping and routing on a network-on-chip for both best-effort and guaranteed service traffic

    NARCIS (Netherlands)

    Hansson, M.A.; Goossens, K.G.W.; Radulescu, A.

    2007-01-01

    One of the key steps in Network-on-Chip-based design is spatial mapping of cores and routing of the communication between those cores. Known solutions to the mapping and routing problems first map cores onto a topology and then route communication, using separate and possibly conflicting objective

  14. A Unified Approach to Mapping and Routing on a Network-on-Chip for Both Best-Effort and Guaranteed Service Traffic

    NARCIS (Netherlands)

    Hansson, A.; Goossens, K.; R?dulescu, A.

    2007-01-01

    One of the key steps in Network-on-Chip-based design is spatial mapping of cores and routing of the communication between those cores. Known solutions to the mapping and routing problems first map cores onto a topology and then route communication, using separate and possibly conflicting objective

  15. Optical pumping of deep traps in AlGaN/GaN-on-Si HEMTs using an on-chip Schottky-on-heterojunction light-emitting diode

    International Nuclear Information System (INIS)

    Li, Baikui; Tang, Xi; Chen, Kevin J.

    2015-01-01

    In this work, by using an on-chip integrated Schottky-on-heterojunction light-emitting diode (SoH-LED) which is seamlessly integrated with the AlGaN/GaN high electron mobility transistor (HEMT), we studied the effect of on-chip light illumination on the de-trapping processes of electrons from both surface and bulk traps. Surface trapping was generated by applying OFF-state drain bias stress, while bulk trapping was generated by applying positive substrate bias stress. The de-trapping processes of surface and/or bulk traps were monitored by measuring the recovery of dynamic on-resistance R on and/or threshold voltage V th of the HEMT. The results show that the recovery processes of both dynamic R on and threshold voltage V th of the HEMT can be accelerated by the on-chip SoH-LED light illumination, demonstrating the potentiality of on-chip hybrid opto-HEMTs to minimize the influences of traps during dynamic operation of AlGaN/GaN power HEMTs

  16. Optical pumping of deep traps in AlGaN/GaN-on-Si HEMTs using an on-chip Schottky-on-heterojunction light-emitting diode

    Energy Technology Data Exchange (ETDEWEB)

    Li, Baikui; Tang, Xi; Chen, Kevin J., E-mail: eekjchen@ust.hk [Department of Electronic and Computer Engineering, The Hong Kong University of Science and Technology, Clear Water Bay, Kowloon (Hong Kong)

    2015-03-02

    In this work, by using an on-chip integrated Schottky-on-heterojunction light-emitting diode (SoH-LED) which is seamlessly integrated with the AlGaN/GaN high electron mobility transistor (HEMT), we studied the effect of on-chip light illumination on the de-trapping processes of electrons from both surface and bulk traps. Surface trapping was generated by applying OFF-state drain bias stress, while bulk trapping was generated by applying positive substrate bias stress. The de-trapping processes of surface and/or bulk traps were monitored by measuring the recovery of dynamic on-resistance R{sub on} and/or threshold voltage V{sub th} of the HEMT. The results show that the recovery processes of both dynamic R{sub on} and threshold voltage V{sub th} of the HEMT can be accelerated by the on-chip SoH-LED light illumination, demonstrating the potentiality of on-chip hybrid opto-HEMTs to minimize the influences of traps during dynamic operation of AlGaN/GaN power HEMTs.

  17. Design and length optimization of an adiabatic coupler for on-chip vertical integration of rare-earth-doped double tungstate waveguide amplifiers

    NARCIS (Netherlands)

    Mu, Jinfeng; Sefünç, Mustafa; García Blanco, Sonia Maria

    2014-01-01

    The integration of rare-earth doped double tungstate waveguide amplifiers onto passive technology platforms enables the on-chip amplification of very high bit rate signals. In this work, a methodology for the optimized design of vertical adiabatic couplers between a passive Si3N4 waveguide and the

  18. Smartphone technology can be transformative to the deployment of lab-on-chip diagnostics

    Science.gov (United States)

    Erickson, David; O’Dell, Dakota; Jiang, Li; Oncescu, Vlad; Gumus, Abdurrahman; Lee, Seoho; Mancuso, Matthew; Mehta, Saurabh

    2014-01-01

    The rapid expansion of mobile technology is transforming the biomedical landscape. By 2016 there will be 260M active smartphones in the US and millions of health accessories and software “apps” running off them. In parallel with this have come major technical achievements in lab-on-a-chip technology leading to incredible new biochemical sensors and molecular diagnostic devices. Despite these advancements, the uptake of lab-on-a-chip technologies at the consumer level has been somewhat limited. We believe that the widespread availability of smartphone technology and the capabilities they offer in terms of computation, communication, social networking, and imaging will be transformative to the deployment of lab-on-a-chip type technology both in the developed and developing world. In this paper we outline why we believe this is the case, the new business models that may emerge, and detail some specific application areas in which this synergy will have long term impact, namely: nutrition monitoring and disease diagnostics in limited resource settings. PMID:24700127

  19. Smartphone technology can be transformative to the deployment of lab-on-chip diagnostics.

    Science.gov (United States)

    Erickson, David; O'Dell, Dakota; Jiang, Li; Oncescu, Vlad; Gumus, Abdurrahman; Lee, Seoho; Mancuso, Matthew; Mehta, Saurabh

    2014-09-07

    The rapid expansion of mobile technology is transforming the biomedical landscape. By 2016 there will be 260 M active smartphones in the US and millions of health accessories and software "apps" running off them. In parallel with this have come major technical achievements in lab-on-a-chip technology leading to incredible new biochemical sensors and molecular diagnostic devices. Despite these advancements, the uptake of lab-on-a-chip technologies at the consumer level has been somewhat limited. We believe that the widespread availability of smartphone technology and the capabilities they offer in terms of computation, communication, social networking, and imaging will be transformative to the deployment of lab-on-a-chip type technology both in the developed and developing world. In this paper we outline why we believe this is the case, the new business models that may emerge, and detail some specific application areas in which this synergy will have long term impact, namely: nutrition monitoring and disease diagnostics in limited resource settings.

  20. A 60-GHz energy harvesting module with on-chip antenna and switch for co-integration with ULP radios in 65-nm CMOS with fully wireless mm-wave power transfer measurement

    NARCIS (Netherlands)

    Gao, H.; Matters - Kammerer, M.; Harpe, P.J.A.; Milosevic, D.; Roermund, van A.H.M.; Linnartz, J.P.M.G.; Baltus, P.G.M.

    2014-01-01

    In this paper the architecture and performance of a co-integrated 60 GHz on-chip wireless energy harvester and ultra-low power (ULP) radio in 65-nm CMOS are discussed. Integration of an on-chip antenna with wireless power receiver and wireless data transfer module is the crucial next step to achieve

  1. Laser annealed in-situ P-doped Ge for on-chip laser source applications (Conference Presentation)

    Science.gov (United States)

    Srinivasan, Ashwyn; Pantouvaki, Marianna; Shimura, Yosuke; Porret, Clement; Van Deun, Rik; Loo, Roger; Van Thourhout, Dries; Van Campenhout, Joris

    2016-05-01

    Realization of a monolithically integrated on-chip laser source remains the holy-grail of Silicon Photonics. Germanium (Ge) is a promising semiconductor for lasing applications when highly doped with Phosphorous (P) and or alloyed with Sn [1, 2]. P doping makes Ge a pseudo-direct band gap material and the emitted wavelengths are compatible with fiber-optic communication applications. However, in-situ P doping with Ge2H6 precursor allows a maximum active P concentration of 6×1019 cm-3 [3]. Even with such active P levels, n++ Ge is still an indirect band gap material and could result in very high threshold current densities. In this work, we demonstrate P-doped Ge layers with active n-type doping beyond 1020 cm-3, grown using Ge2H6 and PH3 and subsequently laser annealed, targeting power-efficient on-chip laser sources. The use of Ge2H6 precursors during the growth of P-doped Ge increases the active P concentration level to a record fully activated concentration of 1.3×1020 cm-3 when laser annealed with a fluence of 1.2 J/cm2. The material stack consisted of 200 nm thick P-doped Ge grown on an annealed 1 µm Ge buffer on Si. Ge:P epitaxy was performed with PH3 and Ge2H6 at 320oC. Low temperature growth enable Ge:P epitaxy far from thermodynamic equilibrium, resulting in an enhanced incorporation of P atoms [3]. At such high active P concentration, the n++ Ge layer is expected to be a pseudo-direct band gap material. The photoluminescence (PL) intensities for layers with highest active P concentration show an enhancement of 18× when compared to undoped Ge grown on Si as shown in Fig. 1 and Fig. 2. The layers were optically pumped with a 640 nm laser and an incident intensity of 410 mW/cm2. The PL was measured with a NIR spectrometer with a Hamamatsu R5509-72 NIR photomultiplier tube detector whose detectivity drops at 1620 nm. Due to high active P concentration, we expect band gap narrowing phenomena to push the PL peak to wavelengths beyond the detection limit

  2. Fiscal 2000 research achievement report on the research and development of advanced design technologies for system-on-chip; 2000 nendo system on chip sentan sekkei gijutsu no kenkyu kaihatsu seika hokokusho

    Energy Technology Data Exchange (ETDEWEB)

    NONE

    2001-05-01

    Efforts were made to develop technologies for rapid improvement in SoC (system on chip) design productivity. In concrete terms, the concept of V-core (virtual core) was introduced into SoC design for the establishment of reusing technology and design automation in the uppermost stream region of designing. Activities were conducted in the two fields of (1) research and development of V-core based design technology and (2) research and development of a V-core database. Efforts exerted in field (1) aimed at the research and development of system specifications description technology, architecture generation technology, soft V-core internal structure optimization technology, optimized RTL (register transfer level) description generation technology, and system performance verification technology. In field (2), efforts were made to develop core database technology, core development support tools, core verification technology, and design assets verification technology. The system specifications description technology is a technique to define SoC system level specifications (degree of model abstraction). (NEDO)

  3. Alternating Current-Dielectrophoresis Collection and Chaining of Phytoplankton on Chip: Comparison of Individual Species and Artificial Communities

    Directory of Open Access Journals (Sweden)

    Coralie Siebman

    2017-01-01

    Full Text Available The capability of alternating current (AC dielectrophoresis (DEP for on-chip capture and chaining of the three species representative of freshwater phytoplankton was evaluated. The effects of the AC field intensity, frequency and duration on the chaining efficiency and chain lengths of green alga Chlamydomonas reinhardtii, cyanobacterium Synechocystis sp. and diatom Cyclotella meneghiniana were characterized systematically. C. reinhardtii showed an increase of the chaining efficiency from 100 Hz to 500 kHz at all field intensities; C. meneghiniana presented a decrease of chaining efficiency from 100 Hz to 1 kHz followed by a significant increase from 1 kHz to 500 kHz, while Synechocystis sp. exhibited low chaining tendency at all frequencies and all field intensities. The experimentally-determined DEP response and cell alignment of each microorganism were in agreement with their effective polarizability. Mixtures of cells in equal proportion or 10-times excess of Synechocystis sp. showed important differences in terms of chaining efficiency and length of the chains compared with the results obtained when the cells were alone in suspension. While a constant degree of chaining was observed with the mixture of C. reinhardtii and C. meneghiniana, the presence of Synechocystis sp. in each mixture suppressed the formation of chains for the two other phytoplankton species. All of these results prove the potential of DEP to discriminate different phytoplankton species depending on their effective polarizability and to enable their manipulation, such as specific collection or separation in freshwater.

  4. Using single cell cultivation system for on-chip monitoring of the interdivision timer in Chlamydomonas reinhardtii cell cycle

    Directory of Open Access Journals (Sweden)

    Soloviev Mikhail

    2010-09-01

    Full Text Available Abstract Regulation of cell cycle progression in changing environments is vital for cell survival and maintenance, and different regulation mechanisms based on cell size and cell cycle time have been proposed. To determine the mechanism of cell cycle regulation in the unicellular green algae Chlamydomonas reinhardtii, we developed an on-chip single-cell cultivation system that allows for the strict control of the extracellular environment. We divided the Chlamydomonas cell cycle into interdivision and division phases on the basis of changes in cell size and found that, regardless of the amount of photosynthetically active radiation (PAR and the extent of illumination, the length of the interdivision phase was inversely proportional to the rate of increase of cell volume. Their product remains constant indicating the existence of an 'interdivision timer'. The length of the division phase, in contrast, remained nearly constant. Cells cultivated under light-dark-light conditions did not divide unless they had grown to twice their initial volume during the first light period. This indicates the existence of a 'commitment sizer'. The ratio of the cell volume at the beginning of the division phase to the initial cell volume determined the number of daughter cells, indicating the existence of a 'mitotic sizer'.

  5. Knudsen pump produced via silicon deep RIE, thermal oxidation, and anodic bonding processes for on-chip vacuum pumping

    Science.gov (United States)

    Van Toan, Nguyen; Inomata, Naoki; Trung, Nguyen Huu; Ono, Takahito

    2018-05-01

    This work describes the fabrication and evaluation of the Knudsen pump for on-chip vacuum pumping that works based on the principle of a thermal transpiration. Three AFM (atomic force microscope) cantilevers are integrated into small chambers with a size of 5 mm  ×  3 mm  ×  0.4 mm for the pump’s evaluation. Knudsen pump is fabricated using deep RIE (reactive ion etching), wet thermal oxidation and anodic bonding processes. The fabricated device is evaluated by monitoring the quality (Q) factor of the integrated cantilevers. The Q factor of the cantilever is increased from 300 -1150 in cases without and with a temperature difference approximately 25 °C between the top (the hot side at 40 °C) and bottom (the cold side at 15 °C) sides of the fabricated device, respectively. The evacuated chamber pressure of around 10 kPa is estimated from the Q factor of the integrated cantilevers.

  6. System-on-Chip Environment: A SpecC-Based Framework for Heterogeneous MPSoC Design

    Directory of Open Access Journals (Sweden)

    Daniel D. Gajski

    2008-07-01

    Full Text Available The constantly growing complexity of embedded systems is a challenge that drives the development of novel design automation techniques. C-based system-level design addresses the complexity challenge by raising the level of abstraction and integrating the design processes for the heterogeneous system components. In this article, we present a comprehensive design framework, the system-on-chip environment (SCE which is based on the influential SpecC language and methodology. SCE implements a top-down system design flow based on a specify-explore-refine paradigm with support for heterogeneous target platforms consisting of custom hardware components, embedded software processors, dedicated IP blocks, and complex communication bus architectures. Starting from an abstract specification of the desired system, models at various levels of abstraction are automatically generated through successive step-wise refinement, resulting in a pin-and cycle-accurate system implementation. The seamless integration of automatic model generation, estimation, and verification tools enables rapid design space exploration and efficient MPSoC implementation. Using a large set of industrial-strength examples with a wide range of target architectures, our experimental results demonstrate the effectiveness of our framework and show significant productivity gains in design time.

  7. Rearrangeable and exchangeable optical module with system-on-chip for wearable functional near-infrared spectroscopy system.

    Science.gov (United States)

    Funane, Tsukasa; Numata, Takashi; Sato, Hiroki; Hiraizumi, Shinsuke; Hasegawa, Yuichi; Kuwabara, Hidenobu; Hasegawa, Kiyoshi; Kiguchi, Masashi

    2018-01-01

    We developed a system-on-chip (SoC)-incorporated light-emitting diode (LED) and avalanche photodiode (APD) modules to improve the usability and flexibility of a fiberless wearable functional near-infrared spectroscopy (fNIRS) system. The SoC has a microprocessing unit and programmable circuits. The time division method and the lock-in method were used for separately detecting signals from different positions and signals of different wavelengths, respectively. Each module autonomously works for this time-divided-lock-in measurement with a high sensitivity for haired regions. By supplying [Formula: see text] of power and base and data clocks, the LED module emits both 730- and 855-nm wavelengths of light, amplitudes of which are modulated in each lock-in frequency generated from the base clock, and the APD module provides the lock-in detected signals synchronizing with the data clock. The SoC provided many functions, including automatic-power-control of the LED, automatic judgment of detected power level, and automatic-gain-control of the programmable gain amplifier. The number and the arrangement of modules can be adaptively changed by connecting this exchangeable modules in a daisy chain and setting the parameters dependent on the probing position. Therefore, users can configure a variety of arrangements (single- or multidistance combinations) of them with this module-based system.

  8. System-on-chip architecture and validation for real-time transceiver optimization: APC implementation on FPGA

    Science.gov (United States)

    Suarez, Hernan; Zhang, Yan R.

    2015-05-01

    New radar applications need to perform complex algorithms and process large quantity of data to generate useful information for the users. This situation has motivated the search for better processing solutions that include low power high-performance processors, efficient algorithms, and high-speed interfaces. In this work, hardware implementation of adaptive pulse compression for real-time transceiver optimization are presented, they are based on a System-on-Chip architecture for Xilinx devices. This study also evaluates the performance of dedicated coprocessor as hardware accelerator units to speed up and improve the computation of computing-intensive tasks such matrix multiplication and matrix inversion which are essential units to solve the covariance matrix. The tradeoffs between latency and hardware utilization are also presented. Moreover, the system architecture takes advantage of the embedded processor, which is interconnected with the logic resources through the high performance AXI buses, to perform floating-point operations, control the processing blocks, and communicate with external PC through a customized software interface. The overall system functionality is demonstrated and tested for real-time operations using a Ku-band tested together with a low-cost channel emulator for different types of waveforms.

  9. GPGPU accelerated Krylov methods for compact modeling of on-chip passive integrated structures within the Chameleon-RF workflow

    Directory of Open Access Journals (Sweden)

    Sebastian Gim

    2012-11-01

    Full Text Available Continued device scaling into the nanometer region and high frequencies of operation well into the multi-GHz region has given rise to new effects that previously had negligible impact but now present greater challenges and unprecedented complexity to designing successful mixed-signal silicon. The Chameleon-RF project was conceived to address these challenges. Creative use of domain decomposition, multi grid techniques or reduced order modeling techniques (ROM can be selectively applied at all levels of the process to efficiently prune down degrees of freedom (DoFs. However, the simulation of complex systems within a reasonable amount of time remains a computational challenge. This paper presents work done in the incorporation of GPGPU technology to accelerate Krylov based algorithms used for compact modeling of on-chip passive integrated structures within the workflow of the Chameleon-RF project. Based upon insight gained from work done above, a novel GPGPU accelerated algorithm was developed for the Krylov ROM (kROM methods and is described here for the benefit of the wider community.

  10. Design and simulation of a fast Josephson junction on-chip gated clock for frequency and time analysis

    International Nuclear Information System (INIS)

    Ruby, R.C.

    1991-01-01

    This paper reports that as the sophistication and speed of digital communication systems increase, there is a corresponding demand for more sophisticated and faster measurement instruments. One such instrument new on the market is the HP 5371A Frequency and Time Interval Analyzer (FTIA). Such an instrument is analogous to a conventional oscilloscope. Whereas the oscilloscope measures waveform amplitudes as a function of time, the FTIA measures phase, frequency, or timing events as functions of time. These applications are useful in such diverse areas as spread-spectrum radar, chirp filter designs, disk-head evaluation, and timing jitter analysis. The on-chip clock designed for this application uses a single Josephson Junction as the clock and a resonator circuit to fix the frequency. A zero-crossing detector is used to start and stop the clock. A SFQ counter is used to count the pulses generated by the clock and a reset circuit is used to reset the clock. Extensive simulations and modeling have been done based on measured values obtained from our Nb/Al 2 O 3 /Al/Nb process

  11. Nanoscale on-chip all-optical logic parity checker in integrated plasmonic circuits in optical communication range

    Science.gov (United States)

    Wang, Feifan; Gong, Zibo; Hu, Xiaoyong; Yang, Xiaoyu; Yang, Hong; Gong, Qihuang

    2016-01-01

    The nanoscale chip-integrated all-optical logic parity checker is an essential core component for optical computing systems and ultrahigh-speed ultrawide-band information processing chips. Unfortunately, little experimental progress has been made in development of these devices to date because of material bottleneck limitations and a lack of effective realization mechanisms. Here, we report a simple and efficient strategy for direct realization of nanoscale chip-integrated all-optical logic parity checkers in integrated plasmonic circuits in the optical communication range. The proposed parity checker consists of two-level cascaded exclusive-OR (XOR) logic gates that are realized based on the linear interference of surface plasmon polaritons propagating in the plasmonic waveguides. The parity of the number of logic 1s in the incident four-bit logic signals is determined, and the output signal is given the logic state 0 for even parity (and 1 for odd parity). Compared with previous reports, the overall device feature size is reduced by more than two orders of magnitude, while ultralow energy consumption is maintained. This work raises the possibility of realization of large-scale integrated information processing chips based on integrated plasmonic circuits, and also provides a way to overcome the intrinsic limitations of serious surface plasmon polariton losses for on-chip integration applications. PMID:27073154

  12. Deterministic Integration of Quantum Dots into on-Chip Multimode Interference Beamsplitters Using in Situ Electron Beam Lithography.

    Science.gov (United States)

    Schnauber, Peter; Schall, Johannes; Bounouar, Samir; Höhne, Theresa; Park, Suk-In; Ryu, Geun-Hwan; Heindel, Tobias; Burger, Sven; Song, Jin-Dong; Rodt, Sven; Reitzenstein, Stephan

    2018-04-11

    The development of multinode quantum optical circuits has attracted great attention in recent years. In particular, interfacing quantum-light sources, gates, and detectors on a single chip is highly desirable for the realization of large networks. In this context, fabrication techniques that enable the deterministic integration of preselected quantum-light emitters into nanophotonic elements play a key role when moving forward to circuits containing multiple emitters. Here, we present the deterministic integration of an InAs quantum dot into a 50/50 multimode interference beamsplitter via in situ electron beam lithography. We demonstrate the combined emitter-gate interface functionality by measuring triggered single-photon emission on-chip with g (2) (0) = 0.13 ± 0.02. Due to its high patterning resolution as well as spectral and spatial control, in situ electron beam lithography allows for integration of preselected quantum emitters into complex photonic systems. Being a scalable single-step approach, it paves the way toward multinode, fully integrated quantum photonic chips.

  13. An asymmetric MOSFET-C band-pass filter with on-chip charge pump auto-tuning

    International Nuclear Information System (INIS)

    Chen Fangxiong; Ma Heping; Jia Hailong; Shi Yin; Lin Min; Dai, Forster

    2009-01-01

    An asymmetric MOSFET-C band-pass filter (BPF) with on chip charge pump auto-tuning is presented. It is implemented in UMC (United Manufacturing Corporation) 0.18 μm CMOS process technology. The filter system with auto-tuning uses a master-slave technique for continuous tuning in which the charge pump outputs 2.663 V, much higher than the power supply voltage, to improve the linearity of the filter. The main filter with third order low-pass and second order high-pass properties is an asymmetric band-pass filter with bandwidth of 2.730-5.340 MHz. The in-band third order harmonic input intercept point (IIP3) is 16.621 dBm, with 50 Ω as the source impedance. The input referred noise is about 47.455 μV rms . The main filter dissipates 3.528 mW while the auto-tuning system dissipates 2.412 mW from a 1.8 V power supply. The filter with the auto-tuning system occupies 0.592 mm 2 and it can be utilized in GPS (global positioning system) and Bluetooth systems. (semiconductor integrated circuits)

  14. Efficient on-chip hotspot removal combined solution of thermoelectric cooler and mini-channel heat sink

    International Nuclear Information System (INIS)

    Hao, Xiaohong; Peng, Bei; Xie, Gongnan; Chen, Yi

    2016-01-01

    Highlights: • A combined solution of thermoelectric cooler (TEC) and mini-channel heat sink to remove the hotspot of the chip has been proposed. • The TEC's mathematical model is established to assess its work performance. • A comparative study on the proposed efficient On-Chip Hotspot Removal Combined Solution. - Abstract: Hotspot will significantly degrade the reliability and performance of the electronic equipment. The efficient removal of hotspot can make the temperature distribution uniform, and ensure the reliable operation of the electronic equipment. This study proposes a combined solution of thermoelectric cooler (TEC) and mini-channel heat sink to remove the hotspot of the chip in the electronic equipment. Firstly, The TEC's mathematical model is established to assess its work performance under different boundary conditions. Then, the hotspot removal capability of the TEC is discussed for different cooling conditions, which has shown that the combined equipment has better hotspot removal capability compared with others. Finally, A TEC is employed to investigate the hotspot removal capacity of the combined solution, and the results have indicated that it can effectively remove hotspot in the diameter of 0.5 mm, the power density of 600W/cm 2 when its working current is 3A and heat transfer thermal resistance is 0 K/W.

  15. Extremely broadband, on-chip optical nonreciprocity enabled by mimicking nonlinear anti-adiabatic quantum jumps near exceptional points.

    Science.gov (United States)

    Choi, Youngsun; Hahn, Choloong; Yoon, Jae Woong; Song, Seok Ho; Berini, Pierre

    2017-01-20

    Time-asymmetric state-evolution properties while encircling an exceptional point are presently of great interest in search of new principles for controlling atomic and optical systems. Here, we show that encircling-an-exceptional-point interactions that are essentially reciprocal in the linear interaction regime make a plausible nonlinear integrated optical device architecture highly nonreciprocal over an extremely broad spectrum. In the proposed strategy, we describe an experimentally realizable coupled-waveguide structure that supports an encircling-an-exceptional-point parametric evolution under the influence of a gain saturation nonlinearity. Using an intuitive time-dependent Hamiltonian and rigorous numerical computations, we demonstrate strictly nonreciprocal optical transmission with a forward-to-backward transmission ratio exceeding 10 dB and high forward transmission efficiency (∼100%) persisting over an extremely broad bandwidth approaching 100 THz. This predicted performance strongly encourages experimental realization of the proposed concept to establish a practical on-chip optical nonreciprocal element for ultra-short laser pulses and broadband high-density optical signal processing.

  16. Influence of Electric Fields and Conductivity on Pollen Tube Growth assessed via Electrical Lab-on-Chip

    Science.gov (United States)

    Agudelo, Carlos; Packirisamy, Muthukumaran; Geitmann, Anja

    2016-01-01

    Pollen tubes are polarly growing plant cells that are able to rapidly respond to a combination of chemical, mechanical, and electrical cues. This behavioural feature allows them to invade the flower pistil and deliver the sperm cells in highly targeted manner to receptive ovules in order to accomplish fertilization. How signals are perceived and processed in the pollen tube is still poorly understood. Evidence for electrical guidance in particular is vague and highly contradictory. To generate reproducible experimental conditions for the investigation of the effect of electric fields on pollen tube growth we developed an Electrical Lab-on-Chip (ELoC). Pollen from the species Camellia displayed differential sensitivity to electric fields depending on whether the entire cell or only its growing tip was exposed. The response to DC fields was dramatically higher than that to AC fields of the same strength. However, AC fields were found to restore and even promote pollen growth. Surprisingly, the pollen tube response correlated with the conductivity of the growth medium under different AC frequencies—consistent with the notion that the effect of the field on pollen tube growth may be mediated via its effect on the motion of ions. PMID:26804186

  17. An on-chip polarization splitter based on the radiation loss in the bending hybrid plasmonic waveguide structure

    Science.gov (United States)

    Sun, Chengwei; Rong, Kexiu; Gan, Fengyuan; Chu, Saisai; Gong, Qihuang; Chen, Jianjun

    2017-09-01

    Polarization beam splitters (PBSs) are one of the key components in the integrated photonic circuits. To increase the integration density, various complex hybrid plasmonic structures have been numerically designed to shrink the footprints of the PBSs. Here, to decrease the complexity of the small hybrid structures and the difficulty of the hybrid micro-nano fabrications, the radiation losses are utilized to experimentally demonstrate an ultra-small, broadband, and efficient PBS in a simple bending hybrid plasmonic waveguide structure. The hybrid plasmonic waveguide comprising a dielectric strip on the metal surface supports both the transverse-magnetic (TM) and transverse-electric (TE) waveguide modes. Because of the different field confinements, the TE waveguide mode has larger radiation loss than the TM waveguide mode in the bending hybrid strip waveguide. Based on the different radiation losses, the two incident waveguide modes of orthogonal polarization states are efficiently split in the proposed structure with a footprint of only about 2.2 × 2.2 μm2 on chips. Since there is no resonance or interference in the splitting process, the operation bandwidth is as broad as Δλ = 70 nm. Moreover, the utilization of the strongly confined waveguide modes instead of the bulk free-space light (with the spot size of at least a few wavelengths) as the incident source considerably increases the coupling efficiency, resulting in a low insertion loss of <3 dB.

  18. Obstacle Recognition Based on Machine Learning for On-Chip LiDAR Sensors in a Cyber-Physical System

    Directory of Open Access Journals (Sweden)

    Fernando Castaño

    2017-09-01

    Full Text Available Collision avoidance is an important feature in advanced driver-assistance systems, aimed at providing correct, timely and reliable warnings before an imminent collision (with objects, vehicles, pedestrians, etc.. The obstacle recognition library is designed and implemented to address the design and evaluation of obstacle detection in a transportation cyber-physical system. The library is integrated into a co-simulation framework that is supported on the interaction between SCANeR software and Matlab/Simulink. From the best of the authors’ knowledge, two main contributions are reported in this paper. Firstly, the modelling and simulation of virtual on-chip light detection and ranging sensors in a cyber-physical system, for traffic scenarios, is presented. The cyber-physical system is designed and implemented in SCANeR. Secondly, three specific artificial intelligence-based methods for obstacle recognition libraries are also designed and applied using a sensory information database provided by SCANeR. The computational library has three methods for obstacle detection: a multi-layer perceptron neural network, a self-organization map and a support vector machine. Finally, a comparison among these methods under different weather conditions is presented, with very promising results in terms of accuracy. The best results are achieved using the multi-layer perceptron in sunny and foggy conditions, the support vector machine in rainy conditions and the self-organized map in snowy conditions.

  19. Obstacle Recognition Based on Machine Learning for On-Chip LiDAR Sensors in a Cyber-Physical System.

    Science.gov (United States)

    Castaño, Fernando; Beruvides, Gerardo; Haber, Rodolfo E; Artuñedo, Antonio

    2017-09-14

    Collision avoidance is an important feature in advanced driver-assistance systems, aimed at providing correct, timely and reliable warnings before an imminent collision (with objects, vehicles, pedestrians, etc.). The obstacle recognition library is designed and implemented to address the design and evaluation of obstacle detection in a transportation cyber-physical system. The library is integrated into a co-simulation framework that is supported on the interaction between SCANeR software and Matlab/Simulink. From the best of the authors' knowledge, two main contributions are reported in this paper. Firstly, the modelling and simulation of virtual on-chip light detection and ranging sensors in a cyber-physical system, for traffic scenarios, is presented. The cyber-physical system is designed and implemented in SCANeR. Secondly, three specific artificial intelligence-based methods for obstacle recognition libraries are also designed and applied using a sensory information database provided by SCANeR. The computational library has three methods for obstacle detection: a multi-layer perceptron neural network, a self-organization map and a support vector machine. Finally, a comparison among these methods under different weather conditions is presented, with very promising results in terms of accuracy. The best results are achieved using the multi-layer perceptron in sunny and foggy conditions, the support vector machine in rainy conditions and the self-organized map in snowy conditions.

  20. Improved Laser Manipulation for On-chip Fabricated Microstructures Based on Solution Replacement and Its Application in Single Cell Analysis

    Directory of Open Access Journals (Sweden)

    Tao Yue

    2014-02-01

    Full Text Available In this paper, we present the fabrication and assembly of microstructures inside a microfluidic device based on a photocrosslinkable resin and optical tweezers. We also report a method of solution replacement inside the microfluidic channel in order to improve the manipulation performance and apply the assembled microstructures for single cell cultivation. By the illumination of patterned ultraviolet (UV through a microscope, microstructures of arbitrary shape were fabricated by the photocrosslinkable resin inside a microfluidic channel. Based on the microfluidic channel with both glass and polydimethylsiloxane (PDMS surfaces, immovable and movable microstructures were fabricated and manipulated. The microstructures were fabricated at the desired places and manipulated by the optical tweezers. A rotational microstructure including a microgear and a rotation axis was assembled and rotated in demonstrating this technique. The improved laser manipulation of microstructures was achieved based on the on-chip solution replacement method. The manipulation speed of the microstructures increased when the viscosity of the solvent decreased. The movement efficiency of the fabricated microstructures inside the lower viscosity solvent was evaluated and compared with those microstructures inside the former high viscosity solvent. A novel cell cage was fabricated and the cultivation of a single yeast cell (w303 was demonstrated in the cell cage, inside the microfluidic device.

  1. Nanoscale on-chip all-optical logic parity checker in integrated plasmonic circuits in optical communication range.

    Science.gov (United States)

    Wang, Feifan; Gong, Zibo; Hu, Xiaoyong; Yang, Xiaoyu; Yang, Hong; Gong, Qihuang

    2016-04-13

    The nanoscale chip-integrated all-optical logic parity checker is an essential core component for optical computing systems and ultrahigh-speed ultrawide-band information processing chips. Unfortunately, little experimental progress has been made in development of these devices to date because of material bottleneck limitations and a lack of effective realization mechanisms. Here, we report a simple and efficient strategy for direct realization of nanoscale chip-integrated all-optical logic parity checkers in integrated plasmonic circuits in the optical communication range. The proposed parity checker consists of two-level cascaded exclusive-OR (XOR) logic gates that are realized based on the linear interference of surface plasmon polaritons propagating in the plasmonic waveguides. The parity of the number of logic 1s in the incident four-bit logic signals is determined, and the output signal is given the logic state 0 for even parity (and 1 for odd parity). Compared with previous reports, the overall device feature size is reduced by more than two orders of magnitude, while ultralow energy consumption is maintained. This work raises the possibility of realization of large-scale integrated information processing chips based on integrated plasmonic circuits, and also provides a way to overcome the intrinsic limitations of serious surface plasmon polariton losses for on-chip integration applications.

  2. System on chip (SoC) microcontrollers (μC) as digitisers for ion beam analysis (IBA) instruments

    Energy Technology Data Exchange (ETDEWEB)

    Whitlow, Harry J., E-mail: harry.j@whitlow.se

    2016-09-15

    Data digitisation of the analogue signals from detectors to digital data is an essential process in ion beam analysis (IBA). The low-cost, easy availability and development environments that have a low learning threshold makes system-on-chip (SoC) microcontrollers (μC) attractive for this task. These μC combine, on one die, analogue and digital inputs and outputs with serial USB interfaces, which opens up simple implementation of tailor-made interfaces for specific IBA measurement systems. We have investigated the design and performance limitations based on development of three different digitisation interfaces for IBA. These were a two-channel nuclear instrumentation module (NIM) ADC event mode interface (EMI) for a high-resolution magnetic RBS spectrometer, a simple headless-multi-channel analyser (MCA) and a combined dual channel headless MCA and EMI. It is shown that SoC μC based interfaces for digitisation of analogue spectroscopy pulses in IBA systems can be implemented for material costs less than 100 €. The performance of the SoC devices for many IBA applications is close to what can be achieved with state-of-the-art instruments. The simple pulse spectroscopy interface circuit and software are included in the auxiliary archive.

  3. Rigorously modeling self-stabilizing fault-tolerant circuits: An ultra-robust clocking scheme for systems-on-chip.

    Science.gov (United States)

    Dolev, Danny; Függer, Matthias; Posch, Markus; Schmid, Ulrich; Steininger, Andreas; Lenzen, Christoph

    2014-06-01

    We present the first implementation of a distributed clock generation scheme for Systems-on-Chip that recovers from an unbounded number of arbitrary transient faults despite a large number of arbitrary permanent faults. We devise self-stabilizing hardware building blocks and a hybrid synchronous/asynchronous state machine enabling metastability-free transitions of the algorithm's states. We provide a comprehensive modeling approach that permits to prove, given correctness of the constructed low-level building blocks, the high-level properties of the synchronization algorithm (which have been established in a more abstract model). We believe this approach to be of interest in its own right, since this is the first technique permitting to mathematically verify, at manageable complexity, high-level properties of a fault-prone system in terms of its very basic components. We evaluate a prototype implementation, which has been designed in VHDL, using the Petrify tool in conjunction with some extensions, and synthesized for an Altera Cyclone FPGA.

  4. All-electronic droplet generation on-chip with real-time feedback control for EWOD digital microfluidics.

    Science.gov (United States)

    Gong, Jian; Kim, Chang-Jin C J

    2008-06-01

    Electrowetting-on-dielectric (EWOD) actuation enables digital (or droplet) microfluidics where small packets of liquids are manipulated on a two-dimensional surface. Due to its mechanical simplicity and low energy consumption, EWOD holds particular promise for portable systems. To improve volume precision of the droplets, which is desired for quantitative applications such as biochemical assays, existing practices would require near-perfect device fabrication and operation conditions unless the droplets are generated under feedback control by an extra pump setup off of the chip. In this paper, we develop an all-electronic (i.e., no ancillary pumping) real-time feedback control of on-chip droplet generation. A fast voltage modulation, capacitance sensing, and discrete-time PID feedback controller are integrated on the operating electronic board. A significant improvement is obtained in the droplet volume uniformity, compared with an open loop control as well as the previous feedback control employing an external pump. Furthermore, this new capability empowers users to prescribe the droplet volume even below the previously considered minimum, allowing, for example, 1 : x (x < 1) mixing, in comparison to the previously considered n : m mixing (i.e., n and m unit droplets).

  5. ALL-ELECTRONIC DROPLET GENERATION ON-CHIP WITH REAL-TIME FEEDBACK CONTROL FOR EWOD DIGITIAL MICROFLUIDICS

    Science.gov (United States)

    Gong, Jian; Kim, Chang-Jin “CJ”

    2009-01-01

    Electrowetting-on-dielectric (EWOD) actuation enables digital (or droplet) microfluidics where small packets of liquids are manipulated on a two-dimensional surface. Due to its mechanical simplicity and low energy consumption, EWOD holds particular promise for portable systems. To improve volume precision of the droplets, which is desired for quantitative applications such as biochemical assays, existing practices would require near-perfect device fabricaion and operation conditions unless the droplets are generated under feedback control by an extra pump setup off of the chip. In this paper, we develop an all-electronic (i.e., no ancillary pumping) real-time feedback control of on-chip droplet generation. A fast voltage modulation, capacitance sensing, and discrete-time PID feedback controller are integrated on the operating electronic board. A significant improvement is obtained in the droplet volume uniformity, compared with an open loop control as well as the previous feedback control employing an external pump. Furthermore, this new capability empowers users to prescribe the droplet volume even below the previously considered minimum, allowing, for example, 1:x (x < 1) mixing, in comparison to the previously considered n:m mixing (i.e., n and m unit droplets). PMID:18497909

  6. Integrated on-chip solid state capacitor based on vertically aligned carbon nanofibers, grown using a CMOS temperature compatible process

    Science.gov (United States)

    Saleem, Amin M.; Andersson, Rickard; Desmaris, Vincent; Enoksson, Peter

    2018-01-01

    Complete miniaturized on-chip integrated solid-state capacitors have been fabricated based on conformal coating of vertically aligned carbon nanofibers (VACNFs), using a CMOS temperature compatible microfabrication processes. The 5 μm long VACNFs, operating as electrode, are grown on a silicon substrate and conformally coated by aluminum oxide dielectric using atomic layer deposition (ALD) technique. The areal (footprint) capacitance density value of 11-15 nF/mm2 is realized with high reproducibility. The CMOS temperature compatible microfabrication, ultra-low profile (less than 7 μm thickness) and high capacitance density would enables direct integration of micro energy storage devices on the active CMOS chip, multi-chip package and passives on silicon or glass interposer. A model is developed to calculate the surface area of VACNFs and the effective capacitance from the devices. It is thereby shown that 71% of surface area of the VACNFs has contributed to the measured capacitance, and by using the entire area the capacitance can potentially be increased.

  7. On-Chip Implantable Antennas for Wireless Power and Data Transfer in a Glaucoma-Monitoring SoC

    KAUST Repository

    Marnat, Loic

    2013-04-17

    For the first time separate transmit and receive onchip antennas have been designed in a eye environment for implantable intraocular pressure monitoring application. The miniaturized antennas fit on a 1.4 mm3 CMOS (0.18 μm) chip with the rest of the circuitry. A 5.2 GHz novel inductive fed and loaded receive monopole antenna is used for wireless powering the chip and is conjugately matched to the rectifier in the energy harvesting and storage unit. The 2.4 GHz transmit antenna is an octagonal loop which also acts as the inductor of the voltage control oscillator resonant tank. To emulate the eye environment in measurements, a custom test setup is developed which comprises plexiglass cavities filled with saline solution. A transition, employing a balun, is also designed which transforms the differential impedance of on-chip antennas immersed in saline solution to a 50 ! single-ended micrsotrip line. The antennas on a lossy Si substrate and eye environment provide sufficient gain to establish wireless communication with an external reader placed few cm away from the eye.

  8. A Low-Power All-Digital on-Chip CMOS Oscillator for a Wireless Sensor Node.

    Science.gov (United States)

    Sheng, Duo; Hong, Min-Rong

    2016-10-14

    This paper presents an all-digital low-power oscillator for reference clocks in wireless body area network (WBAN) applications. The proposed on-chip complementary metal-oxide-semiconductor (CMOS) oscillator provides low-frequency clock signals with low power consumption, high delay resolution, and low circuit complexity. The cascade-stage structure of the proposed design simultaneously achieves high resolution and a wide frequency range. The proposed hysteresis delay cell further reduces the power consumption and hardware costs by 92.4% and 70.4%, respectively, relative to conventional designs. The proposed design is implemented in a standard performance 0.18 μm CMOS process. The measured operational frequency ranged from 7 to 155 MHz, and the power consumption was improved to 79.6 μW (@7 MHz) with a 4.6 ps resolution. The proposed design can be implemented in an all-digital manner, which is highly desirable for system-level integration.

  9. An asymmetric MOSFET-C band-pass filter with on-chip charge pump auto-tuning

    Energy Technology Data Exchange (ETDEWEB)

    Chen Fangxiong; Ma Heping; Jia Hailong; Shi Yin [Institute of Semiconductors, Chinese Academy of Sciences, Beijing 100083 (China); Lin Min [Suzhou-CAS Semiconductors Integrated Technology Research Center, Suzhou 215021 (China); Dai, Forster, E-mail: fxchen@semi.ac.c [Department of Electrical and Computer Engineering, Auburn University, AL 36849 (United States)

    2009-08-15

    An asymmetric MOSFET-C band-pass filter (BPF) with on chip charge pump auto-tuning is presented. It is implemented in UMC (United Manufacturing Corporation) 0.18 {mu}m CMOS process technology. The filter system with auto-tuning uses a master-slave technique for continuous tuning in which the charge pump outputs 2.663 V, much higher than the power supply voltage, to improve the linearity of the filter. The main filter with third order low-pass and second order high-pass properties is an asymmetric band-pass filter with bandwidth of 2.730-5.340 MHz. The in-band third order harmonic input intercept point (IIP3) is 16.621 dBm, with 50 {Omega} as the source impedance. The input referred noise is about 47.455 {mu}V{sub rms}. The main filter dissipates 3.528 mW while the auto-tuning system dissipates 2.412 mW from a 1.8 V power supply. The filter with the auto-tuning system occupies 0.592 mm{sup 2} and it can be utilized in GPS (global positioning system) and Bluetooth systems. (semiconductor integrated circuits)

  10. System-on-Chip Integration of a New Electromechanical Impedance Calculation Method for Aircraft Structure Health Monitoring

    Directory of Open Access Journals (Sweden)

    Daniel Medale

    2012-10-01

    Full Text Available The work reported on this paper describes a new methodology implementation for active structural health monitoring of recent aircraft parts made from carbon-fiber-reinforced polymer. This diagnosis is based on a new embedded method that is capable of measuring the local high frequency impedance spectrum of the structure through the calculation of the electro-mechanical impedance of a piezoelectric patch pasted non-permanently onto its surface. This paper involves both the laboratory based E/M impedance method development, its implementation into a CPU with limited resources as well as a comparison with experimental testing data needed to demonstrate the feasibility of flaw detection on composite materials and answer the question of the method reliability. The different development steps are presented and the integration issues are discussed. Furthermore, we present the unique advantages that the reconfigurable electronics through System-on-Chip (SoC technology brings to the system scaling and flexibility. At the end of this article, we demonstrate the capability of a basic network of sensors mounted onto a real composite aircraft part specimen to capture its local impedance spectrum signature and to diagnosis different delamination sizes using a comparison with a baseline.

  11. System-on-chip integration of a new electromechanical impedance calculation method for aircraft structure health monitoring.

    Science.gov (United States)

    Boukabache, Hamza; Escriba, Christophe; Zedek, Sabeha; Medale, Daniel; Rolet, Sebastien; Fourniols, Jean Yves

    2012-10-11

    The work reported on this paper describes a new methodology implementation for active structural health monitoring of recent aircraft parts made from carbon-fiber-reinforced polymer. This diagnosis is based on a new embedded method that is capable of measuring the local high frequency impedance spectrum of the structure through the calculation of the electro-mechanical impedance of a piezoelectric patch pasted non-permanently onto its surface. This paper involves both the laboratory based E/M impedance method development, its implementation into a CPU with limited resources as well as a comparison with experimental testing data needed to demonstrate the feasibility of flaw detection on composite materials and answer the question of the method reliability. The different development steps are presented and the integration issues are discussed. Furthermore, we present the unique advantages that the reconfigurable electronics through System-on-Chip (SoC) technology brings to the system scaling and flexibility. At the end of this article, we demonstrate the capability of a basic network of sensors mounted onto a real composite aircraft part specimen to capture its local impedance spectrum signature and to diagnosis different delamination sizes using a comparison with a baseline.

  12. Rapid Development of System-on-Chip (SoC for Network-Enabled Visible Light Communications

    Directory of Open Access Journals (Sweden)

    Trio Adiono

    2018-03-01

    Full Text Available Visible Light Communication (VLC is an emerging optical communication technology with rapid development nowadays. VLC is considered as a compliment and successor of radio-frequency (RF wireless communication. There are various typical implementations of VLC in which one of them is for exchanging data TCP/IP packets, thus the user can browse the internet as in established Wireless fidelity (Wi-Fi technology. Briefly, we can call it by Light fidelity (Li-Fi. This paper described the design and implementation of System-on-Chip (SoC subsystem for Li-Fi application where the implemented SoC consists of hardware (H/W and software (S/W. In the H/W aspect, Physical Layer (PHY is made by using UART communication with Ethernet connection to communicate with Host/Device personal-computer (PC. In the S/W aspect, Xillinux operating system (OS is used. The H/W- as well as S/W-SoC, are realized in FPGA Zybo Zynq-7000 EPP development board. The functional test result shows (without optical channel or Zybo-to-Zybo only that the implemented SoC is working as expected. It is able to exchange TCP/IP packets between two PCs. Moreover, Ethernet connection has bandwidth up to 83.6 Mbps and PHY layer baud rate has bandwidth up to 921600 bps.

  13. A simple and low-cost biofilm quantification method using LED and CMOS image sensor.

    Science.gov (United States)

    Kwak, Yeon Hwa; Lee, Junhee; Lee, Junghoon; Kwak, Soo Hwan; Oh, Sangwoo; Paek, Se-Hwan; Ha, Un-Hwan; Seo, Sungkyu

    2014-12-01

    A novel biofilm detection platform, which consists of a cost-effective red, green, and blue light-emitting diode (RGB LED) as a light source and a lens-free CMOS image sensor as a detector, is designed. This system can measure the diffraction patterns of cells from their shadow images, and gather light absorbance information according to the concentration of biofilms through a simple image processing procedure. Compared to a bulky and expensive commercial spectrophotometer, this platform can provide accurate and reproducible biofilm concentration detection and is simple, compact, and inexpensive. Biofilms originating from various bacterial strains, including Pseudomonas aeruginosa (P. aeruginosa), were tested to demonstrate the efficacy of this new biofilm detection approach. The results were compared with the results obtained from a commercial spectrophotometer. To utilize a cost-effective light source (i.e., an LED) for biofilm detection, the illumination conditions were optimized. For accurate and reproducible biofilm detection, a simple, custom-coded image processing algorithm was developed and applied to a five-megapixel CMOS image sensor, which is a cost-effective detector. The concentration of biofilms formed by P. aeruginosa was detected and quantified by varying the indole concentration, and the results were compared with the results obtained from a commercial spectrophotometer. The correlation value of the results from those two systems was 0.981 (N = 9, P CMOS image-sensor platform. Copyright © 2014 Elsevier B.V. All rights reserved.

  14. Stiffness-Independent Highly Efficient On-Chip Extraction of Cell-Laden Hydrogel Microcapsules from Oil Emulsion into Aqueous Solution by Dielectrophoresis.

    Science.gov (United States)

    Huang, Haishui; Sun, Mingrui; Heisler-Taylor, Tyler; Kiourti, Asimina; Volakis, John; Lafyatis, Gregory; He, Xiaoming

    2015-10-28

    A dielectrophoresis (DEP)-based method achieves highly efficient on-chip extraction of cell-laden microcapsules of any stiffness from oil into aqueous solution. The hydrogel microcapsules can be extracted into the aqueous solution by DEP and interfacial tension forces with no trapped oil, while the encapsulated cells are free from electrical damage due to the Faraday cage effect. © 2015 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  15. Radiation effects in a CMOS/SOS/Al-Gate D/A converter and on-chip diagnostic transistors

    International Nuclear Information System (INIS)

    Brucker, G.J.; Heagerty, W.

    1976-01-01

    This paper presents the results obtained from total dose and transient radiation tests on a CMOS/SOS/Al-Gate D/A converter and on-chip diagnostic transistors. Samples were irradiated by cobalt-60 gamma rays under worst-case conditions, and by 10-MeV electron pulses of 50-ns and 4.4-μs duration. Devices were fabricated with three different insulators; the two discussed here are standard wet oxide and a pyrogenic oxide. Test transistors on the D/A chips made it possible to diagnose the failure modes of the converter and to evaluate some special designs. These consisted of standard edge p- and n-channel transistors, edgeless units, edgeless tetrode transistors, and an edgeless type transmission gate with a diode clamp from substrate to gate. The total dose results indicate that the pyrogenic oxide increased the failure dose of the operational amplifier portion of the converter from 10 3 rads (Si) to 2 x 10 6 rads (Si); however, the sample and hold failed after exposure to a low level of 10 3 rads (Si). Test devices indicated this to be due to the radiation-induced leakage current of the transmission gate which discharges the sample and hold capacitor. The diode clamp decreased the threshold voltage shifts and the leakage currents. The edgeless devices improved the device performance because of a more abrupt turn-on. Narrow-pulse test data indicated that the edgeless units produced less photocurrent than the edge units by about a factor of three to four. Converter upset levels are less than or equal to 10 9 rads/s due to precision requirements which make a few millivolt transients untenable

  16. Construction of a liver sinusoid based on the laminar flow on chip and self-assembly of endothelial cells.

    Science.gov (United States)

    Mi, Shengli; Yi, Xiaoman; Du, Zhichang; Xu, Yuanyuan; Sun, Wei

    2018-02-20

    The liver is one of the main metabolic organs, and nearly all ingested drugs will be metabolized by the liver. Only a small fraction of drugs are able to come onto the market during drug development, and hepatic toxicity is a major cause for drug failure. Since drug development is costly in both time and materials, an in vitro liver model that can accelerate bioreactions in the liver and reduce drug consumption is imperative in the pharmaceutical industry. The liver on a chip is an ideal alternative for its controllable environment and tiny size, which means constructing a more biomimetic model, reducing material consumption as well as promoting drug diffusion and reaction. In this study, taking advantage of the laminar flow on chips and using natural degradable gel rat tail Collagen-I, we constructed a liver sinusoid on a chip. By synchronously injecting two kinds of cell-laden collagen, HepG2-laden collagen and HUVEC-laden collagen, we formed two collagen layers with a clear borderline. By controlling the HUVEC density and injection of growth factors, HUVECs in collagen formed a monolayer through self-assembly. Thus, a liver sinusoid on a chip was achieved in a more biomimetic environment with a more controllable and uniform distribution of discrete HUVECs. Viability, album secretion and urea synthesis of the live sinusoid on a chip were analysed on days 3, 5 and 7 after collagen injection with acetaminophen treatment at 0 (control), 10 and 20 mM. The results indicated that our liver sinusoid on a chip was able to maintain bioactivity and function for at least 7 d and was beneficial for hepatotoxic drug screening.

  17. Diseño de Hardware y Software de Systems on Chip empleando tecnología Xilinx EDK

    Directory of Open Access Journals (Sweden)

    Julio Cadena

    2012-11-01

    Full Text Available El presente artículo resume el proceso empleado para obtener el primer System on Chip (SoC diseñado, desarrollado, y emulado en la Escuela Politécnica del Ejército (ESPE y en el Ecuador. Se demostrará que combinando las ventajas del diseño sobre Field Programable Gate Arrays (FPGAs empleando la reutilización de IP Cores y plataformas, junto al uso de la tecnología de desarrollo Xilinx EDK, se puede diseñar tanto el hardware como el software de un chip de manera rápida y económicamente fiable. Además, se detalla el uso de la metodología Platform Based Design (PBD y del concepto de co-diseño de hardware y software para diseñar las capas de hardware, sistema operativo y aplicación de un chip. La capa de hardware contiene una serie de IP Cores gobernados por un procesador MicroBlaze trabajando dentro de la arquitectura CoreConnect de IBM. Mientras que la capa de sistema operativo está conformada por drivers, librerías y el Sistema Operativo en Tiempo Real (RTOS Xilkernel. Por último, la capa de aplicación tiene la funcionalidad de controlar una planta de temperatura, mediante la selección de dos técnicas de control: ON-OFF o PID. Cabe destacar que el co-diseño se desarrolló considerando un adecuado enfoque conceptual, arquitectural, y metodológico1.

  18. On-chip acoustophoretic isolation of microflora including S. typhimurium from raw chicken, beef and blood samples.

    Science.gov (United States)

    Ngamsom, Bongkot; Lopez-Martinez, Maria J; Raymond, Jean-Claude; Broyer, Patrick; Patel, Pradip; Pamme, Nicole

    2016-04-01

    Pathogen analysis in food samples routinely involves lengthy growth-based pre-enrichment and selective enrichment of food matrices to increase the ratio of pathogen to background flora. Similarly, for blood culture analysis, pathogens must be isolated and enriched from a large excess of blood cells to allow further analysis. Conventional techniques of centrifugation and filtration are cumbersome, suffer from low sample throughput, are not readily amenable to automation and carry a risk of damaging biological samples. We report on-chip acoustophoresis as a pre-analytical technique for the resolution of total microbial flora from food and blood samples. The resulting 'clarified' sample is expected to increase the performance of downstream systems for the specific detection of the pathogens. A microfluidic chip with three inlets, a central separation channel and three outlets was utilized. Samples were introduced through the side inlets, and buffer solution through the central inlet. Upon ultrasound actuation, large debris particles (10-100 μm) from meat samples were continuously partitioned into the central buffer channel, leaving the 'clarified' outer sample streams containing both, the pathogenic cells and the background flora (ca. 1 μm) to be collected over a 30 min operation cycle before further analysis. The system was successfully tested with Salmonella typhimurium-spiked (ca. 10(3)CFU mL(-1)) samples of chicken and minced beef, demonstrating a high level of the pathogen recovery (60-90%). When applied to S. typhimurium contaminated blood samples (10(7)CFU mL(-1)), acoustophoresis resulted in a high depletion (99.8%) of the red blood cells (RBC) which partitioned in the buffer stream, whilst sufficient numbers of the viable S. typhimurium remained in the outer channels for further analysis. These results indicate that the technology may provide a generic approach for pre-analytical sample preparation prior to integrated and automated downstream detection of

  19. An evaluation of two-channel ChIP-on-chip and DNA methylation microarray normalization strategies

    Science.gov (United States)

    2012-01-01

    Background The combination of chromatin immunoprecipitation with two-channel microarray technology enables genome-wide mapping of binding sites of DNA-interacting proteins (ChIP-on-chip) or sites with methylated CpG di-nucleotides (DNA methylation microarray). These powerful tools are the gateway to understanding gene transcription regulation. Since the goals of such studies, the sample preparation procedures, the microarray content and study design are all different from transcriptomics microarrays, the data pre-processing strategies traditionally applied to transcriptomics microarrays may not be appropriate. Particularly, the main challenge of the normalization of "regulation microarrays" is (i) to make the data of individual microarrays quantitatively comparable and (ii) to keep the signals of the enriched probes, representing DNA sequences from the precipitate, as distinguishable as possible from the signals of the un-enriched probes, representing DNA sequences largely absent from the precipitate. Results We compare several widely used normalization approaches (VSN, LOWESS, quantile, T-quantile, Tukey's biweight scaling, Peng's method) applied to a selection of regulation microarray datasets, ranging from DNA methylation to transcription factor binding and histone modification studies. Through comparison of the data distributions of control probes and gene promoter probes before and after normalization, and assessment of the power to identify known enriched genomic regions after normalization, we demonstrate that there are clear differences in performance between normalization procedures. Conclusion T-quantile normalization applied separately on the channels and Tukey's biweight scaling outperform other methods in terms of the conservation of enriched and un-enriched signal separation, as well as in identification of genomic regions known to be enriched. T-quantile normalization is preferable as it additionally improves comparability between microarrays. In

  20. Invited Article: Electrically tunable silicon-based on-chip microdisk resonator for integrated microwave photonic applications

    Directory of Open Access Journals (Sweden)

    Weifeng Zhang

    2016-11-01

    Full Text Available Silicon photonics with advantages of small footprint, compatibility with the mature CMOS fabrication technology, and its potential for seamless integration with electronics is making a significant difference in realizing on-chip integration of photonic systems. A microdisk resonator (MDR with a strong capacity in trapping and storing photons is a versatile element in photonic integrated circuits. Thanks to the large index contrast, a silicon-based MDR with an ultra-compact footprint has a great potential for large-scale and high-density integrations. However, the existence of multiple whispering gallery modes (WGMs and resonance splitting in an MDR imposes inherent limitations on its widespread applications. In addition, the waveguide structure of an MDR is incompatible with that of a lateral PN junction, which leads to the deprivation of its electrical tunability. To circumvent these limitations, in this paper we propose a novel design of a silicon-based MDR by introducing a specifically designed slab waveguide to surround the disk and the lateral sides of the bus waveguide to suppress higher-order WGMs and to support the incorporation of a lateral PN junction for electrical tunability. An MDR based on the proposed design is fabricated and its optical performance is evaluated. The fabricated MDR exhibits single-mode operation with a free spectral range of 28.85 nm. Its electrical tunability is also demonstrated and an electro-optic frequency response with a 3-dB modulation bandwidth of ∼30.5 GHz is measured. The use of the fabricated MDR for the implementation of an electrically tunable optical delay-line and a tunable fractional-order temporal photonic differentiator is demonstrated.