WorldWideScience

Sample records for integrated silicon device

  1. Silicon Carbide Power Devices and Integrated Circuits

    Science.gov (United States)

    Lauenstein, Jean-Marie; Casey, Megan; Samsel, Isaak; LaBel, Ken; Chen, Yuan; Ikpe, Stanley; Wilcox, Ted; Phan, Anthony; Kim, Hak; Topper, Alyson

    2017-01-01

    An overview of the NASA NEPP Program Silicon Carbide Power Device subtask is given, including the current task roadmap, partnerships, and future plans. Included are the Agency-wide efforts to promote development of single-event effect hardened SiC power devices for space applications.

  2. Silicon integrated circuits advances in materials and device research

    CERN Document Server

    Kahng, Dawon

    1981-01-01

    Silicon Integrated Circuits, Part B covers the special considerations needed to achieve high-power Si-integrated circuits. The book presents articles about the most important operations needed for the high-power circuitry, namely impurity diffusion and oxidation; crystal defects under thermal equilibrium in silicon and the development of high-power device physics; and associated technology. The text also describes the ever-evolving processing technology and the most promising approaches, along with the understanding of processing-related areas of physics and chemistry. Physicists, chemists, an

  3. Crystalline Silicon Interconnected Strips (XIS). Introduction to a New, Integrated Device and Module Concept

    Energy Technology Data Exchange (ETDEWEB)

    Van Roosmalen, J.; Bronsveld, P.; Mewe, A.; Janssen, G.; Stodolny, M.; Cobussen-Pool, E.; Bennett, I.; Weeber, A.; Geerligs, B. [ECN Solar Energy, P.O. Box 1, NL-1755 ZG, Petten (Netherlands)

    2012-06-15

    A new device concept for high efficiency, low cost, wafer based silicon solar cells is introduced. To significantly lower the costs of Si photovoltaics, high efficiencies and large reductions of metals and silicon costs are required. To enable this, the device architecture was adapted into low current devices by applying thin silicon strips, to which a special high efficiency back-contact heterojunction cell design was applied. Standard industrial production processes can be used for our fully integrated cell and module design, with a cost reduction potential below 0.5 euro/Wp. First devices have been realized demonstrating the principle of a series connected back contact hybrid silicon heterojunction module concept.

  4. Silicon analog components device design, process integration, characterization, and reliability

    CERN Document Server

    El-Kareh, Badih

    2015-01-01

    This book covers modern analog components, their characteristics, and interactions with process parameters. It serves as a comprehensive guide, addressing both the theoretical and practical aspects of modern silicon devices and the relationship between their electrical properties and processing conditions. Based on the authors’ extensive experience in the development of analog devices, this book is intended for engineers and scientists in semiconductor research, development and manufacturing. The problems at the end of each chapter and the numerous charts, figures and tables also make it appropriate for use as a text in graduate and advanced undergraduate courses in electrical engineering and materials science.

  5. Optoelectronic Device Integration in Silicon (OpSIS)

    Science.gov (United States)

    2015-10-26

    silicon-on-insulator," Opt. Express 22, 17872-17879 (2014) Y. Yang, C. Galland, Y. Liu, K. Tan , R. Ding, Q. Li, K. Bergman, T. Baehr-Jones, M...Jaeger, Nicolas AF; Chrostowski, Lukas; “Electrically tunable resonant filters in phase-shifted contra- directional couplers” IEEE Group IV Photonics... Nicolas AF; Chrostowski, Lukas; “Silicon photonic grating-assisted, contra-directional couplers” Optics express Vol. 21, No. 3; 3633-3650 (2013

  6. Al transmon qubits on silicon-on-insulator for quantum device integration

    Science.gov (United States)

    Keller, Andrew J.; Dieterle, Paul B.; Fang, Michael; Berger, Brett; Fink, Johannes M.; Painter, Oskar

    2017-07-01

    We present the fabrication and characterization of an aluminum transmon qubit on a silicon-on-insulator substrate. Key to the qubit fabrication is the use of an anhydrous hydrofluoric vapor process which selectively removes the lossy silicon oxide buried underneath the silicon device layer. For a 5.6 GHz qubit measured dispersively by a 7.1 GHz resonator, we find T1 = 3.5 μs and T2* = 2.2 μs. This process in principle permits the co-fabrication of silicon photonic and mechanical elements, providing a route towards chip-scale integration of electro-opto-mechanical transducers for quantum networking of superconducting microwave quantum circuits. The additional processing steps are compatible with established fabrication techniques for aluminum transmon qubits on silicon.

  7. Integrated silicon optoelectronics

    CERN Document Server

    Zimmermann, Horst

    2000-01-01

    'Integrated Silicon Optoelectronics'assembles optoelectronics and microelectronics The book concentrates on silicon as the major basis of modern semiconductor devices and circuits Starting from the basics of optical emission and absorption and from the device physics of photodetectors, the aspects of the integration of photodetectors in modern bipolar, CMOS, and BiCMOS technologies are discussed Detailed descriptions of fabrication technologies and applications of optoelectronic integrated circuits are included The book, furthermore, contains a review of the state of research on eagerly expected silicon light emitters In order to cover the topic of the book comprehensively, integrated waveguides, gratings, and optoelectronic power devices are included in addition Numerous elaborate illustrations promote an easy comprehension 'Integrated Silicon Optoelectronics'will be of value to engineers, physicists, and scientists in industry and at universities The book is also recommendable for graduate students speciali...

  8. Nanowire-integrated microporous silicon membrane for continuous fluid transport in micro cooling device

    International Nuclear Information System (INIS)

    So, Hongyun; Pisano, Albert P.; Cheng, Jim C.

    2013-01-01

    We report an efficient passive micro pump system combining the physical properties of nanowires and micropores. This nanowire-integrated microporous silicon membrane was created to feed coolant continuously onto the surface of the wick in a micro cooling device to ensure it remains hydrated and in case of dryout, allow for regeneration of the system. The membrane was fabricated by photoelectrochemical etching to form micropores followed by hydrothermal growth of nanowires. This study shows a promising approach to address thermal management challenges for next generation electronic devices with absence of external power

  9. Silicon integrated circuit process

    International Nuclear Information System (INIS)

    Lee, Jong Duck

    1985-12-01

    This book introduces the process of silicon integrated circuit. It is composed of seven parts, which are oxidation process, diffusion process, ion implantation process such as ion implantation equipment, damage, annealing and influence on manufacture of integrated circuit and device, chemical vapor deposition process like silicon Epitaxy LPCVD and PECVD, photolithography process, including a sensitizer, spin, harden bake, reflection of light and problems related process, infrared light bake, wet-etch, dry etch, special etch and problems of etching, metal process like metal process like metal-silicon connection, aluminum process, credibility of aluminum and test process.

  10. Silicon integrated circuit process

    Energy Technology Data Exchange (ETDEWEB)

    Lee, Jong Duck

    1985-12-15

    This book introduces the process of silicon integrated circuit. It is composed of seven parts, which are oxidation process, diffusion process, ion implantation process such as ion implantation equipment, damage, annealing and influence on manufacture of integrated circuit and device, chemical vapor deposition process like silicon Epitaxy LPCVD and PECVD, photolithography process, including a sensitizer, spin, harden bake, reflection of light and problems related process, infrared light bake, wet-etch, dry etch, special etch and problems of etching, metal process like metal process like metal-silicon connection, aluminum process, credibility of aluminum and test process.

  11. Heterogenous integration of a thin-film GaAs photodetector and a microfluidic device on a silicon substrate

    International Nuclear Information System (INIS)

    Song, Fuchuan; Xiao, Jing; Udawala, Fidaali; Seo, Sang-Woo

    2011-01-01

    In this paper, heterogeneous integration of a III–V semiconductor thin-film photodetector (PD) with a microfluidic device is demonstrated on a SiO 2 –Si substrate. Thin-film format of optical devices provides an intimate integration of optical functions with microfluidic devices. As a demonstration of a multi-material and functional system, the biphasic flow structure in the polymeric microfluidic channels was co-integrated with a III–V semiconductor thin-film PD. The fluorescent drops formed in the microfluidic device are successfully detected with an integrated thin-film PD on a silicon substrate. The proposed three-dimensional integration structure is an alternative approach to combine optical functions with microfluidic functions on silicon-based electronic functions.

  12. Neuron Stimulation Device Integrated with Silicon Nanowire-Based Photodetection Circuit on a Flexible Substrate

    Directory of Open Access Journals (Sweden)

    Suk Won Jung

    2016-12-01

    Full Text Available This paper proposes a neural stimulation device integrated with a silicon nanowire (SiNW-based photodetection circuit for the activation of neurons with light. The proposed device is comprised of a voltage divider and a current driver in which SiNWs are used as photodetector and field-effect transistors; it has the functions of detecting light, generating a stimulation signal in proportion to the light intensity, and transmitting the signal to a micro electrode. To show the applicability of the proposed neural stimulation device as a high-resolution retinal prosthesis system, a high-density neural stimulation device with a unit cell size of 110 × 110 μ m and a resolution of 32 × 32 was fabricated on a flexible film with a thickness of approximately 50 μm. Its effectiveness as a retinal stimulation device was then evaluated using a unit cell in an in vitro animal experiment involving the retinal tissue of retinal Degeneration 1 (rd1 mice. Experiments wherein stimulation pulses were applied to the retinal tissues successfully demonstrate that the number of spikes in neural response signals increases in proportion to light intensity.

  13. Micro-fabricated silicon devices for advanced thermal management and integration of particle tracking detectors

    CERN Document Server

    Romagnoli, Giulia; Gambaro, Carla

    Since their first studies targeting the cooling of high-power computing chips, micro-channel devices are proven to provide a very efficient cooling system. In the last years micro-channel cooling has been successfully applied to the cooling of particle detectors at CERN. Thanks to their high thermal efficiency, they can guarantee a good heat sink for the cooling of silicon trackers, fundamental for the reduction of the radiation damage caused by the beam interactions. The radiation damage on the silicon detector is increasing with temperature and furthermore the detectors are producing heat that should be dissipated in the supporting structure. Micro-channels guarantee a distributed and uniform thermal exchange, thanks to the high flexibility of the micro-fabrication process that allows a large variety of channel designs. The thin nature of the micro-channels etched inside silicon wafers, is fulfilling the physics requirement of minimization of the material crossed by the particle beam. Furthermore micro-chan...

  14. Silicon photonics fundamentals and devices

    CERN Document Server

    Deen, M Jamal

    2012-01-01

    The creation of affordable high speed optical communications using standard semiconductor manufacturing technology is a principal aim of silicon photonics research. This would involve replacing copper connections with optical fibres or waveguides, and electrons with photons. With applications such as telecommunications and information processing, light detection, spectroscopy, holography and robotics, silicon photonics has the potential to revolutionise electronic-only systems. Providing an overview of the physics, technology and device operation of photonic devices using exclusively silicon and related alloys, the book includes: * Basic Properties of Silicon * Quantum Wells, Wires, Dots and Superlattices * Absorption Processes in Semiconductors * Light Emitters in Silicon * Photodetectors , Photodiodes and Phototransistors * Raman Lasers including Raman Scattering * Guided Lightwaves * Planar Waveguide Devices * Fabrication Techniques and Material Systems Silicon Photonics: Fundamentals and Devices outlines ...

  15. Silicon based light-emitting materials and devices

    International Nuclear Information System (INIS)

    Chen Weide

    1999-01-01

    Silicon based light-emitting materials and devices are the key to optoelectronic integration. Recently, there has been significant progress in materials engineering methods. The author reviews the latest developments in this area including erbium doped silicon, porous silicon, nanocrystalline silicon and Si/SiO 2 superlattice structures. The incorporation of these different materials into devices is described and future device prospects are assessed

  16. Hybrid Integrated Platforms for Silicon Photonics

    Science.gov (United States)

    Liang, Di; Roelkens, Gunther; Baets, Roel; Bowers, John E.

    2010-01-01

    A review of recent progress in hybrid integrated platforms for silicon photonics is presented. Integration of III-V semiconductors onto silicon-on-insulator substrates based on two different bonding techniques is compared, one comprising only inorganic materials, the other technique using an organic bonding agent. Issues such as bonding process and mechanism, bonding strength, uniformity, wafer surface requirement, and stress distribution are studied in detail. The application in silicon photonics to realize high-performance active and passive photonic devices on low-cost silicon wafers is discussed. Hybrid integration is believed to be a promising technology in a variety of applications of silicon photonics.

  17. Hybrid Integrated Platforms for Silicon Photonics

    Directory of Open Access Journals (Sweden)

    John E. Bowers

    2010-03-01

    Full Text Available A review of recent progress in hybrid integrated platforms for silicon photonics is presented. Integration of III-V semiconductors onto silicon-on-insulator substrates based on two different bonding techniques is compared, one comprising only inorganic materials, the other technique using an organic bonding agent. Issues such as bonding process and mechanism, bonding strength, uniformity, wafer surface requirement, and stress distribution are studied in detail. The application in silicon photonics to realize high-performance active and passive photonic devices on low-cost silicon wafers is discussed. Hybrid integration is believed to be a promising technology in a variety of applications of silicon photonics.

  18. Implantation damage in silicon devices

    International Nuclear Information System (INIS)

    Nicholas, K.H.

    1977-01-01

    Ion implantation, is an attractive technique for producing doped layers in silicon devices but the implantation process involves disruption of the lattice and defects are formed, which can degrade device properties. Methods of minimizing such damage are discussed and direct comparisons made between implantation and diffusion techniques in terms of defects in the final devices and the electrical performance of the devices. Defects are produced in the silicon lattice during implantation but they are annealed to form secondary defects even at room temperature. The annealing can be at a low temperature ( 0 C) when migration of defects in silicon in generally small, or at high temperature when they can grow well beyond the implanted region. The defect structures can be complicated by impurity atoms knocked into the silicon from surface layers by the implantation. Defects can also be produced within layers on top of the silicon and these can be very important in device fabrication. In addition to affecting the electrical properties of the final device, defects produced during fabrication may influence the chemical properties of the materials. The use of these properties to improve devices are discussed as well as the degradation they can cause. (author)

  19. Silicon integrated circuits part A : supplement 2

    CERN Document Server

    Kahng, Dawon

    1981-01-01

    Applied Solid State Science, Supplement 2: Silicon Integrated Circuits, Part A focuses on MOS device physics. This book is divided into three chapters-physics of the MOS transistor; nonvolatile memories; and properties of silicon-on-sapphire substrates devices, and integrated circuits. The topics covered include the short channel effects, MOSFET structures, floating gate devices, technology for nonvolatile semiconductor memories, sapphire substrates, and SOS integrated circuits and systems. The MOS capacitor, MIOS devices, and SOS process and device technology are also deliberated. This public

  20. Silicon hybrid integration

    International Nuclear Information System (INIS)

    Li Xianyao; Yuan Taonu; Shao Shiqian; Shi Zujun; Wang Yi; Yu Yude; Yu Jinzhong

    2011-01-01

    Recently,much attention has concentrated on silicon based photonic integrated circuits (PICs), which provide a cost-effective solution for high speed, wide bandwidth optical interconnection and optical communication.To integrate III-V compounds and germanium semiconductors on silicon substrates,at present there are two kinds of manufacturing methods, i.e., heteroepitaxy and bonding. Low-temperature wafer bonding which can overcome the high growth temperature, lattice mismatch,and incompatibility of thermal expansion coefficients during heteroepitaxy, has offered the possibility for large-scale heterogeneous integration. In this paper, several commonly used bonding methods are reviewed, and the future trends of low temperature wafer bonding envisaged. (authors)

  1. Lanthanide-Assisted Deposition of Strongly Electro-optic PZT Thin Films on Silicon: Toward Integrated Active Nanophotonic Devices.

    Science.gov (United States)

    George, J P; Smet, P F; Botterman, J; Bliznuk, V; Woestenborghs, W; Van Thourhout, D; Neyts, K; Beeckman, J

    2015-06-24

    The electro-optical properties of lead zirconate titanate (PZT) thin films depend strongly on the quality and crystallographic orientation of the thin films. We demonstrate a novel method to grow highly textured PZT thin films on silicon using the chemical solution deposition (CSD) process. We report the use of ultrathin (5-15 nm) lanthanide (La, Pr, Nd, Sm) based intermediate layers for obtaining preferentially (100) oriented PZT thin films. X-ray diffraction measurements indicate preferentially oriented intermediate Ln2O2CO3 layers providing an excellent lattice match with the PZT thin films grown on top. The XRD and scanning electron microscopy measurements reveal that the annealed layers are dense, uniform, crack-free and highly oriented (>99.8%) without apparent defects or secondary phases. The EDX and HRTEM characterization confirm that the template layers act as an efficient diffusion barrier and form a sharp interface between the substrate and the PZT. The electrical measurements indicate a dielectric constant of ∼650, low dielectric loss of ∼0.02, coercive field of 70 kV/cm, remnant polarization of 25 μC/cm(2), and large breakdown electric field of 1000 kV/cm. Finally, the effective electro-optic coefficients of the films are estimated with a spectroscopic ellipsometer measurement, considering the electric field induced variations in the phase reflectance ratio. The electro-optic measurements reveal excellent linear effective pockels coefficients of 110 to 240 pm/V, which makes the CSD deposited PZT thin film an ideal candidate for Si-based active integrated nanophotonic devices.

  2. Label-Free Virus Capture and Release by a Microfluidic Device Integrated with Porous Silicon Nanowire Forest.

    Science.gov (United States)

    Xia, Yiqiu; Tang, Yi; Yu, Xu; Wan, Yuan; Chen, Yizhu; Lu, Huaguang; Zheng, Si-Yang

    2017-02-01

    Viral diseases are perpetual threats to human and animal health. Detection and characterization of viral pathogens require accurate, sensitive, and rapid diagnostic assays. For field and clinical samples, the sample preparation procedures limit the ultimate performance and utility of the overall virus diagnostic protocols. This study presents the development of a microfluidic device embedded with porous silicon nanowire (pSiNW) forest for label-free size-based point-of-care virus capture in a continuous curved flow design. The pSiNW forests with specific interwire spacing are synthesized in situ on both bottom and sidewalls of the microchannels in a batch process. With the enhancement effect of Dean flow, this study demonstrates that about 50% H5N2 avian influenza viruses are physically trapped without device clogging. A unique feature of the device is that captured viruses can be released by inducing self-degradation of the pSiNWs in physiological aqueous environment. About 60% of captured viruses can be released within 24 h for virus culture, subsequent molecular diagnosis, and other virus characterization and analyses. This device performs viable, unbiased, and label-free virus isolation and release. It has great potentials for virus discovery, virus isolation and culture, functional studies of virus pathogenicity, transmission, drug screening, and vaccine development. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  3. Towards Cost-Effective Crystalline Silicon Based Flexible Solar Cells: Integration Strategy by Rational Design of Materials, Process, and Devices

    KAUST Repository

    Bahabry, Rabab R.

    2017-11-30

    The solar cells market has an annual growth of more than 30 percent over the past 15 years. At the same time, the cost of the solar modules diminished to meet both of the rapid global demand and the technological improvements. In particular for the crystalline silicon solar cells, the workhorse of this technology. The objective of this doctoral thesis is enhancing the efficiency of c-Si solar cells while exploring the cost reduction via innovative techniques. Contact metallization and ultra-flexible wafer based c-Si solar cells are the main areas under investigation. First, Silicon-based solar cells typically utilize screen printed Silver (Ag) metal contacts which affect the optimal electrical performance. To date, metal silicide-based ohmic contacts are occasionally used for the front contact grid lines. In this work, investigation of the microstructure and the electrical characteristics of nickel monosilicide (NiSi) ohmic contacts on the rear side of c-Si solar cells has been carried out. Significant enhancement in the fill factor leading to increasing the total power conversion efficiency is observed. Second, advanced classes of modern application require a new generation of versatile solar cells showcasing extreme mechanical resilience. However, silicon is a brittle material with a fracture strains <1%. Highly flexible Si-based solar cells are available in the form thin films which seem to be disadvantageous over thick Si solar cells due to the reduction of the optical absorption with less active Si material. Here, a complementary metal oxide semiconductor (CMOS) technology based integration strategy is designed where corrugation architecture to enable an ultra-flexible solar cell module from bulk mono-crystalline silicon solar wafer with 17% efficiency. This periodic corrugated array benefits from an interchangeable solar cell segmentation scheme which preserves the active silicon thickness and achieves flexibility via interdigitated back contacts. These cells

  4. Silicon solid state devices and radiation detection

    CERN Document Server

    Leroy, Claude

    2012-01-01

    This book addresses the fundamental principles of interaction between radiation and matter, the principles of working and the operation of particle detectors based on silicon solid state devices. It covers a broad scope with respect to the fields of application of radiation detectors based on silicon solid state devices from low to high energy physics experiments including in outer space and in the medical environment. This book covers stateof- the-art detection techniques in the use of radiation detectors based on silicon solid state devices and their readout electronics, including the latest developments on pixelated silicon radiation detector and their application.

  5. CMOS and BiCMOS process integration and device characterization

    CERN Document Server

    El-Kareh, Badih

    2009-01-01

    Covers both the theoretical and practical aspects of modern silicon devices and the relationship between their electrical properties and processing conditions. This book also covers silicon devices and integrated process technologies. It discusses modern silicon devices, their characteristics, and interactions with process parameters.

  6. Synthesis and properties of silicon nanowire devices

    Science.gov (United States)

    Byon, Kumhyo

    Silicon nanowire (SiNW) is a very attractive one-dimensional material for future nanoelectronic applications. Reliable control of key field effect transistor (FET) parameters such as conductance, mobility, threshold voltage and on/off ratio is crucial to the applications of SiNW to working logic devices and integrated circuits. In this thesis, we fabricated silicon nanowire field effect transistors (SiNW FETs) and studied the dependence of their electrical transport properties upon various parameters including SiNW growth conditions, post-growth doping, and contact annealing. From these studies, we found how different processes control important FET characteristics. Key accomplishments of this thesis include p-channel enhancement mode FETs, n-channel FETs by post-growth vapor doping and high performance ambipolar devices. In the first part of this work, single crystalline SiNWs were synthesized by thermal evaporation without gold catalysts. FETs were fabricated using both as-grown SiNWs and post-growth n-doped SiNWs. FET from p-type source materials behaves as a p-channel enhancement mode FET which is predominant in logic devices due to its fast operation and low power consumption. Using bismuth vapor, the as-grown SiNWs were doped into n-type materials. The majority carriers in SiNWs can therefore be controlled by proper choice of the vapor phase dopant species. Post-growth doping using vapor phase is applicable to other nanowire systems. In the second part, high performance ambipolar FETs were fabricated. A two step annealing process was used to control the Schottky barrier between SiNW and metal contacts in order to enhance device performance. Initial p-channel SiNW FETs were converted into ambipolar SiNW FETs after contact annealing. Furthermore, significant increases in both on/off ratio and channel mobilities were achieved after contact annealing. Promising device structures to implement ambipolar devices into large scale integrated circuits were proposed

  7. Transistors using crystalline silicon devices on glass

    Science.gov (United States)

    McCarthy, Anthony M.

    1995-01-01

    A method for fabricating transistors using single-crystal silicon devices on glass. This method overcomes the potential damage that may be caused to the device during high voltage bonding and employs a metal layer which may be incorporated as part of the transistor. This is accomplished such that when the bonding of the silicon wafer or substrate to the glass substrate is performed, the voltage and current pass through areas where transistors will not be fabricated. After removal of the silicon substrate, further metal may be deposited to form electrical contact or add functionality to the devices. By this method both single and gate-all-around devices may be formed.

  8. Porous silicon carbide (SIC) semiconductor device

    Science.gov (United States)

    Shor, Joseph S. (Inventor); Kurtz, Anthony D. (Inventor)

    1996-01-01

    Porous silicon carbide is fabricated according to techniques which result in a significant portion of nanocrystallites within the material in a sub 10 nanometer regime. There is described techniques for passivating porous silicon carbide which result in the fabrication of optoelectronic devices which exhibit brighter blue luminescence and exhibit improved qualities. Based on certain of the techniques described porous silicon carbide is used as a sacrificial layer for the patterning of silicon carbide. Porous silicon carbide is then removed from the bulk substrate by oxidation and other methods. The techniques described employ a two-step process which is used to pattern bulk silicon carbide where selected areas of the wafer are then made porous and then the porous layer is subsequently removed. The process to form porous silicon carbide exhibits dopant selectivity and a two-step etching procedure is implemented for silicon carbide multilayers.

  9. Photonic integration and photonics-electronics convergence on silicon platform

    CERN Document Server

    Liu, Jifeng; Baba, Toshihiko; Vivien, Laurent; Xu, Dan-Xia

    2015-01-01

    Silicon photonics technology, which has the DNA of silicon electronics technology, promises to provide a compact photonic integration platform with high integration density, mass-producibility, and excellent cost performance. This technology has been used to develop and to integrate various photonic functions on silicon substrate. Moreover, photonics-electronics convergence based on silicon substrate is now being pursued. Thanks to these features, silicon photonics will have the potential to be a superior technology used in the construction of energy-efficient cost-effective apparatuses for various applications, such as communications, information processing, and sensing. Considering the material characteristics of silicon and difficulties in microfabrication technology, however, silicon by itself is not necessarily an ideal material. For example, silicon is not suitable for light emitting devices because it is an indirect transition material. The resolution and dynamic range of silicon-based interference de...

  10. From silicon to organic nanoparticle memory devices.

    Science.gov (United States)

    Tsoukalas, D

    2009-10-28

    After introducing the operational principle of nanoparticle memory devices, their current status in silicon technology is briefly presented in this work. The discussion then focuses on hybrid technologies, where silicon and organic materials have been combined together in a nanoparticle memory device, and finally concludes with the recent development of organic nanoparticle memories. The review is focused on the nanoparticle memory concept as an extension of the current flash memory device. Organic nanoparticle memories are at a very early stage of research and have not yet found applications. When this happens, it is expected that they will not directly compete with mature silicon technology but will find their own areas of application.

  11. Silicon spintronics with ferromagnetic tunnel devices

    International Nuclear Information System (INIS)

    Jansen, R; Sharma, S; Dash, S P; Min, B C

    2012-01-01

    In silicon spintronics, the unique qualities of ferromagnetic materials are combined with those of silicon, aiming at creating an alternative, energy-efficient information technology in which digital data are represented by the orientation of the electron spin. Here we review the cornerstones of silicon spintronics, namely the creation, detection and manipulation of spin polarization in silicon. Ferromagnetic tunnel contacts are the key elements and provide a robust and viable approach to induce and probe spins in silicon, at room temperature. We describe the basic physics of spin tunneling into silicon, the spin-transport devices, the materials aspects and engineering of the magnetic tunnel contacts, and discuss important quantities such as the magnitude of the spin accumulation and the spin lifetime in the silicon. We highlight key experimental achievements and recent progress in the development of a spin-based information technology. (topical review)

  12. Porous silicon technology for integrated microsystems

    Science.gov (United States)

    Wallner, Jin Zheng

    With the development of micro systems, there is an increasing demand for integrable porous materials. In addition to those conventional applications, such as filtration, wicking, and insulating, many new micro devices, including micro reactors, sensors, actuators, and optical components, can benefit from porous materials. Conventional porous materials, such as ceramics and polymers, however, cannot meet the challenges posed by micro systems, due to their incompatibility with standard micro-fabrication processes. In an effort to produce porous materials that can be used in micro systems, porous silicon (PS) generated by anodization of single crystalline silicon has been investigated. In this work, the PS formation process has been extensively studied and characterized as a function of substrate type, crystal orientation, doping concentration, current density and surfactant concentration and type. Anodization conditions have been optimized for producing very thick porous silicon layers with uniform pore size, and for obtaining ideal pore morphologies. Three different types of porous silicon materials: meso porous silicon, macro porous silicon with straight pores, and macro porous silicon with tortuous pores, have been successfully produced. Regular pore arrays with controllable pore size in the range of 2mum to 6mum have been demonstrated as well. Localized PS formation has been achieved by using oxide/nitride/polysilicon stack as masking materials, which can withstand anodization in hydrofluoric acid up to twenty hours. A special etching cell with electrolytic liquid backside contact along with two process flows has been developed to enable the fabrication of thick macro porous silicon membranes with though wafer pores. For device assembly, Si-Au and In-Au bonding technologies have been developed. Very low bonding temperature (˜200°C) and thick/soft bonding layers (˜6mum) have been achieved by In-Au bonding technology, which is able to compensate the potentially

  13. Process and device integration for silicon tunnel FETs utilizing isoelectronic trap technology to enhance the ON current

    Science.gov (United States)

    Mori, Takahiro; Asai, Hidehiro; Fukuda, Koichi; Matsukawa, Takashi

    2018-04-01

    A tunnel FET (TFET) is a candidate replacement for conventional MOSFETs to realize low-power LSI. The most significant issue with the practical application of TFETs concerns their low tunneling current. Si is an indirect-gap material with a low band-to-band tunneling probability and is not favored for the channel. However, a new technology has recently been proposed to enhance the tunneling current in Si-TFETs by utilizing isoelectronic trap (IET) technology. IET technology provides an innovative approach to realizing low-power LSI with TFETs. In this paper, state-of-the-art research on Si-TFETs with IET technology from the viewpoint of process and device integration is reviewed.

  14. Mechanically flexible optically transparent silicon fabric with high thermal budget devices from bulk silicon (100)

    KAUST Repository

    Hussain, Muhammad Mustafa

    2013-05-30

    Today’s information age is driven by silicon based electronics. For nearly four decades semiconductor industry has perfected the fabrication process of continuingly scaled transistor – heart of modern day electronics. In future, silicon industry will be more pervasive, whose application will range from ultra-mobile computation to bio-integrated medical electronics. Emergence of flexible electronics opens up interesting opportunities to expand the horizon of electronics industry. However, silicon – industry’s darling material is rigid and brittle. Therefore, we report a generic batch fabrication process to convert nearly any silicon electronics into a flexible one without compromising its (i) performance; (ii) ultra-large-scale-integration complexity to integrate billions of transistors within small areas; (iii) state-of-the-art process compatibility, (iv) advanced materials used in modern semiconductor technology; (v) the most widely used and well-studied low-cost substrate mono-crystalline bulk silicon (100). In our process, we make trenches using anisotropic reactive ion etching (RIE) in the inactive areas (in between the devices) of a silicon substrate (after the devices have been fabricated following the regular CMOS process), followed by a dielectric based spacer formation to protect the sidewall of the trench and then performing an isotropic etch to create caves in silicon. When these caves meet with each other the top portion of the silicon with the devices is ready to be peeled off from the bottom silicon substrate. Release process does not need to use any external support. Released silicon fabric (25 μm thick) is mechanically flexible (5 mm bending radius) and the trenches make it semi-transparent (transparency of 7%). © (2013) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.

  15. Mechanically flexible optically transparent silicon fabric with high thermal budget devices from bulk silicon (100)

    KAUST Repository

    Hussain, Muhammad Mustafa; Rojas, Jhonathan Prieto; Sevilla, Galo T.

    2013-01-01

    Today’s information age is driven by silicon based electronics. For nearly four decades semiconductor industry has perfected the fabrication process of continuingly scaled transistor – heart of modern day electronics. In future, silicon industry will be more pervasive, whose application will range from ultra-mobile computation to bio-integrated medical electronics. Emergence of flexible electronics opens up interesting opportunities to expand the horizon of electronics industry. However, silicon – industry’s darling material is rigid and brittle. Therefore, we report a generic batch fabrication process to convert nearly any silicon electronics into a flexible one without compromising its (i) performance; (ii) ultra-large-scale-integration complexity to integrate billions of transistors within small areas; (iii) state-of-the-art process compatibility, (iv) advanced materials used in modern semiconductor technology; (v) the most widely used and well-studied low-cost substrate mono-crystalline bulk silicon (100). In our process, we make trenches using anisotropic reactive ion etching (RIE) in the inactive areas (in between the devices) of a silicon substrate (after the devices have been fabricated following the regular CMOS process), followed by a dielectric based spacer formation to protect the sidewall of the trench and then performing an isotropic etch to create caves in silicon. When these caves meet with each other the top portion of the silicon with the devices is ready to be peeled off from the bottom silicon substrate. Release process does not need to use any external support. Released silicon fabric (25 μm thick) is mechanically flexible (5 mm bending radius) and the trenches make it semi-transparent (transparency of 7%). © (2013) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.

  16. Integrated Ultrasonic-Photonic Devices

    DEFF Research Database (Denmark)

    Barretto, Elaine Cristina Saraiva

    in channel waveguides and Mach-Zehnder interferometers. Numerical models are developed based on the finite element method, and applied to several scenarios, such as optimization of the geometrical parameters of waveguides, use of slow light in photonic crystal waveguides and use of Lamb waves in membranized......This thesis deals with the modeling, design, fabrication and characterization of integrated ultrasonic-photonic devices, with particular focus on the use of standard semiconductor materials such as GaAs and silicon. The devices are based on the use of guided acoustic waves to modulate the light...... investigated. Comparisons are made with the numerical and experimental results, and they validate the obtained response of the acoustic and photonic components of the device. Finally, a new design for an optical frequency shifter is proposed, posing several advantages over existing devices in terms of size...

  17. Towards Cost-Effective Crystalline Silicon Based Flexible Solar Cells: Integration Strategy by Rational Design of Materials, Process, and Devices

    KAUST Repository

    Bahabry, Rabab R.

    2017-01-01

    . However, silicon is a brittle material with a fracture strains <1%. Highly flexible Si-based solar cells are available in the form thin films which seem to be disadvantageous over thick Si solar cells due to the reduction of the optical absorption

  18. Movable MEMS Devices on Flexible Silicon

    KAUST Repository

    Ahmed, Sally

    2013-05-05

    Flexible electronics have gained great attention recently. Applications such as flexible displays, artificial skin and health monitoring devices are a few examples of this technology. Looking closely at the components of these devices, although MEMS actuators and sensors can play critical role to extend the application areas of flexible electronics, fabricating movable MEMS devices on flexible substrates is highly challenging. Therefore, this thesis reports a process for fabricating free standing and movable MEMS devices on flexible silicon substrates; MEMS flexure thermal actuators have been fabricated to illustrate the viability of the process. Flexure thermal actuators consist of two arms: a thin hot arm and a wide cold arm separated by a small air gap; the arms are anchored to the substrate from one end and connected to each other from the other end. The actuator design has been modified by adding etch holes in the anchors to suit the process of releasing a thin layer of silicon from the bulk silicon substrate. Selecting materials that are compatible with the release process was challenging. Moreover, difficulties were faced in the fabrication process development; for example, the structural layer of the devices was partially etched during silicon release although it was protected by aluminum oxide which is not attacked by the releasing gas . Furthermore, the thin arm of the thermal actuator was thinned during the fabrication process but optimizing the patterning and etching steps of the structural layer successfully solved this problem. Simulation was carried out to compare the performance of the original and the modified designs for the thermal actuators and to study stress and temperature distribution across a device. A fabricated thermal actuator with a 250 μm long hot arm and a 225 μm long cold arm separated by a 3 μm gap produced a deflection of 3 μm before silicon release, however, the fabrication process must be optimized to obtain fully functioning

  19. Silicon Nano-Photonic Devices

    DEFF Research Database (Denmark)

    Pu, Minhao

    with the couplers, a silicon ridge waveguide is utilized in nonlinear all-optical signal processing for optical time division multiplexing (OTDM) systems. Record ultra-highspeed error-free optical demultiplexing and waveform sampling are realized and demonstrated for the rst time. Microwave phase shifters and notch...... lters based on tunable microring resonators are proposed and analyzed. Based on a single microring resonator, a maximum radio frequency (RF) phase shift of 336degrees is obtained, but with large power variation. By utilizing a dual-microring resonator, a RF phase shifting range larger than 2pi...

  20. Noise and degradation of amorphous silicon devices

    NARCIS (Netherlands)

    Bakker, J.P.R.

    2003-01-01

    Electrical noise measurements are reported on two devices of the disordered semiconductor hydrogenated amorphous silicon (a-Si:H). The material is applied in sandwich structures and in thin-film transistors (TFTs). In a sandwich configuration of an intrinsic layer and two thin doped layers, the

  1. Magneto-optical non-reciprocal devices in silicon photonics

    Directory of Open Access Journals (Sweden)

    Yuya Shoji

    2014-01-01

    Full Text Available Silicon waveguide optical non-reciprocal devices based on the magneto-optical effect are reviewed. The non-reciprocal phase shift caused by the first-order magneto-optical effect is effective in realizing optical non-reciprocal devices in silicon waveguide platforms. In a silicon-on-insulator waveguide, the low refractive index of the buried oxide layer enhances the magneto-optical phase shift, which reduces the device footprints. A surface activated direct bonding technique was developed to integrate a magneto-optical garnet crystal on the silicon waveguides. A silicon waveguide optical isolator based on the magneto-optical phase shift was demonstrated with an optical isolation of 30 dB and insertion loss of 13 dB at a wavelength of 1548 nm. Furthermore, a four port optical circulator was demonstrated with maximum isolations of 15.3 and 9.3 dB in cross and bar ports, respectively, at a wavelength of 1531 nm.

  2. Neuron-inspired flexible memristive device on silicon (100)

    KAUST Repository

    Ghoneim, Mohamed T.

    2017-06-18

    Comprehensive understanding of the world\\'s most energy efficient powerful computer, the human brain, is an elusive scientific issue. Still, already gained knowledge indicates memristors can be used as a building block to model the brain. At the same time, brain cortex is folded allowing trillions of neurons to be integrated in a compact volume. Therefore, we report flexible aluminium oxide based memristive devices fabricated and then derived from widely used bulk mono-crystalline silicon (100). We use complementary metal oxide semiconductor based processes to layout the foundation for ultra large scale integration (ULSI) of such memory devices to advance the task of comprehending a physical model of human brain.

  3. Single-Event Effects in Silicon and Silicon Carbide Power Devices

    Science.gov (United States)

    Lauenstein, Jean-Marie; Casey, Megan C.; LaBel, Kenneth A.; Topper, Alyson D.; Wilcox, Edward P.; Kim, Hak; Phan, Anthony M.

    2014-01-01

    NASA Electronics Parts and Packaging program-funded activities over the past year on single-event effects in silicon and silicon carbide power devices are presented, with focus on SiC device failure signatures.

  4. Integrated Optical lightguide device

    NARCIS (Netherlands)

    Heideman, Rene; Lambeck, Paul; Veldhuis, G.J.

    2005-01-01

    In an integrated optical lightguide device including a light-transmitting core layer, an inclusion or buffer layer, and an active or cladding layer. The cladding layer is divided into segments. Groups of different segments exhibit different refractive indices, light intensity profiles or different

  5. Integrated Optical lightguide device

    NARCIS (Netherlands)

    Heideman, Rene; Lambeck, Paul; Veldhuis, G.J.

    2000-01-01

    In an integrated optical lightguide device including a light-transmitting core layer, an inclusion or buffer layer, and an active or cladding layer. The cladding layer is divided into segments. Groups of different segments exhibit different refractive indices, light intensity profiles or different

  6. Mid-infrared integrated photonics on silicon: a perspective

    Directory of Open Access Journals (Sweden)

    Lin Hongtao

    2017-12-01

    Full Text Available The emergence of silicon photonics over the past two decades has established silicon as a preferred substrate platform for photonic integration. While most silicon-based photonic components have so far been realized in the near-infrared (near-IR telecommunication bands, the mid-infrared (mid-IR, 2–20-μm wavelength band presents a significant growth opportunity for integrated photonics. In this review, we offer our perspective on the burgeoning field of mid-IR integrated photonics on silicon. A comprehensive survey on the state-of-the-art of key photonic devices such as waveguides, light sources, modulators, and detectors is presented. Furthermore, on-chip spectroscopic chemical sensing is quantitatively analyzed as an example of mid-IR photonic system integration based on these basic building blocks, and the constituent component choices are discussed and contrasted in the context of system performance and integration technologies.

  7. Surface wave photonic device based on porous silicon multilayers

    International Nuclear Information System (INIS)

    Guillermain, E.; Lysenko, V.; Benyattou, T.

    2006-01-01

    Porous silicon is widely studied in the field of photonics due to its interesting optical properties. In this work, we present theoretical and first experimental studies of a new kind of porous silicon photonic device based on optical surface wave. A theoretical analysis of the device is presented using plane-wave approximation. The porous silicon multilayered structures are realized using electrochemical etching of p + -type silicon. Morphological and optical characterizations of the realized structures are reported

  8. Athermal Photonic Devices and Circuits on a Silicon Platform

    Science.gov (United States)

    Raghunathan, Vivek

    In recent years, silicon based optical interconnects has been pursued as an effective solution that can offer cost, energy, distance and bandwidth density improvements over copper. Monolithic integration of optics and electronics has been enabled by silicon photonic devices that can be fabricated using CMOS technology. However, high levels of device integration result in significant local and global temperature fluctuations that prove problematic for silicon based photonic devices. In particular, high temperature dependence of Si refractive index (thermo-optic (TO) coefficient) shifts the filter response of resonant devices that limit wavelength resolution in various applications. Active thermal compensation using heaters and thermo-electric coolers are the legacy solution for low density integration. However, the required electrical power, device foot print and number of input/output (I/O) lines limit the integration density. We present a passive approach to an athermal design that involves compensation of positive TO effects from a silicon core by negative TO effects of the polymer cladding. In addition, the design rule involves engineering the waveguide core geometry depending on the resonance wavelength under consideration to ensure desired amount of light in the polymer. We develop exact design requirements for a TO peak stability of 0 pm/K and present prototype performance of 0.5 pm/K. We explore the material design space through initiated chemical vapor deposition (iCVD) of 2 polymer cladding choices. We study the effect of cross-linking on the optical properties of a polymer and establish the superior performance of the co-polymer cladding compared to the homo-polymer. Integration of polymer clad devices in an electronic-photonic architecture requires the possibility of multi-layer stacking capability. We use a low temperature, high density plasma chemical vapor deposition of SiO2/SiN x to hermetically seal the athermal. Further, we employ visible light for

  9. Flexible integration of free-standing nanowires into silicon photonics.

    Science.gov (United States)

    Chen, Bigeng; Wu, Hao; Xin, Chenguang; Dai, Daoxin; Tong, Limin

    2017-06-14

    Silicon photonics has been developed successfully with a top-down fabrication technique to enable large-scale photonic integrated circuits with high reproducibility, but is limited intrinsically by the material capability for active or nonlinear applications. On the other hand, free-standing nanowires synthesized via a bottom-up growth present great material diversity and structural uniformity, but precisely assembling free-standing nanowires for on-demand photonic functionality remains a great challenge. Here we report hybrid integration of free-standing nanowires into silicon photonics with high flexibility by coupling free-standing nanowires onto target silicon waveguides that are simultaneously used for precise positioning. Coupling efficiency between a free-standing nanowire and a silicon waveguide is up to ~97% in the telecommunication band. A hybrid nonlinear-free-standing nanowires-silicon waveguides Mach-Zehnder interferometer and a racetrack resonator for significantly enhanced optical modulation are experimentally demonstrated, as well as hybrid active-free-standing nanowires-silicon waveguides circuits for light generation. These results suggest an alternative approach to flexible multifunctional on-chip nanophotonic devices.Precisely assembling free-standing nanowires for on-demand photonic functionality remains a challenge. Here, Chen et al. integrate free-standing nanowires into silicon waveguides and show all-optical modulation and light generation on silicon photonic chips.

  10. Emerging heterogeneous integrated photonic platforms on silicon

    Directory of Open Access Journals (Sweden)

    Fathpour Sasan

    2015-05-01

    Full Text Available Silicon photonics has been established as a mature and promising technology for optoelectronic integrated circuits, mostly based on the silicon-on-insulator (SOI waveguide platform. However, not all optical functionalities can be satisfactorily achieved merely based on silicon, in general, and on the SOI platform, in particular. Long-known shortcomings of silicon-based integrated photonics are optical absorption (in the telecommunication wavelengths and feasibility of electrically-injected lasers (at least at room temperature. More recently, high two-photon and free-carrier absorptions required at high optical intensities for third-order optical nonlinear effects, inherent lack of second-order optical nonlinearity, low extinction ratio of modulators based on the free-carrier plasma effect, and the loss of the buried oxide layer of the SOI waveguides at mid-infrared wavelengths have been recognized as other shortcomings. Accordingly, several novel waveguide platforms have been developing to address these shortcomings of the SOI platform. Most of these emerging platforms are based on heterogeneous integration of other material systems on silicon substrates, and in some cases silicon is integrated on other substrates. Germanium and its binary alloys with silicon, III–V compound semiconductors, silicon nitride, tantalum pentoxide and other high-index dielectric or glass materials, as well as lithium niobate are some of the materials heterogeneously integrated on silicon substrates. The materials are typically integrated by a variety of epitaxial growth, bonding, ion implantation and slicing, etch back, spin-on-glass or other techniques. These wide range of efforts are reviewed here holistically to stress that there is no pure silicon or even group IV photonics per se. Rather, the future of the field of integrated photonics appears to be one of heterogenization, where a variety of different materials and waveguide platforms will be used for

  11. Silicon photonic integration in telecommunications

    Directory of Open Access Journals (Sweden)

    Christopher Richard Doerr

    2015-08-01

    Full Text Available Silicon photonics is the guiding of light in a planar arrangement of silicon-based materials to perform various functions. We focus here on the use of silicon photonics to create transmitters and receivers for fiber-optic telecommunications. As the need to squeeze more transmission into a given bandwidth, a given footprint, and a given cost increases, silicon photonics makes more and more economic sense.

  12. Proton irradiation effects in silicon devices

    Energy Technology Data Exchange (ETDEWEB)

    Simoen, E; Vanhellemont, J; Alaerts, A [IMEC, Leuven (Belgium); and others

    1997-03-01

    Proton irradiation effects in silicon devices are studied for components fabricated in various substrates in order to reveal possible hardening effects. The degradation of p-n junction diodes increases in first order proportionally with the fluence, when submitted to 10 MeV proton irradiations in the range 5x10{sup 9} cm{sup -2} to 5x10{sup 11} cm{sup -2}. The damage coefficients for both p- and n-type Czochralski, Float-Zone and epitaxial wafers are reported. Charge-Coupled Devices fabricated in a 1.2 {mu}m CCD-CMOS technology are shown to be quite resistant to 59 MeV H{sup +} irradiations, irrespective of the substrate type. (author)

  13. A new approach for two-terminal electronic memory devices - Storing information on silicon nanowires

    Science.gov (United States)

    Saranti, Konstantina; Alotaibi, Sultan; Paul, Shashi

    2016-06-01

    The work described in this paper focuses on the utilisation of silicon nanowires as the information storage element in flash-type memory devices. Silicon nanostructures have attracted attention due to interesting electrical and optical properties, and their potential integration into electronic devices. A detailed investigation of the suitability of silicon nanowires as the charge storage medium in two-terminal non-volatile memory devices are presented in this report. The deposition of the silicon nanostructures was carried out at low temperatures (less than 400 °C) using a previously developed a novel method within our research group. Two-terminal non-volatile (2TNV) memory devices and metal-insulator-semiconductor (MIS) structures containing the silicon nanowires were fabricated and an in-depth study of their characteristics was carried out using current-voltage and capacitance techniques.

  14. Silicon wafers for integrated circuit process

    OpenAIRE

    Leroy , B.

    1986-01-01

    Silicon as a substrate material will continue to dominate the market of integrated circuits for many years. We first review how crystal pulling procedures impact the quality of silicon. We then investigate how thermal treatments affect the behaviour of oxygen and carbon, and how, as a result, the quality of silicon wafers evolves. Gettering techniques are then presented. We conclude by detailing the requirements that wafers must satisfy at the incoming inspection.

  15. Electrical effects of transient neutron irradiation of silicon devices

    International Nuclear Information System (INIS)

    Hjalmarson, H.P.; Pease, R.L.; Van Ginhoven, R.M.; Schultz, P.A.; Modine, N.A.

    2007-01-01

    The key effects of combined transient neutron and ionizing radiation on silicon diodes and bipolar junctions transistors are described. The results show that interstitial defect reactions dominate the annealing effects in the first stage of annealing for certain devices. Furthermore, the results show that oxide trapped charge can influence the effects of bulk silicon displacement damage for particular devices

  16. Thermally-isolated silicon-based integrated circuits and related methods

    Science.gov (United States)

    Wojciechowski, Kenneth; Olsson, Roy H.; Clews, Peggy J.; Bauer, Todd

    2017-05-09

    Thermally isolated devices may be formed by performing a series of etches on a silicon-based substrate. As a result of the series of etches, silicon material may be removed from underneath a region of an integrated circuit (IC). The removal of the silicon material from underneath the IC forms a gap between remaining substrate and the integrated circuit, though the integrated circuit remains connected to the substrate via a support bar arrangement that suspends the integrated circuit over the substrate. The creation of this gap functions to release the device from the substrate and create a thermally-isolated integrated circuit.

  17. Method of making thermally-isolated silicon-based integrated circuits

    Science.gov (United States)

    Wojciechowski, Kenneth; Olsson, Roy; Clews, Peggy J.; Bauer, Todd

    2017-11-21

    Thermally isolated devices may be formed by performing a series of etches on a silicon-based substrate. As a result of the series of etches, silicon material may be removed from underneath a region of an integrated circuit (IC). The removal of the silicon material from underneath the IC forms a gap between remaining substrate and the integrated circuit, though the integrated circuit remains connected to the substrate via a support bar arrangement that suspends the integrated circuit over the substrate. The creation of this gap functions to release the device from the substrate and create a thermally-isolated integrated circuit.

  18. Integrated control rod monitoring device

    International Nuclear Information System (INIS)

    Saito, Katsuhiro

    1997-01-01

    The present invention provides a device in which an entire control rod driving time measuring device and a control rod position support device in a reactor building and a central control chamber are integrated systematically to save hardwares such as a signal input/output device and signal cables between boards. Namely, (1) functions of the entire control rod driving time measuring device for monitoring control rods which control the reactor power and a control rod position indication device are integrated into one identical system. Then, the entire devices can be made compact by the integration of the functions. (2) The functions of the entire control rod driving time measuring device and the control rod position indication device are integrated in a central operation board and a board in the site. Then, the place for the installation of them can be used in common in any of the cases. (3) The functions of the entire control rod driving time measuring device and the control rod position indication device are integrated to one identical system to save hardware to be used. Then, signal input/output devices and drift branching panel boards in the site and the central operation board can be saved, and cables for connecting both of the boards is no more necessary. (I.S.)

  19. Single-Event Effects in Silicon Carbide Power Devices

    Science.gov (United States)

    Lauenstein, Jean-Marie; Casey, Megan C.; LaBel, Kenneth A.; Ikpe, Stanley; Topper, Alyson D.; Wilcox, Edward P.; Kim, Hak; Phan, Anthony M.

    2015-01-01

    This report summarizes the NASA Electronic Parts and Packaging Program Silicon Carbide Power Device Subtask efforts in FY15. Benefits of SiC are described and example NASA Programs and Projects desiring this technology are given. The current status of the radiation tolerance of silicon carbide power devices is given and paths forward in the effort to develop heavy-ion single-event effect hardened devices indicated.

  20. Integrated multiscale modeling of molecular computing devices

    International Nuclear Information System (INIS)

    Cummings, Peter T; Leng Yongsheng

    2005-01-01

    Molecular electronics, in which single organic molecules are designed to perform the functions of transistors, diodes, switches and other circuit elements used in current siliconbased microelecronics, is drawing wide interest as a potential replacement technology for conventional silicon-based lithographically etched microelectronic devices. In addition to their nanoscopic scale, the additional advantage of molecular electronics devices compared to silicon-based lithographically etched devices is the promise of being able to produce them cheaply on an industrial scale using wet chemistry methods (i.e., self-assembly from solution). The design of molecular electronics devices, and the processes to make them on an industrial scale, will require a thorough theoretical understanding of the molecular and higher level processes involved. Hence, the development of modeling techniques for molecular electronics devices is a high priority from both a basic science point of view (to understand the experimental studies in this field) and from an applied nanotechnology (manufacturing) point of view. Modeling molecular electronics devices requires computational methods at all length scales - electronic structure methods for calculating electron transport through organic molecules bonded to inorganic surfaces, molecular simulation methods for determining the structure of self-assembled films of organic molecules on inorganic surfaces, mesoscale methods to understand and predict the formation of mesoscale patterns on surfaces (including interconnect architecture), and macroscopic scale methods (including finite element methods) for simulating the behavior of molecular electronic circuit elements in a larger integrated device. Here we describe a large Department of Energy project involving six universities and one national laboratory aimed at developing integrated multiscale methods for modeling molecular electronics devices. The project is funded equally by the Office of Basic

  1. Integrated double-sided silicon microstrip detectors

    Directory of Open Access Journals (Sweden)

    Perevertailo V. L.

    2011-11-01

    Full Text Available The problems of design, technology and manufacturing double-sided silicon microstrip detectors using standard equipment production line in mass production of silicon integrated circuits are considered. The design of prototype high-energy particles detector for experiment ALICE (CERN is presented. The parameters of fabricated detectors are comparable with those of similar foreign detectors, but they are distinguished by lesser cost.

  2. Particle interaction and displacement damage in silicon devices operated in radiation environments

    International Nuclear Information System (INIS)

    Leroy, Claude; Rancoita, Pier-Giorgio

    2007-01-01

    Silicon is used in radiation detectors and electronic devices. Nowadays, these devices achieving submicron technology are parts of integrated circuits of large to very large scale integration (VLSI). Silicon and silicon-based devices are commonly operated in many fields including particle physics experiments, nuclear medicine and space. Some of these fields present adverse radiation environments that may affect the operation of the devices. The particle energy deposition mechanisms by ionization and non-ionization processes are reviewed as well as the radiation-induced damage and its effect on device parameters evolution, depending on particle type, energy and fluence. The temporary or permanent damage inflicted by a single particle (single event effect) to electronic devices or integrated circuits is treated separately from the total ionizing dose (TID) effect for which the accumulated fluence causes degradation and from the displacement damage induced by the non-ionizing energy-loss (NIEL) deposition. Understanding of radiation effects on silicon devices has an impact on their design and allows the prediction of a specific device behaviour when exposed to a radiation field of interest

  3. Integration of mask and silicon metrology in DFM

    Science.gov (United States)

    Matsuoka, Ryoichi; Mito, Hiroaki; Sugiyama, Akiyuki; Toyoda, Yasutaka

    2009-03-01

    We have developed a highly integrated method of mask and silicon metrology. The method adopts a metrology management system based on DBM (Design Based Metrology). This is the high accurate contouring created by an edge detection algorithm used in mask CD-SEM and silicon CD-SEM. We have inspected the high accuracy, stability and reproducibility in the experiments of integration. The accuracy is comparable with that of the mask and silicon CD-SEM metrology. In this report, we introduce the experimental results and the application. As shrinkage of design rule for semiconductor device advances, OPC (Optical Proximity Correction) goes aggressively dense in RET (Resolution Enhancement Technology). However, from the view point of DFM (Design for Manufacturability), the cost of data process for advanced MDP (Mask Data Preparation) and mask producing is a problem. Such trade-off between RET and mask producing is a big issue in semiconductor market especially in mask business. Seeing silicon device production process, information sharing is not completely organized between design section and production section. Design data created with OPC and MDP should be linked to process control on production. But design data and process control data are optimized independently. Thus, we provided a solution of DFM: advanced integration of mask metrology and silicon metrology. The system we propose here is composed of followings. 1) Design based recipe creation: Specify patterns on the design data for metrology. This step is fully automated since they are interfaced with hot spot coordinate information detected by various verification methods. 2) Design based image acquisition: Acquire the images of mask and silicon automatically by a recipe based on the pattern design of CD-SEM.It is a robust automated step because a wide range of design data is used for the image acquisition. 3) Contour profiling and GDS data generation: An image profiling process is applied to the acquired image based

  4. Effects of radiation on MOS structures and silicon devices

    International Nuclear Information System (INIS)

    Braeunig, D.; Fahrner, W.

    1983-02-01

    A comprehensive view of radiation effects on MOS structures and silicon devices is given. In the introduction, the interaction of radiation with semiconductor material is presented. In the next section, the electrical degradation of semiconductor devices due to this interaction is discussed. The commonly used hardening techniques are shown. The last section deals with testing of radiation hardness of devices. (orig.) [de

  5. Integration of functional complex oxide nanomaterials on silicon

    Directory of Open Access Journals (Sweden)

    Jose Manuel eVila-Fungueiriño

    2015-06-01

    Full Text Available The combination of standard wafer-scale semiconductor processing with the properties of functional oxides opens up to innovative and more efficient devices with high value applications that can be produced at large scale. This review uncovers the main strategies that are successfully used to monolithically integrate functional complex oxide thin films and nanostructures on silicon: the chemical solution deposition approach (CSD and the advanced physical vapor deposition techniques such as oxide molecular beam epitaxy (MBE. Special emphasis will be placed on complex oxide nanostructures epitaxially grown on silicon using the combination of CSD and MBE. Several examples will be exposed, with a particular stress on the control of interfaces and crystallization mechanisms on epitaxial perovskite oxide thin films, nanostructured quartz thin films, and octahedral molecular sieve nanowires. This review enlightens on the potential of complex oxide nanostructures and the combination of both chemical and physical elaboration techniques for novel oxide-based integrated devices.

  6. Hybrid Integrated Silicon Microfluidic Platform for Fluorescence Based Biodetection

    Directory of Open Access Journals (Sweden)

    André Darveau

    2007-09-01

    Full Text Available The desideratum to develop a fully integrated Lab-on-a-chip device capable ofrapid specimen detection for high throughput in-situ biomedical diagnoses and Point-of-Care testing applications has called for the integration of some of the novel technologiessuch as the microfluidics, microphotonics, immunoproteomics and Micro ElectroMechanical Systems (MEMS. In the present work, a silicon based microfluidic device hasbeen developed for carrying out fluorescence based immunoassay. By hybrid attachment ofthe microfluidic device with a Spectrometer-on-chip, the feasibility of synthesizing anintegrated Lab-on-a-chip type device for fluorescence based biosensing has beendemonstrated. Biodetection using the microfluidic device has been carried out usingantigen sheep IgG and Alexafluor-647 tagged antibody particles and the experimentalresults prove that silicon is a compatible material for the present application given thevarious advantages it offers such as cost-effectiveness, ease of bulk microfabrication,superior surface affinity to biomolecules, ease of disposability of the device etc., and is thussuitable for fabricating Lab-on-a-chip type devices.

  7. Formation of multiple levels of porous silicon for buried insulators and conductors in silicon device technologies

    Science.gov (United States)

    Blewer, Robert S.; Gullinger, Terry R.; Kelly, Michael J.; Tsao, Sylvia S.

    1991-01-01

    A method of forming a multiple level porous silicon substrate for semiconductor integrated circuits including anodizing non-porous silicon layers of a multi-layer silicon substrate to form multiple levels of porous silicon. At least one porous silicon layer is then oxidized to form an insulating layer and at least one other layer of porous silicon beneath the insulating layer is metallized to form a buried conductive layer. Preferably the insulating layer and conductive layer are separated by an anodization barrier formed of non-porous silicon. By etching through the anodization barrier and subsequently forming a metallized conductive layer, a fully or partially insulated buried conductor may be fabricated under single crystal silicon.

  8. Hybrid integration of carbon nanotubes in silicon photonic structures

    Science.gov (United States)

    Durán-Valdeiglesias, E.; Zhang, W.; Alonso-Ramos, C.; Le Roux, X.; Serna, S.; Hoang, H. C.; Marris-Morini, D.; Cassan, E.; Intonti, F.; Sarti, F.; Caselli, N.; La China, F.; Gurioli, M.; Balestrieri, M.; Vivien, L.; Filoramo, A.

    2017-02-01

    Silicon photonics, due to its compatibility with the CMOS platform and unprecedented integration capability, has become the preferred solution for the implementation of next generation optical interconnects to accomplish high efficiency, low energy consumption, low cost and device miniaturization in one single chip. However, it is restricted by silicon itself. Silicon does not have efficient light emission or detection in the telecommunication wavelength range (1.3 μm-1.5 μm) or any electro-optic effect (i.e. Pockels effect). Hence, silicon photonic needs to be complemented with other materials for the realization of optically-active devices, including III-V for lasing and Ge for detection. The very different requirement of these materials results in complex fabrication processes that offset the cost-effectiveness of the Si photonics approach. For this purpose, carbon nanotubes (CNTs) have recently been proposed as an attractive one-dimensional light emitting material. Interestingly, semiconducting single walled CNTs (SWNTs) exhibit room-temperature photo- and electro-luminescence in the near-IR that could be exploited for the implementation of integrated nano-sources. They can also be considered for the realization of photo-detectors and optical modulators, since they rely on intrinsically fast non-linear effects, such as Stark and Kerr effect. All these properties make SWNTs ideal candidates in order to fabricate a large variety of optoelectronic devices, including near-IR sources, modulators and photodetectors on Si photonic platforms. In addition, solution processed SWNTs can be integrated on Si using spin-coating or drop-casting techniques, obviating the need of complex epitaxial growth or chip bonding approaches. Here, we report on our recent progress in the coupling of SWNTs light emission into optical resonators implemented on the silicon-on-insulator (SOI) platform. .

  9. Ordered silicon nanostructures for silicon-based photonics devices

    Czech Academy of Sciences Publication Activity Database

    Fojtík, A.; Valenta, J.; Pelant, Ivan; Kálal, M.; Fiala, P.

    2007-01-01

    Roč. 5, Suppl. (2007), S250-S253 ISSN 1671-7694 R&D Projects: GA AV ČR IAA1010316 Grant - others:GA MŠk(CZ) ME 933 Institutional research plan: CEZ:AV0Z10100521 Keywords : nanocrystals * silicon * self-assembled monolayers Subject RIV: BM - Solid Matter Physics ; Magnetism

  10. Integration of lateral porous silicon membranes into planar microfluidics.

    Science.gov (United States)

    Leïchlé, Thierry; Bourrier, David

    2015-02-07

    In this work, we present a novel fabrication process that enables the monolithic integration of lateral porous silicon membranes into single-layer planar microchannels. This fabrication technique relies on the patterning of local electrodes to guide pore formation horizontally within the membrane and on the use of silicon-on-insulator substrates to spatially localize porous silicon within the channel depth. The feasibility of our approach is studied by current flow analysis using the finite element method and supported by creating 10 μm long mesoporous membranes within 20 μm deep microchannels. The fabricated membranes are demonstrated to be potentially useful for dead-end microfiltration by adequately retaining 300 nm diameter beads while macromolecules such as single-stranded DNA and immunoglobulin G permeate the membrane. The experimentally determined fluidic resistance is in accordance with the theoretical value expected from the estimated pore size and porosity. The work presented here is expected to greatly simplify the integration of membranes capable of size exclusion based separation into fluidic devices and opens doors to the use of porous silicon in planar lab on a chip devices.

  11. All silicon waveguide spherical microcavity coupler device.

    Science.gov (United States)

    Xifré-Pérez, E; Domenech, J D; Fenollosa, R; Muñoz, P; Capmany, J; Meseguer, F

    2011-02-14

    A coupler based on silicon spherical microcavities coupled to silicon waveguides for telecom wavelengths is presented. The light scattered by the microcavity is detected and analyzed as a function of the wavelength. The transmittance signal through the waveguide is strongly attenuated (up to 25 dB) at wavelengths corresponding to the Mie resonances of the microcavity. The coupling between the microcavity and the waveguide is experimentally demonstrated and theoretically modeled with the help of FDTD calculations.

  12. Practical silicon Light emitting devices fabricated by standard IC technology

    International Nuclear Information System (INIS)

    Aharoni, H.; Monuko du Plessis; Snyman, L.W.

    2004-01-01

    Full Text:Research activities are described with regard to the development of a comprehensive approach for the practical realization of single crystal Silicon Light Emitting Devices (Si-LEDs). Several interesting suggestions for the fabrication of such devices were made in the literature but they were not adopted by the semiconductor industry because they involve non-standard fabrication schemes, requiring special production lines. Our work presents an alternative approach, proposed and realized in practice by us, permitting the fabrication of Si-LEDs using the standard conventional fully industrialized IC technology ''as is'' without any adaptation. It enables their fabrication in the same production lines of the presently existing IC industry. This means that Si-LEDs can now be fabricated simultaneously with other components, such as transistors, on the same silicon chip, using the same masks and processing procedures. The result is that the yield, reliability, and price of the above Si-LEDs are the same as the other Si devices integrated on the same chip. In this work some structural details of several practical Si-LED's designed by us, as well as experimental results describing their performance are presented. These Si-LED's were fabricated to our specifications utilizing standard CMOS/BiCMOS technology, a fact which comprises an achievement by itself. The structure of the Si-LED's, is designed according to specifications such as the required operating voltage, overall light output intensity, its dependence(linear, or non-linear) on the input signal (voltage or current), light generations location (bulk, or near-surface), the emission pattern and uniformity. Such structural design present a problem since the designer can not use any structural parameters (such as doping levels and junction depths for example) but only those which already exist in the production lines. Since the fabrication procedures in these lines are originally designed for processing of

  13. Silicon Photonic Integrated Circuit Mode Multiplexer

    DEFF Research Database (Denmark)

    Ding, Yunhong; Ou, Haiyan; Xu, Jing

    2013-01-01

    We propose and demonstrate a novel silicon photonic integrated circuit enabling multiplexing of orthogonal modes in a few-mode fiber (FMF). By selectively launching light to four vertical grating couplers, all six orthogonal spatial and polarization modes supported by the FMF are successfully...

  14. System-level integration of active silicon photonic biosensors

    Science.gov (United States)

    Laplatine, L.; Al'Mrayat, O.; Luan, E.; Fang, C.; Rezaiezadeh, S.; Ratner, D. M.; Cheung, K.; Dattner, Y.; Chrostowski, L.

    2017-02-01

    Biosensors based on silicon photonic integrated circuits have attracted a growing interest in recent years. The use of sub-micron silicon waveguides to propagate near-infrared light allows for the drastic reduction of the optical system size, while increasing its complexity and sensitivity. Using silicon as the propagating medium also leverages the fabrication capabilities of CMOS foundries, which offer low-cost mass production. Researchers have deeply investigated photonic sensor devices, such as ring resonators, interferometers and photonic crystals, but the practical integration of silicon photonic biochips as part of a complete system has received less attention. Herein, we present a practical system-level architecture which can be employed to integrate the aforementioned photonic biosensors. We describe a system based on 1 mm2 dies that integrate germanium photodetectors and a single light coupling device. The die are embedded into a 16x16 mm2 epoxy package to enable microfluidic and electrical integration. First, we demonstrate a simple process to mimic Fan-Out Wafer-level-Packaging, which enables low-cost mass production. We then characterize the photodetectors in the photovoltaic mode, which exhibit high sensitivity at low optical power. Finally, we present a new grating coupler concept to relax the lateral alignment tolerance down to +/- 50 μm at 1-dB (80%) power penalty, which should permit non-experts to use the biochips in a"plug-and-play" style. The system-level integration demonstrated in this study paves the way towards the mass production of low-cost and highly sensitive biosensors, and can facilitate their wide adoption for biomedical and agro-environmental applications.

  15. Integrated nanophotonic frequency shifter on the silicon-organic hybrid (SOH) platform for laser vibrometry

    International Nuclear Information System (INIS)

    Lauermann, M.; Weimann, C.; Palmer, R.; Schindler, P. C.; Koeber, S.; Freude, W.; Koos, C.; Rembe, C.

    2014-01-01

    We demonstrate a waveguide-based frequency shifter on the silicon photonic platform, enabling frequency shifts up to 10 GHz. The device is realized by silicon-organic hybrid (SOH) integration. Temporal shaping of the drive signal allows the suppression of spurious side-modes by more than 23 dB

  16. Integrated nanophotonic frequency shifter on the silicon-organic hybrid (SOH) platform for laser vibrometry

    Energy Technology Data Exchange (ETDEWEB)

    Lauermann, M.; Weimann, C.; Palmer, R.; Schindler, P. C. [Institute of Photonics and Quantum Electronics, Karlsruhe Institute of Technology, 76131 Karlsruhe (Germany); Koeber, S.; Freude, W., E-mail: christian.koos@kit.edu; Koos, C., E-mail: christian.koos@kit.edu [Institute of Photonics and Quantum Electronics, Karlsruhe Institute of Technology, 76131 Karlsruhe, Germany and Institute of Microstructure Technology, Karlsruhe Institute of Technology, 76344 Eggenstein-Leopoldshafen (Germany); Rembe, C. [Polytec GmbH, 76337 Waldbronn (Germany)

    2014-05-27

    We demonstrate a waveguide-based frequency shifter on the silicon photonic platform, enabling frequency shifts up to 10 GHz. The device is realized by silicon-organic hybrid (SOH) integration. Temporal shaping of the drive signal allows the suppression of spurious side-modes by more than 23 dB.

  17. A miniaturized silicon based device for nucleic acids electrochemical detection

    Directory of Open Access Journals (Sweden)

    Salvatore Petralia

    2015-12-01

    Full Text Available In this paper we describe a novel portable system for nucleic acids electrochemical detection. The core of the system is a miniaturized silicon chip composed by planar microelectrodes. The chip is embedded on PCB board for the electrical driving and reading. The counter, reference and work microelectrodes are manufactured using the VLSI technology, the material is gold for reference and counter electrodes and platinum for working electrode. The device contains also a resistor to control and measuring the temperature for PCR thermal cycling. The reaction chamber has a total volume of 20 μL. It is made in hybrid silicon–plastic technology. Each device contains four independent electrochemical cells.Results show HBV Hepatitis-B virus detection using an unspecific DNA intercalating redox probe based on metal–organic compounds. The recognition event is sensitively detected by square wave voltammetry monitoring the redox signals of the intercalator that strongly binds to the double-stranded DNA. Two approaches were here evaluated: (a intercalation of electrochemical unspecific probe on ds-DNA on homogeneous solution (homogeneous phase; (b grafting of DNA probes on electrode surface (solid phase.The system and the method here reported offer better advantages in term of analytical performances compared to the standard commercial optical-based real-time PCR systems, with the additional incomes of being potentially cheaper and easier to integrate in a miniaturized device. Keywords: Electrochemical detection, Real time PCR, Unspecific DNA intercalator

  18. Memory characteristics of silicon nitride with silicon nanocrystals as a charge trapping layer of nonvolatile memory devices

    International Nuclear Information System (INIS)

    Choi, Sangmoo; Yang, Hyundeok; Chang, Man; Baek, Sungkweon; Hwang, Hyunsang; Jeon, Sanghun; Kim, Juhyung; Kim, Chungwoo

    2005-01-01

    Silicon nitride with silicon nanocrystals formed by low-energy silicon plasma immersion ion implantation has been investigated as a charge trapping layer of a polycrystalline silicon-oxide-nitride-oxide-silicon-type nonvolatile memory device. Compared with the control sample without silicon nanocrystals, silicon nitride with silicon nanocrystals provides excellent memory characteristics, such as larger width of capacitance-voltage hysteresis, higher program/erase speed, and lower charge loss rate at elevated temperature. These improved memory characteristics are derived by incorporation of silicon nanocrystals into the charge trapping layer as additional accessible charge traps with a deeper effective trap energy level

  19. Materials issues in silicon integrated circuit processing

    International Nuclear Information System (INIS)

    Wittmer, M.; Stimmell, J.; Strathman, M.

    1986-01-01

    The symposium on ''Materials Issues in Integrated Circuit Processing'' sought to bring together all of the materials issued pertinent to modern integrated circuit processing. The inherent properties of the materials are becoming an important concern in integrated circuit manufacturing and accordingly research in materials science is vital for the successful implementation of modern integrated circuit technology. The session on Silicon Materials Science revealed the advanced stage of knowledge which topics such as point defects, intrinsic and extrinsic gettering and diffusion kinetics have achieved. Adaption of this knowledge to specific integrated circuit processing technologies is beginning to be addressed. The session on Epitaxy included invited papers on epitaxial insulators and IR detectors. Heteroepitaxy on silicon is receiving great attention and the results presented in this session suggest that 3-d integrated structures are an increasingly realistic possibility. Progress in low temperature silicon epitaxy and epitaxy of thin films with abrupt interfaces was also reported. Diffusion and Ion Implantation were well presented. Regrowth of implant-damaged layers and the nature of the defects which remain after regrowth were discussed in no less than seven papers. Substantial progress was also reported in the understanding of amorphising boron implants and the use of gallium implants for the formation of shallow p/sup +/ -layers

  20. Silicon Photonics II Components and Integration

    CERN Document Server

    Lockwood, David J

    2011-01-01

    This book is volume II of a series of books on silicon photonics. It gives a fascinating picture of the state-of-the-art in silicon photonics from a component perspective. It presents a perspective on what can be expected in the near future. It is formed from a selected number of reviews authored by world leaders in the field, and is written from both academic and industrial viewpoints. An in-depth discussion of the route towards fully integrated silicon photonics is presented. This book will be useful not only to physicists, chemists, materials scientists, and engineers but also to graduate students who are interested in the fields of micro- and nanophotonics and optoelectronics.

  1. Nonlinear Silicon Photonic Signal Processing Devices for Future Optical Networks

    Directory of Open Access Journals (Sweden)

    Cosimo Lacava

    2017-01-01

    Full Text Available In this paper, we present a review on silicon-based nonlinear devices for all optical nonlinear processing of complex telecommunication signals. We discuss some recent developments achieved by our research group, through extensive collaborations with academic partners across Europe, on optical signal processing using silicon-germanium and amorphous silicon based waveguides as well as novel materials such as silicon rich silicon nitride and tantalum pentoxide. We review the performance of four wave mixing wavelength conversion applied on complex signals such as Differential Phase Shift Keying (DPSK, Quadrature Phase Shift Keying (QPSK, 16-Quadrature Amplitude Modulation (QAM and 64-QAM that dramatically enhance the telecom signal spectral efficiency, paving the way to next generation terabit all-optical networks.

  2. Nanophotonic integrated circuits from nanoresonators grown on silicon.

    Science.gov (United States)

    Chen, Roger; Ng, Kar Wei; Ko, Wai Son; Parekh, Devang; Lu, Fanglu; Tran, Thai-Truong D; Li, Kun; Chang-Hasnain, Connie

    2014-07-07

    Harnessing light with photonic circuits promises to catalyse powerful new technologies much like electronic circuits have in the past. Analogous to Moore's law, complexity and functionality of photonic integrated circuits depend on device size and performance scale. Semiconductor nanostructures offer an attractive approach to miniaturize photonics. However, shrinking photonics has come at great cost to performance, and assembling such devices into functional photonic circuits has remained an unfulfilled feat. Here we demonstrate an on-chip optical link constructed from InGaAs nanoresonators grown directly on a silicon substrate. Using nanoresonators, we show a complete toolkit of circuit elements including light emitters, photodetectors and a photovoltaic power supply. Devices operate with gigahertz bandwidths while consuming subpicojoule energy per bit, vastly eclipsing performance of prior nanostructure-based optoelectronics. Additionally, electrically driven stimulated emission from an as-grown nanostructure is presented for the first time. These results reveal a roadmap towards future ultradense nanophotonic integrated circuits.

  3. Movable MEMS Devices on Flexible Silicon

    KAUST Repository

    Ahmed, Sally

    2013-01-01

    Flexible electronics have gained great attention recently. Applications such as flexible displays, artificial skin and health monitoring devices are a few examples of this technology. Looking closely at the components of these devices, although MEMS

  4. The first results of siliconization on SWIP-RFP device

    International Nuclear Information System (INIS)

    Zhang Peng; Li Qiang; Luo Cuiwen; Li Jieping; Qian Shangjie; Fang Shuiquan; Yi Ping; Xue Jun; Li Kehua; Luo Junlin; Hong Wenyu; Cao Zeng; Zhang Nianman; Wang Quanming; Li Jie; Huang Ming; Zhong Yunze; Zhang Qingchun; Luo Cuixian

    1997-01-01

    The first results of reversed field pinch (RFP) and ultra low safety factor (ULQ) plasma experiments with siliconization on SWIP-RFP device are presented in this paper. The siliconization decreases the impurity concentrations in the plasma and increases the configuration sustainment time. Ion temperature has been estimated with the CV line of the visible light spectra and the broadening of CIII lines in vacuum ultraviolet (VUV) region. The anomalous ion heating as well as the anomalous resistance were observed. (orig.)

  5. Design and Fabrication of Silicon-on-Silicon-Carbide Substrates and Power Devices for Space Applications

    Directory of Open Access Journals (Sweden)

    Gammon P.M.

    2017-01-01

    Full Text Available A new generation of power electronic semiconductor devices are being developed for the benefit of space and terrestrial harsh-environment applications. 200-600 V lateral transistors and diodes are being fabricated in a thin layer of silicon (Si wafer bonded to silicon carbide (SiC. This novel silicon-on-silicon-carbide (Si/SiC substrate solution promises to combine the benefits of silicon-on-insulator (SOI technology (i.e device confinement, radiation tolerance, high and low temperature performance with that of SiC (i.e. high thermal conductivity, radiation hardness, high temperature performance. Details of a process are given that produces thin films of silicon 1, 2 and 5 μm thick on semi-insulating 4H-SiC. Simulations of the hybrid Si/SiC substrate show that the high thermal conductivity of the SiC offers a junction-to-case temperature ca. 4× less that an equivalent SOI device; reducing the effects of self-heating, and allowing much greater power density. Extensive electrical simulations are used to optimise a 600 V laterally diffused metal-oxide-semiconductor field-effect transistor (LDMOSFET implemented entirely within the silicon thin film, and highlight the differences between Si/SiC and SOI solutions.

  6. Vertical integration of high-Q silicon nitride microresonators into silicon-on-insulator platform.

    Science.gov (United States)

    Li, Qing; Eftekhar, Ali A; Sodagar, Majid; Xia, Zhixuan; Atabaki, Amir H; Adibi, Ali

    2013-07-29

    We demonstrate a vertical integration of high-Q silicon nitride microresonators into the silicon-on-insulator platform for applications at the telecommunication wavelengths. Low-loss silicon nitride films with a thickness of 400 nm are successfully grown, enabling compact silicon nitride microresonators with ultra-high intrinsic Qs (~ 6 × 10(6) for 60 μm radius and ~ 2 × 10(7) for 240 μm radius). The coupling between the silicon nitride microresonator and the underneath silicon waveguide is based on evanescent coupling with silicon dioxide as buffer. Selective coupling to a desired radial mode of the silicon nitride microresonator is also achievable using a pulley coupling scheme. In this work, a 60-μm-radius silicon nitride microresonator has been successfully integrated into the silicon-on-insulator platform, showing a single-mode operation with an intrinsic Q of 2 × 10(6).

  7. Silicon photonics design from devices to systems

    CERN Document Server

    Chrostowski, Lukas

    2015-01-01

    From design and simulation through to testing and fabrication, this hands-on introduction to silicon photonics engineering equips students with everything they need to begin creating foundry-ready designs. In-depth discussion of real-world issues and fabrication challenges ensures that students are fully equipped for careers in industry. Step-by-step tutorials, straightforward examples, and illustrative source code fragments guide students through every aspect of the design process, providing a practical framework for developing and refining key skills. Offering industry-ready expertise, the text supports existing PDKs for CMOS UV-lithography foundry services (OpSIS, ePIXfab, imec, LETI, IME and CMC) and the development of new kits for proprietary processes and clean-room based research. Accompanied by additional online resources to support students, this is the perfect learning package for senior undergraduate and graduate students studying silicon photonics design, and academic and industrial researchers in...

  8. Extremely flexible nanoscale ultrathin body silicon integrated circuits on plastic.

    Science.gov (United States)

    Shahrjerdi, Davood; Bedell, Stephen W

    2013-01-09

    In recent years, flexible devices based on nanoscale materials and structures have begun to emerge, exploiting semiconductor nanowires, graphene, and carbon nanotubes. This is primarily to circumvent the existing shortcomings of the conventional flexible electronics based on organic and amorphous semiconductors. The aim of this new class of flexible nanoelectronics is to attain high-performance devices with increased packing density. However, highly integrated flexible circuits with nanoscale transistors have not yet been demonstrated. Here, we show nanoscale flexible circuits on 60 Å thick silicon, including functional ring oscillators and memory cells. The 100-stage ring oscillators exhibit the stage delay of ~16 ps at a power supply voltage of 0.9 V, the best reported for any flexible circuits to date. The mechanical flexibility is achieved by employing the controlled spalling technology, enabling the large-area transfer of the ultrathin body silicon devices to a plastic substrate at room temperature. These results provide a simple and cost-effective pathway to enable ultralight flexible nanoelectronics with unprecedented level of system complexity based on mainstream silicon technology.

  9. Cobalt micro-magnet integration on silicon MOS quantum dots

    Science.gov (United States)

    Camirand Lemyre, Julien; Rochette, Sophie; Anderson, John; Manginell, Ronald P.; Pluym, Tammy; Ward, Dan; Carroll, Malcom S.; Pioro-Ladrière, Michel

    Integration of cobalt micro-magnets on silicon metal-oxide-semiconductor (MOS) quantum dot devices has been investigated. The micro-magnets are fabricated in a lift-off process with e-beam lithography and deposited directly on top of an etched poly-silicon gate stack. Among the five resist stacks tested, one is found to be compatible with our MOS specific materials (Si and SiO2) . Moreover, devices with and without additional Al2O3 insulating layer show no additional gate leakage after processing. Preliminary transport data indicates electrostatic stability of our devices with integrated magnets. This work was performed, in part, at the Center for Integrated Nanotechnologies, an Office of Science User Facility operated for the U.S. Department of Energy (DOE) Office of Science. Sandia National Laboratories is a multi-program laboratory operated by Sandia Corporation, a Lockheed-Martin Company, for the U. S. Department of Energy under Contract No. DE-AC04-94AL85000.

  10. InP membrane on silicon integration technology

    NARCIS (Netherlands)

    Smit, M.K.

    2013-01-01

    Integration of light sources in silicon photonics is usually done with an active InP-based layer stack on a silicon-based photonic circuit-layer. InP Membrane On Silicon (IMOS) technology integrates all functionality in a single InP-based layer.

  11. David Adler Lectureship Award Talk: III-V Semiconductor Nanowires on Silicon for Future Devices

    Science.gov (United States)

    Riel, Heike

    Bottom-up grown nanowires are very attractive materials for direct integration of III-V semiconductors on silicon thus opening up new possibilities for the design and fabrication of nanoscale devices for electronic, optoelectronic as well as quantum information applications. Template-Assisted Selective Epitaxy (TASE) allows the well-defined and monolithic integration of complex III-V nanostructures and devices on silicon. Achieving atomically abrupt heterointerfaces, high crystal quality and control of dimension down to 1D nanowires enabled the demonstration of FETs and tunnel devices based on In(Ga)As and GaSb. Furthermore, the strong influence of strain on nanowires as well as results on quantum transport studies of InAs nanowires with well-defined geometry will be presented.

  12. Plasmonic nanofocusing of light in an integrated silicon photonics platform.

    Science.gov (United States)

    Desiatov, Boris; Goykhman, Ilya; Levy, Uriel

    2011-07-04

    The capability to focus electromagnetic energy at the nanoscale plays an important role in nanoscinece and nanotechnology. It allows enhancing light matter interactions at the nanoscale with applications related to nonlinear optics, light emission and light detection. It may also be used for enhancing resolution in microscopy, lithography and optical storage systems. Hereby we propose and experimentally demonstrate the nanoscale focusing of surface plasmons by constructing an integrated plasmonic/photonic on chip nanofocusing device in silicon platform. The device was tested directly by measuring the optical intensity along it using a near-field microscope. We found an order of magnitude enhancement of the intensity at the tip's apex. The spot size is estimated to be 50 nm. The demonstrated device may be used as a building block for "lab on a chip" systems and for enhancing light matter interactions at the apex of the tip.

  13. Mechanical engineering and design of silicon-based particle tracking devices

    International Nuclear Information System (INIS)

    Miller, W.O.; Thompson, T.C.; Gamble, M.T.; Reid, R.S.; Woloshun, K.A.; Dransfield, G.D.; Ziock, H.J.

    1990-01-01

    The Mechanical Engineering and Electronics Division of the Los Alamos National Laboratory has been investigating silicon-based particle tracking device technology as part of the Superconducting Super Collider-sponsored silicon subsystem collaboration. Structural, thermal, and materials issues have been addressed. This paper discussed detector structural integrity and stability, including detailed finite element models of the silicon chip support and predictive methods used in designing with advanced composite materials. Electronic thermal loading and efficient dissipation of such energy using heat pipe technology has been investigated. The use of materials whose coefficients of thermal expansion are engineered to match silicon or to be near zero, as appropriate, have been explored. Material analysis and test results from radiation, chemical, and static loading are compared with analytical predictions and discussed. 1 ref., 2 figs., 1 tab

  14. Hybrid Integration of Solid-State Quantum Emitters on a Silicon Photonic Chip.

    Science.gov (United States)

    Kim, Je-Hyung; Aghaeimeibodi, Shahriar; Richardson, Christopher J K; Leavitt, Richard P; Englund, Dirk; Waks, Edo

    2017-12-13

    Scalable quantum photonic systems require efficient single photon sources coupled to integrated photonic devices. Solid-state quantum emitters can generate single photons with high efficiency, while silicon photonic circuits can manipulate them in an integrated device structure. Combining these two material platforms could, therefore, significantly increase the complexity of integrated quantum photonic devices. Here, we demonstrate hybrid integration of solid-state quantum emitters to a silicon photonic device. We develop a pick-and-place technique that can position epitaxially grown InAs/InP quantum dots emitting at telecom wavelengths on a silicon photonic chip deterministically with nanoscale precision. We employ an adiabatic tapering approach to transfer the emission from the quantum dots to the waveguide with high efficiency. We also incorporate an on-chip silicon-photonic beamsplitter to perform a Hanbury-Brown and Twiss measurement. Our approach could enable integration of precharacterized III-V quantum photonic devices into large-scale photonic structures to enable complex devices composed of many emitters and photons.

  15. Functionalization and microfluidic integration of silicon nanowire biologically gated field effect transistors

    DEFF Research Database (Denmark)

    Pfreundt, Andrea

    This thesis deals with the development of a novel biosensor for the detection of biomolecules based on a silicon nanowire biologically gated field-effect transistor and its integration into a point-of-care device. The sensor and electrical on-chip integration was developed in a different project...

  16. Functionalization and microfluidic integration of silicon nanowire biologically gated field effect transistors

    DEFF Research Database (Denmark)

    Pfreundt, Andrea; Svendsen, Winnie Edith; Dimaki, Maria

    2016-01-01

    This thesis deals with the development of a novel biosensor for the detection of biomolecules based on a silicon nanowire biologically gated field-effect transistor and its integration into a point-of-care device. The sensor and electrical on-chip integration was developed in a different project...

  17. In-chip microstructures and photonic devices fabricated by nonlinear laser lithography deep inside silicon

    Science.gov (United States)

    Tokel, Onur; Turnalı, Ahmet; Makey, Ghaith; Elahi, Parviz; ćolakoǧlu, Tahir; Ergeçen, Emre; Yavuz, Ã.-zgün; Hübner, René; Zolfaghari Borra, Mona; Pavlov, Ihor; Bek, Alpan; Turan, Raşit; Kesim, Denizhan Koray; Tozburun, Serhat; Ilday, Serim; Ilday, F. Ã.-mer

    2017-10-01

    Silicon is an excellent material for microelectronics and integrated photonics1-3, with untapped potential for mid-infrared optics4. Despite broad recognition of the importance of the third dimension5,6, current lithography methods do not allow the fabrication of photonic devices and functional microelements directly inside silicon chips. Even relatively simple curved geometries cannot be realized with techniques like reactive ion etching. Embedded optical elements7, electronic devices and better electronic-photonic integration are lacking8. Here, we demonstrate laser-based fabrication of complex 3D structures deep inside silicon using 1-µm-sized dots and rod-like structures of adjustable length as basic building blocks. The laser-modified Si has an optical index different to that in unmodified parts, enabling the creation of numerous photonic devices. Optionally, these parts can be chemically etched to produce desired 3D shapes. We exemplify a plethora of subsurface—that is, `in-chip'—microstructures for microfluidic cooling of chips, vias, micro-electro-mechanical systems, photovoltaic applications and photonic devices that match or surpass corresponding state-of-the-art device performances.

  18. In-chip microstructures and photonic devices fabricated by nonlinear laser lithography deep inside silicon.

    Science.gov (United States)

    Tokel, Onur; Turnali, Ahmet; Makey, Ghaith; Elahi, Parviz; Çolakoğlu, Tahir; Ergeçen, Emre; Yavuz, Özgün; Hübner, René; Borra, Mona Zolfaghari; Pavlov, Ihor; Bek, Alpan; Turan, Raşit; Kesim, Denizhan Koray; Tozburun, Serhat; Ilday, Serim; Ilday, F Ömer

    2017-10-01

    Silicon is an excellent material for microelectronics and integrated photonics1-3 with untapped potential for mid-IR optics4. Despite broad recognition of the importance of the third dimension5,6, current lithography methods do not allow fabrication of photonic devices and functional microelements directly inside silicon chips. Even relatively simple curved geometries cannot be realised with techniques like reactive ion etching. Embedded optical elements, like in glass7, electronic devices, and better electronic-photonic integration are lacking8. Here, we demonstrate laser-based fabrication of complex 3D structures deep inside silicon using 1 µm-sized dots and rod-like structures of adjustable length as basic building blocks. The laser-modified Si has a different optical index than unmodified parts, which enables numerous photonic devices. Optionally, these parts are chemically etched to produce desired 3D shapes. We exemplify a plethora of subsurface, i.e. , " in-chip" microstructures for microfluidic cooling of chips, vias, MEMS, photovoltaic applications and photonic devices that match or surpass the corresponding state-of-the-art device performances.

  19. Integrated lenses in polystyrene microfluidic devices

    KAUST Repository

    Fan, Yiqiang; Li, Huawei; Foulds, Ian G.

    2013-01-01

    This paper reports a new method for integrating microlenses into microfluidic devices for improved observation. Two demonstration microfluidic devices were provided which were fabricated using this new technique. The integrated microlenses were

  20. Self-consistent modeling of amorphous silicon devices

    International Nuclear Information System (INIS)

    Hack, M.

    1987-01-01

    The authors developed a computer model to describe the steady-state behaviour of a range of amorphous silicon devices. It is based on the complete set of transport equations and takes into account the important role played by the continuous distribution of localized states in the mobility gap of amorphous silicon. Using one set of parameters they have been able to self-consistently simulate the current-voltage characteristics of p-i-n (or n-i-p) solar cells under illumination, the dark behaviour of field-effect transistors, p-i-n diodes and n-i-n diodes in both the ohmic and space charge limited regimes. This model also describes the steady-state photoconductivity of amorphous silicon, in particular, its dependence on temperature, doping and illumination intensity

  1. Epitaxial III-V nanowires on silicon for vertical devices

    NARCIS (Netherlands)

    Bakkers, E.P.A.M.; Borgström, M.T.; Einden, Van Den W.; Weert, van M.H.M.; Helman, A.; Verheijen, M.A.

    2006-01-01

    We show the epitaxial integration of III-V semiconductor nanowires with silicon technology. The wires are grown by the Vapor-Liquid-Solid (VLS) mechanism with laser ablation as well as metal organic vapor phase epitaxy. The VLS growth enables the fabrication of complex axial and radial

  2. Reconfigurable SDM Switching Using Novel Silicon Photonic Integrated Circuit

    DEFF Research Database (Denmark)

    Ding, Yunhong; Kamchevska, Valerija; Dalgaard, Kjeld

    2016-01-01

    -division multiplexing switching using silicon photonic integrated circuit, which is fabricated on a novel silicon-oninsulator platform with buried Al mirror. The silicon photonic integrated circuit is composed of a 7x7 switch and low loss grating coupler array based multicore fiber couplers. Thanks to the Al mirror......, grating couplers with ultra-low coupling loss with optical multicore fibers is achieved. The lowest total insertion loss of the silicon integrated circuit is as low as 4.5 dB, with low crosstalk lower than -30 dB. Excellent performances in terms of low insertion loss and low crosstalk are obtained...

  3. Long-wavelength III-V/silicon photonic integrated circuits

    NARCIS (Netherlands)

    Roelkens, G.C.; Kuyken, B.; Leo, F.; Hattasan, N.; Ryckeboer, E.M.P.; Muneeb, M.; Hu, C.L.; Malik, A.; Hens, Z.; Baets, R.G.F.; Shimura, Y.; Gencarelli, F.; Vincent, B.; Loo, van de R.; Verheyen, P.A.; Lepage, G.; Campenhout, van J.; Cerutti, L.; Rodriquez, J.B.; Tournie, E.; Chen, X; Nedeljkovic, G.; Mashanovich, G.; Liu, X.; Green, W.S.

    2013-01-01

    We review our work in the field of short-wave infrared and mid-infrared photonic integrated circuits for applications in spectroscopic sensing systems. Passive silicon waveguide circuits, GeSn photodetectors, the integration of III-V and IV-VI semiconductors on these circuits, and silicon nonlinear

  4. Dopant atoms as quantum components in silicon nanoscale devices

    Science.gov (United States)

    Zhao, Xiaosong; Han, Weihua; Wang, Hao; Ma, Liuhong; Li, Xiaoming; Zhang, Wang; Yan, Wei; Yang, Fuhua

    2018-06-01

    Recent progress in nanoscale fabrication allows many fundamental studies of the few dopant atoms in various semiconductor nanostructures. Since the size of nanoscale devices has touched the limit of the nature, a single dopant atom may dominate the performance of the device. Besides, the quantum computing considered as a future choice beyond Moore's law also utilizes dopant atoms as functional units. Therefore, the dopant atoms will play a significant role in the future novel nanoscale devices. This review focuses on the study of few dopant atoms as quantum components in silicon nanoscale device. The control of the number of dopant atoms and unique quantum transport characteristics induced by dopant atoms are presented. It can be predicted that the development of nanoelectronics based on dopant atoms will pave the way for new possibilities in quantum electronics. Project supported by National Key R&D Program of China (No. 2016YFA0200503).

  5. Compact Quantum Random Number Generator with Silicon Nanocrystals Light Emitting Device Coupled to a Silicon Photomultiplier

    Science.gov (United States)

    Bisadi, Zahra; Acerbi, Fabio; Fontana, Giorgio; Zorzi, Nicola; Piemonte, Claudio; Pucker, Georg; Pavesi, Lorenzo

    2018-02-01

    A small-sized photonic quantum random number generator, easy to be implemented in small electronic devices for secure data encryption and other applications, is highly demanding nowadays. Here, we propose a compact configuration with Silicon nanocrystals large area light emitting device (LED) coupled to a Silicon photomultiplier to generate random numbers. The random number generation methodology is based on the photon arrival time and is robust against the non-idealities of the detector and the source of quantum entropy. The raw data show high quality of randomness and pass all the statistical tests in national institute of standards and technology tests (NIST) suite without a post-processing algorithm. The highest bit rate is 0.5 Mbps with the efficiency of 4 bits per detected photon.

  6. Compact Quantum Random Number Generator with Silicon Nanocrystals Light Emitting Device Coupled to a Silicon Photomultiplier

    Directory of Open Access Journals (Sweden)

    Zahra Bisadi

    2018-02-01

    Full Text Available A small-sized photonic quantum random number generator, easy to be implemented in small electronic devices for secure data encryption and other applications, is highly demanding nowadays. Here, we propose a compact configuration with Silicon nanocrystals large area light emitting device (LED coupled to a Silicon photomultiplier to generate random numbers. The random number generation methodology is based on the photon arrival time and is robust against the non-idealities of the detector and the source of quantum entropy. The raw data show high quality of randomness and pass all the statistical tests in national institute of standards and technology tests (NIST suite without a post-processing algorithm. The highest bit rate is 0.5 Mbps with the efficiency of 4 bits per detected photon.

  7. Spike-Timing Dependent Plasticity in Unipolar Silicon Oxide RRAM Devices.

    Science.gov (United States)

    Zarudnyi, Konstantin; Mehonic, Adnan; Montesi, Luca; Buckwell, Mark; Hudziak, Stephen; Kenyon, Anthony J

    2018-01-01

    Resistance switching, or Resistive RAM (RRAM) devices show considerable potential for application in hardware spiking neural networks (neuro-inspired computing) by mimicking some of the behavior of biological synapses, and hence enabling non-von Neumann computer architectures. Spike-timing dependent plasticity (STDP) is one such behavior, and one example of several classes of plasticity that are being examined with the aim of finding suitable algorithms for application in many computing tasks such as coincidence detection, classification and image recognition. In previous work we have demonstrated that the neuromorphic capabilities of silicon-rich silicon oxide (SiO x ) resistance switching devices extend beyond plasticity to include thresholding, spiking, and integration. We previously demonstrated such behaviors in devices operated in the unipolar mode, opening up the question of whether we could add plasticity to the list of features exhibited by our devices. Here we demonstrate clear STDP in unipolar devices. Significantly, we show that the response of our devices is broadly similar to that of biological synapses. This work further reinforces the potential of simple two-terminal RRAM devices to mimic neuronal functionality in hardware spiking neural networks.

  8. Strain-Induced Spin-Resonance Shifts in Silicon Devices

    Science.gov (United States)

    Pla, J. J.; Bienfait, A.; Pica, G.; Mansir, J.; Mohiyaddin, F. A.; Zeng, Z.; Niquet, Y. M.; Morello, A.; Schenkel, T.; Morton, J. J. L.; Bertet, P.

    2018-04-01

    In spin-based quantum-information-processing devices, the presence of control and detection circuitry can change the local environment of a spin by introducing strain and electric fields, altering its resonant frequencies. These resonance shifts can be large compared to intrinsic spin linewidths, and it is therefore important to study, understand, and model such effects in order to better predict device performance. We investigate a sample of bismuth donor spins implanted in a silicon chip, on top of which a superconducting aluminum microresonator is fabricated. The on-chip resonator provides two functions: it produces local strain in the silicon due to the larger thermal contraction of the aluminum, and it enables sensitive electron spin-resonance spectroscopy of donors close to the surface that experience this strain. Through finite-element strain simulations, we are able to reconstruct key features of our experiments, including the electron spin-resonance spectra. Our results are consistent with a recently observed mechanism for producing shifts of the hyperfine interaction for donors in silicon, which is linear with the hydrostatic component of an applied strain.

  9. Progress in complementary metal–oxide–semiconductor silicon photonics and optoelectronic integrated circuits

    International Nuclear Information System (INIS)

    Chen Hongda; Zhang Zan; Huang Beiju; Mao Luhong; Zhang Zanyun

    2015-01-01

    Silicon photonics is an emerging competitive solution for next-generation scalable data communications in different application areas as high-speed data communication is constrained by electrical interconnects. Optical interconnects based on silicon photonics can be used in intra/inter-chip interconnects, board-to-board interconnects, short-reach communications in datacenters, supercomputers and long-haul optical transmissions. In this paper, we present an overview of recent progress in silicon optoelectronic devices and optoelectronic integrated circuits (OEICs) based on a complementary metal–oxide–semiconductor-compatible process, and focus on our research contributions. The silicon optoelectronic devices and OEICs show good characteristics, which are expected to benefit several application domains, including communication, sensing, computing and nonlinear systems. (review)

  10. Silicon nano crystal-based non-volatile memory devices

    International Nuclear Information System (INIS)

    Ng, C.Y.; Chen, T.P.; Sreeduth, D.; Chen, Q.; Ding, L.; Du, A.

    2006-01-01

    In this work, we have investigated the performance and reliability of a Flash memory based on silicon nanocrystal synthesized with very-low energy ion beams. The devices are fabricated with a conventional CMOS process and the size of the nanocrystal is ∼ 4 nm as determined from TEM measurement. Electrical properties of the devices with a tunnel oxide of either 3 nm or 7 nm are evaluated. The devices exhibit good endurance up to 10 5 W/E cycles even at the high operation temperature of 85 deg. C for both the tunnel oxide thicknesses. For the thicker tunnel oxide (i.e., the 7-nm tunnel oxide), a good retention performance with an extrapolated 10-year memory window of ∼ 0.3 V (or ∼ 20% of charge lose after 10 years) is achieved. However, ∼ 70% of charge loss after 10 years is expected for the thinner tunnel oxide (i.e., the 3-nm tunnel oxide)

  11. Integrated Silicon Carbide Power Electronic Block

    Energy Technology Data Exchange (ETDEWEB)

    Radhakrishnan, Rahul [Global Power Technologies Group, Inc., Lake Forest, CA (United States)

    2017-11-07

    Research involved in this project is aimed at monolithically integrating an anti-parallel diode to the SiC MOSFET switch, so as to avoid having to use an external anti-parallel diode in power circuit applications. SiC MOSFETs are replacing Si MOSFETs and IGBTs in many applications, yet the high bandgap of the body diode in SiC MOSFET and consequent need for an external anti-parallel diode increases costs and discourages circuit designers from adopting this technology. Successful demonstration and subsequent commercialization of this technology would reduce SiC MOSFET cost and additionally reduce component count as well as other costs at the power circuit level. In this Phase I project, we have created multiple device designs, set up a process for device fabrication at the 150mm SiC foundry XFAB Texas, demonstrated unit-processes for device fabrication in short loops and started full flow device fabrication. Key findings of the development activity were: The limits of coverage of photoresist over the topology of thick polysilicon structures covered with oxide, which required larger feature dimensions to overcome; and The insufficient process margin for removing oxide spacers from polysilicon field ring features which could result in loss of some features without further process development No fundamental obstacles were uncovered during the process development. Given sufficient time for additional development it is likely that processes could be tuned to realize the monolithically integrated SiC JBS diode and MOSFET. Sufficient funds were not available in this program to resolve processing difficulties and fabricate the devices.

  12. Photosensitive N channel MOSFET device on silicon on sapphire substrate

    International Nuclear Information System (INIS)

    Le Goascoz, V.; Borel, J.

    1975-01-01

    An anomalous behavior of the N channel output current characteristic in a SOS MOSFET with a floating bulk is described. Such a phenomenon can be used in a photosensitive device with internal gain. Such devices can be used on SOS substrates to achieve integrated circuits with high insulating voltages and data transmission by optical means [fr

  13. Recent results from the development of silicon detectors with integrated electronics

    Energy Technology Data Exchange (ETDEWEB)

    Dalla Betta, G.-F. E-mail: dallabe@dit.unitn.it; Boscardin, M.; Batignani, G.; Bettarini, S.; Bisogni, M.G.; Bosisio, L.; Carpinelli, M.; Ciacchi, M.; Dittongo, S.; Forti, F.; Giorgi, M.; Gregori, P.; Manghisoni, M.; Novelli, M.; Piemonte, C.; Rachevskaia, I.; Rama, M.; Ratti, L.; Re, V.; Ronchin, S.; Sandrelli, F.; Simi, G.; Speziali, V.; Rosso, V.; Traversi, G.; Zorzi, N

    2004-02-01

    In the past few years we have developed a technological process allowing for the fabrication of radiation detectors with integrated electronics on high-resistivity silicon substrates. We report on some recent results relevant to the process optimisation and to device/circuit characterization.

  14. Recent results from the development of silicon detectors with integrated electronics

    International Nuclear Information System (INIS)

    Dalla Betta, G.-F.; Boscardin, M.; Batignani, G.; Bettarini, S.; Bisogni, M.G.; Bosisio, L.; Carpinelli, M.; Ciacchi, M.; Dittongo, S.; Forti, F.; Giorgi, M.; Gregori, P.; Manghisoni, M.; Novelli, M.; Piemonte, C.; Rachevskaia, I.; Rama, M.; Ratti, L.; Re, V.; Ronchin, S.; Sandrelli, F.; Simi, G.; Speziali, V.; Rosso, V.; Traversi, G.; Zorzi, N.

    2004-01-01

    In the past few years we have developed a technological process allowing for the fabrication of radiation detectors with integrated electronics on high-resistivity silicon substrates. We report on some recent results relevant to the process optimisation and to device/circuit characterization

  15. Passive Temperature Stabilization of Silicon Photonic Devices Using Liquid Crystals

    Directory of Open Access Journals (Sweden)

    Joanna Ptasinski

    2014-03-01

    Full Text Available In this work we explore the negative thermo-optic properties of liquid crystal claddings for passive temperature stabilization of silicon photonic integrated circuits. Photonic circuits are playing an increasing role in communications and computing, but they suffer from temperature dependent performance variation. Most existing techniques aimed at compensation of thermal effects rely on power hungry Joule heating. We show that integrating a liquid crystal cladding helps to minimize the effects of a temperature dependent drift. The advantage of liquid crystals lies in their high negative thermo-optic coefficients in addition to low absorption at the infrared wavelengths.

  16. Localized synthesis, assembly and integration of silicon nanowires

    Science.gov (United States)

    Englander, Ongi

    Localized synthesis, assembly and integration of one-dimensional silicon nanowires with MEMS structures is demonstrated and characterized in terms of local synthesis processes, electric-field assisted self-assembly, and a proof-of-concept nanoelectromechanical system (HEMS) demonstration. Emphasis is placed on the ease of integration, process control strategies, characterization techniques and the pursuit of integrated devices. A top-down followed by a bottom-up integration approach is utilized. Simple MEMS heater structures are utilized as the microscale platforms for the localized, bottom-up synthesis of one-dimensional nanostructures. Localized heating confines the high temperature region permitting only localized nanostructure synthesis and allowing the surroundings to remain at room temperature thus enabling CMOS compatible post-processing. The vapor-liquid-solid (VLS) process in the presence of a catalytic nanoparticle, a vapor phase reactant, and a specific temperature environment is successfully employed locally. Experimentally, a 5nm thick gold-palladium layer is used as the catalyst while silane is the vapor phase reactant. The current-voltage behavior of the MEMS structures can be correlated to the approximate temperature range required for the VLS reaction to take place. Silicon nanowires averaging 45nm in diameter and up to 29mum in length synthesized at growth rates of up to 1.5mum/min result. By placing two MEMS structures in close proximity, 4--10mum apart, localized silicon nanowire growth can be used to link together MEMS structures to yield a two-terminal, self-assembled micro-to-nano system. Here, one MEMS structure is designated as the hot growth structure while a nearby structure is designated as the cold secondary structure, whose role is to provide a natural stopping point for the VLS reaction. The application of a localized electric-field, 5 to 13V/mum in strength, during the synthesis process, has been shown to improve nanowire

  17. Amorphous silicon rich silicon nitride optical waveguides for high density integrated optics

    DEFF Research Database (Denmark)

    Philipp, Hugh T.; Andersen, Karin Nordström; Svendsen, Winnie Edith

    2004-01-01

    Amorphous silicon rich silicon nitride optical waveguides clad in silica are presented as a high-index contrast platform for high density integrated optics. Performance of different cross-sectional geometries have been measured and are presented with regards to bending loss and insertion loss...

  18. Light Absorption Enhancement of Silicon-Based Photovoltaic Devices with Multiple Bandgap Structures of Porous Silicon

    Directory of Open Access Journals (Sweden)

    Kuen-Hsien Wu

    2015-09-01

    Full Text Available Porous-silicon (PS multi-layered structures with three stacked PS layers of different porosity were prepared on silicon (Si substrates by successively tuning the electrochemical-etching parameters in an anodization process. The three PS layers have different optical bandgap energy and construct a triple-layered PS (TLPS structure with multiple bandgap energy. Photovoltaic devices were fabricated by depositing aluminum electrodes of Schottky contacts on the surfaces of the developed TLPS structures. The TLPS-based devices exhibit broadband photoresponses within the spectrum of the solar irradiation and get high photocurrent for the incident light of a tungsten lamp. The improved spectral responses of devices are owing to the multi-bandgap structures of TLPS, which are designed with a layered configuration analog to a tandem cell for absorbing a wider energy range of the incidental sun light. The large photocurrent is mainly ascribed to an enhanced light-absorption ability as a result of applying nanoporous-Si thin films as the surface layers to absorb the short-wavelength light and to improve the Schottky contacts of devices. Experimental results reveal that the multi-bandgap PS structures produced from electrochemical-etching of Si wafers are potentially promising for development of highly efficient Si-based solar cells.

  19. A 40-GBd QPSK/16-QAM integrated silicon coherent receiver

    NARCIS (Netherlands)

    Verbist, J.; Zhang, J.; Moeneclaey, B.; Soenen, W.; Van Weerdenburg, J.J.A.; Van Uden, R.; Okonkwo, C.M.; Bauwelinck, J.; Roelkens, G.; Yin, X.

    2016-01-01

    Through co-design of a dual SiGe transimpedance amplifier and an integrated silicon photonic circuit, we realized for the first time an ultra-compact and low-power silicon single-polarization coherent receiver operating at 40 GBd. A bit-error rate of <3.8× 10-3 was obtained for an optical

  20. Silicon carbide MOSFET integrated circuit technology

    Energy Technology Data Exchange (ETDEWEB)

    Brown, D.M.; Downey, E.; Ghezzo, M.; Kretchmer, J.; Krishnamurthy, V.; Hennessy, W.; Michon, G. [General Electric Co., Schenectady, NY (United States). Corporate Research and Development Center

    1997-07-16

    The research and development activities carried out to demonstrate the status of MOS planar technology for the manufacture of high temperature SiC ICs will be described. These activities resulted in the design, fabrication and demonstration of the World`s first SiC analog IC - a monolithic MOSFET operational amplifier. Research tasks required for the development of a planar SiC MOSFET IC technology included characterization of the SiC/SiO{sub 2} interface using thermally grown oxides: high temperature (350 C) reliability studies of thermally grown oxides: ion implantation studies of donor (N) and acceptor (B) dopants to form junction diodes: epitaxial layer characterization: N channel inversion and depletion mode MOSFETs; device isolation methods and finally integrated circuit design, fabrication and testing of the World`s first monolithic SiC operational amplifier IC. These studies defined a SiC n-channel depletion mode MOSFET IC technology and outlined tasks required to improve all types of SiC devices. For instance, high temperature circuit drift instabilities at 350 C were discovered and characterized. This type of instability needs to be understood and resolved because it affects the high temperature reliability of other types of SiC devices. Improvements in SiC wafer surface quality and the use of deposited oxides instead of thermally grown SiO{sub 2} gate dielectrics will probably be required for enhanced reliability. The slow reverse recovery time exhibited by n{sup +}-p diodes formed by N ion implantation is a problem that needs to be resolved for all types of planar bipolar devices. The reproducibility of acceptor implants needs to be improved before CMOS ICs and many types of power device structures will be manufacturable. (orig.) 51 refs.

  1. Digital signal processor for silicon audio playback devices; Silicon audio saisei kikiyo digital signal processor

    Energy Technology Data Exchange (ETDEWEB)

    NONE

    2000-03-01

    The digital audio signal processor (DSP) TC9446F series has been developed silicon audio playback devices with a memory medium of, e.g., flash memory, DVD players, and AV devices, e.g., TV sets. It corresponds to AAC (advanced audio coding) (2ch) and MP3 (MPEG1 Layer3), as the audio compressing techniques being used for transmitting music through an internet. It also corresponds to compressed types, e.g., Dolby Digital, DTS (digital theater system) and MPEG2 audio, being adopted for, e.g., DVDs. It can carry a built-in audio signal processing program, e.g., Dolby ProLogic, equalizer, sound field controlling, and 3D sound. TC9446XB has been lined up anew. It adopts an FBGA (fine pitch ball grid array) package for portable audio devices. (translated by NEDO)

  2. Integrated Photoelectrochemical Solar Energy Conversion and Organic Redox Flow Battery Devices

    KAUST Repository

    Li, Wenjie; Fu, Hui-chun; Li, Linsen; Cabá n-Acevedo, Miguel; He, Jr-Hau; Jin, Song

    2016-01-01

    photoelectrochemical solar energy conversion and electrochemical storage device is developed by integrating regenerative silicon solar cells and 9,10-anthraquinone-2,7-disulfonic acid (AQDS)/1,2-benzoquinone-3,5-disulfonic acid (BQDS) RFBs. The device can be directly

  3. Heterogeneously integrated silicon photonics for the mid-infrared and spectroscopic sensing.

    Science.gov (United States)

    Chen, Yu; Lin, Hongtao; Hu, Juejun; Li, Mo

    2014-07-22

    Besides being the foundational material for microelectronics, crystalline silicon has long been used for the production of infrared lenses and mirrors. More recently, silicon has become the key material to achieve large-scale integration of photonic devices for on-chip optical interconnect and signal processing. For optics, silicon has significant advantages: it offers a very high refractive index and is highly transparent in the spectral range from 1.2 to 8 μm. To fully exploit silicon’s superior performance in a remarkably broad range and to enable new optoelectronic functionalities, here we describe a general method to integrate silicon photonic devices on arbitrary foreign substrates. In particular, we apply the technique to integrate silicon microring resonators on mid-infrared compatible substrates for operation in the mid-infrared. These high-performance mid-infrared optical resonators are utilized to demonstrate, for the first time, on-chip cavity-enhanced mid-infrared spectroscopic analysis of organic chemicals with a limit of detection of less than 0.1 ng.

  4. Fabrication and optical characterization of light trapping silicon nanopore and nanoscrew devices

    International Nuclear Information System (INIS)

    Jin, Hyunjong; Logan Liu, G

    2012-01-01

    We have fabricated nanotextured Si substrates that exhibit controllable optical reflection intensities and colors. Si nanopore has a photon trapping nanostructure but has abrupt changes in the index of refraction displaying a darkened specular reflection. Nanoscrew Si shows graded refractive-index photon trapping structures that enable diffuse reflection to be as low as 2.2% over the visible wavelengths. By tuning the 3D nanoscale silicon structure, the optical reflection peak wavelength and intensity are changed in the wavelength range of 300–800 nm, making the surface have different reflectivity and apparent colors. The relation between the surface optical properties with the spatial features of the photon trapping nanostructures is examined. Integration of photon trapping structures with planar Si structure on the same substrate is also demonstrated. The tunable photon trapping silicon structures have potential applications in enhancing the performance of semiconductor photoelectric devices. (paper)

  5. Device physics underlying silicon heterojunction and passivating-contact solar cells: A topical review

    KAUST Repository

    Chavali, Raghu V. K.; De Wolf, Stefaan; Alam, Muhammad A.

    2018-01-01

    The device physics of commercially dominant diffused-junction silicon solar cells is well understood, allowing sophisticated optimization of this class of devices. Recently, so-called passivating-contact solar cell technologies have become prominent

  6. Micro knife-edge optical measurement device in a silicon-on-insulator substrate.

    Science.gov (United States)

    Chiu, Yi; Pan, Jiun-Hung

    2007-05-14

    The knife-edge method is a commonly used technique to characterize the optical profiles of laser beams or focused spots. In this paper, we present a micro knife-edge scanner fabricated in a silicon-on-insulator substrate using the micro-electromechanical-system technology. A photo detector can be fabricated in the device to allow further integration with on-chip signal conditioning circuitry. A novel backside deep reactive ion etching process is proposed to solve the residual stress effect due to the buried oxide layer. Focused optical spot profile measurement is demonstrated.

  7. Ultrafast triggered transient energy storage by atomic layer deposition into porous silicon for integrated transient electronics

    Science.gov (United States)

    Douglas, Anna; Muralidharan, Nitin; Carter, Rachel; Share, Keith; Pint, Cary L.

    2016-03-01

    Here we demonstrate the first on-chip silicon-integrated rechargeable transient power source based on atomic layer deposition (ALD) coating of vanadium oxide (VOx) into porous silicon. A stable specific capacitance above 20 F g-1 is achieved until the device is triggered with alkaline solutions. Due to the rational design of the active VOx coating enabled by ALD, transience occurs through a rapid disabling step that occurs within seconds, followed by full dissolution of all active materials within 30 minutes of the initial trigger. This work demonstrates how engineered materials for energy storage can provide a basis for next-generation transient systems and highlights porous silicon as a versatile scaffold to integrate transient energy storage into transient electronics.Here we demonstrate the first on-chip silicon-integrated rechargeable transient power source based on atomic layer deposition (ALD) coating of vanadium oxide (VOx) into porous silicon. A stable specific capacitance above 20 F g-1 is achieved until the device is triggered with alkaline solutions. Due to the rational design of the active VOx coating enabled by ALD, transience occurs through a rapid disabling step that occurs within seconds, followed by full dissolution of all active materials within 30 minutes of the initial trigger. This work demonstrates how engineered materials for energy storage can provide a basis for next-generation transient systems and highlights porous silicon as a versatile scaffold to integrate transient energy storage into transient electronics. Electronic supplementary information (ESI) available: (i) Experimental details for ALD and material fabrication, ellipsometry film thickness, preparation of gel electrolyte and separator, details for electrochemical measurements, HRTEM image of VOx coated porous silicon, Raman spectroscopy for VOx as-deposited as well as annealed in air for 1 hour at 450 °C, SEM and transient behavior dissolution tests of uniformly coated VOx on

  8. Integrating carbon nanotubes into silicon by means of vertical carbon nanotube field-effect transistors

    KAUST Repository

    Li, Jingqi; Wang, Qingxiao; Yue, Weisheng; Guo, Zaibing; LI, LIANG; Zhao, Chao; Wang, Xianbin; Abutaha, Anas I.; Alshareef, Husam N.; Zhang, Yafei; Zhang, Xixiang

    2014-01-01

    Single-walled carbon nanotubes have been integrated into silicon for use in vertical carbon nanotube field-effect transistors (CNTFETs). A unique feature of these devices is that a silicon substrate and a metal contact are used as the source and drain for the vertical transistors, respectively. These CNTFETs show very different characteristics from those fabricated with two metal contacts. Surprisingly, the transfer characteristics of the vertical CNTFETs can be either ambipolar or unipolar (p-type or n-type) depending on the sign of the drain voltage. Furthermore, the p-type/n-type character of the devices is defined by the doping type of the silicon substrate used in the fabrication process. A semiclassical model is used to simulate the performance of these CNTFETs by taking the conductance change of the Si contact under the gate voltage into consideration. The calculation results are consistent with the experimental observations. This journal is © the Partner Organisations 2014.

  9. Integrated lenses in polystyrene microfluidic devices

    KAUST Repository

    Fan, Yiqiang

    2013-04-01

    This paper reports a new method for integrating microlenses into microfluidic devices for improved observation. Two demonstration microfluidic devices were provided which were fabricated using this new technique. The integrated microlenses were fabricated using a free-surface thermo-compression molding method on a polystyrene (PS) sheet which was then bonded on top of microfluidic channels as a cover plate, with the convex microlenses providing a magnified image of the channel for the easier observation of the flow in the microchannels. This approach for fabricating the integrated microlens in microfluidic devices is rapid, low cost and without the requirement of cleanroom facilities. © 2013 IEEE.

  10. Silicon based nanogap device for studying electrical transport phenomena in molecule-nanoparticle hybrids

    International Nuclear Information System (INIS)

    Strobel, Sebastian; Hernandez, Rocio Murcia; Hansen, Allan G; Tornow, Marc

    2008-01-01

    We report the fabrication and characterization of vertical nanogap electrode devices using silicon-on-insulator substrates. Using only standard silicon microelectronic process technology, nanogaps down to 26 nm electrode separation were prepared. Transmission electron microscopy cross-sectional analysis revealed the well defined material architecture of the nanogap, comprising two electrodes of dissimilar geometrical shape. This asymmetry is directly reflected in transport measurements on molecule-nanoparticle hybrid systems formed by self-assembling a monolayer of mercaptohexanol on the electrode surface and the subsequent dielectrophoretic trapping of 30 nm diameter Au nanoparticles. The observed Coulomb staircase I-V characteristic measured at T = 4.2 K is in excellent agreement with theoretical modelling, whereby junction capacitances of the order of a few 10 -18 farad and asymmetric resistances of 30 and 300 MΩ, respectively, are also supported well by our independent estimates for the formed double barrier tunnelling system. We propose our nanoelectrode system for integrating novel functional electronic devices such as molecular junctions or nanoparticle hybrids into existing silicon microelectronic process technology

  11. Silicon based nanogap device for studying electrical transport phenomena in molecule-nanoparticle hybrids

    Energy Technology Data Exchange (ETDEWEB)

    Strobel, Sebastian; Hernandez, Rocio Murcia [Walter Schottky Institut, Technische Universitaet Muenchen, Am Coulombwall 3, 85748 Garching (Germany); Hansen, Allan G; Tornow, Marc [Institut fuer Halbleitertechnik, Technische Universitaet Braunschweig, Hans-Sommer-Strasse 66, 38106 Braunschweig (Germany)], E-mail: m.tornow@tu-bs.de

    2008-09-17

    We report the fabrication and characterization of vertical nanogap electrode devices using silicon-on-insulator substrates. Using only standard silicon microelectronic process technology, nanogaps down to 26 nm electrode separation were prepared. Transmission electron microscopy cross-sectional analysis revealed the well defined material architecture of the nanogap, comprising two electrodes of dissimilar geometrical shape. This asymmetry is directly reflected in transport measurements on molecule-nanoparticle hybrid systems formed by self-assembling a monolayer of mercaptohexanol on the electrode surface and the subsequent dielectrophoretic trapping of 30 nm diameter Au nanoparticles. The observed Coulomb staircase I-V characteristic measured at T = 4.2 K is in excellent agreement with theoretical modelling, whereby junction capacitances of the order of a few 10{sup -18} farad and asymmetric resistances of 30 and 300 M{omega}, respectively, are also supported well by our independent estimates for the formed double barrier tunnelling system. We propose our nanoelectrode system for integrating novel functional electronic devices such as molecular junctions or nanoparticle hybrids into existing silicon microelectronic process technology.

  12. Silicon based nanogap device for studying electrical transport phenomena in molecule-nanoparticle hybrids.

    Science.gov (United States)

    Strobel, Sebastian; Hernández, Rocío Murcia; Hansen, Allan G; Tornow, Marc

    2008-09-17

    We report the fabrication and characterization of vertical nanogap electrode devices using silicon-on-insulator substrates. Using only standard silicon microelectronic process technology, nanogaps down to 26 nm electrode separation were prepared. Transmission electron microscopy cross-sectional analysis revealed the well defined material architecture of the nanogap, comprising two electrodes of dissimilar geometrical shape. This asymmetry is directly reflected in transport measurements on molecule-nanoparticle hybrid systems formed by self-assembling a monolayer of mercaptohexanol on the electrode surface and the subsequent dielectrophoretic trapping of 30 nm diameter Au nanoparticles. The observed Coulomb staircase I-V characteristic measured at T = 4.2 K is in excellent agreement with theoretical modelling, whereby junction capacitances of the order of a few 10(-18) farad and asymmetric resistances of 30 and 300 MΩ, respectively, are also supported well by our independent estimates for the formed double barrier tunnelling system. We propose our nanoelectrode system for integrating novel functional electronic devices such as molecular junctions or nanoparticle hybrids into existing silicon microelectronic process technology.

  13. A manufacturable process integration approach for graphene devices

    Science.gov (United States)

    Vaziri, Sam; Lupina, Grzegorz; Paussa, Alan; Smith, Anderson D.; Henkel, Christoph; Lippert, Gunther; Dabrowski, Jarek; Mehr, Wolfgang; Östling, Mikael; Lemme, Max C.

    2013-06-01

    In this work, we propose an integration approach for double gate graphene field effect transistors. The approach includes a number of process steps that are key for future integration of graphene in microelectronics: bottom gates with ultra-thin (2 nm) high-quality thermally grown SiO2 dielectrics, shallow trench isolation between devices and atomic layer deposited Al2O3 top gate dielectrics. The complete process flow is demonstrated with fully functional GFET transistors and can be extended to wafer scale processing. We assess, through simulation, the effects of the quantum capacitance and band bending in the silicon substrate on the effective electric fields in the top and bottom gate oxide. The proposed process technology is suitable for other graphene-based devices such as graphene-based hot electron transistors and photodetectors.

  14. Medicine Delivery Device with Integrated Sterilization and Detection

    Science.gov (United States)

    Shearn, Michael J.; Greer, Harold F.; Manohara, Harish

    2013-01-01

    Sterile delivery devices can be created by integrating a medicine delivery instrument with surfaces that are coated with germicidal and anti-fouling material. This requires that a large-surface-area template be developed within a constrained volume to ensure good contact between the delivered medicine and the germicidal material. Both of these can be integrated using JPL-developed silicon nanotip or cryo-etch black silicon technologies with atomic layer deposition (ALD) coating of specific germicidal layers. The application of semiconductor processing techniques and technologies to the problems of fluid manipulation and delivery has enabled the integration of chemical, electrical, and mechanical manipulation of samples all within a single microfluidic device. This approach has been successfully applied at JPL to the automated processing, detection, and analysis of minute quantities (parts per trillion level) of biomaterials to develop instruments for in situ exploration or extraterrestrial bodies. The same nanofabrication techniques that are used to produce a microfluidics device are also capable of synthesizing extremely high-surface-area templates in precise locations, and coating those surfaces with conformal films to manipulate their surface properties. This methodology has been successfully applied at JPL to produce patterned and coated silicon nanotips (also known as black silicon) to manipulate the hydrophilicity of surfaces to direct the spreading of fluids in microdevices. JPL's ALD technique is an ideal method to produce the highly conformal coatings required for this type of application. Certain materials, such as TiO2, have germicidal and anti-fouling properties when they are illuminated with UV light. The proposed delivery device contacts medicine with this high-surface-area black silicon surface coated with a thin-film germicidal deposited conformally with ALD. The coating can also be illuminated with ultraviolet light for the purpose of sterilization

  15. Atomic layer deposition for graphene device integration

    NARCIS (Netherlands)

    Vervuurt, R.H.J.; Kessels, W.M.M.; Bol, A.A.

    2017-01-01

    Graphene is a two dimensional material with extraordinary properties, which make it an interesting material for many optical and electronic devices. The integration of graphene in these devices often requires the deposition of thin dielectric layers on top of graphene. Atomic layer deposition (ALD)

  16. Hybrid graphene/silicon integrated optical isolators with photonic spin–orbit interaction

    International Nuclear Information System (INIS)

    Ma, Jingwen; Sun, Xiankai; Xi, Xiang; Yu, Zejie

    2016-01-01

    Optical isolators are an important building block in photonic computation and communication. In traditional optics, isolators are realized with magneto-optical garnets. However, it remains challenging to incorporate such materials on an integrated platform because of the difficulty in material growth and bulky device footprint. Here, we propose an ultracompact integrated isolator by exploiting graphene's magneto-optical property on a silicon-on-insulator platform. The photonic nonreciprocity is achieved because the cyclotrons in graphene experiencing different optical spins exhibit different responses to counterpropagating light. Taking advantage of cavity resonance effects, we have numerically optimized a device design, which shows excellent isolation performance with the extinction ratio over 45 dB and the insertion loss around 12 dB at a wavelength near 1.55 μm. Featuring graphene's CMOS compatibility and substantially reduced device footprint, our proposal sheds light on monolithic integration of nonreciprocal photonic devices.

  17. Integrating photonics with silicon nanoelectronics for the next generation of systems on a chip.

    Science.gov (United States)

    Atabaki, Amir H; Moazeni, Sajjad; Pavanello, Fabio; Gevorgyan, Hayk; Notaros, Jelena; Alloatti, Luca; Wade, Mark T; Sun, Chen; Kruger, Seth A; Meng, Huaiyu; Al Qubaisi, Kenaish; Wang, Imbert; Zhang, Bohan; Khilo, Anatol; Baiocco, Christopher V; Popović, Miloš A; Stojanović, Vladimir M; Ram, Rajeev J

    2018-04-01

    Electronic and photonic technologies have transformed our lives-from computing and mobile devices, to information technology and the internet. Our future demands in these fields require innovation in each technology separately, but also depend on our ability to harness their complementary physics through integrated solutions 1,2 . This goal is hindered by the fact that most silicon nanotechnologies-which enable our processors, computer memory, communications chips and image sensors-rely on bulk silicon substrates, a cost-effective solution with an abundant supply chain, but with substantial limitations for the integration of photonic functions. Here we introduce photonics into bulk silicon complementary metal-oxide-semiconductor (CMOS) chips using a layer of polycrystalline silicon deposited on silicon oxide (glass) islands fabricated alongside transistors. We use this single deposited layer to realize optical waveguides and resonators, high-speed optical modulators and sensitive avalanche photodetectors. We integrated this photonic platform with a 65-nanometre-transistor bulk CMOS process technology inside a 300-millimetre-diameter-wafer microelectronics foundry. We then implemented integrated high-speed optical transceivers in this platform that operate at ten gigabits per second, composed of millions of transistors, and arrayed on a single optical bus for wavelength division multiplexing, to address the demand for high-bandwidth optical interconnects in data centres and high-performance computing 3,4 . By decoupling the formation of photonic devices from that of transistors, this integration approach can achieve many of the goals of multi-chip solutions 5 , but with the performance, complexity and scalability of 'systems on a chip' 1,6-8 . As transistors smaller than ten nanometres across become commercially available 9 , and as new nanotechnologies emerge 10,11 , this approach could provide a way to integrate photonics with state-of-the-art nanoelectronics.

  18. Thermal processing of strained silicon-on-insulator for atomically precise silicon device fabrication

    International Nuclear Information System (INIS)

    Lee, W.C.T.; Bishop, N.; Thompson, D.L.; Xue, K.; Scappucci, G.; Cederberg, J.G.; Gray, J.K.; Han, S.M.; Celler, G.K.; Carroll, M.S.; Simmons, M.Y.

    2013-01-01

    Highlights: ► Strained silicon-on-insulator (sSOI) samples were flash-annealed at high temperature under ultra-high vacuum conditions. ► The extend of surface strain relaxation depends on the annealing temperature with no strain relaxation observed below 1020 °C. ► A 2 × 1 reconstructed surface with low defect density can be achieved. ► The annealed sSOI surface shows enhanced step undulations due to the unique energetics caused by surface strain. - Abstract: We investigate the ability to reconstruct strained silicon-on-insulator (sSOI) substrates in ultra-high vacuum for use in atomic scale device fabrication. Characterisation of the starting sSOI substrate using μRaman shows an average tensile strain of 0.8%, with clear strain modulation in a crosshatch pattern across the surface. The surfaces were heated in ultra-high vacuum from temperatures of 900 °C to 1100 °C and subsequently imaged using scanning tunnelling microscopy (STM). The initial strain modulation on the surface is observed to promote silicon migration and the formation of crosshatched surface features whose height and pitch increases with increasing annealing temperature. STM images reveal alternating narrow straight S A steps and triangular wavy S B steps attributed to the spontaneous faceting of S B and preferential adatom attachment on S B under biaxial tensile strain. Raman spectroscopy shows that despite these high temperature anneals no strain relaxation of the substrate is observed up to temperatures of 1020 °C. Above 1100 °C, strain relaxation is evident but is confined to the surface.

  19. The integration of InGaP LEDs with CMOS on 200 mm silicon wafers

    Science.gov (United States)

    Wang, Bing; Lee, Kwang Hong; Wang, Cong; Wang, Yue; Made, Riko I.; Sasangka, Wardhana Aji; Nguyen, Viet Cuong; Lee, Kenneth Eng Kian; Tan, Chuan Seng; Yoon, Soon Fatt; Fitzgerald, Eugene A.; Michel, Jurgen

    2017-02-01

    The integration of photonics and electronics on a converged silicon CMOS platform is a long pursuit goal for both academe and industry. We have been developing technologies that can integrate III-V compound semiconductors and CMOS circuits on 200 mm silicon wafers. As an example we present our work on the integration of InGaP light-emitting diodes (LEDs) with CMOS. The InGaP LEDs were epitaxially grown on high-quality GaAs and Ge buffers on 200 mm (100) silicon wafers in a MOCVD reactor. Strain engineering was applied to control the wafer bow that is induced by the mismatch of coefficients of thermal expansion between III-V films and silicon substrate. Wafer bonding was used to transfer the foundry-made silicon CMOS wafers to the InGaP LED wafers. Process trenches were opened on the CMOS layer to expose the underneath III-V device layers for LED processing. We show the issues encountered in the 200 mm processing and the methods we have been developing to overcome the problems.

  20. Battery, especially for portable devices, has an anode containing silicon

    NARCIS (Netherlands)

    Kan, S.Y.

    2002-01-01

    The anode (2) contains silicon. A battery with a silicon-containing anode is claimed. An Independent claim is also included for a method used to make the battery, comprising the doping of a silicon substrate (1) with charge capacity-increasing material (preferably boron, phosphorous or arsenic),

  1. A low cost and hybrid technology for integrating silicon sensors or actuators in polymer microfluidic systems

    International Nuclear Information System (INIS)

    Charlot, Samuel; Gué, Anne-Marie; Tasselli, Josiane; Marty, Antoine; Abgrall, Patrick; Estève, Daniel

    2008-01-01

    This paper describes a new technology permitting a hybrid integration of silicon chips in polymer (PDMS and SU8) microfluidic structures. This two-step technology starts with transferring the silicon device onto a rigid substrate (typically PCB) and planarizing it, and then it proceeds with stacking of the polymer-made fluidic network onto the device. The technology is low cost, based on screen printing and lamination, can be applied to treat large surface areas, and is compatible with standard photolithography and vacuum based approaches. We show, as an example, the integration of a thermal sensor inside channels made of PDMS or SU8. The developed structures had no fluid leaks at the Si/polymer interfaces and the electrical circuit was perfectly tightproof. (note)

  2. High performance bio-integrated devices

    Science.gov (United States)

    Kim, Dae-Hyeong; Lee, Jongha; Park, Minjoon

    2014-06-01

    In recent years, personalized electronics for medical applications, particularly, have attracted much attention with the rise of smartphones because the coupling of such devices and smartphones enables the continuous health-monitoring in patients' daily life. Especially, it is expected that the high performance biomedical electronics integrated with the human body can open new opportunities in the ubiquitous healthcare. However, the mechanical and geometrical constraints inherent in all standard forms of high performance rigid wafer-based electronics raise unique integration challenges with biotic entities. Here, we describe materials and design constructs for high performance skin-mountable bio-integrated electronic devices, which incorporate arrays of single crystalline inorganic nanomembranes. The resulting electronic devices include flexible and stretchable electrophysiology electrodes and sensors coupled with active electronic components. These advances in bio-integrated systems create new directions in the personalized health monitoring and/or human-machine interfaces.

  3. An improved PIN photodetector with integrated JFET on high-resistivity silicon

    International Nuclear Information System (INIS)

    Dalla Betta, Gian-Franco; Piemonte, Claudio; Boscardin, Maurizio; Gregori, Paolo; Zorzi, Nicola; Fazzi, Alberto; Pignatel, Giorgio U.

    2006-01-01

    We report on a PIN photodetector integrated with a Junction Field Effect Transistor (JFET) on a high-resistivity silicon substrate. Owing to a modified fabrication technology, the electrical and noise characteristics of the JFET transistor have been enhanced with respect to the previous versions of the device, allowing the performance to be significantly improved. In this paper, the main design and technological aspects relevant to the proposed structure are addressed and experimental results from the electrical characterization are discussed

  4. Integrated Amorphous Silicon p-i-n Temperature Sensor for CMOS Photonics

    Directory of Open Access Journals (Sweden)

    Sandro Rao

    2016-01-01

    Full Text Available Hydrogenated amorphous silicon (a-Si:H shows interesting optoelectronic and technological properties that make it suitable for the fabrication of passive and active micro-photonic devices, compatible moreover with standard microelectronic devices on a microchip. A temperature sensor based on a hydrogenated amorphous silicon p-i-n diode integrated in an optical waveguide for silicon photonics applications is presented here. The linear dependence of the voltage drop across the forward-biased diode on temperature, in a range from 30 °C up to 170 °C, has been used for thermal sensing. A high sensitivity of 11.9 mV/°C in the bias current range of 34–40 nA has been measured. The proposed device is particularly suitable for the continuous temperature monitoring of CMOS-compatible photonic integrated circuits, where the behavior of the on-chip active and passive devices are strongly dependent on their operating temperature.

  5. Graphene-on-silicon hybrid plasmonic-photonic integrated circuits.

    Science.gov (United States)

    Xiao, Ting-Hui; Cheng, Zhenzhou; Goda, Keisuke

    2017-06-16

    Graphene surface plasmons (GSPs) have shown great potential in biochemical sensing, thermal imaging, and optoelectronics. To excite GSPs, several methods based on the near-field optical microscope and graphene nanostructures have been developed in the past few years. However, these methods suffer from their bulky setups and low GSP-excitation efficiency due to the short interaction length between free-space vertical excitation light and the atomic layer of graphene. Here we present a CMOS-compatible design of graphene-on-silicon hybrid plasmonic-photonic integrated circuits that achieve the in-plane excitation of GSP polaritons as well as localized surface plasmon (SP) resonance. By employing a suspended membrane slot waveguide, our design is able to excite GSP polaritons on a chip. Moreover, by utilizing a graphene nanoribbon array, we engineer the transmission spectrum of the waveguide by excitation of localized SP resonance. Our theoretical and computational study paves a new avenue to enable, modulate, and monitor GSPs on a chip, potentially applicable for the development of on-chip electro-optic devices.

  6. Silicon Integrated Dual-Mode Interferometer with Differential Outputs

    Directory of Open Access Journals (Sweden)

    Niklas Hoppe

    2017-09-01

    Full Text Available The dual-mode interferometer (DMI is an attractive alternative to Mach-Zehnder interferometers for sensor purposes, achieving sensitivities to refractive index changes close to state-of-the-art. Modern designs on silicon-on-insulator (SOI platforms offer thermally stable and compact devices with insertion losses of less than 1 dB and high extinction ratios. Compact arrays of multiple DMIs in parallel are easy to fabricate due to the simple structure of the DMI. In this work, the principle of operation of an integrated DMI with differential outputs is presented which allows the unambiguous phase shift detection with a single wavelength measurement, rather than using a wavelength sweep and evaluating the optical output power spectrum. Fluctuating optical input power or varying attenuation due to different analyte concentrations can be compensated by observing the sum of the optical powers at the differential outputs. DMIs with two differential single-mode outputs are fabricated in a 250 nm SOI platform, and corresponding measurements are shown to explain the principle of operation in detail. A comparison of DMIs with the conventional Mach-Zehnder interferometer using the same technology concludes this work.

  7. Defects in silicon effect on device performance and relationship to crystal growth conditions

    Science.gov (United States)

    Jastrzebski, L.

    1985-01-01

    A relationship between material defects in silicon and the performance of electronic devices will be described. A role which oxygen and carbon in silicon play during the defects generation process will be discussed. The electronic properties of silicon are a strong function of the oxygen state in the silicon. This state controls mechanical properties of silicon efficiency for internal gettering and formation of defects in the device's active area. In addition, to temperature, time, ambience, and the cooling/heating rates of high temperature treatments, the oxygen state is a function of the crystal growth process. The incorporation of carbon and oxygen into silicon crystal is controlled by geometry and rotation rates applied to crystal and crucible during crystal growths. Also, formation of nucleation centers for oxygen precipitation is influenced by the growth process, although there is still a controversy which parameters play a major role. All these factors will be reviewed with special emphasis on areas which are still ambiguous and controversial.

  8. MOS structures containing silicon nanoparticles for memory device applications

    International Nuclear Information System (INIS)

    Nedev, N; Zlatev, R; Nesheva, D; Manolov, E; Levi, Z; Brueggemann, R; Meier, S

    2008-01-01

    Metal-oxide-silicon structures containing layers with amorphous or crystalline silicon nanoparticles in a silicon oxide matrix are fabricated by sequential physical vapour deposition of SiO x (x = 1.15) and RF sputtering of SiO 2 on n-type crystalline silicon, followed by high temperature annealing in an inert gas ambient. Depending on the annealing temperature, 700 deg. C or 1000 deg. C, amorphous or crystalline silicon nanoparticles are formed in the silicon oxide matrix. The annealing process is used not only for growing nanoparticles but also to form a dielectric layer with tunnelling thickness at the silicon/insulator interface. High frequency C-V measurements demonstrate that both types of structures can be charged negatively or positively by applying a positive or negative voltage on the gate. The structures with amorphous silicon nanoparticles show several important advantages compared to the nanocrystal ones, such as lower defect density at the interface between the crystalline silicon wafer and the tunnel silicon oxide, better retention characteristics and better reliability

  9. Breakdown study of dc silicon micro-discharge devices

    International Nuclear Information System (INIS)

    Schwaederlé, L; Kulsreshath, M K; Lefaucheux, P; Tillocher, T; Dussart, R; Overzet, L J

    2012-01-01

    The influence of geometrical and operating parameters on the electrical characteristics of dc microcavity discharges provides insight into their controlling physics. We present here results of such a study on silicon-based microcavity discharge devices carried out in helium at pressure ranging from 100 to 1000 Torr. Different micro-reactor configurations were measured. The differences include isolated single cavities versus arrays of closely spaced cavities, various cavity geometries (un-etched as well as isotropically and anisotropically etched), various dimensions (100 or 150 µm cavity diameter and 0-150 µm depth). The electrode gap was kept constant in all cases at approximately 6 µm. The applied electric field reaches 5 × 10 7 V m -1 which results in current and power densities up to 2 A cm -2 and 200 kW cm -3 , respectively. The number of microcavities and the microcavity depth are shown to be the most important geometrical parameters for predicting breakdown and operation of microcavity devices. The probability of initiatory electron generation which is volume dependent and the electric field strength which is depth dependent are, respectively, considered to be responsible. The cavity shape (isotropic/anisotropic) and diameter had no significant influence. The number of micro-discharges that could be ignited depends on the rate of voltage rise and pressure. Larger numbers ignite at lower frequency and pressure. In addition, the voltage polarity has the largest influence on the electrical characteristics of the micro-discharge of all parameters, which is due to both the asymmetric role of electrodes as electron emitter and the non-uniformity of the electric field resulting in different ionization efficiencies. The qualitative shape of all breakdown voltage versus pressure curves can be explained in terms of the distance over which the discharge breakdown effectively occurs as long as one understand that this distance can depend on pressure. (paper)

  10. Three-Dimensional Integration of Black Phosphorus Photodetector with Silicon Photonics and Nanoplasmonics.

    Science.gov (United States)

    Chen, Che; Youngblood, Nathan; Peng, Ruoming; Yoo, Daehan; Mohr, Daniel A; Johnson, Timothy W; Oh, Sang-Hyun; Li, Mo

    2017-02-08

    We demonstrate the integration of a black phosphorus photodetector in a hybrid, three-dimensional architecture of silicon photonics and metallic nanoplasmonics structures. This integration approach combines the advantages of the low propagation loss of silicon waveguides, high-field confinement of a plasmonic nanogap, and the narrow bandgap of black phosphorus to achieve high responsivity for detection of telecom-band, near-infrared light. Benefiting from an ultrashort channel (∼60 nm) and near-field enhancement enabled by the nanogap structure, the photodetector shows an intrinsic responsivity as high as 10 A/W afforded by internal gain mechanisms, and a 3 dB roll-off frequency of 150 MHz. This device demonstrates a promising approach for on-chip integration of three distinctive photonic systems, which, as a generic platform, may lead to future nanophotonic applications for biosensing, nonlinear optics, and optical signal processing.

  11. Semiconductor Devices Inspired By and Integrated With Biology

    Energy Technology Data Exchange (ETDEWEB)

    Rogers, John [University of Illinois

    2012-04-25

    Biology is curved, soft and elastic; silicon wafers are not. Semiconductor technologies that can bridge this gap in form and mechanics will create new opportunities in devices that adopt biologically inspired designs or require intimate integration with the human body. This talk describes the development of ideas for electronics that offer the performance of state-of-the-art, wafer- based systems but with the mechanical properties of a rubber band. We explain the underlying materials science and mechanics of these approaches, and illustrate their use in (1) bio- integrated, ‘tissue-like’ electronics with unique capabilities for mapping cardiac and neural electrophysiology, and (2) bio-inspired, ‘eyeball’ cameras with exceptional imaging properties enabled by curvilinear, Petzval designs.

  12. Molecular monolayers for electrical passivation and functionalization of silicon-based solar energy devices

    NARCIS (Netherlands)

    Veerbeek, Janneke; Firet, Nienke J.; Vijselaar, Wouter; Elbersen, R.; Gardeniers, Han; Huskens, Jurriaan

    2017-01-01

    Silicon-based solar fuel devices require passivation for optimal performance yet at the same time need functionalization with (photo)catalysts for efficient solar fuel production. Here, we use molecular monolayers to enable electrical passivation and simultaneous functionalization of silicon-based

  13. Friction and dynamically dissipated energy dependence on temperature in polycrystalline silicon MEMS devices

    NARCIS (Netherlands)

    Gkouzou, A.; Kokorian, J.; Janssen, G.C.A.M.; van Spengen, W.M.

    2017-01-01

    In this paper, we report on the influence of capillary condensation on the sliding friction of sidewall surfaces in polycrystalline silicon micro-electromechanical
    systems (MEMS). We developed a polycrystalline silicon MEMS tribometer, which is a microscale test device with two components

  14. Novel technique for reliability testing of silicon integrated circuits

    NARCIS (Netherlands)

    Le Minh, P.; Wallinga, Hans; Woerlee, P.H.; van den Berg, Albert; Holleman, J.

    2001-01-01

    We propose a simple, inexpensive technique with high resolution to identify the weak spots in integrated circuits by means of a non-destructive photochemical process in which photoresist is used as the photon detection tool. The experiment was done to localize the breakdown link of thin silicon

  15. Enhanced Electroluminescence from Silicon Quantum Dots Embedded in Silicon Nitride Thin Films Coupled with Gold Nanoparticles in Light Emitting Devices

    Directory of Open Access Journals (Sweden)

    Ana Luz Muñoz-Rosas

    2018-03-01

    Full Text Available Nowadays, the use of plasmonic metal layers to improve the photonic emission characteristics of several semiconductor quantum dots is a booming tool. In this work, we report the use of silicon quantum dots (SiQDs embedded in a silicon nitride thin film coupled with an ultra-thin gold film (AuNPs to fabricate light emitting devices. We used the remote plasma enhanced chemical vapor deposition technique (RPECVD in order to grow two types of silicon nitride thin films. One with an almost stoichiometric composition, acting as non-radiative spacer; the other one, with a silicon excess in its chemical composition, which causes the formation of silicon quantum dots imbibed in the silicon nitride thin film. The ultra-thin gold film was deposited by the direct current (DC-sputtering technique, and an aluminum doped zinc oxide thin film (AZO which was deposited by means of ultrasonic spray pyrolysis, plays the role of the ohmic metal-like electrode. We found that there is a maximum electroluminescence (EL enhancement when the appropriate AuNPs-spacer-SiQDs configuration is used. This EL is achieved at a moderate turn-on voltage of 11 V, and the EL enhancement is around four times bigger than the photoluminescence (PL enhancement of the same AuNPs-spacer-SiQDs configuration. From our experimental results, we surmise that EL enhancement may indeed be due to a plasmonic coupling. This kind of silicon-based LEDs has the potential for technology transfer.

  16. Flexible semi-transparent silicon (100) fabric with high-k/metal gate devices

    KAUST Repository

    Rojas, Jhonathan Prieto; Hussain, Muhammad Mustafa

    2013-01-01

    (100) wafers and then released as continuous, mechanically flexible, optically semi-transparent and high thermal budget compatible silicon fabric with devices. This is the first ever demonstration with this set of materials which allows full degree

  17. Fabrication of a novel silicon single electron transistor for Si:P quantum computer devices

    International Nuclear Information System (INIS)

    Angus, S.J.; Smith, C.E.A.; Gauja, E.; Dzurak, A.S.; Clark, R.G.; Snider, G.L.

    2004-01-01

    Full text: Quantum computation relies on the successful measurement of quantum states. Single electron transistors (SETs) are known to be able to perform fast and sensitive charge measurements of solid state qubits. However, due to their sensitivity, SETs are also very susceptible to random charge fluctuations in a solid-state materials environment. In previous dc transport measurements, silicon-based SETs have demonstrated greater charge stability than A1/A1 2 O 3 SETs. We have designed and fabricated a novel silicon SET architecture for a comparison of the noise characteristics of silicon and aluminium based devices. The silicon SET described here is designed for controllable and reproducible low temperature operation. It is fabricated using a novel dual gate structure on a silicon-on-insulator substrate. A silicon quantum wire is formed in a 100nm thick high-resistivity superficial silicon layer using reactive ion etching. Carriers are induced in the silicon wire by a back gate in the silicon substrate. The tunnel barriers are created electrostatically, using lithographically defined metallic electrodes (∼40nm width). These tunnel barriers surround the surface of the quantum wire, thus producing excellent electrostatic confinement. This architecture provides independent control of tunnel barrier height and island occupancy, thus promising better control of Coulomb blockade oscillations than in previously investigated silicon SETs. The use of a near intrinsic silicon substrate offers compatibility with Si:P qubits in the longer term

  18. RFID and Memory Devices Fabricated Integrally on Substrates

    Science.gov (United States)

    Schramm, Harry F.

    2004-01-01

    Electronic identification devices containing radio-frequency identification (RFID) circuits and antennas would be fabricated integrally with the objects to be identified, according to a proposal. That is to say, the objects to be identified would serve as substrates for the deposition and patterning of the materials of the devices used to identify them, and each identification device would be bonded to the identified object at the molecular level. Vacuum arc vapor deposition (VAVD) is the NASA derived process for depositing layers of material on the substrate. This proposal stands in contrast to the current practice of fabricating RFID and/or memory devices as wafer-based, self-contained integrated-circuit chips that are subsequently embedded in or attached to plastic cards to make smart account-information cards and identification badges. If one relies on such a chip to store data on the history of an object to be tracked and the chip falls off or out of the object, then one loses both the historical data and the means to track the object and verify its identity electronically. Also, in contrast is the manufacturing philosophy in use today to make many memory devices. Today s methods involve many subtractive processes such as etching. This proposal only uses additive methods, building RFID and memory devices from the substrate up in thin layers. VAVD is capable of spraying silicon, copper, and other materials commonly used in electronic devices. The VAVD process sprays most metals and some ceramics. The material being sprayed has a very strong bond with the substrate, whether that substrate is metal, ceramic, or even wood, rock, glass, PVC, or paper. An object to be tagged with an identification device according to the proposal must be compatible with a vacuum deposition process. Temperature is seldom an issue as the substrate rarely reaches 150 F (66 C) during the deposition process. A portion of the surface of the object would be designated as a substrate for

  19. Comparison of Six Different Silicones In Vitro for Application as Glaucoma Drainage Device

    Directory of Open Access Journals (Sweden)

    Claudia Windhövel

    2018-02-01

    Full Text Available Silicones are widely used in medical applications. In ophthalmology, glaucoma drainage devices are utilized if conservative therapies are not applicable or have failed. Long-term success of these devices is limited by failure to control intraocular pressure due to fibrous encapsulation. Therefore, different medical approved silicones were tested in vitro for cell adhesion, cell proliferation and viability of human Sclera (hSF and human Tenon fibroblasts (hTF. The silicones were analysed also depending on the sample preparation according to the manufacturer’s instructions. The surface quality was characterized with environmental scanning electron microscope (ESEM and water contact angle measurements. All silicones showed homogeneous smooth and hydrophobic surfaces. Cell adhesion was significantly reduced on all silicones compared to the negative control. Proliferation index and cell viability were not influenced much. For development of a new glaucoma drainage device, the silicones Silbione LSR 4330 and Silbione LSR 4350, in this study, with low cell counts for hTF and low proliferation indices for hSF, and silicone Silastic MDX4-4210, with low cell counts for hSF and low proliferation indices for hTF, have shown the best results in vitro. Due to the high cell adhesion shown on Silicone LSR 40, 40,026, this material is unsuitable.

  20. Infrared transparent graphene heater for silicon photonic integrated circuits.

    Science.gov (United States)

    Schall, Daniel; Mohsin, Muhammad; Sagade, Abhay A; Otto, Martin; Chmielak, Bartos; Suckow, Stephan; Giesecke, Anna Lena; Neumaier, Daniel; Kurz, Heinrich

    2016-04-18

    Thermo-optical tuning of the refractive index is one of the pivotal operations performed in integrated silicon photonic circuits for thermal stabilization, compensation of fabrication tolerances, and implementation of photonic operations. Currently, heaters based on metal wires provide the temperature control in the silicon waveguide. The strong interaction of metal and light, however, necessitates a certain gap between the heater and the photonic structure to avoid significant transmission loss. Here we present a graphene heater that overcomes this constraint and enables an energy efficient tuning of the refractive index. We achieve a tuning power as low as 22 mW per free spectral range and fast response time of 3 µs, outperforming metal based waveguide heaters. Simulations support the experimental results and suggest that for graphene heaters the spacing to the silicon can be further reduced yielding the best possible energy efficiency and operation speed.

  1. Nanostructured silicon for photonics from materials to devices

    CERN Document Server

    Gaburro, Z; Daldosso, N

    2006-01-01

    The use of light to channel signals around electronic chips could solve several current problems in microelectronic evolution including: power dissipation, interconnect bottlenecks, input/output from/to optical communication channels, poor signal bandwidth, etc. It is unfortunate that silicon is not a good photonic material: it has a poor light-emission efficiency and exhibits a negligible electro-optical effect. Silicon photonics is a field having the objective of improving the physical properties of silicon; thus turning it into a photonic material and permitting the full convergence of elec

  2. Heterogeneous integration of lithium niobate and silicon nitride waveguides for wafer-scale photonic integrated circuits on silicon.

    Science.gov (United States)

    Chang, Lin; Pfeiffer, Martin H P; Volet, Nicolas; Zervas, Michael; Peters, Jon D; Manganelli, Costanza L; Stanton, Eric J; Li, Yifei; Kippenberg, Tobias J; Bowers, John E

    2017-02-15

    An ideal photonic integrated circuit for nonlinear photonic applications requires high optical nonlinearities and low loss. This work demonstrates a heterogeneous platform by bonding lithium niobate (LN) thin films onto a silicon nitride (Si3N4) waveguide layer on silicon. It not only provides large second- and third-order nonlinear coefficients, but also shows low propagation loss in both the Si3N4 and the LN-Si3N4 waveguides. The tapers enable low-loss-mode transitions between these two waveguides. This platform is essential for various on-chip applications, e.g., modulators, frequency conversions, and quantum communications.

  3. Enhanced vapour sensing using silicon nanowire devices coated with Pt nanoparticle functionalized porous organic frameworks

    KAUST Repository

    Cao, Anping

    2018-03-09

    Recently various porous organic frameworks (POFs, crystalline or amorphous materials) have been discovered, and used for a wide range of applications, including molecular separations and catalysis. Silicon nanowires (SiNWs) have been extensively studied for diverse applications, including as transistors, solar cells, lithium ion batteries and sensors. Here we demonstrate the functionalization of SiNW surfaces with POFs and explore its effect on the electrical sensing properties of SiNW-based devices. The surface modification by POFs was easily achieved by polycondensation on amine-modified SiNWs. Platinum nanoparticles were formed in these POFs by impregnation with chloroplatinic acid followed by chemical reduction. The final hybrid system showed highly enhanced sensitivity for methanol vapour detection. We envisage that the integration of SiNWs with POF selector layers, loaded with different metal nanoparticles will open up new avenues, not only in chemical and biosensing, but also in separations and catalysis.

  4. Silicon-based sleeve devices for chemical reactions

    Science.gov (United States)

    Northrup, M. Allen; Mariella, Jr., Raymond P.; Carrano, Anthony V.; Balch, Joseph W.

    1996-01-01

    A silicon-based sleeve type chemical reaction chamber that combines heaters, such as doped polysilicon for heating, and bulk silicon for convection cooling. The reaction chamber combines a critical ratio of silicon and silicon nitride to the volume of material to be heated (e.g., a liquid) in order to provide uniform heating, yet low power requirements. The reaction chamber will also allow the introduction of a secondary tube (e.g., plastic) into the reaction sleeve that contains the reaction mixture thereby alleviating any potential materials incompatibility issues. The reaction chamber may be utilized in any chemical reaction system for synthesis or processing of organic, inorganic, or biochemical reactions, such as the polymerase chain reaction (PCR) and/or other DNA reactions, such as the ligase chain reaction, which are examples of a synthetic, thermal-cycling-based reaction. The reaction chamber may also be used in synthesis instruments, particularly those for DNA amplification and synthesis.

  5. Plated lamination structures for integrated magnetic devices

    Science.gov (United States)

    Webb, Bucknell C.

    2014-06-17

    Semiconductor integrated magnetic devices such as inductors, transformers, etc., having laminated magnetic-insulator stack structures are provided, wherein the laminated magnetic-insulator stack structures are formed using electroplating techniques. For example, an integrated laminated magnetic device includes a multilayer stack structure having alternating magnetic and insulating layers formed on a substrate, wherein each magnetic layer in the multilayer stack structure is separated from another magnetic layer in the multilayer stack structure by an insulating layer, and a local shorting structure to electrically connect each magnetic layer in the multilayer stack structure to an underlying magnetic layer in the multilayer stack structure to facilitate electroplating of the magnetic layers using an underlying conductive layer (magnetic or seed layer) in the stack as an electrical cathode/anode for each electroplated magnetic layer in the stack structure.

  6. Silicon based nanogap device for investigating electronic transport through 12 nm long oligomers

    DEFF Research Database (Denmark)

    Strobel, S.; Albert, E.; Csaba, G.

    2009-01-01

    We have fabricated vertical nanogap electrode devices based on Silicon-on-Insulator (SOI) substrates for investigating the electronic transport properties of long, conjugated molecular wires. Our nanogap electrode devices comprise smooth metallic contact pairs situated at the sidewall of an SOI s...

  7. Silicon-based optical integrated circuits for terabit communication networks

    International Nuclear Information System (INIS)

    Svidzinsky, K K

    2003-01-01

    A brief review is presented of the development of silicon-based optical integrated circuits used as components in modern all-optical communication networks with the terabit-per-second transmission capacity. The designs and technologies for manufacturing these circuits are described and the problems related to their development and application in WDM communication systems are considered. (special issue devoted to the memory of academician a m prokhorov)

  8. Silicon Photonics: All-Optical Devices for Linear and Nonlinear Applications

    Science.gov (United States)

    Driscoll, Jeffrey B.

    Silicon photonics has grown rapidly since the first Si electro-optic switch was demonstrated in 1987, and the field has never grown more quickly than it has over the past decade, fueled by milestone achievements in semiconductor processing technologies for low loss waveguides, high-speed Si modulators, Si lasers, Si detectors, and an enormous toolbox of passive and active integrated devices. Silicon photonics is now on the verge of major commercialization breakthroughs, and optical communication links remain the force driving integrated and Si photonics towards the first commercial telecom and datacom transceivers; however other potential and future applications are becoming uncovered and refined as researchers reveal the benefits of manipulating photons on the nanoscale. This thesis documents an exploration into the unique guided-wave and nonlinear properties of deeply-scaled high-index-contrast sub-wavelength Si waveguides. It is found that the tight confinement inherent to single-mode channel waveguides on the silicon-on-insulator platform lead to a rich physics, which can be leveraged for new devices extending well beyond simple passive interconnects and electro-optic devices. The following chapters will concentrate, in detail, on a number of unique physical features of Si waveguides and extend these attributes towards new and interesting devices. Linear optical properties and nonlinear optical properties are investigated, both of which are strongly affected by tight optical confinement of the guided waveguide modes. As will be shown, tight optical confinement directly results in strongly vectoral modal components, where the electric and magnetic fields of the guided modes extend into all spatial dimensions, even along the axis of propagation. In fact, the longitudinal electric and magnetic field components can be just as strong as the transverse fields, directly affecting the modal group velocity and energy transport properties since the longitudinal fields

  9. Nanocrystalline Silicon Carrier Collectors for Silicon Heterojunction Solar Cells and Impact on Low-Temperature Device Characteristics

    KAUST Repository

    Nogay, Gizem

    2016-09-26

    Silicon heterojunction solar cells typically use stacks of hydrogenated intrinsic/doped amorphous silicon layers as carrier selective contacts. However, the use of these layers may cause parasitic optical absorption losses and moderate fill factor (FF) values due to a high contact resistivity. In this study, we show that the replacement of doped amorphous silicon with nanocrystalline silicon is beneficial for device performance. Optically, we observe an improved short-circuit current density when these layers are applied to the front side of the device. Electrically, we observe a lower contact resistivity, as well as higher FF. Importantly, our cell parameter analysis, performed in a temperature range from -100 to +80 °C, reveals that the use of hole-collecting p-type nanocrystalline layer suppresses the carrier transport barrier, maintaining FF s in the range of 70% at -100 °C, whereas it drops to 40% for standard amorphous doped layers. The same analysis also reveals a saturation onset of the open-circuit voltage at -100 °C using doped nanocrystalline layers, compared with saturation onset at -60 °C for doped amorphous layers. These findings hint at a reduced importance of the parasitic Schottky barrier at the interface between the transparent electrodes and the selective contact in the case of nanocrystalline layer implementation. © 2011-2012 IEEE.

  10. Nanocrystalline Silicon Carrier Collectors for Silicon Heterojunction Solar Cells and Impact on Low-Temperature Device Characteristics

    KAUST Repository

    Nogay, Gizem; Seif, Johannes Peter; Riesen, Yannick; Tomasi, Andrea; Jeangros, Quentin; Wyrsch, Nicolas; Haug, Franz-Josef; De Wolf, Stefaan; Ballif, Christophe

    2016-01-01

    Silicon heterojunction solar cells typically use stacks of hydrogenated intrinsic/doped amorphous silicon layers as carrier selective contacts. However, the use of these layers may cause parasitic optical absorption losses and moderate fill factor (FF) values due to a high contact resistivity. In this study, we show that the replacement of doped amorphous silicon with nanocrystalline silicon is beneficial for device performance. Optically, we observe an improved short-circuit current density when these layers are applied to the front side of the device. Electrically, we observe a lower contact resistivity, as well as higher FF. Importantly, our cell parameter analysis, performed in a temperature range from -100 to +80 °C, reveals that the use of hole-collecting p-type nanocrystalline layer suppresses the carrier transport barrier, maintaining FF s in the range of 70% at -100 °C, whereas it drops to 40% for standard amorphous doped layers. The same analysis also reveals a saturation onset of the open-circuit voltage at -100 °C using doped nanocrystalline layers, compared with saturation onset at -60 °C for doped amorphous layers. These findings hint at a reduced importance of the parasitic Schottky barrier at the interface between the transparent electrodes and the selective contact in the case of nanocrystalline layer implementation. © 2011-2012 IEEE.

  11. Compact integrated optical devices for optical sensor and switching applications

    NARCIS (Netherlands)

    Kauppinen, L.J.

    2010-01-01

    This thesis describes the design, fabrication, and characterization of compact optical devices for sensing and switching applications. Our focus has been to realize the devices using CMOS-compatible fabrication processes. Particularly the silicon photonics fabrication platform, ePIXfab, has been

  12. Feasibility studies of microelectrode silicon detectors with integrated electronics

    International Nuclear Information System (INIS)

    Dalla Betta, G.-F.; Batignani, G.; Bettarini, S.; Boscardin, M.; Bosisio, L.; Carpinelli, M.; Dittongo, S.; Forti, F.; Giorgi, M.; Gregori, P.; Lusiani, A.; Manghisoni, M.; Pignatel, G.U.; Rama, M.; Ratti, L.; Re, V.; Sandrelli, F.; Speziali, V.; Svelto, F.; Zorzi, N.

    2002-01-01

    We describe our experience on design and fabrication, on high-resistivity silicon substrates, of microstrip detectors and integrated electronics, devoted to high-energy physics experiments and medical/industrial imaging applications. We report on the full program of our collaboration, with particular regards to the tuning of a new fabrication process, allowing for the production of good quality transistors, while keeping under control the basic detector parameters, such as leakage current. Experimental results on JFET and bipolar transistors are presented, and a microstrip detector with an integrated JFET in source-follower configuration is introduced

  13. Molecular Monolayers for Electrical Passivation and Functionalization of Silicon-Based Solar Energy Devices.

    Science.gov (United States)

    Veerbeek, Janneke; Firet, Nienke J; Vijselaar, Wouter; Elbersen, Rick; Gardeniers, Han; Huskens, Jurriaan

    2017-01-11

    Silicon-based solar fuel devices require passivation for optimal performance yet at the same time need functionalization with (photo)catalysts for efficient solar fuel production. Here, we use molecular monolayers to enable electrical passivation and simultaneous functionalization of silicon-based solar cells. Organic monolayers were coupled to silicon surfaces by hydrosilylation in order to avoid an insulating silicon oxide layer at the surface. Monolayers of 1-tetradecyne were shown to passivate silicon micropillar-based solar cells with radial junctions, by which the efficiency increased from 8.7% to 9.9% for n + /p junctions and from 7.8% to 8.8% for p + /n junctions. This electrical passivation of the surface, most likely by removal of dangling bonds, is reflected in a higher shunt resistance in the J-V measurements. Monolayers of 1,8-nonadiyne were still reactive for click chemistry with a model catalyst, thus enabling simultaneous passivation and future catalyst coupling.

  14. Study Trapped Charge Distribution in P-Channel Silicon-Oxide-Nitride-Oxide-Silicon Memory Device Using Dynamic Programming Scheme

    Science.gov (United States)

    Li, Fu-Hai; Chiu, Yung-Yueh; Lee, Yen-Hui; Chang, Ru-Wei; Yang, Bo-Jun; Sun, Wein-Town; Lee, Eric; Kuo, Chao-Wei; Shirota, Riichiro

    2013-04-01

    In this study, we precisely investigate the charge distribution in SiN layer by dynamic programming of channel hot hole induced hot electron injection (CHHIHE) in p-channel silicon-oxide-nitride-oxide-silicon (SONOS) memory device. In the dynamic programming scheme, gate voltage is increased as a staircase with fixed step amplitude, which can prohibits the injection of holes in SiN layer. Three-dimensional device simulation is calibrated and is compared with the measured programming characteristics. It is found, for the first time, that the hot electron injection point quickly traverses from drain to source side synchronizing to the expansion of charged area in SiN layer. As a result, the injected charges quickly spread over on the almost whole channel area uniformly during a short programming period, which will afford large tolerance against lateral trapped charge diffusion by baking.

  15. A capillary pumping device utilizing super-hydrophobic silicon grass

    International Nuclear Information System (INIS)

    Kung, Chun-Fei; Chang, Chien-Cheng; Chu, Chin-Chou

    2011-01-01

    In this study, we show that a compact silicon grass surface can be generated by utilizing the induced coupled plasma method with suitably chosen fabrication parameters. This super-hydrophobic structure suspends deionized water on top of the grass and keeps the contact angle at around 153°. The silicon grass is used to improve the driving efficiency of a capillary pumping micro-duct (without sidewalls), which is completely defined by a bottom hydrophilic stripe (adjacent to a Teflon substrate) and a fully top-covered hydrophobic Teflon surface which is coated on a glass substrate. The channel has a height of 3 µm and a width of 100 µm. In this work, the Teflon substrate is replaced with the silicon grass surface. When the fluid is flowing through the micro-duct on the stripe, the interface between the silicon grass and the hydrophilic stripe forms a stable air cushion barrier to the fluid, thus effectively reducing the frictional force. By changing only the interface with this replacement, we demonstrate that the average measured velocities of the new design show improvements of 21% and 17% in the driving efficiency over the original design for transporting deionized water and human blood, respectively. It is also shown that the measured data of the present design are closer to the values predicted by a theoretical analysis which relates the flow velocity to the contact angles, surface tension and fluid viscosity

  16. All-Optical Signal Processing using Silicon Devices

    DEFF Research Database (Denmark)

    Oxenløwe, Leif Katsuo; Pu, Minhao; Ding, Yunhong

    2014-01-01

    This paper presents an overview of recent wo rk on the use of silicon waveguides for processing optical data signals. We will describe ultra-fast, ultra-broadband, polarisation-insensitive and phase-sensitive applications including processing of spectrally-efficient data formats and optical phase...

  17. Fifth workshop on the role of impurities and defects in silicon device processing. Extended abstracts

    Energy Technology Data Exchange (ETDEWEB)

    Sopori, B.L.; Luque, A.; Sopori, B.; Swanson, D.; Gee, J.; Kalejs, J.; Jastrzebski, L.; Tan, T.

    1995-08-01

    This workshop dealt with engineering aspects and material properties of silicon electronic devices. Crystalline silicon growth, modeling, and properties are discussed in general and as applied to solar cells. Topics considered in discussions of silicon growth include: casting, string ribbons, Al backside contacts, ion implantation, gettering, passivation, and ultrasound treatments. Properties studies include: Electronic properties of defects and impurities, dopant and carrier concentrations, structure and bonding, nitrogen effects, degradation of bulk diffusion length, and recombination parameters. Individual papers from the workshop are indexed separately on the Energy Data Bases.

  18. Medical device integration using mobile telecommunications infrastructure.

    Science.gov (United States)

    Moorman, Bridget A; Cockle, Richard A

    2013-01-01

    Financial pressures, an aging population, and a rising number of patients with chronic diseases, have encouraged the use of remote monitoring technologies. This usually entails at least one physiological parameter measurement for a clinician. Mobile telecommunication technologies lend themselves to this functionality, and in some cases, avoid some of the issues encountered with device integration. Moreover, the inherent characteristics of the mobile telecommunications infrastructure allow a coupling of business and clinical functions that were not possible before. Table I compares and contrasts some key aspect of device integration in and out of a healthcare facility. An HTM professional may be part of the team that acquires and/or manages a system using a mobile telecommunications technology. It is important for HTM professionals to ensure the data is in a standard format so that the interfaces across this system don't become brittle and break easily if one part changes. Moreover, the security and safety considerations of the system and the data should be a primary consideration in and y purchase, with attention given to the proper environmental and encryption mechanisms. Clinical engineers and other HTM professionals are unique in that they understand the patient/clinician/device interface and the need to ensure its safety and effectiveness regardless of geographical environment.

  19. A MoTe2-based light-emitting diode and photodetector for silicon photonic integrated circuits.

    Science.gov (United States)

    Bie, Ya-Qing; Grosso, Gabriele; Heuck, Mikkel; Furchi, Marco M; Cao, Yuan; Zheng, Jiabao; Bunandar, Darius; Navarro-Moratalla, Efren; Zhou, Lin; Efetov, Dmitri K; Taniguchi, Takashi; Watanabe, Kenji; Kong, Jing; Englund, Dirk; Jarillo-Herrero, Pablo

    2017-12-01

    One of the current challenges in photonics is developing high-speed, power-efficient, chip-integrated optical communications devices to address the interconnects bottleneck in high-speed computing systems. Silicon photonics has emerged as a leading architecture, in part because of the promise that many components, such as waveguides, couplers, interferometers and modulators, could be directly integrated on silicon-based processors. However, light sources and photodetectors present ongoing challenges. Common approaches for light sources include one or few off-chip or wafer-bonded lasers based on III-V materials, but recent system architecture studies show advantages for the use of many directly modulated light sources positioned at the transmitter location. The most advanced photodetectors in the silicon photonic process are based on germanium, but this requires additional germanium growth, which increases the system cost. The emerging two-dimensional transition-metal dichalcogenides (TMDs) offer a path for optical interconnect components that can be integrated with silicon photonics and complementary metal-oxide-semiconductors (CMOS) processing by back-end-of-the-line steps. Here, we demonstrate a silicon waveguide-integrated light source and photodetector based on a p-n junction of bilayer MoTe 2 , a TMD semiconductor with an infrared bandgap. This state-of-the-art fabrication technology provides new opportunities for integrated optoelectronic systems.

  20. A MoTe2-based light-emitting diode and photodetector for silicon photonic integrated circuits

    Science.gov (United States)

    Bie, Ya-Qing; Grosso, Gabriele; Heuck, Mikkel; Furchi, Marco M.; Cao, Yuan; Zheng, Jiabao; Bunandar, Darius; Navarro-Moratalla, Efren; Zhou, Lin; Efetov, Dmitri K.; Taniguchi, Takashi; Watanabe, Kenji; Kong, Jing; Englund, Dirk; Jarillo-Herrero, Pablo

    2017-12-01

    One of the current challenges in photonics is developing high-speed, power-efficient, chip-integrated optical communications devices to address the interconnects bottleneck in high-speed computing systems. Silicon photonics has emerged as a leading architecture, in part because of the promise that many components, such as waveguides, couplers, interferometers and modulators, could be directly integrated on silicon-based processors. However, light sources and photodetectors present ongoing challenges. Common approaches for light sources include one or few off-chip or wafer-bonded lasers based on III-V materials, but recent system architecture studies show advantages for the use of many directly modulated light sources positioned at the transmitter location. The most advanced photodetectors in the silicon photonic process are based on germanium, but this requires additional germanium growth, which increases the system cost. The emerging two-dimensional transition-metal dichalcogenides (TMDs) offer a path for optical interconnect components that can be integrated with silicon photonics and complementary metal-oxide-semiconductors (CMOS) processing by back-end-of-the-line steps. Here, we demonstrate a silicon waveguide-integrated light source and photodetector based on a p-n junction of bilayer MoTe2, a TMD semiconductor with an infrared bandgap. This state-of-the-art fabrication technology provides new opportunities for integrated optoelectronic systems.

  1. Effects of plasma-deposited silicon nitride passivation on the radiation hardness of CMOS integrated circuits

    International Nuclear Information System (INIS)

    Clement, J.J.

    1980-01-01

    The use of plasma-deposited silicon nitride as a final passivation over metal-gate CMOS integrated circuits degrades the radiation hardness of these devices. The hardness degradation is manifested by increased radiation-induced threshold voltage shifts caused principally by the charging of new interface states and, to a lesser extent, by the trapping of holes created upon exposure to ionizing radiation. The threshold voltage shifts are a strong function of the deposition temperature, and show very little dependence on thickness for films deposited at 300 0 C. There is some correlation between the threshold voltage shifts and the hydrogen content of the PECVD silicon nitride films used as the final passivation layer as a function of deposition temperature. The mechanism by which the hydrogen contained in these films may react with the Si/SiO 2 interface is not clear at this point

  2. A Novel Silicon Micromachined Integrated MCM Thermal Management System

    Science.gov (United States)

    Kazmierczak, M. J.; Henderson, H. T.; Gerner, F. M.

    1997-01-01

    "Micromachining" is a chemical means of etching three-dimensional structures, typically in single- crystalline silicon. These techniques are leading toward what is coming to be referred to as MEMS (Micro Electro Mechanical Systems), where in addition to the ordinary two-dimensional (planar) microelectronics, it is possible to build three-dimensional n-ticromotors, electrically- actuated raicrovalves, hydraulic systems and much more on the same microchip. These techniques become possible because of differential etching rates of various crystallographic planes and materials used for semiconductor n-ticrofabfication. The University of Cincinnati group in collaboration with Karl Baker at NASA Lewis were the first to form micro heat pipes in silicon by the above techniques. Current work now in progress using MEMS technology is now directed towards the development of the next generation in MCM (Multi Chip Module) packaging. Here we propose to develop a complete electronic thermal management system which will allow densifica6on in chip stacking by perhaps two orders of magnitude. Furthermore the proposed technique will allow ordinary conu-nercial integrated chips to be utilized. Basically, the new technique involves etching square holes into a silicon substrate and then inserting and bonding commercially available integrated chips into these holes. For example, over a 100 1/4 in. by 1 /4 in. integrated chips can be placed on a 4 in. by 4 in. silicon substrate to form a Multi-Chip Module (MCM). Placing these MCM's in-line within an integrated rack then allows for three-diniensional stacking. Increased miniaturization of microelectronic circuits will lead to very high local heat fluxes. A high performance thermal management system will be specifically designed to remove the generated energy. More specifically, a compact heat exchanger with milli / microchannels will be developed and tested to remove the heat through the back side of this MCM assembly for moderate and high

  3. From physics to devices light emissions in silicon from physics to devices

    CERN Document Server

    Lockwood, David J; Weber, Eicke R; Lockwood, David J

    1997-01-01

    Since its inception in 1966, the series of numbered volumes known as Semiconductors and Semimetals has distinguished itself through the careful selection of well-known authors, editors, and contributors.The"Willardson and Beer"Series, as it is widely known, has succeeded in publishing numerous landmark volumes and chapters. Not only did many of these volumes make an impact at the time of their publication, but they continue to be well-cited years after their original release. Recently, Professor Eicke R. Weber of the University of California at Berkeley joined as a co-editor of the series. Professor Weber, a well-known expert in the field of semiconductor materials, will further contribute to continuing the series' tradition of publishing timely, highly relevant, and long-impacting volumes. Some of the recent volumes, such as Hydrogen in Semiconductors, Imperfections in III/V Materials, Epitaxial Microstructures, High-Speed Heterostructure Devices,Oxygen in Silicon, and others promise indeed that this traditi...

  4. High-contrast gratings for long-wavelength laser integration on silicon

    Science.gov (United States)

    Sciancalepore, Corrado; Descos, Antoine; Bordel, Damien; Duprez, Hélène; Letartre, Xavier; Menezo, Sylvie; Ben Bakir, Badhise

    2014-02-01

    Silicon photonics is increasingly considered as the most promising way-out to the relentless growth of data traffic in today's telecommunications infrastructures, driving an increase in transmission rates and computing capabilities. This is in fact challenging the intrinsic limit of copper-based, short-reach interconnects and microelectronic circuits in data centers and server architectures to offer enough modulation bandwidth at reasonable power dissipation. In the context of the heterogeneous integration of III-V direct-bandgap materials on silicon, optics with high-contrast metastructures enables the efficient implementation of optical functions such as laser feedback, input/output (I/O) to active/passive components, and optical filtering, while heterogeneous integration of III-V layers provides sufficient optical gain, resulting in silicon-integrated laser sources. The latest ensure reduced packaging costs and reduced footprint for the optical transceivers, a key point for the short reach communications. The invited talk will introduce the audience to the latest breakthroughs concerning the use of high-contrast gratings (HCGs) for the integration of III-V-on-Si verticalcavity surface-emitting lasers (VCSELs) as well as Fabry-Perot edge-emitters (EELs) in the main telecom band around 1.55 μm. The strong near-field mode overlap within HCG mirrors can be exploited to implement unique optical functions such as dense wavelength division multiplexing (DWDM): a 16-λ100-GHz-spaced channels VCSEL array is demonstrated. On the other hand, high fabrication yields obtained via molecular wafer bonding of III-V alloys on silicon-on-insulator (SOI) conjugate excellent device performances with cost-effective high-throughput production, supporting industrial needs for a rapid research-to-market transfer.

  5. Ultra-fast photon counting with a passive quenching silicon photomultiplier in the charge integration regime

    Science.gov (United States)

    Zhang, Guoqing; Lina, Liu

    2018-02-01

    An ultra-fast photon counting method is proposed based on the charge integration of output electrical pulses of passive quenching silicon photomultipliers (SiPMs). The results of the numerical analysis with actual parameters of SiPMs show that the maximum photon counting rate of a state-of-art passive quenching SiPM can reach ~THz levels which is much larger than that of the existing photon counting devices. The experimental procedure is proposed based on this method. This photon counting regime of SiPMs is promising in many fields such as large dynamic light power detection.

  6. THz generation from a nanocrystalline silicon-based photoconductive device

    International Nuclear Information System (INIS)

    Daghestani, N S; Persheyev, S; Cataluna, M A; Rose, M J; Ross, G

    2011-01-01

    Terahertz generation has been achieved from a photoconductive switch based on hydrogenated nanocrystalline silicon (nc-Si:H), gated by a femtosecond laser. The nc-Si:H samples were produced by a hot wire chemical vapour deposition process, a process with low production costs owing to its higher growth rate and manufacturing simplicity. Although promising ultrafast carrier dynamics of nc-Si have been previously demonstrated, this is the first report on THz generation from a nc-Si:H material

  7. Design Procedure and Fabrication of Reproducible Silicon Vernier Devices for High-Performance Refractive Index Sensing.

    Science.gov (United States)

    Troia, Benedetto; Khokhar, Ali Z; Nedeljkovic, Milos; Reynolds, Scott A; Hu, Youfang; Mashanovich, Goran Z; Passaro, Vittorio M N

    2015-06-10

    In this paper, we propose a generalized procedure for the design of integrated Vernier devices for high performance chemical and biochemical sensing. In particular, we demonstrate the accurate control of the most critical design and fabrication parameters of silicon-on-insulator cascade-coupled racetrack resonators operating in the second regime of the Vernier effect, around 1.55 μm. The experimental implementation of our design strategies has allowed a rigorous and reliable investigation of the influence of racetrack resonator and directional coupler dimensions as well as of waveguide process variability on the operation of Vernier devices. Figures of merit of our Vernier architectures have been measured experimentally, evidencing a high reproducibility and a very good agreement with the theoretical predictions, as also confirmed by relative errors even lower than 1%. Finally, a Vernier gain as high as 30.3, average insertion loss of 2.1 dB and extinction ratio up to 30 dB have been achieved.

  8. The MMI Device Ontology: Enabling Sensor Integration

    Science.gov (United States)

    Rueda, C.; Galbraith, N.; Morris, R. A.; Bermudez, L. E.; Graybeal, J.; Arko, R. A.; Mmi Device Ontology Working Group

    2010-12-01

    The Marine Metadata Interoperability (MMI) project has developed an ontology for devices to describe sensors and sensor networks. This ontology is implemented in the W3C Web Ontology Language (OWL) and provides an extensible conceptual model and controlled vocabularies for describing heterogeneous instrument types, with different data characteristics, and their attributes. It can help users populate metadata records for sensors; associate devices with their platforms, deployments, measurement capabilities and restrictions; aid in discovery of sensor data, both historic and real-time; and improve the interoperability of observational oceanographic data sets. We developed the MMI Device Ontology following a community-based approach. By building on and integrating other models and ontologies from related disciplines, we sought to facilitate semantic interoperability while avoiding duplication. Key concepts and insights from various communities, including the Open Geospatial Consortium (eg., SensorML and Observations and Measurements specifications), Semantic Web for Earth and Environmental Terminology (SWEET), and W3C Semantic Sensor Network Incubator Group, have significantly enriched the development of the ontology. Individuals ranging from instrument designers, science data producers and consumers to ontology specialists and other technologists contributed to the work. Applications of the MMI Device Ontology are underway for several community use cases. These include vessel-mounted multibeam mapping sonars for the Rolling Deck to Repository (R2R) program and description of diverse instruments on deepwater Ocean Reference Stations for the OceanSITES program. These trials involve creation of records completely describing instruments, either by individual instances or by manufacturer and model. Individual terms in the MMI Device Ontology can be referenced with their corresponding Uniform Resource Identifiers (URIs) in sensor-related metadata specifications (e

  9. Radio frequency siliconization: An approach to the coating for the future large superconducting fusion devices

    International Nuclear Information System (INIS)

    Li, J.; Zhao, Y.P.; Wan, B.N.; Gong, X.Z.; Zhen, M.; Gu, X.M.; Zhang, X.D.; Luo, J.R.; Wan, Y.X.; Xie, J.K.; Li, C.F.; Chen, J.L.; Toi, K.; Noda, N.; Watari, T.

    2001-01-01

    Radio frequency (rf) siliconization has been carried out on the HT-7 superconducting tokamak in the presence of a high magnetic field, which is a try on superconducting tokamaks. Three different procedures of rf siliconization have been tested and a very promising method to produce high quality silicon films was found after comparing the film properties and plasma performance produced by these three different procedures. The Si/C films are amorphous, semitransparent, and homogeneous throughout the layer and adhere firmly to all the substrates. The advantages of silicon atoms as a powerful radiator and a good oxygen getter have been proved. An outstanding merit of rf siliconization to superconducting devices is its fast recovery after a serious degradation of the condition due to the leakage of air to good wall conditions. A wider stable operation region has been obtained and plasma performance is improved immediately after each siliconization due to significant reduction of impurities. Energy confinement time increases more than 50% and particle confinement time increases by a factor of 2. The lifetime of the silicon film is more than 400 standard ohmic heated plasma discharges. Simulation shows that the confinement improvement is due to the reduction of the electron thermal diffusivity in the outer region of the plasma

  10. Integrating nanosphere lithography in device fabrication

    Science.gov (United States)

    Laurvick, Tod V.; Coutu, Ronald A.; Lake, Robert A.

    2016-03-01

    This paper discusses the integration of nanosphere lithography (NSL) with other fabrication techniques, allowing for nano-scaled features to be realized within larger microelectromechanical system (MEMS) based devices. Nanosphere self-patterning methods have been researched for over three decades, but typically not for use as a lithography process. Only recently has progress been made towards integrating many of the best practices from these publications and determining a process that yields large areas of coverage, with repeatability and enabled a process for precise placement of nanospheres relative to other features. Discussed are two of the more common self-patterning methods used in NSL (i.e. spin-coating and dip coating) as well as a more recently conceived variation of dip coating. Recent work has suggested the repeatability of any method depends on a number of variables, so to better understand how these variables affect the process a series of test vessels were developed and fabricated. Commercially available 3-D printing technology was used to incrementally alter the test vessels allowing for each variable to be investigated individually. With these deposition vessels, NSL can now be used in conjunction with other fabrication steps to integrate features otherwise unattainable through current methods, within the overall fabrication process of larger MEMS devices. Patterned regions in 1800 series photoresist with a thickness of ~700nm are used to capture regions of self-assembled nanospheres. These regions are roughly 2-5 microns in width, and are able to control the placement of 500nm polystyrene spheres by controlling where monolayer self-assembly occurs. The resulting combination of photoresist and nanospheres can then be used with traditional deposition or etch methods to utilize these fine scale features in the overall design.

  11. The design and investigation of hybrid ferromagnetic/silicon spin electronic devices

    International Nuclear Information System (INIS)

    Pugh, D.I.

    2001-01-01

    The focus of this study concerns the design and investigation of ferromagnetic/silicon hybrid spin electronic devices as part of a wider project to design a novel spin valve transistor. The key issue to obtain a room temperature spin electronic device is the electrical injection of a spin polarised current from a ferromagnetic contact into a semiconductor. Despite many attempts concentrating on GaAs and InAs only small (< 1%) effects have been observed, making it difficult to confirm spin injection. Lateral devices were designed and fabricated using standard device fabrication procedures to produce arrays of Co/Si/So junctions. Subsequent designs aimed to reduce the number of junctions and improve device isolation. Evidence for spin dependent MR of up to 0.56% was observed in Co/p-Si/Co junctions with silicon gaps up to 16 μm in length. The maximum MR was observed when the first Co/Si Schottky barrier was reverse biased forming a high resistance interface. Vertical devices were designed in an attempt to eliminate any alternative current paths by using a well defined, 1 μm thick silicon membrane. Despite attempts to include oxide barriers, no spin dependent MR was observed in these devices. However, a novel vertical silicon based design has been made which should facilitate further advanced studies of spin injection and transport. The spin diffusion length in n-type silicon has been calculated as a function of doping concentration and temperature by considering the spin relaxation mechanisms in the semiconductor. Discussion has been made concerning p-type silicon and comparisons made with GaAs, indicating that n-Si should show longer spin diffusion lengths. The key design criteria for designing room temperature spin electronic devices have been highlighted. These include the use of a high leakage Schottky barrier or tunnel barrier between the ferromagnet and p-Si and a contact to the silicon to enable appropriate biasing to each FM/Si interface. (author)

  12. Off-axis electron holography for the measurement of active dopants in silicon semiconductor devices

    International Nuclear Information System (INIS)

    Cooper, David

    2016-01-01

    There is a need in the semiconductor industry for a dopant profiling technique with nm-scale resolution. Here we demonstrate that off-axis electron holography can be used to provide maps of the electrostatic potential in semiconductor devices with nm-scale resolution. In this paper we will discuss issues regarding the spatial resolution and precision of the technique. Then we will discuss problems with specimen preparation and how this affects the accuracy of the measurements of the potentials. Finally we show results from experimental off-axis electron holography applied to nMOS and pMOS CMOS devices grown on bulk silicon and silicon- on-insulator type devices and present solutions to common problems that are encountered when examining these types of devices. (paper)

  13. Silicon Carbide Power Device Performance Under Heavy-Ion Irradiation

    Science.gov (United States)

    Lauenstein, Jean-Marie; Casey, Megan; Topper, Alyson; Wilcox, Edward; Phan, Anthony; Ikpe, Stanley; LaBel, Ken

    2015-01-01

    Heavy-ion induced degradation and catastrophic failure data for SiC power MOSFETs and Schottky diodes are examined to provide insight into the challenge of single-event effect hardening of SiC power devices.

  14. Solid state MEMS devices on flexible and semi-transparent silicon (100) platform

    KAUST Repository

    Ahmed, Sally; Hussain, Aftab M.; Rojas, Jhonathan Prieto; Hussain, Muhammad Mustafa

    2014-01-01

    We report fabrication of MEMS thermal actuators on flexible and semi-transparent silicon fabric released from bulk silicon (100). We fabricated the devices first and then released the top portion of the silicon (≈ 19 μm) which is flexible and semi-transparent. We also performed chemical mechanical polishing to reuse the remaining wafer. A tested thermal actuator with 3 μm wide 240 μm hot arm and 10 μm wide 185 μm long cold arm deflected by 1.7 μm at 1 V. The fabricated thermal actuators exhibit similar performance before and after bending. We believe the demonstrated process will expand the horizon of flexible electronics into MEMS world devices. © 2014 IEEE.

  15. The use of silicon devices (diodes, RAMs, etc.) for alpha particle detection

    International Nuclear Information System (INIS)

    Agosteo, S.; Foglio Para, A.

    1993-01-01

    Silicon electronic devices (diodes, random access memories (RAMs), etc.) can be employed in alpha particle detection and spectroscopy with a good energy resolution. The detection mechanisms are first discussed; the performances of these devices operating in the pulse and in the current mode are then described starting from the pioneering works of the last decade. Some peculiar applications of RAMs are finally reported. (author). 7 refs, 5 figs, 1 tab

  16. Thin film silicon by a microwave plasma deposition technique: Growth and devices, and, interface effects in amorphous silicon/crystalline silicon solar cells

    Science.gov (United States)

    Jagannathan, Basanth

    Thin film silicon (Si) was deposited by a microwave plasma CVD technique, employing double dilution of silane, for the growth of low hydrogen content Si films with a controllable microstructure on amorphous substrates at low temperatures (prepared by this technique. Such films showed a dark conductivity ˜10sp{-6} S/cm, with a conduction activation energy of 0.49 eV. Film growth and properties have been compared for deposition in Ar and He carrier systems and growth models have been proposed. Low temperature junction formation by undoped thin film silicon was examined through a thin film silicon/p-type crystalline silicon heterojunctions. The thin film silicon layers were deposited by rf glow discharge, dc magnetron sputtering and microwave plasma CVD. The hetero-interface was identified by current transport analysis and high frequency capacitance methods as the key parameter controlling the photovoltaic (PV) response. The effect of the interface on the device properties (PV, junction, and carrier transport) was examined with respect to modifications created by chemical treatment, type of plasma species, their energy and film microstructure interacting with the substrate. Thermally stimulated capacitance was used to determine the interfacial trap parameters. Plasma deposition of thin film silicon on chemically clean c-Si created electron trapping sites while hole traps were seen when a thin oxide was present at the interface. Under optimized conditions, a 10.6% efficient cell (11.5% with SiOsb2 A/R) with an open circuit voltage of 0.55 volts and a short circuit current density of 30 mA/cmsp2 was fabricated.

  17. All-(111) surface silicon nanowire field effect transistor devices: Effects of surface preparations

    NARCIS (Netherlands)

    Masood, M.N.; Carlen, Edwin; van den Berg, Albert

    2014-01-01

    Etching/hydrogen termination of All-(111) surface silicon nanowire field effect (SiNW-FET) devices developed by conventional photolithography and plane dependent wet etchings is studied with X-ray photoelectron spectroscopy (XPS), scanning electron microscopy (SEM), atomic force microscopy (AFM) and

  18. MEMS monocrystalline-silicon based thermal devices for chemical and microfluidic applications

    NARCIS (Netherlands)

    Mihailovic, M.

    2011-01-01

    This thesis explores the employment of monocrystalline silicon in microsystems as an active material for different thermal functions, such as heat generation and heat transfer by conduction. In chapter 1 applications that need thermal micro devices, micro heaters and micro heat exchangers, are

  19. Device physics underlying silicon heterojunction and passivating-contact solar cells: A topical review

    KAUST Repository

    Chavali, Raghu V. K.

    2018-01-15

    The device physics of commercially dominant diffused-junction silicon solar cells is well understood, allowing sophisticated optimization of this class of devices. Recently, so-called passivating-contact solar cell technologies have become prominent, with Kaneka setting the world\\'s silicon solar cell efficiency record of 26.63% using silicon heterojunction contacts in an interdigitated configuration. Although passivating-contact solar cells are remarkably efficient, their underlying device physics is not yet completely understood, not in the least because they are constructed from diverse materials that may introduce electronic barriers in the current flow. To bridge this gap in understanding, we explore the device physics of passivating contact silicon heterojunction (SHJ) solar cells. Here, we identify the key properties of heterojunctions that affect cell efficiency, analyze the dependence of key heterojunction properties on carrier transport under light and dark conditions, provide a self-consistent multiprobe approach to extract heterojunction parameters using several characterization techniques (including dark J-V, light J-V, C-V, admittance spectroscopy, and Suns-Voc), propose design guidelines to address bottlenecks in energy production in SHJ cells, and develop a process-to-module modeling framework to establish the module\\'s performance limits. We expect that our proposed guidelines resulting from this multiscale and self-consistent framework will improve the performance of future SHJ cells as well as other passivating contact-based solar cells.

  20. Gigascale Silicon Photonic Transmitters Integrating HBT-based Carrier-injection Electroabsorption Modulator Structures

    Science.gov (United States)

    Fu, Enjin

    Demand for more bandwidth is rapidly increasing, which is driven by data intensive applications such as high-definition (HD) video streaming, cloud storage, and terascale computing applications. Next-generation high-performance computing systems require power efficient chip-to-chip and intra-chip interconnect yielding densities on the order of 1Tbps/cm2. The performance requirements of such system are the driving force behind the development of silicon integrated optical interconnect, providing a cost-effective solution for fully integrated optical interconnect systems on a single substrate. Compared to conventional electrical interconnect, optical interconnects have several advantages, including frequency independent insertion loss resulting in ultra wide bandwidth and link latency reduction. For high-speed optical transmitter modules, the optical modulator is a key component of the optical I/O channel. This thesis presents a silicon integrated optical transmitter module design based on a novel silicon HBT-based carrier injection electroabsorption modulator (EAM), which has the merits of wide optical bandwidth, high speed, low power, low drive voltage, small footprint, and high modulation efficiency. The structure, mechanism, and fabrication of the modulator structure will be discussed which is followed by the electrical modeling of the post-processed modulator device. The design and realization of a 10Gbps monolithic optical transmitter module integrating the driver circuit architecture and the HBT-based EAM device in a 130nm BiCMOS process is discussed. For high power efficiency, a 6Gbps ultra-low power driver IC implemented in a 130nm BiCMOS process is presented. The driver IC incorporates an integrated 27-1 pseudo-random bit sequence (PRBS) generator for reliable high-speed testing, and a driver circuit featuring digitally-tuned pre-emphasis signal strength. With outstanding drive capability, the driver module can be applied to a wide range of carrier

  1. Porous silicon photonic devices using pulsed anodic etching of lightly doped silicon

    International Nuclear Information System (INIS)

    Escorcia-Garcia, J; Sarracino MartInez, O; Agarwal, V; Gracia-Jimenez, J M

    2009-01-01

    The fabrication of porous silicon photonic structures using lightly doped, p-type, silicon wafers (resistivity: 14-22 Ω cm) by pulsed anodic etching is reported. The optical properties have been found to be strongly dependent on the duty cycle and frequency of the applied current. All the interfaces of the single layered samples were digitally analysed by calculating the mean interface roughness (R m ). The interface roughness was found to be maximum for the sample with direct current. The use of a duty cycle above 50%, in a certain range of frequencies, is found to reduce the interface roughness. The optical properties of some microcavities and rugate filters are investigated from the optimized parameters of the duty cycle and frequency, using the current densities of 10, 90 and 150 mA cm -2 .

  2. A hybrid approach to device integration on a genetic analysis platform

    International Nuclear Information System (INIS)

    Brennan, Des; Justice, John; Aherne, Margaret; Galvin, Paul; Jary, Dorothee; Kurg, Ants; Berik, Evgeny; Macek, Milan

    2012-01-01

    Point-of-care (POC) systems require significant component integration to implement biochemical protocols associated with molecular diagnostic assays. Hybrid platforms where discrete components are combined in a single platform are a suitable approach to integration, where combining multiple device fabrication steps on a single substrate is not possible due to incompatible or costly fabrication steps. We integrate three devices each with a specific system functionality: (i) a silicon electro-wetting-on-dielectric (EWOD) device to move and mix sample and reagent droplets in an oil phase, (ii) a polymer microfluidic chip containing channels and reservoirs and (iii) an aqueous phase glass microarray for fluorescence microarray hybridization detection. The EWOD device offers the possibility of fully integrating on-chip sample preparation using nanolitre sample and reagent volumes. A key challenge is sample transfer from the oil phase EWOD device to the aqueous phase microarray for hybridization detection. The EWOD device, waveguide performance and functionality are maintained during the integration process. An on-chip biochemical protocol for arrayed primer extension (APEX) was implemented for single nucleotide polymorphism (SNiP) analysis. The prepared sample is aspirated from the EWOD oil phase to the aqueous phase microarray for hybridization. A bench-top instrumentation system was also developed around the integrated platform to drive the EWOD electrodes, implement APEX sample heating and image the microarray after hybridization. (paper)

  3. Silicon-based visible and near-infrared optoelectric devices

    Energy Technology Data Exchange (ETDEWEB)

    Mazur, Eric; Carey, James Edward

    2017-10-17

    In one aspect, the present invention provides a silicon photodetector having a surface layer that is doped with sulfur inclusions with an average concentration in a range of about 0.5 atom percent to about 1.5 atom percent. The surface layer forms a diode junction with an underlying portion of the substrate. A plurality of electrical contacts allow application of a reverse bias voltage to the junction in order to facilitate generation of an electrical signal, e.g., a photocurrent, in response to irradiation of the surface layer. The photodetector exhibits a responsivity greater than about 1 A/W for incident wavelengths in a range of about 250 nm to about 1050 nm, and a responsivity greater than about 0.1 A/W for longer wavelengths, e.g., up to about 3.5 microns.

  4. 3D silicon neural probe with integrated optical fibers for optogenetic modulation.

    Science.gov (United States)

    Kim, Eric G R; Tu, Hongen; Luo, Hao; Liu, Bin; Bao, Shaowen; Zhang, Jinsheng; Xu, Yong

    2015-07-21

    Optogenetics is a powerful modality for neural modulation that can be useful for a wide array of biomedical studies. Penetrating microelectrode arrays provide a means of recording neural signals with high spatial resolution. It is highly desirable to integrate optics with neural probes to allow for functional study of neural tissue by optogenetics. In this paper, we report the development of a novel 3D neural probe coupled simply and robustly to optical fibers using a hollow parylene tube structure. The device shanks are hollow tubes with rigid silicon tips, allowing the insertion and encasement of optical fibers within the shanks. The position of the fiber tip can be precisely controlled relative to the electrodes on the shank by inherent design features. Preliminary in vivo rat studies indicate that these devices are capable of optogenetic modulation simultaneously with 3D neural signal recording.

  5. Asymmetric band offsets in silicon heterojunction solar cells: Impact on device performance

    Energy Technology Data Exchange (ETDEWEB)

    Seif, Johannes Peter, E-mail: johannes.seif@alumni.epfl.ch; Ballif, Christophe; De Wolf, Stefaan [Photovoltaics and Thin-Film Electronics Laboratory, Institute of Microengineering (IMT), Ecole Polytechnique Fédérale de Lausanne (EPFL), Rue de la Maladière 71b, CH-2002 Neuchâtel (Switzerland); Menda, Deneb; Özdemir, Orhan [Department of Physics, Yıldız Technical University, Davutpasa Campus, TR-34210 Esenler, Istanbul (Turkey); Descoeudres, Antoine; Barraud, Loris [CSEM, PV-Center, Jaquet-Droz 1, CH-2002 Neuchâtel (Switzerland)

    2016-08-07

    Amorphous/crystalline silicon interfaces feature considerably larger valence than conduction band offsets. In this article, we analyze the impact of such band offset asymmetry on the performance of silicon heterojunction solar cells. To this end, we use silicon suboxides as passivation layers—inserted between substrate and (front or rear) contacts—since such layers enable intentionally exacerbated band-offset asymmetry. Investigating all topologically possible passivation layer permutations and focussing on light and dark current-voltage characteristics, we confirm that to avoid fill factor losses, wider-bandgap silicon oxide films (of at least several nanometer thin) should be avoided in hole-collecting contacts. As a consequence, device implementation of such films as window layers—without degraded carrier collection—demands electron collection at the front and hole collection at the rear. Furthermore, at elevated operating temperatures, once possible carrier transport barriers are overcome by thermionic (field) emission, the device performance is mainly dictated by the passivation of its surfaces. In this context, compared to the standard amorphous silicon layers, the wide-bandgap oxide layers applied here passivate remarkably better at these temperatures, which may represent an additional benefit under practical operation conditions.

  6. Synthesis of silicon nanocomposite for printable photovoltaic devices on flexible substrate

    Science.gov (United States)

    Odo, E. A.; Faremi, A. A.

    2017-06-01

    Renewed interest has been established in the preparation of silicon nanoparticles for electronic device applications. In this work, we report on the production of silicon powders using a simple ball mill and of silicon nanocomposite ink for screen-printable photovoltaic device on a flexible substrate. Bulk single crystalline silicon was milled for 25 h in the ball mill. The structural properties of the produced silicon nanoparticles were investigated using X-ray diffraction (XRD) and transmission electron microscopy. The results show that the particles remained highly crystalline, though transformed from their original single crystalline state to polycrystalline. The elemental composition using energy dispersive X-ray florescence spectroscopy (EDXRF) revealed that contamination from iron (Fe) and chromium (Cr) of the milling media and oxygen from the atmosphere were insignificant. The size distribution of the nanoparticles follows a lognormal pattern that ranges from 60 nm to about 1.2 μm and a mean particle size of about 103 nm. Electrical characterization of screen-printed PN structures of the nanocomposite formed by embedding the powder into a suitable water-soluble polymer on Kapton sheet reveals an enhanced photocurrent transport resulting from photo-induced carrier generation in the depletion region with energy greater that the Schottky barrier height at the metal-composite interface.

  7. Copper oxide/N-silicon heterojunction photovoltaic device

    Science.gov (United States)

    Feng, Tom; Ghosh, Amal K.

    1982-01-01

    A photovoltaic device having characteristics of a high efficiency solar cell comprising a Cu.sub.x O/n-Si heterojunction. The Cu.sub.x O layer is formed by heating a deposited copper layer in an oxygen containing ambient.

  8. Few-electron Qubits in Silicon Quantum Electronic Devices

    Science.gov (United States)

    2014-09-01

    Calculation of the charge relaxation time T1 . . . . . . . . . . . . . . 63 5.1 The absence of spin blockade in dual-gated DQD devices . . . . . . . 70...2013. 98 115 [102] M. Pioro-Ladrière, T. Obata, Y. Tokura, Y.-S. Shin, T. Kubo , K. Yoshida, T. Taniyama, and S. Tarucha. Nat. Phys., 4:776–779

  9. Synthesis of silicon nanocrystals in silane plasmas for nanoelectronics and large area electronic devices

    International Nuclear Information System (INIS)

    Roca i Cabarrocas, P; Nguyen-Tran, Th; Djeridane, Y; Abramov, A; Johnson, E; Patriarche, G

    2007-01-01

    The synthesis of silicon nanocrystals in standard radio-frequency glow discharge systems is studied with respect to two main objectives: (i) the production of devices based on quantum size effects associated with the small dimensions of silicon nanocrystals and (ii) the synthesis of polymorphous and polycrystalline silicon films in which silicon nanocrystals are the elementary building blocks. In particular we discuss results on the mechanisms of nanocrystal formation and their transport towards the substrate. We found that silicon nanocrystals can contribute to a significant fraction of deposition (50-70%) and that they can be positively charged. This has a strong influence on their deposition because positively charged nanocrystals will be accelerated towards the substrate with energy of the order of the plasma potential. However, the important parameter with respect to the deposition of charged nanocrystals is not the accelerating voltage but the energy per atom and thus a doubling of the diameter will result in a decrease in the energy per atom by a factor of 8. To leverage this geometrical advantage we propose the use of more electronegative gases, which may have a strong effect on the size and charge distribution of the nanocrystals. This is illustrated in the case of deposition from silicon tetrafluoride plasmas in which we observe low-frequency plasma fluctuations, associated with successive generations of nanocrystals. The contribution of larger nanocrystals to deposition results in a lower energy per deposited atom and thus polycrystalline films

  10. Radiation Hardness tests with neutron flux on different Silicon photomultiplier devices

    Science.gov (United States)

    Cattaneo, P. W.; Cervi, T.; Menegolli, A.; Oddone, M.; Prata, M.; Prata, M. C.; Rossella, M.

    2017-07-01

    Radiation hardness is an important requirement for solid state readout devices operating in high radiation environments common in particle physics experiments. The MEG II experiment, at PSI, Switzerland, investigates the forbidden decay μ+ → e+ γ. Exploiting the most intense muon beam of the world. A significant flux of non-thermal neutrons (kinetic energy Ek>= 0.5 MeV) is present in the experimental hall produced along the beam-line and in the hall itself. We present the effects of neutron fluxes comparable to the MEG II expected doses on several Silicon Photomultiplier (SiPMs). The tested models are: AdvanSiD ASD-NUV3S-P50 (used in MEG II experiment), AdvanSiD ASD-NUV3S-P40, AdvanSiD ASD-RGB3S-P40, Hamamatsu and Excelitas C30742-33-050-X. The neutron source is the thermal Sub-critical Multiplication complex (SM1) moderated with water, located at the University of Pavia (Italy). We report the change of SiPMs most important electric parameters: dark current, dark pulse frequency, gain, direct bias resistance, as a function of the integrated neutron fluency.

  11. Silicon photonic integrated circuits with electrically programmable non-volatile memory functions.

    Science.gov (United States)

    Song, J-F; Lim, A E-J; Luo, X-S; Fang, Q; Li, C; Jia, L X; Tu, X-G; Huang, Y; Zhou, H-F; Liow, T-Y; Lo, G-Q

    2016-09-19

    Conventional silicon photonic integrated circuits do not normally possess memory functions, which require on-chip power in order to maintain circuit states in tuned or field-configured switching routes. In this context, we present an electrically programmable add/drop microring resonator with a wavelength shift of 426 pm between the ON/OFF states. Electrical pulses are used to control the choice of the state. Our experimental results show a wavelength shift of 2.8 pm/ms and a light intensity variation of ~0.12 dB/ms for a fixed wavelength in the OFF state. Theoretically, our device can accommodate up to 65 states of multi-level memory functions. Such memory functions can be integrated into wavelength division mutiplexing (WDM) filters and applied to optical routers and computing architectures fulfilling large data downloading demands.

  12. Gamma non-ionizing energy loss: Comparison with the damage factor in silicon devices

    Science.gov (United States)

    El Allam, E.; Inguimbert, C.; Meulenberg, A.; Jorio, A.; Zorkani, I.

    2018-03-01

    The concept of non-ionizing energy loss (NIEL) has been demonstrated to be a successful approach to describe the displacement damage effects in silicon materials and devices. However, some discrepancies exist in the literature between experimental damage factors and theoretical NIELs. 60Co gamma rays having a low NIEL are an interesting particle source that can be used to validate the NIEL scaling approach. This paper presents different 60Co gamma ray NIEL values for silicon targets. They are compared with the radiation-induced increase in the thermal generation rate of carriers per unit fluence. The differences between the different models, including one using molecular dynamics, are discussed.

  13. Silicon microelectronic field-emissive devices for advanced display technology

    Science.gov (United States)

    Morse, J. D.

    1993-03-01

    Field-emission displays (FED's) offer the potential advantages of high luminous efficiency, low power consumption, and low cost compared to AMLCD or CRT technologies. An LLNL team has developed silicon-point field emitters for vacuum triode structures and has also used thin-film processing techniques to demonstrate planar edge-emitter configurations. LLNL is interested in contributing its experience in this and other FED-related technologies to collaborations for commercial FED development. At LLNL, FED development is supported by computational capabilities in charge transport and surface/interface modeling in order to develop smaller, low-work-function field emitters using a variety of materials and coatings. Thin-film processing, microfabrication, and diagnostic/test labs permit experimental exploration of emitter and resistor structures. High field standoff technology is an area of long-standing expertise that guides development of low-cost spacers for FEDS. Vacuum sealing facilities are available to complete the FED production engineering process. Drivers constitute a significant fraction of the cost of any flat-panel display. LLNL has an advanced packaging group that can provide chip-on-glass technologies and three-dimensional interconnect generation permitting driver placement on either the front or the back of the display substrate.

  14. Spin Coherence in Silicon-based Quantum Structures and Devices

    Science.gov (United States)

    2017-08-31

    Using electron spin resonance (ESR) to measure the den- sity of shallow traps, we find that the two sets of devices are nearly identical , indicating...experiments which cannot utilize a clock transition or a field-cancelling decoherence-free subspace. Our approach was to lock the microwave source driving...the electron spins to a strong nuclear spin signal. In our initial experiments we locked to the proton signal in a water cell. However, the noise in

  15. Monolithic integration of optical waveguides for absorbance detection in microfabricated electrophoresis devices

    DEFF Research Database (Denmark)

    Mogensen, Klaus Bo; Petersen, Nickolaj Jacob; Hübner, Jörg

    2001-01-01

    . The waveguides on the device were connected to optical fibers, which enabled alignment free operation due to the absence of free-space optics. A 750 mum long U-shaped detection cell was used to facilitate longitudinal absorption detection. To minimize geometrically induced band broadening at the turn in the U......The fabrication and performance of an electrophoretic separation chip with integrated of optical waveguides for absorption detection is presented. The device was fabricated on a silicon substrate by standard microfabrication techniques with the use of two photolithographic mask steps...

  16. Roadmap for integration of InP based photonics and silicon electronics

    NARCIS (Netherlands)

    Williams, K.A.

    2015-01-01

    We identify the synergies and a roadmap for the intimate integration of InP photonic integrated circuits and Silicon electronic ICs using wafer-scale processes. Advantages are foreseen in terms of bandwidth, energy savings and package simplification.

  17. Magneto-Optical Thin Films for On-Chip Monolithic Integration of Non-Reciprocal Photonic Devices.

    Science.gov (United States)

    Bi, Lei; Hu, Juejun; Jiang, Peng; Kim, Hyun Suk; Kim, Dong Hun; Onbasli, Mehmet Cengiz; Dionne, Gerald F; Ross, Caroline A

    2013-11-08

    Achieving monolithic integration of nonreciprocal photonic devices on semiconductor substrates has been long sought by the photonics research society. One way to achieve this goal is to deposit high quality magneto-optical oxide thin films on a semiconductor substrate. In this paper, we review our recent research activity on magneto-optical oxide thin films toward the goal of monolithic integration of nonreciprocal photonic devices on silicon. We demonstrate high Faraday rotation at telecommunication wavelengths in several novel magnetooptical oxide thin films including Co substituted CeO₂ -δ , Co- or Fe-substituted SrTiO 3- δ , as well as polycrystalline garnets on silicon. Figures of merit of 3~4 deg/dB and 21 deg/dB are achieved in epitaxial Sr(Ti 0.2 Ga 0.4 Fe 0.4 )O 3- δ and polycrystalline (CeY₂)Fe₅O 12 films, respectively. We also demonstrate an optical isolator on silicon, based on a racetrack resonator using polycrystalline (CeY₂)Fe₅O 12 /silicon strip-loaded waveguides. Our work demonstrates that physical vapor deposited magneto-optical oxide thin films on silicon can achieve high Faraday rotation, low optical loss and high magneto-optical figure of merit, therefore enabling novel high-performance non-reciprocal photonic devices monolithically integrated on semiconductor substrates.

  18. Magneto-Optical Thin Films for On-Chip Monolithic Integration of Non-Reciprocal Photonic Devices

    Directory of Open Access Journals (Sweden)

    Mehmet Cengiz Onbasli

    2013-11-01

    Full Text Available Achieving monolithic integration of nonreciprocal photonic devices on semiconductor substrates has been long sought by the photonics research society. One way to achieve this goal is to deposit high quality magneto-optical oxide thin films on a semiconductor substrate. In this paper, we review our recent research activity on magneto-optical oxide thin films toward the goal of monolithic integration of nonreciprocal photonic devices on silicon. We demonstrate high Faraday rotation at telecommunication wavelengths in several novel magnetooptical oxide thin films including Co substituted CeO2−δ, Co- or Fe-substituted SrTiO3−δ, as well as polycrystalline garnets on silicon. Figures of merit of 3~4 deg/dB and 21 deg/dB are achieved in epitaxial Sr(Ti0.2Ga0.4Fe0.4O3−δ and polycrystalline (CeY2Fe5O12 films, respectively. We also demonstrate an optical isolator on silicon, based on a racetrack resonator using polycrystalline (CeY2Fe5O12/silicon strip-loaded waveguides. Our work demonstrates that physical vapor deposited magneto-optical oxide thin films on silicon can achieve high Faraday rotation, low optical loss and high magneto-optical figure of merit, therefore enabling novel high-performance non-reciprocal photonic devices monolithically integrated on semiconductor substrates.

  19. Fundamentals of silicon carbide technology growth, characterization, devices and applications

    CERN Document Server

    Kimoto, Tsunenobu

    2014-01-01

    A comprehensive introduction and up-to-date reference to SiC power semiconductor devices covering topics from material properties to applicationsBased on a number of breakthroughs in SiC material science and fabrication technology in the 1980s and 1990s, the first SiC Schottky barrier diodes (SBDs) were released as commercial products in 2001.  The SiC SBD market has grown significantly since that time, and SBDs are now used in a variety of power systems, particularly switch-mode power supplies and motor controls.  SiC power MOSFETs entered commercial production in 2011, providing rugged, hig

  20. Strategies for doped nanocrystalline silicon integration in silicon heterojunction solar cells

    Czech Academy of Sciences Publication Activity Database

    Seif, J.; Descoeudres, A.; Nogay, G.; Hänni, S.; de Nicolas, S.M.; Holm, N.; Geissbühler, J.; Hessler-Wyser, A.; Duchamp, M.; Dunin-Borkowski, R.E.; Ledinský, Martin; De Wolf, S.; Ballif, C.

    2016-01-01

    Roč. 6, č. 5 (2016), s. 1132-1140 ISSN 2156-3381 R&D Projects: GA MŠk LM2015087 Institutional support: RVO:68378271 Keywords : microcrystalline silicon * nanocrystalline silicon * silicon heterojunctions (SHJs) * solar cells Subject RIV: BM - Solid Matter Physics ; Magnetism Impact factor: 3.712, year: 2016

  1. Electrical parameters of silicon on sapphire; influence on aluminium gate MOS devices performances

    International Nuclear Information System (INIS)

    Suat, J.P.; Borel, J.

    1976-01-01

    The question is the quality level of the substrate obtained with MOS technologies on silicon on an insulating substrate. Experimental results are presented on the main electrical parameters of MOS transistors made on silicon on sapphire, e.g. mean values and spreads of: threhold voltage and surface mobilities of transistors, breakdown voltages, and leakage currents of diodes. These devices have been made in three different technologies: enhancement P. channel technology, depletion-enhancement P. channel technology, and complementary MOS technology. These technologies are all aluminium gate processes with standard design rules and 5μm channel length. Measurements show that presently available silicon on sapphire can be considered as a very suitable substrate for many MOS digital applications (but not for dynamic circuits) [fr

  2. A silicon-on-insulator vertical nanogap device for electrical transport measurements in aqueous electrolyte solution

    Energy Technology Data Exchange (ETDEWEB)

    Strobel, Sebastian [Walter Schottky Institut, Technische Universitaet Muenchen, Am Coulombwall, D-85748 Garching (Germany); Arinaga, Kenji [Walter Schottky Institut, Technische Universitaet Muenchen, Am Coulombwall, D-85748 Garching (Germany); Hansen, Allan [Walter Schottky Institut, Technische Universitaet Muenchen, Am Coulombwall, D-85748 Garching (Germany); Tornow, Marc [Walter Schottky Institut, Technische Universitaet Muenchen, Am Coulombwall, D-85748 Garching (Germany)

    2007-07-25

    A novel concept for metal electrodes with few 10 nm separation for electrical conductance measurements in an aqueous electrolyte environment is presented. Silicon-on-insulator (SOI) material with 10 nm buried silicon dioxide serves as a base substrate for the formation of SOI plateau structures which, after recess-etching the thin oxide layer, thermal oxidation and subsequent metal thin film evaporation, feature vertically oriented nanogap electrodes at their exposed sidewalls. During fabrication only standard silicon process technology without any high-resolution nanolithographic techniques is employed. The vertical concept allows an array-like parallel processing of many individual devices on the same substrate chip. As analysed by cross-sectional TEM analysis the devices exhibit a well-defined material layer architecture, determined by the chosen material thicknesses and process parameters. To investigate the device in aqueous solution, we passivated the sample surface by a polymer layer, leaving a micrometre-size fluid access window to the nanogap region only. First current-voltage characteristics of a 65 nm gap device measured in 60 mM buffer solution reveal excellent electrical isolation behaviour which suggests applications in the field of biomolecular electronics in a natural environment.

  3. Fabrication of integrated metallic MEMS devices

    DEFF Research Database (Denmark)

    Yalcinkaya, Arda Deniz; Ravnkilde, Jan Tue; Hansen, Ole

    2002-01-01

    A simple and complementary metal oxide semiconductor (CMOS) compatible fabrication technique for microelectromechanical (MEMS) devices is presented. The fabrication technology makes use of electroplated metal layers. Among the fabricated devices, high quality factor microresonators are characteri......A simple and complementary metal oxide semiconductor (CMOS) compatible fabrication technique for microelectromechanical (MEMS) devices is presented. The fabrication technology makes use of electroplated metal layers. Among the fabricated devices, high quality factor microresonators...

  4. Ferroelectric and piezoelectric properties of epitaxial PZT films and devices on silicon

    NARCIS (Netherlands)

    Nguyen, Duc Minh

    2010-01-01

    In this thesis, the integration of lead zirconate titanate Pb(Zr,Ti)O3 (PZT) thin films into piezoelectric microelectromechanical systems (MEMS) based on silicon is studied. In these structures, all epitaxial oxide layers (thin film/electrode/buffer-layer(s)) were deposited by pulsed laser

  5. Device physics of hydrogenated amorphous silicon solar cells

    Science.gov (United States)

    Liang, Jianjun

    This dissertation reports measurements on and modeling of hydrogenated amorphous silicon (a-Si:H) nip solar cells. Cells with thicknesses from 200-900 nm were prepared at United Solar Ovonic LLC. The current density-voltage (J-V) relations were measured under laser illumination (685 nm wavelength, up to 200 mW/cm2) over the temperature range 240 K--350 K. The changes in the cells' open-circuit voltage during extended laser illumination (light-soaking) were measured, as were the cell properties in several light-soaked states. The J-V properties of cells in their as-deposited and light-soaked states converge at low-temperatures. Electromodulation spectra for the cells were also measured over the range 240 K--350 K to determine the temperature-dependent bandgap. These experimental results were compared to computer calculations of J-V relations using the AMPS ((c)Pennsylvania State University) computer code. Bandtail parameters (for electron and hole mobility and recombination) were consistent with published drift-mobility and transient photocurrent measurements on a-Si:H. The open-circuit voltage and power density measurements on as-deposited cells, as a function of temperature and thickness, were predicted well. The calculations support a general "hole mobility limited" approach to analyzing a-Si:H solar cells, and indicate that the doped electrode layers, the as-deposited density of dangling bonds, and the electron mobility are of secondary importance to as-deposited cells. For light-soaked a-Si:H solar cells, incorporation of a density of dangling bonds in the computer calculations accounted satisfactorily for the power and open-circuit voltage measurements, including the low-temperature convergence effect. The calculations indicate that, in the light-soaked state at room-temperature, electron recombination is split nearly evenly between holes trapped in the valence bandtail and holes trapped on dangling bonds. The result supports Stutzmann, Jackson, and Tsai

  6. Silicon on ferroelectic insulator field effect transistor (SOF-FET) a new device for the next generation ultra low power circuits

    Science.gov (United States)

    Es-Sakhi, Azzedin D.

    Field effect transistors (FETs) are the foundation for all electronic circuits and processors. These devices have progressed massively to touch its final steps in sub-nanometer level. Left and right proposals are coming to rescue this progress. Emerging nano-electronic devices (resonant tunneling devices, single-atom transistors, spin devices, Heterojunction Transistors rapid flux quantum devices, carbon nanotubes, and nanowire devices) took a vast share of current scientific research. Non-Si electronic materials like III-V heterostructure, ferroelectric, carbon nanotubes (CNTs), and other nanowire based designs are in developing stage to become the core technology of non-classical CMOS structures. FinFET present the current feasible commercial nanotechnology. The scalability and low power dissipation of this device allowed for an extension of silicon based devices. High short channel effect (SCE) immunity presents its major advantage. Multi-gate structure comes to light to improve the gate electrostatic over the channel. The new structure shows a higher performance that made it the first candidate to substitute the conventional MOSFET. The device also shows a future scalability to continue Moor's Law. Furthermore, the device is compatible with silicon fabrication process. Moreover, the ultra-low-power (ULP) design required a subthreshold slope lower than the thermionic-emission limit of 60mV/ decade (KT/q). This value was unbreakable by the new structure (SOI-FinFET). On the other hand most of the previews proposals show the ability to go beyond this limit. However, those pre-mentioned schemes have publicized a very complicated physics, design difficulties, and process non-compatibility. The objective of this research is to discuss various emerging nano-devices proposed for ultra-low-power designs and their possibilities to replace the silicon devices as the core technology in the future integrated circuit. This thesis proposes a novel design that exploits the

  7. Development and characterisation of silicon photomultipliers with bulk-integrated quench resistors for future applications in particle and astroparticle physics

    International Nuclear Information System (INIS)

    Jendrysik, Christian

    2014-01-01

    This thesis deals with the development and characterisation of a novel silicon photomultiplier concept with bulk-integrated quench resistors. The approach allows the realisation of a free entrance window and high fill factors, which leads to an improvement of the detection efficiency. With first prototype productions a proof of concept was possible. A full characterisation provided promising results, in particular with respect to the photon detection efficiency. By customising the simulation tools, a reliable description of the devices was achieved. In addition, conceptual studies of the next device generation demonstrated the possibility of single cell readout, expanding the application range of those detectors to particle tracking.

  8. Micromachined silicon cantilevers with integrated high-frequency magnetoimpedance sensors for simultaneous strain and magnetic field detection

    Science.gov (United States)

    Buettel, G.; Joppich, J.; Hartmann, U.

    2017-12-01

    Giant magnetoimpedance (GMI) measurements in the high-frequency regime utilizing a coplanar waveguide with an integrated Permalloy multilayer and micromachined on a silicon cantilever are reported. The fabrication process is described in detail. The aspect ratio of the magnetic multilayer in the magnetoresistive and magnetostrictive device was varied. Tensile strain and compressive strain were applied. Vector network analyzer measurements in the range from the skin effect to ferromagnetic resonance confirm the technological potential of GMI-based micro-electro-mechanical devices for strain and magnetic field sensing applications. The strain-impedance gauge factor was quantified by finite element strain calculations and reaches a maximum value of almost 200.

  9. Roll-to-roll embedded conductive structures integrated into organic photovoltaic devices

    International Nuclear Information System (INIS)

    Van de Wiel, H J; Galagan, Y; Van Lammeren, T J; De Riet, J F J; Gilot, J; Nagelkerke, M G M; Lelieveld, R H C A T; Shanmugam, S; Pagudala, A; Groen, W A; Hui, D

    2013-01-01

    Highly conductive screen printed metallic (silver) structures (current collecting grids) combined with poly(3,4-ethylenedioxythiophene):poly(styrene sulfonate) (PEDOT:PSS) are a viable replacement for indium tin oxide (ITO) and inkjet printed silver as transparent electrode materials. To provide successful integration into organic photovoltaic (OPV) devices, screen printed silver current collecting grids should be embedded into a substrate to avoid topology issues. In this study micron-thick conductive structures are embedded and integrated into OPV devices. The embedded structures are produced roll-to-roll with optimized process settings and materials. Topology measurements show that the embedded grids are well suited for integration into OPV devices since the surface is almost without spikes and has low surface roughness. JV measurements of OPV devices with embedded structures on a polyethylene terephthalate/silicon nitride (PET/SiN) substrate show an efficiency of 2.15%, which is significantly higher than identical flexible devices with ITO (1.02%) and inkjet printed silver (1.48%). The use of embedded screen printed silver instead of ITO and inkjet printed silver in OPV devices will allow for higher efficiency devices which can be produced with larger design and process freedom. (paper)

  10. Simultaneous optical and electrical modeling of plasmonic light trapping in thin-film amorphous silicon photovoltaic devices

    Science.gov (United States)

    Gandhi, Keyur K.; Nejim, Ahmed; Beliatis, Michail J.; Mills, Christopher A.; Henley, Simon J.; Silva, S. Ravi P.

    2015-01-01

    Rapid prototyping of photovoltaic (PV) cells requires a method for the simultaneous simulation of the optical and electrical characteristics of the device. The development of nanomaterial-enabled PV cells only increases the complexity of such simulations. Here, we use a commercial technology computer aided design (TCAD) software, Silvaco Atlas, to design and model plasmonic gold nanoparticles integrated in optoelectronic device models of thin-film amorphous silicon (a-Si:H) PV cells. Upon illumination with incident light, we simulate the optical and electrical properties of the cell simultaneously and use the simulation to produce current-voltage (J-V) and external quantum efficiency plots. Light trapping due to light scattering and localized surface plasmon resonance interactions by the nanoparticles has resulted in the enhancement of both the optical and electrical properties due to the reduction in the recombination rates in the photoactive layer. We show that the device performance of the modeled plasmonic a-Si:H PV cells depends significantly on the position and size of the gold nanoparticles, which leads to improvements either in optical properties only, or in both optical and electrical properties. The model provides a route to optimize the device architecture by simultaneously optimizing the optical and electrical characteristics, which leads to a detailed understanding of plasmonic PV cells from a design perspective and offers an advanced tool for rapid device prototyping.

  11. Promising silicones modified with cationic biocides for the development of antimicrobial medical devices.

    Science.gov (United States)

    Ghamrawi, Sarah; Bouchara, Jean-Philippe; Tarasyuk, Oksana; Rogalsky, Sergiy; Lyoshina, Lyudmila; Bulko, Olga; Bardeau, Jean-François

    2017-06-01

    We have tested silicones containing 2% or 5% of the cationic biocides polyhexamethylene guanidine dodecylbenzenesulfonate (PHMG-DBS), 1-octyl-3-methylimidazolium tetrafluoroborate (OMIM-BF 4 ) or 1-dodecyl-3-methylimidazolium tetrafluoroborate (DMIM-BF 4 ) against the major relevant bacterial and yeast species in health care-associated infections (HCAI). Study conducted according to the international standard ISO 22196 revealed that silicones containing 2% or 5% DMIM-BF 4 or 5% PHMG-DBS presented the highest antimicrobial activity, leading to a logarithmic growth reduction of 3.03 to 6.46 and 3.65 to 4.85 depending on the bacterial or fungal species. Heat-pretreated silicones containing 2% DMIM-BF 4 kept a high activity, with at least a 3-log reduction in bacterial growth, except against P. aeruginosa where there was only a 1.1-log reduction. After 33days, the release ratio of cationic biocide from silicone films containing 5% of DMIM-BF 4 was found to be 5.6% in pure water and 1.9% in physiological saline solution, respectively. No leaching of PHMG-DBS polymeric biocide was detected under the same conditions. These results demonstrate unambiguously that silicones containing 2% DMIM-BF 4 or 5% PHMG-DBS present high antimicrobial activity, as well as high leaching resistance and therefore may be good candidates for the development of safer medical devices. Copyright © 2017 Elsevier B.V. All rights reserved.

  12. Integrated Photoelectrochemical Solar Energy Conversion and Organic Redox Flow Battery Devices

    KAUST Repository

    Li, Wenjie

    2016-09-21

    Building on regenerative photoelectrochemical solar cells and emerging electrochemical redox flow batteries (RFBs), more efficient, scalable, compact, and cost-effective hybrid energy conversion and storage devices could be realized. An integrated photoelectrochemical solar energy conversion and electrochemical storage device is developed by integrating regenerative silicon solar cells and 9,10-anthraquinone-2,7-disulfonic acid (AQDS)/1,2-benzoquinone-3,5-disulfonic acid (BQDS) RFBs. The device can be directly charged by solar light without external bias, and discharged like normal RFBs with an energy storage density of 1.15 Wh L−1 and a solar-to-output electricity efficiency (SOEE) of 1.7 % over many cycles. The concept exploits a previously undeveloped design connecting two major energy technologies and promises a general approach for storing solar energy electrochemically with high theoretical storage capacity and efficiency.

  13. Integrated Photoelectrochemical Solar Energy Conversion and Organic Redox Flow Battery Devices.

    Science.gov (United States)

    Li, Wenjie; Fu, Hui-Chun; Li, Linsen; Cabán-Acevedo, Miguel; He, Jr-Hau; Jin, Song

    2016-10-10

    Building on regenerative photoelectrochemical solar cells and emerging electrochemical redox flow batteries (RFBs), more efficient, scalable, compact, and cost-effective hybrid energy conversion and storage devices could be realized. An integrated photoelectrochemical solar energy conversion and electrochemical storage device is developed by integrating regenerative silicon solar cells and 9,10-anthraquinone-2,7-disulfonic acid (AQDS)/1,2-benzoquinone-3,5-disulfonic acid (BQDS) RFBs. The device can be directly charged by solar light without external bias, and discharged like normal RFBs with an energy storage density of 1.15 Wh L -1 and a solar-to-output electricity efficiency (SOEE) of 1.7 % over many cycles. The concept exploits a previously undeveloped design connecting two major energy technologies and promises a general approach for storing solar energy electrochemically with high theoretical storage capacity and efficiency. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  14. A silicon integrated micro nano-positioning XY-stage for nano-manipulation

    International Nuclear Information System (INIS)

    Sun Lining; Wang Jiachou; Rong Weibin; Li Xinxin; Bao Haifei

    2008-01-01

    An integrated micro XY-stage with a 2 × 2 mm 2 movable table is designed and fabricated for application in nanometer-scale operation and nanometric positioning precision. The device integrates the functions of both actuating and sensing in a monolithic chip and is mainly composed of a silicon-based XY-stage, comb-drive actuator and a displacement sensor, which are developed by using double-sided bulk-micromachining technology. The high-aspect-ratio comb-driven XY-stage is achieved by deep reactive ion etching (DRIE) on both sides of the wafer. The displacement sensor is formed on four vertical sidewall surface piezoresistors with a full Wheatstone bridge circuit, where a novel fabrication process of a vertical sidewall surface piezoresistor is proposed. Comprehensive design and analysis of the comb actuator, the piezoresistive displacement sensor and the XY-stage are given in full detail, and the experimental results verify the design and fabrication of the device. The final realization of the device shows that the sensitivity of the fabricated piezoresistive sensors is better than 1.17 mV µm −1 without amplification, and the linearity is better than 0.814%. Under 28.5 V driving voltage, a ±10 µm single-axis displacement is measured without crosstalk and the resonant frequency is measured at 983 Hz in air

  15. MIDAS: Automated Approach to Design Microwave Integrated Inductors and Transformers on Silicon

    Directory of Open Access Journals (Sweden)

    L. Aluigi

    2013-09-01

    Full Text Available The design of modern radiofrequency integrated circuits on silicon operating at microwave and millimeter-waves requires the integration of several spiral inductors and transformers that are not commonly available in the process design-kits of the technologies. In this work we present an auxiliary CAD tool for Microwave Inductor (and transformer Design Automation on Silicon (MIDAS that exploits commercial simulators and allows the implementation of an automatic design flow, including three-dimensional layout editing and electromagnetic simulations. In detail, MIDAS allows the designer to derive a preliminary sizing of the inductor (transformer on the bases of the design entries (specifications. It draws the inductor (transformer layers for the specific process design kit, including vias and underpasses, with or without patterned ground shield, and launches the electromagnetic simulations, achieving effective design automation with respect to the traditional design flow for RFICs. With the present software suite the complete design time is reduced significantly (typically 1 hour on a PC based on Intel® Pentium® Dual 1.80GHz CPU with 2-GB RAM. Afterwards both the device equivalent circuit and the layout are ready to be imported in the Cadence environment.

  16. Properties of CMOS devices and circuits fabricated on high-resistivity, detector-grade silicon

    International Nuclear Information System (INIS)

    Holland, S.

    1991-11-01

    A CMOS process that is compatible with silicon p-i-n radiation detectors has been developed and characterized. A total of twelve mask layers are used in the process. The NMOS device is formed in a retrograde well while the PMOS device is fabricated directly in the high-resistivity silicon. Isolation characteristics are similar to a standard foundary CMOS process. Circuit performance using 3 μm design rules has been evaluated. The measured propagation delay and power-delay product for a 51-stage ring oscillator was 1.5 ns and 43 fJ, respectively. Measurements on a simple cascode amplifier results in a gain-bandwidth product of 200 MHz at a bias current of 15 μA. The input-referred noise of the cascode amplifier is 20 nV/√Hz at 1 MHz

  17. The Effects of Thermal Cycling on Gallium Nitride and Silicon Carbide Semiconductor Devices for Aerospace Use

    Science.gov (United States)

    Patterson, Richard L.; Hammoud, Ahmad

    2012-01-01

    Electronics designed for use in NASA space missions are required to work efficiently and reliably under harsh environment conditions. These Include radiation, extreme temperatures, thermal cycling, to name a few. Preliminary data obtained on new Gallium Nitride and Silicon Carbide power devices under exposure to radiation followed by long term thermal cycling are presented. This work was done in collaboration with GSFC and JPL in support of the NASA Electronic Parts and Packaging (NEPP) Program

  18. Integration in design and manufacturing of polymer smart devices

    NARCIS (Netherlands)

    Bolt, P.J.; Zwart, R.M. de; Tacken, R.A.; Rendering, H.

    2009-01-01

    Integration of functions in single components is pursued in order to manufacture smaller and smarter polymer micro devices at less cost, through e.g. less assembly steps. It requires integration on both product and production side. This paper addresses the use of molded interconnect device (MID)

  19. Optimized optical devices for edge-coupling-enabled silicon photonics platform

    Science.gov (United States)

    Png, Ching Eng; Ang, Thomas Y. L.; Ong, Jun Rong; Lim, Soon Thor; Sahin, Ezgi; Chen, G. F. R.; Tan, D. T. H.; Guo, Tina X.; Wang, Hong

    2018-02-01

    We present a library of high-performance passive and active silicon photonic devices at the C-band that is specifically designed and optimized for edge-coupling-enabled silicon photonics platform. These devices meet the broadband (100 nm), low-loss (= 25 Gb/s), and polarization diversity requirements (TE and TM polarization extinction ratio beam splitters (PBSs), and high-speed modulators are some of the devices within our library. In particular, we have designed and fabricated inverse taper fiber-to-waveguide edge couplers of tip widths ranging from 120 nm to 200 nm, and we obtained a low coupling loss of 1.80+/-0.28 dB for 160 nm tip width. To achieve polarization diversity operation for inverse tapers, we have experimentally realized different designs of polarization beam splitters (PBS). Our optimized PBS has a measured extinction ratio of <= 25 dB for both the quasiTE modes, and quasi-TM modes. Additionally, a broadband (100 nm) directional coupler with a 50/50 power splitting ratio was experimentally realized on a small footprint of 20×3 μm2 . Last but not least, high-speed silicon modulators with a range of carrier doping concentrations and offset of the PN junction can be used to optimise the modulation efficiency, and insertion losses for operation at 25 GHz.

  20. Integrated Photonic Devices Incorporating Low-Loss Fluorinated Polymer Materials

    Directory of Open Access Journals (Sweden)

    Hyung-Jong Lee

    2011-06-01

    Full Text Available Low-loss polymer materials incorporating fluorinated compounds have been utilized for the investigation of various functional optical devices useful for optical communication and optical sensor systems. Since reliability issues concerning the polymer device have been resolved, polymeric waveguide devices have been gradually adopted for commercial application systems. The two most successfully commercialized polymeric integrated optic devices, variable optical attenuators and digital optical switches, are reviewed in this paper. Utilizing unique properties of optical polymers which are not available in other optical materials, novel polymeric optical devices are proposed including widely tunable external cavity lasers and integrated optical current sensors.

  1. Electronic spectrum of a deterministic single-donor device in silicon

    International Nuclear Information System (INIS)

    Fuechsle, Martin; Miwa, Jill A.; Mahapatra, Suddhasatta; Simmons, Michelle Y.; Hollenberg, Lloyd C. L.

    2013-01-01

    We report the fabrication of a single-electron transistor (SET) based on an individual phosphorus dopant that is deterministically positioned between the dopant-based electrodes of a transport device in silicon. Electronic characterization at mK-temperatures reveals a charging energy that is very similar to the value expected for isolated P donors in a bulk Si environment. Furthermore, we find indications for bulk-like one-electron excited states in the co-tunneling spectrum of the device, in sharp contrast to previous reports on transport through single dopants

  2. Modeling optical transmissivity of graphene grate in on-chip silicon photonic device

    Directory of Open Access Journals (Sweden)

    Iraj S. Amiri

    2018-06-01

    Full Text Available A three-dimensional (3-D finite-difference-time-domain (FDTD analysis was used to simulate a silicon photonic waveguide. We have calculated power and transmission of the graphene used as single or multilayers to study the light transmission behavior. A new technique has been developed to define the straight silicon waveguide integrated with grate graphene layer. The waveguide has a variable grate spacing to be filled by the graphene layer. The number of graphene atomic layers varies between 100 and 1000 (or 380 nm and 3800 nm, the transmitted power obtained varies as ∼30% and ∼80%. The ∼99%, blocking of the light was occurred in 10,000 (or 38,000 nm atomic layers of the graphene grate. Keywords: Optical waveguide, Silicon waveguide, Grate, Graphene, Optical transmissivity

  3. Influences of Device and Circuit Mismatches on Paralleling Silicon Carbide MOSFETs

    DEFF Research Database (Denmark)

    Li, Helong; Munk-Nielsen, Stig; Wang, Xiongfei

    2016-01-01

    This paper addresses the influences of device and circuit mismatches on paralleling the Silicon Carbide (SiC) MOSFETs. Comprehensive theoretical analysis and experimental validation from paralleled discrete devices to paralleled dies in multichip power modules are first presented. Then, the influ......This paper addresses the influences of device and circuit mismatches on paralleling the Silicon Carbide (SiC) MOSFETs. Comprehensive theoretical analysis and experimental validation from paralleled discrete devices to paralleled dies in multichip power modules are first presented. Then......, the influence of circuit mismatch on paralleling SiC MOSFETs is investigated and experimentally evaluated for the first time. It is found that the mismatch of the switching loop stray inductance can also lead to on-state current unbalance with inductive output current, in addition to the on-state resistance...... of the device. It further reveals that circuit mismatches and a current coupling among the paralleled dies exist in a SiC MOSFET multichip power module, which is critical for the transient current distribution in the power module. Thus, a power module layout with an auxiliary source connection is developed...

  4. Silicon photonics integrated circuits: a manufacturing platform for high density, low power optical I/O's.

    Science.gov (United States)

    Absil, Philippe P; Verheyen, Peter; De Heyn, Peter; Pantouvaki, Marianna; Lepage, Guy; De Coster, Jeroen; Van Campenhout, Joris

    2015-04-06

    Silicon photonics integrated circuits are considered to enable future computing systems with optical input-outputs co-packaged with CMOS chips to circumvent the limitations of electrical interfaces. In this paper we present the recent progress made to enable dense multiplexing by exploiting the integration advantage of silicon photonics integrated circuits. We also discuss the manufacturability of such circuits, a key factor for a wide adoption of this technology.

  5. Silicide/Silicon Heterointerfaces, Reaction Kinetics and Ultra-short Channel Devices

    Science.gov (United States)

    Tang, Wei

    Nickel silicide is one of the electrical contact materials widely used on very large scale integration (VLSI) of Si devices in microelectronic industry. This is because the silicide/silicon interface can be formed in a highly controlled manner to ensure reproducibility of optimal structural and electrical properties of the metal-Si contacts. These advantages can be inherited to Si nanowire (NW) field-effect transistors (FET) device. Due to the technological importance of nickel silicides, fundamental materials science of nickel silicides formation (Ni-Si reaction), especially in nanoscale, has raised wide interest and stimulate new insights and understandings. In this dissertation, in-situ transmission electron microscopy (TEM) in combination with FET device characterization will be demonstrated as useful tools in nano-device fabrication as well as in gaining insights into the process of nickel silicide formation. The shortest transistor channel length (17 nm) fabricated on a vapor-liquid-solid (VLS) grown silicon nanowire (NW) has been demonstrated by controlled reaction with Ni leads on an in-situ transmission electron microscope (TEM) heating stage at a moderate temperature of 400 ºC. NiSi2 is the leading phase, and the silicide-silicon interface is an atomically sharp type-A interface. At such channel lengths, high maximum on-currents of 890 (microA/microm) and a maximum transconductance of 430 (microS/microm) were obtained, which pushes forward the performance of bottom-up Si NW Schottky barrier field-effect transistors (SB-FETs). Through accurate control over the silicidation reaction, we provide a systematic study of channel length dependent carrier transport in a large number of SB-FETs with channel lengths in the range of (17 nm -- 3.6 microm). Our device results corroborate with our transport simulations and reveal a characteristic type of short channel effects in SB-FETs, both in on- and off-state, which is different from that in conventional MOSFETs

  6. Optimization and validation of highly selective microfluidic integrated silicon nanowire chemical sensor

    Science.gov (United States)

    Ehfaed, Nuri. A. K. H.; Bathmanathan, Shillan A. L.; Dhahi, Th S.; Adam, Tijjani; Hashim, Uda; Noriman, N. Z.

    2017-09-01

    The study proposed characterization and optimization of silicon nanosensor for specific detection of heavy metal. The sensor was fabricated in-house and conventional photolithography coupled with size reduction via dry etching process in an oxidation furnace. Prior to heavy metal heavy metal detection, the capability to aqueous sample was determined utilizing serial DI water at various. The sensor surface was surface modified with Organofunctional alkoxysilanes (3-aminopropyl) triethoxysilane (APTES) to create molecular binding chemistry. This has allowed interaction between heavy metals being measured and the sensor component resulting in increasing the current being measured. Due to its, excellent detection capabilities, this sensor was able to identify different group heavy metal species. The device was further integrated with sub-50 µm for chemical delivery.

  7. Impurity engineering of Czochralski silicon used for ultra large-scaled-integrated circuits

    Science.gov (United States)

    Yang, Deren; Chen, Jiahe; Ma, Xiangyang; Que, Duanlin

    2009-01-01

    Impurities in Czochralski silicon (Cz-Si) used for ultra large-scaled-integrated (ULSI) circuits have been believed to deteriorate the performance of devices. In this paper, a review of the recent processes from our investigation on internal gettering in Cz-Si wafers which were doped with nitrogen, germanium and/or high content of carbon is presented. It has been suggested that those impurities enhance oxygen precipitation, and create both denser bulk microdefects and enough denuded zone with the desirable width, which is benefit of the internal gettering of metal contamination. Based on the experimental facts, a potential mechanism of impurity doping on the internal gettering structure is interpreted and, a new concept of 'impurity engineering' for Cz-Si used for ULSI is proposed.

  8. Low-loss compact multilayer silicon nitride platform for 3D photonic integrated circuits.

    Science.gov (United States)

    Shang, Kuanping; Pathak, Shibnath; Guan, Binbin; Liu, Guangyao; Yoo, S J B

    2015-08-10

    We design, fabricate, and demonstrate a silicon nitride (Si(3)N(4)) multilayer platform optimized for low-loss and compact multilayer photonic integrated circuits. The designed platform, with 200 nm thick waveguide core and 700 nm interlayer gap, is compatible for active thermal tuning and applicable to realizing compact photonic devices such as arrayed waveguide gratings (AWGs). We achieve ultra-low loss vertical couplers with 0.01 dB coupling loss, multilayer crossing loss of 0.167 dB at 90° crossing angle, 50 μm bending radius, 100 × 2 μm(2) footprint, lateral misalignment tolerance up to 400 nm, and less than -52 dB interlayer crosstalk at 1550 nm wavelength. Based on the designed platform, we demonstrate a 27 × 32 × 2 multilayer star coupler.

  9. Effect of layer thickness on device response of silicon heavily supersaturated with sulfur

    Energy Technology Data Exchange (ETDEWEB)

    Hutchinson, David [Department of Physics, Applied Physics, and Astronomy, Rensselaer Polytechnic Institute, Troy NY 12180 (United States); Department of Physics and Nuclear Engineering, United States Military Academy, West Point NY 10996 (United States); Mathews, Jay [US Army ARDEC – Benét Laboratories, Watervliet NY 12189 (United States); Department of Physics, University of Dayton, Dayton, OH 45469 (United States); Sullivan, Joseph T.; Buonassisi, Tonio [School of Engineering, Massachusetts Institute of Technology, Cambridge MA 02139 (United States); Akey, Austin [School of Engineering, Massachusetts Institute of Technology, Cambridge MA 02139 (United States); Harvard John A. Paulson School of Engineering and Applied Sciences, Cambridge MA 02138 (United States); Aziz, Michael J. [Harvard John A. Paulson School of Engineering and Applied Sciences, Cambridge MA 02138 (United States); Persans, Peter [Department of Physics, Applied Physics, and Astronomy, Rensselaer Polytechnic Institute, Troy NY 12180 (United States); Warrender, Jeffrey M., E-mail: jwarrend@post.harvard.edu [US Army ARDEC – Benét Laboratories, Watervliet NY 12189 (United States)

    2016-05-15

    We report on a simple experiment in which the thickness of a hyperdoped silicon layer, supersaturated with sulfur by ion implantation followed by pulsed laser melting and rapid solidification, is systematically varied at constant average sulfur concentration, by varying the implantation energy, dose, and laser fluence. Contacts are deposited and the external quantum efficiency (EQE) is measured for visible wavelengths. We posit that the sulfur layer primarily absorbs light but contributes negligible photocurrent, and we seek to support this by analyzing the EQE data for the different layer thicknesses in two interlocking ways. In the first, we use the measured concentration depth profiles to obtain the approximate layer thicknesses, and, for each wavelength, fit the EQE vs. layer thickness curve to obtain the absorption coefficient of hyperdoped silicon for that wavelength. Comparison to literature values for the hyperdoped silicon absorption coefficients [S.H. Pan et al. Applied Physics Letters 98, 121913 (2011)] shows good agreement. Next, we essentially run this process in reverse; we fit with Beer’s law the curves of EQE vs. hyperdoped silicon absorption coefficient for those wavelengths that are primarily absorbed in the hyperdoped silicon layer, and find that the layer thicknesses obtained from the fit are in good agreement with the original values obtained from the depth profiles. We conclude that the data support our interpretation of the hyperdoped silicon layer as providing negligible photocurrent at high S concentrations. This work validates the absorption data of Pan et al. [Applied Physics Letters 98, 121913 (2011)], and is consistent with reports of short mobility-lifetime products in hyperdoped layers. It suggests that for optoelectronic devices containing hyperdoped layers, the most important contribution to the above band gap photoresponse may be due to photons absorbed below the hyperdoped layer.

  10. Effect of layer thickness on device response of silicon heavily supersaturated with sulfur

    Directory of Open Access Journals (Sweden)

    David Hutchinson

    2016-05-01

    Full Text Available We report on a simple experiment in which the thickness of a hyperdoped silicon layer, supersaturated with sulfur by ion implantation followed by pulsed laser melting and rapid solidification, is systematically varied at constant average sulfur concentration, by varying the implantation energy, dose, and laser fluence. Contacts are deposited and the external quantum efficiency (EQE is measured for visible wavelengths. We posit that the sulfur layer primarily absorbs light but contributes negligible photocurrent, and we seek to support this by analyzing the EQE data for the different layer thicknesses in two interlocking ways. In the first, we use the measured concentration depth profiles to obtain the approximate layer thicknesses, and, for each wavelength, fit the EQE vs. layer thickness curve to obtain the absorption coefficient of hyperdoped silicon for that wavelength. Comparison to literature values for the hyperdoped silicon absorption coefficients [S.H. Pan et al. Applied Physics Letters 98, 121913 (2011] shows good agreement. Next, we essentially run this process in reverse; we fit with Beer’s law the curves of EQE vs. hyperdoped silicon absorption coefficient for those wavelengths that are primarily absorbed in the hyperdoped silicon layer, and find that the layer thicknesses obtained from the fit are in good agreement with the original values obtained from the depth profiles. We conclude that the data support our interpretation of the hyperdoped silicon layer as providing negligible photocurrent at high S concentrations. This work validates the absorption data of Pan et al. [Applied Physics Letters 98, 121913 (2011], and is consistent with reports of short mobility-lifetime products in hyperdoped layers. It suggests that for optoelectronic devices containing hyperdoped layers, the most important contribution to the above band gap photoresponse may be due to photons absorbed below the hyperdoped layer.

  11. High-efficiency power transfer for silicon-based photonic devices

    Science.gov (United States)

    Son, Gyeongho; Yu, Kyoungsik

    2018-02-01

    We demonstrate an efficient coupling of guided light of 1550 nm from a standard single-mode optical fiber to a silicon waveguide using the finite-difference time-domain method and propose a fabrication method of tapered optical fibers for efficient power transfer to silicon-based photonic integrated circuits. Adiabatically-varying fiber core diameters with a small tapering angle can be obtained using the tube etching method with hydrofluoric acid and standard single-mode fibers covered by plastic jackets. The optical power transmission of the fundamental HE11 and TE-like modes between the fiber tapers and the inversely-tapered silicon waveguides was calculated with the finite-difference time-domain method to be more than 99% at a wavelength of 1550 nm. The proposed method for adiabatic fiber tapering can be applied in quantum optics, silicon-based photonic integrated circuits, and nanophotonics. Furthermore, efficient coupling within the telecommunication C-band is a promising approach for quantum networks in the future.

  12. Simplified nonplanar wafer bonding for heterogeneous device integration

    Science.gov (United States)

    Geske, Jon; Bowers, John E.; Riley, Anton

    2004-07-01

    We demonstrate a simplified nonplanar wafer bonding technique for heterogeneous device integration. The improved technique can be used to laterally integrate dissimilar semiconductor device structures on a lattice-mismatched substrate. Using the technique, two different InP-based vertical-cavity surface-emitting laser active regions have been integrated onto GaAs without compromising the quality of the photoluminescence. Experimental and numerical simulation results are presented.

  13. Hierarchical modeling of heat transfer in silicon-based electronic devices

    Science.gov (United States)

    Goicochea Pineda, Javier V.

    In this work a methodology for the hierarchical modeling of heat transfer in silicon-based electronic devices is presented. The methodology includes three steps to integrate the different scales involved in the thermal analysis of these devices. The steps correspond to: (i) the estimation of input parameters and thermal properties required to solve the Boltzmann transport equation (BTE) for phonons by means of molecular dynamics (MD) simulations, (ii) the quantum correction of some of the properties estimated with MD to make them suitable for BTE and (iii) the numerical solution of the BTE using the lattice Boltzmann method (LBM) under the single mode relaxation time approximation subject to different initial and boundary conditions, including non-linear dispersion relations and different polarizations in the [100] direction. Each step of the methodology is validated with numerical, analytical or experimental reported data. In the first step of the methodology, properties such as, phonon relaxation times, dispersion relations, group and phase velocities and specific heat are obtained with MD at of 300 and 1000 K (i.e. molecular temperatures). The estimation of the properties considers the anhamonic nature of the potential energy function, including the thermal expansion of the crystal. Both effects are found to modify the dispersion relations with temperature. The behavior of the phonon relaxation times for each mode (i.e. longitudinal and transverse, acoustic and optical phonons) is identified using power functions. The exponents of the acoustic modes are agree with those predicted theoretically perturbation theory at high temperatures, while those for the optical modes are higher. All properties estimated with MD are validated with values for the thermal conductivity obtained from the Green-Kubo method. It is found that the relative contribution of acoustic modes to the overall thermal conductivity is approximately 90% at both temperatures. In the second step

  14. Integrating Sphere-based Weathering Device

    Data.gov (United States)

    Federal Laboratory Consortium — Description:In the artificial ultraviolet (UV) weathering of materials, a need exists for weathering devices that can uniformly illuminate test specimens with a high...

  15. Monolithic nanoscale photonics-electronics integration in silicon and other group IV elements

    CERN Document Server

    Radamson, Henry

    2014-01-01

    Silicon technology is evolving rapidly, particularly in board-to-board or chip-to chip applications. Increasingly, the electronic parts of silicon technology will carry out the data processing, while the photonic parts take care of the data communication. For the first time, this book describes the merging of photonics and electronics in silicon and other group IV elements. It presents the challenges, the limitations, and the upcoming possibilities of these developments. The book describes the evolution of CMOS integrated electronics, status and development, and the fundamentals of silicon p

  16. Flexible semi-transparent silicon (100) fabric with high-k/metal gate devices

    KAUST Repository

    Rojas, Jhonathan Prieto

    2013-01-07

    Can we build a flexible and transparent truly high performance computer? High-k/metal gate stack based metal-oxide-semiconductor capacitor devices are monolithically fabricated on industry\\'s most widely used low-cost bulk single-crystalline silicon (100) wafers and then released as continuous, mechanically flexible, optically semi-transparent and high thermal budget compatible silicon fabric with devices. This is the first ever demonstration with this set of materials which allows full degree of freedom to fabricate nanoelectronics devices using state-of-the-art CMOS compatible processes and then to utilize them in an unprecedented way for wide deployment over nearly any kind of shape and architecture surfaces. Electrical characterization shows uncompromising performance of post release devices. Mechanical characterization shows extra-ordinary flexibility (minimum bending radius of 1 cm) making this generic process attractive to extend the horizon of flexible electronics for truly high performance computers. Schematic and photograph of flexible high-k/metal gate MOSCAPs showing high flexibility and C-V plot showing uncompromised performance. Copyright © 2013 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  17. Nonlinear silicon photonics

    Science.gov (United States)

    Borghi, M.; Castellan, C.; Signorini, S.; Trenti, A.; Pavesi, L.

    2017-09-01

    Silicon photonics is a technology based on fabricating integrated optical circuits by using the same paradigms as the dominant electronics industry. After twenty years of fervid development, silicon photonics is entering the market with low cost, high performance and mass-manufacturable optical devices. Until now, most silicon photonic devices have been based on linear optical effects, despite the many phenomenologies associated with nonlinear optics in both bulk materials and integrated waveguides. Silicon and silicon-based materials have strong optical nonlinearities which are enhanced in integrated devices by the small cross-section of the high-index contrast silicon waveguides or photonic crystals. Here the photons are made to strongly interact with the medium where they propagate. This is the central argument of nonlinear silicon photonics. It is the aim of this review to describe the state-of-the-art in the field. Starting from the basic nonlinearities in a silicon waveguide or in optical resonator geometries, many phenomena and applications are described—including frequency generation, frequency conversion, frequency-comb generation, supercontinuum generation, soliton formation, temporal imaging and time lensing, Raman lasing, and comb spectroscopy. Emerging quantum photonics applications, such as entangled photon sources, heralded single-photon sources and integrated quantum photonic circuits are also addressed at the end of this review.

  18. Silicone metalization

    Energy Technology Data Exchange (ETDEWEB)

    Maghribi, Mariam N. (Livermore, CA); Krulevitch, Peter (Pleasanton, CA); Hamilton, Julie (Tracy, CA)

    2008-12-09

    A system for providing metal features on silicone comprising providing a silicone layer on a matrix and providing a metal layer on the silicone layer. An electronic apparatus can be produced by the system. The electronic apparatus comprises a silicone body and metal features on the silicone body that provide an electronic device.

  19. Thermal performances of ETFE cushion roof integrated amorphous silicon photovoltaic

    International Nuclear Information System (INIS)

    Hu, Jianhui; Chen, Wujun; Qiu, Zhenyu; Zhao, Bing; Zhou, Jinyu; Qu, Yegao

    2015-01-01

    Highlights: • Thermal performances of a three layer ETFE cushion integrated a-Si PV is evaluated. • Temperature of a-Si PV obviously affects temperature field and temperature boundary. • The maximum temperature difference of 3.4 K between measured and numerical results. • Main transport mechanisms in upper and lower chambers are convection and conduction. • Heat transfer coefficients of this roof are less than those of other ETFE cushion roofs. - Abstract: Thermal performances of the ETFE cushion roof integrated amorphous silicon photovoltaic (a-Si PV) are essential to estimate building performances, such as temperature distribution and heat transfer coefficient. To investigate these thermal performances, an experimental mock-up composed of a-Si PV and a three-layer ETFE cushion roof was built and the experiment was carried out under summer sunny condition. Meanwhile, numerical model with real boundary conditions was performed in this paper. The experimental results show that the temperature sequence of the three layers was the middle, top and bottom layer and that the PV temperature caused by solar irradiance was 353.8 K. This gives evidence that the PV has a significant effect on the temperature distribution. The experimental temperature was in good agreement with the corresponding location of the numerical temperature since the maximum temperature difference was only 3.4 K. Therefore, the numerical results were justified and then used to analyze the airflow characteristics and calculate the thermal performances. For the airflow characteristics, it is found that the temperature distribution was not uniform and the main transport mechanisms in the upper and lower chambers formed by the three layers were the convection and conduction, respectively. For the thermal performances, the surface convective heat transfer coefficients were obtained, which have validated that thermal performances of the three-layer ETFE cushion integrated a-Si PV are better than

  20. Development of an integrated pointing device driver for the disabled.

    Science.gov (United States)

    Shih, Ching-Hsiang; Shih, Ching-Tien

    2010-01-01

    To help people with disabilities such as those with spinal cord injury (SCI) to effectively utilise commercial pointing devices to operate computers. This study proposes a novel method to integrate the functions of commercial pointing devices. Utilising software technology to develop an integrated pointing device driver (IPDD) for a computer operating system. The proposed IPDD has the following benefits: (1) it does not require additional hardware cost or circuit preservations, (2) it supports all standard interfaces of commercial pointing devices, including PS/2, USB and wireless interfaces and (3) it can integrate any number of devices. The IPDD can be selected and combined according to their physical restriction. The IPDD is a novel method of integrating commercial pointing devices. Through IPDD, people with disabilities can choose a suitable combination of commercial pointing devices to achieve full cursor control and optimise operational performance. In contrast with previous studies, the software-based solution does not require additional hardware or circuit preservations, and it can support unlimited devices. In summary, the IPDD has the benefits of flexibility, low cost and high-device compatibility.

  1. Enhanced UV photoresponse of KrF-laser-synthesized single-wall carbon nanotubes/n-silicon hybrid photovoltaic devices.

    Science.gov (United States)

    Le Borgne, V; Gautier, L A; Castrucci, P; Del Gobbo, S; De Crescenzi, M; El Khakani, M A

    2012-06-01

    We report on the KrF-laser ablation synthesis, purification and photocurrent generation properties of single-wall carbon nanotubes (SWCNTs). The thermally purified SWCNTs are integrated into hybrid photovoltaic (PV) devices by spin-coating them onto n-Si substrates. These novel SWCNTs/n-Si hybrid devices are shown to generate significant photocurrent (PC) over the entire 250-1050 nm light spectrum with external quantum efficiencies (EQE) reaching up to ~23%. Our SWCNTs/n-Si hybrid devices are not only photoactive in the traditional spectral range of Si solar cells, but generate also significant PC in the UV domain (below 400 nm). This wider spectral response is believed to be the result of PC generation from both the SWCNTs themselves and the tremendous number of local p-n junctions created at the nanotubes/Si interface. To assess the prevalence of these two contributions, the EQE spectra and J-V characteristics of these hybrid devices were investigated in both planar and top-down configurations, as a function of SWCNTs' film thickness. A sizable increase in EQE in the near UV with respect to the silicon is observed in both configurations, with a more pronounced UV photoresponse in the planar mode, confirming thereby the role of SWCNTs in the photogeneration process. The PC generation is found to reach its maximum for an optimal the SWCNT film thickness, which is shown to correspond to the best trade-off between lowest electrical resistance and highest optical transparency. Finally, by analyzing the J-V characteristics of our SWCNTs/n-Si devices with an equivalent circuit model, we were able to point out the contribution of the various electrical components involved in the photogeneration process. The SWCNTs-based devices demonstrated here open up the prospect for their use in highly effective photovoltaics and/or UV-light sensors.

  2. Heterogeneous MEMS device assembly and integration

    Science.gov (United States)

    Topart, Patrice; Picard, Francis; Ilias, Samir; Alain, Christine; Chevalier, Claude; Fisette, Bruno; Paultre, Jacques E.; Généreux, Francis; Legros, Mathieu; Lepage, Jean-François; Laverdière, Christian; Ngo Phong, Linh; Caron, Jean-Sol; Desroches, Yan

    2014-03-01

    In recent years, smart phone applications have both raised the pressure for cost and time to market reduction, and the need for high performance MEMS devices. This trend has led the MEMS community to develop multi-die packaging of different functionalities or multi-technology (i.e. wafer) approaches to fabricate and assemble devices respectively. This paper reports on the fabrication, assembly and packaging at INO of various MEMS devices using heterogeneous assembly at chip and package-level. First, the performance of a giant (e.g. about 3 mm in diameter), electrostatically actuated beam steering mirror is presented. It can be rotated about two perpendicular axes to steer an optical beam within an angular cone of up to 60° in vector scan mode with an angular resolution of 1 mrad and a response time of 300 ms. To achieve such angular performance relative to mirror size, the microassembly was performed from sub-components fabricated from 4 different wafers. To combine infrared detection with inertial sensing, an electroplated proof mass was flip-chipped onto a 256×1 pixel uncooled bolometric FPA and released using laser ablation. In addition to the microassembly technology, performance results of packaged devices are presented. Finally, to simulate a 3072×3 pixel uncooled detector for cloud and fire imaging in mid and long-wave IR, the staggered assembly of six 512×3 pixel FPAs with a less than 50 micron pixel co-registration is reported.

  3. Large current MOSFET on photonic silicon-on-insulator wafers and its monolithic integration with a thermo-optic 2 × 2 Mach-Zehnder switch.

    Science.gov (United States)

    Cong, G W; Matsukawa, T; Chiba, T; Tadokoro, H; Yanagihara, M; Ohno, M; Kawashima, H; Kuwatsuka, H; Igarashi, Y; Masahara, M; Ishikawa, H

    2013-03-25

    n-channel body-tied partially depleted metal-oxide-semiconductor field-effect transistors (MOSFETs) were fabricated for large current applications on a silicon-on-insulator wafer with photonics-oriented specifications. The MOSFET can drive an electrical current as large as 20 mA. We monolithically integrated this MOSFET with a 2 × 2 Mach-Zehnder interferometer optical switch having thermo-optic phase shifters. The static and dynamic performances of the integrated device are experimentally evaluated.

  4. Integration of Capacitive Micromachined Ultrasound Transducers to Microfluidic Devices

    KAUST Repository

    Viržonis, Darius; Kodzius, Rimantas; Vanagas, Galius

    2013-01-01

    The design and manufacturing flexibility of capacitive micromachined ultrasound transducers (CMUT) makes them attractive option for integration with microfluidic devices both for sensing and fluid manipulation. CMUT concept is introduced here

  5. Integration of Capacitive Micromachined Ultrasound Transducers to Microfluidic Devices

    KAUST Repository

    Viržonis, Darius

    2013-10-22

    The design and manufacturing flexibility of capacitive micromachined ultrasound transducers (CMUT) makes them attractive option for integration with microfluidic devices both for sensing and fluid manipulation. CMUT concept is introduced here by presentin

  6. Integrated microfluidic device for single-cell trapping and spectroscopy

    KAUST Repository

    Liberale, Carlo

    2013-02-13

    Optofluidic microsystems are key components towards lab-on-a-chip devices for manipulation and analysis of biological specimens. In particular, the integration of optical tweezers (OT) in these devices allows stable sample trapping, while making available mechanical, chemical and spectroscopic analyses.

  7. Evaluation of polymer based third order nonlinear integrated optics devices

    NARCIS (Netherlands)

    Driessen, A.; Hoekstra, Hugo; Blom, F.C.; Horst, F.; Horst, F.; Krijnen, Gijsbertus J.M.; van Schoot, J.B.P.; van Schoot, J.B.P.; Lambeck, Paul; Popma, T.J.A.; Diemeer, Mart

    Nonlinear polymers are promising materials for high speed active integrated optics devices. In this paper we evaluate the perspectives polymer based nonlinear optical devices can offer. Special attention is directed to the materials aspects. In our experimental work we applied mainly Akzo Nobel DANS

  8. Integration of semiconductor and ceramic superconductor devices for microwave applications

    NARCIS (Netherlands)

    Klopman, B.B.G.; Klopman, B.B.G.; Wijers, H.W.; Gao, J.; Gao, J.; Gerritsma, G.J.; Rogalla, Horst

    1991-01-01

    Due to the very-low-loss properties of ceramic superconductors, high-performance microwave resonators and filters can be realized. The fact that these devices may be operated at liquid nitrogen temperature facilitates integration with semiconductor devices. Examples are bandpass amplifiers,

  9. Integrated microfluidic device for single-cell trapping and spectroscopy

    KAUST Repository

    Liberale, Carlo; Cojoc, G.; Bragheri, F.; Minzioni, P.; Perozziello, G.; La Rocca, R.; Ferrara, L.; Rajamanickam, V.; Di Fabrizio, Enzo M.; Cristiani, I.

    2013-01-01

    Optofluidic microsystems are key components towards lab-on-a-chip devices for manipulation and analysis of biological specimens. In particular, the integration of optical tweezers (OT) in these devices allows stable sample trapping, while making available mechanical, chemical and spectroscopic analyses.

  10. Automatic Integration of IoT Devices

    OpenAIRE

    Pêgo, Pedro Ruben Januário

    2016-01-01

    During the last years a new concept has gained prominence in the technology world. With an increasingly dominant role in our days, Internet of Things (IoT) is a technological revolution that is changing our lives. The imagination is the limit for the new devices that may appear in the market. This phenomenon is derived from both, the technological evolution and the growing acceptance of this type of products in our social life. Faced with a fast growth, an increasing diversity ...

  11. Water Capture Device Signal Integration Board

    Science.gov (United States)

    Chamberlin, Kathryn J.; Hartnett, Andrew J.

    2018-01-01

    I am a junior in electrical engineering at Arizona State University, and this is my second internship at Johnson Space Center. I am an intern in the Command and Data Handling Branch of Avionics Division (EV2), my previous internship was also in EV2. During my previous internship I was assigned to the Water Capture Device payload, where I designed a prototype circuit board for the electronics system of the payload. For this internship, I have come back to the Water Capture Device project to further the work on the electronics design I completed previously. The Water Capture Device is an experimental payload to test the functionality of two different phase separators aboard the International Space Station (ISS). A phase separator sits downstream of a condensing heat exchanger (CHX) and separates the water from the air particles for environmental control on the ISS. With changing CHX technology, new phase separators are required. The goal of the project is to develop a test bed for the two phase separators to determine the best solution.

  12. Monolithic silicon photonics in a sub-100nm SOI CMOS microprocessor foundry: progress from devices to systems

    Science.gov (United States)

    Popović, Miloš A.; Wade, Mark T.; Orcutt, Jason S.; Shainline, Jeffrey M.; Sun, Chen; Georgas, Michael; Moss, Benjamin; Kumar, Rajesh; Alloatti, Luca; Pavanello, Fabio; Chen, Yu-Hsin; Nammari, Kareem; Notaros, Jelena; Atabaki, Amir; Leu, Jonathan; Stojanović, Vladimir; Ram, Rajeev J.

    2015-02-01

    We review recent progress of an effort led by the Stojanović (UC Berkeley), Ram (MIT) and Popović (CU Boulder) research groups to enable the design of photonic devices, and complete on-chip electro-optic systems and interfaces, directly in standard microelectronics CMOS processes in a microprocessor foundry, with no in-foundry process modifications. This approach allows tight and large-scale monolithic integration of silicon photonics with state-of-the-art (sub-100nm-node) microelectronics, here a 45nm SOI CMOS process. It enables natural scale-up to manufacturing, and rapid advances in device design due to process repeatability. The initial driver application was addressing the processor-to-memory communication energy bottleneck. Device results include 5Gbps modulators based on an interleaved junction that take advantage of the high resolution of the sub-100nm CMOS process. We demonstrate operation at 5fJ/bit with 1.5dB insertion loss and 8dB extinction ratio. We also demonstrate the first infrared detectors in a zero-change CMOS process, using absorption in transistor source/drain SiGe stressors. Subsystems described include the first monolithically integrated electronic-photonic transmitter on chip (modulator+driver) with 20-70fJ/bit wall plug energy/bit (2-3.5Gbps), to our knowledge the lowest transmitter energy demonstrated to date. We also demonstrate native-process infrared receivers at 220fJ/bit (5Gbps). These are encouraging signs for the prospects of monolithic electronics-photonics integration. Beyond processor-to-memory interconnects, our approach to photonics as a "More-than- Moore" technology inside advanced CMOS promises to enable VLSI electronic-photonic chip platforms tailored to a vast array of emerging applications, from optical and acoustic sensing, high-speed signal processing, RF and optical metrology and clocks, through to analog computation and quantum technology.

  13. Modeling optical transmissivity of graphene grate in on-chip silicon photonic device

    Science.gov (United States)

    Amiri, Iraj S.; Ariannejad, M. M.; Jalil, M. A.; Ali, J.; Yupapin, P.

    2018-06-01

    A three-dimensional (3-D) finite-difference-time-domain (FDTD) analysis was used to simulate a silicon photonic waveguide. We have calculated power and transmission of the graphene used as single or multilayers to study the light transmission behavior. A new technique has been developed to define the straight silicon waveguide integrated with grate graphene layer. The waveguide has a variable grate spacing to be filled by the graphene layer. The number of graphene atomic layers varies between 100 and 1000 (or 380 nm and 3800 nm), the transmitted power obtained varies as ∼30% and ∼80%. The ∼99%, blocking of the light was occurred in 10,000 (or 38,000 nm) atomic layers of the graphene grate.

  14. Analysis of silicon-based integrated photovoltaic-electrochemical hydrogen generation system under varying temperature and illumination

    Institute of Scientific and Technical Information of China (English)

    Vishwa Bhatt; Brijesh Tripathi; Pankaj Yadav; Manoj Kumar

    2017-01-01

    Last decade witnessed tremendous research and development in the area of photo-electrolytic hydrogen generation using chemically stable nanostructured photo-cathode/anode materials.Due to intimately coupled charge separation and photo-catalytic processes,it is very difficult to optimize individual components of such system leading to a very low demonstrated solar-to-fuel efficiency (SFE) of less than 1%.Recently there has been growing interest in an integrated photovoltaic-electrochemical (PV-EC) system based on GaAs solar cells with the demonstrated SFE of 24.5% under concentrated illumination condition.But a high cost of GaAs based solar cells and recent price drop of poly-crystalline silicon (pc-Si) solar cells motivated researchers to explore silicon based integrated PV-EC system.In this paper a theoretical framework is introduced to model silicon-based integrated PV-EC device.The theoretical framework is used to analyze the coupling and kinetic losses of a silicon solar cell based integrated PV-EC water splitting system under varying temperature and illumination.The kinetic loss occurs in the range of 19.1%-27.9% and coupling loss takes place in the range of 5.45%-6.74% with respect to varying illumination in the range of 20-100 mW/cm2.Similarly,the effect of varying temperature has severe impact on the performance of the system,wherein the coupling loss occurs in the range of 0.84%-21.51% for the temperature variation from 25 to 50 ℃.

  15. Improved luminescence properties of nanocrystalline silicon based electroluminescent device by annealing

    International Nuclear Information System (INIS)

    Sato, Keisuke; Hirakuri, Kenji

    2006-01-01

    We report an annealing effect on electrical and luminescence properties of a red electroluminescent device consisting of nanocrystalline silicon (nc-Si). The red luminescence was generated by flowing the forward current into the device at a low threshold direct current (DC) forward voltage with a rise of annealing temperature up to 500 deg. C. Moreover, the luminescence of the device annealed at 500 deg. C was more intense than that of the device annealed at 200 deg. C or less under the same forward current density, because of the injection of a large quantity of carriers to the radiative recombination centers at the nc-Si surface vicinity. These were attained by a low resistivity of indium tin oxide (ITO) electrode and good contact at the ITO electrode/luminous layer interface region by the annealing treatment. The above results indicated that the annealing treatment of the device is effective for the realization of high luminance due to the improvement in the injection efficiency of carriers to the radiative recombination centers

  16. Integration of the End Cap TEC+ of the CMS Silicon Strip Tracker

    CERN Document Server

    Adler, Volker; Ageron, Michel; Agram, Jean-Laurent; Atz, Bernd; Barvich, Tobias; Baulieu, Guillaume; Beaumont, Willem; Beissel, Franz; Bergauer, Thomas; Berst, Jean-Daniel; Blüm, Peter; Bock, E; Bogelsbacher, F; de Boer, Wim; Bonnet, Jean-Luc; Bonnevaux, Alain; Boudoul, Gaelle; Bouhali, Othmane; Braunschweig, Wolfgang; Bremer, R; Brom, Jean-Marie; Butz, Erik; Chabanat, Eric; Chabert, Eric Christian; Clerbaux, Barbara; Contardo, Didier; De Callatay, Bernard; Dehm, Philip; Delaere, Christophe; Della Negra, Rodolphe; Dewulf, Jean-Paul; D'Hondt, Jorgen; Didierjean, Francois; Dierlamm, Alexander; Dirkes, Guido; Dragicevic, Marko; Drouhin, Frédéric; Ernenwein, Jean-Pierre; Esser, Hans; Estre, Nicolas; Fahrer, Manuel; Feld, Lutz; Fernández, J; Florins, Benoit; Flossdorf, Alexander; Flucke, Gero; Flügge, Günter; Fontaine, Jean-Charles; Freudenreich, Klaus; Frey, Martin; Friedl, Markus; Furgeri, Alexander; Giraud, Noël; Goerlach, Ulrich; Goorens, Robert; Graehling, Philippe; Grégoire, Ghislain; Gregoriev, E; Gross, Laurent; Hansel, S; Haroutunian, Roger; Hartmann, Frank; Heier, Stefan; Hermanns, Thomas; Heydhausen, Dirk; Heyninck, Jan; Hosselet, J; Hrubec, Josef; Jahn, Dieter; Juillot, Pierre; Kaminski, Jochen; Karpinski, Waclaw; Kaussen, Gordon; Keutgen, Thomas; Klanner, Robert; Klein, Katja; König, Stefan; Kosbow, M; Krammer, Manfred; Ledermann, Bernhard; Lemaître, Vincent; De Lentdecker, Gilles; Linn, Alexander; Lounis, Abdenour; Lübelsmeyer, Klaus; Lumb, Nicholas; Maazouzi, Chaker; Mahmoud, Tariq; Michotte, Daniel; Militaru, Otilia; Mirabito, Laurent; Müller, Thomas; Neukermans, Lionel; Ollivetto, C; Olzem, Jan; Ostapchuk, Andrey; Pandoulas, Demetrios; Pein, Uwe; Pernicka, Manfred; Perriès, Stephane; Piaseki, C; Pierschel, Gerhard; Piotrzkowski, Krzysztof; Poettgens, Michael; Pooth, Oliver; Rouby, Xavier; Sabellek, Andreas; Schael, Stefan; Schirm, Norbert; Schleper, Peter; Schmitz, Stefan Antonius; Schultz von Dratzig, Arndt; Siedling, Rolf; Simonis, Hans-Jürgen; Stahl, Achim; Steck, Pia; Steinbruck, G; Stoye, Markus; Strub, Roger; Tavernier, Stefaan; Teyssier, Daniel; Theel, Andreas; Trocmé, Benjamin; Udo, Fred; Van der Donckt, M; Van der Velde, C; Van Hove, Pierre; Vanlaer, Pascal; Van Lancker, Luc; Van Staa, Rolf; Vanzetto, Sylvain; Weber, Markus; Weiler, Thomas; Weseler, Siegfried; Wickens, John; Wittmer, Bruno; Wlochal, Michael; De Wolf, Eddi A; Zhukov, Valery; Zoeller, Marc Henning

    2009-01-01

    The silicon strip tracker of the CMS experiment has been completed and inserted into the CMS detector in late 2007. The largest sub-system of the tracker is its end cap system, comprising two large end caps (TEC) each containing 3200 silicon strip modules. To ease construction, the end caps feature a modular design: groups of about 20 silicon modules are placed on sub-assemblies called petals and these self-contained elements are then mounted into the TEC support structures. Each end cap consists of 144 petals, and the insertion of these petals into the end cap structure is referred to as TEC integration. The two end caps were integrated independently in Aachen (TEC+) and at CERN (TEC--). This note deals with the integration of TEC+, describing procedures for end cap integration and for quality control during testing of integrated sections of the end cap and presenting results from the testing.

  17. Use of Silicon Carbide as Beam Intercepting Device Material: Tests, Issues and Numerical Simulations

    CERN Document Server

    Delonca, M; Gil Costa, M; Vacca, A

    2014-01-01

    Silicon Carbide (SiC) stands as one of the most promising ceramic material with respect to its thermal shock resistance and mechanical strengths. It has hence been considered as candidate material for the development of higher performance beam intercepting devices at CERN. Its brazing with a metal counterpart has been tested and characterized by means of microstructural and ultrasound techniques. Despite the positive results, its use has to be evaluated with care, due to the strong evidence in literature of large and permanent volumetric expansion, called swelling, under the effect of neutron and ion irradiation. This may cause premature and sudden failure, and can be mitigated to some extent by operating at high temperature. For this reason limited information is available for irradiation below 100°C, which is the typical temperature of interest for beam intercepting devices like dumps or collimators. This paper describes the brazing campaign carried out at CERN, the results, and the theoretical and numeric...

  18. SILICON CARBIDE MICRO-DEVICES FOR COMBUSTION GAS SENSING UNDER HARSH CONDITIONS

    Energy Technology Data Exchange (ETDEWEB)

    Ruby N. Ghosh; Peter Tobias; Roger G. Tobin

    2004-04-01

    A sensor based on the wide bandgap semiconductor, silicon carbide (SiC), has been developed for the detection of combustion products in power plant environments. The sensor is a catalytic gate field effect device that can detect hydrogen containing species in chemically reactive, high temperature environments. Robust metallization and electrical contacting techniques have been developed for device operation at elevated temperatures. To characterize the time response of the sensor responses in the millisecond range, a conceptually new apparatus has been built. Software has been developed to cope with the requirements of fast sensor control and data recording. In addition user friendly software has been developed to facilitate use of the SiC sensors for industrial process control applications.

  19. Silicon light-emitting diodes and lasers photon breeding devices using dressed photons

    CERN Document Server

    Ohtsu, Motoichi

    2016-01-01

    This book focuses on a novel phenomenon named photon breeding. It is applied to realizing light-emitting diodes and lasers made of indirect-transition-type silicon bulk crystals in which the light-emission principle is based on dressed photons. After presenting physical pictures of dressed photons and dressed-photon phonons, the principle of light emission by using dressed-photon phonons is reviewed. A novel phenomenon named photon breeding is also reviewed. Next, the fabrication and operation of light emitting diodes and lasers are described The role of coherent phonons in these devices is discussed. Finally, light-emitting diodes using other relevant crystals are described and other relevant devices are also reviewed.

  20. Stress testing on silicon carbide electronic devices for prognostics and health management.

    Energy Technology Data Exchange (ETDEWEB)

    Kaplar, Robert James; Brock, Reinhard C.; Marinella, Matthew; King, Michael Patrick; Smith, Mark A.; Atcitty, Stanley

    2011-01-01

    Power conversion systems for energy storage and other distributed energy resource applications are among the drivers of the important role that power electronics plays in providing reliable electricity. Wide band gap semiconductors such as silicon carbide (SiC) and gallium nitride (GaN) will help increase the performance and efficiency of power electronic equipment while condition monitoring (CM) and prognostics and health management (PHM) will increase the operational availability of the equipment and thereby make it more cost effective. Voltage and/or temperature stress testing were performed on a number of SiC devices in order to accelerate failure modes and to identify measureable shifts in electrical characteristics which may provide early indication of those failures. Those shifts can be interpreted and modeled to provide prognostic signatures for use in CM and/or PHM. Such experiments will also lead to a deeper understanding of basic device physics and the degradation mechanisms behind failure.

  1. Performance of integrated retainer rings in silicon micro-turbines with thrust style micro-ball bearings

    International Nuclear Information System (INIS)

    Hergert, Robert J; Holmes, Andrew S; Hanrahan, Brendan; Ghodssi, Reza

    2013-01-01

    This work explores the performance of different silicon retainer ring designs when integrated into silicon micro-turbines (SMTs) incorporating thrust style bearings supported on 500 µm diameter steel balls. Experimental performance curves are presented for SMTs with rotor diameters of 5 mm and 10 mm, each with five different retainer designs varying in mechanical rigidity, ball pocket shape and ball complement. It was found that the different retainer designs yielded different performance curves, with the closed pocket designs consistently requiring lower input power for a given rotation speed, and the most rigid retainers giving the best performance overall. Both 5 mm and 10 mm diameter devices have shown repeatable performance at rotation speeds up to and exceeding 20 000 RPM with input power levels below 2 W, and devices were tested for over 2.5 million revolutions without failure. Retainer rings are commonly used in macro-scale bearings to ensure uniform spacing between the rolling elements. The integration of retainers into micro-bearings could lower costs by reducing the number of balls required for stable operation, and also open up the possibility of ‘smart’ bearings with integrated sensors to monitor the bearing status. (paper)

  2. Device for fracturing silicon-carbide coatings on nuclear-fuel particles

    Science.gov (United States)

    Turner, L.J.; Willey, M.G.; Tiegs, S.M.; Van Cleve, J.E. Jr.

    This invention is a device for fracturing particles. It is designed especially for use in hot cells designed for the handling of radioactive materials. In a typical application, the device is used to fracture a hard silicon-carbide coating present on carbon-matrix microspheres containing nuclear-fuel materials, such as uranium or thorium compounds. To promote remote control and facilitate maintenance, the particle breaker is pneumatically operated and contains no moving parts. It includes means for serially entraining the entrained particles on an anvil housed in a leak-tight chamber. The flow rate of the gas is at a value effecting fracture of the particles; preferably, it is at a value fracturing them into product particulates of fluidizable size. The chamber is provided with an outlet passage whose cross-sectional area decreases in the direction away from the chamber. The outlet is connected tangentially to a vertically oriented vortex-flow separator for recovering the product particulates entrained in the gas outflow from the chamber. The invention can be used on a batch or continuous basis to fracture the silicon-carbide coatings on virtually all of the particles fed thereto.

  3. Robust integration schemes for junction-based modulators in a 200mm CMOS compatible silicon photonic platform (Conference Presentation)

    Science.gov (United States)

    Szelag, Bertrand; Abraham, Alexis; Brision, Stéphane; Gindre, Paul; Blampey, Benjamin; Myko, André; Olivier, Segolene; Kopp, Christophe

    2017-05-01

    Silicon photonic is becoming a reality for next generation communication system addressing the increasing needs of HPC (High Performance Computing) systems and datacenters. CMOS compatible photonic platforms are developed in many foundries integrating passive and active devices. The use of existing and qualified microelectronics process guarantees cost efficient and mature photonic technologies. Meanwhile, photonic devices have their own fabrication constraints, not similar to those of cmos devices, which can affect their performances. In this paper, we are addressing the integration of PN junction Mach Zehnder modulator in a 200mm CMOS compatible photonic platform. Implantation based device characteristics are impacted by many process variations among which screening layer thickness, dopant diffusion, implantation mask overlay. CMOS devices are generally quite robust with respect to these processes thanks to dedicated design rules. For photonic devices, the situation is different since, most of the time, doped areas must be carefully located within waveguides and CMOS solutions like self-alignment to the gate cannot be applied. In this work, we present different robust integration solutions for junction-based modulators. A simulation setup has been built in order to optimize of the process conditions. It consist in a Mathlab interface coupling process and device electro-optic simulators in order to run many iterations. Illustrations of modulator characteristic variations with process parameters are done using this simulation setup. Parameters under study are, for instance, X and Y direction lithography shifts, screening oxide and slab thicknesses. A robust process and design approach leading to a pn junction Mach Zehnder modulator insensitive to lithography misalignment is then proposed. Simulation results are compared with experimental datas. Indeed, various modulators have been fabricated with different process conditions and integration schemes. Extensive

  4. Medical Device Integration Model Based on the Internet of Things

    Science.gov (United States)

    Hao, Aiyu; Wang, Ling

    2015-01-01

    At present, hospitals in our country have basically established the HIS system, which manages registration, treatment, and charge, among many others, of patients. During treatment, patients need to use medical devices repeatedly to acquire all sorts of inspection data. Currently, the output data of the medical devices are often manually input into information system, which is easy to get wrong or easy to cause mismatches between inspection reports and patients. For some small hospitals of which information construction is still relatively weak, the information generated by the devices is still presented in the form of paper reports. When doctors or patients want to have access to the data at a given time again, they can only look at the paper files. Data integration between medical devices has long been a difficult problem for the medical information system, because the data from medical devices are lack of mandatory unified global standards and have outstanding heterogeneity of devices. In order to protect their own interests, manufacturers use special protocols, etc., thus causing medical decices to still be the "lonely island" of hospital information system. Besides, unfocused application of the data will lead to failure to achieve a reasonable distribution of medical resources. With the deepening of IT construction in hospitals, medical information systems will be bound to develop towards mobile applications, intelligent analysis, and interconnection and interworking, on the premise that there is an effective medical device integration (MDI) technology. To this end, this paper presents a MDI model based on the Internet of Things (IoT). Through abstract classification, this model is able to extract the common characteristics of the devices, resolve the heterogeneous differences between them, and employ a unified protocol to integrate data between devices. And by the IoT technology, it realizes interconnection network of devices and conducts associate matching

  5. Integrated neuron circuit for implementing neuromorphic system with synaptic device

    Science.gov (United States)

    Lee, Jeong-Jun; Park, Jungjin; Kwon, Min-Woo; Hwang, Sungmin; Kim, Hyungjin; Park, Byung-Gook

    2018-02-01

    In this paper, we propose and fabricate Integrate & Fire neuron circuit for implementing neuromorphic system. Overall operation of the circuit is verified by measuring discrete devices and the output characteristics of the circuit. Since the neuron circuit shows asymmetric output characteristic that can drive synaptic device with Spike-Timing-Dependent-Plasticity (STDP) characteristic, the autonomous weight update process is also verified by connecting the synaptic device and the neuron circuit. The timing difference of the pre-neuron and the post-neuron induce autonomous weight change of the synaptic device. Unlike 2-terminal devices, which is frequently used to implement neuromorphic system, proposed scheme of the system enables autonomous weight update and simple configuration by using 4-terminal synapse device and appropriate neuron circuit. Weight update process in the multi-layer neuron-synapse connection ensures implementation of the hardware-based artificial intelligence, based on Spiking-Neural- Network (SNN).

  6. Space and military radiation effects in silicon-on-insulator devices

    International Nuclear Information System (INIS)

    Schwank, J.R.

    1996-09-01

    Advantages in transient ionizing and single-event upset (SEU) radiation hardness of silicon-on-insulator (SOI) technology spurred much of its early development. Both of these advantages are a direct result of the reduced charge collection volume inherent to SOI technology. The fact that SOI transistor structures do not include parasitic n-p-n-p paths makes them immune to latchup. Even though considerable improvement in transient and single-event radiation hardness can be obtained by using SOI technology, there are some attributes of SOI devices and circuits that tend to limit their overall hardness. These attributes include the bipolar effect that can ultimately reduce the hardness of SOI ICs to SEU and transient ionizing radiation, and charge buildup in buried and sidewall oxides that can degrade the total-dose hardness of SOI devices. Nevertheless, high-performance SOI circuits can be fabricated that are hardened to both space and nuclear radiation environments, and radiation-hardened systems remain an active market for SOI devices. The effects of radiation on SOI MOS devices are reviewed

  7. Methods and mechanisms of gettering of silicon structures in the production of integrated circuits

    Directory of Open Access Journals (Sweden)

    Pilipenko V. A.

    2013-05-01

    Full Text Available Increasing the degree of integration of hardware components imposes more stringent requirements for the reduction of the concentration of contaminants and oxidation stacking faults in the original silicon wafers with its preservation in the IC manufacturing process cycle. This causes high relevance of the application of gettering in modern microelectronic technology. The existing methods of silicon wafers gettering and the mechanisms of their occurrence are considered.

  8. Integrated GaN photonic circuits on silicon (100) for second harmonic generation

    OpenAIRE

    Xiong, Chi; Pernice, Wolfram; Ryu, Kevin K.; Schuck, Carsten; Fong, King Y.; Palacios, Tomas; Tang, Hong X.

    2014-01-01

    We demonstrate second order optical nonlinearity in a silicon architecture through heterogeneous integration of single-crystalline gallium nitride (GaN) on silicon (100) substrates. By engineering GaN microrings for dual resonance around 1560 nm and 780 nm, we achieve efficient, tunable second harmonic generation at 780 nm. The \\{chi}(2) nonlinear susceptibility is measured to be as high as 16 plus minus 7 pm/V. Because GaN has a wideband transparency window covering ultraviolet, visible and ...

  9. Video integrated measurement system. [Diagnostic display devices

    Energy Technology Data Exchange (ETDEWEB)

    Spector, B.; Eilbert, L.; Finando, S.; Fukuda, F.

    1982-06-01

    A Video Integrated Measurement (VIM) System is described which incorporates the use of various noninvasive diagnostic procedures (moire contourography, electromyography, posturometry, infrared thermography, etc.), used individually or in combination, for the evaluation of neuromusculoskeletal and other disorders and their management with biofeedback and other therapeutic procedures. The system provides for measuring individual diagnostic and therapeutic modes, or multiple modes by split screen superimposition, of real time (actual) images of the patient and idealized (ideal-normal) models on a video monitor, along with analog and digital data, graphics, color, and other transduced symbolic information. It is concluded that this system provides an innovative and efficient method by which the therapist and patient can interact in biofeedback training/learning processes and holds considerable promise for more effective measurement and treatment of a wide variety of physical and behavioral disorders.

  10. Fabrication of wear-resistant silicon microprobe tips for high-speed surface roughness scanning devices

    Science.gov (United States)

    Wasisto, Hutomo Suryo; Yu, Feng; Doering, Lutz; Völlmeke, Stefan; Brand, Uwe; Bakin, Andrey; Waag, Andreas; Peiner, Erwin

    2015-05-01

    Silicon microprobe tips are fabricated and integrated with piezoresistive cantilever sensors for high-speed surface roughness scanning systems. The fabrication steps of the high-aspect-ratio silicon microprobe tips were started with photolithography and wet etching of potassium hydroxide (KOH) resulting in crystal-dependent micropyramids. Subsequently, thin conformal wear-resistant layer coating of aluminum oxide (Al2O3) was demonstrated on the backside of the piezoresistive cantilever free end using atomic layer deposition (ALD) method in a binary reaction sequence with a low thermal process and precursors of trimethyl aluminum and water. The deposited Al2O3 layer had a thickness of 14 nm. The captured atomic force microscopy (AFM) image exhibits a root mean square deviation of 0.65 nm confirming the deposited Al2O3 surface quality. Furthermore, vacuum-evaporated 30-nm/200-nm-thick Au/Cr layers were patterned by lift-off and served as an etch mask for Al2O3 wet etching and in ICP cryogenic dry etching. By using SF6/O2 plasma during inductively coupled plasma (ICP) cryogenic dry etching, micropillar tips were obtained. From the preliminary friction and wear data, the developed silicon cantilever sensor has been successfully used in 100 fast measurements of 5- mm-long standard artifact surface with a speed of 15 mm/s and forces of 60-100 μN. Moreover, the results yielded by the fabricated silicon cantilever sensor are in very good agreement with those of calibrated profilometer. These tactile sensors are targeted for use in high-aspect-ratio microform metrology.

  11. Impurity engineering for germanium-doped Czochralski silicon wafer used for ultra large scale integrated circuit

    Energy Technology Data Exchange (ETDEWEB)

    Chen, Jiahe; Yang, Deren [State Key Laboratory of Silicon Materials, Department of Materials Science and Engineering, Zhejiang University, Hangzhou (China)

    2009-07-01

    Internal gettering (IG) technology has been challenged by both the reduction of thermal budget during device fabrication and the enlargement of wafer diameter. Improving the properties of Czochralski (Cz) silicon wafers by intentional impurity doping, the so-called 'impurity engineering (IE)', is defined. Germanium has been found to be one of the important impurities for improving the internal gettering effect in Cz silicon wafer. In this paper, the investigations on IE involved with the conventional furnace anneal based denudation processing for germanium-doped Cz silicon wafer are reviewed. Meanwhile, the potential mechanisms of germanium effects for the IE of Cz silicon wafer are also interpreted based on the experimental facts. (copyright 2009 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim) (orig.)

  12. Electronic devices containing switchably conductive silicon oxides as a switching element and methods for production and use thereof

    Science.gov (United States)

    Tour, James M; Yao, Jun; Natelson, Douglas; Zhong, Lin; He, Tao

    2013-11-26

    In various embodiments, electronic devices containing switchably conductive silicon oxide as a switching element are described herein. The electronic devices are two-terminal devices containing a first electrical contact and a second electrical contact in which at least one of the first electrical contact or the second electrical contact is deposed on a substrate to define a gap region therebetween. A switching layer containing a switchably conductive silicon oxide resides in the the gap region between the first electical contact and the second electrical contact. The electronic devices exhibit hysteretic current versus voltage properties, enabling their use in switching and memory applications. Methods for configuring, operating and constructing the electronic devices are also presented herein.

  13. Ultrahigh-density trench cpacitors in silicon and their application to integrated DC-DC conversion

    NARCIS (Netherlands)

    Roozeboom, F.; Bergveld, H.J.; Nowak, K.; Le Cornec, F.; Guiraud, L.; Bunel, C.; Iochem, S.; Ferreira, J.; Ledain, S.; Pieraerts, E.; Pommier, M.

    2009-01-01

    This paper addresses silicon-based integration of passive components applied to 3D integration with dies of other technologies within one package. Particularly, the development of high-density trench capacitors has enabled the realization of small-formfactor DC-DC converters. As illustration, an

  14. Experimental Demonstration of 7 Tb/s Switching Using Novel Silicon Photonic Integrated Circuit

    DEFF Research Database (Denmark)

    Ding, Yunhong; Kamchevska, Valerija; Dalgaard, Kjeld

    2016-01-01

    We demonstrate BER performance <10^-9 for a 1 Tb/s/core transmission over 7-core fiber and SDM switching using a novel silicon photonic integrated circuit composed of a 7x7 fiber switch and low loss SDM couplers.......We demonstrate BER performance integrated circuit composed of a 7x7 fiber switch and low loss SDM couplers....

  15. Characterization of porous silicon integrated in liquid chromatography chips

    NARCIS (Netherlands)

    Tiggelaar, Roald M.; Verdoold, Vincent; Eghbali, H.; Desmet, G.; Gardeniers, Johannes G.E.

    2009-01-01

    Properties of porous silicon which are relevant for use of the material as a stationary phase in liquid chromatography chips, like porosity, pore size and specific surface area, were determined with high-resolution SEM and N2 adsorption–desorption isotherms. For the anodization conditions

  16. Device fabrication and transport measurements of FinFETs built with 28Si SOI wafers towards donor qubits in silicon

    Energy Technology Data Exchange (ETDEWEB)

    Lo, Cheuk Chi; Persaud, Arun; Dhuey, Scott; Olynick, Deirdre; Borondics, Ferenc; Martin, Michael C.; Bechtel, Hans A.; Bokor, Jeffrey; Schenkel, Thomas

    2009-06-10

    We report fabrication of transistors in a FinFET geometry using isotopically purified silicon-28 -on-insulator (28-SOI) substrates. Donor electron spin coherence in natural silicon is limited by spectral diffusion due to the residual 29Si nuclear spin bath, making isotopically enriched nuclear spin-free 28Si substrates a promising candidate for forming spin quantum bit devices. The FinFET architecture is fully compatible with single-ion implant detection for donor-based qubits, and the donor spin-state readout through electrical detection of spin resonance. We describe device processing steps and discuss results on electrical transport measurements at 0.3 K.

  17. Luneburg lens in silicon photonics.

    Science.gov (United States)

    Di Falco, Andrea; Kehr, Susanne C; Leonhardt, Ulf

    2011-03-14

    The Luneburg lens is an aberration-free lens that focuses light from all directions equally well. We fabricated and tested a Luneburg lens in silicon photonics. Such fully-integrated lenses may become the building blocks of compact Fourier optics on chips. Furthermore, our fabrication technique is sufficiently versatile for making perfect imaging devices on silicon platforms.

  18. Integrated circuit devices in control systems of coal mining complexes

    Energy Technology Data Exchange (ETDEWEB)

    1983-01-01

    Systems of automatic monitoring and control of coal mining complexes developed in the 1960's used electromagnetic relays, thyristors, and flip-flops on transistors of varying conductivity. The circuits' designers, devoted much attention to ensuring spark safety, lowering power consumption, and raising noise immunity and repairability of functional devices. The fast development of integrated circuitry led to the use of microelectronic components in most devices of mine automation. An analysis of specifications and experimental research into integrated circuits (IMS) shows that the series K 176 IMS components made by CMOS technology best meet mine conditions of operation. The use of IMS devices under mine conditions has demonstrated their high reliability. Further development of integrated circuitry involve using microprocessors and microcomputers. (SC)

  19. Framework for the Integration of Mobile Device Features in PLM

    OpenAIRE

    Hopf, Jens Michael

    2016-01-01

    Currently, companies have covered their business processes with stationary workstations while mobile business applications have limited relevance. Companies can cover their overall business processes more time-efficiently and cost-effectively when they integrate mobile users in workflows using mobile device features. The objective is a framework that can be used to model and control business applications for PLM processes using mobile device features to allow a totally new user experience.

  20. Study of harsh environment operation of flexible ferroelectric memory integrated with PZT and silicon fabric

    KAUST Repository

    Ghoneim, Mohamed T.; Hussain, Muhammad Mustafa

    2015-01-01

    mono-crystalline silicon (100). The experimented devices show a bending radius down to 1.25 cm corresponding to 0.16% nominal strain (high pressure of ∼260 MPa), and full functionality up to 225 °C high temperature in ambient gas composition (21% oxygen

  1. Monolithic integration of detectors and transistors on high-resistivity silicon

    International Nuclear Information System (INIS)

    Dalla Betta, Gian-Franco; Batignani, Giovanni; Boscardin, Maurizio; Bosisio, Luciano; Gregori, Paolo; Pancheri, Lucio; Piemonte, Claudio; Ratti, Lodovico; Verzellesi, Giovanni; Zorzi, Nicola

    2007-01-01

    We report on the most recent results from an R and D activity aimed at the development of silicon radiation detectors with embedded front-end electronics. The key features of the fabrication technology and the available active devices are described. Selected results from the characterization of transistors and test structures are presented and discussed, and the considered application fields are addressed

  2. Si light-emitting device in integrated photonic CMOS ICs

    Science.gov (United States)

    Xu, Kaikai; Snyman, Lukas W.; Aharoni, Herzl

    2017-07-01

    The motivation for integrated Si optoelectronics is the creation of low-cost photonics for mass-market applications. Especially, the growing demand for sensitive biochemical sensors in the environmental control or medicine leads to the development of integrated high resolution sensors. Here CMOS-compatible Si light-emitting device structures are presented for investigating the effect of various depletion layer profiles and defect engineering on the photonic transition in the 1.4-2.8 eV. A novel Si device is proposed to realize both a two-terminal Si-diode light-emitting device and a three-terminal Si gate-controlled diode light-emitting device in the same device structure. In addition to the spectral analysis, differences between two-terminal and three-terminal devices are discussed, showing the light emission efficiency change. The proposed Si optical source may find potential applications in micro-photonic systems and micro-optoelectro-mechanical systems (MOEMS) in CMOS integrated circuitry.

  3. Nitride-based Quantum-Confined Structures for Ultraviolet-Visible Optical Devices on Silicon Substrates

    KAUST Repository

    Janjua, Bilal

    2017-04-01

    III–V nitride quantum-confined structures embedded in nanowires (NWs), also known as quantum-disks-in-nanowires (Qdisks-in-NWs), have recently emerged as a new class of nanoscale materials exhibiting outstanding properties for optoelectronic devices and systems. It is promising for circumventing the technology limitation of existing planar epitaxy devices, which are bounded by the lattice-, crystal-structure-, and thermal- matching conditions. This work presents significant advances in the growth of good quality GaN, InGaN and AlGaN Qdisks-in-NWs based on careful optimization of the growth parameters, coupled with a meticulous layer structure and active region design. The NWs were grown, catalyst-free, using plasma assisted molecular beam epitaxy (PAMBE) on silicon (Si) substrates. A 2-step growth scheme was developed to achieve high areal density, dislocation free and vertically aligned NWs on Ti/Si substrates. Numerical modeling of the NWs structures, using the nextnano3 software, showed reduced polarization fields, and, in the presence of Qdisks, exhibited improved quantum-confinement; thus contributing to high carrier radiative-recombination rates. As a result, based on the growth and device structure optimization, the technologically challenging orange and yellow NWs light emitting devices (LEDs) targeting the ‘green-yellow’ gap were demonstrated on scalable, foundry compatible, and low-cost Ti coated Si substrates. The NWs work was also extended to LEDs emitting in the ultraviolet (UV) range with niche applications in environmental cleaning, UV-curing, medicine, and lighting. In this work, we used a Ti (100 nm) interlayer and Qdisks to achieve good quality AlGaN based UV-A (320 - 400 nm) device. To address the issue of UV-absorbing polymer, used in the planarization process, we developed a pendeo-epitaxy technique, for achieving an ultra-thin coalescence of the top p-GaN contact layer, for a self-planarized Qdisks-in-NWs UV-B (280 – 320 nm) LED grown

  4. High Input Voltage Discharge Supply for High Power Hall Thrusters Using Silicon Carbide Devices

    Science.gov (United States)

    Pinero, Luis R.; Scheidegger, Robert J.; Aulsio, Michael V.; Birchenough, Arthur G.

    2014-01-01

    A power processing unit for a 15 kW Hall thruster is under development at NASA Glenn Research Center. The unit produces up to 400 VDC with two parallel 7.5 kW discharge modules that operate from a 300 VDC nominal input voltage. Silicon carbide MOSFETs and diodes were used in this design because they were the best choice to handle the high voltage stress while delivering high efficiency and low specific mass. Efficiencies in excess of 97 percent were demonstrated during integration testing with the NASA-300M 20 kW Hall thruster. Electromagnet, cathode keeper, and heater supplies were also developed and will be integrated with the discharge supply into a vacuum-rated brassboard power processing unit with full flight functionality. This design could be evolved into a flight unit for future missions that requires high power electric propulsion.

  5. A new semicustom integrated bipolar amplifier for silicon strip detectors

    International Nuclear Information System (INIS)

    Zimmerman, T.

    1989-01-01

    The QPA02 is a four channel DC coupled two stage transimpedance amplifier designed at Fermilab on a semicustom linear array (Quickchip 2S) manufactured by Tektronix. The chip was developed as a silicon strip amplifier but may have other applications as well. Each channel consists of a preamplifier and a second stage amplifier/sharper with differential output which can directly drive a transmission line (90 to 140 ohms). External bypass capacitors are the only discrete components required. QPA02 has been tested and demonstrated to be an effective silicon strip amplifier. Other applications may exist which can use this amplifier or a modified version of this amplifier. For example, another design is now in progress for a wire chamber amplifier, QPA03, to be reported later. Only a relatively small effort was required to modify the design and layout for this application. 11 figs

  6. Gallium Phosphide Integrated with Silicon Heterojunction Solar Cells

    Science.gov (United States)

    Zhang, Chaomin

    It has been a long-standing goal to epitaxially integrate III-V alloys with Si substrates which can enable low-cost microelectronic and optoelectronic systems. Among the III-V alloys, gallium phosphide (GaP) is a strong candidate, especially for solar cells applications. Gallium phosphide with small lattice mismatch ( 0.4%) to Si enables coherent/pseudomorphic epitaxial growth with little crystalline defect creation. The band offset between Si and GaP suggests that GaP can function as an electron-selective contact, and it has been theoretically shown that GaP/Si integrated solar cells have the potential to overcome the limitations of common a-Si based heterojunction (SHJ) solar cells. Despite the promising potential of GaP/Si heterojunction solar cells, there are two main obstacles to realize high performance photovoltaic devices from this structure. First, the growth of the polar material (GaP) on the non-polar material (Si) is a challenge in how to suppress the formation of structural defects, such as anti-phase domains (APD). Further, it is widely observed that the minority-carrier lifetime of the Si substrates is significantly decreased during epitaxially growth of GaP on Si. In this dissertation, two different GaP growth methods were compared and analyzed, including migration-enhanced epitaxy (MEE) and traditional molecular beam epitaxy (MBE). High quality GaP can be realized on precisely oriented (001) Si substrates by MBE growth, and the investigation of structural defect creation in the GaP/Si epitaxial structures was conducted using high resolution X-ray diffraction (HRXRD) and high resolution transmission electron microscopy (HRTEM). The mechanisms responsible for lifetime degradation were further investigated, and it was found that external fast diffusors are the origin for the degradation. Two practical approaches including the use of both a SiNx diffusion barrier layer and P-diffused layers, to suppress the Si minority-carrier lifetime degradation

  7. CuO-Functionalized Silicon Photoanodes for Photoelectrochemical Water Splitting Devices.

    Science.gov (United States)

    Shi, Yuanyuan; Gimbert-Suriñach, Carolina; Han, Tingting; Berardi, Serena; Lanza, Mario; Llobet, Antoni

    2016-01-13

    One main difficulty for the technological development of photoelectrochemical (PEC) water splitting (WS) devices is the fabrication of active, stable and cost-effective photoelectrodes that ensure high performance. Here, we report the development of a CuO/Silicon based photoanode, which shows an onset potential for the water oxidation of 0.53 V vs SCE at pH 9, that is, an overpotential of 75 mV, and high stability above 10 h. These values account for a photovoltage of 420 mV due to the absorbed photons by silicon, as proven by comparing with analogous CuO/FTO electrodes that are not photoactive. The photoanodes have been fabricated by sputtering a thin film of Cu(0) on commercially available n-type Si wafers, followed by a photoelectrochemical treatment in basic pH conditions. The resulting CuO/Cu layer acts as (1) protective layer to avoid the corrosion of nSi, (2) p-type hole conducting layer for efficient charge separation and transportation, and (3) electrocatalyst to reduce the overpotential of the water oxidation reaction. The low cost, low toxicity, and good performance of CuO-based coatings can be an attractive solution to functionalize unstable materials for solar energy conversion.

  8. Role of the inversion layer on the charge injection in silicon nanocrystal multilayered light emitting devices

    Energy Technology Data Exchange (ETDEWEB)

    Tondini, S. [Nanoscience Laboratory, Department of Physics, University of Trento, Via Sommarive 14, 38123 Trento (Italy); Dipartimento di Fisica, Informatica e Matematica, Università di Modena e Reggio Emilia, Via Campi 213/a, 41125 Modena (Italy); Pucker, G. [Advanced Photonics and Photovoltaics Group, Bruno Kessler Foundation, Via Sommarive 18, 38123 Trento (Italy); Pavesi, L. [Nanoscience Laboratory, Department of Physics, University of Trento, Via Sommarive 14, 38123 Trento (Italy)

    2016-09-07

    The role of the inversion layer on injection and recombination phenomena in light emitting diodes (LEDs) is here studied on a multilayer (ML) structure of silicon nanocrystals (Si-NCs) embedded in SiO{sub 2}. Two Si-NC LEDs, which are similar for the active material but different in the fabrication process, elucidate the role of the non-radiative recombination rates at the ML/substrate interface. By studying current- and capacitance-voltage characteristics as well as electroluminescence spectra and time-resolved electroluminescence under pulsed and alternating bias pumping scheme in both the devices, we are able to ascribe the different experimental results to an efficient or inefficient minority carrier (electron) supply by the p-type substrate in the metal oxide semiconductor LEDs.

  9. Three-Dimensional Integrated Circuit (3D IC) Key Technology: Through-Silicon Via (TSV).

    Science.gov (United States)

    Shen, Wen-Wei; Chen, Kuan-Neng

    2017-12-01

    3D integration with through-silicon via (TSV) is a promising candidate to perform system-level integration with smaller package size, higher interconnection density, and better performance. TSV fabrication is the key technology to permit communications between various strata of the 3D integration system. TSV fabrication steps, such as etching, isolation, metallization processes, and related failure modes, as well as other characterizations are discussed in this invited review paper.

  10. Synthesis of highly integrated optical network based on microdisk-resonator add-drop filters in silicon-on-insulator technology

    Science.gov (United States)

    Kaźmierczak, Andrzej; Dortu, Fabian; Giannone, Domenico; Bogaerts, Wim; Drouard, Emmanuel; Rojo-Romeo, Pedro; Gaffiot, Frederic

    2009-10-01

    We analyze a highly compact optical add-drop filter topology based on a pair of microdisk resonators and a bus waveguide intersection. The filter is further assessed on an integrated optical 4×4 network for optical on-chip communication. The proposed network structure, as compact as 50×50 μm, is fabricated in a CMOS-compatible process on a silicon-on-insulator (SOI) substrate. Finally, the experimental results demonstrate the proper operation of the fabricated devices.

  11. High-dimensional quantum key distribution based on multicore fiber using silicon photonic integrated circuits

    DEFF Research Database (Denmark)

    Ding, Yunhong; Bacco, Davide; Dalgaard, Kjeld

    2017-01-01

    is intrinsically limited to 1 bit/photon. Here we propose and experimentally demonstrate, for the first time, a high-dimensional quantum key distribution protocol based on space division multiplexing in multicore fiber using silicon photonic integrated lightwave circuits. We successfully realized three mutually......-dimensional quantum states, and enables breaking the information efficiency limit of traditional quantum key distribution protocols. In addition, the silicon photonic circuits used in our work integrate variable optical attenuators, highly efficient multicore fiber couplers, and Mach-Zehnder interferometers, enabling...

  12. Compact polarization beam splitter for silicon photonic integrated circuits with a 340-nm-thick silicon core layer.

    Science.gov (United States)

    Li, Chenlei; Dai, Daoxin

    2017-11-01

    A polarization beam splitter (PBS) is proposed and realized for silicon photonic integrated circuits with a 340-nm-thick silicon core layer by introducing an asymmetric directional coupler (ADC), which consists of a silicon-on-insulator (SOI) nanowire and a subwavelength grating (SWG) waveguide. The SWG is introduced to provide an optical waveguide which has much higher birefringence than a regular 340-nm-thick SOI nanowire, so that it is possible to make the phase-matching condition satisfied for TE polarization only in the present design when the waveguide dimensions are optimized. Meanwhile, there is a significant phase mismatching for TM polarization automatically. In this way, the present ADC enables strong polarization selectivity to realize a PBS that separates TE and TM polarizations to the cross and through ports, respectively. The realized PBS has a length of ∼2  μm for the coupling region. For the fabricated PBS, the extinction ratio (ER) is 15-30 dB and the excess loss is 0.2-2.6 dB for TE polarization while the ER is 20-27 dB and the excess loss is 0.3-2.8 dB for TM polarization when operating in the wavelength range of 1520-1580 nm.

  13. Periodically poled silicon

    Science.gov (United States)

    Hon, Nick K.; Tsia, Kevin K.; Solli, Daniel R.; Khurgin, Jacob B.; Jalali, Bahram

    2010-02-01

    Bulk centrosymmetric silicon lacks second-order optical nonlinearity χ(2) - a foundational component of nonlinear optics. Here, we propose a new class of photonic device which enables χ(2) as well as quasi-phase matching based on periodic stress fields in silicon - periodically-poled silicon (PePSi). This concept adds the periodic poling capability to silicon photonics, and allows the excellent crystal quality and advanced manufacturing capabilities of silicon to be harnessed for devices based on χ(2)) effects. The concept can also be simply achieved by having periodic arrangement of stressed thin films along a silicon waveguide. As an example of the utility, we present simulations showing that mid-wave infrared radiation can be efficiently generated through difference frequency generation from near-infrared with a conversion efficiency of 50% based on χ(2) values measurements for strained silicon reported in the literature [Jacobson et al. Nature 441, 199 (2006)]. The use of PePSi for frequency conversion can also be extended to terahertz generation. With integrated piezoelectric material, dynamically control of χ(2)nonlinearity in PePSi waveguide may also be achieved. The successful realization of PePSi based devices depends on the strength of the stress induced χ(2) in silicon. Presently, there exists a significant discrepancy in the literature between the theoretical and experimentally measured values. We present a simple theoretical model that produces result consistent with prior theoretical works and use this model to identify possible reasons for this discrepancy.

  14. The Marketing Plan: An Integrative Device for Teaching Marketing Management.

    Science.gov (United States)

    Berdine, W. R.; Petersen, James C.

    1980-01-01

    The importance of the marketing plan is stressed as an integrative device for teaching marketing management, and a structure is presented to assist students in designing a marketing plan. Components of this plan include marketing objectives, targeting market and buying motives, external environment and competition, product, price, and promotion.…

  15. Integrating a Silicon Solar Cell with a Triboelectric Nanogenerator via a Mutual Electrode for Harvesting Energy from Sunlight and Raindrops.

    Science.gov (United States)

    Liu, Yuqiang; Sun, Na; Liu, Jiawei; Wen, Zhen; Sun, Xuhui; Lee, Shuit-Tong; Sun, Baoquan

    2018-03-27

    Solar cells, as promising devices for converting light into electricity, have a dramatically reduced performance on rainy days. Here, an energy harvesting structure that integrates a solar cell and a triboelectric nanogenerator (TENG) device is built to realize power generation from both sunlight and raindrops. A heterojunction silicon (Si) solar cell is integrated with a TENG by a mutual electrode of a poly(3,4-ethylenedioxythiophene):poly(styrenesulfonate) (PEDOT:PSS) film. Regarding the solar cell, imprinted PEDOT:PSS is used to reduce light reflection, which leads to an enhanced short-circuit current density. A single-electrode-mode water-drop TENG on the solar cell is built by combining imprinted polydimethylsiloxane (PDMS) as a triboelectric material combined with a PEDOT:PSS layer as an electrode. The increasing contact area between the imprinted PDMS and water drops greatly improves the output of the TENG with a peak short-circuit current of ∼33.0 nA and a peak open-circuit voltage of ∼2.14 V, respectively. The hybrid energy harvesting system integrated electrode configuration can combine the advantages of high current level of a solar cell and high voltage of a TENG device, promising an efficient approach to collect energy from the environment in different weather conditions.

  16. Integrated Solar-Energy-Harvesting and -Storage Device

    Science.gov (United States)

    whitacre, Jay; Fleurial, Jean-Pierre; Mojarradi, Mohammed; Johnson, Travis; Ryan, Margaret Amy; Bugga, Ratnakumar; West, William; Surampudi, Subbarao; Blosiu, Julian

    2004-01-01

    A modular, integrated, completely solid-state system designed to harvest and store solar energy is under development. Called the power tile, the hybrid device consists of a photovoltaic cell, a battery, a thermoelectric device, and a charge-control circuit that are heterogeneously integrated to maximize specific energy capacity and efficiency. Power tiles could be used in a variety of space and terrestrial environments and would be designed to function with maximum efficiency in the presence of anticipated temperatures, temperature gradients, and cycles of sunlight and shadow. Because they are modular in nature, one could use a single power tile or could construct an array of as many tiles as needed. If multiple tiles are used in an array, the distributed and redundant nature of the charge control and distribution hardware provides an extremely fault-tolerant system. The figure presents a schematic view of the device.

  17. Angular sensitivity of modeled scientific silicon charge-coupled devices to initial electron direction

    Energy Technology Data Exchange (ETDEWEB)

    Plimley, Brian, E-mail: brian.plimley@gmail.com [Nuclear Engineering Department, University of California, Berkeley, CA (United States); Coffer, Amy; Zhang, Yigong [Nuclear Engineering Department, University of California, Berkeley, CA (United States); Vetter, Kai [Nuclear Engineering Department, University of California, Berkeley, CA (United States); Nuclear Science Division, Lawrence Berkeley National Laboratory, Berkeley, CA (United States)

    2016-08-11

    Previously, scientific silicon charge-coupled devices (CCDs) with 10.5-μm pixel pitch and a thick (650 μm), fully depleted bulk have been used to measure gamma-ray-induced fast electrons and demonstrate electron track Compton imaging. A model of the response of this CCD was also developed and benchmarked to experiment using Monte Carlo electron tracks. We now examine the trade-off in pixel pitch and electronic noise. We extend our CCD response model to different pixel pitch and readout noise per pixel, including pixel pitch of 2.5 μm, 5 μm, 10.5 μm, 20 μm, and 40 μm, and readout noise from 0 eV/pixel to 2 keV/pixel for 10.5 μm pixel pitch. The CCD images generated by this model using simulated electron tracks are processed by our trajectory reconstruction algorithm. The performance of the reconstruction algorithm defines the expected angular sensitivity as a function of electron energy, CCD pixel pitch, and readout noise per pixel. Results show that our existing pixel pitch of 10.5 μm is near optimal for our approach, because smaller pixels add little new information but are subject to greater statistical noise. In addition, we measured the readout noise per pixel for two different device temperatures in order to estimate the effect of temperature on the reconstruction algorithm performance, although the readout is not optimized for higher temperatures. The noise in our device at 240 K increases the FWHM of angular measurement error by no more than a factor of 2, from 26° to 49° FWHM for electrons between 425 keV and 480 keV. Therefore, a CCD could be used for electron-track-based imaging in a Peltier-cooled device.

  18. A graphene integrated highly transparent resistive switching memory device

    Science.gov (United States)

    Dugu, Sita; Pavunny, Shojan P.; Limbu, Tej B.; Weiner, Brad R.; Morell, Gerardo; Katiyar, Ram S.

    2018-05-01

    We demonstrate the hybrid fabrication process of a graphene integrated highly transparent resistive random-access memory (TRRAM) device. The indium tin oxide (ITO)/Al2O3/graphene nonvolatile memory device possesses a high transmittance of >82% in the visible region (370-700 nm) and exhibits stable and non-symmetrical bipolar switching characteristics with considerably low set and reset voltages (ITO/Al2O3/Pt device and studied its switching characteristics for comparison and a better understanding of the ITO/Al2O3/graphene device characteristics. The conduction mechanisms in high and low resistance states were analyzed, and the observed polarity dependent resistive switching is explained based on electro-migration of oxygen ions.

  19. Integrated programmable photonic filter on the silicon -on- insulator platform

    DEFF Research Database (Denmark)

    Liao, Shasha; Ding, Yunhong; Peucheret, Christophe

    2014-01-01

    We propose and demonstrate a silicon - on - insulator (SOI) on - chip programmable filter based on a four - tap finite impulse response structure. The photonic filter is programmable thanks to amplitude and phase modulation of each tap controlled by thermal heater s. We further demonstrate...... the tunability of the filter central wavelength, bandwidth and variable passband shape. The tuning range of the central wavelength is at least 42% of the free spectral range. The bandwidth tuning range is at least half of the free spectral range. Our scheme has distinct advantages of compactness, capability...

  20. A linear 180 nm SOI CMOS antenna switch module using integrated passive device filters for cellular applications

    International Nuclear Information System (INIS)

    Cui Jie; Chen Lei; Liu Yi; Zhao Peng; Niu Xu

    2014-01-01

    A broadband monolithic linear single pole, eight throw (SP8T) switch has been fabricated in 180 nm thin film silicon-on-insulator (SOI) CMOS technology with a quad-band GSM harmonic filter in integrated passive devices (IPD) technology, which is developed for cellular applications. The antenna switch module (ASM) features 1.2 dB insertion loss with filter on 2G bands and 0.4 dB insertion loss in 3G bands, less than −45 dB isolation and maximum −103 dB intermodulation distortion for mobile front ends by applying distributed architecture and adaptive supply voltage generator. (semiconductor integrated circuits)

  1. Transformational silicon electronics

    KAUST Repository

    Rojas, Jhonathan Prieto

    2014-02-25

    In today\\'s traditional electronics such as in computers or in mobile phones, billions of high-performance, ultra-low-power devices are neatly integrated in extremely compact areas on rigid and brittle but low-cost bulk monocrystalline silicon (100) wafers. Ninety percent of global electronics are made up of silicon. Therefore, we have developed a generic low-cost regenerative batch fabrication process to transform such wafers full of devices into thin (5 μm), mechanically flexible, optically semitransparent silicon fabric with devices, then recycling the remaining wafer to generate multiple silicon fabric with chips and devices, ensuring low-cost and optimal utilization of the whole substrate. We show monocrystalline, amorphous, and polycrystalline silicon and silicon dioxide fabric, all from low-cost bulk silicon (100) wafers with the semiconductor industry\\'s most advanced high-κ/metal gate stack based high-performance, ultra-low-power capacitors, field effect transistors, energy harvesters, and storage to emphasize the effectiveness and versatility of this process to transform traditional electronics into flexible and semitransparent ones for multipurpose applications. © 2014 American Chemical Society.

  2. Silicon photonics fiber-to-the-home transceiver array based on transfer-printing-based integration of III-V photodetectors.

    Science.gov (United States)

    Zhang, Jing; De Groote, Andreas; Abbasi, Amin; Loi, Ruggero; O'Callaghan, James; Corbett, Brian; Trindade, António José; Bower, Christopher A; Roelkens, Gunther

    2017-06-26

    A 4-channel silicon photonics transceiver array for Point-to-Point (P2P) fiber-to-the-home (FTTH) optical networks at the central office (CO) side is demonstrated. A III-V O-band photodetector array was integrated onto the silicon photonic transmitter through transfer printing technology, showing a polarization-independent responsivity of 0.39 - 0.49 A/W in the O-band. The integrated PDs (30 × 40 μm 2 mesa) have a 3 dB bandwidth of 11.5 GHz at -3 V bias. Together with high-speed C-band silicon ring modulators whose bandwidth is up to 15 GHz, operation of the transceiver array at 10 Gbit/s is demonstrated. The use of transfer printing for the integration of the III-V photodetectors allows for an efficient use of III-V material and enables the scalable integration of III-V devices on silicon photonics wafers, thereby reducing their cost.

  3. An innovative large scale integration of silicon nanowire-based field effect transistors

    Science.gov (United States)

    Legallais, M.; Nguyen, T. T. T.; Mouis, M.; Salem, B.; Robin, E.; Chenevier, P.; Ternon, C.

    2018-05-01

    Since the early 2000s, silicon nanowire field effect transistors are emerging as ultrasensitive biosensors while offering label-free, portable and rapid detection. Nevertheless, their large scale production remains an ongoing challenge due to time consuming, complex and costly technology. In order to bypass these issues, we report here on the first integration of silicon nanowire networks, called nanonet, into long channel field effect transistors using standard microelectronic process. A special attention is paid to the silicidation of the contacts which involved a large number of SiNWs. The electrical characteristics of these FETs constituted by randomly oriented silicon nanowires are also studied. Compatible integration on the back-end of CMOS readout and promising electrical performances open new opportunities for sensing applications.

  4. Silicon-Nitride-based Integrated Optofluidic Biochemical Sensors using a Coupled-Resonator Optical Waveguide

    Directory of Open Access Journals (Sweden)

    Jiawei eWANG

    2015-04-01

    Full Text Available Silicon nitride (SiN is a promising material platform for integrating photonic components and microfluidic channels on a chip for label-free, optical biochemical sensing applications in the visible to near-infrared wavelengths. The chip-scale SiN-based optofluidic sensors can be compact due to a relatively high refractive index contrast between SiN and the fluidic medium, and low-cost due to the complementary metal-oxide-semiconductor (CMOS-compatible fabrication process. Here, we demonstrate SiN-based integrated optofluidic biochemical sensors using a coupled-resonator optical waveguide (CROW in the visible wavelengths. The working principle is based on imaging in the far field the out-of-plane elastic-light-scattering patterns of the CROW sensor at a fixed probe wavelength. We correlate the imaged pattern with reference patterns at the CROW eigenstates. Our sensing algorithm maps the correlation coefficients of the imaged pattern with a library of calibrated correlation coefficients to extract a minute change in the cladding refractive index. Given a calibrated CROW, our sensing mechanism in the spatial domain only requires a fixed-wavelength laser in the visible wavelengths as a light source, with the probe wavelength located within the CROW transmission band, and a silicon digital charge-coupled device (CCD / CMOS camera for recording the light scattering patterns. This is in sharp contrast with the conventional optical microcavity-based sensing methods that impose a strict requirement of spectral alignment with a high-quality cavity resonance using a wavelength-tunable laser. Our experimental results using a SiN CROW sensor with eight coupled microrings in the 680nm wavelength reveal a cladding refractive index change of ~1.3 × 10^-4 refractive index unit (RIU, with an average sensitivity of ~281 ± 271 RIU-1 and a noise-equivalent detection limit (NEDL of 1.8 ×10^-8 RIU ~ 1.0 ×10^-4 RIU across the CROW bandwidth of ~1 nm.

  5. In-plane tunnelling field-effecttransistor integrated on Silicon

    Czech Academy of Sciences Publication Activity Database

    Fina, I.; Apachitei, G.; Preziosi, D.; Deniz, H.; Kriegner, D.; Martí, Xavier; Alexe, M.

    2015-01-01

    Roč. 5, Sep (2015), s. 14367 ISSN 2045-2322 Institutional support: RVO:68378271 Keywords : electronic devices * ferroelectrics and multiferroics Subject RIV: BM - Solid Matter Physics ; Magnetism Impact factor: 5.228, year: 2015

  6. Dose patient verification during treatment using an amorphous silicon electronic portal imaging device in radiotherapy

    International Nuclear Information System (INIS)

    Berger, Lucie

    2006-01-01

    Today, amorphous silicon electronic portal imaging devices (aSi EPID) are currently used to check the accuracy of patient positioning. However, they are not use for dose reconstruction yet and more investigations are required to allow the use of an aSi EPID for routine dosimetric verification. The aim of this work is first to study the dosimetric characteristics of the EPID available at the Institut Curie and then, to check patient dose during treatment using these EPID. First, performance optimization of the Varian aS500 EPID system is studied. Then, a quality assurance system is set up in order to certify the image quality on a daily basis. An additional study on the dosimetric performance of the aS500 EPID is monitored to assess operational stability for dosimetry applications. Electronic portal imaging device is also a useful tool to improve IMRT quality control. The validation and the quality assurance of a portal dose image prediction system for IMRT pre-treatment quality control are performed. All dynamic IMRT fields are verified in clinical routine with the new method based on portal dosimetry. Finally, a new formalism for in vivo dosimetry using transit dose measured with EPID is developed and validated. The absolute dose measurement issue using aSi EPID is described and the midplane dose determination using in vivo dose measurements in combination with portal imaging is used with 3D-conformal-radiation therapy. (author) [fr

  7. Predicting the valley physics of silicon quantum dots directly from a device layout

    Science.gov (United States)

    Gamble, John King; Harvey-Collard, Patrick; Jacobson, N. Tobias; Bacewski, Andrew D.; Nielsen, Erik; Montaño, Inès; Rudolph, Martin; Carroll, Malcolm S.; Muller, Richard P.

    Qubits made from electrostatically-defined quantum dots in Si-based systems are excellent candidates for quantum information processing applications. However, the multi-valley structure of silicon's band structure provides additional challenges for the few-electron physics critical to qubit manipulation. Here, we present a theory for valley physics that is predictive, in that we take as input the real physical device geometry and experimental voltage operation schedule, and with minimal approximation compute the resulting valley physics. We present both effective mass theory and atomistic tight-binding calculations for two distinct metal-oxide-semiconductor (MOS) quantum dot systems, directly comparing them to experimental measurements of the valley splitting. We conclude by assessing these detailed simulations' utility for engineering desired valley physics in future devices. Sandia is a multi-program laboratory managed and operated by Sandia Corporation, a wholly owned subsidiary of Lockheed Martin Corporation, for the US Department of Energy's National Nuclear Security Administration under Contract No. DE-AC04-94AL85000. The authors gratefully acknowledge support from the Sandia National Laboratories Truman Fellowship Program, which is funded by the Laboratory Directed Research and Development (LDRD) Program.

  8. Dielectrophoretic trapping of DNA-coated gold nanoparticles on silicon based vertical nanogap devices.

    Science.gov (United States)

    Strobel, Sebastian; Sperling, Ralph A; Fenk, Bernhard; Parak, Wolfgang J; Tornow, Marc

    2011-06-07

    We report on the successful dielectrophoretic trapping and electrical characterization of DNA-coated gold nanoparticles on vertical nanogap devices (VNDs). The nanogap devices with an electrode distance of 13 nm were fabricated from Silicon-on-Insulator (SOI) material using a combination of anisotropic reactive ion etching (RIE), selective wet chemical etching and metal thin-film deposition. Au nanoparticles (diameter 40 nm) coated with a monolayer of dithiolated 8 base pairs double stranded DNA were dielectrophoretically trapped into the nanogap from electrolyte buffer solution at MHz frequencies as verified by scanning and transmission electron microscopy (SEM/TEM) analysis. First electrical transport measurements through the formed DNA-Au-DNA junctions partially revealed an approximately linear current-voltage characteristic with resistance in the range of 2-4 GΩ when measured in solution. Our findings point to the importance of strong covalent bonding to the electrodes in order to observe DNA conductance, both in solution and in the dry state. We propose our setup for novel applications in biosensing, addressing the direct interaction of biomolecular species with DNA in aqueous electrolyte media.

  9. Commercial power silicon devices as possible routine dosimeters for radiation processing

    International Nuclear Information System (INIS)

    Fuochi, P.G.; Lavalle, M.; Gombia, E.; Mosca, R.; Kovacs, A.V.; Hargittai, P.; Vitanza, A.; Patti, A.

    2001-01-01

    The use of silicon devices as possible radiation dosimeters has been investigated in this study. A bipolar power transistor in TO126 plastic packaging has been selected. Irradiations, with doses in the range from 50 Gy up to 5 kGy, have been performed at room temperature using different radiation sources ( 60 Co g source, 2.5, 4 and 12 MeV electron accelerators). Few irradiations with g rays were also done at different temperatures. A physical parameter, T, related to the charge carrier lifetime, has been found to change as a function of irradiation dose. This change is radiation energy dependent. Long term stability of the electron irradiated transistors has been checked by means of a reliability test ('high temperature reverse bias', HTRB) at 150 deg. C for 1000 h. Deep level transient spectroscopy (DLTS) measurements have been performed on the irradiated devices to identify the recombination centres introduced by the radiation treatment. The results obtained confirm that these transistors could be used as routine radiation dosimeters in a certain dose range. More work needs to be done particularly with g rays in the low dose region (50-200 Gy) and with low energy electrons. (author)

  10. Device and material characterization and analytic modeling of amorphous silicon thin film transistors

    Science.gov (United States)

    Slade, Holly Claudia

    Hydrogenated amorphous silicon thin film transistors (TFTs) are now well-established as switching elements for a variety of applications in the lucrative electronics market, such as active matrix liquid crystal displays, two-dimensional imagers, and position-sensitive radiation detectors. These applications necessitate the development of accurate characterization and simulation tools. The main goal of this work is the development of a semi- empirical, analytical model for the DC and AC operation of an amorphous silicon TFT for use in a manufacturing facility to improve yield and maintain process control. The model is physically-based, in order that the parameters scale with gate length and can be easily related back to the material and device properties. To accomplish this, extensive experimental data and 2D simulations are used to observe and quantify non- crystalline effects in the TFTs. In particular, due to the disorder in the amorphous network, localized energy states exist throughout the band gap and affect all regimes of TFT operation. These localized states trap most of the free charge, causing a gate-bias-dependent field effect mobility above threshold, a power-law dependence of the current on gate bias below threshold, very low leakage currents, and severe frequency dispersion of the TFT gate capacitance. Additional investigations of TFT instabilities reveal the importance of changes in the density of states and/or back channel conduction due to bias and thermal stress. In the above threshold regime, the model is similar to the crystalline MOSFET model, considering the drift component of free charge. This approach uses the field effect mobility to take into account the trap states and must utilize the correct definition of threshold voltage. In the below threshold regime, the density of deep states is taken into account. The leakage current is modeled empirically, and the parameters are temperature dependent to 150oC. The capacitance of the TFT can be

  11. Mobility and Device Applications of Heavily Doped Silicon and Strained SILICON(1-X) Germanium(x) Layers

    Science.gov (United States)

    Carns, Timothy Keith

    With the advent of Si molecular beam epitaxy (Si -MBE), a significant amount of research has occurred to seek alternative high conductivity Si-based materials such as rm Si_{1-x}Ge_ {x} and delta-doped Si. These materials have brought improvements in device speeds and current drives with the added advantage of monolithic integration into Si VLSI circuits. The bulk of research in Si-based materials has been devoted to the implementation of strained rm Si_{1-x}Ge_{x} as the base layer of a rm Si_ {1-x}Ge_{x}/Si heterojunction bipolar transistor (HBT). Because of the valence band offset, the rm Si_{1-x}Ge _{x} layer can be heavily doped, leading to lower base sheet resistances and hence, improved speed performances. The Ge content in the base can also be graded to increase the drift field in the base. However, very few hole mobility measurements have been done in these strained layers, leading to limitations in device modeling and in understanding the transport behavior in this important material. In addition to rm Si_{1 -x}Ge_{x}, much potential also exists in using delta-doping in Si for improved conductivities over those of bulk Si. However, as of yet, delta-doped Si has received little attention. Therefore, this dissertation is dedicated to the investigation of both of these Si-based materials (strained rm Si_{1-x}Ge_{x } and delta-doped Si and rm Si_{1-x}Ge_ {x}) for the purpose of obtaining higher conductivities than comparably doped bulk Si. This work is divided into three parts to accomplish this objective. The first part is contained in Chapter 3 and is comprised of a comprehensive characterization of the hole mobility in compressively strained rm Si_{1 -x}Ge_{x}. Few results have been obtained prior to this research which has led to many inaccuracies in device modeling. The second part of this dissertation in Chapters 4 and 5 is devoted to the study of the mobility behavior in both boron and antimony delta-doped Si and rm Si_ {1-x}Ge_{x}. The important

  12. Deuterated silicon nitride photonic devices for broadband optical frequency comb generation

    Science.gov (United States)

    Chiles, Jeff; Nader, Nima; Hickstein, Daniel D.; Yu, Su Peng; Briles, Travis Crain; Carlson, David; Jung, Hojoong; Shainline, Jeffrey M.; Diddams, Scott; Papp, Scott B.; Nam, Sae Woo; Mirin, Richard P.

    2018-04-01

    We report and characterize low-temperature, plasma-deposited deuterated silicon nitride thin films for nonlinear integrated photonics. With a peak processing temperature less than 300$^\\circ$C, it is back-end compatible with pre-processed CMOS substrates. We achieve microresonators with a quality factor of up to $1.6\\times 10^6 $ at 1552 nm, and $>1.2\\times 10^6$ throughout $\\lambda$ = 1510 -- 1600 nm, without annealing or stress management. We then demonstrate the immediate utility of this platform in nonlinear photonics by generating a 1 THz free spectral range, 900-nm-bandwidth modulation-instability microresonator Kerr comb and octave-spanning, supercontinuum-broadened spectra.

  13. Integrated biocircuits: engineering functional multicellular circuits and devices

    Science.gov (United States)

    Prox, Jordan; Smith, Tory; Holl, Chad; Chehade, Nick; Guo, Liang

    2018-04-01

    Objective. Implantable neurotechnologies have revolutionized neuromodulatory medicine for treating the dysfunction of diseased neural circuitry. However, challenges with biocompatibility and lack of full control over neural network communication and function limits the potential to create more stable and robust neuromodulation devices. Thus, we propose a platform technology of implantable and programmable cellular systems, namely Integrated Biocircuits, which use only cells as the functional components of the device. Approach. We envision the foundational principles for this concept begins with novel in vitro platforms used for the study and reconstruction of cellular circuitry. Additionally, recent advancements in organoid and 3D culture systems account for microenvironment factors of cytoarchitecture to construct multicellular circuits as they are normally formed in the brain. We explore the current state of the art of these platforms to provide knowledge of their advancements in circuit fabrication and identify the current biological principles that could be applied in designing integrated biocircuit devices. Main results. We have highlighted the exemplary methodologies and techniques of in vitro circuit fabrication and propose the integration of selected controllable parameters, which would be required in creating suitable biodevices. Significance. We provide our perspective and propose new insights into the future of neuromodulaion devices within the scope of living cellular systems that can be applied in designing more reliable and biocompatible stimulation-based neuroprosthetics.

  14. Miniaturized flow cytometer with 3D hydrodynamic particle focusing and integrated optical elements applying silicon photodiodes

    NARCIS (Netherlands)

    Rosenauer, M.; Buchegger, W.; Finoulst, I.; Verhaert, P.D.E.M.; Vellekoop, M.

    2010-01-01

    In this study, the design, realization and measurement results of a novel optofluidic system capable of performing absorbance-based flow cytometric analysis is presented. This miniaturized laboratory platform, fabricated using SU-8 on a silicon substrate, comprises integrated polymer-based

  15. Realization of an integrated VDF/TrFE copolymer-on-silicon pyroelectric sensor

    NARCIS (Netherlands)

    Setiadi, D.; Setiadi, D.; Regtien, Paulus P.L.; Sarro, P.M.

    1995-01-01

    An integrated pyroelectric sensor based on a vinylidene fluoride trifluoroethylene (VDF/TrFE) copolymer is presented. A silicon substrate that contains FET readout electronics is coated with the VDF/TrFE copolymer film using a spin-coating technique. On-chip poling of the copolymer has been applied

  16. Towards a fully integrated indium-phosphide membrane on silicon photonics platform

    NARCIS (Netherlands)

    van Engelen, J.P.; Pogoretskiy, V.; Smit, M.K.; van der Tol, J.J.G.M.; Jiao, Y.

    2017-01-01

    Recently a uni-traveling-carrier photodetector with high speed (> 67GHz) and a high-gain optical amplifier (110/cm at 4 kA/cm2) have been demonstrated using the InP membrane-on-Silicon (IMOS) integration technology. Passives in IMOS have shown features comparable to SOI platforms due to the tight

  17. Hybrid integrated single-wavelength laser with silicon micro-ring reflector

    Science.gov (United States)

    Ren, Min; Pu, Jing; Krishnamurthy, Vivek; Xu, Zhengji; Lee, Chee-Wei; Li, Dongdong; Gonzaga, Leonard; Toh, Yeow T.; Tjiptoharsono, Febi; Wang, Qian

    2018-02-01

    A hybrid integrated single-wavelength laser with silicon micro-ring reflector is demonstrated theoretically and experimentally. It consists of a heterogeneously integrated III-V section for optical gain, an adiabatic taper for light coupling, and a silicon micro-ring reflector for both wavelength selection and light reflection. Heterogeneous integration processes for multiple III-V chips bonded to an 8-inch Si wafer have been developed, which is promising for massive production of hybrid lasers on Si. The III-V layer is introduced on top of a 220-nm thick SOI layer through low-temperature wafer-boning technology. The optical coupling efficiency of >85% between III-V and Si waveguide has been achieved. The silicon micro-ring reflector, as the key element of the hybrid laser, is studied, with its maximized reflectivity of 85.6% demonstrated experimentally. The compact single-wavelength laser enables fully monolithic integration on silicon wafer for optical communication and optical sensing application.

  18. Analysis and wafer-level design of a high-order silicon vibration isolator for resonating MEMS devices

    International Nuclear Information System (INIS)

    Yoon, Sang Won; Lee, Sangwoo; Najafi, Khalil; Perkins, Noel C

    2011-01-01

    This paper presents the analysis and preliminary design, fabrication, and measurement for mechanical vibration-isolation platforms especially designed for resonating MEMS devices including gyroscopes. Important parameters for designing isolation platforms are specified and the first platform (in designs with cascaded multiple platforms) is crucial for improving vibration-isolation performance and minimizing side-effects on integrated gyroscopes. This isolation platform, made from a thick silicon wafer substrate for an environment-resistant MEMS package, incorporates the functionalities of a previous design including vacuum packaging and thermal resistance with no additional resources. This platform consists of platform mass, isolation beams, vertical feedthroughs, and bonding pads. Two isolation platform designs follow from two isolation beam designs: lateral clamped–clamped beams and vertical torsion beams. The beams function simultaneously as mechanical springs and electrical interconnects. The vibration-isolation platform can yield a multi-dimensional, high-order mechanical low pass filter. The isolation platform possesses eight interconnects within a 12.2 × 12.2 mm 2 footprint. The contact resistance ranges from 4–11 Ω depending on the beam design. Vibration measurements using a laser-Doppler vibrometer demonstrate that the lateral vibration-isolation platform suppresses external vibration having frequencies exceeding 2.1 kHz.

  19. Performance of current-in-plane pseudo-spin-valve devices on CMOS silicon-on-insulator underlayers

    Science.gov (United States)

    Katti, R. R.; Zou, D.; Reed, D.; Schipper, D.; Hynes, O.; Shaw, G.; Kaakani, H.

    2003-05-01

    Prior work has shown that current-in-plane (CIP) giant magnetoresistive (GMR) pseudo-spin-valve (PSV) devices grown on bulk Si wafers and bulk complementary metal-oxide semiconductor (CMOS) underlayers exhibit write and read characteristics that are suitable for application as nonvolatile memory devices. In this work, CIP GMR PSV devices fabricated on silicon-on-insulator CMOS underlayers are shown to support write and read performance. Reading and writing fields for selected devices are shown to be approximately 25%-50% that of unselected devices, which provides a margin for reading and writing specific bits in a memory without overwriting bits and without disturbing other bits. The switching characteristics of experimental devices were compared to and found to be similar with Landau-Lifschitz-Gilbert micromagnetic modeling results, which allowed inferring regions of reversible and irreversible rotations in magnetic reversal processes.

  20. Comparison of costs of integrating working level devices

    International Nuclear Information System (INIS)

    Langner, G.H. Jr.

    1977-01-01

    For the purpose of deciding upon the method for making routine field measurements of radon and radon daughter products there are primarily two factors to be taken into consideration: how well the various methods measure the parameter of interest and how much they cost. For the purpose of measuring the annual average working level within a structure there are available basically two devices: the integrating air sampler and track etch film. The cost and manpower requirements for each of these two devices are discussed

  1. Integration of semiconductor and ceramic superconductor devices for microwave applications

    International Nuclear Information System (INIS)

    Klopman, B.B.G.; Weijers, H.W.; Gao, J.; Gerritsma, G.J.; Rogalla, H.

    1991-01-01

    Due to the very low-loss properties of ceramic superconductors high-performance microwave resonators and filters can be realized. The fact that these devices may be operated at liquid nitrogen temperature, facilitates the integration with semiconductor devices. Examples are bandpass amplifiers, microwave-operated SQUIDs combined with GaAs preamplifiers, detectors, and MOSFET low-frequency amplifiers. This paper discusses the design of such circuits on a single one inch alumina substrate using surface mount techniques. Furthermore data on circuits that have been realized in our laboratory will be presented

  2. Integration Head Mounted Display Device and Hand Motion Gesture Device for Virtual Reality Laboratory

    Science.gov (United States)

    Rengganis, Y. A.; Safrodin, M.; Sukaridhoto, S.

    2018-01-01

    Virtual Reality Laboratory (VR Lab) is an innovation for conventional learning media which show us whole learning process in laboratory. There are many tools and materials are needed by user for doing practical in it, so user could feel new learning atmosphere by using this innovation. Nowadays, technologies more sophisticated than before. So it would carry in education and it will be more effective, efficient. The Supported technologies are needed us for making VR Lab such as head mounted display device and hand motion gesture device. The integration among them will be used us for making this research. Head mounted display device for viewing 3D environment of virtual reality laboratory. Hand motion gesture device for catching user real hand and it will be visualized in virtual reality laboratory. Virtual Reality will show us, if using the newest technologies in learning process it could make more interesting and easy to understand.

  3. The Integration of Bacteriorhodopsin Proteins with Semiconductor Heterostructure Devices

    Science.gov (United States)

    Xu, Jian

    2008-03-01

    Bioelectronics has emerged as one of the most rapidly developing fields among the active frontiers of interdisciplinary research. A major thrust in this field is aimed at the coupling of the technologically-unmatched performance of biological systems, such as neural and sensing functions, with the well developed technology of microelectronics and optoelectronics. To this end we have studied the integration of a suitably engineered protein, bacteriorhodopsin (BR), with semiconductor optoelectronic devices and circuits. Successful integration will potentially lead to ultrasensitive sensors with polarization selectivity and built-in preprocessing capabilities that will be useful for high speed tracking, motion and edge detection, biological detection, and artificial vision systems. In this presentation we will summarize our progresses in this area, which include fundamental studies on the transient dynamics of photo-induced charge shift in BR and the coupling mechanism at protein-semiconductor interface for effective immobilizing and selectively integrating light sensitive proteins with microelectronic devices and circuits, and the device engineering of BR-transistor-integrated optical sensors as well as their applications in phototransceiver circuits. Work done in collaboration with Pallab Bhattacharya, Jonghyun Shin, Department of Electrical Engineering and Computer Science, University of Michigan, Ann Arbor, MI; Robert R. Birge, Department of Chemistry, University of Connecticut, Storrs, CT 06269; and György V'ar'o, Institute of Biophysics, Biological Research Center of the Hungarian Academy of Science, H-6701 Szeged, Hungary.

  4. Study of hydrogenated amorphous silicon devices under intense electric field: application to nuclear detection

    International Nuclear Information System (INIS)

    Ilie, A.

    1996-01-01

    The goal of this work was the study, development and optimization of hydrogenated amorphous silicon (a-Si:H) devices for use in detection of ionizing radiation in applications connected to the nuclear industry. Thick p-i-n devices, capable of withstanding large electric fields (up to 10 6 V/cm) with small currents (nA/cm 2 ), were proposed and developed. In order to decrease fabrication time, films were made using the 'He diluted' PECVD process and compared to standard a-Si:H films. Aspects connected to specific detector applications as well as to the fundamental physics of a-Si:H were considered: the internal electric field technique, in which the depletion charge was measured as a function of the applied bias voltage; study of the leakage current of p-i-n devices permitted us to demonstrate different regimes: depletion, field-enhanced thermal generation and electronic injection across the p layer. The effect of the electric field on the thermal generation of the carriers was studied considering the Poole-Frenkel and tunneling mechanisms. A model was developed taking under consideration the statistics of the correlated states and electron-phonon coupling. The results suggest that mechanisms not included in the 'standard model' of a Si:h need to be considered, such as defect relaxation, a filed-dependent mobility edge etc...; a new metastable phenomenon, called 'forming', induced by prolonged exposure to a strong electric field, was observed and studied. It is characterized by marked decrease of the leakage current and the detector noise, and increase in the breakdown voltage, as well as an improvement of carrier collection efficiency. This forming process appears to be principally due to an activation of the dopants in the p layer; finally, the capacity of thick p-i-n a Si:H devices to detect ionizing radiation has been evaluated. We show that it is possible, with 20-50 micron thick p-i-n devices, to detect the full spectrum of alpha and beta particles. With an

  5. A design approach for integrating thermoelectric devices using topology optimization

    DEFF Research Database (Denmark)

    Soprani, Stefano; Haertel, Jan Hendrik Klaas; Lazarov, Boyan Stefanov

    2016-01-01

    Efficient operation of thermoelectric devices strongly relies on the thermal integration into the energy conversion system in which they operate. Effective thermal integration reduces the temperature differences between the thermoelectric module and its thermal reservoirs, allowing the system...... to operate more efficiently. This work proposes and experimentally demonstrates a topology optimization approach as a design tool for efficient integration of thermoelectric modules into systems with specific design constraints. The approach allows thermal layout optimization of thermoelectric systems...... for different operating conditions and objective functions, such as temperature span, efficiency, and power recoveryrate. As a specific application, the integration of a thermoelectric cooler into the electronics section ofa downhole oil well intervention tool is investigated, with the objective of minimizing...

  6. Integrating a dual-silicon photoelectrochemical cell into a redox flow battery for unassisted photocharging.

    Science.gov (United States)

    Liao, Shichao; Zong, Xu; Seger, Brian; Pedersen, Thomas; Yao, Tingting; Ding, Chunmei; Shi, Jingying; Chen, Jian; Li, Can

    2016-05-04

    Solar rechargeable flow cells (SRFCs) provide an attractive approach for in situ capture and storage of intermittent solar energy via photoelectrochemical regeneration of discharged redox species for electricity generation. However, overall SFRC performance is restricted by inefficient photoelectrochemical reactions. Here we report an efficient SRFC based on a dual-silicon photoelectrochemical cell and a quinone/bromine redox flow battery for in situ solar energy conversion and storage. Using narrow bandgap silicon for efficient photon collection and fast redox couples for rapid interface charge injection, our device shows an optimal solar-to-chemical conversion efficiency of ∼5.9% and an overall photon-chemical-electricity energy conversion efficiency of ∼3.2%, which, to our knowledge, outperforms previously reported SRFCs. The proposed SRFC can be self-photocharged to 0.8 V and delivers a discharge capacity of 730 mAh l(-1). Our work may guide future designs for highly efficient solar rechargeable devices.

  7. A Sensor Middleware for integration of heterogeneous medical devices.

    Science.gov (United States)

    Brito, M; Vale, L; Carvalho, P; Henriques, J

    2010-01-01

    In this paper, the architecture of a modular, service-oriented, Sensor Middleware for data acquisition and processing is presented. The described solution was developed with the purpose of solving two increasingly relevant problems in the context of modern pHealth systems: i) to aggregate a number of heterogeneous, off-the-shelf, devices from which clinical measurements can be acquired and ii) to provide access and integration with an 802.15.4 network of wearable sensors. The modular nature of the Middleware provides the means to easily integrate pre-processing algorithms into processing pipelines, as well as new drivers for adding support for new sensor devices or communication technologies. Tests performed with both real and artificially generated data streams show that the presented solution is suitable for use both in a Windows PC or a Windows Mobile PDA with minimal overhead.

  8. Methods for integrating a functional component into a microfluidic device

    Science.gov (United States)

    Simmons, Blake; Domeier, Linda; Woo, Noble; Shepodd, Timothy; Renzi, Ronald F.

    2014-08-19

    Injection molding is used to form microfluidic devices with integrated functional components. One or more functional components are placed in a mold cavity, which is then closed. Molten thermoplastic resin is injected into the mold and then cooled, thereby forming a solid substrate including the functional component(s). The solid substrate including the functional component(s) is then bonded to a second substrate, which may include microchannels or other features.

  9. Wearable Fall Detector using Integrated Sensors and Energy Devices

    Science.gov (United States)

    Jung, Sungmook; Hong, Seungki; Kim, Jaemin; Lee, Sangkyu; Hyeon, Taeghwan; Lee, Minbaek; Kim, Dae-Hyeong

    2015-11-01

    Wearable devices have attracted great attentions as next-generation electronic devices. For the comfortable, portable, and easy-to-use system platform in wearable electronics, a key requirement is to replace conventional bulky and rigid energy devices into thin and deformable ones accompanying the capability of long-term energy supply. Here, we demonstrate a wearable fall detection system composed of a wristband-type deformable triboelectric generator and lithium ion battery in conjunction with integrated sensors, controllers, and wireless units. A stretchable conductive nylon is used as electrodes of the triboelectric generator and the interconnection between battery cells. Ethoxylated polyethylenimine, coated on the surface of the conductive nylon electrode, tunes the work function of a triboelectric generator and maximizes its performance. The electrical energy harvested from the triboelectric generator through human body motions continuously recharges the stretchable battery and prolongs hours of its use. The integrated energy supply system runs the 3-axis accelerometer and related electronics that record human body motions and send the data wirelessly. Upon the unexpected fall occurring, a custom-made software discriminates the fall signal and an emergency alert is immediately sent to an external mobile device. This wearable fall detection system would provide new opportunities in the mobile electronics and wearable healthcare.

  10. Ultra-thin silicon (UTSi) on insulator CMOS transceiver and time-division multiplexed switch chips for smart pixel integration

    Science.gov (United States)

    Zhang, Liping; Sawchuk, Alexander A.

    2001-12-01

    We describe the design, fabrication and functionality of two different 0.5 micron CMOS optoelectronic integrated circuit (OEIC) chips based on the Peregrine Semiconductor Ultra-Thin Silicon on insulator technology. The Peregrine UTSi silicon- on-sapphire (SOS) technology is a member of the silicon-on- insulator (SOI) family. The low-loss synthetic sapphire substrate is optically transparent and has good thermal conductivity and coefficient of thermal expansion properties, which meet the requirements for flip-chip bonding of VCSELs and other optoelectronic input-output components. One chip contains transceiver and network components, including four channel high-speed CMOS transceiver modules, pseudo-random bit stream (PRBS) generators, a voltage controlled oscillator (VCO) and other test circuits. The transceiver chips can operate in both self-testing mode and networking mode. An on- chip clock and true-single-phase-clock (TSPC) D-flip-flop have been designed to generate a PRBS at over 2.5 Gb/s for the high-speed transceiver arrays to operate in self-testing mode. In the networking mode, an even number of transceiver chips forms a ring network through free-space or fiber ribbon interconnections. The second chip contains four channel optical time-division multiplex (TDM) switches, optical transceiver arrays, an active pixel detector and additional test devices. The eventual applications of these chips will require monolithic OEICs with integrated optical input and output. After fabrication and testing, the CMOS transceiver array dies will be packaged with 850 nm vertical cavity surface emitting lasers (VCSELs), and metal-semiconductor- metal (MSM) or GaAs p-i-n detector die arrays to achieve high- speed optical interconnections. The hybrid technique could be either wire bonding or flip-chip bonding of the CMOS SOS smart-pixel arrays with arrays of VCSELs and photodetectors onto an optoelectronic chip carrier as a multi-chip module (MCM).

  11. Chalcogenide Glass Lasers on Silicon Substrate Integrated Photonics

    Science.gov (United States)

    2016-07-08

    driven optoacoustic devices that permit stable GHz mode-locking of fiber ring lasers; bright deep and vacuum UV sources based on gas-filled hollow core ...topological insulators with ultracold atoms. Bio: Wolfgang Ketterle has been the John D. MacArthur professor of physics at MIT since 1998. He leads...remarkable enhancements (and in some cases reductions) in many kinds of light-matter interaction. Recent examples include the solid core PCFs widely

  12. A design approach for integrating thermoelectric devices using topology optimization

    International Nuclear Information System (INIS)

    Soprani, S.; Haertel, J.H.K.; Lazarov, B.S.; Sigmund, O.; Engelbrecht, K.

    2016-01-01

    Highlights: • The integration of a thermoelectric (TE) cooler into a robotic tool is optimized. • Topology optimization is suggested as design tool for TE integrated systems. • A 3D optimization technique using temperature dependent TE properties is presented. • The sensitivity of the optimization process to the boundary conditions is studied. • A working prototype is constructed and compared to the model results. - Abstract: Efficient operation of thermoelectric devices strongly relies on the thermal integration into the energy conversion system in which they operate. Effective thermal integration reduces the temperature differences between the thermoelectric module and its thermal reservoirs, allowing the system to operate more efficiently. This work proposes and experimentally demonstrates a topology optimization approach as a design tool for efficient integration of thermoelectric modules into systems with specific design constraints. The approach allows thermal layout optimization of thermoelectric systems for different operating conditions and objective functions, such as temperature span, efficiency, and power recovery rate. As a specific application, the integration of a thermoelectric cooler into the electronics section of a downhole oil well intervention tool is investigated, with the objective of minimizing the temperature of the cooled electronics. Several challenges are addressed: ensuring effective heat transfer from the load, minimizing the thermal resistances within the integrated system, maximizing the thermal protection of the cooled zone, and enhancing the conduction of the rejected heat to the oil well. The design method incorporates temperature dependent properties of the thermoelectric device and other materials. The 3D topology optimization model developed in this work was used to design a thermoelectric system, complete with insulation and heat sink, that was produced and tested. Good agreement between experimental results and

  13. A CMOS microdisplay with integrated controller utilizing improved silicon hot carrier luminescent light sources

    Science.gov (United States)

    Venter, Petrus J.; Alberts, Antonie C.; du Plessis, Monuko; Joubert, Trudi-Heleen; Goosen, Marius E.; Janse van Rensburg, Christo; Rademeyer, Pieter; Fauré, Nicolaas M.

    2013-03-01

    Microdisplay technology, the miniaturization and integration of small displays for various applications, is predominantly based on OLED and LCoS technologies. Silicon light emission from hot carrier electroluminescence has been shown to emit light visibly perceptible without the aid of any additional intensification, although the electrical to optical conversion efficiency is not as high as the technologies mentioned above. For some applications, this drawback may be traded off against the major cost advantage and superior integration opportunities offered by CMOS microdisplays using integrated silicon light sources. This work introduces an improved version of our previously published microdisplay by making use of new efficiency enhanced CMOS light emitting structures and an increased display resolution. Silicon hot carrier luminescence is often created when reverse biased pn-junctions enter the breakdown regime where impact ionization results in carrier transport across the junction. Avalanche breakdown is typically unwanted in modern CMOS processes. Design rules and process design are generally tailored to prevent breakdown, while the voltages associated with breakdown are too high to directly interact with the rest of the CMOS standard library. This work shows that it is possible to lower the operating voltage of CMOS light sources without compromising the optical output power. This results in more efficient light sources with improved interaction with other standard library components. This work proves that it is possible to create a reasonably high resolution microdisplay while integrating the active matrix controller and drivers on the same integrated circuit die without additional modifications, in a standard CMOS process.

  14. Integration of active devices on smart polymers for neural interfaces

    Science.gov (United States)

    Avendano-Bolivar, Adrian Emmanuel

    The increasing ability to ever more precisely identify and measure neural interactions and other phenomena in the central and peripheral nervous systems is revolutionizing our understanding of the human body and brain. To facilitate further understanding, more sophisticated neural devices, perhaps using microelectronics processing, must be fabricated. Materials often used in these neural interfaces, while compatible with these fabrication processes, are not optimized for long-term use in the body and are often orders of magnitude stiffer than the tissue with which they interact. Using the smart polymer substrates described in this work, suitability for processing as well as chronic implantation is demonstrated. We explore how to integrate reliable circuitry onto these flexible, biocompatible substrates that can withstand the aggressive environment of the body. To increase the capabilities of these devices beyond individual channel sensing and stimulation, active electronics must also be included onto our systems. In order to add this functionality to these substrates and explore the limits of these devices, we developed a process to fabricate single organic thin film transistors with mobilities up to 0.4 cm2/Vs and threshold voltages close to 0V. A process for fabricating organic light emitting diodes on flexible substrates is also addressed. We have set a foundation and demonstrated initial feasibility for integrating multiple transistors onto thin-film flexible devices to create new applications, such as matrix addressable functionalized electrodes and organic light emitting diodes. A brief description on how to integrate waveguides for their use in optogenetics is addressed. We have built understanding about device constraints on mechanical, electrical and in vivo reliability and how various conditions affect the electronics' lifetime. We use a bi-layer gate dielectric using an inorganic material such as HfO 2 combined with organic Parylene-c. A study of

  15. Nanowire decorated, ultra-thin, single crystalline silicon for photovoltaic devices.

    Science.gov (United States)

    Aurang, Pantea; Turan, Rasit; Unalan, Husnu Emrah

    2017-10-06

    Reducing silicon (Si) wafer thickness in the photovoltaic industry has always been demanded for lowering the overall cost. Further benefits such as short collection lengths and improved open circuit voltages can also be achieved by Si thickness reduction. However, the problem with thin films is poor light absorption. One way to decrease optical losses in photovoltaic devices is to minimize the front side reflection. This approach can be applied to front contacted ultra-thin crystalline Si solar cells to increase the light absorption. In this work, homojunction solar cells were fabricated using ultra-thin and flexible single crystal Si wafers. A metal assisted chemical etching method was used for the nanowire (NW) texturization of ultra-thin Si wafers to compensate weak light absorption. A relative improvement of 56% in the reflectivity was observed for ultra-thin Si wafers with the thickness of 20 ± 0.2 μm upon NW texturization. NW length and top contact optimization resulted in a relative enhancement of 23% ± 5% in photovoltaic conversion efficiency.

  16. Simulated human eye retina adaptive optics imaging system based on a liquid crystal on silicon device

    International Nuclear Information System (INIS)

    Jiang Baoguang; Cao Zhaoliang; Mu Quanquan; Hu Lifa; Li Chao; Xuan Li

    2008-01-01

    In order to obtain a clear image of the retina of model eye, an adaptive optics system used to correct the wave-front error is introduced in this paper. The spatial light modulator that we use here is a liquid crystal on a silicon device instead of a conversional deformable mirror. A paper with carbon granule is used to simulate the retina of human eye. The pupil size of the model eye is adjustable (3-7 mm). A Shack–Hartman wave-front sensor is used to detect the wave-front aberration. With this construction, a value of peak-to-valley is achieved to be 0.086 λ, where λ is wavelength. The modulation transfer functions before and after corrections are compared. And the resolution of this system after correction (691p/m) is very close to the dirraction limit resolution. The carbon granule on the white paper which has a size of 4.7 μm is seen clearly. The size of the retina cell is between 4 and 10 mu;m. So this system has an ability to image the human eye's retina. (classical areas of phenomenology)

  17. Comprehensive device Simulation modeling of heavily irradiated silicon detectors at cryogenic temperatures

    CERN Document Server

    Moscatelli, F; MacEvoy, B; Hall, G; Passeri, D; Petasecca, M; Pignatel, Giogrio Umberto

    2004-01-01

    Radiation hardness is a critical design concern for present and future silicon detectors in high energy physics. Tracking systems at the CERN Large Hadron Collider (LHC) are expected to operate for ten years and to receive fast hadron fluences equivalent to 10/sup 15/cm /sup -2/ 1-MeV neutrons. Recently, low temperature operating conditions have been suggested as a means of suppressing the negative effects of radiation damage on detector charge collection properties. To investigate this effect, simulations have been carried out using the ISE-TCAD DESSIS device simulator. The so-called "three-level model" has been used. A comprehensive analysis of the influence of the V/sub 2/, C/sub i/O/sub i/ and V/sub 2/O capture cross sections on the effective doping concentration (N/sub eff/) as a function of temperature and fluence has been carried out. The capture cross sections have been varied in the range 10/sup -18/-10/sup -12/ cm/sup 2/. The simulated results are compared with charge collection spectra obtained wit...

  18. Noise characterization of silicon strip detectors-comparison of sensors with and without integrated jfet source-follower.

    CERN Document Server

    Giacomini, Gabriele

    Noise is often the main factor limiting the performance of detector systems. In this work a detailed study of the noise contributions in different types of silicon microstrip sensors is carried on. We investigate three sensors with double-sided readout fabricated by different suppliers for the ALICE experiment at the CERN LHC, in addition to detectors including an integrated JFET Source-Follower as a first signal conditioning stage. The latter have been designed as an attempt at improving the performance when very long strips, obtained by gangling together several sensors, are required. After a description of the strip sensors and of their operation, the “static” characterization measurements performed on them (current and capacitance versus voltage and/or frequency) are illustrated and interpreted. Numerical device simulation has been employed as an aid in interpreting some of the measurement results. The commonly used models for expressing the noise of the detector-amplifier system in terms of its relev...

  19. Ultrahigh-speed hybrid laser for silicon photonic integrated chips

    DEFF Research Database (Denmark)

    Chung, Il-Sug; Park, Gyeong Cheol; Ran, Qijiang

    2013-01-01

    Increasing power consumption for electrical interconnects between and inside chips is posing a real challenge to continue the performance scaling of processors/computers as predicted by D. Moore. In recent processors, energy consumption for electrical interconnects is half of power supplied...... and will be 80% in near future. This challenge strongly has motivated replacing electrical interconnects with optical ones even in chip level communications [1]. This chip-level optical interconnects need quite different performance of optoelectronic devices than required for conventional optical communications....... For a light source, the energy consumption per sending a bit is required to be

  20. Transformational silicon electronics

    KAUST Repository

    Rojas, Jhonathan Prieto; Sevilla, Galo T.; Ghoneim, Mohamed T.; Inayat, Salman Bin; Ahmed, Sally; Hussain, Aftab M.; Hussain, Muhammad Mustafa

    2014-01-01

    In today's traditional electronics such as in computers or in mobile phones, billions of high-performance, ultra-low-power devices are neatly integrated in extremely compact areas on rigid and brittle but low-cost bulk monocrystalline silicon (100

  1. Simulation study of a 3-D device integrating FinFET and UTBFET

    KAUST Repository

    Fahad, Hossain M.; Hu, Chenming; Hussain, Muhammad Mustafa

    2015-01-01

    By integrating 3-D nonplanar fins and 2-D ultrathin bodies, wavy FinFETs merge two formerly competing technologies on a silicon-on-insulator platform to deliver enhanced transistor performance compared with conventional trigate Fin

  2. Seventh workshop on the role of impurities and defects in silicon device processing

    Energy Technology Data Exchange (ETDEWEB)

    NONE

    1997-08-01

    This workshop is the latest in a series which has looked at technological issues related to the commercial development and success of silicon based photovoltaic (PV) modules. PV modules based on silicon are the most common at present, but face pressure from other technologies in terms of cell performance and cell cost. This workshop addresses a problem which is a factor in the production costs of silicon based PV modules.

  3. Mode converter based on an inverse taper for multimode silicon nanophotonic integrated circuits.

    Science.gov (United States)

    Dai, Daoxin; Mao, Mao

    2015-11-02

    An inverse taper on silicon is proposed and designed to realize an efficient mode converter available for the connection between multimode silicon nanophotonic integrated circuits and few-mode fibers. The present mode converter has a silicon-on-insulator inverse taper buried in a 3 × 3μm(2) SiN strip waveguide to deal with not only for the fundamental mode but also for the higher-order modes. The designed inverse taper enables the conversion between the six modes (i.e., TE(11), TE(21), TE(31), TE(41), TM(11), TM(12)) in a 1.4 × 0.22μm(2) multimode SOI waveguide and the six modes (like the LP(01), LP(11a), LP(11b) modes in a few-mode fiber) in a 3 × 3μm(2) SiN strip waveguide. The conversion efficiency for any desired mode is higher than 95.6% while any undesired mode excitation ratio is lower than 0.5%. This is helpful to make multimode silicon nanophotonic integrated circuits (e.g., the on-chip mode (de)multiplexers developed well) available to work together with few-mode fibers in the future.

  4. Use of an amorphous silicon electronic portal imaging device for multileaf collimator quality control and calibration

    International Nuclear Information System (INIS)

    Baker, S J K; Budgell, G J; MacKay, R I

    2005-01-01

    Multileaf collimator (MLC) calibration and quality control is a time-consuming procedure typically involving the processing, scanning and analysis of films to measure leaf and collimator positions. Faster and more reliable calibration procedures are required for these tasks, especially with the introduction of intensity modulated radiotherapy which requires more frequent checking and finer positional leaf tolerances than previously. A routine quality control (QC) technique to measure MLC leaf bank gain and offset, as well as minor offsets (individual leaf position relative to a reference leaf), using an amorphous silicon electronic portal imaging device (EPID) has been developed. The technique also tests the calibration of the primary and back-up collimators. A detailed comparison between film and EPID measurements has been performed for six linear accelerators (linacs) equipped with MLC and amorphous silicon EPIDs. Measurements of field size from 4 to 24 cm with the EPID were systematically smaller than film measurements over all field sizes by 0.4 mm for leaves/back-up collimators and by 0.2 mm for conventional collimators. This effect is due to the gain calibration correction applied by the EPID, resulting in a 'flattening' of primary beam profiles. Linac dependent systematic differences of up to 0.5 mm in individual leaf/collimator positions were also found between EPID and film measurements due to the difference between the mechanical and radiation axes of rotation. When corrections for these systematic differences were applied, the residual random differences between EPID and film were 0.23 mm and 0.26 mm (1 standard deviation) for field size and individual leaf/back-up collimator position, respectively. Measured gains (over a distance of 220 mm) always agreed within 0.4 mm with a standard deviation of 0.17 mm. Minor offset measurements gave a mean agreement between EPID and film of 0.01 ± 0.10 mm (1 standard deviation) after correction for the tilt of the

  5. VCSEL Scaling, Laser Integration on Silicon, and Bit Energy

    Science.gov (United States)

    2017-03-01

    especially the laser. Highly compact directly modulated lasers ( DMLs ) have been researched to meet this goal. The most favored technology will likely be...question of which achieves lower bit energy, a DML or a continuous-wave (CW) laser coupled to an integrated modulator. Transceiver suppliers are also...development that can utilize high efficiency DMLs that reach very high modulation speed. Oxide-VCSELs [1] do not yet take full advantage of the

  6. GaAs integrated circuits and heterojunction devices

    Science.gov (United States)

    Fowlis, Colin

    1986-06-01

    The state of the art of GaAs technology in the U.S. as it applies to digital and analog integrated circuits is examined. In a market projection, it is noted that whereas analog ICs now largely dominate the market, in 1994 they will amount to only 39 percent vs. 57 percent for digital ICs. The military segment of the market will remain the largest (42 percent in 1994 vs. 70 percent today). ICs using depletion-mode-only FETs can be constructed in various forms, the closest to production being BFL or buffered FET logic. Schottky diode FET logic - a lower power approach - can reach higher complexities and strong efforts are being made in this direction. Enhancement type devices appear essential to reach LSI and VLSI complexity, but process control is still very difficult; strong efforts are under way, both in the U.S. and in Japan. Heterojunction devices appear very promising, although structures are fairly complex, and special fabrication techniques, such as molecular beam epitaxy and MOCVD, are necessary. High-electron-mobility-transistor (HEMT) devices show significant performance advantages over MESFETs at low temperatures. Initial results of heterojunction bipolar transistor devices show promise for high speed A/D converter applications.

  7. A linear 180 nm SOI CMOS antenna switch module using integrated passive device filters for cellular applications

    Science.gov (United States)

    Jie, Cui; Lei, Chen; Peng, Zhao; Xu, Niu; Yi, Liu

    2014-06-01

    A broadband monolithic linear single pole, eight throw (SP8T) switch has been fabricated in 180 nm thin film silicon-on-insulator (SOI) CMOS technology with a quad-band GSM harmonic filter in integrated passive devices (IPD) technology, which is developed for cellular applications. The antenna switch module (ASM) features 1.2 dB insertion loss with filter on 2G bands and 0.4 dB insertion loss in 3G bands, less than -45 dB isolation and maximum -103 dB intermodulation distortion for mobile front ends by applying distributed architecture and adaptive supply voltage generator.

  8. Thin-film luminescent concentrators for integrated devices: a cookbook.

    Science.gov (United States)

    Evenson, S A; Rawicz, A H

    1995-11-01

    A luminescent concentrator (LC) is a nonimaging optical device used for collecting light energy. As a result of its unique properties, a LC also offers the possibility of separating different portions of the spectrum and concentrating them at the same time. Hence, LC's can be applied to a whole range of problems requiring the collection, manipulation, and distribution or measurement of light. Further-more, as described in our previous research, thin-film LC elements can be deposited directly over sensor and processing electronics in the form of integrated LC devices. As an aid to further research, the materials and technology required to fabricate these thin-film LC elements through the use of an ultraviolet-curable photopolymer are documented in detail.

  9. Integrated Microfibre Device for Refractive Index and Temperature Sensing

    Directory of Open Access Journals (Sweden)

    Sulaiman W. Harun

    2012-08-01

    Full Text Available A microfibre device integrating a microfibre knot resonator in a Sagnac loop reflector is proposed for refractive index and temperature sensing. The reflective configuration of this optical structure offers the advantages of simple fabrication and ease of sensing. To achieve a balance between responsiveness and robustness, the entire microfibre structure is embedded in low index Teflon, except for the 0.5–2 mm diameter microfibre knot resonator sensing region. The proposed sensor has exhibited a linear spectral response with temperature and refractive index. A small change in free spectral range is observed when the microfibre device experiences a large refractive index change in the surrounding medium. The change is found to be in agreement with calculated results based on dispersion relationships.

  10. Highly functional tunnelling devices integrated in 3D

    DEFF Research Database (Denmark)

    Wernersson, Lars-Erik; Lind, Erik; Lindström, Peter

    2003-01-01

    a new type of tunnelling transistor, namely a resonant-tunnelling permeable base transistor. A simple model based on a piece-wise linear approximation is used in Cadence to describe the current-voltage characteristics of the transistor. This model is further introduced into a small signal equivalent...... simultaneously on both tunnelling structures and the obtained characteristics are the result of the interplay between the two tunnelling structures and the gate. An equivalent circuit model is developed and we show how this interaction influences the current-voltage characteristics. The gate may be used......We present a new technology for integrating tunnelling devices in three dimensions. These devices are fabricated by the combination of the growth of semiconductor heterostructures with the controlled introduction of metallic elements into an epitaxial layer by an overgrowth technique. First, we use...

  11. Through-silicon-via crosstalk model and optimization design for three-dimensional integrated circuits

    International Nuclear Information System (INIS)

    Qian Li-Bo; Xia Yin-Shui; Zhu Zhang-Ming; Ding Rui-Xue; Yang Yin-Tang

    2014-01-01

    Through-silicon-via (TSV) to TSV crosstalk noise is one of the key factors affecting the signal integrity of three-dimensional integrated circuits (3D ICs). Based on the frequency dependent equivalent electrical parameters for the TSV channel, an analytical crosstalk noise model is established to capture the TSV induced crosstalk noise. The impact of various design parameters including insulation dielectric, via pitch, via height, silicon conductivity, and terminal impedance on the crosstalk noise is analyzed with the proposed model. Two approaches are proposed to alleviate the TSV noise, namely, driver sizing and via shielding, and the SPICE results show 241 mV and 379 mV reductions in the peak noise voltage, respectively

  12. EQUIPMENT FOR NONDESTRUCTIVE TESTING OF SILICON WAFERS SUBMICRON TOPOLOGY DURING THE FABRICATION OF INTEGRATED CIRCUITS

    Directory of Open Access Journals (Sweden)

    S. A. Chizhik

    2013-01-01

    Full Text Available The advantages of using an atomic force microscopy in manufacturing of submicron integrated circuits are described. The possibilities of characterizing the surface morphology and the etching profile for silicon substrate and bus lines, estimation of the periodicity and size of bus lines, geometrical stability for elementary bus line are shown. Methods of optical and atomic force microcopies are combined in one diagnostic unit. Scanning  probe  microscope  (SPM  200  is  designed  and  produced.  Complex  SPM  200  realizes  nondestructive control of microelectronics elements made on silicon wafers up to 200 mm in diameter and it is introduced by JSC «Integral» for the purpose of operational control, metrology and acceptance of the final product.

  13. Technology for the compatible integration of silicon detectors with readout electronics

    International Nuclear Information System (INIS)

    Zimmer, G.

    1984-01-01

    Compatible integration of detectors and readout electronics on the same silicon substrate is of growing interest. As the methods of microelectronics technology have already been adapted for detector fabrication, a common technology basis for detectors and readout electronics is available. CMOS technology exhibits most attractive features for the compatible realization of readout electronics when advanced LSI processing steps are combined with detector requirements. The essential requirements for compatible integration are the availability of high resistivity (100)-oriented single crystalline silicon substrate, the formation of suitably doped areas for MOS circuits and the isolation of the low voltage circuit from the detector operated at much higher supply voltage. Junction isolation as a first approach based on present production technology and dielectric isolation based on an advanced SOI-LSI technology are discussed as the most promising solutions for present and future applications, respectively. (orig.)

  14. Studies and integration of Silicon-based light emitting systems

    OpenAIRE

    González Fernández, Alfredo A.

    2014-01-01

    [spa] Este proyecto aborda el estudio de dispositivos y materiales luminiscentes basados en silicio para su uso en la fabricación de un sistema óptico que integre emisor de luz, guía de ondas, y sensor en un solo chip obtenido mediante el uso de técnicas y materiales estándar para la fabricación CMOS. Las características atómicas y estructurales de los materiales son analizados y relacionados con su respuesta luminiscente. Considerando los resultados de la caracterización del material a...

  15. Insertable B-Layer integration in the ATLAS experiment and development of future 3D silicon pixel sensors

    CERN Document Server

    AUTHOR|(INSPIRE)INSPIRE-00371528; Røhne, Ole

    This work has two distinct objectives: the development of software for the integration of the Insertable B-Layer (IBL) in the ATLAS offline software framework and the study of the performance of 3D silicon sensors produced by SINTEF for future silicon pixel detectors. The former task consists in the implementation of the IBL byte stream converter. This offline tool performs the decoding of the binary-formatted data coming from the detector into information (e.g. hit position and Time over Threshold) that is stored in a format used in the reconstruction data flow. It also encodes the information extracted from simulations into a simulated IBL byte stream. The tool has been successfully used since the beginning of the LHC Run II data taking. The experimental work on SINTEF 3D sensors was performed in the framework of the development of pixel sensors for the next generation of tracking detectors. Preliminary tests on SINTEF 3D sensors showed that the majority of these devices suffers from high leakage currents, ...

  16. A novel Silicon Photomultiplier with bulk integrated quench resistors: utilization in optical detection and tracking applications for particle physics

    Energy Technology Data Exchange (ETDEWEB)

    Petrovics, Stefan, E-mail: stp@hll.mpg.de [Halbleiterlabor der Max-Planck Gesellschaft, Otto-Hahn-Ring 6, D-81739 Munich (Germany); Andricek, Ladislav [Halbleiterlabor der Max-Planck Gesellschaft, Otto-Hahn-Ring 6, D-81739 Munich (Germany); Diehl, Inge; Hansen, Karsten [DESY, Notkestrasse 85, D-22607 Hamburg (Germany); Jendrysik, Christian [Infineon Technologies AG, Am Campeon 1-12, D-85579 Neubiberg (Germany); Krueger, Katja [DESY, Notkestrasse 85, D-22607 Hamburg (Germany); Lehmann, Raik; Ninkovic, Jelena [Halbleiterlabor der Max-Planck Gesellschaft, Otto-Hahn-Ring 6, D-81739 Munich (Germany); Reckleben, Christian [DESY, Notkestrasse 85, D-22607 Hamburg (Germany); Richter, Rainer; Schaller, Gerhard; Schopper, Florian [Halbleiterlabor der Max-Planck Gesellschaft, Otto-Hahn-Ring 6, D-81739 Munich (Germany); Sefkow, Felix [DESY, Notkestrasse 85, D-22607 Hamburg (Germany)

    2017-02-11

    Silicon Photomultipliers (SiPMs) are a promising candidate for replacing conventional photomultiplier tubes (PMTs) in many applications, thanks to ongoing developments and advances in their technology. Conventional SiPMs are generally an array of avalanche photo diodes, operated in Geiger mode and read out in parallel, thus leading to the necessity of a high ohmic quenching resistor. This resistor enables passive quenching and is usually located on top of the array, limiting the fill factor of the device. In this paper, a novel detector concept with a bulk integrated quenching resistor will be recapped. In addition, due to other advantages of this novel detector design, a new concept, in which these devices will be utilized as tracking detectors for particle physics applications will be introduced, as well as first simulation studies and experimental measurements of this new approach. - Highlights: • A novel SiPM concept with bulk integrated quenching resistor is shown. • First prototypes of these SiPMs as tracking detectors are proposed. • Simulations of the Geiger efficiency suggest feasible operations at low overbias. • First measurements of the electron detection efficiency show promising results. • Measurements are in good agreement with the simulations.

  17. Development of an IMRT quality assurance program using an amorphous silicon electronic portal imaging device

    International Nuclear Information System (INIS)

    Hunt, P.; Oliver, L.; Mallik, A.

    2000-01-01

    Full text: Quality Assurance (QA) for an intensity modulated radiotherapy (IMRT) megavoltage beam is a complex task. The positional accuracy of the MLC; its radiation leakage; the overall distribution of the dose delivered as compared to the treatment plan and; the accuracy of the calculated monitor units to deliver this dose, are all important parameters to clinically monitor. We are presently assessing the Varian version 6 software package with CadPlan, Helios with IMRT and inverse planning, VARiS Vision and the linear accelerator DMLC controller. Whilst conventional QA tools such as ionisation chamber and film measurements are used, these methods are inconvenient for directly monitoring an IMRT patient treatment. Varian Medical Systems has developed an improved electronic portal imaging device (EPID) with an amorphous silicon (a-Si) detector array. The A-Si has a sensitive area of 40x30cm and an improved image resolution of 512x384 pixels. Images are recorded at approximately 7-10 frames per second for an exposure rate of 100-600 MU/minute. Although the A-Si was designed as an EPID for a static treatment field, this new device could be a valuable IMRT QA tool for a range of different tests. Measurements taken on the RNSH and Varian prototype A-Si EPI devices showed a linear dose response for 6-18MeV X-ray energy. In addition to the Varian IAS2 internal software handlers, we have developed some image data handling programs to view and analyse these images in more detail. The software is primarily used to view the images; measure the reading in a region of interest or profile; or merge, overlay, add or subtract images during the analysis. The small pixel resolution provides a reliable, highly accurate means of measuring beam size, leaf position, MLC radiation leakage or profile intensity curves with a positional accuracy of 0.8mm. The images produced by an IMRT exposure is clearly discernible and appears consistent with the result expected. Step wedge images

  18. Integrated investigation approach for determining mechanical properties of poly-silicon membranes

    OpenAIRE

    Brueckner, J.; Dehe, A.; Auerswald, E.; Dudek, R.; Michel, B.; Rzepka, S.

    2014-01-01

    A methodology is presented for determining mechanical properties of free-standing thin films such as poly-silicon membranes. The integrated investigation approach comprises test structure development, mechanical testing, and numerical simulation. All membrane test structures developed and manufactured consist of the same material but have different stiffness due to variations in the geometric design. The mechanical tests apply microscopic loads utilizing a nanoindentation tool. Young's modulu...

  19. Integrated Circuit Interconnect Lines on Lossy Silicon Substrate with Finite Element Method

    OpenAIRE

    Sarhan M. Musa,; Matthew N. O. Sadiku

    2014-01-01

    The silicon substrate has a significant effect on the inductance parameter of a lossy interconnect line on integrated circuit. It is essential to take this into account in determining the transmission line electrical parameters. In this paper, a new quasi-TEM capacitance and inductance analysis of multiconductor multilayer interconnects is successfully demonstrated using finite element method (FEM). We specifically illustrate the electrostatic modeling of single and coupled in...

  20. FISHprep: A Novel Integrated Device for Metaphase FISH Sample Preparation

    DEFF Research Database (Denmark)

    Shah, Pranjul Jaykumar; Vedarethinam, Indumathi; Kwasny, Dorota

    2011-01-01

    We present a novel integrated device for preparing metaphase chromosomes spread slides (FISHprep). The quality of cytogenetic analysis from patient samples greatly relies on the efficiency of sample pre-treatment and/or slide preparation. In cytogenetic slide preparation, cell cultures...... are routinely used to process samples (for culture, arrest and fixation of cells) and/or to expand limited amount of samples (in case of prenatal diagnostics). Arguably, this expansion and other sample pretreatments form the longest part of the entire diagnostic protocols spanning over 3–4 days. We present here...... with minimal handling for metaphase FISH slide preparation....

  1. Device for the integral measurement of ionizing radiations

    International Nuclear Information System (INIS)

    Micheron, Francois.

    1980-01-01

    This invention relates to devices for the integral determination of ionizing radiations, particularly to the construction of a portable dosemeter. Portable measuring instruments have been suggested in the past, particularly dosemeters in which the discharge of a capacitor under the action of ionizing radiations is measured. Since the charge of a capacitor is not stable owing to dielectric imperfections, these measuring instruments have to be recalibrated at frequent intervals. To overcome this drawback, the invention suggests using the discharge of an electret, electrically charged to a pre-set initial value, under the action of ionizing radiations, as the transducer means of a dosemeter used in conjunction with display or warning systems [fr

  2. 76 FR 58041 - Certain Digital Televisions Containing Integrated Circuit Devices and Components Thereof; Notice...

    Science.gov (United States)

    2011-09-19

    ... Integrated Circuit Devices and Components Thereof; Notice of Institution of Investigation; Institution of... integrated circuit devices and components thereof by reason of infringement of certain claims of U.S. Patent... after importation of certain digital televisions containing integrated circuit devices and components...

  3. Portable blood extraction device integrated with biomedical monitoring system

    Science.gov (United States)

    Khumpuang, S.; Horade, M.; Fujioka, K.; Sugiyama, S.

    2006-01-01

    Painless and portable blood extraction device has been immersed in the world of miniaturization on bio-medical research particularly in manufacturing point-of-care systems. The fabrication of a blood extraction device integrated with an electrolyte-monitoring system is reported in this paper. The device has advantages in precise controlled dosage of blood extracted including the slightly damaged blood vessels and nervous system. The in-house blood diagnostic will become simple for the patients. Main components of the portable system are; the blood extraction device and electrolyte-monitoring system. The monitoring system consists of ISFET (Ion Selective Field Effect Transistor) for measuring the concentration level of minerals in blood. In this work, we measured the level of 3 ions; Na+, K+ and Cl-. The mentioned ions are frequently required the measurement since their concentration levels in the blood can indicate whether the kidney, pancreas, liver or heart is being malfunction. The fabrication of the whole system and experimentation on each ISM (Ion Sensitive Membrane) will be provided. Taking the advantages of LIGA technology, the 100 hollow microneedles fabricated by Synchrotron Radiation deep X-ray lithography through PCT (Plane-pattern to Cross-section Transfer) technique have been consisted in 5x5 mm2 area. The microneedle is 300 μm in base-diameter, 500 μm-pitch, 800 μm-height and 50 μm hole-diameter. The total size of the blood extraction device is 2x2x2 cm 3. The package is made from a plastic socket including slots for inserting microneedle array and ISFET connecting to an electrical circuit for the monitoring. Through the dimensional design for simply handling and selection of disposable material, the patients can self-evaluate the critical level of the body minerals in anywhere and anytime.

  4. Single- and double- lumen silicone breast implant integrity: prospective evaluation of MR and US criteria.

    Science.gov (United States)

    Berg, W A; Caskey, C I; Hamper, U M; Kuhlman, J E; Anderson, N D; Chang, B W; Sheth, S; Zerhouni, E A

    1995-10-01

    To evaluate the accuracy of magnetic resonance (MR) and ultrasound (US) criteria for breast implant integrity. One hundred twenty-two single-lumen silicone breast implants and 22 bilumen implants were evaluated with surface coil MR imaging and US and surgically removed. MR criteria for implant failure were a collapsed implant shell ("linguine sign"), foci of silicone outside the shell ("noose sign"), and extracapsular gel, US criteria were collapsed shell, low-level echoes within the gel, and "snowstorm" echoes of extracapsular silicone. Among single-lumen implants, MR imaging depicted 39 of 40 ruptures, 14 of 28 with minimal leakage; 49 of 54 intact implants were correctly interpreted. US depicted 26 of 40 ruptured implants, four of 28 with minimal leakage, and 30 of 54 intact implants. Among bilumen implants, MR imaging depicted four of five implants with rupture of both lumina and nine of 10 as intact; US depicted one rupture and helped identify two of 10 as intact. Mammography accurately depicted the status of 29 of 30 bilumen implants with MR imaging correlation. MR imaging depicts implant integrity more accurately than US; neither method reliably depicts minimal leakage with shell collapse. Mammography is useful in screening bilumen implant integrity.

  5. Software-defined networking control plane for seamless integration of multiple silicon photonic switches in Datacom networks.

    Science.gov (United States)

    Shen, Yiwen; Hattink, Maarten H N; Samadi, Payman; Cheng, Qixiang; Hu, Ziyiz; Gazman, Alexander; Bergman, Keren

    2018-04-16

    Silicon photonics based switches offer an effective option for the delivery of dynamic bandwidth for future large-scale Datacom systems while maintaining scalable energy efficiency. The integration of a silicon photonics-based optical switching fabric within electronic Datacom architectures requires novel network topologies and arbitration strategies to effectively manage the active elements in the network. We present a scalable software-defined networking control plane to integrate silicon photonic based switches with conventional Ethernet or InfiniBand networks. Our software-defined control plane manages both electronic packet switches and multiple silicon photonic switches for simultaneous packet and circuit switching. We built an experimental Dragonfly network testbed with 16 electronic packet switches and 2 silicon photonic switches to evaluate our control plane. Observed latencies occupied by each step of the switching procedure demonstrate a total of 344 µs control plane latency for data-center and high performance computing platforms.

  6. Lithography for enabling advances in integrated circuits and devices.

    Science.gov (United States)

    Garner, C Michael

    2012-08-28

    Because the transistor was fabricated in volume, lithography has enabled the increase in density of devices and integrated circuits. With the invention of the integrated circuit, lithography enabled the integration of higher densities of field-effect transistors through evolutionary applications of optical lithography. In 1994, the semiconductor industry determined that continuing the increase in density transistors was increasingly difficult and required coordinated development of lithography and process capabilities. It established the US National Technology Roadmap for Semiconductors and this was expanded in 1999 to the International Technology Roadmap for Semiconductors to align multiple industries to provide the complex capabilities to continue increasing the density of integrated circuits to nanometre scales. Since the 1960s, lithography has become increasingly complex with the evolution from contact printers, to steppers, pattern reduction technology at i-line, 248 nm and 193 nm wavelengths, which required dramatic improvements of mask-making technology, photolithography printing and alignment capabilities and photoresist capabilities. At the same time, pattern transfer has evolved from wet etching of features, to plasma etch and more complex etching capabilities to fabricate features that are currently 32 nm in high-volume production. To continue increasing the density of devices and interconnects, new pattern transfer technologies will be needed with options for the future including extreme ultraviolet lithography, imprint technology and directed self-assembly. While complementary metal oxide semiconductors will continue to be extended for many years, these advanced pattern transfer technologies may enable development of novel memory and logic technologies based on different physical phenomena in the future to enhance and extend information processing.

  7. Analysis of quantum ballistic electron transport in ultrasmall silicon devices including space-charge and geometric effects

    Science.gov (United States)

    Laux, S. E.; Kumar, A.; Fischetti, M. V.

    2004-05-01

    A two-dimensional device simulation program which self consistently solves the Schrödinger and Poisson equations with current flow is described in detail. Significant approximations adopted in this work are the absence of scattering and a simple six-valley, parabolic band structure for silicon. A modified version of the quantum transmitting boundary method is used to describe open boundary conditions permitting current flow in device solutions far from equilibrium. The continuous energy spectrum of the system is discretized by temporarily imposing two different forms of closed boundary conditions, resulting in energies which sample the density-of-states and establish the wave function normalization conditions. These standing wave solutions ("normal modes") are decomposed into their traveling wave constituents, each of which represents injection from only one of the open boundary contacts ("traveling eigencomponents"). These current-carrying states are occupied by a drifted Fermi distribution associated with their injecting contact and summed to form the electron density in the device. Holes are neglected in this calculation. The Poisson equation is solved on the same finite element computational mesh as the Schrödinger equation; devices of arbitrary geometry can be modeled. Computational performance of the program including characterization of a "Broyden+Newton" algorithm employed in the iteration for self consistency is described. Device results are presented for a narrow silicon resonant tunneling diode (RTD) and many variants of idealized silicon double-gate field effect transistors (DGFETs). The RTD results show two resonant conduction peaks, each of which demonstrates hysteresis. Three 7.5 nm channel length DGFET structures with identical intrinsic device configurations but differing access geometries (straight, taper and "dog bone") are studied and found to have differing current flows owing to quantum-mechanical reflection in their access regions

  8. A bipolar analog front-end integrated circuit for the SDC silicon tracker

    International Nuclear Information System (INIS)

    Kipnis, I.; Spieler, H.; Collins, T.

    1993-11-01

    A low-noise, low-power, high-bandwidth, radiation hard, silicon bipolar-transistor full-custom integrated circuit (IC) containing 64 channels of analog signal processing has been developed for the SDC silicon tracker. The IC was designed and tested at LBL and was fabricated using AT ampersand T's CBIC-U2, 4 GHz f T complementary bipolar technology. Each channel contains the following functions: low-noise preamplification, pulse shaping and threshold discrimination. This is the first iteration of the production analog IC for the SDC silicon tracker. The IC is laid out to directly match the 50 μm pitch double-sided silicon strip detector. The chip measures 6.8 mm x 3.1 mm and contains 3,600 transistors. Three stages of amplification provide 180 mV/fC of gain with a 35 nsec peaking time at the comparator input. For a 14 pF detector capacitance, the equivalent noise charge is 1300 el. rms at a power consumption of 1 mW/channel from a single 3.5 V supply. With the discriminator threshold set to 4 times the noise level, a 16 nsec time-walk for 1.25 to 10fC signals is achieved using a time-walk compensation network. Irradiation tests at TRIUMF to a Φ=10 14 protons/cm 2 have been performed on the IC, demonstrating the radiation hardness of the complementary bipolar process

  9. Single-crystal silicon trench etching for fabrication of highly integrated circuits

    Science.gov (United States)

    Engelhardt, Manfred

    1991-03-01

    The development of single crystal silicon trench etching for fabrication of memory cells in 4 16 and 64Mbit DRAMs is reviewed in this paper. A variety of both etch tools and process gases used for the process development is discussed since both equipment and etch chemistry had to be improved and changed respectively to meet the increasing requirements for high fidelity pattern transfer with increasing degree of integration. In additon to DRAM cell structures etch results for deep trench isolation in advanced bipolar ICs and ASICs are presented for these applications grooves were etched into silicon through a highly doped buried layer and at the borderline of adjacent p- and n-well areas respectively. Shallow trench etching of large and small exposed areas with identical etch rates is presented as an approach to replace standard LOCOS isolation by an advanced isolation technique. The etch profiles were investigated with SEM TEM and AES to get information on contathination and damage levels and on the mechanism leading to anisotropy in the dry etch process. Thermal wave measurements were performed on processed single crystal silicon substrates for a fast evaluation of the process with respect to plasma-induced substrate degradation. This useful technique allows an optimization ofthe etch process regarding high electrical performance of the fully processed memory chip. The benefits of the use of magnetic fields for the development of innovative single crystal silicon dry

  10. Integrated bioassays in microfluidic devices: botulinum toxin assays.

    Science.gov (United States)

    Mangru, Shakuntala; Bentz, Bryan L; Davis, Timothy J; Desai, Nitin; Stabile, Paul J; Schmidt, James J; Millard, Charles B; Bavari, Sina; Kodukula, Krishna

    2005-12-01

    A microfluidic assay was developed for screening botulinum neurotoxin serotype A (BoNT-A) by using a fluorescent resonance energy transfer (FRET) assay. Molded silicone microdevices with integral valves, pumps, and reagent reservoirs were designed and fabricated. Electrical and pneumatic control hardware were constructed, and software was written to automate the assay protocol and data acquisition. Detection was accomplished by fluorescence microscopy. The system was validated with a peptide inhibitor, running 2 parallel assays, as a feasibility demonstration. The small footprint of each bioreactor cell (0.5 cm2) and scalable fluidic architecture enabled many parallel assays on a single chip. The chip is programmable to run a dilution series in each lane, generating concentration-response data for multiple inhibitors. The assay results showed good agreement with the corresponding experiments done at a macroscale level. Although the system has been developed for BoNT-A screening, a wide variety of assays can be performed on the microfluidic chip with little or no modification.

  11. Structural and optical properties of silicon rich oxide films in graded-stoichiometric multilayers for optoelectronic devices

    Energy Technology Data Exchange (ETDEWEB)

    Palacios-Huerta, L.; Aceves-Mijares, M. [Electronics Department, INAOE, Apdo. 51, Puebla, Pue. 72000, México (Mexico); Cabañas-Tay, S. A.; Cardona-Castro, M. A.; Morales-Sánchez, A., E-mail: alfredo.morales@cimav.edu.mx [Centro de Investigación en Materiales Avanzados S.C., Unidad Monterrey-PIIT, Apodaca, NL 66628, México (Mexico); Domínguez-Horna, C. [Instituto de Microelectrónica de Barcelona, IMB-CNM (CSIC), Bellaterra 08193, Barcelona (Spain)

    2016-07-18

    Silicon nanocrystals (Si-ncs) are excellent candidates for the development of optoelectronic devices. Nevertheless, different strategies are still necessary to enhance their photo and electroluminescent properties by controlling their structural and compositional properties. In this work, the effect of the stoichiometry and structure on the optical properties of silicon rich oxide (SRO) films in a multilayered (ML) structure is studied. SRO MLs with silicon excess gradually increased towards the top and bottom and towards the center of the ML produced through the variation of the stoichiometry in each SRO layer were fabricated and confirmed by X-ray photoelectron spectroscopy. Si-ncs with three main sizes were observed by a transmission electron microscope, in agreement with the stoichiometric profile of each SRO layer. The presence of the three sized Si-ncs and some oxygen related defects enhances intense violet/blue and red photoluminescence (PL) bands. The SRO MLs were super-enriched with additional excess silicon by Si{sup +} implantation, which enhanced the PL intensity. Oxygen-related defects and small Si-ncs (<2 nm) are mostly generated during ion implantation enhancing the violet/blue band to become comparable to the red band. The structural, compositional, and luminescent characteristics of the multilayers are the result of the contribution of the individual characteristics of each layer.

  12. Extended device profiles and testing procedures for the approval process of integrated medical devices using the IEEE 11073 communication standard.

    Science.gov (United States)

    Janß, Armin; Thorn, Johannes; Schmitz, Malte; Mildner, Alexander; Dell'Anna-Pudlik, Jasmin; Leucker, Martin; Radermacher, Klaus

    2018-02-23

    Nowadays, only closed and proprietary integrated operating room systems (IORS) from big manufacturers are available on the market. Hence, the interconnection of components from third-party vendors is only possible with increased time and costs. In the context of the German Federal Ministry of Education and Research (BMBF)-funded project OR.NET (2012-2016), the open integration of medical devices from different manufacturers was addressed. An integrated operating theater based on the open communication standard IEEE 11073 shall give clinical operators the opportunity to choose medical devices independently of the manufacturer. This approach would be advantageous especially for hospital operators and small- and medium-sized enterprises (SME) of medical devices. Actual standards and concepts regarding technical feasibility and the approval process do not cope with the requirements for a modular integration of medical devices in the operating room (OR), based on an open communication standard. Therefore, innovative approval strategies and corresponding certification and test procedures, which cover actual legal and normative standards, have to be developed in order to support the future risk management and the usability engineering process of open integrated medical devices in the OR. The use of standardized device and service profiles and a three-step testing procedure, including conformity, interoperability and integration tests are described in this paper and shall support the manufacturers to integrate their medical devices without disclosing the medical devices' risk analysis and related confidential expertise or proprietary information.

  13. Indoor Navigation Design Integrated with Smart Phones and Rfid Devices

    Science.gov (United States)

    Ortakci, Y.; Demiral, E.; Atila, U.; Karas, I. R.

    2015-10-01

    High rise, complex and huge buildings in the cities are almost like a small city with their tens of floors, hundreds of corridors and rooms and passages. Due to size and complexity of these buildings, people need guidance to find their way to the destination in these buildings. In this study, a mobile application is developed to visualize pedestrian's indoor position as 3D in their smartphone and RFID Technology is used to detect the position of pedestrian. While the pedestrian is walking on his/her way on the route, smartphone will guide the pedestrian by displaying the photos of indoor environment on the route. Along the tour, an RFID (Radio-Frequency Identification) device is integrated to the system. The pedestrian will carry the RFID device during his/her tour in the building. The RFID device will send the position data to the server directly in every two seconds periodically. On the other side, the pedestrian will just select the destination point in the mobile application on smartphone and sent the destination point to the server. The shortest path from the pedestrian position to the destination point is found out by the script on the server. This script also sends the environment photo of the first node on the acquired shortest path to the client as an indoor navigation module.

  14. A compact electroencephalogram recording device with integrated audio stimulation system

    Science.gov (United States)

    Paukkunen, Antti K. O.; Kurttio, Anttu A.; Leminen, Miika M.; Sepponen, Raimo E.

    2010-06-01

    A compact (96×128×32 mm3, 374 g), battery-powered, eight-channel electroencephalogram recording device with an integrated audio stimulation system and a wireless interface is presented. The recording device is capable of producing high-quality data, while the operating time is also reasonable for evoked potential studies. The effective measurement resolution is about 4 nV at 200 Hz sample rate, typical noise level is below 0.7 μVrms at 0.16-70 Hz, and the estimated operating time is 1.5 h. An embedded audio decoder circuit reads and plays wave sound files stored on a memory card. The activities are controlled by an 8 bit main control unit which allows accurate timing of the stimuli. The interstimulus interval jitter measured is less than 1 ms. Wireless communication is made through bluetooth and the data recorded are transmitted to an external personal computer (PC) interface in real time. The PC interface is implemented with LABVIEW® and in addition to data acquisition it also allows online signal processing, data storage, and control of measurement activities such as contact impedance measurement, for example. The practical application of the device is demonstrated in mismatch negativity experiment with three test subjects.

  15. Characterization of Amorphous Silicon Advanced Materials and PV Devices: Final Technical Report, 15 December 2001--31 January 2005

    Energy Technology Data Exchange (ETDEWEB)

    Taylor, P. C.

    2005-11-01

    The major objectives of this subcontract have been: (1) understand the microscopic properties of the defects that contribute to the Staebler-Wronski effect to eliminate this effect, (2) perform correlated studies on films and devices made by novel techniques, especially those with promise to improve stability or deposition rates, (3) understand the structural, electronic, and optical properties of films of hydrogenated amorphous silicon (a-Si:H) made on the boundary between the amorphous and microcrystalline phases, (4) search for more stable intrinsic layers of a-Si:H, (5) characterize the important defects, impurities, and metastabilities in the bulk and at surfaces and interfaces in a-Si:H films and devices and in important alloy systems, and (6) make state-of-the-art plasma-enhanced chemical vapor deposition (PECVD) devices out of new, advanced materials, when appropriate. All of these goals are highly relevant to improving photovoltaic devices based on a-Si:H and related alloys. With regard to the first objective, we have identified a paired hydrogen site that may be the defect that stabilizes the silicon dangling bonds formed in the Staebler-Wronski effect.

  16. Core-shell heterojunction of silicon nanowire arrays and carbon quantum dots for photovoltaic devices and self-driven photodetectors.

    Science.gov (United States)

    Xie, Chao; Nie, Biao; Zeng, Longhui; Liang, Feng-Xia; Wang, Ming-Zheng; Luo, Linbao; Feng, Mei; Yu, Yongqiang; Wu, Chun-Yan; Wu, Yucheng; Yu, Shu-Hong

    2014-04-22

    Silicon nanostructure-based solar cells have lately intrigued intensive interest because of their promising potential in next-generation solar energy conversion devices. Herein, we report a silicon nanowire (SiNW) array/carbon quantum dot (CQD) core-shell heterojunction photovoltaic device by directly coating Ag-assisted chemical-etched SiNW arrays with CQDs. The heterojunction with a barrier height of 0.75 eV exhibited excellent rectifying behavior with a rectification ratio of 10(3) at ±0.8 V in the dark and power conversion efficiency (PCE) as high as 9.10% under AM 1.5G irradiation. It is believed that such a high PCE comes from the improved optical absorption as well as the optimized carrier transfer and collection capability. Furthermore, the heterojunction could function as a high-performance self-driven visible light photodetector operating in a wide switching wavelength with good stability, high sensitivity, and fast response speed. It is expected that the present SiNW array/CQD core-shell heterojunction device could find potential applications in future high-performance optoelectronic devices.

  17. Embedded nonvolatile memory devices with various silicon nitride energy band gaps on glass used for flat panel display applications

    International Nuclear Information System (INIS)

    Son, Dang Ngoc; Van Duy, Nguyen; Jung, Sungwook; Yi, Junsin

    2010-01-01

    Nonvolatile memory (NVM) devices with a nitride–nitride–oxynitride stack structure on a rough poly-silicon (poly-Si) surface were fabricated using a low-temperature poly-Si (LTPS) thin film transistor technology on glass substrates for application of flat panel display (FPD). The plasma-assisted oxidation/nitridation method is used to form a uniform oxynitride with an ultrathin tunneling layer on a rough LTPS surface. The NVMs, using a Si-rich silicon nitride film as a charge-trapping layer, were proposed as one of the solutions for the improvement of device performance such as the program/erase speed, the memory window and the charge retention characteristics. To further improve the vertical scaling and charge retention characteristics of NVM devices, the high-κ high-density N-rich SiN x films are used as a blocking layer. The fabricated NVM devices have outstanding electrical properties, such as a low threshold voltage, a high ON/OFF current ratio, a low subthreshold swing, a low operating voltage of less than ±9 V and a large memory window of 3.7 V, which remained about 1.9 V over a period of 10 years. These characteristics are suitable for electrical switching and data storage with in FPD application

  18. Silicon-Based Technology for Integrated Waveguides and mm-Wave Systems

    DEFF Research Database (Denmark)

    Jovanovic, Vladimir; Gentile, Gennaro; Dekker, Ronald

    2015-01-01

    IC processing is used to develop technology for silicon-filled millimeter-wave-integrated waveguides. The front-end process defines critical waveguide sections and enables integration of dedicated components, such as RF capacitors and resistors. Wafer gluing is used to strengthen the mechanical...... support and deep reactive-ion etching forms the waveguide bulk with smooth and nearly vertical sidewalls. Aluminum metallization covers the etched sidewalls, fully enclosing the waveguides in metal from all sides. Waveguides are fabricated with a rectangular cross section of 560 μm x 280 μm. The measured...

  19. An integrated semiconductor device enabling non-optical genome sequencing.

    Science.gov (United States)

    Rothberg, Jonathan M; Hinz, Wolfgang; Rearick, Todd M; Schultz, Jonathan; Mileski, William; Davey, Mel; Leamon, John H; Johnson, Kim; Milgrew, Mark J; Edwards, Matthew; Hoon, Jeremy; Simons, Jan F; Marran, David; Myers, Jason W; Davidson, John F; Branting, Annika; Nobile, John R; Puc, Bernard P; Light, David; Clark, Travis A; Huber, Martin; Branciforte, Jeffrey T; Stoner, Isaac B; Cawley, Simon E; Lyons, Michael; Fu, Yutao; Homer, Nils; Sedova, Marina; Miao, Xin; Reed, Brian; Sabina, Jeffrey; Feierstein, Erika; Schorn, Michelle; Alanjary, Mohammad; Dimalanta, Eileen; Dressman, Devin; Kasinskas, Rachel; Sokolsky, Tanya; Fidanza, Jacqueline A; Namsaraev, Eugeni; McKernan, Kevin J; Williams, Alan; Roth, G Thomas; Bustillo, James

    2011-07-20

    The seminal importance of DNA sequencing to the life sciences, biotechnology and medicine has driven the search for more scalable and lower-cost solutions. Here we describe a DNA sequencing technology in which scalable, low-cost semiconductor manufacturing techniques are used to make an integrated circuit able to directly perform non-optical DNA sequencing of genomes. Sequence data are obtained by directly sensing the ions produced by template-directed DNA polymerase synthesis using all-natural nucleotides on this massively parallel semiconductor-sensing device or ion chip. The ion chip contains ion-sensitive, field-effect transistor-based sensors in perfect register with 1.2 million wells, which provide confinement and allow parallel, simultaneous detection of independent sequencing reactions. Use of the most widely used technology for constructing integrated circuits, the complementary metal-oxide semiconductor (CMOS) process, allows for low-cost, large-scale production and scaling of the device to higher densities and larger array sizes. We show the performance of the system by sequencing three bacterial genomes, its robustness and scalability by producing ion chips with up to 10 times as many sensors and sequencing a human genome.

  20. Material synthesis for silicon integrated-circuit applications using ion implantation

    Science.gov (United States)

    Lu, Xiang

    As devices scale down into deep sub-microns, the investment cost and complexity to develop more sophisticated device technologies have increased substantially. There are some alternative potential technologies, such as silicon-on-insulator (SOI) and SiGe alloys, that can help sustain this staggering IC technology growth at a lower cost. Surface SiGe and SiGeC alloys with germanium peak composition up to 16 atomic percent are formed using high-dose ion implantation and subsequent solid phase epitaxial growth. RBS channeling spectra and cross-sectional TEM studies show that high quality SiGe and SiGeC crystals with 8 atomic percent germanium concentration are formed at the silicon surface. Extended defects are formed in SiGe and SiGeC with 16 atomic percent germanium concentration. X-ray diffraction experiments confirm that carbon reduces the lattice strain in SiGe alloys but without significant crystal quality improvement as detected by RBS channeling spectra and XTEM observations. Separation by plasma implantation of oxygen (SPIMOX) is an economical method for SOI wafer fabrication. This process employs plasma immersion ion implantation (PIII) for the implantation of oxygen ions. The implantation rate for Pm is considerably higher than that of conventional implantation. The feasibility of SPIMOX has been demonstrated with successful fabrication of SOI structures implementing this process. Secondary ion mass spectrometry (SIMS) analysis and cross-sectional transmission electron microscopy (XTEM) micrographs of the SPIMOX sample show continuous buried oxide under single crystal overlayer with sharp silicon/oxide interfaces. The operational phase space of implantation condition, oxygen dose and annealing requirement has been identified. Physical mechanisms of hydrogen induced silicon surface layer cleavage have been investigated using a combination of microscopy and hydrogen profiling techniques. The evolution of the silicon cleavage phenomenon is recorded by a series

  1. Fabrication and characterization of an integrated ionic device from suspended polypyrrole and alamethicin-reconstituted lipid bilayer membranes

    International Nuclear Information System (INIS)

    Northcutt, Robert; Sundaresan, Vishnu-Baba

    2012-01-01

    Conducting polymers are electroactive materials that undergo conformal relaxation of the polymer backbone in the presence of an electrical field through ion exchange with solid or aqueous electrolytes. This conformal relaxation and the associated morphological changes make conducting polymers highly suitable for actuation and sensing applications. Among smart materials, bioderived active materials also use ion transport for sensing and actuation functions via selective ion transport. The transporter proteins extracted from biological cell membranes and reconstituted into a bilayer lipid membrane in bioderived active materials regulate ion transport for engineering functions. The protein transporter reconstituted in the bilayer lipid membrane is referred to as the bioderived membrane and serves as the active component in bioderived active materials. Inspired by the similarities in the physics of transduction in conducting polymers and bioderived active materials, an integrated ionic device is formed from the bioderived membrane and the conducting polymer membrane. This ionic device is fabricated into a laminated thin-film membrane and a common ion that can be processed by the bioderived and the conducting polymer membranes couple the ionic function of these two membranes. An integrated ionic device, fabricated from polypyrrole (PPy) doped with sodium dodecylbenzenesulfonate (NaDBS) and an alamethicin-reconstituted DPhPC bilayer lipid membrane, is presented in this paper. A voltage-gated sodium current regulates the electrochemical response in the PPy(DBS) layer. The integrated device is fabricated on silicon-based substrates through microfabrication, electropolymerization, and vesicle fusion, and ionic activity is characterized through electrochemical measurements. (paper)

  2. Assessing the potential roles of silicon and germanium phthalocyanines in planar heterojunction organic photovoltaic devices and how pentafluoro phenoxylation can enhance π-π interactions and device performance.

    Science.gov (United States)

    Lessard, Benoît H; White, Robin T; Al-Amar, Mohammad; Plint, Trevor; Castrucci, Jeffrey S; Josey, David S; Lu, Zheng-Hong; Bender, Timothy P

    2015-03-11

    In this study, we have assessed the potential application of dichloro silicon phthalocyanine (Cl2-SiPc) and dichloro germanium phthalocyanine (Cl2-GePc) in modern planar heterojunction organic photovoltaic (PHJ OPV) devices. We have determined that Cl2-SiPc can act as an electron donating material when paired with C60 and that Cl2-SiPc or Cl2-GePc can also act as an electron acceptor material when paired with pentacene. These two materials enabled the harvesting of triplet energy resulting from the singlet fission process in pentacene. However, contributions to the generation of photocurrent were observed for Cl2-SiPc with no evidence of photocurrent contribution from Cl2-GePc. The result of our initial assessment established the potential for the application of SiPc and GePc in PHJ OPV devices. Thereafter, bis(pentafluoro phenoxy) silicon phthalocyanine (F10-SiPc) and bis(pentafluoro phenoxy) germanium phthalocyanine (F10-GePc) were synthesized and characterized. During thermal processing, it was discovered that F10-SiPc and F10-GePc underwent a reaction forming small amounts of difluoro SiPc (F2-SiPc) and difluoro GePc (F2-GePc). This undesirable reaction could be circumvented for F10-SiPc but not for F10-GePc. Using single crystal X-ray diffraction, it was determined that F10-SiPc has significantly enhanced π-π interactions compared with that of Cl2-SiPc, which had little to none. Unoptimized PHJ OPV devices based on F10-SiPc were fabricated and directly compared to those constructed from Cl2-SiPc, and in all cases, PHJ OPV devices based on F10-SiPc had significantly improved device characteristics compared to Cl2-SiPc.

  3. Integrated porous-silicon light-emitting diodes: A fabrication process using graded doping profiles

    International Nuclear Information System (INIS)

    Barillaro, G.; Diligenti, A.; Pieri, F.; Fuso, F.; Allegrini, M.

    2001-01-01

    A fabrication process, compatible with an industrial bipolar+complementary metal - oxide - semiconductor (MOS)+diffusion MOS technology, has been developed for the fabrication of efficient porous-silicon-based light-emitting diodes. The electrical contact is fabricated with a double n + /p doping, achieving a high current injection efficiency and thus lower biasing voltages. The anodization is performed as the last step of the process, thus reducing potential incompatibilities with industrial processes. The fabricated devices show yellow-orange electroluminescence, visible with the naked eye in room lighting. A spectral characterization of light emission is presented and briefly discussed. [copyright] 2001 American Institute of Physics

  4. All-silica nanofluidic devices for DNA-analysis fabricated by imprint of sol-gel silica with silicon stamp

    DEFF Research Database (Denmark)

    Mikkelsen, Morten Bo Lindholm; Letailleur, Alban A; Søndergård, Elin

    2011-01-01

    We present a simple and cheap method for fabrication of silica nanofluidic devices for single-molecule studies. By imprinting sol-gel materials with a multi-level stamp comprising micro- and nanofeatures, channels of different depth are produced in a single process step. Calcination of the imprin......We present a simple and cheap method for fabrication of silica nanofluidic devices for single-molecule studies. By imprinting sol-gel materials with a multi-level stamp comprising micro- and nanofeatures, channels of different depth are produced in a single process step. Calcination...... of the imprinted hybrid sol-gel material produces purely inorganic silica, which has very low autofluorescence and can be fusion bonded to a glass lid. Compared to top-down processing of fused silica or silicon substrates, imprint of sol-gel silica enables fabrication of high-quality nanofluidic devices without...

  5. Substrate-bias effect on the breakdown characteristic in a new silicon high-voltage device structure

    International Nuclear Information System (INIS)

    Li Qi; Wang Weidong; Zhao Qiuming; Wei Xueming

    2012-01-01

    A novel silicon double-RESURF LDMOS structure with an improved breakdown characteristic by substrate bias technology (SB) is reported. The P-type epitaxial layer is embedded between an N-type drift region and an N-type substrate to block the conduction path in the off-state and change the distributions of the bulk electric field. The substrate bias strengthens the charge share effect of the drift region near the source, and the vertical electric field peak under the drain is decreased, which is especially helpful in improving the vertical breakdown voltage in a lateral power device with a thin drift region. The numerical results by MEDICI indicate that the breakdown voltage of the proposed device is increased by 97% compared with a conventional LDMOS, while maintaining a lowon-resistance. (semiconductor devices)

  6. Field Performance versus Standard Test Condition Efficiency of Tandem Solar Cells and the Specific Case of Perovskites/Silicon Devices

    KAUST Repository

    Dupre, Olivier

    2018-01-05

    Multijunction cells may offer a cost-effective route to boost the efficiency of industrial photovoltaics. For any technology to be deployed in the field, its performance under actual operating conditions is extremely important. In this perspective, we evaluate the impact of spectrum, light intensity, and module temperature variations on the efficiency of tandem devices with crystalline silicon bottom cells with a particular focus on perovskite top cells. We consider devices with different efficiencies and calculate their energy yields using field data from Denver. We find that annual losses due to differences between operating conditions and standard test conditions are similar for single-junction and four-terminal tandem devices. The additional loss for the two-terminal tandem configuration caused by current mismatch reduces its performance ratio by only 1.7% when an optimal top cell bandgap is used. Additionally, the unusual bandgap temperature dependence of perovskites is shown to have a positive, compensating effect on current mismatch.

  7. P3HT:PCBM Incorporated with Silicon Nanoparticles as Photoactive Layer in Efficient Organic Photovoltaic Devices

    Directory of Open Access Journals (Sweden)

    Shang-Chou Chang

    2013-01-01

    Full Text Available Silicon nanoparticles doped poly(3-hexylthiophene and [6,6]-phenyl C61-butyric acid methyl ester blends (P3HT:PCBM: Si NP have been produced as the photoactive layer of organic photovoltaic devices (OPVs. The silicon nanoparticles’ size is between 80 and 100 nm checked by transmission electron microscope (TEM. The 0.35 wt% Si NP doping OPVs exhibit higher power conversion efficiency (PCE than other OPVs. The PCE of the OPVs increases from 3.01% to 3.38% mainly due to increasing short-circuit current density from 8.38 to 9.48 mA/cm2, while the open-circuit voltage remains the same. The Si NP can provide extra exciton separation and electron pathways in hybrid solar cells.

  8. Silicon, germanium, and III-V-based tunneling devices for low-power applications

    Science.gov (United States)

    Smith, Joshua T.

    While the scaling of transistor dimensions has kept pace with Moore's Law, the voltages applied to these devices have not scaled in tandem, giving rise to ever-increasing power/heating challenges in state-of-the-art integrated circuits. A primary reason for this scaling mismatch is due to the thermal limit---the 60 mV minimum required at room temperature to change the current through the device by one order of magnitude. This voltage scaling limitation is inherent in devices that rely on the mechanism of thermal emission of charge carriers over a gate-controlled barrier to transition between the ON- and OFF-states, such as in the case of conventional CMOS-based technologies. To overcome this voltage scaling barrier, several steep-slope device concepts have been pursued that have experimentally demonstrated sub-60-mV/decade operation since 2004, including the tunneling-field effect transistor (TFET), impact ionization metal-oxide-semiconductor (IMOS), suspended-gate FET (SG-FET), and ferroelectric FET (Fe-FET). These reports have excited strong efforts within the semiconductor research community toward the realization of a low-power device that will support continued scaling efforts, while alleviating the heating issues prevalent in modern computer chips. Literature is replete with claims of sub-60-mV/decade operation, but often with neglect to other voltage scaling factors that offset this result. Ideally, a low-power device should be able to attain sub-60-mV/decade inverse subthreshold slopes (S) employing low supply and gate voltages with a foreseeable path toward integration. This dissertation describes the experimental development and realization of CMOS-compatible processes to enhance tunneling efficiency in Si and Si/Ge nanowire (NW) TFETs for improved average S (S avg) and ON-currents (ION), and a novel, III-V-based tunneling device alternative is also proposed. After reviewing reported efforts on the TFET, IMOS, and SG-FET, the TFET is highlighted as the

  9. Micro direct methanol fuel cell with perforated silicon-plate integrated ionomer membrane

    DEFF Research Database (Denmark)

    Larsen, Jackie Vincent; Dalslet, Bjarke Thomas; Johansson, Anne-Charlotte Elisabeth Birgitta

    2014-01-01

    This article describes the fabrication and characterization of a silicon based micro direct methanol fuel cell using a Nafion ionomer membrane integrated into a perforated silicon plate. The focus of this work is to provide a platform for micro- and nanostructuring of a combined current collector...... at a perforation ratio of 40.3%. The presented fuel cells also show a high volumetric peak power density of 2 mW cm−3 in light of the small system volume of 480 μL, while being fully self contained and passively feed....... and catalytic electrode. AC impedance spectroscopy is utilized alongside IV characterization to determine the influence of the plate perforation geometries on the cell performance. It is found that higher ratios of perforation increases peak power density, with the highest achieved being 2.5 mW cm−2...

  10. Subwavelength silicon photonics

    International Nuclear Information System (INIS)

    Cheben, P.; Bock, P.J.; Schmid, J.H.; Lapointe, J.; Janz, S.; Xu, D.-X.; Densmore, A.; Delage, A.; Lamontagne, B.; Florjanczyk, M.; Ma, R.

    2011-01-01

    With the goal of developing photonic components that are compatible with silicon microelectronic integrated circuits, silicon photonics has been the subject of intense research activity. Silicon is an excellent material for confining and manipulating light at the submicrometer scale. Silicon optoelectronic integrated devices have the potential to be miniaturized and mass-produced at affordable cost for many applications, including telecommunications, optical interconnects, medical screening, and biological and chemical sensing. We review recent advances in silicon photonics research at the National Research Council Canada. A new type of optical waveguide is presented, exploiting subwavelength grating (SWG) effect. We demonstrate subwavelength grating waveguides made of silicon, including practical components operating at telecom wavelengths: input couplers, waveguide crossings and spectrometer chips. SWG technique avoids loss and wavelength resonances due to diffraction effects and allows for single-mode operation with direct control of the mode confinement by changing the refractive index of a waveguide core over a range as broad as 1.6 - 3.5 simply by lithographic patterning. The light can be launched to these waveguides with a coupling loss as small as 0.5 dB and with minimal wavelength dependence, using coupling structures similar to that shown in Fig. 1. The subwavelength grating waveguides can cross each other with minimal loss and negligible crosstalk which allows massive photonic circuit connectivity to overcome the limits of electrical interconnects. These results suggest that the SWG waveguides could become key elements for future integrated photonic circuits. (authors)

  11. Electrical and optical characteristics of heterojunction devices composed of silicon nanowires and mercury selenide nanoparticle films on flexible plastics.

    Science.gov (United States)

    Yeo, Minje; Yun, Junggwon; Kim, Sangsig

    2013-09-01

    A pn heterojunction device based on p-type silicon (Si) nanowires (NWs) prepared by top-down method and n-type mercury selenide (HgSe) nanoparticles (NPs) synthesized by the colloidal method have been fabricated on a flexible plastic substrate. The synthesized HgSe NPs were analyzed through the effective mass approximation. The characteristics of the heterojunction device were examined and studied with the energy band diagram. The device showed typical diode characteristics with a turn-on voltage of 1.5 V and exhibited a high rectification ratio of 10(3) under relatively low forward bias. Under illumination of 633-nm-wavelength light, the device presented photocurrent efficiency of 117.5 and 20.1 nA/W under forward bias and reverse bias conditions, respectively. Moreover, the photocurrent characteristics of the device have been determined by bending of the plastic substrate upward and downward with strain of 0.8%. Even though the photocurrent efficiency has fluctuations during the bending cycles, the values are roughly maintained for 10(4) bending cycles. This result indicates that the fabricated heterojunction device has the potential to be applied as fundamental elements of flexible nanoelectronics.

  12. A simplified boron diffusion for preparing the silicon single crystal p-n junction as an educational device

    Energy Technology Data Exchange (ETDEWEB)

    Shiota, Koki, E-mail: a14510@sr.kagawa-nct.ac.jp; Kai, Kazuho; Nagaoka, Shiro, E-mail: nagaoka@es.kagawa-nct.ac.jp [National Institute of Technology, Kagawa College, Kagawa, Mitoyo, Takuma, Koda 551 (Japan); Tsuji, Takuto [National Institute of Technology, Suzuka College, Mie, Suzuka, Shiroko (Japan); Wakahara, Akihiro [Toyohashi University of Technology, Aichi, Toyohashi, Tenpaku, Hibarigaoka 1-1 (Japan); Rusop, Mohamad [University Technology Mara, Selangor, Shah Alam, 40450 (Malaysia)

    2016-07-06

    The educational method which is including designing, making, and evaluating actual semiconductor devices with learning the theory is one of the best way to obtain the fundamental understanding of the device physics and to cultivate the ability to make unique ideas using the knowledge in the semiconductor device. In this paper, the simplified Boron thermal diffusion process using Sol-Gel material under normal air environment was proposed based on simple hypothesis and the feasibility of the reproducibility and reliability were investigated to simplify the diffusion process for making the educational devices, such as p-n junction, bipolar and pMOS devices. As the result, this method was successfully achieved making p+ region on the surface of the n-type silicon substrates with good reproducibility. And good rectification property of the p-n junctions was obtained successfully. This result indicates that there is a possibility to apply on the process making pMOS or bipolar transistors. It suggests that there is a variety of the possibility of the applications in the educational field to foster an imagination of new devices.

  13. Advances in silicon nanophotonics

    DEFF Research Database (Denmark)

    Hvam, Jørn Märcher; Pu, Minhao

    Silicon has long been established as an ideal material for passive integrated optical circuitry due to its high refractive index, with corresponding strong optical confinement ability, and its low-cost CMOS-compatible manufacturability. However, the inversion symmetry of the silicon crystal lattice.......g. in high-bit-rate optical communication circuits and networks, it is vital that the nonlinear optical effects of silicon are being strongly enhanced. This can among others be achieved in photonic-crystal slow-light waveguides and in nano-engineered photonic-wires (Fig. 1). In this talk I shall present some...... recent advances in this direction. The efficient coupling of light between optical fibers and the planar silicon devices and circuits is of crucial importance. Both end-coupling (Fig. 1) and grating-coupling solutions will be discussed along with polarization issues. A new scheme for a hybrid III...

  14. Integration of silicon-based neural probes and micro-drive arrays for chronic recording of large populations of neurons in behaving animals.

    Science.gov (United States)

    Michon, Frédéric; Aarts, Arno; Holzhammer, Tobias; Ruther, Patrick; Borghs, Gustaaf; McNaughton, Bruce; Kloosterman, Fabian

    2016-08-01

    Understanding how neuronal assemblies underlie cognitive function is a fundamental question in system neuroscience. It poses the technical challenge to monitor the activity of populations of neurons, potentially widely separated, in relation to behaviour. In this paper, we present a new system which aims at simultaneously recording from a large population of neurons from multiple separated brain regions in freely behaving animals. The concept of the new device is to combine the benefits of two existing electrophysiological techniques, i.e. the flexibility and modularity of micro-drive arrays and the high sampling ability of electrode-dense silicon probes. Newly engineered long bendable silicon probes were integrated into a micro-drive array. The resulting device can carry up to 16 independently movable silicon probes, each carrying 16 recording sites. Populations of neurons were recorded simultaneously in multiple cortical and/or hippocampal sites in two freely behaving implanted rats. Current approaches to monitor neuronal activity either allow to flexibly record from multiple widely separated brain regions (micro-drive arrays) but with a limited sampling density or to provide denser sampling at the expense of a flexible placement in multiple brain regions (neural probes). By combining these two approaches and their benefits, we present an alternative solution for flexible and simultaneous recordings from widely distributed populations of neurons in freely behaving rats.

  15. Structural and composition investigations at delayered locations of low k integrated circuit device by gas-assisted focused ion beam

    Energy Technology Data Exchange (ETDEWEB)

    Wang, Dandan, E-mail: dandan.wang@globalfoundries.com; Kee Tan, Pik; Yamin Huang, Maggie; Lam, Jeffrey; Mai, Zhihong [Technology Development Department, GLOBALFOUNDRIES Singapore Pte. Ltd., 60 Woodlands Industrial Park D, Street 2, Singapore 738406 (Singapore)

    2014-05-15

    The authors report a new delayering technique – gas-assisted focused ion beam (FIB) method and its effects on the top layer materials of integrated circuit (IC) device. It demonstrates a highly efficient failure analysis with investigations on the precise location. After removing the dielectric layers under the bombardment of an ion beam, the chemical composition of the top layer was altered with the reduced oxygen content. Further energy-dispersive x-ray spectroscopy and Fourier transform infrared analysis revealed that the oxygen reduction lead to appreciable silicon suboxide formation. Our findings with structural and composition alteration of dielectric layer after FIB delayering open up a new insight avenue for the failure analysis in IC devices.

  16. Passive technologies for future large-scale photonic integrated circuits on silicon: polarization handling, light non-reciprocity and loss reduction

    Directory of Open Access Journals (Sweden)

    Daoxin Dai

    2012-03-01

    Full Text Available Silicon-based large-scale photonic integrated circuits are becoming important, due to the need for higher complexity and lower cost for optical transmitters, receivers and optical buffers. In this paper, passive technologies for large-scale photonic integrated circuits are described, including polarization handling, light non-reciprocity and loss reduction. The design rule for polarization beam splitters based on asymmetrical directional couplers is summarized and several novel designs for ultra-short polarization beam splitters are reviewed. A novel concept for realizing a polarization splitter–rotator is presented with a very simple fabrication process. Realization of silicon-based light non-reciprocity devices (e.g., optical isolator, which is very important for transmitters to avoid sensitivity to reflections, is also demonstrated with the help of magneto-optical material by the bonding technology. Low-loss waveguides are another important technology for large-scale photonic integrated circuits. Ultra-low loss optical waveguides are achieved by designing a Si3N4 core with a very high aspect ratio. The loss is reduced further to <0.1 dB m−1 with an improved fabrication process incorporating a high-quality thermal oxide upper cladding by means of wafer bonding. With the developed ultra-low loss Si3N4 optical waveguides, some devices are also demonstrated, including ultra-high-Q ring resonators, low-loss arrayed-waveguide grating (demultiplexers, and high-extinction-ratio polarizers.

  17. Materials and fabrication sequences for water soluble silicon integrated circuits at the 90 nm node

    International Nuclear Information System (INIS)

    Yin, Lan; Harburg, Daniel V.; Rogers, John A.; Bozler, Carl; Omenetto, Fiorenzo

    2015-01-01

    Tungsten interconnects in silicon integrated circuits built at the 90 nm node with releasable configurations on silicon on insulator wafers serve as the basis for advanced forms of water-soluble electronics. These physically transient systems have potential uses in applications that range from temporary biomedical implants to zero-waste environmental sensors. Systematic experimental studies and modeling efforts reveal essential aspects of electrical performance in field effect transistors and complementary ring oscillators with as many as 499 stages. Accelerated tests reveal timescales for dissolution of the various constituent materials, including tungsten, silicon, and silicon dioxide. The results demonstrate that silicon complementary metal-oxide-semiconductor circuits formed with tungsten interconnects in foundry-compatible fabrication processes can serve as a path to high performance, mass-produced transient electronic systems

  18. Materials and fabrication sequences for water soluble silicon integrated circuits at the 90 nm node

    Energy Technology Data Exchange (ETDEWEB)

    Yin, Lan; Harburg, Daniel V.; Rogers, John A., E-mail: jrogers@illinois.edu [Department of Materials Science and Engineering, Beckman Institute for Advanced Science and Technology, and Frederick Seitz Materials Research Laboratory, University of Illinois at Urbana-Champaign, 104 S Goodwin Ave., Urbana, Illinois 61801 (United States); Bozler, Carl [Lincoln Laboratory, Massachusetts Institute of Technology, 244 Wood Street, Lexington, Massachusetts 02420 (United States); Omenetto, Fiorenzo [Department of Biomedical Engineering, Department of Physics, Tufts University, 4 Colby St., Medford, Massachusetts 02155 (United States)

    2015-01-05

    Tungsten interconnects in silicon integrated circuits built at the 90 nm node with releasable configurations on silicon on insulator wafers serve as the basis for advanced forms of water-soluble electronics. These physically transient systems have potential uses in applications that range from temporary biomedical implants to zero-waste environmental sensors. Systematic experimental studies and modeling efforts reveal essential aspects of electrical performance in field effect transistors and complementary ring oscillators with as many as 499 stages. Accelerated tests reveal timescales for dissolution of the various constituent materials, including tungsten, silicon, and silicon dioxide. The results demonstrate that silicon complementary metal-oxide-semiconductor circuits formed with tungsten interconnects in foundry-compatible fabrication processes can serve as a path to high performance, mass-produced transient electronic systems.

  19. Tin (Sn) for enhancing performance in silicon CMOS

    KAUST Repository

    Hussain, Aftab M.; Fahad, Hossain M.; Singh, Nirpendra; Sevilla, Galo T.; Schwingenschlö gl, Udo; Hussain, Muhammad Mustafa

    2013-01-01

    We study a group IV element: tin (Sn) by integrating it into silicon lattice, to enhance the performance of silicon CMOS. We have evaluated the electrical properties of the SiSn lattice by performing simulations using First-principle studies, followed by experimental device fabrication and characterization. We fabricated high-κ/metal gate based Metal-Oxide-Semiconductor capacitors (MOSCAPs) using SiSn as channel material to study the impact of Sn integration into silicon. © 2013 IEEE.

  20. Tin (Sn) for enhancing performance in silicon CMOS

    KAUST Repository

    Hussain, Aftab M.

    2013-10-01

    We study a group IV element: tin (Sn) by integrating it into silicon lattice, to enhance the performance of silicon CMOS. We have evaluated the electrical properties of the SiSn lattice by performing simulations using First-principle studies, followed by experimental device fabrication and characterization. We fabricated high-κ/metal gate based Metal-Oxide-Semiconductor capacitors (MOSCAPs) using SiSn as channel material to study the impact of Sn integration into silicon. © 2013 IEEE.

  1. Power spectrum analysis for defect screening in integrated circuit devices

    Science.gov (United States)

    Tangyunyong, Paiboon; Cole Jr., Edward I.; Stein, David J.

    2011-12-01

    A device sample is screened for defects using its power spectrum in response to a dynamic stimulus. The device sample receives a time-varying electrical signal. The power spectrum of the device sample is measured at one of the pins of the device sample. A defect in the device sample can be identified based on results of comparing the power spectrum with one or more power spectra of the device that have a known defect status.

  2. Glass-embedded two-dimensional silicon photonic crystal devices with a broad bandwidth waveguide and a high quality nanocavity.

    Science.gov (United States)

    Jeon, Seung-Woo; Han, Jin-Kyu; Song, Bong-Shik; Noda, Susumu

    2010-08-30

    To enhance the mechanical stability of a two-dimensional photonic crystal slab structure and maintain its excellent performance, we designed a glass-embedded silicon photonic crystal device consisting of a broad bandwidth waveguide and a nanocavity with a high quality (Q) factor, and then fabricated the structure using spin-on glass (SOG). Furthermore, we showed that the refractive index of the SOG could be tuned from 1.37 to 1.57 by varying the curing temperature of the SOG. Finally, we demonstrated a glass-embedded heterostructured cavity with an ultrahigh Q factor of 160,000 by adjusting the refractive index of the SOG.

  3. The bipolar silicon microstrip detector: A proposal for a novel precision tracking device

    International Nuclear Information System (INIS)

    Horisberger, R.

    1990-01-01

    It is proposed to combine the technology of fully depleted microstrip detectors fabricated on n doped high resistivity silicon with the concept of the bipolar transistor. This is done by adding a n ++ doped region inside the normal p + implanted region of the reverse biased p + n diode. The resulting structure has amplifying properties and is referred to as bipaolar pixel transistor. The simplest readout scheme of a bipolar pixel array by an aluminium strip bus leads to the bipolar microstrip detector. The bipolar pixel structure is expected to give a better signal-to-noise performance for the detection of minimum ionizing charged particle tracks than the normal silicon diode strip detector and therefore should allow in future the fabrication of thinner silicon detectors for precision tracking. (orig.)

  4. Direct current microhollow cathode discharges on silicon devices operating in argon and helium

    Science.gov (United States)

    Michaud, R.; Felix, V.; Stolz, A.; Aubry, O.; Lefaucheux, P.; Dzikowski, S.; Schulz-von der Gathen, V.; Overzet, L. J.; Dussart, R.

    2018-02-01

    Microhollow cathode discharges have been produced on silicon platforms using processes usually used for MEMS fabrication. Microreactors consist of 100 or 150 μm-diameter cavities made from Ni and SiO2 film layers deposited on a silicon substrate. They were studied in the direct current operating mode in two different geometries: planar and cavity configuration. Currents in the order of 1 mA could be injected in microdischarges operating in different gases such as argon and helium at a working pressure between 130 and 1000 mbar. When silicon was used as a cathode, the microdischarge operation was very unstable in both geometry configurations. Strong current spikes were produced and the microreactor lifetime was quite short. We evidenced the fast formation of blisters at the silicon surface which are responsible for the production of these high current pulses. EDX analysis showed that these blisters are filled with argon and indicate that an implantation mechanism is at the origin of this surface modification. Reversing the polarity of the microdischarge makes the discharge operate stably without current spikes, but the discharge appearance is quite different from the one obtained in direct polarity with the silicon cathode. By coating the silicon cathode with a 500 nm-thick nickel layer, the microdischarge becomes very stable with a much longer lifetime. No current spikes are observed and the cathode surface remains quite smooth compared to the one obtained without coating. Finally, arrays of 76 and 576 microdischarges were successfully ignited and studied in argon. At a working pressure of 130 mbar, all microdischarges are simultaneously ignited whereas they ignite one by one at higher pressure.

  5. Matrix metalloproteinase sensing via porous silicon microcavity devices functionalized with human antibodies

    Energy Technology Data Exchange (ETDEWEB)

    Martin, Marta; Gergely, Csilla [GES-UMR 5650, CNRS, Universite Montpellier 2, Pl. Eugene Bataillon 34095, Montpellier Cedex 5 (France); Taleb Bendiab, Chakib; Massif, Laurent; Cuisinier, Frederic [EA4203, Faculte d' Odontologie, Universite Montpellier 1, Montpellier Cedex 5 (France); Palestino, Gabriela [Facultad de Ciencias Quimicas, Universidad Autonoma de San Luis Potosi, Av. Salvador Nava 6, 78000 San Luis Potosi (Mexico); Agarwal, Vivechana [CIICAP, Universidad Autonoma del Estado de Morelos, Av. Universidad 1001, Col Chamilpa, Cuernavaca, Mor. (Mexico)

    2011-06-15

    Porous silicon microcavity (PSiMc) structures were used as support material for specific sensing of matrix metalloproteinases (MMPs). For lower concentrations of MMP-8, the structures were tested with two types of functionalization methods. Silanization of the oxidized porous silicon structures, followed by glutaraldehyde chemistry was found to give very inconsistent results. The use of biotinilated bovine serum albumin linked to the naked PSiMc was found to be an alternative method to attach the anti MMP-8 human antibody, previously modified with streptavidin, which was further used to sense MMP-8 (copyright 2011 WILEY-VCH Verlag GmbH and Co. KGaA, Weinheim) (orig.)

  6. Integration of the end cap TEC+ of the CMS silicon strip tracker

    Energy Technology Data Exchange (ETDEWEB)

    Bremer, Richard

    2008-04-28

    CMS is the first large experiment of high-energy particle physics whose inner tracking system is exclusively instrumented with silicon detector modules. This tracker comprises 15 148 silicon strip modules enclosing the interaction point in 10-12 layers. The 1. Physikalisches Institut B of RWTH Aachen was deeply involved in the completion of the end caps of the tracking system. The institute played a leading role in the end cap design, produced virtually all support structures and several important electrical components, designed and built the laser alignment system of the tracker, performed system tests and finally integrated one of the two end caps in Aachen. This integration constitutes the central part of the present thesis work. The main focus was on the development of methods to recognise defects early in the integration process and to assert the detector's functionality. Characteristic quantities such as the detector noise or the optical gain of the readout chain were determined during integration as well as during a series of tests performed after transport of the end cap from Aachen to CERN. The procedures followed during the mechanical integration of the detector and during the commissioning of integrated sectors are explained, and the software packages developed for quality assurance are described. In addition, results of the detector readout are presented. During the integration phase, sub-structures of the end cap - named petals - were subjected to a reception test which has also been designed and operated as part of this thesis work. The test setup and software developed for the test are introduced and an account of the analysis of the recorded data is given. Before the end cap project entered the production phase, a final test beam experiment was performed in which the suitability of a system of two fully equipped petals for operation at the LHC was checked. The measured ratio of the signal induced in the silicon sensors by minimal ionising

  7. Integration of the end cap TEC+ of the CMS silicon strip tracker

    International Nuclear Information System (INIS)

    Bremer, Richard

    2008-01-01

    CMS is the first large experiment of high-energy particle physics whose inner tracking system is exclusively instrumented with silicon detector modules. This tracker comprises 15 148 silicon strip modules enclosing the interaction point in 10-12 layers. The 1. Physikalisches Institut B of RWTH Aachen was deeply involved in the completion of the end caps of the tracking system. The institute played a leading role in the end cap design, produced virtually all support structures and several important electrical components, designed and built the laser alignment system of the tracker, performed system tests and finally integrated one of the two end caps in Aachen. This integration constitutes the central part of the present thesis work. The main focus was on the development of methods to recognise defects early in the integration process and to assert the detector's functionality. Characteristic quantities such as the detector noise or the optical gain of the readout chain were determined during integration as well as during a series of tests performed after transport of the end cap from Aachen to CERN. The procedures followed during the mechanical integration of the detector and during the commissioning of integrated sectors are explained, and the software packages developed for quality assurance are described. In addition, results of the detector readout are presented. During the integration phase, sub-structures of the end cap - named petals - were subjected to a reception test which has also been designed and operated as part of this thesis work. The test setup and software developed for the test are introduced and an account of the analysis of the recorded data is given. Before the end cap project entered the production phase, a final test beam experiment was performed in which the suitability of a system of two fully equipped petals for operation at the LHC was checked. The measured ratio of the signal induced in the silicon sensors by minimal ionising particles

  8. Graphene-Based Integrated Photovoltaic Energy Harvesting/Storage Device.

    Science.gov (United States)

    Chien, Chih-Tao; Hiralal, Pritesh; Wang, Di-Yan; Huang, I-Sheng; Chen, Chia-Chun; Chen, Chun-Wei; Amaratunga, Gehan A J

    2015-06-24

    Energy scavenging has become a fundamental part of ubiquitous sensor networks. Of all the scavenging technologies, solar has the highest power density available. However, the energy source is erratic. Integrating energy conversion and storage devices is a viable route to obtain self-powered electronic systems which have long-term maintenance-free operation. In this work, we demonstrate an integrated-power-sheet, consisting of a string of series connected organic photovoltaic cells (OPCs) and graphene supercapacitors on a single substrate, using graphene as a common platform. This results in lighter and more flexible power packs. Graphene is used in different forms and qualities for different functions. Chemical vapor deposition grown high quality graphene is used as a transparent conductor, while solution exfoliated graphene pastes are used as supercapacitor electrodes. Solution-based coating techniques are used to deposit the separate components onto a single substrate, making the process compatible with roll-to-roll manufacture. Eight series connected OPCs based on poly(3-hexylthiophene)(P3HT):phenyl-C61-butyric acid methyl ester (PC60 BM) bulk-heterojunction cells with aluminum electrodes, resulting in a ≈5 V open-circuit voltage, provide the energy harvesting capability. Supercapacitors based on graphene ink with ≈2.5 mF cm(-2) capacitance provide the energy storage capability. The integrated-power-sheet with photovoltaic (PV) energy harvesting and storage functions had a mass of 0.35 g plus the substrate. © 2015 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

  9. The SuperB Silicon Vertex Tracker and 3D vertical integration

    CERN Document Server

    Re, Valerio

    2011-01-01

    The construction of the SuperB high luminosity collider was approved and funded by the Italian government in 2011. The performance specifications set by the target luminosity of this machine (> 10^36 cm^-2 s^-1) ask for the development of a Silicon Vertex Tracker with high resolution, high tolerance to radiation and excellent capability of handling high data rates. This paper reviews the R&D activity that is being carried out for the SuperB SVT. Special emphasis is given to the option of exploiting 3D vertical integration to build advanced pixel sensors and readout electronics that are able to comply with SuperB vertexing requirements.

  10. Building integration photovoltaic module with reference to Ghana: using triple junction amorphous silicon

    OpenAIRE

    Essah, Emmanuel Adu

    2010-01-01

    This paper assesses the potential for using building integrated photovoltaic (BIPV) \\ud roof shingles made from triple-junction amorphous silicon (3a-Si) for electrification \\ud and as a roofing material in tropical countries, such as Accra, Ghana. A model roof \\ud was constructed using triple-junction amorphous (3a-Si) PV on one section and \\ud conventional roofing tiles on the other. The performance of the PV module and tiles \\ud were measured, over a range of ambient temperatures and solar...

  11. Medical device integration: CIOs must bridge the digital divide between devices and electronic medical records.

    Science.gov (United States)

    Raths, David

    2009-02-01

    To get funding approved for medical device integration, ClOs suggest focusing on specific patient safety or staff efficiency pain points. Organizations that make clinical engineering part of their IT team report fewer chain-of-command issues. It also helps IT people understand the clinical goals because the engineering people have been working closely with clinicians for years. A new organization has formed to work on collaboration between clinical engineers and IT professionals. For more information, go to www.ceitcollaboration.org. ECRI Institute has written a guide to handling the convergence of medical technology and hospital networks. Its "Medical Technology for the IT Professional: An Essential Guide for Working in Today's Healthcare Setting" also details how IT professionals can assist hospital technology planning and acquisition, and provide ongoing support for IT-based medical technologies. For more information, visit www.ecri.org/ITresource.

  12. Standard Practice for Minimizing Dosimetry Errors in Radiation Hardness Testing of Silicon Electronic Devices Using Co-60 Sources

    CERN Document Server

    American Society for Testing and Materials. Philadelphia

    2010-01-01

    1.1 This practice covers recommended procedures for the use of dosimeters, such as thermoluminescent dosimeters (TLD's), to determine the absorbed dose in a region of interest within an electronic device irradiated using a Co-60 source. Co-60 sources are commonly used for the absorbed dose testing of silicon electronic devices. Note 1—This absorbed-dose testing is sometimes called “total dose testing” to distinguish it from “dose rate testing.” Note 2—The effects of ionizing radiation on some types of electronic devices may depend on both the absorbed dose and the absorbed dose rate; that is, the effects may be different if the device is irradiated to the same absorbed-dose level at different absorbed-dose rates. Absorbed-dose rate effects are not covered in this practice but should be considered in radiation hardness testing. 1.2 The principal potential error for the measurement of absorbed dose in electronic devices arises from non-equilibrium energy deposition effects in the vicinity o...

  13. CMOS compatible generic batch process towards flexible memory on bulk monocrystalline silicon (100)

    KAUST Repository

    Ghoneim, Mohamed T.

    2014-12-01

    Today\\'s mainstream flexible electronics research is geared towards replacing silicon either totally, by having organic devices on organic substrates, or partially, by transferring inorganic devices onto organic substrates. In this work, we present a pragmatic approach combining the desired flexibility of organic substrates and the ultra-high integration density, inherent in silicon semiconductor industry, to transform bulk/inflexible silicon into an ultra-thin mono-crystalline fabric. We also show the effectiveness of this approach in achieving fully flexible electronic systems. Furthermore, we provide a progress report on fabricating various memory devices on flexible silicon fabric and insights for completely flexible memory modules on silicon fabric.

  14. CMOS compatible generic batch process towards flexible memory on bulk monocrystalline silicon (100)

    KAUST Repository

    Ghoneim, Mohamed T.; Rojas, Jhonathan Prieto; Kutbee, Arwa T.; Hanna, Amir; Hussain, Muhammad Mustafa

    2014-01-01

    Today's mainstream flexible electronics research is geared towards replacing silicon either totally, by having organic devices on organic substrates, or partially, by transferring inorganic devices onto organic substrates. In this work, we present a pragmatic approach combining the desired flexibility of organic substrates and the ultra-high integration density, inherent in silicon semiconductor industry, to transform bulk/inflexible silicon into an ultra-thin mono-crystalline fabric. We also show the effectiveness of this approach in achieving fully flexible electronic systems. Furthermore, we provide a progress report on fabricating various memory devices on flexible silicon fabric and insights for completely flexible memory modules on silicon fabric.

  15. An analog front-end bipolar-transistor integrated circuit for the SDC silicon tracker

    International Nuclear Information System (INIS)

    Kipnis, I.; Spieler, H.; Collins, T.

    1994-01-01

    Since 1989 the Solenoidal Detector Collaboration (SDC) has been developing a general purpose detector to be operated at the Superconducting Super Collider (SSC). A low-noise, low-power, high-bandwidth, radiation hard, silicon bipolar-transistor full-custom integrated circuit (IC) containing 64 channels of analog signal processing has been developed for the SDS silicon tracker. The IC was designed and tested at LBL and was fabricated using AT and T's CBIC-U2, 4 GHz f T complementary bipolar technology. Each channel contains the following functions: low-noise preamplification, pulse shaping and threshold discrimination. This is the first iteration of the production analog IC for the SDC silicon tracker. The IC is laid out to directly match the 50 μm pitch double-sided silicon strip detector. The chip measures 6.8 mm x 3.1 mm and contains 3,600 transistors. Three stages of amplification provide 180 mV/fC of gain with a 35 nsec peaking time at the comparator input. For a 14 pF detector capacitance, the equivalent noise charge is 1300 el. rms at a power consumption of 1 mW/channel from a single 3.5 V supply. With the discriminator threshold set to 4 times the noise level, a 16nsec time-walk for 1.25 to 10 fC signals is achieved using a time-walk compensation network. Irradiation tests at TRIUMF to a φ = 10 14 protons/cm 2 have been performed on the JC, demonstrating the radiation hardness of the complementary bipolar process

  16. 77 FR 35426 - Certain Radio Frequency Integrated Circuits and Devices Containing Same; Institution of...

    Science.gov (United States)

    2012-06-13

    ... of certain radio frequency integrated circuits and devices containing same by reason of infringement... importation of certain radio frequency integrated circuits and devices containing same that infringe one or... INTERNATIONAL TRADE COMMISSION [Investigation No. 337-TA-848] Certain Radio Frequency Integrated...

  17. Microfluidic device for continuous single cells analysis via Raman spectroscopy enhanced by integrated plasmonic nanodimers

    KAUST Repository

    Perozziello, Gerardo; Candeloro, Patrizio; De Grazia, Antonio; Esposito, Francesco; Allione, Marco; Coluccio, Maria Laura; Tallerico, Rossana; Valpapuram, Immanuel; Tirinato, Luca; Das, Gobind; Giugni, Andrea; Torre, Bruno; Veltri, Pierangelo; Kruhne, Ulrich; Della Valle, Giuseppe; Di Fabrizio, Enzo M.

    2015-01-01

    In this work a Raman flow cytometer is presented. It consists of a microfluidic device that takes advantages of the basic principles of Raman spectroscopy and flow cytometry. The microfluidic device integrates calibrated microfluidic channels- where

  18. Transfer-less flexible and transparent high-κ/metal gate germanium devices on bulk silicon (100)

    KAUST Repository

    Nassar, Joanna M.; Hussain, Aftab M.; Rojas, Jhonathan Prieto; Hussain, Muhammad Mustafa

    2014-01-01

    Flexible wearable electronics have been of great interest lately for the development of innovative future technology for various interactive applications in the field of consumer electronics and advanced healthcare, offering the promise of low-cost, lightweight, and multifunctionality. In the pursuit of this trend, high mobility channel materials need to be investigated on a flexible platform, for the development of flexible high performance devices. Germanium (Ge) is one of the most attractive alternatives for silicon (Si) for high-speed computational applications, due its higher hole and electron mobility. Thus, in this work we show a cost effective CMOS compatible process for transforming conventional rigid Ge metal oxide semiconductor capacitors (MOSCAPS) into a mechanically flexible and semi-transparent platform. Devices exhibit outstanding bendability with a bending radius of 0.24 cm, and semi-transparency up to 30 %, varying with respect to the diameter size of the release holes array.

  19. Transfer-less flexible and transparent high-κ/metal gate germanium devices on bulk silicon (100)

    KAUST Repository

    Nassar, Joanna M.

    2014-08-01

    Flexible wearable electronics have been of great interest lately for the development of innovative future technology for various interactive applications in the field of consumer electronics and advanced healthcare, offering the promise of low-cost, lightweight, and multifunctionality. In the pursuit of this trend, high mobility channel materials need to be investigated on a flexible platform, for the development of flexible high performance devices. Germanium (Ge) is one of the most attractive alternatives for silicon (Si) for high-speed computational applications, due its higher hole and electron mobility. Thus, in this work we show a cost effective CMOS compatible process for transforming conventional rigid Ge metal oxide semiconductor capacitors (MOSCAPS) into a mechanically flexible and semi-transparent platform. Devices exhibit outstanding bendability with a bending radius of 0.24 cm, and semi-transparency up to 30 %, varying with respect to the diameter size of the release holes array.

  20. Physical and electrical characterization of corundum substrates and epitaxial silicon layers in view of fabricating integrated circuits

    International Nuclear Information System (INIS)

    Trilhe, J.; Legal, H.; Rolland, G.

    1975-01-01

    The S.O.S. technology (silicon on insulating substrate) allows compact, radiation hard, fast integrated circuits to be fabricated. It is noticeable that complex integrated circuits on corundum substrates obtained with various fabrication processes have various electrical characteristics. Possible correlations between the macroscopic defects of the substrate and the electrical characteristics of the circuit were investigated [fr

  1. Soft hydrogels interpenetrating silicone – a polymer network for drug releasing medical devices

    DEFF Research Database (Denmark)

    Steffensen, Søren Langer; Merete H., Vestergaard,; Møller, Eva Horn

    2016-01-01

    such a sophisticated material by forming an interpenetrating polymer network (IPN) material through modification of silicone elastomers with a poly(2-hydroxyethyl methacrylate) (PHEMA)-based hydrogel. IPN materials with a PHEMA content in the range of 13%–38% (w/w) were synthesized by using carbon dioxide...

  2. Preparation and Characterisation of Amorphous-silicon Photovoltaic Devices Having Microcrystalline Emitters

    International Nuclear Information System (INIS)

    Gutierrez, M. T.; Gandia, J. J.; Carabe, J.

    1999-01-01

    The present work summarises the essential aspects of the research carried out so far at CIEMAT on amorphous-silicon solar cells. The experience accumulated on the preparation and characterisation of amorphous and microcrystalline silicon has allowed to start from intrinsic (absorbent) and p- and n-type (emitters) materials not only having excellent optoelectronic properties, but enjoying certain technological advantages with respect to those developed by other groups. Among these are absorbent-layer growth rates between 5 and 10 times as fast as conventional ones and microcrystalline emitters prepared without using hydrogen. The preparation of amorphous-silicon cells has required the solution of a number of problems, such as those related to pinholes, edge leak currents and diffusion of metals into the semiconductor. Once such constraints have been overcome, it has been demonstrated not only that the amorphous-silicon technology developed at CIEMAT is valid for making solar cells, but also that the quality of the semiconductor material is good for the application according to the partial results obtained. The development of thin-film laser-scribing technology is considered essential. Additionally it has been concluded that cross contamination, originated by the fact of using a single-chamber reactor, is the basic factor limiting the quality of the cells developed at CIEMAT. The present research activity is highly focused on the solution of this problem. (Author)23 refs

  3. Growth and optical properties of CMOS-compatible silicon nanowires for photonic devices

    Science.gov (United States)

    Guichard, Alex Richard

    Silicon (Si) is the dominant semiconductor material in both the microelectronic and photovoltaic industries. Despite its poor optical properties, Si is simply too abundant and useful to be completely abandoned in either industry. Since the initial discovery of efficient room temperature photoluminescence (PL) from porous Si and the following discoveries of PL and time-resolved optical gain from Si nanocrystals (Si-nc) in SiO2, many groups have studied the feasibility of making Si-based, CMOS-compatible electroluminescent devices and electrically pumped lasers. These studies have shown that for Si-ne sizes below about 10 nm, PL can be attributed to radiative recombination of confined excitons and quantum efficiencies can reach 90%. PL peak energies are blue-shifted from the bulk Si band edge of 1.1 eV due to the quantum confinement effect and PL decay lifetimes are on mus timescales. However, many unanswered questions still exist about both the ease of carrier injection and various non-radiative and loss mechanisms that are present. A potential alternative material system to porous Si and Si-nc is Si nanowires (SiNWs). In this thesis, I examine the optical properties of SiNWs with diameters in the range of 3-30 nm fabricated by a number of compound metal oxide semiconductor (CMOS) compatible fabrication techniques including Chemical Vapor Deposition on metal nanoparticle coated substrates, catalytic wet etching of bulk Si and top-down electron-beam lithographic patterning. Using thermal oxidation and etching, we can increase the degree of confinement in the SiNWs. I demonstrate PL peaked in the visible and near-infrared (NIR) wavelength ranges that is tunable by controlling the crystalline SiNW core diameter, which is measured with dark field and high-resolution transmission electron microscopy. PL decay lifetimes of the SiNWs are on the order of 50 mus after proper surface passivation, which suggest that the PL is indeed from confined carriers in the SiNW cores

  4. On the importance of considering the incident spectrum when measuring the outdoor performance of amorphous silicon photovoltaic devices

    Energy Technology Data Exchange (ETDEWEB)

    Gottschalg, R.; Betts, T.R.; Infield, D.G. [Loughborough University (United Kingdom). Department of Electronic and Electrical Engineering, Centre for Renewable Energy Systems Technology; Kearney, M.J. [University of Surrey, Guildford (United Kingdom). School of Electronics and Physical Sciences, Advanced Technology Institute

    2004-02-01

    Conventional measurement practice for the outdoor performance evaluation of solar cells does not make use of the complete spectrum, relying instead on the total irradiance as measured, say, with a pyranometer. In this paper it is shown that this can result in significant errors for solar cells having wide band gaps, in particular, for amorphous silicon solar cells. Two effects are investigated. The first relates to quantifying the typical errors associated with instantaneous measurements; what one might term the calibration of devices. The second relates to quantifying the impact of neglecting variations in the spectrum on the estimation of the annual energy production. It is observed that the fraction of the spectrum falling in the spectrally useful range for amorphous silicon can vary by as much as +10% to -15% with respect to standard test conditions at the test site used in this study, which translates directly into performance variations of similar magnitude. The relationship between changes due to spectral variations as opposed to variations in device temperature is also investigated. The results show that there is a strong case for investigating spectral effects more thoroughly, and explicitly including the measurement of the spectral distribution in all outdoor performance testing. (author)

  5. Integration Science and Technology of Silicon-Based Ceramics and Composites:Technical Challenges and Opportunities

    Science.gov (United States)

    Singh, M.

    2013-01-01

    Ceramic integration technologies enable hierarchical design and manufacturing of intricate ceramic and composite parts starting with geometrically simpler units that are subsequently joined to themselves and/or to metals to create components with progressively higher levels of complexity and functionality. However, for the development of robust and reliable integrated systems with optimum performance for high temperature applications, detailed understanding of various thermochemical and thermomechanical factors is critical. Different technical approaches are required for the integration of ceramic to ceramic and ceramic to metal systems. Active metal brazing, in particular, is a simple and cost-effective method to integrate ceramic to metallic components. Active braze alloys usually contain a reactive filler metal (e.g., Ti, Cr, V, Hf etc) that promotes wettability and spreading by inducing chemical reactions with the ceramics and composites. In this presentation, various examples of brazing of silicon nitride to themselves and to metallic systems are presented. Other examples of joining of ceramic composites (C/SiC and SiC/SiC) using ceramic interlayers and the resulting microstructures are also presented. Thermomechanical characterization of joints is presented for both types of systems. In addition, various challenges and opportunities in design, fabrication, and testing of integrated similar (ceramic-ceramic) and dissimilar (ceramic-metal) material systems will be discussed. Potential opportunities and need for the development of innovative design philosophies, approaches, and integrated system testing under simulated application conditions will also be presented.

  6. Galvanic corrosion of structural non-stoichiometric silicon nitride thin films and its implications on reliability of microelectromechanical devices

    Energy Technology Data Exchange (ETDEWEB)

    Broas, M., E-mail: mikael.broas@aalto.fi; Mattila, T. T.; Paulasto-Kröckel, M. [Department of Electrical Engineering and Automation, Aalto University, Espoo, P.O. Box 13500, FIN-00076 Aalto (Finland); Liu, X.; Ge, Y. [Department of Materials Science and Engineering, Aalto University, Espoo, P.O. Box 16200, FIN-00076 Aalto (Finland)

    2015-06-28

    This paper describes a reliability assessment and failure analysis of a poly-Si/non-stoichiometric silicon nitride thin film composite structure. A set of poly-Si/SiN{sub x} thin film structures were exposed to a mixed flowing gas (MFG) environment, which simulates outdoor environments, for 90 days, and an elevated temperature and humidity (85 °C/95% R.H.) test for 140 days. The mechanical integrity of the thin films was observed to degrade during exposure to the chemically reactive atmospheres. The degree of degradation was analyzed with nanoindentation tests. Statistical analysis of the forces required to initiate a fracture in the thin films indicated degradation due to the exposure to the MFG environment in the SiN{sub x} part of the films. Scanning electron microscopy revealed a porous-like reaction layer on top of SiN{sub x}. The morphology of the reaction layer resembled that of galvanically corroded poly-Si. Transmission electron microscopy further clarified the microstructure of the reaction layer which had a complex multi-phase structure extending to depths of ∼100 nm. Furthermore, the layer was oxidized two times deeper in a 90 days MFG-tested sample compared to an untested reference. The formation of the layer is proposed to be caused by galvanic corrosion of elemental silicon in non-stoichiometric silicon nitride during hydrofluoric acid etching. The degradation is proposed to be due uncontrolled oxidation of the films during the stress tests.

  7. Silicon photonics for telecommunications and biomedicine

    CERN Document Server

    Fathpour, Sasan

    2011-01-01

    Given silicon's versatile material properties, use of low-cost silicon photonics continues to move beyond light-speed data transmission through fiber-optic cables and computer chips. Its application has also evolved from the device to the integrated-system level. A timely overview of this impressive growth, Silicon Photonics for Telecommunications and Biomedicine summarizes state-of-the-art developments in a wide range of areas, including optical communications, wireless technologies, and biomedical applications of silicon photonics. With contributions from world experts, this reference guides

  8. Effects of spectral variation on the device performance of copper indium diselenide and multi-crystalline silicon photovoltaic modules

    Energy Technology Data Exchange (ETDEWEB)

    Okullo, W.; Munji, M.K.; Vorster, F.J.; van Dyk, E.E. [Department of Physics, Nelson Mandela Metropolitan University, Box 77000, Port Elizabeth (South Africa)

    2011-02-15

    We present results of an experimental investigation of the effects of the daily spectral variation on the device performance of copper indium diselenide and multi-crystalline silicon photovoltaic modules. Such investigations are of importance in characterization of photovoltaic devices. The investigation centres on the analysis of outdoor solar spectral measurements carried out at 10 min intervals on clear-sky days. We have shown that the shift in the solar spectrum towards infrared has a negative impact on the device performance of both modules. The spectral bands in the visible region contribute more to the short circuit current than the bands in the infrared region while the ultraviolet region contributes least. The quantitative effects of the spectral variation on the performance of the two photovoltaic modules are reflected on their respective device performance parameters. The decrease in the visible and the increase in infrared of the late afternoon spectra in each case account for the decreased current collection and hence power and efficiency of both modules. (author)

  9. Online analysis of oxygen inside silicon-glass microreactors with integrated optical sensors

    DEFF Research Database (Denmark)

    Ehgartner, Josef; Sulzer, Philipp; Burger, Tobias

    2016-01-01

    A powerful online analysis set-up for oxygen measurements within microfluidic devices is presented. It features integration of optical oxygen sensors into microreactors, which enables contactless, accurate and inexpensive readout using commercially available oxygen meters via luminescent lifetime...... monitoring of enzyme transformations, including d-alanine or d-phenylalanine oxidation by d-amino acid oxidase, and glucose oxidation by glucose oxidase....

  10. Integrated graphene based modulators enabled by interfacing plasmonic slot and silicon waveguides

    DEFF Research Database (Denmark)

    Xiao, Sanshui

    Graphene has offered a new paradigm for extremely fast and active optoelectronic devices due to its unique electronic and optical properties [1]. With the combination of high-index dielectric waveguides/resonators, several integrated graphene-based optical modulators have already been demonstrated...

  11. Flip-chip bonded optoelectronic integration based on ultrathin silicon (UTSi) CMOS

    Science.gov (United States)

    Hong, Sunkwang; Ho, Tawei; Zhang, Liping; Sawchuk, Alexander A.

    2003-06-01

    We describe the design and test of flip-chip bonded optoelectronic CMOS devices based on Peregrine Semiconductor's 0.5 micron Ultra-Thin Silicon on sapphire (UTSi) technology. The UTSi process eliminates the substrate leakage that typically results in crosstalk and reduces parasitic capacitance to the substrate, providing many benefits compared to bulk silicon CMOS. The low-loss synthetic sapphire substrate is optically transparent and has a coefficient of thermal expansion suitable for flip-chip bonding of vertical cavity surface emitting lasers (VCSELs) and detectors. We have designed two different UTSi CMOS chips. One contains a flip-chip bonded 1 x 4 photodiode array, a receiver array, a double edge triggered D-flip flop-based 2047-pattern pseudo random bit stream (PRBS) generator and a quadrature-phase LC-voltage controlled oscillator (VCO). The other chip contains a flip-chip bonded 1 x 4 VCSEL array, a driver array based on high-speed low-voltage differential signals (LVDS) and a full-balanced differential LC-VCO. Each VCSEL driver and receiver has individual input and bias voltage adjustments. Each UTSi chip is mounted on different printed circuit boards (PCBs) which have holes with about 1 mm radius for optical output and input paths through the sapphire substrate. We discuss preliminary testing of these chips.

  12. PECVD deposition of device-quality intrinsic amorphous silicon at high growth rate

    Energy Technology Data Exchange (ETDEWEB)

    Carabe, J [Inst. de Energias Renovables, CIEMAT, Madrid (Spain); Gandia, J J [Inst. de Energias Renovables, CIEMAT, Madrid (Spain); Gutierrez, M T [Inst. de Energias Renovables, CIEMAT, Madrid (Spain)

    1993-11-01

    The combined influence of RF-power density (RFP) and silane flow-rate ([Phi]) on the deposition rate of plasma-enhanced chemical vapour deposition (PECVD) intrinsic amorphous silicon has been investigated. The correlation of the results obtained from the characterisation of the material with the silane deposition efficiency, as deduced from mass spectrometry, has led to an interpretation allowing to deposit intrinsic amorphous-silicon films having an optical gap of 1.87 eV and a photoconductive ratio (ratio of ambient-temperature conductivities under 1 sun AM1 and in dark) of 6 orders of magnitude at growth rates up to 10 A/s, without any structural modification of the PECVD system used. Such results are considered of high relevance regarding industrial competitiveness. (orig.)

  13. The role of point defects and defect complexes in silicon device processing. Summary report and papers

    Energy Technology Data Exchange (ETDEWEB)

    Sopori, B.; Tan, T.Y.

    1994-08-01

    This report is a summary of a workshop hold on August 24--26, 1992. Session 1 of the conference discussed characteristics of various commercial photovoltaic silicon substrates, the nature of impurities and defects in them, and how they are related to the material growth. Session 2 on point defects reviewed the capabilities of theoretical approaches to determine equilibrium structure of defects in the silicon lattice arising from transitional metal impurities and hydrogen. Session 3 was devoted to a discussion of the surface photovoltaic method for characterizing bulk wafer lifetimes, and to detailed studies on the effectiveness of various gettering operations on reducing the deleterious effects of transition metals. Papers presented at the conference are also included in this summary report.

  14. Study of the thermal effect on silicon surface induced by ion beam from plasma focus device

    Energy Technology Data Exchange (ETDEWEB)

    Ahmad, Z., E-mail: pscientific5@aec.org.sy [Scientific Service Department, Atomic Energy Commission of Syria, P.O. Box: 6091, Damascus (Syrian Arab Republic); Ahmad, M. [IBA Laboratory, Atomic Energy Commission of Syria, P.O. Box: 6091, Damascus (Syrian Arab Republic); Chemistry Department, Atomic Energy Commission of Syria, P.O. Box: 6091, Damascus (Syrian Arab Republic); Al-Hawat, Sh.; Akel, M. [Physics Department, Atomic Energy Commission of Syria, P.O. Box: 6091, Damascus (Syrian Arab Republic)

    2017-04-01

    Structural modifications in form of ripples and cracks are induced by nitrogen ions from plasma focus on silicon surface. The investigation of such structures reveals correlation between ripples and cracks formation in peripheral region of the melt spot. The reason of such correlation and structure formation is explained as result of thermal effect. Melting and resolidification of the center of irradiated area occur within one micro second of time. This is supported by a numerical simulation used to investigate the thermal effect induced by the plasma focus ion beams on the silicon surface. This simulation provides information about the temperature profile as well as the dynamic of the thermal propagation in depth and lateral directions. In accordance with the experimental observations, that ripples are formed in latter stage after the arrival of last ion, the simulation shows that the thermal relaxation takes place in few microseconds after the end of the ion beam arrival. Additionally, the dependency of thermal propagation and relaxation on the distance of the silicon surface from the anode is presented.

  15. Monolithic integration of InGaAs/InP multiple quantum wells on SOI substrates for photonic devices

    Science.gov (United States)

    Li, Zhibo; Wang, Mengqi; Fang, Xin; Li, Yajie; Zhou, Xuliang; Yu, Hongyan; Wang, Pengfei; Wang, Wei; Pan, Jiaoqing

    2018-02-01

    A direct epitaxy of III-V nanowires with InGaAs/InP multiple quantum wells on v-shaped trenches patterned silicon on insulator (SOI) substrates was realized by combining the standard semiconductor fabrication process with the aspect ratio trapping growth technique. Silicon thickness as well as the width and gap of each nanowire were carefully designed to accommodate essential optical properties and appropriate growth conditions. The III-V element ingredient, crystalline quality, and surface topography of the grown nanowires were characterized by X-ray diffraction spectroscopy, photoluminescence, and scanning electron microscope. Geometrical details and chemical information of multiple quantum wells were revealed by transmission electron microscopy and energy dispersive spectroscopy. Numerical simulations confirmed that the optical guided mode supported by one single nanowire was able to propagate 50 μm with ˜30% optical loss. This proposed integration scheme opens up an alternative pathway for future photonic integrations of III-V devices on the SOI platform at nanoscale.

  16. Thermally controlled coupling of a rolled-up microtube integrated with a waveguide on a silicon electronic-photonic integrated circuit.

    Science.gov (United States)

    Zhong, Qiuhang; Tian, Zhaobing; Veerasubramanian, Venkat; Dastjerdi, M Hadi Tavakoli; Mi, Zetian; Plant, David V

    2014-05-01

    We report on the first experimental demonstration of the thermal control of coupling strength between a rolled-up microtube and a waveguide on a silicon electronic-photonic integrated circuit. The microtubes are fabricated by selectively releasing a coherently strained GaAs/InGaAs heterostructure bilayer. The fabricated microtubes are then integrated with silicon waveguides using an abruptly tapered fiber probe. By tuning the gap between the microtube and the waveguide using localized heaters, the microtube-waveguide evanescent coupling is effectively controlled. With heating, the extinction ratio of a microtube whispering-gallery mode changes over an 18 dB range, while the resonant wavelength remains approximately unchanged. Utilizing this dynamic thermal tuning effect, we realize coupling modulation of the microtube integrated with the silicon waveguide at 2 kHz with a heater voltage swing of 0-6 V.

  17. Design of a compact and integrated TM-rotated/TE-through polarization beam splitter for silicon-based slot waveguides.

    Science.gov (United States)

    Xu, Yin; Xiao, Jinbiao

    2016-01-20

    A compact and integrated TM-rotated/TE-through polarization beam splitter for silicon-based slot waveguides is proposed and characterized. For the input TM mode, it is first transferred into the cross strip waveguide using a tapered directional coupler (DC), and then efficiently rotated to the corresponding TE mode using an L-shaped bending polarization rotator (PR). Finally, the TE mode for slot waveguide at the output end is obtained with the help of a strip-to-slot mode converter. By contrast, for the input TE mode, it almost passes through the slot waveguide directly and outputs at the bar end with nearly neglected coupling due to a large mode mismatch. Moreover, an additional S-bend connecting the tapered DC and bending PR is used to enhance the performance. Results show that a total device length of 19.6 μm is achieved, where the crosstalk (CT) and polarization conversion loss are, respectively -26.09 and 0.54 dB, for the TM mode, and the CT and insertion loss are, respectively, -22.21 and 0.41 dB, for the TE mode, both at 1.55 μm. The optical bandwidth is approximately 50 nm with a CT<-20  dB. In addition, fabrication tolerances and field evolution are also presented.

  18. Bis(tri-n-hexylsilyl oxide) silicon phthalocyanine: a unique additive in ternary bulk heterojunction organic photovoltaic devices.

    Science.gov (United States)

    Lessard, Benoît H; Dang, Jeremy D; Grant, Trevor M; Gao, Dong; Seferos, Dwight S; Bender, Timothy P

    2014-09-10

    Previous studies have shown that the use of bis(tri-n-hexylsilyl oxide) silicon phthalocyanine ((3HS)2-SiPc) as an additive in a P3HT:PC61BM cascade ternary bulk heterojunction organic photovoltaic (BHJ OPV) device results in an increase in the short circuit current (J(SC)) and efficiency (η(eff)) of up to 25% and 20%, respectively. The previous studies have attributed the increase in performance to the presence of (3HS)2-SiPc at the BHJ interface. In this study, we explored the molecular characteristics of (3HS)2-SiPc which makes it so effective in increasing the OPV device J(SC) and η(eff. Initially, we synthesized phthalocyanine-based additives using different core elements such as germanium and boron instead of silicon, each having similar frontier orbital energies compared to (3HS)2-SiPc and tested their effect on BHJ OPV device performance. We observed that addition of bis(tri-n-hexylsilyl oxide) germanium phthalocyanine ((3HS)2-GePc) or tri-n-hexylsilyl oxide boron subphthalocyanine (3HS-BsubPc) resulted in a nonstatistically significant increase in JSC and η(eff). Secondly, we kept the silicon phthalocyanine core and substituted the tri-n-hexylsilyl solubilizing groups with pentadecyl phenoxy groups and tested the resulting dye in a BHJ OPV. While an increase in JSC and η(eff) was observed at low (PDP)2-SiPc loadings, the increase was not as significant as (3HS)2-SiPc; therefore, (3HS)2-SiPc is a unique additive. During our study, we observed that (3HS)2-SiPc had an extraordinary tendency to crystallize compared to the other compounds in this study and our general experience. On the basis of this observation, we have offered a hypothesis that when (3HS)2-SiPc migrates to the P3HT:PC61BM interface the reason for its unique performance is not solely due to its frontier orbital energies but also might be due to a high driving force for crystallization.

  19. MEMS-based silicon cantilevers with integrated electrothermal heaters for airborne ultrafine particle sensing

    Science.gov (United States)

    Wasisto, Hutomo Suryo; Merzsch, Stephan; Waag, Andreas; Peiner, Erwin

    2013-05-01

    The development of low-cost and low-power MEMS-based cantilever sensors for possible application in hand-held airborne ultrafine particle monitors is described in this work. The proposed resonant sensors are realized by silicon bulk micromachining technology with electrothermal excitation, piezoresistive frequency readout, and electrostatic particle collection elements integrated and constructed in the same sensor fabrication process step of boron diffusion. Built-in heating resistor and full Wheatstone bridge are set close to the cantilever clamp end for effective excitation and sensing, respectively, of beam deflection. Meanwhile, the particle collection electrode is located at the cantilever free end. A 300 μm-thick, phosphorus-doped silicon bulk wafer is used instead of silicon-on-insulator (SOI) as the starting material for the sensors to reduce the fabrication costs. To etch and release the cantilevers from the substrate, inductively coupled plasma (ICP) cryogenic dry etching is utilized. By controlling the etching parameters (e.g., temperature, oxygen content, and duration), cantilever structures with thicknesses down to 10 - 20 μm are yielded. In the sensor characterization, the heating resistor is heated and generating thermal waves which induce thermal expansion and further cause mechanical bending strain in the out-of-plane direction. A resonant frequency of 114.08 +/- 0.04 kHz and a quality factor of 1302 +/- 267 are measured in air for a fabricated rectangular cantilever (500x100x13.5 μm3). Owing to its low power consumption of a few milliwatts, this electrothermal cantilever is suitable for replacing the current external piezoelectric stack actuator in the next generation of the miniaturized cantilever-based nanoparticle detector (CANTOR).

  20. Will silicon be the photonic material of the third millenium?

    International Nuclear Information System (INIS)

    Pavesi, L

    2003-01-01

    Silicon microphotonics, a technology which merges photonics and silicon microelectronic components, is rapidly evolving. Many different fields of application are emerging: transceiver modules for optical communication systems, optical bus systems for ULSI circuits, I/O stages for SOC, displays, .... In this review I will give a brief motivation for silicon microphotonics and try to give the state-of-the-art of this technology. The ingredient still lacking is the silicon laser: a review of the various approaches will be presented. Finally, I will try to draw some conclusions where silicon is predicted to be the material to achieve a full integration of electronic and optical devices. (topical review)

  1. Experimental Device for Learning of Logical Circuit Design using Integrated Circuits

    OpenAIRE

    石橋, 孝昭

    2012-01-01

    This paper presents an experimental device for learning of logical circuit design using integrated circuits and breadboards. The experimental device can be made at a low cost and can be used for many subjects such as logical circuits, computer engineering, basic electricity, electrical circuits and electronic circuits. The proposed device is effective to learn the logical circuits than the usual lecture.

  2. Evaluating and Predicting Patient Safety for Medical Devices With Integral Information Technology

    Science.gov (United States)

    2005-01-01

    323 Evaluating and Predicting Patient Safety for Medical Devices with Integral Information Technology Jiajie Zhang, Vimla L. Patel, Todd R...errors are due to inappropriate designs for user interactions, rather than mechanical failures. Evaluating and predicting patient safety in medical ...the users on the identified trouble spots in the devices. We developed two methods for evaluating and predicting patient safety in medical devices

  3. Wearable Fall Detector using Integrated Sensors and Energy Devices

    OpenAIRE

    Sungmook Jung; Seungki Hong; Jaemin Kim; Sangkyu Lee; Taeghwan Hyeon; Minbaek Lee; Dae-Hyeong Kim

    2015-01-01

    Wearable devices have attracted great attentions as next-generation electronic devices. For the comfortable, portable, and easy-to-use system platform in wearable electronics, a key requirement is to replace conventional bulky and rigid energy devices into thin and deformable ones accompanying the capability of long-term energy supply. Here, we demonstrate a wearable fall detection system composed of a wristband-type deformable triboelectric generator and lithium ion battery in conjunction wi...

  4. Integrating Touch-Enabled and Mobile Devices into Contemporary Mathematics Education

    Science.gov (United States)

    Meletiou-Mavrotheris, Maria, Ed.; Mavrou, Katerina, Ed.; Paparistodemou, Efi, Ed.

    2015-01-01

    Despite increased interest in mobile devices as learning tools, the amount of available primary research studies on their integration into mathematics teaching and learning is still relatively small due to the novelty of these technologies. "Integrating Touch-Enabled and Mobile Devices into Contemporary Mathematics Education" presents…

  5. Simulation study of a 3-D device integrating FinFET and UTBFET

    KAUST Repository

    Fahad, Hossain M.

    2015-01-01

    By integrating 3-D nonplanar fins and 2-D ultrathin bodies, wavy FinFETs merge two formerly competing technologies on a silicon-on-insulator platform to deliver enhanced transistor performance compared with conventional trigate FinFETs with unprecedented levels of chip-area efficiency. This makes it suitable for ultralarge-scale integration high-performance logic at and beyond the 10-nm technology node.

  6. Silicon Hard-Stop Mesas for 3D Integration of Superconducting Qubits

    Science.gov (United States)

    Kim, David; Rosenberg, Danna; Osadchy, Brenda; Calusine, Greg; Das, Rabindra; Melville, Alexander; Yoder, Jonilyn; Yost, Donna-Ruth; Racz, Livia; Oliver, William

    As quantum computing with superconducting qubits advances past the few-qubit stage, implementing 3D packaging/integration to route readout/control lines will become increasingly important. One approach is to bond chips that perform different functions using indium bump bonds. Because indium is malleable, however, achieving the desired spacing and tilt between two chips can be challenging. We present an approach based on etching several microns into the silicon substrate to produce hard stop silicon posts. Since this process involves etching into a pristine substrate, it is essential to evaluate its impact on qubit performance. We report the etched surface's effect on the resonator quality factor and qubit coherence time, as well as the improvement in planarity and tilt. This research was funded in part by the Office of the Director of National Intelligence (ODNI), Intelligence Advanced Research Projects Activity (IARPA) and by the Assistant Secretary of Defense for Research & Engineering under Air Force Contract No. FA8721-05-C-0002. The views and conclusions contained herein are those of the authors and should not be interpreted as necessarily representing the official policies or endorsements, either expressed or implied, of ODNI, IARPA, or the US Government.

  7. Mechanical integration of the detector components for the CBM silicon tracking system

    Energy Technology Data Exchange (ETDEWEB)

    Vasylyev, Oleg; Niebur, Wolfgang [GSI Helmholtzzentrum fuer Schwerionenforschung GmbH, Darmstadt (Germany); Collaboration: CBM-Collaboration

    2016-07-01

    The Compressed Baryonic Matter experiment (CBM) at FAIR is designed to explore the QCD phase diagram in the region of high net-baryon densities. The central detector component, the Silicon Tracking System (STS) is based on double-sided micro-strip sensors. In order to achieve the physics performance, the detector mechanical structures should be developed taking into account the requirements of the CBM experiments: low material budget, high radiation environment, interaction rates, aperture for the silicon tracking, detector segmentation and mounting precision. A functional plan of the STS and its surrounding structural components is being worked out from which the STS system shape is derived and the power and cooling needs, the connector space requirements, life span of components and installation/repair aspects are determined. The mechanical integration is at the point of finalizing the design stage and moving towards production readiness. This contribution shows the current processing state of the following engineering tasks: construction space definition, carbon ladder shape and manufacturability, beam-pipe feedthrough structure, prototype construction, cable routing and modeling of the electronic components.

  8. Three hydrogenated amorphous silicon photodiodes stacked for an above integrated circuit colour sensor

    Energy Technology Data Exchange (ETDEWEB)

    Gidon, Pierre; Giffard, Benoit; Moussy, Norbert; Parrein, Pascale; Poupinet, Ludovic [CEA-LETI, MINATEC, CEA-Grenoble, 17 rue des Martyrs, 38054 Grenoble Cedex 9 (France)

    2010-03-15

    We present theoretical simulation and experimental results of a new colour pixel structure. This pixel catches the light in three stacked amorphous silicon photodiodes encompassed between transparent electrodes. The optical structure has been simulated for signal optimisation. The thickness of each stacked layer is chosen in order to absorb the maximum of light and the three signals allow to linearly calculate the CIE colour coordinates 1 with minimum error and noise. The whole process is compatible with an above integrated circuit (IC) approach. Each photodiode is an n-i-p structure. For optical reason, the upper diode must be controlled down to 25 nm thickness. The first test pixel structure allows a good recovering of colour coordinates. The measured absorption spectrum of each photodiode is in good agreement with our simulations. This specific stack with three photodiodes per pixel totalises two times more signal than an above IC pixel under a standard Bayer pattern 2,3. In each square of this GretagMacbeth chart is the reference colour on the right and the experimentally measured colour on the left with three amorphous silicon photodiodes per pixel. (Abstract Copyright [2010], Wiley Periodicals, Inc.)

  9. Enhancement of Light Absorption in Silicon Nanowire Photovoltaic Devices with Dielectric and Metallic Grating Structures.

    Science.gov (United States)

    Park, Jin-Sung; Kim, Kyoung-Ho; Hwang, Min-Soo; Zhang, Xing; Lee, Jung Min; Kim, Jungkil; Song, Kyung-Deok; No, You-Shin; Jeong, Kwang-Yong; Cahoon, James F; Kim, Sun-Kyung; Park, Hong-Gyu

    2017-12-13

    We report the enhancement of light absorption in Si nanowire photovoltaic devices with one-dimensional dielectric or metallic gratings that are fabricated by a damage-free, precisely aligning, polymer-assisted transfer method. Incorporation of a Si 3 N 4 grating with a Si nanowire effectively enhances the photocurrents for transverse-electric polarized light. The wavelength at which a maximum photocurrent is generated is readily tuned by adjusting the grating pitch. Moreover, the electrical properties of the nanowire devices are preserved before and after transferring the Si 3 N 4 gratings onto Si nanowires, ensuring that the quality of pristine nanowires is not degraded during the transfer. Furthermore, we demonstrate Si nanowire photovoltaic devices with Ag gratings using the same transfer method. Measurements on the fabricated devices reveal approximately 27.1% enhancement in light absorption compared to that of the same devices without the Ag gratings without any degradation of electrical properties. We believe that our polymer-assisted transfer method is not limited to the fabrication of grating-incorporated nanowire photovoltaic devices but can also be generically applied for the implementation of complex nanoscale structures toward the development of multifunctional optoelectronic devices.

  10. Epitaxial Reactor Development for Growth of Silicon-on-Insulator Devices.

    Science.gov (United States)

    1987-04-01

    emision from substrate reflected from interface 40 Constructive interference condition 2tc= n X / 1 * Destrictive interference condition 2tD= (2n+1) X...combinations of growth conditions resulted in no oxide growth on the original silicon wafer. Growths occurred for Si:O molecular ratios higher than 1:1...growth rates occurred at 1050 0 C with water vapor at 1250 cc/min and silane at 50 cc/min. These results are shown in Table 6. The molecular ratio was 2:1

  11. Improved the Surface Roughness of Silicon Nanophotonic Devices by Thermal Oxidation Method

    Energy Technology Data Exchange (ETDEWEB)

    Shi Zujun; Shao Shiqian; Wang Yi, E-mail: ywangwnlo@mail.hust.edu.cn [Wuhan National Laboratory for Optoelectronics, Huazhong University of Science and Technology, No. 1037, Luoyu Street, Wuhan 430074 (China)

    2011-02-01

    The transmission loss of the silicon-on-insulator (SOI) waveguide and the coupling loss of the SOI grating are determined to a large extent by the surface roughness. In order to obtain smaller loss, thermal oxidation is a good choice to reduce the surface roughness of the SOI waveguide and grating. Before the thermal oxidation, the root mean square of the surface roughness is over 11 nm. After the thermal oxidation, the SEM figure shows that the bottom of the grating is as smooth as quartz surface, while the AFM shows that the root mean square of the surface is less than 5 nm.

  12. Sustained prevention of biofilm formation on a novel silicone matrix suitable for medical devices

    DEFF Research Database (Denmark)

    Steffensen, Søren Langer; Merete H., Vestergaard,; Jensen, Minna Grønning

    2015-01-01

    Bacterial colonization and biofilm formation on medical devices constitute major challenges in clinical long-term use of e.g. catheters due to the risk of (re)infection of patients, which would result in additional use of antibiotics risking bacterial resistance development. The aim of the present...... in the range of 1–20 mg/mL. Devices containing 25% (w/w) hydrogel and loaded with ciprofloxacin displayed a strong antibacterial effect against Staphylococcus aureus bacterial colonization and subsequent biofilm formation on the device material was inhibited for 29 days. In conclusion, the hydrogel...

  13. Investigation of multi-state charge-storage properties of redox-active organic molecules in silicon-molecular hybrid devices for DRAM and Flash applications

    Science.gov (United States)

    Gowda, Srivardhan Shivappa

    studied as a function of tunnel oxide thickness, dielectric permittivity and energy barrier, and modified Butler-Volmer expressions were postulated to describe the redox kinetics. The speed vs. retention performance of the devices was improved via asymmetric layered tunnel barriers. The properties of molecules can be tailored by molecular design and synthetic chemistry. In this work, it was demonstrated that an alternate route to tune/enhance the properties of the hybrid device is to engineer the substrate (silicon) component. The molecules were attached to diode surfaces to tune redox voltages and improve charge-retention characteristics. N+ pockets embedded in P-Si well were utilized to obtain multiple states from a two-state molecule. The structure was also employed as a characterization tool in investigating the intrinsic properties of the molecules such as lateral conductivity within the monolayer. Redox molecules were also incorporated on an ultra thin gate-oxide of Si MOSFETs with the intent of studying the interaction of redox states with Si MOSFETs. The discrete molecular states were manifested in the drain current and threshold voltage characteristics of the device. This work demonstrates the multi-state modulation of Si-MOSFETs' drain current via redox-active molecular monolayers. Polymeric films of redox-active molecules were incorporated to improve the charge-density (ON/OFF ratio) and these structures may be employed for multi-state, low-voltage Flash memory applications. The most critical aspect of this research effort is to build a reliable and high density solid state memory technology. To this end, efforts were directed towards replacement of the electrolytic gate, which forms an extremely thin insulating double layer (˜10 nm) at the electrolyte-molecule interface, with a combination of an ultra-thin high-K dielectric layer and a metal gate. Several interesting observations were made in the research approaches towards integration and provided valuable

  14. A multimodal optical and electrochemical device for monitoring surface reactions: redox active surfaces in porous silicon Rugate filters.

    Science.gov (United States)

    Ciampi, Simone; Guan, Bin; Darwish, Nadim A; Zhu, Ying; Reece, Peter J; Gooding, J Justin

    2012-12-21

    Herein, mesoporous silicon (PSi) is configured as a single sensing device that has dual readouts; as a photonic crystal sensor in a Rugate filter configuration, and as a high surface area porous electrode. The as-prepared PSi is chemically modified to provide it with stability in aqueous media and to allow for the subsequent coupling of chemical species, such as via Cu(I)-catalyzed cycloaddition reactions between 1-alkynes and azides ("click" reactions). The utility of the bimodal capabilities of the PSi sensor for monitoring surface coupling procedures is demonstrated by the covalent coupling of a ferrocene derivative, as well as by demonstrating ligand-exchange reactions (LER) at the PSi surface. Both types of reactions were monitored through optical reflectivity measurements, as well as electrochemically via the oxidation/reduction of the surface tethered redox species.

  15. Study of harsh environment operation of flexible ferroelectric memory integrated with PZT and silicon fabric

    International Nuclear Information System (INIS)

    Ghoneim, M. T.; Hussain, M. M.

    2015-01-01

    Flexible memory can enable industrial, automobile, space, and smart grid centered harsh/extreme environment focused electronics application(s) for enhanced operation, safety, and monitoring where bent or complex shaped infrastructures are common and state-of-the-art rigid electronics cannot be deployed. Therefore, we report on the physical-mechanical-electrical characteristics of a flexible ferroelectric memory based on lead zirconium titanate as a key memory material and flexible version of bulk mono-crystalline silicon (100). The experimented devices show a bending radius down to 1.25 cm corresponding to 0.16% nominal strain (high pressure of ∼260 MPa), and full functionality up to 225 °C high temperature in ambient gas composition (21% oxygen and 55% relative humidity). The devices showed unaltered data retention and fatigue properties under harsh conditions, still the reduced memory window (20% difference between switching and non-switching currents at 225 °C) requires sensitive sense circuitry for proper functionality and is the limiting factor preventing operation at higher temperatures

  16. Study of harsh environment operation of flexible ferroelectric memory integrated with PZT and silicon fabric

    Science.gov (United States)

    Ghoneim, M. T.; Hussain, M. M.

    2015-08-01

    Flexible memory can enable industrial, automobile, space, and smart grid centered harsh/extreme environment focused electronics application(s) for enhanced operation, safety, and monitoring where bent or complex shaped infrastructures are common and state-of-the-art rigid electronics cannot be deployed. Therefore, we report on the physical-mechanical-electrical characteristics of a flexible ferroelectric memory based on lead zirconium titanate as a key memory material and flexible version of bulk mono-crystalline silicon (100). The experimented devices show a bending radius down to 1.25 cm corresponding to 0.16% nominal strain (high pressure of ˜260 MPa), and full functionality up to 225 °C high temperature in ambient gas composition (21% oxygen and 55% relative humidity). The devices showed unaltered data retention and fatigue properties under harsh conditions, still the reduced memory window (20% difference between switching and non-switching currents at 225 °C) requires sensitive sense circuitry for proper functionality and is the limiting factor preventing operation at higher temperatures.

  17. Study of harsh environment operation of flexible ferroelectric memory integrated with PZT and silicon fabric

    Energy Technology Data Exchange (ETDEWEB)

    Ghoneim, M. T.; Hussain, M. M., E-mail: muhammadmustafa.hussain@kaust.edu.sa [Integrated Nanotechnology Lab, Electrical Engineering, Computer Electrical Mathematical Science and Engineering Division, King Abdullah University of Science and Technology, Thuwal 23955-6900 (Saudi Arabia)

    2015-08-03

    Flexible memory can enable industrial, automobile, space, and smart grid centered harsh/extreme environment focused electronics application(s) for enhanced operation, safety, and monitoring where bent or complex shaped infrastructures are common and state-of-the-art rigid electronics cannot be deployed. Therefore, we report on the physical-mechanical-electrical characteristics of a flexible ferroelectric memory based on lead zirconium titanate as a key memory material and flexible version of bulk mono-crystalline silicon (100). The experimented devices show a bending radius down to 1.25 cm corresponding to 0.16% nominal strain (high pressure of ∼260 MPa), and full functionality up to 225 °C high temperature in ambient gas composition (21% oxygen and 55% relative humidity). The devices showed unaltered data retention and fatigue properties under harsh conditions, still the reduced memory window (20% difference between switching and non-switching currents at 225 °C) requires sensitive sense circuitry for proper functionality and is the limiting factor preventing operation at higher temperatures.

  18. Study of harsh environment operation of flexible ferroelectric memory integrated with PZT and silicon fabric

    KAUST Repository

    Ghoneim, Mohamed T.

    2015-08-05

    Flexible memory can enable industrial, automobile, space, and smart grid centered harsh/extreme environment focused electronics application(s) for enhanced operation, safety, and monitoring where bent or complex shaped infrastructures are common and state-of-the-art rigid electronics cannot be deployed. Therefore, we report on the physical-mechanical-electrical characteristics of a flexible ferroelectric memory based on lead zirconium titanate as a key memory material and flexible version of bulk mono-crystalline silicon (100). The experimented devices show a bending radius down to 1.25 cm corresponding to 0.16% nominal strain (high pressure of ∼260 MPa), and full functionality up to 225 °C high temperature in ambient gas composition (21% oxygen and 55% relative humidity). The devices showed unaltered data retention and fatigue properties under harsh conditions, still the reduced memory window (20% difference between switching and non-switching currents at 225 °C) requires sensitive sense circuitry for proper functionality and is the limiting factor preventing operation at higher temperatures.

  19. Microfluidic devices and methods for integrated flow cytometry

    Science.gov (United States)

    Srivastava, Nimisha [Goleta, CA; Singh, Anup K [Danville, CA

    2011-08-16

    Microfluidic devices and methods for flow cytometry are described. In described examples, various sample handling and preparation steps may be carried out within a same microfluidic device as flow cytometry steps. A combination of imaging and flow cytometry is described. In some examples, spiral microchannels serve as incubation chambers. Examples of automated sample handling and flow cytometry are described.

  20. Energy harvesting: an integrated view of materials, devices and applications

    Science.gov (United States)

    Radousky, H. B.; Liang, H.

    2012-12-01

    Energy harvesting refers to the set of processes by which useful energy is captured from waste, environmental, or mechanical sources and is converted into a usable form. The discipline of energy harvesting is a broad topic that includes established methods and materials such as photovoltaics and thermoelectrics, as well as more recent technologies that convert mechanical energy, magnetic energy and waste heat to electricity. This article will review various state-of-the-art materials and devices for direct energy conversion and in particular will include multistep energy conversion approaches. The article will highlight the nano-materials science underlying energy harvesting principles and devices, but also include more traditional bulk processes and devices as appropriate and synergistic. Emphasis is placed on device-design innovations that lead to higher efficiency energy harvesting or conversion technologies ranging from the cm/mm-scale down to MEMS/NEMS (micro- and nano-electromechanical systems) devices. Theoretical studies are reviewed, which address transport properties, crystal chemistry, thermodynamic analysis, energy transfer, system efficiency and device operation. New developments in experimental methods; device design and fabrication; nanostructured materials fabrication; materials properties; and device performance measurement techniques are discussed.

  1. Deep ion implantation for bipolar silicon devices; investigations into the use of the third dimension

    International Nuclear Information System (INIS)

    Mouthaan, A.J.

    1986-01-01

    This thesis covers various aspects of the use of deep ion implantations in digital bipolar circuits. It starts with the implications of the use of deep ion implantations for numerical process, device and circuit simulation. It shows the use of 1MeV boron and phosphorus implantations in the realization of a fully vertical IIL, here named Buried Injector Logic, which can also be used as static and dynamic memory device in several different configurations. The author presents a combined MOS-bipolar device, called the Charge Injection Device as a dynamic memory cell. Finally, deep ion implantations are used to realize a stack of photovoltaic cells that produces a multiple of the open circuit voltage of one photodiode. (Auth.)

  2. Silicon microphotonic waveguides

    International Nuclear Information System (INIS)

    Ta'eed, V.; Steel, M.J.; Grillet, C.; Eggleton, B.; Du, J.; Glasscock, J.; Savvides, N.

    2004-01-01

    Full text: Silicon microphotonic devices have been drawing increasing attention in the past few years. The high index-difference between silicon and its oxide (Δn = 2) suggests a potential for high-density integration of optical functions on to a photonic chip. Additionally, it has been shown that silicon exhibits strong Raman nonlinearity, a necessary property as light interaction can occur only by means of nonlinearities in the propagation medium. The small dimensions of silicon waveguides require the design of efficient tapers to couple light to them. We have used the beam propagation method (RSoft BeamPROP) to understand the principles and design of an inverse-taper mode-converter as implemented in several recent papers. We report on progress in the design and fabrication of silicon-based waveguides. Preliminary work has been conducted by patterning silicon-on-insulator (SOI) wafers using optical lithography and reactive ion etching. Thus far, only rib waveguides have been designed, as single-mode ridge-waveguides are beyond the capabilities of conventional optical lithography. We have recently moved to electron beam lithography as the higher resolutions permitted will provide the flexibility to begin fabricating sub-micron waveguides

  3. III-V-on-Silicon Photonic Integrated Circuits for Spectroscopic Sensing in the 2-4 μm Wavelength Range.

    Science.gov (United States)

    Wang, Ruijun; Vasiliev, Anton; Muneeb, Muhammad; Malik, Aditya; Sprengel, Stephan; Boehm, Gerhard; Amann, Markus-Christian; Šimonytė, Ieva; Vizbaras, Augustinas; Vizbaras, Kristijonas; Baets, Roel; Roelkens, Gunther

    2017-08-04

    The availability of silicon photonic integrated circuits (ICs) in the 2-4 μm wavelength range enables miniature optical sensors for trace gas and bio-molecule detection. In this paper, we review our recent work on III-V-on-silicon waveguide circuits for spectroscopic sensing in this wavelength range. We first present results on the heterogeneous integration of 2.3 μm wavelength III-V laser sources and photodetectors on silicon photonic ICs for fully integrated optical sensors. Then a compact 2 μm wavelength widely tunable external cavity laser using a silicon photonic IC for the wavelength selective feedback is shown. High-performance silicon arrayed waveguide grating spectrometers are also presented. Further we show an on-chip photothermal transducer using a suspended silicon-on-insulator microring resonator used for mid-infrared photothermal spectroscopy.

  4. III–V-on-Silicon Photonic Integrated Circuits for Spectroscopic Sensing in the 2–4 μm Wavelength Range

    Science.gov (United States)

    Wang, Ruijun; Vasiliev, Anton; Muneeb, Muhammad; Malik, Aditya; Sprengel, Stephan; Boehm, Gerhard; Amann, Markus-Christian; Šimonytė, Ieva; Vizbaras, Augustinas; Vizbaras, Kristijonas; Baets, Roel; Roelkens, Gunther

    2017-01-01

    The availability of silicon photonic integrated circuits (ICs) in the 2–4 μm wavelength range enables miniature optical sensors for trace gas and bio-molecule detection. In this paper, we review our recent work on III–V-on-silicon waveguide circuits for spectroscopic sensing in this wavelength range. We first present results on the heterogeneous integration of 2.3 μm wavelength III–V laser sources and photodetectors on silicon photonic ICs for fully integrated optical sensors. Then a compact 2 μm wavelength widely tunable external cavity laser using a silicon photonic IC for the wavelength selective feedback is shown. High-performance silicon arrayed waveguide grating spectrometers are also presented. Further we show an on-chip photothermal transducer using a suspended silicon-on-insulator microring resonator used for mid-infrared photothermal spectroscopy. PMID:28777291

  5. A monolithically integrated detector-preamplifier on high-resistivity silicon

    International Nuclear Information System (INIS)

    Holland, S.; Spieler, H.

    1990-02-01

    A monolithically integrated detector-preamplifier on high-resistivity silicon has been designed, fabricated and characterized. The detector is a fully depleted p-i-n diode and the preamplifier is implemented in a depletion-mode PMOS process which is compatible with detector processing. The amplifier is internally compensated and the measured gain-bandwidth product is 30 MHz with an input-referred noise of 15 nV/√Hz in the white noise regime. Measurements with an Am 241 radiation source yield an equivalent input noise charge of 800 electrons at 200 ns shaping time for a 1.4 mm 2 detector with on-chip amplifier in an experimental setup with substantial external pickup

  6. Integrated reconfigurable microring based silicon WDM receiver for on-chip optical interconnect

    International Nuclear Information System (INIS)

    Shen, Ao; Yang, Long-Zhi; Dai, Ting-Ge; Hao, Yin-Lei; Jiang, Xiao-Qing; Yang, Jian-Yi; Qiu, Chen

    2015-01-01

    We demonstrate an integrated reconfigurable wavelength division multiplexing receiver on the silicon-on-insulator (SOI) platform. The receiver is composed of a 1 × 8 thermally tunable microring resonator filter and Ge–Si photodetectors. With low thermal tuning powers the channel allocation of the receiver can be reconfigured with high accuracy and flexibility. The thermal tuning efficiency is approximately 8 mW nm −1 . We show eight-channel configurations with channel spacing of 100 GHz and 50 GHz and a configuration in which all eight channels cover an entire free spectral range of the ring with uniform channel spacing of 1.2 nm. Each channel can receive high-quality signals with a data rate of up to 13.5 Gb s −1 ; thus an aggregate data rate higher than 100 Gb s −1 can be achieved. (paper)

  7. Efficient generation of single and entangled photons on a silicon photonic integrated chip

    International Nuclear Information System (INIS)

    Mower, Jacob; Englund, Dirk

    2011-01-01

    We present a protocol for generating on-demand, indistinguishable single photons on a silicon photonic integrated chip. The source is a time-multiplexed spontaneous parametric down-conversion element that allows optimization of single-photon versus multiphoton emission while realizing high output rate and indistinguishability. We minimize both the scaling of active elements and the scaling of active element loss with multiplexing. We then discuss detection strategies and data processing to further optimize the procedure. We simulate an improvement in single-photon-generation efficiency over previous time-multiplexing protocols, assuming existing fabrication capabilities. We then apply this system to generate heralded Bell states. The generation efficiency of both nonclassical states could be increased substantially with improved fabrication procedures.

  8. Silicon-Based Integration of Groups III, IV, V Chemical Vapor Depositions in High-Quality Photodiodes

    NARCIS (Netherlands)

    Sammak, A.

    2012-01-01

    Heterogeneous integration of III-V semiconductors with silicon (Si) technology is an interesting approach to utilize the advantages of both high-speed photonic and electronic properties. The work presented in this thesis is initiated by this major goal of merging III-V semiconductor technology with

  9. Structural Integration of Silicon Solar Cells and Lithium-ion Batteries Using Printed Electronics

    Science.gov (United States)

    Kang, Jin Sung

    Inkjet printing of electrode using copper nanoparticle ink is presented. Electrode was printed on a flexible glass epoxy composite substrate using drop on demand piezoelectric dispenser and was sintered at 200°C in N 2 gas condition. The printed electrodes were made with various widths and thicknesses. Surface morphology of electrode was analyzed using scanning electron microscope (SEM) and atomic force microscope (AFM). Reliable dimensions for printed electronics were found from this study. Single-crystalline silicon solar cells were tested under four-point bending to find the feasibility of directly integrating them onto a carbon fiber/epoxy composite laminate. These solar cells were not able to withstand 0.2% strain. On the other hand, thin-film amorphous silicon solar cells were subjected to flexural fatigue loadings. The current density-voltage curves were analyzed at different cycles, and there was no noticeable degradation on its performance up to 100 cycles. A multifunctional composite laminate which can harvest and store solar energy was fabricated using printed electrodes. The integrated printed circuit board (PCB) was co-cured with a carbon/epoxy composite laminate by the vacuum bag molding process in an autoclave; an amorphous silicon solar cell and a thin-film solid state lithium-ion (Li-ion) battery were adhesively joined and electrically connected to a thin flexible PCB; and then the passive components such as resistors and diodes were electrically connected to the printed circuit board by silver pasting. Since a thin-film solid state Li-ion battery was not able to withstand tensile strain above 0.4%, thin Li-ion polymer batteries were tested under various mechanical loadings and environmental conditions to find the feasibility of using the polymer batteries for our multifunctional purpose. It was found that the Li-ion polymer batteries were stable under pressure and tensile loading without any noticeable degradation on its charge and discharge

  10. Recent advance in high manufacturing readiness level and high temperature CMOS mixed-signal integrated circuits on silicon carbide

    Science.gov (United States)

    Weng, M. H.; Clark, D. T.; Wright, S. N.; Gordon, D. L.; Duncan, M. A.; Kirkham, S. J.; Idris, M. I.; Chan, H. K.; Young, R. A. R.; Ramsay, E. P.; Wright, N. G.; Horsfall, A. B.

    2017-05-01

    A high manufacturing readiness level silicon carbide (SiC) CMOS technology is presented. The unique process flow enables the monolithic integration of pMOS and nMOS transistors with passive circuit elements capable of operation at temperatures of 300 °C and beyond. Critical to this functionality is the behaviour of the gate dielectric and data for high temperature capacitance-voltage measurements are reported for SiO2/4H-SiC (n and p type) MOS structures. In addition, a summary of the long term reliability for a range of structures including contact chains to both n-type and p-type SiC, as well as simple logic circuits is presented, showing function after 2000 h at 300 °C. Circuit data is also presented for the performance of digital logic devices, a 4 to 1 analogue multiplexer and a configurable timer operating over a wide temperature range. A high temperature micro-oven system has been utilised to enable the high temperature testing and stressing of units assembled in ceramic dual in line packages, including a high temperature small form-factor SiC based bridge leg power module prototype, operated for over 1000 h at 300 °C. The data presented show that SiC CMOS is a key enabling technology in high temperature integrated circuit design. In particular it provides the ability to realise sensor interface circuits capable of operating above 300 °C, accommodate shifts in key parameters enabling deployment in applications including automotive, aerospace and deep well drilling.

  11. Label-free silicon photonic biosensor system with integrated detector array

    Science.gov (United States)

    Yan, Rongjin; Mestas, Santano P.; Yuan, Guangwei; Safaisini, Rashid; Dandy, David S.

    2010-01-01

    An integrated, inexpensive, label-free photonic waveguide biosensor system with multi-analyte capability has been implemented on a silicon photonics integrated circuit from a commercial CMOS line and tested with nanofilms. The local evanescent array coupled (LEAC) biosensor is based on a new physical phenomenon that is fundamentally different from the mechanisms of other evanescent field sensors. Increased local refractive index at the waveguide’s upper surface due to the formation of a biological nanofilm causes local modulation of the evanescent field coupled into an array of photodetectors buried under the waveguide. The planar optical waveguide biosensor system exhibits sensitivity of 20%/nm photocurrent modulation in response to adsorbed bovine serum albumin (BSA) layers less than 3 nm thick. In addition to response to BSA, an experiment with patterned photoresist as well as beam propagation method simulations support the evanescent field shift principle. The sensing mechanism enables the integration of all optical and electronic components for a multi-analyte biosensor system on a chip. PMID:19606292

  12. Label-free silicon photonic biosensor system with integrated detector array.

    Science.gov (United States)

    Yan, Rongjin; Mestas, Santano P; Yuan, Guangwei; Safaisini, Rashid; Dandy, David S; Lear, Kevin L

    2009-08-07

    An integrated, inexpensive, label-free photonic waveguide biosensor system with multi-analyte capability has been implemented on a silicon photonics integrated circuit from a commercial CMOS line and tested with nanofilms. The local evanescent array coupled (LEAC) biosensor is based on a new physical phenomenon that is fundamentally different from the mechanisms of other evanescent field sensors. Increased local refractive index at the waveguide's upper surface due to the formation of a biological nanofilm causes local modulation of the evanescent field coupled into an array of photodetectors buried under the waveguide. The planar optical waveguide biosensor system exhibits sensitivity of 20%/nm photocurrent modulation in response to adsorbed bovine serum albumin (BSA) layers less than 3 nm thick. In addition to response to BSA, an experiment with patterned photoresist as well as beam propagation method simulations support the evanescent field shift principle. The sensing mechanism enables the integration of all optical and electronic components for a multi-analyte biosensor system on a chip.

  13. RF characterization and analytical modelling of through silicon vias and coplanar waveguides for 3D integration

    NARCIS (Netherlands)

    Lamy, Y.; Jinesh, K.B.; Roozeboom, F.; Gravesteijn, D.J.; Besling, W.F.A.

    2010-01-01

    High-aspect ratio (12.5) through silicon vias (TSV) made in a silicon interposer have been electrically characterized in the direct current (dc) and microwave regimes for 3D interconnect applications. The vias were micro-machined in silicon, insulated, and filled with copper employing a bottom-up

  14. Process for forming a porous silicon member in a crystalline silicon member

    Science.gov (United States)

    Northrup, M. Allen; Yu, Conrad M.; Raley, Norman F.

    1999-01-01

    Fabrication and use of porous silicon structures to increase surface area of heated reaction chambers, electrophoresis devices, and thermopneumatic sensor-actuators, chemical preconcentrates, and filtering or control flow devices. In particular, such high surface area or specific pore size porous silicon structures will be useful in significantly augmenting the adsorption, vaporization, desorption, condensation and flow of liquids and gasses in applications that use such processes on a miniature scale. Examples that will benefit from a high surface area, porous silicon structure include sample preconcentrators that are designed to adsorb and subsequently desorb specific chemical species from a sample background; chemical reaction chambers with enhanced surface reaction rates; and sensor-actuator chamber devices with increased pressure for thermopneumatic actuation of integrated membranes. Examples that benefit from specific pore sized porous silicon are chemical/biological filters and thermally-activated flow devices with active or adjacent surfaces such as electrodes or heaters.

  15. Electronic defect levels in continuous wave laser annealed silicon metal oxide semiconductor devices

    Science.gov (United States)

    Cervera, M.; Garcia, B. J.; Martinez, J.; Garrido, J.; Piqueras, J.

    1988-09-01

    The effect of laser treatment on the bulk and interface states of the Si-SiO2 structure has been investigated. The annealing was performed prior to the gate metallization using a continuous wave Ar+ laser. For low laser powers the interface state density seems to decrease slightly in comparison with untreated samples. However, for the highest irradiating laser powers a new bulk level at 0.41 eV above the valence band with concentrations up to 1015 cm-3 arises probably due to the electrical activation of the oxygen diluted in the Czochralski silicon. Later postmetallization annealings reduce the interface state density to values in the 1010 cm-2 eV-1 range but leave the concentration of the 0.41-eV center nearly unchanged.

  16. Ensembles of indium phosphide nanowires: physical properties and functional devices integrated on non-single crystal platforms

    Energy Technology Data Exchange (ETDEWEB)

    Kobayashi, Nobuhiko P.; Lohn, Andrew; Onishi, Takehiro [University of California, Santa Cruz (United States). Baskin School of Engineering; NASA Ames Research Center, Nanostructured Energy Conversion Technology and Research (NECTAR), Advanced Studies Laboratories, Univ. of California Santa Cruz, Moffett Field, CA (United States); Mathai, Sagi; Li, Xuema; Straznicky, Joseph; Wang, Shih-Yuan; Williams, R.S. [Hewlett-Packard Laboratories, Information and Quantum Systems Laboratory, Palo Alto, CA (United States); Logeeswaran, V.J.; Islam, M.S. [University of California Davis, Electrical and Computer Engineering, Davis, CA (United States)

    2009-06-15

    A new route to grow an ensemble of indium phosphide single-crystal semiconductor nanowires is described. Unlike conventional epitaxial growth of single-crystal semiconductor films, the proposed route for growing semiconductor nanowires does not require a single-crystal semiconductor substrate. In the proposed route, instead of using single-crystal semiconductor substrates that are characterized by their long-range atomic ordering, a template layer that possesses short-range atomic ordering prepared on a non-single-crystal substrate is employed. On the template layer, epitaxial information associated with its short-range atomic ordering is available within an area that is comparable to that of a nanowire root. Thus the template layer locally provides epitaxial information required for the growth of semiconductor nanowires. In the particular demonstration described in this paper, hydrogenated silicon was used as a template layer for epitaxial growth of indium phosphide nanowires. The indium phosphide nanowires grown on the hydrogenerated silicon template layer were found to be single crystal and optically active. Simple photoconductors and pin-diodes were fabricated and tested with the view towards various optoelectronic device applications where group III-V compound semiconductors are functionally integrated onto non-single-crystal platforms. (orig.)

  17. Ensembles of indium phosphide nanowires: physical properties and functional devices integrated on non-single crystal platforms

    International Nuclear Information System (INIS)

    Kobayashi, Nobuhiko P.; Lohn, Andrew; Onishi, Takehiro; Mathai, Sagi; Li, Xuema; Straznicky, Joseph; Wang, Shih-Yuan; Williams, R.S.; Logeeswaran, V.J.; Islam, M.S.

    2009-01-01

    A new route to grow an ensemble of indium phosphide single-crystal semiconductor nanowires is described. Unlike conventional epitaxial growth of single-crystal semiconductor films, the proposed route for growing semiconductor nanowires does not require a single-crystal semiconductor substrate. In the proposed route, instead of using single-crystal semiconductor substrates that are characterized by their long-range atomic ordering, a template layer that possesses short-range atomic ordering prepared on a non-single-crystal substrate is employed. On the template layer, epitaxial information associated with its short-range atomic ordering is available within an area that is comparable to that of a nanowire root. Thus the template layer locally provides epitaxial information required for the growth of semiconductor nanowires. In the particular demonstration described in this paper, hydrogenated silicon was used as a template layer for epitaxial growth of indium phosphide nanowires. The indium phosphide nanowires grown on the hydrogenerated silicon template layer were found to be single crystal and optically active. Simple photoconductors and pin-diodes were fabricated and tested with the view towards various optoelectronic device applications where group III-V compound semiconductors are functionally integrated onto non-single-crystal platforms. (orig.)

  18. Investigation of properties of novel silicon pixel assemblies employing thin n-in-p sensors and 3D-integration

    International Nuclear Information System (INIS)

    Weigell, Philipp

    2013-01-01

    Until the end of the 2020 decade the LHC programme will be defining the high energy frontier of particle physics. During this time, three upgrade steps of the accelerator are currently planned to further increase the luminosity and energy reach. In the course of these upgrades the specifications of several parts of the current LHC detectors will be exceeded. Especially, the innermost tracking detectors are challenged by the increasing track densities and the radiation damage. This thesis focuses on the implications for the ATLAS experiment. Here, around 2021/2, after having collected an integrated luminosity of around 300 fb -1 , the silicon and gas detector components of the inner tracker will reach the end of their lifetime and will need to be replaced to ensure sufficient performance for continued running - especially if the luminosity is raised to about 5 x 10 35 cm -2 s -1 as currently planned. An all silicon inner detector is foreseen to be installed. This upgrade demands cost effective pixel assemblies with a minimal material budget, a larger active area fraction as compared to the current detectors, and a higher granularity. Furthermore, the assemblies must be able to withstand received fluences up to 2 . 10 16 n eq /cm 2 . A new pixel assembly concept answering the challenges posed by the high instantaneous luminosities is investigated in this thesis. It employs five novel technologies, namely n-in-p pixel sensors, thin pixel sensors, slim edges with or without implanted sensor sides, and 3D-integration incorporating a new interconnection technology, named Solid Liquid InterDiffusion (SLID) as well as Inter-Chip-Vias (ICVs). n-in-p sensors are cost-effective, since they only need patterned processing on one side. Their performance before and after irradiation is investigated and compared to results obtained with currently used n-in-n sensors. Reducing the thickness of the sensors lowers the amount of multiple scattering within the tracking system and leads

  19. Investigation of properties of novel silicon pixel assemblies employing thin n-in-p sensors and 3D-integration

    Energy Technology Data Exchange (ETDEWEB)

    Weigell, Philipp

    2013-01-15

    Until the end of the 2020 decade the LHC programme will be defining the high energy frontier of particle physics. During this time, three upgrade steps of the accelerator are currently planned to further increase the luminosity and energy reach. In the course of these upgrades the specifications of several parts of the current LHC detectors will be exceeded. Especially, the innermost tracking detectors are challenged by the increasing track densities and the radiation damage. This thesis focuses on the implications for the ATLAS experiment. Here, around 2021/2, after having collected an integrated luminosity of around 300 fb{sup -1}, the silicon and gas detector components of the inner tracker will reach the end of their lifetime and will need to be replaced to ensure sufficient performance for continued running - especially if the luminosity is raised to about 5 x 10{sup 35} cm{sup -2}s{sup -1} as currently planned. An all silicon inner detector is foreseen to be installed. This upgrade demands cost effective pixel assemblies with a minimal material budget, a larger active area fraction as compared to the current detectors, and a higher granularity. Furthermore, the assemblies must be able to withstand received fluences up to 2 . 10{sup 16} n{sub eq}/cm{sup 2}. A new pixel assembly concept answering the challenges posed by the high instantaneous luminosities is investigated in this thesis. It employs five novel technologies, namely n-in-p pixel sensors, thin pixel sensors, slim edges with or without implanted sensor sides, and 3D-integration incorporating a new interconnection technology, named Solid Liquid InterDiffusion (SLID) as well as Inter-Chip-Vias (ICVs). n-in-p sensors are cost-effective, since they only need patterned processing on one side. Their performance before and after irradiation is investigated and compared to results obtained with currently used n-in-n sensors. Reducing the thickness of the sensors lowers the amount of multiple scattering

  20. Dosimetric properties of an amorphous silicon electronic portal imaging device for verification of dynamic intensity modulated radiation therapy

    International Nuclear Information System (INIS)

    Greer, Peter B.; Popescu, Carmen C.

    2003-01-01

    Dosimetric properties of an amorphous silicon electronic portal imaging device (EPID) for verification of dynamic intensity modulated radiation therapy (IMRT) delivery were investigated. The EPID was utilized with continuous frame-averaging during the beam delivery. Properties studied included effect of buildup, dose linearity, field size response, sampling of rapid multileaf collimator (MLC) leaf speeds, response to dose-rate fluctuations, memory effect, and reproducibility. The dependence of response on EPID calibration and a dead time in image frame acquisition occurring every 64 frames were measured. EPID measurements were also compared to ion chamber and film for open and wedged static fields and IMRT fields. The EPID was linear with dose and dose rate, and response to MLC leaf speeds up to 2.5 cm s-1 was found to be linear. A field size dependent response of up to 5% relative to d max ion-chamber measurement was found. Reproducibility was within 0.8% (1 standard deviation) for an IMRT delivery recorded at intervals over a period of one month. The dead time in frame acquisition resulted in errors in the EPID that increased with leaf speed and were over 20% for a 1 cm leaf gap moving at 1.0 cm s-1. The EPID measurements were also found to depend on the input beam profile utilized for EPID flood-field calibration. The EPID shows promise as a device for verification of IMRT, the major limitation currently being due to dead-time in frame acquisition