Nanophotonic integrated circuits from nanoresonators grown on silicon.

Science.gov (United States)

Chen, Roger; Ng, Kar Wei; Ko, Wai Son; Parekh, Devang; Lu, Fanglu; Tran, Thai-Truong D; Li, Kun; Chang-Hasnain, Connie

2014-07-07

Harnessing light with photonic circuits promises to catalyse powerful new technologies much like electronic circuits have in the past. Analogous to Moore's law, complexity and functionality of photonic integrated circuits depend on device size and performance scale. Semiconductor nanostructures offer an attractive approach to miniaturize photonics. However, shrinking photonics has come at great cost to performance, and assembling such devices into functional photonic circuits has remained an unfulfilled feat. Here we demonstrate an on-chip optical link constructed from InGaAs nanoresonators grown directly on a silicon substrate. Using nanoresonators, we show a complete toolkit of circuit elements including light emitters, photodetectors and a photovoltaic power supply. Devices operate with gigahertz bandwidths while consuming subpicojoule energy per bit, vastly eclipsing performance of prior nanostructure-based optoelectronics. Additionally, electrically driven stimulated emission from an as-grown nanostructure is presented for the first time. These results reveal a roadmap towards future ultradense nanophotonic integrated circuits.

An optoelectronic integrated device including a laser and its driving circuit

Energy Technology Data Exchange (ETDEWEB)

Matsueda, H.; Nakano, H.; Tanaka, T.P.

1984-10-01

A monolithic optoelectronic integrated circuit (OEIC) including a laser diode, photomonitor and driving and detecting circuits has been fabricated on a semi-insulating GaAs substrate. The OEIC has a horizontal integrating structure which is suitable for realising high-density multifunctional devices. The fabricating process and the static and dynamic characteristics of the optical and electronic elements are described. The preliminary results of the co-operative operation of the laser and its driving circuit are also presented.

Microwave integrated circuit for Josephson voltage standards

Science.gov (United States)

Holdeman, L. B.; Toots, J.; Chang, C. C. (Inventor)

1980-01-01

A microwave integrated circuit comprised of one or more Josephson junctions and short sections of microstrip or stripline transmission line is fabricated from thin layers of superconducting metal on a dielectric substrate. The short sections of transmission are combined to form the elements of the circuit and particularly, two microwave resonators. The Josephson junctions are located between the resonators and the impedance of the Josephson junctions forms part of the circuitry that couples the two resonators. The microwave integrated circuit has an application in Josephson voltage standards. In this application, the device is asymmetrically driven at a selected frequency (approximately equal to the resonance frequency of the resonators), and a d.c. bias is applied to the junction. By observing the current voltage characteristic of the junction, a precise voltage, proportional to the frequency of the microwave drive signal, is obtained.

Microwave integrated circuits for space applications

Science.gov (United States)

Leonard, Regis F.; Romanofsky, Robert R.

1991-01-01

Monolithic microwave integrated circuits (MMIC), which incorporate all the elements of a microwave circuit on a single semiconductor substrate, offer the potential for drastic reductions in circuit weight and volume and increased reliability, all of which make many new concepts in electronic circuitry for space applications feasible, including phased array antennas. NASA has undertaken an extensive program aimed at development of MMICs for space applications. The first such circuits targeted for development were an extension of work in hybrid (discrete component) technology in support of the Advanced Communication Technology Satellite (ACTS). It focused on power amplifiers, receivers, and switches at ACTS frequencies. More recent work, however, focused on frequencies appropriate for other NASA programs and emphasizes advanced materials in an effort to enhance efficiency, power handling capability, and frequency of operation or noise figure to meet the requirements of space systems.

Inverter circuits on freestanding flexible substrate using ZnO nanoparticles for cost-efficient electronics

Science.gov (United States)

Vidor, Fábio F.; Meyers, Thorsten; Müller, Kathrin; Wirth, Gilson I.; Hilleringmann, Ulrich

2017-11-01

Driven by the Internet of Things (IoT), flexible and transparent smart systems have been intensively researched by the scientific community and by several companies. This technology is already available for consumers in a wide range of innovative products, e.g., flexible displays, radio-frequency identification tags and wearable electronic skins which, for instance, collect and analyze data for medical applications. For these systems, thin-film transistors (TFTs) are the key elements responsible for the driving currents. Solution-based materials such as nanoparticle dispersions avail the fabrication on large-area substrates with high throughput processes. In this study, we discuss the integration of ZnO nanoparticle thin-film transistors and inverter circuits on freestanding polymeric substrates enclosing the main issues concerning the transfer of the integration process from a rigid substrate to a flexible one. The TFTs depict VON between -0.2 and 1 V, ION/IOFF > 104 and field-effect mobility >0.5 cm2 V-1 s-1. Additionally, in order to enhance the transistors and inverters performance, an adaptation on the device configuration, from an inverted coplanar to an inverted staggered setup, was conducted and analyzed. By employing the inverted staggered setup a considerable increase in the contact quality between the semiconductor and the drain and source electrodes was observed. As the integrated devices depict electrical characteristics which enable the fabrication of electronic circuits for the low-cost sector, inverters were fabricated and characterized, evaluating the circuit's gain as function of the applied supply voltage and circuit's geometric ratio.

3D integration of planar crossbar memristive devices with CMOS substrate

International Nuclear Information System (INIS)

Lin, Peng; Pi, Shuang; Xia, Qiangfei

2014-01-01

Planar memristive devices with bottom electrodes embedded into the substrates were integrated on top of CMOS substrates using nanoimprint lithography to implement hybrid circuits with a CMOL-like architecture. The planar geometry eliminated the mechanically and electrically weak parts, such as kinks in the top electrodes in a traditional crossbar structure, and allowed the use of thicker and thus less resistive metal wires as the bottom electrodes. Planar memristive devices integrated with CMOS have demonstrated much lower programing voltages and excellent switching uniformity. With the inclusion of the Moiré pattern, the integration process has sub-20 nm alignment accuracy, opening opportunities for 3D hybrid circuits in applications in the next generation of memory and unconventional computing. (paper)

Towards a modeling synthesis of two or three-dimensional circuits through substrate coupling and interconnections

CERN Document Server

Gontrand, Christian

2014-01-01

The number of transistors in integrated circuits doubles every two years, as stipulated by Moore's law, and this has been the driving force for the huge development of the microelectronics industry in the past 50 years - currently advanced to the nanometric scale.This e-book is dedicated to electronic noises and parasites, accounting for issues involving substrate coupling and interconnections, in the perspective of the 3D integration: a second track for enhancing integration, also compatible with Moore's law. This reference explains the modeling of 3D circuits without delving into the latest

Method of forming through substrate vias (TSVs) and singulating and releasing die having the TSVs from a mechanical support substrate

Science.gov (United States)

Okandan, Murat; Nielson, Gregory N

2014-12-09

Accessing a workpiece object in semiconductor processing is disclosed. The workpiece object includes a mechanical support substrate, a release layer over the mechanical support substrate, and an integrated circuit substrate coupled over the release layer. The integrated circuit substrate includes a device layer having semiconductor devices. The method also includes etching through-substrate via (TSV) openings through the integrated circuit substrate that have buried ends at or within the release layer including using the release layer as an etch stop. TSVs are formed by introducing one or more conductive materials into the TSV openings. A die singulation trench is etched at least substantially through the integrated circuit substrate around a perimeter of an integrated circuit die. The integrated circuit die is at least substantially released from the mechanical support substrate.

Series-connected substrate-integrated lead-carbon hybrid ...

Indian Academy of Sciences (India)

Voltage-management circuit for the ultracapacitor is presented, and its effectiveness is validated ... and V2 = 1.84 V. Clearly, ultracapacitor C1 is operating ... affect the reliability of the overall system. ... 3.1 Performance data for substrate-integrated lead-carbon .... Financial support from Department of Science & Technol-.

Historical overview and future approach on integrated photonic circuit technologies; Shusekiko gijutsu no ayumi to korekara no tenkai

Energy Technology Data Exchange (ETDEWEB)

Nakajima, H. [Waseda University, Tokyo (Japan). School of Science and Engineering

1997-08-01

Integration of optical circuits is discussed. A number of devices used in optical communication even today treat light beams emitted by optical fibers or by semiconductor lasers as spatial beams. In making preparations for mass production in the future, the effect of mere miniaturization of optical systems on optical substrates is quite limited. Realizing the presence of such a limit is one of the motivations to endeavor to embody integrated photonic circuits. In this report, comments will be focused only on the technology of waveguide type integration. Integrated circuits on a compound semiconductor substrate are quite difficult to deal with, more difficult than generally supposed. This is a task with a bright future when reviewed from the viewpoint of the effective use of the quantum effect. If integration is to be effected on a Si substrate, possibilities are high that the effort will bear fruit now that the substrate can withstand the full application of micro-machining. An LiNbO3 wave path, however, wants a breakthrough in the switching technology. As for the material to coat substrates with, polymer based nonlinear optical materials are not satisfying. The integrated photonic circuit technology can be said to be on the stage where questions limitlessly surface also in the science of materials. 14 refs., 2 tabs.

Flexible, High-Speed CdSe Nanocrystal Integrated Circuits.

Science.gov (United States)

Stinner, F Scott; Lai, Yuming; Straus, Daniel B; Diroll, Benjamin T; Kim, David K; Murray, Christopher B; Kagan, Cherie R

2015-10-14

We report large-area, flexible, high-speed analog and digital colloidal CdSe nanocrystal integrated circuits operating at low voltages. Using photolithography and a newly developed process to fabricate vertical interconnect access holes, we scale down device dimensions, reducing parasitic capacitances and increasing the frequency of circuit operation, and scale up device fabrication over 4 in. flexible substrates. We demonstrate amplifiers with ∼7 kHz bandwidth, ring oscillators with <10 μs stage delays, and NAND and NOR logic gates.

Micro-coolers fabricated as a component in an integrated circuit

International Nuclear Information System (INIS)

Glover, James; Oxley, Chris H; Khalid, Ata; Cumming, David; Stephen, Alex; Dunn, Geoff

2015-01-01

The packing density and power capacity of integrated electronics is increasing resulting in higher thermal flux densities. Improved thermal management techniques are required and one approach is to include thermoelectric coolers as part of the integrated circuit. An analysis will be described showing that the supporting substrate will have a large influence on the cooling capacity of the thermoelectric cooler. In particular, for materials with a low ZT figure of merit (for example gallium arsenide (GaAs) based compounds) the substrate will have to be substantially thinned to obtain cooling, which may preclude the use of thermoelectric coolers, for example, as part of a GaAs based integrated circuit. Further, using experimental techniques to measure only the small positive cooling temperature difference (ΔT) between the anode (T h ) and the cathode (T c ) contacts can be misinterpreted as cooling when in fact it is heating. (paper)

Silicon wafers for integrated circuit process

OpenAIRE

Leroy , B.

1986-01-01

Silicon as a substrate material will continue to dominate the market of integrated circuits for many years. We first review how crystal pulling procedures impact the quality of silicon. We then investigate how thermal treatments affect the behaviour of oxygen and carbon, and how, as a result, the quality of silicon wafers evolves. Gettering techniques are then presented. We conclude by detailing the requirements that wafers must satisfy at the incoming inspection.

Method for deposition of a conductor in integrated circuits

Science.gov (United States)

Creighton, J. Randall; Dominguez, Frank; Johnson, A. Wayne; Omstead, Thomas R.

1997-01-01

A method is described for fabricating integrated semiconductor circuits and, more particularly, for the selective deposition of a conductor onto a substrate employing a chemical vapor deposition process. By way of example, tungsten can be selectively deposited onto a silicon substrate. At the onset of loss of selectivity of deposition of tungsten onto the silicon substrate, the deposition process is interrupted and unwanted tungsten which has deposited on a mask layer with the silicon substrate can be removed employing a halogen etchant. Thereafter, a plurality of deposition/etch back cycles can be carried out to achieve a predetermined thickness of tungsten.

Varactor-tuned Substrate Integrated Evanescent Filter

DEFF Research Database (Denmark)

Zhurbenko, Vitaliy; Acar, Öncel; Dong, Yunfeng

Evanescent mode waveguides allow for more compact microwave component design in comparison to the traditional fundamental mode waveguide technology. Evanescent waveguides can be integrated into a dielectric substrate in order to further reduce the mass and volume. Unfortunately, traditional...... realization methods used in the standard evanescent waveguides are often not directly applicable to substrate integrated waveguide (SIW) technology due to dielectric filling and small height of the waveguide. In this work, one of the realization methods of evanescent waveguides using lumped elements...... is considered. In contrast to other methods described in the literature, it avoids etching split ring resonators in the metal layer of the SIW. The filters presented here use varactors as tuning elements. The varactors (as well as DC decoupling circuits) are mounted on the surface of PCB bringing the lower...

High quality silicon-based substrates for microwave and millimeter wave passive circuits

Science.gov (United States)

Belaroussi, Y.; Rack, M.; Saadi, A. A.; Scheen, G.; Belaroussi, M. T.; Trabelsi, M.; Raskin, J.-P.

2017-09-01

Porous silicon substrate is very promising for next generation wireless communication requiring the avoidance of high-frequency losses originating from the bulk silicon. In this work, new variants of porous silicon (PSi) substrates have been introduced. Through an experimental RF performance, the proposed PSi substrates have been compared with different silicon-based substrates, namely, standard silicon (Std), trap-rich (TR) and high resistivity (HR). All of the mentioned substrates have been fabricated where identical samples of CPW lines have been integrated on. The new PSi substrates have shown successful reduction in the substrate's effective relative permittivity to values as low as 3.7 and great increase in the substrate's effective resistivity to values higher than 7 kΩ cm. As a concept proof, a mm-wave bandpass filter (MBPF) centred at 27 GHz has been integrated on the investigated substrates. Compared with the conventional MBPF implemented on standard silicon-based substrates, the measured S-parameters of the PSi-based MBPF have shown high filtering performance, such as a reduction in insertion loss and an enhancement of the filter selectivity, with the joy of having the same filter performance by varying the temperature. Therefore, the efficiency of the proposed PSi substrates has been well highlighted. From 1994 to 1995, she was assistant of physics at (USTHB), Algiers . From 1998 to 2011, she was a Researcher at characterization laboratory in ionized media and laser division at the Advanced Technologies Development Center. She has integrated the Analog Radio Frequency Integrated Circuits team as Researcher since 2011 until now in Microelectronic and Nanotechnology Division at Advanced Technologies Development Center (CDTA), Algiers. She has been working towards her Ph.D. degree jointly at CDTA and Ecole Nationale Polytechnique, Algiers, since 2012. Her research interest includes fabrication and characterization of microwave passive devices on porous

Integrated circuit and method of arbitration in a network on an integrated circuit.

NARCIS (Netherlands)

2011-01-01

The invention relates to an integrated circuit and to a method of arbitration in a network on an integrated circuit. According to the invention, a method of arbitration in a network on an integrated circuit is provided, the network comprising a router unit, the router unit comprising a first input

Advanced field-solver techniques for RC extraction of integrated circuits

CERN Document Server

Yu, Wenjian

2014-01-01

Resistance and capacitance (RC) extraction is an essential step in modeling the interconnection wires and substrate coupling effect in nanometer-technology integrated circuits (IC). The field-solver techniques for RC extraction guarantee the accuracy of modeling, and are becoming increasingly important in meeting the demand for accurate modeling and simulation of VLSI designs. Advanced Field-Solver Techniques for RC Extraction of Integrated Circuits presents a systematic introduction to, and treatment of, the key field-solver methods for RC extraction of VLSI interconnects and substrate coupling in mixed-signal ICs. Various field-solver techniques are explained in detail, with real-world examples to illustrate the advantages and disadvantages of each algorithm. This book will benefit graduate students and researchers in the field of electrical and computer engineering, as well as engineers working in the IC design and design automation industries. Dr. Wenjian Yu is an Associate Professor at the Department of ...

MOS integrated circuit design

CERN Document Server

Wolfendale, E

2013-01-01

MOS Integral Circuit Design aims to help in the design of integrated circuits, especially large-scale ones, using MOS Technology through teaching of techniques, practical applications, and examples. The book covers topics such as design equation and process parameters; MOS static and dynamic circuits; logic design techniques, system partitioning, and layout techniques. Also featured are computer aids such as logic simulation and mask layout, as well as examples on simple MOS design. The text is recommended for electrical engineers who would like to know how to use MOS for integral circuit desi

Experimental and numerical study of electrical crosstalk in photonic integrated circuits

NARCIS (Netherlands)

Yao, W.; Gilardi, G.; Calabretta, N.; Smit, M.K.; Wale, M.J.

2015-01-01

This paper presents measurement results on electrical crosstalk between interconnect lines and electro-optical phaseshifters in photonic integrated circuits. The results indicate that overall crosstalk originates from radiative and substrate coupling between lines and from shared ground connections.

The Software Reliability of Large Scale Integration Circuit and Very Large Scale Integration Circuit

OpenAIRE

Artem Ganiyev; Jan Vitasek

2010-01-01

This article describes evaluation method of faultless function of large scale integration circuits (LSI) and very large scale integration circuits (VLSI). In the article there is a comparative analysis of factors which determine faultless of integrated circuits, analysis of already existing methods and model of faultless function evaluation of LSI and VLSI. The main part describes a proposed algorithm and program for analysis of fault rate in LSI and VLSI circuits.

In-situ fabrication of flexible vertically integrated electronic circuits by inkjet printing

International Nuclear Information System (INIS)

Wang Zhuo; Wu Wenwen; Yang Qunbao; Li Yongxiang; Noh, Chang-Ho

2009-01-01

In this paper, a facile approach for fabricating flexible vertically integrated electronic circuits is demonstrated. A desktop inkjet printer was modified and employed to print silver precursor on a polymer-coated buffer substrates. In-situ reaction was taken place and a conducting line was formed without need of a high temperature treatment. Through this process, several layers of metal integrated circuits were deposited sequentially with polymer buffer layers sandwiched between each layer. Hence, vertically integrated electronic components of diodes, solar cells, flexible flat panel displays, and electrochromic devices can be built with this simple and low-cost technique.

RFID and Memory Devices Fabricated Integrally on Substrates

Science.gov (United States)

Schramm, Harry F.

2004-01-01

Electronic identification devices containing radio-frequency identification (RFID) circuits and antennas would be fabricated integrally with the objects to be identified, according to a proposal. That is to say, the objects to be identified would serve as substrates for the deposition and patterning of the materials of the devices used to identify them, and each identification device would be bonded to the identified object at the molecular level. Vacuum arc vapor deposition (VAVD) is the NASA derived process for depositing layers of material on the substrate. This proposal stands in contrast to the current practice of fabricating RFID and/or memory devices as wafer-based, self-contained integrated-circuit chips that are subsequently embedded in or attached to plastic cards to make smart account-information cards and identification badges. If one relies on such a chip to store data on the history of an object to be tracked and the chip falls off or out of the object, then one loses both the historical data and the means to track the object and verify its identity electronically. Also, in contrast is the manufacturing philosophy in use today to make many memory devices. Today s methods involve many subtractive processes such as etching. This proposal only uses additive methods, building RFID and memory devices from the substrate up in thin layers. VAVD is capable of spraying silicon, copper, and other materials commonly used in electronic devices. The VAVD process sprays most metals and some ceramics. The material being sprayed has a very strong bond with the substrate, whether that substrate is metal, ceramic, or even wood, rock, glass, PVC, or paper. An object to be tagged with an identification device according to the proposal must be compatible with a vacuum deposition process. Temperature is seldom an issue as the substrate rarely reaches 150 F (66 C) during the deposition process. A portion of the surface of the object would be designated as a substrate for

Flexible and low-voltage integrated circuits constructed from high-performance nanocrystal transistors.

Science.gov (United States)

Kim, David K; Lai, Yuming; Diroll, Benjamin T; Murray, Christopher B; Kagan, Cherie R

2012-01-01

Colloidal semiconductor nanocrystals are emerging as a new class of solution-processable materials for low-cost, flexible, thin-film electronics. Although these colloidal inks have been shown to form single, thin-film field-effect transistors with impressive characteristics, the use of multiple high-performance nanocrystal field-effect transistors in large-area integrated circuits has not been shown. This is needed to understand and demonstrate the applicability of these discrete nanocrystal field-effect transistors for advanced electronic technologies. Here we report solution-deposited nanocrystal integrated circuits, showing nanocrystal integrated circuit inverters, amplifiers and ring oscillators, constructed from high-performance, low-voltage, low-hysteresis CdSe nanocrystal field-effect transistors with electron mobilities of up to 22 cm(2) V(-1) s(-1), current modulation >10(6) and subthreshold swing of 0.28 V dec(-1). We fabricated the nanocrystal field-effect transistors and nanocrystal integrated circuits from colloidal inks on flexible plastic substrates and scaled the devices to operate at low voltages. We demonstrate that colloidal nanocrystal field-effect transistors can be used as building blocks to construct complex integrated circuits, promising a viable material for low-cost, flexible, large-area electronics.

Thermally-induced voltage alteration for integrated circuit analysis

Energy Technology Data Exchange (ETDEWEB)

Cole, E.I. Jr.

2000-06-20

A thermally-induced voltage alteration (TIVA) apparatus and method are disclosed for analyzing an integrated circuit (IC) either from a device side of the IC or through the IC substrate to locate any open-circuit or short-circuit defects therein. The TIVA apparatus uses constant-current biasing of the IC while scanning a focused laser beam over electrical conductors (i.e. a patterned metallization) in the IC to produce localized heating of the conductors. This localized heating produces a thermoelectric potential due to the Seebeck effect in any conductors with open-circuit defects and a resistance change in any conductors with short-circuit defects, both of which alter the power demand by the IC and thereby change the voltage of a source or power supply providing the constant-current biasing. By measuring the change in the supply voltage and the position of the focused and scanned laser beam over time, any open-circuit or short-circuit defects in the IC can be located and imaged. The TIVA apparatus can be formed in part from a scanning optical microscope, and has applications for qualification testing or failure analysis of ICs.

Analysis and design of substrate integrated waveguide using efficient 2D hybrid method

CERN Document Server

Wu, Xuan Hui

2010-01-01

Substrate integrated waveguide (SIW) is a new type of transmission line. It implements a waveguide on a piece of printed circuit board by emulating the side walls of the waveguide using two rows of metal posts. It inherits the merits both from the microstrip for compact size and easy integration, and from the waveguide for low radiation loss, and thus opens another door to design efficient microwave circuits and antennas at a low cost. This book presents a two-dimensional fullwave analysis method to investigate an SIW circuit composed of metal and dielectric posts. It combines the cylindrical

Flexible and tunable silicon photonic circuits on plastic substrates

Science.gov (United States)

Chen, Yu; Li, Huan; Li, Mo

2012-09-01

Flexible microelectronics has shown tremendous promise in a broad spectrum of applications, especially those that cannot be addressed by conventional microelectronics in rigid materials and constructions. These unconventional yet important applications range from flexible consumer electronics to conformal sensor arrays and biomedical devices. A recent paradigm shift in implementing flexible electronics is to physically transfer highly integrated devices made in high-quality, crystalline semiconductors on to plastic substrates. Here we demonstrate a flexible form of silicon photonics using the transfer-and-bond fabrication method. Photonic circuits including interferometers and resonators have been transferred onto flexible plastic substrates with preserved functionalities and performance. By mechanically deforming, the optical characteristics of the devices can be tuned reversibly over a remarkably large range. The demonstration of the new flexible photonic systems based on the silicon-on-plastic (SOP) platform could open the door to many future applications, including tunable photonics, optomechanical sensors and biomechanical and bio-photonic probes.

Thermionic integrated circuits: electronics for hostile environments

International Nuclear Information System (INIS)

Lynn, D.K.; McCormick, J.B.; MacRoberts, M.D.J.; Wilde, D.K.; Dooley, G.R.; Brown, D.R.

1985-01-01

Thermionic integrated circuits combine vacuum tube technology with integrated circuit techniques to form integrated vacuum triode circuits. These circuits are capable of extended operation in both high-temperature and high-radiation environments

Optoelectronic integrated circuits utilising vertical-cavity surface-emitting semiconductor lasers

International Nuclear Information System (INIS)

Zakharov, S D; Fyodorov, V B; Tsvetkov, V V

1999-01-01

Optoelectronic integrated circuits with additional optical inputs/outputs, in which vertical-cavity surface-emitting (VCSE) lasers perform the data transfer functions, are considered. The mutual relationship and the 'affinity' between optical means for data transfer and processing, on the one hand, and the traditional electronic component base, on the other, are demonstrated in the case of implementation of three-dimensional interconnects with a high transmission capacity. Attention is drawn to the problems encountered when semiconductor injection lasers are used in communication lines. It is shown what role can be played by VCSE lasers in solving these problems. A detailed analysis is made of the topics relating to possible structural and technological solutions in the fabrication of single lasers and of their arrays, and also of the problems hindering integrating of lasers into emitter arrays. Considerable attention is given to integrated circuits with optoelectronic smart pixels. Various technological methods for vertical integration of GaAs VCSE lasers with the silicon substrate of a microcircuit (chip) are discussed. (review)

Integrated coherent matter wave circuits

International Nuclear Information System (INIS)

Ryu, C.; Boshier, M. G.

2015-01-01

An integrated coherent matter wave circuit is a single device, analogous to an integrated optical circuit, in which coherent de Broglie waves are created and then launched into waveguides where they can be switched, divided, recombined, and detected as they propagate. Applications of such circuits include guided atom interferometers, atomtronic circuits, and precisely controlled delivery of atoms. We report experiments demonstrating integrated circuits for guided coherent matter waves. The circuit elements are created with the painted potential technique, a form of time-averaged optical dipole potential in which a rapidly moving, tightly focused laser beam exerts forces on atoms through their electric polarizability. Moreover, the source of coherent matter waves is a Bose-Einstein condensate (BEC). Finally, we launch BECs into painted waveguides that guide them around bends and form switches, phase coherent beamsplitters, and closed circuits. These are the basic elements that are needed to engineer arbitrarily complex matter wave circuitry

Variational integrators for electric circuits

International Nuclear Information System (INIS)

Ober-Blöbaum, Sina; Tao, Molei; Cheng, Mulin; Owhadi, Houman; Marsden, Jerrold E.

2013-01-01

In this contribution, we develop a variational integrator for the simulation of (stochastic and multiscale) electric circuits. When considering the dynamics of an electric circuit, one is faced with three special situations: 1. The system involves external (control) forcing through external (controlled) voltage sources and resistors. 2. The system is constrained via the Kirchhoff current (KCL) and voltage laws (KVL). 3. The Lagrangian is degenerate. Based on a geometric setting, an appropriate variational formulation is presented to model the circuit from which the equations of motion are derived. A time-discrete variational formulation provides an iteration scheme for the simulation of the electric circuit. Dependent on the discretization, the intrinsic degeneracy of the system can be canceled for the discrete variational scheme. In this way, a variational integrator is constructed that gains several advantages compared to standard integration tools for circuits; in particular, a comparison to BDF methods (which are usually the method of choice for the simulation of electric circuits) shows that even for simple LCR circuits, a better energy behavior and frequency spectrum preservation can be observed using the developed variational integrator

SPICE Modeling of Body Bias Effect in 4H-SiC Integrated Circuit Resistors

Science.gov (United States)

Neudeck, Philip G.

2017-01-01

The DC electrical behavior of n-type 4H-SiC resistors used for realizing 500C durable integrated circuits (ICs) is studied as a function of substrate bias and temperature. Improved fidelity electrical simulation is described using SPICE NMOS model to simulate resistor substrate body bias effect that is absent from the SPICE semiconductor resistor model.

Monolithically Integrated Flexible Black Phosphorus Complementary Inverter Circuits.

Science.gov (United States)

Liu, Yuanda; Ang, Kah-Wee

2017-07-25

Two-dimensional (2D) inverters are a fundamental building block for flexible logic circuits which have previously been realized by heterogeneously wiring transistors with two discrete channel materials. Here, we demonstrate a monolithically integrated complementary inverter made using a homogeneous black phosphorus (BP) nanosheet on flexible substrates. The digital logic inverter circuit is demonstrated via effective threshold voltage tuning within a single BP material, which offers both electron and hole dominated conducting channels with nearly symmetric pinch-off and current saturation. Controllable electron concentration is achieved by accurately modulating the aluminum (Al) donor doping, which realizes BP n-FET with a room-temperature on/off ratio >10 3 . Simultaneously, work function engineering is employed to obtain a low Schottky barrier contact electrode that facilities hole injection, thus enhancing the current density of the BP p-FET by 9.4 times. The flexible inverter circuit shows a clear digital logic voltage inversion operation along with a larger-than-unity direct current voltage gain, while exhibits alternating current dynamic signal switching at a record high frequency up to 100 kHz and remarkable electrical stability upon mechanical bending with a radii as small as 4 mm. Our study demonstrates a practical monolithic integration strategy for achieving functional logic circuits on one material platform, paving the way for future high-density flexible electronic applications.

Fast electromagnetic characterization of integrated circuit passive isolation structures based on interference blocking

NARCIS (Netherlands)

Grau Novellas, M.; Serra, R.; Rose, Matthias

2017-01-01

An early characterization of integrated circuit passive isolation structures is crucial to predict their performance and effectiveness in minimizing substrate coupling. In this paper, an electromagnetic (EM) modeling methodology is proposed, which can be applied to different types of isolation

Graphene radio frequency receiver integrated circuit.

Science.gov (United States)

Han, Shu-Jen; Garcia, Alberto Valdes; Oida, Satoshi; Jenkins, Keith A; Haensch, Wilfried

2014-01-01

Graphene has attracted much interest as a future channel material in radio frequency electronics because of its superior electrical properties. Fabrication of a graphene integrated circuit without significantly degrading transistor performance has proven to be challenging, posing one of the major bottlenecks to compete with existing technologies. Here we present a fabrication method fully preserving graphene transistor quality, demonstrated with the implementation of a high-performance three-stage graphene integrated circuit. The circuit operates as a radio frequency receiver performing signal amplification, filtering and downconversion mixing. All circuit components are integrated into 0.6 mm(2) area and fabricated on 200 mm silicon wafers, showing the unprecedented graphene circuit complexity and silicon complementary metal-oxide-semiconductor process compatibility. The demonstrated circuit performance allow us to use graphene integrated circuit to perform practical wireless communication functions, receiving and restoring digital text transmitted on a 4.3-GHz carrier signal.

Radiation-hardened CMOS integrated circuits

International Nuclear Information System (INIS)

Derbenwick, G.F.; Hughes, R.C.

1977-01-01

Electronic circuits that operate properly after exposure to ionizing radiation are necessary for nuclear weapon systems, satellites, and apparatus designed for use in radiation environments. The program to develop and theoretically model radiation-tolerant integrated circuit components has resulted in devices that show an improvement in hardness up to a factor of ten thousand over earlier devices. An inverter circuit produced functions properly after an exposure of 10 6 Gy (Si) which, as far as is known, is the record for an integrated circuit

Total Dose Effects on Bipolar Integrated Circuits at Low Temperature

Science.gov (United States)

Johnston, A. H.; Swimm, R. T.; Thorbourn, D. O.

2012-01-01

Total dose damage in bipolar integrated circuits is investigated at low temperature, along with the temperature dependence of the electrical parameters of internal transistors. Bandgap narrowing causes the gain of npn transistors to decrease far more at low temperature compared to pnp transistors, due to the large difference in emitter doping concentration. When irradiations are done at temperatures of -140 deg C, no damage occurs until devices are warmed to temperatures above -50 deg C. After warm-up, subsequent cooling shows that damage is then present at low temperature. This can be explained by the very strong temperature dependence of dispersive transport in the continuous-time-random-walk model for hole transport. For linear integrated circuits, low temperature operation is affected by the strong temperature dependence of npn transistors along with the higher sensitivity of lateral and substrate pnp transistors to radiation damage.

Secure integrated circuits and systems

CERN Document Server

Verbauwhede, Ingrid MR

2010-01-01

On any advanced integrated circuit or 'system-on-chip' there is a need for security. In many applications the actual implementation has become the weakest link in security rather than the algorithms or protocols. The purpose of the book is to give the integrated circuits and systems designer an insight into the basics of security and cryptography from the implementation point of view. As a designer of integrated circuits and systems it is important to know both the state-of-the-art attacks as well as the countermeasures. Optimizing for security is different from optimizations for speed, area,

Flexible, Photopatterned, Colloidal CdSe Semiconductor Nanocrystal Integrated Circuits

Science.gov (United States)

Stinner, F. Scott

As semiconductor manufacturing pushes towards smaller and faster transistors, a parallel goal exists to create transistors which are not nearly as small. These transistors are not intended to match the performance of traditional crystalline semiconductors; they are designed to be significantly lower in cost and manufactured using methods that can make them physically flexible for applications where form is more important than speed. One of the developing technologies for this application is semiconductor nanocrystals. We first explore methods to develop CdSe nanocrystal semiconducting "inks" into large-scale, high-speed integrated circuits. We demonstrate photopatterned transistors with mobilities of 10 cm2/Vs on Kapton substrates. We develop new methods for vertical interconnect access holes to demonstrate multi-device integrated circuits including inverting amplifiers with 7 kHz bandwidths, ring oscillators with NFC) link. The device draws its power from the NFC transmitter common on smartphones and eliminates the need for a fixed battery. This allows for the mass deployment of flexible, interactive displays on product packaging.

Dielectric isolation for power integrated circuits; Isolation dielectrique enterree pour les circuits integres de puissance

Energy Technology Data Exchange (ETDEWEB)

Zerrouk, D.

1997-07-18

Considerable efforts have been recently directed towards integrating onto the same chip, sense or protection elements that is low voltage analog and/or digital control circuitry together with high voltage/high current devices. Most of these so called `smart power` devices use either self isolation, junction isolation or Silicon-On-Insulator (SOI) to integrate low voltage elements with vertical power devices. Dielectric isolation is superior to the other isolation techniques such as self isolation or junction isolation. Thesis work consists of the study of the feasibility of a dielectric technology based on the melting and the solidification in a Rapid Thermal Processing furnace (RTP), of thick polysilicon films deposited on oxide. The purpose of this technique is to obtain substrate with localized SOI structures for smart power applications. SOI technology offers significant potential advantages, such as non-occurrence of latch-up in CMOS structures, high packaging density, low parasitic capacitance and the possibility of 3D structures. In addition, SOI technology using thick silicon films (10-100 {mu}m) offers special advantages for high voltage integrated circuits. Several techniques have been developed to form SOI films. Zone melting recrystallization is one of the most promising for localized SOI. The SOI structures have first been analyzed in term of extended defects. N-channel MOSFET`s transistors have also been fabricated in the SOI substrates and electrically characterized (threshold voltages, off-state leakage current, mobilities,...). The SOI transistors exhibit good characteristics, although inferior to witness transistors. The recrystallized silicon films are therefore found to be suitable for the fabrication of SOI devices. (author) 106 refs.

Radio-frequency integrated-circuit engineering

CERN Document Server

Nguyen, Cam

2015-01-01

Radio-Frequency Integrated-Circuit Engineering addresses the theory, analysis and design of passive and active RFIC's using Si-based CMOS and Bi-CMOS technologies, and other non-silicon based technologies. The materials covered are self-contained and presented in such detail that allows readers with only undergraduate electrical engineering knowledge in EM, RF, and circuits to understand and design RFICs. Organized into sixteen chapters, blending analog and microwave engineering, Radio-Frequency Integrated-Circuit Engineering emphasizes the microwave engineering approach for RFICs. Provide

Inclusion of Body Bias Effect in SPICE Modeling of 4H-SiC Integrated Circuit Resistors

Science.gov (United States)

Neudeck, Philip G.

2017-01-01

The DC electrical behavior of n-type 4H-SiC resistors used for realizing 500 degrees Celsius durable integrated circuits (ICs) is studied as a function of substrate bias and temperature. Improved fidelity electrical simulation is described using SPICE NMOS model to simulate resistor substrate body bias effect that is absent from the SPICE semiconductor resistor model.

Inclusion of Body-Bias Effect in SPICE Modeling of 4H-SiC Integrated Circuit Resistors

Science.gov (United States)

Neudeck, Philip G.

2017-01-01

The DC electrical behavior of n-type 4H-SiC resistors used for realizing 500 C durable integrated circuits (ICs) is studied as a function of substrate bias and temperature. Improved fidelity electrical simulation is described using SPICE NMOS model to simulate resistor substrate body bias effect that is absent from the SPICE semiconductor resistor model.

Modelling of Substrate Noise and Mitigation Schemes for UWB Systems

DEFF Research Database (Denmark)

Shen, Ming; Mikkelsen, Jan H.; Larsen, Torben

2012-01-01

tuned elements in the signal paths. However, for UWB designs this is not a viable option and other means are therefore required. Moreover, owing to the ultra-wideband nature and low power spectral density of the signal, UWB mixed-signal integrated circuits are more sensitive to substrate noise compared...... with narrow-band circuits. This chapter presents a study on the modeling and mitigation of substrate noise in mixed-signal integrated circuits (ICs), focusing on UWB system/circuit designs. Experimental impact evaluation of substrate noise on UWB circuits is presented. It shows how a wide-band circuit can......The last chapter of this first part of the book, chapter seven, is devoted to Modeling of Substrate Noise and Mitigation Schemes for Ultrawideband (UWB) systems, and is written by Ming Shen, Jan H. Mikkelsen, and Torben Larsen from Aalborg University, Denmark. In highly integrated mixed...

Experimental Device for Learning of Logical Circuit Design using Integrated Circuits

OpenAIRE

石橋, 孝昭

2012-01-01

This paper presents an experimental device for learning of logical circuit design using integrated circuits and breadboards. The experimental device can be made at a low cost and can be used for many subjects such as logical circuits, computer engineering, basic electricity, electrical circuits and electronic circuits. The proposed device is effective to learn the logical circuits than the usual lecture.

Improvements in or relating to transistor circuits

International Nuclear Information System (INIS)

Richards, R.F.; Williamson, P.W.

1978-01-01

This invention relates to transistor circuits and in particular to integrated transistor circuits formed on a substrate of semi-conductor material such as silicon. The invention is concerned with providing integrated circuits in which malfunctions caused by the effects of ionising, e.g. nuclear, radiations are reduced. (author)

A Series-Fed Linear Substrate-Integrated Dielectric Resonator Antenna Array for Millimeter-Wave Applications

Directory of Open Access Journals (Sweden)

Ke Gong

2018-01-01

Full Text Available A series-fed linear substrate-integrated dielectric resonator antenna array (SIDRAA is presented for millimeter-wave applications, in which the substrate-integrated dielectric resonator antenna (SIDRA elements and the feeding structure can be codesigned and fabricated using the same planar process. A prototype 4 × 1 SIDRAA is designed at Ka-band and fabricated with a two-layer printed circuit board (PCB technology. Four SIDRAs are implemented in the Rogers RT6010 substrate using the perforation technique and fed by a compact substrate-integrated waveguide (SIW through four longitudinal coupling slots within the Rogers RT5880 substrate. The return loss, radiation patterns, and antenna gain were experimentally studied, and good agreement between the measured and simulated results is observed. The SIDRAA example provides a bandwidth of about 10% around 34.5 GHz for 10 dB return loss and stable broadside radiation patterns with the peak gain of 10.5–11.5 dBi across the band.

Semiconductors integrated circuit design for manufacturability

CERN Document Server

Balasinki, Artur

2011-01-01

Because of the continuous evolution of integrated circuit manufacturing (ICM) and design for manufacturability (DfM), most books on the subject are obsolete before they even go to press. That's why the field requires a reference that takes the focus off of numbers and concentrates more on larger economic concepts than on technical details. Semiconductors: Integrated Circuit Design for Manufacturability covers the gradual evolution of integrated circuit design (ICD) as a basis to propose strategies for improving return-on-investment (ROI) for ICD in manufacturing. Where most books put the spotl

Silicon integrated circuit process

International Nuclear Information System (INIS)

Lee, Jong Duck

1985-12-01

This book introduces the process of silicon integrated circuit. It is composed of seven parts, which are oxidation process, diffusion process, ion implantation process such as ion implantation equipment, damage, annealing and influence on manufacture of integrated circuit and device, chemical vapor deposition process like silicon Epitaxy LPCVD and PECVD, photolithography process, including a sensitizer, spin, harden bake, reflection of light and problems related process, infrared light bake, wet-etch, dry etch, special etch and problems of etching, metal process like metal process like metal-silicon connection, aluminum process, credibility of aluminum and test process.

Silicon integrated circuit process

Energy Technology Data Exchange (ETDEWEB)

Lee, Jong Duck

1985-12-15

This book introduces the process of silicon integrated circuit. It is composed of seven parts, which are oxidation process, diffusion process, ion implantation process such as ion implantation equipment, damage, annealing and influence on manufacture of integrated circuit and device, chemical vapor deposition process like silicon Epitaxy LPCVD and PECVD, photolithography process, including a sensitizer, spin, harden bake, reflection of light and problems related process, infrared light bake, wet-etch, dry etch, special etch and problems of etching, metal process like metal process like metal-silicon connection, aluminum process, credibility of aluminum and test process.

Materials Integration and Doping of Carbon Nanotube-based Logic Circuits

Science.gov (United States)

Geier, Michael

Over the last 20 years, extensive research into the structure and properties of single- walled carbon nanotube (SWCNT) has elucidated many of the exceptional qualities possessed by SWCNTs, including record-setting tensile strength, excellent chemical stability, distinctive optoelectronic features, and outstanding electronic transport characteristics. In order to exploit these remarkable qualities, many application-specific hurdles must be overcome before the material can be implemented in commercial products. For electronic applications, recent advances in sorting SWCNTs by electronic type have enabled significant progress towards SWCNT-based integrated circuits. Despite these advances, demonstrations of SWCNT-based devices with suitable characteristics for large-scale integrated circuits have been limited. The processing methodologies, materials integration, and mechanistic understanding of electronic properties developed in this dissertation have enabled unprecedented scales of SWCNT-based transistor fabrication and integrated circuit demonstrations. Innovative materials selection and processing methods are at the core of this work and these advances have led to transistors with the necessary transport properties required for modern circuit integration. First, extensive collaborations with other research groups allowed for the exploration of SWCNT thin-film transistors (TFTs) using a wide variety of materials and processing methods such as new dielectric materials, hybrid semiconductor materials systems, and solution-based printing of SWCNT TFTs. These materials were integrated into circuit demonstrations such as NOR and NAND logic gates, voltage-controlled ring oscillators, and D-flip-flops using both rigid and flexible substrates. This dissertation explores strategies for implementing complementary SWCNT-based circuits, which were developed by using local metal gate structures that achieve enhancement-mode p-type and n-type SWCNT TFTs with widely separated and

High Q-factor tunable superconducting HF circuit

CERN Document Server

Vopilkin, E A; Pavlov, S A; Ponomarev, L I; Ganitsev, A Y; Zhukov, A S; Vladimirov, V V; Letyago, A G; Parshikov, V V

2001-01-01

Feasibility of constructing a high Q-factor (Q approx 10 sup 5) mechanically tunable in a wide range of frequencies (12-63 MHz) vibration circuit of HF range was considered. The tunable circuit integrates two single circuits made using YBaCuO films. The circuit frequency is tuned by changing distance X (capacity) between substrates. Potentiality of using substrates of lanthanum aluminate, neodymium gallate and strontium titanate for manufacture of single circuits was considered. Q-factor of the circuit amounted to 68000 at resonance frequency of 6.88 MHz

High Q-factor tunable superconducting HF circuit

International Nuclear Information System (INIS)

Vopilkin, E.A.; Parafin, A.E.; Pavlov, S.A.; Ponomarev, L.I.; Ganitsev, A.Yu.; Zhukov, A.S.; Vladimirov, V.V.; Letyago, A.G.; Parshikov, V.V.

2001-01-01

Feasibility of constructing a high Q-factor (Q ∼ 10 5 ) mechanically tunable in a wide range of frequencies (12-63 MHz) vibration circuit of HF range was considered. The tunable circuit integrates two single circuits made using YBaCuO films. The circuit frequency is tuned by changing distance X (capacity) between substrates. Potentiality of using substrates of lanthanum aluminate, neodymium gallate and strontium titanate for manufacture of single circuits was considered. Q-factor of the circuit amounted to 68000 at resonance frequency of 6.88 MHz [ru

Thermoreflectance temperature imaging of integrated circuits: calibration technique and quantitative comparison with integrated sensors and simulations

International Nuclear Information System (INIS)

Tessier, G; Polignano, M-L; Pavageau, S; Filloy, C; Fournier, D; Cerutti, F; Mica, I

2006-01-01

Camera-based thermoreflectance microscopy is a unique tool for high spatial resolution thermal imaging of working integrated circuits. However, a calibration is necessary to obtain quantitative temperatures on the complex surface of integrated circuits. The spatial and temperature resolutions reached by thermoreflectance are excellent (360 nm and 2.5 x 10 -2 K in 1 min here), but the precision is more difficult to assess, notably due to the lack of comparable thermal techniques at submicron scales. We propose here a Peltier element control of the whole package temperature in order to obtain calibration coefficients simultaneously on several materials visible on the surface of the circuit. Under high magnifications, movements associated with thermal expansion are corrected using a piezo electric displacement and a software image shift. This calibration method has been validated by comparison with temperatures measured using integrated thermistors and diodes and by a finite volume simulation. We show that thermoreflectance measurements agree within a precision of ±2.3% with the on-chip sensors measurements. The diode temperature is found to underestimate the actual temperature of the active area by almost 70% due to the thermal contact of the diode with the substrate, acting as a heat sink

Design of analog integrated circuits and systems

CERN Document Server

Laker, Kenneth R

1994-01-01

This text is designed for senior or graduate level courses in analog integrated circuits or design of analog integrated circuits. This book combines consideration of CMOS and bipolar circuits into a unified treatment. Also included are CMOS-bipolar circuits made possible by BiCMOS technology. The text progresses from MOS and bipolar device modelling to simple one and two transistor building block circuits. The final two chapters present a unified coverage of sample-data and continuous-time signal processing systems.

Photonic Integrated Circuits

Science.gov (United States)

Krainak, Michael; Merritt, Scott

2016-01-01

Integrated photonics generally is the integration of multiple lithographically defined photonic and electronic components and devices (e.g. lasers, detectors, waveguides passive structures, modulators, electronic control and optical interconnects) on a single platform with nanometer-scale feature sizes. The development of photonic integrated circuits permits size, weight, power and cost reductions for spacecraft microprocessors, optical communication, processor buses, advanced data processing, and integrated optic science instrument optical systems, subsystems and components. This is particularly critical for small spacecraft platforms. We will give an overview of some NASA applications for integrated photonics.

Encapsulate-and-peel: fabricating carbon nanotube CMOS integrated circuits in a flexible ultra-thin plastic film.

Science.gov (United States)

Gao, Pingqi; Zhang, Qing

2014-02-14

Fabrication of single-walled carbon nanotube thin film (SWNT-TF) based integrated circuits (ICs) on soft substrates has been challenging due to several processing-related obstacles, such as printed/transferred SWNT-TF pattern and electrode alignment, electrical pad/channel material/dielectric layer flatness, adherence of the circuits onto the soft substrates etc. Here, we report a new approach that circumvents these challenges by encapsulating pre-formed SWNT-TF-ICs on hard substrates into polyimide (PI) and peeling them off to form flexible ICs on a large scale. The flexible SWNT-TF-ICs show promising performance comparable to those circuits formed on hard substrates. The flexible p- and n-type SWNT-TF transistors have an average mobility of around 60 cm(2) V(-1) s(-1), a subthreshold slope as low as 150 mV dec(-1), operating gate voltages less than 2 V, on/off ratios larger than 10(4) and a switching speed of several kilohertz. The post-transfer technique described here is not only a simple and cost-effective pathway to realize scalable flexible ICs, but also a feasible method to fabricate flexible displays, sensors and solar cells etc.

Enchanced total dose damage in junction field effect transistors and related linear integrated circuits

International Nuclear Information System (INIS)

Flament, O.; Autran, J.L.; Roche, P.; Leray, J.L.; Musseau, O.

1996-01-01

Enhanced total dose damage of Junction Field-effect Transistors (JFETs) due to low dose rate and/or elevated temperature has been investigated for elementary p-channel structures fabricated on bulk and SOI substrates as well as for related linear integrated circuits. All these devices were fabricated with conventional junction isolation (field oxide). Large increases in damage have been revealed by performing high temperature and/or low dose rate irradiations. These results are consistent with previous studies concerning bipolar field oxides under low-field conditions. They suggest that the transport of radiation-induced holes through the oxide is the underlying mechanism. Such an enhanced degradation must be taken into account for low dose rate effects on linear integrated circuits

Active components for integrated plasmonic circuits

DEFF Research Database (Denmark)

Krasavin, A.V.; Bolger, P.M.; Zayats, A.V.

2009-01-01

We present a comprehensive study of highly efficient and compact passive and active components for integrated plasmonic circuit based on dielectric-loaded surface plasmon polariton waveguides.......We present a comprehensive study of highly efficient and compact passive and active components for integrated plasmonic circuit based on dielectric-loaded surface plasmon polariton waveguides....

Vertically Integrated Circuits at Fermilab

International Nuclear Information System (INIS)

Deptuch, Grzegorz; Demarteau, Marcel; Hoff, James; Lipton, Ronald; Shenai, Alpana; Trimpl, Marcel; Yarema, Raymond; Zimmerman, Tom

2009-01-01

The exploration of the vertically integrated circuits, also commonly known as 3D-IC technology, for applications in radiation detection started at Fermilab in 2006. This paper examines the opportunities that vertical integration offers by looking at various 3D designs that have been completed by Fermilab. The emphasis is on opportunities that are presented by through silicon vias (TSV), wafer and circuit thinning and finally fusion bonding techniques to replace conventional bump bonding. Early work by Fermilab has led to an international consortium for the development of 3D-IC circuits for High Energy Physics. The consortium has submitted over 25 different designs for the Fermilab organized MPW run organized for the first time.

Development of 3D integrated circuits for HEP

International Nuclear Information System (INIS)

Yarema, R.; Fermilab

2006-01-01

Three dimensional integrated circuits are well suited to improving circuit bandwidth and increasing effective circuit density. Recent advances in industry have made 3D integrated circuits an option for HEP. The 3D technology is discussed in this paper and several examples are shown. Design of a 3D demonstrator chip for the ILC is presented

Using Multilayered Substrate Integrated Waveguide to Design Microwave Gain Equalizer

Directory of Open Access Journals (Sweden)

Yongfei Wang

2014-01-01

Full Text Available This paper presents the design and experiment of a novel microwave gain equalizer based on the substrate integrated waveguide (SIW technique. The proposed equalizer is formed by an SIW loaded by SIW resonators, which has very compact structure and can compensate for gain slope of microwave systems. Equivalent circuit analysis is given about the proposed structure for a better insight into the structure’s response. A Ku-Band equalizer with four SIW resonators is simulated and fabricated with a multilayer printed circuit board process. The measured results show good performance and agreement with the simulated results; an attenuation slope of −4.5 dB over 12.5–13.5 GHz is reached with a size reduction of 76%.

Materials issues in silicon integrated circuit processing

International Nuclear Information System (INIS)

Wittmer, M.; Stimmell, J.; Strathman, M.

1986-01-01

The symposium on ''Materials Issues in Integrated Circuit Processing'' sought to bring together all of the materials issued pertinent to modern integrated circuit processing. The inherent properties of the materials are becoming an important concern in integrated circuit manufacturing and accordingly research in materials science is vital for the successful implementation of modern integrated circuit technology. The session on Silicon Materials Science revealed the advanced stage of knowledge which topics such as point defects, intrinsic and extrinsic gettering and diffusion kinetics have achieved. Adaption of this knowledge to specific integrated circuit processing technologies is beginning to be addressed. The session on Epitaxy included invited papers on epitaxial insulators and IR detectors. Heteroepitaxy on silicon is receiving great attention and the results presented in this session suggest that 3-d integrated structures are an increasingly realistic possibility. Progress in low temperature silicon epitaxy and epitaxy of thin films with abrupt interfaces was also reported. Diffusion and Ion Implantation were well presented. Regrowth of implant-damaged layers and the nature of the defects which remain after regrowth were discussed in no less than seven papers. Substantial progress was also reported in the understanding of amorphising boron implants and the use of gallium implants for the formation of shallow p/sup +/ -layers

Integrated-circuit microwave detector based on granular high-Tc thin films. [Y-Ba-Cu-O

Energy Technology Data Exchange (ETDEWEB)

Drobinin, A.V.; Lutovinov, V.S.; Starostenko, I.V. (Moscow Inst. of Radioengineering, Electronics and Automation, (MIREA), Moscow (USSR))

1991-12-01

A highly sensitive integrative-circuit microwave detector based on granular High-Tc film has been designed. All matching circuits and High-Tc microbridge are located on the same substrate. The voltage responsivity 10{sup 3} V/W has been found at 65 K and frequency 5 GHz. Different modes of microwave detection have been observed: bolometric response near Tc in high-quality films, rectification mode caused by an array of weak links dominating in low-quality films, detection caused by nonlinear magnetic flux motion. (orig.).

A Fault Tolerant Integrated Circuit Memory

OpenAIRE

Barton, Anthony Francis

1980-01-01

Most commercially produced integrated circuits are incapable of tolerating manufacturing defects. The area and function of the circuits is thus limited by the probability of faults occurring within the circuit. This thesis examines techniques for using redundancy in memory circuits to provide fault tolerance and to increase storage capacity. A hierarchical memory architecture using multiple Hamming codes is introduced and analysed to determine its resistance to manufa...

Long-wavelength III-V/silicon photonic integrated circuits

NARCIS (Netherlands)

Roelkens, G.C.; Kuyken, B.; Leo, F.; Hattasan, N.; Ryckeboer, E.M.P.; Muneeb, M.; Hu, C.L.; Malik, A.; Hens, Z.; Baets, R.G.F.; Shimura, Y.; Gencarelli, F.; Vincent, B.; Loo, van de R.; Verheyen, P.A.; Lepage, G.; Campenhout, van J.; Cerutti, L.; Rodriquez, J.B.; Tournie, E.; Chen, X; Nedeljkovic, G.; Mashanovich, G.; Liu, X.; Green, W.S.

2013-01-01

We review our work in the field of short-wave infrared and mid-infrared photonic integrated circuits for applications in spectroscopic sensing systems. Passive silicon waveguide circuits, GeSn photodetectors, the integration of III-V and IV-VI semiconductors on these circuits, and silicon nonlinear

Encapsulate-and-peel: fabricating carbon nanotube CMOS integrated circuits in a flexible ultra-thin plastic film

International Nuclear Information System (INIS)

Gao, Pingqi; Zhang, Qing

2014-01-01

Fabrication of single-walled carbon nanotube thin film (SWNT-TF) based integrated circuits (ICs) on soft substrates has been challenging due to several processing-related obstacles, such as printed/transferred SWNT-TF pattern and electrode alignment, electrical pad/channel material/dielectric layer flatness, adherence of the circuits onto the soft substrates etc. Here, we report a new approach that circumvents these challenges by encapsulating pre-formed SWNT-TF-ICs on hard substrates into polyimide (PI) and peeling them off to form flexible ICs on a large scale. The flexible SWNT-TF-ICs show promising performance comparable to those circuits formed on hard substrates. The flexible p- and n-type SWNT-TF transistors have an average mobility of around 60 cm 2  V −1  s −1 , a subthreshold slope as low as 150 mV  dec −1 , operating gate voltages less than 2 V, on/off ratios larger than 10 4 and a switching speed of several kilohertz. The post-transfer technique described here is not only a simple and cost-effective pathway to realize scalable flexible ICs, but also a feasible method to fabricate flexible displays, sensors and solar cells etc. (paper)

INTEGRATED SENSOR EVALUATION CIRCUIT AND METHOD FOR OPERATING SAID CIRCUIT

OpenAIRE

Krüger, Jens; Gausa, Dominik

2015-01-01

WO15090426A1 Sensor evaluation device and method for operating said device Integrated sensor evaluation circuit for evaluating a sensor signal (14) received from a sensor (12), having a first connection (28a) for connection to the sensor and a second connection (28b) for connection to the sensor. The integrated sensor evaluation circuit comprises a configuration data memory (16) for storing configuration data which describe signal properties of a plurality of sensor control signals (26a-c). T...

Hybdrid integral circuit for proportional chambers

International Nuclear Information System (INIS)

Yanik, R.; Khudy, M.; Povinets, P.; Strmen', P.; Grabachek, Z.; Feshchenko, A.A.

1978-01-01

Outlined briefly are a hybrid integrated circuit of the channel. One channel contains an input amplifier, delay circuit, and memory register on the base of the D-type flip-flop and controlled by the recording gate pulse. Provided at the output of the channel is a readout gating circuit. Presented are the flowsheet of the channel, the shaper amplifier and logical channel. At present the logical circuit was accepted for manufacture

Integrated circuits, and design and manufacture thereof

Science.gov (United States)

Auracher, Stefan; Pribbernow, Claus; Hils, Andreas

2006-04-18

A representation of a macro for an integrated circuit layout. The representation may define sub-circuit cells of a module. The module may have a predefined functionality. The sub-circuit cells may include at least one reusable circuit cell. The reusable circuit cell may be configured such that when the predefined functionality of the module is not used, the reusable circuit cell is available for re-use.

Integrated optical circuit comprising a polarization convertor

NARCIS (Netherlands)

1998-01-01

An integrated optical circuit includes a first device and a second device, which devices are connected by a polarization convertor. The polarization convertor includes a curved section of a waveguide, integrated in the optical circuit. The curved section may have several differently curved

Extremely flexible nanoscale ultrathin body silicon integrated circuits on plastic.

Science.gov (United States)

Shahrjerdi, Davood; Bedell, Stephen W

2013-01-09

In recent years, flexible devices based on nanoscale materials and structures have begun to emerge, exploiting semiconductor nanowires, graphene, and carbon nanotubes. This is primarily to circumvent the existing shortcomings of the conventional flexible electronics based on organic and amorphous semiconductors. The aim of this new class of flexible nanoelectronics is to attain high-performance devices with increased packing density. However, highly integrated flexible circuits with nanoscale transistors have not yet been demonstrated. Here, we show nanoscale flexible circuits on 60 Å thick silicon, including functional ring oscillators and memory cells. The 100-stage ring oscillators exhibit the stage delay of ~16 ps at a power supply voltage of 0.9 V, the best reported for any flexible circuits to date. The mechanical flexibility is achieved by employing the controlled spalling technology, enabling the large-area transfer of the ultrathin body silicon devices to a plastic substrate at room temperature. These results provide a simple and cost-effective pathway to enable ultralight flexible nanoelectronics with unprecedented level of system complexity based on mainstream silicon technology.

Transistor and integrated circuit manufacture

Energy Technology Data Exchange (ETDEWEB)

Colman, D

1978-09-27

This invention relates to the manufacture of transistors and integrated circuits by ion bombardment techniques and is particularly, but not exclusively, of value in the manufacture of so-called integrated injection logic circuitry.

Transistor and integrated circuit manufacture

International Nuclear Information System (INIS)

Colman, D.

1978-01-01

This invention relates to the manufacture of transistors and integrated circuits by ion bombardment techniques and is particularly, but not exclusively, of value in the manufacture of so-called integrated injection logic circuitry. (author)

Design of 3D integrated circuits and systems

CERN Document Server

Sharma, Rohit

2014-01-01

Three-dimensional (3D) integration of microsystems and subsystems has become essential to the future of semiconductor technology development. 3D integration requires a greater understanding of several interconnected systems stacked over each other. While this vertical growth profoundly increases the system functionality, it also exponentially increases the design complexity. Design of 3D Integrated Circuits and Systems tackles all aspects of 3D integration, including 3D circuit and system design, new processes and simulation techniques, alternative communication schemes for 3D circuits and sys

Computer-aided engineering of semiconductor integrated circuits

Science.gov (United States)

Meindl, J. D.; Dutton, R. W.; Gibbons, J. F.; Helms, C. R.; Plummer, J. D.; Tiller, W. A.; Ho, C. P.; Saraswat, K. C.; Deal, B. E.; Kamins, T. I.

1980-07-01

Economical procurement of small quantities of high performance custom integrated circuits for military systems is impeded by inadequate process, device and circuit models that handicap low cost computer aided design. The principal objective of this program is to formulate physical models of fabrication processes, devices and circuits to allow total computer-aided design of custom large-scale integrated circuits. The basic areas under investigation are (1) thermal oxidation, (2) ion implantation and diffusion, (3) chemical vapor deposition of silicon and refractory metal silicides, (4) device simulation and analytic measurements. This report discusses the fourth year of the program.

Laser beam deflection-based perimeter scanning of integrated circuits for local overheating location

International Nuclear Information System (INIS)

Perpina, X; Jorda, X; Vellvehi, M; Altet, J; Mestres, N

2009-01-01

In integrated circuits, local overheating (hot spots) can be detected by monitoring the temperature gradients present in the silicon substrate at a given depth, laterally accessing the die with an infra-red laser beam probe. The sensed magnitude is the laser beam deflection, which is proportional to the temperature gradients found along the beam trajectory (mirage effect). Biasing the devices with periodic electrical functions allows employing lock-in detection strategies (noise immunity) and thermally isolating the analysed chip substrate thermal behaviour from the external boundary conditions by setting the excitation frequency (control of the thermal energy penetration depth). Measuring the first harmonic of the deflection signal components (vertical and horizontal) allows performing a fast and accurate location of devices, interconnects or circuits dissipating relatively high power levels without any calibration procedure. It has been concluded that the horizontal component of the beam deflection provides a higher spatial resolution than the vertical one when measurements are performed beyond the thermal energy penetration depth. (fast track communication)

Macromodels of digital integrated circuits for program packages of circuit engineering design

Science.gov (United States)

Petrenko, A. I.; Sliusar, P. B.; Timchenko, A. P.

1984-04-01

Various aspects of the generation of macromodels of digital integrated circuits are examined, and their effective application in program packages of circuit engineering design is considered. Three levels of macromodels are identified, and the application of such models to the simulation of circuit outputs is discussed.

Logic circuits based on individual semiconducting and metallic carbon-nanotube devices

International Nuclear Information System (INIS)

Ryu, Hyeyeon; Kaelblein, Daniel; Ante, Frederik; Zschieschang, Ute; Kern, Klaus; Klauk, Hagen; Weitz, R Thomas; Schmidt, Oliver G

2010-01-01

Nanoscale transistors employing an individual semiconducting carbon nanotube as the channel hold great potential for logic circuits with large integration densities that can be manufactured on glass or plastic substrates. Carbon nanotubes are usually produced as a mixture of semiconducting and metallic nanotubes. Since only semiconducting nanotubes yield transistors, the metallic nanotubes are typically not utilized. However, integrated circuits often require not only transistors, but also resistive load devices. Here we show that many of the metallic carbon nanotubes that are deposited on the substrate along with the semiconducting nanotubes can be conveniently utilized as load resistors with favorable characteristics for the design of integrated circuits. We also demonstrate the fabrication of arrays of transistors and resistors, each based on an individual semiconducting or metallic carbon nanotube, and their integration on glass substrates into logic circuits with switching frequencies of up to 500 kHz using a custom-designed metal interconnect layer.

Integrated circuit cooled turbine blade

Science.gov (United States)

Lee, Ching-Pang; Jiang, Nan; Um, Jae Y.; Holloman, Harry; Koester, Steven

2017-08-29

A turbine rotor blade includes at least two integrated cooling circuits that are formed within the blade that include a leading edge circuit having a first cavity and a second cavity and a trailing edge circuit that includes at least a third cavity located aft of the second cavity. The trailing edge circuit flows aft with at least two substantially 180-degree turns at the tip end and the root end of the blade providing at least a penultimate cavity and a last cavity. The last cavity is located along a trailing edge of the blade. A tip axial cooling channel connects to the first cavity of the leading edge circuit and the penultimate cavity of the trailing edge circuit. At least one crossover hole connects the penultimate cavity to the last cavity substantially near the tip end of the blade.

Parallel sparse direct solver for integrated circuit simulation

CERN Document Server

Chen, Xiaoming; Yang, Huazhong

2017-01-01

This book describes algorithmic methods and parallelization techniques to design a parallel sparse direct solver which is specifically targeted at integrated circuit simulation problems. The authors describe a complete flow and detailed parallel algorithms of the sparse direct solver. They also show how to improve the performance by simple but effective numerical techniques. The sparse direct solver techniques described can be applied to any SPICE-like integrated circuit simulator and have been proven to be high-performance in actual circuit simulation. Readers will benefit from the state-of-the-art parallel integrated circuit simulation techniques described in this book, especially the latest parallel sparse matrix solution techniques. · Introduces complicated algorithms of sparse linear solvers, using concise principles and simple examples, without complex theory or lengthy derivations; · Describes a parallel sparse direct solver that can be adopted to accelerate any SPICE-like integrated circuit simulato...

High-performance packaging for monolithic microwave and millimeter-wave integrated circuits

Science.gov (United States)

Shalkhauser, K. A.; Li, K.; Shih, Y. C.

1992-01-01

Packaging schemes are developed that provide low-loss, hermetic enclosure for enhanced monolithic microwave and millimeter-wave integrated circuits. These package schemes are based on a fused quartz substrate material offering improved RF performance through 44 GHz. The small size and weight of the packages make them useful for a number of applications, including phased array antenna systems. As part of the packaging effort, a test fixture was developed to interface the single chip packages to conventional laboratory instrumentation for characterization of the packaged devices.

A multiply-add engine with monolithically integrated 3D memristor crossbar/CMOS hybrid circuit.

Science.gov (United States)

Chakrabarti, B; Lastras-Montaño, M A; Adam, G; Prezioso, M; Hoskins, B; Payvand, M; Madhavan, A; Ghofrani, A; Theogarajan, L; Cheng, K-T; Strukov, D B

2017-02-14

Silicon (Si) based complementary metal-oxide semiconductor (CMOS) technology has been the driving force of the information-technology revolution. However, scaling of CMOS technology as per Moore's law has reached a serious bottleneck. Among the emerging technologies memristive devices can be promising for both memory as well as computing applications. Hybrid CMOS/memristor circuits with CMOL (CMOS + "Molecular") architecture have been proposed to combine the extremely high density of the memristive devices with the robustness of CMOS technology, leading to terabit-scale memory and extremely efficient computing paradigm. In this work, we demonstrate a hybrid 3D CMOL circuit with 2 layers of memristive crossbars monolithically integrated on a pre-fabricated CMOS substrate. The integrated crossbars can be fully operated through the underlying CMOS circuitry. The memristive devices in both layers exhibit analog switching behavior with controlled tunability and stable multi-level operation. We perform dot-product operations with the 2D and 3D memristive crossbars to demonstrate the applicability of such 3D CMOL hybrid circuits as a multiply-add engine. To the best of our knowledge this is the first demonstration of a functional 3D CMOL hybrid circuit.

Method of manufacturing Josephson junction integrated circuits

International Nuclear Information System (INIS)

Jillie, D.W. Jr.; Smith, L.N.

1985-01-01

Josephson junction integrated circuits of the current injection type and magnetically controlled type utilize a superconductive layer that forms both Josephson junction electrode for the Josephson junction devices on the integrated circuit as well as a ground plane for the integrated circuit. Large area Josephson junctions are utilized for effecting contact to lower superconductive layers and islands are formed in superconductive layers to provide isolation between the groudplane function and the Josephson junction electrode function as well as to effect crossovers. A superconductor-barrier-superconductor trilayer patterned by local anodization is also utilized with additional layers formed thereover. Methods of manufacturing the embodiments of the invention are disclosed

Radiation-hardened CMOS integrated circuits

International Nuclear Information System (INIS)

Pikor, A.; Reiss, E.M.

1980-01-01

Substantial effort has been directed at radiation-hardening CMOS integrated circuits using various oxide processes. While most of these integrated circuits have been successful in demonstrating megarad hardness, further investigations have shown that the 'wet-oxide process' is most compatible with the RCA CD4000 Series process. This article describes advances in the wet-oxide process that have resulted in multimegarad hardness and yield to MIL-M-38510 screening requirements. The implementation of these advances into volume manufacturing is geared towards supplying devices for aerospace requirements such as the Defense Meterological Satellite program (DMSP) and the Global Positioning Satellite (GPS). (author)

Microwaves integrated circuits: hybrids and monolithics - fabrication technology

International Nuclear Information System (INIS)

Cunha Pinto, J.K. da

1983-01-01

Several types of microwave integrated circuits are presented together with comments about technologies and fabrication processes; advantages and disadvantages in their utilization are analysed. Basic structures, propagation modes, materials used and major steps in the construction of hybrid thin film and monolithic microwave integrated circuits are described. Important technological applications are revised and main activities of the microelectronics lab. of the University of Sao Paulo (Brazil) in the field of hybrid and monolithic microwave integrated circuits are summarized. (C.L.B.) [pt

Addressable-Matrix Integrated-Circuit Test Structure

Science.gov (United States)

Sayah, Hoshyar R.; Buehler, Martin G.

1991-01-01

Method of quality control based on use of row- and column-addressable test structure speeds collection of data on widths of resistor lines and coverage of steps in integrated circuits. By use of straightforward mathematical model, line widths and step coverages deduced from measurements of electrical resistances in each of various combinations of lines, steps, and bridges addressable in test structure. Intended for use in evaluating processes and equipment used in manufacture of application-specific integrated circuits.

Integrated circuit design using design automation

International Nuclear Information System (INIS)

Gwyn, C.W.

1976-09-01

Although the use of computer aids to develop integrated circuits is relatively new at Sandia, the program has been very successful. The results have verified the utility of the in-house CAD design capability. Custom IC's have been developed in much shorter times than available through semiconductor device manufacturers. In addition, security problems were minimized and a saving was realized in circuit cost. The custom CMOS IC's were designed at less than half the cost of designing with conventional techniques. In addition to the computer aided design, the prototype fabrication and testing capability provided by the semiconductor development laboratory and microelectronics computer network allows the circuits to be fabricated and evaluated before the designs are transferred to the commercial semiconductor manufacturers for production. The Sandia design and prototype fabrication facilities provide the capability of complete custom integrated circuit development entirely within the ERDA laboratories

Fully Solution-Processable Fabrication of Multi-Layered Circuits on a Flexible Substrate Using Laser Processing

Directory of Open Access Journals (Sweden)

Seok Young Ji

2018-02-01

Full Text Available The development of printing technologies has enabled the realization of electric circuit fabrication on a flexible substrate. However, the current technique remains restricted to single-layer patterning. In this paper, we demonstrate a fully solution-processable patterning approach for multi-layer circuits using a combined method of laser sintering and ablation. Selective laser sintering of silver (Ag nanoparticle-based ink is applied to make conductive patterns on a heat-sensitive substrate and insulating layer. The laser beam path and irradiation fluence are controlled to create circuit patterns for flexible electronics. Microvia drilling using femtosecond laser through the polyvinylphenol-film insulating layer by laser ablation, as well as sequential coating of Ag ink and laser sintering, achieves an interlayer interconnection between multi-layer circuits. The dimension of microvia is determined by a sophisticated adjustment of the laser focal position and intensity. Based on these methods, a flexible electronic circuit with chip-size-package light-emitting diodes was successfully fabricated and demonstrated to have functional operations.

Fully Solution-Processable Fabrication of Multi-Layered Circuits on a Flexible Substrate Using Laser Processing

Science.gov (United States)

Ji, Seok Young; Choi, Wonsuk; Jeon, Jin-Woo; Chang, Won Seok

2018-01-01

The development of printing technologies has enabled the realization of electric circuit fabrication on a flexible substrate. However, the current technique remains restricted to single-layer patterning. In this paper, we demonstrate a fully solution-processable patterning approach for multi-layer circuits using a combined method of laser sintering and ablation. Selective laser sintering of silver (Ag) nanoparticle-based ink is applied to make conductive patterns on a heat-sensitive substrate and insulating layer. The laser beam path and irradiation fluence are controlled to create circuit patterns for flexible electronics. Microvia drilling using femtosecond laser through the polyvinylphenol-film insulating layer by laser ablation, as well as sequential coating of Ag ink and laser sintering, achieves an interlayer interconnection between multi-layer circuits. The dimension of microvia is determined by a sophisticated adjustment of the laser focal position and intensity. Based on these methods, a flexible electronic circuit with chip-size-package light-emitting diodes was successfully fabricated and demonstrated to have functional operations. PMID:29425144

Post irradiation effects (PIE) in integrated circuits

International Nuclear Information System (INIS)

Barnes, C.E.; Shaw, D.C.; Fleetwood, D.M.; Winokur, P.S.

1992-01-01

Post Irradiation Effects (PIE) ranging from normal recovery catastrophic failure have been observed in integrated circuits during the PIE period. These variations indicate that a rebound or PIE recipe used for radiation hardness assurance must be chosen with care. In this paper, the authors provide examples of PIE in a variety of integrated circuits of importance to spacecraft electronics

Integrated microchannel cooling in a three dimensional integrated circuit: A thermal management

Directory of Open Access Journals (Sweden)

Wang Kang-Jia

2016-01-01

Full Text Available Microchannel cooling is a promising technology for solving the three-dimensional integrated circuit thermal problems. However, the relationship between the microchannel cooling parameters and thermal behavior of the three dimensional integrated circuit is complex and difficult to understand. In this paper, we perform a detailed evaluation of the influence of the microchannel structure and the parameters of the cooling liquid on steady-state temperature profiles. The results presented in this paper are expected to aid in the development of thermal design guidelines for three dimensional integrated circuit with microchannel cooling.

Engineering integrated digital circuits with allosteric ribozymes for scaling up molecular computation and diagnostics.

Science.gov (United States)

Penchovsky, Robert

2012-10-19

Here we describe molecular implementations of integrated digital circuits, including a three-input AND logic gate, a two-input multiplexer, and 1-to-2 decoder using allosteric ribozymes. Furthermore, we demonstrate a multiplexer-decoder circuit. The ribozymes are designed to seek-and-destroy specific RNAs with a certain length by a fully computerized procedure. The algorithm can accurately predict one base substitution that alters the ribozyme's logic function. The ability to sense the length of RNA molecules enables single ribozymes to be used as platforms for multiple interactions. These ribozymes can work as integrated circuits with the functionality of up to five logic gates. The ribozyme design is universal since the allosteric and substrate domains can be altered to sense different RNAs. In addition, the ribozymes can specifically cleave RNA molecules with triplet-repeat expansions observed in genetic disorders such as oculopharyngeal muscular dystrophy. Therefore, the designer ribozymes can be employed for scaling up computing and diagnostic networks in the fields of molecular computing and diagnostics and RNA synthetic biology.

Refractory silicides for integrated circuits

International Nuclear Information System (INIS)

Murarka, S.P.

1980-01-01

Transition metal silicides have, in the past, attracted attention because of their usefulness as high temperature materials and in integrated circuits as Schottky barrier and ohmic contacts. More recently, with the increasing silicon integrated circuits (SIC) packing density, the line widths get narrower and the sheet resistance contribution to the RC delay increases. The possibility of using low resistivity silicides, which can be formed directly on the polysilicon, makes these silicides highly attractive. The usefulness of a silicide metallization scheme for integrated circuits depends, not only on the desired low resistivity, but also on the ease with which the silicide can be formed and patterned and on the stability of the silicides throughout device processing and during actual device usage. In this paper, various properties and the formation techniques of the silicides have been reviewed. Correlations between the various properties and the metal or silicide electronic or crystallographic structure have been made to predict the more useful silicides for SIC applications. Special reference to the silicide resistivity, stress, and oxidizability during the formation and subsequent processing has been given. Various formation and etching techniques are discussed

Innovative Magnetic-Field Array Probe for TRUST Integrated Circuits

Science.gov (United States)

2017-03-01

Despite all actions and concerns, this problem continues to escalate due to offshore fabrication of the integrated circuits ICs [1]. In order to...diagnosis and fault isolation in ICs, as well as the characterization of the functionality of ICs including malicious circuitry. Integrated circuits ...Innovative Magnetic-Field Array Probe for TRUST Integrated Circuits   contains the RF-switch matrix and broad-band (BB) low noise amplifiers (LNAs

An integrated circuit switch

Science.gov (United States)

Bonin, E. L.

1969-01-01

Multi-chip integrated circuit switch consists of a GaAs photon-emitting diode in close proximity with S1 phototransistor. A high current gain is obtained when the transistor has a high forward common-emitter current gain.

Wide-band polarization controller for Si photonic integrated circuits.

Science.gov (United States)

Velha, P; Sorianello, V; Preite, M V; De Angelis, G; Cassese, T; Bianchi, A; Testa, F; Romagnoli, M

2016-12-15

A circuit for the management of any arbitrary polarization state of light is demonstrated on an integrated silicon (Si) photonics platform. This circuit allows us to adapt any polarization into the standard fundamental TE mode of a Si waveguide and, conversely, to control the polarization and set it to any arbitrary polarization state. In addition, the integrated thermal tuning allows kilohertz speed which can be used to perform a polarization scrambler. The circuit was used in a WDM link and successfully used to adapt four channels into a standard Si photonic integrated circuit.

Test and Diagnosis of Integrated Circuits

OpenAIRE

Bosio , Alberto

2015-01-01

The ever-increasing growth of the semiconductor market results in an increasing complexity of digital circuits. Smaller, faster, cheaper and low-power consumption are the main challenges in semiconductor industry. The reduction of transistor size and the latest packaging technology (i.e., System-On-a-Chip, System-In-Package, Trough Silicon Via 3D Integrated Circuits) allows the semiconductor industry to satisfy the latest challenges. Although producing such advanced circuits can benefit users...

Integrated differential high-voltage transmitting circuit for CMUTs

DEFF Research Database (Denmark)

Llimos Muntal, Pere; Larsen, Dennis Øland; Farch, Kjartan

2015-01-01

In this paper an integrated differential high-voltage transmitting circuit for capacitive micromachined ultrasonic transducers (CMUTs) used in portable ultrasound scanners is designed and implemented in a 0.35 μm high-voltage process. Measurements are performed on the integrated circuit in order...... to assess its performance. The circuit generates pulses at differential voltage levels of 60V, 80V and 100 V, a frequency up to 5MHz and a measured driving strength of 1.75 V/ns with the CMUT connected. The total on-chip area occupied by the transmitting circuit is 0.18 mm2 and the power consumption...

Design optimization of radiation-hardened CMOS integrated circuits

International Nuclear Information System (INIS)

1975-01-01

Ionizing-radiation-induced threshold voltage shifts in CMOS integrated circuits will drastically degrade circuit performance unless the design parameters related to the fabrication process are properly chosen. To formulate an approach to CMOS design optimization, experimentally observed analytical relationships showing strong dependences between threshold voltage shifts and silicon dioxide thickness are utilized. These measurements were made using radiation-hardened aluminum-gate CMOS inverter circuits and have been corroborated by independent data taken from MOS capacitor structures. Knowledge of these relationships allows one to define ranges of acceptable CMOS design parameters based upon radiation-hardening capabilities and post-irradiation performance specifications. Furthermore, they permit actual design optimization of CMOS integrated circuits which results in optimum pre- and post-irradiation performance with respect to speed, noise margins, and quiescent power consumption. Theoretical and experimental results of these procedures, the applications of which can mean the difference between failure and success of a CMOS integrated circuit in a radiation environment, are presented

Integrated circuit structure

International Nuclear Information System (INIS)

1981-01-01

The invention describes the fabrication of integrated circuit structures, such as read-only memory components of field-effect transistors, which may be fabricated and then maintained in inventory, and later selectively modified in accordance with a desired pattern. It is claimed that MOS depletion-mode devices in accordance with the invention can be fabricated at lower cost and at higher yields. (U.K.)

Conductus makes high-Tc integrated circuit

International Nuclear Information System (INIS)

Anon.

1991-01-01

This paper reports that researchers at Conductus have successfully demonstrated what the company says is the world's first integrated circuit containing active devices made from high-temperature superconductors. The circuit is a SQUID magnetometer made from seven layers of material: three layers of yttrium-barium-copper oxide, two layers of insulating material, a seed layer to create grain boundaries for the Josephson junctions, and a layer of silver for making electrical contact to the device. The chip also contains vias, or pathways that make a superconducting contact between the superconducting layers otherwise separated by insulators. Conductus had previously announced the development of a SQUID magnetometer that featured a SQUID sensor and a flux transformer manufactured on separate chips. What makes this achievement important is that the company was able to put both components on the same chip, thus creating a simple integrated circuit on a single chip. This is still a long way from conventional semiconductor technology, with as many as a million components per chip, or even the sophisticated low-Tc superconducting chips made by the Japanese, but the SQUID magnetometer demonstrates all the elements and techniques necessary to build more complex high-temperature superconductor integrated circuits, making this an important first step

An analog integrated circuit design laboratory

OpenAIRE

Mondragon-Torres, A.F.; Mayhugh, Jr.; Pineda de Gyvez, J.; Silva-Martinez, J.; Sanchez-Sinencio, E.

2003-01-01

We present the structure of an analog integrated circuit design laboratory to instruct at both, senior undergraduate and entry graduate levels. The teaching material includes: a laboratory manual with analog circuit design theory, pre-laboratory exercises and circuit design specifications; a reference web page with step by step instructions and examples; the use of mathematical tools for automation and analysis; and state of the art CAD design tools in use by industry. Upon completion of the ...

Reverse Engineering Integrated Circuits Using Finite State Machine Analysis

Energy Technology Data Exchange (ETDEWEB)

Oler, Kiri J. [Pacific Northwest National Lab. (PNNL), Richland, WA (United States); Miller, Carl H. [Pacific Northwest National Lab. (PNNL), Richland, WA (United States)

2016-04-12

In this paper, we present a methodology for reverse engineering integrated circuits, including a mathematical verification of a scalable algorithm used to generate minimal finite state machine representations of integrated circuits.

Micro-relay technology for energy-efficient integrated circuits

CERN Document Server

Kam, Hei

2015-01-01

This book describes the design of relay-based circuit systems from device fabrication to circuit micro-architectures. This book is ideal for both device engineers as well as circuit system designers and highlights the importance of co-design across design hierarchies when optimizing system performance (in this case, energy-efficiency). This book is ideal for researchers and engineers focused on semiconductors, integrated circuits, and energy efficient electronics. This book also: ·         Covers microsystem fabrication, MEMS device design, circuit design, circuit micro-architecture, and CAD ·         Describes work previously done in the field and also lays the groundwork and criteria for future energy-efficient device and system design ·         Maximizes reader insights into the design and modeling of micro-relay, micro-relay reliability, integrated circuit design with micro-relays, and more

Pulsed laser-induced SEU in integrated circuits

International Nuclear Information System (INIS)

Buchner, S.; Kang, K.; Stapor, W.J.; Campbell, A.B.; Knudson, A.R.; McDonald, P.; Rivet, S.

1990-01-01

The authors have used a pulsed picosecond laser to measure the threshold for single event upset (SEU) and single event latchup (SEL) for two different kinds of integrated circuits. The relative thresholds show good agreement with published ion upset data. The consistency of the results together with the advantages of using a laser system suggest that the pulsed laser can be used for SEU/SEL hardness assurance of integrated circuits

Protecting integrated circuits from excessive charge accumulation during plasma cleaning of multichip modules

Science.gov (United States)

Rodenbeck, Christopher T; Girardi, Michael

2015-04-21

Internal nodes of a constituent integrated circuit (IC) package of a multichip module (MCM) are protected from excessive charge during plasma cleaning of the MCM. The protected nodes are coupled to an internal common node of the IC package by respectively associated discharge paths. The common node is connected to a bond pad of the IC package. During MCM assembly, and before plasma cleaning, this bond pad receives a wire bond to a ground bond pad on the MCM substrate.

How to deal with substrate bounce in analog circuits in epi-type CMOS technology

NARCIS (Netherlands)

Nauta, Bram; Hoogzaad, Gian; Hoogzaad, G.; Donnay, S.; Gielen, G.

2003-01-01

Substrate noise is one of the key problems in mixed analog/digital ICs. Although measures are known to reduce substrate noise, the noise will never be completely eliminated since this requires larger chip area or exotic packages and thus higher cost. Analog circuits on digital ICs simply have to be

Enabling the Internet of Things from integrated circuits to integrated systems

CERN Document Server

2017-01-01

This book offers the first comprehensive view on integrated circuit and system design for the Internet of Things (IoT), and in particular for the tiny nodes at its edge. The authors provide a fresh perspective on how the IoT will evolve based on recent and foreseeable trends in the semiconductor industry, highlighting the key challenges, as well as the opportunities for circuit and system innovation to address them. This book describes what the IoT really means from the design point of view, and how the constraints imposed by applications translate into integrated circuit requirements and design guidelines. Chapter contributions equally come from industry and academia. After providing a system perspective on IoT nodes, this book focuses on state-of-the-art design techniques for IoT applications, encompassing the fundamental sub-systems encountered in Systems on Chip for IoT: ultra-low power digital architectures and circuits low- and zero-leakage memories (including emerging technologies) circuits for hardwar...

Analog integrated circuits design for processing physiological signals.

Science.gov (United States)

Li, Yan; Poon, Carmen C Y; Zhang, Yuan-Ting

2010-01-01

Analog integrated circuits (ICs) designed for processing physiological signals are important building blocks of wearable and implantable medical devices used for health monitoring or restoring lost body functions. Due to the nature of physiological signals and the corresponding application scenarios, the ICs designed for these applications should have low power consumption, low cutoff frequency, and low input-referred noise. In this paper, techniques for designing the analog front-end circuits with these three characteristics will be reviewed, including subthreshold circuits, bulk-driven MOSFETs, floating gate MOSFETs, and log-domain circuits to reduce power consumption; methods for designing fully integrated low cutoff frequency circuits; as well as chopper stabilization (CHS) and other techniques that can be used to achieve a high signal-to-noise performance. Novel applications using these techniques will also be discussed.

Application specific integrated circuits and hybrid micro circuits for nuclear instrumentation

International Nuclear Information System (INIS)

Chandratre, V.B.; Sukhwani, Menka; Mukhopadhyay, P.K.; Shastrakar, R.S.; Sudheer, M.; Shedam, V.; Keni, Anubha

2009-01-01

Rapid development in semiconductor technology, sensors, detectors and requirements of high energy physics experiments as well as advances in commercially available nuclear instruments have lead to challenges for instrumentation. These challenges are met with development of Application Specific Integrated Circuits and Hybrid Micro Circuits. This paper discusses various activities in ASIC and HMC development in Bhabha Atomic Research Centre. (author)

Decline of Phosphotransfer and Substrate Supply Metabolic Circuits Hinders ATP Cycling in Aging Myocardium.

Directory of Open Access Journals (Sweden)

Emirhan Nemutlu

Full Text Available Integration of mitochondria with cytosolic ATP-consuming/ATP-sensing and substrate supply processes is critical for muscle bioenergetics and electrical activity. Whether age-dependent muscle weakness and increased electrical instability depends on perturbations in cellular energetic circuits is unknown. To define energetic remodeling of aged atrial myocardium we tracked dynamics of ATP synthesis-utilization, substrate supply, and phosphotransfer circuits through adenylate kinase (AK, creatine kinase (CK, and glycolytic/glycogenolytic pathways using 18O stable isotope-based phosphometabolomic technology. Samples of intact atrial myocardium from adult and aged rats were subjected to 18O-labeling procedure at resting basal state, and analyzed using the 18O-assisted HPLC-GC/MS technique. Characteristics for aging atria were lower inorganic phosphate Pi[18O], γ-ATP[18O], β-ADP[18O], and creatine phosphate CrP[18O] 18O-labeling rates indicating diminished ATP utilization-synthesis and AK and CK phosphotransfer fluxes. Shift in dynamics of glycolytic phosphotransfer was reflected in the diminished G6P[18O] turnover with relatively constant glycogenolytic flux or G1P[18O] 18O-labeling. Labeling of G3P[18O], an indicator of G3P-shuttle activity and substrate supply to mitochondria, was depressed in aged myocardium. Aged atrial myocardium displayed reduced incorporation of 18O into second (18O2, third (18O3, and fourth (18O4 positions of Pi[18O] and a lower Pi[18O]/γ-ATP[18 O]-labeling ratio, indicating delayed energetic communication and ATP cycling between mitochondria and cellular ATPases. Adrenergic stress alleviated diminished CK flux, AK catalyzed β-ATP turnover and energetic communication in aging atria. Thus, 18O-assisted phosphometabolomics uncovered simultaneous phosphotransfer through AK, CK, and glycolytic pathways and G3P substrate shuttle deficits hindering energetic communication and ATP cycling, which may underlie energetic

Adaptive control of power supply for integrated circuits

NARCIS (Netherlands)

2012-01-01

The present invention relates to a circuit arrangement and method for controlling power supply in an integrated circuit wherein at least one working parameter of at least one electrically isolated circuit region (10) is monitored, and the conductivity of a variable resistor means is locally

Monolithic Microwave Integrated Circuits Based on GaAs Mesfet Technology

Science.gov (United States)

Bahl, Inder J.

Advanced military microwave systems are demanding increased integration, reliability, radiation hardness, compact size and lower cost when produced in large volume, whereas the microwave commercial market, including wireless communications, mandates low cost circuits. Monolithic Microwave Integrated Circuit (MMIC) technology provides an economically viable approach to meeting these needs. In this paper the design considerations for several types of MMICs and their performance status are presented. Multifunction integrated circuits that advance the MMIC technology are described, including integrated microwave/digital functions and a highly integrated transceiver at C-band.

Printed organic thin-film transistor-based integrated circuits

International Nuclear Information System (INIS)

Mandal, Saumen; Noh, Yong-Young

2015-01-01

Organic electronics is moving ahead on its journey towards reality. However, this technology will only be possible when it is able to meet specific criteria including flexibility, transparency, disposability and low cost. Printing is one of the conventional techniques to deposit thin films from solution-based ink. It is used worldwide for visual modes of information, and it is now poised to enter into the manufacturing processes of various consumer electronics. The continuous progress made in the field of functional organic semiconductors has achieved high solubility in common solvents as well as high charge carrier mobility, which offers ample opportunity for organic-based printed integrated circuits. In this paper, we present a comprehensive review of all-printed organic thin-film transistor-based integrated circuits, mainly ring oscillators. First, the necessity of all-printed organic integrated circuits is discussed; we consider how the gap between printed electronics and real applications can be bridged. Next, various materials for printed organic integrated circuits are discussed. The features of these circuits and their suitability for electronics using different printing and coating techniques follow. Interconnection technology is equally important to make this product industrially viable; much attention in this review is placed here. For high-frequency operation, channel length should be sufficiently small; this could be achievable with a combination of surface treatment-assisted printing or laser writing. Registration is also an important issue related to printing; the printed gate should be perfectly aligned with the source and drain to minimize parasitic capacitances. All-printed organic inverters and ring oscillators are discussed here, along with their importance. Finally, future applications of all-printed organic integrated circuits are highlighted. (paper)

Design structure for in-system redundant array repair in integrated circuits

Science.gov (United States)

Bright, Arthur A.; Crumley, Paul G.; Dombrowa, Marc; Douskey, Steven M.; Haring, Rudolf A.; Oakland, Steven F.; Quellette, Michael R.; Strissel, Scott A.

2008-11-25

A design structure for repairing an integrated circuit during operation of the integrated circuit. The integrated circuit comprising of a multitude of memory arrays and a fuse box holding control data for controlling redundancy logic of the arrays. The design structure provides the integrated circuit with a control data selector for passing the control data from the fuse box to the memory arrays; providing a source of alternate control data, external of the integrated circuit; and connecting the source of alternate control data to the control data selector. The design structure further passes the alternate control data from the source thereof, through the control data selector and to the memory arrays to control the redundancy logic of the memory arrays.

Topology Optimization of Building Blocks for Photonic Integrated Circuits

DEFF Research Database (Denmark)

Jensen, Jakob Søndergaard; Sigmund, Ole

2005-01-01

Photonic integrated circuits are likely candidates as high speed replacements for the standard electrical integrated circuits of today. However, in order to obtain a satisfactorily performance many design prob- lems that up until now have resulted in too high losses must be resolved. In this work...... we demonstrate how the method of topology optimization can be used to design a variety of high performance building blocks for the future circuits....

Energy-efficient neuron, synapse and STDP integrated circuits.

Science.gov (United States)

Cruz-Albrecht, Jose M; Yung, Michael W; Srinivasa, Narayan

2012-06-01

Ultra-low energy biologically-inspired neuron and synapse integrated circuits are presented. The synapse includes a spike timing dependent plasticity (STDP) learning rule circuit. These circuits have been designed, fabricated and tested using a 90 nm CMOS process. Experimental measurements demonstrate proper operation. The neuron and the synapse with STDP circuits have an energy consumption of around 0.4 pJ per spike and synaptic operation respectively.

Designing TSVs for 3D Integrated Circuits

CERN Document Server

Khan, Nauman

2013-01-01

This book explores the challenges and presents best strategies for designing Through-Silicon Vias (TSVs) for 3D integrated circuits.  It describes a novel technique to mitigate TSV-induced noise, the GND Plug, which is superior to others adapted from 2-D planar technologies, such as a backside ground plane and traditional substrate contacts. The book also investigates, in the form of a comparative study, the impact of TSV size and granularity, spacing of C4 connectors, off-chip power delivery network, shared and dedicated TSVs, and coaxial TSVs on the quality of power delivery in 3-D ICs. The authors provide detailed best design practices for designing 3-D power delivery networks.  Since TSVs occupy silicon real-estate and impact device density, this book provides four iterative algorithms to minimize the number of TSVs in a power delivery network. Unlike other existing methods, these algorithms can be applied in early design stages when only functional block- level behaviors and a floorplan are available....

Test Structures For Bumpy Integrated Circuits

Science.gov (United States)

Buehler, Martin G.; Sayah, Hoshyar R.

1989-01-01

Cross-bridge resistors added to comb and serpentine patterns. Improved combination of test structures built into integrated circuit used to evaluate design rules, fabrication processes, and quality of interconnections. Consist of meshing serpentines and combs, and cross bridge. Structures used to make electrical measurements revealing defects in design or fabrication. Combination of test structures includes three comb arrays, two serpentine arrays, and cross bridge. Made of aluminum or polycrystalline silicon, depending on material in integrated-circuit layers evaluated. Aluminum combs and serpentine arrays deposited over steps made by polycrystalline silicon and diffusion layers, while polycrystalline silicon versions of these structures used to cross over steps made by thick oxide layer.

Reconfigurable SDM Switching Using Novel Silicon Photonic Integrated Circuit

DEFF Research Database (Denmark)

Ding, Yunhong; Kamchevska, Valerija; Dalgaard, Kjeld

2016-01-01

-division multiplexing switching using silicon photonic integrated circuit, which is fabricated on a novel silicon-oninsulator platform with buried Al mirror. The silicon photonic integrated circuit is composed of a 7x7 switch and low loss grating coupler array based multicore fiber couplers. Thanks to the Al mirror......, grating couplers with ultra-low coupling loss with optical multicore fibers is achieved. The lowest total insertion loss of the silicon integrated circuit is as low as 4.5 dB, with low crosstalk lower than -30 dB. Excellent performances in terms of low insertion loss and low crosstalk are obtained...

Integrated Reconfigurable High-Voltage Transmitting Circuit for CMUTs

DEFF Research Database (Denmark)

Llimos Muntal, Pere; Larsen, Dennis Øland; Jørgensen, Ivan Harald Holger

2014-01-01

-out and measurements are performed on the integrated circuit. The transmitting circuit is reconfigurable externally making it able to drive a wide variety of CMUTs. The transmitting circuit can generate several pulse shapes, pulse voltages up to 100 V, maximum pulse range of 50 V and frequencies up to 5 MHz. The area...

Micromachined integrated quantum circuit containing a superconducting qubit

Science.gov (United States)

Brecht, Teresa; Chu, Yiwen; Axline, Christopher; Pfaff, Wolfgang; Blumoff, Jacob; Chou, Kevin; Krayzman, Lev; Frunzio, Luigi; Schoelkopf, Robert

We demonstrate a functional multilayer microwave integrated quantum circuit (MMIQC). This novel hardware architecture combines the high coherence and isolation of three-dimensional structures with the advantages of integrated circuits made with lithographic techniques. We present fabrication and measurement of a two-cavity/one-qubit prototype, including a transmon coupled to a three-dimensional microwave cavity micromachined in a silicon wafer. It comprises a simple MMIQC with competitive lifetimes and the ability to perform circuit QED operations in the strong dispersive regime. Furthermore, the design and fabrication techniques that we have developed are extensible to more complex quantum information processing devices.

Design of a Miniaturized X-Band Diplexer Based on Novel One-Third-Mode Substrate Integrated Resonator Filters

Science.gov (United States)

Zhang, Hao; Kang, Wei; Wu, Wen

2017-12-01

In this paper, a miniaturized diplexer designed with two novel one-third-mode substrate integrated resonator (OTMSIR) filters has been presented. The one-third triangular resonator cavity with two transmission zeros (TZs) and two transmission poles is investigated. TZs are implemented by taking cross couplings of lower order modes in this design. The diplexer is then obtained by integrating two different sizes of OTMSIR filters with a common T-junction structure. A X-band diplexer operating at 10 GHz and 11.5 GHz is designed on a substrate with a dielectric constant of 3.55 to verify the above design concept. This novel structure features more compact size, better transmission performance, higher out of band rejection and easier integration compared with other circuits. A good agreement is obtained between the simulations and the measured results.

A new integrated microwave SQUID circuit design

International Nuclear Information System (INIS)

Erne, S.N.; Finnegan, T.F.

1980-01-01

In this paper we consider the design and operation of a planar thin-film rf-SQUID circuit which can be realized via microwave-integrated-circuit (MIC) techniques and which differs substantially from pervious microwave SQUID configurations involving either mechanical point-contact or cylindrical thin-film micro-bridge geometries. (orig.)

Vertically integrated circuit development at Fermilab for detectors

International Nuclear Information System (INIS)

Yarema, R; Deptuch, G; Hoff, J; Khalid, F; Lipton, R; Shenai, A; Trimpl, M; Zimmerman, T

2013-01-01

Today vertically integrated circuits, (a.k.a. 3D integrated circuits) is a popular topic in many trade journals. The many advantages of these circuits have been described such as higher speed due to shorter trace lenghts, the ability to reduce cross talk by placing analog and digital circuits on different levels, higher circuit density without the going to smaller feature sizes, lower interconnect capacitance leading to lower power, reduced chip size, and different processing for the various layers to optimize performance. There are some added advantages specifically for MAPS (Monolithic Active Pixel Sensors) in High Energy Physics: four side buttable pixel arrays, 100% diode fill factor, the ability to move PMOS transistors out of the diode sensing layer, and a increase in channel density. Fermilab began investigating 3D circuits in 2006. Many different bonding processes have been described for fabricating 3D circuits [1]. Fermilab has used three different processes to fabricate several circuits for specific applications in High Energy Physics and X-ray imaging. This paper covers some of the early 3D work at Fermilab and then moves to more recent activities. The major processes we have used are discussed and some of the problems encountered are described. An overview of pertinent 3D circuit designs is presented along with test results thus far.

Integrated Circuit Immunity

Science.gov (United States)

Sketoe, J. G.; Clark, Anthony

2000-01-01

This paper presents a DOD E3 program overview on integrated circuit immunity. The topics include: 1) EMI Immunity Testing; 2) Threshold Definition; 3) Bias Tee Function; 4) Bias Tee Calibration Set-Up; 5) EDM Test Figure; 6) EMI Immunity Levels; 7) NAND vs. and Gate Immunity; 8) TTL vs. LS Immunity Levels; 9) TP vs. OC Immunity Levels; 10) 7805 Volt Reg Immunity; and 11) Seventies Chip Set. This paper is presented in viewgraph form.

How complex can integrated optical circuits become?

NARCIS (Netherlands)

Smit, M.K.; Hill, M.T.; Baets, R.G.F.; Bente, E.A.J.M.; Dorren, H.J.S.; Karouta, F.; Koenraad, P.M.; Koonen, A.M.J.; Leijtens, X.J.M.; Nötzel, R.; Oei, Y.S.; Waardt, de H.; Tol, van der J.J.G.M.; Khoe, G.D.

2007-01-01

The integration scale in Photonic Integrated Circuits will be pushed to VLSI-level in the coming decade. This will bring major changes in both application and manufacturing. In this paper developments in Photonic Integration are reviewed and the limits for reduction of device demensions are

Vertically integrated, three-dimensional nanowire complementary metal-oxide-semiconductor circuits.

Science.gov (United States)

Nam, SungWoo; Jiang, Xiaocheng; Xiong, Qihua; Ham, Donhee; Lieber, Charles M

2009-12-15

Three-dimensional (3D), multi-transistor-layer, integrated circuits represent an important technological pursuit promising advantages in integration density, operation speed, and power consumption compared with 2D circuits. We report fully functional, 3D integrated complementary metal-oxide-semiconductor (CMOS) circuits based on separate interconnected layers of high-mobility n-type indium arsenide (n-InAs) and p-type germanium/silicon core/shell (p-Ge/Si) nanowire (NW) field-effect transistors (FETs). The DC voltage output (V(out)) versus input (V(in)) response of vertically interconnected CMOS inverters showed sharp switching at close to the ideal value of one-half the supply voltage and, moreover, exhibited substantial DC gain of approximately 45. The gain and the rail-to-rail output switching are consistent with the large noise margin and minimal static power consumption of CMOS. Vertically interconnected, three-stage CMOS ring oscillators were also fabricated by using layer-1 InAs NW n-FETs and layer-2 Ge/Si NW p-FETs. Significantly, measurements of these circuits demonstrated stable, self-sustained oscillations with a maximum frequency of 108 MHz, which represents the highest-frequency integrated circuit based on chemically synthesized nanoscale materials. These results highlight the flexibility of bottom-up assembly of distinct nanoscale materials and suggest substantial promise for 3D integrated circuits.

Monolitic integrated circuit for the strobed charge-to-time converter

International Nuclear Information System (INIS)

Bel'skij, V.I.; Bushnin, Yu.B.; Zimin, S.A.; Punzhin, Yu.N.; Sen'ko, V.A.; Soldatov, M.M.; Tokarchuk, V.P.

1985-01-01

The developed and comercially produced semiconducting circuit - gating charge-to-time converter KR1101PD1 is described. The considered integrated circuit is a short pulse charge-to-time converter with integration of input current. The circuit is designed for construction of time-to-pulse analog-to-digital converters utilized in multichannel detection systems when studying complex topology processes. Input resistance of the circuit is 0.1 Ω permissible input current is 50 mA, maximum measured charge is 300-1000 pC

Integrated electric circuit CAD system in Minolta Camera Co. Ltd

Energy Technology Data Exchange (ETDEWEB)

Nakagami, Tsuyoshi; Hirata, Sumiaki; Matsumura, Fumihiko

1988-08-26

Development background, fundamental concept, details and future plan of the integrated electric circuit CAD system for OA equipment are presented. The central integrated database is basically intended to store experiences or know-hows, to cover the wide range of data required for designs, and to provide a friendly interface. This easy-to-use integrated database covers the drawing data, parts information, design standards, know-hows and system data. The system contains the circuit design function to support drawing circuit diagrams, the wiring design function to support the wiring and arrangement of printed circuit boards and various parts integratedly, and the function to verify designs, to make full use of parts or technical information, to maintain the system security. In the future, as the system will be wholly in operation, the design period reduction, quality improvement and cost saving will be attained by this integrated design system. (19 figs, 2 tabs)

Power management techniques for integrated circuit design

CERN Document Server

Chen, Ke-Horng

2016-01-01

This book begins with the premise that energy demands are directing scientists towards ever-greener methods of power management, so highly integrated power control ICs (integrated chip/circuit) are increasingly in demand for further reducing power consumption. * A timely and comprehensive reference guide for IC designers dealing with the increasingly widespread demand for integrated low power management * Includes new topics such as LED lighting, fast transient response, DVS-tracking and design with advanced technology nodes * Leading author (Chen) is an active and renowned contributor to the power management IC design field, and has extensive industry experience * Accompanying website includes presentation files with book illustrations, lecture notes, simulation circuits, solution manuals, instructors manuals, and program downloads.

High transition temperature superconducting integrated circuit

International Nuclear Information System (INIS)

DiIorio, M.S.

1985-01-01

This thesis describes the design and fabrication of the first superconducting integrated circuit capable of operating at over 10K. The primary component of the circuit is a dc SQUID (Superconducting QUantum Interference Device) which is extremely sensitive to magnetic fields. The dc SQUID consists of two superconductor-normal metal-superconductor (SNS) Josephson microbridges that are fabricated using a novel step-edge process which permits the use of high transition temperature superconductors. By utilizing electron-beam lithography in conjunction with ion-beam etching, very small microbridges can be produced. Such microbridges lead to high performance dc SQUIDs with products of the critical current and normal resistance reaching 1 mV at 4.2 K. These SQUIDs have been extensively characterized, and exhibit excellent electrical characteristics over a wide temperature range. In order to couple electrical signals into the SQUID in a practical fashion, a planar input coil was integrated for efficient coupling. A process was developed to incorporate the technologically important high transition temperature superconducting materials, Nb-Sn and Nb-Ge, using integrated circuit techniques. The primary obstacles were presented by the metallurgical idiosyncrasies of the various materials, such as the need to deposit the superconductors at elevated temperatures, 800-900 0 C, in order to achieve a high transition temperature

Integrated coincidence circuits

International Nuclear Information System (INIS)

Borejko, V.F.; Grebenyuk, V.M.; Zinov, V.G.

1976-01-01

The description is given of two coincidence units employing integral circuits in the VISHNYA standard. The units are distinguished for the coincidence selection element which is essentially a combination of a tunnel diode and microcircuits. The output fast response of the units is at least 90 MHz in the mode of the output signal unshaped in duration and 50 MHz minimum in the mode of the output signal shaping. The resolution time of the units is dependent upon the duration of input signals

Active Trimming of Hybrid Integrated Circuits

OpenAIRE

Németh, P.; Krémer, P.

1984-01-01

One of the more important fields of the microelectronics industry is the manufacturing of hybrid integrated circuits.An important part of the manufacturing process is concerned with the trimming of the hybrid integratedl circuits. This article deals with the basic principles of active trimming and introduces a microprocessor controlled trimming machine. By comparing active trimming with passive techniques, it can be shown that the active system has some advantages. This article outlines these...

Integrated circuit implementation of fuzzy controllers

OpenAIRE

Huertas Díaz, José Luis; Sánchez Solano, Santiago; Baturone Castillo, María Iluminada; Barriga Barros, Ángel

1996-01-01

This paper presents mixed-signal current-mode CMOS circuits to implement programmable fuzzy controllers that perform the singleton or zero-order Sugeno’s method. Design equations to characterize these circuits are provided to explain the precision and speed that they offer. This analysis is illustrated with the experimental results of prototypes integrated in standard CMOS technologies. These tests show that an equivalent precision of 6 bits is achieved. The connection of these...

The integrated circuit IC EMP transient state disturbance effect experiment method investigates

International Nuclear Information System (INIS)

Li Xiaowei

2004-01-01

Transient state disturbance characteristic study on the integrated circuit, IC, need from its coupling path outset. Through cable (aerial) coupling, EMP converts to an pulse current voltage and results in the impact to the integrated circuit I/O orifice passing the cable. Aiming at the armament system construction feature, EMP effect to the integrated circuit, IC inside the system is analyzed. The integrated circuit, IC EMP effect experiment current injection method is investigated and a few experiments method is given. (authors)

An integrated circuit/packet switched video conferencing system

Energy Technology Data Exchange (ETDEWEB)

Kippenhan Junior, H.A.; Lidinsky, W.P.; Roediger, G.A. [Fermi National Accelerator Lab., Batavia, IL (United States). HEP Network Resource Center; Waits, T.A. [Rutgers Univ., Piscataway, NJ (United States). Dept. of Physics and Astronomy

1996-07-01

The HEP Network Resource Center (HEPNRC) at Fermilab and the Collider Detector Facility (CDF) collaboration have evolved a flexible, cost-effective, widely accessible video conferencing system for use by high energy physics collaborations and others wishing to use video conferencing. No current systems seemed to fully meet the needs of high energy physics collaborations. However, two classes of video conferencing technology: circuit-switched and packet-switched, if integrated, might encompass most of HEPS's needs. It was also realized that, even with this integration, some additional functions were needed and some of the existing functions were not always wanted. HEPNRC with the help of members of the CDF collaboration set out to develop such an integrated system using as many existing subsystems and components as possible. This system is called VUPAC (Video conferencing Using Packets and Circuits). This paper begins with brief descriptions of the circuit-switched and packet-switched video conferencing systems. Following this, issues and limitations of these systems are considered. Next the VUPAC system is described. Integration is accomplished primarily by a circuit/packet video conferencing interface. Augmentation is centered in another subsystem called MSB (Multiport MultiSession Bridge). Finally, there is a discussion of the future work needed in the evolution of this system. (author)

An integrated circuit/packet switched video conferencing system

International Nuclear Information System (INIS)

Kippenhan Junior, H.A.; Lidinsky, W.P.; Roediger, G.A.; Waits, T.A.

1996-01-01

The HEP Network Resource Center (HEPNRC) at Fermilab and the Collider Detector Facility (CDF) collaboration have evolved a flexible, cost-effective, widely accessible video conferencing system for use by high energy physics collaborations and others wishing to use video conferencing. No current systems seemed to fully meet the needs of high energy physics collaborations. However, two classes of video conferencing technology: circuit-switched and packet-switched, if integrated, might encompass most of HEPS's needs. It was also realized that, even with this integration, some additional functions were needed and some of the existing functions were not always wanted. HEPNRC with the help of members of the CDF collaboration set out to develop such an integrated system using as many existing subsystems and components as possible. This system is called VUPAC (Video conferencing Using Packets and Circuits). This paper begins with brief descriptions of the circuit-switched and packet-switched video conferencing systems. Following this, issues and limitations of these systems are considered. Next the VUPAC system is described. Integration is accomplished primarily by a circuit/packet video conferencing interface. Augmentation is centered in another subsystem called MSB (Multiport MultiSession Bridge). Finally, there is a discussion of the future work needed in the evolution of this system. (author)

High-voltage integrated transmitting circuit with differential driving for CMUTs

DEFF Research Database (Denmark)

Llimos Muntal, Pere; Larsen, Dennis Øland; Færch, Kjartan Ullitz

2016-01-01

In this paper, a high-voltage integrated differential transmitting circuit for capacitive micromachined ultrasonic transducers (CMUTs) used in portable ultrasound scanners is presented. Due to its application, area and power consumption are critical and need to be minimized. The circuitry...... is designed and implemented in AMS 0.35 μ m high-voltage process. Measurements are performed on the fabricated integrated circuit in order to assess its performance. The transmitting circuit consists of a low-voltage control logic, pulse-triggered level shifters and a differential output stage that generates...... conditions is 0.936 mW including the load. The integrated circuits measured prove to be consistent and robust to local process variations by measurements....

Micro-fabricated integrated coil and magnetic circuit and method of manufacturing thereof

Science.gov (United States)

Mihailovich, Robert E.; Papavasiliou, Alex P.; Mehrotra, Vivek; Stupar, Philip A.; Borwick, III, Robert L.; Ganguli, Rahul; DeNatale, Jeffrey F.

2017-03-28

A micro-fabricated electromagnetic device is provided for on-circuit integration. The electromagnetic device includes a core. The core has a plurality of electrically insulating layers positioned alternatingly between a plurality of magnetic layers to collectively form a continuous laminate having alternating magnetic and electrically insulating layers. The electromagnetic device includes a coil embedded in openings of the semiconductor substrate. An insulating material is positioned in the cavity and between the coil and an inner surface of the core. A method of manufacturing the electromagnetic device includes providing a semiconductor substrate having openings formed therein. Windings of a coil are electroplated and embedded in the openings. The insulating material is coated on or around an exposed surface of the coil. Alternating magnetic layers and electrically insulating layers may be micro-fabricated and electroplated as a single and substantially continuous segment on or around the insulating material.

Technique for selection of transient radiation-hard junction-isolated integrated circuits

International Nuclear Information System (INIS)

Crowley, J.L.; Junga, F.A.; Stultz, T.J.

1976-01-01

A technique is presented which demonstrates the feasibility of selecting junction-isolated integrated circuits (JI/ICS) for use in transient radiation environments. The procedure guarantees that all PNPN paths within the integrated circuit are identified and describes the methods used to determine whether the paths represent latchup susceptible structures. Two examples of the latchup analysis are given involving an SSI and an LSI bipolar junction-isolated integrated circuit

Chemical sensors fabricated by a photonic integrated circuit foundry

Science.gov (United States)

Stievater, Todd H.; Koo, Kee; Tyndall, Nathan F.; Holmstrom, Scott A.; Kozak, Dmitry A.; Goetz, Peter G.; McGill, R. Andrew; Pruessner, Marcel W.

2018-02-01

We describe the detection of trace concentrations of chemical agents using waveguide-enhanced Raman spectroscopy in a photonic integrated circuit fabricated by AIM Photonics. The photonic integrated circuit is based on a five-centimeter long silicon nitride waveguide with a trench etched in the top cladding to allow access to the evanescent field of the propagating mode by analyte molecules. This waveguide transducer is coated with a sorbent polymer to enhance detection sensitivity and placed between low-loss edge couplers. The photonic integrated circuit is laid-out using the AIM Photonics Process Design Kit and fabricated on a Multi-Project Wafer. We detect chemical warfare agent simulants at sub parts-per-million levels in times of less than a minute. We also discuss anticipated improvements in the level of integration for photonic chemical sensors, as well as existing challenges.

Integrated circuits for multimedia applications

DEFF Research Database (Denmark)

Vandi, Luca

2007-01-01

, and it is applied to a broad-band dual-loop receiver architecture in order to boost the linearity performances of the stage. A simplified noise- and linearity analysis of the circuit is derived, and a comparison is provided with a more traditional dual-loop topology (a broad-band stage based on shunt...... the impact of substrate-induced currents. Basic models are derived in the design phase, and the technological limits of the device are considered. Measurement results show that a very compact coil can provide ~1nH inductance up to 20GHz (physical limit for the measurement equipment), with a peak quality...

Radiation effects in semiconductors: technologies for hardened integrated circuits

International Nuclear Information System (INIS)

Charlot, J.M.

1983-09-01

Various technologies are used to manufacture integrated circuits for electronic systems. But for specific applications, including those with radiation environment, it is necessary to choose an appropriate technologie or to improve a specific one in order to reach a definite hardening level. The aim of this paper is to present the main effects induced by radiation (neutrons and gamma rays) into the basic semiconductor devices, to explain some physical degradation mechanisms and to propose solutions for hardened integrated circuit fabrication. The analysis involves essentially the monolithic structure of the integrated circuits and the isolation technology of active elements. In conclusion, the advantages of EPIC and SOS technologies are described and the potentialities of new technologies (GaAs and SOI) are presented

Radiation effects in semiconductors: technologies for hardened integrated circuits

International Nuclear Information System (INIS)

Charlot, J.M.

1984-01-01

Various technologies are used to manufacture integrated circuits for electronic systems. But for specific applications, including those with radiation environment, it is necessary to choose an appropriate technology or to improve a specific one in order to reach a definite hardening level. The aim of this paper is to present the main effects induced by radiation (neutrons and gamma rays) into the basic semiconductor devices, to explain some physical degradation mechanisms and to propose solutions for hardened integrated circuit fabrication. The analysis involves essentially the monolithic structure of the integrated circuits and the isolation technology of active elements. In conclusion, the advantages of EPIC and SOS technologies are described and the potentialities of new technologies (GaAs and SOI) are presented. (author)

Linear integrated circuits

CERN Document Server

Carr, Joseph

1996-01-01

The linear IC market is large and growing, as is the demand for well trained technicians and engineers who understand how these devices work and how to apply them. Linear Integrated Circuits provides in-depth coverage of the devices and their operation, but not at the expense of practical applications in which linear devices figure prominently. This book is written for a wide readership from FE and first degree students, to hobbyists and professionals.Chapter 1 offers a general introduction that will provide students with the foundations of linear IC technology. From chapter 2 onwa

Diagnosis of soft faults in analog integrated circuits based on fractional correlation

International Nuclear Information System (INIS)

Deng Yong; Shi Yibing; Zhang Wei

2012-01-01

Aiming at the problem of diagnosing soft faults in analog integrated circuits, an approach based on fractional correlation is proposed. First, the Volterra series of the circuit under test (CUT) decomposed by the fractional wavelet packet are used to calculate the fractional correlation functions. Then, the calculated fractional correlation functions are used to form the fault signatures of the CUT. By comparing the fault signatures, the different soft faulty conditions of the CUT are identified and the faults are located. Simulations of benchmark circuits illustrate the proposed method and validate its effectiveness in diagnosing soft faults in analog integrated circuits. (semiconductor integrated circuits)

CMOS analog integrated circuit design technology; CMOS anarogu IC sekkei gijutsu

Energy Technology Data Exchange (ETDEWEB)

Fujimoto, H.; Fujisawa, A. [Fuji Electric Co. Ltd., Tokyo (Japan)

2000-08-10

In the field of the LSI (large scale integrated circuit) in rapid progress toward high integration and advanced functions, CAD (computer-aided design) technology has become indispensable to LSI development within a short period. Fuji Electric has developed design technologies and automatic design system to develop high-quality analog ICs (integrated circuits), including power supply ICs. within a short period. This paper describes CMOS (complementary metal-oxide semiconductor) analog macro cell, circuit simulation, automatic routing, and backannotation technologies. (author)

Impedance Matching Antenna-Integrated High-Efficiency Energy Harvesting Circuit

Science.gov (United States)

Shinki, Yuharu; Shibata, Kyohei; Mansour, Mohamed

2017-01-01

This paper describes the design of a high-efficiency energy harvesting circuit with an integrated antenna. The circuit is composed of series resonance and boost rectifier circuits for converting radio frequency power into boosted direct current (DC) voltage. The measured output DC voltage is 5.67 V for an input of 100 mV at 900 MHz. Antenna input impedance matching is optimized for greater efficiency and miniaturization. The measured efficiency of this antenna-integrated energy harvester is 60% for −4.85 dBm input power and a load resistance equal to 20 kΩ at 905 MHz. PMID:28763043

Impedance Matching Antenna-Integrated High-Efficiency Energy Harvesting Circuit

Directory of Open Access Journals (Sweden)

Yuharu Shinki

2017-08-01

Full Text Available This paper describes the design of a high-efficiency energy harvesting circuit with an integrated antenna. The circuit is composed of series resonance and boost rectifier circuits for converting radio frequency power into boosted direct current (DC voltage. The measured output DC voltage is 5.67 V for an input of 100 mV at 900 MHz. Antenna input impedance matching is optimized for greater efficiency and miniaturization. The measured efficiency of this antenna-integrated energy harvester is 60% for −4.85 dBm input power and a load resistance equal to 20 kΩ at 905 MHz.

Impedance Matching Antenna-Integrated High-Efficiency Energy Harvesting Circuit.

Science.gov (United States)

Shinki, Yuharu; Shibata, Kyohei; Mansour, Mohamed; Kanaya, Haruichi

2017-08-01

This paper describes the design of a high-efficiency energy harvesting circuit with an integrated antenna. The circuit is composed of series resonance and boost rectifier circuits for converting radio frequency power into boosted direct current (DC) voltage. The measured output DC voltage is 5.67 V for an input of 100 mV at 900 MHz. Antenna input impedance matching is optimized for greater efficiency and miniaturization. The measured efficiency of this antenna-integrated energy harvester is 60% for -4.85 dBm input power and a load resistance equal to 20 kΩ at 905 MHz.

Progress in radiation immune thermionic integrated circuits

International Nuclear Information System (INIS)

Lynn, D.K.; McCormick, J.B.

1985-08-01

This report describes the results of a program directed at evaluating the thermionic integrated circuit (TIC) technology for applicability to military systems. Previous programs under the sponsorship of the Department of Energy, Office of Basic Energy Sciences, have developed an initial TIC technology base and demonstrated operation in high-temperature and high-radiation environments. The program described in this report has two parts: (1) a technical portion in which experiments and analyses were conducted to refine perceptions of near-term as well as ultimate performance levels of the TIC technology and (2) an applications portion in which the technical conclusions were to be evaluated against potential military applications. This report draws several conclusions that strongly suggest that (1) useful radiation-hard/high-temperature operable integrated circuits can be developed using the TIC technology; (2) because of their ability to survive and operate in hostile environments, a variety of potential military applications have been projected for this technology; and (3) based on the above two conclusions, an aggressive TIC development program should be initiated to provide the designers of future systems with integrated circuits and devices with the unique features of the TICs

Progress in radiation immune thermionic integrated circuits

Energy Technology Data Exchange (ETDEWEB)

Lynn, D.K.; McCormick, J.B. (comps.)

1985-08-01

This report describes the results of a program directed at evaluating the thermionic integrated circuit (TIC) technology for applicability to military systems. Previous programs under the sponsorship of the Department of Energy, Office of Basic Energy Sciences, have developed an initial TIC technology base and demonstrated operation in high-temperature and high-radiation environments. The program described in this report has two parts: (1) a technical portion in which experiments and analyses were conducted to refine perceptions of near-term as well as ultimate performance levels of the TIC technology and (2) an applications portion in which the technical conclusions were to be evaluated against potential military applications. This report draws several conclusions that strongly suggest that (1) useful radiation-hard/high-temperature operable integrated circuits can be developed using the TIC technology; (2) because of their ability to survive and operate in hostile environments, a variety of potential military applications have been projected for this technology; and (3) based on the above two conclusions, an aggressive TIC development program should be initiated to provide the designers of future systems with integrated circuits and devices with the unique features of the TICs.

Perspective: The future of quantum dot photonic integrated circuits

Directory of Open Access Journals (Sweden)

Justin C. Norman

2018-03-01

Full Text Available Direct epitaxial integration of III-V materials on Si offers substantial manufacturing cost and scalability advantages over heterogeneous integration. The challenge is that epitaxial growth introduces high densities of crystalline defects that limit device performance and lifetime. Quantum dot lasers, amplifiers, modulators, and photodetectors epitaxially grown on Si are showing promise for achieving low-cost, scalable integration with silicon photonics. The unique electrical confinement properties of quantum dots provide reduced sensitivity to the crystalline defects that result from III-V/Si growth, while their unique gain dynamics show promise for improved performance and new functionalities relative to their quantum well counterparts in many devices. Clear advantages for using quantum dot active layers for lasers and amplifiers on and off Si have already been demonstrated, and results for quantum dot based photodetectors and modulators look promising. Laser performance on Si is improving rapidly with continuous-wave threshold currents below 1 mA, injection efficiencies of 87%, and output powers of 175 mW at 20 °C. 1500-h reliability tests at 35 °C showed an extrapolated mean-time-to-failure of more than ten million hours. This represents a significant stride toward efficient, scalable, and reliable III-V lasers on on-axis Si substrates for photonic integrate circuits that are fully compatible with complementary metal-oxide-semiconductor (CMOS foundries.

Perspective: The future of quantum dot photonic integrated circuits

Science.gov (United States)

Norman, Justin C.; Jung, Daehwan; Wan, Yating; Bowers, John E.

2018-03-01

Direct epitaxial integration of III-V materials on Si offers substantial manufacturing cost and scalability advantages over heterogeneous integration. The challenge is that epitaxial growth introduces high densities of crystalline defects that limit device performance and lifetime. Quantum dot lasers, amplifiers, modulators, and photodetectors epitaxially grown on Si are showing promise for achieving low-cost, scalable integration with silicon photonics. The unique electrical confinement properties of quantum dots provide reduced sensitivity to the crystalline defects that result from III-V/Si growth, while their unique gain dynamics show promise for improved performance and new functionalities relative to their quantum well counterparts in many devices. Clear advantages for using quantum dot active layers for lasers and amplifiers on and off Si have already been demonstrated, and results for quantum dot based photodetectors and modulators look promising. Laser performance on Si is improving rapidly with continuous-wave threshold currents below 1 mA, injection efficiencies of 87%, and output powers of 175 mW at 20 °C. 1500-h reliability tests at 35 °C showed an extrapolated mean-time-to-failure of more than ten million hours. This represents a significant stride toward efficient, scalable, and reliable III-V lasers on on-axis Si substrates for photonic integrate circuits that are fully compatible with complementary metal-oxide-semiconductor (CMOS) foundries.

A TDC integrated circuit for drift chamber readout

International Nuclear Information System (INIS)

Passaseo, M.; Petrolo, E.; Veneziano, S.

1995-01-01

A custom integrated circuit for the measurement of the signal drift-time coming from the KLOE chamber developed by INFN Sezione di Roma is presented. The circuit is a multichannel common start/stop TDC, with 32 channels per chip. The TDC integrated circuit will be developed as a full-custom device in 0.5 μm CMOS technology, with 1 ns LSB realized using a Gray counter working at the frequency of 1 GHz. The circuit is capable of detecting rising/falling edges, with a double edge resolution of 8 ns; the hits are recorded as 16 bit words, hits older than a programmable time window are discarded, if not confirmed by a stop signal. The chip has four event-buffers, which are used only if at least one hit is present in one of the 32 channels. The readout of the data passes through the I/O port at a speed of 33 MHz; empty channels are automatically skipped during the readout phase. (orig.)

A TDC integrated circuit for drift chamber readout

Energy Technology Data Exchange (ETDEWEB)

Passaseo, M. [Istituto Nazionale di Fisica Nucleare, Rome (Italy); Petrolo, E. [Istituto Nazionale di Fisica Nucleare, Rome (Italy); Veneziano, S. [Istituto Nazionale di Fisica Nucleare, Rome (Italy)

1995-12-11

A custom integrated circuit for the measurement of the signal drift-time coming from the KLOE chamber developed by INFN Sezione di Roma is presented. The circuit is a multichannel common start/stop TDC, with 32 channels per chip. The TDC integrated circuit will be developed as a full-custom device in 0.5 {mu}m CMOS technology, with 1 ns LSB realized using a Gray counter working at the frequency of 1 GHz. The circuit is capable of detecting rising/falling edges, with a double edge resolution of 8 ns; the hits are recorded as 16 bit words, hits older than a programmable time window are discarded, if not confirmed by a stop signal. The chip has four event-buffers, which are used only if at least one hit is present in one of the 32 channels. The readout of the data passes through the I/O port at a speed of 33 MHz; empty channels are automatically skipped during the readout phase. (orig.).

CMOS analog integrated circuits high-speed and power-efficient design

CERN Document Server

Ndjountche, Tertulien

2011-01-01

High-speed, power-efficient analog integrated circuits can be used as standalone devices or to interface modern digital signal processors and micro-controllers in various applications, including multimedia, communication, instrumentation, and control systems. New architectures and low device geometry of complementary metaloxidesemiconductor (CMOS) technologies have accelerated the movement toward system on a chip design, which merges analog circuits with digital, and radio-frequency components. CMOS: Analog Integrated Circuits: High-Speed and Power-Efficient Design describes the important tren

Latch-up in CMOS integrated circuits

International Nuclear Information System (INIS)

Estreich, D.B.; Dutton, R.W.

1978-04-01

An analysis is presented of latch-up in CMOS integrated circuits. A latch-up prediction algorithm has been developed and used to evaluate methods to control latch-up. Experimental verification of the algorithm is demonstrated

A fast charge integrating and shaping circuit

International Nuclear Information System (INIS)

Kulka, Z.; Szoncso, F.

1990-01-01

The development of a low cost fast charge integrating and shaping circuit (FCISC) was motivated by the need for an interface between the photomultipliers of an existing hadronic calorimeter and recently developed new readout electronics designed to match the output of small ionization chambers for the upgraded UA1 detector at the CERN proton-antiproton collider. This paper describes the design principles of gated and ungated charge integrating and shaping circuits. An FCISC prototype using discrete components was made and its properties were determined with a computerized test setup. Finally an SMD implementation of the FCISC is presented and the performance is reported. (orig.)

Solitonic guide and multiphoton absorption processes in photopolymerizable materials for optical integrated circuits

Science.gov (United States)

Klein, Stephane; Barsella, Alberto; Acker, D.; Sutter, C.; Beyer, N.; Andraud, Chantal; Fort, Alain F.; Dorkenoo, Kokou D.

2004-09-01

Up to now, most of the optical integrated devices are realized on glass or III-V substrates and the waveguides are usually obtained by photolithography techniques. We present here a new approach based on the use of photopolymerizable compounds. The conditions of self-written channel creation by solitonic propagation inside the bulk of these photopolymerizable formulations are analyzed. Both experimental and theoretical results of the various stages of self-written guide propagation are presented. A further step has been achieved by using a two-photon absorption process for the polymerization via a confocal microscopy technique. Combined with the solitonic guide creation, this technique allows to draw 3D optical circuits. Finally, by doping the photopolymerizable mixtures with push-pull chromophores having a controlled orientation, it will be possible to create active optical integrated devices.

Maximum Temperature Detection System for Integrated Circuits

Science.gov (United States)

Frankiewicz, Maciej; Kos, Andrzej

2015-03-01

The paper describes structure and measurement results of the system detecting present maximum temperature on the surface of an integrated circuit. The system consists of the set of proportional to absolute temperature sensors, temperature processing path and a digital part designed in VHDL. Analogue parts of the circuit where designed with full-custom technique. The system is a part of temperature-controlled oscillator circuit - a power management system based on dynamic frequency scaling method. The oscillator cooperates with microprocessor dedicated for thermal experiments. The whole system is implemented in UMC CMOS 0.18 μm (1.8 V) technology.

Radio frequency integrated circuit design for cognitive radio systems

CERN Document Server

Fahim, Amr

2015-01-01

This book fills a disconnect in the literature between Cognitive Radio systems and a detailed account of the circuit implementation and architectures required to implement such systems.  Throughout the book, requirements and constraints imposed by cognitive radio systems are emphasized when discussing the circuit implementation details.  In addition, this book details several novel concepts that advance state-of-the-art cognitive radio systems.  This is a valuable reference for anybody with background in analog and radio frequency (RF) integrated circuit design, needing to learn more about integrated circuits requirements and implementation for cognitive radio systems. ·         Describes in detail cognitive radio systems, as well as the circuit implementation and architectures required to implement them; ·         Serves as an excellent reference to state-of-the-art wideband transceiver design; ·         Emphasizes practical requirements and constraints imposed by cognitive radi...

Lateral power transistors in integrated circuits

CERN Document Server

Erlbacher, Tobias

2014-01-01

This book details and compares recent advancements in the development of novel lateral power transistors (LDMOS devices) for integrated circuits in power electronic applications. It includes the state-of-the-art concept of double-acting RESURF topologies.

Reverse Engineering Camouflaged Sequential Integrated Circuits Without Scan Access

OpenAIRE

Massad, Mohamed El; Garg, Siddharth; Tripunitara, Mahesh

2017-01-01

Integrated circuit (IC) camouflaging is a promising technique to protect the design of a chip from reverse engineering. However, recent work has shown that even camouflaged ICs can be reverse engineered from the observed input/output behaviour of a chip using SAT solvers. However, these so-called SAT attacks have so far targeted only camouflaged combinational circuits. For camouflaged sequential circuits, the SAT attack requires that the internal state of the circuit is controllable and obser...

Foundations for microstrip circuit design

CERN Document Server

Edwards, Terry

2016-01-01

Building on the success of the previous three editions, Foundations for Microstrip Circuit Design offers extensive new, updated and revised material based upon the latest research. Strongly design-oriented, this fourth edition provides the reader with a fundamental understanding of this fast expanding field making it a definitive source for professional engineers and researchers and an indispensable reference for senior students in electronic engineering. Topics new to this edition: microwave substrates, multilayer transmission line structures, modern EM tools and techniques, microstrip and planar transmision line design, transmission line theory, substrates for planar transmission lines, Vias, wirebonds, 3D integrated interposer structures, computer-aided design, microstrip and power-dependent effects, circuit models, microwave network analysis, microstrip passive elements, and slotline design fundamentals.

Speech recognition by means of a three-integrated-circuit set

Energy Technology Data Exchange (ETDEWEB)

Zoicas, A.

1983-11-03

The author uses pattern recognition methods for detecting word boundaries, and monitors incoming speech at 12 millisecond intervals. Frequency is divided into eight bands and analysis is achieved in an analogue interface integrated circuit, a pipeline digital processor and a control integrated circuit. Applications are suggested, including speech input to personal computers. 3 references.

LC Quadrature Generation in Integrated Circuits

DEFF Research Database (Denmark)

Christensen, Kåre Tais

2001-01-01

Today quadrature signals for IQ demodulation are provided through RC polyphase networks, quadrature oscillators or double frequency VCOs. This paper presents a new method for generating quadrature signals in integrated circuits using only inductors and capacitors. This LC quadrature generation...

Dictionary-based image reconstruction for superresolution in integrated circuit imaging.

Science.gov (United States)

Cilingiroglu, T Berkin; Uyar, Aydan; Tuysuzoglu, Ahmet; Karl, W Clem; Konrad, Janusz; Goldberg, Bennett B; Ünlü, M Selim

2015-06-01

Resolution improvement through signal processing techniques for integrated circuit imaging is becoming more crucial as the rapid decrease in integrated circuit dimensions continues. Although there is a significant effort to push the limits of optical resolution for backside fault analysis through the use of solid immersion lenses, higher order laser beams, and beam apodization, signal processing techniques are required for additional improvement. In this work, we propose a sparse image reconstruction framework which couples overcomplete dictionary-based representation with a physics-based forward model to improve resolution and localization accuracy in high numerical aperture confocal microscopy systems for backside optical integrated circuit analysis. The effectiveness of the framework is demonstrated on experimental data.

Heavy ions testing experimental results on programmable integrated circuits

International Nuclear Information System (INIS)

Velazco, R.; Provost-Grellier, A.

1988-01-01

The natural radiation environment in space has been shown to produce anomalies in satellite-borne microelectronics. It becomes then mandatory to define qualification strategies allowing to choose the less vulnerable circuits. In this paper, is presented a strategy devoted to one of the most critical effects, the soft errors (so called upset). The method addresses programmable integrated circuits i.e. circuits able to execute an instruction or command set. Experimental results on representative circuits will illustrate the approach. 11 refs [fr

Manufacturing Process for OLED Integrated Substrate

Energy Technology Data Exchange (ETDEWEB)

Hung, Cheng-Hung [Vitro Flat Glass LLC, Cheswick, PA (United States). Glass Technology Center

2017-03-31

The main objective of this project was to develop a low-cost integrated substrate for rigid OLED solid-state lighting produced at a manufacturing scale. The integrated substrates could include combinations of soda lime glass substrate, light extraction layer, and an anode layer (i.e., Transparent Conductive Oxide, TCO). Over the 3⁺ year course of the project, the scope of work was revised to focus on the development of a glass substrates with an internal light extraction (IEL) layer. A manufacturing-scale float glass on-line particle embedding process capable of producing an IEL glass substrate having a thickness of less than 1.7mm and an area larger than 500mm x 400mm was demonstrated. Substrates measuring 470mm x 370mm were used in the OLED manufacturing process for fabricating OLED lighting panels in single pixel devices as large as 120.5mm x 120.5mm. The measured light extraction efficiency (calculated as external quantum efficiency, EQE) for on-line produced IEL samples (>50%) met the project’s initial goal.

Smart Power: New power integrated circuit technologies and their applications

Science.gov (United States)

Kuivalainen, Pekka; Pohjonen, Helena; Yli-Pietilae, Timo; Lenkkeri, Jaakko

1992-05-01

Power Integrated Circuits (PIC) is one of the most rapidly growing branches of the semiconductor technology. The PIC markets has been forecast to grow from 660 million dollars in 1990 to 1658 million dollars in 1994. It has even been forecast that at the end of the 1990's the PIC markets would correspond to the value of the whole semiconductor production in 1990. Automotive electronics will play the leading role in the development of the standard PIC's. Integrated motor drivers (36 V/4 A), smart integrated switches (60 V/30 A), solenoid drivers, integrated switch-mode power supplies and regulators are the latest standard devices of the PIC manufactures. ASIC (Application Specific Integrated Circuits) PIC solutions are needed for the same reasons as other ASIC devices: there are no proper standard devices, a company has a lot of application knowhow, which should be kept inside the company, the size of the product must be reduced, and assembly costs are wished to be reduced by decreasing the number of discrete devices. During the next few years the most probable ASIC PIC applications in Finland will be integrated solenoid and motor drivers, an integrated electronic lamp ballast circuit and various sensor interface circuits. Application of the PIC technologies to machines and actuators will strongly be increased all over the world. This means that various PIC's, either standard PIC's or full custom ASIC circuits, will appear in many products which compete with the corresponding Finnish products. Therefore the development of the PIC technologies must be followed carefully in order to immediately be able to apply the latest development in the smart power technologies and their design methods.

Effect of Feed Substrate Thickness on the Bandwidth and Radiation Characteristics of an Aperture-Coupled Microstrip Antenna with a High Permittivity Feed Substrate

Directory of Open Access Journals (Sweden)

Jae-Hyun Kim

2018-04-01

Full Text Available The impedance bandwidth and radiation characteristics of an aperture-coupled microstrip line-fed patch antenna (ACMPA with a high permittivity (ɛr = 10 feed substrate suitable for integration with a monolithic microwave integrated circuit (MMIC are investigated for various feed substrate thicknesses through an experiment and computer simulation. The impedance bandwidth of an ACMPA with a high permittivity feed substrate increases as the feed substrate thickness decreases. Furthermore, the front-to-back ratio of an ACMPA with a high permittivity feed substrate increases and the cross-polarization level decreases as the feed substrate thickness decreases. As the impedance bandwidth of an ACMPA with a high permittivity feed substrate increases and its radiation characteristics improve as the feed substrate thickness decreases, the ACMPA configuration becomes suitable for integration with an MMIC.

Interconnect rise time in superconducting integrating circuits

International Nuclear Information System (INIS)

Preis, D.; Shlager, K.

1988-01-01

The influence of resistive losses on the voltage rise time of an integrated-circuit interconnection is reported. A distribution-circuit model is used to present the interconnect. Numerous parametric curves are presented based on numerical evaluation of the exact analytical expression for the model's transient response. For the superconducting case in which the series resistance of the interconnect approaches zero, the step-response rise time is longer but signal strength increases significantly

Integrated circuit for processing a low-frequency signal from a seismic detector

Energy Technology Data Exchange (ETDEWEB)

Malashevich, N. I.; Roslyakov, A. S.; Polomoshnov, S. A., E-mail: S.Polomoshnov@tsen.ru; Fedorov, R. A. [Research and Production Complex ' Technological Center' of the Moscow Institute of Electronic Technology (Russian Federation)

2011-12-15

Specific features for the detection and processing of a low-frequency signal from a seismic detector are considered in terms of an integrated circuit based on a large matrix crystal of the 5507 series. This integrated circuit is designed for the detection of human movements. The specific features of the information signal, obtained at the output of the seismic detector, and the main characteristics of the integrated circuit and its structure are reported.

Silicon Photonic Integrated Circuit Mode Multiplexer

DEFF Research Database (Denmark)

Ding, Yunhong; Ou, Haiyan; Xu, Jing

2013-01-01

We propose and demonstrate a novel silicon photonic integrated circuit enabling multiplexing of orthogonal modes in a few-mode fiber (FMF). By selectively launching light to four vertical grating couplers, all six orthogonal spatial and polarization modes supported by the FMF are successfully...

Integrated optical switch circuit operating under FPGA control

NARCIS (Netherlands)

Stabile, R.; Zal, M.; Williams, K.A.; Bienstman, P.; Morthier, G.; Roelkens, G.; et al., xx

2011-01-01

Integrated photonic circuits are enabling an abrupt step change in networking systems providing massive bandwidth and record transmission. The increasing complexity of high connectivity photonic integrated switches requires sophisticated control planes and more intimate high speed electronics. Here

A new approach of optimization procedure for superconducting integrated circuits

International Nuclear Information System (INIS)

Saitoh, K.; Soutome, Y.; Tarutani, Y.; Takagi, K.

1999-01-01

We have developed and tested a new circuit simulation procedure for superconducting integrated circuits which can be used to optimize circuit parameters. This method reveals a stable operation region in the circuit parameter space in connection with the global bias margin by means of a contour plot of the global bias margin versus the circuit parameters. An optimal set of parameters with margins larger than these of the initial values has been found in the stable region. (author)

Investigation for connecting waveguide in off-planar integrated circuits.

Science.gov (United States)

Lin, Jie; Feng, Zhifang

2017-09-01

The transmission properties of a vertical waveguide connected by different devices in off-planar integrated circuits are designed, investigated, and analyzed in detail by the finite-difference time-domain method. The results show that both guide bandwidth and transmission efficiency can be adjusted effectively by shifting the vertical waveguide continuously. Surprisingly, the wide guide band (0.385[c/a]∼0.407[c/a]) and well transmission (-6  dB) are observed simultaneously in several directions when the vertical waveguide is located at a specific location. The results are very important for all-optical integrated circuits, especially in compact integration.

Design, fabrication and characterisation of advanced substrate crosstalk suppression structures in silicon on insulator substrates with buried ground planes (GPSOI)

International Nuclear Information System (INIS)

Stefanou, Stefanos

2002-07-01

Substrate crosstalk or coupling has been acknowledged to be a limiting factor in mixed signal RF integration. Although high levels of integration and high frequencies of operation are desirable for mixed mode RF and microwave circuits, they make substrate crosstalk more pronounced and may lead to circuit performance degradation. High signal isolation is dictated by requirements for low power dissipation, reduced number of components and lower integration costs for feasible system-on-chip (SoC) solutions. Substrate crosstalk suppression in ground plane silicon-on-insulator (GPSOI) substrates is investigated in this thesis. Test structures are designed and fabricated on SOI substrates with a buried WSi 2 plane that is connected to ground; hence it is called a ground plane. A Faraday cage structure that exhibits very high degrees of signal isolation is presented and compared to other SOI isolation schemes. The Faraday cage structure is shown to achieve 20 dB increased isolation in the frequency range of 0.5-50 GHz compared to published data for high resistivity (200 Ωcm) thin film SOI substrates with no ground planes, but where capacitive guard rings were used. The measurement results are analysed with the aid of planar electromagnetic simulators and compact lumped element models of all the fabricated test structures are developed. The accuracy of the lumped models is validated against experimental measurements. (author)

Efficient Substrate Noise Coupling Verification and Failure Analysis Methodology for Smart Power ICs in Automotive Applications

OpenAIRE

Moursy , Yasser; Zou , Hao; Khalil , Raouf; Iskander , Ramy; Tisserand , Pierre; Ton , Dieu-My; Pasetti , Giuseppe; Louërat , Marie-Minerve

2016-01-01

International audience; This paper presents a methodology to analyze the substrate noise coupling and reduce their effects in smart power integrated circuits. This methodology considers the propagation of minority carriers in the substrate. Hence, it models the lateral bipolar junction transistors that are layout dependent and are not modeled in conventional substrate extraction tools. It allows the designer to simulate substrate currents and check their effects on circuits functionality. The...

CMOS-based carbon nanotube pass-transistor logic integrated circuits

Science.gov (United States)

Ding, Li; Zhang, Zhiyong; Liang, Shibo; Pei, Tian; Wang, Sheng; Li, Yan; Zhou, Weiwei; Liu, Jie; Peng, Lian-Mao

2012-01-01

Field-effect transistors based on carbon nanotubes have been shown to be faster and less energy consuming than their silicon counterparts. However, ensuring these advantages are maintained for integrated circuits is a challenge. Here we demonstrate that a significant reduction in the use of field-effect transistors can be achieved by constructing carbon nanotube-based integrated circuits based on a pass-transistor logic configuration, rather than a complementary metal-oxide semiconductor configuration. Logic gates are constructed on individual carbon nanotubes via a doping-free approach and with a single power supply at voltages as low as 0.4 V. The pass-transistor logic configurarion provides a significant simplification of the carbon nanotube-based circuit design, a higher potential circuit speed and a significant reduction in power consumption. In particular, a full adder, which requires a total of 28 field-effect transistors to construct in the usual complementary metal-oxide semiconductor circuit, uses only three pairs of n- and p-field-effect transistors in the pass-transistor logic configuration. PMID:22334080

A numerical integration-based yield estimation method for integrated circuits

International Nuclear Information System (INIS)

Liang Tao; Jia Xinzhang

2011-01-01

A novel integration-based yield estimation method is developed for yield optimization of integrated circuits. This method tries to integrate the joint probability density function on the acceptability region directly. To achieve this goal, the simulated performance data of unknown distribution should be converted to follow a multivariate normal distribution by using Box-Cox transformation (BCT). In order to reduce the estimation variances of the model parameters of the density function, orthogonal array-based modified Latin hypercube sampling (OA-MLHS) is presented to generate samples in the disturbance space during simulations. The principle of variance reduction of model parameters estimation through OA-MLHS together with BCT is also discussed. Two yield estimation examples, a fourth-order OTA-C filter and a three-dimensional (3D) quadratic function are used for comparison of our method with Monte Carlo based methods including Latin hypercube sampling and importance sampling under several combinations of sample sizes and yield values. Extensive simulations show that our method is superior to other methods with respect to accuracy and efficiency under all of the given cases. Therefore, our method is more suitable for parametric yield optimization. (semiconductor integrated circuits)

A numerical integration-based yield estimation method for integrated circuits

Energy Technology Data Exchange (ETDEWEB)

Liang Tao; Jia Xinzhang, E-mail: tliang@yahoo.cn [Key Laboratory of Ministry of Education for Wide Bandgap Semiconductor Materials and Devices, School of Microelectronics, Xidian University, Xi' an 710071 (China)

2011-04-15

A novel integration-based yield estimation method is developed for yield optimization of integrated circuits. This method tries to integrate the joint probability density function on the acceptability region directly. To achieve this goal, the simulated performance data of unknown distribution should be converted to follow a multivariate normal distribution by using Box-Cox transformation (BCT). In order to reduce the estimation variances of the model parameters of the density function, orthogonal array-based modified Latin hypercube sampling (OA-MLHS) is presented to generate samples in the disturbance space during simulations. The principle of variance reduction of model parameters estimation through OA-MLHS together with BCT is also discussed. Two yield estimation examples, a fourth-order OTA-C filter and a three-dimensional (3D) quadratic function are used for comparison of our method with Monte Carlo based methods including Latin hypercube sampling and importance sampling under several combinations of sample sizes and yield values. Extensive simulations show that our method is superior to other methods with respect to accuracy and efficiency under all of the given cases. Therefore, our method is more suitable for parametric yield optimization. (semiconductor integrated circuits)

76 FR 58041 - Certain Digital Televisions Containing Integrated Circuit Devices and Components Thereof; Notice...

Science.gov (United States)

2011-09-19

... Integrated Circuit Devices and Components Thereof; Notice of Institution of Investigation; Institution of... integrated circuit devices and components thereof by reason of infringement of certain claims of U.S. Patent... after importation of certain digital televisions containing integrated circuit devices and components...

Trends in integrated circuit design for particle physics experiments

International Nuclear Information System (INIS)

Atkin, E V

2017-01-01

Integrated circuits are one of the key complex units available to designers of multichannel detector setups. A whole number of factors makes Application Specific Integrated Circuits (ASICs) valuable for Particle Physics and Astrophysics experiments. Among them the most important ones are: integration scale, low power dissipation, radiation tolerance. In order to make possible future experiments in the intensity, cosmic, and energy frontiers today ASICs should provide new level of functionality at a new set of constraints and trade-offs, like low-noise high-dynamic range amplification and pulse shaping, high-speed waveform sampling, low power digitization, fast digital data processing, serialization and data transmission. All integrated circuits, necessary for physical instrumentation, should be radiation tolerant at an earlier not reached level (hundreds of Mrad) of total ionizing dose and allow minute almost 3D assemblies. The paper is based on literary source analysis and presents an overview of the state of the art and trends in nowadays chip design, using partially own ASIC lab experience. That shows a next stage of ising micro- and nanoelectronics in physical instrumentation. (paper)

Natural printed silk substrate circuit fabricated via surface modification using one step thermal transfer and reduction graphene oxide

Science.gov (United States)

Cao, Jiliang; Huang, Zhan; Wang, Chaoxia

2018-05-01

Graphene conductive silk substrate is a preferred material because of its biocompatibility, flexibility and comfort. A flexible natural printed silk substrate circuit was fabricated by one step transfer of graphene oxide (GO) paste from transfer paper to the surface of silk fabric and reduction of the GO to reduced graphene oxide (RGO) using a simple hot press treatment. The GO paste was obtained through ultrasonic stirring exfoliation under low temperature, and presented excellent printing rheological properties at high concentration. The silk fabric was obtained a surface electric resistance as low as 12.15 KΩ cm-1, in the concentration of GO 50 g L-1 and hot press at 220 °C for 120 s. Though the whiteness and strength decreased with the increasing of hot press temperature and time slowly, the electric conductivity of RGO surface modification silk substrate improved obviously. The surface electric resistance of RGO/silk fabrics increased from 12.15 KΩ cm-1 to 18.05 KΩ cm-1, 28.54 KΩ cm-1 and 32.53 KΩ cm-1 after 10, 20 and 30 washing cycles, respectively. The results showed that the printed silk substrate circuit has excellent washability. This process requires no chemical reductant, and the reduction efficiency and reduction degree of GO is high. This time-effective and environmentally-friendly one step thermal transfer and reduction graphene oxide onto natural silk substrate method can be easily used to production of reduced graphene oxide (RGO) based flexible printed circuit.

Nano integrated circuit process

International Nuclear Information System (INIS)

Yoon, Yung Sup

2004-02-01

This book contains nine chapters, which are introduction of manufacture of semiconductor chip, oxidation such as Dry-oxidation, wet oxidation, oxidation model and oxide film, diffusion like diffusion process, diffusion equation, diffusion coefficient and diffusion system, ion implantation, including ion distribution, channeling, multiimplantation and masking and its system, sputtering such as CVD and PVD, lithography, wet etch and dry etch, interconnection and flattening like metal-silicon connection, silicide, multiple layer metal process and flattening, an integrated circuit process, including MOSFET and CMOS.

Nano integrated circuit process

Energy Technology Data Exchange (ETDEWEB)

Yoon, Yung Sup

2004-02-15

This book contains nine chapters, which are introduction of manufacture of semiconductor chip, oxidation such as Dry-oxidation, wet oxidation, oxidation model and oxide film, diffusion like diffusion process, diffusion equation, diffusion coefficient and diffusion system, ion implantation, including ion distribution, channeling, multiimplantation and masking and its system, sputtering such as CVD and PVD, lithography, wet etch and dry etch, interconnection and flattening like metal-silicon connection, silicide, multiple layer metal process and flattening, an integrated circuit process, including MOSFET and CMOS.

Design and application of multilayer monolithic microwave integrated circuit transformers

Energy Technology Data Exchange (ETDEWEB)

Economides, S.B

1999-07-01

The design and performance of planar spiral transformers, using multilayer GaAs and silicon MMIC technology, are presented. This multilayer technology gives new opportunities for improving the performance of planar transformers, couplers and baluns. Planar transformers have high parasitic resistance and capacitance and low levels of coupling. Using multilayer technology these problems are overcome by applying a multilayer structure of three metal layers separated by two polyimide dielectric layers. The improvements gained by placing the conductors on different metal layers, and using conductors raised on polyimide layers for low capacitance, have been investigated. The circuits were fabricated using a novel experimental fabrication process, which uses entirely standard materials and techniques and is compatible with BJT's and silicon-germanium HBT's. The transformers were all characterised up to 20 GHz using RF-on-wafer measurements. They demonstrated good performance, considering the experimental nature of in-house multilayer technology and the difficulties in simulating these three-dimensional new geometries. With high resistivity substrates, the silicon components achieved virtually the same performance as their gallium arsenide counterparts. The transformers were then used in simulations of transformer-coupled HBT amplifier circuits, to demonstrate their capabilities. It was shown that these circuits present good performance compared to standard off-the shelf component circuits and are very promising for use in most multilayer MMIC applications. The structures were further used in coupling configurations, and applied in balun circuits and pushpull amplifiers. The spiral transformer coupler can operate at low frequencies without using up much chip area. In a balun configuration, the balun can compensate for coupling and phase imbalance and operates over 5 to 15 GHz. The spiral coupler does not always need multilayer processing, so the balun may be

High performance low voltage organic field effect transistors on plastic substrate for amplifier circuits

NARCIS (Netherlands)

Houin, G.J.R.; Duez, F.; Garcia, L.; Cantatore, E.; Torricelli, F.; Hirsch, L.; Belot, D.; Pellet, C.; Abbas, M.

2016-01-01

The high performance air stable organic semiconductor small molecule dinaphtho[2,3-b:2',3'-f]thieno[3,2-b]thiophene (DNTT) was chosen as active layer for field effect transistors built to realize flexible amplifier circuits. Initial device on rigid Si/SiO2 substrate showed appreciable performance

Programmable delay unit incorporating a semi-custom integrated circuit

International Nuclear Information System (INIS)

Linstadt, E.

1985-04-01

The synchronization of SLC accelerator control and monitoring functions is realized by a CAMAC module, the PDU II (Programmable Delay Unit II, SLAC 253-002), which includes a semi-custom gate array integrated circuit. The PDU II distributes 16 channels of independently programmable delayed pulses to other modules within the same CAMAC crate. The delays are programmable in increments of 8.4 ns. Functional descriptions of both the module and the semi-custom integrated circuit used to generate the output pulses are given

Removal of Gross Air Embolization from Cardiopulmonary Bypass Circuits with Integrated Arterial Line Filters: A Comparison of Circuit Designs.

Science.gov (United States)

Reagor, James A; Holt, David W

2016-03-01

Advances in technology, the desire to minimize blood product transfusions, and concerns relating to inflammatory mediators have lead many practitioners and manufacturers to minimize cardiopulmonary bypass (CBP) circuit designs. The oxygenator and arterial line filter (ALF) have been integrated into one device as a method of attaining a reduction in prime volume and surface area. The instructions for use of a currently available oxygenator with integrated ALF recommends incorporating a recirculation line distal to the oxygenator. However, according to an unscientific survey, 70% of respondents utilize CPB circuits incorporating integrated ALFs without a path of recirculation distal to the oxygenator outlet. Considering this circuit design, the ability to quickly remove a gross air bolus in the blood path distal to the oxygenator may be compromised. This in vitro study was designed to determine if the time required to remove a gross air bolus from a CPB circuit without a path of recirculation distal to the oxygenator will be significantly longer than that of a circuit with a path of recirculation distal to the oxygenator. A significant difference was found in the mean time required to remove a gross air bolus between the circuit designs (p = .0003). Additionally, There was found to be a statistically significant difference in the mean time required to remove a gross air bolus between Trial 1 and Trials 4 (p = .015) and 5 (p =.014) irrespective of the circuit design. Under the parameters of this study, a recirculation line distal to an oxygenator with an integrated ALF significantly decreases the time it takes to remove an air bolus from the CPB circuit and may be safer for clinical use than the same circuit without a recirculation line.

Method of producing an electronic unit having a polydimethylsiloxane substrate and circuit lines

Energy Technology Data Exchange (ETDEWEB)

Davidson, James Courtney [Livermore, CA; Krulevitch, Peter A [Pleasanton, CA; Maghribi, Mariam N [Livermore, CA; Benett, William J [Livermore, CA; Hamilton, Julie K [Tracy, CA; Tovar, Armando R [San Antonio, TX

2012-06-19

A system of metalization in an integrated polymer microsystem. A flexible polymer substrate is provided and conductive ink is applied to the substrate. In one embodiment the flexible polymer substrate is silicone. In another embodiment the flexible polymer substrate comprises poly(dimethylsiloxane).

Organic printed photonics: From microring lasers to integrated circuits.

Science.gov (United States)

Zhang, Chuang; Zou, Chang-Ling; Zhao, Yan; Dong, Chun-Hua; Wei, Cong; Wang, Hanlin; Liu, Yunqi; Guo, Guang-Can; Yao, Jiannian; Zhao, Yong Sheng

2015-09-01

A photonic integrated circuit (PIC) is the optical analogy of an electronic loop in which photons are signal carriers with high transport speed and parallel processing capability. Besides the most frequently demonstrated silicon-based circuits, PICs require a variety of materials for light generation, processing, modulation, and detection. With their diversity and flexibility, organic molecular materials provide an alternative platform for photonics; however, the versatile fabrication of organic integrated circuits with the desired photonic performance remains a big challenge. The rapid development of flexible electronics has shown that a solution printing technique has considerable potential for the large-scale fabrication and integration of microsized/nanosized devices. We propose the idea of soft photonics and demonstrate the function-directed fabrication of high-quality organic photonic devices and circuits. We prepared size-tunable and reproducible polymer microring resonators on a wafer-scale transparent and flexible chip using a solution printing technique. The printed optical resonator showed a quality (Q) factor higher than 4 × 10(5), which is comparable to that of silicon-based resonators. The high material compatibility of this printed photonic chip enabled us to realize low-threshold microlasers by doping organic functional molecules into a typical photonic device. On an identical chip, this construction strategy allowed us to design a complex assembly of one-dimensional waveguide and resonator components for light signal filtering and optical storage toward the large-scale on-chip integration of microscopic photonic units. Thus, we have developed a scheme for soft photonic integration that may motivate further studies on organic photonic materials and devices.

Integrated circuits and logic operations based on single-layer MoS2.

Science.gov (United States)

Radisavljevic, Branimir; Whitwick, Michael Brian; Kis, Andras

2011-12-27

Logic circuits and the ability to amplify electrical signals form the functional backbone of electronics along with the possibility to integrate multiple elements on the same chip. The miniaturization of electronic circuits is expected to reach fundamental limits in the near future. Two-dimensional materials such as single-layer MoS(2) represent the ultimate limit of miniaturization in the vertical dimension, are interesting as building blocks of low-power nanoelectronic devices, and are suitable for integration due to their planar geometry. Because they are less than 1 nm thin, 2D materials in transistors could also lead to reduced short channel effects and result in fabrication of smaller and more power-efficient transistors. Here, we report on the first integrated circuit based on a two-dimensional semiconductor MoS(2). Our integrated circuits are capable of operating as inverters, converting logical "1" into logical "0", with room-temperature voltage gain higher than 1, making them suitable for incorporation into digital circuits. We also show that electrical circuits composed of single-layer MoS(2) transistors are capable of performing the NOR logic operation, the basis from which all logical operations and full digital functionality can be deduced.

Optical integrated circuit of a 40-channel electrooptical LiNbO/sub 3/ modulator for data-processing devices

Energy Technology Data Exchange (ETDEWEB)

Bukreev, I.N.; Venediktov, V.V.; Gorbatovskii, M.V.; Demina, T.P.; Kashintsev, M.A.

1988-06-01

An optical integrated circuit for a 40-channel electrooptical phase modulator has been developed. The channel waveguides are prepared through Ti thermal diffusion into a Y-cut LiNbO/sub 3/ substrate. The half-wave voltage for each channel is 1.6 V at a modulating frequency bandwidth of 0-290 MHz. Results are presented from an experiment concerning the use of the modulator as an input device for the optical processing of radio signals.

Silicon integrated circuits advances in materials and device research

CERN Document Server

Kahng, Dawon

1981-01-01

Silicon Integrated Circuits, Part B covers the special considerations needed to achieve high-power Si-integrated circuits. The book presents articles about the most important operations needed for the high-power circuitry, namely impurity diffusion and oxidation; crystal defects under thermal equilibrium in silicon and the development of high-power device physics; and associated technology. The text also describes the ever-evolving processing technology and the most promising approaches, along with the understanding of processing-related areas of physics and chemistry. Physicists, chemists, an

Leaky Integrate-and-Fire Neuron Circuit Based on Floating-Gate Integrator

Science.gov (United States)

Kornijcuk, Vladimir; Lim, Hyungkwang; Seok, Jun Yeong; Kim, Guhyun; Kim, Seong Keun; Kim, Inho; Choi, Byung Joon; Jeong, Doo Seok

2016-01-01

The artificial spiking neural network (SNN) is promising and has been brought to the notice of the theoretical neuroscience and neuromorphic engineering research communities. In this light, we propose a new type of artificial spiking neuron based on leaky integrate-and-fire (LIF) behavior. A distinctive feature of the proposed FG-LIF neuron is the use of a floating-gate (FG) integrator rather than a capacitor-based one. The relaxation time of the charge on the FG relies mainly on the tunnel barrier profile, e.g., barrier height and thickness (rather than the area). This opens up the possibility of large-scale integration of neurons. The circuit simulation results offered biologically plausible spiking activity (circuit was subject to possible types of noise, e.g., thermal noise and burst noise. The simulation results indicated remarkable distributional features of interspike intervals that are fitted to Gamma distribution functions, similar to biological neurons in the neocortex. PMID:27242416

Integrated digital superconducting logic circuits for the quantum synthesizer. Report

International Nuclear Information System (INIS)

Buchholz, F.I.; Kohlmann, J.; Khabipov, M.; Brandt, C.M.; Hagedorn, D.; Balashov, D.; Maibaum, F.; Tolkacheva, E.; Niemeyer, J.

2006-11-01

This report presents the results, which were reached in the framework of the BMBF cooperative plan ''Quantum Synthesizer'' in the partial plan ''Integrated Digital Superconducting Logic Circuits''. As essential goal of the plan a novel instrument on the base of quantum-coherent superconducting circuits should be developed. which allows to generate praxis-relevant wave forms with quantum accuracy, the quantum synthesizer. The main topics of development of the reported partial plan lied at the one hand in the development of integrated, digital, superconducting circuit in rapid-single-flux (RSFQ) quantum logics for the pattern generator of the quantum synthesizer, at the other hand in the further development of the fabrication technology for the aiming of high circuit complexity. In order to fulfil these requirements at the PTB a new design system was implemented, based on the software of Cadence. Together with the required RSFQ extensions for the design of digital superconducting circuits was a platform generated, on which the reachable circuit complexity is exclusively limited by the technology parameters of the available fabrication technology: Physical simulations are with PSCAN up to a complexity of more than 1000 circuit elements possible; furthermore VHDL allows the verification of arbitrarily large circuit architectures. In accordance for this the production line at the PTB was brought to a level, which allows in Nb/Al-Al x O y /Nb SIS technology implementation the fabrication of highly integrable RSFQ circuit architectures. The developed and fabricated basic circuits of the pattern generator have proved correct functionality and reliability in the measuring operation. Thereby for the circular RSFQ shift registers a key role as local memories in the construction of the pattern generator is devolved upon. The registers were realized with the aimed bit lengths up to 128 bit and with reachable signal-processing speeds of above 10 GHz. At the interface RSFQ

Multislice imaging of integrated circuits by precession X-ray ptychography.

Science.gov (United States)

Shimomura, Kei; Hirose, Makoto; Takahashi, Yukio

2018-01-01

A method for nondestructively visualizing multisection nanostructures of integrated circuits by X-ray ptychography with a multislice approach is proposed. In this study, tilt-series ptychographic diffraction data sets of a two-layered circuit with a ∼1.4 µm gap at nine incident angles are collected in a wide Q range and then artifact-reduced phase images of each layer are successfully reconstructed at ∼10 nm resolution. The present method has great potential for the three-dimensional observation of flat specimens with thickness on the order of 100 µm, such as three-dimensional stacked integrated circuits based on through-silicon vias, without laborious sample preparation.

Fabricating an organic complementary inverter by integrating two transistors on a single substrate

International Nuclear Information System (INIS)

Wang Jun; Wei Bin; Zhang Jianhua

2008-01-01

Organic complementary inverters were fabricated by integrating two transistors of different electric type on a single substrate. One is a p-type organic heterojunction transistor with a depletion–accumulation mode that acts as a load element. The other is an n-type transistor with an accumulation mode that acts as a drive element. Typical inverter characteristics with a voltage gain of 12 were obtained. Compared with conventional devices, our organic complementary inverter used only one-step patterning of an organic semiconductor, and simultaneously suppressed the leakage current between supply voltage and ground. Therefore, current studies provide a simpler path to fabrication of organic complementary circuits

3D circuit integration for Vertex and other detectors

Energy Technology Data Exchange (ETDEWEB)

Yarema, Ray; /Fermilab

2007-09-01

High Energy Physics continues to push the technical boundaries for electronics. There is no area where this is truer than for vertex detectors. Lower mass and power along with higher resolution and radiation tolerance are driving forces. New technologies such as SOI CMOS detectors and three dimensional (3D) integrated circuits offer new opportunities to meet these challenges. The fundamentals for SOI CMOS detectors and 3D integrated circuits are discussed. Examples of each approach for physics applications are presented. Cost issues and ways to reduce development costs are discussed.

Photonic integrated circuits : a new approach to laser technology

NARCIS (Netherlands)

Piramidowicz, R.; Stopinski, S.T.; Lawniczuk, K.; Welikow, K.; Szczepanski, P.; Leijtens, X.J.M.; Smit, M.K.

2012-01-01

In this work a brief review on photonic integrated circuits (PICs) is presented with a specific focus on integrated lasers and amplifiers. The work presents the history of development of the integration technology in photonics and its comparison to microelectronics. The major part of the review is

Single-event effects in analog and mixed-signal integrated circuits

International Nuclear Information System (INIS)

Turflinger, T.L.

1996-01-01

Analog and mixed-signal integrated circuits are also susceptible to single-event effects, but they have rarely been tested. Analog circuit single-particle transients require modified test techniques and data analysis. Existing work is reviewed and future concerns are outlined

Ultra low-power integrated circuit design for wireless neural interfaces

CERN Document Server

Holleman, Jeremy; Otis, Brian

2014-01-01

Presenting results from real prototype systems, this volume provides an overview of ultra low-power integrated circuits and systems for neural signal processing and wireless communication. Topics include analog, radio, and signal processing theory and design for ultra low-power circuits.

High-precision analog circuit technology for power supply integrated circuits; Dengen IC yo koseido anarogu kairo gijutsu

Energy Technology Data Exchange (ETDEWEB)

Nakamori, A.; Suzuki, T.; Mizoe, K. [Fuji Electric Corporate Research and Development,Ltd., Kanagawa (Japan)

2000-08-10

With the recent rapid spread of portable electronic appliances, specification requirements such as compact power supply and long operation with batteries have become severer. Power supply ICs (integrated circuits) are required to reduce power consumption in the circuit and perform high-precision control. To meet these requirements, Fuji Electric develops high-precision CMOS (complementary metal-oxide semiconductor) analog technology. This paper describes three analog circuit technologies of a voltage reference, an operational amplifier and a comparator as circuit components particularly important for the precision of power supply ICs. (author)

Hybrid integrated circuit for charge-to-time interval conversion

Energy Technology Data Exchange (ETDEWEB)

Basiladze, S.G.; Dotsenko, Yu.Yu.; Man' yakov, P.K.; Fedorchenko, S.N. (Joint Inst. for Nuclear Research, Dubna (USSR))

The hybrid integrated circuit for charge-to time interval conversion with nanosecond input fast response is described. The circuit can be used in energy measuring channels, time-to-digital converters and in the modified variant in amplitude-to-digital converters. The converter described consists of a buffer amplifier, a linear transmission circuit, a direct current source and a unit of time interval separation. The buffer amplifier represents a current follower providing low input and high output resistances by the current feedback. It is concluded that the described converter excelled the QT100B circuit analogous to it in a number of parameters especially, in thermostability.

Laser Direct Writing and Selective Metallization of Metallic Circuits for Integrated Wireless Devices.

Science.gov (United States)

Cai, Jinguang; Lv, Chao; Watanabe, Akira

2018-01-10

Portable and wearable devices have attracted wide research attention due to their intimate relations with human daily life. As basic structures in the devices, the preparation of high-conductive metallic circuits or micro-circuits on flexible substrates should be facile, cost-effective, and easily integrated with other electronic units. In this work, high-conductive carbon/Ni composite structures were prepared by using a facile laser direct writing method, followed by an electroless Ni plating process, which exhibit a 3-order lower sheet resistance of less than 0.1 ohm/sq compared to original structures before plating, showing the potential for practical use. The carbon/Ni composite structures exhibited a certain flexibility and excellent anti-scratch property due to the tight deposition of Ni layers on carbon surfaces. On the basis of this approach, a wireless charging and storage device on a polyimide film was demonstrated by integrating an outer rectangle carbon/Ni composite coil for harvesting electromagnetic waves and an inner carbon micro-supercapacitor for energy storage, which can be fast charged wirelessly by a commercial wireless charger. Furthermore, a near-field communication (NFC) tag was prepared by combining a carbon/Ni composite coil for harvesting signals and a commercial IC chip for data storage, which can be used as an NFC tag for practical application.

EQUIPMENT FOR NONDESTRUCTIVE TESTING OF SILICON WAFERS SUBMICRON TOPOLOGY DURING THE FABRICATION OF INTEGRATED CIRCUITS

Directory of Open Access Journals (Sweden)

S. A. Chizhik

2013-01-01

Full Text Available The advantages of using an atomic force microscopy in manufacturing of submicron integrated circuits are described. The possibilities of characterizing the surface morphology and the etching profile for silicon substrate and bus lines, estimation of the periodicity and size of bus lines, geometrical stability for elementary bus line are shown. Methods of optical and atomic force microcopies are combined in one diagnostic unit. Scanning  probe  microscope  (SPM  200  is  designed  and  produced.  Complex  SPM  200  realizes  nondestructive control of microelectronics elements made on silicon wafers up to 200 mm in diameter and it is introduced by JSC «Integral» for the purpose of operational control, metrology and acceptance of the final product.

Package Holds Five Monolithic Microwave Integrated Circuits

Science.gov (United States)

Mysoor, Narayan R.; Decker, D. Richard; Olson, Hilding M.

1996-01-01

Packages protect and hold monolithic microwave integrated circuit (MMIC) chips while providing dc and radio-frequency (RF) electrical connections for chips undergoing development. Required to be compact, lightweight, and rugged. Designed to minimize undesired resonances, reflections, losses, and impedance mismatches.

A CMOS integrated timing discriminator circuit for fast scintillation counters

International Nuclear Information System (INIS)

Jochmann, M.W.

1998-01-01

Based on a zero-crossing discriminator using a CR differentiation network for pulse shaping, a new CMOS integrated timing discriminator circuit is proposed for fast (t r ≥ 2 ns) scintillation counters at the cooler synchrotron COSY-Juelich. By eliminating the input signal's amplitude information by means of an analog continuous-time divider, a normalized pulse shape at the zero-crossing point is gained over a wide dynamic input amplitude range. In combination with an arming comparator and a monostable multivibrator this yields in a highly precise timing discriminator circuit, that is expected to be useful in different time measurement applications. First measurement results of a CMOS integrated logarithmic amplifier, which is part of the analog continuous-time divider, agree well with the corresponding simulations. Moreover, SPICE simulations of the integrated discriminator circuit promise a time walk well below 200 ps (FWHM) over a 40 dB input amplitude dynamic range

Integrated circuits with emitter coupling and their application in nanosecond nuclear electronics

International Nuclear Information System (INIS)

Basiladze, S.G.

1976-01-01

Principal static and dynamic characteristics are considered of integrated circuits with emitter coupling, as well as problems of signal transmission. Diagrams are given of amplifiers, discriminators, time interval drivers, generators, etc. Systems and units of nanosecond electronics employing integrated circuits with emitter coupling are briefly described

Lithographic technology for microwave integrated circuits

OpenAIRE

Shepherd, PR; Evans, PSA; Ramsey, BJ; Harrison, DJ

1997-01-01

Conductive lithographic films (CLFs) have been developed primarily as substitutes for resin/laminate boards, which share properties with the metallisation patterns used in planar microwave integrated circuits (MICs). The authors examine the microwave properties of the films and show that, although the losses are greater, they have potential as an alternative to the traditional manufacturing process of MICs.

Thin film circuits for future applications. Pt. 2. Evaporation technique

Energy Technology Data Exchange (ETDEWEB)

Haug, G; Houska, K H; Schmidt, H J; Sprengel, H P; Wohak, K

1976-06-01

Investigations of thin film diffusion processes and reactions with encapsulation materials resulted in improved long term stability of evaporated NiCr resistors, SiO capacitors and NiCr/Au conductors for thin film circuits. Stable NiCr resistor networks can be formed on ceramic substrates, and SiO capacitors of good quality can be deposited on the new very smooth ceramic substrates. The knowledge of the influence of evaporation parameters make the production of SiO capacitors with definite properties and good reproducibility possible. The range of capacitance of tantalum thin film circuits can be extended by integration with evaporated SiO capacitors.

Performance of digital integrated circuit technologies at very high temperatures

Energy Technology Data Exchange (ETDEWEB)

Prince, J.L.; Draper, B.L.; Rapp, E.A.; Kromberg, J.N.; Fitch, L.T.

1980-01-01

Results of investigations of the performance and reliability of digital bipolar and CMOS integrated circuits over the 25 to 340/sup 0/C range are reported. Included in these results are both parametric variation information and analysis of the functional failure mechanisms. Although most of the work was done using commercially available circuits (TTL and CMOS) and test chips from commercially compatible processes, some results of experimental simulations of dielectrically isolated CMOS are also discussed. It was found that commercial Schottky clamped TTL, and dielectrically isolated, low power Schottky-clamped TTL, functioned to junction temperatures in excess of 325/sup 0/C. Standard gold doped TTL functioned only to 250/sup 0/C, while commercial, isolated I/sup 2/L functioned to the range 250/sup 0/C to 275/sup 0/C. Commercial junction isolated CMOS, buffered and unbuffered, functioned to the range 280/sup 0/C to 310/sup 0/C/sup +/, depending on the manufacturer. Experimental simulations of simple dielectrically isolated CMOS integrated circuits, fabricated with heavier doping levels than normal, functioned to temperatures in excess of 340/sup 0/C. High temperature life testing of experimental, silicone-encapsulated simple TTL and CMOS integrated circuits have shown no obvious life limiting problems to date. No barrier to reliable functionality of TTL bipolar or CMOS integrated ciruits at temperatures in excess of 300/sup 0/C has been found.

FDTD-SPICE for Characterizing Metamaterials Integrated with Electronic Circuits

Directory of Open Access Journals (Sweden)

Zhengwei Hao

2012-01-01

Full Text Available A powerful time-domain FDTD-SPICE simulator is implemented and applied to the broadband analysis of metamaterials integrated with active and tunable circuit elements. First, the FDTD-SPICE modeling theory is studied and details of interprocess communication and hybridization of the two techniques are discussed. To verify the model, some simple cases are simulated with results in both time domain and frequency domain. Then, simulation of a metamaterial structure constructed from periodic resonant loops integrated with lumped capacitor elements is studied, which demonstrates tuning resonance frequency of medium by changing the capacitance of the integrated elements. To increase the bandwidth of the metamaterial, non-Foster transistor configurations are integrated with the loops and FDTD-SPICE is applied to successfully bridge the physics of electromagnetic and circuit topologies and to model the whole composite structure. Our model is also applied to the design and simulation of a metasurface integrated with nonlinear varactors featuring tunable reflection phase characteristic.

Accurate Electromagnetic Modeling Methods for Integrated Circuits

NARCIS (Netherlands)

Sheng, Z.

2010-01-01

The present development of modern integrated circuits (IC’s) is characterized by a number of critical factors that make their design and verification considerably more difficult than before. This dissertation addresses the important questions of modeling all electromagnetic behavior of features on

Electron commutator on integrated circuits

International Nuclear Information System (INIS)

Demidenko, V.V.

1975-01-01

The scheme and the parameters of an electron 16-channel contactless commutator based entirely on integrated circuits are described. The device consists of a unit of analog keys based on field-controlled metal-insulator-semiconductor (m.i.s.) transistors, operation amplifier comparators controlling these keys, and a level distributor. The distributor is based on a ''matrix'' scheme and comprises two ring-shaped shift registers plugged in series and a decoder base on two-input logical elements I-NE. The principal dynamical parameters of the circuit are as follows: the control signal delay in the distributor. 50 nsec; the total channel switch-over time, 500-600 nsec. The commutator transmits both constant signals and pulses whose duration reaches tens of nsec. The commutator can be used in data acquisition and processing systems, for shaping complicated signals (for example), (otherwise signals), for simultaneous oscillographing of several signals, and so forth [ru

Integrated circuit cell library

Science.gov (United States)

Whitaker, Sterling R. (Inventor); Miles, Lowell H. (Inventor)

2005-01-01

According to the invention, an ASIC cell library for use in creation of custom integrated circuits is disclosed. The ASIC cell library includes some first cells and some second cells. Each of the second cells includes two or more kernel cells. The ASIC cell library is at least 5% comprised of second cells. In various embodiments, the ASIC cell library could be 10% or more, 20% or more, 30% or more, 40% or more, 50% or more, 60% or more, 70% or more, 80% or more, 90% or more, or 95% or more comprised of second cells.

A programmable delay unit incorporating a semi-custom integrated circuit

International Nuclear Information System (INIS)

Linstadt, E.

1985-01-01

The synchronization of SLC accelerator control and monitoring functions is realized by a CAMAC module, the PDU II (Programmable Delay Unit II, SLAC 253-002), which includes a semi-custom gate array integrated circuit. The PDU II distributes 16 channels of independently programmable delayed pulses to other modules within the same CAMAC crate. The delays are programmable in increments of 8.4 ns. Functional descriptions of both the module and the semi-custom integrated circuit used to generate the output pulses are given

General technique for the integration of MIC/MMIC'S with waveguides

Science.gov (United States)

Geller, Bernard D. (Inventor); Zaghloul, Amir I. (Inventor)

1987-01-01

A technique for packaging and integrating of a microwave integrated circuit (MIC) or monolithic microwave integrated circuit (MMIC) with a waveguide uses a printed conductive circuit pattern on a dielectric substrate to transform impedance and mode of propagation between the MIC/MMIC and the waveguide. The virtually coplanar circuit pattern lies on an equipotential surface within the waveguide and therefore makes possible single or dual polarized mode structures.

Integrated Circuits in the Introductory Electronics Laboratory

Science.gov (United States)

English, Thomas C.; Lind, David A.

1973-01-01

Discusses the use of an integrated circuit operational amplifier in an introductory electronics laboratory course for undergraduate science majors. The advantages of this approach and the implications for scientific instrumentation are identified. Describes a number of experiments suitable for the undergraduate laboratory. (Author/DF)

Integrated Plastic Substrates for OLED Lighting

Energy Technology Data Exchange (ETDEWEB)

Gaynor, Whitney

2015-08-01

OLED lighting has immense potential as aesthetically pleasing, energy-efficient general illumination. Unlike other light sources, such as incandescents, fluorescents, and inorganic LEDs, OLEDs naturally emit over a large-area surface. They are glare free, do not need to be shaded, and are cool to the touch, requiring no heatsink. The best efficiencies and lifetimes reported are on par with or better than current forms of illumination. However, the cost for OLED lighting remains high – so much so that these products are not market competitive and there is very low consumer demand. We believe that flexible, plastic-based devices will highlight the advantages of aesthetically-pleasing OLED lighting systems while paving the way for lowering both materials and manufacturing costs. These flexible devices require new development in substrate and support technology, which was the focus of the work reported here. The project team, led by Sinovia Technologies, has developed integrated plastic substrates to serve as supports for flexible OLED lighting. The substrates created in this project would enable large-area, flexible devices and are specified to perform three functions. They include a barrier to protect the OLED from moisture and oxygen-related degradation, a smooth, highly conductive transparent electrode to enable large-area device operation, and a light scattering layer to improve emission efficiency. Through the course of this project, integrated substrates were fabricated, characterized, evaluated for manufacturing feasibility and cost, and used in white OLED demonstrations to test their impact on flexible OLED lighting. Our integrated substrates meet or exceed the DOE specifications for barrier performance in water vapor and oxygen transport rates, as well as the transparency and conductivity of the anode film. We find that these integrated substrates can be manufactured in a completely roll-to-roll, high throughput process and have developed and demonstrated

76 FR 41521 - In the Matter of Certain Integrated Circuits, Chipsets, and Products Containing Same Including...

Science.gov (United States)

2011-07-14

... INTERNATIONAL TRADE COMMISSION [Inv. No. 337-TA-786] In the Matter of Certain Integrated Circuits... sale within the United States after importation of certain integrated circuits, chipsets, and products... after importation of certain integrated circuits, chipsets, and products containing same including...

75 FR 5804 - In the Matter of: Certain Semiconductor Integrated Circuits and Products Containing Same; Notice...

Science.gov (United States)

2010-02-04

... Semiconductor Integrated Circuits and Products Containing Same; Notice of Commission Determination To Review in... importation of certain semiconductor integrated circuits and products containing same by reason of... (collectively ``Seagate''). Qimonda accuses of infringement certain LSI integrated circuits, as well as certain...

77 FR 35426 - Certain Radio Frequency Integrated Circuits and Devices Containing Same; Institution of...

Science.gov (United States)

2012-06-13

... of certain radio frequency integrated circuits and devices containing same by reason of infringement... importation of certain radio frequency integrated circuits and devices containing same that infringe one or... INTERNATIONAL TRADE COMMISSION [Investigation No. 337-TA-848] Certain Radio Frequency Integrated...

Integrated biocircuits: engineering functional multicellular circuits and devices

Science.gov (United States)

Prox, Jordan; Smith, Tory; Holl, Chad; Chehade, Nick; Guo, Liang

2018-04-01

Objective. Implantable neurotechnologies have revolutionized neuromodulatory medicine for treating the dysfunction of diseased neural circuitry. However, challenges with biocompatibility and lack of full control over neural network communication and function limits the potential to create more stable and robust neuromodulation devices. Thus, we propose a platform technology of implantable and programmable cellular systems, namely Integrated Biocircuits, which use only cells as the functional components of the device. Approach. We envision the foundational principles for this concept begins with novel in vitro platforms used for the study and reconstruction of cellular circuitry. Additionally, recent advancements in organoid and 3D culture systems account for microenvironment factors of cytoarchitecture to construct multicellular circuits as they are normally formed in the brain. We explore the current state of the art of these platforms to provide knowledge of their advancements in circuit fabrication and identify the current biological principles that could be applied in designing integrated biocircuit devices. Main results. We have highlighted the exemplary methodologies and techniques of in vitro circuit fabrication and propose the integration of selected controllable parameters, which would be required in creating suitable biodevices. Significance. We provide our perspective and propose new insights into the future of neuromodulaion devices within the scope of living cellular systems that can be applied in designing more reliable and biocompatible stimulation-based neuroprosthetics.

Gallium nitride on gallium oxide substrate for integrated nonlinear optics

KAUST Repository

Awan, Kashif M.; Dolgaleva, Ksenia; Mumthaz Muhammed, Mufasila; Roqan, Iman S.

2017-01-01

Gallium Nitride (GaN), being a direct bandgap semiconductor with a wide bandgap and high thermal stability, is attractive for optoelectronic and electronic applications. Furthermore, due to its high optical nonlinearity — the characteristic of all 111-V semiconductors — GaN is also expected to be a suitable candidate for integrated nonlinear photonic circuits for a plethora of apphcations, ranging from on-chip wavelength conversion to quantum computing. Although GaN devices are in commercial production, it still suffers from lack of a suitable substrate material to reduce structural defects like high densities of threading dislocations (TDs), stacking faults, and grain boundaries. These defects significandy deteriorate the optical quality of the epi-grown GaN layer, since they act as non-radiative recombination centers. Recent studies have shown that GaN grown on (−201) β-Gallium Oxide (Ga2O3) has superior optical quality due to a better lattice matching as compared to GaN grown on Sapphire (Al2O3) [1-3]. In this work, we report on the fabrication of GaN waveguides on GaiOj substrate and their optical characterization to assess their feasibihty for efficient four-wave mixing (FWM).

Gallium nitride on gallium oxide substrate for integrated nonlinear optics

KAUST Repository

Awan, Kashif M.

2017-11-22

Gallium Nitride (GaN), being a direct bandgap semiconductor with a wide bandgap and high thermal stability, is attractive for optoelectronic and electronic applications. Furthermore, due to its high optical nonlinearity — the characteristic of all 111-V semiconductors — GaN is also expected to be a suitable candidate for integrated nonlinear photonic circuits for a plethora of apphcations, ranging from on-chip wavelength conversion to quantum computing. Although GaN devices are in commercial production, it still suffers from lack of a suitable substrate material to reduce structural defects like high densities of threading dislocations (TDs), stacking faults, and grain boundaries. These defects significandy deteriorate the optical quality of the epi-grown GaN layer, since they act as non-radiative recombination centers. Recent studies have shown that GaN grown on (−201) β-Gallium Oxide (Ga2O3) has superior optical quality due to a better lattice matching as compared to GaN grown on Sapphire (Al2O3) [1-3]. In this work, we report on the fabrication of GaN waveguides on GaiOj substrate and their optical characterization to assess their feasibihty for efficient four-wave mixing (FWM).

Monolithic microwave integrated circuits: Interconnections and packaging considerations

Science.gov (United States)

Bhasin, K. B.; Downey, A. N.; Ponchak, G. E.; Romanofsky, R. R.; Anzic, G.; Connolly, D. J.

1984-01-01

Monolithic microwave integrated circuits (MMIC's) above 18 GHz were developed because of important potential system benefits in cost reliability, reproducibility, and control of circuit parameters. The importance of interconnection and packaging techniques that do not compromise these MMIC virtues is emphasized. Currently available microwave transmission media are evaluated to determine their suitability for MMIC interconnections. An antipodal finline type of microstrip waveguide transition's performance is presented. Packaging requirements for MMIC's are discussed for thermal, mechanical, and electrical parameters for optimum desired performance.

Monolithic microwave integrated circuits: Interconnections and packaging considerations

Science.gov (United States)

Bhasin, K. B.; Downey, A. N.; Ponchak, G. E.; Romanofsky, R. R.; Anzic, G.; Connolly, D. J.

Monolithic microwave integrated circuits (MMIC's) above 18 GHz were developed because of important potential system benefits in cost reliability, reproducibility, and control of circuit parameters. The importance of interconnection and packaging techniques that do not compromise these MMIC virtues is emphasized. Currently available microwave transmission media are evaluated to determine their suitability for MMIC interconnections. An antipodal finline type of microstrip waveguide transition's performance is presented. Packaging requirements for MMIC's are discussed for thermal, mechanical, and electrical parameters for optimum desired performance.

75 FR 16837 - In the Matter of Certain Integrated Circuits, Chipsets, and Products Containing Same Including...

Science.gov (United States)

2010-04-02

... INTERNATIONAL TRADE COMMISSION [Inv. No. 337-TA-709] In the Matter of Certain Integrated Circuits... importation of certain integrated circuits, chipsets, and products containing same including televisions... importation, or the sale within the United States after importation of certain integrated circuits, chipsets...

Latch-up and radiation integrated circuit--LURIC: a test chip for CMOS latch-up investigation

International Nuclear Information System (INIS)

Estreich, D.B.

1978-11-01

A CMOS integrated circuit test chip (Latch-Up and Radiation Integrated Circuit--LURIC) designed for CMOS latch-up and radiation effects research is described. The purpose of LURIC is (a) to provide information on the physics of CMOS latch-up, (b) to study the layout dependence of CMOS latch-up, and (c) to provide special latch-up test structures for the development and verification of a latch-up model. Many devices and test patterns on LURIC are also well suited for radiation effects studies. LURIC contains 86 devices and related test structures. A 12-layer mask set allows both metal gate CMOS and silicon gate ELA (Extended Linear Array) CMOS to be fabricated. Six categories of test devices and related test structures are included. These are (a) the CD4007 metal gate CMOS IC with auxiliary test structures, (b) ELA CMOS cells, (c) field-aided lateral pnp transistors, (d) p-well and substrate spreading resistance test structures, (e) latch-up test structures (simplified symmetrical latch-up paths), and (f) support test patterns (e.g., MOS capacitors, p + n diodes, MOS test transistors, van der Pauw and Kelvin contact resistance test patterns, etc.). A standard probe pattern array has been used on all twenty-four subchips for testing convenience

Silicon-based optical integrated circuits for terabit communication networks

International Nuclear Information System (INIS)

Svidzinsky, K K

2003-01-01

A brief review is presented of the development of silicon-based optical integrated circuits used as components in modern all-optical communication networks with the terabit-per-second transmission capacity. The designs and technologies for manufacturing these circuits are described and the problems related to their development and application in WDM communication systems are considered. (special issue devoted to the memory of academician a m prokhorov)

Development of integrated thermionic circuits for high-temperature applications

International Nuclear Information System (INIS)

McCormick, J.B.; Wilde, D.; Depp, S.; Hamilton, D.J.; Kerwin, W.; Derouin, C.; Roybal, L.; Dooley, R.

1981-01-01

A class of devices known as integrated thermionic circuits (ITC) capable of extended operation in ambient temperatures up to 500 0 C is described. The evolution of the ITC concept is discussed. A set of practical design and performance equations is demonstrated. Recent experimental results are discussed in which both devices and simple circuits have successfully operated in 500 0 C environments for extended periods of time

Monolithic integration of micromachined sensors and CMOS circuits based on SOI technologies

International Nuclear Information System (INIS)

Yu Xiaomei; Tang Yaquan; Zhang Haitao

2008-01-01

This note presents a novel way to monolithically integrate micro-cantilever sensors and signal conditioning circuits by combining SOI CMOS and SOI micromachining technologies. In order to improve the sensor performance and reduce the system volume, an integrated sensor system composed of a piezoresistive cantilever array, a temperature-compensation current reference, a digitally controlled multiplexer and an instrument amplifier is designed and finally fabricated. A post-SOI CMOS process is developed to realize the integrated sensor system which is based on a standard CMOS process with one more mask to define the cantilever structure at the end of the process. Measurements on the finished SOI CMOS devices and circuits show that the integration process has good compatibility both for the cantilever sensors and for the CMOS circuits, and the SOI CMOS integration process can decrease about 25% sequences compared with the bulk silicon CMOS process. (note)

A niobiumnitride mixer with niobium tuning circuit

International Nuclear Information System (INIS)

Plathner, B.; Schicke, M.; Lehnert, T.; Gundlach, K.H.; Rothermel, H.; Aoyagi, M.; Takada, S.

1996-01-01

This letter reports a low noise submillimeter-wave mixer using NbN tunnel junctions integrated in Nb matching circuits. The double side band receiver noise temperature was 245 K at 345 GHz. Plasma conditions for NbN film deposition on quartz substrates at room temperature are created by using a second Nb target as a selective nitrogen pump. Electrodes for tunnel junctions with critical temperatures above 15 K and normal state resistivities in the range from 130 to 160 μΩcm were obtained. This permits integrating NbN junctions into normal metal or non-NbN superconducting matching circuits, which is of great interest for THz mixers. copyright 1996 American Institute of Physics

Microcontroller based Integrated Circuit Tester

OpenAIRE

Yousif Taha Yousif Elamin; Abdelrasoul Jabar Alzubaidi

2015-01-01

The digital integrated circuit (IC) tester is implemented by using the ATmega32 microcontroller . The microcontroller processes the inputs and outputs and displays the results on a Liquid Crystal Display (LCD). The basic function of the digital IC tester is to test a digital IC for correct logical functioning as described in the truth table and/or function table. The designed model can test digital ICs having 14 pins. Since it is programmable, any number of ICs can be tested . Thi...

Status of readout integrated circuits for radiation detector

International Nuclear Information System (INIS)

Moon, B. S.; Hong, S. B.; Cheng, J. E. and others

2001-09-01

In this report, we describe the current status of readout integrated circuits developed for radiation detectors, along with new technologies being applied to this field. The current status of ASCIC chip development related to the readout electronics is also included in this report. Major sources of this report are from product catalogs and web sites of the related industries. In the field of semiconductor process technology in Korea, the current status of the multi-project wafer(MPW) of IDEC, the multi-project chip(MPC) of ISRC and other domestic semiconductor process industries is described. In the case of other countries, the status of the MPW of MOSIS in USA and the MPW of EUROPRACTICE in Europe is studied. This report also describes the technologies and products of readout integrated circuits of industries worldwide

InP-based three-dimensional photonic integrated circuits

Science.gov (United States)

Tsou, Diana; Zaytsev, Sergey; Pauchard, Alexandre; Hummel, Steve; Lo, Yu-Hwa

2001-10-01

Fast-growing internet traffic volumes require high data communication bandwidth over longer distances than short wavelength (850 nm) multi-mode fiber systems can provide. Access network bottlenecks put pressure on short-range (SR) telecommunication systems. To effectively address these datacom and telecom market needs, low cost, high-speed laser modules at 1310 and 1550 nm wavelengths are required. The great success of GaAs 850 nm VCSELs for Gb/s Ethernet has motivated efforts to extend VCSEL technology to longer wavelengths in the 1310 and 1550 nm regimes. However, the technological challenges associated with available intrinsic materials for long wavelength VCSELs are tremendous. Even with recent advances in this area, it is believed that significant additional development is necessary before long wavelength VCSELs that meet commercial specifications will be widely available. In addition, the more stringent OC192 and OC768 specifications for single-mode fiber (SMF) datacom may require more than just a long wavelength laser diode, VCSEL or not, to address numerous cost and performance issues. We believe that photonic integrated circuits, which compactly integrate surface-emitting lasers with additional active and passive optical components with extended functionality, will provide the best solutions to today's problems. Photonic integrated circuits (PICs) have been investigated for more than a decade. However, they have produced limited commercial impact to date primarily because the highly complicated fabrication processes produce significant yield and device performance issues. In this presentation, we will discuss a new technology platform for fabricating InP-based photonic integrated circuits compatible with surface-emitting laser technology. Employing InP transparency at 1310 and 1550 nm wavelengths, we have created 3-D photonic integrated circuits (PICs) by utilizing light beams in both surface normal and in-plane directions within the InP-based structure

Foundry fabricated photonic integrated circuit optical phase lock loop.

Science.gov (United States)

Bałakier, Katarzyna; Fice, Martyn J; Ponnampalam, Lalitha; Graham, Chris S; Wonfor, Adrian; Seeds, Alwyn J; Renaud, Cyril C

2017-07-24

This paper describes the first foundry-based InP photonic integrated circuit (PIC) designed to work within a heterodyne optical phase locked loop (OPLL). The PIC and an external electronic circuit were used to phase-lock a single-line semiconductor laser diode to an incoming reference laser, with tuneable frequency offset from 4 GHz to 12 GHz. The PIC contains 33 active and passive components monolithically integrated on a single chip, fully demonstrating the capability of a generic foundry PIC fabrication model. The electronic part of the OPLL consists of commercially available RF components. This semi-packaged system stabilizes the phase and frequency of the integrated laser so that an absolute frequency, high-purity heterodyne signal can be generated when the OPLL is in operation, with phase noise lower than -100 dBc/Hz at 10 kHz offset from the carrier. This is the lowest phase noise level ever demonstrated by monolithically integrated OPLLs.

Neuron Stimulation Device Integrated with Silicon Nanowire-Based Photodetection Circuit on a Flexible Substrate

Directory of Open Access Journals (Sweden)

Suk Won Jung

2016-12-01

Full Text Available This paper proposes a neural stimulation device integrated with a silicon nanowire (SiNW-based photodetection circuit for the activation of neurons with light. The proposed device is comprised of a voltage divider and a current driver in which SiNWs are used as photodetector and field-effect transistors; it has the functions of detecting light, generating a stimulation signal in proportion to the light intensity, and transmitting the signal to a micro electrode. To show the applicability of the proposed neural stimulation device as a high-resolution retinal prosthesis system, a high-density neural stimulation device with a unit cell size of 110 × 110 μ m and a resolution of 32 × 32 was fabricated on a flexible film with a thickness of approximately 50 μm. Its effectiveness as a retinal stimulation device was then evaluated using a unit cell in an in vitro animal experiment involving the retinal tissue of retinal Degeneration 1 (rd1 mice. Experiments wherein stimulation pulses were applied to the retinal tissues successfully demonstrate that the number of spikes in neural response signals increases in proportion to light intensity.

Data readout system utilizing photonic integrated circuit

Energy Technology Data Exchange (ETDEWEB)

Stopiński, S., E-mail: S.Stopinski@tue.nl [COBRA Research Institute, Eindhoven University of Technology (Netherlands); Institute of Microelectronics and Optoelectronics, Warsaw University of Technology (Poland); Malinowski, M.; Piramidowicz, R. [Institute of Microelectronics and Optoelectronics, Warsaw University of Technology (Poland); Smit, M.K.; Leijtens, X.J.M. [COBRA Research Institute, Eindhoven University of Technology (Netherlands)

2013-10-11

We describe a novel optical solution for data readout systems. The core of the system is an Indium-Phosphide photonic integrated circuit performing as a front-end readout unit. It functions as an optical serializer in which the serialization of the input signal is provided by means of on-chip optical delay lines. The circuit employs electro-optic phase shifters to build amplitude modulators, power splitters for signal distribution, semiconductor optical amplifiers for signal amplification as well as on-chip reflectors. We present the concept of the system, the design and first characterization results of the devices that were fabricated in a multi-project wafer run.

Integrated Circuits for Analog Signal Processing

CERN Document Server

2013-01-01

  This book presents theory, design methods and novel applications for integrated circuits for analog signal processing.  The discussion covers a wide variety of active devices, active elements and amplifiers, working in voltage mode, current mode and mixed mode.  This includes voltage operational amplifiers, current operational amplifiers, operational transconductance amplifiers, operational transresistance amplifiers, current conveyors, current differencing transconductance amplifiers, etc.  Design methods and challenges posed by nanometer technology are discussed and applications described, including signal amplification, filtering, data acquisition systems such as neural recording, sensor conditioning such as biomedical implants, actuator conditioning, noise generators, oscillators, mixers, etc.   Presents analysis and synthesis methods to generate all circuit topologies from which the designer can select the best one for the desired application; Includes design guidelines for active devices/elements...

High-frequency analog integrated circuit design

CERN Document Server

1995-01-01

To learn more about designing analog integrated circuits (ICs) at microwave frequencies using GaAs materials, turn to this text and reference. It addresses GaAs MESFET-based IC processing. Describes the newfound ability to apply silicon analog design techniques to reliable GaAs materials and devices which, until now, was only available through technical papers scattered throughout hundred of articles in dozens of professional journals.

Viewing Integrated-Circuit Interconnections By SEM

Science.gov (United States)

Lawton, Russel A.; Gauldin, Robert E.; Ruiz, Ronald P.

1990-01-01

Back-scattering of energetic electrons reveals hidden metal layers. Experiment shows that with suitable operating adjustments, scanning electron microscopy (SEM) used to look for defects in aluminum interconnections in integrated circuits. Enables monitoring, in situ, of changes in defects caused by changes in temperature. Gives truer picture of defects, as etching can change stress field of metal-and-passivation pattern, causing changes in defects.

Review of Polynomial Chaos-Based Methods for Uncertainty Quantification in Modern Integrated Circuits

Directory of Open Access Journals (Sweden)

Arun Kaintura

2018-02-01

Full Text Available Advances in manufacturing process technology are key ensembles for the production of integrated circuits in the sub-micrometer region. It is of paramount importance to assess the effects of tolerances in the manufacturing process on the performance of modern integrated circuits. The polynomial chaos expansion has emerged as a suitable alternative to standard Monte Carlo-based methods that are accurate, but computationally cumbersome. This paper provides an overview of the most recent developments and challenges in the application of polynomial chaos-based techniques for uncertainty quantification in integrated circuits, with particular focus on high-dimensional problems.

Integration substrate with a ultra-high-density capacitor and a through-substrate via

NARCIS (Netherlands)

Klootwijk, J.H.; Roozeboom, F.; Ruigrok, J.J.M.; Reefman, D.

2014-01-01

An integration substrate for a system in package comprises a through-substrate via and a trench capacitor wherein with a trench filling that includes at least four electrically conductive capacitor-electrode layers in an alternating arrangement with dielectric layers. --The capacitor-electrode

Multi-Objective Optimization in Physical Synthesis of Integrated Circuits

CERN Document Server

A Papa, David

2013-01-01

This book introduces techniques that advance the capabilities and strength of modern software tools for physical synthesis, with the ultimate goal to improve the quality of leading-edge semiconductor products.  It provides a comprehensive introduction to physical synthesis and takes the reader methodically from first principles through state-of-the-art optimizations used in cutting edge industrial tools. It explains how to integrate chip optimizations in novel ways to create powerful circuit transformations that help satisfy performance requirements. Broadens the scope of physical synthesis optimization to include accurate transformations operating between the global and local scales; Integrates groups of related transformations to break circular dependencies and increase the number of circuit elements that can be jointly optimized to escape local minima;  Derives several multi-objective optimizations from first observations through complete algorithms and experiments; Describes integrated optimization te...

Design of Integrated Circuits Approaching Terahertz Frequencies

DEFF Research Database (Denmark)

Yan, Lei

In this thesis, monolithic microwave integrated circuits(MMICs) are presented for millimeter-wave and submillimeter-wave or terahertz(THz) applications. Millimeter-wave power generation from solid state devices is not only crucial for the emerging high data rate wireless communications but also...... heterodyne receivers with requirements of room temperature operation, low system complexity, and high sensitivity, monolithic integrated Schottky diode technology is chosen for the implementation of submillimeterwave components. The corresponding subharmonic mixer and multiplier for a THz radiometer system...

SiGe Integrated Circuit Developments for SQUID/TES Readout

Science.gov (United States)

Prêle, D.; Voisin, F.; Beillimaz, C.; Chen, S.; Piat, M.; Goldwurm, A.; Laurent, P.

2018-03-01

SiGe integrated circuits dedicated to the readout of superconducting bolometer arrays for astrophysics have been developed since more than 10 years at APC. Whether for Cosmic Microwave Background (CMB) observations with the QUBIC ground-based experiment (Aumont et al. in astro-ph.IM, 2016. arXiv:1609.04372) or for the Hot and Energetic Universe science theme with the X-IFU instrument on-board of the ATHENA space mission (Barret et al. in SPIE 9905, space telescopes & instrumentation 2016: UV to γ Ray, 2016. https://doi.org/10.1117/12.2232432), several kinds of Transition Edge Sensor (TES) (Irwin and Hilton, in ENSS (ed) Cryogenic particle detection, Springer, Berlin, 2005) arrays have been investigated. To readout such superconducting detector arrays, we use time or frequency domain multiplexers (TDM, FDM) (Prêle in JINST 10:C08015, 2016. https://doi.org/10.1088/1748-0221/10/08/C08015) with Superconducting QUantum Interference Devices (SQUID). In addition to the SQUID devices, low-noise biasing and amplification are needed. These last functions can be obtained by using BiCMOS SiGe technology in an Application Specific Integrated Circuit (ASIC). ASIC technology allows integration of highly optimised circuits specifically designed for a unique application. Moreover, we could reach very low-noise and wide band amplification using SiGe bipolar transistor either at room or cryogenic temperatures (Cressler in J Phys IV 04(C6):C6-101, 1994. https://doi.org/10.1051/jp4:1994616). This paper discusses the use of SiGe integrated circuits for SQUID/TES readout and gives an update of the last developments dedicated to the QUBIC telescope and to the X-IFU instrument. Both ASIC called SQmux128 and AwaXe are described showing the interest of such SiGe technology for SQUID multiplexer controls.

Miniaturized Ultrasound Imaging Probes Enabled by CMUT Arrays with Integrated Frontend Electronic Circuits

Science.gov (United States)

Khuri-Yakub, B. (Pierre) T.; Oralkan, Ömer; Nikoozadeh, Amin; Wygant, Ira O.; Zhuang, Steve; Gencel, Mustafa; Choe, Jung Woo; Stephens, Douglas N.; de la Rama, Alan; Chen, Peter; Lin, Feng; Dentinger, Aaron; Wildes, Douglas; Thomenius, Kai; Shivkumar, Kalyanam; Mahajan, Aman; Seo, Chi Hyung; O’Donnell, Matthew; Truong, Uyen; Sahn, David J.

2010-01-01

Capacitive micromachined ultrasonic transducer (CMUT) arrays are conveniently integrated with frontend integrated circuits either monolithically or in a hybrid multichip form. This integration helps with reducing the number of active data processing channels for 2D arrays. This approach also preserves the signal integrity for arrays with small elements. Therefore CMUT arrays integrated with electronic circuits are most suitable to implement miniaturized probes required for many intravascular, intracardiac, and endoscopic applications. This paper presents examples of miniaturized CMUT probes utilizing 1D, 2D, and ring arrays with integrated electronics. PMID:21097106

Analysis of the capability to effectively design complementary metal oxide semiconductor integrated circuits

Science.gov (United States)

McConkey, M. L.

1984-12-01

A complete CMOS/BULK design cycle has been implemented and fully tested to evaluate its effectiveness and a viable set of computer-aided design tools for the layout, verification, and simulation of CMOS/BULK integrated circuits. This design cycle is good for p-well, n-well, or twin-well structures, although current fabrication technique available limit this to p-well only. BANE, an integrated layout program from Stanford, is at the center of this design cycle and was shown to be simple to use in the layout of CMOS integrated circuits (it can be also used to layout NMOS integrated circuits). A flowchart was developed showing the design cycle from initial layout, through design verification, and to circuit simulation using NETLIST, PRESIM, and RNL from the University of Washington. A CMOS/BULK library was designed and includes logic gates that were designed and completely tested by following this flowchart. Also designed was an arithmetic logic unit as a more complex test of the CMOS/BULK design cycle.

Method and apparatus for in-system redundant array repair on integrated circuits

Science.gov (United States)

Bright, Arthur A.; Crumley, Paul G.; Dombrowa, Marc B.; Douskey, Steven M.; Haring, Rudolf A.; Oakland, Steven F.; Ouellette, Michael R.; Strissel, Scott A.

2007-12-18

Disclosed is a method of repairing an integrated circuit of the type comprising of a multitude of memory arrays and a fuse box holding control data for controlling redundancy logic of the arrays. The method comprises the steps of providing the integrated circuit with a control data selector for passing the control data from the fuse box to the memory arrays; providing a source of alternate control data, external of the integrated circuit; and connecting the source of alternate control data to the control data selector. The method comprises the further step of, at a given time, passing the alternate control data from the source thereof, through the control data selector and to the memory arrays to control the redundancy logic of the memory arrays.

Method and apparatus for in-system redundant array repair on integrated circuits

Science.gov (United States)

Bright, Arthur A [Croton-on-Hudson, NY; Crumley, Paul G [Yorktown Heights, NY; Dombrowa, Marc B [Bronx, NY; Douskey, Steven M [Rochester, MN; Haring, Rudolf A [Cortlandt Manor, NY; Oakland, Steven F [Colchester, VT; Ouellette, Michael R [Westford, VT; Strissel, Scott A [Byron, MN

2008-07-29

Disclosed is a method of repairing an integrated circuit of the type comprising of a multitude of memory arrays and a fuse box holding control data for controlling redundancy logic of the arrays. The method comprises the steps of providing the integrated circuit with a control data selector for passing the control data from the fuse box to the memory arrays; providing a source of alternate control data, external of the integrated circuit; and connecting the source of alternate control data to the control data selector. The method comprises the further step of, at a given time, passing the alternate control data from the source thereof, through the control data selector and to the memory arrays to control the redundancy logic of the memory arrays.

Integration substrate with a ultra-high-density capacitor and a through-substrate via

NARCIS (Netherlands)

2008-01-01

An integration substrate for a system in package comprises a through-substrate via and a trench capacitor wherein with a trench filling that includes at least 4 elec. conductive capacitor-electrode layers in an alternating arrangement with dielec. layers. The capacitor-electrode layers are

Deeply-etched DBR mirrors for photonic integrated circuits and tunable lasers

NARCIS (Netherlands)

Docter, B.

2009-01-01

Deeply-etched Distributed Bragg Reflector (DBR) mirrors are a new versatile building block for Photonic Integrated Circuits that allows us to create more complex circuits for optical telecommunication applications. The DBR mirrors increase the device design flexibility because the mirrors can be

Transient-induced latchup in CMOS integrated circuits

CERN Document Server

Ker, Ming-Dou

2009-01-01

"Transient-Induced Latchup in CMOS Integrated Circuits equips the practicing engineer with all the tools needed to address this regularly occurring problem while becoming more proficient at IC layout. Ker and Hsu introduce the phenomenon and basic physical mechanism of latchup, explaining the critical issues that have resurfaced for CMOS technologies. Once readers can gain an understanding of the standard practices for TLU, Ker and Hsu discuss the physical mechanism of TLU under a system-level ESD test, while introducing an efficient component-level TLU measurement setup. The authors then present experimental methodologies to extract safe and area-efficient compact layout rules for latchup prevention, including layout rules for I/O cells, internal circuits, and between I/O and internal circuits. The book concludes with an appendix giving a practical example of extracting layout rules and guidelines for latchup prevention in a 0.18-micrometer 1.8V/3.3V silicided CMOS process."--Publisher's description.

Large microwave tunability of GaAs-based multiferroic heterostructure for applications in monolithic microwave integrated circuits

International Nuclear Information System (INIS)

Chen Yajie; Gao Jinsheng; Vittoria, C; Harris, V G; Heiman, D

2010-01-01

Microwave magnetoelectric coupling in a ferroelectric/ferromagnetic/semiconductor multiferroic (MF) heterostructure, consisting of a Co 2 MnAl epitaxial film grown on a GaAs substrate bonded to a lead magnesium niobate-lead titanate (PMN-PT) crystal, is reported. Ferromagnetic resonance measurements were carried out at X-band under the application of electric fields. Results indicate a frequency tuning of 125 MHz for electric field strength of 8 kV cm -1 resulting in a magnetoelectric coupling coefficient of 3.4 Oe cm kV -1 . This work explores the potential of electronically controlled MF devices for use in future monolithic microwave integrated circuits.

Silicon photonics integrated circuits: a manufacturing platform for high density, low power optical I/O's.

Science.gov (United States)

Absil, Philippe P; Verheyen, Peter; De Heyn, Peter; Pantouvaki, Marianna; Lepage, Guy; De Coster, Jeroen; Van Campenhout, Joris

2015-04-06

Silicon photonics integrated circuits are considered to enable future computing systems with optical input-outputs co-packaged with CMOS chips to circumvent the limitations of electrical interfaces. In this paper we present the recent progress made to enable dense multiplexing by exploiting the integration advantage of silicon photonics integrated circuits. We also discuss the manufacturability of such circuits, a key factor for a wide adoption of this technology.

Precise microwave characterization of MgO substrates for HTS circuits with superconducting post dielectric resonator

International Nuclear Information System (INIS)

Mazierska, Janina; Ledenyov, Dimitri; Jacob, Mohan V; Krupka, Jerzy

2005-01-01

Accurate data of complex permittivity of dielectric substrates are needed for efficient design of HTS microwave planar circuits. We have tested MgO substrates from three different manufacturing batches using a dielectric resonator with superconducting parts recently developed for precise microwave characterization of laminar dielectrics at cryogenic temperatures. The measurement fixture has been fabricated using a SrLaAlO 3 post dielectric resonator with DyBa 2 Cu 3 O 7 end plates and silver-plated copper sidewalls to achieve the resolution of loss tangent measurements of 2 x 10 -6 . The tested MgO substrates exhibited the average relative permittivity of 9.63 and tanδ from 3.7 x 10 -7 to 2 x 10 -5 at frequency of 10.5 GHz in the temperature range from 14 to 80 K

InP-based photonic integrated circuit platform on SiC wafer.

Science.gov (United States)

Takenaka, Mitsuru; Takagi, Shinichi

2017-11-27

We have numerically investigated the properties of an InP-on-SiC wafer as a photonic integrated circuit (PIC) platform. By bonding a thin InP-based semiconductor on a SiC wafer, SiC can be used as waveguide cladding, a heat sink, and a support substrate simultaneously. Since the refractive index of SiC is sufficiently low, PICs can be fabricated using InP-based strip and rib waveguides with a minimum bend radius of approximately 7 μm. High-thermal-conductivity SiC underneath an InP-based waveguide core markedly improves heat dissipation, resulting in superior thermal properties of active devices such as laser diodes. The InP-on-SiC wafer has significantly smaller thermal stress than InP-on-SiO 2 /Si wafer, which prevents the thermal degradation of InP-based devices during high-temperature processes. Thus, InP on SiC provides an ideal platform for high-performance PICs.

Integrated circuit devices in control systems of coal mining complexes

Energy Technology Data Exchange (ETDEWEB)

1983-01-01

Systems of automatic monitoring and control of coal mining complexes developed in the 1960's used electromagnetic relays, thyristors, and flip-flops on transistors of varying conductivity. The circuits' designers, devoted much attention to ensuring spark safety, lowering power consumption, and raising noise immunity and repairability of functional devices. The fast development of integrated circuitry led to the use of microelectronic components in most devices of mine automation. An analysis of specifications and experimental research into integrated circuits (IMS) shows that the series K 176 IMS components made by CMOS technology best meet mine conditions of operation. The use of IMS devices under mine conditions has demonstrated their high reliability. Further development of integrated circuitry involve using microprocessors and microcomputers. (SC)

Integrated neuron circuit for implementing neuromorphic system with synaptic device

Science.gov (United States)

Lee, Jeong-Jun; Park, Jungjin; Kwon, Min-Woo; Hwang, Sungmin; Kim, Hyungjin; Park, Byung-Gook

2018-02-01

In this paper, we propose and fabricate Integrate & Fire neuron circuit for implementing neuromorphic system. Overall operation of the circuit is verified by measuring discrete devices and the output characteristics of the circuit. Since the neuron circuit shows asymmetric output characteristic that can drive synaptic device with Spike-Timing-Dependent-Plasticity (STDP) characteristic, the autonomous weight update process is also verified by connecting the synaptic device and the neuron circuit. The timing difference of the pre-neuron and the post-neuron induce autonomous weight change of the synaptic device. Unlike 2-terminal devices, which is frequently used to implement neuromorphic system, proposed scheme of the system enables autonomous weight update and simple configuration by using 4-terminal synapse device and appropriate neuron circuit. Weight update process in the multi-layer neuron-synapse connection ensures implementation of the hardware-based artificial intelligence, based on Spiking-Neural- Network (SNN).

Integrated all optical transmodulator circuits with non-linear gain elements and tunable optical fibers

NARCIS (Netherlands)

Kuindersma, P.I.; Leijtens, X.J.M.; Zantvoort, van J.H.C.; Waardt, de H.

2012-01-01

We characterize integrated InP circuits for high speed ‘all-optical’ signal processing. Single chip circuits act as optical transistors. Transmodulation is performed by non-linear gain sections. Integrated tunable filters give signal equalization in time domain.

Development of wide range charge integration application specified integrated circuit for photo-sensor

Energy Technology Data Exchange (ETDEWEB)

Katayose, Yusaku, E-mail: katayose@ynu.ac.jp [Department of Physics, Yokohama National University, 79-5 Tokiwadai, Hodogaya-ku, Yokohama, Kanagawa 240-8501 (Japan); Ikeda, Hirokazu [Institute of Space and Astronautical Science (ISAS)/Japan Aerospace Exploration Agency (JAXA), 3-1-1 Yoshinodai, Chuo-ku, Sagamihara, Kanagawa 252-5210 (Japan); Tanaka, Manobu [National Laboratory for High Energy Physics, KEK, 1-1 Oho, Tsukuba, Ibaraki 305-0801 (Japan); Shibata, Makio [Department of Physics, Yokohama National University, 79-5 Tokiwadai, Hodogaya-ku, Yokohama, Kanagawa 240-8501 (Japan)

2013-01-21

A front-end application specified integrated circuit (ASIC) is developed with a wide dynamic range amplifier (WDAMP) to read-out signals from a photo-sensor like a photodiode. The WDAMP ASIC consists of a charge sensitive preamplifier, four wave-shaping circuits with different amplification factors and Wilkinson-type analog-to-digital converter (ADC). To realize a wider range, the integrating capacitor in the preamplifier can be changed from 4 pF to 16 pF by a two-bit switch. The output of a preamplifier is shared by the four wave-shaping circuits with four gains of 1, 4, 16 and 64 to adapt the input range of ADC. A 0.25-μm CMOS process (of UMC electronics CO., LTD) is used to fabricate the ASIC with four-channels. The dynamic range of four orders of magnitude is achieved with the maximum range over 20 pC and the noise performance of 0.46 fC + 6.4×10{sup −4} fC/pF. -- Highlights: ► A front-end ASIC is developed with a wide dynamic range amplifier. ► The ASIC consists of a CSA, four wave-shaping circuits and pulse-height-to-time converters. ► The dynamic range of four orders of magnitude is achieved with the maximum range over 20 pC.

A full feature FASTBUS slave interface using semicustom integrated circuits

International Nuclear Information System (INIS)

Skegg, R.; Daviel, A.; Downing, R.

1986-01-01

Two semi-custom integrated circuits have been designed and manufactured which enable the construction of a full featured FASTBUS slave interface without the need for a detailed knowledge of the FASTBUS protocol. A relatively small amount of board space is required compared to implementations using conventional circuits. The semi-custom devices are described in detail, and an application example is given. (orig.)

Application specific integrated circuit for high temperature oil well applications

Energy Technology Data Exchange (ETDEWEB)

Fallet, T.; Gakkestad, J.; Forre, G.

1994-12-31

This paper describes the design of an integrated BiCMOS circuit for high temperature applications. The circuit contains Pierce oscillators with automatic gain control, and measurements show that it is operating up to 266{sup o}C. The relative frequency variation up to 200 {sup o}C is less than 60 ppm caused mainly by the crystal element itself. 4 refs., 7 figs.

Microwave Imaging Using CMOS Integrated Circuits with Rotating 4 × 4 Antenna Array on a Breast Phantom

Directory of Open Access Journals (Sweden)

Hang Song

2017-01-01

Full Text Available A digital breast cancer detection system using 65 nm technology complementary metal oxide semiconductor (CMOS integrated circuits with rotating 4 × 4 antenna array is presented. Gaussian monocycle pulses are generated by CMOS logic circuits and transmitted by a 4 × 4 matrix antenna array via two CMOS single-pole-eight-throw (SP8T switching matrices. Radar signals are received and converted to digital signals by CMOS equivalent time sampling circuits. By rotating the 4 × 4 antenna array, the reference signal is obtained by averaging the waveforms from various positions to extract the breast phantom target response. A signal alignment algorithm is proposed to compensate the phase shift of the signals caused by the system jitter. After extracting the scattered signal from the target, a bandpass filter is applied to reduce the noise caused by imperfect subtraction between original and the reference signals. The confocal imaging algorithm for rotating antennas is utilized to reconstruct the breast image. A 1 cm3 bacon block as a cancer phantom target in a rubber substrate as a breast fat phantom can be detected with reduced artifacts.

Investigation of SFQ integrated circuits using Nb fabrication technology

International Nuclear Information System (INIS)

Numata, H.; Tanaka, M.; Kitagawa, Y.; Tahara, S.

1999-01-01

In NEC's standard process, the minimum junction size is 2 μm and the critical current density (J C ) is 2.5 kA cm -2 . In the process, i-line stepper lithography and reactive ion etching with SF 6 gas are used and the standard deviation (σ) of the critical current (I C ) was 0.9% for the 2 μm junctions. This junction uniformity enables integration of more than 10M junctions if an I C variation of ±10% permits correct circuit operation. A 512-bit shift register was designed and fabricated by our standard process. Correct 512-bit delay operation was obtained. These results are promising for the large-scale integration of single flux quantum circuits. (author)

Radiation sensitivity of integrated circuits Pt. 1

International Nuclear Information System (INIS)

Bereczkine Kerenyi, Ilona

1986-01-01

The cosmic ray sensitivity of CMOS integrated circuits are overviewed in three parts. The aim is to analyze the effects of ionizing radiation on the degradation of electronic parameters, the effects of the electric state during irradiation, and the radiation hardening of ICs. In this Part 1 a general introduction of the response of semiconductors to cosmic radiation is given, and the radiation tolerance and hardening of small-scale integrated CMOS ICs is analyzed in detail. The devices include various basic inverters and simple gate ICs. (R.P.)

Gigahertz flexible graphene transistors for microwave integrated circuits.

Science.gov (United States)

Yeh, Chao-Hui; Lain, Yi-Wei; Chiu, Yu-Chiao; Liao, Chen-Hung; Moyano, David Ricardo; Hsu, Shawn S H; Chiu, Po-Wen

2014-08-26

Flexible integrated circuits with complex functionalities are the missing link for the active development of wearable electronic devices. Here, we report a scalable approach to fabricate self-aligned graphene microwave transistors for the implementation of flexible low-noise amplifiers and frequency mixers, two fundamental building blocks of a wireless communication receiver. A devised AlOx T-gate structure is used to achieve an appreciable increase of device transconductance and a commensurate reduction of the associated parasitic resistance, thus yielding a remarkable extrinsic cutoff frequency of 32 GHz and a maximum oscillation frequency of 20 GHz; in both cases the operation frequency is an order of magnitude higher than previously reported. The two frequencies work at 22 and 13 GHz even when subjected to a strain of 2.5%. The gigahertz microwave integrated circuits demonstrated here pave the way for applications which require high flexibility and radio frequency operations.

The RD53A Integrated Circuit

CERN Document Server

Garcia-Sciveres, Maurice

2017-01-01

Implementation details for the RD53A pixel readout integrated circuit designed by the RD53 Collaboration. This is a companion to the specifications document and will eventually become a reference for chip users. RD53A is not intended to be a final production IC for use in an experiment, and contains design variations for testing purposes, making the pixel matrix non-uniform. The chip size is 20.0 mm by 11.8 mm.

Using heavy ion backscattering spectrometry (HIBS) to solve integrated circuit manufacturing problems

International Nuclear Information System (INIS)

Banks, J.C.; Doyle, B.L.; Knapp, J.A.; Werho, D.; Gregory, R.B.; Anthony, M.; Hurd, T.Q.; Diebold, A.C.

1997-01-01

Heavy Ion Backscattering Spectrometry (HIBS) is a new IBA tool for measuring extremely low levels of surface contamination on very pure substrates, such as Si wafers used in the manufacture of integrated circuits. HIBS derives its high sensitivity through the use of moderately low energy (∼ 100 keV) heavy ions (e.g., C 12 ) to boost the RBS cross-section to levels approaching 1,000 barns, and by using specially designed time-of-flight detectors which have been optimized to provide a large scattering solid angle with minimal kinematic broadening. A HIBS User Facility has been created which provides US industry, national laboratories, and universities with a place for conducting ultra-trace level surface contamination studies. A review of the HIBS technique is given and examples of using the facility to calibrate Total-Reflection X-ray Fluorescence Spectroscopy (TXRF) instruments and develop wafer cleaning processes are discussed

77 FR 25747 - Certain Semiconductor Integrated Circuit Devices and Products Containing Same; Institution of...

Science.gov (United States)

2012-05-01

... INTERNATIONAL TRADE COMMISSION [Inv. No. 337-TA-840] Certain Semiconductor Integrated Circuit... States after importation of certain semiconductor integrated circuit devices and products containing same... No. 6,847,904 (``the '904 patent''). The complaint further alleges that an industry in the United...

Designing charge-sensitive preamplifiers based on low-noise analog integrated circuits

International Nuclear Information System (INIS)

Agakhanyan, T.M.

1998-01-01

The methodology for designing charge-sensitive preamplifiers on the low-noise analog integral circuits, including all the stages: the mathematical synthesis with optimization of the intermediate function; the scheme-technical synthesis with parametric optimization of the scheme and analysis of draft projects with the parameter verification is presented. The designing is conducted on the basis of requirements for signal parameters and noise indices of the preamplifier. The system of automated designing of the charge-sensitive preamplifiers on the low-noise analog integral circuits is developed [ru

Precise microwave characterization of MgO substrates for HTS circuits with superconducting post dielectric resonator

Energy Technology Data Exchange (ETDEWEB)

Mazierska, Janina [Institute of Information Sciences and Technology, Massey University, Palmerston North, P. Bag 11222 (New Zealand); Ledenyov, Dimitri [Electrical and Computer Engineering, James Cook University, Townsville, Q4811 (Australia); Jacob, Mohan V [Electrical and Computer Engineering, James Cook University, Townsville, Q4811 (Australia); Krupka, Jerzy [Instytut Mikroelektroniki i Optoelektroniki Politechniki Warszawskiej, Koszykowa 75, 00-662 Warsaw (Poland)

2005-01-01

Accurate data of complex permittivity of dielectric substrates are needed for efficient design of HTS microwave planar circuits. We have tested MgO substrates from three different manufacturing batches using a dielectric resonator with superconducting parts recently developed for precise microwave characterization of laminar dielectrics at cryogenic temperatures. The measurement fixture has been fabricated using a SrLaAlO{sub 3} post dielectric resonator with DyBa{sub 2}Cu{sub 3}O{sub 7} end plates and silver-plated copper sidewalls to achieve the resolution of loss tangent measurements of 2 x 10{sup -6}. The tested MgO substrates exhibited the average relative permittivity of 9.63 and tan{delta} from 3.7 x 10{sup -7} to 2 x 10{sup -5} at frequency of 10.5 GHz in the temperature range from 14 to 80 K.

Experimental Demonstration of 7 Tb/s Switching Using Novel Silicon Photonic Integrated Circuit

DEFF Research Database (Denmark)

Ding, Yunhong; Kamchevska, Valerija; Dalgaard, Kjeld

2016-01-01

We demonstrate BER performance <10^-9 for a 1 Tb/s/core transmission over 7-core fiber and SDM switching using a novel silicon photonic integrated circuit composed of a 7x7 fiber switch and low loss SDM couplers.......We demonstrate BER performance integrated circuit composed of a 7x7 fiber switch and low loss SDM couplers....

Lithography for enabling advances in integrated circuits and devices.

Science.gov (United States)

Garner, C Michael

2012-08-28

Because the transistor was fabricated in volume, lithography has enabled the increase in density of devices and integrated circuits. With the invention of the integrated circuit, lithography enabled the integration of higher densities of field-effect transistors through evolutionary applications of optical lithography. In 1994, the semiconductor industry determined that continuing the increase in density transistors was increasingly difficult and required coordinated development of lithography and process capabilities. It established the US National Technology Roadmap for Semiconductors and this was expanded in 1999 to the International Technology Roadmap for Semiconductors to align multiple industries to provide the complex capabilities to continue increasing the density of integrated circuits to nanometre scales. Since the 1960s, lithography has become increasingly complex with the evolution from contact printers, to steppers, pattern reduction technology at i-line, 248 nm and 193 nm wavelengths, which required dramatic improvements of mask-making technology, photolithography printing and alignment capabilities and photoresist capabilities. At the same time, pattern transfer has evolved from wet etching of features, to plasma etch and more complex etching capabilities to fabricate features that are currently 32 nm in high-volume production. To continue increasing the density of devices and interconnects, new pattern transfer technologies will be needed with options for the future including extreme ultraviolet lithography, imprint technology and directed self-assembly. While complementary metal oxide semiconductors will continue to be extended for many years, these advanced pattern transfer technologies may enable development of novel memory and logic technologies based on different physical phenomena in the future to enhance and extend information processing.

Transferrable monolithic III-nitride photonic circuit for multifunctional optoelectronics

Science.gov (United States)

Shi, Zheng; Gao, Xumin; Yuan, Jialei; Zhang, Shuai; Jiang, Yan; Zhang, Fenghua; Jiang, Yuan; Zhu, Hongbo; Wang, Yongjin

2017-12-01

A monolithic III-nitride photonic circuit with integrated functionalities was implemented by integrating multiple components with different functions into a single chip. In particular, the III-nitride-on-silicon platform is used as it integrates a transmitter, a waveguide, and a receiver into a suspended III-nitride membrane via a wafer-level procedure. Here, a 0.8-mm-diameter suspended device architecture is directly transferred from silicon to a foreign substrate by mechanically breaking the support beams. The transferred InGaN/GaN multiple-quantum-well diode (MQW-diode) exhibits a turn-on voltage of 2.8 V with a dominant electroluminescence peak at 453 nm. The transmitter and receiver share an identical InGaN/GaN MQW structure, and the integrated photonic circuit inherently works for on-chip power monitoring and in-plane visible light communication. The wire-bonded monolithic photonic circuit on glass experimentally demonstrates in-plane data transmission at 120 Mb/s, paving the way for diverse applications in intelligent displays, in-plane light communication, flexible optical sensors, and wearable III-nitride optoelectronics.

Wafer-level testing and test during burn-in for integrated circuits

CERN Document Server

Bahukudumbi, Sudarshan

2010-01-01

Wafer-level testing refers to a critical process of subjecting integrated circuits and semiconductor devices to electrical testing while they are still in wafer form. Burn-in is a temperature/bias reliability stress test used in detecting and screening out potential early life device failures. This hands-on resource provides a comprehensive analysis of these methods, showing how wafer-level testing during burn-in (WLTBI) helps lower product cost in semiconductor manufacturing.Engineers learn how to implement the testing of integrated circuits at the wafer-level under various resource constrain

Relay Protection and Automation Systems Based on Programmable Logic Integrated Circuits

International Nuclear Information System (INIS)

Lashin, A. V.; Kozyrev, A. V.

2015-01-01

One of the most promising forms of developing the apparatus part of relay protection and automation devices is considered. The advantages of choosing programmable logic integrated circuits to obtain adaptive technological algorithms in power system protection and control systems are pointed out. The technical difficulties in the problems which today stand in the way of using relay protection and automation systems are indicated and a new technology for solving these problems is presented. Particular attention is devoted to the possibility of reconfiguring the logic of these devices, using programmable logic integrated circuits

Assembling surface mounted components on ink-jet printed double sided paper circuit board

International Nuclear Information System (INIS)

Andersson, Henrik A; Manuilskiy, Anatoliy; Haller, Stefan; Sidén, Johan; Nilsson, Hans-Erik; Hummelgård, Magnus; Olin, Håkan; Hummelgård, Christine

2014-01-01

Printed electronics is a rapidly developing field where many components can already be manufactured on flexible substrates by printing or by other high speed manufacturing methods. However, the functionality of even the most inexpensive microcontroller or other integrated circuit is, at the present time and for the foreseeable future, out of reach by means of fully printed components. Therefore, it is of interest to investigate hybrid printed electronics, where regular electrical components are mounted on flexible substrates to achieve high functionality at a low cost. Moreover, the use of paper as a substrate for printed electronics is of growing interest because it is an environmentally friendly and renewable material and is, additionally, the main material used for many packages in which electronics functionalities could be integrated. One of the challenges for such hybrid printed electronics is the mounting of the components and the interconnection between layers on flexible substrates with printed conductive tracks that should provide as low a resistance as possible while still being able to be used in a high speed manufacturing process. In this article, several conductive adhesives are evaluated as well as soldering for mounting surface mounted components on a paper circuit board with ink-jet printed tracks and, in addition, a double sided Arduino compatible circuit board is manufactured and programmed. (paper)

Assembling surface mounted components on ink-jet printed double sided paper circuit board.

Science.gov (United States)

Andersson, Henrik A; Manuilskiy, Anatoliy; Haller, Stefan; Hummelgård, Magnus; Sidén, Johan; Hummelgård, Christine; Olin, Håkan; Nilsson, Hans-Erik

2014-03-07

Printed electronics is a rapidly developing field where many components can already be manufactured on flexible substrates by printing or by other high speed manufacturing methods. However, the functionality of even the most inexpensive microcontroller or other integrated circuit is, at the present time and for the foreseeable future, out of reach by means of fully printed components. Therefore, it is of interest to investigate hybrid printed electronics, where regular electrical components are mounted on flexible substrates to achieve high functionality at a low cost. Moreover, the use of paper as a substrate for printed electronics is of growing interest because it is an environmentally friendly and renewable material and is, additionally, the main material used for many packages in which electronics functionalities could be integrated. One of the challenges for such hybrid printed electronics is the mounting of the components and the interconnection between layers on flexible substrates with printed conductive tracks that should provide as low a resistance as possible while still being able to be used in a high speed manufacturing process. In this article, several conductive adhesives are evaluated as well as soldering for mounting surface mounted components on a paper circuit board with ink-jet printed tracks and, in addition, a double sided Arduino compatible circuit board is manufactured and programmed.

Assembling surface mounted components on ink-jet printed double sided paper circuit board

Energy Technology Data Exchange (ETDEWEB)

Andersson, Henrik A; Manuilskiy, Anatoliy; Haller, Stefan; Sidén, Johan; Nilsson, Hans-Erik [Department of Electronics Design, Mid Sweden University, SE-851 70 Sundsvall (Sweden); Hummelgård, Magnus; Olin, Håkan [Department of Natural Science, Mid Sweden University, SE-851 70 Sundsvall (Sweden); Hummelgård, Christine [Acreo Swedish ICT AB, Håstaholmen 4, SE-824 42 Hudiksvall (Sweden)

2014-03-07

Printed electronics is a rapidly developing field where many components can already be manufactured on flexible substrates by printing or by other high speed manufacturing methods. However, the functionality of even the most inexpensive microcontroller or other integrated circuit is, at the present time and for the foreseeable future, out of reach by means of fully printed components. Therefore, it is of interest to investigate hybrid printed electronics, where regular electrical components are mounted on flexible substrates to achieve high functionality at a low cost. Moreover, the use of paper as a substrate for printed electronics is of growing interest because it is an environmentally friendly and renewable material and is, additionally, the main material used for many packages in which electronics functionalities could be integrated. One of the challenges for such hybrid printed electronics is the mounting of the components and the interconnection between layers on flexible substrates with printed conductive tracks that should provide as low a resistance as possible while still being able to be used in a high speed manufacturing process. In this article, several conductive adhesives are evaluated as well as soldering for mounting surface mounted components on a paper circuit board with ink-jet printed tracks and, in addition, a double sided Arduino compatible circuit board is manufactured and programmed. (paper)

Boson sampling with integrated optical circuits

International Nuclear Information System (INIS)

Bentivegna, M.

2014-01-01

Simulating the evolution of non-interacting bosons through a linear transformation acting on the system’s Fock state is strongly believed to be hard for a classical computer. This is commonly known as the Boson Sampling problem, and has recently got attention as the first possible way to demonstrate the superior computational power of quantum devices over classical ones. In this paper we describe the quantum optics approach to this problem, highlighting the role of integrated optical circuits.

The single-event effect evaluation technology for nano integrated circuits

International Nuclear Information System (INIS)

Zheng Hongchao; Zhao Yuanfu; Yue Suge; Fan Long; Du Shougang; Chen Maoxin; Yu Chunqing

2015-01-01

Single-event effects of nano scale integrated circuits are investigated. Evaluation methods for single-event transients, single-event upsets, and single-event functional interrupts in nano circuits are summarized and classified in detail. The difficulties in SEE testing are discussed as well as the development direction of test technology, with emphasis placed on the experimental evaluation of a nano circuit under heavy ion, proton, and laser irradiation. The conclusions in this paper are based on many years of testing at accelerator facilities and our present understanding of the mechanisms for SEEs, which have been well verified experimentally. (paper)

On-chip enzymatic microbiofuel cell-powered integrated circuits.

Science.gov (United States)

Mark, Andrew G; Suraniti, Emmanuel; Roche, Jérôme; Richter, Harald; Kuhn, Alexander; Mano, Nicolas; Fischer, Peer

2017-05-16

A variety of diagnostic and therapeutic medical technologies rely on long term implantation of an electronic device to monitor or regulate a patient's condition. One proposed approach to powering these devices is to use a biofuel cell to convert the chemical energy from blood nutrients into electrical current to supply the electronics. We present here an enzymatic microbiofuel cell whose electrodes are directly integrated into a digital electronic circuit. Glucose oxidizing and oxygen reducing enzymes are immobilized on microelectrodes of an application specific integrated circuit (ASIC) using redox hydrogels to produce an enzymatic biofuel cell, capable of harvesting electrical power from just a single droplet of 5 mM glucose solution. Optimisation of the fuel cell voltage and power to match the requirements of the electronics allow self-powered operation of the on-board digital circuitry. This study represents a step towards implantable self-powered electronic devices that gather their energy from physiological fluids.

Flexible circuits with integrated switches for robotic shape sensing

Science.gov (United States)

Harnett, C. K.

2016-05-01

Digital switches are commonly used for detecting surface contact and limb-position limits in robotics. The typical momentary-contact digital switch is a mechanical device made from metal springs, designed to connect with a rigid printed circuit board (PCB). However, flexible printed circuits are taking over from the rigid PCB in robotics because the circuits can bend while carrying signals and power through moving joints. This project is motivated by a previous work where an array of surface-mount momentary contact switches on a flexible circuit acted as an all-digital shape sensor compatible with the power resources of energy harvesting systems. Without a rigid segment, the smallest commercially-available surface-mount switches would detach from the flexible circuit after several bending cycles, sometimes violently. This report describes a low-cost, conductive fiber based method to integrate electromechanical switches into flexible circuits and other soft, bendable materials. Because the switches are digital (on/off), they differ from commercially-available continuous-valued bend/flex sensors. No amplification or analog-to-digital conversion is needed to read the signal, but the tradeoff is that the digital switches only give a threshold curvature value. Boundary conditions on the edges of the flexible circuit are key to setting the threshold curvature value for switching. This presentation will discuss threshold-setting, size scaling of the design, automation for inserting a digital switch into the flexible circuit fabrication process, and methods for reconstructing a shape from an array of digital switch states.

Thermoacoustic and thermoreflectance imaging of biased integrated circuits: Voltage and temperature maps

Energy Technology Data Exchange (ETDEWEB)

Hernández-Rosales, E.; Cedeño, E. [Gleb Wataghin Physics Institute, University of Campinas - Unicamp, 13083-859 Campinas, SP (Brazil); Instituto Politécnico Nacional, Centro de Investigación en Ciencia Aplicada y Tecnología Avanzada, Legaria 694, Colonia Irrigación, CP 11500, México, DF (Mexico); Hernandez-Wong, J. [Instituto Politécnico Nacional, Centro de Investigación en Ciencia Aplicada y Tecnología Avanzada, Legaria 694, Colonia Irrigación, CP 11500, México, DF (Mexico); CONACYT, México, DF, México (Mexico); Rojas-Trigos, J. B.; Marin, E. [Instituto Politécnico Nacional, Centro de Investigación en Ciencia Aplicada y Tecnología Avanzada, Legaria 694, Colonia Irrigación, CP 11500, México, DF (Mexico); Gandra, F. C. G.; Mansanares, A. M., E-mail: manoel@ifi.unicamp.br [Gleb Wataghin Physics Institute, University of Campinas - Unicamp, 13083-859 Campinas, SP (Brazil)

2016-07-25

In this work a combined thermoacoustic and thermoreflectance set-up was designed for imaging biased microelectronic circuits. In particular, it was used with polycrystalline silicon resistive tracks grown on a monocrystalline Si substrate mounted on a test chip. Thermoreflectance images, obtained by scanning a probe laser beam on the sample surface, clearly show the regions periodically heated by Joule effect, which are associated to the electric current distribution in the circuit. The thermoacoustic signal, detected by a pyroelectric/piezoelectric sensor beneath the chip, also discloses the Joule contribution of the whole sample. However, additional information emerges when a non-modulated laser beam is focused on the sample surface in a raster scan mode allowing imaging of the sample. The distribution of this supplementary signal is related to the voltage distribution along the circuit.

Thermal measurement a requirement for monolithic microwave integrated circuit design

OpenAIRE

Hopper, Richard; Oxley, C. H.

2008-01-01

The thermal management of structures such as Monolithic Microwave Integrated Circuits (MMICs) is important, given increased circuit packing densities and RF output powers. The paper will describe the IR measurement technology necessary to obtain accurate temperature profiles on the surface of semiconductor devices. The measurement procedure will be explained, including the device mounting arrangement and emissivity correction technique. The paper will show how the measurement technique has be...

Generation of optical vortices in an integrated optical circuit

Science.gov (United States)

Tudor, Rebeca; Kusko, Mihai; Kusko, Cristian

2017-09-01

In this work, the generation of optical vortices in an optical integrated circuit is numerically demonstrated. The optical vortices with topological charge m = ±1 are obtained by the coherent superposition of the first order modes present in a waveguide with a rectangular cross section, where the phase delay between these two propagating modes is Δφ = ±π/2. The optical integrated circuit consists of an input waveguide continued with a y-splitter. The left and the right arms of the splitter form two coupling regions K1 and K2 with a multimode output waveguide. In each coupling region, the fundamental modes present in the arms of the splitter are selectively coupled into the output waveguide horizontal and vertical first order modes, respectively. We showed by employing the beam propagation method simulations that the fine tuning of the geometrical parameters of the optical circuit makes possible the generation of optical vortices in both transverse electric (TE) and transverse magnetic (TM) modes. Also, we demonstrated that by placing a thermo-optical element on one of the y-splitter arms, it is possible to switch the topological charge of the generated vortex from m = 1 to m = -1.

Post-irradiation effects in CMOS integrated circuits

International Nuclear Information System (INIS)

Zietlow, T.C.; Barnes, C.E.; Morse, T.C.; Grusynski, J.S.; Nakamura, K.; Amram, A.; Wilson, K.T.

1988-01-01

The post-irradiation response of CMOS integrated circuits from three vendors has been measured as a function of temperature and irradiation bias. The author's have found that a worst-case anneal temperature for rebound testing is highly process dependent. At an anneal temperature of 80 0 C, the timing parameters of a 16K SRAM from vendor A quickly saturate at maximum values, and display no further changes at this temperature. At higher temperature, evidence for the anneal of interface state charge is observed. Dynamic bias during irradiation results in the same saturation value for the timing parameters, but the anneal time required to reach this value is longer. CMOS/SOS integrated circuits (vendor B) were also examined, and showed similar behavior, except that the saturation value for the timing parameters was stable up to 105 0 C. After irradiation to 10 Mrad(Si), a 16K SRAM (vendor C) was annealed at 80 0 C. In contrast to the results from the vendor A SRAM, the access time decreased toward prerad values during the anneal. Another part irradiated in the same manner but annealed at room temperature showed a slight increase during the anneal

Universal discrete Fourier optics RF photonic integrated circuit architecture.

Science.gov (United States)

Hall, Trevor J; Hasan, Mehedi

2016-04-04

This paper describes a coherent electro-optic circuit architecture that generates a frequency comb consisting of N spatially separated orders using a generalised Mach-Zenhder interferometer (MZI) with its N × 1 combiner replaced by an optical N × N Discrete Fourier Transform (DFT). Advantage may be taken of the tight optical path-length control, component and circuit symmetries and emerging trimming algorithms offered by photonic integration in any platform that offers linear electro-optic phase modulation such as LiNbO3, silicon, III-V or hybrid technology. The circuit architecture subsumes all MZI-based RF photonic circuit architectures in the prior art given an appropriate choice of output port(s) and dimension N although the principal application envisaged is phase correlated subcarrier generation for all optical orthogonal frequency division multiplexing. A transfer matrix approach is used to model the operation of the architecture. The predictions of the model are validated by simulations performed using an industry standard software tool. Implementation is found to be practical.

Ultra-low power integrated circuit design circuits, systems, and applications

CERN Document Server

Li, Dongmei; Wang, Zhihua

2014-01-01

This book describes the design of CMOS circuits for ultra-low power consumption including analog, radio frequency (RF), and digital signal processing circuits (DSP). The book addresses issues from circuit and system design to production design, and applies the ultra-low power circuits described to systems for digital hearing aids and capsule endoscope devices. Provides a valuable introduction to ultra-low power circuit design, aimed at practicing design engineers; Describes all key building blocks of ultra-low power circuits, from a systems perspective; Applies circuits and systems described to real product examples such as hearing aids and capsule endoscopes.

RD53A Integrated Circuit Specifications

OpenAIRE

Garcia-Sciveres, Mauricio

2015-01-01

Specifications for the RD53 collaboration’s first engineering wafer run of an integrated circuit (IC) for hybrid pixel detector readout, called RD53A. RD53A is intended to demonstrate in a large format IC the suitability of the technology (including radiation tolerance), the stable low threshold operation, and the high hit and trigger rate capabilities, required for HL-LHC upgrades of ATLAS and CMS. The wafer scale production will permit the experiments to prototype bump bonding assembly with...

Analog Integrated Circuit Design for Spike Time Dependent Encoder and Reservoir in Reservoir Computing Processors

Science.gov (United States)

2018-01-01

HAS BEEN REVIEWED AND IS APPROVED FOR PUBLICATION IN ACCORDANCE WITH ASSIGNED DISTRIBUTION STATEMENT. FOR THE CHIEF ENGINEER : / S / / S...bridged high-performance computing, nanotechnology , and integrated circuits & systems. 15. SUBJECT TERMS neuromorphic computing, neuron design, spike...multidisciplinary effort encompassed high-performance computing, nanotechnology , integrated circuits, and integrated systems. The project’s architecture was

Prediction of ionizing radiation effects in integrated circuits using black-box models

International Nuclear Information System (INIS)

Williamson, P.W.

1976-10-01

A method is described which allows general black-box modelling of integrated circuits as distinct from the existing method of deriving the radiation induced response of the model from actual terminal measurements on the device during irradiation. Both digital and linear circuits are discussed. (author)

Accurate Models for Evaluating the Direct Conducted and Radiated Emissions from Integrated Circuits

Directory of Open Access Journals (Sweden)

Domenico Capriglione

2018-03-01

Full Text Available This paper deals with the electromagnetic compatibility (EMC issues related to the direct and radiated emissions from a high-speed integrated circuits (ICs. These emissions are evaluated here by means of circuital and electromagnetic models. As for the conducted emission, an equivalent circuit model is derived to describe the IC and the effect of its loads (package, printed circuit board, decaps, etc., based on the Integrated Circuit Emission Model template (ICEM. As for the radiated emission, an electromagnetic model is proposed, based on the superposition of the fields generated in the far field region by the loop currents flowing into the IC and the package pins. A custom experimental setup is designed for validating the models. Specifically, for the radiated emission measurement, a custom test board is designed and realized, able to highlight the contribution of the direct emission from the IC, usually hidden by the indirect emission coming from the printed circuit board. Measurements of the package currents and of the far-field emitted fields are carried out, providing a satisfactory agreement with the model predictions.

Radiation response of high speed CMOS integrated circuits

International Nuclear Information System (INIS)

Yue, H.; Davison, D.; Jennings, R.F.; Lothongkam, P.; Rinerson, D.; Wyland, D.

1987-01-01

This paper studies the total dose and dose rate radiation response of the FCT family of high speed CMOS integrated circuits. Data taken on the devices is used to establish the dominant failure modes, and this data is further analyzed using one-sided tolerance factors for normal distribution statistical analysis

Experimental Verification of Guided-Wave Lumped Circuits Using Waveguide Metamaterials

Science.gov (United States)

Li, Yue; Zhang, Zhijun

2018-04-01

Through the construction and characterization in microwave frequencies, we experimentally demonstrate our recently developed theory of waveguide lumped circuits, i.e., waveguide metatronics [Sci. Adv. 2, e1501790 (2016), 10.1126/sciadv.1501790], as a method to design subwavelength-scaled analog circuits. In the paradigm of waveguide metatronics, numbers of lumped inductors and capacitors are easily integrated functionally inside the waveguide, which is an irreplaceable transmission line in millimeter-wave and terahertz systems with the advantages of low radiation loss and low crosstalk. An example of multiple-ordered metatronic filters with layered structures is fabricated utilizing the technique of substrate integrated waveguides, which can be easily constructed by the printed-circuit-board process. The materials used in the construction are also typical microwave materials with positive permittivity, low loss, and negligible dispersion, imitating the plasmonic materials with negative permittivity in the optical domain. The results verify the theory of waveguide metatronics, which provides an efficient platform of functional lumped circuit design for guided-wave processing.

Digital integrated circuit design using Verilog and SystemVerilog

CERN Document Server

Mehler, Ronald W

2014-01-01

For those with a basic understanding of digital design, this book teaches the essential skills to design digital integrated circuits using Verilog and the relevant extensions of SystemVerilog. In addition to covering the syntax of Verilog and SystemVerilog, the author provides an appreciation of design challenges and solutions for producing working circuits. The book covers not only the syntax and limitations of HDL coding, but deals extensively with design problems such as partitioning and synchronization, helping you to produce designs that are not only logically correct, but will actually

Economic testing of large integrated switching circuits - a challenge to the test engineer

International Nuclear Information System (INIS)

Kreinberg, W.

1978-01-01

With reference to large integrated switching circuits, one can use an incoming standard programme test or the customer's switching circuits. The author describes the development of suitable, extensive and economical test programmes. (orig.) [de

Self-Patterning of Silica/Epoxy Nanocomposite Underfill by Tailored Hydrophilic-Superhydrophobic Surfaces for 3D Integrated Circuit (IC) Stacking.

Science.gov (United States)

Tuan, Chia-Chi; James, Nathan Pataki; Lin, Ziyin; Chen, Yun; Liu, Yan; Moon, Kyoung-Sik; Li, Zhuo; Wong, C P

2017-03-15

As microelectronics are trending toward smaller packages and integrated circuit (IC) stacks nowadays, underfill, the polymer composite filled in between the IC chip and the substrate, becomes increasingly important for interconnection reliability. However, traditional underfills cannot meet the requirements for low-profile and fine pitch in high density IC stacking packages. Post-applied underfills have difficulties in flowing into the small gaps between the chip and the substrate, while pre-applied underfills face filler entrapment at bond pads. In this report, we present a self-patterning underfilling technology that uses selective wetting of underfill on Cu bond pads and Si 3 N 4 passivation via surface energy engineering. This novel process, fully compatible with the conventional underfilling process, eliminates the issue of filler entrapment in typical pre-applied underfilling process, enabling high density and fine pitch IC die bonding.

Circuit engineering principles for construction of bipolar large-scale integrated circuit storage devices and very large-scale main memory

Science.gov (United States)

Neklyudov, A. A.; Savenkov, V. N.; Sergeyez, A. G.

1984-06-01

Memories are improved by increasing speed or the memory volume on a single chip. The most effective means for increasing speeds in bipolar memories are current control circuits with the lowest extraction times for a specific power consumption (1/4 pJ/bit). The control current circuitry involves multistage current switches and circuits accelerating transient processes in storage elements and links. Circuit principles for the design of bipolar memories with maximum speeds for an assigned minimum of circuit topology are analyzed. Two main classes of storage with current control are considered: the ECL type and super-integrated injection type storage with data capacities of N = 1/4 and N 4/16, respectively. The circuits reduce logic voltage differentials and the volumes of lexical and discharge buses and control circuit buses. The limiting speed is determined by the antiinterference requirements of the memory in storage and extraction modes.

Highly Uniform Carbon Nanotube Field-Effect Transistors and Medium Scale Integrated Circuits.

Science.gov (United States)

Chen, Bingyan; Zhang, Panpan; Ding, Li; Han, Jie; Qiu, Song; Li, Qingwen; Zhang, Zhiyong; Peng, Lian-Mao

2016-08-10

Top-gated p-type field-effect transistors (FETs) have been fabricated in batch based on carbon nanotube (CNT) network thin films prepared from CNT solution and present high yield and highly uniform performance with small threshold voltage distribution with standard deviation of 34 mV. According to the property of FETs, various logical and arithmetical gates, shifters, and d-latch circuits were designed and demonstrated with rail-to-rail output. In particular, a 4-bit adder consisting of 140 p-type CNT FETs was demonstrated with higher packing density and lower supply voltage than other published integrated circuits based on CNT films, which indicates that CNT based integrated circuits can reach to medium scale. In addition, a 2-bit multiplier has been realized for the first time. Benefitted from the high uniformity and suitable threshold voltage of CNT FETs, all of the fabricated circuits based on CNT FETs can be driven by a single voltage as small as 2 V.

Logistic Regression Modeling of Diminishing Manufacturing Sources for Integrated Circuits

National Research Council Canada - National Science Library

Gravier, Michael

1999-01-01

.... This thesis draws on available data from the electronics integrated circuit industry to attempt to assess whether statistical modeling offers a viable method for predicting the presence of DMSMS...

Experimental Study of WBFC method for testing electromagnetic immunity of integrated circuits

OpenAIRE

香川, 直己; カガワ, ナオキ; Naoki, KAGAWA

2004-01-01

The author made a workbench faraday cage, WBFC, in order to estimate performance of the WBFC method for the measurement of common mode noise immunity of integrated circuits. In this report, characteristics of the constructed workbench faraday cage and results of experimental study of effects of the common mode noise on a circuit board including an electronic device are shown. Selected DUT, LM324 is popular operational amplifier for electrical circuits in vehicles.

Design automation for integrated nonlinear logic circuits (Conference Presentation)

Science.gov (United States)

Van Vaerenbergh, Thomas; Pelc, Jason; Santori, Charles; Bose, Ranojoy; Kielpinski, Dave; Beausoleil, Raymond G.

2016-05-01

A key enabler of the IT revolution of the late 20th century was the development of electronic design automation (EDA) tools allowing engineers to manage the complexity of electronic circuits with transistor counts now reaching into the billions. Recently, we have been developing large-scale nonlinear photonic integrated logic circuits for next generation all-optical information processing. At this time a sufficiently powerful EDA-style software tool chain to design this type of complex circuits does not yet exist. Here we describe a hierarchical approach to automating the design and validation of photonic integrated circuits, which can scale to several orders of magnitude higher complexity than the state of the art. Most photonic integrated circuits developed today consist of a small number of components, and only limited hierarchy. For example, a simple photonic transceiver may contain on the order of 10 building-block components, consisting of grating couplers for photonic I/O, modulators, and signal splitters/combiners. Because this is relatively easy to lay out by hand (or simple script) existing photonic design tools have relatively little automation in comparison to electronics tools. But demonstrating all-optical logic will require significantly more complex photonic circuits containing up to 1,000 components, hence becoming infeasible to design manually. Our design framework is based off Python-based software from Luceda Photonics which provides an environment to describe components, simulate their behavior, and export design files (GDS) to foundries for fabrication. At a fundamental level, a photonic component is described as a parametric cell (PCell) similarly to electronics design. PCells are described by geometric characteristics of their layout. A critical part of the design framework is the implementation of PCells as Python objects. PCell objects can then use inheritance to simplify design, and hierarchical designs can be made by creating composite

Organic membrane photonic integrated circuits (OMPICs).

Science.gov (United States)

Amemiya, Tomohiro; Kanazawa, Toru; Hiratani, Takuo; Inoue, Daisuke; Gu, Zhichen; Yamasaki, Satoshi; Urakami, Tatsuhiro; Arai, Shigehisa

2017-08-07

We propose the concept of organic membrane photonic integrated circuits (OMPICs), which incorporate various functions needed for optical signal processing into a flexible organic membrane. We describe the structure of several devices used within the proposed OMPICs (e.g., transmission lines, I/O couplers, phase shifters, photodetectors, modulators), and theoretically investigate their characteristics. We then present a method of fabricating the photonic devices monolithically in an organic membrane and demonstrate the operation of transmission lines and I/O couplers, the most basic elements of OMPICs.

Micromachined high-performance RF passives in CMOS substrate

International Nuclear Information System (INIS)

Li, Xinxin; Ni, Zao; Gu, Lei; Wu, Zhengzheng; Yang, Chen

2016-01-01

This review systematically addresses the micromachining technologies used for the fabrication of high-performance radio-frequency (RF) passives that can be integrated into low-cost complementary metal-oxide semiconductor (CMOS)-grade (i.e. low-resistivity) silicon wafers. With the development of various kinds of post-CMOS-compatible microelectromechanical systems (MEMS) processes, 3D structural inductors/transformers, variable capacitors, tunable resonators and band-pass/low-pass filters can be compatibly integrated into active integrated circuits to form monolithic RF system-on-chips. By using MEMS processes, including substrate modifying/suspending and LIGA-like metal electroplating, both the highly lossy substrate effect and the resistive loss can be largely eliminated and depressed, thereby meeting the high-performance requirements of telecommunication applications. (topical review)

Mixed logic style adder circuit designed and fabricated using SOI substrate for irradiation-hardened experiment

Science.gov (United States)

Yuan, Shoucai; Liu, Yamei

2016-08-01

This paper proposed a rail to rail swing, mixed logic style 28-transistor 1-bit full adder circuit which is designed and fabricated using silicon-on-insulator (SOI) substrate with 90 nm gate length technology. The main goal of our design is space application where circuits may be damaged by outer space radiation; so the irradiation-hardened technique such as SOI structure should be used. The circuit's delay, power and power-delay product (PDP) of our proposed gate diffusion input (GDI)-based adder are HSPICE simulated and compared with other reported high-performance 1-bit adder. The GDI-based 1-bit adder has 21.61% improvement in delay and 18.85% improvement in PDP, over the reported 1-bit adder. However, its power dissipation is larger than that reported with 3.56% increased but is still comparable. The worst case performance of proposed 1-bit adder circuit is also seen to be less sensitive to variations in power supply voltage (VDD) and capacitance load (CL), over a wide range from 0.6 to 1.8 V and 0 to 200 fF, respectively. The proposed and reported 1-bit full adders are all layout designed and wafer fabricated with other circuits/systems together on one chip. The chip measurement and analysis has been done at VDD = 1.2 V, CL = 20 fF, and 200 MHz maximum input signal frequency with temperature of 300 K.

Diamond electro-optomechanical resonators integrated in nanophotonic circuits

Energy Technology Data Exchange (ETDEWEB)

Rath, P.; Ummethala, S.; Pernice, W. H. P., E-mail: wolfram.pernice@kit.edu [Institute of Nanotechnology, Karlsruhe Institute of Technology, 76344 Eggenstein-Leopoldshafen (Germany); Diewald, S. [Center for Functional Nanostructures, Karlsruhe Institute of Technology, 76131 Karlsruhe (Germany); Lewes-Malandrakis, G.; Brink, D.; Heidrich, N.; Nebel, C. [Fraunhofer Institute for Applied Solid State Physics, Tullastr. 72, 79108 Freiburg (Germany)

2014-12-22

Diamond integrated photonic devices are promising candidates for emerging applications in nanophotonics and quantum optics. Here, we demonstrate active modulation of diamond nanophotonic circuits by exploiting mechanical degrees of freedom in free-standing diamond electro-optomechanical resonators. We obtain high quality factors up to 9600, allowing us to read out the driven nanomechanical response with integrated optical interferometers with high sensitivity. We are able to excite higher order mechanical modes up to 115 MHz and observe the nanomechanical response also under ambient conditions.

Microwave integrated circuit mask design, using computer aided microfilm techniques

Energy Technology Data Exchange (ETDEWEB)

Reymond, J.M.; Batliwala, E.R.; Ajose, S.O.

1977-01-01

This paper examines the possibility of using a computer interfaced with a precision film C.R.T. information retrieval system, to produce photomasks suitable for the production of microwave integrated circuits.

A novel readout integrated circuit for ferroelectric FPA detector

Science.gov (United States)

Bai, Piji; Li, Lihua; Ji, Yulong; Zhang, Jia; Li, Min; Liang, Yan; Hu, Yanbo; Li, Songying

2017-11-01

Uncooled infrared detectors haves some advantages such as low cost light weight low power consumption, and superior reliability, compared with cryogenically cooled ones Ferroelectric uncooled focal plane array(FPA) are being developed for its AC response and its high reliability As a key part of the ferroelectric assembly the ROIC determines the performance of the assembly. A top-down design model for uncooled ferroelectric readout integrated circuit(ROIC) has been developed. Based on the optical thermal and electrical properties of the ferroelectric detector the RTIA readout integrated circuit is designed. The noise bandwidth of RTIA readout circuit has been developed and analyzed. A novel high gain amplifier, a high pass filter and a low pass filter circuits are designed on the ROIC. In order to improve the ferroelectric FPA package performance and decrease of package cost a temperature sensor is designed on the ROIC chip At last the novel RTIA ROIC is implemented on 0.6μm 2P3M CMOS silicon techniques. According to the experimental chip test results the temporal root mean square(RMS)noise voltage is about 1.4mV the sensitivity of the on chip temperature sensor is 0.6 mV/K from -40°C to 60°C the linearity performance of the ROIC chip is better than 99% Based on the 320×240 RTIA ROIC, a 320×240 infrared ferroelectric FPA is fabricated and tested. Test results shows that the 320×240 RTIA ROIC meets the demand of infrared ferroelectric FPA.

Study of the interaction between heavy ions and integrated circuits using a pulsed laser beam

International Nuclear Information System (INIS)

Lewis, D.; Fouillat, P.; Pouget, V.; Lapuyade, H.

2002-01-01

A new pulsed laser beam equipment dedicated to the characterization of integrated circuit is presented. Using ultra-short laser pulses is a convenient way to simulate experimentally the spatial environment of integrated circuits when interactions with heavy ions occur. This experimental set-up can be considered as a complementary tool for particle accelerators to evaluate the hardness assurance of integrated circuits for space applications. These particles generate temporally electrical disturbance called Single Event Effect (SEE). The theoretical approach of an equivalence between heavy ions and a laser pulses is discussed. The experimental set-up and some relevant operational methodologies are presented. Experimental results demonstrate that the induced electrical responses due to an heavy ion or a laser pulse are quite similar. Some sensitivity mappings of integrated circuits provided by this test bench illustrate the capabilities and the limitations of this laser-based technique. Contrary to the particle accelerators, it provides useful information concerning the spatial and temporal dependences of SEE mechanisms. (authors)

Integration of conducting polymer network in non-conductive polymer substrates

DEFF Research Database (Denmark)

Hansen, Thomas Steen; West, Keld; Hassager, Ole

2006-01-01

Anew method for integration ofconjugated, inherently conducting polymers into non-conductive polymer substrates has been developed. Alayer of the conducting polymer is polymerised by chemical oxidation, e.g. using Fe(ID) p-toluene sulfonate (ferri tosylate) followed by washing with a solvent which...... simultaneously removes residual and spent oxidant and at the same time dissolves the top layer of the polymer substrate. This results in an integration of the conducting polymer into the surface layers of the polymer substrate. Several combinations of conducting polymers and substrates have been tested...... absorption during sequential reactive ion etching has allowed for analysis of the PEDOT distribution within the surface layer of thePMMA substrate. The surface resistance ofthe conducting polymer layer remains low while the surface layer at the same time adapts some of the mechanical properties...

Review of Polynomial Chaos-Based Methods for Uncertainty Quantification in Modern Integrated Circuits

OpenAIRE

Arun Kaintura; Tom Dhaene; Domenico Spina

2018-01-01

Advances in manufacturing process technology are key ensembles for the production of integrated circuits in the sub-micrometer region. It is of paramount importance to assess the effects of tolerances in the manufacturing process on the performance of modern integrated circuits. The polynomial chaos expansion has emerged as a suitable alternative to standard Monte Carlo-based methods that are accurate, but computationally cumbersome. This paper provides an overview of the most recent developm...

Testing Fixture For Microwave Integrated Circuits

Science.gov (United States)

Romanofsky, Robert; Shalkhauser, Kurt

1989-01-01

Testing fixture facilitates radio-frequency characterization of microwave and millimeter-wave integrated circuits. Includes base onto which two cosine-tapered ridge waveguide-to-microstrip transitions fastened. Length and profile of taper determined analytically to provide maximum bandwidth and minimum insertion loss. Each cosine taper provides transformation from high impedance of waveguide to characteristic impedance of microstrip. Used in conjunction with automatic network analyzer to provide user with deembedded scattering parameters of device under test. Operates from 26.5 to 40.0 GHz, but operation extends to much higher frequencies.

Study of Ni Metallization in Macroporous Si Using Wet Chemistry for Radio Frequency Cross-Talk Isolation in Mixed Signal Integrated Circuits.

Science.gov (United States)

Zhang, Xi; Xu, Chengkun; Chong, Kyuchul; Tu, King-Ning; Xie, Ya-Hong

2011-05-25

A highly conductive moat or Faraday cage of through-the-wafer thickness in Si substrate was proposed to be effective in shielding electromagnetic interference thereby reducing radio frequency (RF) cross-talk in high performance mixed signal integrated circuits. Such a structure was realized by metallization of selected ultra-high-aspect-ratio macroporous regions that were electrochemically etched in p - Si substrates. The metallization process was conducted by means of wet chemistry in an alkaline aqueous solution containing Ni 2+ without reducing agent. It is found that at elevated temperature during immersion, Ni 2+ was rapidly reduced and deposited into macroporous Si and a conformal metallization of the macropore sidewalls was obtained in a way that the entire porous Si framework was converted to Ni. A conductive moat was as a result incorporated into p - Si substrate. The experimentally measured reduction of crosstalk in this structure is 5~18 dB at frequencies up to 35 GHz.

Study of Ni Metallization in Macroporous Si Using Wet Chemistry for Radio Frequency Cross-Talk Isolation in Mixed Signal Integrated Circuits

Directory of Open Access Journals (Sweden)

King-Ning Tu

2011-05-01

Full Text Available A highly conductive moat or Faraday cage of through-the-wafer thickness in Si substrate was proposed to be effective in shielding electromagnetic interference thereby reducing radio frequency (RF cross-talk in high performance mixed signal integrated circuits. Such a structure was realized by metallization of selected ultra-high-aspect-ratio macroporous regions that were electrochemically etched in p− Si substrates. The metallization process was conducted by means of wet chemistry in an alkaline aqueous solution containing Ni2+ without reducing agent. It is found that at elevated temperature during immersion, Ni2+ was rapidly reduced and deposited into macroporous Si and a conformal metallization of the macropore sidewalls was obtained in a way that the entire porous Si framework was converted to Ni. A conductive moat was as a result incorporated into p− Si substrate. The experimentally measured reduction of crosstalk in this structure is 5~18 dB at frequencies up to 35 GHz.

Study of Ni Metallization in Macroporous Si Using Wet Chemistry for Radio Frequency Cross-Talk Isolation in Mixed Signal Integrated Circuits

Science.gov (United States)

Zhang, Xi; Xu, Chengkun; Chong, Kyuchul; Tu, King-Ning; Xie, Ya-Hong

2011-01-01

A highly conductive moat or Faraday cage of through-the-wafer thickness in Si substrate was proposed to be effective in shielding electromagnetic interference thereby reducing radio frequency (RF) cross-talk in high performance mixed signal integrated circuits. Such a structure was realized by metallization of selected ultra-high-aspect-ratio macroporous regions that were electrochemically etched in p− Si substrates. The metallization process was conducted by means of wet chemistry in an alkaline aqueous solution containing Ni2+ without reducing agent. It is found that at elevated temperature during immersion, Ni2+ was rapidly reduced and deposited into macroporous Si and a conformal metallization of the macropore sidewalls was obtained in a way that the entire porous Si framework was converted to Ni. A conductive moat was as a result incorporated into p− Si substrate. The experimentally measured reduction of crosstalk in this structure is 5~18 dB at frequencies up to 35 GHz. PMID:28879960

Insulator photocurrents: Application to dose rate hardening of CMOS/SOI integrated circuits

International Nuclear Information System (INIS)

Dupont-Nivet, E.; Coiec, Y.M.; Flament, O.; Tinel, F.

1998-01-01

Irradiation of insulators with a pulse of high energy x-rays can induce photocurrents in the interconnections of integrated circuits. The authors present, here, a new method to measure and analyze this effect together with a simple model. They also demonstrate that these insulator photocurrents have to be taken into account to obtain high levels of dose-rate hardness with CMOS on SOI integrated circuits, especially flip-flops or memory blocks of ASICs. They show that it explains some of the upsets observed in a SRAM embedded in an ASIC

Free-Standing Organic Transistors and Circuits with Sub-Micron Thicknesses

Science.gov (United States)

Fukuda, Kenjiro; Sekine, Tomohito; Shiwaku, Rei; Morimoto, Takuya; Kumaki, Daisuke; Tokito, Shizuo

2016-01-01

The realization of wearable electronic devices with extremely thin and flexible form factors has been a major technological challenge. While substrates typically limit the thickness of thin-film electronic devices, they are usually necessary for their fabrication and functionality. Here we report on ultra-thin organic transistors and integrated circuits using device components whose substrates that have been removed. The fabricated organic circuits with total device thicknesses down to 350 nm have electrical performance levels close to those fabricated on conventional flexible substrates. Moreover, they exhibit excellent mechanical robustness, whereby their static and dynamic electrical characteristics do not change even under 50% compressive strain. Tests using systematically applied compressive strains reveal that these free-standing organic transistors possess anisotropic mechanical stability, and a strain model for a multilayer stack can be used to describe the strain in this sort of ultra-thin device. These results show the feasibility of ultimate-thin organic electronic devices using free-standing constructions. PMID:27278828

Design of Integrated Circuits Approaching Terahertz Frequencies

OpenAIRE

Yan, Lei; Johansen, Tom Keinicke

2013-01-01

In this thesis, monolithic microwave integrated circuits(MMICs) are presented for millimeter-wave and submillimeter-wave or terahertz(THz) applications. Millimeter-wave power generation from solid state devices is not only crucial for the emerging high data rate wireless communications but also important for driving THz signal sources. To meet the requirement of high output power, amplifiers based on InP double heterojunction bipolar transistor (DHBT) devices from the III-V Lab in Marcoussic,...

Fabrication-process-induced variations of Nb/Al/AlOx/Nb Josephson junctions in superconductor integrated circuits

International Nuclear Information System (INIS)

Tolpygo, Sergey K; Amparo, Denis

2010-01-01

Currently, superconductor digital integrated circuits fabricated at HYPRES, Inc. can operate at clock frequencies approaching 40 GHz. The circuits present multilayered structures containing tens of thousands of Nb/Al/AlO x /Nb Josephson junctions (JJs) of various sizes interconnected by four Nb wiring layers, resistors, and other circuit elements. In order to be fully operational, the integrated circuits should be fabricated such that the critical currents of the JJs are within the tight design margins and the proper relationships between the critical currents of JJs of different sizes are preserved. We present experimental data and discuss mechanisms of process-induced variations of the critical current and energy gap of Nb/Al/AlO x /Nb JJs in integrated circuits. We demonstrate that the Josephson critical current may depend on the type and area of circuit elements connected to the junction, on the circuit pattern, and on the step in the fabrication process at which the connection is made. In particular, we discuss the influence of (a) the junction base electrode connection to the ground plane, (b) the junction counter electrode connection to the ground plane, and (c) the counter electrode connection to the Ti/Au or Ti/Pd/Au contact pads by Nb wiring. We show that the process-induced changes of the properties of Nb/Al/AlO x /Nb junctions are caused by migration of impurity atoms (hydrogen) between the different layers comprising the integrated circuits.

A microfabricated fringing field capacitive pH sensor with an integrated readout circuit

International Nuclear Information System (INIS)

Arefin, Md Shamsul; Redoute, Jean-Michel; Rasit Yuce, Mehmet; Bulut Coskun, M.; Alan, Tuncay; Neild, Adrian

2014-01-01

This work presents a microfabricated fringe-field capacitive pH sensor using interdigitated electrodes and an integrated modulation-based readout circuit. The changes in capacitance of the sensor result from the permittivity changes due to pH variations and are converted to frequency shifts using a crossed-coupled voltage controlled oscillator readout circuit. The shift in resonant frequency of the readout circuit is 30.96 MHz for a change in pH of 1.0–5.0. The sensor can be used for the measurement of low pH levels, such as gastric acid, and can be integrated with electronic pills. The measurement results show high repeatability, low noise, and a stable output.

A microfabricated fringing field capacitive pH sensor with an integrated readout circuit

Energy Technology Data Exchange (ETDEWEB)

Arefin, Md Shamsul, E-mail: md.arefin@monash.edu; Redoute, Jean-Michel; Rasit Yuce, Mehmet [Electrical and Computer Systems Engineering, Monash University, Melbourne (Australia); Bulut Coskun, M.; Alan, Tuncay; Neild, Adrian [Mechanical and Aerospace Engineering, Monash University, Melbourne (Australia)

2014-06-02

This work presents a microfabricated fringe-field capacitive pH sensor using interdigitated electrodes and an integrated modulation-based readout circuit. The changes in capacitance of the sensor result from the permittivity changes due to pH variations and are converted to frequency shifts using a crossed-coupled voltage controlled oscillator readout circuit. The shift in resonant frequency of the readout circuit is 30.96 MHz for a change in pH of 1.0–5.0. The sensor can be used for the measurement of low pH levels, such as gastric acid, and can be integrated with electronic pills. The measurement results show high repeatability, low noise, and a stable output.

Modeling the cosmic-ray-induced soft-error rate in integrated circuits: An overview

International Nuclear Information System (INIS)

Srinivasan, G.R.

1996-01-01

This paper is an overview of the concepts and methodologies used to predict soft-error rates (SER) due to cosmic and high-energy particle radiation in integrated circuit chips. The paper emphasizes the need for the SER simulation using the actual chip circuit model which includes device, process, and technology parameters as opposed to using either the discrete device simulation or generic circuit simulation that is commonly employed in SER modeling. Concepts such as funneling, event-by-event simulation, nuclear history files, critical charge, and charge sharing are examined. Also discussed are the relative importance of elastic and inelastic nuclear collisions, rare event statistics, and device vs. circuit simulations. The semi-empirical methodologies used in the aerospace community to arrive at SERs [also referred to as single-event upset (SEU) rates] in integrated circuit chips are reviewed. This paper is one of four in this special issue relating to SER modeling. Together, they provide a comprehensive account of this modeling effort, which has resulted in a unique modeling tool called the Soft-Error Monte Carlo Model, or SEMM

Quantum dash based single section mode locked lasers for photonic integrated circuits.

Science.gov (United States)

Joshi, Siddharth; Calò, Cosimo; Chimot, Nicolas; Radziunas, Mindaugas; Arkhipov, Rostislav; Barbet, Sophie; Accard, Alain; Ramdane, Abderrahim; Lelarge, Francois

2014-05-05

We present the first demonstration of an InAs/InP Quantum Dash based single-section frequency comb generator designed for use in photonic integrated circuits (PICs). The laser cavity is closed using a specifically designed Bragg reflector without compromising the mode-locking performance of the self pulsating laser. This enables the integration of single-section mode-locked laser in photonic integrated circuits as on-chip frequency comb generators. We also investigate the relations between cavity modes in such a device and demonstrate how the dispersion of the complex mode frequencies induced by the Bragg grating implies a violation of the equi-distance between the adjacent mode frequencies and, therefore, forbids the locking of the modes in a classical Bragg Device. Finally we integrate such a Bragg Mirror based laser with Semiconductor Optical Amplifier (SOA) to demonstrate the monolithic integration of QDash based low phase noise sources in PICs.

On-chip synthesis of circularly polarized emission of light with integrated photonic circuits.

Science.gov (United States)

He, Li; Li, Mo

2014-05-01

The helicity of circularly polarized (CP) light plays an important role in the light-matter interaction in magnetic and quantum material systems. Exploiting CP light in integrated photonic circuits could lead to on-chip integration of novel optical helicity-dependent devices for applications ranging from spintronics to quantum optics. In this Letter, we demonstrate a silicon photonic circuit coupled with a 2D grating emitter operating at a telecom wavelength to synthesize vertically emitting, CP light from a quasi-TE waveguide mode. Handedness of the emitted circular polarized light can be thermally controlled with an integrated microheater. The compact device footprint enables a small beam diameter, which is desirable for large-scale integration.

75 FR 49524 - In the Matter of Certain Integrated Circuits, Chipsets, and Products Containing Same Including...

Science.gov (United States)

2010-08-13

... the United States after importation of certain integrated circuits, chipsets, and products containing... INTERNATIONAL TRADE COMMISSION [Investigation No. 337-TA-709] In the Matter of Certain Integrated Circuits, Chipsets, and Products Containing Same Including Televisions, Media Players, and Cameras; Notice...

76 FR 34101 - In the Matter of Certain Integrated Circuits, Chipsets, and Products Containing Same Including...

Science.gov (United States)

2011-06-10

... within the United States after importation of certain integrated circuits, chipsets, and products... INTERNATIONAL TRADE COMMISSION [Investigation No. 337-TA-709] In the Matter of Certain Integrated Circuits, Chipsets, and Products Containing Same Including Televisions, Media Players, and Cameras; Notice...

75 FR 65654 - In the Matter of: Certain Integrated Circuits, Chipsets, and Products Containing Same Including...

Science.gov (United States)

2010-10-26

... within the United States after importation of certain integrated circuits, chipsets, and products... INTERNATIONAL TRADE COMMISSION [Investigation No. 337-TA-709] In the Matter of: Certain Integrated Circuits, Chipsets, and Products Containing Same Including Televisions, Media Players, and Cameras; Notice...

Novel technique for reliability testing of silicon integrated circuits

NARCIS (Netherlands)

Le Minh, P.; Wallinga, Hans; Woerlee, P.H.; van den Berg, Albert; Holleman, J.

2001-01-01

We propose a simple, inexpensive technique with high resolution to identify the weak spots in integrated circuits by means of a non-destructive photochemical process in which photoresist is used as the photon detection tool. The experiment was done to localize the breakdown link of thin silicon

Integrated electrofluidic circuits: pressure sensing with analog and digital operation functionalities for microfluidics.

Science.gov (United States)

Wu, Chueh-Yu; Lu, Jau-Ching; Liu, Man-Chi; Tung, Yi-Chung

2012-10-21

Microfluidic technology plays an essential role in various lab on a chip devices due to its desired advantages. An automated microfluidic system integrated with actuators and sensors can further achieve better controllability. A number of microfluidic actuation schemes have been well developed. In contrast, most of the existing sensing methods still heavily rely on optical observations and external transducers, which have drawbacks including: costly instrumentation, professional operation, tedious interfacing, and difficulties of scaling up and further signal processing. This paper reports the concept of electrofluidic circuits - electrical circuits which are constructed using ionic liquid (IL)-filled fluidic channels. The developed electrofluidic circuits can be fabricated using a well-developed multi-layer soft lithography (MSL) process with polydimethylsiloxane (PDMS) microfluidic channels. Electrofluidic circuits allow seamless integration of pressure sensors with analog and digital operation functions into microfluidic systems and provide electrical readouts for further signal processing. In the experiments, the analog operation device is constructed based on electrofluidic Wheatstone bridge circuits with electrical outputs of the addition and subtraction results of the applied pressures. The digital operation (AND, OR, and XOR) devices are constructed using the electrofluidic pressure controlled switches, and output electrical signals of digital operations of the applied pressures. The experimental results demonstrate the designed functions for analog and digital operations of applied pressures are successfully achieved using the developed electrofluidic circuits, making them promising to develop integrated microfluidic systems with capabilities of precise pressure monitoring and further feedback control for advanced lab on a chip applications.

Ni-Cr thin film resistor fabrication for GaAs monolithic microwave integrated circuits

International Nuclear Information System (INIS)

Vinayak, Seema; Vyas, H.P.; Muraleedharan, K.; Vankar, V.D.

2006-01-01

Different Ni-Cr alloys were sputter-deposited on silicon nitride-coated GaAs substrates and covered with a spin-coated polyimide layer to develop thin film metal resistors for GaAs monolithic microwave integrated circuits (MMICs). The contact to the resistors was made through vias in the polyimide layer by sputter-deposited Ti/Au interconnect metal. The variation of contact resistance, sheet resistance (R S ) and temperature coefficient of resistance (TCR) of the Ni-Cr resistors with fabrication process parameters such as polyimide curing thermal cycles and surface treatment given to the wafer prior to interconnect metal deposition has been studied. The Ni-Cr thin film resistors exhibited lower R S and higher TCR compared to the as-deposited Ni-Cr film that was not subjected to thermal cycles involved in the MMIC fabrication process. The change in resistivity and TCR values of Ni-Cr films during the MMIC fabrication process was found to be dependent on the Ni-Cr alloy composition

Fully integrated carbon nanotube composite thin film strain sensors on flexible substrates for structural health monitoring

Science.gov (United States)

Burton, A. R.; Lynch, J. P.; Kurata, M.; Law, K. H.

2017-09-01

Multifunctional thin film materials have opened many opportunities for novel sensing strategies for structural health monitoring. While past work has established methods of optimizing multifunctional materials to exhibit sensing properties, comparatively less work has focused on their integration into fully functional sensing systems capable of being deployed in the field. This study focuses on the advancement of a scalable fabrication process for the integration of multifunctional thin films into a fully integrated sensing system. This is achieved through the development of an optimized fabrication process that can create a broad range of sensing systems using multifunctional materials. A layer-by-layer deposited multifunctional composite consisting of single walled carbon nanotubes (SWNT) in a polyvinyl alcohol and polysodium-4-styrene sulfonate matrix are incorporated with a lithography process to produce a fully integrated sensing system deposited on a flexible substrate. To illustrate the process, a strain sensing platform consisting of a patterned SWNT-composite thin film as a strain-sensitive element within an amplified Wheatstone bridge sensing circuit is presented. Strain sensing is selected because it presents many of the design and processing challenges that are core to patterning multifunctional thin film materials into sensing systems. Strain sensors fabricated on a flexible polyimide substrate are experimentally tested under cyclic loading using standard four-point bending coupons and a partial-scale steel frame assembly under lateral loading. The study reveals the material process is highly repeatable to produce fully integrated strain sensors with linearity and sensitivity exceeding 0.99 and 5 {{V}}/{ε }, respectively. The thin film strain sensors are robust and are capable of high strain measurements beyond 3000 μ {ε }.

A High-Temperature Piezoresistive Pressure Sensor with an Integrated Signal-Conditioning Circuit

Directory of Open Access Journals (Sweden)

Zong Yao

2016-06-01

Full Text Available This paper focuses on the design and fabrication of a high-temperature piezoresistive pressure sensor with an integrated signal-conditioning circuit, which consists of an encapsulated pressure-sensitive chip, a temperature compensation circuit and a signal-conditioning circuit. A silicon on insulation (SOI material and a standard MEMS process are used in the pressure-sensitive chip fabrication, and high-temperature electronic components are adopted in the temperature-compensation and signal-conditioning circuits. The entire pressure sensor achieves a hermetic seal and can be operated long-term in the range of −50 °C to 220 °C. Unlike traditional pressure sensor output voltage ranges (in the dozens to hundreds of millivolts, the output voltage of this sensor is from 0 V to 5 V, which can significantly improve the signal-to-noise ratio and measurement accuracy in practical applications of long-term transmission based on experimental verification. Furthermore, because this flexible sensor’s output voltage is adjustable, general follow-up pressure transmitter devices for voltage converters need not be used, which greatly reduces the cost of the test system. Thus, the proposed high-temperature piezoresistive pressure sensor with an integrated signal-conditioning circuit is expected to be highly applicable to pressure measurements in harsh environments.

Photonic crystal ring resonator based optical filters for photonic integrated circuits

International Nuclear Information System (INIS)

Robinson, S.

2014-01-01

In this paper, a two Dimensional (2D) Photonic Crystal Ring Resonator (PCRR) based optical Filters namely Add Drop Filter, Bandpass Filter, and Bandstop Filter are designed for Photonic Integrated Circuits (PICs). The normalized output response of the filters is obtained using 2D Finite Difference Time Domain (FDTD) method and the band diagram of periodic and non-periodic structure is attained by Plane Wave Expansion (PWE) method. The size of the device is minimized from a scale of few tens of millimeters to the order of micrometers. The overall size of the filters is around 11.4 μm × 11.4 μm which is highly suitable of photonic integrated circuits

Dual-function photonic integrated circuit for frequency octo-tupling or single-side-band modulation.

Science.gov (United States)

Hasan, Mehedi; Maldonado-Basilio, Ramón; Hall, Trevor J

2015-06-01

A dual-function photonic integrated circuit for microwave photonic applications is proposed. The circuit consists of four linear electro-optic phase modulators connected optically in parallel within a generalized Mach-Zehnder interferometer architecture. The photonic circuit is arranged to have two separate output ports. A first port provides frequency up-conversion of a microwave signal from the electrical to the optical domain; equivalently single-side-band modulation. A second port provides tunable millimeter wave carriers by frequency octo-tupling of an appropriate amplitude RF carrier. The circuit exploits the intrinsic relative phases between the ports of multi-mode interference couplers to provide substantially all the static optical phases needed. The operation of the proposed dual-function photonic integrated circuit is verified by computer simulations. The performance of the frequency octo-tupling and up-conversion functions is analyzed in terms of the electrical signal to harmonic distortion ratio and the optical single side band to unwanted harmonics ratio, respectively.

Heat sinking of highly integrated photonic and electronic circuits

NARCIS (Netherlands)

van Rijn, M.B.J.; Smit, M.K.

2017-01-01

Dense integration of photonic and electronic circuits poses high requirements on thermal management. In this paper we present analysis of temperature distributions in PICs in InP membranes on top of a BiCMOS chip, which contain hot spots in both the photonic and the electronic layer (lasers, optical

Plasma Etching for Failure Analysis of Integrated Circuit Packages

NARCIS (Netherlands)

Tang, J.; Schelen, J.B.J.; Beenakker, C.I.M.

2011-01-01

Plastic integrated circuit packages with copper wire bonds are decapsulated by a Microwave Induced Plasma system. Improvements on microwave coupling of the system are achieved by frequency tuning and antenna modification. Plasmas with a mixture of O2 and CF4 showed a high etching rate around 2

Split-cross-bridge resistor for testing for proper fabrication of integrated circuits

Science.gov (United States)

Buehler, M. G. (Inventor)

1985-01-01

An electrical testing structure and method is described whereby a test structure is fabricated on a large scale integrated circuit wafer along with the circuit components and has a van der Pauw cross resistor in conjunction with a bridge resistor and a split bridge resistor, the latter having two channels each a line width wide, corresponding to the line width of the wafer circuit components, and with the two channels separated by a space equal to the line spacing of the wafer circuit components. The testing structure has associated voltage and current contact pads arranged in a two by four array for conveniently passing currents through the test structure and measuring voltages at appropriate points to calculate the sheet resistance, line width, line spacing, and line pitch of the circuit components on the wafer electrically.

International Conference on Integrated Optical Circuit Engineering, 1st, Cambridge, MA, October 23-25, 1984, Proceedings

Science.gov (United States)

Ostrowsky, D. B.; Sriram, S.

Aspects of waveguide technology are explored, taking into account waveguide fabrication techniques in GaAs/GaAlAs, the design and fabrication of AlGaAs/GaAs phase couplers for optical integrated circuit applications, ion implanted GaAs integrated optics fabrication technology, a direct writing electron beam lithography based process for the realization of optoelectronic integrated circuits, and advances in the development of semiconductor integrated optical circuits for telecommunications. Other subjects examined are related to optical signal processing, optical switching, and questions of optical bistability and logic. Attention is given to acousto-optic techniques in integrated optics, acousto-optic Bragg diffraction in proton exchanged waveguides, optical threshold logic architectures for hybrid binary/residue processors, integrated optical modulation and switching, all-optic logic devices for waveguide optics, optoelectronic switching, high-speed photodetector switching, and a mechanical optical switch.

Design of a semi-custom integrated circuit for the SLAC SLC timing control system

International Nuclear Information System (INIS)

Linstadt, E.

1984-10-01

A semi-custom (gate array) integrated circuit has been designed for use in the SLAC Linear Collider timing and control system. The design process and SLAC's experiences during the phases of the design cycle are described. Issues concerning the partitioning of the design into semi-custom and standard components are discussed. Functional descriptions of the semi-custom integrated circuit and the timing module in which it is used are given

Integrated circuit amplifiers for multi-electrode intracortical recording.

Science.gov (United States)

Jochum, Thomas; Denison, Timothy; Wolf, Patrick

2009-02-01

Significant progress has been made in systems that interpret the electrical signals of the brain in order to control an actuator. One version of these systems senses neuronal extracellular action potentials with an array of up to 100 miniature probes inserted into the cortex. The impedance of each probe is high, so environmental electrical noise is readily coupled to the neuronal signal. To minimize this noise, an amplifier is placed close to each probe. Thus, the need has arisen for many amplifiers to be placed near the cortex. Commercially available integrated circuits do not satisfy the area, power and noise requirements of this application, so researchers have designed custom integrated-circuit amplifiers. This paper presents a comprehensive survey of the neural amplifiers described in publications prior to 2008. Methods to achieve high input impedance, low noise and a large time-constant high-pass filter are reviewed. A tutorial on the biological, electrochemical, mechanical and electromagnetic phenomena that influence amplifier design is provided. Areas for additional research, including sub-nanoampere electrolysis and chronic cortical heating, are discussed. Unresolved design concerns, including teraohm circuitry, electrical overstress and component failure, are identified.

Ka-band to L-band frequency down-conversion based on III-V-on-silicon photonic integrated circuits

Science.gov (United States)

Van Gasse, K.; Wang, Z.; Uvin, S.; De Deckere, B.; Mariën, J.; Thomassen, L.; Roelkens, G.

2017-12-01

In this work, we present the design, simulation and characterization of a frequency down-converter based on III-V-on-silicon photonic integrated circuit technology. We first demonstrate the concept using commercial discrete components, after which we demonstrate frequency conversion using an integrated mode-locked laser and integrated modulator. In our experiments, five channels in the Ka-band (27.5-30 GHz) with 500 MHz bandwidth are down-converted to the L-band (1.5 GHz). The breadboard demonstration shows a conversion efficiency of - 20 dB and a flat response over the 500 MHz bandwidth. The simulation of a fully integrated circuit indicates that a positive conversion gain can be obtained on a millimeter-sized photonic integrated circuit.

Continuous surveillance of reactor coolant circuit integrity

International Nuclear Information System (INIS)

1986-01-01

Continuous surveillance is important to assuring the integrity of a reactor coolant circuit. It can give pre-warning of structural degradation and indicate where off-line inspection should be focussed. These proceedings describe the state of development of several techniques which may be used. These involve measuring structural vibration, core neutron noise, acoustic emission from cracks, coolant leakage, or operating parameters such as coolant temperature and pressure. Twenty three papers have been abstracted and indexed separately for inclusion in the data base

Minimizing time for test in integrated circuit

OpenAIRE

Andonova, A. S.; Dimitrov, D. G.; Atanasova, N. G.

2004-01-01

The cost for testing integrated circuits represents a growing percentage of the total cost for their production. The former strictly depends on the length of the test session, and its reduction has been the target of many efforts in the past. This paper proposes a new method for reducing the test length by adopting a new architecture and exploiting an evolutionary optimisation algorithm. A prototype of the proposed approach was tested on 1SCAS standard benchmarks and theexperimental results s...

Tomography of integrated circuit interconnect with an electromigration void

Energy Technology Data Exchange (ETDEWEB)

Levine, Zachary H. [National Institute of Standards and Technology, Gaithersburg, Maryland 20899-8410 (United States); Rensselaer Polytechnic Institute, Troy, New York 12180-3590 (United States); Kalukin, Andrew R. [National Institute of Standards and Technology, Gaithersburg, Maryland 20899-8410 (United States); Kuhn, Markus [Intel Corporation RA1-329, 5200 Northeast Elam Young Parkway, Hillsboro, Oregon 74124 (United States); Frigo, Sean P. [Advanced Photon Source, Argonne National Laboratory, 9700 South Cass Avenue, Argonne, Illinois 60439 (United States); McNulty, Ian [Advanced Photon Source, Argonne National Laboratory, 9700 South Cass Avenue, Argonne, Illinois 60439 (United States); Retsch, Cornelia C. [Advanced Photon Source, Argonne National Laboratory, 9700 South Cass Avenue, Argonne, Illinois 60439 (United States); Wang, Yuxin [Advanced Photon Source, Argonne National Laboratory, 9700 South Cass Avenue, Argonne, Illinois 60439 (United States); Arp, Uwe [National Institute of Standards and Technology, Gaithersburg, Maryland 20899-8410 (United States); Lucatorto, Thomas B. [National Institute of Standards and Technology, Gaithersburg, Maryland 20899-8410 (United States); Ravel, Bruce D. [National Institute of Standards and Technology, Gaithersburg, Maryland 20899-8410 (United States)] (and others)

2000-05-01

An integrated circuit interconnect was subject to accelerated-life test conditions to induce an electromigration void. The silicon substrate was removed, leaving only the interconnect test structure encased in silica. We imaged the sample with 1750 eV photons using the 2-ID-B scanning transmission x-ray microscope at the Advanced Photon Source, a third-generation synchrotron facility. Fourteen views through the sample were obtained over a 170 degree sign range of angles (with a 40 degree sign gap) about a single rotation axis. Two sampled regions were selected for three-dimensional reconstruction: one of the ragged end of a wire depleted by the void, the other of the adjacent interlevel connection (or ''via''). We applied two reconstruction techniques: the simultaneous iterative reconstruction technique and a Bayesian reconstruction technique, the generalized Gaussian Markov random field method. The stated uncertainties are total, with one standard deviation, which resolved the sample to 200{+-}70 and 140{+-}30 nm, respectively. The tungsten via is distinguished from the aluminum wire by higher absorption. Within the void, the aluminum is entirely depleted from under the tungsten via. The reconstructed data show the applicability of this technique to three-dimensional imaging of buried defects in submicrometer structures relevant to the microelectronics industry. (c) 2000 American Institute of Physics.

The neural circuits of innate fear: detection, integration, action, and memorization

Science.gov (United States)

Silva, Bianca A.; Gross, Cornelius T.

2016-01-01

How fear is represented in the brain has generated a lot of research attention, not only because fear increases the chances for survival when appropriately expressed but also because it can lead to anxiety and stress-related disorders when inadequately processed. In this review, we summarize recent progress in the understanding of the neural circuits processing innate fear in rodents. We propose that these circuits are contained within three main functional units in the brain: a detection unit, responsible for gathering sensory information signaling the presence of a threat; an integration unit, responsible for incorporating the various sensory information and recruiting downstream effectors; and an output unit, in charge of initiating appropriate bodily and behavioral responses to the threatful stimulus. In parallel, the experience of innate fear also instructs a learning process leading to the memorization of the fearful event. Interestingly, while the detection, integration, and output units processing acute fear responses to different threats tend to be harbored in distinct brain circuits, memory encoding of these threats seems to rely on a shared learning system. PMID:27634145

Set of CAMAC modules on the base of large integrated circuits for an accelerator synchronization system

International Nuclear Information System (INIS)

Glejbman, Eh.M.; Pilyar, N.V.

1986-01-01

Parameters of functional moduli in the CAMAC standard developed for accelerator synchronization system are presented. They comprise BZN-8K and BZ-8K digital delay circuits, timing circuit and pulse selection circuit. In every module 3 large integral circuits of KR 580 VI53 type programmed timer, circuits of the given system bus bar interface with bus bars of crate, circuits of data recording control, 2 peripheric storage devices, circuits of initial regime setting, input and output shapers, circuits of installation and removal of blocking in channels are used

Radiation-Hard Complementary Integrated Circuits Based on Semiconducting Single-Walled Carbon Nanotubes.

Science.gov (United States)

McMorrow, Julian J; Cress, Cory D; Gaviria Rojas, William A; Geier, Michael L; Marks, Tobin J; Hersam, Mark C

2017-03-28

Increasingly complex demonstrations of integrated circuit elements based on semiconducting single-walled carbon nanotubes (SWCNTs) mark the maturation of this technology for use in next-generation electronics. In particular, organic materials have recently been leveraged as dopant and encapsulation layers to enable stable SWCNT-based rail-to-rail, low-power complementary metal-oxide-semiconductor (CMOS) logic circuits. To explore the limits of this technology in extreme environments, here we study total ionizing dose (TID) effects in enhancement-mode SWCNT-CMOS inverters that employ organic doping and encapsulation layers. Details of the evolution of the device transport properties are revealed by in situ and in operando measurements, identifying n-type transistors as the more TID-sensitive component of the CMOS system with over an order of magnitude larger degradation of the static power dissipation. To further improve device stability, radiation-hardening approaches are explored, resulting in the observation that SWNCT-CMOS circuits are TID-hard under dynamic bias operation. Overall, this work reveals conditions under which SWCNTs can be employed for radiation-hard integrated circuits, thus presenting significant potential for next-generation satellite and space applications.

Heterogeneous Monolithic Integration of Single-Crystal Organic Materials.

Science.gov (United States)

Park, Kyung Sun; Baek, Jangmi; Park, Yoonkyung; Lee, Lynn; Hyon, Jinho; Koo Lee, Yong-Eun; Shrestha, Nabeen K; Kang, Youngjong; Sung, Myung Mo

2017-02-01

Manufacturing high-performance organic electronic circuits requires the effective heterogeneous integration of different nanoscale organic materials with uniform morphology and high crystallinity in a desired arrangement. In particular, the development of high-performance organic electronic and optoelectronic devices relies on high-quality single crystals that show optimal intrinsic charge-transport properties and electrical performance. Moreover, the heterogeneous integration of organic materials on a single substrate in a monolithic way is highly demanded for the production of fundamental organic electronic components as well as complex integrated circuits. Many of the various methods that have been designed to pattern multiple heterogeneous organic materials on a substrate and the heterogeneous integration of organic single crystals with their crystal growth are described here. Critical issues that have been encountered in the development of high-performance organic integrated electronics are also addressed. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Temporal integration and 1/f power scaling in a circuit model of cerebellar interneurons.

Science.gov (United States)

Maex, Reinoud; Gutkin, Boris

2017-07-01

Inhibitory interneurons interconnected via electrical and chemical (GABA A receptor) synapses form extensive circuits in several brain regions. They are thought to be involved in timing and synchronization through fast feedforward control of principal neurons. Theoretical studies have shown, however, that whereas self-inhibition does indeed reduce response duration, lateral inhibition, in contrast, may generate slow response components through a process of gradual disinhibition. Here we simulated a circuit of interneurons (stellate and basket cells) of the molecular layer of the cerebellar cortex and observed circuit time constants that could rise, depending on parameter values, to >1 s. The integration time scaled both with the strength of inhibition, vanishing completely when inhibition was blocked, and with the average connection distance, which determined the balance between lateral and self-inhibition. Electrical synapses could further enhance the integration time by limiting heterogeneity among the interneurons and by introducing a slow capacitive current. The model can explain several observations, such as the slow time course of OFF-beam inhibition, the phase lag of interneurons during vestibular rotation, or the phase lead of Purkinje cells. Interestingly, the interneuron spike trains displayed power that scaled approximately as 1/ f at low frequencies. In conclusion, stellate and basket cells in cerebellar cortex, and interneuron circuits in general, may not only provide fast inhibition to principal cells but also act as temporal integrators that build a very short-term memory. NEW & NOTEWORTHY The most common function attributed to inhibitory interneurons is feedforward control of principal neurons. In many brain regions, however, the interneurons are densely interconnected via both chemical and electrical synapses but the function of this coupling is largely unknown. Based on large-scale simulations of an interneuron circuit of cerebellar cortex, we

On-chip multi-wavelength laser sources fabricated using generic photonic integration technology

NARCIS (Netherlands)

Latkowski, S.; Williams, K.A.; Bente, E.A.J.M.

Generic photonic integration technology platforms allow for design and fabrication of large complexity application specific photonic integrated circuits. Monolithic active-passive integration on indium phosphide substrate naturally enables a reliable co-integration of optical gain elements and

Clock generators for SOC processors circuits and architectures

CERN Document Server

Fahim, Amr

2004-01-01

This book explores the design of fully-integrated frequency synthesizers suitable for system-on-a-chip (SOC) processors. The text takes a more global design perspective in jointly examining the design space at the circuit level as well as at the architectural level. The comprehensive coverage includes summary chapters on circuit theory as well as feedback control theory relevant to the operation of phase locked loops (PLLs). On the circuit level, the discussion includes low-voltage analog design in deep submicron digital CMOS processes, effects of supply noise, substrate noise, as well device noise. On the architectural level, the discussion includes PLL analysis using continuous-time as well as discrete-time models, linear and nonlinear effects of PLL performance, and detailed analysis of locking behavior. The book provides numerous real world applications, as well as practical rules-of-thumb for modern designers to use at the system, architectural, as well as the circuit level.

Printed Graphene Derivative Circuits as Passive Electrical Filters.

Science.gov (United States)

Sinar, Dogan; Knopf, George K

2018-02-23

The objective of this study is to inkjet print resistor-capacitor ( RC ) low pass electrical filters, using a novel water-based cellulose graphene ink, and compare the voltage-frequency and transient behavior to equivalent circuits constructed from discrete passive components. The synthesized non-toxic graphene-carboxymethyl cellulose (G-CMC) ink is deposited on mechanically flexible polyimide substrates using a customized printer that dispenses functionalized aqueous solutions. The design of the printed first-order and second-order low-pass RC filters incorporate resistive traces and interdigitated capacitors. Low pass filter characteristics, such as time constant, cut-off frequency and roll-off rate, are determined for comparative analysis. Experiments demonstrate that for low frequency applications (graphene derivative circuits performed as well as the circuits constructed from discrete resistors and capacitors for both low pass filter and RC integrator applications. The impact of mechanical stress due to bending on the electrical performance of the flexible printed circuits is also investigated.

Printed Graphene Derivative Circuits as Passive Electrical Filters

Directory of Open Access Journals (Sweden)

Dogan Sinar

2018-02-01

Full Text Available The objective of this study is to inkjet print resistor-capacitor (RC low pass electrical filters, using a novel water-based cellulose graphene ink, and compare the voltage-frequency and transient behavior to equivalent circuits constructed from discrete passive components. The synthesized non-toxic graphene-carboxymethyl cellulose (G-CMC ink is deposited on mechanically flexible polyimide substrates using a customized printer that dispenses functionalized aqueous solutions. The design of the printed first-order and second-order low-pass RC filters incorporate resistive traces and interdigitated capacitors. Low pass filter characteristics, such as time constant, cut-off frequency and roll-off rate, are determined for comparative analysis. Experiments demonstrate that for low frequency applications (<100 kHz the printed graphene derivative circuits performed as well as the circuits constructed from discrete resistors and capacitors for both low pass filter and RC integrator applications. The impact of mechanical stress due to bending on the electrical performance of the flexible printed circuits is also investigated.

Monolithic Microwave Integrated Circuit (MMIC) technology for space communications applications

Science.gov (United States)

Connolly, Denis J.; Bhasin, Kul B.; Romanofsky, Robert R.

1987-01-01

Future communications satellites are likely to use gallium arsenide (GaAs) monolithic microwave integrated-circuit (MMIC) technology in most, if not all, communications payload subsystems. Multiple-scanning-beam antenna systems are expected to use GaAs MMIC's to increase functional capability, to reduce volume, weight, and cost, and to greatly improve system reliability. RF and IF matrix switch technology based on GaAs MMIC's is also being developed for these reasons. MMIC technology, including gigabit-rate GaAs digital integrated circuits, offers substantial advantages in power consumption and weight over silicon technologies for high-throughput, on-board baseband processor systems. For the more distant future pseudomorphic indium gallium arsenide (InGaAs) and other advanced III-V materials offer the possibility of MMIC subsystems well up into the millimeter wavelength region. All of these technology elements are in NASA's MMIC program. Their status is reviewed.

Highly focused ion beams in integrated circuit testing

International Nuclear Information System (INIS)

Horn, K.M.; Dodd, P.E.; Doyle, B.L.

1996-01-01

The nuclear microprobe has proven to be a useful tool in radiation testing of integrated circuits. This paper reviews single event upset (SEU) and ion beam induced charge collection (IBICC) imaging techniques, with special attention to damage-dependent effects. Comparisons of IBICC measurements with three-dimensional charge transport simulations of charge collection are then presented for isolated p-channel field effect transistors under conducting and non-conducting bias conditions

LSI microprocessor circuit families based on integrated injection logic. Mikroprotsessornyye komplekty bis na osnove integral'noy inzhektsionnoy logiki

Energy Technology Data Exchange (ETDEWEB)

Borisov, V.S.; Vlasov, F.S.; Kaloshkin, E.P.; Serzhanovich, D.S.; Sukhoparov, A.I.

1984-01-01

Progress in developing microprocessor computer hardware is based on progress and improvement in systems engineering, circuit engineering and manufacturing process methods of design and development of large-scale integrated circuits (BIS). Development of these methods with widespread use of computer-aided design (CAD) systems has allowed developing 4- and 8-bit microprocessor families (MPK) of LSI circuits based on integrated injection logic (I/sup 2/L), characterized by relatively high speed and low dissipated power. The emergence of LSI and VLSI microprocessor circuits required computer system developers to make changes to theory and practice of computer system design. Progress in technology upset the established relation between hardware and software component development costs in systems being designed. A characteristic feature of using LSI circuits is also the necessity of building devices from standard modules with large functional complexity. The existing directions of forming compositions of LSI microprocessor families allow the system developer to choose a particular methodology of design, proceeding from the efficiency function and field of application of the system being designed. The efficiency of using microprocessor families is largely governed by the user's understanding in depth of the structure of LSI microprocessor family circuits and the features of using them to implement a broad class of computer devices and modules being developed. This book is devoted to solving this problem.

Integrated Circuit Electromagnetic Immunity Handbook

Science.gov (United States)

Sketoe, J. G.

2000-08-01

This handbook presents the results of the Boeing Company effort for NASA under contract NAS8-98217. Immunity level data for certain integrated circuit parts are discussed herein, along with analytical techniques for applying the data to electronics systems. This handbook is built heavily on the one produced in the seventies by McDonnell Douglas Astronautics Company (MDAC, MDC Report E1929 of 1 August 1978, entitled Integrated Circuit Electromagnetic Susceptibility Handbook, known commonly as the ICES Handbook, which has served countless systems designers for over 20 years). Sections 2 and 3 supplement the device susceptibility data presented in section 4 by presenting information on related material required to use the IC susceptibility information. Section 2 concerns itself with electromagnetic susceptibility analysis and serves as a guide in using the information contained in the rest of the handbook. A suggested system hardening requirements is presented in this chapter. Section 3 briefly discusses coupling and shielding considerations. For conservatism and simplicity, a worst case approach is advocated to determine the maximum amount of RF power picked up from a given field. This handbook expands the scope of the immunity data in this Handbook is to of 10 MHz to 10 GHz. However, the analytical techniques provided are applicable to much higher frequencies as well. It is expected however, that the upper frequency limit of concern is near 10 GHz. This is due to two factors; the pickup of microwave energy on system cables and wiring falls off as the square of the wavelength, and component response falls off at a rapid rate due to the effects of parasitic shunt paths for the RF energy. It should be noted also that the pickup on wires and cables does not approach infinity as the frequency decreases (as would be expected by extrapolating the square law dependence of the high frequency roll-off to lower frequencies) but levels off due to mismatch effects.

A Two-Layer Gene Circuit for Decoupling Cell Growth from Metabolite Production.

Science.gov (United States)

Lo, Tat-Ming; Chng, Si Hui; Teo, Wei Suong; Cho, Han-Saem; Chang, Matthew Wook

2016-08-01

We present a synthetic gene circuit for decoupling cell growth from metabolite production through autonomous regulation of enzymatic pathways by integrated modules that sense nutrient and substrate. The two-layer circuit allows Escherichia coli to selectively utilize target substrates in a mixed pool; channel metabolic resources to growth by delaying enzymatic conversion until nutrient depletion; and activate, terminate, and re-activate conversion upon substrate availability. We developed two versions of controller, both of which have glucose nutrient sensors but differ in their substrate-sensing modules. One controller is specific for hydroxycinnamic acid and the other for oleic acid. Our hydroxycinnamic acid controller lowered metabolic stress 2-fold and increased the growth rate 2-fold and productivity 5-fold, whereas our oleic acid controller lowered metabolic stress 2-fold and increased the growth rate 1.3-fold and productivity 2.4-fold. These results demonstrate the potential for engineering strategies that decouple growth and production to make bio-based production more economical and sustainable. Copyright © 2016 The Authors. Published by Elsevier Inc. All rights reserved.

Multi-format all-optical processing based on a large-scale, hybridly integrated photonic circuit.

Science.gov (United States)

Bougioukos, M; Kouloumentas, Ch; Spyropoulou, M; Giannoulis, G; Kalavrouziotis, D; Maziotis, A; Bakopoulos, P; Harmon, R; Rogers, D; Harrison, J; Poustie, A; Maxwell, G; Avramopoulos, H

2011-06-06

We investigate through numerical studies and experiments the performance of a large scale, silica-on-silicon photonic integrated circuit for multi-format regeneration and wavelength-conversion. The circuit encompasses a monolithically integrated array of four SOAs inside two parallel Mach-Zehnder structures, four delay interferometers and a large number of silica waveguides and couplers. Exploiting phase-incoherent techniques, the circuit is capable of processing OOK signals at variable bit rates, DPSK signals at 22 or 44 Gb/s and DQPSK signals at 44 Gbaud. Simulation studies reveal the wavelength-conversion potential of the circuit with enhanced regenerative capabilities for OOK and DPSK modulation formats and acceptable quality degradation for DQPSK format. Regeneration of 22 Gb/s OOK signals with amplified spontaneous emission (ASE) noise and DPSK data signals degraded with amplitude, phase and ASE noise is experimentally validated demonstrating a power penalty improvement up to 1.5 dB.

Design, Fabrication and Integration of a NaK-Cooled Circuit

International Nuclear Information System (INIS)

Garber, Anne; Godfroy, Thomas

2006-01-01

The Early Flight Fission Test Facilities (EFF-TF) team has been tasked by the NASA Marshall Space Flight Center Nuclear Systems Office to design, fabricate, and test an actively pumped alkali metal flow circuit. The system, which was originally designed for use with a eutectic mixture of sodium potassium (NaK), was redesigned for use with lithium. Due to a shift in focus, it is once again being prepared for use with NaK. Changes made to the actively pumped, high temperature circuit include the replacement of the expansion reservoir, addition of remotely operated valves, and modification of the support table. Basic circuit components include: reactor segment, NaK to gas heat exchanger, electromagnetic (EM) liquid metal pump, load/drain reservoir, expansion reservoir, instrumentation, and a spill reservoir. A 37-pin partial-array core (pin and flow path dimensions are the same as those in a full design) was selected for fabrication and test. This paper summarizes the integration and preparations for the fill of the pumped NaK circuit. (authors)

Modular integration of electronics and microfluidic systems using flexible printed circuit boards.

Science.gov (United States)

Wu, Amy; Wang, Lisen; Jensen, Erik; Mathies, Richard; Boser, Bernhard

2010-02-21

Microfluidic systems offer an attractive alternative to conventional wet chemical methods with benefits including reduced sample and reagent volumes, shorter reaction times, high-throughput, automation, and low cost. However, most present microfluidic systems rely on external means to analyze reaction products. This substantially adds to the size, complexity, and cost of the overall system. Electronic detection based on sub-millimetre size integrated circuits (ICs) has been demonstrated for a wide range of targets including nucleic and amino acids, but deployment of this technology to date has been limited due to the lack of a flexible process to integrate these chips within microfluidic devices. This paper presents a modular and inexpensive process to integrate ICs with microfluidic systems based on standard printed circuit board (PCB) technology to assemble the independently designed microfluidic and electronic components. The integrated system can accommodate multiple chips of different sizes bonded to glass or PDMS microfluidic systems. Since IC chips and flex PCB manufacturing and assembly are industry standards with low cost, the integrated system is economical for both laboratory and point-of-care settings.

Arbitrary modeling of TSVs for 3D integrated circuits

CERN Document Server

Salah, Khaled; El-Rouby, Alaa

2014-01-01

This book presents a wide-band and technology independent, SPICE-compatible RLC model for through-silicon vias (TSVs) in 3D integrated circuits. This model accounts for a variety of effects, including skin effect, depletion capacitance and nearby contact effects. Readers will benefit from in-depth coverage of concepts and technology such as 3D integration, Macro modeling, dimensional analysis and compact modeling, as well as closed form equations for the through silicon via parasitics. Concepts covered are demonstrated by using TSVs in applications such as a spiral inductor?and inductive-based

Integrated Design Validation: Combining Simulation and Formal Verification for Digital Integrated Circuits

Directory of Open Access Journals (Sweden)

Lun Li

2006-04-01

Full Text Available The correct design of complex hardware continues to challenge engineers. Bugs in a design that are not uncovered in early design stages can be extremely expensive. Simulation is a predominantly used tool to validate a design in industry. Formal verification overcomes the weakness of exhaustive simulation by applying mathematical methodologies to validate a design. The work described here focuses upon a technique that integrates the best characteristics of both simulation and formal verification methods to provide an effective design validation tool, referred as Integrated Design Validation (IDV. The novelty in this approach consists of three components, circuit complexity analysis, partitioning based on design hierarchy, and coverage analysis. The circuit complexity analyzer and partitioning decompose a large design into sub-components and feed sub-components to different verification and/or simulation tools based upon known existing strengths of modern verification and simulation tools. The coverage analysis unit computes the coverage of design validation and improves the coverage by further partitioning. Various simulation and verification tools comprising IDV are evaluated and an example is used to illustrate the overall validation process. The overall process successfully validates the example to a high coverage rate within a short time. The experimental result shows that our approach is a very promising design validation method.

Development of pixel readout integrated circuits for extreme rate and radiation

CERN Document Server

Garcia-Sciveres, M; CERN. Geneva. The LHC experiments Committee; LHCC

2013-01-01

Letter of Intent for RD Collaboration Proposal focused on development of a next generation pixel readout integrated circuits needed for high luminosity LHC detector upgrades. Brings together ATLAS and CMS pixel chip design communities.

Capillary Self-Alignment of Microchips on Soft Substrates

Directory of Open Access Journals (Sweden)

Bo Chang

2016-03-01

Full Text Available Soft micro devices and stretchable electronics have attracted great interest for their potential applications in sensory skins and wearable bio-integrated devices. One of the most important steps in building printed circuits is the alignment of assembled micro objects. Previously, the capillary self-alignment of microchips driven by surface tension effects has been shown to be able to achieve high-throughput and high-precision in the integration of micro parts on rigid hydrophilic/superhydrophobic patterned surfaces. In this paper, the self-alignment of microchips on a patterned soft and stretchable substrate, which consists of hydrophilic pads surrounded by a superhydrophobic polydimethylsiloxane (PDMS background, is demonstrated for the first time. A simple process has been developed for making superhydrophobic soft surface by replicating nanostructures of black silicon onto a PDMS surface. Different kinds of PDMS have been investigated, and the parameters for fabricating superhydrophobic PDMS have been optimized. A self-alignment strategy has been proposed that can result in reliable self-alignment on a soft PDMS substrate. Our results show that capillary self-alignment has great potential for building soft printed circuits.

Silicon photonic integrated circuits with electrically programmable non-volatile memory functions.

Science.gov (United States)

Song, J-F; Lim, A E-J; Luo, X-S; Fang, Q; Li, C; Jia, L X; Tu, X-G; Huang, Y; Zhou, H-F; Liow, T-Y; Lo, G-Q

2016-09-19

Conventional silicon photonic integrated circuits do not normally possess memory functions, which require on-chip power in order to maintain circuit states in tuned or field-configured switching routes. In this context, we present an electrically programmable add/drop microring resonator with a wavelength shift of 426 pm between the ON/OFF states. Electrical pulses are used to control the choice of the state. Our experimental results show a wavelength shift of 2.8 pm/ms and a light intensity variation of ~0.12 dB/ms for a fixed wavelength in the OFF state. Theoretically, our device can accommodate up to 65 states of multi-level memory functions. Such memory functions can be integrated into wavelength division mutiplexing (WDM) filters and applied to optical routers and computing architectures fulfilling large data downloading demands.

Integrated Circuit-Based Biofabrication with Common Biomaterials for Probing Cellular Biomechanics.

Science.gov (United States)

Sung, Chun-Yen; Yang, Chung-Yao; Yeh, J Andrew; Cheng, Chao-Min

2016-02-01

Recent advances in bioengineering have enabled the development of biomedical tools with modifiable surface features (small-scale architecture) to mimic extracellular matrices and aid in the development of well-controlled platforms that allow for the application of mechanical stimulation for studying cellular biomechanics. An overview of recent developments in common biomaterials that can be manufactured using integrated circuit-based biofabrication is presented. Integrated circuit-based biofabrication possesses advantages including mass and diverse production capacities for fabricating in vitro biomedical devices. This review highlights the use of common biomaterials that have been most frequently used to study cellular biomechanics. In addition, the influence of various small-scale characteristics on common biomaterial surfaces for a range of different cell types is discussed. Copyright © 2015 Elsevier Ltd. All rights reserved.

Highly integrated optical phased arrays: photonic integrated circuits for optical beam shaping and beam steering

Directory of Open Access Journals (Sweden)

Heck Martijn J.R.

2016-06-01

Full Text Available Technologies for efficient generation and fast scanning of narrow free-space laser beams find major applications in three-dimensional (3D imaging and mapping, like Lidar for remote sensing and navigation, and secure free-space optical communications. The ultimate goal for such a system is to reduce its size, weight, and power consumption, so that it can be mounted on, e.g. drones and autonomous cars. Moreover, beam scanning should ideally be done at video frame rates, something that is beyond the capabilities of current opto-mechanical systems. Photonic integrated circuit (PIC technology holds the promise of achieving low-cost, compact, robust and energy-efficient complex optical systems. PICs integrate, for example, lasers, modulators, detectors, and filters on a single piece of semiconductor, typically silicon or indium phosphide, much like electronic integrated circuits. This technology is maturing fast, driven by high-bandwidth communications applications, and mature fabrication facilities. State-of-the-art commercial PICs integrate hundreds of elements, and the integration of thousands of elements has been shown in the laboratory. Over the last few years, there has been a considerable research effort to integrate beam steering systems on a PIC, and various beam steering demonstrators based on optical phased arrays have been realized. Arrays of up to thousands of coherent emitters, including their phase and amplitude control, have been integrated, and various applications have been explored. In this review paper, I will present an overview of the state of the art of this technology and its opportunities, illustrated by recent breakthroughs.

Highly integrated optical phased arrays: photonic integrated circuits for optical beam shaping and beam steering

Science.gov (United States)

Heck, Martijn J. R.

2017-01-01

Technologies for efficient generation and fast scanning of narrow free-space laser beams find major applications in three-dimensional (3D) imaging and mapping, like Lidar for remote sensing and navigation, and secure free-space optical communications. The ultimate goal for such a system is to reduce its size, weight, and power consumption, so that it can be mounted on, e.g. drones and autonomous cars. Moreover, beam scanning should ideally be done at video frame rates, something that is beyond the capabilities of current opto-mechanical systems. Photonic integrated circuit (PIC) technology holds the promise of achieving low-cost, compact, robust and energy-efficient complex optical systems. PICs integrate, for example, lasers, modulators, detectors, and filters on a single piece of semiconductor, typically silicon or indium phosphide, much like electronic integrated circuits. This technology is maturing fast, driven by high-bandwidth communications applications, and mature fabrication facilities. State-of-the-art commercial PICs integrate hundreds of elements, and the integration of thousands of elements has been shown in the laboratory. Over the last few years, there has been a considerable research effort to integrate beam steering systems on a PIC, and various beam steering demonstrators based on optical phased arrays have been realized. Arrays of up to thousands of coherent emitters, including their phase and amplitude control, have been integrated, and various applications have been explored. In this review paper, I will present an overview of the state of the art of this technology and its opportunities, illustrated by recent breakthroughs.

High-dimensional quantum key distribution based on multicore fiber using silicon photonic integrated circuits

DEFF Research Database (Denmark)

Ding, Yunhong; Bacco, Davide; Dalgaard, Kjeld

2017-01-01

is intrinsically limited to 1 bit/photon. Here we propose and experimentally demonstrate, for the first time, a high-dimensional quantum key distribution protocol based on space division multiplexing in multicore fiber using silicon photonic integrated lightwave circuits. We successfully realized three mutually......-dimensional quantum states, and enables breaking the information efficiency limit of traditional quantum key distribution protocols. In addition, the silicon photonic circuits used in our work integrate variable optical attenuators, highly efficient multicore fiber couplers, and Mach-Zehnder interferometers, enabling...

III-nitride Photonic Integrated Circuit: Multi-section GaN Laser Diodes for Smart Lighting and Visible Light Communication

KAUST Repository

Shen, Chao

2017-04-01

The past decade witnessed the rapid development of III-nitride light-emitting diodes (LEDs) and laser diodes (LDs), for smart lighting, visible-light communication (VLC), optical storage, and internet-of-things. Recent studies suggested that the GaN-based LDs, which is free from efficiency droop, outperform LEDs as a viable high-power light source. Conventionally, the InGaN-based LDs are grown on polar, c-plane GaN substrates. However, a relatively low differential gain limited the device performance due to a significant polarization field in the active region. Therefore, the LDs grown on nonpolar m-plane and semipolar (2021)-plane GaN substrates are posed to deliver high-efficiency owing to the entirely or partially eliminated polarization field. To date, the smart lighting and VLC functionalities have been demonstrated based on discrete devices, such as LDs, transverse-transmission modulators, and waveguide photodetectors. The integration of III-nitride photonic components, including the light emitter, modulator, absorber, amplifier, and photodetector, towards the realization of III-nitride photonic integrated circuit (PIC) offers the advantages of small-footprint, high-speed, and low power consumption, which has yet to be investigated. This dissertation presents the design, fabrication, and characterization of the multi-section InGaN laser diodes with integrated functionalities on semipolar (2021)-plane GaN substrates for enabling such photonic integration. The blue-emitting integrated waveguide modulator-laser diode (IWM-LD) exhibits a high modulation efficiency of 2.68 dB/V. A large extinction ratio of 11.3 dB is measured in the violet-emitting IWM-LD. Utilizing an integrated absorber, a high optical power (250mW), droop-free, speckle-free, and large modulation bandwidth (560MHz) blue-emitting superluminescent diode is reported. An integrated short-wavelength semiconductor optical amplifier with the laser diode at ~404 nm is demonstrated with a large gain of 5

Vapor-solid-solid grown Ge nanowires at integrated circuit compatible temperature by molecular beam epitaxy

Science.gov (United States)

Zhu, Zhongyunshen; Song, Yuxin; Zhang, Zhenpu; Sun, Hao; Han, Yi; Li, Yaoyao; Zhang, Liyao; Xue, Zhongying; Di, Zengfeng; Wang, Shumin

2017-09-01

We demonstrate Au-assisted vapor-solid-solid (VSS) growth of Ge nanowires (NWs) by molecular beam epitaxy at the substrate temperature of ˜180 °C, which is compatible with the temperature window for Si-based integrated circuit. Low temperature grown Ge NWs hold a smaller size, similar uniformity, and better fit with Au tips in diameter, in contrast to Ge NWs grown at around or above the eutectic temperature of Au-Ge alloy in the vapor-liquid-solid (VLS) growth. Six ⟨110⟩ growth orientations were observed on Ge (110) by the VSS growth at ˜180 °C, differing from only one vertical growth direction of Ge NWs by the VLS growth at a high temperature. The evolution of NWs dimension and morphology from the VLS growth to the VSS growth is qualitatively explained by analyzing the mechanism of the two growth modes.

Prolonged 500 C Operation of 100+ Transistor Silicon Carbide Integrated Circuits

Science.gov (United States)

Spry, David J.; Neudeck, Philip G.; Lukco, Dorothy; Chen, Liangyu; Krasowski, Michael J.; Prokop, Norman F.; Chang, Carl W.; Beheim, Glenn M.

2017-01-01

This report describes more than 5000 hours of successful 500 C operation of semiconductor integrated circuits (ICs) with more than 100 transistors. Multiple packaged chips with two different 4H-SiC junction field effect transistor (JFET) technology demonstrator circuits have surpassed thousands of hours of oven-testing at 500 C. After 100 hours of 500 C burn-in, the circuits (except for 2 failures) exhibit less than 10 change in output characteristics for the remainder of 500C testing. We also describe the observation of important differences in IC materials durability when subjected to the first nine constituents of Venus-surface atmosphere at 9.4 MPa and 460C in comparison to what is observed for Earth-atmosphere oven testing at 500 C.

Study of Piezoelectric Vibration Energy Harvester with non-linear conditioning circuit using an integrated model

Science.gov (United States)

Manzoor, Ali; Rafique, Sajid; Usman Iftikhar, Muhammad; Mahmood Ul Hassan, Khalid; Nasir, Ali

2017-08-01

Piezoelectric vibration energy harvester (PVEH) consists of a cantilever bimorph with piezoelectric layers pasted on its top and bottom, which can harvest power from vibrations and feed to low power wireless sensor nodes through some power conditioning circuit. In this paper, a non-linear conditioning circuit, consisting of a full-bridge rectifier followed by a buck-boost converter, is employed to investigate the issues of electrical side of the energy harvesting system. An integrated mathematical model of complete electromechanical system has been developed. Previously, researchers have studied PVEH with sophisticated piezo-beam models but employed simplistic linear circuits, such as resistor, as electrical load. In contrast, other researchers have worked on more complex non-linear circuits but with over-simplified piezo-beam models. Such models neglect different aspects of the system which result from complex interactions of its electrical and mechanical subsystems. In this work, authors have integrated the distributed parameter-based model of piezo-beam presented in literature with a real world non-linear electrical load. Then, the developed integrated model is employed to analyse the stability of complete energy harvesting system. This work provides a more realistic and useful electromechanical model having realistic non-linear electrical load unlike the simplistic linear circuit elements employed by many researchers.

Sequential circuit design for radiation hardened multiple voltage integrated circuits

Science.gov (United States)

Clark, Lawrence T [Phoenix, AZ; McIver, III, John K.

2009-11-24

The present invention includes a radiation hardened sequential circuit, such as a bistable circuit, flip-flop or other suitable design that presents substantial immunity to ionizing radiation while simultaneously maintaining a low operating voltage. In one embodiment, the circuit includes a plurality of logic elements that operate on relatively low voltage, and a master and slave latches each having storage elements that operate on a relatively high voltage.

Using NCAP to predict RFI effects in linear bipolar integrated circuits

Science.gov (United States)

Fang, T.-F.; Whalen, J. J.; Chen, G. K. C.

1980-11-01

Applications of the Nonlinear Circuit Analysis Program (NCAP) to calculate RFI effects in electronic circuits containing discrete semiconductor devices have been reported upon previously. The objective of this paper is to demonstrate that the computer program NCAP also can be used to calcuate RFI effects in linear bipolar integrated circuits (IC's). The IC's reported upon are the microA741 operational amplifier (op amp) which is one of the most widely used IC's, and a differential pair which is a basic building block in many linear IC's. The microA741 op amp was used as the active component in a unity-gain buffer amplifier. The differential pair was used in a broad-band cascode amplifier circuit. The computer program NCAP was used to predict how amplitude-modulated RF signals are demodulated in the IC's to cause undesired low-frequency responses. The predicted and measured results for radio frequencies in the 0.050-60-MHz range are in good agreement.

Disposable photonic integrated circuits for evanescent wave sensors by ultra-high volume roll-to-roll method.

Science.gov (United States)

Aikio, Sanna; Hiltunen, Jussi; Hiitola-Keinänen, Johanna; Hiltunen, Marianne; Kontturi, Ville; Siitonen, Samuli; Puustinen, Jarkko; Karioja, Pentti

2016-02-08

Flexible photonic integrated circuit technology is an emerging field expanding the usage possibilities of photonics, particularly in sensor applications, by enabling the realization of conformable devices and introduction of new alternative production methods. Here, we demonstrate that disposable polymeric photonic integrated circuit devices can be produced in lengths of hundreds of meters by ultra-high volume roll-to-roll methods on a flexible carrier. Attenuation properties of hundreds of individual devices were measured confirming that waveguides with good and repeatable performance were fabricated. We also demonstrate the applicability of the devices for the evanescent wave sensing of ambient refractive index. The production of integrated photonic devices using ultra-high volume fabrication, in a similar manner as paper is produced, may inherently expand methods of manufacturing low-cost disposable photonic integrated circuits for a wide range of sensor applications.

Implantable neurotechnologies: a review of integrated circuit neural amplifiers.

Science.gov (United States)

Ng, Kian Ann; Greenwald, Elliot; Xu, Yong Ping; Thakor, Nitish V

2016-01-01

Neural signal recording is critical in modern day neuroscience research and emerging neural prosthesis programs. Neural recording requires the use of precise, low-noise amplifier systems to acquire and condition the weak neural signals that are transduced through electrode interfaces. Neural amplifiers and amplifier-based systems are available commercially or can be designed in-house and fabricated using integrated circuit (IC) technologies, resulting in very large-scale integration or application-specific integrated circuit solutions. IC-based neural amplifiers are now used to acquire untethered/portable neural recordings, as they meet the requirements of a miniaturized form factor, light weight and low power consumption. Furthermore, such miniaturized and low-power IC neural amplifiers are now being used in emerging implantable neural prosthesis technologies. This review focuses on neural amplifier-based devices and is presented in two interrelated parts. First, neural signal recording is reviewed, and practical challenges are highlighted. Current amplifier designs with increased functionality and performance and without penalties in chip size and power are featured. Second, applications of IC-based neural amplifiers in basic science experiments (e.g., cortical studies using animal models), neural prostheses (e.g., brain/nerve machine interfaces) and treatment of neuronal diseases (e.g., DBS for treatment of epilepsy) are highlighted. The review concludes with future outlooks of this technology and important challenges with regard to neural signal amplification.

RF and microwave integrated circuit development technology, packaging and testing

CERN Document Server

Gamand, Patrice; Kelma, Christophe

2018-01-01

RF and Microwave Integrated Circuit Development bridges the gap between existing literature, which focus mainly on the 'front-end' part of a product development (system, architecture, design techniques), by providing the reader with an insight into the 'back-end' part of product development. In addition, the authors provide practical answers and solutions regarding the choice of technology, the packaging solutions and the effects on the performance on the circuit and to the industrial testing strategy. It will also discuss future trends and challenges and includes case studies to illustrate examples. * Offers an overview of the challenges in RF/microwave product design * Provides practical answers to packaging issues and evaluates its effect on the performance of the circuit * Includes industrial testing strategies * Examines relevant RF MIC technologies and the factors which affect the choice of technology for a particular application, e.g. technical performance and cost * Discusses future trends and challen...

Metal contact engineering and registration-free fabrication of complementary metal-oxide semiconductor integrated circuits using aligned carbon nanotubes.

Science.gov (United States)

Wang, Chuan; Ryu, Koungmin; Badmaev, Alexander; Zhang, Jialu; Zhou, Chongwu

2011-02-22

Complementary metal-oxide semiconductor (CMOS) operation is very desirable for logic circuit applications as it offers rail-to-rail swing, larger noise margin, and small static power consumption. However, it remains to be a challenging task for nanotube-based devices. Here in this paper, we report our progress on metal contact engineering for n-type nanotube transistors and CMOS integrated circuits using aligned carbon nanotubes. By using Pd as source/drain contacts for p-type transistors, small work function metal Gd as source/drain contacts for n-type transistors, and evaporated SiO(2) as a passivation layer, we have achieved n-type transistor, PN diode, and integrated CMOS inverter with an air-stable operation. Compared with other nanotube n-doping techniques, such as potassium doping, PEI doping, hydrazine doping, etc., using low work function metal contacts for n-type nanotube devices is not only air stable but also integrated circuit fabrication compatible. Moreover, our aligned nanotube platform for CMOS integrated circuits shows significant advantage over the previously reported individual nanotube platforms with respect to scalability and reproducibility and suggests a practical and realistic approach for nanotube-based CMOS integrated circuit applications.

Test methods of total dose effects in very large scale integrated circuits

International Nuclear Information System (INIS)

He Chaohui; Geng Bin; He Baoping; Yao Yujuan; Li Yonghong; Peng Honglun; Lin Dongsheng; Zhou Hui; Chen Yusheng

2004-01-01

A kind of test method of total dose effects (TDE) is presented for very large scale integrated circuits (VLSI). The consumption current of devices is measured while function parameters of devices (or circuits) are measured. Then the relation between data errors and consumption current can be analyzed and mechanism of TDE in VLSI can be proposed. Experimental results of 60 Co γ TDEs are given for SRAMs, EEPROMs, FLASH ROMs and a kind of CPU

An analysis of latch-up characteristics and latch-up windows in CMOS integrated circuits

International Nuclear Information System (INIS)

Xu Xianguo; Yang Huaimin

2004-01-01

Because of topology's complexity, there may be several potential parasitic latch-up paths in a CMOS integrated circuit. All of the latch-up paths may have an effect on each other or one another due to different triggering dose rate, holding voltage and holding current and then one or more latch-up windows may appear. After we analyze the latch-up characteristic of CMOS integrated circuits in detail, a 'three-path' latch-up model is developed and used to explain the latch-up window phenomena reasonably. (authors)

Study on boiling heat transfer from diode elements in an integrated circuit chip

Energy Technology Data Exchange (ETDEWEB)

Hijikata, Kunio; Nagasaki, Takao; Kurata, Naoki (Tokyo Institute of Technology Faculty of Engineering (Japan))

1989-02-25

By temperature measurement of elements in boiling experiments with diodes in an integrated circuit (IC) chip, characteristics of boiling heat transfer from tiny heat generating elements in an IC chip and thermal transfer characteristics of multiple heating elements adjoining positioned were studied. The Package of an IC was removed by acid to expose the IC chip. Electricity is applied to the diode in the IC to study the heat transfer properties. The heat transfer rate from a tiny heating element on an IC is greater than that from the conventional continual heated surface. In the case of heat generation by two adjoining elements, the relationship between the total amount of heat and the temperature of elements shows the same characteristics as in the case with a single element. The boiling heat transfer properties of an element in an IC chip are influenced by such microstructure surrounding the element as the pattern of wiring. Heat transfer increases with the decreasing size of the heating element by the heat transfer to the substrate beneath the element. 10 refs., 15 figs.

A study of radiation hardness screening techniques of integrated circuits

International Nuclear Information System (INIS)

Wang Xuli

2002-01-01

The principle and operational procedure of Integrated Circuits (ICs) screening with irradiation-and-anneal and multicomponent regression analysis are discussed. The key technology, advantages and shortcomings of the two methods are described in contrast, and some advices are given with the state-of-the-art of the screening technology

Scaling of graphene integrated circuits.

Science.gov (United States)

Bianchi, Massimiliano; Guerriero, Erica; Fiocco, Marco; Alberti, Ruggero; Polloni, Laura; Behnam, Ashkan; Carrion, Enrique A; Pop, Eric; Sordan, Roman

2015-05-07

The influence of transistor size reduction (scaling) on the speed of realistic multi-stage integrated circuits (ICs) represents the main performance metric of a given transistor technology. Despite extensive interest in graphene electronics, scaling efforts have so far focused on individual transistors rather than multi-stage ICs. Here we study the scaling of graphene ICs based on transistors from 3.3 to 0.5 μm gate lengths and with different channel widths, access lengths, and lead thicknesses. The shortest gate delay of 31 ps per stage was obtained in sub-micron graphene ROs oscillating at 4.3 GHz, which is the highest oscillation frequency obtained in any strictly low-dimensional material to date. We also derived the fundamental Johnson limit, showing that scaled graphene ICs could be used at high frequencies in applications with small voltage swing.

Integrated optical circuits for numerical computation

Science.gov (United States)

Verber, C. M.; Kenan, R. P.

1983-01-01

The development of integrated optical circuits (IOC) for numerical-computation applications is reviewed, with a focus on the use of systolic architectures. The basic architecture criteria for optical processors are shown to be the same as those proposed by Kung (1982) for VLSI design, and the advantages of IOCs over bulk techniques are indicated. The operation and fabrication of electrooptic grating structures are outlined, and the application of IOCs of this type to an existing 32-bit, 32-Mbit/sec digital correlator, a proposed matrix multiplier, and a proposed pipeline processor for polynomial evaluation is discussed. The problems arising from the inherent nonlinearity of electrooptic gratings are considered. Diagrams and drawings of the application concepts are provided.

Photosensitive N channel MOSFET device on silicon on sapphire substrate

International Nuclear Information System (INIS)

Le Goascoz, V.; Borel, J.

1975-01-01

An anomalous behavior of the N channel output current characteristic in a SOS MOSFET with a floating bulk is described. Such a phenomenon can be used in a photosensitive device with internal gain. Such devices can be used on SOS substrates to achieve integrated circuits with high insulating voltages and data transmission by optical means [fr

Thermal Management in Fine-Grained 3-D Integrated Circuits

OpenAIRE

Iqbal, Md Arif; Macha, Naveen Kumar; Danesh, Wafi; Hossain, Sehtab; Rahman, Mostafizur

2018-01-01

For beyond 2-D CMOS logic, various 3-D integration approaches specially transistor based 3-D integrations such as monolithic 3-D [1], Skybridge [2], SN3D [3] holds most promise. However, such 3D architectures within small form factor increase hotspots and demand careful consideration of thermal management at all levels of integration [4] as stacked transistors are detached from the substrate (i.e., heat sink). Traditional system level approaches such as liquid cooling [5], heat spreader [6], ...

Optimization of Segmentation Quality of Integrated Circuit Images

Directory of Open Access Journals (Sweden)

Gintautas Mušketas

2012-04-01

Full Text Available The paper presents investigation into the application of genetic algorithms for the segmentation of the active regions of integrated circuit images. This article is dedicated to a theoretical examination of the applied methods (morphological dilation, erosion, hit-and-miss, threshold and describes genetic algorithms, image segmentation as optimization problem. The genetic optimization of the predefined filter sequence parameters is carried out. Improvement to segmentation accuracy using a non optimized filter sequence makes 6%.Artcile in Lithuanian

The functional significance of newly born neurons integrated into olfactory bulb circuits.

Science.gov (United States)

Sakamoto, Masayuki; Kageyama, Ryoichiro; Imayoshi, Itaru

2014-01-01

The olfactory bulb (OB) is the first central processing center for olfactory information connecting with higher areas in the brain, and this neuronal circuitry mediates a variety of odor-evoked behavioral responses. In the adult mammalian brain, continuous neurogenesis occurs in two restricted regions, the subventricular zone (SVZ) of the lateral ventricle and the hippocampal dentate gyrus. New neurons born in the SVZ migrate through the rostral migratory stream and are integrated into the neuronal circuits of the OB throughout life. The significance of this continuous supply of new neurons in the OB has been implicated in plasticity and memory regulation. Two decades of huge investigation in adult neurogenesis revealed the biological importance of integration of new neurons into the olfactory circuits. In this review, we highlight the recent findings about the physiological functions of newly generated neurons in rodent OB circuits and then discuss the contribution of neurogenesis in the brain function. Finally, we introduce cutting edge technologies to monitor and manipulate the activity of new neurons.

The functional significance of newly born neurons integrated into olfactory bulb circuits

Directory of Open Access Journals (Sweden)

Masayuki eSakamoto

2014-05-01

Full Text Available The olfactory bulb (OB is the first central processing center for olfactory information connecting with higher areas in the brain, and this neuronal circuitry mediates a variety of odor-evoked behavioral responses. In the adult mammalian brain, continuous neurogenesis occurs in two restricted regions, the subventricular zone (SVZ of the lateral ventricle and the hippocampal dentate gyrus. New neurons born in the SVZ migrate through the rostral migratory stream and are integrated into the neuronal circuits of the OB throughout life. The significance of this continuous supply of new neurons in the OB has been implicated in plasticity and memory regulation. Two decades of huge investigation in adult neurogenesis revealed the biological importance of integration of new neurons into the olfactory circuits. In this review, we highlight the recent findings about the physiological functions of newly generated neurons in rodent OB circuits and then discuss the contribution of neurogenesis in the brain function. Finally, we introduce cutting edge technologies to monitor and manipulate the activity of new neurons.

Soft-Matter Printed Circuit Board with UV Laser Micropatterning.

Science.gov (United States)

Lu, Tong; Markvicka, Eric J; Jin, Yichu; Majidi, Carmel

2017-07-05

When encapsulated in elastomer, micropatterned traces of Ga-based liquid metal (LM) can function as elastically deformable circuit wiring that provides mechanically robust electrical connectivity between solid-state elements (e.g., transistors, processors, and sensor nodes). However, LM-microelectronics integration is currently limited by challenges in rapid fabrication of LM circuits and the creation of vias between circuit terminals and the I/O pins of packaged electronics. In this study, we address both with a unique layup for soft-matter electronics in which traces of liquid-phase Ga-In eutectic (EGaIn) are patterned with UV laser micromachining (UVLM). The terminals of the elastomer-sealed LM circuit connect to the surface mounted chips through vertically aligned columns of EGaIn-coated Ag-Fe 2 O 3 microparticles that are embedded within an interfacial elastomer layer. The processing technique is compatible with conventional UVLM printed circuit board (PCB) prototyping and exploits the photophysical ablation of EGaIn on an elastomer substrate. Potential applications to wearable computing and biosensing are demonstrated with functional implementations in which soft-matter PCBs are populated with surface-mounted microelectronics.

Low Thermal Budget Fabrication of III-V Quantum Nanostructures on Si Substrates

International Nuclear Information System (INIS)

Bietti, S; Somaschini, C; Sanguinetti, S; Koguchi, N; Isella, G; Chrastina, D; Fedorov, A

2010-01-01

We show the possibility to integrate high quality III-V quantum nanostructures tunable in shape and emission energy on Si-Ge Virtual Substrate. Strong photoemission is observed, also at room temperature, from two different kind of GaAs quantum nanostructures fabricated on Silicon substrate. Due to the low thermal budget of the procedure used for the fabrication of the active layer, Droplet Epitaxy is to be considered an excellent candidate for implementation of optoelectronic devices on CMOS circuits.

Magnetic force microscopy method and apparatus to detect and image currents in integrated circuits

Science.gov (United States)

Campbell, Ann. N.; Anderson, Richard E.; Cole, Jr., Edward I.

1995-01-01

A magnetic force microscopy method and improved magnetic tip for detecting and quantifying internal magnetic fields resulting from current of integrated circuits. Detection of the current is used for failure analysis, design verification, and model validation. The interaction of the current on the integrated chip with a magnetic field can be detected using a cantilevered magnetic tip. Enhanced sensitivity for both ac and dc current and voltage detection is achieved with voltage by an ac coupling or a heterodyne technique. The techniques can be used to extract information from analog circuits.

Localization and Imaging of Integrated Circuit Defect Using Simple Optical Feedback Detection

Directory of Open Access Journals (Sweden)

Vernon Julius Cemine

2004-12-01

Full Text Available High-contrast microscopy of semiconductor and metal edifices in integrated circuits is demonstrated by combining laser-scanning confocal reflectance microscopy, one-photon optical-beam-induced current (1P-OBIC imaging, and optical feedback detection via a commercially available semiconductor laser that also serves as the excitation source. The confocal microscope has a compact in-line arrangement with no external photodetector. Confocal and 1P-OBIC images are obtained simultaneously from the same focused beam that is scanned across the sample plane. Image pairs are processed to generate exclusive high-contrast distributions of the semiconductor, metal, and dielectric sites in a GaAs photodiode array sample. The method is then utilized to demonstrate defect localization and imaging in an integrated circuit.

Heat management in integrated circuits on-chip and system-level monitoring and cooling

CERN Document Server

Ogrenci-Memik, Seda

2016-01-01

This essential overview covers the subject of thermal monitoring and management in integrated circuits. Specifically, it focuses on devices and materials that are intimately integrated on-chip (as opposed to in-package or on-board) for the purposes of thermal monitoring and thermal management.

A Novel Analog Integrated Circuit Design Course Covering Design, Layout, and Resulting Chip Measurement

Science.gov (United States)

Lin, Wei-Liang; Cheng, Wang-Chuan; Wu, Chen-Hao; Wu, Hai-Ming; Wu, Chang-Yu; Ho, Kuan-Hsuan; Chan, Chueh-An

2010-01-01

This work describes a novel, first-year graduate-level analog integrated circuit (IC) design course. The course teaches students analog circuit design; an external manufacturer then produces their designs in three different silicon chips. The students, working in pairs, then test these chips to verify their success. All work is completed within…

Integrated digital printing of flexible circuits for wireless sensing (Conference Presentation)

Science.gov (United States)

Mei, Ping; Whiting, Gregory L.; Schwartz, David E.; Ng, Tse Nga; Krusor, Brent S.; Ready, Steve E.; Daniel, George; Veres, Janos; Street, Bob

2016-09-01

Wireless sensing has broad applications in a wide variety of fields such as infrastructure monitoring, chemistry, environmental engineering and cold supply chain management. Further development of sensing systems will focus on achieving light weight, flexibility, low power consumption and low cost. Fully printed electronics provide excellent flexibility and customizability, as well as the potential for low cost and large area applications, but lack solutions for high-density, high-performance circuitry. Conventional electronics mounted on flexible printed circuit boards provide high performance but are not digitally fabricated or readily customizable. Incorporation of small silicon dies or packaged chips into a printed platform enables high performance without compromising flexibility or cost. At PARC, we combine high functionality c-Si CMOS and digitally printed components and interconnects to create an integrated platform that can read and process multiple discrete sensors. Our approach facilitates customization to a wide variety of sensors and user interfaces suitable for a broad range of applications including remote monitoring of health, structures and environment. This talk will describe several examples of printed wireless sensing systems. The technologies required for these sensor systems are a mix of novel sensors, printing processes, conventional microchips, flexible substrates and energy harvesting power solutions.

Thermoelectricity from wasted heat of integrated circuits

KAUST Repository

Fahad, Hossain M.

2012-05-22

We demonstrate that waste heat from integrated circuits especially computer microprocessors can be recycled as valuable electricity to power up a portion of the circuitry or other important accessories such as on-chip cooling modules, etc. This gives a positive spin to a negative effect of ever increasing heat dissipation associated with increased power consumption aligned with shrinking down trend of transistor dimension. This concept can also be used as an important vehicle for self-powered systemson- chip. We provide theoretical analysis supported by simulation data followed by experimental verification of on-chip thermoelectricity generation from dissipated (otherwise wasted) heat of a microprocessor.

Accelerating functional verification of an integrated circuit

Science.gov (United States)

Deindl, Michael; Ruedinger, Jeffrey Joseph; Zoellin, Christian G.

2015-10-27

Illustrative embodiments include a method, system, and computer program product for accelerating functional verification in simulation testing of an integrated circuit (IC). Using a processor and a memory, a serial operation is replaced with a direct register access operation, wherein the serial operation is configured to perform bit shifting operation using a register in a simulation of the IC. The serial operation is blocked from manipulating the register in the simulation of the IC. Using the register in the simulation of the IC, the direct register access operation is performed in place of the serial operation.

FUZZY NEURAL NETWORK FOR OBJECT IDENTIFICATION ON INTEGRATED CIRCUIT LAYOUTS

Directory of Open Access Journals (Sweden)

A. A. Doudkin

2015-01-01

Full Text Available Fuzzy neural network model based on neocognitron is proposed to identify layout objects on images of topological layers of integrated circuits. Testing of the model on images of real chip layouts was showed a highеr degree of identification of the proposed neural network in comparison to base neocognitron.

Integrated electric circuit engineering system in LSI design center, Konami Kogyo Co. Ltd

Energy Technology Data Exchange (ETDEWEB)

Kamitsuki, Kagehiko; Tanaka, Tomiaki

1988-08-26

Development of the integrated engineering system is presented which designs and manufactures the hardwares, softwares and cases of electronic game products with LSI integratedly as an experiment. The system is intended to reduce the number of each development of the parts, to verify each other by comparing each parts with the product concept during the development, to reduce modifications, and to shorten development periods. The main subsystems are an electric circuit CAD for LSI designs and a mechanical CAD for case or printed circuit board designs. The LSI development period has been shortened up to one month by a larger capacity computer and higher speed simulator, and the electric circuit engineering system capable of keeping step with the software development has been approximately completed. In the future, the system will be intended to introduce an expert system or a visual system capable of predicting the final product during a logical design period. (10 figs, 1 photo)

Integrated circuit authentication hardware Trojans and counterfeit detection

CERN Document Server

Tehranipoor, Mohammad; Zhang, Xuehui

2013-01-01

This book describes techniques to verify the authenticity of integrated circuits (ICs). It focuses on hardware Trojan detection and prevention and counterfeit detection and prevention. The authors discuss a variety of detection schemes and design methodologies for improving Trojan detection techniques, as well as various attempts at developing hardware Trojans in IP cores and ICs. While describing existing Trojan detection methods, the authors also analyze their effectiveness in disclosing various types of Trojans, and demonstrate several architecture-level solutions. 

Fully Integrated Solar Energy Harvester and Sensor Interface Circuits for Energy-Efficient Wireless Sensing Applications

Directory of Open Access Journals (Sweden)

Maher Kayal

2013-02-01

Full Text Available This paper presents an energy-efficient solar energy harvesting and sensing microsystem that harvests solar energy from a micro-power photovoltaic module for autonomous operation of a gas sensor. A fully integrated solar energy harvester stores the harvested energy in a rechargeable NiMH microbattery. Hydrogen concentration and temperature are measured and converted to a digital value with 12-bit resolution using a fully integrated sensor interface circuit, and a wireless transceiver is used to transmit the measurement results to a base station. As the harvested solar energy varies considerably in different lighting conditions, in order to guarantee autonomous operation of the sensor, the proposed area- and energy-efficient circuit scales the power consumption and performance of the sensor. The power management circuit dynamically decreases the operating frequency of digital circuits and bias currents of analog circuits in the sensor interface circuit and increases the idle time of the transceiver under reduced light intensity. The proposed microsystem has been implemented in a 0.18 µm complementary metal-oxide-semiconductor (CMOS process and occupies a core area of only 0.25 mm2. This circuit features a low power consumption of 2.1 µW when operating at its highest performance. It operates with low power supply voltage in the 0.8V to 1.6 V range.